1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Subtarget Enumeration Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_SUBTARGETINFO_ENUM
10#undef GET_SUBTARGETINFO_ENUM
11
12namespace llvm {
13
14namespace AMDGPU {
15
16enum {
17 Feature16BitInsts = 0,
18 Feature32BitNumRecordsBufferResource = 1,
19 Feature45BitNumRecordsBufferResource = 2,
20 Feature64BitLiterals = 3,
21 Feature1024AddressableVGPRs = 4,
22 Feature1536VGPRs = 5,
23 FeatureA16 = 6,
24 FeatureAGPRAlloc = 7,
25 FeatureAddMinMaxInsts = 8,
26 FeatureAddNoCarryInsts = 9,
27 FeatureAddSubU64Insts = 10,
28 FeatureAddressableLocalMemorySize32768 = 11,
29 FeatureAddressableLocalMemorySize65536 = 12,
30 FeatureAddressableLocalMemorySize163840 = 13,
31 FeatureAddressableLocalMemorySize196608 = 14,
32 FeatureAddressableLocalMemorySize327680 = 15,
33 FeatureAgentScopeFineGrainedRemoteMemoryAtomics = 16,
34 FeatureApertureRegs = 17,
35 FeatureArchitectedFlatScratch = 18,
36 FeatureArchitectedSGPRs = 19,
37 FeatureAshrPkInsts = 20,
38 FeatureAssemblerPermissiveWavesize = 21,
39 FeatureAsyncLoadToLDSInsts = 22,
40 FeatureAsyncStoreFromLDSInsts = 23,
41 FeatureAsynccnt = 24,
42 FeatureAtomicBufferGlobalPkAddF16Insts = 25,
43 FeatureAtomicBufferGlobalPkAddF16NoRtnInsts = 26,
44 FeatureAtomicBufferPkAddBF16Inst = 27,
45 FeatureAtomicCSubNoRtnInsts = 28,
46 FeatureAtomicCondSubClampFlatInsts = 29,
47 FeatureAtomicDsCondSubClampInsts = 30,
48 FeatureAtomicDsPkAdd16Insts = 31,
49 FeatureAtomicFMinFMaxF32FlatInsts = 32,
50 FeatureAtomicFMinFMaxF32GlobalInsts = 33,
51 FeatureAtomicFMinFMaxF64FlatInsts = 34,
52 FeatureAtomicFMinFMaxF64GlobalInsts = 35,
53 FeatureAtomicFaddNoRtnInsts = 36,
54 FeatureAtomicFaddRtnInsts = 37,
55 FeatureAtomicFlatPkAdd16Insts = 38,
56 FeatureAtomicGlobalPkAddBF16Inst = 39,
57 FeatureAutoWaitcntBeforeBarrier = 40,
58 FeatureBF8ConversionScaleInsts = 41,
59 FeatureBF16ConversionInsts = 42,
60 FeatureBF16InlineConstFromUpperFP32 = 43,
61 FeatureBF16PackedInsts = 44,
62 FeatureBF16TransInsts = 45,
63 FeatureBVHDualAndBVH8Insts = 46,
64 FeatureBVHRayTracingInsts = 47,
65 FeatureBackOffBarrier = 48,
66 FeatureBitOp3Insts = 49,
67 FeatureBlock16ConversionScaleInsts = 50,
68 FeatureBufferInvInst = 51,
69 FeatureCIInsts = 52,
70 FeatureClusters = 53,
71 FeatureCuMode = 54,
72 FeatureCubeInsts = 55,
73 FeatureCvtFP8ByteSel = 56,
74 FeatureCvtFP8SDWASrcSel = 57,
75 FeatureCvtFP8VOP1Bug = 58,
76 FeatureCvtNormInsts = 59,
77 FeatureCvtPkF16F32Inst = 60,
78 FeatureCvtPkNormVOP2Insts = 61,
79 FeatureCvtPkNormVOP3Insts = 62,
80 FeatureCvtSrPkBF16F32Inst = 63,
81 FeatureD16Writes32BitVgpr = 64,
82 FeatureDLInsts = 65,
83 FeatureDPALU_DPP = 66,
84 FeatureDPP = 67,
85 FeatureDPP8 = 68,
86 FeatureDPPBroadcasts = 69,
87 FeatureDPPSrc1SGPR = 70,
88 FeatureDPPWavefrontShifts = 71,
89 FeatureDX10ClampAndIEEEMode = 72,
90 FeatureDataCacheLineSize128 = 73,
91 FeatureDefaultComponentBroadcast = 74,
92 FeatureDefaultComponentZero = 75,
93 FeatureDot1Insts = 76,
94 FeatureDot2Insts = 77,
95 FeatureDot3Insts = 78,
96 FeatureDot4Insts = 79,
97 FeatureDot5Insts = 80,
98 FeatureDot6Insts = 81,
99 FeatureDot7Insts = 82,
100 FeatureDot8Insts = 83,
101 FeatureDot9Insts = 84,
102 FeatureDot10Insts = 85,
103 FeatureDot11Insts = 86,
104 FeatureDot12Insts = 87,
105 FeatureDot13Insts = 88,
106 FeatureDsSrc2Insts = 89,
107 FeatureDumpCodeLower = 90,
108 FeatureEmulatedSystemScopeAtomics = 91,
109 FeatureEnableDS128 = 92,
110 FeatureEnableFlatScratch = 93,
111 FeatureEnableLoadStoreOpt = 94,
112 FeatureEnablePRTStrictNull = 95,
113 FeatureEnableSIScheduler = 96,
114 FeatureEnableUnsafeDSOffsetFolding = 97,
115 FeatureExclusiveScanInsts = 98,
116 FeatureExtendedImageInsts = 99,
117 FeatureF16BF16ToFP6BF6ConversionScaleInsts = 100,
118 FeatureF16FP8ConversionInsts = 101,
119 FeatureF32ToF16BF16ConversionSRInsts = 102,
120 FeatureF32ToFP6BF6ConversionScaleInsts = 103,
121 FeatureFMA = 104,
122 FeatureFP4ConversionScaleInsts = 105,
123 FeatureFP6BF6ConversionScaleInsts = 106,
124 FeatureFP6BF6ToF16BF16F32ConversionScaleInsts = 107,
125 FeatureFP8ConversionInsts = 108,
126 FeatureFP8ConversionScaleInsts = 109,
127 FeatureFP8E5M3Insts = 110,
128 FeatureFP8F16ConversionInsts = 111,
129 FeatureFP8Insts = 112,
130 FeatureFP64 = 113,
131 FeatureFastDenormalF32 = 114,
132 FeatureFastFMAF32 = 115,
133 FeatureFlatAddressSpace = 116,
134 FeatureFlatAtomicFaddF32Inst = 117,
135 FeatureFlatBufferGlobalAtomicFaddF64Inst = 118,
136 FeatureFlatGVSMode = 119,
137 FeatureFlatGlobalInsts = 120,
138 FeatureFlatInstOffsets = 121,
139 FeatureFlatOffsetBits12 = 122,
140 FeatureFlatOffsetBits24 = 123,
141 FeatureFlatScratchInsts = 124,
142 FeatureFlatSegmentOffsetBug = 125,
143 FeatureFlatSignedOffset = 126,
144 FeatureFmaLegacy32Insts = 127,
145 FeatureFmaMixBF16Insts = 128,
146 FeatureFmaMixInsts = 129,
147 FeatureFmacF64Inst = 130,
148 FeatureFormattedMUBUFInsts = 131,
149 FeatureFullRate64Ops = 132,
150 FeatureG16 = 133,
151 FeatureGCN3Encoding = 134,
152 FeatureGDS = 135,
153 FeatureGFX7GFX8GFX9Insts = 136,
154 FeatureGFX8Insts = 137,
155 FeatureGFX9 = 138,
156 FeatureGFX9Insts = 139,
157 FeatureGFX10 = 140,
158 FeatureGFX10Insts = 141,
159 FeatureGFX10_3Insts = 142,
160 FeatureGFX10_BEncoding = 143,
161 FeatureGFX11 = 144,
162 FeatureGFX11Insts = 145,
163 FeatureGFX11_7Insts = 146,
164 FeatureGFX12 = 147,
165 FeatureGFX12Insts = 148,
166 FeatureGFX13 = 149,
167 FeatureGFX13Insts = 150,
168 FeatureGFX90AInsts = 151,
169 FeatureGFX125xLowestRateWMMA = 152,
170 FeatureGFX940Insts = 153,
171 FeatureGFX950Insts = 154,
172 FeatureGFX1250Insts = 155,
173 FeatureGFX1250VALUBlockingCycles = 156,
174 FeatureGFX1250_STRICT = 157,
175 FeatureGFX1251GEMMInsts = 158,
176 FeatureGWS = 159,
177 FeatureGetDoorbellID = 160,
178 FeatureGetWaveIdInst = 161,
179 FeatureGloballyAddressableScratch = 162,
180 FeatureHalfAddressablePhysicalLocalMemory = 163,
181 FeatureHalfRate64Ops = 164,
182 FeatureIEEEMinimumMaximumInsts = 165,
183 FeatureImageGather4D16Bug = 166,
184 FeatureImageInsts = 167,
185 FeatureImageStoreD16Bug = 168,
186 FeatureIndexedResources = 169,
187 FeatureInstCacheLineSize64 = 170,
188 FeatureInstCacheLineSize128 = 171,
189 FeatureInstFwdPrefetchBug = 172,
190 FeatureIntClamp = 173,
191 FeatureInv2PiInlineImm = 174,
192 FeatureKernargPreload = 175,
193 FeatureLDSAllocGranularity256 = 176,
194 FeatureLDSAllocGranularity512 = 177,
195 FeatureLDSAllocGranularity1024 = 178,
196 FeatureLDSAllocGranularity1280 = 179,
197 FeatureLDSAllocGranularity2048 = 180,
198 FeatureLDSBankCount16 = 181,
199 FeatureLDSBankCount32 = 182,
200 FeatureLDSBankCount64 = 183,
201 FeatureLDSEncodingGranularity256 = 184,
202 FeatureLDSEncodingGranularity512 = 185,
203 FeatureLDSEncodingGranularity1024 = 186,
204 FeatureLDSEncodingGranularity1280 = 187,
205 FeatureLDSEncodingGranularity2048 = 188,
206 FeatureLDSMisalignedBug = 189,
207 FeatureLdsAtomicAddF64 = 190,
208 FeatureLdsBarrierArriveAtomic = 191,
209 FeatureLdsBranchVmemWARHazard = 192,
210 FeatureLerpInst = 193,
211 FeatureLshlAddU64Inst = 194,
212 FeatureMADIntraFwdBug = 195,
213 FeatureMAIInsts = 196,
214 FeatureMFMAInlineLiteralBug = 197,
215 FeatureMIMG_R128 = 198,
216 FeatureMSAALoadDstSelBug = 199,
217 FeatureMSAALoadInsts = 200,
218 FeatureMTBUFInsts = 201,
219 FeatureMadMacF32Insts = 202,
220 FeatureMadMixInsts = 203,
221 FeatureMadNC64_32Insts = 204,
222 FeatureMadU32Inst = 205,
223 FeatureMaxHardClauseLength32 = 206,
224 FeatureMaxHardClauseLength63 = 207,
225 FeatureMaxPrivateElementSize4 = 208,
226 FeatureMaxPrivateElementSize8 = 209,
227 FeatureMaxPrivateElementSize16 = 210,
228 FeatureMaxWavesPerEU8 = 211,
229 FeatureMaxWavesPerEU10 = 212,
230 FeatureMaxWavesPerEU16 = 213,
231 FeatureMaxWavesPerEU20 = 214,
232 FeatureMcastLoadInsts = 215,
233 FeatureMemoryAtomicFAddF32DenormalSupport = 216,
234 FeatureMin3Max3PKF16 = 217,
235 FeatureMinMaxI64Insts = 218,
236 FeatureMinimum3Maximum3F16 = 219,
237 FeatureMinimum3Maximum3F32 = 220,
238 FeatureMinimum3Maximum3PKF16 = 221,
239 FeatureMixedLoadStoreClauses = 222,
240 FeatureMovrel = 223,
241 FeatureMqsadInsts = 224,
242 FeatureMqsadPkInsts = 225,
243 FeatureMsadInsts = 226,
244 FeatureNSAClauseBug = 227,
245 FeatureNSAEncoding = 228,
246 FeatureNSAtoVMEMBug = 229,
247 FeatureNeedsAligned2addrDS = 230,
248 FeatureNeedsTDMDrain = 231,
249 FeatureNegativeScratchOffsetBug = 232,
250 FeatureNegativeUnalignedScratchOffsetBug = 233,
251 FeatureNoDataDepHazard = 234,
252 FeatureNoF16PseudoScalarTransInlineConstants = 235,
253 FeatureNoSdstCMPX = 236,
254 FeatureNoSleepForever = 237,
255 FeatureOCPFP8ConversionInsts = 238,
256 FeatureOffset3fBug = 239,
257 FeaturePackedFP32Ops = 240,
258 FeaturePackedFP32SingleSGPROps = 241,
259 FeaturePackedFP64SingleSGPROps = 242,
260 FeaturePackedTID = 243,
261 FeaturePackedU64SingleSGPROps = 244,
262 FeaturePartialNSAEncoding = 245,
263 FeaturePermlane16Insts = 246,
264 FeaturePermlane16Swap = 247,
265 FeaturePermlane32Swap = 248,
266 FeaturePkAddMinMaxInsts = 249,
267 FeaturePkFmacF16Inst = 250,
268 FeaturePointSampleAccel = 251,
269 FeaturePopsExitingWaveID = 252,
270 FeaturePreciseMemory = 253,
271 FeaturePrivEnabledTrap2NopBug = 254,
272 FeaturePrngInst = 255,
273 FeaturePseudoScalarTrans = 256,
274 FeatureQsadInsts = 257,
275 FeatureR128A16 = 258,
276 FeatureRealTrue16Insts = 259,
277 FeatureRequiredExportPriority = 260,
278 FeatureRequiresAlignedVGPRs = 261,
279 FeatureRequiresCOV6 = 262,
280 FeatureRequiresInitialUnclausedVmem = 263,
281 FeatureRestrictedSOffset = 264,
282 FeatureSALUFloatInsts = 265,
283 FeatureSALUMinimumMaximumInsts = 266,
284 FeatureSBarrierLeaveImm = 267,
285 FeatureSDWA = 268,
286 FeatureSDWAMac = 269,
287 FeatureSDWAOmod = 270,
288 FeatureSDWAOutModsVOPC = 271,
289 FeatureSDWAScalar = 272,
290 FeatureSDWASdst = 273,
291 FeatureSGPRInitBug = 274,
292 FeatureSMEMtoVectorWriteHazard = 275,
293 FeatureSMemRealTime = 276,
294 FeatureSMemTimeInst = 277,
295 FeatureSRAMECCOnOffModes = 278,
296 FeatureSWMMACGfx1200Insts = 279,
297 FeatureSWMMACGfx1250Insts = 280,
298 FeatureSWakeupBarrier = 281,
299 FeatureSWakeupImm = 282,
300 FeatureSadInsts = 283,
301 FeatureSafeCUPrefetch = 284,
302 FeatureSafeSmemPrefetch = 285,
303 FeatureScalarAtomics = 286,
304 FeatureScalarDwordx3Loads = 287,
305 FeatureScalarFlatScratchInsts = 288,
306 FeatureScalarStores = 289,
307 FeatureSeaIslands = 290,
308 FeatureSetPrioIncWgInst = 291,
309 FeatureSetregVGPRMSBFixup = 292,
310 FeatureShaderCyclesHiLoRegisters = 293,
311 FeatureShaderCyclesRegister = 294,
312 FeatureSlowMaxMinMulI64Insts = 295,
313 FeatureSmemPrefetchInsts = 296,
314 FeatureSouthernIslands = 297,
315 FeatureSupportsSRAMECC = 298,
316 FeatureSupportsWGP = 299,
317 FeatureSupportsWave32 = 300,
318 FeatureSupportsWave64 = 301,
319 FeatureSupportsXNACK = 302,
320 FeatureTDMInsts = 303,
321 FeatureTanhInsts = 304,
322 FeatureTensorCvtLutInsts = 305,
323 FeatureTgSplitSupport = 306,
324 FeatureTransCoexecutionHazard = 307,
325 FeatureTransposeLoadF4F6Insts = 308,
326 FeatureTrapHandler = 309,
327 FeatureTrigReducedRange = 310,
328 FeatureTrue16BitInsts = 311,
329 FeatureUnalignedAccessMode = 312,
330 FeatureUnalignedBufferAccess = 313,
331 FeatureUnalignedDSAccess = 314,
332 FeatureUnalignedScratchAccess = 315,
333 FeatureUnpackedD16VMem = 316,
334 FeatureUseAddPC64Inst = 317,
335 FeatureUseBlockVGPROpsForCSR = 318,
336 FeatureUseFlatForGlobal = 319,
337 FeatureUserSGPRInit16Bug = 320,
338 FeatureVALUTransUseHazard = 321,
339 FeatureVGPRIndexMode = 322,
340 FeatureVMEMtoScalarWriteHazard = 323,
341 FeatureVMemToLDSLoad = 324,
342 FeatureVMovB64Inst = 325,
343 FeatureVMulU64Inst = 326,
344 FeatureVOP3Literal = 327,
345 FeatureVOP3PInsts = 328,
346 FeatureVOP3PX2IncrementsVaVdstTwice = 329,
347 FeatureVOPD3F64OPYSrcHazard = 330,
348 FeatureVOPDInsts = 331,
349 FeatureVOPDInterlockHazard = 332,
350 FeatureVPermPk16Hazard = 333,
351 FeatureVcmpxExecWARHazard = 334,
352 FeatureVcmpxPermlaneHazard = 335,
353 FeatureVmemPrefInsts = 336,
354 FeatureVmemWriteVgprInOrder = 337,
355 FeatureVolcanicIslands = 338,
356 FeatureVscnt = 339,
357 FeatureWMMA16x16x128FP8Insts = 340,
358 FeatureWMMA128bInsts = 341,
359 FeatureWMMA256bInsts = 342,
360 FeatureWMMACoexecutionHazards = 343,
361 FeatureWMMAF4Insts = 344,
362 FeatureWMMAN16Insts = 345,
363 FeatureWaitXcnt = 346,
364 FeatureWaitsBeforeSystemScopeStores = 347,
365 FeatureWaveMatchInsts = 348,
366 FeatureWavefrontSize16 = 349,
367 FeatureWavefrontSize32 = 350,
368 FeatureWavefrontSize64 = 351,
369 FeatureXF32Insts = 352,
370 FeatureXNACKOnOffModes = 353,
371 NumSubtargetFeatures = 354
372};
373
374} // namespace AMDGPU
375
376} // namespace llvm
377
378#endif // GET_SUBTARGETINFO_ENUM
379
380#ifdef GET_SUBTARGETINFO_MACRO
381
382GET_SUBTARGETINFO_MACRO(DumpCode, false, dumpCode)
383GET_SUBTARGETINFO_MACRO(EnableCuMode, false, enableCuMode)
384GET_SUBTARGETINFO_MACRO(EnableDS128, false, enableDS128)
385GET_SUBTARGETINFO_MACRO(EnableFlatScratch, false, enableFlatScratch)
386GET_SUBTARGETINFO_MACRO(EnableLoadStoreOpt, false, enableLoadStoreOpt)
387GET_SUBTARGETINFO_MACRO(EnablePRTStrictNull, false, enablePRTStrictNull)
388GET_SUBTARGETINFO_MACRO(EnablePreciseMemory, false, enablePreciseMemory)
389GET_SUBTARGETINFO_MACRO(EnableRealTrue16Insts, false, enableRealTrue16Insts)
390GET_SUBTARGETINFO_MACRO(EnableSIScheduler, false, enableSIScheduler)
391GET_SUBTARGETINFO_MACRO(EnableUnsafeDSOffsetFolding, false, enableUnsafeDSOffsetFolding)
392GET_SUBTARGETINFO_MACRO(Has1024AddressableVGPRs, false, has1024AddressableVGPRs)
393GET_SUBTARGETINFO_MACRO(Has1536VGPRs, false, has1536VGPRs)
394GET_SUBTARGETINFO_MACRO(Has16BitInsts, false, has16BitInsts)
395GET_SUBTARGETINFO_MACRO(Has64BitLiterals, false, has64BitLiterals)
396GET_SUBTARGETINFO_MACRO(HasA16, false, hasA16)
397GET_SUBTARGETINFO_MACRO(HasAGPRAlloc, false, hasAGPRAlloc)
398GET_SUBTARGETINFO_MACRO(HasAddMinMaxInsts, false, hasAddMinMaxInsts)
399GET_SUBTARGETINFO_MACRO(HasAddNoCarryInsts, false, hasAddNoCarryInsts)
400GET_SUBTARGETINFO_MACRO(HasAddSubU64Insts, false, hasAddSubU64Insts)
401GET_SUBTARGETINFO_MACRO(HasAgentScopeFineGrainedRemoteMemoryAtomics, false, hasAgentScopeFineGrainedRemoteMemoryAtomics)
402GET_SUBTARGETINFO_MACRO(HasApertureRegs, false, hasApertureRegs)
403GET_SUBTARGETINFO_MACRO(HasArchitectedFlatScratch, false, hasArchitectedFlatScratch)
404GET_SUBTARGETINFO_MACRO(HasArchitectedSGPRs, false, hasArchitectedSGPRs)
405GET_SUBTARGETINFO_MACRO(HasAshrPkInsts, false, hasAshrPkInsts)
406GET_SUBTARGETINFO_MACRO(HasAssemblerPermissiveWavesize, false, hasAssemblerPermissiveWavesize)
407GET_SUBTARGETINFO_MACRO(HasAsyncLoadToLDSInsts, false, hasAsyncLoadToLDSInsts)
408GET_SUBTARGETINFO_MACRO(HasAsyncStoreFromLDSInsts, false, hasAsyncStoreFromLDSInsts)
409GET_SUBTARGETINFO_MACRO(HasAsynccnt, false, hasAsynccnt)
410GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16Insts, false, hasAtomicBufferGlobalPkAddF16Insts)
411GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16NoRtnInsts, false, hasAtomicBufferGlobalPkAddF16NoRtnInsts)
412GET_SUBTARGETINFO_MACRO(HasAtomicBufferPkAddBF16Inst, false, hasAtomicBufferPkAddBF16Inst)
413GET_SUBTARGETINFO_MACRO(HasAtomicCSubNoRtnInsts, false, hasAtomicCSubNoRtnInsts)
414GET_SUBTARGETINFO_MACRO(HasAtomicCondSubClampFlatInsts, false, hasAtomicCondSubClampFlatInsts)
415GET_SUBTARGETINFO_MACRO(HasAtomicDsCondSubClampInsts, false, hasAtomicDsCondSubClampInsts)
416GET_SUBTARGETINFO_MACRO(HasAtomicDsPkAdd16Insts, false, hasAtomicDsPkAdd16Insts)
417GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32FlatInsts, false, hasAtomicFMinFMaxF32FlatInsts)
418GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32GlobalInsts, false, hasAtomicFMinFMaxF32GlobalInsts)
419GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64FlatInsts, false, hasAtomicFMinFMaxF64FlatInsts)
420GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64GlobalInsts, false, hasAtomicFMinFMaxF64GlobalInsts)
421GET_SUBTARGETINFO_MACRO(HasAtomicFaddNoRtnInsts, false, hasAtomicFaddNoRtnInsts)
422GET_SUBTARGETINFO_MACRO(HasAtomicFaddRtnInsts, false, hasAtomicFaddRtnInsts)
423GET_SUBTARGETINFO_MACRO(HasAtomicFlatPkAdd16Insts, false, hasAtomicFlatPkAdd16Insts)
424GET_SUBTARGETINFO_MACRO(HasAtomicGlobalPkAddBF16Inst, false, hasAtomicGlobalPkAddBF16Inst)
425GET_SUBTARGETINFO_MACRO(HasAutoWaitcntBeforeBarrier, false, hasAutoWaitcntBeforeBarrier)
426GET_SUBTARGETINFO_MACRO(HasBF16ConversionInsts, false, hasBF16ConversionInsts)
427GET_SUBTARGETINFO_MACRO(HasBF16InlineConstFromUpperFP32, false, hasBF16InlineConstFromUpperFP32)
428GET_SUBTARGETINFO_MACRO(HasBF16PackedInsts, false, hasBF16PackedInsts)
429GET_SUBTARGETINFO_MACRO(HasBF16TransInsts, false, hasBF16TransInsts)
430GET_SUBTARGETINFO_MACRO(HasBF8ConversionScaleInsts, false, hasBF8ConversionScaleInsts)
431GET_SUBTARGETINFO_MACRO(HasBVHDualAndBVH8Insts, false, hasBVHDualAndBVH8Insts)
432GET_SUBTARGETINFO_MACRO(HasBVHRayTracingInsts, false, hasBVHRayTracingInsts)
433GET_SUBTARGETINFO_MACRO(HasBackOffBarrier, false, hasBackOffBarrier)
434GET_SUBTARGETINFO_MACRO(HasBitOp3Insts, false, hasBitOp3Insts)
435GET_SUBTARGETINFO_MACRO(HasBlock16ConversionScaleInsts, false, hasBlock16ConversionScaleInsts)
436GET_SUBTARGETINFO_MACRO(HasBufferInvInst, false, hasBufferInvInst)
437GET_SUBTARGETINFO_MACRO(HasCIInsts, false, hasCIInsts)
438GET_SUBTARGETINFO_MACRO(HasClusters, false, hasClusters)
439GET_SUBTARGETINFO_MACRO(HasCubeInsts, false, hasCubeInsts)
440GET_SUBTARGETINFO_MACRO(HasCvtFP8ByteSel, false, hasCvtFP8ByteSel)
441GET_SUBTARGETINFO_MACRO(HasCvtFP8SDWASrcSel, false, hasCvtFP8SDWASrcSel)
442GET_SUBTARGETINFO_MACRO(HasCvtFP8VOP1Bug, false, hasCvtFP8VOP1Bug)
443GET_SUBTARGETINFO_MACRO(HasCvtNormInsts, false, hasCvtNormInsts)
444GET_SUBTARGETINFO_MACRO(HasCvtPkF16F32Inst, false, hasCvtPkF16F32Inst)
445GET_SUBTARGETINFO_MACRO(HasCvtPkNormVOP2Insts, false, hasCvtPkNormVOP2Insts)
446GET_SUBTARGETINFO_MACRO(HasCvtPkNormVOP3Insts, false, hasCvtPkNormVOP3Insts)
447GET_SUBTARGETINFO_MACRO(HasCvtSrPkBF16F32Inst, false, hasCvtSrPkBF16F32Inst)
448GET_SUBTARGETINFO_MACRO(HasD16Writes32BitVgpr, false, hasD16Writes32BitVgpr)
449GET_SUBTARGETINFO_MACRO(HasDLInsts, false, hasDLInsts)
450GET_SUBTARGETINFO_MACRO(HasDPALU_DPP, false, hasDPALU_DPP)
451GET_SUBTARGETINFO_MACRO(HasDPP, false, hasDPP)
452GET_SUBTARGETINFO_MACRO(HasDPP8, false, hasDPP8)
453GET_SUBTARGETINFO_MACRO(HasDPPBroadcasts, false, hasDPPBroadcasts)
454GET_SUBTARGETINFO_MACRO(HasDPPSrc1SGPR, false, hasDPPSrc1SGPR)
455GET_SUBTARGETINFO_MACRO(HasDPPWavefrontShifts, false, hasDPPWavefrontShifts)
456GET_SUBTARGETINFO_MACRO(HasDX10ClampAndIEEEMode, false, hasDX10ClampAndIEEEMode)
457GET_SUBTARGETINFO_MACRO(HasDefaultComponentBroadcast, false, hasDefaultComponentBroadcast)
458GET_SUBTARGETINFO_MACRO(HasDefaultComponentZero, false, hasDefaultComponentZero)
459GET_SUBTARGETINFO_MACRO(HasDot10Insts, false, hasDot10Insts)
460GET_SUBTARGETINFO_MACRO(HasDot11Insts, false, hasDot11Insts)
461GET_SUBTARGETINFO_MACRO(HasDot12Insts, false, hasDot12Insts)
462GET_SUBTARGETINFO_MACRO(HasDot13Insts, false, hasDot13Insts)
463GET_SUBTARGETINFO_MACRO(HasDot1Insts, false, hasDot1Insts)
464GET_SUBTARGETINFO_MACRO(HasDot2Insts, false, hasDot2Insts)
465GET_SUBTARGETINFO_MACRO(HasDot3Insts, false, hasDot3Insts)
466GET_SUBTARGETINFO_MACRO(HasDot4Insts, false, hasDot4Insts)
467GET_SUBTARGETINFO_MACRO(HasDot5Insts, false, hasDot5Insts)
468GET_SUBTARGETINFO_MACRO(HasDot6Insts, false, hasDot6Insts)
469GET_SUBTARGETINFO_MACRO(HasDot7Insts, false, hasDot7Insts)
470GET_SUBTARGETINFO_MACRO(HasDot8Insts, false, hasDot8Insts)
471GET_SUBTARGETINFO_MACRO(HasDot9Insts, false, hasDot9Insts)
472GET_SUBTARGETINFO_MACRO(HasDsSrc2Insts, false, hasDsSrc2Insts)
473GET_SUBTARGETINFO_MACRO(HasEmulatedSystemScopeAtomics, false, hasEmulatedSystemScopeAtomics)
474GET_SUBTARGETINFO_MACRO(HasExclusiveScanInsts, false, hasExclusiveScanInsts)
475GET_SUBTARGETINFO_MACRO(HasExtendedImageInsts, false, hasExtendedImageInsts)
476GET_SUBTARGETINFO_MACRO(HasF16BF16ToFP6BF6ConversionScaleInsts, false, hasF16BF16ToFP6BF6ConversionScaleInsts)
477GET_SUBTARGETINFO_MACRO(HasF16FP8ConversionInsts, false, hasF16FP8ConversionInsts)
478GET_SUBTARGETINFO_MACRO(HasF32ToF16BF16ConversionSRInsts, false, hasF32ToF16BF16ConversionSRInsts)
479GET_SUBTARGETINFO_MACRO(HasF32ToFP6BF6ConversionScaleInsts, false, hasF32ToFP6BF6ConversionScaleInsts)
480GET_SUBTARGETINFO_MACRO(HasFMA, false, hasFMA)
481GET_SUBTARGETINFO_MACRO(HasFP4ConversionScaleInsts, false, hasFP4ConversionScaleInsts)
482GET_SUBTARGETINFO_MACRO(HasFP64, false, hasFP64)
483GET_SUBTARGETINFO_MACRO(HasFP6BF6ConversionScaleInsts, false, hasFP6BF6ConversionScaleInsts)
484GET_SUBTARGETINFO_MACRO(HasFP6BF6ToF16BF16F32ConversionScaleInsts, false, hasFP6BF6ToF16BF16F32ConversionScaleInsts)
485GET_SUBTARGETINFO_MACRO(HasFP8ConversionInsts, false, hasFP8ConversionInsts)
486GET_SUBTARGETINFO_MACRO(HasFP8ConversionScaleInsts, false, hasFP8ConversionScaleInsts)
487GET_SUBTARGETINFO_MACRO(HasFP8E5M3Insts, false, hasFP8E5M3Insts)
488GET_SUBTARGETINFO_MACRO(HasFP8F16ConversionInsts, false, hasFP8F16ConversionInsts)
489GET_SUBTARGETINFO_MACRO(HasFP8Insts, false, hasFP8Insts)
490GET_SUBTARGETINFO_MACRO(HasFastDenormalF32, false, hasFastDenormalF32)
491GET_SUBTARGETINFO_MACRO(HasFastFMAF32, false, hasFastFMAF32)
492GET_SUBTARGETINFO_MACRO(HasFlatAddressSpace, false, hasFlatAddressSpace)
493GET_SUBTARGETINFO_MACRO(HasFlatAtomicFaddF32Inst, false, hasFlatAtomicFaddF32Inst)
494GET_SUBTARGETINFO_MACRO(HasFlatBufferGlobalAtomicFaddF64Inst, false, hasFlatBufferGlobalAtomicFaddF64Inst)
495GET_SUBTARGETINFO_MACRO(HasFlatGVSMode, false, hasFlatGVSMode)
496GET_SUBTARGETINFO_MACRO(HasFlatGlobalInsts, false, hasFlatGlobalInsts)
497GET_SUBTARGETINFO_MACRO(HasFlatInstOffsets, false, hasFlatInstOffsets)
498GET_SUBTARGETINFO_MACRO(HasFlatScratchInsts, false, hasFlatScratchInsts)
499GET_SUBTARGETINFO_MACRO(HasFlatSegmentOffsetBug, false, hasFlatSegmentOffsetBug)
500GET_SUBTARGETINFO_MACRO(HasFlatSignedOffset, false, hasFlatSignedOffset)
501GET_SUBTARGETINFO_MACRO(HasFmaLegacy32Insts, false, hasFmaLegacy32Insts)
502GET_SUBTARGETINFO_MACRO(HasFmaMixBF16Insts, false, hasFmaMixBF16Insts)
503GET_SUBTARGETINFO_MACRO(HasFmaMixInsts, false, hasFmaMixInsts)
504GET_SUBTARGETINFO_MACRO(HasFmacF64Inst, false, hasFmacF64Inst)
505GET_SUBTARGETINFO_MACRO(HasFormattedMUBUFInsts, false, hasFormattedMUBUFInsts)
506GET_SUBTARGETINFO_MACRO(HasFullRate64Ops, false, hasFullRate64Ops)
507GET_SUBTARGETINFO_MACRO(HasG16, false, hasG16)
508GET_SUBTARGETINFO_MACRO(HasGCN3Encoding, false, hasGCN3Encoding)
509GET_SUBTARGETINFO_MACRO(HasGDS, false, hasGDS)
510GET_SUBTARGETINFO_MACRO(HasGFX10Insts, false, hasGFX10Insts)
511GET_SUBTARGETINFO_MACRO(HasGFX10_3Insts, false, hasGFX10_3Insts)
512GET_SUBTARGETINFO_MACRO(HasGFX10_BEncoding, false, hasGFX10_BEncoding)
513GET_SUBTARGETINFO_MACRO(HasGFX11Insts, false, hasGFX11Insts)
514GET_SUBTARGETINFO_MACRO(HasGFX11_7Insts, false, hasGFX11_7Insts)
515GET_SUBTARGETINFO_MACRO(HasGFX1250Insts, false, hasGFX1250Insts)
516GET_SUBTARGETINFO_MACRO(HasGFX1250VALUBlockingCycles, false, hasGFX1250VALUBlockingCycles)
517GET_SUBTARGETINFO_MACRO(HasGFX1250_STRICT, false, hasGFX1250_STRICT)
518GET_SUBTARGETINFO_MACRO(HasGFX1251GEMMInsts, false, hasGFX1251GEMMInsts)
519GET_SUBTARGETINFO_MACRO(HasGFX125xLowestRateWMMA, false, hasGFX125xLowestRateWMMA)
520GET_SUBTARGETINFO_MACRO(HasGFX12Insts, false, hasGFX12Insts)
521GET_SUBTARGETINFO_MACRO(HasGFX13Insts, false, hasGFX13Insts)
522GET_SUBTARGETINFO_MACRO(HasGFX7GFX8GFX9Insts, false, hasGFX7GFX8GFX9Insts)
523GET_SUBTARGETINFO_MACRO(HasGFX8Insts, false, hasGFX8Insts)
524GET_SUBTARGETINFO_MACRO(HasGFX90AInsts, false, hasGFX90AInsts)
525GET_SUBTARGETINFO_MACRO(HasGFX940Insts, false, hasGFX940Insts)
526GET_SUBTARGETINFO_MACRO(HasGFX950Insts, false, hasGFX950Insts)
527GET_SUBTARGETINFO_MACRO(HasGFX9Insts, false, hasGFX9Insts)
528GET_SUBTARGETINFO_MACRO(HasGWS, false, hasGWS)
529GET_SUBTARGETINFO_MACRO(HasGetDoorbellID, false, hasGetDoorbellID)
530GET_SUBTARGETINFO_MACRO(HasGetWaveIdInst, false, hasGetWaveIdInst)
531GET_SUBTARGETINFO_MACRO(HasGloballyAddressableScratch, false, hasGloballyAddressableScratch)
532GET_SUBTARGETINFO_MACRO(HasHalfAddressablePhysicalLocalMemory, false, hasHalfAddressablePhysicalLocalMemory)
533GET_SUBTARGETINFO_MACRO(HasHalfRate64Ops, false, hasHalfRate64Ops)
534GET_SUBTARGETINFO_MACRO(HasIEEEMinimumMaximumInsts, false, hasIEEEMinimumMaximumInsts)
535GET_SUBTARGETINFO_MACRO(HasImageGather4D16Bug, false, hasImageGather4D16Bug)
536GET_SUBTARGETINFO_MACRO(HasImageInsts, false, hasImageInsts)
537GET_SUBTARGETINFO_MACRO(HasImageStoreD16Bug, false, hasImageStoreD16Bug)
538GET_SUBTARGETINFO_MACRO(HasIndexedResources, false, hasIndexedResources)
539GET_SUBTARGETINFO_MACRO(HasInstFwdPrefetchBug, false, hasInstFwdPrefetchBug)
540GET_SUBTARGETINFO_MACRO(HasIntClamp, false, hasIntClamp)
541GET_SUBTARGETINFO_MACRO(HasInv2PiInlineImm, false, hasInv2PiInlineImm)
542GET_SUBTARGETINFO_MACRO(HasKernargPreload, false, hasKernargPreload)
543GET_SUBTARGETINFO_MACRO(HasLDSMisalignedBug, false, hasLDSMisalignedBug)
544GET_SUBTARGETINFO_MACRO(HasLdsAtomicAddF64, false, hasLdsAtomicAddF64)
545GET_SUBTARGETINFO_MACRO(HasLdsBarrierArriveAtomic, false, hasLdsBarrierArriveAtomic)
546GET_SUBTARGETINFO_MACRO(HasLdsBranchVmemWARHazard, false, hasLdsBranchVmemWARHazard)
547GET_SUBTARGETINFO_MACRO(HasLerpInst, false, hasLerpInst)
548GET_SUBTARGETINFO_MACRO(HasLshlAddU64Inst, false, hasLshlAddU64Inst)
549GET_SUBTARGETINFO_MACRO(HasMADIntraFwdBug, false, hasMADIntraFwdBug)
550GET_SUBTARGETINFO_MACRO(HasMAIInsts, false, hasMAIInsts)
551GET_SUBTARGETINFO_MACRO(HasMFMAInlineLiteralBug, false, hasMFMAInlineLiteralBug)
552GET_SUBTARGETINFO_MACRO(HasMIMG_R128, false, hasMIMG_R128)
553GET_SUBTARGETINFO_MACRO(HasMSAALoadDstSelBug, false, hasMSAALoadDstSelBug)
554GET_SUBTARGETINFO_MACRO(HasMSAALoadInsts, false, hasMSAALoadInsts)
555GET_SUBTARGETINFO_MACRO(HasMTBUFInsts, false, hasMTBUFInsts)
556GET_SUBTARGETINFO_MACRO(HasMadMacF32Insts, false, hasMadMacF32Insts)
557GET_SUBTARGETINFO_MACRO(HasMadMixInsts, false, hasMadMixInsts)
558GET_SUBTARGETINFO_MACRO(HasMadNC64_32Insts, false, hasMadNC64_32Insts)
559GET_SUBTARGETINFO_MACRO(HasMadU32Inst, false, hasMadU32Inst)
560GET_SUBTARGETINFO_MACRO(HasMcastLoadInsts, false, hasMcastLoadInsts)
561GET_SUBTARGETINFO_MACRO(HasMemoryAtomicFaddF32DenormalSupport, false, hasMemoryAtomicFaddF32DenormalSupport)
562GET_SUBTARGETINFO_MACRO(HasMin3Max3PKF16, false, hasMin3Max3PKF16)
563GET_SUBTARGETINFO_MACRO(HasMinMaxI64Insts, false, hasMinMaxI64Insts)
564GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F16, false, hasMinimum3Maximum3F16)
565GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F32, false, hasMinimum3Maximum3F32)
566GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3PKF16, false, hasMinimum3Maximum3PKF16)
567GET_SUBTARGETINFO_MACRO(HasMixedLoadStoreClauses, false, hasMixedLoadStoreClauses)
568GET_SUBTARGETINFO_MACRO(HasMovrel, false, hasMovrel)
569GET_SUBTARGETINFO_MACRO(HasMqsadInsts, false, hasMqsadInsts)
570GET_SUBTARGETINFO_MACRO(HasMqsadPkInsts, false, hasMqsadPkInsts)
571GET_SUBTARGETINFO_MACRO(HasMsadInsts, false, hasMsadInsts)
572GET_SUBTARGETINFO_MACRO(HasNSAClauseBug, false, hasNSAClauseBug)
573GET_SUBTARGETINFO_MACRO(HasNSAEncoding, false, hasNSAEncoding)
574GET_SUBTARGETINFO_MACRO(HasNSAtoVMEMBug, false, hasNSAtoVMEMBug)
575GET_SUBTARGETINFO_MACRO(HasNeedsAligned2addrDS, false, hasNeedsAligned2addrDS)
576GET_SUBTARGETINFO_MACRO(HasNeedsTDMDrain, false, hasNeedsTDMDrain)
577GET_SUBTARGETINFO_MACRO(HasNegativeScratchOffsetBug, false, hasNegativeScratchOffsetBug)
578GET_SUBTARGETINFO_MACRO(HasNegativeUnalignedScratchOffsetBug, false, hasNegativeUnalignedScratchOffsetBug)
579GET_SUBTARGETINFO_MACRO(HasNoDataDepHazard, false, hasNoDataDepHazard)
580GET_SUBTARGETINFO_MACRO(HasNoF16PseudoScalarTransInlineConstants, false, hasNoF16PseudoScalarTransInlineConstants)
581GET_SUBTARGETINFO_MACRO(HasNoSdstCMPX, false, hasNoSdstCMPX)
582GET_SUBTARGETINFO_MACRO(HasNoSleepForever, false, hasNoSleepForever)
583GET_SUBTARGETINFO_MACRO(HasOCPFP8ConversionInsts, false, hasOCPFP8ConversionInsts)
584GET_SUBTARGETINFO_MACRO(HasOffset3fBug, false, hasOffset3fBug)
585GET_SUBTARGETINFO_MACRO(HasPackedFP32Ops, false, hasPackedFP32Ops)
586GET_SUBTARGETINFO_MACRO(HasPackedFP32SingleSGPROps, false, hasPackedFP32SingleSGPROps)
587GET_SUBTARGETINFO_MACRO(HasPackedFP64SingleSGPROps, false, hasPackedFP64SingleSGPROps)
588GET_SUBTARGETINFO_MACRO(HasPackedTID, false, hasPackedTID)
589GET_SUBTARGETINFO_MACRO(HasPackedU64SingleSGPROps, false, hasPackedU64SingleSGPROps)
590GET_SUBTARGETINFO_MACRO(HasPartialNSAEncoding, false, hasPartialNSAEncoding)
591GET_SUBTARGETINFO_MACRO(HasPermlane16Insts, false, hasPermlane16Insts)
592GET_SUBTARGETINFO_MACRO(HasPermlane16Swap, false, hasPermlane16Swap)
593GET_SUBTARGETINFO_MACRO(HasPermlane32Swap, false, hasPermlane32Swap)
594GET_SUBTARGETINFO_MACRO(HasPkAddMinMaxInsts, false, hasPkAddMinMaxInsts)
595GET_SUBTARGETINFO_MACRO(HasPkFmacF16Inst, false, hasPkFmacF16Inst)
596GET_SUBTARGETINFO_MACRO(HasPointSampleAccel, false, hasPointSampleAccel)
597GET_SUBTARGETINFO_MACRO(HasPopsExitingWaveID, false, hasPopsExitingWaveID)
598GET_SUBTARGETINFO_MACRO(HasPrivEnabledTrap2NopBug, false, hasPrivEnabledTrap2NopBug)
599GET_SUBTARGETINFO_MACRO(HasPrngInst, false, hasPrngInst)
600GET_SUBTARGETINFO_MACRO(HasPseudoScalarTrans, false, hasPseudoScalarTrans)
601GET_SUBTARGETINFO_MACRO(HasQsadInsts, false, hasQsadInsts)
602GET_SUBTARGETINFO_MACRO(HasR128A16, false, hasR128A16)
603GET_SUBTARGETINFO_MACRO(HasRequiredExportPriority, false, hasRequiredExportPriority)
604GET_SUBTARGETINFO_MACRO(HasRequiresInitialUnclausedVmem, false, hasRequiresInitialUnclausedVmem)
605GET_SUBTARGETINFO_MACRO(HasRestrictedSOffset, false, hasRestrictedSOffset)
606GET_SUBTARGETINFO_MACRO(HasSALUFloatInsts, false, hasSALUFloatInsts)
607GET_SUBTARGETINFO_MACRO(HasSALUMinimumMaximumInsts, false, hasSALUMinimumMaximumInsts)
608GET_SUBTARGETINFO_MACRO(HasSBarrierLeaveImm, false, hasSBarrierLeaveImm)
609GET_SUBTARGETINFO_MACRO(HasSDWA, false, hasSDWA)
610GET_SUBTARGETINFO_MACRO(HasSDWAMac, false, hasSDWAMac)
611GET_SUBTARGETINFO_MACRO(HasSDWAOmod, false, hasSDWAOmod)
612GET_SUBTARGETINFO_MACRO(HasSDWAOutModsVOPC, false, hasSDWAOutModsVOPC)
613GET_SUBTARGETINFO_MACRO(HasSDWAScalar, false, hasSDWAScalar)
614GET_SUBTARGETINFO_MACRO(HasSDWASdst, false, hasSDWASdst)
615GET_SUBTARGETINFO_MACRO(HasSGPRInitBug, false, hasSGPRInitBug)
616GET_SUBTARGETINFO_MACRO(HasSMEMtoVectorWriteHazard, false, hasSMEMtoVectorWriteHazard)
617GET_SUBTARGETINFO_MACRO(HasSMemRealTime, false, hasSMemRealTime)
618GET_SUBTARGETINFO_MACRO(HasSMemTimeInst, false, hasSMemTimeInst)
619GET_SUBTARGETINFO_MACRO(HasSRAMECCOnOffModes, false, hasSRAMECCOnOffModes)
620GET_SUBTARGETINFO_MACRO(HasSWMMACGfx1200Insts, false, hasSWMMACGfx1200Insts)
621GET_SUBTARGETINFO_MACRO(HasSWMMACGfx1250Insts, false, hasSWMMACGfx1250Insts)
622GET_SUBTARGETINFO_MACRO(HasSWakeupBarrier, false, hasSWakeupBarrier)
623GET_SUBTARGETINFO_MACRO(HasSWakeupImm, false, hasSWakeupImm)
624GET_SUBTARGETINFO_MACRO(HasSadInsts, false, hasSadInsts)
625GET_SUBTARGETINFO_MACRO(HasSafeCUPrefetch, false, hasSafeCUPrefetch)
626GET_SUBTARGETINFO_MACRO(HasSafeSmemPrefetch, false, hasSafeSmemPrefetch)
627GET_SUBTARGETINFO_MACRO(HasScalarAtomics, false, hasScalarAtomics)
628GET_SUBTARGETINFO_MACRO(HasScalarDwordx3Loads, false, hasScalarDwordx3Loads)
629GET_SUBTARGETINFO_MACRO(HasScalarFlatScratchInsts, false, hasScalarFlatScratchInsts)
630GET_SUBTARGETINFO_MACRO(HasScalarStores, false, hasScalarStores)
631GET_SUBTARGETINFO_MACRO(HasSetPrioIncWgInst, false, hasSetPrioIncWgInst)
632GET_SUBTARGETINFO_MACRO(HasSetregVGPRMSBFixup, false, hasSetregVGPRMSBFixup)
633GET_SUBTARGETINFO_MACRO(HasShaderCyclesHiLoRegisters, false, hasShaderCyclesHiLoRegisters)
634GET_SUBTARGETINFO_MACRO(HasShaderCyclesRegister, false, hasShaderCyclesRegister)
635GET_SUBTARGETINFO_MACRO(HasSlowMaxMinMulI64Insts, false, hasSlowMaxMinMulI64Insts)
636GET_SUBTARGETINFO_MACRO(HasSmemPrefetchInsts, false, hasSmemPrefetchInsts)
637GET_SUBTARGETINFO_MACRO(HasSupportsWGP, false, hasSupportsWGP)
638GET_SUBTARGETINFO_MACRO(HasTDMInsts, false, hasTDMInsts)
639GET_SUBTARGETINFO_MACRO(HasTanhInsts, false, hasTanhInsts)
640GET_SUBTARGETINFO_MACRO(HasTensorCvtLutInsts, false, hasTensorCvtLutInsts)
641GET_SUBTARGETINFO_MACRO(HasTgSplitSupport, false, hasTgSplitSupport)
642GET_SUBTARGETINFO_MACRO(HasTransCoexecutionHazard, false, hasTransCoexecutionHazard)
643GET_SUBTARGETINFO_MACRO(HasTransposeLoadF4F6Insts, false, hasTransposeLoadF4F6Insts)
644GET_SUBTARGETINFO_MACRO(HasTrapHandler, false, hasTrapHandler)
645GET_SUBTARGETINFO_MACRO(HasTrigReducedRange, false, hasTrigReducedRange)
646GET_SUBTARGETINFO_MACRO(HasTrue16BitInsts, false, hasTrue16BitInsts)
647GET_SUBTARGETINFO_MACRO(HasUnalignedAccessMode, false, hasUnalignedAccessMode)
648GET_SUBTARGETINFO_MACRO(HasUnalignedBufferAccess, false, hasUnalignedBufferAccess)
649GET_SUBTARGETINFO_MACRO(HasUnalignedDSAccess, false, hasUnalignedDSAccess)
650GET_SUBTARGETINFO_MACRO(HasUnalignedScratchAccess, false, hasUnalignedScratchAccess)
651GET_SUBTARGETINFO_MACRO(HasUnpackedD16VMem, false, hasUnpackedD16VMem)
652GET_SUBTARGETINFO_MACRO(HasUserSGPRInit16Bug, false, hasUserSGPRInit16Bug)
653GET_SUBTARGETINFO_MACRO(HasVALUTransUseHazard, false, hasVALUTransUseHazard)
654GET_SUBTARGETINFO_MACRO(HasVGPRIndexMode, false, hasVGPRIndexMode)
655GET_SUBTARGETINFO_MACRO(HasVMEMtoScalarWriteHazard, false, hasVMEMtoScalarWriteHazard)
656GET_SUBTARGETINFO_MACRO(HasVMemToLDSLoad, false, hasVMemToLDSLoad)
657GET_SUBTARGETINFO_MACRO(HasVMovB64Inst, false, hasVMovB64Inst)
658GET_SUBTARGETINFO_MACRO(HasVMulU64Inst, false, hasVMulU64Inst)
659GET_SUBTARGETINFO_MACRO(HasVOP3Literal, false, hasVOP3Literal)
660GET_SUBTARGETINFO_MACRO(HasVOP3PInsts, false, hasVOP3PInsts)
661GET_SUBTARGETINFO_MACRO(HasVOP3PX2IncrementsVaVdstTwice, false, hasVOP3PX2IncrementsVaVdstTwice)
662GET_SUBTARGETINFO_MACRO(HasVOPD3F64OPYSrcHazard, false, hasVOPD3F64OPYSrcHazard)
663GET_SUBTARGETINFO_MACRO(HasVOPDInsts, false, hasVOPDInsts)
664GET_SUBTARGETINFO_MACRO(HasVOPDInterlockHazard, false, hasVOPDInterlockHazard)
665GET_SUBTARGETINFO_MACRO(HasVPermPk16Hazard, false, hasVPermPk16Hazard)
666GET_SUBTARGETINFO_MACRO(HasVcmpxExecWARHazard, false, hasVcmpxExecWARHazard)
667GET_SUBTARGETINFO_MACRO(HasVcmpxPermlaneHazard, false, hasVcmpxPermlaneHazard)
668GET_SUBTARGETINFO_MACRO(HasVmemPrefInsts, false, hasVmemPrefInsts)
669GET_SUBTARGETINFO_MACRO(HasVmemWriteVgprInOrder, false, hasVmemWriteVgprInOrder)
670GET_SUBTARGETINFO_MACRO(HasVscnt, false, hasVscnt)
671GET_SUBTARGETINFO_MACRO(HasWMMA128bInsts, false, hasWMMA128bInsts)
672GET_SUBTARGETINFO_MACRO(HasWMMA16x16x128FP8Insts, false, hasWMMA16x16x128FP8Insts)
673GET_SUBTARGETINFO_MACRO(HasWMMA256bInsts, false, hasWMMA256bInsts)
674GET_SUBTARGETINFO_MACRO(HasWMMACoexecutionHazards, false, hasWMMACoexecutionHazards)
675GET_SUBTARGETINFO_MACRO(HasWMMAF4Insts, false, hasWMMAF4Insts)
676GET_SUBTARGETINFO_MACRO(HasWMMAN16Insts, false, hasWMMAN16Insts)
677GET_SUBTARGETINFO_MACRO(HasWaitXcnt, false, hasWaitXcnt)
678GET_SUBTARGETINFO_MACRO(HasWaveMatchInsts, false, hasWaveMatchInsts)
679GET_SUBTARGETINFO_MACRO(HasXF32Insts, false, hasXF32Insts)
680GET_SUBTARGETINFO_MACRO(HasXNACKOnOffModes, false, hasXNACKOnOffModes)
681GET_SUBTARGETINFO_MACRO(RequiresAlignVGPR, false, requiresAlignVGPR)
682GET_SUBTARGETINFO_MACRO(RequiresCOV6, false, requiresCOV6)
683GET_SUBTARGETINFO_MACRO(RequiresWaitsBeforeSystemScopeStores, false, requiresWaitsBeforeSystemScopeStores)
684GET_SUBTARGETINFO_MACRO(SupportsSRAMECC, false, supportsSRAMECC)
685GET_SUBTARGETINFO_MACRO(SupportsWave32, false, supportsWave32)
686GET_SUBTARGETINFO_MACRO(SupportsWave64, false, supportsWave64)
687GET_SUBTARGETINFO_MACRO(SupportsXNACK, false, supportsXNACK)
688GET_SUBTARGETINFO_MACRO(UseAddPC64Inst, false, useAddPC64Inst)
689GET_SUBTARGETINFO_MACRO(UseBlockVGPROpsForCSR, false, useBlockVGPROpsForCSR)
690GET_SUBTARGETINFO_MACRO(UseFlatForGlobal, false, useFlatForGlobal)
691
692#undef GET_SUBTARGETINFO_MACRO
693#endif // GET_SUBTARGETINFO_MACRO
694
695#ifdef GET_SUBTARGETINFO_MC_DESC
696#undef GET_SUBTARGETINFO_MC_DESC
697
698namespace llvm {
699
700// Sorted (by key) array of values for CPU features.
701extern const llvm::SubtargetFeatureKVStorage< 354, 22848> AMDGPUFeatureKVStorage = {
702 {
703 { sizeof(SubtargetFeatureKV) * 354 + 1, sizeof(SubtargetFeatureKV) * 354 + 24, AMDGPU::Feature1024AddressableVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
704 { sizeof(SubtargetFeatureKV) * 353 + 51, sizeof(SubtargetFeatureKV) * 353 + 71, AMDGPU::Feature1536VGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
705 { sizeof(SubtargetFeatureKV) * 352 + 104, sizeof(SubtargetFeatureKV) * 352 + 117, AMDGPU::Feature16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
706 { sizeof(SubtargetFeatureKV) * 351 + 142, sizeof(SubtargetFeatureKV) * 351 + 177, AMDGPU::Feature32BitNumRecordsBufferResource, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
707 { sizeof(SubtargetFeatureKV) * 350 + 225, sizeof(SubtargetFeatureKV) * 350 + 260, AMDGPU::Feature45BitNumRecordsBufferResource, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
708 { sizeof(SubtargetFeatureKV) * 349 + 308, sizeof(SubtargetFeatureKV) * 349 + 324, AMDGPU::Feature64BitLiterals, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
709 { sizeof(SubtargetFeatureKV) * 348 + 379, sizeof(SubtargetFeatureKV) * 348 + 383, AMDGPU::FeatureA16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
710 { sizeof(SubtargetFeatureKV) * 347 + 457, sizeof(SubtargetFeatureKV) * 347 + 475, AMDGPU::FeatureAddMinMaxInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
711 { sizeof(SubtargetFeatureKV) * 346 + 516, sizeof(SubtargetFeatureKV) * 346 + 535, AMDGPU::FeatureAddNoCarryInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
712 { sizeof(SubtargetFeatureKV) * 345 + 584, sizeof(SubtargetFeatureKV) * 345 + 602, AMDGPU::FeatureAddSubU64Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
713 { sizeof(SubtargetFeatureKV) * 344 + 643, sizeof(SubtargetFeatureKV) * 344 + 676, AMDGPU::FeatureAddressableLocalMemorySize163840, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
714 { sizeof(SubtargetFeatureKV) * 343 + 710, sizeof(SubtargetFeatureKV) * 343 + 676, AMDGPU::FeatureAddressableLocalMemorySize196608, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
715 { sizeof(SubtargetFeatureKV) * 342 + 743, sizeof(SubtargetFeatureKV) * 342 + 676, AMDGPU::FeatureAddressableLocalMemorySize32768, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
716 { sizeof(SubtargetFeatureKV) * 341 + 775, sizeof(SubtargetFeatureKV) * 341 + 676, AMDGPU::FeatureAddressableLocalMemorySize327680, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
717 { sizeof(SubtargetFeatureKV) * 340 + 808, sizeof(SubtargetFeatureKV) * 340 + 676, AMDGPU::FeatureAddressableLocalMemorySize65536, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
718 { sizeof(SubtargetFeatureKV) * 339 + 840, sizeof(SubtargetFeatureKV) * 339 + 887, AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
719 { sizeof(SubtargetFeatureKV) * 338 + 1092, sizeof(SubtargetFeatureKV) * 338 + 1103, AMDGPU::FeatureAGPRAlloc, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
720 { sizeof(SubtargetFeatureKV) * 337 + 1132, sizeof(SubtargetFeatureKV) * 337 + 1146, AMDGPU::FeatureApertureRegs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
721 { sizeof(SubtargetFeatureKV) * 336 + 1190, sizeof(SubtargetFeatureKV) * 336 + 1215, AMDGPU::FeatureArchitectedFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
722 { sizeof(SubtargetFeatureKV) * 335 + 1288, sizeof(SubtargetFeatureKV) * 335 + 1306, AMDGPU::FeatureArchitectedSGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
723 { sizeof(SubtargetFeatureKV) * 334 + 1335, sizeof(SubtargetFeatureKV) * 334 + 1349, AMDGPU::FeatureAshrPkInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
724 { sizeof(SubtargetFeatureKV) * 333 + 1388, sizeof(SubtargetFeatureKV) * 333 + 1418, AMDGPU::FeatureAssemblerPermissiveWavesize, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
725 { sizeof(SubtargetFeatureKV) * 332 + 1475, sizeof(SubtargetFeatureKV) * 332 + 1499, AMDGPU::FeatureAsyncLoadToLDSInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
726 { sizeof(SubtargetFeatureKV) * 331 + 1541, sizeof(SubtargetFeatureKV) * 331 + 1568, AMDGPU::FeatureAsyncStoreFromLDSInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
727 { sizeof(SubtargetFeatureKV) * 330 + 1613, sizeof(SubtargetFeatureKV) * 330 + 1622, AMDGPU::FeatureAsynccnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
728 { sizeof(SubtargetFeatureKV) * 329 + 1652, sizeof(SubtargetFeatureKV) * 329 + 1690, AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts, { { { 0x0ULL, 0x100000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
729 { sizeof(SubtargetFeatureKV) * 328 + 1792, sizeof(SubtargetFeatureKV) * 328 + 1837, AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts, { { { 0x0ULL, 0x100000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
730 { sizeof(SubtargetFeatureKV) * 327 + 1941, sizeof(SubtargetFeatureKV) * 327 + 1972, AMDGPU::FeatureAtomicBufferPkAddBF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
731 { sizeof(SubtargetFeatureKV) * 326 + 2014, sizeof(SubtargetFeatureKV) * 326 + 2047, AMDGPU::FeatureAtomicCondSubClampFlatInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
732 { sizeof(SubtargetFeatureKV) * 325 + 2119, sizeof(SubtargetFeatureKV) * 325 + 2144, AMDGPU::FeatureAtomicCSubNoRtnInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
733 { sizeof(SubtargetFeatureKV) * 324 + 2236, sizeof(SubtargetFeatureKV) * 324 + 2267, AMDGPU::FeatureAtomicDsCondSubClampInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
734 { sizeof(SubtargetFeatureKV) * 323 + 2364, sizeof(SubtargetFeatureKV) * 323 + 2390, AMDGPU::FeatureAtomicDsPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
735 { sizeof(SubtargetFeatureKV) * 322 + 2476, sizeof(SubtargetFeatureKV) * 322 + 2501, AMDGPU::FeatureAtomicFaddNoRtnInsts, { { { 0x0ULL, 0x100000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
736 { sizeof(SubtargetFeatureKV) * 321 + 2599, sizeof(SubtargetFeatureKV) * 321 + 2621, AMDGPU::FeatureAtomicFaddRtnInsts, { { { 0x0ULL, 0x100000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
737 { sizeof(SubtargetFeatureKV) * 320 + 2713, sizeof(SubtargetFeatureKV) * 320 + 2741, AMDGPU::FeatureAtomicFlatPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
738 { sizeof(SubtargetFeatureKV) * 319 + 2809, sizeof(SubtargetFeatureKV) * 319 + 2835, AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts, { { { 0x0ULL, 0x10000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
739 { sizeof(SubtargetFeatureKV) * 318 + 2898, sizeof(SubtargetFeatureKV) * 318 + 2924, AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts, { { { 0x0ULL, 0x10000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
740 { sizeof(SubtargetFeatureKV) * 317 + 2988, sizeof(SubtargetFeatureKV) * 317 + 3016, AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
741 { sizeof(SubtargetFeatureKV) * 316 + 3081, sizeof(SubtargetFeatureKV) * 316 + 3016, AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
742 { sizeof(SubtargetFeatureKV) * 315 + 3109, sizeof(SubtargetFeatureKV) * 315 + 3140, AMDGPU::FeatureAtomicGlobalPkAddBF16Inst, { { { 0x0ULL, 0x100000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
743 { sizeof(SubtargetFeatureKV) * 314 + 3182, sizeof(SubtargetFeatureKV) * 314 + 3210, AMDGPU::FeatureAutoWaitcntBeforeBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
744 { sizeof(SubtargetFeatureKV) * 313 + 3264, sizeof(SubtargetFeatureKV) * 313 + 3281, AMDGPU::FeatureBackOffBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
745 { sizeof(SubtargetFeatureKV) * 312 + 3344, sizeof(SubtargetFeatureKV) * 312 + 3359, AMDGPU::FeatureBF16ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
746 { sizeof(SubtargetFeatureKV) * 311 + 3392, sizeof(SubtargetFeatureKV) * 311 + 3413, AMDGPU::FeatureBF16InlineConstFromUpperFP32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
747 { sizeof(SubtargetFeatureKV) * 310 + 3486, sizeof(SubtargetFeatureKV) * 310 + 3500, AMDGPU::FeatureBF16PackedInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
748 { sizeof(SubtargetFeatureKV) * 309 + 3555, sizeof(SubtargetFeatureKV) * 309 + 3572, AMDGPU::FeatureBF16TransInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
749 { sizeof(SubtargetFeatureKV) * 308 + 3609, sizeof(SubtargetFeatureKV) * 308 + 3629, AMDGPU::FeatureBF8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
750 { sizeof(SubtargetFeatureKV) * 307 + 3667, sizeof(SubtargetFeatureKV) * 307 + 3680, AMDGPU::FeatureBitOp3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
751 { sizeof(SubtargetFeatureKV) * 306 + 3723, sizeof(SubtargetFeatureKV) * 306 + 3738, AMDGPU::FeatureUseBlockVGPROpsForCSR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
752 { sizeof(SubtargetFeatureKV) * 305 + 3791, sizeof(SubtargetFeatureKV) * 305 + 3815, AMDGPU::FeatureBlock16ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
753 { sizeof(SubtargetFeatureKV) * 304 + 3857, sizeof(SubtargetFeatureKV) * 304 + 3873, AMDGPU::FeatureBufferInvInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
754 { sizeof(SubtargetFeatureKV) * 303 + 3900, sizeof(SubtargetFeatureKV) * 303 + 3921, AMDGPU::FeatureBVHDualAndBVH8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
755 { sizeof(SubtargetFeatureKV) * 302 + 3996, sizeof(SubtargetFeatureKV) * 302 + 4018, AMDGPU::FeatureBVHRayTracingInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
756 { sizeof(SubtargetFeatureKV) * 301 + 4051, sizeof(SubtargetFeatureKV) * 301 + 4060, AMDGPU::FeatureCIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
757 { sizeof(SubtargetFeatureKV) * 300 + 4092, sizeof(SubtargetFeatureKV) * 300 + 4101, AMDGPU::FeatureClusters, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
758 { sizeof(SubtargetFeatureKV) * 299 + 4136, sizeof(SubtargetFeatureKV) * 299 + 4147, AMDGPU::FeatureCubeInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
759 { sizeof(SubtargetFeatureKV) * 298 + 4172, sizeof(SubtargetFeatureKV) * 298 + 4179, AMDGPU::FeatureCuMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
760 { sizeof(SubtargetFeatureKV) * 297 + 4214, sizeof(SubtargetFeatureKV) * 297 + 4231, AMDGPU::FeatureCvtFP8ByteSel, { { { 0x0ULL, 0x100000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
761 { sizeof(SubtargetFeatureKV) * 296 + 4295, sizeof(SubtargetFeatureKV) * 296 + 4316, AMDGPU::FeatureCvtFP8SDWASrcSel, { { { 0x0ULL, 0x100000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
762 { sizeof(SubtargetFeatureKV) * 295 + 4395, sizeof(SubtargetFeatureKV) * 295 + 4412, AMDGPU::FeatureCvtFP8VOP1Bug, { { { 0x0ULL, 0x100000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
763 { sizeof(SubtargetFeatureKV) * 294 + 4465, sizeof(SubtargetFeatureKV) * 294 + 4480, AMDGPU::FeatureCvtNormInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
764 { sizeof(SubtargetFeatureKV) * 293 + 4509, sizeof(SubtargetFeatureKV) * 293 + 4529, AMDGPU::FeatureCvtPkF16F32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
765 { sizeof(SubtargetFeatureKV) * 292 + 4560, sizeof(SubtargetFeatureKV) * 292 + 4582, AMDGPU::FeatureCvtPkNormVOP2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
766 { sizeof(SubtargetFeatureKV) * 291 + 4655, sizeof(SubtargetFeatureKV) * 291 + 4582, AMDGPU::FeatureCvtPkNormVOP3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
767 { sizeof(SubtargetFeatureKV) * 290 + 4677, sizeof(SubtargetFeatureKV) * 290 + 4701, AMDGPU::FeatureCvtSrPkBF16F32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
768 { sizeof(SubtargetFeatureKV) * 289 + 4736, sizeof(SubtargetFeatureKV) * 289 + 4753, AMDGPU::FeatureD16Writes32BitVgpr, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
769 { sizeof(SubtargetFeatureKV) * 288 + 4812, sizeof(SubtargetFeatureKV) * 288 + 4833, AMDGPU::FeatureDataCacheLineSize128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
770 { sizeof(SubtargetFeatureKV) * 287 + 4871, sizeof(SubtargetFeatureKV) * 287 + 4899, AMDGPU::FeatureDefaultComponentBroadcast, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
771 { sizeof(SubtargetFeatureKV) * 286 + 4981, sizeof(SubtargetFeatureKV) * 286 + 5004, AMDGPU::FeatureDefaultComponentZero, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
772 { sizeof(SubtargetFeatureKV) * 285 + 5086, sizeof(SubtargetFeatureKV) * 285 + 5095, AMDGPU::FeatureDLInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
773 { sizeof(SubtargetFeatureKV) * 284 + 5138, sizeof(SubtargetFeatureKV) * 284 + 5149, AMDGPU::FeatureDot1Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
774 { sizeof(SubtargetFeatureKV) * 283 + 5198, sizeof(SubtargetFeatureKV) * 283 + 5210, AMDGPU::FeatureDot10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
775 { sizeof(SubtargetFeatureKV) * 282 + 5241, sizeof(SubtargetFeatureKV) * 282 + 5253, AMDGPU::FeatureDot11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
776 { sizeof(SubtargetFeatureKV) * 281 + 5349, sizeof(SubtargetFeatureKV) * 281 + 5361, AMDGPU::FeatureDot12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
777 { sizeof(SubtargetFeatureKV) * 280 + 5394, sizeof(SubtargetFeatureKV) * 280 + 5406, AMDGPU::FeatureDot13Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
778 { sizeof(SubtargetFeatureKV) * 279 + 5440, sizeof(SubtargetFeatureKV) * 279 + 5451, AMDGPU::FeatureDot2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
779 { sizeof(SubtargetFeatureKV) * 278 + 5499, sizeof(SubtargetFeatureKV) * 278 + 5510, AMDGPU::FeatureDot3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
780 { sizeof(SubtargetFeatureKV) * 277 + 5541, sizeof(SubtargetFeatureKV) * 277 + 5552, AMDGPU::FeatureDot4Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
781 { sizeof(SubtargetFeatureKV) * 276 + 5584, sizeof(SubtargetFeatureKV) * 276 + 5595, AMDGPU::FeatureDot5Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
782 { sizeof(SubtargetFeatureKV) * 275 + 5627, sizeof(SubtargetFeatureKV) * 275 + 5638, AMDGPU::FeatureDot6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
783 { sizeof(SubtargetFeatureKV) * 274 + 5669, sizeof(SubtargetFeatureKV) * 274 + 5680, AMDGPU::FeatureDot7Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
784 { sizeof(SubtargetFeatureKV) * 273 + 5726, sizeof(SubtargetFeatureKV) * 273 + 5737, AMDGPU::FeatureDot8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
785 { sizeof(SubtargetFeatureKV) * 272 + 5785, sizeof(SubtargetFeatureKV) * 272 + 5796, AMDGPU::FeatureDot9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
786 { sizeof(SubtargetFeatureKV) * 271 + 5846, sizeof(SubtargetFeatureKV) * 271 + 5850, AMDGPU::FeatureDPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
787 { sizeof(SubtargetFeatureKV) * 270 + 5899, sizeof(SubtargetFeatureKV) * 270 + 5909, AMDGPU::FeatureDPALU_DPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
788 { sizeof(SubtargetFeatureKV) * 269 + 5968, sizeof(SubtargetFeatureKV) * 269 + 5982, AMDGPU::FeatureDPPBroadcasts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
789 { sizeof(SubtargetFeatureKV) * 268 + 6018, sizeof(SubtargetFeatureKV) * 268 + 6032, AMDGPU::FeatureDPPSrc1SGPR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
790 { sizeof(SubtargetFeatureKV) * 267 + 6074, sizeof(SubtargetFeatureKV) * 267 + 6095, AMDGPU::FeatureDPPWavefrontShifts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
791 { sizeof(SubtargetFeatureKV) * 266 + 6143, sizeof(SubtargetFeatureKV) * 266 + 6148, AMDGPU::FeatureDPP8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
792 { sizeof(SubtargetFeatureKV) * 265 + 6198, sizeof(SubtargetFeatureKV) * 265 + 6212, AMDGPU::FeatureDsSrc2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
793 { sizeof(SubtargetFeatureKV) * 264 + 6239, sizeof(SubtargetFeatureKV) * 264 + 6248, AMDGPU::FeatureDumpCodeLower, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
794 { sizeof(SubtargetFeatureKV) * 263 + 6286, sizeof(SubtargetFeatureKV) * 263 + 6311, AMDGPU::FeatureDX10ClampAndIEEEMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
795 { sizeof(SubtargetFeatureKV) * 262 + 6370, sizeof(SubtargetFeatureKV) * 262 + 6400, AMDGPU::FeatureEmulatedSystemScopeAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
796 { sizeof(SubtargetFeatureKV) * 261 + 6494, sizeof(SubtargetFeatureKV) * 261 + 6507, AMDGPU::FeatureEnableDS128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
797 { sizeof(SubtargetFeatureKV) * 260 + 6532, sizeof(SubtargetFeatureKV) * 260 + 6552, AMDGPU::FeatureEnableFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
798 { sizeof(SubtargetFeatureKV) * 259 + 6609, sizeof(SubtargetFeatureKV) * 259 + 6632, AMDGPU::FeatureEnablePRTStrictNull, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
799 { sizeof(SubtargetFeatureKV) * 258 + 6694, sizeof(SubtargetFeatureKV) * 258 + 6715, AMDGPU::FeatureExclusiveScanInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
800 { sizeof(SubtargetFeatureKV) * 257 + 6747, sizeof(SubtargetFeatureKV) * 257 + 6768, AMDGPU::FeatureExtendedImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
801 { sizeof(SubtargetFeatureKV) * 256 + 6818, sizeof(SubtargetFeatureKV) * 256 + 6843, AMDGPU::FeatureF16FP8ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
802 { sizeof(SubtargetFeatureKV) * 255 + 6890, sizeof(SubtargetFeatureKV) * 255 + 6924, AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
803 { sizeof(SubtargetFeatureKV) * 254 + 6976, sizeof(SubtargetFeatureKV) * 254 + 7004, AMDGPU::FeatureF32ToF16BF16ConversionSRInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
804 { sizeof(SubtargetFeatureKV) * 253 + 7053, sizeof(SubtargetFeatureKV) * 253 + 7083, AMDGPU::FeatureF32ToFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
805 { sizeof(SubtargetFeatureKV) * 252 + 7131, sizeof(SubtargetFeatureKV) * 252 + 7149, AMDGPU::FeatureFastDenormalF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
806 { sizeof(SubtargetFeatureKV) * 251 + 7220, sizeof(SubtargetFeatureKV) * 251 + 7230, AMDGPU::FeatureFastFMAF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
807 { sizeof(SubtargetFeatureKV) * 250 + 7280, sizeof(SubtargetFeatureKV) * 250 + 7299, AMDGPU::FeatureFlatAddressSpace, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
808 { sizeof(SubtargetFeatureKV) * 249 + 7326, sizeof(SubtargetFeatureKV) * 249 + 7352, AMDGPU::FeatureFlatAtomicFaddF32Inst, { { { 0x0ULL, 0x10000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
809 { sizeof(SubtargetFeatureKV) * 248 + 7388, sizeof(SubtargetFeatureKV) * 248 + 7421, AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
810 { sizeof(SubtargetFeatureKV) * 247 + 7483, sizeof(SubtargetFeatureKV) * 247 + 7499, AMDGPU::FeatureUseFlatForGlobal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
811 { sizeof(SubtargetFeatureKV) * 246 + 7545, sizeof(SubtargetFeatureKV) * 246 + 7563, AMDGPU::FeatureFlatGlobalInsts, { { { 0x0ULL, 0x10000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
812 { sizeof(SubtargetFeatureKV) * 245 + 7602, sizeof(SubtargetFeatureKV) * 245 + 7616, AMDGPU::FeatureFlatGVSMode, { { { 0x0ULL, 0x10000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
813 { sizeof(SubtargetFeatureKV) * 244 + 7666, sizeof(SubtargetFeatureKV) * 244 + 7684, AMDGPU::FeatureFlatInstOffsets, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
814 { sizeof(SubtargetFeatureKV) * 243 + 7740, sizeof(SubtargetFeatureKV) * 243 + 7760, AMDGPU::FeatureFlatOffsetBits12, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
815 { sizeof(SubtargetFeatureKV) * 242 + 7800, sizeof(SubtargetFeatureKV) * 242 + 7760, AMDGPU::FeatureFlatOffsetBits24, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
816 { sizeof(SubtargetFeatureKV) * 241 + 7820, sizeof(SubtargetFeatureKV) * 241 + 7839, AMDGPU::FeatureFlatScratchInsts, { { { 0x0ULL, 0x10000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
817 { sizeof(SubtargetFeatureKV) * 240 + 7879, sizeof(SubtargetFeatureKV) * 240 + 7903, AMDGPU::FeatureFlatSegmentOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
818 { sizeof(SubtargetFeatureKV) * 239 + 7986, sizeof(SubtargetFeatureKV) * 239 + 8005, AMDGPU::FeatureFlatSignedOffset, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
819 { sizeof(SubtargetFeatureKV) * 238 + 8061, sizeof(SubtargetFeatureKV) * 238 + 8080, AMDGPU::FeatureFmaLegacy32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
820 { sizeof(SubtargetFeatureKV) * 237 + 8125, sizeof(SubtargetFeatureKV) * 237 + 8144, AMDGPU::FeatureFmaMixBF16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
821 { sizeof(SubtargetFeatureKV) * 236 + 8216, sizeof(SubtargetFeatureKV) * 236 + 8230, AMDGPU::FeatureFmaMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
822 { sizeof(SubtargetFeatureKV) * 235 + 8295, sizeof(SubtargetFeatureKV) * 235 + 8308, AMDGPU::FeatureFmacF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
823 { sizeof(SubtargetFeatureKV) * 234 + 8335, sizeof(SubtargetFeatureKV) * 234 + 8340, AMDGPU::FeatureFMA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
824 { sizeof(SubtargetFeatureKV) * 233 + 8404, sizeof(SubtargetFeatureKV) * 233 + 8426, AMDGPU::FeatureFormattedMUBUFInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
825 { sizeof(SubtargetFeatureKV) * 232 + 8476, sizeof(SubtargetFeatureKV) * 232 + 8496, AMDGPU::FeatureFP4ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
826 { sizeof(SubtargetFeatureKV) * 231 + 8534, sizeof(SubtargetFeatureKV) * 231 + 8539, AMDGPU::FeatureFP64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
827 { sizeof(SubtargetFeatureKV) * 230 + 8574, sizeof(SubtargetFeatureKV) * 230 + 8597, AMDGPU::FeatureFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
828 { sizeof(SubtargetFeatureKV) * 229 + 8643, sizeof(SubtargetFeatureKV) * 229 + 8680, AMDGPU::FeatureFP6BF6ToF16BF16F32ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
829 { sizeof(SubtargetFeatureKV) * 228 + 8735, sizeof(SubtargetFeatureKV) * 228 + 8756, AMDGPU::FeatureFP8ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
830 { sizeof(SubtargetFeatureKV) * 227 + 8796, sizeof(SubtargetFeatureKV) * 227 + 8816, AMDGPU::FeatureFP8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
831 { sizeof(SubtargetFeatureKV) * 226 + 8854, sizeof(SubtargetFeatureKV) * 226 + 8879, AMDGPU::FeatureFP8F16ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
832 { sizeof(SubtargetFeatureKV) * 225 + 8926, sizeof(SubtargetFeatureKV) * 225 + 8936, AMDGPU::FeatureFP8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
833 { sizeof(SubtargetFeatureKV) * 224 + 8965, sizeof(SubtargetFeatureKV) * 224 + 8979, AMDGPU::FeatureFP8E5M3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
834 { sizeof(SubtargetFeatureKV) * 223 + 9007, sizeof(SubtargetFeatureKV) * 223 + 9024, AMDGPU::FeatureFullRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
835 { sizeof(SubtargetFeatureKV) * 222 + 9061, sizeof(SubtargetFeatureKV) * 222 + 9065, AMDGPU::FeatureG16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
836 { sizeof(SubtargetFeatureKV) * 221 + 9112, sizeof(SubtargetFeatureKV) * 221 + 9126, AMDGPU::FeatureGCN3Encoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
837 { sizeof(SubtargetFeatureKV) * 220 + 9149, sizeof(SubtargetFeatureKV) * 220 + 9153, AMDGPU::FeatureGDS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
838 { sizeof(SubtargetFeatureKV) * 219 + 9175, sizeof(SubtargetFeatureKV) * 219 + 9191, AMDGPU::FeatureGetDoorbellID, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
839 { sizeof(SubtargetFeatureKV) * 218 + 9241, sizeof(SubtargetFeatureKV) * 218 + 9258, AMDGPU::FeatureGetWaveIdInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
840 { sizeof(SubtargetFeatureKV) * 217 + 9300, sizeof(SubtargetFeatureKV) * 217 + 9306, AMDGPU::FeatureGFX10, { { { 0x6890000f00021243ULL, 0x171e000800000918ULL, 0x200648980002aaaULL, 0x440140780008242ULL, 0xe00380008335002ULL, 0xa0190ULL, 0x0ULL, } } } },
841 { sizeof(SubtargetFeatureKV) * 216 + 9327, sizeof(SubtargetFeatureKV) * 216 + 9341, AMDGPU::FeatureGFX10_3Insts, { { { 0x0ULL, 0x8000000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
842 { sizeof(SubtargetFeatureKV) * 215 + 9377, sizeof(SubtargetFeatureKV) * 215 + 9389, AMDGPU::FeatureGFX10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
843 { sizeof(SubtargetFeatureKV) * 214 + 9424, sizeof(SubtargetFeatureKV) * 214 + 9441, AMDGPU::FeatureGFX10_BEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
844 { sizeof(SubtargetFeatureKV) * 213 + 9465, sizeof(SubtargetFeatureKV) * 213 + 9471, AMDGPU::FeatureGFX11, { { { 0x6890800300021243ULL, 0x131e000800000818ULL, 0x20468098002eaaaULL, 0x440140780204342ULL, 0xe80380008000002ULL, 0xa0980ULL, 0x0ULL, } } } },
845 { sizeof(SubtargetFeatureKV) * 212 + 9492, sizeof(SubtargetFeatureKV) * 212 + 9506, AMDGPU::FeatureGFX11_7Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
846 { sizeof(SubtargetFeatureKV) * 211 + 9542, sizeof(SubtargetFeatureKV) * 211 + 9554, AMDGPU::FeatureGFX11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
847 { sizeof(SubtargetFeatureKV) * 210 + 9589, sizeof(SubtargetFeatureKV) * 210 + 9595, AMDGPU::FeatureGFX12, { { { 0x10000360030241ULL, 0x5b1e000000000418ULL, 0x68210012ea22ULL, 0x440140098204040ULL, 0xe80100000000400ULL, 0x80980ULL, 0x0ULL, } } } },
848 { sizeof(SubtargetFeatureKV) * 209 + 9616, sizeof(SubtargetFeatureKV) * 209 + 9628, AMDGPU::FeatureGFX12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
849 { sizeof(SubtargetFeatureKV) * 208 + 9663, sizeof(SubtargetFeatureKV) * 208 + 9677, AMDGPU::FeatureGFX1250Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
850 { sizeof(SubtargetFeatureKV) * 207 + 9714, sizeof(SubtargetFeatureKV) * 207 + 9729, AMDGPU::FeatureGFX1250_STRICT, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
851 { sizeof(SubtargetFeatureKV) * 206 + 9749, sizeof(SubtargetFeatureKV) * 206 + 9778, AMDGPU::FeatureGFX1250VALUBlockingCycles, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
852 { sizeof(SubtargetFeatureKV) * 205 + 9836, sizeof(SubtargetFeatureKV) * 205 + 9855, AMDGPU::FeatureGFX1251GEMMInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
853 { sizeof(SubtargetFeatureKV) * 204 + 9897, sizeof(SubtargetFeatureKV) * 204 + 9922, AMDGPU::FeatureGFX125xLowestRateWMMA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
854 { sizeof(SubtargetFeatureKV) * 203 + 10001, sizeof(SubtargetFeatureKV) * 203 + 10007, AMDGPU::FeatureGFX13, { { { 0x10000360030245ULL, 0x5b1e000800000418ULL, 0x68a10052ea2aULL, 0x4401400d8204340ULL, 0xe80380000000400ULL, 0x80980ULL, 0x0ULL, } } } },
855 { sizeof(SubtargetFeatureKV) * 202 + 10028, sizeof(SubtargetFeatureKV) * 202 + 10040, AMDGPU::FeatureGFX13Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x4000800ULL, 0x0ULL, 0x0ULL, } } } },
856 { sizeof(SubtargetFeatureKV) * 201 + 10075, sizeof(SubtargetFeatureKV) * 201 + 10096, AMDGPU::FeatureGFX7GFX8GFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
857 { sizeof(SubtargetFeatureKV) * 200 + 10136, sizeof(SubtargetFeatureKV) * 200 + 10147, AMDGPU::FeatureGFX8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
858 { sizeof(SubtargetFeatureKV) * 199 + 10181, sizeof(SubtargetFeatureKV) * 199 + 10186, AMDGPU::FeatureGFX9, { { { 0x6810000000020243ULL, 0x131e0000000009a8ULL, 0x640180000b48ULL, 0x10700000202ULL, 0xe00200348335006ULL, 0x280020114ULL, 0x0ULL, } } } },
859 { sizeof(SubtargetFeatureKV) * 198 + 10206, sizeof(SubtargetFeatureKV) * 198 + 10217, AMDGPU::FeatureGFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
860 { sizeof(SubtargetFeatureKV) * 197 + 10251, sizeof(SubtargetFeatureKV) * 197 + 10264, AMDGPU::FeatureGFX90AInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
861 { sizeof(SubtargetFeatureKV) * 196 + 10300, sizeof(SubtargetFeatureKV) * 196 + 10313, AMDGPU::FeatureGFX940Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
862 { sizeof(SubtargetFeatureKV) * 195 + 10349, sizeof(SubtargetFeatureKV) * 195 + 10362, AMDGPU::FeatureGFX950Insts, { { { 0x1000020000100000ULL, 0x265000000000ULL, 0x0ULL, 0x180000030000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
863 { sizeof(SubtargetFeatureKV) * 194 + 10398, sizeof(SubtargetFeatureKV) * 194 + 10427, AMDGPU::FeatureGloballyAddressableScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
864 { sizeof(SubtargetFeatureKV) * 193 + 10498, sizeof(SubtargetFeatureKV) * 193 + 10502, AMDGPU::FeatureGWS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
865 { sizeof(SubtargetFeatureKV) * 192 + 10523, sizeof(SubtargetFeatureKV) * 192 + 10562, AMDGPU::FeatureHalfAddressablePhysicalLocalMemory, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
866 { sizeof(SubtargetFeatureKV) * 191 + 10623, sizeof(SubtargetFeatureKV) * 191 + 10640, AMDGPU::FeatureHalfRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
867 { sizeof(SubtargetFeatureKV) * 190 + 10696, sizeof(SubtargetFeatureKV) * 190 + 10723, AMDGPU::FeatureIEEEMinimumMaximumInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
868 { sizeof(SubtargetFeatureKV) * 189 + 10889, sizeof(SubtargetFeatureKV) * 189 + 10911, AMDGPU::FeatureImageGather4D16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
869 { sizeof(SubtargetFeatureKV) * 188 + 10942, sizeof(SubtargetFeatureKV) * 188 + 10954, AMDGPU::FeatureImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
870 { sizeof(SubtargetFeatureKV) * 187 + 10981, sizeof(SubtargetFeatureKV) * 187 + 11001, AMDGPU::FeatureImageStoreD16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
871 { sizeof(SubtargetFeatureKV) * 186 + 11030, sizeof(SubtargetFeatureKV) * 186 + 11048, AMDGPU::FeatureIndexedResources, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
872 { sizeof(SubtargetFeatureKV) * 185 + 11070, sizeof(SubtargetFeatureKV) * 185 + 11092, AMDGPU::FeatureInstFwdPrefetchBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
873 { sizeof(SubtargetFeatureKV) * 184 + 11142, sizeof(SubtargetFeatureKV) * 184 + 11163, AMDGPU::FeatureInstCacheLineSize128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
874 { sizeof(SubtargetFeatureKV) * 183 + 11201, sizeof(SubtargetFeatureKV) * 183 + 11163, AMDGPU::FeatureInstCacheLineSize64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
875 { sizeof(SubtargetFeatureKV) * 182 + 11221, sizeof(SubtargetFeatureKV) * 182 + 11237, AMDGPU::FeatureIntClamp, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
876 { sizeof(SubtargetFeatureKV) * 181 + 11275, sizeof(SubtargetFeatureKV) * 181 + 11294, AMDGPU::FeatureInv2PiInlineImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
877 { sizeof(SubtargetFeatureKV) * 180 + 11331, sizeof(SubtargetFeatureKV) * 180 + 11347, AMDGPU::FeatureKernargPreload, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
878 { sizeof(SubtargetFeatureKV) * 179 + 11411, sizeof(SubtargetFeatureKV) * 179 + 11438, AMDGPU::FeatureLDSAllocGranularity1024, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
879 { sizeof(SubtargetFeatureKV) * 178 + 11475, sizeof(SubtargetFeatureKV) * 178 + 11438, AMDGPU::FeatureLDSAllocGranularity1280, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
880 { sizeof(SubtargetFeatureKV) * 177 + 11502, sizeof(SubtargetFeatureKV) * 177 + 11438, AMDGPU::FeatureLDSAllocGranularity2048, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
881 { sizeof(SubtargetFeatureKV) * 176 + 11529, sizeof(SubtargetFeatureKV) * 176 + 11438, AMDGPU::FeatureLDSAllocGranularity256, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
882 { sizeof(SubtargetFeatureKV) * 175 + 11555, sizeof(SubtargetFeatureKV) * 175 + 11438, AMDGPU::FeatureLDSAllocGranularity512, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
883 { sizeof(SubtargetFeatureKV) * 174 + 11581, sizeof(SubtargetFeatureKV) * 174 + 11600, AMDGPU::FeatureLdsAtomicAddF64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
884 { sizeof(SubtargetFeatureKV) * 173 + 11647, sizeof(SubtargetFeatureKV) * 173 + 11673, AMDGPU::FeatureLdsBarrierArriveAtomic, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
885 { sizeof(SubtargetFeatureKV) * 172 + 11716, sizeof(SubtargetFeatureKV) * 172 + 11743, AMDGPU::FeatureLdsBranchVmemWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
886 { sizeof(SubtargetFeatureKV) * 171 + 11800, sizeof(SubtargetFeatureKV) * 171 + 11830, AMDGPU::FeatureLDSEncodingGranularity1024, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
887 { sizeof(SubtargetFeatureKV) * 170 + 11865, sizeof(SubtargetFeatureKV) * 170 + 11830, AMDGPU::FeatureLDSEncodingGranularity1280, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
888 { sizeof(SubtargetFeatureKV) * 169 + 11895, sizeof(SubtargetFeatureKV) * 169 + 11830, AMDGPU::FeatureLDSEncodingGranularity2048, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
889 { sizeof(SubtargetFeatureKV) * 168 + 11925, sizeof(SubtargetFeatureKV) * 168 + 11830, AMDGPU::FeatureLDSEncodingGranularity256, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
890 { sizeof(SubtargetFeatureKV) * 167 + 11954, sizeof(SubtargetFeatureKV) * 167 + 11830, AMDGPU::FeatureLDSEncodingGranularity512, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
891 { sizeof(SubtargetFeatureKV) * 166 + 11983, sizeof(SubtargetFeatureKV) * 166 + 12002, AMDGPU::FeatureLDSMisalignedBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
892 { sizeof(SubtargetFeatureKV) * 165 + 12096, sizeof(SubtargetFeatureKV) * 165 + 12111, AMDGPU::FeatureLDSBankCount16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
893 { sizeof(SubtargetFeatureKV) * 164 + 12153, sizeof(SubtargetFeatureKV) * 164 + 12111, AMDGPU::FeatureLDSBankCount32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
894 { sizeof(SubtargetFeatureKV) * 163 + 12168, sizeof(SubtargetFeatureKV) * 163 + 12111, AMDGPU::FeatureLDSBankCount64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
895 { sizeof(SubtargetFeatureKV) * 162 + 12183, sizeof(SubtargetFeatureKV) * 162 + 12193, AMDGPU::FeatureLerpInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
896 { sizeof(SubtargetFeatureKV) * 161 + 12219, sizeof(SubtargetFeatureKV) * 161 + 12234, AMDGPU::FeatureEnableLoadStoreOpt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
897 { sizeof(SubtargetFeatureKV) * 160 + 12270, sizeof(SubtargetFeatureKV) * 160 + 12288, AMDGPU::FeatureLshlAddU64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
898 { sizeof(SubtargetFeatureKV) * 159 + 12319, sizeof(SubtargetFeatureKV) * 159 + 12337, AMDGPU::FeatureMADIntraFwdBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
899 { sizeof(SubtargetFeatureKV) * 158 + 12382, sizeof(SubtargetFeatureKV) * 158 + 12400, AMDGPU::FeatureMadMacF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
900 { sizeof(SubtargetFeatureKV) * 157 + 12461, sizeof(SubtargetFeatureKV) * 157 + 12475, AMDGPU::FeatureMadMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
901 { sizeof(SubtargetFeatureKV) * 156 + 12540, sizeof(SubtargetFeatureKV) * 156 + 12559, AMDGPU::FeatureMadNC64_32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
902 { sizeof(SubtargetFeatureKV) * 155 + 12603, sizeof(SubtargetFeatureKV) * 155 + 12616, AMDGPU::FeatureMadU32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
903 { sizeof(SubtargetFeatureKV) * 154 + 12642, sizeof(SubtargetFeatureKV) * 154 + 12652, AMDGPU::FeatureMAIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
904 { sizeof(SubtargetFeatureKV) * 153 + 12673, sizeof(SubtargetFeatureKV) * 153 + 12699, AMDGPU::FeatureMaxHardClauseLength32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
905 { sizeof(SubtargetFeatureKV) * 152 + 12760, sizeof(SubtargetFeatureKV) * 152 + 12786, AMDGPU::FeatureMaxHardClauseLength63, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
906 { sizeof(SubtargetFeatureKV) * 151 + 12847, sizeof(SubtargetFeatureKV) * 151 + 12875, AMDGPU::FeatureMaxPrivateElementSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
907 { sizeof(SubtargetFeatureKV) * 150 + 12913, sizeof(SubtargetFeatureKV) * 150 + 12940, AMDGPU::FeatureMaxPrivateElementSize4, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
908 { sizeof(SubtargetFeatureKV) * 149 + 12977, sizeof(SubtargetFeatureKV) * 149 + 13004, AMDGPU::FeatureMaxPrivateElementSize8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
909 { sizeof(SubtargetFeatureKV) * 148 + 13041, sizeof(SubtargetFeatureKV) * 148 + 13061, AMDGPU::FeatureMaxWavesPerEU10, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
910 { sizeof(SubtargetFeatureKV) * 147 + 13113, sizeof(SubtargetFeatureKV) * 147 + 13061, AMDGPU::FeatureMaxWavesPerEU16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
911 { sizeof(SubtargetFeatureKV) * 146 + 13133, sizeof(SubtargetFeatureKV) * 146 + 13061, AMDGPU::FeatureMaxWavesPerEU20, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
912 { sizeof(SubtargetFeatureKV) * 145 + 13153, sizeof(SubtargetFeatureKV) * 145 + 13061, AMDGPU::FeatureMaxWavesPerEU8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
913 { sizeof(SubtargetFeatureKV) * 144 + 13172, sizeof(SubtargetFeatureKV) * 144 + 13189, AMDGPU::FeatureMcastLoadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
914 { sizeof(SubtargetFeatureKV) * 143 + 13221, sizeof(SubtargetFeatureKV) * 143 + 13261, AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
915 { sizeof(SubtargetFeatureKV) * 142 + 13329, sizeof(SubtargetFeatureKV) * 142 + 13353, AMDGPU::FeatureMFMAInlineLiteralBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
916 { sizeof(SubtargetFeatureKV) * 141 + 13392, sizeof(SubtargetFeatureKV) * 141 + 13402, AMDGPU::FeatureMIMG_R128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
917 { sizeof(SubtargetFeatureKV) * 140 + 13436, sizeof(SubtargetFeatureKV) * 140 + 13454, AMDGPU::FeatureMinMaxI64Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
918 { sizeof(SubtargetFeatureKV) * 139 + 13491, sizeof(SubtargetFeatureKV) * 139 + 13507, AMDGPU::FeatureMin3Max3PKF16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
919 { sizeof(SubtargetFeatureKV) * 138 + 13564, sizeof(SubtargetFeatureKV) * 138 + 13586, AMDGPU::FeatureMinimum3Maximum3F16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
920 { sizeof(SubtargetFeatureKV) * 137 + 13637, sizeof(SubtargetFeatureKV) * 137 + 13659, AMDGPU::FeatureMinimum3Maximum3F32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
921 { sizeof(SubtargetFeatureKV) * 136 + 13710, sizeof(SubtargetFeatureKV) * 136 + 13734, AMDGPU::FeatureMinimum3Maximum3PKF16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
922 { sizeof(SubtargetFeatureKV) * 135 + 13791, sizeof(SubtargetFeatureKV) * 135 + 13816, AMDGPU::FeatureMixedLoadStoreClauses, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
923 { sizeof(SubtargetFeatureKV) * 134 + 13891, sizeof(SubtargetFeatureKV) * 134 + 13898, AMDGPU::FeatureMovrel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
924 { sizeof(SubtargetFeatureKV) * 133 + 13929, sizeof(SubtargetFeatureKV) * 133 + 13941, AMDGPU::FeatureMqsadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
925 { sizeof(SubtargetFeatureKV) * 132 + 13972, sizeof(SubtargetFeatureKV) * 132 + 13987, AMDGPU::FeatureMqsadPkInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
926 { sizeof(SubtargetFeatureKV) * 131 + 14021, sizeof(SubtargetFeatureKV) * 131 + 14043, AMDGPU::FeatureMSAALoadDstSelBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
927 { sizeof(SubtargetFeatureKV) * 130 + 14079, sizeof(SubtargetFeatureKV) * 130 + 14095, AMDGPU::FeatureMSAALoadInsts, { { { 0x0ULL, 0x0ULL, 0x8000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
928 { sizeof(SubtargetFeatureKV) * 129 + 14128, sizeof(SubtargetFeatureKV) * 129 + 14139, AMDGPU::FeatureMsadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
929 { sizeof(SubtargetFeatureKV) * 128 + 14165, sizeof(SubtargetFeatureKV) * 128 + 14177, AMDGPU::FeatureMTBUFInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
930 { sizeof(SubtargetFeatureKV) * 127 + 14215, sizeof(SubtargetFeatureKV) * 127 + 14239, AMDGPU::FeatureNeedsAligned2addrDS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
931 { sizeof(SubtargetFeatureKV) * 126 + 14298, sizeof(SubtargetFeatureKV) * 126 + 14314, AMDGPU::FeatureNeedsTDMDrain, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
932 { sizeof(SubtargetFeatureKV) * 125 + 14345, sizeof(SubtargetFeatureKV) * 125 + 14373, AMDGPU::FeatureNegativeScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
933 { sizeof(SubtargetFeatureKV) * 124 + 14463, sizeof(SubtargetFeatureKV) * 124 + 14501, AMDGPU::FeatureNegativeUnalignedScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
934 { sizeof(SubtargetFeatureKV) * 123 + 14627, sizeof(SubtargetFeatureKV) * 123 + 14646, AMDGPU::FeatureNoDataDepHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
935 { sizeof(SubtargetFeatureKV) * 122 + 14674, sizeof(SubtargetFeatureKV) * 122 + 14718, AMDGPU::FeatureNoF16PseudoScalarTransInlineConstants, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
936 { sizeof(SubtargetFeatureKV) * 121 + 14791, sizeof(SubtargetFeatureKV) * 121 + 14804, AMDGPU::FeatureNoSdstCMPX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
937 { sizeof(SubtargetFeatureKV) * 120 + 14855, sizeof(SubtargetFeatureKV) * 120 + 14872, AMDGPU::FeatureNoSleepForever, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
938 { sizeof(SubtargetFeatureKV) * 119 + 14917, sizeof(SubtargetFeatureKV) * 119 + 14932, AMDGPU::FeatureNSAClauseBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
939 { sizeof(SubtargetFeatureKV) * 118 + 14995, sizeof(SubtargetFeatureKV) * 118 + 15008, AMDGPU::FeatureNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
940 { sizeof(SubtargetFeatureKV) * 117 + 15052, sizeof(SubtargetFeatureKV) * 117 + 15068, AMDGPU::FeatureNSAtoVMEMBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
941 { sizeof(SubtargetFeatureKV) * 116 + 15133, sizeof(SubtargetFeatureKV) * 116 + 15158, AMDGPU::FeatureOCPFP8ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
942 { sizeof(SubtargetFeatureKV) * 115 + 15209, sizeof(SubtargetFeatureKV) * 115 + 15223, AMDGPU::FeatureOffset3fBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
943 { sizeof(SubtargetFeatureKV) * 114 + 15256, sizeof(SubtargetFeatureKV) * 114 + 15272, AMDGPU::FeaturePackedFP32Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
944 { sizeof(SubtargetFeatureKV) * 113 + 15305, sizeof(SubtargetFeatureKV) * 113 + 15333, AMDGPU::FeaturePackedFP32SingleSGPROps, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
945 { sizeof(SubtargetFeatureKV) * 112 + 15416, sizeof(SubtargetFeatureKV) * 112 + 15444, AMDGPU::FeaturePackedFP64SingleSGPROps, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
946 { sizeof(SubtargetFeatureKV) * 111 + 15527, sizeof(SubtargetFeatureKV) * 111 + 15538, AMDGPU::FeaturePackedTID, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
947 { sizeof(SubtargetFeatureKV) * 110 + 15587, sizeof(SubtargetFeatureKV) * 110 + 15614, AMDGPU::FeaturePackedU64SingleSGPROps, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
948 { sizeof(SubtargetFeatureKV) * 109 + 15699, sizeof(SubtargetFeatureKV) * 109 + 15720, AMDGPU::FeaturePartialNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
949 { sizeof(SubtargetFeatureKV) * 108 + 15772, sizeof(SubtargetFeatureKV) * 108 + 15789, AMDGPU::FeaturePermlane16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
950 { sizeof(SubtargetFeatureKV) * 107 + 15841, sizeof(SubtargetFeatureKV) * 107 + 15857, AMDGPU::FeaturePermlane16Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
951 { sizeof(SubtargetFeatureKV) * 106 + 15896, sizeof(SubtargetFeatureKV) * 106 + 15912, AMDGPU::FeaturePermlane32Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
952 { sizeof(SubtargetFeatureKV) * 105 + 15951, sizeof(SubtargetFeatureKV) * 105 + 15972, AMDGPU::FeaturePkAddMinMaxInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
953 { sizeof(SubtargetFeatureKV) * 104 + 16016, sizeof(SubtargetFeatureKV) * 104 + 16033, AMDGPU::FeaturePkFmacF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
954 { sizeof(SubtargetFeatureKV) * 103 + 16063, sizeof(SubtargetFeatureKV) * 103 + 16082, AMDGPU::FeaturePointSampleAccel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
955 { sizeof(SubtargetFeatureKV) * 102 + 16120, sizeof(SubtargetFeatureKV) * 102 + 16141, AMDGPU::FeaturePopsExitingWaveID, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
956 { sizeof(SubtargetFeatureKV) * 101 + 16184, sizeof(SubtargetFeatureKV) * 101 + 16199, AMDGPU::FeaturePreciseMemory, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
957 { sizeof(SubtargetFeatureKV) * 100 + 16226, sizeof(SubtargetFeatureKV) * 100 + 16253, AMDGPU::FeaturePrivEnabledTrap2NopBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
958 { sizeof(SubtargetFeatureKV) * 99 + 16321, sizeof(SubtargetFeatureKV) * 99 + 16331, AMDGPU::FeaturePrngInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
959 { sizeof(SubtargetFeatureKV) * 98 + 16358, sizeof(SubtargetFeatureKV) * 98 + 16378, AMDGPU::FeaturePseudoScalarTrans, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
960 { sizeof(SubtargetFeatureKV) * 97 + 16424, sizeof(SubtargetFeatureKV) * 97 + 16435, AMDGPU::FeatureQsadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
961 { sizeof(SubtargetFeatureKV) * 96 + 16460, sizeof(SubtargetFeatureKV) * 96 + 16469, AMDGPU::FeatureR128A16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
962 { sizeof(SubtargetFeatureKV) * 95 + 16586, sizeof(SubtargetFeatureKV) * 95 + 16598, AMDGPU::FeatureRealTrue16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
963 { sizeof(SubtargetFeatureKV) * 94 + 16624, sizeof(SubtargetFeatureKV) * 94 + 16649, AMDGPU::FeatureRequiredExportPriority, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
964 { sizeof(SubtargetFeatureKV) * 93 + 16707, sizeof(SubtargetFeatureKV) * 93 + 16721, AMDGPU::FeatureRequiresCOV6, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
965 { sizeof(SubtargetFeatureKV) * 92 + 16752, sizeof(SubtargetFeatureKV) * 92 + 16783, AMDGPU::FeatureRequiresInitialUnclausedVmem, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
966 { sizeof(SubtargetFeatureKV) * 91 + 16851, sizeof(SubtargetFeatureKV) * 91 + 16870, AMDGPU::FeatureRestrictedSOffset, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
967 { sizeof(SubtargetFeatureKV) * 90 + 16920, sizeof(SubtargetFeatureKV) * 90 + 16940, AMDGPU::FeatureSBarrierLeaveImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
968 { sizeof(SubtargetFeatureKV) * 89 + 16983, sizeof(SubtargetFeatureKV) * 89 + 16997, AMDGPU::FeatureSMemRealTime, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
969 { sizeof(SubtargetFeatureKV) * 88 + 17027, sizeof(SubtargetFeatureKV) * 88 + 17042, AMDGPU::FeatureSMemTimeInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
970 { sizeof(SubtargetFeatureKV) * 87 + 17068, sizeof(SubtargetFeatureKV) * 87 + 17090, AMDGPU::FeatureSWakeupBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
971 { sizeof(SubtargetFeatureKV) * 86 + 17124, sizeof(SubtargetFeatureKV) * 86 + 17137, AMDGPU::FeatureSWakeupImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
972 { sizeof(SubtargetFeatureKV) * 85 + 17173, sizeof(SubtargetFeatureKV) * 85 + 17183, AMDGPU::FeatureSadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
973 { sizeof(SubtargetFeatureKV) * 84 + 17207, sizeof(SubtargetFeatureKV) * 84 + 17224, AMDGPU::FeatureSafeCUPrefetch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
974 { sizeof(SubtargetFeatureKV) * 83 + 17280, sizeof(SubtargetFeatureKV) * 83 + 17299, AMDGPU::FeatureSafeSmemPrefetch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
975 { sizeof(SubtargetFeatureKV) * 82 + 17346, sizeof(SubtargetFeatureKV) * 82 + 17357, AMDGPU::FeatureSALUFloatInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
976 { sizeof(SubtargetFeatureKV) * 81 + 17394, sizeof(SubtargetFeatureKV) * 81 + 17421, AMDGPU::FeatureSALUMinimumMaximumInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
977 { sizeof(SubtargetFeatureKV) * 80 + 17464, sizeof(SubtargetFeatureKV) * 80 + 17479, AMDGPU::FeatureScalarAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
978 { sizeof(SubtargetFeatureKV) * 79 + 17517, sizeof(SubtargetFeatureKV) * 79 + 17538, AMDGPU::FeatureScalarDwordx3Loads, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
979 { sizeof(SubtargetFeatureKV) * 78 + 17574, sizeof(SubtargetFeatureKV) * 78 + 17600, AMDGPU::FeatureScalarFlatScratchInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
980 { sizeof(SubtargetFeatureKV) * 77 + 17642, sizeof(SubtargetFeatureKV) * 77 + 17656, AMDGPU::FeatureScalarStores, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
981 { sizeof(SubtargetFeatureKV) * 76 + 17693, sizeof(SubtargetFeatureKV) * 76 + 17698, AMDGPU::FeatureSDWA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
982 { sizeof(SubtargetFeatureKV) * 75 + 17744, sizeof(SubtargetFeatureKV) * 75 + 17753, AMDGPU::FeatureSDWAMac, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
983 { sizeof(SubtargetFeatureKV) * 74 + 17818, sizeof(SubtargetFeatureKV) * 74 + 17828, AMDGPU::FeatureSDWAOmod, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
984 { sizeof(SubtargetFeatureKV) * 73 + 17884, sizeof(SubtargetFeatureKV) * 73 + 17903, AMDGPU::FeatureSDWAOutModsVOPC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
985 { sizeof(SubtargetFeatureKV) * 72 + 17969, sizeof(SubtargetFeatureKV) * 72 + 17981, AMDGPU::FeatureSDWAScalar, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
986 { sizeof(SubtargetFeatureKV) * 71 + 18048, sizeof(SubtargetFeatureKV) * 71 + 18058, AMDGPU::FeatureSDWASdst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
987 { sizeof(SubtargetFeatureKV) * 70 + 18129, sizeof(SubtargetFeatureKV) * 70 + 18141, AMDGPU::FeatureSeaIslands, { { { 0x2090000f00001002ULL, 0x12000802000900ULL, 0x202048080000188ULL, 0x780100642ULL, 0x240200008200002ULL, 0x80020000ULL, 0x0ULL, } } } },
988 { sizeof(SubtargetFeatureKV) * 69 + 18168, sizeof(SubtargetFeatureKV) * 69 + 18188, AMDGPU::FeatureSetPrioIncWgInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
989 { sizeof(SubtargetFeatureKV) * 68 + 18222, sizeof(SubtargetFeatureKV) * 68 + 18244, AMDGPU::FeatureSetregVGPRMSBFixup, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
990 { sizeof(SubtargetFeatureKV) * 67 + 18300, sizeof(SubtargetFeatureKV) * 67 + 18314, AMDGPU::FeatureSGPRInitBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
991 { sizeof(SubtargetFeatureKV) * 66 + 18380, sizeof(SubtargetFeatureKV) * 66 + 18410, AMDGPU::FeatureShaderCyclesHiLoRegisters, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
992 { sizeof(SubtargetFeatureKV) * 65 + 18453, sizeof(SubtargetFeatureKV) * 65 + 18476, AMDGPU::FeatureShaderCyclesRegister, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
993 { sizeof(SubtargetFeatureKV) * 64 + 18512, sizeof(SubtargetFeatureKV) * 64 + 18525, AMDGPU::FeatureEnableSIScheduler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
994 { sizeof(SubtargetFeatureKV) * 63 + 18553, sizeof(SubtargetFeatureKV) * 63 + 18580, AMDGPU::FeatureSlowMaxMinMulI64Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
995 { sizeof(SubtargetFeatureKV) * 62 + 18682, sizeof(SubtargetFeatureKV) * 62 + 18702, AMDGPU::FeatureSmemPrefetchInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
996 { sizeof(SubtargetFeatureKV) * 61 + 18803, sizeof(SubtargetFeatureKV) * 61 + 18831, AMDGPU::FeatureSMEMtoVectorWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
997 { sizeof(SubtargetFeatureKV) * 60 + 18874, sizeof(SubtargetFeatureKV) * 60 + 18891, AMDGPU::FeatureSouthernIslands, { { { 0x2080000a00000802ULL, 0x2000802000900ULL, 0x141048880000088ULL, 0x680100642ULL, 0x40200008200000ULL, 0x80020000ULL, 0x0ULL, } } } },
998 { sizeof(SubtargetFeatureKV) * 59 + 18923, sizeof(SubtargetFeatureKV) * 59 + 18944, AMDGPU::FeatureSRAMECCOnOffModes, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x40000000000ULL, 0x0ULL, 0x0ULL, } } } },
999 { sizeof(SubtargetFeatureKV) * 58 + 18981, sizeof(SubtargetFeatureKV) * 58 + 18997, AMDGPU::FeatureSupportsSRAMECC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1000 { sizeof(SubtargetFeatureKV) * 57 + 19023, sizeof(SubtargetFeatureKV) * 57 + 19039, AMDGPU::FeatureSupportsWave32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1001 { sizeof(SubtargetFeatureKV) * 56 + 19069, sizeof(SubtargetFeatureKV) * 56 + 19085, AMDGPU::FeatureSupportsWave64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1002 { sizeof(SubtargetFeatureKV) * 55 + 19115, sizeof(SubtargetFeatureKV) * 55 + 19128, AMDGPU::FeatureSupportsWGP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1003 { sizeof(SubtargetFeatureKV) * 54 + 19155, sizeof(SubtargetFeatureKV) * 54 + 19176, AMDGPU::FeatureSWMMACGfx1200Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1004 { sizeof(SubtargetFeatureKV) * 53 + 19208, sizeof(SubtargetFeatureKV) * 53 + 19229, AMDGPU::FeatureSWMMACGfx1250Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1005 { sizeof(SubtargetFeatureKV) * 52 + 19261, sizeof(SubtargetFeatureKV) * 52 + 19272, AMDGPU::FeatureTanhInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1006 { sizeof(SubtargetFeatureKV) * 51 + 19304, sizeof(SubtargetFeatureKV) * 51 + 19314, AMDGPU::FeatureTDMInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1007 { sizeof(SubtargetFeatureKV) * 50 + 19372, sizeof(SubtargetFeatureKV) * 50 + 19393, AMDGPU::FeatureTensorCvtLutInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1008 { sizeof(SubtargetFeatureKV) * 49 + 19423, sizeof(SubtargetFeatureKV) * 49 + 19439, AMDGPU::FeatureTgSplitSupport, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1009 { sizeof(SubtargetFeatureKV) * 48 + 19493, sizeof(SubtargetFeatureKV) * 48 + 19518, AMDGPU::FeatureTransCoexecutionHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1010 { sizeof(SubtargetFeatureKV) * 47 + 19576, sizeof(SubtargetFeatureKV) * 47 + 19602, AMDGPU::FeatureTransposeLoadF4F6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1011 { sizeof(SubtargetFeatureKV) * 46 + 19659, sizeof(SubtargetFeatureKV) * 46 + 19672, AMDGPU::FeatureTrapHandler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1012 { sizeof(SubtargetFeatureKV) * 45 + 19693, sizeof(SubtargetFeatureKV) * 45 + 19712, AMDGPU::FeatureTrigReducedRange, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1013 { sizeof(SubtargetFeatureKV) * 44 + 19768, sizeof(SubtargetFeatureKV) * 44 + 19775, AMDGPU::FeatureTrue16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1014 { sizeof(SubtargetFeatureKV) * 43 + 19808, sizeof(SubtargetFeatureKV) * 43 + 19830, AMDGPU::FeatureUnalignedAccessMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1015 { sizeof(SubtargetFeatureKV) * 42 + 19917, sizeof(SubtargetFeatureKV) * 42 + 19941, AMDGPU::FeatureUnalignedBufferAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1016 { sizeof(SubtargetFeatureKV) * 41 + 19993, sizeof(SubtargetFeatureKV) * 41 + 20013, AMDGPU::FeatureUnalignedDSAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1017 { sizeof(SubtargetFeatureKV) * 40 + 20075, sizeof(SubtargetFeatureKV) * 40 + 20100, AMDGPU::FeatureUnalignedScratchAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1018 { sizeof(SubtargetFeatureKV) * 39 + 20143, sizeof(SubtargetFeatureKV) * 39 + 20161, AMDGPU::FeatureUnpackedD16VMem, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1019 { sizeof(SubtargetFeatureKV) * 38 + 20196, sizeof(SubtargetFeatureKV) * 38 + 20221, AMDGPU::FeatureEnableUnsafeDSOffsetFolding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1020 { sizeof(SubtargetFeatureKV) * 37 + 20272, sizeof(SubtargetFeatureKV) * 37 + 20290, AMDGPU::FeatureUseAddPC64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1021 { sizeof(SubtargetFeatureKV) * 36 + 20320, sizeof(SubtargetFeatureKV) * 36 + 20341, AMDGPU::FeatureUserSGPRInit16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1022 { sizeof(SubtargetFeatureKV) * 35 + 20399, sizeof(SubtargetFeatureKV) * 35 + 20414, AMDGPU::FeatureVMovB64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1023 { sizeof(SubtargetFeatureKV) * 34 + 20440, sizeof(SubtargetFeatureKV) * 34 + 20455, AMDGPU::FeatureVMulU64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1024 { sizeof(SubtargetFeatureKV) * 33 + 20482, sizeof(SubtargetFeatureKV) * 33 + 20504, AMDGPU::FeatureVALUTransUseHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1025 { sizeof(SubtargetFeatureKV) * 32 + 20579, sizeof(SubtargetFeatureKV) * 32 + 20601, AMDGPU::FeatureVcmpxExecWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1026 { sizeof(SubtargetFeatureKV) * 31 + 20647, sizeof(SubtargetFeatureKV) * 31 + 20669, AMDGPU::FeatureVcmpxPermlaneHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1027 { sizeof(SubtargetFeatureKV) * 30 + 20687, sizeof(SubtargetFeatureKV) * 30 + 20699, AMDGPU::FeatureRequiresAlignedVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1028 { sizeof(SubtargetFeatureKV) * 29 + 20751, sizeof(SubtargetFeatureKV) * 29 + 20767, AMDGPU::FeatureVGPRIndexMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1029 { sizeof(SubtargetFeatureKV) * 28 + 20799, sizeof(SubtargetFeatureKV) * 28 + 20815, AMDGPU::FeatureVmemPrefInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1030 { sizeof(SubtargetFeatureKV) * 27 + 20871, sizeof(SubtargetFeatureKV) * 27 + 20894, AMDGPU::FeatureVMemToLDSLoad, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1031 { sizeof(SubtargetFeatureKV) * 26 + 21051, sizeof(SubtargetFeatureKV) * 26 + 21079, AMDGPU::FeatureVMEMtoScalarWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1032 { sizeof(SubtargetFeatureKV) * 25 + 21178, sizeof(SubtargetFeatureKV) * 25 + 21203, AMDGPU::FeatureVmemWriteVgprInOrder, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1033 { sizeof(SubtargetFeatureKV) * 24 + 21266, sizeof(SubtargetFeatureKV) * 24 + 21283, AMDGPU::FeatureVolcanicIslands, { { { 0x2090000000001003ULL, 0x160008020009a8ULL, 0x2026480800003c8ULL, 0x780100642ULL, 0x24020020830b002ULL, 0x80020004ULL, 0x0ULL, } } } },
1034 { sizeof(SubtargetFeatureKV) * 23 + 21315, sizeof(SubtargetFeatureKV) * 23 + 21328, AMDGPU::FeatureVOP3Literal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1035 { sizeof(SubtargetFeatureKV) * 22 + 21356, sizeof(SubtargetFeatureKV) * 22 + 21362, AMDGPU::FeatureVOP3PInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1036 { sizeof(SubtargetFeatureKV) * 21 + 21392, sizeof(SubtargetFeatureKV) * 21 + 21425, AMDGPU::FeatureVOP3PX2IncrementsVaVdstTwice, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1037 { sizeof(SubtargetFeatureKV) * 20 + 21489, sizeof(SubtargetFeatureKV) * 20 + 21494, AMDGPU::FeatureVOPDInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1038 { sizeof(SubtargetFeatureKV) * 19 + 21534, sizeof(SubtargetFeatureKV) * 19 + 21556, AMDGPU::FeatureVOPDInterlockHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1039 { sizeof(SubtargetFeatureKV) * 18 + 21689, sizeof(SubtargetFeatureKV) * 18 + 21714, AMDGPU::FeatureVOPD3F64OPYSrcHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1040 { sizeof(SubtargetFeatureKV) * 17 + 21816, sizeof(SubtargetFeatureKV) * 17 + 21834, AMDGPU::FeatureVPermPk16Hazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1041 { sizeof(SubtargetFeatureKV) * 16 + 21913, sizeof(SubtargetFeatureKV) * 16 + 21919, AMDGPU::FeatureVscnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1042 { sizeof(SubtargetFeatureKV) * 15 + 21952, sizeof(SubtargetFeatureKV) * 15 + 21962, AMDGPU::FeatureWaitXcnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1043 { sizeof(SubtargetFeatureKV) * 14 + 21990, sizeof(SubtargetFeatureKV) * 14 + 22023, AMDGPU::FeatureWaitsBeforeSystemScopeStores, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1044 { sizeof(SubtargetFeatureKV) * 13 + 22094, sizeof(SubtargetFeatureKV) * 13 + 22111, AMDGPU::FeatureWaveMatchInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1045 { sizeof(SubtargetFeatureKV) * 12 + 22144, sizeof(SubtargetFeatureKV) * 12 + 22160, AMDGPU::FeatureWavefrontSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1046 { sizeof(SubtargetFeatureKV) * 11 + 22196, sizeof(SubtargetFeatureKV) * 11 + 22160, AMDGPU::FeatureWavefrontSize32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1047 { sizeof(SubtargetFeatureKV) * 10 + 22212, sizeof(SubtargetFeatureKV) * 10 + 22160, AMDGPU::FeatureWavefrontSize64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1048 { sizeof(SubtargetFeatureKV) * 9 + 22228, sizeof(SubtargetFeatureKV) * 9 + 22244, AMDGPU::FeatureWMMA128bInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1049 { sizeof(SubtargetFeatureKV) * 8 + 22317, sizeof(SubtargetFeatureKV) * 8 + 22341, AMDGPU::FeatureWMMA16x16x128FP8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1050 { sizeof(SubtargetFeatureKV) * 7 + 22381, sizeof(SubtargetFeatureKV) * 7 + 22397, AMDGPU::FeatureWMMA256bInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1051 { sizeof(SubtargetFeatureKV) * 6 + 22463, sizeof(SubtargetFeatureKV) * 6 + 22488, AMDGPU::FeatureWMMACoexecutionHazards, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1052 { sizeof(SubtargetFeatureKV) * 5 + 22551, sizeof(SubtargetFeatureKV) * 5 + 22565, AMDGPU::FeatureWMMAF4Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1053 { sizeof(SubtargetFeatureKV) * 4 + 22592, sizeof(SubtargetFeatureKV) * 4 + 22607, AMDGPU::FeatureWMMAN16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1054 { sizeof(SubtargetFeatureKV) * 3 + 22641, sizeof(SubtargetFeatureKV) * 3 + 22652, AMDGPU::FeatureXF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1055 { sizeof(SubtargetFeatureKV) * 2 + 22755, sizeof(SubtargetFeatureKV) * 2 + 22774, AMDGPU::FeatureXNACKOnOffModes, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x400000000000ULL, 0x0ULL, 0x0ULL, } } } },
1056 { sizeof(SubtargetFeatureKV) * 1 + 22809, sizeof(SubtargetFeatureKV) * 1 + 22823, AMDGPU::FeatureSupportsXNACK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
1057 },
1058 "\000" "1024-addressable-vgprs\000Has 1024 addressable VGPRs\000" "1536-"
1059 "physical-vgprs\000Has 1536 physical VGPRs per SIMD\000" "16-bit-insts\000"
1060 "Has i16/f16 instructions\000" "32-bit-num-records-buffer-resource\000Th"
1061 "e buffer resource (V#) has 32-bit num_records\000" "45-bit-num-records-"
1062 "buffer-resource\000The buffer resource (V#) has 45-bit num_records\000" ""
1063 "64-bit-literals\000Can use 64-bit literals with single DWORD instructio"
1064 "ns\000a16\000Support A16 for 16-bit coordinates/gradients/lod/clamp/mip"
1065 " image operands\000add-min-max-insts\000Has v_add_{min|max}_{i|u}32 ins"
1066 "tructions\000add-no-carry-insts\000Have VALU add/sub instructions witho"
1067 "ut carry out\000add-sub-u64-insts\000Has v_add_u64 and v_sub_u64 instru"
1068 "ctions\000addressablelocalmemorysize163840\000The size of local memory "
1069 "in bytes\000addressablelocalmemorysize196608\000addressablelocalmemorys"
1070 "ize32768\000addressablelocalmemorysize327680\000addressablelocalmemorys"
1071 "ize65536\000agent-scope-fine-grained-remote-memory-atomics\000Agent (de"
1072 "vice) scoped atomic operations, excluding those directly supported by P"
1073 "CIe (i.e. integer atomic add, exchange, and compare-and-swap), are func"
1074 "tional for allocations in host or peer device memory.\000agpr-alloc\000"
1075 "Supports allocation of AGPRs\000aperture-regs\000Has Memory Aperture Ba"
1076 "se and Size Registers\000architected-flat-scratch\000Flat Scratch regis"
1077 "ter is a readonly SPI initialized architected register\000architected-s"
1078 "gprs\000Enable the architected SGPRs\000ashr-pk-insts\000Has Arithmetic"
1079 " Shift Pack instructions\000assembler-permissive-wavesize\000Allow pars"
1080 "ing wave32 and wave64 variants of instructions\000async-load-to-lds-ins"
1081 "ts\000Has global async load to LDS instructions\000async-store-from-lds"
1082 "-insts\000Has global async store from LDS instructions\000asynccnt\000H"
1083 "as separate asynccnt counter\000atomic-buffer-global-pk-add-f16-insts\000"
1084 "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions "
1085 "that can return original value\000atomic-buffer-global-pk-add-f16-no-rt"
1086 "n-insts\000Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 in"
1087 "structions that don't return original value\000atomic-buffer-pk-add-bf1"
1088 "6-inst\000Has buffer_atomic_pk_add_bf16 instruction\000atomic-cond-sub-"
1089 "clamp-flat-insts\000Has flat_atomic_cond_sub_u32 and flat_atomic_sub_cl"
1090 "amp_u32 instructions\000atomic-csub-no-rtn-insts\000Has buffer_atomic_c"
1091 "sub and global_atomic_csub instructions that don't return original valu"
1092 "e\000atomic-ds-cond-sub-clamp-insts\000Has ds_cond_sub_u32, ds_cond_sub"
1093 "_rtn_u32, ds_sub_clamp_u32 and ds_sub_clamp_rtn_u32 instructions\000ato"
1094 "mic-ds-pk-add-16-insts\000Has ds_pk_add_bf16, ds_pk_add_f16, ds_pk_add_"
1095 "rtn_bf16, ds_pk_add_rtn_f16 instructions\000atomic-fadd-no-rtn-insts\000"
1096 "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that d"
1097 "on't return original value\000atomic-fadd-rtn-insts\000Has buffer_atomi"
1098 "c_add_f32 and global_atomic_add_f32 instructions that return original v"
1099 "alue\000atomic-flat-pk-add-16-insts\000Has flat_atomic_pk_add_f16 and f"
1100 "lat_atomic_pk_add_bf16 instructions\000atomic-fmin-fmax-flat-f32\000Has"
1101 " flat memory instructions for atomicrmw fmin/fmax for float\000atomic-f"
1102 "min-fmax-flat-f64\000Has flat memory instructions for atomicrmw fmin/fm"
1103 "ax for double\000atomic-fmin-fmax-global-f32\000Has global/buffer instr"
1104 "uctions for atomicrmw fmin/fmax for float\000atomic-fmin-fmax-global-f6"
1105 "4\000atomic-global-pk-add-bf16-inst\000Has global_atomic_pk_add_bf16 in"
1106 "struction\000auto-waitcnt-before-barrier\000Hardware automatically inse"
1107 "rts waitcnt before barrier\000back-off-barrier\000Hardware supports bac"
1108 "king off s_barrier if an exception occurs\000bf16-cvt-insts\000Has bf16"
1109 " conversion instructions\000bf16-from-upper-fp32\000bf16 inline constan"
1110 "ts are actually selected from upper 16-bits of a fp32\000bf16-pk-insts\000"
1111 "Has bf16 packed instructions (fma, add, mul, max, min)\000bf16-trans-in"
1112 "sts\000Has bf16 transcendental instructions\000bf8-cvt-scale-insts\000H"
1113 "as bf8 conversion scale instructions\000bitop3-insts\000Has v_bitop3_b3"
1114 "2/v_bitop3_b16 instructions\000block-vgpr-csr\000Use block load/store f"
1115 "or VGPR callee saved registers\000block16-cvt-scale-insts\000Has block1"
1116 "6 conversion scale instructions\000buffer-inv-inst\000Has buffer_inv in"
1117 "struction\000bvh-dual-bvh-8-insts\000Has image_bvh_dual_intersect_ray a"
1118 "nd image_bvh8_intersect_ray instructions\000bvh-ray-tracing-insts\000Ha"
1119 "s BVH ray tracing instructions\000ci-insts\000Additional instructions f"
1120 "or CI+\000clusters\000Has clusters of workgroups support\000cube-insts\000"
1121 "Has v_cube* instructions\000cumode\000Enable CU wavefront execution mod"
1122 "e\000cvt-fp8-byte-sel\000FP8/BF8 conversions take the byte index from a"
1123 " byte_sel operand\000cvt-fp8-sdwa-src-sel\000FP8/BF8 conversions take t"
1124 "he byte index from the SDWA src0_sel or op_sel field\000cvt-fp8-vop1-bu"
1125 "g\000FP8/BF8 VOP1 form of conversion to F32 is unreliable\000cvt-norm-i"
1126 "nsts\000Has v_cvt_norm* instructions\000cvt-pk-f16-f32-inst\000Has cvt_"
1127 "pk_f16_f32 instruction\000cvt-pknorm-vop2-insts\000Has v_cvt_pk_norm_*f"
1128 "32 instructions/Has v_cvt_pk_norm_*_f16 instructions\000cvt-pknorm-vop3"
1129 "-insts\000cvt-sr-pk-bf16-f32-inst\000Has cvt_sr_pk_bf16_f32 instruction"
1130 "\000d16-write-vgpr32\000D16 instructions potentially have 32-bit data d"
1131 "ependencies\000datacachelinesize128\000Data (VMEM) cache line size in b"
1132 "ytes.\000default-component-broadcast\000BUFFER/IMAGE store instructions"
1133 " set unspecified components to x component (GFX12)\000default-component"
1134 "-zero\000BUFFER/IMAGE store instructions set unspecified components to "
1135 "zero (before GFX12)\000dl-insts\000Has v_fmac_f32 and v_xnor_b32 instru"
1136 "ctions\000dot1-insts\000Has v_dot4_i32_i8 and v_dot8_i32_i4 instruction"
1137 "s\000dot10-insts\000Has v_dot2_f32_f16 instruction\000dot11-insts\000Ha"
1138 "s v_dot4_f32_fp8_fp8, v_dot4_f32_fp8_bf8, v_dot4_f32_bf8_fp8, v_dot4_f3"
1139 "2_bf8_bf8 instructions\000dot12-insts\000Has v_dot2_f32_bf16 instructio"
1140 "ns\000dot13-insts\000Has v_dot2c_f32_bf16 instructions\000dot2-insts\000"
1141 "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions\000dot3-insts\000Has v_"
1142 "dot8c_i32_i4 instruction\000dot4-insts\000Has v_dot2c_i32_i16 instructi"
1143 "on\000dot5-insts\000Has v_dot2c_f32_f16 instruction\000dot6-insts\000Ha"
1144 "s v_dot4c_i32_i8 instruction\000dot7-insts\000Has v_dot4_u32_u8, v_dot8"
1145 "_u32_u4 instructions\000dot8-insts\000Has v_dot4_i32_iu8, v_dot8_i32_iu"
1146 "4 instructions\000dot9-insts\000Has v_dot2_f16_f16, v_dot2_bf16_bf16 in"
1147 "structions\000dpp\000Support DPP (Data Parallel Primitives) extension\000"
1148 "dpp-64bit\000Support DPP (Data Parallel Primitives) extension in DP ALU"
1149 "\000dpp-row-bcast\000Support DPP row_bcast15/row_bcast31\000dpp-src1-sg"
1150 "pr\000Support SGPR for Src1 of DPP instructions\000dpp-wavefront-shifts"
1151 "\000Support DPP wave_shl/wave_rol/wave_shr/wave_ror\000dpp8\000Support "
1152 "DPP8 (Data Parallel Primitives) extension\000ds-src2-insts\000Has ds_*_"
1153 "src2 instructions\000dumpcode\000Dump MachineInstrs in the CodeEmitter\000"
1154 "dx10-clamp-and-ieee-mode\000Target has DX10_CLAMP and IEEE_MODE kernel "
1155 "descriptor bits\000emulated-system-scope-atomics\000System scope atomic"
1156 "s unsupported by the PCI-e are emulated in HW via CAS loop and function"
1157 "al.\000enable-ds128\000Use ds_{read|write}_b128\000enable-flat-scratch\000"
1158 "Use scratch_* flat memory instructions to access scratch\000enable-prt-"
1159 "strict-null\000Enable zeroing of result registers for sparse texture fe"
1160 "tches\000exclusive-scan-insts\000Has exclusive scan instructions\000ext"
1161 "ended-image-insts\000Support mips != 0, lod != 0, gather4, and get_lod\000"
1162 "f16-fp8-conversion-insts\000Has f16 conversion to fp8 and bf8 instructi"
1163 "ons\000f16bf16-to-fp6bf6-cvt-scale-insts\000Has f16bf16 to fp6bf6 conve"
1164 "rsion scale instructions\000f32-to-f16bf16-cvt-sr-insts\000Has f32 to f"
1165 "16bf16 conversion scale instructions\000f32-to-fp6bf6-cvt-scale-insts\000"
1166 "Has f32 to fp6bf6 conversion scale instructions\000fast-denormal-f32\000"
1167 "Enabling denormals does not cause f32 instructions to run at f64 rates\000"
1168 "fast-fmaf\000Assuming f32 fma is at least as fast as mul + add\000flat-"
1169 "address-space\000Support flat address space\000flat-atomic-fadd-f32-ins"
1170 "t\000Has flat_atomic_add_f32 instruction\000flat-buffer-global-fadd-f64"
1171 "-inst\000Has flat, buffer, and global instructions for f64 atomic fadd\000"
1172 "flat-for-global\000Force to generate flat instruction for global\000fla"
1173 "t-global-insts\000Have global_* flat memory instructions\000flat-gvs-mo"
1174 "de\000Have GVS addressing mode with flat_* instructions\000flat-inst-of"
1175 "fsets\000Flat instructions have immediate offset addressing mode\000fla"
1176 "t-offset-bits-12\000Number of bits for flat offset encoding\000flat-off"
1177 "set-bits-24\000flat-scratch-insts\000Have scratch_* flat memory instruc"
1178 "tions\000flat-segment-offset-bug\000GFX10 bug where inst_offset is igno"
1179 "red when flat instructions access global memory\000flat-signed-offset\000"
1180 "Immediate offset of FLAT instructions are always signed\000fma-legacy32"
1181 "-insts\000Has single-precision legacy FMA instructions\000fma-mix-bf16-"
1182 "insts\000Has v_fma_mix_f32_bf16, v_fma_mixlo_bf16, v_fma_mixhi_bf16 ins"
1183 "tructions\000fma-mix-insts\000Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma"
1184 "_mixhi_f16 instructions\000fmacf64-inst\000Has v_fmac_f64 instruction\000"
1185 "fmaf\000Enable single precision FMA (not as fast as mul+add, but fused)"
1186 "\000formatted-mubuf-insts\000Has formatted memory untyped buffer instru"
1187 "ctions.\000fp4-cvt-scale-insts\000Has fp4 conversion scale instructions"
1188 "\000fp64\000Enable double precision operations\000fp6bf6-cvt-scale-inst"
1189 "s\000Has fp6 and bf6 conversion scale instructions\000fp6bf6-to-f16bf16"
1190 "f32-cvt-scale-insts\000Has fp6bf6 to f16bf16f32 conversion scale instru"
1191 "ctions\000fp8-conversion-insts\000Has fp8 and bf8 conversion instructio"
1192 "ns\000fp8-cvt-scale-insts\000Has fp8 conversion scale instructions\000f"
1193 "p8-f16-conversion-insts\000Has fp8 and bf8 conversion to f16 instructio"
1194 "ns\000fp8-insts\000Has fp8 and bf8 instructions\000fp8e5m3-insts\000Has"
1195 " fp8 e5m3 format support\000full-rate-64-ops\000Most fp64 instructions "
1196 "are full rate\000g16\000Support G16 for 16-bit gradient image operands\000"
1197 "gcn3-encoding\000Encoding format for VI\000gds\000Has Global Data Share"
1198 "\000get-doorbell-id\000Supports reading the doorbell ID through S_GETRE"
1199 "G\000get-wave-id-inst\000Has s_get_waveid_in_workgroup instruction\000g"
1200 "fx10\000GFX10 GPU generation\000gfx10-3-insts\000Additional instruction"
1201 "s for GFX10.3\000gfx10-insts\000Additional instructions for GFX10+\000g"
1202 "fx10_b-encoding\000Encoding format GFX10_B\000gfx11\000GFX11 GPU genera"
1203 "tion\000gfx11-7-insts\000Additional instructions for GFX11.7\000gfx11-i"
1204 "nsts\000Additional instructions for GFX11+\000gfx12\000GFX12 GPU genera"
1205 "tion\000gfx12-insts\000Additional instructions for GFX12+\000gfx1250-in"
1206 "sts\000Additional instructions for GFX1250+\000gfx1250-strict\000gfx125"
1207 "0 strict mode\000gfx1250-valu-blocking-cycles\000VALU pipe occupancy is"
1208 " modeled with GFX1250BlockingCycles\000gfx1251-gemm-insts\000Has additi"
1209 "onal gfx1251 DGEMM instructions\000gfx125x-lowest-rate-wmma\000Has the "
1210 "lowest rate wmma in the gfx125x family, mainly for the gfx12-5-generic\000"
1211 "gfx13\000GFX13 GPU generation\000gfx13-insts\000Additional instructions"
1212 " for GFX13+\000gfx7-gfx8-gfx9-insts\000Instructions shared in GFX7, GFX"
1213 "8, GFX9\000gfx8-insts\000Additional instructions for GFX8+\000gfx9\000G"
1214 "FX9 GPU generation\000gfx9-insts\000Additional instructions for GFX9+\000"
1215 "gfx90a-insts\000Additional instructions for GFX90A+\000gfx940-insts\000"
1216 "Additional instructions for GFX940+\000gfx950-insts\000Additional instr"
1217 "uctions for GFX950+\000globally-addressable-scratch\000FLAT instruction"
1218 "s can access scratch memory for any thread in any wave\000gws\000Has Gl"
1219 "obal Wave Sync\000half-addressable-physical-local-memory\000A work-grou"
1220 "p can address only half of the physical LDS block\000half-rate-64-ops\000"
1221 "Most fp64 instructions are half rate instead of quarter\000ieee-minimum"
1222 "-maximum-insts\000Has v_minimum/maximum_f16/f32/f64, v_minimummaximum/m"
1223 "aximumminimum_f16/f32,v_pk_minmax/maxmin_num_f16, v_min/max_num_f16/f32"
1224 "/f64 andv_pk_min/max_num_f16 instructions\000image-gather4-d16-bug\000I"
1225 "mage Gather4 D16 hardware bug\000image-insts\000Support image instructi"
1226 "ons\000image-store-d16-bug\000Image Store D16 hardware bug\000indexed-r"
1227 "esources\000Has indexed resources\000inst-fwd-prefetch-bug\000S_INST_PR"
1228 "EFETCH instruction causes shader to hang\000instcachelinesize128\000Ins"
1229 "truction cache line size in bytes.\000instcachelinesize64\000int-clamp-"
1230 "insts\000Support clamp for integer destination\000inv-2pi-inline-imm\000"
1231 "Has 1 / (2 * pi) as inline immediate\000kernarg-preload\000Hardware sup"
1232 "ports preloading of kernel arguments in user SGPRs.\000lds-alloc-granul"
1233 "arity-1024\000LDS allocation granularity in bytes.\000lds-alloc-granula"
1234 "rity-1280\000lds-alloc-granularity-2048\000lds-alloc-granularity-256\000"
1235 "lds-alloc-granularity-512\000lds-atomic-add-f64\000Has ds_add_f64 and d"
1236 "s_add_rtn_f64 instructions\000lds-barrier-arrive-atomic\000Has LDS barr"
1237 "ier-arrive atomic instructions\000lds-branch-vmem-war-hazard\000Switchi"
1238 "ng between LDS and VMEM-tex not waiting VM_VSRC=0\000lds-encoding-granu"
1239 "larity-1024\000LDS encoding granularity in bytes.\000lds-encoding-granu"
1240 "larity-1280\000lds-encoding-granularity-2048\000lds-encoding-granularit"
1241 "y-256\000lds-encoding-granularity-512\000lds-misaligned-bug\000Some GFX"
1242 "10 bug with multi-dword LDS and flat access that is not naturally align"
1243 "ed in WGP mode\000ldsbankcount16\000The number of LDS banks per compute"
1244 " unit.\000ldsbankcount32\000ldsbankcount64\000lerp-inst\000Has v_lerp_u"
1245 "8 instruction\000load-store-opt\000Enable SI load/store optimizer pass\000"
1246 "lshl-add-u64-inst\000Has v_lshl_add_u64 instruction\000mad-intra-fwd-bu"
1247 "g\000MAD_U64/I64 intra instruction forwarding bug\000mad-mac-f32-insts\000"
1248 "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions\000mad-mix"
1249 "-insts\000Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructi"
1250 "ons\000mad-nc-64-32-insts\000Has v_mad_nc_{u64_u32|i64_i32} instruction"
1251 "s\000mad-u32-inst\000Has v_mad_u32 instruction\000mai-insts\000Has mAI "
1252 "instructions\000max-hard-clause-length-32\000Maximum number of instruct"
1253 "ions in an explicit S_CLAUSE is 32\000max-hard-clause-length-63\000Maxi"
1254 "mum number of instructions in an explicit S_CLAUSE is 63\000max-private"
1255 "-element-size-16\000Maximum private access size may be 16\000max-privat"
1256 "e-element-size-4\000Maximum private access size may be 4\000max-private"
1257 "-element-size-8\000Maximum private access size may be 8\000max-waves-pe"
1258 "r-eu-10\000Maximum number of waves an execution unit can hold.\000max-w"
1259 "aves-per-eu-16\000max-waves-per-eu-20\000max-waves-per-eu-8\000mcast-lo"
1260 "ad-insts\000Has multicast load instructions\000memory-atomic-fadd-f32-d"
1261 "enormal-support\000global/flat/buffer atomic fadd for float supports de"
1262 "normal handling\000mfma-inline-literal-bug\000MFMA cannot use inline li"
1263 "teral as SrcC\000mimg-r128\000Support 128-bit texture resources\000min-"
1264 "max-i64-insts\000Has v_{min|max}_{i|u}64 instructions\000min3-max3-pkf1"
1265 "6\000Has v_pk_min3_num_f16 and v_pk_max3_num_f16 instructions\000minimu"
1266 "m3-maximum3-f16\000Has v_minimum3_f16 and v_maximum3_f16 instructions\000"
1267 "minimum3-maximum3-f32\000Has v_minimum3_f32 and v_maximum3_f32 instruct"
1268 "ions\000minimum3-maximum3-pkf16\000Has v_pk_minimum3_f16 and v_pk_maxim"
1269 "um3_f16 instructions\000mixed-load-store-clauses\000Loads, stores and a"
1270 "tomics of the same memory class share one S_CLAUSE type\000movrel\000Ha"
1271 "s v_movrel*_b32 instructions\000mqsad-insts\000Has v_mqsad_u32_u8 instr"
1272 "uction\000mqsad-pk-insts\000Has v_mqsad_pk_u16_u8 instruction\000msaa-l"
1273 "oad-dst-sel-bug\000MSAA loads not honoring dst_sel bug\000msaa-load-ins"
1274 "ts\000Has image_msaa_load instructions\000msad-insts\000Has v_msad_u8 i"
1275 "nstruction\000mtbuf-insts\000Has memory typed buffer instructions.\000n"
1276 "eeds-aligned-2addr-lds\000Needs 2addr LDS instructions to be aligned to"
1277 " payload size\000needs-tdm-drain\000Needs to keep tensor count low\000n"
1278 "egative-scratch-offset-bug\000Negative immediate offsets in scratch ins"
1279 "tructions with an SGPR offset page fault on GFX9\000negative-unaligned-"
1280 "scratch-offset-bug\000Scratch instructions with a VGPR offset and a neg"
1281 "ative immediate offset thatis not a multiple of 4 read wrong memory on "
1282 "GFX10\000no-data-dep-hazard\000Does not need SW waitstates\000no-f16-ps"
1283 "eudo-scalar-trans-inline-constants\000Inline constants are not supporte"
1284 "d for F16 pseudo scalar transcendentals\000no-sdst-cmpx\000V_CMPX does "
1285 "not write VCC/SGPR in addition to EXEC\000no-sleep-forever\000s_monitor"
1286 "_sleep should not use sleep_forever\000nsa-clause-bug\000MIMG-NSA in a "
1287 "hard clause has unpredictable results on GFX10.1\000nsa-encoding\000Sup"
1288 "port NSA encoding for image instructions\000nsa-to-vmem-bug\000MIMG-NSA"
1289 " followed by VMEM fail if EXEC_LO or EXEC_HI equals zero\000ocp-fp8-con"
1290 "version-insts\000Has OCP fp8 (E4M3FN, E5M2) conversion instructions\000"
1291 "offset-3f-bug\000Branch offset of 3f hardware bug\000packed-fp32-ops\000"
1292 "Support packed fp32 instructions\000packed-fp32-single-sgpr-ops\000Supp"
1293 "ort packed fp32 instructions with SGPR operands propagating low to high"
1294 " 32 bit\000packed-fp64-single-sgpr-ops\000Support packed fp64 instructi"
1295 "ons with SGPR operands propagating low to high 64 bit\000packed-tid\000"
1296 "Workitem IDs are packed into v0 at kernel launch\000packed-u64-single-s"
1297 "gpr-ops\000Support packed uint64 instructions with SGPR operands propag"
1298 "ating low to high 64 bit\000partial-nsa-encoding\000Support partial NSA"
1299 " encoding for image instructions\000permlane16-insts\000Has v_permlane1"
1300 "6_b32/v_permlanex16_b32 instructions\000permlane16-swap\000Has v_permla"
1301 "ne16_swap_b32 instructions\000permlane32-swap\000Has v_permlane32_swap_"
1302 "b32 instructions\000pk-add-min-max-insts\000Has v_pk_add_{min|max}_{i|u"
1303 "}16 instructions\000pk-fmac-f16-inst\000Has v_pk_fmac_f16 instruction\000"
1304 "point-sample-accel\000Has point sample acceleration feature\000pops-exi"
1305 "ting-wave-id\000Has POPS_EXITING_WAVE_ID hardware register\000precise-m"
1306 "emory\000Enable precise memory mode\000priv-enabled-trap2-nop-bug\000Ha"
1307 "rdware that runs with PRIV=1 interpreting 's_trap 2' as a nop bug\000pr"
1308 "ng-inst\000Has v_prng_b32 instruction\000pseudo-scalar-trans\000Has Pse"
1309 "udo Scalar Transcendental instructions\000qsad-insts\000Has v_qsad* ins"
1310 "tructions\000r128-a16\000Support gfx9-style A16 for 16-bit coordinates/"
1311 "gradients/lod/clamp/mip image operands, where a16 is aliased with r128\000"
1312 "real-true16\000Use true 16-bit registers\000required-export-priority\000"
1313 "Export priority must be explicitly manipulated on GFX11.5\000requires-c"
1314 "ov6\000Target Requires Code Object V6\000requires-initial-unclause-vmem"
1315 "\000Hardware entrypoints require first VMEM instruction to be unclaused"
1316 "\000restricted-soffset\000Has restricted SOffset (immediate not support"
1317 "ed).\000s-barrier-leave-imm\000s_barrier_leave takes an immediate opera"
1318 "nd\000s-memrealtime\000Has s_memrealtime instruction\000s-memtime-inst\000"
1319 "Has s_memtime instruction\000s-wakeup-barrier-inst\000Has s_wakeup_barr"
1320 "ier instruction.\000s-wakeup-imm\000s_wakeup takes an immediate operand"
1321 "\000sad-insts\000Has v_sad* instructions\000safe-cu-prefetch\000VMEM CU"
1322 " scope prefetches do not fail on illegal address\000safe-smem-prefetch\000"
1323 "SMEM prefetches do not fail on illegal address\000salu-float\000Has SAL"
1324 "U floating point instructions\000salu-minimum-maximum-insts\000Has s_mi"
1325 "nimum/maximum_f16/f32 instructions\000scalar-atomics\000Has atomic scal"
1326 "ar memory instructions\000scalar-dwordx3-loads\000Has 96-bit scalar loa"
1327 "d instructions\000scalar-flat-scratch-insts\000Have s_scratch_* flat me"
1328 "mory instructions\000scalar-stores\000Has store scalar memory instructi"
1329 "ons\000sdwa\000Support SDWA (Sub-DWORD Addressing) extension\000sdwa-ma"
1330 "v\000Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension\000"
1331 "sdwa-omod\000Support OMod with SDWA (Sub-DWORD Addressing) extension\000"
1332 "sdwa-out-mods-vopc\000Support clamp for VOPC with SDWA (Sub-DWORD Addre"
1333 "ssing) extension\000sdwa-scalar\000Support scalar register with SDWA (S"
1334 "ub-DWORD Addressing) extension\000sdwa-sdst\000Support scalar dst for V"
1335 "OPC with SDWA (Sub-DWORD Addressing) extension\000sea-islands\000SEA_IS"
1336 "LANDS GPU generation\000setprio-inc-wg-inst\000Has s_setprio_inc_wg ins"
1337 "truction.\000setreg-vgpr-msb-fixup\000S_SETREG to MODE clobbers VGPR MS"
1338 "B bits, requires fixup\000sgpr-init-bug\000VI SGPR initialization bug r"
1339 "equiring a fixed SGPR allocation size\000shader-cycles-hi-lo-registers\000"
1340 "Has SHADER_CYCLES_HI/LO hardware registers\000shader-cycles-register\000"
1341 "Has SHADER_CYCLES hardware register\000si-scheduler\000Enable SI Machin"
1342 "e Scheduler\000slow-max-min-mul-i64-insts\000" "64-bit integer max/min/"
1343 "mul VALU instructions are slower than expanding to an equivalent code s"
1344 "equence\000smem-prefetch-insts\000Has s_prefetch_inst, s_prefetch_inst_"
1345 "pc_rel, s_prefetch_data and s_prefetch_data_pc_rel instructions\000smem"
1346 "-to-vector-write-hazard\000s_load_dword followed by v_cmp page faults\000"
1347 "southern-islands\000SOUTHERN_ISLANDS GPU generation\000sramecc-on-off-m"
1348 "odes\000Target supports SRAMECC on/off modes\000sramecc-support\000Hard"
1349 "ware supports SRAMECC\000supports-wave32\000Hardware supports wave32 mo"
1350 "de\000supports-wave64\000Hardware supports wave64 mode\000supports-wgp\000"
1351 "Hardware supports WGP mode\000swmmac-gfx1200-insts\000Has GFX1200 SWMMA"
1352 "C instructions\000swmmac-gfx1250-insts\000Has GFX1250 SWMMAC instructio"
1353 "ns\000tanh-insts\000Has v_tanh_f32/f16 instructions\000tdm-insts\000Has"
1354 " tensor_load_to_lds/tensor_store_from_lds instructions\000tensor-cvt-lu"
1355 "t-insts\000Has v_perm_pk16* instructions\000tgsplit-support\000Hardware"
1356 " support for threadgroup split execution mode\000trans-coexecution-haza"
1357 "rd\000Hazard when TRANS co-executes with other VALU instruction\000tran"
1358 "spose-load-f4f6-insts\000Has ds_load_tr4/tr6 and global_load_tr4/tr6 in"
1359 "structions\000trap-handler\000Trap handler support\000trig-reduced-rang"
1360 "e\000Requires use of fract on arguments to trig instructions\000true16\000"
1361 "True 16-bit operand instructions\000unaligned-access-mode\000Enable una"
1362 "ligned global, local and region loads and stores if the hardware suppor"
1363 "ts it\000unaligned-buffer-access\000Hardware supports unaligned global "
1364 "loads and stores\000unaligned-ds-access\000Hardware supports unaligned "
1365 "local and region loads and stores\000unaligned-scratch-access\000Suppor"
1366 "t unaligned scratch loads and stores\000unpacked-d16-vmem\000Has unpack"
1367 "ed d16 vmem instructions\000unsafe-ds-offset-folding\000Force using DS "
1368 "instruction immediate offsets on SI\000use-add-pc64-inst\000Use s_add_p"
1369 "c_i64 instruction.\000user-sgpr-init16-bug\000Bug requiring at least 16"
1370 " user+system SGPRs to be enabled\000v-mov-b64-inst\000Has v_mov_b64 ins"
1371 "truction\000v-mul-u64-inst\000Has v_mul_u64 instruction.\000valu-trans-"
1372 "use-hazard\000Hazard when TRANS instructions are closely followed by a "
1373 "use of the result\000vcmpx-exec-war-hazard\000V_CMPX WAR hazard on EXEC"
1374 " (V_CMPX issue ONLY)\000vcmpx-permlane-hazard\000TODO: describe me\000v"
1375 "gpr-align2\000VGPR and AGPR tuple operands require even alignment\000vg"
1376 "pr-index-mode\000Has VGPR mode register indexing\000vmem-pref-insts\000"
1377 "Has flat_prefect_b8 and global_prefetch_b8 instructions\000vmem-to-lds-"
1378 "load-insts\000The platform has memory to lds instructions (global_load "
1379 "w/lds bit set, buffer_loadw/lds bit set or global_load_lds. This does n"
1380 "ot include scratch_load_lds.\000vmem-to-scalar-write-hazard\000VMEM ins"
1381 "truction followed by scalar writing to EXEC mask, M0 or SGPR leads to i"
1382 "ncorrect execution.\000vmem-write-vgpr-in-order\000VMEM instructions of"
1383 " the same type write VGPR results in order\000volcanic-islands\000VOLCA"
1384 "NIC_ISLANDS GPU generation\000vop3-literal\000Can use one literal in VO"
1385 "P3\000vop3p\000Has VOP3P packed instructions\000vop3px2-increments-va-v"
1386 "dst-twice\000VOP3PX2 encoded instructions increment the VaVdst counter "
1387 "twice\000vopd\000Has VOPD dual issue wave32 instructions\000vopd-interl"
1388 "ock-hazard\000VOPD destination buffer forwarding drops the interlock wh"
1389 "en SRC0 or SRC1 X/Y are distinct VGPRs with the same register-number pa"
1390 "rity\000vopd3-f64-opy-src-hazard\000Hazard when an OPY VGPR source of a"
1391 " VOPD3 with a 64-bit OPX names the last VGPR allocated to the wave\000v"
1392 "perm-pk16-hazard\000V_PERM_PK16 must be immediately followed by a safe "
1393 "VALU (or an inserted V_NOP)\000vscnt\000Has separate store vscnt counte"
1394 "r\000wait-xcnt\000Has s_wait_xcnt instruction\000waits-before-system-sc"
1395 "ope-stores\000Target requires waits for loads and atomics before system"
1396 " scope stores\000wave-match-insts\000Has v_wave_match_b32 instruction\000"
1397 "wavefrontsize16\000The number of threads per wavefront\000wavefrontsize"
1398 "32\000wavefrontsize64\000wmma-128b-insts\000Has WMMA instructions where"
1399 " A and B matrices do not have duplicated data\000wmma-16x16x128fp8-inst"
1400 "s\000Has 16x16x128 FP8/BF8 WMMA instructions\000wmma-256b-insts\000Has "
1401 "WMMA instructions where A and B matrices have duplicated data\000wmma-c"
1402 "oexecution-hazards\000Hazards when WMMA co-executes with other WMMA/VAL"
1403 "U instruction\000wmma-f4-insts\000Has WMMA_*_F4 instructions\000wmma-n1"
1404 "6-insts\000Has WMMA instructions with N = 16\000xf32-insts\000Has instr"
1405 "uctions that support xf32 format, such as v_mfma_f32_16x16x8_xf32 and v"
1406 "_mfma_f32_32x32x4_xf32\000xnack-on-off-modes\000Target supports XNACK o"
1407 "n/off modes\000xnack-support\000Hardware supports XNACK\000"};
1408
1409#ifdef DBGFIELD
1410#error "<target>GenSubtargetInfo.inc requires a DBGFIELD macro"
1411#endif
1412#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1413#define DBGFIELD(x) x,
1414#define DBGVAL_OR_NULLPTR(x) x
1415#else
1416#define DBGFIELD(x)
1417#define DBGVAL_OR_NULLPTR(x) nullptr
1418#endif
1419
1420// ===============================================================
1421// Data tables for the new per-operand machine model.
1422
1423static_assert(3 <= UINT8_MAX, "NumWriteProcResEntries does not fit in uint8_t");
1424static_assert(3 <= UINT8_MAX, "NumWriteLatencyEntries does not fit in uint8_t");
1425
1426// {ProcResourceIdx, ReleaseAtCycle, AcquireAtCycle}
1427extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[] = {
1428 { 0, 0, 0 }, // Invalid
1429 { 4, 1, 0}, // #1
1430 { 5, 1, 0}, // #2
1431 { 4, 1, 0}, // #3
1432 { 7, 1, 0}, // #4
1433 { 4, 2, 0}, // #5
1434 { 7, 2, 0}, // #6
1435 { 4, 1, 0}, // #7
1436 { 8, 1, 0}, // #8
1437 { 3, 1, 0}, // #9
1438 { 4, 2, 0}, // #10
1439 { 8, 1, 0}, // #11
1440 { 3, 1, 0}, // #12
1441 { 4, 1, 0}, // #13
1442 { 3, 2, 0}, // #14
1443 { 4, 2, 0}, // #15
1444 { 2, 1, 0}, // #16
1445 { 4, 1, 0}, // #17
1446 { 1, 1, 0}, // #18
1447 { 4, 2, 0}, // #19
1448 { 5, 1, 0}, // #20
1449 { 7, 1, 0}, // #21
1450 { 4, 1, 0}, // #22
1451 { 6, 1, 0}, // #23
1452 { 4, 1, 0}, // #24
1453 { 5, 1, 0}, // #25
1454 { 7, 1, 0}, // #26
1455 { 4, 1, 0}, // #27
1456 { 7, 2, 0}, // #28
1457 { 4, 1, 0}, // #29
1458 { 6, 1, 0}, // #30
1459 { 7, 1, 0}, // #31
1460 { 4, 3, 0}, // #32
1461 { 8, 3, 0}, // #33
1462 { 9, 16, 0}, // #34
1463 { 9, 32, 0}, // #35
1464 { 4, 2, 0}, // #36
1465 { 6, 2, 0}, // #37
1466 { 3, 1, 0}, // #38
1467 { 4, 2, 0}, // #39
1468 { 7, 1, 0}, // #40
1469 { 4, 2, 0}, // #41
1470 { 5, 1, 0}, // #42
1471 { 6, 1, 0}, // #43
1472 { 4, 1, 0}, // #44
1473 { 5, 1, 0}, // #45
1474 { 6, 1, 0}, // #46
1475 { 4, 1, 0}, // #47
1476 { 6, 2, 0}, // #48
1477 { 4, 3, 0}, // #49
1478 { 7, 3, 0}, // #50
1479 { 9, 8, 0}, // #51
1480 { 9, 4, 0}, // #52
1481 { 5, 2, 0}, // #53
1482 { 3, 1, 0}, // #54
1483 { 6, 1, 0}, // #55
1484 { 6, 3, 0}, // #56
1485 { 7, 8, 0}, // #57
1486 { 7, 16, 0}, // #58
1487 { 5, 4, 0}, // #59
1488 { 5, 8, 0}, // #60
1489 { 7, 4, 0}, // #61
1490 { 5, 16, 0} // #62
1491}; // AMDGPUWriteProcResTable
1492
1493// {Cycles, WriteResourceID}
1494extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[] = {
1495 { 0, 0}, // Invalid
1496 { 2, 0}, // #1 WriteSALU_WriteDoubleAdd_Write64Bit_Write2PassMAI
1497 { 5, 0}, // #2 Write32Bit_WriteFloatCvt_WriteFloatFMA_Write64Bit_WriteDoubleAdd_WriteLDS_WriteSMEM
1498 { 5, 0}, // #3 Write32Bit_WriteVALUDummy_Write64Bit_WriteLDS
1499 { 5, 0}, // #4 Write32Bit
1500 {320, 0}, // #5 WriteVMEM
1501 {320, 0}, // #6 WriteVMEM
1502 {20, 0}, // #7 WriteLDS_WriteSMEM
1503 {20, 0}, // #8 WriteLDS
1504 {20, 0}, // #9 WriteLDS
1505 {16, 0}, // #10 WriteExport_Write4PassWMMA_WriteXDL4PassWMMA_WriteFloatFMA_WriteDouble_WriteTrans64_Write16PassMAI_Write16PassDGEMM
1506 {32, 0}, // #11 WriteBranch_WriteXDL8PassWMMA
1507 {2000, 0}, // #12 WriteBarrier
1508 { 2, 0}, // #13 WriteSALU
1509 { 6, 0}, // #14 Write64Bit_WriteQuarterRate32_WriteDoubleCvt
1510 { 5, 0}, // #15 Write32Bit_WriteFloatFMA
1511 { 2, 0}, // #16 WriteSALU_WriteSALUDummy
1512 {22, 0}, // #17 WriteDoubleAdd_WriteDoubleCvt
1513 {10, 0}, // #18 WriteTrans32
1514 {22, 0}, // #19 WriteDouble
1515 { 2, 0}, // #20 WriteSALUDummy
1516 { 8, 0}, // #21 WriteIntMul_WriteQuarterRate32_WriteTrans32_WritePseudoScalarTrans_WriteXDL2PassWMMA_WriteBranch_WriteDoubleAdd_Write8PassMAI_Write8PassDGEMM
1517 { 2, 0}, // #22 WriteSALUDummy
1518 {24, 0}, // #23 WriteTrans64
1519 { 6, 0}, // #24 Write64Bit
1520 { 6, 0}, // #25 Write64Bit
1521 {320, 0}, // #26 WriteVMEM
1522 {320, 0}, // #27 WriteVMEM
1523 {320, 0}, // #28 WriteVMEM
1524 {22, 0}, // #29 WriteDoubleAdd
1525 { 5, 0}, // #30 Write32Bit
1526 { 4, 0}, // #31 WriteSFPU_WriteXDL1PassWMMA_WriteExport_WriteTrans32_WriteFloatCvt_WriteDoubleCvt_WriteIntMul_WriteQuarterRate32_WriteTrans64_Write4PassDGEMM_Write4PassMAI
1527 {38, 0}, // #32 WriteDoubleAdd_WriteDoubleCvt_WriteTrans64
1528 {38, 0}, // #33 WriteDouble
1529 { 2, 0}, // #34 WriteSALUDummy
1530 {40, 0}, // #35 WriteTrans64
1531 {38, 0}, // #36 WriteDoubleAdd
1532 { 5, 0}, // #37 Write32Bit
1533 {37, 0}, // #38 WriteDoubleAdd_WriteDoubleCvt
1534 {37, 0}, // #39 WriteDouble
1535 { 2, 0}, // #40 WriteSALUDummy
1536 {37, 0}, // #41 WriteDoubleAdd
1537 { 5, 0}, // #42 Write32Bit
1538 { 9, 0}, // #43 WriteTrans32
1539 { 6, 0}, // #44 WriteDouble
1540 { 2, 0}, // #45 WriteSALUDummy
1541 { 7, 0}, // #46 WriteTrans64
1542 { 1, 0}, // #47 WriteSALU_Write32Bit_WriteFloatFMA_WriteDoubleAdd_Write64Bit_WriteDoubleCvt_WriteIntMul
1543 { 1, 0}, // #48 Write32Bit_WriteSALU_WriteSALUDummy_WriteVALUDummy_Write64Bit
1544 { 1, 0}, // #49 Write32Bit
1545 {80, 0}, // #50 WriteVMEM
1546 {80, 0}, // #51 WriteVMEM
1547 { 5, 0}, // #52 WriteLDS
1548 {500, 0}, // #53 WriteBarrier
1549 { 1, 0}, // #54 WriteSALU
1550 { 2, 0}, // #55 Write64Bit
1551 { 4, 0}, // #56 WriteDouble_WriteIntMul
1552 { 1, 0}, // #57 WriteSALUDummy
1553 { 2, 0}, // #58 Write64Bit
1554 { 2, 0}, // #59 Write64Bit
1555 {80, 0}, // #60 WriteVMEM
1556 {80, 0}, // #61 WriteVMEM
1557 {80, 0}, // #62 WriteVMEM
1558 { 2, 0}, // #63 WriteDoubleAdd
1559 { 1, 0}, // #64 Write32Bit
1560 {16, 0}, // #65 WriteFloatFMA_WriteDouble
1561 { 1, 0}, // #66 WriteSALUDummy
1562 { 8, 0}, // #67 WriteDoubleAdd
1563 { 1, 0} // #68 Write32Bit
1564}; // AMDGPUWriteLatencyTable
1565
1566// {UseIdx, WriteResourceID, Cycles}
1567extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[] = {
1568 {0, 0, 0}, // Invalid
1569 {0, 0, -4}, // #1
1570 {0, 0, -2} // #2
1571}; // AMDGPUReadAdvanceTable
1572
1573// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
1574static const llvm::MCSchedClassDesc GFX10SpeedModelSchedClasses[] = {
1575 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1576 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 0, 1, 1, 0, 2, 1}, // #1
1577 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #2
1578 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 0, 5, 3, 0, 2, 2}, // #3
1579 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 0, 7, 5, 0, 2, 1}, // #4
1580 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 0, 9, 6, 0, 3, 2}, // #5
1581 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 0, 12, 7, 0, 2, 1}, // #6
1582 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 0, 14, 8, 0, 2, 2}, // #7
1583 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 0, 16, 10, 0, 2, 1}, // #8
1584 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 0, 18, 11, 0, 1, 1}, // #9
1585 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1586 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 0, 18, 11, 0, 1, 1}, // #11
1587 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1588 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 0, 12, 7, 0, 2, 1}, // #13
1589 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 0, 18, 12, 0, 1, 1}, // #14
1590 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 0, 19, 13, 0, 3, 2}, // #15
1591 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 0, 19, 15, 0, 3, 2}, // #16
1592 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 0, 3, 17, 0, 2, 1}, // #17
1593 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 0, 3, 14, 0, 2, 1}, // #18
1594 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 0, 22, 18, 0, 2, 1}, // #19
1595 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #20
1596 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 0, 3, 17, 0, 2, 1}, // #21
1597 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #22
1598 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 0, 3, 17, 0, 2, 1}, // #23
1599 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, true, 0, 24, 15, 0, 3, 2}, // #24
1600 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, true, 0, 24, 19, 0, 3, 2}, // #25
1601 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, true, 0, 24, 21, 0, 3, 2}, // #26
1602 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, true, 0, 3, 21, 0, 2, 1}, // #27
1603 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, true, 0, 3, 21, 0, 2, 1}, // #28
1604 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, true, 0, 27, 2, 0, 2, 2}, // #29
1605 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, true, 0, 29, 23, 0, 3, 1}, // #30
1606 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, true, 0, 5, 24, 0, 2, 2}, // #31
1607 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #32
1608 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, true, 0, 32, 26, 0, 2, 3}, // #33
1609 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, true, 0, 5, 29, 0, 2, 2}, // #34
1610 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
1611 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #36
1612 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #37
1613 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #38
1614 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #39
1615 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #40
1616 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #41
1617 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #42
1618 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #43
1619 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #44
1620 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #45
1621 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #46
1622 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #47
1623 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #48
1624 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #49
1625 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #50
1626 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #51
1627 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #52
1628 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #53
1629 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #54
1630 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #55
1631 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #56
1632 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #57
1633 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #58
1634 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #59
1635 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #60
1636 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #61
1637 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #62
1638 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #63
1639 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #64
1640 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #65
1641 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #66
1642 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #67
1643 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #68
1644 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #69
1645 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #70
1646 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #71
1647 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #72
1648 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #73
1649 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #74
1650 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #75
1651 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #76
1652 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #77
1653 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #78
1654 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #79
1655 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, true, 0, 3, 14, 0, 2, 1}, // #80
1656 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, true, 0, 1, 1, 0, 2, 1}, // #81
1657 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
1658 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
1659 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
1660 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
1661 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
1662 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
1663 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
1664 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #89
1665 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #90
1666}; // GFX10SpeedModelSchedClasses
1667
1668// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
1669static const llvm::MCSchedClassDesc GFX11SpeedModelSchedClasses[] = {
1670 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1671 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 0, 1, 1, 0, 2, 1}, // #1
1672 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #2
1673 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #3
1674 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 0, 7, 5, 0, 2, 1}, // #4
1675 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 0, 9, 6, 0, 3, 2}, // #5
1676 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 0, 12, 7, 0, 2, 1}, // #6
1677 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 0, 14, 7, 0, 2, 2}, // #7
1678 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 0, 16, 10, 0, 2, 1}, // #8
1679 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 0, 18, 11, 0, 1, 1}, // #9
1680 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1681 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 0, 18, 11, 0, 1, 1}, // #11
1682 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, true, 0, 1, 31, 0, 2, 1}, // #12
1683 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 0, 12, 7, 0, 2, 1}, // #13
1684 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 0, 18, 12, 0, 1, 1}, // #14
1685 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 0, 19, 13, 0, 3, 2}, // #15
1686 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 0, 19, 15, 0, 3, 2}, // #16
1687 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 0, 3, 32, 0, 2, 1}, // #17
1688 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 0, 3, 14, 0, 2, 1}, // #18
1689 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 0, 22, 18, 0, 2, 1}, // #19
1690 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #20
1691 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 0, 3, 32, 0, 2, 1}, // #21
1692 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #22
1693 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 0, 3, 32, 0, 2, 1}, // #23
1694 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, true, 0, 24, 15, 0, 3, 2}, // #24
1695 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, true, 0, 24, 33, 0, 3, 2}, // #25
1696 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, true, 0, 24, 21, 0, 3, 2}, // #26
1697 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, true, 0, 3, 21, 0, 2, 1}, // #27
1698 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, true, 0, 3, 21, 0, 2, 1}, // #28
1699 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, true, 0, 27, 2, 0, 2, 2}, // #29
1700 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, true, 0, 29, 35, 0, 3, 1}, // #30
1701 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, true, 0, 5, 24, 0, 2, 2}, // #31
1702 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #32
1703 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, true, 0, 32, 26, 0, 2, 3}, // #33
1704 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, true, 0, 5, 36, 0, 2, 2}, // #34
1705 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
1706 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #36
1707 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #37
1708 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #38
1709 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #39
1710 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #40
1711 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #41
1712 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #42
1713 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #43
1714 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #44
1715 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #45
1716 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #46
1717 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #47
1718 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #48
1719 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #49
1720 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #50
1721 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #51
1722 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #52
1723 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #53
1724 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #54
1725 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #55
1726 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #56
1727 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #57
1728 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #58
1729 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #59
1730 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #60
1731 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #61
1732 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #62
1733 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #63
1734 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #64
1735 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #65
1736 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #66
1737 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #67
1738 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #68
1739 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #69
1740 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #70
1741 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #71
1742 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #72
1743 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #73
1744 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #74
1745 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #75
1746 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #76
1747 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, true, 0, 5, 2, 0, 2, 2}, // #77
1748 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #78
1749 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, true, 0, 3, 2, 0, 2, 1}, // #79
1750 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, true, 0, 3, 14, 0, 2, 1}, // #80
1751 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, true, 0, 1, 1, 0, 2, 1}, // #81
1752 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
1753 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
1754 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
1755 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
1756 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
1757 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
1758 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
1759 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #89
1760 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #90
1761}; // GFX11SpeedModelSchedClasses
1762
1763// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
1764static const llvm::MCSchedClassDesc GFX125xGenericSpeedModelSchedClasses[] = {
1765 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1766 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 0, 1, 1, 0, 2, 1}, // #1
1767 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #2
1768 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #3
1769 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 0, 7, 5, 0, 2, 1}, // #4
1770 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 0, 9, 6, 0, 3, 2}, // #5
1771 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 0, 12, 7, 0, 2, 1}, // #6
1772 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 0, 14, 7, 0, 2, 2}, // #7
1773 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 0, 16, 10, 0, 2, 1}, // #8
1774 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 0, 18, 11, 0, 1, 1}, // #9
1775 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1776 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 0, 18, 11, 0, 1, 1}, // #11
1777 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 0, 1, 31, 0, 2, 1}, // #12
1778 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 0, 12, 7, 0, 2, 1}, // #13
1779 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 0, 18, 12, 0, 1, 1}, // #14
1780 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 0, 19, 13, 0, 3, 2}, // #15
1781 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 0, 19, 15, 0, 3, 2}, // #16
1782 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 0, 3, 38, 0, 2, 1}, // #17
1783 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 0, 3, 14, 0, 2, 1}, // #18
1784 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 0, 22, 21, 0, 2, 1}, // #19
1785 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #20
1786 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 0, 3, 38, 0, 2, 1}, // #21
1787 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #22
1788 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 0, 3, 38, 0, 2, 1}, // #23
1789 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, false, 0, 24, 15, 0, 3, 2}, // #24
1790 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, false, 0, 24, 39, 0, 3, 2}, // #25
1791 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, false, 0, 24, 21, 0, 3, 2}, // #26
1792 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, false, 0, 3, 21, 0, 2, 1}, // #27
1793 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, false, 0, 3, 14, 0, 2, 1}, // #28
1794 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, false, 0, 27, 2, 0, 2, 2}, // #29
1795 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, false, 0, 29, 32, 0, 3, 1}, // #30
1796 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, false, 0, 5, 24, 0, 2, 2}, // #31
1797 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 1, false, false, false, 0, 3, 21, 0, 2, 1}, // #32
1798 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, false, 0, 32, 26, 0, 2, 3}, // #33
1799 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, false, 0, 5, 41, 0, 2, 2}, // #34
1800 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
1801 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #36
1802 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #37
1803 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #38
1804 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #39
1805 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #40
1806 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #41
1807 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #42
1808 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #43
1809 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #44
1810 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #45
1811 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #46
1812 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #47
1813 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #48
1814 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #49
1815 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #50
1816 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #51
1817 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #52
1818 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #53
1819 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #54
1820 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #55
1821 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #56
1822 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 1, false, false, false, 0, 4, 10, 0, 1, 1}, // #57
1823 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, false, 0, 4, 10, 0, 1, 1}, // #58
1824 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #59
1825 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #60
1826 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #61
1827 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #62
1828 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #63
1829 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #64
1830 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #65
1831 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #66
1832 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #67
1833 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #68
1834 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #69
1835 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #70
1836 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #71
1837 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #72
1838 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #73
1839 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #74
1840 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #75
1841 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #76
1842 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #77
1843 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #78
1844 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #79
1845 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, false, 0, 3, 14, 0, 2, 1}, // #80
1846 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, false, 0, 1, 1, 0, 2, 1}, // #81
1847 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
1848 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
1849 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
1850 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
1851 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
1852 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
1853 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
1854 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #89
1855 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #90
1856}; // GFX125xGenericSpeedModelSchedClasses
1857
1858// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
1859static const llvm::MCSchedClassDesc GFX12SpeedModelSchedClasses[] = {
1860 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1861 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 0, 1, 1, 0, 2, 1}, // #1
1862 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #2
1863 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #3
1864 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 0, 3, 5, 0, 2, 1}, // #4
1865 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 0, 38, 6, 0, 3, 2}, // #5
1866 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 0, 12, 7, 0, 2, 1}, // #6
1867 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 0, 14, 7, 0, 2, 2}, // #7
1868 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 0, 16, 10, 0, 2, 1}, // #8
1869 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 0, 18, 11, 0, 1, 1}, // #9
1870 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1871 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 0, 18, 11, 0, 1, 1}, // #11
1872 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 0, 1, 31, 0, 2, 1}, // #12
1873 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 0, 12, 7, 0, 2, 1}, // #13
1874 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 0, 18, 12, 0, 1, 1}, // #14
1875 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 0, 41, 13, 0, 3, 2}, // #15
1876 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 0, 41, 15, 0, 3, 2}, // #16
1877 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 0, 22, 32, 0, 2, 1}, // #17
1878 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 0, 22, 14, 0, 2, 1}, // #18
1879 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 0, 22, 43, 0, 2, 1}, // #19
1880 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #20
1881 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 0, 22, 32, 0, 2, 1}, // #21
1882 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #22
1883 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 0, 22, 32, 0, 2, 1}, // #23
1884 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, false, 0, 44, 15, 0, 3, 2}, // #24
1885 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, false, 0, 44, 33, 0, 3, 2}, // #25
1886 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, false, 0, 44, 21, 0, 3, 2}, // #26
1887 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, false, 0, 22, 21, 0, 2, 1}, // #27
1888 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, false, 0, 22, 14, 0, 2, 1}, // #28
1889 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, false, 0, 47, 2, 0, 2, 2}, // #29
1890 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, false, 0, 22, 35, 0, 2, 1}, // #30
1891 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, false, 0, 36, 24, 0, 2, 2}, // #31
1892 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 1, false, false, false, 0, 22, 21, 0, 2, 1}, // #32
1893 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, false, 0, 49, 26, 0, 2, 3}, // #33
1894 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, false, 0, 36, 36, 0, 2, 2}, // #34
1895 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
1896 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #36
1897 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #37
1898 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #38
1899 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #39
1900 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #40
1901 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #41
1902 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #42
1903 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #43
1904 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #44
1905 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #45
1906 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #46
1907 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #47
1908 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #48
1909 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #49
1910 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #50
1911 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #51
1912 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #52
1913 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #53
1914 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #54
1915 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #55
1916 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #56
1917 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #57
1918 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #58
1919 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #59
1920 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #60
1921 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #61
1922 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #62
1923 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #63
1924 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #64
1925 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #65
1926 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #66
1927 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #67
1928 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #68
1929 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #69
1930 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #70
1931 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #71
1932 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #72
1933 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #73
1934 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #74
1935 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #75
1936 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #76
1937 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, false, 0, 36, 2, 0, 2, 2}, // #77
1938 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #78
1939 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, false, 0, 22, 2, 0, 2, 1}, // #79
1940 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, false, 0, 22, 14, 0, 2, 1}, // #80
1941 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, false, 0, 1, 1, 0, 2, 1}, // #81
1942 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
1943 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
1944 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
1945 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
1946 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
1947 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
1948 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
1949 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #89
1950 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #90
1951}; // GFX12SpeedModelSchedClasses
1952
1953// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
1954static const llvm::MCSchedClassDesc GFX1250SpeedModelSchedClasses[] = {
1955 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1956 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 0, 1, 1, 0, 2, 1}, // #1
1957 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #2
1958 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #3
1959 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 0, 7, 5, 0, 2, 1}, // #4
1960 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 0, 9, 6, 0, 3, 2}, // #5
1961 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 0, 12, 7, 0, 2, 1}, // #6
1962 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 0, 14, 7, 0, 2, 2}, // #7
1963 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 0, 16, 10, 0, 2, 1}, // #8
1964 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 0, 18, 11, 0, 1, 1}, // #9
1965 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1966 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 0, 18, 11, 0, 1, 1}, // #11
1967 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 0, 1, 31, 0, 2, 1}, // #12
1968 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 0, 12, 7, 0, 2, 1}, // #13
1969 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 0, 18, 12, 0, 1, 1}, // #14
1970 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 0, 19, 13, 0, 3, 2}, // #15
1971 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 0, 19, 15, 0, 3, 2}, // #16
1972 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 0, 3, 38, 0, 2, 1}, // #17
1973 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 0, 3, 14, 0, 2, 1}, // #18
1974 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 0, 22, 21, 0, 2, 1}, // #19
1975 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #20
1976 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 0, 3, 38, 0, 2, 1}, // #21
1977 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #22
1978 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 0, 3, 38, 0, 2, 1}, // #23
1979 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, false, 0, 24, 15, 0, 3, 2}, // #24
1980 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, false, 0, 24, 39, 0, 3, 2}, // #25
1981 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, false, 0, 24, 21, 0, 3, 2}, // #26
1982 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, false, 0, 3, 21, 0, 2, 1}, // #27
1983 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, false, 0, 3, 14, 0, 2, 1}, // #28
1984 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, false, 0, 27, 2, 0, 2, 2}, // #29
1985 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, false, 0, 29, 32, 0, 3, 1}, // #30
1986 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, false, 0, 5, 24, 0, 2, 2}, // #31
1987 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 1, false, false, false, 0, 3, 21, 0, 2, 1}, // #32
1988 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, false, 0, 32, 26, 0, 2, 3}, // #33
1989 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, false, 0, 5, 41, 0, 2, 2}, // #34
1990 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
1991 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #36
1992 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #37
1993 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #38
1994 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #39
1995 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #40
1996 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #41
1997 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #42
1998 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #43
1999 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #44
2000 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #45
2001 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #46
2002 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #47
2003 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #48
2004 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #49
2005 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #50
2006 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #51
2007 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #52
2008 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #53
2009 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #54
2010 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #55
2011 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #56
2012 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 1, false, false, false, 0, 4, 10, 0, 1, 1}, // #57
2013 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, false, 0, 4, 10, 0, 1, 1}, // #58
2014 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #59
2015 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #60
2016 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #61
2017 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #62
2018 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #63
2019 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #64
2020 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #65
2021 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #66
2022 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #67
2023 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #68
2024 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #69
2025 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #70
2026 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #71
2027 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #72
2028 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #73
2029 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #74
2030 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #75
2031 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #76
2032 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #77
2033 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #78
2034 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #79
2035 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, false, 0, 3, 14, 0, 2, 1}, // #80
2036 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, false, 0, 1, 1, 0, 2, 1}, // #81
2037 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
2038 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
2039 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
2040 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
2041 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
2042 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 1, false, false, false, 0, 51, 21, 0, 1, 1}, // #87
2043 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 1, false, false, false, 0, 52, 31, 0, 1, 1}, // #88
2044 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #89
2045 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #90
2046}; // GFX1250SpeedModelSchedClasses
2047
2048// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
2049static const llvm::MCSchedClassDesc GFX1251SpeedModelSchedClasses[] = {
2050 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
2051 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 0, 1, 1, 0, 2, 1}, // #1
2052 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #2
2053 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #3
2054 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 0, 7, 5, 0, 2, 1}, // #4
2055 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 0, 9, 6, 0, 3, 2}, // #5
2056 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 0, 12, 7, 0, 2, 1}, // #6
2057 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 0, 14, 7, 0, 2, 2}, // #7
2058 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 0, 16, 10, 0, 2, 1}, // #8
2059 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 0, 18, 11, 0, 1, 1}, // #9
2060 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
2061 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 0, 18, 11, 0, 1, 1}, // #11
2062 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 0, 1, 31, 0, 2, 1}, // #12
2063 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 0, 12, 7, 0, 2, 1}, // #13
2064 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 0, 18, 12, 0, 1, 1}, // #14
2065 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 0, 19, 1, 0, 3, 2}, // #15
2066 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 0, 19, 15, 0, 3, 2}, // #16
2067 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #17
2068 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #18
2069 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 0, 22, 21, 0, 2, 1}, // #19
2070 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #20
2071 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 0, 3, 14, 0, 2, 1}, // #21
2072 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #22
2073 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 0, 3, 14, 0, 2, 1}, // #23
2074 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, false, 0, 24, 15, 0, 3, 2}, // #24
2075 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, false, 0, 24, 44, 0, 3, 2}, // #25
2076 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, false, 0, 24, 21, 0, 3, 2}, // #26
2077 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, false, 0, 3, 21, 0, 2, 1}, // #27
2078 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, false, 0, 3, 14, 0, 2, 1}, // #28
2079 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, false, 0, 27, 2, 0, 2, 2}, // #29
2080 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, false, 0, 29, 46, 0, 3, 1}, // #30
2081 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #31
2082 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 1, false, false, false, 0, 3, 21, 0, 2, 1}, // #32
2083 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, false, 0, 32, 26, 0, 2, 3}, // #33
2084 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #34
2085 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
2086 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #36
2087 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #37
2088 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #38
2089 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #39
2090 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #40
2091 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #41
2092 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #42
2093 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #43
2094 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #44
2095 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #45
2096 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #46
2097 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #47
2098 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #48
2099 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #49
2100 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #50
2101 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #51
2102 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #52
2103 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #53
2104 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #54
2105 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #55
2106 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #56
2107 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 1, false, false, false, 0, 4, 10, 0, 1, 1}, // #57
2108 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, false, 0, 4, 10, 0, 1, 1}, // #58
2109 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #59
2110 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #60
2111 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #61
2112 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, false, 0, 5, 2, 0, 2, 2}, // #62
2113 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #63
2114 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #64
2115 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #65
2116 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #66
2117 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #67
2118 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #68
2119 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #69
2120 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #70
2121 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #71
2122 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #72
2123 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #73
2124 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #74
2125 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #75
2126 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #76
2127 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 1, false, false, false, 0, 4, 10, 0, 1, 1}, // #77
2128 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, false, 0, 4, 10, 0, 1, 1}, // #78
2129 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #79
2130 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, false, 0, 3, 2, 0, 2, 1}, // #80
2131 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, false, 0, 1, 1, 0, 2, 1}, // #81
2132 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
2133 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
2134 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
2135 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
2136 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
2137 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
2138 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
2139 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 1, false, false, false, 0, 34, 10, 0, 1, 1}, // #89
2140 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 1, false, false, false, 0, 35, 11, 0, 1, 1}, // #90
2141}; // GFX1251SpeedModelSchedClasses
2142
2143// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
2144static const llvm::MCSchedClassDesc SIFullSpeedModelSchedClasses[] = {
2145 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
2146 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #1
2147 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #2
2148 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 0, 53, 48, 0, 1, 2}, // #3
2149 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 0, 23, 50, 0, 1, 1}, // #4
2150 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 0, 54, 51, 0, 2, 2}, // #5
2151 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #6
2152 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 0, 14, 2, 0, 1, 2}, // #7
2153 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 0, 16, 31, 0, 1, 1}, // #8
2154 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #9
2155 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
2156 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #11
2157 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
2158 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #13
2159 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 0, 18, 53, 0, 1, 1}, // #14
2160 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 0, 1, 54, 0, 2, 2}, // #15
2161 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 0, 1, 47, 0, 2, 2}, // #16
2162 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 0, 2, 1, 0, 1, 1}, // #17
2163 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 0, 2, 1, 0, 1, 1}, // #18
2164 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #19
2165 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #20
2166 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #21
2167 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #22
2168 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #23
2169 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #24
2170 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, true, 0, 1, 56, 0, 2, 2}, // #25
2171 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, true, 0, 1, 56, 0, 2, 2}, // #26
2172 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #27
2173 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #28
2174 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, true, 0, 53, 47, 0, 1, 2}, // #29
2175 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #30
2176 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, true, 0, 53, 58, 0, 1, 2}, // #31
2177 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #32
2178 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, true, 0, 56, 60, 0, 1, 3}, // #33
2179 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, true, 0, 53, 63, 0, 1, 2}, // #34
2180 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
2181 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #36
2182 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #37
2183 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #38
2184 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #39
2185 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #40
2186 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #41
2187 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #42
2188 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #43
2189 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #44
2190 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #45
2191 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #46
2192 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #47
2193 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #48
2194 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #49
2195 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #50
2196 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #51
2197 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #52
2198 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #53
2199 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #54
2200 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #55
2201 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #56
2202 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #57
2203 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #58
2204 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #59
2205 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #60
2206 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #61
2207 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #62
2208 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #63
2209 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #64
2210 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #65
2211 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #66
2212 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #67
2213 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #68
2214 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #69
2215 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #70
2216 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #71
2217 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #72
2218 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #73
2219 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #74
2220 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #75
2221 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #76
2222 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #77
2223 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #78
2224 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #79
2225 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, true, 0, 2, 1, 0, 1, 1}, // #80
2226 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #81
2227 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
2228 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
2229 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
2230 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
2231 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
2232 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
2233 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
2234 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #89
2235 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #90
2236}; // SIFullSpeedModelSchedClasses
2237
2238// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
2239static const llvm::MCSchedClassDesc SIQuarterSpeedModelSchedClasses[] = {
2240 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
2241 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #1
2242 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #2
2243 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #3
2244 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 0, 23, 50, 0, 1, 1}, // #4
2245 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 0, 54, 51, 0, 2, 2}, // #5
2246 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #6
2247 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 0, 14, 2, 0, 1, 2}, // #7
2248 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 0, 16, 31, 0, 1, 1}, // #8
2249 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #9
2250 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
2251 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #11
2252 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
2253 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #13
2254 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 0, 18, 53, 0, 1, 1}, // #14
2255 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 0, 1, 54, 0, 2, 2}, // #15
2256 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 0, 1, 47, 0, 2, 2}, // #16
2257 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 0, 2, 21, 0, 1, 1}, // #17
2258 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 0, 2, 1, 0, 1, 1}, // #18
2259 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #19
2260 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #20
2261 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #21
2262 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 0, 2, 10, 0, 1, 1}, // #22
2263 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 0, 2, 10, 0, 1, 1}, // #23
2264 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, true, 0, 1, 65, 0, 2, 2}, // #24
2265 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, true, 0, 1, 65, 0, 2, 2}, // #25
2266 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, true, 0, 1, 56, 0, 2, 2}, // #26
2267 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #27
2268 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #28
2269 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, true, 0, 53, 47, 0, 1, 2}, // #29
2270 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, true, 0, 2, 10, 0, 1, 1}, // #30
2271 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, true, 0, 53, 58, 0, 1, 2}, // #31
2272 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #32
2273 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, true, 0, 56, 60, 0, 1, 3}, // #33
2274 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, true, 0, 53, 67, 0, 1, 2}, // #34
2275 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
2276 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #36
2277 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, true, 1, 6, 1, 1, 1, 1}, // #37
2278 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #38
2279 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #39
2280 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, true, 1, 6, 1, 1, 1, 1}, // #40
2281 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #41
2282 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #42
2283 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #43
2284 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #44
2285 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #45
2286 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #46
2287 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #47
2288 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #48
2289 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #49
2290 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #50
2291 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #51
2292 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #52
2293 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #53
2294 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #54
2295 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #55
2296 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #56
2297 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #57
2298 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #58
2299 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #59
2300 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #60
2301 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #61
2302 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #62
2303 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #63
2304 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #64
2305 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #65
2306 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #66
2307 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #67
2308 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #68
2309 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #69
2310 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #70
2311 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #71
2312 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #72
2313 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #73
2314 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #74
2315 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #75
2316 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #76
2317 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #77
2318 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #78
2319 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #79
2320 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, true, 0, 2, 1, 0, 1, 1}, // #80
2321 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #81
2322 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 1, false, false, true, 2, 2, 1, 1, 1, 1}, // #82
2323 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 1, false, false, true, 0, 2, 1, 0, 1, 1}, // #83
2324 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
2325 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
2326 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
2327 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
2328 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
2329 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #89
2330 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #90
2331}; // SIQuarterSpeedModelSchedClasses
2332
2333// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
2334static const llvm::MCSchedClassDesc SIDPGFX942FullSpeedModelSchedClasses[] = {
2335 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
2336 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #1
2337 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #2
2338 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #3
2339 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 0, 23, 50, 0, 1, 1}, // #4
2340 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 0, 54, 51, 0, 2, 2}, // #5
2341 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #6
2342 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 0, 14, 2, 0, 1, 2}, // #7
2343 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 0, 16, 31, 0, 1, 1}, // #8
2344 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #9
2345 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
2346 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #11
2347 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
2348 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #13
2349 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 0, 18, 53, 0, 1, 1}, // #14
2350 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 0, 1, 47, 0, 2, 2}, // #15
2351 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 0, 1, 47, 0, 2, 2}, // #16
2352 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #17
2353 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #18
2354 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #19
2355 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #20
2356 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #21
2357 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #22
2358 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #23
2359 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #24
2360 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #25
2361 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #26
2362 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #27
2363 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #28
2364 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, true, 0, 53, 47, 0, 1, 2}, // #29
2365 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, false, 0, 2, 31, 0, 1, 1}, // #30
2366 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, false, 0, 53, 47, 0, 1, 2}, // #31
2367 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #32
2368 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, true, 0, 56, 60, 0, 1, 3}, // #33
2369 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #34
2370 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
2371 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #36
2372 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, true, 1, 59, 31, 1, 1, 1}, // #37
2373 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, true, 1, 60, 21, 1, 1, 1}, // #38
2374 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #39
2375 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, true, 1, 6, 1, 1, 1, 1}, // #40
2376 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #41
2377 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #42
2378 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #43
2379 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #44
2380 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #45
2381 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #46
2382 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #47
2383 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #48
2384 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #49
2385 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #50
2386 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #51
2387 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #52
2388 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #53
2389 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #54
2390 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #55
2391 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #56
2392 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #57
2393 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #58
2394 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #59
2395 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #60
2396 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #61
2397 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #62
2398 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #63
2399 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #64
2400 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #65
2401 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #66
2402 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #67
2403 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #68
2404 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #69
2405 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #70
2406 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #71
2407 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #72
2408 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #73
2409 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #74
2410 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #75
2411 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #76
2412 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #77
2413 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #78
2414 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #79
2415 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #80
2416 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #81
2417 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
2418 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
2419 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
2420 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
2421 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
2422 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
2423 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
2424 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #89
2425 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #90
2426}; // SIDPGFX942FullSpeedModelSchedClasses
2427
2428// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
2429static const llvm::MCSchedClassDesc SIDPFullSpeedModelSchedClasses[] = {
2430 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
2431 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #1
2432 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #2
2433 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #3
2434 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 0, 23, 50, 0, 1, 1}, // #4
2435 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 0, 54, 51, 0, 2, 2}, // #5
2436 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #6
2437 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 0, 14, 2, 0, 1, 2}, // #7
2438 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 0, 16, 31, 0, 1, 1}, // #8
2439 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #9
2440 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
2441 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #11
2442 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
2443 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #13
2444 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 0, 18, 53, 0, 1, 1}, // #14
2445 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 0, 1, 47, 0, 2, 2}, // #15
2446 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 0, 1, 47, 0, 2, 2}, // #16
2447 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #17
2448 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #18
2449 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #19
2450 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #20
2451 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #21
2452 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #22
2453 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #23
2454 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #24
2455 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #25
2456 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #26
2457 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #27
2458 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #28
2459 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, true, 0, 53, 47, 0, 1, 2}, // #29
2460 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #30
2461 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #31
2462 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #32
2463 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, true, 0, 56, 60, 0, 1, 3}, // #33
2464 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #34
2465 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
2466 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #36
2467 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, true, 1, 59, 31, 1, 1, 1}, // #37
2468 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, true, 1, 60, 21, 1, 1, 1}, // #38
2469 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #39
2470 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, true, 1, 6, 1, 1, 1, 1}, // #40
2471 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #41
2472 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #42
2473 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #43
2474 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #44
2475 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #45
2476 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #46
2477 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #47
2478 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #48
2479 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #49
2480 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #50
2481 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #51
2482 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #52
2483 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #53
2484 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #54
2485 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #55
2486 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #56
2487 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #57
2488 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #58
2489 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #59
2490 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #60
2491 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #61
2492 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #62
2493 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #63
2494 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #64
2495 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #65
2496 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #66
2497 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #67
2498 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #68
2499 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #69
2500 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #70
2501 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #71
2502 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #72
2503 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #73
2504 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #74
2505 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #75
2506 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #76
2507 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #77
2508 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #78
2509 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #79
2510 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #80
2511 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #81
2512 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
2513 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
2514 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #84
2515 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #85
2516 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #86
2517 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
2518 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
2519 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #89
2520 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #90
2521}; // SIDPFullSpeedModelSchedClasses
2522
2523// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, ReadAdvanceIdx, WriteProcResIdx, WriteLatencyIdx, NumReadAdvanceEntries, NumWriteProcResEntries, NumWriteLatencyEntries}
2524static const llvm::MCSchedClassDesc SIDPGFX950FullSpeedModelSchedClasses[] = {
2525 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
2526 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #1
2527 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #2
2528 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #3
2529 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 0, 23, 50, 0, 1, 1}, // #4
2530 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 0, 54, 51, 0, 2, 2}, // #5
2531 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #6
2532 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 0, 14, 2, 0, 1, 2}, // #7
2533 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 0, 16, 31, 0, 1, 1}, // #8
2534 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #9
2535 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
2536 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 0, 18, 21, 0, 1, 1}, // #11
2537 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
2538 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 0, 9, 2, 0, 1, 1}, // #13
2539 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 0, 18, 53, 0, 1, 1}, // #14
2540 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 0, 1, 47, 0, 2, 2}, // #15
2541 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 0, 1, 47, 0, 2, 2}, // #16
2542 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #17
2543 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #18
2544 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #19
2545 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #20
2546 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #21
2547 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #22
2548 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #23
2549 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALUDummy*/ 499) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #24
2550 {DBGFIELD(/*NullALU_WriteDouble_WriteSALUDummy*/ 536) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #25
2551 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALUDummy*/ 571) 1, false, false, true, 0, 1, 47, 0, 2, 2}, // #26
2552 {DBGFIELD(/*NullALU_WriteIntMul*/ 606) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #27
2553 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 626) 1, false, false, true, 0, 2, 31, 0, 1, 1}, // #28
2554 {DBGFIELD(/*NullALU_Write32Bit_WriteVALUDummy*/ 653) 1, false, false, true, 0, 53, 47, 0, 1, 2}, // #29
2555 {DBGFIELD(/*NullALU_WriteTrans64*/ 687) 1, false, false, false, 0, 2, 31, 0, 1, 1}, // #30
2556 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 708) 2, false, false, false, 0, 53, 47, 0, 1, 2}, // #31
2557 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 738) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #32
2558 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 769) 3, false, false, true, 0, 56, 60, 0, 1, 3}, // #33
2559 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 807) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #34
2560 {DBGFIELD(/*COPY*/ 841) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
2561 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 846) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #36
2562 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 870) 1, false, false, true, 1, 59, 31, 1, 1, 1}, // #37
2563 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1996) 1, false, false, true, 1, 62, 10, 1, 1, 1}, // #38
2564 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7379) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #39
2565 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14259) 1, false, false, true, 1, 6, 1, 1, 1, 1}, // #40
2566 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15206) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #41
2567 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20331) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #42
2568 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20460) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #43
2569 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21054) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #44
2570 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 22045) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #45
2571 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23391) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #46
2572 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23589) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #47
2573 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24372) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #48
2574 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25890) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #49
2575 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27751) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #50
2576 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28707) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #51
2577 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29653) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #52
2578 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29782) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #53
2579 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29980) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #54
2580 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31537) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #55
2581 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33310) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #56
2582 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 35956) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #57
2583 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 35993) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #58
2584 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 36071) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #59
2585 {DBGFIELD(/*V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 36407) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #60
2586 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 37111) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #61
2587 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 38981) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #62
2588 {DBGFIELD(/*V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 39334) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #63
2589 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr*/ 40806) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #64
2590 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41150) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #65
2591 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42066) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #66
2592 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42218) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #67
2593 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43640) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #68
2594 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46448) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #69
2595 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46576) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #70
2596 {DBGFIELD(/*V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250*/ 46828) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #71
2597 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250*/ 47548) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #72
2598 {DBGFIELD(/*V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12*/ 48921) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #73
2599 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr*/ 49481) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #74
2600 {DBGFIELD(/*V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12*/ 49679) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #75
2601 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr*/ 50741) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #76
2602 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_threeaddr*/ 51007) 2, false, false, true, 0, 53, 47, 0, 1, 2}, // #77
2603 {DBGFIELD(/*V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250*/ 51044) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #78
2604 {DBGFIELD(/*Write32Bit*/ 51122) 1, false, false, true, 0, 2, 47, 0, 1, 1}, // #79
2605 {DBGFIELD(/*Write64Bit*/ 51133) 1, false, false, false, 0, 2, 47, 0, 1, 1}, // #80
2606 {DBGFIELD(/*WriteSALU*/ 51144) 1, false, false, true, 0, 1, 47, 0, 1, 1}, // #81
2607 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 51154) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #82
2608 {DBGFIELD(/*Write64Bit_ReadDefault*/ 51176) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #83
2609 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 51199) 1, false, false, true, 1, 58, 10, 1, 1, 1}, // #84
2610 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 51225) 1, false, false, true, 1, 57, 21, 1, 1, 1}, // #85
2611 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 51250) 1, false, false, true, 1, 61, 31, 1, 1, 1}, // #86
2612 {DBGFIELD(/*WriteXDL2PassWMMA*/ 51275) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #87
2613 {DBGFIELD(/*WriteXDL1PassWMMA*/ 51293) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #88
2614 {DBGFIELD(/*WriteXDL4PassWMMA*/ 51311) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #89
2615 {DBGFIELD(/*WriteXDL8PassWMMA*/ 51329) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #90
2616}; // SIDPGFX950FullSpeedModelSchedClasses
2617
2618#ifdef __GNUC__
2619#pragma GCC diagnostic push
2620#pragma GCC diagnostic ignored "-Woverlength-strings"
2621#endif
2622static constexpr char AMDGPUSchedClassNamesStorage[] =
2623 "\0"
2624 "InvalidSchedClass\0"
2625 "NullALU_WriteSALU\0"
2626 "NullALU_Write32Bit\0"
2627 "NullALU_Write32Bit_Write32Bit\0"
2628 "NullALU_WriteVMEM\0"
2629 "NullALU_WriteVMEM_WriteLDS\0"
2630 "NullALU_WriteLDS\0"
2631 "NullALU_WriteLDS_WriteLDS\0"
2632 "NullALU_WriteExport\0"
2633 "WriteBranch\0"
2634 "NullALU\0"
2635 "NullALU_WriteBranch\0"
2636 "NullALU_WriteSFPU\0"
2637 "NullALU_WriteSMEM\0"
2638 "NullALU_WriteBarrier\0"
2639 "NullALU_WriteSALU_Write64Bit\0"
2640 "NullALU_Write32Bit_WriteSALU\0"
2641 "NullALU_WriteDoubleAdd\0"
2642 "NullALU_Write64Bit\0"
2643 "NullALU_WriteTrans32\0"
2644 "NullALU_WriteFloatCvt\0"
2645 "NullALU_WriteDoubleCvt\0"
2646 "NullALU_WriteFloatFMA\0"
2647 "NullALU_WriteDouble\0"
2648 "NullALU_WriteFloatFMA_WriteSALUDummy\0"
2649 "NullALU_WriteDouble_WriteSALUDummy\0"
2650 "NullALU_WriteIntMul_WriteSALUDummy\0"
2651 "NullALU_WriteIntMul\0"
2652 "NullALU_WriteQuarterRate32\0"
2653 "NullALU_Write32Bit_WriteVALUDummy\0"
2654 "NullALU_WriteTrans64\0"
2655 "NullALU_Write64Bit_Write64Bit\0"
2656 "NullALU_WritePseudoScalarTrans\0"
2657 "NullALU_WriteVMEM_WriteVMEM_WriteVMEM\0"
2658 "NullALU_WriteDoubleAdd_Write32Bit\0"
2659 "COPY\0"
2660 "V_ACCVGPR_WRITE_B32_e64\0"
2661 "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0"
2662 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
2663 "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0"
2664 "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0"
2665 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
2666 "V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd\0"
2667 "V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi\0"
2668 "V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd\0"
2669 "V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi\0"
2670 "V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd\0"
2671 "V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0"
2672 "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd\0"
2673 "V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi\0"
2674 "V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940\0"
2675 "V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940\0"
2676 "V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
2677 "V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd\0"
2678 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0"
2679 "V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0"
2680 "V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd\0"
2681 "V_WMMA_F32_16X16X4_F32_w32_threeaddr\0"
2682 "V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250\0"
2683 "V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr\0"
2684 "V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250\0"
2685 "V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250\0"
2686 "V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr\0"
2687 "V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250\0"
2688 "V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr\0"
2689 "V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250\0"
2690 "V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr\0"
2691 "V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr\0"
2692 "V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250\0"
2693 "V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr\0"
2694 "V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250\0"
2695 "V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250\0"
2696 "V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250\0"
2697 "V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12\0"
2698 "V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr\0"
2699 "V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w64_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU4_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w64_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_twoaddr_w32_gfx11_V_WMMA_I32_16X16X16_IU8_twoaddr_w64_gfx11_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w64_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w64_twoaddr_gfx12\0"
2700 "V_WMMA_I32_16X16X16_IU4_threeaddr_w32_V_WMMA_I32_16X16X16_IU4_threeaddr_w64_V_WMMA_I32_16X16X16_IU4_w64_threeaddr_V_WMMA_I32_16X16X16_IU8_threeaddr_w32_V_WMMA_I32_16X16X16_IU8_threeaddr_w64_V_WMMA_I32_16X16X16_IU8_w64_threeaddr_V_WMMA_I32_16X16X32_IU4_w64_threeaddr\0"
2701 "V_WMMA_F64_16X16X4_F64_w32_threeaddr\0"
2702 "V_WMMA_F64_16X16X4_F64_w32_twoaddr_V_WMMA_F64_16X16X4_F64_w32_twoaddr_gfx1250\0"
2703 "Write32Bit\0"
2704 "Write64Bit\0"
2705 "WriteSALU\0"
2706 "Write64Bit_MIVGPRRead\0"
2707 "Write64Bit_ReadDefault\0"
2708 "Write16PassMAI_MIMFMARead\0"
2709 "Write8PassMAI_MIMFMARead\0"
2710 "Write4PassMAI_MIMFMARead\0"
2711 "WriteXDL2PassWMMA\0"
2712 "WriteXDL1PassWMMA\0"
2713 "WriteXDL4PassWMMA\0"
2714 "WriteXDL8PassWMMA\0"
2715 ;
2716#ifdef __GNUC__
2717#pragma GCC diagnostic pop
2718#endif
2719
2720static constexpr llvm::StringTable
2721AMDGPUSchedClassNames = AMDGPUSchedClassNamesStorage;
2722
2723static const unsigned GFX10SpeedModelProcResourceSubUnits[] = {
2724 0, // Invalid
2725};
2726
2727// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2728static const llvm::MCProcResourceDesc GFX10SpeedModelProcResources[] = {
2729 {"InvalidUnit", 0, 0, 0, 0},
2730 {"HWBranch", 1, 0, 1, nullptr}, // #1
2731 {"HWExport", 1, 0, 1, nullptr}, // #2
2732 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2733 {"HWRC", 1, 0, 1, nullptr}, // #4
2734 {"HWSALU", 1, 0, 1, nullptr}, // #5
2735 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
2736 {"HWVALU", 1, 0, 1, nullptr}, // #7
2737 {"HWVMEM", 1, 0, 1, nullptr}, // #8
2738};
2739
2740static const unsigned GFX11SpeedModelProcResourceSubUnits[] = {
2741 0, // Invalid
2742};
2743
2744// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2745static const llvm::MCProcResourceDesc GFX11SpeedModelProcResources[] = {
2746 {"InvalidUnit", 0, 0, 0, 0},
2747 {"HWBranch", 1, 0, 1, nullptr}, // #1
2748 {"HWExport", 1, 0, 1, nullptr}, // #2
2749 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2750 {"HWRC", 1, 0, 1, nullptr}, // #4
2751 {"HWSALU", 1, 0, 1, nullptr}, // #5
2752 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
2753 {"HWVALU", 1, 0, 1, nullptr}, // #7
2754 {"HWVMEM", 1, 0, 1, nullptr}, // #8
2755};
2756
2757static const unsigned GFX125xGenericSpeedModelProcResourceSubUnits[] = {
2758 0, // Invalid
2759};
2760
2761// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2762static const llvm::MCProcResourceDesc GFX125xGenericSpeedModelProcResources[] = {
2763 {"InvalidUnit", 0, 0, 0, 0},
2764 {"HWBranch", 1, 0, 1, nullptr}, // #1
2765 {"HWExport", 1, 0, 1, nullptr}, // #2
2766 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2767 {"HWRC", 1, 0, 1, nullptr}, // #4
2768 {"HWSALU", 1, 0, 1, nullptr}, // #5
2769 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
2770 {"HWVALU", 1, 0, 1, nullptr}, // #7
2771 {"HWVMEM", 1, 0, 1, nullptr}, // #8
2772 {"HWXDL", 1, 0, 0, nullptr}, // #9
2773};
2774
2775static const unsigned GFX12SpeedModelProcResourceSubUnits[] = {
2776 0, // Invalid
2777};
2778
2779// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2780static const llvm::MCProcResourceDesc GFX12SpeedModelProcResources[] = {
2781 {"InvalidUnit", 0, 0, 0, 0},
2782 {"HWBranch", 1, 0, 1, nullptr}, // #1
2783 {"HWExport", 1, 0, 1, nullptr}, // #2
2784 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2785 {"HWRC", 1, 0, 1, nullptr}, // #4
2786 {"HWSALU", 1, 0, 1, nullptr}, // #5
2787 {"HWVALU", 1, 0, 1, nullptr}, // #6
2788 {"HWVMEM", 1, 0, 1, nullptr}, // #7
2789};
2790
2791static const unsigned GFX1250SpeedModelProcResourceSubUnits[] = {
2792 0, // Invalid
2793};
2794
2795// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2796static const llvm::MCProcResourceDesc GFX1250SpeedModelProcResources[] = {
2797 {"InvalidUnit", 0, 0, 0, 0},
2798 {"HWBranch", 1, 0, 1, nullptr}, // #1
2799 {"HWExport", 1, 0, 1, nullptr}, // #2
2800 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2801 {"HWRC", 1, 0, 1, nullptr}, // #4
2802 {"HWSALU", 1, 0, 1, nullptr}, // #5
2803 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
2804 {"HWVALU", 1, 0, 1, nullptr}, // #7
2805 {"HWVMEM", 1, 0, 1, nullptr}, // #8
2806 {"HWXDL", 1, 0, 0, nullptr}, // #9
2807};
2808
2809static const unsigned GFX1251SpeedModelProcResourceSubUnits[] = {
2810 0, // Invalid
2811};
2812
2813// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2814static const llvm::MCProcResourceDesc GFX1251SpeedModelProcResources[] = {
2815 {"InvalidUnit", 0, 0, 0, 0},
2816 {"HWBranch", 1, 0, 1, nullptr}, // #1
2817 {"HWExport", 1, 0, 1, nullptr}, // #2
2818 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2819 {"HWRC", 1, 0, 1, nullptr}, // #4
2820 {"HWSALU", 1, 0, 1, nullptr}, // #5
2821 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
2822 {"HWVALU", 1, 0, 1, nullptr}, // #7
2823 {"HWVMEM", 1, 0, 1, nullptr}, // #8
2824 {"HWXDL", 1, 0, 0, nullptr}, // #9
2825};
2826
2827static const unsigned SIFullSpeedModelProcResourceSubUnits[] = {
2828 0, // Invalid
2829};
2830
2831// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2832static const llvm::MCProcResourceDesc SIFullSpeedModelProcResources[] = {
2833 {"InvalidUnit", 0, 0, 0, 0},
2834 {"HWBranch", 1, 0, 1, nullptr}, // #1
2835 {"HWExport", 1, 0, 1, nullptr}, // #2
2836 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2837 {"HWSALU", 1, 0, 1, nullptr}, // #4
2838 {"HWVALU", 1, 0, 1, nullptr}, // #5
2839 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2840 {"HWXDL", 1, 0, 0, nullptr}, // #7
2841};
2842
2843static const unsigned SIQuarterSpeedModelProcResourceSubUnits[] = {
2844 0, // Invalid
2845};
2846
2847// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2848static const llvm::MCProcResourceDesc SIQuarterSpeedModelProcResources[] = {
2849 {"InvalidUnit", 0, 0, 0, 0},
2850 {"HWBranch", 1, 0, 1, nullptr}, // #1
2851 {"HWExport", 1, 0, 1, nullptr}, // #2
2852 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2853 {"HWSALU", 1, 0, 1, nullptr}, // #4
2854 {"HWVALU", 1, 0, 1, nullptr}, // #5
2855 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2856 {"HWXDL", 1, 0, 0, nullptr}, // #7
2857};
2858
2859static const unsigned SIDPGFX942FullSpeedModelProcResourceSubUnits[] = {
2860 0, // Invalid
2861};
2862
2863// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2864static const llvm::MCProcResourceDesc SIDPGFX942FullSpeedModelProcResources[] = {
2865 {"InvalidUnit", 0, 0, 0, 0},
2866 {"HWBranch", 1, 0, 1, nullptr}, // #1
2867 {"HWExport", 1, 0, 1, nullptr}, // #2
2868 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2869 {"HWSALU", 1, 0, 1, nullptr}, // #4
2870 {"HWVALU", 1, 0, 1, nullptr}, // #5
2871 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2872 {"HWXDL", 1, 0, 0, nullptr}, // #7
2873};
2874
2875static const unsigned SIDPFullSpeedModelProcResourceSubUnits[] = {
2876 0, // Invalid
2877};
2878
2879// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2880static const llvm::MCProcResourceDesc SIDPFullSpeedModelProcResources[] = {
2881 {"InvalidUnit", 0, 0, 0, 0},
2882 {"HWBranch", 1, 0, 1, nullptr}, // #1
2883 {"HWExport", 1, 0, 1, nullptr}, // #2
2884 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2885 {"HWSALU", 1, 0, 1, nullptr}, // #4
2886 {"HWVALU", 1, 0, 1, nullptr}, // #5
2887 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2888 {"HWXDL", 1, 0, 0, nullptr}, // #7
2889};
2890
2891static const unsigned SIDPGFX950FullSpeedModelProcResourceSubUnits[] = {
2892 0, // Invalid
2893};
2894
2895// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2896static const llvm::MCProcResourceDesc SIDPGFX950FullSpeedModelProcResources[] = {
2897 {"InvalidUnit", 0, 0, 0, 0},
2898 {"HWBranch", 1, 0, 1, nullptr}, // #1
2899 {"HWExport", 1, 0, 1, nullptr}, // #2
2900 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2901 {"HWSALU", 1, 0, 1, nullptr}, // #4
2902 {"HWVALU", 1, 0, 1, nullptr}, // #5
2903 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2904 {"HWXDL", 1, 0, 0, nullptr}, // #7
2905};
2906
2907extern const llvm::MCSchedModel AMDGPUSchedModels[] = {
2908{ // NoSchedModel
2909 MCSchedModel::DefaultIssueWidth,
2910 MCSchedModel::DefaultMicroOpBufferSize,
2911 MCSchedModel::DefaultLoopMicroOpBufferSize,
2912 MCSchedModel::DefaultLoadLatency,
2913 MCSchedModel::DefaultHighLatency,
2914 MCSchedModel::DefaultMispredictPenalty,
2915 false, // PostRAScheduler
2916 false, // CompleteModel
2917 false, // EnableIntervals
2918 0, // Processor ID
2919 nullptr, nullptr, 0, 0, // No instruction-level machine model.
2920 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2921 nullptr, // No Itinerary
2922 nullptr // No extra processor descriptor
2923 },
2924{ // GFX10SpeedModel
2925 1, // IssueWidth
2926 1, // MicroOpBufferSize
2927 MCSchedModel::DefaultLoopMicroOpBufferSize,
2928 MCSchedModel::DefaultLoadLatency,
2929 MCSchedModel::DefaultHighLatency,
2930 20, // MispredictPenalty
2931 true, // PostRAScheduler
2932 true, // CompleteModel
2933 false, // EnableIntervals
2934 1, // Processor ID
2935 GFX10SpeedModelProcResources,
2936 GFX10SpeedModelSchedClasses,
2937 9,
2938 91,
2939 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2940 nullptr, // No Itinerary
2941 nullptr // No extra processor descriptor
2942 },
2943{ // GFX11SpeedModel
2944 1, // IssueWidth
2945 1, // MicroOpBufferSize
2946 MCSchedModel::DefaultLoopMicroOpBufferSize,
2947 MCSchedModel::DefaultLoadLatency,
2948 MCSchedModel::DefaultHighLatency,
2949 20, // MispredictPenalty
2950 true, // PostRAScheduler
2951 true, // CompleteModel
2952 false, // EnableIntervals
2953 2, // Processor ID
2954 GFX11SpeedModelProcResources,
2955 GFX11SpeedModelSchedClasses,
2956 9,
2957 91,
2958 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2959 nullptr, // No Itinerary
2960 nullptr // No extra processor descriptor
2961 },
2962{ // GFX125xGenericSpeedModel
2963 1, // IssueWidth
2964 1, // MicroOpBufferSize
2965 MCSchedModel::DefaultLoopMicroOpBufferSize,
2966 MCSchedModel::DefaultLoadLatency,
2967 MCSchedModel::DefaultHighLatency,
2968 20, // MispredictPenalty
2969 true, // PostRAScheduler
2970 true, // CompleteModel
2971 false, // EnableIntervals
2972 3, // Processor ID
2973 GFX125xGenericSpeedModelProcResources,
2974 GFX125xGenericSpeedModelSchedClasses,
2975 10,
2976 91,
2977 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2978 nullptr, // No Itinerary
2979 nullptr // No extra processor descriptor
2980 },
2981{ // GFX12SpeedModel
2982 1, // IssueWidth
2983 1, // MicroOpBufferSize
2984 MCSchedModel::DefaultLoopMicroOpBufferSize,
2985 MCSchedModel::DefaultLoadLatency,
2986 MCSchedModel::DefaultHighLatency,
2987 20, // MispredictPenalty
2988 true, // PostRAScheduler
2989 true, // CompleteModel
2990 false, // EnableIntervals
2991 4, // Processor ID
2992 GFX12SpeedModelProcResources,
2993 GFX12SpeedModelSchedClasses,
2994 8,
2995 91,
2996 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2997 nullptr, // No Itinerary
2998 nullptr // No extra processor descriptor
2999 },
3000{ // GFX1250SpeedModel
3001 1, // IssueWidth
3002 1, // MicroOpBufferSize
3003 MCSchedModel::DefaultLoopMicroOpBufferSize,
3004 MCSchedModel::DefaultLoadLatency,
3005 MCSchedModel::DefaultHighLatency,
3006 20, // MispredictPenalty
3007 true, // PostRAScheduler
3008 true, // CompleteModel
3009 false, // EnableIntervals
3010 5, // Processor ID
3011 GFX1250SpeedModelProcResources,
3012 GFX1250SpeedModelSchedClasses,
3013 10,
3014 91,
3015 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
3016 nullptr, // No Itinerary
3017 nullptr // No extra processor descriptor
3018 },
3019{ // GFX1251SpeedModel
3020 1, // IssueWidth
3021 1, // MicroOpBufferSize
3022 MCSchedModel::DefaultLoopMicroOpBufferSize,
3023 MCSchedModel::DefaultLoadLatency,
3024 MCSchedModel::DefaultHighLatency,
3025 20, // MispredictPenalty
3026 true, // PostRAScheduler
3027 true, // CompleteModel
3028 false, // EnableIntervals
3029 6, // Processor ID
3030 GFX1251SpeedModelProcResources,
3031 GFX1251SpeedModelSchedClasses,
3032 10,
3033 91,
3034 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
3035 nullptr, // No Itinerary
3036 nullptr // No extra processor descriptor
3037 },
3038{ // SIFullSpeedModel
3039 1, // IssueWidth
3040 1, // MicroOpBufferSize
3041 MCSchedModel::DefaultLoopMicroOpBufferSize,
3042 MCSchedModel::DefaultLoadLatency,
3043 MCSchedModel::DefaultHighLatency,
3044 20, // MispredictPenalty
3045 true, // PostRAScheduler
3046 true, // CompleteModel
3047 false, // EnableIntervals
3048 7, // Processor ID
3049 SIFullSpeedModelProcResources,
3050 SIFullSpeedModelSchedClasses,
3051 8,
3052 91,
3053 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
3054 nullptr, // No Itinerary
3055 nullptr // No extra processor descriptor
3056 },
3057{ // SIQuarterSpeedModel
3058 1, // IssueWidth
3059 1, // MicroOpBufferSize
3060 MCSchedModel::DefaultLoopMicroOpBufferSize,
3061 MCSchedModel::DefaultLoadLatency,
3062 MCSchedModel::DefaultHighLatency,
3063 20, // MispredictPenalty
3064 true, // PostRAScheduler
3065 true, // CompleteModel
3066 false, // EnableIntervals
3067 8, // Processor ID
3068 SIQuarterSpeedModelProcResources,
3069 SIQuarterSpeedModelSchedClasses,
3070 8,
3071 91,
3072 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
3073 nullptr, // No Itinerary
3074 nullptr // No extra processor descriptor
3075 },
3076{ // SIDPGFX942FullSpeedModel
3077 1, // IssueWidth
3078 1, // MicroOpBufferSize
3079 MCSchedModel::DefaultLoopMicroOpBufferSize,
3080 MCSchedModel::DefaultLoadLatency,
3081 MCSchedModel::DefaultHighLatency,
3082 20, // MispredictPenalty
3083 true, // PostRAScheduler
3084 true, // CompleteModel
3085 false, // EnableIntervals
3086 9, // Processor ID
3087 SIDPGFX942FullSpeedModelProcResources,
3088 SIDPGFX942FullSpeedModelSchedClasses,
3089 8,
3090 91,
3091 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
3092 nullptr, // No Itinerary
3093 nullptr // No extra processor descriptor
3094 },
3095{ // SIDPFullSpeedModel
3096 1, // IssueWidth
3097 1, // MicroOpBufferSize
3098 MCSchedModel::DefaultLoopMicroOpBufferSize,
3099 MCSchedModel::DefaultLoadLatency,
3100 MCSchedModel::DefaultHighLatency,
3101 20, // MispredictPenalty
3102 true, // PostRAScheduler
3103 true, // CompleteModel
3104 false, // EnableIntervals
3105 10, // Processor ID
3106 SIDPFullSpeedModelProcResources,
3107 SIDPFullSpeedModelSchedClasses,
3108 8,
3109 91,
3110 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
3111 nullptr, // No Itinerary
3112 nullptr // No extra processor descriptor
3113 },
3114{ // SIDPGFX950FullSpeedModel
3115 1, // IssueWidth
3116 1, // MicroOpBufferSize
3117 MCSchedModel::DefaultLoopMicroOpBufferSize,
3118 MCSchedModel::DefaultLoadLatency,
3119 MCSchedModel::DefaultHighLatency,
3120 20, // MispredictPenalty
3121 true, // PostRAScheduler
3122 true, // CompleteModel
3123 false, // EnableIntervals
3124 11, // Processor ID
3125 SIDPGFX950FullSpeedModelProcResources,
3126 SIDPGFX950FullSpeedModelSchedClasses,
3127 8,
3128 91,
3129 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
3130 nullptr, // No Itinerary
3131 nullptr // No extra processor descriptor
3132 },
3133};
3134
3135#undef DBGFIELD
3136
3137#undef DBGVAL_OR_NULLPTR
3138
3139static constexpr size_t AMDGPUCPUAliasArraySize = sizeof(std::array<SubtargetSubTypeAliasKV, 18>);
3140// Sorted (by key) array of values for CPU subtype.
3141extern const llvm::SubtargetSubTypeKVStorage< 64, 18, 698> AMDGPUSubTypeKVStorage = {
3142 {
3143 { sizeof(SubtargetSubTypeKV) * 64 + AMDGPUCPUAliasArraySize + 22, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 0 },
3144 { sizeof(SubtargetSubTypeKV) * 63 + AMDGPUCPUAliasArraySize + 30, { { { 0x0ULL, 0x10000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 0 },
3145 { sizeof(SubtargetSubTypeKV) * 62 + AMDGPUCPUAliasArraySize + 42, { { { 0x1000000000000ULL, 0x2000000002000002ULL, 0x2042100200001000ULL, 0x1000823f40400401ULL, 0x340080040ULL, 0x20000c008ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3146 { sizeof(SubtargetSubTypeKV) * 61 + AMDGPUCPUAliasArraySize + 58, { { { 0x1800000000000ULL, 0x273002ULL, 0x4400000000d000ULL, 0x1000001700200100ULL, 0x4000000040ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3147 { sizeof(SubtargetSubTypeKV) * 60 + AMDGPUCPUAliasArraySize + 74, { { { 0x1000000000000ULL, 0x2000000002000002ULL, 0x2042100200001000ULL, 0x1000823f40400401ULL, 0x340080000ULL, 0x20000c008ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3148 { sizeof(SubtargetSubTypeKV) * 59 + AMDGPUCPUAliasArraySize + 82, { { { 0x1000000000000ULL, 0x2000000002273002ULL, 0x2042100200001000ULL, 0x1000823f40400401ULL, 0x340080000ULL, 0x20000c008ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3149 { sizeof(SubtargetSubTypeKV) * 58 + AMDGPUCPUAliasArraySize + 90, { { { 0x1000000000000ULL, 0x2000000002273002ULL, 0x2042100200001000ULL, 0x1000823f40400401ULL, 0x340080000ULL, 0x20000c008ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3150 { sizeof(SubtargetSubTypeKV) * 57 + AMDGPUCPUAliasArraySize + 98, { { { 0x1800000000000ULL, 0x2000000002000002ULL, 0x2042100200001000ULL, 0x1000823f40400501ULL, 0x340080000ULL, 0x20000c008ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3151 { sizeof(SubtargetSubTypeKV) * 56 + AMDGPUCPUAliasArraySize + 106, { { { 0x1800000000000ULL, 0x273002ULL, 0x4400000000d000ULL, 0x1000001700200100ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3152 { sizeof(SubtargetSubTypeKV) * 55 + AMDGPUCPUAliasArraySize + 114, { { { 0x1800000000000ULL, 0x273002ULL, 0x4400000000d000ULL, 0x1000001700200100ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3153 { sizeof(SubtargetSubTypeKV) * 54 + AMDGPUCPUAliasArraySize + 122, { { { 0x1800000000000ULL, 0x273002ULL, 0x4400000000d000ULL, 0x1000001700200100ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3154 { sizeof(SubtargetSubTypeKV) * 53 + AMDGPUCPUAliasArraySize + 130, { { { 0x1800000000000ULL, 0x273002ULL, 0x4400000000d000ULL, 0x1000001700200100ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3155 { sizeof(SubtargetSubTypeKV) * 52 + AMDGPUCPUAliasArraySize + 138, { { { 0x1800000000000ULL, 0x273002ULL, 0x4400000000d000ULL, 0x1000001700200100ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3156 { sizeof(SubtargetSubTypeKV) * 51 + AMDGPUCPUAliasArraySize + 146, { { { 0x1800000000000ULL, 0x273002ULL, 0x4400000000d000ULL, 0x1000001700200100ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3157 { sizeof(SubtargetSubTypeKV) * 50 + AMDGPUCPUAliasArraySize + 154, { { { 0x1800000000000ULL, 0x273002ULL, 0x4400000000d000ULL, 0x1000001700200100ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 1 },
3158 { sizeof(SubtargetSubTypeKV) * 49 + AMDGPUCPUAliasArraySize + 162, { { { 0x101003000040000ULL, 0x20100000fc0043ULL, 0x4000a000050000ULL, 0x28481719000000ULL, 0x4000800248ULL, 0x208000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3159 { sizeof(SubtargetSubTypeKV) * 48 + AMDGPUCPUAliasArraySize + 178, { { { 0x1003000040000ULL, 0x20000000bd0103ULL, 0x40008000010000ULL, 0x4028001701000088ULL, 0x4000000058ULL, 0x409003ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3160 { sizeof(SubtargetSubTypeKV) * 47 + AMDGPUCPUAliasArraySize + 192, { { { 0x1003000040020ULL, 0x20000000bd0103ULL, 0x40008000010000ULL, 0x4028001701000088ULL, 0x4000000008ULL, 0x409003ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3161 { sizeof(SubtargetSubTypeKV) * 46 + AMDGPUCPUAliasArraySize + 200, { { { 0x1003000040020ULL, 0x20000000bd0103ULL, 0x40008000010000ULL, 0x4028001701000088ULL, 0x4000000008ULL, 0x409002ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3162 { sizeof(SubtargetSubTypeKV) * 45 + AMDGPUCPUAliasArraySize + 208, { { { 0x1003000040000ULL, 0x20000000bd0103ULL, 0x40008000010000ULL, 0x4028001701000088ULL, 0x4000000008ULL, 0x409003ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3163 { sizeof(SubtargetSubTypeKV) * 44 + AMDGPUCPUAliasArraySize + 216, { { { 0x1003000040000ULL, 0x20000000bd0103ULL, 0x40008000010000ULL, 0x4028001701000088ULL, 0x4000000008ULL, 0x409002ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3164 { sizeof(SubtargetSubTypeKV) * 43 + AMDGPUCPUAliasArraySize + 224, { { { 0x1003000040000ULL, 0x20000000bd0143ULL, 0x40008000010000ULL, 0x828001701000000ULL, 0x4000000218ULL, 0x409000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3165 { sizeof(SubtargetSubTypeKV) * 42 + AMDGPUCPUAliasArraySize + 232, { { { 0x1003000040020ULL, 0x20000000bd0143ULL, 0x40008000010000ULL, 0x828001701000000ULL, 0x4000000218ULL, 0x409000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3166 { sizeof(SubtargetSubTypeKV) * 41 + AMDGPUCPUAliasArraySize + 240, { { { 0x1003000040000ULL, 0x20000000bd0143ULL, 0x40008000010000ULL, 0x828001701000000ULL, 0x4000000218ULL, 0x409000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3167 { sizeof(SubtargetSubTypeKV) * 40 + AMDGPUCPUAliasArraySize + 248, { { { 0x1003000040000ULL, 0x20000000bd0143ULL, 0x40008000010000ULL, 0x28001701000000ULL, 0x4000000218ULL, 0x409000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3168 { sizeof(SubtargetSubTypeKV) * 39 + AMDGPUCPUAliasArraySize + 256, { { { 0x1003000040000ULL, 0x20000000bd0143ULL, 0x40008000010000ULL, 0x28001701000000ULL, 0x4000000218ULL, 0x409000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3169 { sizeof(SubtargetSubTypeKV) * 38 + AMDGPUCPUAliasArraySize + 264, { { { 0x101003000040000ULL, 0x20100000fc0043ULL, 0x4000a000050000ULL, 0x28481719000000ULL, 0x4000800208ULL, 0x208000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3170 { sizeof(SubtargetSubTypeKV) * 37 + AMDGPUCPUAliasArraySize + 272, { { { 0x101003000040000ULL, 0x20100000fc0043ULL, 0x4000a000050000ULL, 0x28481719000000ULL, 0x4000800208ULL, 0x208000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3171 { sizeof(SubtargetSubTypeKV) * 36 + AMDGPUCPUAliasArraySize + 280, { { { 0x101003000040000ULL, 0x20100000fc0043ULL, 0x4000a000050000ULL, 0x28481719000000ULL, 0x4000800208ULL, 0x208000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 2 },
3172 { sizeof(SubtargetSubTypeKV) * 35 + AMDGPUCPUAliasArraySize + 288, { { { 0x91673cfc8bdc851cULL, 0xe0d020080c0243ULL, 0xd090800419080005ULL, 0x828a48802780b004ULL, 0x1bc538820003e9ULL, 0x24481a460ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 3 },
3173 { sizeof(SubtargetSubTypeKV) * 34 + AMDGPUCPUAliasArraySize + 304, { { { 0x6981c0f08a0c1022ULL, 0x20100800fc0243ULL, 0x24400a800080008ULL, 0x28481701004302ULL, 0x29208880034bULL, 0x8208000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 4 },
3174 { sizeof(SubtargetSubTypeKV) * 33 + AMDGPUCPUAliasArraySize + 318, { { { 0x6981c0f08a0c1022ULL, 0x20100800fc0243ULL, 0x24400a800080008ULL, 0x28481701004302ULL, 0x29208880030bULL, 0x8208000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 4 },
3175 { sizeof(SubtargetSubTypeKV) * 32 + AMDGPUCPUAliasArraySize + 326, { { { 0x6981c0f08a0c1022ULL, 0x20100800fc0243ULL, 0x24400a800080008ULL, 0x28481701004302ULL, 0x29208880030bULL, 0x8208000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 4 },
3176 { sizeof(SubtargetSubTypeKV) * 31 + AMDGPUCPUAliasArraySize + 334, { { { 0xf9e73cfc8bdc851cULL, 0xe0d020080c0243ULL, 0xd090800418080005ULL, 0x828a68872780b006ULL, 0x1bc5b88b0003abULL, 0x24791a660ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 5 },
3177 { sizeof(SubtargetSubTypeKV) * 30 + AMDGPUCPUAliasArraySize + 342, { { { 0xf9e33cfc8bdc851cULL, 0xe09020080c0243ULL, 0xd090800438080005ULL, 0x828a68c72780b006ULL, 0x1bc5b88b0003abULL, 0x24681a660ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 5 },
3178 { sizeof(SubtargetSubTypeKV) * 29 + AMDGPUCPUAliasArraySize + 357, { { { 0xf9e73cfc8bdc851cULL, 0xe0d020080c0247ULL, 0xd090800449080015ULL, 0x829e48872780b006ULL, 0x201bc5288b0003abULL, 0x24791a660ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 6 },
3179 { sizeof(SubtargetSubTypeKV) * 28 + AMDGPUCPUAliasArraySize + 365, { { { 0xf9a63cfc8a5c4008ULL, 0xa098b4000c0042ULL, 0x444022408200005ULL, 0x80a8401700000002ULL, 0x301408a000343ULL, 0x10008000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 4 },
3180 { sizeof(SubtargetSubTypeKV) * 27 + AMDGPUCPUAliasArraySize + 379, { { { 0xf9a63cfc8a5c4008ULL, 0xa098b4000c0042ULL, 0x444022408200005ULL, 0x80a8401700000002ULL, 0x301408a000303ULL, 0x10008000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 4 },
3181 { sizeof(SubtargetSubTypeKV) * 26 + AMDGPUCPUAliasArraySize + 387, { { { 0x0ULL, 0x8000000000000ULL, 0x40001000000000ULL, 0x0ULL, 0x20000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 7 },
3182 { sizeof(SubtargetSubTypeKV) * 25 + AMDGPUCPUAliasArraySize + 394, { { { 0x0ULL, 0x0ULL, 0x40000000000000ULL, 0x0ULL, 0x20000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3183 { sizeof(SubtargetSubTypeKV) * 24 + AMDGPUCPUAliasArraySize + 401, { { { 0x0ULL, 0x0ULL, 0x40000000000000ULL, 0x0ULL, 0x20000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3184 { sizeof(SubtargetSubTypeKV) * 23 + AMDGPUCPUAliasArraySize + 408, { { { 0x0ULL, 0x0ULL, 0x40000000000000ULL, 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3185 { sizeof(SubtargetSubTypeKV) * 22 + AMDGPUCPUAliasArraySize + 415, { { { 0x0ULL, 0x8000000000000ULL, 0x40001000000000ULL, 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 7 },
3186 { sizeof(SubtargetSubTypeKV) * 21 + AMDGPUCPUAliasArraySize + 422, { { { 0x0ULL, 0x8000000000000ULL, 0x20000000000000ULL, 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3187 { sizeof(SubtargetSubTypeKV) * 20 + AMDGPUCPUAliasArraySize + 429, { { { 0x0ULL, 0x0ULL, 0x20000000000000ULL, 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3188 { sizeof(SubtargetSubTypeKV) * 19 + AMDGPUCPUAliasArraySize + 436, { { { 0x0ULL, 0x0ULL, 0x40000000000000ULL, 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3189 { sizeof(SubtargetSubTypeKV) * 18 + AMDGPUCPUAliasArraySize + 443, { { { 0x0ULL, 0x0ULL, 0x20000000000000ULL, 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3190 { sizeof(SubtargetSubTypeKV) * 17 + AMDGPUCPUAliasArraySize + 450, { { { 0x0ULL, 0x8000000000000ULL, 0x40001000000000ULL, 0x0ULL, 0x1000000000000000ULL, 0x200040000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3191 { sizeof(SubtargetSubTypeKV) * 16 + AMDGPUCPUAliasArraySize + 457, { { { 0x0ULL, 0x0ULL, 0x40000000000000ULL, 0x0ULL, 0x1000000000040000ULL, 0x40000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3192 { sizeof(SubtargetSubTypeKV) * 15 + AMDGPUCPUAliasArraySize + 464, { { { 0x0ULL, 0x0ULL, 0x40000000000000ULL, 0x0ULL, 0x1000000000000000ULL, 0x40000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3193 { sizeof(SubtargetSubTypeKV) * 14 + AMDGPUCPUAliasArraySize + 471, { { { 0x0ULL, 0x0ULL, 0x40000000000000ULL, 0x0ULL, 0x1000000000040000ULL, 0x40000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3194 { sizeof(SubtargetSubTypeKV) * 13 + AMDGPUCPUAliasArraySize + 478, { { { 0x0ULL, 0x0ULL, 0x20014000000000ULL, 0x0ULL, 0x0ULL, 0x200040000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3195 { sizeof(SubtargetSubTypeKV) * 12 + AMDGPUCPUAliasArraySize + 485, { { { 0x900fc82051080ULL, 0x6000000027f006ULL, 0x4848800002800416ULL, 0x409000001080014ULL, 0x4000000400060ULL, 0x20ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 9 },
3196 { sizeof(SubtargetSubTypeKV) * 11 + AMDGPUCPUAliasArraySize + 500, { { { 0x80000000001000ULL, 0x802000000ULL, 0x24200c000000480ULL, 0x1000000000100400ULL, 0x40ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3197 { sizeof(SubtargetSubTypeKV) * 10 + AMDGPUCPUAliasArraySize + 513, { { { 0x80000000001000ULL, 0x802000000ULL, 0x24200c000000480ULL, 0x1000000000100c00ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3198 { sizeof(SubtargetSubTypeKV) * 9 + AMDGPUCPUAliasArraySize + 520, { { { 0x80000000001000ULL, 0x802000000ULL, 0x24200c000000480ULL, 0x1000000000100c00ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3199 { sizeof(SubtargetSubTypeKV) * 8 + AMDGPUCPUAliasArraySize + 527, { { { 0x80000000001000ULL, 0x802000000ULL, 0x24200c000000482ULL, 0x1000000000100400ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3200 { sizeof(SubtargetSubTypeKV) * 7 + AMDGPUCPUAliasArraySize + 534, { { { 0x80000000001000ULL, 0x802243002ULL, 0x24200d000000482ULL, 0x1000000000100400ULL, 0x400000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3201 { sizeof(SubtargetSubTypeKV) * 6 + AMDGPUCPUAliasArraySize + 541, { { { 0x80001004001000ULL, 0x80227f002ULL, 0x24200d000000482ULL, 0x400000000100430ULL, 0x400000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3202 { sizeof(SubtargetSubTypeKV) * 5 + AMDGPUCPUAliasArraySize + 548, { { { 0x80000000001000ULL, 0x802000000ULL, 0x24200c000000480ULL, 0x1000000000100c00ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3203 { sizeof(SubtargetSubTypeKV) * 4 + AMDGPUCPUAliasArraySize + 555, { { { 0x81003c02001080ULL, 0x4000000027f006ULL, 0x4242808000800416ULL, 0x409000000080410ULL, 0x4000000400020ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 10 },
3204 { sizeof(SubtargetSubTypeKV) * 3 + AMDGPUCPUAliasArraySize + 562, { { { 0x80000000001000ULL, 0x802000000ULL, 0x24200c000000480ULL, 0x1000000000100c00ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 8 },
3205 { sizeof(SubtargetSubTypeKV) * 2 + AMDGPUCPUAliasArraySize + 569, { { { 0x60900fc82051080ULL, 0x6110000027f006ULL, 0x4242800002800416ULL, 0x409000001080014ULL, 0x4000000400020ULL, 0x100000020ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 9 },
3206 { sizeof(SubtargetSubTypeKV) * 1 + AMDGPUCPUAliasArraySize + 576, { { { 0x20b06fc8a052080ULL, 0x61360001a7f006ULL, 0x4888800006800416ULL, 0x8409400001080014ULL, 0x4000000400020ULL, 0x20ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, 11 },
3207 },
3208 { {
3209 { sizeof(SubtargetSubTypeAliasKV) * 18 + 1, 45 },
3210 { sizeof(SubtargetSubTypeAliasKV) * 17 + 9, 47 },
3211 { sizeof(SubtargetSubTypeAliasKV) * 16 + 17, 49 },
3212 { sizeof(SubtargetSubTypeAliasKV) * 15 + 583, 40 },
3213 { sizeof(SubtargetSubTypeAliasKV) * 14 + 590, 42 },
3214 { sizeof(SubtargetSubTypeAliasKV) * 13 + 597, 48 },
3215 { sizeof(SubtargetSubTypeAliasKV) * 12 + 605, 44 },
3216 { sizeof(SubtargetSubTypeAliasKV) * 11 + 612, 41 },
3217 { sizeof(SubtargetSubTypeAliasKV) * 10 + 619, 44 },
3218 { sizeof(SubtargetSubTypeAliasKV) * 9 + 627, 40 },
3219 { sizeof(SubtargetSubTypeAliasKV) * 8 + 633, 39 },
3220 { sizeof(SubtargetSubTypeAliasKV) * 7 + 642, 49 },
3221 { sizeof(SubtargetSubTypeAliasKV) * 6 + 652, 49 },
3222 { sizeof(SubtargetSubTypeAliasKV) * 5 + 662, 51 },
3223 { sizeof(SubtargetSubTypeAliasKV) * 4 + 669, 38 },
3224 { sizeof(SubtargetSubTypeAliasKV) * 3 + 676, 48 },
3225 { sizeof(SubtargetSubTypeAliasKV) * 2 + 682, 50 },
3226 { sizeof(SubtargetSubTypeAliasKV) * 1 + 691, 39 },
3227 } },
3228 "\000bonaire\000carrizo\000fiji\000generic\000generic-hsa\000gfx10-1-gen"
3229 "eric\000gfx10-3-generic\000gfx1010\000gfx1011\000gfx1012\000gfx1013\000"
3230 "gfx1030\000gfx1031\000gfx1032\000gfx1033\000gfx1034\000gfx1035\000gfx10"
3231 "36\000gfx11-7-generic\000gfx11-generic\000gfx1100\000gfx1101\000gfx1102"
3232 "\000gfx1103\000gfx1150\000gfx1151\000gfx1152\000gfx1153\000gfx1154\000g"
3233 "fx1170\000gfx1171\000gfx1172\000gfx12-5-generic\000gfx12-generic\000gfx"
3234 "1200\000gfx1201\000gfx1250\000gfx1250-strict\000gfx1251\000gfx13-generi"
3235 "c\000gfx1310\000gfx600\000gfx601\000gfx602\000gfx700\000gfx701\000gfx70"
3236 "2\000gfx703\000gfx704\000gfx705\000gfx801\000gfx802\000gfx803\000gfx805"
3237 "\000gfx810\000gfx9-4-generic\000gfx9-generic\000gfx900\000gfx902\000gfx"
3238 "904\000gfx906\000gfx908\000gfx909\000gfx90a\000gfx90c\000gfx942\000gfx9"
3239 "50\000hainan\000hawaii\000iceland\000kabini\000kaveri\000mullins\000ola"
3240 "nd\000pitcairn\000polaris10\000polaris11\000stoney\000tahiti\000tonga\000"
3241 "tongapro\000verde\000"};
3242
3243namespace AMDGPU_MC {
3244
3245unsigned resolveVariantSchedClassImpl(unsigned SchedClass,
3246 const MCInst *MI, const MCInstrInfo *MCII, const MCSubtargetInfo &STI, unsigned CPUID) {
3247 switch (SchedClass) {
3248 case 35: // COPY
3249 if (CPUID == 1) { // GFX10SpeedModel
3250 return 81; // WriteSALU
3251 }
3252 if (CPUID == 2) { // GFX11SpeedModel
3253 return 81; // WriteSALU
3254 }
3255 if (CPUID == 3) { // GFX125xGenericSpeedModel
3256 return 81; // WriteSALU
3257 }
3258 if (CPUID == 4) { // GFX12SpeedModel
3259 return 81; // WriteSALU
3260 }
3261 if (CPUID == 5) { // GFX1250SpeedModel
3262 return 81; // WriteSALU
3263 }
3264 if (CPUID == 6) { // GFX1251SpeedModel
3265 return 81; // WriteSALU
3266 }
3267 if (CPUID == 7) { // SIFullSpeedModel
3268 return 81; // WriteSALU
3269 }
3270 if (CPUID == 8) { // SIQuarterSpeedModel
3271 return 81; // WriteSALU
3272 }
3273 if (CPUID == 9) { // SIDPGFX942FullSpeedModel
3274 return 81; // WriteSALU
3275 }
3276 if (CPUID == 10) { // SIDPFullSpeedModel
3277 return 81; // WriteSALU
3278 }
3279 if (CPUID == 11) { // SIDPGFX950FullSpeedModel
3280 return 81; // WriteSALU
3281 }
3282 break;
3283 case 36: // V_ACCVGPR_WRITE_B32_e64
3284 if (CPUID == 8) { // SIQuarterSpeedModel
3285 return 83; // Write64Bit_ReadDefault
3286 }
3287 break;
3288 case 39: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi
3289 if (CPUID == 11) { // SIDPGFX950FullSpeedModel
3290 return 85; // Write8PassMAI_MIMFMARead
3291 }
3292 break;
3293 case 54: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
3294 if (CPUID == 11) { // SIDPGFX950FullSpeedModel
3295 return 86; // Write4PassMAI_MIMFMARead
3296 }
3297 break;
3298 case 55: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
3299 if (CPUID == 11) { // SIDPGFX950FullSpeedModel
3300 return 86; // Write4PassMAI_MIMFMARead
3301 }
3302 break;
3303 case 56: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd
3304 if (CPUID == 11) { // SIDPGFX950FullSpeedModel
3305 return 85; // Write8PassMAI_MIMFMARead
3306 }
3307 break;
3308 case 59: // V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr
3309 if (CPUID == 5) { // GFX1250SpeedModel
3310 if (STI.hasFeature(AMDGPU::FeatureGFX1250_STRICT))
3311 return 87; // WriteXDL2PassWMMA
3312 return 88; // WriteXDL1PassWMMA
3313 }
3314 break;
3315 case 60: // V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250
3316 if (CPUID == 5) { // GFX1250SpeedModel
3317 if (STI.hasFeature(AMDGPU::FeatureGFX1250_STRICT))
3318 return 87; // WriteXDL2PassWMMA
3319 return 88; // WriteXDL1PassWMMA
3320 }
3321 break;
3322 case 67: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr
3323 if (CPUID == 3) { // GFX125xGenericSpeedModel
3324 return 90; // WriteXDL8PassWMMA
3325 }
3326 if (CPUID == 5) { // GFX1250SpeedModel
3327 if (STI.hasFeature(AMDGPU::FeatureGFX1250_STRICT)
3328 && AMDGPU::isWMMAAnyF8(*MI))
3329 return 89; // WriteXDL4PassWMMA
3330 if (STI.hasFeature(AMDGPU::FeatureGFX1250_STRICT))
3331 return 87; // WriteXDL2PassWMMA
3332 if (AMDGPU::isWMMABothF4(*MI))
3333 return 88; // WriteXDL1PassWMMA
3334 return 87; // WriteXDL2PassWMMA
3335 }
3336 if (CPUID == 6) { // GFX1251SpeedModel
3337 return 90; // WriteXDL8PassWMMA
3338 }
3339 break;
3340 case 68: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250
3341 if (CPUID == 3) { // GFX125xGenericSpeedModel
3342 return 90; // WriteXDL8PassWMMA
3343 }
3344 if (CPUID == 5) { // GFX1250SpeedModel
3345 if (STI.hasFeature(AMDGPU::FeatureGFX1250_STRICT)
3346 && AMDGPU::isWMMAAnyF8(*MI))
3347 return 89; // WriteXDL4PassWMMA
3348 if (STI.hasFeature(AMDGPU::FeatureGFX1250_STRICT))
3349 return 87; // WriteXDL2PassWMMA
3350 if (AMDGPU::isWMMABothF4(*MI))
3351 return 88; // WriteXDL1PassWMMA
3352 return 87; // WriteXDL2PassWMMA
3353 }
3354 if (CPUID == 6) { // GFX1251SpeedModel
3355 return 90; // WriteXDL8PassWMMA
3356 }
3357 break;
3358 };
3359 // Don't know how to resolve this scheduling class.
3360 return 0;
3361}
3362
3363} // namespace AMDGPU_MC
3364struct AMDGPUGenMCSubtargetInfo : public MCSubtargetInfo {
3365 AMDGPUGenMCSubtargetInfo(const Triple &TT,
3366 StringRef CPU, StringRef TuneCPU, StringRef FS,
3367 StringTable PN,
3368 ArrayRef<SubtargetFeatureKV> PF,
3369 ArrayRef<SubtargetSubTypeKV> PD,
3370 ArrayRef<SubtargetSubTypeAliasKV> PA,
3371 const MCSchedModel *PSM,
3372 const MCWriteProcResEntry *WPR,
3373 const MCWriteLatencyEntry *WL,
3374 const MCReadAdvanceEntry *RA, const InstrStage *IS,
3375 const unsigned *OC, const unsigned *FP) :
3376 MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD, PA, PSM,
3377 WPR, WL, RA, IS, OC, FP) { }
3378
3379 unsigned resolveVariantSchedClass(unsigned SchedClass,
3380 const MCInst *MI, const MCInstrInfo *MCII,
3381 unsigned CPUID) const final {
3382 return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);
3383 }
3384 unsigned getHwModeSet() const final;
3385 unsigned getHwMode(enum HwModeType type = HwMode_Default) const final;
3386};
3387unsigned AMDGPUGenMCSubtargetInfo::getHwModeSet() const {
3388 [[maybe_unused]] const FeatureBitset &FB = getFeatureBits();
3389 // Collect HwModes and store them as a bit set.
3390 unsigned Modes = 0;
3391 if (FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs]) Modes |= (1 << 0);
3392 if (!(FB[AMDGPU::FeatureMAIInsts]) && FB[AMDGPU::FeatureRequiresAlignedVGPRs] && FB[AMDGPU::FeatureWavefrontSize32]) Modes |= (1 << 1);
3393 if (!(FB[AMDGPU::FeatureMAIInsts]) && FB[AMDGPU::FeatureRequiresAlignedVGPRs] && FB[AMDGPU::FeatureWavefrontSize64]) Modes |= (1 << 2);
3394 if ((FB[AMDGPU::FeatureWavefrontSize32] || FB[AMDGPU::FeatureAssemblerPermissiveWavesize]) && !(FB[AMDGPU::FeatureRequiresAlignedVGPRs])) Modes |= (1 << 3);
3395 return Modes;
3396}
3397unsigned AMDGPUGenMCSubtargetInfo::getHwMode(enum HwModeType type) const {
3398 unsigned Modes = getHwModeSet();
3399
3400 if (!Modes)
3401 return Modes;
3402
3403 switch (type) {
3404 case HwMode_Default:
3405 return llvm::countr_zero(Modes) + 1;
3406 case HwMode_ValueType:
3407 Modes &= 15;
3408 if (!Modes)
3409 return Modes;
3410 if (!llvm::has_single_bit<unsigned>(Modes))
3411 llvm_unreachable("Two or more HwModes for ValueType were found!");
3412 return llvm::countr_zero(Modes) + 1;
3413 case HwMode_RegInfo:
3414 Modes &= 15;
3415 if (!Modes)
3416 return Modes;
3417 if (!llvm::has_single_bit<unsigned>(Modes))
3418 llvm_unreachable("Two or more HwModes for RegInfo were found!");
3419 return llvm::countr_zero(Modes) + 1;
3420 case HwMode_EncodingInfo:
3421 // No HwMode for EncodingInfo.
3422 return 0;
3423 }
3424 llvm_unreachable("unexpected HwModeType");
3425 return 0; // should not get here
3426}
3427
3428static inline MCSubtargetInfo *createAMDGPUMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS) {
3429 return new AMDGPUGenMCSubtargetInfo(TT, CPU, TuneCPU, FS, StringTable(AMDGPUSubTypeKVStorage.Strings), AMDGPUFeatureKVStorage.Features, AMDGPUSubTypeKVStorage.SubTypes, ArrayRef(AMDGPUSubTypeKVStorage.Aliases).take_front(18), AMDGPUSchedModels,
3430 AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable,
3431 nullptr, nullptr, nullptr);
3432}
3433
3434
3435} // namespace llvm
3436
3437#endif // GET_SUBTARGETINFO_MC_DESC
3438
3439#ifdef GET_SUBTARGETINFO_TARGET_DESC
3440#undef GET_SUBTARGETINFO_TARGET_DESC
3441
3442#include "llvm/ADT/BitmaskEnum.h"
3443#include "llvm/Support/Debug.h"
3444#include "llvm/Support/raw_ostream.h"
3445
3446// ParseSubtargetFeatures - Parses features string setting specified
3447// subtarget options.
3448void llvm::AMDGPUSubtarget::ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS) {
3449 LLVM_DEBUG(dbgs() << "\nFeatures:" << FS);
3450 LLVM_DEBUG(dbgs() << "\nCPU:" << CPU);
3451 LLVM_DEBUG(dbgs() << "\nTuneCPU:" << TuneCPU << "\n\n");
3452 InitMCProcessorInfo(CPU, TuneCPU, FS);
3453 const FeatureBitset &Bits = getFeatureBits();
3454 if (Bits[AMDGPU::Feature16BitInsts]) Has16BitInsts = true;
3455 if (Bits[AMDGPU::Feature32BitNumRecordsBufferResource] && BufferResourceNumRecordsWidth < 32) BufferResourceNumRecordsWidth = 32;
3456 if (Bits[AMDGPU::Feature45BitNumRecordsBufferResource] && BufferResourceNumRecordsWidth < 45) BufferResourceNumRecordsWidth = 45;
3457 if (Bits[AMDGPU::Feature64BitLiterals]) Has64BitLiterals = true;
3458 if (Bits[AMDGPU::Feature1024AddressableVGPRs]) Has1024AddressableVGPRs = true;
3459 if (Bits[AMDGPU::Feature1536VGPRs]) Has1536VGPRs = true;
3460 if (Bits[AMDGPU::FeatureA16]) HasA16 = true;
3461 if (Bits[AMDGPU::FeatureAGPRAlloc]) HasAGPRAlloc = true;
3462 if (Bits[AMDGPU::FeatureAddMinMaxInsts]) HasAddMinMaxInsts = true;
3463 if (Bits[AMDGPU::FeatureAddNoCarryInsts]) HasAddNoCarryInsts = true;
3464 if (Bits[AMDGPU::FeatureAddSubU64Insts]) HasAddSubU64Insts = true;
3465 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize32768] && AddressableLocalMemorySize < 32768) AddressableLocalMemorySize = 32768;
3466 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize65536] && AddressableLocalMemorySize < 65536) AddressableLocalMemorySize = 65536;
3467 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize163840] && AddressableLocalMemorySize < 163840) AddressableLocalMemorySize = 163840;
3468 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize196608] && AddressableLocalMemorySize < 196608) AddressableLocalMemorySize = 196608;
3469 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize327680] && AddressableLocalMemorySize < 327680) AddressableLocalMemorySize = 327680;
3470 if (Bits[AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics]) HasAgentScopeFineGrainedRemoteMemoryAtomics = true;
3471 if (Bits[AMDGPU::FeatureApertureRegs]) HasApertureRegs = true;
3472 if (Bits[AMDGPU::FeatureArchitectedFlatScratch]) HasArchitectedFlatScratch = true;
3473 if (Bits[AMDGPU::FeatureArchitectedSGPRs]) HasArchitectedSGPRs = true;
3474 if (Bits[AMDGPU::FeatureAshrPkInsts]) HasAshrPkInsts = true;
3475 if (Bits[AMDGPU::FeatureAssemblerPermissiveWavesize]) HasAssemblerPermissiveWavesize = true;
3476 if (Bits[AMDGPU::FeatureAsyncLoadToLDSInsts]) HasAsyncLoadToLDSInsts = true;
3477 if (Bits[AMDGPU::FeatureAsyncStoreFromLDSInsts]) HasAsyncStoreFromLDSInsts = true;
3478 if (Bits[AMDGPU::FeatureAsynccnt]) HasAsynccnt = true;
3479 if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts]) HasAtomicBufferGlobalPkAddF16Insts = true;
3480 if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts]) HasAtomicBufferGlobalPkAddF16NoRtnInsts = true;
3481 if (Bits[AMDGPU::FeatureAtomicBufferPkAddBF16Inst]) HasAtomicBufferPkAddBF16Inst = true;
3482 if (Bits[AMDGPU::FeatureAtomicCSubNoRtnInsts]) HasAtomicCSubNoRtnInsts = true;
3483 if (Bits[AMDGPU::FeatureAtomicCondSubClampFlatInsts]) HasAtomicCondSubClampFlatInsts = true;
3484 if (Bits[AMDGPU::FeatureAtomicDsCondSubClampInsts]) HasAtomicDsCondSubClampInsts = true;
3485 if (Bits[AMDGPU::FeatureAtomicDsPkAdd16Insts]) HasAtomicDsPkAdd16Insts = true;
3486 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts]) HasAtomicFMinFMaxF32FlatInsts = true;
3487 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts]) HasAtomicFMinFMaxF32GlobalInsts = true;
3488 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts]) HasAtomicFMinFMaxF64FlatInsts = true;
3489 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts]) HasAtomicFMinFMaxF64GlobalInsts = true;
3490 if (Bits[AMDGPU::FeatureAtomicFaddNoRtnInsts]) HasAtomicFaddNoRtnInsts = true;
3491 if (Bits[AMDGPU::FeatureAtomicFaddRtnInsts]) HasAtomicFaddRtnInsts = true;
3492 if (Bits[AMDGPU::FeatureAtomicFlatPkAdd16Insts]) HasAtomicFlatPkAdd16Insts = true;
3493 if (Bits[AMDGPU::FeatureAtomicGlobalPkAddBF16Inst]) HasAtomicGlobalPkAddBF16Inst = true;
3494 if (Bits[AMDGPU::FeatureAutoWaitcntBeforeBarrier]) HasAutoWaitcntBeforeBarrier = true;
3495 if (Bits[AMDGPU::FeatureBF8ConversionScaleInsts]) HasBF8ConversionScaleInsts = true;
3496 if (Bits[AMDGPU::FeatureBF16ConversionInsts]) HasBF16ConversionInsts = true;
3497 if (Bits[AMDGPU::FeatureBF16InlineConstFromUpperFP32]) HasBF16InlineConstFromUpperFP32 = true;
3498 if (Bits[AMDGPU::FeatureBF16PackedInsts]) HasBF16PackedInsts = true;
3499 if (Bits[AMDGPU::FeatureBF16TransInsts]) HasBF16TransInsts = true;
3500 if (Bits[AMDGPU::FeatureBVHDualAndBVH8Insts]) HasBVHDualAndBVH8Insts = true;
3501 if (Bits[AMDGPU::FeatureBVHRayTracingInsts]) HasBVHRayTracingInsts = true;
3502 if (Bits[AMDGPU::FeatureBackOffBarrier]) HasBackOffBarrier = true;
3503 if (Bits[AMDGPU::FeatureBitOp3Insts]) HasBitOp3Insts = true;
3504 if (Bits[AMDGPU::FeatureBlock16ConversionScaleInsts]) HasBlock16ConversionScaleInsts = true;
3505 if (Bits[AMDGPU::FeatureBufferInvInst]) HasBufferInvInst = true;
3506 if (Bits[AMDGPU::FeatureCIInsts]) HasCIInsts = true;
3507 if (Bits[AMDGPU::FeatureClusters]) HasClusters = true;
3508 if (Bits[AMDGPU::FeatureCuMode]) EnableCuMode = true;
3509 if (Bits[AMDGPU::FeatureCubeInsts]) HasCubeInsts = true;
3510 if (Bits[AMDGPU::FeatureCvtFP8ByteSel]) HasCvtFP8ByteSel = true;
3511 if (Bits[AMDGPU::FeatureCvtFP8SDWASrcSel]) HasCvtFP8SDWASrcSel = true;
3512 if (Bits[AMDGPU::FeatureCvtFP8VOP1Bug]) HasCvtFP8VOP1Bug = true;
3513 if (Bits[AMDGPU::FeatureCvtNormInsts]) HasCvtNormInsts = true;
3514 if (Bits[AMDGPU::FeatureCvtPkF16F32Inst]) HasCvtPkF16F32Inst = true;
3515 if (Bits[AMDGPU::FeatureCvtPkNormVOP2Insts]) HasCvtPkNormVOP2Insts = true;
3516 if (Bits[AMDGPU::FeatureCvtPkNormVOP3Insts]) HasCvtPkNormVOP3Insts = true;
3517 if (Bits[AMDGPU::FeatureCvtSrPkBF16F32Inst]) HasCvtSrPkBF16F32Inst = true;
3518 if (Bits[AMDGPU::FeatureD16Writes32BitVgpr]) HasD16Writes32BitVgpr = true;
3519 if (Bits[AMDGPU::FeatureDLInsts]) HasDLInsts = true;
3520 if (Bits[AMDGPU::FeatureDPALU_DPP]) HasDPALU_DPP = true;
3521 if (Bits[AMDGPU::FeatureDPP]) HasDPP = true;
3522 if (Bits[AMDGPU::FeatureDPP8]) HasDPP8 = true;
3523 if (Bits[AMDGPU::FeatureDPPBroadcasts]) HasDPPBroadcasts = true;
3524 if (Bits[AMDGPU::FeatureDPPSrc1SGPR]) HasDPPSrc1SGPR = true;
3525 if (Bits[AMDGPU::FeatureDPPWavefrontShifts]) HasDPPWavefrontShifts = true;
3526 if (Bits[AMDGPU::FeatureDX10ClampAndIEEEMode]) HasDX10ClampAndIEEEMode = true;
3527 if (Bits[AMDGPU::FeatureDataCacheLineSize128] && DataCacheLineSize < 128) DataCacheLineSize = 128;
3528 if (Bits[AMDGPU::FeatureDefaultComponentBroadcast]) HasDefaultComponentBroadcast = true;
3529 if (Bits[AMDGPU::FeatureDefaultComponentZero]) HasDefaultComponentZero = true;
3530 if (Bits[AMDGPU::FeatureDot1Insts]) HasDot1Insts = true;
3531 if (Bits[AMDGPU::FeatureDot2Insts]) HasDot2Insts = true;
3532 if (Bits[AMDGPU::FeatureDot3Insts]) HasDot3Insts = true;
3533 if (Bits[AMDGPU::FeatureDot4Insts]) HasDot4Insts = true;
3534 if (Bits[AMDGPU::FeatureDot5Insts]) HasDot5Insts = true;
3535 if (Bits[AMDGPU::FeatureDot6Insts]) HasDot6Insts = true;
3536 if (Bits[AMDGPU::FeatureDot7Insts]) HasDot7Insts = true;
3537 if (Bits[AMDGPU::FeatureDot8Insts]) HasDot8Insts = true;
3538 if (Bits[AMDGPU::FeatureDot9Insts]) HasDot9Insts = true;
3539 if (Bits[AMDGPU::FeatureDot10Insts]) HasDot10Insts = true;
3540 if (Bits[AMDGPU::FeatureDot11Insts]) HasDot11Insts = true;
3541 if (Bits[AMDGPU::FeatureDot12Insts]) HasDot12Insts = true;
3542 if (Bits[AMDGPU::FeatureDot13Insts]) HasDot13Insts = true;
3543 if (Bits[AMDGPU::FeatureDsSrc2Insts]) HasDsSrc2Insts = true;
3544 if (Bits[AMDGPU::FeatureDumpCodeLower]) DumpCode = true;
3545 if (Bits[AMDGPU::FeatureEmulatedSystemScopeAtomics]) HasEmulatedSystemScopeAtomics = true;
3546 if (Bits[AMDGPU::FeatureEnableDS128]) EnableDS128 = true;
3547 if (Bits[AMDGPU::FeatureEnableFlatScratch]) EnableFlatScratch = true;
3548 if (Bits[AMDGPU::FeatureEnableLoadStoreOpt]) EnableLoadStoreOpt = true;
3549 if (Bits[AMDGPU::FeatureEnablePRTStrictNull]) EnablePRTStrictNull = true;
3550 if (Bits[AMDGPU::FeatureEnableSIScheduler]) EnableSIScheduler = true;
3551 if (Bits[AMDGPU::FeatureEnableUnsafeDSOffsetFolding]) EnableUnsafeDSOffsetFolding = true;
3552 if (Bits[AMDGPU::FeatureExclusiveScanInsts]) HasExclusiveScanInsts = true;
3553 if (Bits[AMDGPU::FeatureExtendedImageInsts]) HasExtendedImageInsts = true;
3554 if (Bits[AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts]) HasF16BF16ToFP6BF6ConversionScaleInsts = true;
3555 if (Bits[AMDGPU::FeatureF16FP8ConversionInsts]) HasF16FP8ConversionInsts = true;
3556 if (Bits[AMDGPU::FeatureF32ToF16BF16ConversionSRInsts]) HasF32ToF16BF16ConversionSRInsts = true;
3557 if (Bits[AMDGPU::FeatureF32ToFP6BF6ConversionScaleInsts]) HasF32ToFP6BF6ConversionScaleInsts = true;
3558 if (Bits[AMDGPU::FeatureFMA]) HasFMA = true;
3559 if (Bits[AMDGPU::FeatureFP4ConversionScaleInsts]) HasFP4ConversionScaleInsts = true;
3560 if (Bits[AMDGPU::FeatureFP6BF6ConversionScaleInsts]) HasFP6BF6ConversionScaleInsts = true;
3561 if (Bits[AMDGPU::FeatureFP6BF6ToF16BF16F32ConversionScaleInsts]) HasFP6BF6ToF16BF16F32ConversionScaleInsts = true;
3562 if (Bits[AMDGPU::FeatureFP8ConversionInsts]) HasFP8ConversionInsts = true;
3563 if (Bits[AMDGPU::FeatureFP8ConversionScaleInsts]) HasFP8ConversionScaleInsts = true;
3564 if (Bits[AMDGPU::FeatureFP8E5M3Insts]) HasFP8E5M3Insts = true;
3565 if (Bits[AMDGPU::FeatureFP8F16ConversionInsts]) HasFP8F16ConversionInsts = true;
3566 if (Bits[AMDGPU::FeatureFP8Insts]) HasFP8Insts = true;
3567 if (Bits[AMDGPU::FeatureFP64]) HasFP64 = true;
3568 if (Bits[AMDGPU::FeatureFastDenormalF32]) HasFastDenormalF32 = true;
3569 if (Bits[AMDGPU::FeatureFastFMAF32]) HasFastFMAF32 = true;
3570 if (Bits[AMDGPU::FeatureFlatAddressSpace]) HasFlatAddressSpace = true;
3571 if (Bits[AMDGPU::FeatureFlatAtomicFaddF32Inst]) HasFlatAtomicFaddF32Inst = true;
3572 if (Bits[AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst]) HasFlatBufferGlobalAtomicFaddF64Inst = true;
3573 if (Bits[AMDGPU::FeatureFlatGVSMode]) HasFlatGVSMode = true;
3574 if (Bits[AMDGPU::FeatureFlatGlobalInsts]) HasFlatGlobalInsts = true;
3575 if (Bits[AMDGPU::FeatureFlatInstOffsets]) HasFlatInstOffsets = true;
3576 if (Bits[AMDGPU::FeatureFlatOffsetBits12] && FlatOffsetBitWidth < 12) FlatOffsetBitWidth = 12;
3577 if (Bits[AMDGPU::FeatureFlatOffsetBits24] && FlatOffsetBitWidth < 24) FlatOffsetBitWidth = 24;
3578 if (Bits[AMDGPU::FeatureFlatScratchInsts]) HasFlatScratchInsts = true;
3579 if (Bits[AMDGPU::FeatureFlatSegmentOffsetBug]) HasFlatSegmentOffsetBug = true;
3580 if (Bits[AMDGPU::FeatureFlatSignedOffset]) HasFlatSignedOffset = true;
3581 if (Bits[AMDGPU::FeatureFmaLegacy32Insts]) HasFmaLegacy32Insts = true;
3582 if (Bits[AMDGPU::FeatureFmaMixBF16Insts]) HasFmaMixBF16Insts = true;
3583 if (Bits[AMDGPU::FeatureFmaMixInsts]) HasFmaMixInsts = true;
3584 if (Bits[AMDGPU::FeatureFmacF64Inst]) HasFmacF64Inst = true;
3585 if (Bits[AMDGPU::FeatureFormattedMUBUFInsts]) HasFormattedMUBUFInsts = true;
3586 if (Bits[AMDGPU::FeatureFullRate64Ops]) HasFullRate64Ops = true;
3587 if (Bits[AMDGPU::FeatureG16]) HasG16 = true;
3588 if (Bits[AMDGPU::FeatureGCN3Encoding]) HasGCN3Encoding = true;
3589 if (Bits[AMDGPU::FeatureGDS]) HasGDS = true;
3590 if (Bits[AMDGPU::FeatureGFX7GFX8GFX9Insts]) HasGFX7GFX8GFX9Insts = true;
3591 if (Bits[AMDGPU::FeatureGFX8Insts]) HasGFX8Insts = true;
3592 if (Bits[AMDGPU::FeatureGFX9] && Gen < GCNSubtarget::GFX9) Gen = GCNSubtarget::GFX9;
3593 if (Bits[AMDGPU::FeatureGFX9Insts]) HasGFX9Insts = true;
3594 if (Bits[AMDGPU::FeatureGFX10] && Gen < GCNSubtarget::GFX10) Gen = GCNSubtarget::GFX10;
3595 if (Bits[AMDGPU::FeatureGFX10Insts]) HasGFX10Insts = true;
3596 if (Bits[AMDGPU::FeatureGFX10_3Insts]) HasGFX10_3Insts = true;
3597 if (Bits[AMDGPU::FeatureGFX10_BEncoding]) HasGFX10_BEncoding = true;
3598 if (Bits[AMDGPU::FeatureGFX11] && Gen < GCNSubtarget::GFX11) Gen = GCNSubtarget::GFX11;
3599 if (Bits[AMDGPU::FeatureGFX11Insts]) HasGFX11Insts = true;
3600 if (Bits[AMDGPU::FeatureGFX11_7Insts]) HasGFX11_7Insts = true;
3601 if (Bits[AMDGPU::FeatureGFX12] && Gen < GCNSubtarget::GFX12) Gen = GCNSubtarget::GFX12;
3602 if (Bits[AMDGPU::FeatureGFX12Insts]) HasGFX12Insts = true;
3603 if (Bits[AMDGPU::FeatureGFX13] && Gen < GCNSubtarget::GFX13) Gen = GCNSubtarget::GFX13;
3604 if (Bits[AMDGPU::FeatureGFX13Insts]) HasGFX13Insts = true;
3605 if (Bits[AMDGPU::FeatureGFX90AInsts]) HasGFX90AInsts = true;
3606 if (Bits[AMDGPU::FeatureGFX125xLowestRateWMMA]) HasGFX125xLowestRateWMMA = true;
3607 if (Bits[AMDGPU::FeatureGFX940Insts]) HasGFX940Insts = true;
3608 if (Bits[AMDGPU::FeatureGFX950Insts]) HasGFX950Insts = true;
3609 if (Bits[AMDGPU::FeatureGFX1250Insts]) HasGFX1250Insts = true;
3610 if (Bits[AMDGPU::FeatureGFX1250VALUBlockingCycles]) HasGFX1250VALUBlockingCycles = true;
3611 if (Bits[AMDGPU::FeatureGFX1250_STRICT]) HasGFX1250_STRICT = true;
3612 if (Bits[AMDGPU::FeatureGFX1251GEMMInsts]) HasGFX1251GEMMInsts = true;
3613 if (Bits[AMDGPU::FeatureGWS]) HasGWS = true;
3614 if (Bits[AMDGPU::FeatureGetDoorbellID]) HasGetDoorbellID = true;
3615 if (Bits[AMDGPU::FeatureGetWaveIdInst]) HasGetWaveIdInst = true;
3616 if (Bits[AMDGPU::FeatureGloballyAddressableScratch]) HasGloballyAddressableScratch = true;
3617 if (Bits[AMDGPU::FeatureHalfAddressablePhysicalLocalMemory]) HasHalfAddressablePhysicalLocalMemory = true;
3618 if (Bits[AMDGPU::FeatureHalfRate64Ops]) HasHalfRate64Ops = true;
3619 if (Bits[AMDGPU::FeatureIEEEMinimumMaximumInsts]) HasIEEEMinimumMaximumInsts = true;
3620 if (Bits[AMDGPU::FeatureImageGather4D16Bug]) HasImageGather4D16Bug = true;
3621 if (Bits[AMDGPU::FeatureImageInsts]) HasImageInsts = true;
3622 if (Bits[AMDGPU::FeatureImageStoreD16Bug]) HasImageStoreD16Bug = true;
3623 if (Bits[AMDGPU::FeatureIndexedResources]) HasIndexedResources = true;
3624 if (Bits[AMDGPU::FeatureInstCacheLineSize64] && InstCacheLineSize < 64) InstCacheLineSize = 64;
3625 if (Bits[AMDGPU::FeatureInstCacheLineSize128] && InstCacheLineSize < 128) InstCacheLineSize = 128;
3626 if (Bits[AMDGPU::FeatureInstFwdPrefetchBug]) HasInstFwdPrefetchBug = true;
3627 if (Bits[AMDGPU::FeatureIntClamp]) HasIntClamp = true;
3628 if (Bits[AMDGPU::FeatureInv2PiInlineImm]) HasInv2PiInlineImm = true;
3629 if (Bits[AMDGPU::FeatureKernargPreload]) HasKernargPreload = true;
3630 if (Bits[AMDGPU::FeatureLDSAllocGranularity256] && LDSAllocationGranularity < 256) LDSAllocationGranularity = 256;
3631 if (Bits[AMDGPU::FeatureLDSAllocGranularity512] && LDSAllocationGranularity < 512) LDSAllocationGranularity = 512;
3632 if (Bits[AMDGPU::FeatureLDSAllocGranularity1024] && LDSAllocationGranularity < 1024) LDSAllocationGranularity = 1024;
3633 if (Bits[AMDGPU::FeatureLDSAllocGranularity1280] && LDSAllocationGranularity < 1280) LDSAllocationGranularity = 1280;
3634 if (Bits[AMDGPU::FeatureLDSAllocGranularity2048] && LDSAllocationGranularity < 2048) LDSAllocationGranularity = 2048;
3635 if (Bits[AMDGPU::FeatureLDSBankCount16] && LDSBankCount < 16) LDSBankCount = 16;
3636 if (Bits[AMDGPU::FeatureLDSBankCount32] && LDSBankCount < 32) LDSBankCount = 32;
3637 if (Bits[AMDGPU::FeatureLDSBankCount64] && LDSBankCount < 64) LDSBankCount = 64;
3638 if (Bits[AMDGPU::FeatureLDSEncodingGranularity256] && LDSEncodingGranularity < 256) LDSEncodingGranularity = 256;
3639 if (Bits[AMDGPU::FeatureLDSEncodingGranularity512] && LDSEncodingGranularity < 512) LDSEncodingGranularity = 512;
3640 if (Bits[AMDGPU::FeatureLDSEncodingGranularity1024] && LDSEncodingGranularity < 1024) LDSEncodingGranularity = 1024;
3641 if (Bits[AMDGPU::FeatureLDSEncodingGranularity1280] && LDSEncodingGranularity < 1280) LDSEncodingGranularity = 1280;
3642 if (Bits[AMDGPU::FeatureLDSEncodingGranularity2048] && LDSEncodingGranularity < 2048) LDSEncodingGranularity = 2048;
3643 if (Bits[AMDGPU::FeatureLDSMisalignedBug]) HasLDSMisalignedBug = true;
3644 if (Bits[AMDGPU::FeatureLdsAtomicAddF64]) HasLdsAtomicAddF64 = true;
3645 if (Bits[AMDGPU::FeatureLdsBarrierArriveAtomic]) HasLdsBarrierArriveAtomic = true;
3646 if (Bits[AMDGPU::FeatureLdsBranchVmemWARHazard]) HasLdsBranchVmemWARHazard = true;
3647 if (Bits[AMDGPU::FeatureLerpInst]) HasLerpInst = true;
3648 if (Bits[AMDGPU::FeatureLshlAddU64Inst]) HasLshlAddU64Inst = true;
3649 if (Bits[AMDGPU::FeatureMADIntraFwdBug]) HasMADIntraFwdBug = true;
3650 if (Bits[AMDGPU::FeatureMAIInsts]) HasMAIInsts = true;
3651 if (Bits[AMDGPU::FeatureMFMAInlineLiteralBug]) HasMFMAInlineLiteralBug = true;
3652 if (Bits[AMDGPU::FeatureMIMG_R128]) HasMIMG_R128 = true;
3653 if (Bits[AMDGPU::FeatureMSAALoadDstSelBug]) HasMSAALoadDstSelBug = true;
3654 if (Bits[AMDGPU::FeatureMSAALoadInsts]) HasMSAALoadInsts = true;
3655 if (Bits[AMDGPU::FeatureMTBUFInsts]) HasMTBUFInsts = true;
3656 if (Bits[AMDGPU::FeatureMadMacF32Insts]) HasMadMacF32Insts = true;
3657 if (Bits[AMDGPU::FeatureMadMixInsts]) HasMadMixInsts = true;
3658 if (Bits[AMDGPU::FeatureMadNC64_32Insts]) HasMadNC64_32Insts = true;
3659 if (Bits[AMDGPU::FeatureMadU32Inst]) HasMadU32Inst = true;
3660 if (Bits[AMDGPU::FeatureMaxHardClauseLength32] && MaxHardClauseLength < 32) MaxHardClauseLength = 32;
3661 if (Bits[AMDGPU::FeatureMaxHardClauseLength63] && MaxHardClauseLength < 63) MaxHardClauseLength = 63;
3662 if (Bits[AMDGPU::FeatureMaxPrivateElementSize4] && MaxPrivateElementSize < 4) MaxPrivateElementSize = 4;
3663 if (Bits[AMDGPU::FeatureMaxPrivateElementSize8] && MaxPrivateElementSize < 8) MaxPrivateElementSize = 8;
3664 if (Bits[AMDGPU::FeatureMaxPrivateElementSize16] && MaxPrivateElementSize < 16) MaxPrivateElementSize = 16;
3665 if (Bits[AMDGPU::FeatureMaxWavesPerEU8] && MaxWavesPerEU < 8) MaxWavesPerEU = 8;
3666 if (Bits[AMDGPU::FeatureMaxWavesPerEU10] && MaxWavesPerEU < 10) MaxWavesPerEU = 10;
3667 if (Bits[AMDGPU::FeatureMaxWavesPerEU16] && MaxWavesPerEU < 16) MaxWavesPerEU = 16;
3668 if (Bits[AMDGPU::FeatureMaxWavesPerEU20] && MaxWavesPerEU < 20) MaxWavesPerEU = 20;
3669 if (Bits[AMDGPU::FeatureMcastLoadInsts]) HasMcastLoadInsts = true;
3670 if (Bits[AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport]) HasMemoryAtomicFaddF32DenormalSupport = true;
3671 if (Bits[AMDGPU::FeatureMin3Max3PKF16]) HasMin3Max3PKF16 = true;
3672 if (Bits[AMDGPU::FeatureMinMaxI64Insts]) HasMinMaxI64Insts = true;
3673 if (Bits[AMDGPU::FeatureMinimum3Maximum3F16]) HasMinimum3Maximum3F16 = true;
3674 if (Bits[AMDGPU::FeatureMinimum3Maximum3F32]) HasMinimum3Maximum3F32 = true;
3675 if (Bits[AMDGPU::FeatureMinimum3Maximum3PKF16]) HasMinimum3Maximum3PKF16 = true;
3676 if (Bits[AMDGPU::FeatureMixedLoadStoreClauses]) HasMixedLoadStoreClauses = true;
3677 if (Bits[AMDGPU::FeatureMovrel]) HasMovrel = true;
3678 if (Bits[AMDGPU::FeatureMqsadInsts]) HasMqsadInsts = true;
3679 if (Bits[AMDGPU::FeatureMqsadPkInsts]) HasMqsadPkInsts = true;
3680 if (Bits[AMDGPU::FeatureMsadInsts]) HasMsadInsts = true;
3681 if (Bits[AMDGPU::FeatureNSAClauseBug]) HasNSAClauseBug = true;
3682 if (Bits[AMDGPU::FeatureNSAEncoding]) HasNSAEncoding = true;
3683 if (Bits[AMDGPU::FeatureNSAtoVMEMBug]) HasNSAtoVMEMBug = true;
3684 if (Bits[AMDGPU::FeatureNeedsAligned2addrDS]) HasNeedsAligned2addrDS = true;
3685 if (Bits[AMDGPU::FeatureNeedsTDMDrain]) HasNeedsTDMDrain = true;
3686 if (Bits[AMDGPU::FeatureNegativeScratchOffsetBug]) HasNegativeScratchOffsetBug = true;
3687 if (Bits[AMDGPU::FeatureNegativeUnalignedScratchOffsetBug]) HasNegativeUnalignedScratchOffsetBug = true;
3688 if (Bits[AMDGPU::FeatureNoDataDepHazard]) HasNoDataDepHazard = true;
3689 if (Bits[AMDGPU::FeatureNoF16PseudoScalarTransInlineConstants]) HasNoF16PseudoScalarTransInlineConstants = true;
3690 if (Bits[AMDGPU::FeatureNoSdstCMPX]) HasNoSdstCMPX = true;
3691 if (Bits[AMDGPU::FeatureNoSleepForever]) HasNoSleepForever = true;
3692 if (Bits[AMDGPU::FeatureOCPFP8ConversionInsts]) HasOCPFP8ConversionInsts = true;
3693 if (Bits[AMDGPU::FeatureOffset3fBug]) HasOffset3fBug = true;
3694 if (Bits[AMDGPU::FeaturePackedFP32Ops]) HasPackedFP32Ops = true;
3695 if (Bits[AMDGPU::FeaturePackedFP32SingleSGPROps]) HasPackedFP32SingleSGPROps = true;
3696 if (Bits[AMDGPU::FeaturePackedFP64SingleSGPROps]) HasPackedFP64SingleSGPROps = true;
3697 if (Bits[AMDGPU::FeaturePackedTID]) HasPackedTID = true;
3698 if (Bits[AMDGPU::FeaturePackedU64SingleSGPROps]) HasPackedU64SingleSGPROps = true;
3699 if (Bits[AMDGPU::FeaturePartialNSAEncoding]) HasPartialNSAEncoding = true;
3700 if (Bits[AMDGPU::FeaturePermlane16Insts]) HasPermlane16Insts = true;
3701 if (Bits[AMDGPU::FeaturePermlane16Swap]) HasPermlane16Swap = true;
3702 if (Bits[AMDGPU::FeaturePermlane32Swap]) HasPermlane32Swap = true;
3703 if (Bits[AMDGPU::FeaturePkAddMinMaxInsts]) HasPkAddMinMaxInsts = true;
3704 if (Bits[AMDGPU::FeaturePkFmacF16Inst]) HasPkFmacF16Inst = true;
3705 if (Bits[AMDGPU::FeaturePointSampleAccel]) HasPointSampleAccel = true;
3706 if (Bits[AMDGPU::FeaturePopsExitingWaveID]) HasPopsExitingWaveID = true;
3707 if (Bits[AMDGPU::FeaturePreciseMemory]) EnablePreciseMemory = true;
3708 if (Bits[AMDGPU::FeaturePrivEnabledTrap2NopBug]) HasPrivEnabledTrap2NopBug = true;
3709 if (Bits[AMDGPU::FeaturePrngInst]) HasPrngInst = true;
3710 if (Bits[AMDGPU::FeaturePseudoScalarTrans]) HasPseudoScalarTrans = true;
3711 if (Bits[AMDGPU::FeatureQsadInsts]) HasQsadInsts = true;
3712 if (Bits[AMDGPU::FeatureR128A16]) HasR128A16 = true;
3713 if (Bits[AMDGPU::FeatureRealTrue16Insts]) EnableRealTrue16Insts = true;
3714 if (Bits[AMDGPU::FeatureRequiredExportPriority]) HasRequiredExportPriority = true;
3715 if (Bits[AMDGPU::FeatureRequiresAlignedVGPRs]) RequiresAlignVGPR = true;
3716 if (Bits[AMDGPU::FeatureRequiresCOV6]) RequiresCOV6 = true;
3717 if (Bits[AMDGPU::FeatureRequiresInitialUnclausedVmem]) HasRequiresInitialUnclausedVmem = true;
3718 if (Bits[AMDGPU::FeatureRestrictedSOffset]) HasRestrictedSOffset = true;
3719 if (Bits[AMDGPU::FeatureSALUFloatInsts]) HasSALUFloatInsts = true;
3720 if (Bits[AMDGPU::FeatureSALUMinimumMaximumInsts]) HasSALUMinimumMaximumInsts = true;
3721 if (Bits[AMDGPU::FeatureSBarrierLeaveImm]) HasSBarrierLeaveImm = true;
3722 if (Bits[AMDGPU::FeatureSDWA]) HasSDWA = true;
3723 if (Bits[AMDGPU::FeatureSDWAMac]) HasSDWAMac = true;
3724 if (Bits[AMDGPU::FeatureSDWAOmod]) HasSDWAOmod = true;
3725 if (Bits[AMDGPU::FeatureSDWAOutModsVOPC]) HasSDWAOutModsVOPC = true;
3726 if (Bits[AMDGPU::FeatureSDWAScalar]) HasSDWAScalar = true;
3727 if (Bits[AMDGPU::FeatureSDWASdst]) HasSDWASdst = true;
3728 if (Bits[AMDGPU::FeatureSGPRInitBug]) HasSGPRInitBug = true;
3729 if (Bits[AMDGPU::FeatureSMEMtoVectorWriteHazard]) HasSMEMtoVectorWriteHazard = true;
3730 if (Bits[AMDGPU::FeatureSMemRealTime]) HasSMemRealTime = true;
3731 if (Bits[AMDGPU::FeatureSMemTimeInst]) HasSMemTimeInst = true;
3732 if (Bits[AMDGPU::FeatureSRAMECCOnOffModes]) HasSRAMECCOnOffModes = true;
3733 if (Bits[AMDGPU::FeatureSWMMACGfx1200Insts]) HasSWMMACGfx1200Insts = true;
3734 if (Bits[AMDGPU::FeatureSWMMACGfx1250Insts]) HasSWMMACGfx1250Insts = true;
3735 if (Bits[AMDGPU::FeatureSWakeupBarrier]) HasSWakeupBarrier = true;
3736 if (Bits[AMDGPU::FeatureSWakeupImm]) HasSWakeupImm = true;
3737 if (Bits[AMDGPU::FeatureSadInsts]) HasSadInsts = true;
3738 if (Bits[AMDGPU::FeatureSafeCUPrefetch]) HasSafeCUPrefetch = true;
3739 if (Bits[AMDGPU::FeatureSafeSmemPrefetch]) HasSafeSmemPrefetch = true;
3740 if (Bits[AMDGPU::FeatureScalarAtomics]) HasScalarAtomics = true;
3741 if (Bits[AMDGPU::FeatureScalarDwordx3Loads]) HasScalarDwordx3Loads = true;
3742 if (Bits[AMDGPU::FeatureScalarFlatScratchInsts]) HasScalarFlatScratchInsts = true;
3743 if (Bits[AMDGPU::FeatureScalarStores]) HasScalarStores = true;
3744 if (Bits[AMDGPU::FeatureSeaIslands] && Gen < GCNSubtarget::SEA_ISLANDS) Gen = GCNSubtarget::SEA_ISLANDS;
3745 if (Bits[AMDGPU::FeatureSetPrioIncWgInst]) HasSetPrioIncWgInst = true;
3746 if (Bits[AMDGPU::FeatureSetregVGPRMSBFixup]) HasSetregVGPRMSBFixup = true;
3747 if (Bits[AMDGPU::FeatureShaderCyclesHiLoRegisters]) HasShaderCyclesHiLoRegisters = true;
3748 if (Bits[AMDGPU::FeatureShaderCyclesRegister]) HasShaderCyclesRegister = true;
3749 if (Bits[AMDGPU::FeatureSlowMaxMinMulI64Insts]) HasSlowMaxMinMulI64Insts = true;
3750 if (Bits[AMDGPU::FeatureSmemPrefetchInsts]) HasSmemPrefetchInsts = true;
3751 if (Bits[AMDGPU::FeatureSouthernIslands] && Gen < GCNSubtarget::SOUTHERN_ISLANDS) Gen = GCNSubtarget::SOUTHERN_ISLANDS;
3752 if (Bits[AMDGPU::FeatureSupportsSRAMECC]) SupportsSRAMECC = true;
3753 if (Bits[AMDGPU::FeatureSupportsWGP]) HasSupportsWGP = true;
3754 if (Bits[AMDGPU::FeatureSupportsWave32]) SupportsWave32 = true;
3755 if (Bits[AMDGPU::FeatureSupportsWave64]) SupportsWave64 = true;
3756 if (Bits[AMDGPU::FeatureSupportsXNACK]) SupportsXNACK = true;
3757 if (Bits[AMDGPU::FeatureTDMInsts]) HasTDMInsts = true;
3758 if (Bits[AMDGPU::FeatureTanhInsts]) HasTanhInsts = true;
3759 if (Bits[AMDGPU::FeatureTensorCvtLutInsts]) HasTensorCvtLutInsts = true;
3760 if (Bits[AMDGPU::FeatureTgSplitSupport]) HasTgSplitSupport = true;
3761 if (Bits[AMDGPU::FeatureTransCoexecutionHazard]) HasTransCoexecutionHazard = true;
3762 if (Bits[AMDGPU::FeatureTransposeLoadF4F6Insts]) HasTransposeLoadF4F6Insts = true;
3763 if (Bits[AMDGPU::FeatureTrapHandler]) HasTrapHandler = true;
3764 if (Bits[AMDGPU::FeatureTrigReducedRange]) HasTrigReducedRange = true;
3765 if (Bits[AMDGPU::FeatureTrue16BitInsts]) HasTrue16BitInsts = true;
3766 if (Bits[AMDGPU::FeatureUnalignedAccessMode]) HasUnalignedAccessMode = true;
3767 if (Bits[AMDGPU::FeatureUnalignedBufferAccess]) HasUnalignedBufferAccess = true;
3768 if (Bits[AMDGPU::FeatureUnalignedDSAccess]) HasUnalignedDSAccess = true;
3769 if (Bits[AMDGPU::FeatureUnalignedScratchAccess]) HasUnalignedScratchAccess = true;
3770 if (Bits[AMDGPU::FeatureUnpackedD16VMem]) HasUnpackedD16VMem = true;
3771 if (Bits[AMDGPU::FeatureUseAddPC64Inst]) UseAddPC64Inst = true;
3772 if (Bits[AMDGPU::FeatureUseBlockVGPROpsForCSR]) UseBlockVGPROpsForCSR = true;
3773 if (Bits[AMDGPU::FeatureUseFlatForGlobal]) UseFlatForGlobal = true;
3774 if (Bits[AMDGPU::FeatureUserSGPRInit16Bug]) HasUserSGPRInit16Bug = true;
3775 if (Bits[AMDGPU::FeatureVALUTransUseHazard]) HasVALUTransUseHazard = true;
3776 if (Bits[AMDGPU::FeatureVGPRIndexMode]) HasVGPRIndexMode = true;
3777 if (Bits[AMDGPU::FeatureVMEMtoScalarWriteHazard]) HasVMEMtoScalarWriteHazard = true;
3778 if (Bits[AMDGPU::FeatureVMemToLDSLoad]) HasVMemToLDSLoad = true;
3779 if (Bits[AMDGPU::FeatureVMovB64Inst]) HasVMovB64Inst = true;
3780 if (Bits[AMDGPU::FeatureVMulU64Inst]) HasVMulU64Inst = true;
3781 if (Bits[AMDGPU::FeatureVOP3Literal]) HasVOP3Literal = true;
3782 if (Bits[AMDGPU::FeatureVOP3PInsts]) HasVOP3PInsts = true;
3783 if (Bits[AMDGPU::FeatureVOP3PX2IncrementsVaVdstTwice]) HasVOP3PX2IncrementsVaVdstTwice = true;
3784 if (Bits[AMDGPU::FeatureVOPD3F64OPYSrcHazard]) HasVOPD3F64OPYSrcHazard = true;
3785 if (Bits[AMDGPU::FeatureVOPDInsts]) HasVOPDInsts = true;
3786 if (Bits[AMDGPU::FeatureVOPDInterlockHazard]) HasVOPDInterlockHazard = true;
3787 if (Bits[AMDGPU::FeatureVPermPk16Hazard]) HasVPermPk16Hazard = true;
3788 if (Bits[AMDGPU::FeatureVcmpxExecWARHazard]) HasVcmpxExecWARHazard = true;
3789 if (Bits[AMDGPU::FeatureVcmpxPermlaneHazard]) HasVcmpxPermlaneHazard = true;
3790 if (Bits[AMDGPU::FeatureVmemPrefInsts]) HasVmemPrefInsts = true;
3791 if (Bits[AMDGPU::FeatureVmemWriteVgprInOrder]) HasVmemWriteVgprInOrder = true;
3792 if (Bits[AMDGPU::FeatureVolcanicIslands] && Gen < GCNSubtarget::VOLCANIC_ISLANDS) Gen = GCNSubtarget::VOLCANIC_ISLANDS;
3793 if (Bits[AMDGPU::FeatureVscnt]) HasVscnt = true;
3794 if (Bits[AMDGPU::FeatureWMMA16x16x128FP8Insts]) HasWMMA16x16x128FP8Insts = true;
3795 if (Bits[AMDGPU::FeatureWMMA128bInsts]) HasWMMA128bInsts = true;
3796 if (Bits[AMDGPU::FeatureWMMA256bInsts]) HasWMMA256bInsts = true;
3797 if (Bits[AMDGPU::FeatureWMMACoexecutionHazards]) HasWMMACoexecutionHazards = true;
3798 if (Bits[AMDGPU::FeatureWMMAF4Insts]) HasWMMAF4Insts = true;
3799 if (Bits[AMDGPU::FeatureWMMAN16Insts]) HasWMMAN16Insts = true;
3800 if (Bits[AMDGPU::FeatureWaitXcnt]) HasWaitXcnt = true;
3801 if (Bits[AMDGPU::FeatureWaitsBeforeSystemScopeStores]) RequiresWaitsBeforeSystemScopeStores = true;
3802 if (Bits[AMDGPU::FeatureWaveMatchInsts]) HasWaveMatchInsts = true;
3803 if (Bits[AMDGPU::FeatureWavefrontSize16] && WavefrontSizeLog2 < 4) WavefrontSizeLog2 = 4;
3804 if (Bits[AMDGPU::FeatureWavefrontSize32] && WavefrontSizeLog2 < 5) WavefrontSizeLog2 = 5;
3805 if (Bits[AMDGPU::FeatureWavefrontSize64] && WavefrontSizeLog2 < 6) WavefrontSizeLog2 = 6;
3806 if (Bits[AMDGPU::FeatureXF32Insts]) HasXF32Insts = true;
3807 if (Bits[AMDGPU::FeatureXNACKOnOffModes]) HasXNACKOnOffModes = true;
3808}
3809
3810#endif // GET_SUBTARGETINFO_TARGET_DESC
3811
3812#ifdef GET_SUBTARGETINFO_HEADER
3813#undef GET_SUBTARGETINFO_HEADER
3814
3815namespace llvm {
3816
3817class DFAPacketizer;
3818namespace AMDGPU_MC {
3819
3820unsigned resolveVariantSchedClassImpl(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, const MCSubtargetInfo &STI, unsigned CPUID);
3821
3822} // namespace AMDGPU_MC
3823struct AMDGPUGenSubtargetInfo : public TargetSubtargetInfo {
3824 explicit AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS);
3825public:
3826 unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *DefMI, const TargetSchedModel *SchedModel) const final;
3827 unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const final;
3828 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
3829 enum class AMDGPUHwModeBits : unsigned {
3830 DefaultMode = 0,
3831 AVAlign2LoadStoreMode = (1 << 0),
3832 AlignedVGPRNoAGPRMode_Wave32 = (1 << 1),
3833 AlignedVGPRNoAGPRMode_Wave64 = (1 << 2),
3834 anonymous_14690 = (1 << 3),
3835
3836 LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/anonymous_14690),
3837 };
3838 unsigned getHwModeSet() const final;
3839 unsigned getHwMode(enum HwModeType type = HwMode_Default) const final;
3840 const FeatureBitset &getInlineIgnoreFeatures() const override;
3841 const FeatureBitset &getInlineInverseFeatures() const override;
3842 const FeatureBitset &getInlineMustMatchFeatures() const override;
3843};
3844
3845} // namespace llvm
3846
3847#endif // GET_SUBTARGETINFO_HEADER
3848
3849#ifdef GET_SUBTARGETINFO_CTOR
3850#undef GET_SUBTARGETINFO_CTOR
3851
3852#include "llvm/CodeGen/TargetSchedule.h"
3853
3854namespace llvm {
3855
3856extern const llvm::StringRef AMDGPUNames[];
3857extern const llvm::SubtargetFeatureKVStorage<354, 22848> AMDGPUFeatureKVStorage;
3858extern const llvm::SubtargetSubTypeKVStorage<64, 18, 698> AMDGPUSubTypeKVStorage;
3859extern const llvm::MCSchedModel AMDGPUSchedModels[];
3860extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[];
3861extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[];
3862extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[];
3863AMDGPUGenSubtargetInfo::AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS)
3864 : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, StringTable(AMDGPUSubTypeKVStorage.Strings), ArrayRef(AMDGPUFeatureKVStorage.Features), ArrayRef(AMDGPUSubTypeKVStorage.SubTypes), ArrayRef(AMDGPUSubTypeKVStorage.Aliases).take_front(18), AMDGPUSchedModels,
3865 AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable,
3866 nullptr, nullptr, nullptr) {}
3867
3868unsigned AMDGPUGenSubtargetInfo
3869::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
3870
3871 const SIInstrInfo *TII =
3872 static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo());
3873 (void)TII;
3874
3875 switch (SchedClass) {
3876 case 35: // COPY
3877 if (SchedModel->getProcessorID() == 1) { // GFX10SpeedModel
3878 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3879 return 79; // Write32Bit
3880 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3881 return 80; // Write64Bit
3882 return 81; // WriteSALU
3883 }
3884 if (SchedModel->getProcessorID() == 2) { // GFX11SpeedModel
3885 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3886 return 79; // Write32Bit
3887 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3888 return 80; // Write64Bit
3889 return 81; // WriteSALU
3890 }
3891 if (SchedModel->getProcessorID() == 3) { // GFX125xGenericSpeedModel
3892 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3893 return 79; // Write32Bit
3894 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3895 return 80; // Write64Bit
3896 return 81; // WriteSALU
3897 }
3898 if (SchedModel->getProcessorID() == 4) { // GFX12SpeedModel
3899 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3900 return 79; // Write32Bit
3901 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3902 return 80; // Write64Bit
3903 return 81; // WriteSALU
3904 }
3905 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
3906 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3907 return 79; // Write32Bit
3908 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3909 return 80; // Write64Bit
3910 return 81; // WriteSALU
3911 }
3912 if (SchedModel->getProcessorID() == 6) { // GFX1251SpeedModel
3913 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3914 return 79; // Write32Bit
3915 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3916 return 80; // Write64Bit
3917 return 81; // WriteSALU
3918 }
3919 if (SchedModel->getProcessorID() == 7) { // SIFullSpeedModel
3920 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3921 return 79; // Write32Bit
3922 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3923 return 80; // Write64Bit
3924 return 81; // WriteSALU
3925 }
3926 if (SchedModel->getProcessorID() == 8) { // SIQuarterSpeedModel
3927 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3928 return 79; // Write32Bit
3929 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3930 return 80; // Write64Bit
3931 return 81; // WriteSALU
3932 }
3933 if (SchedModel->getProcessorID() == 9) { // SIDPGFX942FullSpeedModel
3934 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3935 return 79; // Write32Bit
3936 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3937 return 80; // Write64Bit
3938 return 81; // WriteSALU
3939 }
3940 if (SchedModel->getProcessorID() == 10) { // SIDPFullSpeedModel
3941 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3942 return 79; // Write32Bit
3943 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3944 return 80; // Write64Bit
3945 return 81; // WriteSALU
3946 }
3947 if (SchedModel->getProcessorID() == 11) { // SIDPGFX950FullSpeedModel
3948 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
3949 return 79; // Write32Bit
3950 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
3951 return 80; // Write64Bit
3952 return 81; // WriteSALU
3953 }
3954 break;
3955 case 36: // V_ACCVGPR_WRITE_B32_e64
3956 if (SchedModel->getProcessorID() == 8) { // SIQuarterSpeedModel
3957 if (TII->hasVGPRUses(*MI))
3958 return 82; // Write64Bit_MIVGPRRead
3959 return 83; // Write64Bit_ReadDefault
3960 }
3961 break;
3962 case 39: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi
3963 if (SchedModel->getProcessorID() == 11) { // SIDPGFX950FullSpeedModel
3964 if (
3965 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
3966 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
3967)
3968 return 84; // Write16PassMAI_MIMFMARead
3969 return 85; // Write8PassMAI_MIMFMARead
3970 }
3971 break;
3972 case 54: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
3973 if (SchedModel->getProcessorID() == 11) { // SIDPGFX950FullSpeedModel
3974 if (
3975 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
3976 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
3977)
3978 return 85; // Write8PassMAI_MIMFMARead
3979 return 86; // Write4PassMAI_MIMFMARead
3980 }
3981 break;
3982 case 55: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
3983 if (SchedModel->getProcessorID() == 11) { // SIDPGFX950FullSpeedModel
3984 if (
3985 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
3986 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
3987)
3988 return 85; // Write8PassMAI_MIMFMARead
3989 return 86; // Write4PassMAI_MIMFMARead
3990 }
3991 break;
3992 case 56: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd
3993 if (SchedModel->getProcessorID() == 11) { // SIDPGFX950FullSpeedModel
3994 if (
3995 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
3996 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
3997)
3998 return 84; // Write16PassMAI_MIMFMARead
3999 return 85; // Write8PassMAI_MIMFMARead
4000 }
4001 break;
4002 case 59: // V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr
4003 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
4004 if (this->hasFeature(AMDGPU::FeatureGFX1250_STRICT))
4005 return 87; // WriteXDL2PassWMMA
4006 return 88; // WriteXDL1PassWMMA
4007 }
4008 break;
4009 case 60: // V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250
4010 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
4011 if (this->hasFeature(AMDGPU::FeatureGFX1250_STRICT))
4012 return 87; // WriteXDL2PassWMMA
4013 return 88; // WriteXDL1PassWMMA
4014 }
4015 break;
4016 case 67: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr
4017 if (SchedModel->getProcessorID() == 3) { // GFX125xGenericSpeedModel
4018 if (
4019 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() == AMDGPU::WMMA::MATRIX_FMT_FP4 &&
4020 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_FP4
4021)
4022 return 89; // WriteXDL4PassWMMA
4023 return 90; // WriteXDL8PassWMMA
4024 }
4025 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
4026 if (this->hasFeature(AMDGPU::FeatureGFX1250_STRICT)
4027 && AMDGPU::isWMMAAnyF8(*MI))
4028 return 89; // WriteXDL4PassWMMA
4029 if (this->hasFeature(AMDGPU::FeatureGFX1250_STRICT))
4030 return 87; // WriteXDL2PassWMMA
4031 if (AMDGPU::isWMMABothF4(*MI))
4032 return 88; // WriteXDL1PassWMMA
4033 return 87; // WriteXDL2PassWMMA
4034 }
4035 if (SchedModel->getProcessorID() == 6) { // GFX1251SpeedModel
4036 if (
4037 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() == AMDGPU::WMMA::MATRIX_FMT_FP4 &&
4038 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_FP4
4039)
4040 return 89; // WriteXDL4PassWMMA
4041 return 90; // WriteXDL8PassWMMA
4042 }
4043 break;
4044 case 68: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250
4045 if (SchedModel->getProcessorID() == 3) { // GFX125xGenericSpeedModel
4046 if (
4047 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() == AMDGPU::WMMA::MATRIX_FMT_FP4 &&
4048 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_FP4
4049)
4050 return 89; // WriteXDL4PassWMMA
4051 return 90; // WriteXDL8PassWMMA
4052 }
4053 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
4054 if (this->hasFeature(AMDGPU::FeatureGFX1250_STRICT)
4055 && AMDGPU::isWMMAAnyF8(*MI))
4056 return 89; // WriteXDL4PassWMMA
4057 if (this->hasFeature(AMDGPU::FeatureGFX1250_STRICT))
4058 return 87; // WriteXDL2PassWMMA
4059 if (AMDGPU::isWMMABothF4(*MI))
4060 return 88; // WriteXDL1PassWMMA
4061 return 87; // WriteXDL2PassWMMA
4062 }
4063 if (SchedModel->getProcessorID() == 6) { // GFX1251SpeedModel
4064 if (
4065 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() == AMDGPU::WMMA::MATRIX_FMT_FP4 &&
4066 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_FP4
4067)
4068 return 89; // WriteXDL4PassWMMA
4069 return 90; // WriteXDL8PassWMMA
4070 }
4071 break;
4072 };
4073 report_fatal_error("Expected a variant SchedClass");
4074} // AMDGPUGenSubtargetInfo::resolveSchedClass
4075
4076unsigned AMDGPUGenSubtargetInfo
4077::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const {
4078 return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);
4079} // AMDGPUGenSubtargetInfo::resolveVariantSchedClass
4080
4081unsigned AMDGPUGenSubtargetInfo::getHwModeSet() const {
4082 [[maybe_unused]] const auto *Subtarget =
4083 static_cast<const AMDGPUSubtarget *>(this);
4084 // Collect HwModes and store them as a bit set.
4085 unsigned Modes = 0;
4086 if ((Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs())) Modes |= (1 << 0);
4087 if ((!Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs()) && (Subtarget->isWave32())) Modes |= (1 << 1);
4088 if ((!Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs()) && (Subtarget->isWave64())) Modes |= (1 << 2);
4089 if ((Subtarget->isWave32()) && (!Subtarget->needsAlignedVGPRs())) Modes |= (1 << 3);
4090 return Modes;
4091}
4092unsigned AMDGPUGenSubtargetInfo::getHwMode(enum HwModeType type) const {
4093 unsigned Modes = getHwModeSet();
4094
4095 if (!Modes)
4096 return Modes;
4097
4098 switch (type) {
4099 case HwMode_Default:
4100 return llvm::countr_zero(Modes) + 1;
4101 case HwMode_ValueType:
4102 Modes &= 15;
4103 if (!Modes)
4104 return Modes;
4105 if (!llvm::has_single_bit<unsigned>(Modes))
4106 llvm_unreachable("Two or more HwModes for ValueType were found!");
4107 return llvm::countr_zero(Modes) + 1;
4108 case HwMode_RegInfo:
4109 Modes &= 15;
4110 if (!Modes)
4111 return Modes;
4112 if (!llvm::has_single_bit<unsigned>(Modes))
4113 llvm_unreachable("Two or more HwModes for RegInfo were found!");
4114 return llvm::countr_zero(Modes) + 1;
4115 case HwMode_EncodingInfo:
4116 // No HwMode for EncodingInfo.
4117 return 0;
4118 }
4119 llvm_unreachable("unexpected HwModeType");
4120 return 0; // should not get here
4121}
4122const FeatureBitset &AMDGPUGenSubtargetInfo::getInlineIgnoreFeatures() const {
4123 static constexpr FeatureBitset Features = {
4124AMDGPU::FeatureEnableLoadStoreOpt,
4125AMDGPU::FeatureEnableSIScheduler,
4126AMDGPU::FeatureEnableUnsafeDSOffsetFolding,
4127AMDGPU::FeatureAGPRAlloc,
4128AMDGPU::FeatureAutoWaitcntBeforeBarrier,
4129AMDGPU::FeatureFastFMAF32,
4130AMDGPU::FeatureGetDoorbellID,
4131AMDGPU::FeatureHalfRate64Ops,
4132AMDGPU::FeatureSGPRInitBug,
4133AMDGPU::FeatureSRAMECCOnOffModes,
4134AMDGPU::FeatureSupportsWGP,
4135AMDGPU::FeatureTrapHandler,
4136AMDGPU::FeatureUnalignedAccessMode,
4137AMDGPU::FeatureUnalignedScratchAccess,
4138AMDGPU::FeatureXNACKOnOffModes,
4139AMDGPU::FeatureSupportsSRAMECC,
4140AMDGPU::FeatureSupportsWave32,
4141AMDGPU::FeatureSupportsWave64,
4142AMDGPU::FeatureSupportsXNACK,
4143AMDGPU::FeatureUseFlatForGlobal,
4144 };
4145 return Features;
4146}
4147
4148const FeatureBitset &AMDGPUGenSubtargetInfo::getInlineInverseFeatures() const {
4149 static constexpr FeatureBitset Features = {
4150 };
4151 return Features;
4152}
4153
4154const FeatureBitset &AMDGPUGenSubtargetInfo::getInlineMustMatchFeatures() const {
4155 static constexpr FeatureBitset Features = {
4156 };
4157 return Features;
4158}
4159
4160
4161} // namespace llvm
4162
4163#endif // GET_SUBTARGETINFO_CTOR
4164
4165#ifdef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
4166#undef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
4167
4168
4169#endif // GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
4170
4171#ifdef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
4172#undef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
4173
4174
4175#endif // GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
4176
4177