1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Subtarget Enumeration Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_SUBTARGETINFO_ENUM
10#undef GET_SUBTARGETINFO_ENUM
11
12namespace llvm {
13
14namespace AMDGPU {
15
16enum {
17 Feature1_5xVGPRs = 0,
18 Feature16BitInsts = 1,
19 Feature45BitNumRecordsBufferResource = 2,
20 Feature64BitLiterals = 3,
21 Feature1024AddressableVGPRs = 4,
22 FeatureA16 = 5,
23 FeatureAddMinMaxInsts = 6,
24 FeatureAddNoCarryInsts = 7,
25 FeatureAddSubU64Insts = 8,
26 FeatureAddressableLocalMemorySize32768 = 9,
27 FeatureAddressableLocalMemorySize65536 = 10,
28 FeatureAddressableLocalMemorySize163840 = 11,
29 FeatureAddressableLocalMemorySize327680 = 12,
30 FeatureAgentScopeFineGrainedRemoteMemoryAtomics = 13,
31 FeatureApertureRegs = 14,
32 FeatureArchitectedFlatScratch = 15,
33 FeatureArchitectedSGPRs = 16,
34 FeatureAshrPkInsts = 17,
35 FeatureAssemblerPermissiveWavesize = 18,
36 FeatureAtomicBufferGlobalPkAddF16Insts = 19,
37 FeatureAtomicBufferGlobalPkAddF16NoRtnInsts = 20,
38 FeatureAtomicBufferPkAddBF16Inst = 21,
39 FeatureAtomicCSubNoRtnInsts = 22,
40 FeatureAtomicDsPkAdd16Insts = 23,
41 FeatureAtomicFMinFMaxF32FlatInsts = 24,
42 FeatureAtomicFMinFMaxF32GlobalInsts = 25,
43 FeatureAtomicFMinFMaxF64FlatInsts = 26,
44 FeatureAtomicFMinFMaxF64GlobalInsts = 27,
45 FeatureAtomicFaddNoRtnInsts = 28,
46 FeatureAtomicFaddRtnInsts = 29,
47 FeatureAtomicFlatPkAdd16Insts = 30,
48 FeatureAtomicGlobalPkAddBF16Inst = 31,
49 FeatureAutoWaitcntBeforeBarrier = 32,
50 FeatureBF8ConversionScaleInsts = 33,
51 FeatureBF16ConversionInsts = 34,
52 FeatureBF16PackedInsts = 35,
53 FeatureBF16TransInsts = 36,
54 FeatureBVHDualAndBVH8Insts = 37,
55 FeatureBackOffBarrier = 38,
56 FeatureBitOp3Insts = 39,
57 FeatureCIInsts = 40,
58 FeatureClusters = 41,
59 FeatureCuMode = 42,
60 FeatureCubeInsts = 43,
61 FeatureCvtFP8VOP1Bug = 44,
62 FeatureCvtNormInsts = 45,
63 FeatureCvtPkF16F32Inst = 46,
64 FeatureCvtPkNormVOP2Insts = 47,
65 FeatureCvtPkNormVOP3Insts = 48,
66 FeatureD16Writes32BitVgpr = 49,
67 FeatureDLInsts = 50,
68 FeatureDPALU_DPP = 51,
69 FeatureDPP = 52,
70 FeatureDPP8 = 53,
71 FeatureDPPBroadcasts = 54,
72 FeatureDPPSrc1SGPR = 55,
73 FeatureDPPWavefrontShifts = 56,
74 FeatureDX10ClampAndIEEEMode = 57,
75 FeatureDefaultComponentBroadcast = 58,
76 FeatureDefaultComponentZero = 59,
77 FeatureDot1Insts = 60,
78 FeatureDot2Insts = 61,
79 FeatureDot3Insts = 62,
80 FeatureDot4Insts = 63,
81 FeatureDot5Insts = 64,
82 FeatureDot6Insts = 65,
83 FeatureDot7Insts = 66,
84 FeatureDot8Insts = 67,
85 FeatureDot9Insts = 68,
86 FeatureDot10Insts = 69,
87 FeatureDot11Insts = 70,
88 FeatureDot12Insts = 71,
89 FeatureDot13Insts = 72,
90 FeatureDsSrc2Insts = 73,
91 FeatureDumpCodeLower = 74,
92 FeatureEmulatedSystemScopeAtomics = 75,
93 FeatureEnableDS128 = 76,
94 FeatureEnableFlatScratch = 77,
95 FeatureEnableLoadStoreOpt = 78,
96 FeatureEnablePRTStrictNull = 79,
97 FeatureEnableSIScheduler = 80,
98 FeatureEnableUnsafeDSOffsetFolding = 81,
99 FeatureExtendedImageInsts = 82,
100 FeatureF16BF16ToFP6BF6ConversionScaleInsts = 83,
101 FeatureF32ToF16BF16ConversionSRInsts = 84,
102 FeatureFMA = 85,
103 FeatureFP4ConversionScaleInsts = 86,
104 FeatureFP6BF6ConversionScaleInsts = 87,
105 FeatureFP8ConversionInsts = 88,
106 FeatureFP8ConversionScaleInsts = 89,
107 FeatureFP8E5M3Insts = 90,
108 FeatureFP8Insts = 91,
109 FeatureFP64 = 92,
110 FeatureFastDenormalF32 = 93,
111 FeatureFastFMAF32 = 94,
112 FeatureFlatAddressSpace = 95,
113 FeatureFlatAtomicFaddF32Inst = 96,
114 FeatureFlatBufferGlobalAtomicFaddF64Inst = 97,
115 FeatureFlatGVSMode = 98,
116 FeatureFlatGlobalInsts = 99,
117 FeatureFlatInstOffsets = 100,
118 FeatureFlatOffsetBits12 = 101,
119 FeatureFlatOffsetBits24 = 102,
120 FeatureFlatScratchInsts = 103,
121 FeatureFlatSegmentOffsetBug = 104,
122 FeatureFlatSignedOffset = 105,
123 FeatureFmaMixBF16Insts = 106,
124 FeatureFmaMixInsts = 107,
125 FeatureFmacF64Inst = 108,
126 FeatureFullRate64Ops = 109,
127 FeatureG16 = 110,
128 FeatureGCN3Encoding = 111,
129 FeatureGDS = 112,
130 FeatureGFX7GFX8GFX9Insts = 113,
131 FeatureGFX8Insts = 114,
132 FeatureGFX9 = 115,
133 FeatureGFX9Insts = 116,
134 FeatureGFX10 = 117,
135 FeatureGFX10Insts = 118,
136 FeatureGFX10_3Insts = 119,
137 FeatureGFX10_AEncoding = 120,
138 FeatureGFX10_BEncoding = 121,
139 FeatureGFX11 = 122,
140 FeatureGFX11Insts = 123,
141 FeatureGFX11_7Insts = 124,
142 FeatureGFX12 = 125,
143 FeatureGFX12Insts = 126,
144 FeatureGFX13 = 127,
145 FeatureGFX13Insts = 128,
146 FeatureGFX90AInsts = 129,
147 FeatureGFX940Insts = 130,
148 FeatureGFX950Insts = 131,
149 FeatureGFX1250Insts = 132,
150 FeatureGWS = 133,
151 FeatureGetWaveIdInst = 134,
152 FeatureGloballyAddressableScratch = 135,
153 FeatureHalfRate64Ops = 136,
154 FeatureIEEEMinimumMaximumInsts = 137,
155 FeatureImageGather4D16Bug = 138,
156 FeatureImageInsts = 139,
157 FeatureImageStoreD16Bug = 140,
158 FeatureInstCacheLineSize64 = 141,
159 FeatureInstCacheLineSize128 = 142,
160 FeatureInstFwdPrefetchBug = 143,
161 FeatureIntClamp = 144,
162 FeatureInv2PiInlineImm = 145,
163 FeatureKernargPreload = 146,
164 FeatureLDSBankCount16 = 147,
165 FeatureLDSBankCount32 = 148,
166 FeatureLDSMisalignedBug = 149,
167 FeatureLdsBarrierArriveAtomic = 150,
168 FeatureLdsBranchVmemWARHazard = 151,
169 FeatureLerpInst = 152,
170 FeatureLshlAddU64Inst = 153,
171 FeatureMADIntraFwdBug = 154,
172 FeatureMAIInsts = 155,
173 FeatureMFMAInlineLiteralBug = 156,
174 FeatureMIMG_R128 = 157,
175 FeatureMSAALoadDstSelBug = 158,
176 FeatureMadMacF32Insts = 159,
177 FeatureMadMixInsts = 160,
178 FeatureMadU32Inst = 161,
179 FeatureMaxHardClauseLength32 = 162,
180 FeatureMaxHardClauseLength63 = 163,
181 FeatureMaxPrivateElementSize4 = 164,
182 FeatureMaxPrivateElementSize8 = 165,
183 FeatureMaxPrivateElementSize16 = 166,
184 FeatureMcastLoadInsts = 167,
185 FeatureMemoryAtomicFAddF32DenormalSupport = 168,
186 FeatureMin3Max3PKF16 = 169,
187 FeatureMinimum3Maximum3F16 = 170,
188 FeatureMinimum3Maximum3F32 = 171,
189 FeatureMinimum3Maximum3PKF16 = 172,
190 FeatureMovrel = 173,
191 FeatureNSAClauseBug = 174,
192 FeatureNSAEncoding = 175,
193 FeatureNSAtoVMEMBug = 176,
194 FeatureNegativeScratchOffsetBug = 177,
195 FeatureNegativeUnalignedScratchOffsetBug = 178,
196 FeatureNoDataDepHazard = 179,
197 FeatureNoSdstCMPX = 180,
198 FeatureOffset3fBug = 181,
199 FeaturePackedFP32Ops = 182,
200 FeaturePackedTID = 183,
201 FeaturePartialNSAEncoding = 184,
202 FeaturePermlane16Swap = 185,
203 FeaturePermlane32Swap = 186,
204 FeaturePkAddMinMaxInsts = 187,
205 FeaturePkFmacF16Inst = 188,
206 FeaturePointSampleAccel = 189,
207 FeaturePreciseMemory = 190,
208 FeaturePrivEnabledTrap2NopBug = 191,
209 FeaturePrngInst = 192,
210 FeaturePseudoScalarTrans = 193,
211 FeatureQsadInsts = 194,
212 FeatureR128A16 = 195,
213 FeatureRealTrue16Insts = 196,
214 FeatureRelaxedBufferOOBMode = 197,
215 FeatureRequiredExportPriority = 198,
216 FeatureRequiresAlignedVGPRs = 199,
217 FeatureRequiresCOV6 = 200,
218 FeatureRestrictedSOffset = 201,
219 FeatureSALUFloatInsts = 202,
220 FeatureSALUMinimumMaximumInsts = 203,
221 FeatureSBarrierLeaveImm = 204,
222 FeatureSDWA = 205,
223 FeatureSDWAMac = 206,
224 FeatureSDWAOmod = 207,
225 FeatureSDWAOutModsVOPC = 208,
226 FeatureSDWAScalar = 209,
227 FeatureSDWASdst = 210,
228 FeatureSGPRInitBug = 211,
229 FeatureSMEMtoVectorWriteHazard = 212,
230 FeatureSMemRealTime = 213,
231 FeatureSMemTimeInst = 214,
232 FeatureSRAMECC = 215,
233 FeatureSWakeupBarrier = 216,
234 FeatureSWakeupImm = 217,
235 FeatureSadInsts = 218,
236 FeatureSafeCUPrefetch = 219,
237 FeatureSafeSmemPrefetch = 220,
238 FeatureScalarAtomics = 221,
239 FeatureScalarDwordx3Loads = 222,
240 FeatureScalarFlatScratchInsts = 223,
241 FeatureScalarStores = 224,
242 FeatureSeaIslands = 225,
243 FeatureSetPrioIncWgInst = 226,
244 FeatureSetregVGPRMSBFixup = 227,
245 FeatureShaderCyclesHiLoRegisters = 228,
246 FeatureShaderCyclesRegister = 229,
247 FeatureSouthernIslands = 230,
248 FeatureSupportsSRAMECC = 231,
249 FeatureSupportsXNACK = 232,
250 FeatureTanhInsts = 233,
251 FeatureTensorCvtLutInsts = 234,
252 FeatureTgSplit = 235,
253 FeatureTransposeLoadF4F6Insts = 236,
254 FeatureTrapHandler = 237,
255 FeatureTrigReducedRange = 238,
256 FeatureTrue16BitInsts = 239,
257 FeatureUnalignedAccessMode = 240,
258 FeatureUnalignedBufferAccess = 241,
259 FeatureUnalignedDSAccess = 242,
260 FeatureUnalignedScratchAccess = 243,
261 FeatureUnpackedD16VMem = 244,
262 FeatureUseAddPC64Inst = 245,
263 FeatureUseBlockVGPROpsForCSR = 246,
264 FeatureUseFlatForGlobal = 247,
265 FeatureUserSGPRInit16Bug = 248,
266 FeatureVALUTransUseHazard = 249,
267 FeatureVGPRIndexMode = 250,
268 FeatureVMEMtoScalarWriteHazard = 251,
269 FeatureVMemToLDSLoad = 252,
270 FeatureVOP3Literal = 253,
271 FeatureVOP3PInsts = 254,
272 FeatureVOPDInsts = 255,
273 FeatureVcmpxExecWARHazard = 256,
274 FeatureVcmpxPermlaneHazard = 257,
275 FeatureVmemPrefInsts = 258,
276 FeatureVmemWriteVgprInOrder = 259,
277 FeatureVolcanicIslands = 260,
278 FeatureVscnt = 261,
279 FeatureWMMA128bInsts = 262,
280 FeatureWMMA256bInsts = 263,
281 FeatureWaitXcnt = 264,
282 FeatureWaitsBeforeSystemScopeStores = 265,
283 FeatureWavefrontSize16 = 266,
284 FeatureWavefrontSize32 = 267,
285 FeatureWavefrontSize64 = 268,
286 FeatureXF32Insts = 269,
287 FeatureXNACK = 270,
288 NumSubtargetFeatures = 271
289};
290
291} // namespace AMDGPU
292
293} // namespace llvm
294
295#endif // GET_SUBTARGETINFO_ENUM
296
297#ifdef GET_SUBTARGETINFO_MACRO
298
299GET_SUBTARGETINFO_MACRO(DumpCode, false, dumpCode)
300GET_SUBTARGETINFO_MACRO(EnableCuMode, false, enableCuMode)
301GET_SUBTARGETINFO_MACRO(EnableDS128, false, enableDS128)
302GET_SUBTARGETINFO_MACRO(EnableFlatScratch, false, enableFlatScratch)
303GET_SUBTARGETINFO_MACRO(EnableLoadStoreOpt, false, enableLoadStoreOpt)
304GET_SUBTARGETINFO_MACRO(EnablePRTStrictNull, false, enablePRTStrictNull)
305GET_SUBTARGETINFO_MACRO(EnablePreciseMemory, false, enablePreciseMemory)
306GET_SUBTARGETINFO_MACRO(EnableRealTrue16Insts, false, enableRealTrue16Insts)
307GET_SUBTARGETINFO_MACRO(EnableSIScheduler, false, enableSIScheduler)
308GET_SUBTARGETINFO_MACRO(EnableSRAMECC, false, enableSRAMECC)
309GET_SUBTARGETINFO_MACRO(EnableTgSplit, false, enableTgSplit)
310GET_SUBTARGETINFO_MACRO(EnableUnsafeDSOffsetFolding, false, enableUnsafeDSOffsetFolding)
311GET_SUBTARGETINFO_MACRO(EnableXNACK, false, enableXNACK)
312GET_SUBTARGETINFO_MACRO(Has1024AddressableVGPRs, false, has1024AddressableVGPRs)
313GET_SUBTARGETINFO_MACRO(Has16BitInsts, false, has16BitInsts)
314GET_SUBTARGETINFO_MACRO(Has1_5xVGPRs, false, has1_5xVGPRs)
315GET_SUBTARGETINFO_MACRO(Has45BitNumRecordsBufferResource, false, has45BitNumRecordsBufferResource)
316GET_SUBTARGETINFO_MACRO(Has64BitLiterals, false, has64BitLiterals)
317GET_SUBTARGETINFO_MACRO(HasA16, false, hasA16)
318GET_SUBTARGETINFO_MACRO(HasAddMinMaxInsts, false, hasAddMinMaxInsts)
319GET_SUBTARGETINFO_MACRO(HasAddNoCarryInsts, false, hasAddNoCarryInsts)
320GET_SUBTARGETINFO_MACRO(HasAddSubU64Insts, false, hasAddSubU64Insts)
321GET_SUBTARGETINFO_MACRO(HasAgentScopeFineGrainedRemoteMemoryAtomics, false, hasAgentScopeFineGrainedRemoteMemoryAtomics)
322GET_SUBTARGETINFO_MACRO(HasApertureRegs, false, hasApertureRegs)
323GET_SUBTARGETINFO_MACRO(HasArchitectedFlatScratch, false, hasArchitectedFlatScratch)
324GET_SUBTARGETINFO_MACRO(HasArchitectedSGPRs, false, hasArchitectedSGPRs)
325GET_SUBTARGETINFO_MACRO(HasAshrPkInsts, false, hasAshrPkInsts)
326GET_SUBTARGETINFO_MACRO(HasAssemblerPermissiveWavesize, false, hasAssemblerPermissiveWavesize)
327GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16Insts, false, hasAtomicBufferGlobalPkAddF16Insts)
328GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16NoRtnInsts, false, hasAtomicBufferGlobalPkAddF16NoRtnInsts)
329GET_SUBTARGETINFO_MACRO(HasAtomicBufferPkAddBF16Inst, false, hasAtomicBufferPkAddBF16Inst)
330GET_SUBTARGETINFO_MACRO(HasAtomicCSubNoRtnInsts, false, hasAtomicCSubNoRtnInsts)
331GET_SUBTARGETINFO_MACRO(HasAtomicDsPkAdd16Insts, false, hasAtomicDsPkAdd16Insts)
332GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32FlatInsts, false, hasAtomicFMinFMaxF32FlatInsts)
333GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32GlobalInsts, false, hasAtomicFMinFMaxF32GlobalInsts)
334GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64FlatInsts, false, hasAtomicFMinFMaxF64FlatInsts)
335GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64GlobalInsts, false, hasAtomicFMinFMaxF64GlobalInsts)
336GET_SUBTARGETINFO_MACRO(HasAtomicFaddNoRtnInsts, false, hasAtomicFaddNoRtnInsts)
337GET_SUBTARGETINFO_MACRO(HasAtomicFaddRtnInsts, false, hasAtomicFaddRtnInsts)
338GET_SUBTARGETINFO_MACRO(HasAtomicFlatPkAdd16Insts, false, hasAtomicFlatPkAdd16Insts)
339GET_SUBTARGETINFO_MACRO(HasAtomicGlobalPkAddBF16Inst, false, hasAtomicGlobalPkAddBF16Inst)
340GET_SUBTARGETINFO_MACRO(HasAutoWaitcntBeforeBarrier, false, hasAutoWaitcntBeforeBarrier)
341GET_SUBTARGETINFO_MACRO(HasBF16ConversionInsts, false, hasBF16ConversionInsts)
342GET_SUBTARGETINFO_MACRO(HasBF16PackedInsts, false, hasBF16PackedInsts)
343GET_SUBTARGETINFO_MACRO(HasBF16TransInsts, false, hasBF16TransInsts)
344GET_SUBTARGETINFO_MACRO(HasBF8ConversionScaleInsts, false, hasBF8ConversionScaleInsts)
345GET_SUBTARGETINFO_MACRO(HasBVHDualAndBVH8Insts, false, hasBVHDualAndBVH8Insts)
346GET_SUBTARGETINFO_MACRO(HasBackOffBarrier, false, hasBackOffBarrier)
347GET_SUBTARGETINFO_MACRO(HasBitOp3Insts, false, hasBitOp3Insts)
348GET_SUBTARGETINFO_MACRO(HasCIInsts, false, hasCIInsts)
349GET_SUBTARGETINFO_MACRO(HasClusters, false, hasClusters)
350GET_SUBTARGETINFO_MACRO(HasCubeInsts, false, hasCubeInsts)
351GET_SUBTARGETINFO_MACRO(HasCvtFP8VOP1Bug, false, hasCvtFP8VOP1Bug)
352GET_SUBTARGETINFO_MACRO(HasCvtNormInsts, false, hasCvtNormInsts)
353GET_SUBTARGETINFO_MACRO(HasCvtPkF16F32Inst, false, hasCvtPkF16F32Inst)
354GET_SUBTARGETINFO_MACRO(HasCvtPkNormVOP2Insts, false, hasCvtPkNormVOP2Insts)
355GET_SUBTARGETINFO_MACRO(HasCvtPkNormVOP3Insts, false, hasCvtPkNormVOP3Insts)
356GET_SUBTARGETINFO_MACRO(HasD16Writes32BitVgpr, false, hasD16Writes32BitVgpr)
357GET_SUBTARGETINFO_MACRO(HasDLInsts, false, hasDLInsts)
358GET_SUBTARGETINFO_MACRO(HasDPALU_DPP, false, hasDPALU_DPP)
359GET_SUBTARGETINFO_MACRO(HasDPP, false, hasDPP)
360GET_SUBTARGETINFO_MACRO(HasDPP8, false, hasDPP8)
361GET_SUBTARGETINFO_MACRO(HasDPPBroadcasts, false, hasDPPBroadcasts)
362GET_SUBTARGETINFO_MACRO(HasDPPSrc1SGPR, false, hasDPPSrc1SGPR)
363GET_SUBTARGETINFO_MACRO(HasDPPWavefrontShifts, false, hasDPPWavefrontShifts)
364GET_SUBTARGETINFO_MACRO(HasDX10ClampAndIEEEMode, false, hasDX10ClampAndIEEEMode)
365GET_SUBTARGETINFO_MACRO(HasDefaultComponentBroadcast, false, hasDefaultComponentBroadcast)
366GET_SUBTARGETINFO_MACRO(HasDefaultComponentZero, false, hasDefaultComponentZero)
367GET_SUBTARGETINFO_MACRO(HasDot10Insts, false, hasDot10Insts)
368GET_SUBTARGETINFO_MACRO(HasDot11Insts, false, hasDot11Insts)
369GET_SUBTARGETINFO_MACRO(HasDot12Insts, false, hasDot12Insts)
370GET_SUBTARGETINFO_MACRO(HasDot13Insts, false, hasDot13Insts)
371GET_SUBTARGETINFO_MACRO(HasDot1Insts, false, hasDot1Insts)
372GET_SUBTARGETINFO_MACRO(HasDot2Insts, false, hasDot2Insts)
373GET_SUBTARGETINFO_MACRO(HasDot3Insts, false, hasDot3Insts)
374GET_SUBTARGETINFO_MACRO(HasDot4Insts, false, hasDot4Insts)
375GET_SUBTARGETINFO_MACRO(HasDot5Insts, false, hasDot5Insts)
376GET_SUBTARGETINFO_MACRO(HasDot6Insts, false, hasDot6Insts)
377GET_SUBTARGETINFO_MACRO(HasDot7Insts, false, hasDot7Insts)
378GET_SUBTARGETINFO_MACRO(HasDot8Insts, false, hasDot8Insts)
379GET_SUBTARGETINFO_MACRO(HasDot9Insts, false, hasDot9Insts)
380GET_SUBTARGETINFO_MACRO(HasDsSrc2Insts, false, hasDsSrc2Insts)
381GET_SUBTARGETINFO_MACRO(HasEmulatedSystemScopeAtomics, false, hasEmulatedSystemScopeAtomics)
382GET_SUBTARGETINFO_MACRO(HasExtendedImageInsts, false, hasExtendedImageInsts)
383GET_SUBTARGETINFO_MACRO(HasF16BF16ToFP6BF6ConversionScaleInsts, false, hasF16BF16ToFP6BF6ConversionScaleInsts)
384GET_SUBTARGETINFO_MACRO(HasF32ToF16BF16ConversionSRInsts, false, hasF32ToF16BF16ConversionSRInsts)
385GET_SUBTARGETINFO_MACRO(HasFMA, false, hasFMA)
386GET_SUBTARGETINFO_MACRO(HasFP4ConversionScaleInsts, false, hasFP4ConversionScaleInsts)
387GET_SUBTARGETINFO_MACRO(HasFP64, false, hasFP64)
388GET_SUBTARGETINFO_MACRO(HasFP6BF6ConversionScaleInsts, false, hasFP6BF6ConversionScaleInsts)
389GET_SUBTARGETINFO_MACRO(HasFP8ConversionInsts, false, hasFP8ConversionInsts)
390GET_SUBTARGETINFO_MACRO(HasFP8ConversionScaleInsts, false, hasFP8ConversionScaleInsts)
391GET_SUBTARGETINFO_MACRO(HasFP8E5M3Insts, false, hasFP8E5M3Insts)
392GET_SUBTARGETINFO_MACRO(HasFP8Insts, false, hasFP8Insts)
393GET_SUBTARGETINFO_MACRO(HasFastDenormalF32, false, hasFastDenormalF32)
394GET_SUBTARGETINFO_MACRO(HasFastFMAF32, false, hasFastFMAF32)
395GET_SUBTARGETINFO_MACRO(HasFlatAddressSpace, false, hasFlatAddressSpace)
396GET_SUBTARGETINFO_MACRO(HasFlatAtomicFaddF32Inst, false, hasFlatAtomicFaddF32Inst)
397GET_SUBTARGETINFO_MACRO(HasFlatBufferGlobalAtomicFaddF64Inst, false, hasFlatBufferGlobalAtomicFaddF64Inst)
398GET_SUBTARGETINFO_MACRO(HasFlatGVSMode, false, hasFlatGVSMode)
399GET_SUBTARGETINFO_MACRO(HasFlatGlobalInsts, false, hasFlatGlobalInsts)
400GET_SUBTARGETINFO_MACRO(HasFlatInstOffsets, false, hasFlatInstOffsets)
401GET_SUBTARGETINFO_MACRO(HasFlatScratchInsts, false, hasFlatScratchInsts)
402GET_SUBTARGETINFO_MACRO(HasFlatSegmentOffsetBug, false, hasFlatSegmentOffsetBug)
403GET_SUBTARGETINFO_MACRO(HasFlatSignedOffset, false, hasFlatSignedOffset)
404GET_SUBTARGETINFO_MACRO(HasFmaMixBF16Insts, false, hasFmaMixBF16Insts)
405GET_SUBTARGETINFO_MACRO(HasFmaMixInsts, false, hasFmaMixInsts)
406GET_SUBTARGETINFO_MACRO(HasFmacF64Inst, false, hasFmacF64Inst)
407GET_SUBTARGETINFO_MACRO(HasFullRate64Ops, false, hasFullRate64Ops)
408GET_SUBTARGETINFO_MACRO(HasG16, false, hasG16)
409GET_SUBTARGETINFO_MACRO(HasGCN3Encoding, false, hasGCN3Encoding)
410GET_SUBTARGETINFO_MACRO(HasGDS, false, hasGDS)
411GET_SUBTARGETINFO_MACRO(HasGFX10Insts, false, hasGFX10Insts)
412GET_SUBTARGETINFO_MACRO(HasGFX10_3Insts, false, hasGFX10_3Insts)
413GET_SUBTARGETINFO_MACRO(HasGFX10_AEncoding, false, hasGFX10_AEncoding)
414GET_SUBTARGETINFO_MACRO(HasGFX10_BEncoding, false, hasGFX10_BEncoding)
415GET_SUBTARGETINFO_MACRO(HasGFX11Insts, false, hasGFX11Insts)
416GET_SUBTARGETINFO_MACRO(HasGFX11_7Insts, false, hasGFX11_7Insts)
417GET_SUBTARGETINFO_MACRO(HasGFX1250Insts, false, hasGFX1250Insts)
418GET_SUBTARGETINFO_MACRO(HasGFX12Insts, false, hasGFX12Insts)
419GET_SUBTARGETINFO_MACRO(HasGFX13Insts, false, hasGFX13Insts)
420GET_SUBTARGETINFO_MACRO(HasGFX7GFX8GFX9Insts, false, hasGFX7GFX8GFX9Insts)
421GET_SUBTARGETINFO_MACRO(HasGFX8Insts, false, hasGFX8Insts)
422GET_SUBTARGETINFO_MACRO(HasGFX90AInsts, false, hasGFX90AInsts)
423GET_SUBTARGETINFO_MACRO(HasGFX940Insts, false, hasGFX940Insts)
424GET_SUBTARGETINFO_MACRO(HasGFX950Insts, false, hasGFX950Insts)
425GET_SUBTARGETINFO_MACRO(HasGFX9Insts, false, hasGFX9Insts)
426GET_SUBTARGETINFO_MACRO(HasGWS, false, hasGWS)
427GET_SUBTARGETINFO_MACRO(HasGetWaveIdInst, false, hasGetWaveIdInst)
428GET_SUBTARGETINFO_MACRO(HasGloballyAddressableScratch, false, hasGloballyAddressableScratch)
429GET_SUBTARGETINFO_MACRO(HasHalfRate64Ops, false, hasHalfRate64Ops)
430GET_SUBTARGETINFO_MACRO(HasIEEEMinimumMaximumInsts, false, hasIEEEMinimumMaximumInsts)
431GET_SUBTARGETINFO_MACRO(HasImageGather4D16Bug, false, hasImageGather4D16Bug)
432GET_SUBTARGETINFO_MACRO(HasImageInsts, false, hasImageInsts)
433GET_SUBTARGETINFO_MACRO(HasImageStoreD16Bug, false, hasImageStoreD16Bug)
434GET_SUBTARGETINFO_MACRO(HasInstFwdPrefetchBug, false, hasInstFwdPrefetchBug)
435GET_SUBTARGETINFO_MACRO(HasIntClamp, false, hasIntClamp)
436GET_SUBTARGETINFO_MACRO(HasInv2PiInlineImm, false, hasInv2PiInlineImm)
437GET_SUBTARGETINFO_MACRO(HasKernargPreload, false, hasKernargPreload)
438GET_SUBTARGETINFO_MACRO(HasLDSMisalignedBug, false, hasLDSMisalignedBug)
439GET_SUBTARGETINFO_MACRO(HasLdsBarrierArriveAtomic, false, hasLdsBarrierArriveAtomic)
440GET_SUBTARGETINFO_MACRO(HasLdsBranchVmemWARHazard, false, hasLdsBranchVmemWARHazard)
441GET_SUBTARGETINFO_MACRO(HasLerpInst, false, hasLerpInst)
442GET_SUBTARGETINFO_MACRO(HasLshlAddU64Inst, false, hasLshlAddU64Inst)
443GET_SUBTARGETINFO_MACRO(HasMADIntraFwdBug, false, hasMADIntraFwdBug)
444GET_SUBTARGETINFO_MACRO(HasMAIInsts, false, hasMAIInsts)
445GET_SUBTARGETINFO_MACRO(HasMFMAInlineLiteralBug, false, hasMFMAInlineLiteralBug)
446GET_SUBTARGETINFO_MACRO(HasMIMG_R128, false, hasMIMG_R128)
447GET_SUBTARGETINFO_MACRO(HasMSAALoadDstSelBug, false, hasMSAALoadDstSelBug)
448GET_SUBTARGETINFO_MACRO(HasMadMacF32Insts, false, hasMadMacF32Insts)
449GET_SUBTARGETINFO_MACRO(HasMadMixInsts, false, hasMadMixInsts)
450GET_SUBTARGETINFO_MACRO(HasMadU32Inst, false, hasMadU32Inst)
451GET_SUBTARGETINFO_MACRO(HasMcastLoadInsts, false, hasMcastLoadInsts)
452GET_SUBTARGETINFO_MACRO(HasMemoryAtomicFaddF32DenormalSupport, false, hasMemoryAtomicFaddF32DenormalSupport)
453GET_SUBTARGETINFO_MACRO(HasMin3Max3PKF16, false, hasMin3Max3PKF16)
454GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F16, false, hasMinimum3Maximum3F16)
455GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F32, false, hasMinimum3Maximum3F32)
456GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3PKF16, false, hasMinimum3Maximum3PKF16)
457GET_SUBTARGETINFO_MACRO(HasMovrel, false, hasMovrel)
458GET_SUBTARGETINFO_MACRO(HasNSAClauseBug, false, hasNSAClauseBug)
459GET_SUBTARGETINFO_MACRO(HasNSAEncoding, false, hasNSAEncoding)
460GET_SUBTARGETINFO_MACRO(HasNSAtoVMEMBug, false, hasNSAtoVMEMBug)
461GET_SUBTARGETINFO_MACRO(HasNegativeScratchOffsetBug, false, hasNegativeScratchOffsetBug)
462GET_SUBTARGETINFO_MACRO(HasNegativeUnalignedScratchOffsetBug, false, hasNegativeUnalignedScratchOffsetBug)
463GET_SUBTARGETINFO_MACRO(HasNoDataDepHazard, false, hasNoDataDepHazard)
464GET_SUBTARGETINFO_MACRO(HasNoSdstCMPX, false, hasNoSdstCMPX)
465GET_SUBTARGETINFO_MACRO(HasOffset3fBug, false, hasOffset3fBug)
466GET_SUBTARGETINFO_MACRO(HasPackedFP32Ops, false, hasPackedFP32Ops)
467GET_SUBTARGETINFO_MACRO(HasPackedTID, false, hasPackedTID)
468GET_SUBTARGETINFO_MACRO(HasPartialNSAEncoding, false, hasPartialNSAEncoding)
469GET_SUBTARGETINFO_MACRO(HasPermlane16Swap, false, hasPermlane16Swap)
470GET_SUBTARGETINFO_MACRO(HasPermlane32Swap, false, hasPermlane32Swap)
471GET_SUBTARGETINFO_MACRO(HasPkAddMinMaxInsts, false, hasPkAddMinMaxInsts)
472GET_SUBTARGETINFO_MACRO(HasPkFmacF16Inst, false, hasPkFmacF16Inst)
473GET_SUBTARGETINFO_MACRO(HasPointSampleAccel, false, hasPointSampleAccel)
474GET_SUBTARGETINFO_MACRO(HasPrivEnabledTrap2NopBug, false, hasPrivEnabledTrap2NopBug)
475GET_SUBTARGETINFO_MACRO(HasPrngInst, false, hasPrngInst)
476GET_SUBTARGETINFO_MACRO(HasPseudoScalarTrans, false, hasPseudoScalarTrans)
477GET_SUBTARGETINFO_MACRO(HasQsadInsts, false, hasQsadInsts)
478GET_SUBTARGETINFO_MACRO(HasR128A16, false, hasR128A16)
479GET_SUBTARGETINFO_MACRO(HasRelaxedBufferOOBMode, false, hasRelaxedBufferOOBMode)
480GET_SUBTARGETINFO_MACRO(HasRequiredExportPriority, false, hasRequiredExportPriority)
481GET_SUBTARGETINFO_MACRO(HasRestrictedSOffset, false, hasRestrictedSOffset)
482GET_SUBTARGETINFO_MACRO(HasSALUFloatInsts, false, hasSALUFloatInsts)
483GET_SUBTARGETINFO_MACRO(HasSALUMinimumMaximumInsts, false, hasSALUMinimumMaximumInsts)
484GET_SUBTARGETINFO_MACRO(HasSBarrierLeaveImm, false, hasSBarrierLeaveImm)
485GET_SUBTARGETINFO_MACRO(HasSDWA, false, hasSDWA)
486GET_SUBTARGETINFO_MACRO(HasSDWAMac, false, hasSDWAMac)
487GET_SUBTARGETINFO_MACRO(HasSDWAOmod, false, hasSDWAOmod)
488GET_SUBTARGETINFO_MACRO(HasSDWAOutModsVOPC, false, hasSDWAOutModsVOPC)
489GET_SUBTARGETINFO_MACRO(HasSDWAScalar, false, hasSDWAScalar)
490GET_SUBTARGETINFO_MACRO(HasSDWASdst, false, hasSDWASdst)
491GET_SUBTARGETINFO_MACRO(HasSGPRInitBug, false, hasSGPRInitBug)
492GET_SUBTARGETINFO_MACRO(HasSMEMtoVectorWriteHazard, false, hasSMEMtoVectorWriteHazard)
493GET_SUBTARGETINFO_MACRO(HasSMemRealTime, false, hasSMemRealTime)
494GET_SUBTARGETINFO_MACRO(HasSMemTimeInst, false, hasSMemTimeInst)
495GET_SUBTARGETINFO_MACRO(HasSWakeupBarrier, false, hasSWakeupBarrier)
496GET_SUBTARGETINFO_MACRO(HasSWakeupImm, false, hasSWakeupImm)
497GET_SUBTARGETINFO_MACRO(HasSadInsts, false, hasSadInsts)
498GET_SUBTARGETINFO_MACRO(HasSafeCUPrefetch, false, hasSafeCUPrefetch)
499GET_SUBTARGETINFO_MACRO(HasSafeSmemPrefetch, false, hasSafeSmemPrefetch)
500GET_SUBTARGETINFO_MACRO(HasScalarAtomics, false, hasScalarAtomics)
501GET_SUBTARGETINFO_MACRO(HasScalarDwordx3Loads, false, hasScalarDwordx3Loads)
502GET_SUBTARGETINFO_MACRO(HasScalarFlatScratchInsts, false, hasScalarFlatScratchInsts)
503GET_SUBTARGETINFO_MACRO(HasScalarStores, false, hasScalarStores)
504GET_SUBTARGETINFO_MACRO(HasSetPrioIncWgInst, false, hasSetPrioIncWgInst)
505GET_SUBTARGETINFO_MACRO(HasSetregVGPRMSBFixup, false, hasSetregVGPRMSBFixup)
506GET_SUBTARGETINFO_MACRO(HasShaderCyclesHiLoRegisters, false, hasShaderCyclesHiLoRegisters)
507GET_SUBTARGETINFO_MACRO(HasShaderCyclesRegister, false, hasShaderCyclesRegister)
508GET_SUBTARGETINFO_MACRO(HasTanhInsts, false, hasTanhInsts)
509GET_SUBTARGETINFO_MACRO(HasTensorCvtLutInsts, false, hasTensorCvtLutInsts)
510GET_SUBTARGETINFO_MACRO(HasTransposeLoadF4F6Insts, false, hasTransposeLoadF4F6Insts)
511GET_SUBTARGETINFO_MACRO(HasTrapHandler, false, hasTrapHandler)
512GET_SUBTARGETINFO_MACRO(HasTrigReducedRange, false, hasTrigReducedRange)
513GET_SUBTARGETINFO_MACRO(HasTrue16BitInsts, false, hasTrue16BitInsts)
514GET_SUBTARGETINFO_MACRO(HasUnalignedAccessMode, false, hasUnalignedAccessMode)
515GET_SUBTARGETINFO_MACRO(HasUnalignedBufferAccess, false, hasUnalignedBufferAccess)
516GET_SUBTARGETINFO_MACRO(HasUnalignedDSAccess, false, hasUnalignedDSAccess)
517GET_SUBTARGETINFO_MACRO(HasUnalignedScratchAccess, false, hasUnalignedScratchAccess)
518GET_SUBTARGETINFO_MACRO(HasUnpackedD16VMem, false, hasUnpackedD16VMem)
519GET_SUBTARGETINFO_MACRO(HasUserSGPRInit16Bug, false, hasUserSGPRInit16Bug)
520GET_SUBTARGETINFO_MACRO(HasVALUTransUseHazard, false, hasVALUTransUseHazard)
521GET_SUBTARGETINFO_MACRO(HasVGPRIndexMode, false, hasVGPRIndexMode)
522GET_SUBTARGETINFO_MACRO(HasVMEMtoScalarWriteHazard, false, hasVMEMtoScalarWriteHazard)
523GET_SUBTARGETINFO_MACRO(HasVMemToLDSLoad, false, hasVMemToLDSLoad)
524GET_SUBTARGETINFO_MACRO(HasVOP3Literal, false, hasVOP3Literal)
525GET_SUBTARGETINFO_MACRO(HasVOP3PInsts, false, hasVOP3PInsts)
526GET_SUBTARGETINFO_MACRO(HasVOPDInsts, false, hasVOPDInsts)
527GET_SUBTARGETINFO_MACRO(HasVcmpxExecWARHazard, false, hasVcmpxExecWARHazard)
528GET_SUBTARGETINFO_MACRO(HasVcmpxPermlaneHazard, false, hasVcmpxPermlaneHazard)
529GET_SUBTARGETINFO_MACRO(HasVmemPrefInsts, false, hasVmemPrefInsts)
530GET_SUBTARGETINFO_MACRO(HasVmemWriteVgprInOrder, false, hasVmemWriteVgprInOrder)
531GET_SUBTARGETINFO_MACRO(HasVscnt, false, hasVscnt)
532GET_SUBTARGETINFO_MACRO(HasWMMA128bInsts, false, hasWMMA128bInsts)
533GET_SUBTARGETINFO_MACRO(HasWMMA256bInsts, false, hasWMMA256bInsts)
534GET_SUBTARGETINFO_MACRO(HasWaitXcnt, false, hasWaitXcnt)
535GET_SUBTARGETINFO_MACRO(HasXF32Insts, false, hasXF32Insts)
536GET_SUBTARGETINFO_MACRO(RequiresAlignVGPR, false, requiresAlignVGPR)
537GET_SUBTARGETINFO_MACRO(RequiresCOV6, false, requiresCOV6)
538GET_SUBTARGETINFO_MACRO(RequiresWaitsBeforeSystemScopeStores, false, requiresWaitsBeforeSystemScopeStores)
539GET_SUBTARGETINFO_MACRO(SupportsSRAMECC, false, supportsSRAMECC)
540GET_SUBTARGETINFO_MACRO(SupportsXNACK, false, supportsXNACK)
541GET_SUBTARGETINFO_MACRO(UseAddPC64Inst, false, useAddPC64Inst)
542GET_SUBTARGETINFO_MACRO(UseBlockVGPROpsForCSR, false, useBlockVGPROpsForCSR)
543GET_SUBTARGETINFO_MACRO(UseFlatForGlobal, false, useFlatForGlobal)
544
545#undef GET_SUBTARGETINFO_MACRO
546#endif // GET_SUBTARGETINFO_MACRO
547
548#ifdef GET_SUBTARGETINFO_MC_DESC
549#undef GET_SUBTARGETINFO_MC_DESC
550
551namespace llvm {
552
553// Sorted (by key) array of values for CPU features.
554extern const llvm::SubtargetFeatureKV AMDGPUFeatureKV[] = {
555 { "1024-addressable-vgprs", "Has 1024 addressable VGPRs", AMDGPU::Feature1024AddressableVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
556 { "16-bit-insts", "Has i16/f16 instructions", AMDGPU::Feature16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
557 { "45-bit-num-records-buffer-resource", "The buffer resource (V#) supports 45-bit num_records", AMDGPU::Feature45BitNumRecordsBufferResource, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
558 { "64-bit-literals", "Can use 64-bit literals with single DWORD instructions", AMDGPU::Feature64BitLiterals, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
559 { "a16", "Support A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands", AMDGPU::FeatureA16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
560 { "add-min-max-insts", "Has v_add_{min|max}_{i|u}32 instructions", AMDGPU::FeatureAddMinMaxInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
561 { "add-no-carry-insts", "Have VALU add/sub instructions without carry out", AMDGPU::FeatureAddNoCarryInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
562 { "add-sub-u64-insts", "Has v_add_u64 and v_sub_u64 instructions", AMDGPU::FeatureAddSubU64Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
563 { "addressablelocalmemorysize163840", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize163840, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
564 { "addressablelocalmemorysize32768", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize32768, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
565 { "addressablelocalmemorysize327680", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize327680, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
566 { "addressablelocalmemorysize65536", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize65536, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
567 { "agent-scope-fine-grained-remote-memory-atomics", "Agent (device) scoped atomic operations, excluding those directly supported by PCIe (i.e. integer atomic add, exchange, and compare-and-swap), are functional for allocations in host or peer device memory.", AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
568 { "allocate1_5xvgprs", "Has 50% more physical VGPRs and 50% larger allocation granule", AMDGPU::Feature1_5xVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
569 { "aperture-regs", "Has Memory Aperture Base and Size Registers", AMDGPU::FeatureApertureRegs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
570 { "architected-flat-scratch", "Flat Scratch register is a readonly SPI initialized architected register", AMDGPU::FeatureArchitectedFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
571 { "architected-sgprs", "Enable the architected SGPRs", AMDGPU::FeatureArchitectedSGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
572 { "ashr-pk-insts", "Has Arithmetic Shift Pack instructions", AMDGPU::FeatureAshrPkInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
573 { "assembler-permissive-wavesize", "Allow parsing wave32 and wave64 variants of instructions", AMDGPU::FeatureAssemblerPermissiveWavesize, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
574 { "atomic-buffer-global-pk-add-f16-insts", "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that can return original value", AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts, { { { 0x0ULL, 0x800000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
575 { "atomic-buffer-global-pk-add-f16-no-rtn-insts", "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that don't return original value", AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts, { { { 0x0ULL, 0x800000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
576 { "atomic-buffer-pk-add-bf16-inst", "Has buffer_atomic_pk_add_bf16 instruction", AMDGPU::FeatureAtomicBufferPkAddBF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
577 { "atomic-csub-no-rtn-insts", "Has buffer_atomic_csub and global_atomic_csub instructions that don't return original value", AMDGPU::FeatureAtomicCSubNoRtnInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
578 { "atomic-ds-pk-add-16-insts", "Has ds_pk_add_bf16, ds_pk_add_f16, ds_pk_add_rtn_bf16, ds_pk_add_rtn_f16 instructions", AMDGPU::FeatureAtomicDsPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
579 { "atomic-fadd-no-rtn-insts", "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that don't return original value", AMDGPU::FeatureAtomicFaddNoRtnInsts, { { { 0x0ULL, 0x800000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
580 { "atomic-fadd-rtn-insts", "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that return original value", AMDGPU::FeatureAtomicFaddRtnInsts, { { { 0x0ULL, 0x800000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
581 { "atomic-flat-pk-add-16-insts", "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions", AMDGPU::FeatureAtomicFlatPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
582 { "atomic-fmin-fmax-flat-f32", "Has flat memory instructions for atomicrmw fmin/fmax for float", AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts, { { { 0x0ULL, 0x80000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
583 { "atomic-fmin-fmax-flat-f64", "Has flat memory instructions for atomicrmw fmin/fmax for double", AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts, { { { 0x0ULL, 0x80000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
584 { "atomic-fmin-fmax-global-f32", "Has global/buffer instructions for atomicrmw fmin/fmax for float", AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
585 { "atomic-fmin-fmax-global-f64", "Has global/buffer instructions for atomicrmw fmin/fmax for float", AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
586 { "atomic-global-pk-add-bf16-inst", "Has global_atomic_pk_add_bf16 instruction", AMDGPU::FeatureAtomicGlobalPkAddBF16Inst, { { { 0x0ULL, 0x800000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
587 { "auto-waitcnt-before-barrier", "Hardware automatically inserts waitcnt before barrier", AMDGPU::FeatureAutoWaitcntBeforeBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
588 { "back-off-barrier", "Hardware supports backing off s_barrier if an exception occurs", AMDGPU::FeatureBackOffBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
589 { "bf16-cvt-insts", "Has bf16 conversion instructions", AMDGPU::FeatureBF16ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
590 { "bf16-pk-insts", "Has bf16 packed instructions (fma, add, mul, max, min)", AMDGPU::FeatureBF16PackedInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
591 { "bf16-trans-insts", "Has bf16 transcendental instructions", AMDGPU::FeatureBF16TransInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
592 { "bf8-cvt-scale-insts", "Has bf8 conversion scale instructions", AMDGPU::FeatureBF8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
593 { "bitop3-insts", "Has v_bitop3_b32/v_bitop3_b16 instructions", AMDGPU::FeatureBitOp3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
594 { "block-vgpr-csr", "Use block load/store for VGPR callee saved registers", AMDGPU::FeatureUseBlockVGPROpsForCSR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
595 { "bvh-dual-bvh-8-insts", "Has image_bvh_dual_intersect_ray and image_bvh8_intersect_ray instructions", AMDGPU::FeatureBVHDualAndBVH8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
596 { "ci-insts", "Additional instructions for CI+", AMDGPU::FeatureCIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
597 { "clusters", "Has clusters of workgroups support", AMDGPU::FeatureClusters, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
598 { "cube-insts", "Has v_cube* instructions", AMDGPU::FeatureCubeInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
599 { "cumode", "Enable CU wavefront execution mode", AMDGPU::FeatureCuMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
600 { "cvt-fp8-vop1-bug", "FP8/BF8 VOP1 form of conversion to F32 is unreliable", AMDGPU::FeatureCvtFP8VOP1Bug, { { { 0x0ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
601 { "cvt-norm-insts", "Has v_cvt_norm* instructions", AMDGPU::FeatureCvtNormInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
602 { "cvt-pk-f16-f32-inst", "Has cvt_pk_f16_f32 instruction", AMDGPU::FeatureCvtPkF16F32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
603 { "cvt-pknorm-vop2-insts", "Has v_cvt_pk_norm_*f32 instructions/Has v_cvt_pk_norm_*_f16 instructions", AMDGPU::FeatureCvtPkNormVOP2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
604 { "cvt-pknorm-vop3-insts", "Has v_cvt_pk_norm_*f32 instructions/Has v_cvt_pk_norm_*_f16 instructions", AMDGPU::FeatureCvtPkNormVOP3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
605 { "d16-write-vgpr32", "D16 instructions potentially have 32-bit data dependencies", AMDGPU::FeatureD16Writes32BitVgpr, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
606 { "default-component-broadcast", "BUFFER/IMAGE store instructions set unspecified components to x component (GFX12)", AMDGPU::FeatureDefaultComponentBroadcast, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
607 { "default-component-zero", "BUFFER/IMAGE store instructions set unspecified components to zero (before GFX12)", AMDGPU::FeatureDefaultComponentZero, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
608 { "dl-insts", "Has v_fmac_f32 and v_xnor_b32 instructions", AMDGPU::FeatureDLInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
609 { "dot1-insts", "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", AMDGPU::FeatureDot1Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
610 { "dot10-insts", "Has v_dot2_f32_f16 instruction", AMDGPU::FeatureDot10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
611 { "dot11-insts", "Has v_dot4_f32_fp8_fp8, v_dot4_f32_fp8_bf8, v_dot4_f32_bf8_fp8, v_dot4_f32_bf8_bf8 instructions", AMDGPU::FeatureDot11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
612 { "dot12-insts", "Has v_dot2_f32_bf16 instructions", AMDGPU::FeatureDot12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
613 { "dot13-insts", "Has v_dot2c_f32_bf16 instructions", AMDGPU::FeatureDot13Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
614 { "dot2-insts", "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions", AMDGPU::FeatureDot2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
615 { "dot3-insts", "Has v_dot8c_i32_i4 instruction", AMDGPU::FeatureDot3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
616 { "dot4-insts", "Has v_dot2c_i32_i16 instruction", AMDGPU::FeatureDot4Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
617 { "dot5-insts", "Has v_dot2c_f32_f16 instruction", AMDGPU::FeatureDot5Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
618 { "dot6-insts", "Has v_dot4c_i32_i8 instruction", AMDGPU::FeatureDot6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
619 { "dot7-insts", "Has v_dot4_u32_u8, v_dot8_u32_u4 instructions", AMDGPU::FeatureDot7Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
620 { "dot8-insts", "Has v_dot4_i32_iu8, v_dot8_i32_iu4 instructions", AMDGPU::FeatureDot8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
621 { "dot9-insts", "Has v_dot2_f16_f16, v_dot2_bf16_bf16 instructions", AMDGPU::FeatureDot9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
622 { "dpp", "Support DPP (Data Parallel Primitives) extension", AMDGPU::FeatureDPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
623 { "dpp-64bit", "Support DPP (Data Parallel Primitives) extension in DP ALU", AMDGPU::FeatureDPALU_DPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
624 { "dpp-row-bcast", "Support DPP row_bcast15/row_bcast31", AMDGPU::FeatureDPPBroadcasts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
625 { "dpp-src1-sgpr", "Support SGPR for Src1 of DPP instructions", AMDGPU::FeatureDPPSrc1SGPR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
626 { "dpp-wavefront-shifts", "Support DPP wave_shl/wave_rol/wave_shr/wave_ror", AMDGPU::FeatureDPPWavefrontShifts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
627 { "dpp8", "Support DPP8 (Data Parallel Primitives) extension", AMDGPU::FeatureDPP8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
628 { "ds-src2-insts", "Has ds_*_src2 instructions", AMDGPU::FeatureDsSrc2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
629 { "dumpcode", "Dump MachineInstrs in the CodeEmitter", AMDGPU::FeatureDumpCodeLower, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
630 { "dx10-clamp-and-ieee-mode", "Target has DX10_CLAMP and IEEE_MODE kernel descriptor bits", AMDGPU::FeatureDX10ClampAndIEEEMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
631 { "emulated-system-scope-atomics", "System scope atomics unsupported by the PCI-e are emulated in HW via CAS loop and functional.", AMDGPU::FeatureEmulatedSystemScopeAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
632 { "enable-ds128", "Use ds_{read|write}_b128", AMDGPU::FeatureEnableDS128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
633 { "enable-flat-scratch", "Use scratch_* flat memory instructions to access scratch", AMDGPU::FeatureEnableFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
634 { "enable-prt-strict-null", "Enable zeroing of result registers for sparse texture fetches", AMDGPU::FeatureEnablePRTStrictNull, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
635 { "extended-image-insts", "Support mips != 0, lod != 0, gather4, and get_lod", AMDGPU::FeatureExtendedImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
636 { "f16bf16-to-fp6bf6-cvt-scale-insts", "Has f16bf16 to fp6bf6 conversion scale instructions", AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
637 { "f32-to-f16bf16-cvt-sr-insts", "Has f32 to f16bf16 conversion scale instructions", AMDGPU::FeatureF32ToF16BF16ConversionSRInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
638 { "fast-denormal-f32", "Enabling denormals does not cause f32 instructions to run at f64 rates", AMDGPU::FeatureFastDenormalF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
639 { "fast-fmaf", "Assuming f32 fma is at least as fast as mul + add", AMDGPU::FeatureFastFMAF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
640 { "flat-address-space", "Support flat address space", AMDGPU::FeatureFlatAddressSpace, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
641 { "flat-atomic-fadd-f32-inst", "Has flat_atomic_add_f32 instruction", AMDGPU::FeatureFlatAtomicFaddF32Inst, { { { 0x0ULL, 0x80000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
642 { "flat-buffer-global-fadd-f64-inst", "Has flat, buffer, and global instructions for f64 atomic fadd", AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
643 { "flat-for-global", "Force to generate flat instruction for global", AMDGPU::FeatureUseFlatForGlobal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
644 { "flat-global-insts", "Have global_* flat memory instructions", AMDGPU::FeatureFlatGlobalInsts, { { { 0x0ULL, 0x80000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
645 { "flat-gvs-mode", "Have GVS addressing mode with flat_* instructions", AMDGPU::FeatureFlatGVSMode, { { { 0x0ULL, 0x80000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
646 { "flat-inst-offsets", "Flat instructions have immediate offset addressing mode", AMDGPU::FeatureFlatInstOffsets, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
647 { "flat-offset-bits-12", "Number of bits for flat offset encoding", AMDGPU::FeatureFlatOffsetBits12, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
648 { "flat-offset-bits-24", "Number of bits for flat offset encoding", AMDGPU::FeatureFlatOffsetBits24, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
649 { "flat-scratch-insts", "Have scratch_* flat memory instructions", AMDGPU::FeatureFlatScratchInsts, { { { 0x0ULL, 0x80000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
650 { "flat-segment-offset-bug", "GFX10 bug where inst_offset is ignored when flat instructions access global memory", AMDGPU::FeatureFlatSegmentOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
651 { "flat-signed-offset", "Immediate offset of FLAT instructions are always signed", AMDGPU::FeatureFlatSignedOffset, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
652 { "fma-mix-bf16-insts", "Has v_fma_mix_f32_bf16, v_fma_mixlo_bf16, v_fma_mixhi_bf16 instructions", AMDGPU::FeatureFmaMixBF16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
653 { "fma-mix-insts", "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", AMDGPU::FeatureFmaMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
654 { "fmacf64-inst", "Has v_fmac_f64 instruction", AMDGPU::FeatureFmacF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
655 { "fmaf", "Enable single precision FMA (not as fast as mul+add, but fused)", AMDGPU::FeatureFMA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
656 { "fp4-cvt-scale-insts", "Has fp4 conversion scale instructions", AMDGPU::FeatureFP4ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
657 { "fp64", "Enable double precision operations", AMDGPU::FeatureFP64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
658 { "fp6bf6-cvt-scale-insts", "Has fp6 and bf6 conversion scale instructions", AMDGPU::FeatureFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
659 { "fp8-conversion-insts", "Has fp8 and bf8 conversion instructions", AMDGPU::FeatureFP8ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
660 { "fp8-cvt-scale-insts", "Has fp8 conversion scale instructions", AMDGPU::FeatureFP8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
661 { "fp8-insts", "Has fp8 and bf8 instructions", AMDGPU::FeatureFP8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
662 { "fp8e5m3-insts", "Has fp8 e5m3 format support", AMDGPU::FeatureFP8E5M3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
663 { "full-rate-64-ops", "Most fp64 instructions are full rate", AMDGPU::FeatureFullRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
664 { "g16", "Support G16 for 16-bit gradient image operands", AMDGPU::FeatureG16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
665 { "gcn3-encoding", "Encoding format for VI", AMDGPU::FeatureGCN3Encoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
666 { "gds", "Has Global Data Share", AMDGPU::FeatureGDS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
667 { "get-wave-id-inst", "Has s_get_waveid_in_workgroup instruction", AMDGPU::FeatureGetWaveIdInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
668 { "gfx10", "GFX10 GPU generation", AMDGPU::FeatureGFX10, { { { 0xa31a9000f0044a2ULL, 0x5548b8f0040000ULL, 0x1018200821032820ULL, 0x700e00000466a004ULL, 0x28ULL, 0x0ULL, } } } },
669 { "gfx10-3-insts", "Additional instructions for GFX10.3", AMDGPU::FeatureGFX10_3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
670 { "gfx10-insts", "Additional instructions for GFX10+", AMDGPU::FeatureGFX10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
671 { "gfx10_a-encoding", "Has BVH ray tracing instructions", AMDGPU::FeatureGFX10_AEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
672 { "gfx10_b-encoding", "Encoding format GFX10_B", AMDGPU::FeatureGFX10_BEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
673 { "gfx11", "GFX11 GPU generation", AMDGPU::FeatureGFX11, { { { 0x831a900030044a2ULL, 0xbd54898f0040000ULL, 0x1018200421034020ULL, 0xe00e800004000004ULL, 0x28ULL, 0x0ULL, } } } },
674 { "gfx11-7-insts", "Additional instructions for GFX11.7", AMDGPU::FeatureGFX11_7Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
675 { "gfx11-insts", "Additional instructions for GFX11+", AMDGPU::FeatureGFX11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
676 { "gfx12", "GFX12 GPU generation", AMDGPU::FeatureGFX12, { { { 0x4300100030060a2ULL, 0x4bd44ad8f0000000ULL, 0x10182c0420034200ULL, 0xe00e800000000800ULL, 0x20ULL, 0x0ULL, } } } },
677 { "gfx12-insts", "Additional instructions for GFX12+", AMDGPU::FeatureGFX12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
678 { "gfx1250-insts", "Additional instructions for GFX1250+", AMDGPU::FeatureGFX1250Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
679 { "gfx13", "GFX13 GPU generation", AMDGPU::FeatureGFX13, { { { 0x4300100030060a2ULL, 0x4bd44ad8f0000000ULL, 0x10182c0420034a01ULL, 0xe00e800000000800ULL, 0x20ULL, 0x0ULL, } } } },
680 { "gfx13-insts", "Additional instructions for GFX13+", AMDGPU::FeatureGFX13Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x2001000ULL, 0x0ULL, 0x0ULL, } } } },
681 { "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", AMDGPU::FeatureGFX7GFX8GFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
682 { "gfx8-insts", "Additional instructions for GFX8+", AMDGPU::FeatureGFX8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
683 { "gfx9", "GFX9 GPU generation", AMDGPU::FeatureGFX9, { { { 0xb51a900000040a2ULL, 0x168098f0000000ULL, 0x2000001032020ULL, 0x540e0101a466a00cULL, 0x1008ULL, 0x0ULL, } } } },
684 { "gfx9-insts", "Additional instructions for GFX9+", AMDGPU::FeatureGFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
685 { "gfx90a-insts", "Additional instructions for GFX90A+", AMDGPU::FeatureGFX90AInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
686 { "gfx940-insts", "Additional instructions for GFX940+", AMDGPU::FeatureGFX940Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
687 { "gfx950-insts", "Additional instructions for GFX950+", AMDGPU::FeatureGFX950Insts, { { { 0x400200020000ULL, 0x2d80000ULL, 0x600180000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
688 { "globally-addressable-scratch", "FLAT instructions can access scratch memory for any thread in any wave", AMDGPU::FeatureGloballyAddressableScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
689 { "gws", "Has Global Wave Sync", AMDGPU::FeatureGWS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
690 { "half-rate-64-ops", "Most fp64 instructions are half rate instead of quarter", AMDGPU::FeatureHalfRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
691 { "ieee-minimum-maximum-insts", "Has v_minimum/maximum_f16/f32/f64, v_minimummaximum/maximumminimum_f16/f32 andv_pk_minimum/maximum_f16 instructions", AMDGPU::FeatureIEEEMinimumMaximumInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
692 { "image-gather4-d16-bug", "Image Gather4 D16 hardware bug", AMDGPU::FeatureImageGather4D16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
693 { "image-insts", "Support image instructions", AMDGPU::FeatureImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
694 { "image-store-d16-bug", "Image Store D16 hardware bug", AMDGPU::FeatureImageStoreD16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
695 { "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", AMDGPU::FeatureInstFwdPrefetchBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
696 { "instcachelinesize128", "Instruction cache line size in bytes.", AMDGPU::FeatureInstCacheLineSize128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
697 { "instcachelinesize64", "Instruction cache line size in bytes.", AMDGPU::FeatureInstCacheLineSize64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
698 { "int-clamp-insts", "Support clamp for integer destination", AMDGPU::FeatureIntClamp, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
699 { "inv-2pi-inline-imm", "Has 1 / (2 * pi) as inline immediate", AMDGPU::FeatureInv2PiInlineImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
700 { "kernarg-preload", "Hardware supports preloading of kernel arguments in user SGPRs.", AMDGPU::FeatureKernargPreload, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
701 { "lds-barrier-arrive-atomic", "Has LDS barrier-arrive atomic instructions", AMDGPU::FeatureLdsBarrierArriveAtomic, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
702 { "lds-branch-vmem-war-hazard", "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", AMDGPU::FeatureLdsBranchVmemWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
703 { "lds-misaligned-bug", "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode", AMDGPU::FeatureLDSMisalignedBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
704 { "ldsbankcount16", "The number of LDS banks per compute unit.", AMDGPU::FeatureLDSBankCount16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
705 { "ldsbankcount32", "The number of LDS banks per compute unit.", AMDGPU::FeatureLDSBankCount32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
706 { "lerp-inst", "Has v_lerp_u8 instruction", AMDGPU::FeatureLerpInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
707 { "load-store-opt", "Enable SI load/store optimizer pass", AMDGPU::FeatureEnableLoadStoreOpt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
708 { "lshl-add-u64-inst", "Has v_lshl_add_u64 instruction", AMDGPU::FeatureLshlAddU64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
709 { "mad-intra-fwd-bug", "MAD_U64/I64 intra instruction forwarding bug", AMDGPU::FeatureMADIntraFwdBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
710 { "mad-mac-f32-insts", "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions", AMDGPU::FeatureMadMacF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
711 { "mad-mix-insts", "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", AMDGPU::FeatureMadMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
712 { "mad-u32-inst", "Has v_mad_u32 instruction", AMDGPU::FeatureMadU32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
713 { "mai-insts", "Has mAI instructions", AMDGPU::FeatureMAIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
714 { "max-hard-clause-length-32", "Maximum number of instructions in an explicit S_CLAUSE is 32", AMDGPU::FeatureMaxHardClauseLength32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
715 { "max-hard-clause-length-63", "Maximum number of instructions in an explicit S_CLAUSE is 63", AMDGPU::FeatureMaxHardClauseLength63, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
716 { "max-private-element-size-16", "Maximum private access size may be 16", AMDGPU::FeatureMaxPrivateElementSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
717 { "max-private-element-size-4", "Maximum private access size may be 4", AMDGPU::FeatureMaxPrivateElementSize4, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
718 { "max-private-element-size-8", "Maximum private access size may be 8", AMDGPU::FeatureMaxPrivateElementSize8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
719 { "mcast-load-insts", "Has multicast load instructions", AMDGPU::FeatureMcastLoadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
720 { "memory-atomic-fadd-f32-denormal-support", "global/flat/buffer atomic fadd for float supports denormal handling", AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
721 { "mfma-inline-literal-bug", "MFMA cannot use inline literal as SrcC", AMDGPU::FeatureMFMAInlineLiteralBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
722 { "mimg-r128", "Support 128-bit texture resources", AMDGPU::FeatureMIMG_R128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
723 { "min3-max3-pkf16", "Has v_pk_min3_num_f16 and v_pk_max3_num_f16 instructions", AMDGPU::FeatureMin3Max3PKF16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
724 { "minimum3-maximum3-f16", "Has v_minimum3_f16 and v_maximum3_f16 instructions", AMDGPU::FeatureMinimum3Maximum3F16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
725 { "minimum3-maximum3-f32", "Has v_minimum3_f32 and v_maximum3_f32 instructions", AMDGPU::FeatureMinimum3Maximum3F32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
726 { "minimum3-maximum3-pkf16", "Has v_pk_minimum3_f16 and v_pk_maximum3_f16 instructions", AMDGPU::FeatureMinimum3Maximum3PKF16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
727 { "movrel", "Has v_movrel*_b32 instructions", AMDGPU::FeatureMovrel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
728 { "msaa-load-dst-sel-bug", "MSAA loads not honoring dst_sel bug", AMDGPU::FeatureMSAALoadDstSelBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
729 { "negative-scratch-offset-bug", "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9", AMDGPU::FeatureNegativeScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
730 { "negative-unaligned-scratch-offset-bug", "Scratch instructions with a VGPR offset and a negative immediate offset thatis not a multiple of 4 read wrong memory on GFX10", AMDGPU::FeatureNegativeUnalignedScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
731 { "no-data-dep-hazard", "Does not need SW waitstates", AMDGPU::FeatureNoDataDepHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
732 { "no-sdst-cmpx", "V_CMPX does not write VCC/SGPR in addition to EXEC", AMDGPU::FeatureNoSdstCMPX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
733 { "nsa-clause-bug", "MIMG-NSA in a hard clause has unpredictable results on GFX10.1", AMDGPU::FeatureNSAClauseBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
734 { "nsa-encoding", "Support NSA encoding for image instructions", AMDGPU::FeatureNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
735 { "nsa-to-vmem-bug", "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", AMDGPU::FeatureNSAtoVMEMBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
736 { "offset-3f-bug", "Branch offset of 3f hardware bug", AMDGPU::FeatureOffset3fBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
737 { "packed-fp32-ops", "Support packed fp32 instructions", AMDGPU::FeaturePackedFP32Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
738 { "packed-tid", "Workitem IDs are packed into v0 at kernel launch", AMDGPU::FeaturePackedTID, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
739 { "partial-nsa-encoding", "Support partial NSA encoding for image instructions", AMDGPU::FeaturePartialNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
740 { "permlane16-swap", "Has v_permlane16_swap_b32 instructions", AMDGPU::FeaturePermlane16Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
741 { "permlane32-swap", "Has v_permlane32_swap_b32 instructions", AMDGPU::FeaturePermlane32Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
742 { "pk-add-min-max-insts", "Has v_pk_add_{min|max}_{i|u}16 instructions", AMDGPU::FeaturePkAddMinMaxInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
743 { "pk-fmac-f16-inst", "Has v_pk_fmac_f16 instruction", AMDGPU::FeaturePkFmacF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
744 { "point-sample-accel", "Has point sample acceleration feature", AMDGPU::FeaturePointSampleAccel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
745 { "precise-memory", "Enable precise memory mode", AMDGPU::FeaturePreciseMemory, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
746 { "priv-enabled-trap2-nop-bug", "Hardware that runs with PRIV=1 interpreting 's_trap 2' as a nop bug", AMDGPU::FeaturePrivEnabledTrap2NopBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
747 { "prng-inst", "Has v_prng_b32 instruction", AMDGPU::FeaturePrngInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
748 { "pseudo-scalar-trans", "Has Pseudo Scalar Transcendental instructions", AMDGPU::FeaturePseudoScalarTrans, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
749 { "qsad-insts", "Has v_qsad* instructions", AMDGPU::FeatureQsadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
750 { "r128-a16", "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128", AMDGPU::FeatureR128A16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
751 { "real-true16", "Use true 16-bit registers", AMDGPU::FeatureRealTrue16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
752 { "relaxed-buffer-oob-mode", "Disable strict out-of-bounds buffer guarantees. An OOB access may potentiallycause an adjacent access to be treated as if it were also OOB", AMDGPU::FeatureRelaxedBufferOOBMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
753 { "required-export-priority", "Export priority must be explicitly manipulated on GFX11.5", AMDGPU::FeatureRequiredExportPriority, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
754 { "requires-cov6", "Target Requires Code Object V6", AMDGPU::FeatureRequiresCOV6, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
755 { "restricted-soffset", "Has restricted SOffset (immediate not supported).", AMDGPU::FeatureRestrictedSOffset, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
756 { "s-barrier-leave-imm", "s_barrier_leave takes an immediate operand", AMDGPU::FeatureSBarrierLeaveImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
757 { "s-memrealtime", "Has s_memrealtime instruction", AMDGPU::FeatureSMemRealTime, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
758 { "s-memtime-inst", "Has s_memtime instruction", AMDGPU::FeatureSMemTimeInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
759 { "s-wakeup-barrier-inst", "Has s_wakeup_barrier instruction.", AMDGPU::FeatureSWakeupBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
760 { "s-wakeup-imm", "s_wakeup takes an immediate operand", AMDGPU::FeatureSWakeupImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
761 { "sad-insts", "Has v_sad* instructions", AMDGPU::FeatureSadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
762 { "safe-cu-prefetch", "VMEM CU scope prefetches do not fail on illegal address", AMDGPU::FeatureSafeCUPrefetch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
763 { "safe-smem-prefetch", "SMEM prefetches do not fail on illegal address", AMDGPU::FeatureSafeSmemPrefetch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
764 { "salu-float", "Has SALU floating point instructions", AMDGPU::FeatureSALUFloatInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
765 { "salu-minimum-maximum-insts", "Has s_minimum/maximum_f16/f32 instructions", AMDGPU::FeatureSALUMinimumMaximumInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
766 { "scalar-atomics", "Has atomic scalar memory instructions", AMDGPU::FeatureScalarAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
767 { "scalar-dwordx3-loads", "Has 96-bit scalar load instructions", AMDGPU::FeatureScalarDwordx3Loads, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
768 { "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", AMDGPU::FeatureScalarFlatScratchInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
769 { "scalar-stores", "Has store scalar memory instructions", AMDGPU::FeatureScalarStores, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
770 { "sdwa", "Support SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
771 { "sdwa-mav", "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAMac, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
772 { "sdwa-omod", "Support OMod with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAOmod, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
773 { "sdwa-out-mods-vopc", "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAOutModsVOPC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
774 { "sdwa-scalar", "Support scalar register with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAScalar, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
775 { "sdwa-sdst", "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWASdst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
776 { "sea-islands", "SEA_ISLANDS GPU generation", AMDGPU::FeatureSeaIslands, { { { 0xa0089000f000400ULL, 0x3000090040200ULL, 0x2000a1002820ULL, 0x2400004400004ULL, 0x1008ULL, 0x0ULL, } } } },
777 { "setprio-inc-wg-inst", "Has s_setprio_inc_wg instruction.", AMDGPU::FeatureSetPrioIncWgInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
778 { "setreg-vgpr-msb-fixup", "S_SETREG to MODE clobbers VGPR MSB bits, requires fixup", AMDGPU::FeatureSetregVGPRMSBFixup, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
779 { "sgpr-init-bug", "VI SGPR initialization bug requiring a fixed SGPR allocation size", AMDGPU::FeatureSGPRInitBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
780 { "shader-cycles-hi-lo-registers", "Has SHADER_CYCLES_HI/LO hardware registers", AMDGPU::FeatureShaderCyclesHiLoRegisters, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
781 { "shader-cycles-register", "Has SHADER_CYCLES hardware register", AMDGPU::FeatureShaderCyclesRegister, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
782 { "si-scheduler", "Enable SI Machine Scheduler", AMDGPU::FeatureEnableSIScheduler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
783 { "smem-to-vector-write-hazard", "s_load_dword followed by v_cmp page faults", AMDGPU::FeatureSMEMtoVectorWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
784 { "southern-islands", "SOUTHERN_ISLANDS GPU generation", AMDGPU::FeatureSouthernIslands, { { { 0xa0088000a000200ULL, 0x1000010040200ULL, 0x2000a1102820ULL, 0x400004400000ULL, 0x1008ULL, 0x0ULL, } } } },
785 { "sramecc", "Enable SRAMECC", AMDGPU::FeatureSRAMECC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
786 { "sramecc-support", "Hardware supports SRAMECC", AMDGPU::FeatureSupportsSRAMECC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
787 { "tanh-insts", "Has v_tanh_f32/f16 instructions", AMDGPU::FeatureTanhInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
788 { "tensor-cvt-lut-insts", "Has v_perm_pk16* instructions", AMDGPU::FeatureTensorCvtLutInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
789 { "tgsplit", "Enable threadgroup split execution", AMDGPU::FeatureTgSplit, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
790 { "transpose-load-f4f6-insts", "Has ds_load_tr4/tr6 and global_load_tr4/tr6 instructions", AMDGPU::FeatureTransposeLoadF4F6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
791 { "trap-handler", "Trap handler support", AMDGPU::FeatureTrapHandler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
792 { "trig-reduced-range", "Requires use of fract on arguments to trig instructions", AMDGPU::FeatureTrigReducedRange, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
793 { "true16", "True 16-bit operand instructions", AMDGPU::FeatureTrue16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
794 { "unaligned-access-mode", "Enable unaligned global, local and region loads and stores if the hardware supports it", AMDGPU::FeatureUnalignedAccessMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
795 { "unaligned-buffer-access", "Hardware supports unaligned global loads and stores", AMDGPU::FeatureUnalignedBufferAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
796 { "unaligned-ds-access", "Hardware supports unaligned local and region loads and stores", AMDGPU::FeatureUnalignedDSAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
797 { "unaligned-scratch-access", "Support unaligned scratch loads and stores", AMDGPU::FeatureUnalignedScratchAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
798 { "unpacked-d16-vmem", "Has unpacked d16 vmem instructions", AMDGPU::FeatureUnpackedD16VMem, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
799 { "unsafe-ds-offset-folding", "Force using DS instruction immediate offsets on SI", AMDGPU::FeatureEnableUnsafeDSOffsetFolding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
800 { "use-add-pc64-inst", "Use s_add_pc_i64 instruction.", AMDGPU::FeatureUseAddPC64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
801 { "user-sgpr-init16-bug", "Bug requiring at least 16 user+system SGPRs to be enabled", AMDGPU::FeatureUserSGPRInit16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
802 { "valu-trans-use-hazard", "Hazard when TRANS instructions are closely followed by a use of the result", AMDGPU::FeatureVALUTransUseHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
803 { "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", AMDGPU::FeatureVcmpxExecWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
804 { "vcmpx-permlane-hazard", "TODO: describe me", AMDGPU::FeatureVcmpxPermlaneHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
805 { "vgpr-align2", "VGPR and AGPR tuple operands require even alignment", AMDGPU::FeatureRequiresAlignedVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
806 { "vgpr-index-mode", "Has VGPR mode register indexing", AMDGPU::FeatureVGPRIndexMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
807 { "vmem-pref-insts", "Has flat_prefect_b8 and global_prefetch_b8 instructions", AMDGPU::FeatureVmemPrefInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
808 { "vmem-to-lds-load-insts", "The platform has memory to lds instructions (global_load w/lds bit set, buffer_loadw/lds bit set or global_load_lds. This does not include scratch_load_lds.", AMDGPU::FeatureVMemToLDSLoad, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
809 { "vmem-to-scalar-write-hazard", "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", AMDGPU::FeatureVMEMtoScalarWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
810 { "vmem-write-vgpr-in-order", "VMEM instructions of the same type write VGPR results in order", AMDGPU::FeatureVmemWriteVgprInOrder, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
811 { "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", AMDGPU::FeatureVolcanicIslands, { { { 0xb50890000000402ULL, 0x78000b0040200ULL, 0x2000a1032820ULL, 0x402400104616004ULL, 0x1008ULL, 0x0ULL, } } } },
812 { "vop3-literal", "Can use one literal in VOP3", AMDGPU::FeatureVOP3Literal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
813 { "vop3p", "Has VOP3P packed instructions", AMDGPU::FeatureVOP3PInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
814 { "vopd", "Has VOPD dual issue wave32 instructions", AMDGPU::FeatureVOPDInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
815 { "vscnt", "Has separate store vscnt counter", AMDGPU::FeatureVscnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
816 { "wait-xcnt", "Has s_wait_xcnt instruction", AMDGPU::FeatureWaitXcnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
817 { "waits-before-system-scope-stores", "Target requires waits for loads and atomics before system scope stores", AMDGPU::FeatureWaitsBeforeSystemScopeStores, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
818 { "wavefrontsize16", "The number of threads per wavefront", AMDGPU::FeatureWavefrontSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
819 { "wavefrontsize32", "The number of threads per wavefront", AMDGPU::FeatureWavefrontSize32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
820 { "wavefrontsize64", "The number of threads per wavefront", AMDGPU::FeatureWavefrontSize64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
821 { "wmma-128b-insts", "Has WMMA instructions where A and B matrices do not have duplicated data", AMDGPU::FeatureWMMA128bInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
822 { "wmma-256b-insts", "Has WMMA instructions where A and B matrices have duplicated data", AMDGPU::FeatureWMMA256bInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
823 { "xf32-insts", "Has instructions that support xf32 format, such as v_mfma_f32_16x16x8_xf32 and v_mfma_f32_32x32x4_xf32", AMDGPU::FeatureXF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
824 { "xnack", "Enable XNACK support", AMDGPU::FeatureXNACK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
825 { "xnack-support", "Hardware supports XNACK", AMDGPU::FeatureSupportsXNACK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
826};
827
828#ifdef DBGFIELD
829#error "<target>GenSubtargetInfo.inc requires a DBGFIELD macro"
830#endif
831#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
832#define DBGFIELD(x) x,
833#define DBGVAL_OR_NULLPTR(x) x
834#else
835#define DBGFIELD(x)
836#define DBGVAL_OR_NULLPTR(x) nullptr
837#endif
838
839// ===============================================================
840// Data tables for the new per-operand machine model.
841
842// {ProcResourceIdx, ReleaseAtCycle, AcquireAtCycle}
843extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[] = {
844 { 0, 0, 0 }, // Invalid
845 { 4, 1, 0}, // #1
846 { 5, 1, 0}, // #2
847 { 5, 2, 0}, // #3
848 { 6, 1, 0}, // #4
849 { 3, 1, 0}, // #5
850 { 6, 1, 0}, // #6
851 { 3, 2, 0}, // #7
852 { 2, 1, 0}, // #8
853 { 1, 1, 0}, // #9
854 { 6, 3, 0}, // #10
855 { 7, 2, 0}, // #11
856 { 7, 8, 0}, // #12
857 { 7, 16, 0}, // #13
858 { 4, 1, 0}, // #14
859 { 7, 1, 0}, // #15
860 { 4, 2, 0}, // #16
861 { 7, 2, 0}, // #17
862 { 4, 1, 0}, // #18
863 { 8, 1, 0}, // #19
864 { 3, 1, 0}, // #20
865 { 4, 2, 0}, // #21
866 { 8, 1, 0}, // #22
867 { 3, 1, 0}, // #23
868 { 4, 1, 0}, // #24
869 { 3, 2, 0}, // #25
870 { 4, 2, 0}, // #26
871 { 2, 1, 0}, // #27
872 { 4, 1, 0}, // #28
873 { 4, 2, 0}, // #29
874 { 5, 1, 0}, // #30
875 { 7, 1, 0}, // #31
876 { 4, 1, 0}, // #32
877 { 6, 1, 0}, // #33
878 { 4, 1, 0}, // #34
879 { 6, 1, 0}, // #35
880 { 7, 1, 0}, // #36
881 { 4, 3, 0}, // #37
882 { 8, 3, 0}, // #38
883 { 9, 8, 0}, // #39
884 { 9, 16, 0}, // #40
885 { 4, 2, 0}, // #41
886 { 6, 2, 0}, // #42
887 { 3, 1, 0}, // #43
888 { 4, 2, 0}, // #44
889 { 7, 1, 0}, // #45
890 { 4, 2, 0}, // #46
891 { 5, 1, 0}, // #47
892 { 6, 1, 0}, // #48
893 { 4, 3, 0}, // #49
894 { 7, 3, 0}, // #50
895 { 5, 4, 0}, // #51
896 { 5, 8, 0}, // #52
897 { 7, 4, 0}, // #53
898 { 5, 16, 0} // #54
899}; // AMDGPUWriteProcResTable
900
901// {Cycles, WriteResourceID}
902extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[] = {
903 { 0, 0}, // Invalid
904 { 1, 0}, // #1 WriteSALU_Write32Bit_WriteFloatFMA_WriteDoubleAdd_Write64Bit_WriteDoubleCvt_WriteIntMul
905 { 1, 0}, // #2 Write32Bit_WriteSALU_Write64Bit
906 { 1, 0}, // #3 Write32Bit
907 {80, 0}, // #4 WriteVMEM
908 {80, 0}, // #5 WriteVMEM
909 { 5, 0}, // #6 WriteLDS_WriteSMEM_Write32Bit_WriteFloatCvt_WriteFloatFMA
910 { 5, 0}, // #7 WriteLDS_Write32Bit
911 { 5, 0}, // #8 WriteLDS
912 { 4, 0}, // #9 WriteExport_WriteTrans32_WriteFloatCvt_WriteDoubleCvt_WriteIntMul_WriteQuarterRate32_WriteSFPU_WriteTrans64_Write4PassDGEMM_Write4PassMAI
913 { 8, 0}, // #10 WriteBranch_WriteDoubleAdd_Write8PassMAI_WriteIntMul_WriteQuarterRate32_WriteTrans32_WritePseudoScalarTrans_WriteXDL2PassWMMA_Write8PassDGEMM
914 {500, 0}, // #11 WriteBarrier
915 { 1, 0}, // #12 WriteSALU
916 { 2, 0}, // #13 Write64Bit_Write2PassMAI_WriteSALU_WriteDoubleAdd
917 {16, 0}, // #14 WriteFloatFMA_WriteDouble_WriteTrans64_Write16PassMAI_WriteExport_WriteXDL4PassWMMA_Write4PassWMMA_Write16PassDGEMM
918 {16, 0}, // #15 WriteFloatFMA_WriteDouble
919 { 1, 0}, // #16 WriteSALU
920 { 4, 0}, // #17 WriteIntMul_WriteDouble
921 { 1, 0}, // #18 WriteSALU
922 { 2, 0}, // #19 Write64Bit
923 { 2, 0}, // #20 Write64Bit
924 {80, 0}, // #21 WriteVMEM
925 {80, 0}, // #22 WriteVMEM
926 {80, 0}, // #23 WriteVMEM
927 { 8, 0}, // #24 WriteDoubleAdd
928 { 1, 0}, // #25 Write32Bit
929 {320, 0}, // #26 WriteVMEM
930 {320, 0}, // #27 WriteVMEM
931 {20, 0}, // #28 WriteLDS_WriteSMEM
932 {20, 0}, // #29 WriteLDS
933 {20, 0}, // #30 WriteLDS
934 {32, 0}, // #31 WriteBranch
935 {2000, 0}, // #32 WriteBarrier
936 { 2, 0}, // #33 WriteSALU
937 { 6, 0}, // #34 Write64Bit_WriteQuarterRate32
938 { 5, 0}, // #35 Write32Bit_WriteFloatFMA
939 { 2, 0}, // #36 WriteSALU
940 {22, 0}, // #37 WriteDoubleAdd_WriteDoubleCvt
941 {10, 0}, // #38 WriteTrans32
942 {22, 0}, // #39 WriteDouble
943 { 2, 0}, // #40 WriteSALU
944 { 8, 0}, // #41 WriteIntMul
945 { 2, 0}, // #42 WriteSALU
946 {24, 0}, // #43 WriteTrans64
947 { 6, 0}, // #44 Write64Bit
948 { 6, 0}, // #45 Write64Bit
949 {320, 0}, // #46 WriteVMEM
950 {320, 0}, // #47 WriteVMEM
951 {320, 0}, // #48 WriteVMEM
952 {22, 0}, // #49 WriteDoubleAdd
953 { 5, 0}, // #50 Write32Bit
954 {38, 0}, // #51 WriteDoubleAdd_WriteDoubleCvt_WriteTrans64
955 {38, 0}, // #52 WriteDouble
956 { 2, 0}, // #53 WriteSALU
957 {40, 0}, // #54 WriteTrans64
958 {38, 0}, // #55 WriteDoubleAdd
959 { 5, 0}, // #56 Write32Bit
960 {37, 0}, // #57 WriteDoubleAdd_WriteDoubleCvt
961 {37, 0}, // #58 WriteDouble
962 { 2, 0}, // #59 WriteSALU
963 {37, 0}, // #60 WriteDoubleAdd
964 { 5, 0}, // #61 Write32Bit
965 { 7, 0}, // #62 WritePseudoScalarTrans
966 { 2, 0}, // #63 WriteDoubleAdd
967 { 1, 0} // #64 Write32Bit
968}; // AMDGPUWriteLatencyTable
969
970// {UseIdx, WriteResourceID, Cycles}
971extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[] = {
972 {0, 0, 0}, // Invalid
973 {0, 0, -4}, // #1
974 {0, 0, -2} // #2
975}; // AMDGPUReadAdvanceTable
976
977// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
978static const llvm::MCSchedClassDesc SIQuarterSpeedModelSchedClasses[] = {
979 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
980 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
981 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
982 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 2, 2, 0, 0}, // #3
983 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
984 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
985 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
986 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 7, 2, 0, 0}, // #7
987 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
988 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
989 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
990 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
991 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
992 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
993 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
994 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 12, 2, 0, 0}, // #15
995 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
996 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 2, 1, 10, 1, 0, 0}, // #17
997 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #18
998 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
999 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1000 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #21
1001 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 2, 1, 14, 1, 0, 0}, // #22
1002 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 2, 1, 14, 1, 0, 0}, // #23
1003 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 15, 2, 0, 0}, // #24
1004 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 15, 2, 0, 0}, // #25
1005 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 17, 2, 0, 0}, // #26
1006 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #27
1007 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1008 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 14, 1, 0, 0}, // #29
1009 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 3, 1, 19, 2, 0, 0}, // #30
1010 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1011 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1012 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 24, 2, 0, 0}, // #33
1013 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1014 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
1015 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #36
1016 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #37
1017 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #38
1018 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1019 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #40
1020 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #41
1021 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #42
1022 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #43
1023 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1024 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #45
1025 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #46
1026 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #47
1027 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1028 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49
1029 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50
1030 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #51
1031 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #52
1032 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #53
1033 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1034 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1035 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1036 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1037 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1038 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1039 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1040 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1041 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1042 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1043 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1044 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1045 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1046 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #67
1047 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1048 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 1, false, false, true, 2, 1, 13, 1, 2, 1}, // #69
1049 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #70
1050 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1051 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1052 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1053 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1054 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1055}; // SIQuarterSpeedModelSchedClasses
1056
1057// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1058static const llvm::MCSchedClassDesc GFX10SpeedModelSchedClasses[] = {
1059 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1060 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #1
1061 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #2
1062 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #3
1063 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 18, 2, 26, 1, 0, 0}, // #4
1064 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 20, 3, 27, 2, 0, 0}, // #5
1065 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #6
1066 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 25, 2, 29, 2, 0, 0}, // #7
1067 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 27, 2, 14, 1, 0, 0}, // #8
1068 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #9
1069 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1070 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #11
1071 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1072 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #13
1073 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 32, 1, 0, 0}, // #14
1074 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 29, 3, 33, 2, 0, 0}, // #15
1075 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #16
1076 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 14, 2, 37, 1, 0, 0}, // #17
1077 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #18
1078 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 32, 2, 38, 1, 0, 0}, // #19
1079 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #20
1080 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 14, 2, 37, 1, 0, 0}, // #21
1081 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #22
1082 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 14, 2, 37, 1, 0, 0}, // #23
1083 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #24
1084 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 29, 3, 39, 2, 0, 0}, // #25
1085 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 29, 3, 41, 2, 0, 0}, // #26
1086 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #27
1087 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #28
1088 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 34, 3, 43, 1, 0, 0}, // #29
1089 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 16, 2, 44, 2, 0, 0}, // #30
1090 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1091 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 37, 2, 46, 3, 0, 0}, // #32
1092 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 16, 2, 49, 2, 0, 0}, // #33
1093 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1094 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #35
1095 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #36
1096 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #37
1097 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #38
1098 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #39
1099 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #40
1100 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #41
1101 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #42
1102 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #43
1103 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #44
1104 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #45
1105 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #46
1106 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #47
1107 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #48
1108 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #49
1109 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #50
1110 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #51
1111 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #52
1112 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #53
1113 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #54
1114 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #55
1115 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #56
1116 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #57
1117 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #58
1118 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #59
1119 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #60
1120 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #61
1121 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #62
1122 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #63
1123 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #64
1124 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #65
1125 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #66
1126 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #67
1127 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #68
1128 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1129 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1130 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1131 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1132 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1133 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1134 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1135}; // GFX10SpeedModelSchedClasses
1136
1137// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1138static const llvm::MCSchedClassDesc GFX11SpeedModelSchedClasses[] = {
1139 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1140 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #1
1141 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #2
1142 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #3
1143 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 18, 2, 26, 1, 0, 0}, // #4
1144 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 20, 3, 27, 2, 0, 0}, // #5
1145 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #6
1146 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 25, 2, 28, 2, 0, 0}, // #7
1147 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 27, 2, 14, 1, 0, 0}, // #8
1148 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #9
1149 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1150 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #11
1151 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, true, 1, 2, 9, 1, 0, 0}, // #12
1152 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #13
1153 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 32, 1, 0, 0}, // #14
1154 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 29, 3, 33, 2, 0, 0}, // #15
1155 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #16
1156 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 14, 2, 51, 1, 0, 0}, // #17
1157 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #18
1158 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 32, 2, 38, 1, 0, 0}, // #19
1159 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #20
1160 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 14, 2, 51, 1, 0, 0}, // #21
1161 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #22
1162 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 14, 2, 51, 1, 0, 0}, // #23
1163 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #24
1164 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 29, 3, 52, 2, 0, 0}, // #25
1165 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 29, 3, 41, 2, 0, 0}, // #26
1166 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #27
1167 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #28
1168 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 34, 3, 54, 1, 0, 0}, // #29
1169 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 16, 2, 44, 2, 0, 0}, // #30
1170 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1171 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 37, 2, 46, 3, 0, 0}, // #32
1172 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 16, 2, 55, 2, 0, 0}, // #33
1173 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1174 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #35
1175 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #36
1176 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #37
1177 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #38
1178 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #39
1179 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #40
1180 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #41
1181 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #42
1182 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #43
1183 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #44
1184 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #45
1185 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #46
1186 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #47
1187 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #48
1188 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #49
1189 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #50
1190 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #51
1191 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #52
1192 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #53
1193 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #54
1194 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #55
1195 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #56
1196 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #57
1197 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #58
1198 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #59
1199 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #60
1200 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #61
1201 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #62
1202 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #63
1203 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #64
1204 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #65
1205 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #66
1206 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #67
1207 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #68
1208 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1209 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1210 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1211 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1212 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1213 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1214 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1215}; // GFX11SpeedModelSchedClasses
1216
1217// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1218static const llvm::MCSchedClassDesc GFX1250SpeedModelSchedClasses[] = {
1219 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1220 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #1
1221 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #2
1222 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 16, 2, 6, 2, 0, 0}, // #3
1223 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 18, 2, 26, 1, 0, 0}, // #4
1224 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 20, 3, 27, 2, 0, 0}, // #5
1225 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #6
1226 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 25, 2, 28, 2, 0, 0}, // #7
1227 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 27, 2, 14, 1, 0, 0}, // #8
1228 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #9
1229 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1230 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #11
1231 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 1, 2, 9, 1, 0, 0}, // #12
1232 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #13
1233 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 9, 1, 32, 1, 0, 0}, // #14
1234 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 29, 3, 33, 2, 0, 0}, // #15
1235 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 29, 3, 35, 2, 0, 0}, // #16
1236 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 14, 2, 57, 1, 0, 0}, // #17
1237 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 14, 2, 34, 1, 0, 0}, // #18
1238 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 32, 2, 10, 1, 0, 0}, // #19
1239 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #20
1240 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 14, 2, 57, 1, 0, 0}, // #21
1241 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #22
1242 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 14, 2, 57, 1, 0, 0}, // #23
1243 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, false, 29, 3, 35, 2, 0, 0}, // #24
1244 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, false, 29, 3, 58, 2, 0, 0}, // #25
1245 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, false, 29, 3, 41, 2, 0, 0}, // #26
1246 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 14, 2, 10, 1, 0, 0}, // #27
1247 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, false, 14, 2, 34, 1, 0, 0}, // #28
1248 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 34, 3, 51, 1, 0, 0}, // #29
1249 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 16, 2, 44, 2, 0, 0}, // #30
1250 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 1, false, false, false, 14, 2, 10, 1, 0, 0}, // #31
1251 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, false, 37, 2, 46, 3, 0, 0}, // #32
1252 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, false, 16, 2, 60, 2, 0, 0}, // #33
1253 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1254 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #35
1255 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #36
1256 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #37
1257 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #38
1258 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #39
1259 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #40
1260 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #41
1261 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #42
1262 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #43
1263 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #44
1264 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #45
1265 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #46
1266 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #47
1267 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #48
1268 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #49
1269 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #50
1270 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #51
1271 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #52
1272 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #53
1273 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #54
1274 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #55
1275 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, false, 39, 1, 10, 1, 0, 0}, // #56
1276 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 1, false, false, false, 39, 1, 10, 1, 0, 0}, // #57
1277 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, false, 40, 1, 14, 1, 0, 0}, // #58
1278 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 1, false, false, false, 40, 1, 14, 1, 0, 0}, // #59
1279 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #60
1280 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #61
1281 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 1, false, false, false, 15, 1, 14, 1, 0, 0}, // #62
1282 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, false, 15, 1, 14, 1, 0, 0}, // #63
1283 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 1, false, false, false, 39, 1, 10, 1, 0, 0}, // #64
1284 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, false, 39, 1, 10, 1, 0, 0}, // #65
1285 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #66
1286 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, false, 14, 2, 34, 1, 0, 0}, // #67
1287 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #68
1288 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1289 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1290 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1291 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1292 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1293 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 1, false, false, false, 40, 1, 14, 1, 0, 0}, // #74
1294 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 1, false, false, false, 39, 1, 10, 1, 0, 0}, // #75
1295}; // GFX1250SpeedModelSchedClasses
1296
1297// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1298static const llvm::MCSchedClassDesc GFX12SpeedModelSchedClasses[] = {
1299 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1300 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #1
1301 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #2
1302 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 41, 2, 6, 2, 0, 0}, // #3
1303 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 14, 2, 26, 1, 0, 0}, // #4
1304 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 43, 3, 27, 2, 0, 0}, // #5
1305 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #6
1306 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 25, 2, 28, 2, 0, 0}, // #7
1307 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 27, 2, 14, 1, 0, 0}, // #8
1308 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #9
1309 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1310 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #11
1311 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 1, 2, 9, 1, 0, 0}, // #12
1312 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #13
1313 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 9, 1, 32, 1, 0, 0}, // #14
1314 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 46, 3, 33, 2, 0, 0}, // #15
1315 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 46, 3, 35, 2, 0, 0}, // #16
1316 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 32, 2, 51, 1, 0, 0}, // #17
1317 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 32, 2, 34, 1, 0, 0}, // #18
1318 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 32, 2, 38, 1, 0, 0}, // #19
1319 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #20
1320 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 32, 2, 51, 1, 0, 0}, // #21
1321 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #22
1322 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 32, 2, 51, 1, 0, 0}, // #23
1323 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, false, 46, 3, 35, 2, 0, 0}, // #24
1324 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, false, 46, 3, 52, 2, 0, 0}, // #25
1325 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, false, 46, 3, 41, 2, 0, 0}, // #26
1326 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 32, 2, 10, 1, 0, 0}, // #27
1327 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, false, 32, 2, 10, 1, 0, 0}, // #28
1328 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 32, 2, 54, 1, 0, 0}, // #29
1329 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 41, 2, 44, 2, 0, 0}, // #30
1330 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 1, false, false, false, 32, 2, 62, 1, 0, 0}, // #31
1331 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, false, 49, 2, 46, 3, 0, 0}, // #32
1332 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, false, 41, 2, 55, 2, 0, 0}, // #33
1333 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1334 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #35
1335 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #36
1336 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #37
1337 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #38
1338 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #39
1339 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #40
1340 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #41
1341 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #42
1342 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #43
1343 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #44
1344 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #45
1345 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #46
1346 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #47
1347 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #48
1348 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #49
1349 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #50
1350 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #51
1351 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #52
1352 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #53
1353 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #54
1354 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #55
1355 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #56
1356 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, false, 41, 2, 6, 2, 0, 0}, // #57
1357 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #58
1358 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, false, 41, 2, 6, 2, 0, 0}, // #59
1359 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, false, 41, 2, 6, 2, 0, 0}, // #60
1360 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #61
1361 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, false, 41, 2, 6, 2, 0, 0}, // #62
1362 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #63
1363 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, false, 41, 2, 6, 2, 0, 0}, // #64
1364 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #65
1365 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #66
1366 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, false, 32, 2, 34, 1, 0, 0}, // #67
1367 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #68
1368 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1369 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1370 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1371 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1372 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1373 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1374 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1375}; // GFX12SpeedModelSchedClasses
1376
1377// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1378static const llvm::MCSchedClassDesc SIFullSpeedModelSchedClasses[] = {
1379 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1380 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1381 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1382 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1383 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1384 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1385 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1386 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1387 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1388 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1389 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1390 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1391 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1392 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1393 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1394 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 12, 2, 0, 0}, // #15
1395 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1396 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #17
1397 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #18
1398 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1399 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1400 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #21
1401 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #22
1402 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #23
1403 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1404 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 17, 2, 0, 0}, // #25
1405 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 17, 2, 0, 0}, // #26
1406 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #27
1407 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1408 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #29
1409 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 3, 1, 19, 2, 0, 0}, // #30
1410 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1411 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1412 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 63, 2, 0, 0}, // #33
1413 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1414 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #35
1415 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #36
1416 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #37
1417 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #38
1418 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #39
1419 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40
1420 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #41
1421 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #42
1422 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #43
1423 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #44
1424 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #45
1425 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #46
1426 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #47
1427 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #48
1428 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49
1429 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50
1430 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #51
1431 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #52
1432 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53
1433 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1434 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1435 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1436 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1437 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1438 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1439 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1440 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1441 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1442 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1443 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1444 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1445 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1446 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #67
1447 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1448 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1449 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1450 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1451 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1452 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1453 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1454 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1455}; // SIFullSpeedModelSchedClasses
1456
1457// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1458static const llvm::MCSchedClassDesc SIDPGFX942FullSpeedModelSchedClasses[] = {
1459 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1460 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1461 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1462 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1463 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1464 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1465 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1466 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1467 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1468 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1469 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1470 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1471 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1472 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1473 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1474 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #15
1475 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1476 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #17
1477 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #18
1478 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1479 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1480 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #21
1481 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #22
1482 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #23
1483 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1484 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #25
1485 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #26
1486 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #27
1487 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1488 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 2, 1, 9, 1, 0, 0}, // #29
1489 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 3, 1, 1, 2, 0, 0}, // #30
1490 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1491 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1492 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #33
1493 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1494 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #35
1495 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 51, 1, 9, 1, 1, 1}, // #36
1496 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 52, 1, 10, 1, 1, 1}, // #37
1497 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #38
1498 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1499 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40
1500 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #41
1501 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #42
1502 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #43
1503 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1504 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #45
1505 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #46
1506 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #47
1507 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1508 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #49
1509 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #50
1510 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #51
1511 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #52
1512 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53
1513 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1514 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1515 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1516 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1517 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1518 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1519 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1520 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1521 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1522 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1523 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1524 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1525 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1526 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #67
1527 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1528 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1529 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1530 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1531 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1532 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1533 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1534 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1535}; // SIDPGFX942FullSpeedModelSchedClasses
1536
1537// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1538static const llvm::MCSchedClassDesc SIDPFullSpeedModelSchedClasses[] = {
1539 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1540 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1541 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1542 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1543 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1544 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1545 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1546 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1547 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1548 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1549 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1550 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1551 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1552 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1553 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1554 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #15
1555 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1556 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #17
1557 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #18
1558 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1559 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1560 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #21
1561 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #22
1562 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #23
1563 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1564 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #25
1565 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #26
1566 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #27
1567 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1568 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #29
1569 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #30
1570 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1571 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1572 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #33
1573 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1574 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #35
1575 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 51, 1, 9, 1, 1, 1}, // #36
1576 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 52, 1, 10, 1, 1, 1}, // #37
1577 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #38
1578 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1579 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #40
1580 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #41
1581 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #42
1582 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #43
1583 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1584 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #45
1585 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #46
1586 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #47
1587 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1588 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49
1589 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50
1590 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #51
1591 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #52
1592 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #53
1593 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1594 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1595 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1596 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1597 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1598 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1599 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1600 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1601 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1602 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1603 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1604 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1605 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1606 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #67
1607 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1608 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1609 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1610 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1611 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1612 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1613 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1614 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1615}; // SIDPFullSpeedModelSchedClasses
1616
1617// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1618static const llvm::MCSchedClassDesc SIDPGFX950FullSpeedModelSchedClasses[] = {
1619 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1620 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1621 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1622 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1623 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1624 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1625 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1626 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1627 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1628 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1629 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1630 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1631 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1632 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1633 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1634 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #15
1635 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1636 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #17
1637 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #18
1638 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1639 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1640 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #21
1641 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #22
1642 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #23
1643 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1644 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #25
1645 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #26
1646 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #27
1647 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1648 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 2, 1, 9, 1, 0, 0}, // #29
1649 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 3, 1, 1, 2, 0, 0}, // #30
1650 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1651 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1652 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #33
1653 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1654 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #35
1655 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 51, 1, 9, 1, 1, 1}, // #36
1656 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 54, 1, 14, 1, 1, 1}, // #37
1657 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #38
1658 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1659 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40
1660 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #41
1661 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #42
1662 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #43
1663 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1664 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #45
1665 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #46
1666 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #47
1667 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1668 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #49
1669 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #50
1670 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #51
1671 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #52
1672 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #53
1673 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #54
1674 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #55
1675 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1676 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1677 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1678 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1679 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1680 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1681 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1682 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1683 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1684 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1685 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1686 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #67
1687 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1688 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1689 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1690 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #71
1691 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #72
1692 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #73
1693 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1694 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1695}; // SIDPGFX950FullSpeedModelSchedClasses
1696
1697#ifdef __GNUC__
1698#pragma GCC diagnostic push
1699#pragma GCC diagnostic ignored "-Woverlength-strings"
1700#endif
1701static constexpr char AMDGPUSchedClassNamesStorage[] =
1702 "\0"
1703 "InvalidSchedClass\0"
1704 "NullALU_WriteSALU\0"
1705 "NullALU_Write32Bit\0"
1706 "NullALU_Write32Bit_Write32Bit\0"
1707 "NullALU_WriteVMEM\0"
1708 "NullALU_WriteVMEM_WriteLDS\0"
1709 "NullALU_WriteLDS\0"
1710 "NullALU_WriteLDS_WriteLDS\0"
1711 "NullALU_WriteExport\0"
1712 "WriteBranch\0"
1713 "NullALU\0"
1714 "NullALU_WriteBranch\0"
1715 "NullALU_WriteSFPU\0"
1716 "NullALU_WriteSMEM\0"
1717 "NullALU_WriteBarrier\0"
1718 "NullALU_WriteSALU_Write64Bit\0"
1719 "NullALU_Write32Bit_WriteSALU\0"
1720 "NullALU_WriteDoubleAdd\0"
1721 "NullALU_Write64Bit\0"
1722 "NullALU_WriteTrans32\0"
1723 "NullALU_WriteFloatCvt\0"
1724 "NullALU_WriteDoubleCvt\0"
1725 "NullALU_WriteFloatFMA\0"
1726 "NullALU_WriteDouble\0"
1727 "NullALU_WriteFloatFMA_WriteSALU\0"
1728 "NullALU_WriteDouble_WriteSALU\0"
1729 "NullALU_WriteIntMul_WriteSALU\0"
1730 "NullALU_WriteIntMul\0"
1731 "NullALU_WriteQuarterRate32\0"
1732 "NullALU_WriteTrans64\0"
1733 "NullALU_Write64Bit_Write64Bit\0"
1734 "NullALU_WritePseudoScalarTrans\0"
1735 "NullALU_WriteVMEM_WriteVMEM_WriteVMEM\0"
1736 "NullALU_WriteDoubleAdd_Write32Bit\0"
1737 "COPY\0"
1738 "V_ACCVGPR_WRITE_B32_e64\0"
1739 "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0"
1740 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
1741 "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0"
1742 "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0"
1743 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
1744 "V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd\0"
1745 "V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi\0"
1746 "V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd\0"
1747 "V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi\0"
1748 "V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd\0"
1749 "V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0"
1750 "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd\0"
1751 "V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi\0"
1752 "V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940\0"
1753 "V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940\0"
1754 "V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
1755 "V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd\0"
1756 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0"
1757 "V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0"
1758 "V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd\0"
1759 "V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250\0"
1760 "V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr\0"
1761 "V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250\0"
1762 "V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr\0"
1763 "V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr\0"
1764 "V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250\0"
1765 "V_WMMA_F32_16X16X4_F32_w32_threeaddr\0"
1766 "V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250\0"
1767 "V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr\0"
1768 "V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250\0"
1769 "Write32Bit\0"
1770 "Write64Bit\0"
1771 "WriteSALU\0"
1772 "Write64Bit_MIVGPRRead\0"
1773 "Write64Bit_ReadDefault\0"
1774 "Write16PassMAI_MIMFMARead\0"
1775 "Write8PassMAI_MIMFMARead\0"
1776 "Write4PassMAI_MIMFMARead\0"
1777 "WriteXDL4PassWMMA\0"
1778 "WriteXDL2PassWMMA\0"
1779 ;
1780#ifdef __GNUC__
1781#pragma GCC diagnostic pop
1782#endif
1783
1784static constexpr llvm::StringTable
1785AMDGPUSchedClassNames = AMDGPUSchedClassNamesStorage;
1786
1787static const llvm::MCSchedModel NoSchedModel = {
1788 MCSchedModel::DefaultIssueWidth,
1789 MCSchedModel::DefaultMicroOpBufferSize,
1790 MCSchedModel::DefaultLoopMicroOpBufferSize,
1791 MCSchedModel::DefaultLoadLatency,
1792 MCSchedModel::DefaultHighLatency,
1793 MCSchedModel::DefaultMispredictPenalty,
1794 false, // PostRAScheduler
1795 false, // CompleteModel
1796 false, // EnableIntervals
1797 0, // Processor ID
1798 nullptr, nullptr, 0, 0, // No instruction-level machine model.
1799 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1800 nullptr, // No Itinerary
1801 nullptr // No extra processor descriptor
1802};
1803
1804static const unsigned SIQuarterSpeedModelProcResourceSubUnits[] = {
1805 0, // Invalid
1806};
1807
1808// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1809static const llvm::MCProcResourceDesc SIQuarterSpeedModelProcResources[] = {
1810 {"InvalidUnit", 0, 0, 0, 0},
1811 {"HWBranch", 1, 0, 1, nullptr}, // #1
1812 {"HWExport", 1, 0, 1, nullptr}, // #2
1813 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1814 {"HWSALU", 1, 0, 1, nullptr}, // #4
1815 {"HWVALU", 1, 0, 1, nullptr}, // #5
1816 {"HWVMEM", 1, 0, 1, nullptr}, // #6
1817 {"HWXDL", 1, 0, 0, nullptr}, // #7
1818};
1819
1820static const llvm::MCSchedModel SIQuarterSpeedModel = {
1821 1, // IssueWidth
1822 1, // MicroOpBufferSize
1823 MCSchedModel::DefaultLoopMicroOpBufferSize,
1824 MCSchedModel::DefaultLoadLatency,
1825 MCSchedModel::DefaultHighLatency,
1826 20, // MispredictPenalty
1827 true, // PostRAScheduler
1828 true, // CompleteModel
1829 false, // EnableIntervals
1830 1, // Processor ID
1831 SIQuarterSpeedModelProcResources,
1832 SIQuarterSpeedModelSchedClasses,
1833 8,
1834 76,
1835 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1836 nullptr, // No Itinerary
1837 nullptr // No extra processor descriptor
1838};
1839
1840static const unsigned GFX10SpeedModelProcResourceSubUnits[] = {
1841 0, // Invalid
1842};
1843
1844// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1845static const llvm::MCProcResourceDesc GFX10SpeedModelProcResources[] = {
1846 {"InvalidUnit", 0, 0, 0, 0},
1847 {"HWBranch", 1, 0, 1, nullptr}, // #1
1848 {"HWExport", 1, 0, 1, nullptr}, // #2
1849 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1850 {"HWRC", 1, 0, 1, nullptr}, // #4
1851 {"HWSALU", 1, 0, 1, nullptr}, // #5
1852 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
1853 {"HWVALU", 1, 0, 1, nullptr}, // #7
1854 {"HWVMEM", 1, 0, 1, nullptr}, // #8
1855};
1856
1857static const llvm::MCSchedModel GFX10SpeedModel = {
1858 1, // IssueWidth
1859 1, // MicroOpBufferSize
1860 MCSchedModel::DefaultLoopMicroOpBufferSize,
1861 MCSchedModel::DefaultLoadLatency,
1862 MCSchedModel::DefaultHighLatency,
1863 20, // MispredictPenalty
1864 true, // PostRAScheduler
1865 true, // CompleteModel
1866 false, // EnableIntervals
1867 2, // Processor ID
1868 GFX10SpeedModelProcResources,
1869 GFX10SpeedModelSchedClasses,
1870 9,
1871 76,
1872 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1873 nullptr, // No Itinerary
1874 nullptr // No extra processor descriptor
1875};
1876
1877static const unsigned GFX11SpeedModelProcResourceSubUnits[] = {
1878 0, // Invalid
1879};
1880
1881// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1882static const llvm::MCProcResourceDesc GFX11SpeedModelProcResources[] = {
1883 {"InvalidUnit", 0, 0, 0, 0},
1884 {"HWBranch", 1, 0, 1, nullptr}, // #1
1885 {"HWExport", 1, 0, 1, nullptr}, // #2
1886 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1887 {"HWRC", 1, 0, 1, nullptr}, // #4
1888 {"HWSALU", 1, 0, 1, nullptr}, // #5
1889 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
1890 {"HWVALU", 1, 0, 1, nullptr}, // #7
1891 {"HWVMEM", 1, 0, 1, nullptr}, // #8
1892};
1893
1894static const llvm::MCSchedModel GFX11SpeedModel = {
1895 1, // IssueWidth
1896 1, // MicroOpBufferSize
1897 MCSchedModel::DefaultLoopMicroOpBufferSize,
1898 MCSchedModel::DefaultLoadLatency,
1899 MCSchedModel::DefaultHighLatency,
1900 20, // MispredictPenalty
1901 true, // PostRAScheduler
1902 true, // CompleteModel
1903 false, // EnableIntervals
1904 3, // Processor ID
1905 GFX11SpeedModelProcResources,
1906 GFX11SpeedModelSchedClasses,
1907 9,
1908 76,
1909 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1910 nullptr, // No Itinerary
1911 nullptr // No extra processor descriptor
1912};
1913
1914static const unsigned GFX1250SpeedModelProcResourceSubUnits[] = {
1915 0, // Invalid
1916};
1917
1918// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1919static const llvm::MCProcResourceDesc GFX1250SpeedModelProcResources[] = {
1920 {"InvalidUnit", 0, 0, 0, 0},
1921 {"HWBranch", 1, 0, 1, nullptr}, // #1
1922 {"HWExport", 1, 0, 1, nullptr}, // #2
1923 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1924 {"HWRC", 1, 0, 1, nullptr}, // #4
1925 {"HWSALU", 1, 0, 1, nullptr}, // #5
1926 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
1927 {"HWVALU", 1, 0, 1, nullptr}, // #7
1928 {"HWVMEM", 1, 0, 1, nullptr}, // #8
1929 {"HWXDL", 1, 0, 0, nullptr}, // #9
1930};
1931
1932static const llvm::MCSchedModel GFX1250SpeedModel = {
1933 1, // IssueWidth
1934 1, // MicroOpBufferSize
1935 MCSchedModel::DefaultLoopMicroOpBufferSize,
1936 MCSchedModel::DefaultLoadLatency,
1937 MCSchedModel::DefaultHighLatency,
1938 20, // MispredictPenalty
1939 true, // PostRAScheduler
1940 true, // CompleteModel
1941 false, // EnableIntervals
1942 4, // Processor ID
1943 GFX1250SpeedModelProcResources,
1944 GFX1250SpeedModelSchedClasses,
1945 10,
1946 76,
1947 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1948 nullptr, // No Itinerary
1949 nullptr // No extra processor descriptor
1950};
1951
1952static const unsigned GFX12SpeedModelProcResourceSubUnits[] = {
1953 0, // Invalid
1954};
1955
1956// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1957static const llvm::MCProcResourceDesc GFX12SpeedModelProcResources[] = {
1958 {"InvalidUnit", 0, 0, 0, 0},
1959 {"HWBranch", 1, 0, 1, nullptr}, // #1
1960 {"HWExport", 1, 0, 1, nullptr}, // #2
1961 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1962 {"HWRC", 1, 0, 1, nullptr}, // #4
1963 {"HWSALU", 1, 0, 1, nullptr}, // #5
1964 {"HWVALU", 1, 0, 1, nullptr}, // #6
1965 {"HWVMEM", 1, 0, 1, nullptr}, // #7
1966};
1967
1968static const llvm::MCSchedModel GFX12SpeedModel = {
1969 1, // IssueWidth
1970 1, // MicroOpBufferSize
1971 MCSchedModel::DefaultLoopMicroOpBufferSize,
1972 MCSchedModel::DefaultLoadLatency,
1973 MCSchedModel::DefaultHighLatency,
1974 20, // MispredictPenalty
1975 true, // PostRAScheduler
1976 true, // CompleteModel
1977 false, // EnableIntervals
1978 5, // Processor ID
1979 GFX12SpeedModelProcResources,
1980 GFX12SpeedModelSchedClasses,
1981 8,
1982 76,
1983 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1984 nullptr, // No Itinerary
1985 nullptr // No extra processor descriptor
1986};
1987
1988static const unsigned SIFullSpeedModelProcResourceSubUnits[] = {
1989 0, // Invalid
1990};
1991
1992// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1993static const llvm::MCProcResourceDesc SIFullSpeedModelProcResources[] = {
1994 {"InvalidUnit", 0, 0, 0, 0},
1995 {"HWBranch", 1, 0, 1, nullptr}, // #1
1996 {"HWExport", 1, 0, 1, nullptr}, // #2
1997 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1998 {"HWSALU", 1, 0, 1, nullptr}, // #4
1999 {"HWVALU", 1, 0, 1, nullptr}, // #5
2000 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2001 {"HWXDL", 1, 0, 0, nullptr}, // #7
2002};
2003
2004static const llvm::MCSchedModel SIFullSpeedModel = {
2005 1, // IssueWidth
2006 1, // MicroOpBufferSize
2007 MCSchedModel::DefaultLoopMicroOpBufferSize,
2008 MCSchedModel::DefaultLoadLatency,
2009 MCSchedModel::DefaultHighLatency,
2010 20, // MispredictPenalty
2011 true, // PostRAScheduler
2012 true, // CompleteModel
2013 false, // EnableIntervals
2014 6, // Processor ID
2015 SIFullSpeedModelProcResources,
2016 SIFullSpeedModelSchedClasses,
2017 8,
2018 76,
2019 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2020 nullptr, // No Itinerary
2021 nullptr // No extra processor descriptor
2022};
2023
2024static const unsigned SIDPGFX942FullSpeedModelProcResourceSubUnits[] = {
2025 0, // Invalid
2026};
2027
2028// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2029static const llvm::MCProcResourceDesc SIDPGFX942FullSpeedModelProcResources[] = {
2030 {"InvalidUnit", 0, 0, 0, 0},
2031 {"HWBranch", 1, 0, 1, nullptr}, // #1
2032 {"HWExport", 1, 0, 1, nullptr}, // #2
2033 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2034 {"HWSALU", 1, 0, 1, nullptr}, // #4
2035 {"HWVALU", 1, 0, 1, nullptr}, // #5
2036 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2037 {"HWXDL", 1, 0, 0, nullptr}, // #7
2038};
2039
2040static const llvm::MCSchedModel SIDPGFX942FullSpeedModel = {
2041 1, // IssueWidth
2042 1, // MicroOpBufferSize
2043 MCSchedModel::DefaultLoopMicroOpBufferSize,
2044 MCSchedModel::DefaultLoadLatency,
2045 MCSchedModel::DefaultHighLatency,
2046 20, // MispredictPenalty
2047 true, // PostRAScheduler
2048 true, // CompleteModel
2049 false, // EnableIntervals
2050 7, // Processor ID
2051 SIDPGFX942FullSpeedModelProcResources,
2052 SIDPGFX942FullSpeedModelSchedClasses,
2053 8,
2054 76,
2055 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2056 nullptr, // No Itinerary
2057 nullptr // No extra processor descriptor
2058};
2059
2060static const unsigned SIDPFullSpeedModelProcResourceSubUnits[] = {
2061 0, // Invalid
2062};
2063
2064// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2065static const llvm::MCProcResourceDesc SIDPFullSpeedModelProcResources[] = {
2066 {"InvalidUnit", 0, 0, 0, 0},
2067 {"HWBranch", 1, 0, 1, nullptr}, // #1
2068 {"HWExport", 1, 0, 1, nullptr}, // #2
2069 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2070 {"HWSALU", 1, 0, 1, nullptr}, // #4
2071 {"HWVALU", 1, 0, 1, nullptr}, // #5
2072 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2073 {"HWXDL", 1, 0, 0, nullptr}, // #7
2074};
2075
2076static const llvm::MCSchedModel SIDPFullSpeedModel = {
2077 1, // IssueWidth
2078 1, // MicroOpBufferSize
2079 MCSchedModel::DefaultLoopMicroOpBufferSize,
2080 MCSchedModel::DefaultLoadLatency,
2081 MCSchedModel::DefaultHighLatency,
2082 20, // MispredictPenalty
2083 true, // PostRAScheduler
2084 true, // CompleteModel
2085 false, // EnableIntervals
2086 8, // Processor ID
2087 SIDPFullSpeedModelProcResources,
2088 SIDPFullSpeedModelSchedClasses,
2089 8,
2090 76,
2091 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2092 nullptr, // No Itinerary
2093 nullptr // No extra processor descriptor
2094};
2095
2096static const unsigned SIDPGFX950FullSpeedModelProcResourceSubUnits[] = {
2097 0, // Invalid
2098};
2099
2100// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2101static const llvm::MCProcResourceDesc SIDPGFX950FullSpeedModelProcResources[] = {
2102 {"InvalidUnit", 0, 0, 0, 0},
2103 {"HWBranch", 1, 0, 1, nullptr}, // #1
2104 {"HWExport", 1, 0, 1, nullptr}, // #2
2105 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2106 {"HWSALU", 1, 0, 1, nullptr}, // #4
2107 {"HWVALU", 1, 0, 1, nullptr}, // #5
2108 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2109 {"HWXDL", 1, 0, 0, nullptr}, // #7
2110};
2111
2112static const llvm::MCSchedModel SIDPGFX950FullSpeedModel = {
2113 1, // IssueWidth
2114 1, // MicroOpBufferSize
2115 MCSchedModel::DefaultLoopMicroOpBufferSize,
2116 MCSchedModel::DefaultLoadLatency,
2117 MCSchedModel::DefaultHighLatency,
2118 20, // MispredictPenalty
2119 true, // PostRAScheduler
2120 true, // CompleteModel
2121 false, // EnableIntervals
2122 9, // Processor ID
2123 SIDPGFX950FullSpeedModelProcResources,
2124 SIDPGFX950FullSpeedModelSchedClasses,
2125 8,
2126 76,
2127 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2128 nullptr, // No Itinerary
2129 nullptr // No extra processor descriptor
2130};
2131
2132#undef DBGFIELD
2133
2134#undef DBGVAL_OR_NULLPTR
2135
2136// Sorted (by key) array of values for CPU subtype.
2137extern const llvm::SubtargetSubTypeKV AMDGPUSubTypeKV[] = {
2138 { "bonaire", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2139 { "carrizo", { { { 0x0ULL, 0x40000000ULL, 0x100100ULL, 0x10010000000000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2140 { "fiji", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x10000000000000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2141 { "generic", { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
2142 { "generic-hsa", { { { 0x0ULL, 0x80000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
2143 { "gfx10-1-generic", { { { 0x4004000000000ULL, 0x20010000000200ULL, 0x25c00080b08040ULL, 0x8000101a0100100ULL, 0x3ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2144 { "gfx10-3-generic", { { { 0x3004004000000000ULL, 0x3a0000000000027ULL, 0x800000100000ULL, 0x2000000100ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2145 { "gfx1010", { { { 0x4004000000000ULL, 0x20010000000200ULL, 0x25c00080b08040ULL, 0x8000101a0100000ULL, 0x3ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2146 { "gfx1011", { { { 0x3004004000000000ULL, 0x20010000000227ULL, 0x25c00080b08040ULL, 0x8000101a0100000ULL, 0x3ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2147 { "gfx1012", { { { 0x3004004000000000ULL, 0x20010000000227ULL, 0x25c00080b08040ULL, 0x8000101a0100000ULL, 0x3ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2148 { "gfx1013", { { { 0x4004000000000ULL, 0x120010000000200ULL, 0x25c00080b08040ULL, 0x8000101a0100000ULL, 0x3ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2149 { "gfx1030", { { { 0x3004004000000000ULL, 0x3a0000000000027ULL, 0x800000100000ULL, 0x2000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2150 { "gfx1031", { { { 0x3004004000000000ULL, 0x3a0000000000027ULL, 0x800000100000ULL, 0x2000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2151 { "gfx1032", { { { 0x3004004000000000ULL, 0x3a0000000000027ULL, 0x800000100000ULL, 0x2000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2152 { "gfx1033", { { { 0x3004004000000000ULL, 0x3a0000000000027ULL, 0x800000100000ULL, 0x2000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2153 { "gfx1034", { { { 0x3004004000000000ULL, 0x3a0000000000027ULL, 0x800000100000ULL, 0x2000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2154 { "gfx1035", { { { 0x3004004000000000ULL, 0x3a0000000000027ULL, 0x800000100000ULL, 0x2000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2155 { "gfx1036", { { { 0x3004004000000000ULL, 0x3a0000000000027ULL, 0x800000100000ULL, 0x2000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2156 { "gfx11-generic", { { { 0x206004030008000ULL, 0x4000001000000bdULL, 0x8180810044100800ULL, 0x300002000000150ULL, 0x82ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2157 { "gfx1100", { { { 0x206004030008001ULL, 0x4000001000000bdULL, 0x8180810044100800ULL, 0x300002000000010ULL, 0x82ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2158 { "gfx1101", { { { 0x206004030008001ULL, 0x4000001000000bdULL, 0x8180810044100800ULL, 0x200002000000010ULL, 0x82ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2159 { "gfx1102", { { { 0x206004030008000ULL, 0x4000001000000bdULL, 0x8180810044100800ULL, 0x300002000000010ULL, 0x82ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2160 { "gfx1103", { { { 0x206004030008000ULL, 0x4000001000000bdULL, 0x8180810044100800ULL, 0x200002000000010ULL, 0x82ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2161 { "gfx1150", { { { 0x286004030008000ULL, 0x4000001000000bdULL, 0x2180810000100800ULL, 0x2000000450ULL, 0x82ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2162 { "gfx1151", { { { 0x286004030008001ULL, 0x4000001000000bdULL, 0x2180810000100800ULL, 0x2000000450ULL, 0x82ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2163 { "gfx1152", { { { 0x286004030008000ULL, 0x4000001000000bdULL, 0x2180810000100800ULL, 0x2000000450ULL, 0x82ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2164 { "gfx1153", { { { 0x286004030008000ULL, 0x4000001000000bdULL, 0x180810000100800ULL, 0x2000000450ULL, 0x82ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2165 { "gfx1170", { { { 0x86004030008000ULL, 0x14000001010000fcULL, 0x1808d0000100a00ULL, 0x2000000410ULL, 0x42ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2166 { "gfx12-5-generic", { { { 0x87eedcfcab915cULL, 0x200014070500080cULL, 0xac0138a03540090ULL, 0x179c45000787ULL, 0x4906ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX1250SpeedModel },
2167 { "gfx12-generic", { { { 0x87a860f0a98401ULL, 0x20000001010400fcULL, 0x180810401100a00ULL, 0x1044000706ULL, 0x242ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2168 { "gfx1200", { { { 0x87a860f0a98401ULL, 0x20000001010400fcULL, 0x180810401100a00ULL, 0x1044000606ULL, 0x242ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2169 { "gfx1201", { { { 0x87a860f0a98401ULL, 0x20000001010400fcULL, 0x180810401100a00ULL, 0x1044000606ULL, 0x242ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2170 { "gfx1250", { { { 0x87eedcfcab915cULL, 0x200014070500080cULL, 0xac0138a03540090ULL, 0x179c45000687ULL, 0x4906ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX1250SpeedModel },
2171 { "gfx1251", { { { 0x8feedcfcab915cULL, 0x200014070500080cULL, 0xac0138a03540090ULL, 0x179445000687ULL, 0x4906ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX1250SpeedModel },
2172 { "gfx1310", { { { 0x85ea9cfcab8409ULL, 0x800014050108000cULL, 0x380800001100290ULL, 0x162045000607ULL, 0x2ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2173 { "gfx600", { { { 0x0ULL, 0x40000000ULL, 0x100100ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2174 { "gfx601", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2175 { "gfx602", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2176 { "gfx700", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2177 { "gfx701", { { { 0x0ULL, 0x40000000ULL, 0x100100ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2178 { "gfx702", { { { 0x0ULL, 0x40000000ULL, 0x80000ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2179 { "gfx703", { { { 0x0ULL, 0x0ULL, 0x80000ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2180 { "gfx704", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2181 { "gfx705", { { { 0x0ULL, 0x0ULL, 0x80000ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2182 { "gfx801", { { { 0x0ULL, 0x40000000ULL, 0x100100ULL, 0x10010000000000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2183 { "gfx802", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x10000000080000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2184 { "gfx803", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x10000000000000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2185 { "gfx805", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x10000000080000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2186 { "gfx810", { { { 0x0ULL, 0x0ULL, 0x81400ULL, 0x10000000000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2187 { "gfx9-4-generic", { { { 0xf00c0040fc88a400ULL, 0x8380300000027ULL, 0x10c001000a140006ULL, 0x8000000180ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX942FullSpeedModel },
2188 { "gfx9-generic", { { { 0x400ULL, 0x9000000040200ULL, 0x80100c00ULL, 0x100ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2189 { "gfx900", { { { 0x400ULL, 0x9000000040200ULL, 0x180100c00ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2190 { "gfx902", { { { 0x400ULL, 0x9000000040200ULL, 0x180100c00ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2191 { "gfx904", { { { 0x400ULL, 0x9080000040200ULL, 0x80100c00ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2192 { "gfx906", { { { 0x3004000000000400ULL, 0x9080000040224ULL, 0x80100d00ULL, 0x8000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2193 { "gfx908", { { { 0xf004000010100400ULL, 0x9080000040227ULL, 0x1000000098100d00ULL, 0x8000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2194 { "gfx909", { { { 0x400ULL, 0x9000000040200ULL, 0x180100c00ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2195 { "gfx90a", { { { 0xf00c00403c080400ULL, 0x8380200000027ULL, 0x10c0000088140802ULL, 0x8000000080ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPFullSpeedModel },
2196 { "gfx90c", { { { 0x400ULL, 0x9000000040200ULL, 0x180100c00ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2197 { "gfx942", { { { 0xf00c1040fc88a400ULL, 0x8380309000027ULL, 0x10c001000a140006ULL, 0x8000000080ULL, 0x2000ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX942FullSpeedModel },
2198 { "gfx950", { { { 0xf00c00c6fca8a800ULL, 0x838030bc001a7ULL, 0x10c001000a14000eULL, 0x8000000081ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX950FullSpeedModel },
2199 { "hainan", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2200 { "hawaii", { { { 0x0ULL, 0x40000000ULL, 0x100100ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2201 { "iceland", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x10000000080000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2202 { "kabini", { { { 0x0ULL, 0x0ULL, 0x80000ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2203 { "kaveri", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2204 { "mullins", { { { 0x0ULL, 0x0ULL, 0x80000ULL, 0x200000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2205 { "oland", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2206 { "pitcairn", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2207 { "polaris10", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x10000000000000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2208 { "polaris11", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x10000000000000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2209 { "stoney", { { { 0x0ULL, 0x0ULL, 0x81400ULL, 0x10000000000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2210 { "tahiti", { { { 0x0ULL, 0x40000000ULL, 0x100100ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2211 { "tonga", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x10000000080000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2212 { "tongapro", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x10000000080000ULL, 0x10ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2213 { "verde", { { { 0x0ULL, 0x0ULL, 0x100000ULL, 0x4000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2214};
2215
2216// Sorted array of names of CPU subtypes, including aliases.
2217extern const llvm::StringRef AMDGPUNames[] = {
2218"bonaire",
2219"carrizo",
2220"fiji",
2221"generic",
2222"generic-hsa",
2223"gfx10-1-generic",
2224"gfx10-3-generic",
2225"gfx1010",
2226"gfx1011",
2227"gfx1012",
2228"gfx1013",
2229"gfx1030",
2230"gfx1031",
2231"gfx1032",
2232"gfx1033",
2233"gfx1034",
2234"gfx1035",
2235"gfx1036",
2236"gfx11-generic",
2237"gfx1100",
2238"gfx1101",
2239"gfx1102",
2240"gfx1103",
2241"gfx1150",
2242"gfx1151",
2243"gfx1152",
2244"gfx1153",
2245"gfx1170",
2246"gfx12-5-generic",
2247"gfx12-generic",
2248"gfx1200",
2249"gfx1201",
2250"gfx1250",
2251"gfx1251",
2252"gfx1310",
2253"gfx600",
2254"gfx601",
2255"gfx602",
2256"gfx700",
2257"gfx701",
2258"gfx702",
2259"gfx703",
2260"gfx704",
2261"gfx705",
2262"gfx801",
2263"gfx802",
2264"gfx803",
2265"gfx805",
2266"gfx810",
2267"gfx9-4-generic",
2268"gfx9-generic",
2269"gfx900",
2270"gfx902",
2271"gfx904",
2272"gfx906",
2273"gfx908",
2274"gfx909",
2275"gfx90a",
2276"gfx90c",
2277"gfx942",
2278"gfx950",
2279"hainan",
2280"hawaii",
2281"iceland",
2282"kabini",
2283"kaveri",
2284"mullins",
2285"oland",
2286"pitcairn",
2287"polaris10",
2288"polaris11",
2289"stoney",
2290"tahiti",
2291"tonga",
2292"tongapro",
2293"verde"};
2294
2295namespace AMDGPU_MC {
2296
2297unsigned resolveVariantSchedClassImpl(unsigned SchedClass,
2298 const MCInst *MI, const MCInstrInfo *MCII, const MCSubtargetInfo &STI, unsigned CPUID) {
2299 switch (SchedClass) {
2300 case 34: // COPY
2301 if (CPUID == 1) { // SIQuarterSpeedModel
2302 return 68; // WriteSALU
2303 }
2304 if (CPUID == 2) { // GFX10SpeedModel
2305 return 68; // WriteSALU
2306 }
2307 if (CPUID == 3) { // GFX11SpeedModel
2308 return 68; // WriteSALU
2309 }
2310 if (CPUID == 4) { // GFX1250SpeedModel
2311 return 68; // WriteSALU
2312 }
2313 if (CPUID == 5) { // GFX12SpeedModel
2314 return 68; // WriteSALU
2315 }
2316 if (CPUID == 6) { // SIFullSpeedModel
2317 return 68; // WriteSALU
2318 }
2319 if (CPUID == 7) { // SIDPGFX942FullSpeedModel
2320 return 68; // WriteSALU
2321 }
2322 if (CPUID == 8) { // SIDPFullSpeedModel
2323 return 68; // WriteSALU
2324 }
2325 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2326 return 68; // WriteSALU
2327 }
2328 break;
2329 case 35: // V_ACCVGPR_WRITE_B32_e64
2330 if (CPUID == 1) { // SIQuarterSpeedModel
2331 return 70; // Write64Bit_ReadDefault
2332 }
2333 break;
2334 case 38: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi
2335 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2336 return 72; // Write8PassMAI_MIMFMARead
2337 }
2338 break;
2339 case 53: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2340 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2341 return 73; // Write4PassMAI_MIMFMARead
2342 }
2343 break;
2344 case 54: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2345 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2346 return 73; // Write4PassMAI_MIMFMARead
2347 }
2348 break;
2349 case 55: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd
2350 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2351 return 72; // Write8PassMAI_MIMFMARead
2352 }
2353 break;
2354 case 60: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr
2355 if (CPUID == 4) { // GFX1250SpeedModel
2356 return 75; // WriteXDL2PassWMMA
2357 }
2358 break;
2359 case 61: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250
2360 if (CPUID == 4) { // GFX1250SpeedModel
2361 return 75; // WriteXDL2PassWMMA
2362 }
2363 break;
2364 };
2365 // Don't know how to resolve this scheduling class.
2366 return 0;
2367}
2368
2369} // namespace AMDGPU_MC
2370struct AMDGPUGenMCSubtargetInfo : public MCSubtargetInfo {
2371 AMDGPUGenMCSubtargetInfo(const Triple &TT,
2372 StringRef CPU, StringRef TuneCPU, StringRef FS,
2373 ArrayRef<StringRef> PN,
2374 ArrayRef<SubtargetFeatureKV> PF,
2375 ArrayRef<SubtargetSubTypeKV> PD,
2376 const MCWriteProcResEntry *WPR,
2377 const MCWriteLatencyEntry *WL,
2378 const MCReadAdvanceEntry *RA, const InstrStage *IS,
2379 const unsigned *OC, const unsigned *FP) :
2380 MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD,
2381 WPR, WL, RA, IS, OC, FP) { }
2382
2383 unsigned resolveVariantSchedClass(unsigned SchedClass,
2384 const MCInst *MI, const MCInstrInfo *MCII,
2385 unsigned CPUID) const final {
2386 return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);
2387 }
2388 unsigned getHwModeSet() const final;
2389 unsigned getHwMode(enum HwModeType type = HwMode_Default) const final;
2390};
2391unsigned AMDGPUGenMCSubtargetInfo::getHwModeSet() const {
2392 [[maybe_unused]] const FeatureBitset &FB = getFeatureBits();
2393 // Collect HwModes and store them as a bit set.
2394 unsigned Modes = 0;
2395 if (FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs]) Modes |= (1 << 0);
2396 if (!FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs] && FB[AMDGPU::FeatureWavefrontSize32]) Modes |= (1 << 1);
2397 if (!FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs] && FB[AMDGPU::FeatureWavefrontSize64]) Modes |= (1 << 2);
2398 if ((FB[AMDGPU::FeatureWavefrontSize32] || FB[AMDGPU::FeatureAssemblerPermissiveWavesize]) && !FB[AMDGPU::FeatureRequiresAlignedVGPRs]) Modes |= (1 << 3);
2399 return Modes;
2400}
2401unsigned AMDGPUGenMCSubtargetInfo::getHwMode(enum HwModeType type) const {
2402 unsigned Modes = getHwModeSet();
2403
2404 if (!Modes)
2405 return Modes;
2406
2407 switch (type) {
2408 case HwMode_Default:
2409 return llvm::countr_zero(Modes) + 1;
2410 case HwMode_ValueType:
2411 Modes &= 15;
2412 if (!Modes)
2413 return Modes;
2414 if (!llvm::has_single_bit<unsigned>(Modes))
2415 llvm_unreachable("Two or more HwModes for ValueType were found!");
2416 return llvm::countr_zero(Modes) + 1;
2417 case HwMode_RegInfo:
2418 Modes &= 15;
2419 if (!Modes)
2420 return Modes;
2421 if (!llvm::has_single_bit<unsigned>(Modes))
2422 llvm_unreachable("Two or more HwModes for RegInfo were found!");
2423 return llvm::countr_zero(Modes) + 1;
2424 case HwMode_EncodingInfo:
2425 // No HwMode for EncodingInfo.
2426 return 0;
2427 }
2428 llvm_unreachable("unexpected HwModeType");
2429 return 0; // should not get here
2430}
2431
2432static inline MCSubtargetInfo *createAMDGPUMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS) {
2433 return new AMDGPUGenMCSubtargetInfo(TT, CPU, TuneCPU, FS, AMDGPUNames, AMDGPUFeatureKV, AMDGPUSubTypeKV,
2434 AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable,
2435 nullptr, nullptr, nullptr);
2436}
2437
2438
2439} // namespace llvm
2440
2441#endif // GET_SUBTARGETINFO_MC_DESC
2442
2443#ifdef GET_SUBTARGETINFO_TARGET_DESC
2444#undef GET_SUBTARGETINFO_TARGET_DESC
2445
2446#include "llvm/ADT/BitmaskEnum.h"
2447#include "llvm/Support/Debug.h"
2448#include "llvm/Support/raw_ostream.h"
2449
2450// ParseSubtargetFeatures - Parses features string setting specified
2451// subtarget options.
2452void llvm::AMDGPUSubtarget::ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS) {
2453 LLVM_DEBUG(dbgs() << "\nFeatures:" << FS);
2454 LLVM_DEBUG(dbgs() << "\nCPU:" << CPU);
2455 LLVM_DEBUG(dbgs() << "\nTuneCPU:" << TuneCPU << "\n\n");
2456 InitMCProcessorInfo(CPU, TuneCPU, FS);
2457 const FeatureBitset &Bits = getFeatureBits();
2458 if (Bits[AMDGPU::Feature1_5xVGPRs]) Has1_5xVGPRs = true;
2459 if (Bits[AMDGPU::Feature16BitInsts]) Has16BitInsts = true;
2460 if (Bits[AMDGPU::Feature45BitNumRecordsBufferResource]) Has45BitNumRecordsBufferResource = true;
2461 if (Bits[AMDGPU::Feature64BitLiterals]) Has64BitLiterals = true;
2462 if (Bits[AMDGPU::Feature1024AddressableVGPRs]) Has1024AddressableVGPRs = true;
2463 if (Bits[AMDGPU::FeatureA16]) HasA16 = true;
2464 if (Bits[AMDGPU::FeatureAddMinMaxInsts]) HasAddMinMaxInsts = true;
2465 if (Bits[AMDGPU::FeatureAddNoCarryInsts]) HasAddNoCarryInsts = true;
2466 if (Bits[AMDGPU::FeatureAddSubU64Insts]) HasAddSubU64Insts = true;
2467 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize32768] && AddressableLocalMemorySize < 32768) AddressableLocalMemorySize = 32768;
2468 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize65536] && AddressableLocalMemorySize < 65536) AddressableLocalMemorySize = 65536;
2469 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize163840] && AddressableLocalMemorySize < 163840) AddressableLocalMemorySize = 163840;
2470 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize327680] && AddressableLocalMemorySize < 327680) AddressableLocalMemorySize = 327680;
2471 if (Bits[AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics]) HasAgentScopeFineGrainedRemoteMemoryAtomics = true;
2472 if (Bits[AMDGPU::FeatureApertureRegs]) HasApertureRegs = true;
2473 if (Bits[AMDGPU::FeatureArchitectedFlatScratch]) HasArchitectedFlatScratch = true;
2474 if (Bits[AMDGPU::FeatureArchitectedSGPRs]) HasArchitectedSGPRs = true;
2475 if (Bits[AMDGPU::FeatureAshrPkInsts]) HasAshrPkInsts = true;
2476 if (Bits[AMDGPU::FeatureAssemblerPermissiveWavesize]) HasAssemblerPermissiveWavesize = true;
2477 if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts]) HasAtomicBufferGlobalPkAddF16Insts = true;
2478 if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts]) HasAtomicBufferGlobalPkAddF16NoRtnInsts = true;
2479 if (Bits[AMDGPU::FeatureAtomicBufferPkAddBF16Inst]) HasAtomicBufferPkAddBF16Inst = true;
2480 if (Bits[AMDGPU::FeatureAtomicCSubNoRtnInsts]) HasAtomicCSubNoRtnInsts = true;
2481 if (Bits[AMDGPU::FeatureAtomicDsPkAdd16Insts]) HasAtomicDsPkAdd16Insts = true;
2482 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts]) HasAtomicFMinFMaxF32FlatInsts = true;
2483 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts]) HasAtomicFMinFMaxF32GlobalInsts = true;
2484 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts]) HasAtomicFMinFMaxF64FlatInsts = true;
2485 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts]) HasAtomicFMinFMaxF64GlobalInsts = true;
2486 if (Bits[AMDGPU::FeatureAtomicFaddNoRtnInsts]) HasAtomicFaddNoRtnInsts = true;
2487 if (Bits[AMDGPU::FeatureAtomicFaddRtnInsts]) HasAtomicFaddRtnInsts = true;
2488 if (Bits[AMDGPU::FeatureAtomicFlatPkAdd16Insts]) HasAtomicFlatPkAdd16Insts = true;
2489 if (Bits[AMDGPU::FeatureAtomicGlobalPkAddBF16Inst]) HasAtomicGlobalPkAddBF16Inst = true;
2490 if (Bits[AMDGPU::FeatureAutoWaitcntBeforeBarrier]) HasAutoWaitcntBeforeBarrier = true;
2491 if (Bits[AMDGPU::FeatureBF8ConversionScaleInsts]) HasBF8ConversionScaleInsts = true;
2492 if (Bits[AMDGPU::FeatureBF16ConversionInsts]) HasBF16ConversionInsts = true;
2493 if (Bits[AMDGPU::FeatureBF16PackedInsts]) HasBF16PackedInsts = true;
2494 if (Bits[AMDGPU::FeatureBF16TransInsts]) HasBF16TransInsts = true;
2495 if (Bits[AMDGPU::FeatureBVHDualAndBVH8Insts]) HasBVHDualAndBVH8Insts = true;
2496 if (Bits[AMDGPU::FeatureBackOffBarrier]) HasBackOffBarrier = true;
2497 if (Bits[AMDGPU::FeatureBitOp3Insts]) HasBitOp3Insts = true;
2498 if (Bits[AMDGPU::FeatureCIInsts]) HasCIInsts = true;
2499 if (Bits[AMDGPU::FeatureClusters]) HasClusters = true;
2500 if (Bits[AMDGPU::FeatureCuMode]) EnableCuMode = true;
2501 if (Bits[AMDGPU::FeatureCubeInsts]) HasCubeInsts = true;
2502 if (Bits[AMDGPU::FeatureCvtFP8VOP1Bug]) HasCvtFP8VOP1Bug = true;
2503 if (Bits[AMDGPU::FeatureCvtNormInsts]) HasCvtNormInsts = true;
2504 if (Bits[AMDGPU::FeatureCvtPkF16F32Inst]) HasCvtPkF16F32Inst = true;
2505 if (Bits[AMDGPU::FeatureCvtPkNormVOP2Insts]) HasCvtPkNormVOP2Insts = true;
2506 if (Bits[AMDGPU::FeatureCvtPkNormVOP3Insts]) HasCvtPkNormVOP3Insts = true;
2507 if (Bits[AMDGPU::FeatureD16Writes32BitVgpr]) HasD16Writes32BitVgpr = true;
2508 if (Bits[AMDGPU::FeatureDLInsts]) HasDLInsts = true;
2509 if (Bits[AMDGPU::FeatureDPALU_DPP]) HasDPALU_DPP = true;
2510 if (Bits[AMDGPU::FeatureDPP]) HasDPP = true;
2511 if (Bits[AMDGPU::FeatureDPP8]) HasDPP8 = true;
2512 if (Bits[AMDGPU::FeatureDPPBroadcasts]) HasDPPBroadcasts = true;
2513 if (Bits[AMDGPU::FeatureDPPSrc1SGPR]) HasDPPSrc1SGPR = true;
2514 if (Bits[AMDGPU::FeatureDPPWavefrontShifts]) HasDPPWavefrontShifts = true;
2515 if (Bits[AMDGPU::FeatureDX10ClampAndIEEEMode]) HasDX10ClampAndIEEEMode = true;
2516 if (Bits[AMDGPU::FeatureDefaultComponentBroadcast]) HasDefaultComponentBroadcast = true;
2517 if (Bits[AMDGPU::FeatureDefaultComponentZero]) HasDefaultComponentZero = true;
2518 if (Bits[AMDGPU::FeatureDot1Insts]) HasDot1Insts = true;
2519 if (Bits[AMDGPU::FeatureDot2Insts]) HasDot2Insts = true;
2520 if (Bits[AMDGPU::FeatureDot3Insts]) HasDot3Insts = true;
2521 if (Bits[AMDGPU::FeatureDot4Insts]) HasDot4Insts = true;
2522 if (Bits[AMDGPU::FeatureDot5Insts]) HasDot5Insts = true;
2523 if (Bits[AMDGPU::FeatureDot6Insts]) HasDot6Insts = true;
2524 if (Bits[AMDGPU::FeatureDot7Insts]) HasDot7Insts = true;
2525 if (Bits[AMDGPU::FeatureDot8Insts]) HasDot8Insts = true;
2526 if (Bits[AMDGPU::FeatureDot9Insts]) HasDot9Insts = true;
2527 if (Bits[AMDGPU::FeatureDot10Insts]) HasDot10Insts = true;
2528 if (Bits[AMDGPU::FeatureDot11Insts]) HasDot11Insts = true;
2529 if (Bits[AMDGPU::FeatureDot12Insts]) HasDot12Insts = true;
2530 if (Bits[AMDGPU::FeatureDot13Insts]) HasDot13Insts = true;
2531 if (Bits[AMDGPU::FeatureDsSrc2Insts]) HasDsSrc2Insts = true;
2532 if (Bits[AMDGPU::FeatureDumpCodeLower]) DumpCode = true;
2533 if (Bits[AMDGPU::FeatureEmulatedSystemScopeAtomics]) HasEmulatedSystemScopeAtomics = true;
2534 if (Bits[AMDGPU::FeatureEnableDS128]) EnableDS128 = true;
2535 if (Bits[AMDGPU::FeatureEnableFlatScratch]) EnableFlatScratch = true;
2536 if (Bits[AMDGPU::FeatureEnableLoadStoreOpt]) EnableLoadStoreOpt = true;
2537 if (Bits[AMDGPU::FeatureEnablePRTStrictNull]) EnablePRTStrictNull = true;
2538 if (Bits[AMDGPU::FeatureEnableSIScheduler]) EnableSIScheduler = true;
2539 if (Bits[AMDGPU::FeatureEnableUnsafeDSOffsetFolding]) EnableUnsafeDSOffsetFolding = true;
2540 if (Bits[AMDGPU::FeatureExtendedImageInsts]) HasExtendedImageInsts = true;
2541 if (Bits[AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts]) HasF16BF16ToFP6BF6ConversionScaleInsts = true;
2542 if (Bits[AMDGPU::FeatureF32ToF16BF16ConversionSRInsts]) HasF32ToF16BF16ConversionSRInsts = true;
2543 if (Bits[AMDGPU::FeatureFMA]) HasFMA = true;
2544 if (Bits[AMDGPU::FeatureFP4ConversionScaleInsts]) HasFP4ConversionScaleInsts = true;
2545 if (Bits[AMDGPU::FeatureFP6BF6ConversionScaleInsts]) HasFP6BF6ConversionScaleInsts = true;
2546 if (Bits[AMDGPU::FeatureFP8ConversionInsts]) HasFP8ConversionInsts = true;
2547 if (Bits[AMDGPU::FeatureFP8ConversionScaleInsts]) HasFP8ConversionScaleInsts = true;
2548 if (Bits[AMDGPU::FeatureFP8E5M3Insts]) HasFP8E5M3Insts = true;
2549 if (Bits[AMDGPU::FeatureFP8Insts]) HasFP8Insts = true;
2550 if (Bits[AMDGPU::FeatureFP64]) HasFP64 = true;
2551 if (Bits[AMDGPU::FeatureFastDenormalF32]) HasFastDenormalF32 = true;
2552 if (Bits[AMDGPU::FeatureFastFMAF32]) HasFastFMAF32 = true;
2553 if (Bits[AMDGPU::FeatureFlatAddressSpace]) HasFlatAddressSpace = true;
2554 if (Bits[AMDGPU::FeatureFlatAtomicFaddF32Inst]) HasFlatAtomicFaddF32Inst = true;
2555 if (Bits[AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst]) HasFlatBufferGlobalAtomicFaddF64Inst = true;
2556 if (Bits[AMDGPU::FeatureFlatGVSMode]) HasFlatGVSMode = true;
2557 if (Bits[AMDGPU::FeatureFlatGlobalInsts]) HasFlatGlobalInsts = true;
2558 if (Bits[AMDGPU::FeatureFlatInstOffsets]) HasFlatInstOffsets = true;
2559 if (Bits[AMDGPU::FeatureFlatOffsetBits12] && FlatOffsetBitWidth < 12) FlatOffsetBitWidth = 12;
2560 if (Bits[AMDGPU::FeatureFlatOffsetBits24] && FlatOffsetBitWidth < 24) FlatOffsetBitWidth = 24;
2561 if (Bits[AMDGPU::FeatureFlatScratchInsts]) HasFlatScratchInsts = true;
2562 if (Bits[AMDGPU::FeatureFlatSegmentOffsetBug]) HasFlatSegmentOffsetBug = true;
2563 if (Bits[AMDGPU::FeatureFlatSignedOffset]) HasFlatSignedOffset = true;
2564 if (Bits[AMDGPU::FeatureFmaMixBF16Insts]) HasFmaMixBF16Insts = true;
2565 if (Bits[AMDGPU::FeatureFmaMixInsts]) HasFmaMixInsts = true;
2566 if (Bits[AMDGPU::FeatureFmacF64Inst]) HasFmacF64Inst = true;
2567 if (Bits[AMDGPU::FeatureFullRate64Ops]) HasFullRate64Ops = true;
2568 if (Bits[AMDGPU::FeatureG16]) HasG16 = true;
2569 if (Bits[AMDGPU::FeatureGCN3Encoding]) HasGCN3Encoding = true;
2570 if (Bits[AMDGPU::FeatureGDS]) HasGDS = true;
2571 if (Bits[AMDGPU::FeatureGFX7GFX8GFX9Insts]) HasGFX7GFX8GFX9Insts = true;
2572 if (Bits[AMDGPU::FeatureGFX8Insts]) HasGFX8Insts = true;
2573 if (Bits[AMDGPU::FeatureGFX9] && Gen < GCNSubtarget::GFX9) Gen = GCNSubtarget::GFX9;
2574 if (Bits[AMDGPU::FeatureGFX9Insts]) HasGFX9Insts = true;
2575 if (Bits[AMDGPU::FeatureGFX10] && Gen < GCNSubtarget::GFX10) Gen = GCNSubtarget::GFX10;
2576 if (Bits[AMDGPU::FeatureGFX10Insts]) HasGFX10Insts = true;
2577 if (Bits[AMDGPU::FeatureGFX10_3Insts]) HasGFX10_3Insts = true;
2578 if (Bits[AMDGPU::FeatureGFX10_AEncoding]) HasGFX10_AEncoding = true;
2579 if (Bits[AMDGPU::FeatureGFX10_BEncoding]) HasGFX10_BEncoding = true;
2580 if (Bits[AMDGPU::FeatureGFX11] && Gen < GCNSubtarget::GFX11) Gen = GCNSubtarget::GFX11;
2581 if (Bits[AMDGPU::FeatureGFX11Insts]) HasGFX11Insts = true;
2582 if (Bits[AMDGPU::FeatureGFX11_7Insts]) HasGFX11_7Insts = true;
2583 if (Bits[AMDGPU::FeatureGFX12] && Gen < GCNSubtarget::GFX12) Gen = GCNSubtarget::GFX12;
2584 if (Bits[AMDGPU::FeatureGFX12Insts]) HasGFX12Insts = true;
2585 if (Bits[AMDGPU::FeatureGFX13] && Gen < GCNSubtarget::GFX13) Gen = GCNSubtarget::GFX13;
2586 if (Bits[AMDGPU::FeatureGFX13Insts]) HasGFX13Insts = true;
2587 if (Bits[AMDGPU::FeatureGFX90AInsts]) HasGFX90AInsts = true;
2588 if (Bits[AMDGPU::FeatureGFX940Insts]) HasGFX940Insts = true;
2589 if (Bits[AMDGPU::FeatureGFX950Insts]) HasGFX950Insts = true;
2590 if (Bits[AMDGPU::FeatureGFX1250Insts]) HasGFX1250Insts = true;
2591 if (Bits[AMDGPU::FeatureGWS]) HasGWS = true;
2592 if (Bits[AMDGPU::FeatureGetWaveIdInst]) HasGetWaveIdInst = true;
2593 if (Bits[AMDGPU::FeatureGloballyAddressableScratch]) HasGloballyAddressableScratch = true;
2594 if (Bits[AMDGPU::FeatureHalfRate64Ops]) HasHalfRate64Ops = true;
2595 if (Bits[AMDGPU::FeatureIEEEMinimumMaximumInsts]) HasIEEEMinimumMaximumInsts = true;
2596 if (Bits[AMDGPU::FeatureImageGather4D16Bug]) HasImageGather4D16Bug = true;
2597 if (Bits[AMDGPU::FeatureImageInsts]) HasImageInsts = true;
2598 if (Bits[AMDGPU::FeatureImageStoreD16Bug]) HasImageStoreD16Bug = true;
2599 if (Bits[AMDGPU::FeatureInstCacheLineSize64] && InstCacheLineSize < 64) InstCacheLineSize = 64;
2600 if (Bits[AMDGPU::FeatureInstCacheLineSize128] && InstCacheLineSize < 128) InstCacheLineSize = 128;
2601 if (Bits[AMDGPU::FeatureInstFwdPrefetchBug]) HasInstFwdPrefetchBug = true;
2602 if (Bits[AMDGPU::FeatureIntClamp]) HasIntClamp = true;
2603 if (Bits[AMDGPU::FeatureInv2PiInlineImm]) HasInv2PiInlineImm = true;
2604 if (Bits[AMDGPU::FeatureKernargPreload]) HasKernargPreload = true;
2605 if (Bits[AMDGPU::FeatureLDSBankCount16] && LDSBankCount < 16) LDSBankCount = 16;
2606 if (Bits[AMDGPU::FeatureLDSBankCount32] && LDSBankCount < 32) LDSBankCount = 32;
2607 if (Bits[AMDGPU::FeatureLDSMisalignedBug]) HasLDSMisalignedBug = true;
2608 if (Bits[AMDGPU::FeatureLdsBarrierArriveAtomic]) HasLdsBarrierArriveAtomic = true;
2609 if (Bits[AMDGPU::FeatureLdsBranchVmemWARHazard]) HasLdsBranchVmemWARHazard = true;
2610 if (Bits[AMDGPU::FeatureLerpInst]) HasLerpInst = true;
2611 if (Bits[AMDGPU::FeatureLshlAddU64Inst]) HasLshlAddU64Inst = true;
2612 if (Bits[AMDGPU::FeatureMADIntraFwdBug]) HasMADIntraFwdBug = true;
2613 if (Bits[AMDGPU::FeatureMAIInsts]) HasMAIInsts = true;
2614 if (Bits[AMDGPU::FeatureMFMAInlineLiteralBug]) HasMFMAInlineLiteralBug = true;
2615 if (Bits[AMDGPU::FeatureMIMG_R128]) HasMIMG_R128 = true;
2616 if (Bits[AMDGPU::FeatureMSAALoadDstSelBug]) HasMSAALoadDstSelBug = true;
2617 if (Bits[AMDGPU::FeatureMadMacF32Insts]) HasMadMacF32Insts = true;
2618 if (Bits[AMDGPU::FeatureMadMixInsts]) HasMadMixInsts = true;
2619 if (Bits[AMDGPU::FeatureMadU32Inst]) HasMadU32Inst = true;
2620 if (Bits[AMDGPU::FeatureMaxHardClauseLength32] && MaxHardClauseLength < 32) MaxHardClauseLength = 32;
2621 if (Bits[AMDGPU::FeatureMaxHardClauseLength63] && MaxHardClauseLength < 63) MaxHardClauseLength = 63;
2622 if (Bits[AMDGPU::FeatureMaxPrivateElementSize4] && MaxPrivateElementSize < 4) MaxPrivateElementSize = 4;
2623 if (Bits[AMDGPU::FeatureMaxPrivateElementSize8] && MaxPrivateElementSize < 8) MaxPrivateElementSize = 8;
2624 if (Bits[AMDGPU::FeatureMaxPrivateElementSize16] && MaxPrivateElementSize < 16) MaxPrivateElementSize = 16;
2625 if (Bits[AMDGPU::FeatureMcastLoadInsts]) HasMcastLoadInsts = true;
2626 if (Bits[AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport]) HasMemoryAtomicFaddF32DenormalSupport = true;
2627 if (Bits[AMDGPU::FeatureMin3Max3PKF16]) HasMin3Max3PKF16 = true;
2628 if (Bits[AMDGPU::FeatureMinimum3Maximum3F16]) HasMinimum3Maximum3F16 = true;
2629 if (Bits[AMDGPU::FeatureMinimum3Maximum3F32]) HasMinimum3Maximum3F32 = true;
2630 if (Bits[AMDGPU::FeatureMinimum3Maximum3PKF16]) HasMinimum3Maximum3PKF16 = true;
2631 if (Bits[AMDGPU::FeatureMovrel]) HasMovrel = true;
2632 if (Bits[AMDGPU::FeatureNSAClauseBug]) HasNSAClauseBug = true;
2633 if (Bits[AMDGPU::FeatureNSAEncoding]) HasNSAEncoding = true;
2634 if (Bits[AMDGPU::FeatureNSAtoVMEMBug]) HasNSAtoVMEMBug = true;
2635 if (Bits[AMDGPU::FeatureNegativeScratchOffsetBug]) HasNegativeScratchOffsetBug = true;
2636 if (Bits[AMDGPU::FeatureNegativeUnalignedScratchOffsetBug]) HasNegativeUnalignedScratchOffsetBug = true;
2637 if (Bits[AMDGPU::FeatureNoDataDepHazard]) HasNoDataDepHazard = true;
2638 if (Bits[AMDGPU::FeatureNoSdstCMPX]) HasNoSdstCMPX = true;
2639 if (Bits[AMDGPU::FeatureOffset3fBug]) HasOffset3fBug = true;
2640 if (Bits[AMDGPU::FeaturePackedFP32Ops]) HasPackedFP32Ops = true;
2641 if (Bits[AMDGPU::FeaturePackedTID]) HasPackedTID = true;
2642 if (Bits[AMDGPU::FeaturePartialNSAEncoding]) HasPartialNSAEncoding = true;
2643 if (Bits[AMDGPU::FeaturePermlane16Swap]) HasPermlane16Swap = true;
2644 if (Bits[AMDGPU::FeaturePermlane32Swap]) HasPermlane32Swap = true;
2645 if (Bits[AMDGPU::FeaturePkAddMinMaxInsts]) HasPkAddMinMaxInsts = true;
2646 if (Bits[AMDGPU::FeaturePkFmacF16Inst]) HasPkFmacF16Inst = true;
2647 if (Bits[AMDGPU::FeaturePointSampleAccel]) HasPointSampleAccel = true;
2648 if (Bits[AMDGPU::FeaturePreciseMemory]) EnablePreciseMemory = true;
2649 if (Bits[AMDGPU::FeaturePrivEnabledTrap2NopBug]) HasPrivEnabledTrap2NopBug = true;
2650 if (Bits[AMDGPU::FeaturePrngInst]) HasPrngInst = true;
2651 if (Bits[AMDGPU::FeaturePseudoScalarTrans]) HasPseudoScalarTrans = true;
2652 if (Bits[AMDGPU::FeatureQsadInsts]) HasQsadInsts = true;
2653 if (Bits[AMDGPU::FeatureR128A16]) HasR128A16 = true;
2654 if (Bits[AMDGPU::FeatureRealTrue16Insts]) EnableRealTrue16Insts = true;
2655 if (Bits[AMDGPU::FeatureRelaxedBufferOOBMode]) HasRelaxedBufferOOBMode = true;
2656 if (Bits[AMDGPU::FeatureRequiredExportPriority]) HasRequiredExportPriority = true;
2657 if (Bits[AMDGPU::FeatureRequiresAlignedVGPRs]) RequiresAlignVGPR = true;
2658 if (Bits[AMDGPU::FeatureRequiresCOV6]) RequiresCOV6 = true;
2659 if (Bits[AMDGPU::FeatureRestrictedSOffset]) HasRestrictedSOffset = true;
2660 if (Bits[AMDGPU::FeatureSALUFloatInsts]) HasSALUFloatInsts = true;
2661 if (Bits[AMDGPU::FeatureSALUMinimumMaximumInsts]) HasSALUMinimumMaximumInsts = true;
2662 if (Bits[AMDGPU::FeatureSBarrierLeaveImm]) HasSBarrierLeaveImm = true;
2663 if (Bits[AMDGPU::FeatureSDWA]) HasSDWA = true;
2664 if (Bits[AMDGPU::FeatureSDWAMac]) HasSDWAMac = true;
2665 if (Bits[AMDGPU::FeatureSDWAOmod]) HasSDWAOmod = true;
2666 if (Bits[AMDGPU::FeatureSDWAOutModsVOPC]) HasSDWAOutModsVOPC = true;
2667 if (Bits[AMDGPU::FeatureSDWAScalar]) HasSDWAScalar = true;
2668 if (Bits[AMDGPU::FeatureSDWASdst]) HasSDWASdst = true;
2669 if (Bits[AMDGPU::FeatureSGPRInitBug]) HasSGPRInitBug = true;
2670 if (Bits[AMDGPU::FeatureSMEMtoVectorWriteHazard]) HasSMEMtoVectorWriteHazard = true;
2671 if (Bits[AMDGPU::FeatureSMemRealTime]) HasSMemRealTime = true;
2672 if (Bits[AMDGPU::FeatureSMemTimeInst]) HasSMemTimeInst = true;
2673 if (Bits[AMDGPU::FeatureSRAMECC]) EnableSRAMECC = true;
2674 if (Bits[AMDGPU::FeatureSWakeupBarrier]) HasSWakeupBarrier = true;
2675 if (Bits[AMDGPU::FeatureSWakeupImm]) HasSWakeupImm = true;
2676 if (Bits[AMDGPU::FeatureSadInsts]) HasSadInsts = true;
2677 if (Bits[AMDGPU::FeatureSafeCUPrefetch]) HasSafeCUPrefetch = true;
2678 if (Bits[AMDGPU::FeatureSafeSmemPrefetch]) HasSafeSmemPrefetch = true;
2679 if (Bits[AMDGPU::FeatureScalarAtomics]) HasScalarAtomics = true;
2680 if (Bits[AMDGPU::FeatureScalarDwordx3Loads]) HasScalarDwordx3Loads = true;
2681 if (Bits[AMDGPU::FeatureScalarFlatScratchInsts]) HasScalarFlatScratchInsts = true;
2682 if (Bits[AMDGPU::FeatureScalarStores]) HasScalarStores = true;
2683 if (Bits[AMDGPU::FeatureSeaIslands] && Gen < GCNSubtarget::SEA_ISLANDS) Gen = GCNSubtarget::SEA_ISLANDS;
2684 if (Bits[AMDGPU::FeatureSetPrioIncWgInst]) HasSetPrioIncWgInst = true;
2685 if (Bits[AMDGPU::FeatureSetregVGPRMSBFixup]) HasSetregVGPRMSBFixup = true;
2686 if (Bits[AMDGPU::FeatureShaderCyclesHiLoRegisters]) HasShaderCyclesHiLoRegisters = true;
2687 if (Bits[AMDGPU::FeatureShaderCyclesRegister]) HasShaderCyclesRegister = true;
2688 if (Bits[AMDGPU::FeatureSouthernIslands] && Gen < GCNSubtarget::SOUTHERN_ISLANDS) Gen = GCNSubtarget::SOUTHERN_ISLANDS;
2689 if (Bits[AMDGPU::FeatureSupportsSRAMECC]) SupportsSRAMECC = true;
2690 if (Bits[AMDGPU::FeatureSupportsXNACK]) SupportsXNACK = true;
2691 if (Bits[AMDGPU::FeatureTanhInsts]) HasTanhInsts = true;
2692 if (Bits[AMDGPU::FeatureTensorCvtLutInsts]) HasTensorCvtLutInsts = true;
2693 if (Bits[AMDGPU::FeatureTgSplit]) EnableTgSplit = true;
2694 if (Bits[AMDGPU::FeatureTransposeLoadF4F6Insts]) HasTransposeLoadF4F6Insts = true;
2695 if (Bits[AMDGPU::FeatureTrapHandler]) HasTrapHandler = true;
2696 if (Bits[AMDGPU::FeatureTrigReducedRange]) HasTrigReducedRange = true;
2697 if (Bits[AMDGPU::FeatureTrue16BitInsts]) HasTrue16BitInsts = true;
2698 if (Bits[AMDGPU::FeatureUnalignedAccessMode]) HasUnalignedAccessMode = true;
2699 if (Bits[AMDGPU::FeatureUnalignedBufferAccess]) HasUnalignedBufferAccess = true;
2700 if (Bits[AMDGPU::FeatureUnalignedDSAccess]) HasUnalignedDSAccess = true;
2701 if (Bits[AMDGPU::FeatureUnalignedScratchAccess]) HasUnalignedScratchAccess = true;
2702 if (Bits[AMDGPU::FeatureUnpackedD16VMem]) HasUnpackedD16VMem = true;
2703 if (Bits[AMDGPU::FeatureUseAddPC64Inst]) UseAddPC64Inst = true;
2704 if (Bits[AMDGPU::FeatureUseBlockVGPROpsForCSR]) UseBlockVGPROpsForCSR = true;
2705 if (Bits[AMDGPU::FeatureUseFlatForGlobal]) UseFlatForGlobal = true;
2706 if (Bits[AMDGPU::FeatureUserSGPRInit16Bug]) HasUserSGPRInit16Bug = true;
2707 if (Bits[AMDGPU::FeatureVALUTransUseHazard]) HasVALUTransUseHazard = true;
2708 if (Bits[AMDGPU::FeatureVGPRIndexMode]) HasVGPRIndexMode = true;
2709 if (Bits[AMDGPU::FeatureVMEMtoScalarWriteHazard]) HasVMEMtoScalarWriteHazard = true;
2710 if (Bits[AMDGPU::FeatureVMemToLDSLoad]) HasVMemToLDSLoad = true;
2711 if (Bits[AMDGPU::FeatureVOP3Literal]) HasVOP3Literal = true;
2712 if (Bits[AMDGPU::FeatureVOP3PInsts]) HasVOP3PInsts = true;
2713 if (Bits[AMDGPU::FeatureVOPDInsts]) HasVOPDInsts = true;
2714 if (Bits[AMDGPU::FeatureVcmpxExecWARHazard]) HasVcmpxExecWARHazard = true;
2715 if (Bits[AMDGPU::FeatureVcmpxPermlaneHazard]) HasVcmpxPermlaneHazard = true;
2716 if (Bits[AMDGPU::FeatureVmemPrefInsts]) HasVmemPrefInsts = true;
2717 if (Bits[AMDGPU::FeatureVmemWriteVgprInOrder]) HasVmemWriteVgprInOrder = true;
2718 if (Bits[AMDGPU::FeatureVolcanicIslands] && Gen < GCNSubtarget::VOLCANIC_ISLANDS) Gen = GCNSubtarget::VOLCANIC_ISLANDS;
2719 if (Bits[AMDGPU::FeatureVscnt]) HasVscnt = true;
2720 if (Bits[AMDGPU::FeatureWMMA128bInsts]) HasWMMA128bInsts = true;
2721 if (Bits[AMDGPU::FeatureWMMA256bInsts]) HasWMMA256bInsts = true;
2722 if (Bits[AMDGPU::FeatureWaitXcnt]) HasWaitXcnt = true;
2723 if (Bits[AMDGPU::FeatureWaitsBeforeSystemScopeStores]) RequiresWaitsBeforeSystemScopeStores = true;
2724 if (Bits[AMDGPU::FeatureWavefrontSize16] && WavefrontSizeLog2 < 4) WavefrontSizeLog2 = 4;
2725 if (Bits[AMDGPU::FeatureWavefrontSize32] && WavefrontSizeLog2 < 5) WavefrontSizeLog2 = 5;
2726 if (Bits[AMDGPU::FeatureWavefrontSize64] && WavefrontSizeLog2 < 6) WavefrontSizeLog2 = 6;
2727 if (Bits[AMDGPU::FeatureXF32Insts]) HasXF32Insts = true;
2728 if (Bits[AMDGPU::FeatureXNACK]) EnableXNACK = true;
2729}
2730
2731#endif // GET_SUBTARGETINFO_TARGET_DESC
2732
2733#ifdef GET_SUBTARGETINFO_HEADER
2734#undef GET_SUBTARGETINFO_HEADER
2735
2736namespace llvm {
2737
2738class DFAPacketizer;
2739namespace AMDGPU_MC {
2740
2741unsigned resolveVariantSchedClassImpl(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, const MCSubtargetInfo &STI, unsigned CPUID);
2742
2743} // namespace AMDGPU_MC
2744struct AMDGPUGenSubtargetInfo : public TargetSubtargetInfo {
2745 explicit AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS);
2746public:
2747 unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *DefMI, const TargetSchedModel *SchedModel) const final;
2748 unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const final;
2749 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
2750 enum class AMDGPUHwModeBits : unsigned {
2751 DefaultMode = 0,
2752 AVAlign2LoadStoreMode = (1 << 0),
2753 AlignedVGPRNoAGPRMode_Wave32 = (1 << 1),
2754 AlignedVGPRNoAGPRMode_Wave64 = (1 << 2),
2755 anonymous_14608 = (1 << 3),
2756
2757 LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/anonymous_14608),
2758 };
2759 unsigned getHwModeSet() const final;
2760 unsigned getHwMode(enum HwModeType type = HwMode_Default) const final;
2761};
2762
2763} // namespace llvm
2764
2765#endif // GET_SUBTARGETINFO_HEADER
2766
2767#ifdef GET_SUBTARGETINFO_CTOR
2768#undef GET_SUBTARGETINFO_CTOR
2769
2770#include "llvm/CodeGen/TargetSchedule.h"
2771
2772namespace llvm {
2773
2774extern const llvm::StringRef AMDGPUNames[];
2775extern const llvm::SubtargetFeatureKV AMDGPUFeatureKV[];
2776extern const llvm::SubtargetSubTypeKV AMDGPUSubTypeKV[];
2777extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[];
2778extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[];
2779extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[];
2780AMDGPUGenSubtargetInfo::AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS)
2781 : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, ArrayRef(AMDGPUNames, 76), ArrayRef(AMDGPUFeatureKV, 271), ArrayRef(AMDGPUSubTypeKV, 76),
2782 AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable,
2783 nullptr, nullptr, nullptr) {}
2784
2785unsigned AMDGPUGenSubtargetInfo
2786::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
2787
2788 const SIInstrInfo *TII =
2789 static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo());
2790 (void)TII;
2791
2792 switch (SchedClass) {
2793 case 34: // COPY
2794 if (SchedModel->getProcessorID() == 1) { // SIQuarterSpeedModel
2795 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2796 return 66; // Write32Bit
2797 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2798 return 67; // Write64Bit
2799 return 68; // WriteSALU
2800 }
2801 if (SchedModel->getProcessorID() == 2) { // GFX10SpeedModel
2802 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2803 return 66; // Write32Bit
2804 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2805 return 67; // Write64Bit
2806 return 68; // WriteSALU
2807 }
2808 if (SchedModel->getProcessorID() == 3) { // GFX11SpeedModel
2809 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2810 return 66; // Write32Bit
2811 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2812 return 67; // Write64Bit
2813 return 68; // WriteSALU
2814 }
2815 if (SchedModel->getProcessorID() == 4) { // GFX1250SpeedModel
2816 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2817 return 66; // Write32Bit
2818 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2819 return 67; // Write64Bit
2820 return 68; // WriteSALU
2821 }
2822 if (SchedModel->getProcessorID() == 5) { // GFX12SpeedModel
2823 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2824 return 66; // Write32Bit
2825 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2826 return 67; // Write64Bit
2827 return 68; // WriteSALU
2828 }
2829 if (SchedModel->getProcessorID() == 6) { // SIFullSpeedModel
2830 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2831 return 66; // Write32Bit
2832 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2833 return 67; // Write64Bit
2834 return 68; // WriteSALU
2835 }
2836 if (SchedModel->getProcessorID() == 7) { // SIDPGFX942FullSpeedModel
2837 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2838 return 66; // Write32Bit
2839 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2840 return 67; // Write64Bit
2841 return 68; // WriteSALU
2842 }
2843 if (SchedModel->getProcessorID() == 8) { // SIDPFullSpeedModel
2844 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2845 return 66; // Write32Bit
2846 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2847 return 67; // Write64Bit
2848 return 68; // WriteSALU
2849 }
2850 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2851 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2852 return 66; // Write32Bit
2853 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2854 return 67; // Write64Bit
2855 return 68; // WriteSALU
2856 }
2857 break;
2858 case 35: // V_ACCVGPR_WRITE_B32_e64
2859 if (SchedModel->getProcessorID() == 1) { // SIQuarterSpeedModel
2860 if (TII->hasVGPRUses(*MI))
2861 return 69; // Write64Bit_MIVGPRRead
2862 return 70; // Write64Bit_ReadDefault
2863 }
2864 break;
2865 case 38: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi
2866 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2867 if (
2868 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2869 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2870)
2871 return 71; // Write16PassMAI_MIMFMARead
2872 return 72; // Write8PassMAI_MIMFMARead
2873 }
2874 break;
2875 case 53: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2876 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2877 if (
2878 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2879 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2880)
2881 return 72; // Write8PassMAI_MIMFMARead
2882 return 73; // Write4PassMAI_MIMFMARead
2883 }
2884 break;
2885 case 54: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2886 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2887 if (
2888 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2889 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2890)
2891 return 72; // Write8PassMAI_MIMFMARead
2892 return 73; // Write4PassMAI_MIMFMARead
2893 }
2894 break;
2895 case 55: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd
2896 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2897 if (
2898 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2899 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2900)
2901 return 71; // Write16PassMAI_MIMFMARead
2902 return 72; // Write8PassMAI_MIMFMARead
2903 }
2904 break;
2905 case 60: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr
2906 if (SchedModel->getProcessorID() == 4) { // GFX1250SpeedModel
2907 if (
2908 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8 ||
2909 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8
2910)
2911 return 74; // WriteXDL4PassWMMA
2912 return 75; // WriteXDL2PassWMMA
2913 }
2914 break;
2915 case 61: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250
2916 if (SchedModel->getProcessorID() == 4) { // GFX1250SpeedModel
2917 if (
2918 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8 ||
2919 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8
2920)
2921 return 74; // WriteXDL4PassWMMA
2922 return 75; // WriteXDL2PassWMMA
2923 }
2924 break;
2925 };
2926 report_fatal_error("Expected a variant SchedClass");
2927} // AMDGPUGenSubtargetInfo::resolveSchedClass
2928
2929unsigned AMDGPUGenSubtargetInfo
2930::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const {
2931 return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);
2932} // AMDGPUGenSubtargetInfo::resolveVariantSchedClass
2933
2934unsigned AMDGPUGenSubtargetInfo::getHwModeSet() const {
2935 [[maybe_unused]] const auto *Subtarget =
2936 static_cast<const AMDGPUSubtarget *>(this);
2937 // Collect HwModes and store them as a bit set.
2938 unsigned Modes = 0;
2939 if ((Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs())) Modes |= (1 << 0);
2940 if ((!Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs()) && (Subtarget->isWave32())) Modes |= (1 << 1);
2941 if ((!Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs()) && (Subtarget->isWave64())) Modes |= (1 << 2);
2942 if ((Subtarget->isWave32()) && (!Subtarget->needsAlignedVGPRs())) Modes |= (1 << 3);
2943 return Modes;
2944}
2945unsigned AMDGPUGenSubtargetInfo::getHwMode(enum HwModeType type) const {
2946 unsigned Modes = getHwModeSet();
2947
2948 if (!Modes)
2949 return Modes;
2950
2951 switch (type) {
2952 case HwMode_Default:
2953 return llvm::countr_zero(Modes) + 1;
2954 case HwMode_ValueType:
2955 Modes &= 15;
2956 if (!Modes)
2957 return Modes;
2958 if (!llvm::has_single_bit<unsigned>(Modes))
2959 llvm_unreachable("Two or more HwModes for ValueType were found!");
2960 return llvm::countr_zero(Modes) + 1;
2961 case HwMode_RegInfo:
2962 Modes &= 15;
2963 if (!Modes)
2964 return Modes;
2965 if (!llvm::has_single_bit<unsigned>(Modes))
2966 llvm_unreachable("Two or more HwModes for RegInfo were found!");
2967 return llvm::countr_zero(Modes) + 1;
2968 case HwMode_EncodingInfo:
2969 // No HwMode for EncodingInfo.
2970 return 0;
2971 }
2972 llvm_unreachable("unexpected HwModeType");
2973 return 0; // should not get here
2974}
2975
2976} // namespace llvm
2977
2978#endif // GET_SUBTARGETINFO_CTOR
2979
2980#ifdef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
2981#undef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
2982
2983
2984#endif // GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
2985
2986#ifdef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
2987#undef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
2988
2989
2990#endif // GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
2991
2992