1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Subtarget Enumeration Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_SUBTARGETINFO_ENUM
10#undef GET_SUBTARGETINFO_ENUM
11
12namespace llvm {
13
14namespace AMDGPU {
15
16enum {
17 Feature1_5xVGPRs = 0,
18 Feature16BitInsts = 1,
19 Feature45BitNumRecordsBufferResource = 2,
20 Feature64BitLiterals = 3,
21 Feature1024AddressableVGPRs = 4,
22 FeatureA16 = 5,
23 FeatureAddMinMaxInsts = 6,
24 FeatureAddNoCarryInsts = 7,
25 FeatureAddSubU64Insts = 8,
26 FeatureAddressableLocalMemorySize32768 = 9,
27 FeatureAddressableLocalMemorySize65536 = 10,
28 FeatureAddressableLocalMemorySize163840 = 11,
29 FeatureAddressableLocalMemorySize327680 = 12,
30 FeatureAgentScopeFineGrainedRemoteMemoryAtomics = 13,
31 FeatureApertureRegs = 14,
32 FeatureArchitectedFlatScratch = 15,
33 FeatureArchitectedSGPRs = 16,
34 FeatureAshrPkInsts = 17,
35 FeatureAssemblerPermissiveWavesize = 18,
36 FeatureAtomicBufferGlobalPkAddF16Insts = 19,
37 FeatureAtomicBufferGlobalPkAddF16NoRtnInsts = 20,
38 FeatureAtomicBufferPkAddBF16Inst = 21,
39 FeatureAtomicCSubNoRtnInsts = 22,
40 FeatureAtomicDsPkAdd16Insts = 23,
41 FeatureAtomicFMinFMaxF32FlatInsts = 24,
42 FeatureAtomicFMinFMaxF32GlobalInsts = 25,
43 FeatureAtomicFMinFMaxF64FlatInsts = 26,
44 FeatureAtomicFMinFMaxF64GlobalInsts = 27,
45 FeatureAtomicFaddNoRtnInsts = 28,
46 FeatureAtomicFaddRtnInsts = 29,
47 FeatureAtomicFlatPkAdd16Insts = 30,
48 FeatureAtomicGlobalPkAddBF16Inst = 31,
49 FeatureAutoWaitcntBeforeBarrier = 32,
50 FeatureBF8ConversionScaleInsts = 33,
51 FeatureBF16ConversionInsts = 34,
52 FeatureBF16PackedInsts = 35,
53 FeatureBF16TransInsts = 36,
54 FeatureBVHDualAndBVH8Insts = 37,
55 FeatureBackOffBarrier = 38,
56 FeatureBitOp3Insts = 39,
57 FeatureCIInsts = 40,
58 FeatureClusters = 41,
59 FeatureCuMode = 42,
60 FeatureCubeInsts = 43,
61 FeatureCvtFP8VOP1Bug = 44,
62 FeatureCvtNormInsts = 45,
63 FeatureCvtPkF16F32Inst = 46,
64 FeatureCvtPkNormVOP2Insts = 47,
65 FeatureCvtPkNormVOP3Insts = 48,
66 FeatureD16Writes32BitVgpr = 49,
67 FeatureDLInsts = 50,
68 FeatureDPALU_DPP = 51,
69 FeatureDPP = 52,
70 FeatureDPP8 = 53,
71 FeatureDPPBroadcasts = 54,
72 FeatureDPPSrc1SGPR = 55,
73 FeatureDPPWavefrontShifts = 56,
74 FeatureDefaultComponentBroadcast = 57,
75 FeatureDefaultComponentZero = 58,
76 FeatureDot1Insts = 59,
77 FeatureDot2Insts = 60,
78 FeatureDot3Insts = 61,
79 FeatureDot4Insts = 62,
80 FeatureDot5Insts = 63,
81 FeatureDot6Insts = 64,
82 FeatureDot7Insts = 65,
83 FeatureDot8Insts = 66,
84 FeatureDot9Insts = 67,
85 FeatureDot10Insts = 68,
86 FeatureDot11Insts = 69,
87 FeatureDot12Insts = 70,
88 FeatureDot13Insts = 71,
89 FeatureDsSrc2Insts = 72,
90 FeatureDumpCodeLower = 73,
91 FeatureEmulatedSystemScopeAtomics = 74,
92 FeatureEnableDS128 = 75,
93 FeatureEnableFlatScratch = 76,
94 FeatureEnableLoadStoreOpt = 77,
95 FeatureEnablePRTStrictNull = 78,
96 FeatureEnableSIScheduler = 79,
97 FeatureEnableUnsafeDSOffsetFolding = 80,
98 FeatureExtendedImageInsts = 81,
99 FeatureF16BF16ToFP6BF6ConversionScaleInsts = 82,
100 FeatureF32ToF16BF16ConversionSRInsts = 83,
101 FeatureFMA = 84,
102 FeatureFP4ConversionScaleInsts = 85,
103 FeatureFP6BF6ConversionScaleInsts = 86,
104 FeatureFP8ConversionInsts = 87,
105 FeatureFP8ConversionScaleInsts = 88,
106 FeatureFP8E5M3Insts = 89,
107 FeatureFP8Insts = 90,
108 FeatureFP64 = 91,
109 FeatureFastDenormalF32 = 92,
110 FeatureFastFMAF32 = 93,
111 FeatureFlatAddressSpace = 94,
112 FeatureFlatAtomicFaddF32Inst = 95,
113 FeatureFlatBufferGlobalAtomicFaddF64Inst = 96,
114 FeatureFlatGVSMode = 97,
115 FeatureFlatGlobalInsts = 98,
116 FeatureFlatInstOffsets = 99,
117 FeatureFlatScratchInsts = 100,
118 FeatureFlatSegmentOffsetBug = 101,
119 FeatureFmaMixBF16Insts = 102,
120 FeatureFmaMixInsts = 103,
121 FeatureFmacF64Inst = 104,
122 FeatureFullRate64Ops = 105,
123 FeatureG16 = 106,
124 FeatureGCN3Encoding = 107,
125 FeatureGDS = 108,
126 FeatureGFX7GFX8GFX9Insts = 109,
127 FeatureGFX8Insts = 110,
128 FeatureGFX9 = 111,
129 FeatureGFX9Insts = 112,
130 FeatureGFX10 = 113,
131 FeatureGFX10Insts = 114,
132 FeatureGFX10_3Insts = 115,
133 FeatureGFX10_AEncoding = 116,
134 FeatureGFX10_BEncoding = 117,
135 FeatureGFX11 = 118,
136 FeatureGFX11Insts = 119,
137 FeatureGFX12 = 120,
138 FeatureGFX12Insts = 121,
139 FeatureGFX13 = 122,
140 FeatureGFX13Insts = 123,
141 FeatureGFX90AInsts = 124,
142 FeatureGFX940Insts = 125,
143 FeatureGFX950Insts = 126,
144 FeatureGFX1250Insts = 127,
145 FeatureGWS = 128,
146 FeatureGetWaveIdInst = 129,
147 FeatureGloballyAddressableScratch = 130,
148 FeatureHalfRate64Ops = 131,
149 FeatureIEEEMinimumMaximumInsts = 132,
150 FeatureImageGather4D16Bug = 133,
151 FeatureImageInsts = 134,
152 FeatureImageStoreD16Bug = 135,
153 FeatureInstFwdPrefetchBug = 136,
154 FeatureIntClamp = 137,
155 FeatureInv2PiInlineImm = 138,
156 FeatureKernargPreload = 139,
157 FeatureLDSBankCount16 = 140,
158 FeatureLDSBankCount32 = 141,
159 FeatureLDSMisalignedBug = 142,
160 FeatureLdsBarrierArriveAtomic = 143,
161 FeatureLdsBranchVmemWARHazard = 144,
162 FeatureLerpInst = 145,
163 FeatureLshlAddU64Inst = 146,
164 FeatureMADIntraFwdBug = 147,
165 FeatureMAIInsts = 148,
166 FeatureMFMAInlineLiteralBug = 149,
167 FeatureMIMG_R128 = 150,
168 FeatureMSAALoadDstSelBug = 151,
169 FeatureMadMacF32Insts = 152,
170 FeatureMadMixInsts = 153,
171 FeatureMadU32Inst = 154,
172 FeatureMaxHardClauseLength32 = 155,
173 FeatureMaxHardClauseLength63 = 156,
174 FeatureMaxPrivateElementSize4 = 157,
175 FeatureMaxPrivateElementSize8 = 158,
176 FeatureMaxPrivateElementSize16 = 159,
177 FeatureMcastLoadInsts = 160,
178 FeatureMemoryAtomicFAddF32DenormalSupport = 161,
179 FeatureMin3Max3PKF16 = 162,
180 FeatureMinimum3Maximum3F16 = 163,
181 FeatureMinimum3Maximum3F32 = 164,
182 FeatureMinimum3Maximum3PKF16 = 165,
183 FeatureMovrel = 166,
184 FeatureNSAClauseBug = 167,
185 FeatureNSAEncoding = 168,
186 FeatureNSAtoVMEMBug = 169,
187 FeatureNegativeScratchOffsetBug = 170,
188 FeatureNegativeUnalignedScratchOffsetBug = 171,
189 FeatureNoDataDepHazard = 172,
190 FeatureNoSdstCMPX = 173,
191 FeatureOffset3fBug = 174,
192 FeaturePackedFP32Ops = 175,
193 FeaturePackedTID = 176,
194 FeaturePartialNSAEncoding = 177,
195 FeaturePermlane16Swap = 178,
196 FeaturePermlane32Swap = 179,
197 FeaturePkAddMinMaxInsts = 180,
198 FeaturePkFmacF16Inst = 181,
199 FeaturePointSampleAccel = 182,
200 FeaturePreciseMemory = 183,
201 FeaturePrivEnabledTrap2NopBug = 184,
202 FeaturePrngInst = 185,
203 FeaturePseudoScalarTrans = 186,
204 FeatureQsadInsts = 187,
205 FeatureR128A16 = 188,
206 FeatureRealTrue16Insts = 189,
207 FeatureRelaxedBufferOOBMode = 190,
208 FeatureRequiredExportPriority = 191,
209 FeatureRequiresAlignedVGPRs = 192,
210 FeatureRequiresCOV6 = 193,
211 FeatureRestrictedSOffset = 194,
212 FeatureSALUFloatInsts = 195,
213 FeatureSBarrierLeaveImm = 196,
214 FeatureSDWA = 197,
215 FeatureSDWAMac = 198,
216 FeatureSDWAOmod = 199,
217 FeatureSDWAOutModsVOPC = 200,
218 FeatureSDWAScalar = 201,
219 FeatureSDWASdst = 202,
220 FeatureSGPRInitBug = 203,
221 FeatureSMEMtoVectorWriteHazard = 204,
222 FeatureSMemRealTime = 205,
223 FeatureSMemTimeInst = 206,
224 FeatureSRAMECC = 207,
225 FeatureSWakeupBarrier = 208,
226 FeatureSWakeupImm = 209,
227 FeatureSadInsts = 210,
228 FeatureSafeCUPrefetch = 211,
229 FeatureSafeSmemPrefetch = 212,
230 FeatureScalarAtomics = 213,
231 FeatureScalarDwordx3Loads = 214,
232 FeatureScalarFlatScratchInsts = 215,
233 FeatureScalarStores = 216,
234 FeatureSeaIslands = 217,
235 FeatureSetPrioIncWgInst = 218,
236 FeatureSetregVGPRMSBFixup = 219,
237 FeatureShaderCyclesHiLoRegisters = 220,
238 FeatureShaderCyclesRegister = 221,
239 FeatureSouthernIslands = 222,
240 FeatureSupportsSRAMECC = 223,
241 FeatureSupportsXNACK = 224,
242 FeatureTanhInsts = 225,
243 FeatureTensorCvtLutInsts = 226,
244 FeatureTgSplit = 227,
245 FeatureTransposeLoadF4F6Insts = 228,
246 FeatureTrapHandler = 229,
247 FeatureTrigReducedRange = 230,
248 FeatureTrue16BitInsts = 231,
249 FeatureUnalignedAccessMode = 232,
250 FeatureUnalignedBufferAccess = 233,
251 FeatureUnalignedDSAccess = 234,
252 FeatureUnalignedScratchAccess = 235,
253 FeatureUnpackedD16VMem = 236,
254 FeatureUseAddPC64Inst = 237,
255 FeatureUseBlockVGPROpsForCSR = 238,
256 FeatureUseFlatForGlobal = 239,
257 FeatureUserSGPRInit16Bug = 240,
258 FeatureVALUTransUseHazard = 241,
259 FeatureVGPRIndexMode = 242,
260 FeatureVMEMtoScalarWriteHazard = 243,
261 FeatureVMemToLDSLoad = 244,
262 FeatureVOP3Literal = 245,
263 FeatureVOP3PInsts = 246,
264 FeatureVOPDInsts = 247,
265 FeatureVcmpxExecWARHazard = 248,
266 FeatureVcmpxPermlaneHazard = 249,
267 FeatureVmemPrefInsts = 250,
268 FeatureVmemWriteVgprInOrder = 251,
269 FeatureVolcanicIslands = 252,
270 FeatureVscnt = 253,
271 FeatureWMMA128bInsts = 254,
272 FeatureWMMA256bInsts = 255,
273 FeatureWaitXcnt = 256,
274 FeatureWaitsBeforeSystemScopeStores = 257,
275 FeatureWavefrontSize16 = 258,
276 FeatureWavefrontSize32 = 259,
277 FeatureWavefrontSize64 = 260,
278 FeatureXF32Insts = 261,
279 FeatureXNACK = 262,
280 NumSubtargetFeatures = 263
281};
282
283} // namespace AMDGPU
284
285} // namespace llvm
286
287#endif // GET_SUBTARGETINFO_ENUM
288
289#ifdef GET_SUBTARGETINFO_MACRO
290
291GET_SUBTARGETINFO_MACRO(DumpCode, false, dumpCode)
292GET_SUBTARGETINFO_MACRO(EnableCuMode, false, enableCuMode)
293GET_SUBTARGETINFO_MACRO(EnableDS128, false, enableDS128)
294GET_SUBTARGETINFO_MACRO(EnableFlatScratch, false, enableFlatScratch)
295GET_SUBTARGETINFO_MACRO(EnableLoadStoreOpt, false, enableLoadStoreOpt)
296GET_SUBTARGETINFO_MACRO(EnablePRTStrictNull, false, enablePRTStrictNull)
297GET_SUBTARGETINFO_MACRO(EnablePreciseMemory, false, enablePreciseMemory)
298GET_SUBTARGETINFO_MACRO(EnableRealTrue16Insts, false, enableRealTrue16Insts)
299GET_SUBTARGETINFO_MACRO(EnableSIScheduler, false, enableSIScheduler)
300GET_SUBTARGETINFO_MACRO(EnableSRAMECC, false, enableSRAMECC)
301GET_SUBTARGETINFO_MACRO(EnableTgSplit, false, enableTgSplit)
302GET_SUBTARGETINFO_MACRO(EnableUnsafeDSOffsetFolding, false, enableUnsafeDSOffsetFolding)
303GET_SUBTARGETINFO_MACRO(EnableXNACK, false, enableXNACK)
304GET_SUBTARGETINFO_MACRO(Has1024AddressableVGPRs, false, has1024AddressableVGPRs)
305GET_SUBTARGETINFO_MACRO(Has16BitInsts, false, has16BitInsts)
306GET_SUBTARGETINFO_MACRO(Has1_5xVGPRs, false, has1_5xVGPRs)
307GET_SUBTARGETINFO_MACRO(Has45BitNumRecordsBufferResource, false, has45BitNumRecordsBufferResource)
308GET_SUBTARGETINFO_MACRO(Has64BitLiterals, false, has64BitLiterals)
309GET_SUBTARGETINFO_MACRO(HasA16, false, hasA16)
310GET_SUBTARGETINFO_MACRO(HasAddMinMaxInsts, false, hasAddMinMaxInsts)
311GET_SUBTARGETINFO_MACRO(HasAddNoCarryInsts, false, hasAddNoCarryInsts)
312GET_SUBTARGETINFO_MACRO(HasAddSubU64Insts, false, hasAddSubU64Insts)
313GET_SUBTARGETINFO_MACRO(HasAgentScopeFineGrainedRemoteMemoryAtomics, false, hasAgentScopeFineGrainedRemoteMemoryAtomics)
314GET_SUBTARGETINFO_MACRO(HasApertureRegs, false, hasApertureRegs)
315GET_SUBTARGETINFO_MACRO(HasArchitectedFlatScratch, false, hasArchitectedFlatScratch)
316GET_SUBTARGETINFO_MACRO(HasArchitectedSGPRs, false, hasArchitectedSGPRs)
317GET_SUBTARGETINFO_MACRO(HasAshrPkInsts, false, hasAshrPkInsts)
318GET_SUBTARGETINFO_MACRO(HasAssemblerPermissiveWavesize, false, hasAssemblerPermissiveWavesize)
319GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16Insts, false, hasAtomicBufferGlobalPkAddF16Insts)
320GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16NoRtnInsts, false, hasAtomicBufferGlobalPkAddF16NoRtnInsts)
321GET_SUBTARGETINFO_MACRO(HasAtomicBufferPkAddBF16Inst, false, hasAtomicBufferPkAddBF16Inst)
322GET_SUBTARGETINFO_MACRO(HasAtomicCSubNoRtnInsts, false, hasAtomicCSubNoRtnInsts)
323GET_SUBTARGETINFO_MACRO(HasAtomicDsPkAdd16Insts, false, hasAtomicDsPkAdd16Insts)
324GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32FlatInsts, false, hasAtomicFMinFMaxF32FlatInsts)
325GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32GlobalInsts, false, hasAtomicFMinFMaxF32GlobalInsts)
326GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64FlatInsts, false, hasAtomicFMinFMaxF64FlatInsts)
327GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64GlobalInsts, false, hasAtomicFMinFMaxF64GlobalInsts)
328GET_SUBTARGETINFO_MACRO(HasAtomicFaddNoRtnInsts, false, hasAtomicFaddNoRtnInsts)
329GET_SUBTARGETINFO_MACRO(HasAtomicFaddRtnInsts, false, hasAtomicFaddRtnInsts)
330GET_SUBTARGETINFO_MACRO(HasAtomicFlatPkAdd16Insts, false, hasAtomicFlatPkAdd16Insts)
331GET_SUBTARGETINFO_MACRO(HasAtomicGlobalPkAddBF16Inst, false, hasAtomicGlobalPkAddBF16Inst)
332GET_SUBTARGETINFO_MACRO(HasAutoWaitcntBeforeBarrier, false, hasAutoWaitcntBeforeBarrier)
333GET_SUBTARGETINFO_MACRO(HasBF16ConversionInsts, false, hasBF16ConversionInsts)
334GET_SUBTARGETINFO_MACRO(HasBF16PackedInsts, false, hasBF16PackedInsts)
335GET_SUBTARGETINFO_MACRO(HasBF16TransInsts, false, hasBF16TransInsts)
336GET_SUBTARGETINFO_MACRO(HasBF8ConversionScaleInsts, false, hasBF8ConversionScaleInsts)
337GET_SUBTARGETINFO_MACRO(HasBVHDualAndBVH8Insts, false, hasBVHDualAndBVH8Insts)
338GET_SUBTARGETINFO_MACRO(HasBackOffBarrier, false, hasBackOffBarrier)
339GET_SUBTARGETINFO_MACRO(HasBitOp3Insts, false, hasBitOp3Insts)
340GET_SUBTARGETINFO_MACRO(HasCIInsts, false, hasCIInsts)
341GET_SUBTARGETINFO_MACRO(HasClusters, false, hasClusters)
342GET_SUBTARGETINFO_MACRO(HasCubeInsts, false, hasCubeInsts)
343GET_SUBTARGETINFO_MACRO(HasCvtFP8VOP1Bug, false, hasCvtFP8VOP1Bug)
344GET_SUBTARGETINFO_MACRO(HasCvtNormInsts, false, hasCvtNormInsts)
345GET_SUBTARGETINFO_MACRO(HasCvtPkF16F32Inst, false, hasCvtPkF16F32Inst)
346GET_SUBTARGETINFO_MACRO(HasCvtPkNormVOP2Insts, false, hasCvtPkNormVOP2Insts)
347GET_SUBTARGETINFO_MACRO(HasCvtPkNormVOP3Insts, false, hasCvtPkNormVOP3Insts)
348GET_SUBTARGETINFO_MACRO(HasD16Writes32BitVgpr, false, hasD16Writes32BitVgpr)
349GET_SUBTARGETINFO_MACRO(HasDLInsts, false, hasDLInsts)
350GET_SUBTARGETINFO_MACRO(HasDPALU_DPP, false, hasDPALU_DPP)
351GET_SUBTARGETINFO_MACRO(HasDPP, false, hasDPP)
352GET_SUBTARGETINFO_MACRO(HasDPP8, false, hasDPP8)
353GET_SUBTARGETINFO_MACRO(HasDPPBroadcasts, false, hasDPPBroadcasts)
354GET_SUBTARGETINFO_MACRO(HasDPPSrc1SGPR, false, hasDPPSrc1SGPR)
355GET_SUBTARGETINFO_MACRO(HasDPPWavefrontShifts, false, hasDPPWavefrontShifts)
356GET_SUBTARGETINFO_MACRO(HasDefaultComponentBroadcast, false, hasDefaultComponentBroadcast)
357GET_SUBTARGETINFO_MACRO(HasDefaultComponentZero, false, hasDefaultComponentZero)
358GET_SUBTARGETINFO_MACRO(HasDot10Insts, false, hasDot10Insts)
359GET_SUBTARGETINFO_MACRO(HasDot11Insts, false, hasDot11Insts)
360GET_SUBTARGETINFO_MACRO(HasDot12Insts, false, hasDot12Insts)
361GET_SUBTARGETINFO_MACRO(HasDot13Insts, false, hasDot13Insts)
362GET_SUBTARGETINFO_MACRO(HasDot1Insts, false, hasDot1Insts)
363GET_SUBTARGETINFO_MACRO(HasDot2Insts, false, hasDot2Insts)
364GET_SUBTARGETINFO_MACRO(HasDot3Insts, false, hasDot3Insts)
365GET_SUBTARGETINFO_MACRO(HasDot4Insts, false, hasDot4Insts)
366GET_SUBTARGETINFO_MACRO(HasDot5Insts, false, hasDot5Insts)
367GET_SUBTARGETINFO_MACRO(HasDot6Insts, false, hasDot6Insts)
368GET_SUBTARGETINFO_MACRO(HasDot7Insts, false, hasDot7Insts)
369GET_SUBTARGETINFO_MACRO(HasDot8Insts, false, hasDot8Insts)
370GET_SUBTARGETINFO_MACRO(HasDot9Insts, false, hasDot9Insts)
371GET_SUBTARGETINFO_MACRO(HasDsSrc2Insts, false, hasDsSrc2Insts)
372GET_SUBTARGETINFO_MACRO(HasEmulatedSystemScopeAtomics, false, hasEmulatedSystemScopeAtomics)
373GET_SUBTARGETINFO_MACRO(HasExtendedImageInsts, false, hasExtendedImageInsts)
374GET_SUBTARGETINFO_MACRO(HasF16BF16ToFP6BF6ConversionScaleInsts, false, hasF16BF16ToFP6BF6ConversionScaleInsts)
375GET_SUBTARGETINFO_MACRO(HasF32ToF16BF16ConversionSRInsts, false, hasF32ToF16BF16ConversionSRInsts)
376GET_SUBTARGETINFO_MACRO(HasFMA, false, hasFMA)
377GET_SUBTARGETINFO_MACRO(HasFP4ConversionScaleInsts, false, hasFP4ConversionScaleInsts)
378GET_SUBTARGETINFO_MACRO(HasFP64, false, hasFP64)
379GET_SUBTARGETINFO_MACRO(HasFP6BF6ConversionScaleInsts, false, hasFP6BF6ConversionScaleInsts)
380GET_SUBTARGETINFO_MACRO(HasFP8ConversionInsts, false, hasFP8ConversionInsts)
381GET_SUBTARGETINFO_MACRO(HasFP8ConversionScaleInsts, false, hasFP8ConversionScaleInsts)
382GET_SUBTARGETINFO_MACRO(HasFP8E5M3Insts, false, hasFP8E5M3Insts)
383GET_SUBTARGETINFO_MACRO(HasFP8Insts, false, hasFP8Insts)
384GET_SUBTARGETINFO_MACRO(HasFastDenormalF32, false, hasFastDenormalF32)
385GET_SUBTARGETINFO_MACRO(HasFastFMAF32, false, hasFastFMAF32)
386GET_SUBTARGETINFO_MACRO(HasFlatAddressSpace, false, hasFlatAddressSpace)
387GET_SUBTARGETINFO_MACRO(HasFlatAtomicFaddF32Inst, false, hasFlatAtomicFaddF32Inst)
388GET_SUBTARGETINFO_MACRO(HasFlatBufferGlobalAtomicFaddF64Inst, false, hasFlatBufferGlobalAtomicFaddF64Inst)
389GET_SUBTARGETINFO_MACRO(HasFlatGVSMode, false, hasFlatGVSMode)
390GET_SUBTARGETINFO_MACRO(HasFlatGlobalInsts, false, hasFlatGlobalInsts)
391GET_SUBTARGETINFO_MACRO(HasFlatInstOffsets, false, hasFlatInstOffsets)
392GET_SUBTARGETINFO_MACRO(HasFlatScratchInsts, false, hasFlatScratchInsts)
393GET_SUBTARGETINFO_MACRO(HasFlatSegmentOffsetBug, false, hasFlatSegmentOffsetBug)
394GET_SUBTARGETINFO_MACRO(HasFmaMixBF16Insts, false, hasFmaMixBF16Insts)
395GET_SUBTARGETINFO_MACRO(HasFmaMixInsts, false, hasFmaMixInsts)
396GET_SUBTARGETINFO_MACRO(HasFmacF64Inst, false, hasFmacF64Inst)
397GET_SUBTARGETINFO_MACRO(HasFullRate64Ops, false, hasFullRate64Ops)
398GET_SUBTARGETINFO_MACRO(HasG16, false, hasG16)
399GET_SUBTARGETINFO_MACRO(HasGCN3Encoding, false, hasGCN3Encoding)
400GET_SUBTARGETINFO_MACRO(HasGDS, false, hasGDS)
401GET_SUBTARGETINFO_MACRO(HasGFX10Insts, false, hasGFX10Insts)
402GET_SUBTARGETINFO_MACRO(HasGFX10_3Insts, false, hasGFX10_3Insts)
403GET_SUBTARGETINFO_MACRO(HasGFX10_AEncoding, false, hasGFX10_AEncoding)
404GET_SUBTARGETINFO_MACRO(HasGFX10_BEncoding, false, hasGFX10_BEncoding)
405GET_SUBTARGETINFO_MACRO(HasGFX11Insts, false, hasGFX11Insts)
406GET_SUBTARGETINFO_MACRO(HasGFX1250Insts, false, hasGFX1250Insts)
407GET_SUBTARGETINFO_MACRO(HasGFX12Insts, false, hasGFX12Insts)
408GET_SUBTARGETINFO_MACRO(HasGFX13Insts, false, hasGFX13Insts)
409GET_SUBTARGETINFO_MACRO(HasGFX7GFX8GFX9Insts, false, hasGFX7GFX8GFX9Insts)
410GET_SUBTARGETINFO_MACRO(HasGFX8Insts, false, hasGFX8Insts)
411GET_SUBTARGETINFO_MACRO(HasGFX90AInsts, false, hasGFX90AInsts)
412GET_SUBTARGETINFO_MACRO(HasGFX940Insts, false, hasGFX940Insts)
413GET_SUBTARGETINFO_MACRO(HasGFX950Insts, false, hasGFX950Insts)
414GET_SUBTARGETINFO_MACRO(HasGFX9Insts, false, hasGFX9Insts)
415GET_SUBTARGETINFO_MACRO(HasGWS, false, hasGWS)
416GET_SUBTARGETINFO_MACRO(HasGetWaveIdInst, false, hasGetWaveIdInst)
417GET_SUBTARGETINFO_MACRO(HasGloballyAddressableScratch, false, hasGloballyAddressableScratch)
418GET_SUBTARGETINFO_MACRO(HasHalfRate64Ops, false, hasHalfRate64Ops)
419GET_SUBTARGETINFO_MACRO(HasIEEEMinimumMaximumInsts, false, hasIEEEMinimumMaximumInsts)
420GET_SUBTARGETINFO_MACRO(HasImageGather4D16Bug, false, hasImageGather4D16Bug)
421GET_SUBTARGETINFO_MACRO(HasImageInsts, false, hasImageInsts)
422GET_SUBTARGETINFO_MACRO(HasImageStoreD16Bug, false, hasImageStoreD16Bug)
423GET_SUBTARGETINFO_MACRO(HasInstFwdPrefetchBug, false, hasInstFwdPrefetchBug)
424GET_SUBTARGETINFO_MACRO(HasIntClamp, false, hasIntClamp)
425GET_SUBTARGETINFO_MACRO(HasInv2PiInlineImm, false, hasInv2PiInlineImm)
426GET_SUBTARGETINFO_MACRO(HasKernargPreload, false, hasKernargPreload)
427GET_SUBTARGETINFO_MACRO(HasLDSMisalignedBug, false, hasLDSMisalignedBug)
428GET_SUBTARGETINFO_MACRO(HasLdsBarrierArriveAtomic, false, hasLdsBarrierArriveAtomic)
429GET_SUBTARGETINFO_MACRO(HasLdsBranchVmemWARHazard, false, hasLdsBranchVmemWARHazard)
430GET_SUBTARGETINFO_MACRO(HasLerpInst, false, hasLerpInst)
431GET_SUBTARGETINFO_MACRO(HasLshlAddU64Inst, false, hasLshlAddU64Inst)
432GET_SUBTARGETINFO_MACRO(HasMADIntraFwdBug, false, hasMADIntraFwdBug)
433GET_SUBTARGETINFO_MACRO(HasMAIInsts, false, hasMAIInsts)
434GET_SUBTARGETINFO_MACRO(HasMFMAInlineLiteralBug, false, hasMFMAInlineLiteralBug)
435GET_SUBTARGETINFO_MACRO(HasMIMG_R128, false, hasMIMG_R128)
436GET_SUBTARGETINFO_MACRO(HasMSAALoadDstSelBug, false, hasMSAALoadDstSelBug)
437GET_SUBTARGETINFO_MACRO(HasMadMacF32Insts, false, hasMadMacF32Insts)
438GET_SUBTARGETINFO_MACRO(HasMadMixInsts, false, hasMadMixInsts)
439GET_SUBTARGETINFO_MACRO(HasMadU32Inst, false, hasMadU32Inst)
440GET_SUBTARGETINFO_MACRO(HasMcastLoadInsts, false, hasMcastLoadInsts)
441GET_SUBTARGETINFO_MACRO(HasMemoryAtomicFaddF32DenormalSupport, false, hasMemoryAtomicFaddF32DenormalSupport)
442GET_SUBTARGETINFO_MACRO(HasMin3Max3PKF16, false, hasMin3Max3PKF16)
443GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F16, false, hasMinimum3Maximum3F16)
444GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F32, false, hasMinimum3Maximum3F32)
445GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3PKF16, false, hasMinimum3Maximum3PKF16)
446GET_SUBTARGETINFO_MACRO(HasMovrel, false, hasMovrel)
447GET_SUBTARGETINFO_MACRO(HasNSAClauseBug, false, hasNSAClauseBug)
448GET_SUBTARGETINFO_MACRO(HasNSAEncoding, false, hasNSAEncoding)
449GET_SUBTARGETINFO_MACRO(HasNSAtoVMEMBug, false, hasNSAtoVMEMBug)
450GET_SUBTARGETINFO_MACRO(HasNegativeScratchOffsetBug, false, hasNegativeScratchOffsetBug)
451GET_SUBTARGETINFO_MACRO(HasNegativeUnalignedScratchOffsetBug, false, hasNegativeUnalignedScratchOffsetBug)
452GET_SUBTARGETINFO_MACRO(HasNoDataDepHazard, false, hasNoDataDepHazard)
453GET_SUBTARGETINFO_MACRO(HasNoSdstCMPX, false, hasNoSdstCMPX)
454GET_SUBTARGETINFO_MACRO(HasOffset3fBug, false, hasOffset3fBug)
455GET_SUBTARGETINFO_MACRO(HasPackedFP32Ops, false, hasPackedFP32Ops)
456GET_SUBTARGETINFO_MACRO(HasPackedTID, false, hasPackedTID)
457GET_SUBTARGETINFO_MACRO(HasPartialNSAEncoding, false, hasPartialNSAEncoding)
458GET_SUBTARGETINFO_MACRO(HasPermlane16Swap, false, hasPermlane16Swap)
459GET_SUBTARGETINFO_MACRO(HasPermlane32Swap, false, hasPermlane32Swap)
460GET_SUBTARGETINFO_MACRO(HasPkAddMinMaxInsts, false, hasPkAddMinMaxInsts)
461GET_SUBTARGETINFO_MACRO(HasPkFmacF16Inst, false, hasPkFmacF16Inst)
462GET_SUBTARGETINFO_MACRO(HasPointSampleAccel, false, hasPointSampleAccel)
463GET_SUBTARGETINFO_MACRO(HasPrivEnabledTrap2NopBug, false, hasPrivEnabledTrap2NopBug)
464GET_SUBTARGETINFO_MACRO(HasPrngInst, false, hasPrngInst)
465GET_SUBTARGETINFO_MACRO(HasPseudoScalarTrans, false, hasPseudoScalarTrans)
466GET_SUBTARGETINFO_MACRO(HasQsadInsts, false, hasQsadInsts)
467GET_SUBTARGETINFO_MACRO(HasR128A16, false, hasR128A16)
468GET_SUBTARGETINFO_MACRO(HasRelaxedBufferOOBMode, false, hasRelaxedBufferOOBMode)
469GET_SUBTARGETINFO_MACRO(HasRequiredExportPriority, false, hasRequiredExportPriority)
470GET_SUBTARGETINFO_MACRO(HasRestrictedSOffset, false, hasRestrictedSOffset)
471GET_SUBTARGETINFO_MACRO(HasSALUFloatInsts, false, hasSALUFloatInsts)
472GET_SUBTARGETINFO_MACRO(HasSBarrierLeaveImm, false, hasSBarrierLeaveImm)
473GET_SUBTARGETINFO_MACRO(HasSDWA, false, hasSDWA)
474GET_SUBTARGETINFO_MACRO(HasSDWAMac, false, hasSDWAMac)
475GET_SUBTARGETINFO_MACRO(HasSDWAOmod, false, hasSDWAOmod)
476GET_SUBTARGETINFO_MACRO(HasSDWAOutModsVOPC, false, hasSDWAOutModsVOPC)
477GET_SUBTARGETINFO_MACRO(HasSDWAScalar, false, hasSDWAScalar)
478GET_SUBTARGETINFO_MACRO(HasSDWASdst, false, hasSDWASdst)
479GET_SUBTARGETINFO_MACRO(HasSGPRInitBug, false, hasSGPRInitBug)
480GET_SUBTARGETINFO_MACRO(HasSMEMtoVectorWriteHazard, false, hasSMEMtoVectorWriteHazard)
481GET_SUBTARGETINFO_MACRO(HasSMemRealTime, false, hasSMemRealTime)
482GET_SUBTARGETINFO_MACRO(HasSMemTimeInst, false, hasSMemTimeInst)
483GET_SUBTARGETINFO_MACRO(HasSWakeupBarrier, false, hasSWakeupBarrier)
484GET_SUBTARGETINFO_MACRO(HasSWakeupImm, false, hasSWakeupImm)
485GET_SUBTARGETINFO_MACRO(HasSadInsts, false, hasSadInsts)
486GET_SUBTARGETINFO_MACRO(HasSafeCUPrefetch, false, hasSafeCUPrefetch)
487GET_SUBTARGETINFO_MACRO(HasSafeSmemPrefetch, false, hasSafeSmemPrefetch)
488GET_SUBTARGETINFO_MACRO(HasScalarAtomics, false, hasScalarAtomics)
489GET_SUBTARGETINFO_MACRO(HasScalarDwordx3Loads, false, hasScalarDwordx3Loads)
490GET_SUBTARGETINFO_MACRO(HasScalarFlatScratchInsts, false, hasScalarFlatScratchInsts)
491GET_SUBTARGETINFO_MACRO(HasScalarStores, false, hasScalarStores)
492GET_SUBTARGETINFO_MACRO(HasSetPrioIncWgInst, false, hasSetPrioIncWgInst)
493GET_SUBTARGETINFO_MACRO(HasSetregVGPRMSBFixup, false, hasSetregVGPRMSBFixup)
494GET_SUBTARGETINFO_MACRO(HasShaderCyclesHiLoRegisters, false, hasShaderCyclesHiLoRegisters)
495GET_SUBTARGETINFO_MACRO(HasShaderCyclesRegister, false, hasShaderCyclesRegister)
496GET_SUBTARGETINFO_MACRO(HasTanhInsts, false, hasTanhInsts)
497GET_SUBTARGETINFO_MACRO(HasTensorCvtLutInsts, false, hasTensorCvtLutInsts)
498GET_SUBTARGETINFO_MACRO(HasTransposeLoadF4F6Insts, false, hasTransposeLoadF4F6Insts)
499GET_SUBTARGETINFO_MACRO(HasTrapHandler, false, hasTrapHandler)
500GET_SUBTARGETINFO_MACRO(HasTrigReducedRange, false, hasTrigReducedRange)
501GET_SUBTARGETINFO_MACRO(HasTrue16BitInsts, false, hasTrue16BitInsts)
502GET_SUBTARGETINFO_MACRO(HasUnalignedAccessMode, false, hasUnalignedAccessMode)
503GET_SUBTARGETINFO_MACRO(HasUnalignedBufferAccess, false, hasUnalignedBufferAccess)
504GET_SUBTARGETINFO_MACRO(HasUnalignedDSAccess, false, hasUnalignedDSAccess)
505GET_SUBTARGETINFO_MACRO(HasUnalignedScratchAccess, false, hasUnalignedScratchAccess)
506GET_SUBTARGETINFO_MACRO(HasUnpackedD16VMem, false, hasUnpackedD16VMem)
507GET_SUBTARGETINFO_MACRO(HasUserSGPRInit16Bug, false, hasUserSGPRInit16Bug)
508GET_SUBTARGETINFO_MACRO(HasVALUTransUseHazard, false, hasVALUTransUseHazard)
509GET_SUBTARGETINFO_MACRO(HasVGPRIndexMode, false, hasVGPRIndexMode)
510GET_SUBTARGETINFO_MACRO(HasVMEMtoScalarWriteHazard, false, hasVMEMtoScalarWriteHazard)
511GET_SUBTARGETINFO_MACRO(HasVMemToLDSLoad, false, hasVMemToLDSLoad)
512GET_SUBTARGETINFO_MACRO(HasVOP3Literal, false, hasVOP3Literal)
513GET_SUBTARGETINFO_MACRO(HasVOP3PInsts, false, hasVOP3PInsts)
514GET_SUBTARGETINFO_MACRO(HasVOPDInsts, false, hasVOPDInsts)
515GET_SUBTARGETINFO_MACRO(HasVcmpxExecWARHazard, false, hasVcmpxExecWARHazard)
516GET_SUBTARGETINFO_MACRO(HasVcmpxPermlaneHazard, false, hasVcmpxPermlaneHazard)
517GET_SUBTARGETINFO_MACRO(HasVmemPrefInsts, false, hasVmemPrefInsts)
518GET_SUBTARGETINFO_MACRO(HasVmemWriteVgprInOrder, false, hasVmemWriteVgprInOrder)
519GET_SUBTARGETINFO_MACRO(HasVscnt, false, hasVscnt)
520GET_SUBTARGETINFO_MACRO(HasWMMA128bInsts, false, hasWMMA128bInsts)
521GET_SUBTARGETINFO_MACRO(HasWMMA256bInsts, false, hasWMMA256bInsts)
522GET_SUBTARGETINFO_MACRO(HasWaitXcnt, false, hasWaitXcnt)
523GET_SUBTARGETINFO_MACRO(HasXF32Insts, false, hasXF32Insts)
524GET_SUBTARGETINFO_MACRO(RequiresAlignVGPR, false, requiresAlignVGPR)
525GET_SUBTARGETINFO_MACRO(RequiresCOV6, false, requiresCOV6)
526GET_SUBTARGETINFO_MACRO(RequiresWaitsBeforeSystemScopeStores, false, requiresWaitsBeforeSystemScopeStores)
527GET_SUBTARGETINFO_MACRO(SupportsSRAMECC, false, supportsSRAMECC)
528GET_SUBTARGETINFO_MACRO(SupportsXNACK, false, supportsXNACK)
529GET_SUBTARGETINFO_MACRO(UseAddPC64Inst, false, useAddPC64Inst)
530GET_SUBTARGETINFO_MACRO(UseBlockVGPROpsForCSR, false, useBlockVGPROpsForCSR)
531GET_SUBTARGETINFO_MACRO(UseFlatForGlobal, false, useFlatForGlobal)
532
533#undef GET_SUBTARGETINFO_MACRO
534#endif // GET_SUBTARGETINFO_MACRO
535
536#ifdef GET_SUBTARGETINFO_MC_DESC
537#undef GET_SUBTARGETINFO_MC_DESC
538
539namespace llvm {
540
541// Sorted (by key) array of values for CPU features.
542extern const llvm::SubtargetFeatureKV AMDGPUFeatureKV[] = {
543 { "1024-addressable-vgprs", "Has 1024 addressable VGPRs", AMDGPU::Feature1024AddressableVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
544 { "16-bit-insts", "Has i16/f16 instructions", AMDGPU::Feature16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
545 { "45-bit-num-records-buffer-resource", "The buffer resource (V#) supports 45-bit num_records", AMDGPU::Feature45BitNumRecordsBufferResource, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
546 { "64-bit-literals", "Can use 64-bit literals with single DWORD instructions", AMDGPU::Feature64BitLiterals, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
547 { "a16", "Support A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands", AMDGPU::FeatureA16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
548 { "add-min-max-insts", "Has v_add_{min|max}_{i|u}32 instructions", AMDGPU::FeatureAddMinMaxInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
549 { "add-no-carry-insts", "Have VALU add/sub instructions without carry out", AMDGPU::FeatureAddNoCarryInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
550 { "add-sub-u64-insts", "Has v_add_u64 and v_sub_u64 instructions", AMDGPU::FeatureAddSubU64Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
551 { "addressablelocalmemorysize163840", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize163840, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
552 { "addressablelocalmemorysize32768", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize32768, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
553 { "addressablelocalmemorysize327680", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize327680, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
554 { "addressablelocalmemorysize65536", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize65536, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
555 { "agent-scope-fine-grained-remote-memory-atomics", "Agent (device) scoped atomic operations, excluding those directly supported by PCIe (i.e. integer atomic add, exchange, and compare-and-swap), are functional for allocations in host or peer device memory.", AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
556 { "allocate1_5xvgprs", "Has 50% more physical VGPRs and 50% larger allocation granule", AMDGPU::Feature1_5xVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
557 { "aperture-regs", "Has Memory Aperture Base and Size Registers", AMDGPU::FeatureApertureRegs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
558 { "architected-flat-scratch", "Flat Scratch register is a readonly SPI initialized architected register", AMDGPU::FeatureArchitectedFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
559 { "architected-sgprs", "Enable the architected SGPRs", AMDGPU::FeatureArchitectedSGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
560 { "ashr-pk-insts", "Has Arithmetic Shift Pack instructions", AMDGPU::FeatureAshrPkInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
561 { "assembler-permissive-wavesize", "Allow parsing wave32 and wave64 variants of instructions", AMDGPU::FeatureAssemblerPermissiveWavesize, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
562 { "atomic-buffer-global-pk-add-f16-insts", "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that can return original value", AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts, { { { 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
563 { "atomic-buffer-global-pk-add-f16-no-rtn-insts", "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that don't return original value", AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts, { { { 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
564 { "atomic-buffer-pk-add-bf16-inst", "Has buffer_atomic_pk_add_bf16 instruction", AMDGPU::FeatureAtomicBufferPkAddBF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
565 { "atomic-csub-no-rtn-insts", "Has buffer_atomic_csub and global_atomic_csub instructions that don't return original value", AMDGPU::FeatureAtomicCSubNoRtnInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
566 { "atomic-ds-pk-add-16-insts", "Has ds_pk_add_bf16, ds_pk_add_f16, ds_pk_add_rtn_bf16, ds_pk_add_rtn_f16 instructions", AMDGPU::FeatureAtomicDsPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
567 { "atomic-fadd-no-rtn-insts", "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that don't return original value", AMDGPU::FeatureAtomicFaddNoRtnInsts, { { { 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
568 { "atomic-fadd-rtn-insts", "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that return original value", AMDGPU::FeatureAtomicFaddRtnInsts, { { { 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
569 { "atomic-flat-pk-add-16-insts", "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions", AMDGPU::FeatureAtomicFlatPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
570 { "atomic-fmin-fmax-flat-f32", "Has flat memory instructions for atomicrmw fmin/fmax for float", AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts, { { { 0x0ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
571 { "atomic-fmin-fmax-flat-f64", "Has flat memory instructions for atomicrmw fmin/fmax for double", AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts, { { { 0x0ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
572 { "atomic-fmin-fmax-global-f32", "Has global/buffer instructions for atomicrmw fmin/fmax for float", AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
573 { "atomic-fmin-fmax-global-f64", "Has global/buffer instructions for atomicrmw fmin/fmax for float", AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
574 { "atomic-global-pk-add-bf16-inst", "Has global_atomic_pk_add_bf16 instruction", AMDGPU::FeatureAtomicGlobalPkAddBF16Inst, { { { 0x0ULL, 0x400000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
575 { "auto-waitcnt-before-barrier", "Hardware automatically inserts waitcnt before barrier", AMDGPU::FeatureAutoWaitcntBeforeBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
576 { "back-off-barrier", "Hardware supports backing off s_barrier if an exception occurs", AMDGPU::FeatureBackOffBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
577 { "bf16-cvt-insts", "Has bf16 conversion instructions", AMDGPU::FeatureBF16ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
578 { "bf16-pk-insts", "Has bf16 packed instructions (fma, add, mul, max, min)", AMDGPU::FeatureBF16PackedInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
579 { "bf16-trans-insts", "Has bf16 transcendental instructions", AMDGPU::FeatureBF16TransInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
580 { "bf8-cvt-scale-insts", "Has bf8 conversion scale instructions", AMDGPU::FeatureBF8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
581 { "bitop3-insts", "Has v_bitop3_b32/v_bitop3_b16 instructions", AMDGPU::FeatureBitOp3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
582 { "block-vgpr-csr", "Use block load/store for VGPR callee saved registers", AMDGPU::FeatureUseBlockVGPROpsForCSR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
583 { "bvh-dual-bvh-8-insts", "Has image_bvh_dual_intersect_ray and image_bvh8_intersect_ray instructions", AMDGPU::FeatureBVHDualAndBVH8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
584 { "ci-insts", "Additional instructions for CI+", AMDGPU::FeatureCIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
585 { "clusters", "Has clusters of workgroups support", AMDGPU::FeatureClusters, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
586 { "cube-insts", "Has v_cube* instructions", AMDGPU::FeatureCubeInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
587 { "cumode", "Enable CU wavefront execution mode", AMDGPU::FeatureCuMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
588 { "cvt-fp8-vop1-bug", "FP8/BF8 VOP1 form of conversion to F32 is unreliable", AMDGPU::FeatureCvtFP8VOP1Bug, { { { 0x0ULL, 0x800000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
589 { "cvt-norm-insts", "Has v_cvt_norm* instructions", AMDGPU::FeatureCvtNormInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
590 { "cvt-pk-f16-f32-inst", "Has cvt_pk_f16_f32 instruction", AMDGPU::FeatureCvtPkF16F32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
591 { "cvt-pknorm-vop2-insts", "Has v_cvt_pk_norm_*f32 instructions/Has v_cvt_pk_norm_*_f16 instructions", AMDGPU::FeatureCvtPkNormVOP2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
592 { "cvt-pknorm-vop3-insts", "Has v_cvt_pk_norm_*f32 instructions/Has v_cvt_pk_norm_*_f16 instructions", AMDGPU::FeatureCvtPkNormVOP3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
593 { "d16-write-vgpr32", "D16 instructions potentially have 32-bit data dependencies", AMDGPU::FeatureD16Writes32BitVgpr, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
594 { "default-component-broadcast", "BUFFER/IMAGE store instructions set unspecified components to x component (GFX12)", AMDGPU::FeatureDefaultComponentBroadcast, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
595 { "default-component-zero", "BUFFER/IMAGE store instructions set unspecified components to zero (before GFX12)", AMDGPU::FeatureDefaultComponentZero, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
596 { "dl-insts", "Has v_fmac_f32 and v_xnor_b32 instructions", AMDGPU::FeatureDLInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
597 { "dot1-insts", "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", AMDGPU::FeatureDot1Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
598 { "dot10-insts", "Has v_dot2_f32_f16 instruction", AMDGPU::FeatureDot10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
599 { "dot11-insts", "Has v_dot4_f32_fp8_fp8, v_dot4_f32_fp8_bf8, v_dot4_f32_bf8_fp8, v_dot4_f32_bf8_bf8 instructions", AMDGPU::FeatureDot11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
600 { "dot12-insts", "Has v_dot2_f32_bf16 instructions", AMDGPU::FeatureDot12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
601 { "dot13-insts", "Has v_dot2c_f32_bf16 instructions", AMDGPU::FeatureDot13Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
602 { "dot2-insts", "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions", AMDGPU::FeatureDot2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
603 { "dot3-insts", "Has v_dot8c_i32_i4 instruction", AMDGPU::FeatureDot3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
604 { "dot4-insts", "Has v_dot2c_i32_i16 instruction", AMDGPU::FeatureDot4Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
605 { "dot5-insts", "Has v_dot2c_f32_f16 instruction", AMDGPU::FeatureDot5Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
606 { "dot6-insts", "Has v_dot4c_i32_i8 instruction", AMDGPU::FeatureDot6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
607 { "dot7-insts", "Has v_dot4_u32_u8, v_dot8_u32_u4 instructions", AMDGPU::FeatureDot7Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
608 { "dot8-insts", "Has v_dot4_i32_iu8, v_dot8_i32_iu4 instructions", AMDGPU::FeatureDot8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
609 { "dot9-insts", "Has v_dot2_f16_f16, v_dot2_bf16_bf16 instructions", AMDGPU::FeatureDot9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
610 { "dpp", "Support DPP (Data Parallel Primitives) extension", AMDGPU::FeatureDPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
611 { "dpp-64bit", "Support DPP (Data Parallel Primitives) extension in DP ALU", AMDGPU::FeatureDPALU_DPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
612 { "dpp-row-bcast", "Support DPP row_bcast15/row_bcast31", AMDGPU::FeatureDPPBroadcasts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
613 { "dpp-src1-sgpr", "Support SGPR for Src1 of DPP instructions", AMDGPU::FeatureDPPSrc1SGPR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
614 { "dpp-wavefront-shifts", "Support DPP wave_shl/wave_rol/wave_shr/wave_ror", AMDGPU::FeatureDPPWavefrontShifts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
615 { "dpp8", "Support DPP8 (Data Parallel Primitives) extension", AMDGPU::FeatureDPP8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
616 { "ds-src2-insts", "Has ds_*_src2 instructions", AMDGPU::FeatureDsSrc2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
617 { "dumpcode", "Dump MachineInstrs in the CodeEmitter", AMDGPU::FeatureDumpCodeLower, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
618 { "emulated-system-scope-atomics", "System scope atomics unsupported by the PCI-e are emulated in HW via CAS loop and functional.", AMDGPU::FeatureEmulatedSystemScopeAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
619 { "enable-ds128", "Use ds_{read|write}_b128", AMDGPU::FeatureEnableDS128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
620 { "enable-flat-scratch", "Use scratch_* flat memory instructions to access scratch", AMDGPU::FeatureEnableFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
621 { "enable-prt-strict-null", "Enable zeroing of result registers for sparse texture fetches", AMDGPU::FeatureEnablePRTStrictNull, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
622 { "extended-image-insts", "Support mips != 0, lod != 0, gather4, and get_lod", AMDGPU::FeatureExtendedImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
623 { "f16bf16-to-fp6bf6-cvt-scale-insts", "Has f16bf16 to fp6bf6 conversion scale instructions", AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
624 { "f32-to-f16bf16-cvt-sr-insts", "Has f32 to f16bf16 conversion scale instructions", AMDGPU::FeatureF32ToF16BF16ConversionSRInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
625 { "fast-denormal-f32", "Enabling denormals does not cause f32 instructions to run at f64 rates", AMDGPU::FeatureFastDenormalF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
626 { "fast-fmaf", "Assuming f32 fma is at least as fast as mul + add", AMDGPU::FeatureFastFMAF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
627 { "flat-address-space", "Support flat address space", AMDGPU::FeatureFlatAddressSpace, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
628 { "flat-atomic-fadd-f32-inst", "Has flat_atomic_add_f32 instruction", AMDGPU::FeatureFlatAtomicFaddF32Inst, { { { 0x0ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
629 { "flat-buffer-global-fadd-f64-inst", "Has flat, buffer, and global instructions for f64 atomic fadd", AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
630 { "flat-for-global", "Force to generate flat instruction for global", AMDGPU::FeatureUseFlatForGlobal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
631 { "flat-global-insts", "Have global_* flat memory instructions", AMDGPU::FeatureFlatGlobalInsts, { { { 0x0ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
632 { "flat-gvs-mode", "Have GVS addressing mode with flat_* instructions", AMDGPU::FeatureFlatGVSMode, { { { 0x0ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
633 { "flat-inst-offsets", "Flat instructions have immediate offset addressing mode", AMDGPU::FeatureFlatInstOffsets, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
634 { "flat-scratch-insts", "Have scratch_* flat memory instructions", AMDGPU::FeatureFlatScratchInsts, { { { 0x0ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
635 { "flat-segment-offset-bug", "GFX10 bug where inst_offset is ignored when flat instructions access global memory", AMDGPU::FeatureFlatSegmentOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
636 { "fma-mix-bf16-insts", "Has v_fma_mix_f32_bf16, v_fma_mixlo_bf16, v_fma_mixhi_bf16 instructions", AMDGPU::FeatureFmaMixBF16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
637 { "fma-mix-insts", "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", AMDGPU::FeatureFmaMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
638 { "fmacf64-inst", "Has v_fmac_f64 instruction", AMDGPU::FeatureFmacF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
639 { "fmaf", "Enable single precision FMA (not as fast as mul+add, but fused)", AMDGPU::FeatureFMA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
640 { "fp4-cvt-scale-insts", "Has fp4 conversion scale instructions", AMDGPU::FeatureFP4ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
641 { "fp64", "Enable double precision operations", AMDGPU::FeatureFP64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
642 { "fp6bf6-cvt-scale-insts", "Has fp6 and bf6 conversion scale instructions", AMDGPU::FeatureFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
643 { "fp8-conversion-insts", "Has fp8 and bf8 conversion instructions", AMDGPU::FeatureFP8ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
644 { "fp8-cvt-scale-insts", "Has fp8 conversion scale instructions", AMDGPU::FeatureFP8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
645 { "fp8-insts", "Has fp8 and bf8 instructions", AMDGPU::FeatureFP8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
646 { "fp8e5m3-insts", "Has fp8 e5m3 format support", AMDGPU::FeatureFP8E5M3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
647 { "full-rate-64-ops", "Most fp64 instructions are full rate", AMDGPU::FeatureFullRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
648 { "g16", "Support G16 for 16-bit gradient image operands", AMDGPU::FeatureG16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
649 { "gcn3-encoding", "Encoding format for VI", AMDGPU::FeatureGCN3Encoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
650 { "gds", "Has Global Data Share", AMDGPU::FeatureGDS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
651 { "get-wave-id-inst", "Has s_get_waveid_in_workgroup instruction", AMDGPU::FeatureGetWaveIdInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
652 { "gfx10", "GFX10 GPU generation", AMDGPU::FeatureGFX10, { { { 0x431a9000f0044a2ULL, 0x5549c78020000ULL, 0x820304010420641ULL, 0x28700e00000466a0ULL, 0x0ULL, 0x0ULL, } } } },
653 { "gfx10-3-insts", "Additional instructions for GFX10.3", AMDGPU::FeatureGFX10_3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
654 { "gfx10-insts", "Additional instructions for GFX10+", AMDGPU::FeatureGFX10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
655 { "gfx10_a-encoding", "Has BVH ray tracing instructions", AMDGPU::FeatureGFX10_AEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
656 { "gfx10_b-encoding", "Encoding format GFX10_B", AMDGPU::FeatureGFX10_BEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
657 { "gfx11", "GFX11 GPU generation", AMDGPU::FeatureGFX11, { { { 0x431a900030044a2ULL, 0xbd549c78020000ULL, 0x820304008420601ULL, 0x28e00e8000040000ULL, 0x0ULL, 0x0ULL, } } } },
658 { "gfx11-insts", "Additional instructions for GFX11+", AMDGPU::FeatureGFX11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
659 { "gfx12", "GFX12 GPU generation", AMDGPU::FeatureGFX12, { { { 0x2300100030060a2ULL, 0x2bd449c78000000ULL, 0x20305808400610ULL, 0x20e00e8000000000ULL, 0x0ULL, 0x0ULL, } } } },
660 { "gfx12-insts", "Additional instructions for GFX12+", AMDGPU::FeatureGFX12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
661 { "gfx1250-insts", "Additional instructions for GFX1250+", AMDGPU::FeatureGFX1250Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
662 { "gfx13", "GFX13 GPU generation", AMDGPU::FeatureGFX13, { { { 0x2300100030060a2ULL, 0xabd449c78000000ULL, 0x20305808400650ULL, 0x20e00e8000000000ULL, 0x0ULL, 0x0ULL, } } } },
663 { "gfx13-insts", "Additional instructions for GFX13+", AMDGPU::FeatureGFX13Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x20010ULL, 0x0ULL, 0x0ULL, } } } },
664 { "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", AMDGPU::FeatureGFX7GFX8GFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
665 { "gfx8-insts", "Additional instructions for GFX8+", AMDGPU::FeatureGFX8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
666 { "gfx9", "GFX9 GPU generation", AMDGPU::FeatureGFX9, { { { 0x551a900000040a2ULL, 0x1681c78000000ULL, 0x1800040000020601ULL, 0x8540e0101a466a0ULL, 0x10ULL, 0x0ULL, } } } },
667 { "gfx9-insts", "Additional instructions for GFX9+", AMDGPU::FeatureGFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
668 { "gfx90a-insts", "Additional instructions for GFX90A+", AMDGPU::FeatureGFX90AInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
669 { "gfx940-insts", "Additional instructions for GFX940+", AMDGPU::FeatureGFX940Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
670 { "gfx950-insts", "Additional instructions for GFX950+", AMDGPU::FeatureGFX950Insts, { { { 0x400200020000ULL, 0x16c0000ULL, 0xc003000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
671 { "globally-addressable-scratch", "FLAT instructions can access scratch memory for any thread in any wave", AMDGPU::FeatureGloballyAddressableScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
672 { "gws", "Has Global Wave Sync", AMDGPU::FeatureGWS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
673 { "half-rate-64-ops", "Most fp64 instructions are half rate instead of quarter", AMDGPU::FeatureHalfRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
674 { "ieee-minimum-maximum-insts", "Has v_minimum/maximum_f16/f32/f64, v_minimummaximum/maximumminimum_f16/f32 andv_pk_minimum/maximum_f16 instructions", AMDGPU::FeatureIEEEMinimumMaximumInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
675 { "image-gather4-d16-bug", "Image Gather4 D16 hardware bug", AMDGPU::FeatureImageGather4D16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
676 { "image-insts", "Support image instructions", AMDGPU::FeatureImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
677 { "image-store-d16-bug", "Image Store D16 hardware bug", AMDGPU::FeatureImageStoreD16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
678 { "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", AMDGPU::FeatureInstFwdPrefetchBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
679 { "int-clamp-insts", "Support clamp for integer destination", AMDGPU::FeatureIntClamp, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
680 { "inv-2pi-inline-imm", "Has 1 / (2 * pi) as inline immediate", AMDGPU::FeatureInv2PiInlineImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
681 { "kernarg-preload", "Hardware supports preloading of kernel arguments in user SGPRs.", AMDGPU::FeatureKernargPreload, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
682 { "lds-barrier-arrive-atomic", "Has LDS barrier-arrive atomic instructions", AMDGPU::FeatureLdsBarrierArriveAtomic, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
683 { "lds-branch-vmem-war-hazard", "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", AMDGPU::FeatureLdsBranchVmemWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
684 { "lds-misaligned-bug", "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode", AMDGPU::FeatureLDSMisalignedBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
685 { "ldsbankcount16", "The number of LDS banks per compute unit.", AMDGPU::FeatureLDSBankCount16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
686 { "ldsbankcount32", "The number of LDS banks per compute unit.", AMDGPU::FeatureLDSBankCount32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
687 { "lerp-inst", "Has v_lerp_u8 instruction", AMDGPU::FeatureLerpInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
688 { "load-store-opt", "Enable SI load/store optimizer pass", AMDGPU::FeatureEnableLoadStoreOpt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
689 { "lshl-add-u64-inst", "Has v_lshl_add_u64 instruction", AMDGPU::FeatureLshlAddU64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
690 { "mad-intra-fwd-bug", "MAD_U64/I64 intra instruction forwarding bug", AMDGPU::FeatureMADIntraFwdBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
691 { "mad-mac-f32-insts", "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions", AMDGPU::FeatureMadMacF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
692 { "mad-mix-insts", "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", AMDGPU::FeatureMadMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
693 { "mad-u32-inst", "Has v_mad_u32 instruction", AMDGPU::FeatureMadU32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
694 { "mai-insts", "Has mAI instructions", AMDGPU::FeatureMAIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
695 { "max-hard-clause-length-32", "Maximum number of instructions in an explicit S_CLAUSE is 32", AMDGPU::FeatureMaxHardClauseLength32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
696 { "max-hard-clause-length-63", "Maximum number of instructions in an explicit S_CLAUSE is 63", AMDGPU::FeatureMaxHardClauseLength63, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
697 { "max-private-element-size-16", "Maximum private access size may be 16", AMDGPU::FeatureMaxPrivateElementSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
698 { "max-private-element-size-4", "Maximum private access size may be 4", AMDGPU::FeatureMaxPrivateElementSize4, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
699 { "max-private-element-size-8", "Maximum private access size may be 8", AMDGPU::FeatureMaxPrivateElementSize8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
700 { "mcast-load-insts", "Has multicast load instructions", AMDGPU::FeatureMcastLoadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
701 { "memory-atomic-fadd-f32-denormal-support", "global/flat/buffer atomic fadd for float supports denormal handling", AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
702 { "mfma-inline-literal-bug", "MFMA cannot use inline literal as SrcC", AMDGPU::FeatureMFMAInlineLiteralBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
703 { "mimg-r128", "Support 128-bit texture resources", AMDGPU::FeatureMIMG_R128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
704 { "min3-max3-pkf16", "Has v_pk_min3_num_f16 and v_pk_max3_num_f16 instructions", AMDGPU::FeatureMin3Max3PKF16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
705 { "minimum3-maximum3-f16", "Has v_minimum3_f16 and v_maximum3_f16 instructions", AMDGPU::FeatureMinimum3Maximum3F16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
706 { "minimum3-maximum3-f32", "Has v_minimum3_f32 and v_maximum3_f32 instructions", AMDGPU::FeatureMinimum3Maximum3F32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
707 { "minimum3-maximum3-pkf16", "Has v_pk_minimum3_f16 and v_pk_maximum3_f16 instructions", AMDGPU::FeatureMinimum3Maximum3PKF16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
708 { "movrel", "Has v_movrel*_b32 instructions", AMDGPU::FeatureMovrel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
709 { "msaa-load-dst-sel-bug", "MSAA loads not honoring dst_sel bug", AMDGPU::FeatureMSAALoadDstSelBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
710 { "negative-scratch-offset-bug", "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9", AMDGPU::FeatureNegativeScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
711 { "negative-unaligned-scratch-offset-bug", "Scratch instructions with a VGPR offset and a negative immediate offset thatis not a multiple of 4 read wrong memory on GFX10", AMDGPU::FeatureNegativeUnalignedScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
712 { "no-data-dep-hazard", "Does not need SW waitstates", AMDGPU::FeatureNoDataDepHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
713 { "no-sdst-cmpx", "V_CMPX does not write VCC/SGPR in addition to EXEC", AMDGPU::FeatureNoSdstCMPX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
714 { "nsa-clause-bug", "MIMG-NSA in a hard clause has unpredictable results on GFX10.1", AMDGPU::FeatureNSAClauseBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
715 { "nsa-encoding", "Support NSA encoding for image instructions", AMDGPU::FeatureNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
716 { "nsa-to-vmem-bug", "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", AMDGPU::FeatureNSAtoVMEMBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
717 { "offset-3f-bug", "Branch offset of 3f hardware bug", AMDGPU::FeatureOffset3fBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
718 { "packed-fp32-ops", "Support packed fp32 instructions", AMDGPU::FeaturePackedFP32Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
719 { "packed-tid", "Workitem IDs are packed into v0 at kernel launch", AMDGPU::FeaturePackedTID, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
720 { "partial-nsa-encoding", "Support partial NSA encoding for image instructions", AMDGPU::FeaturePartialNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
721 { "permlane16-swap", "Has v_permlane16_swap_b32 instructions", AMDGPU::FeaturePermlane16Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
722 { "permlane32-swap", "Has v_permlane32_swap_b32 instructions", AMDGPU::FeaturePermlane32Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
723 { "pk-add-min-max-insts", "Has v_pk_add_{min|max}_{i|u}16 instructions", AMDGPU::FeaturePkAddMinMaxInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
724 { "pk-fmac-f16-inst", "Has v_pk_fmac_f16 instruction", AMDGPU::FeaturePkFmacF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
725 { "point-sample-accel", "Has point sample acceleration feature", AMDGPU::FeaturePointSampleAccel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
726 { "precise-memory", "Enable precise memory mode", AMDGPU::FeaturePreciseMemory, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
727 { "priv-enabled-trap2-nop-bug", "Hardware that runs with PRIV=1 interpreting 's_trap 2' as a nop bug", AMDGPU::FeaturePrivEnabledTrap2NopBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
728 { "prng-inst", "Has v_prng_b32 instruction", AMDGPU::FeaturePrngInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
729 { "pseudo-scalar-trans", "Has Pseudo Scalar Transcendental instructions", AMDGPU::FeaturePseudoScalarTrans, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
730 { "qsad-insts", "Has v_qsad* instructions", AMDGPU::FeatureQsadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
731 { "r128-a16", "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128", AMDGPU::FeatureR128A16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
732 { "real-true16", "Use true 16-bit registers", AMDGPU::FeatureRealTrue16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
733 { "relaxed-buffer-oob-mode", "Disable strict out-of-bounds buffer guarantees. An OOB access may potentiallycause an adjacent access to be treated as if it were also OOB", AMDGPU::FeatureRelaxedBufferOOBMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
734 { "required-export-priority", "Export priority must be explicitly manipulated on GFX11.5", AMDGPU::FeatureRequiredExportPriority, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
735 { "requires-cov6", "Target Requires Code Object V6", AMDGPU::FeatureRequiresCOV6, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
736 { "restricted-soffset", "Has restricted SOffset (immediate not supported).", AMDGPU::FeatureRestrictedSOffset, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
737 { "s-barrier-leave-imm", "s_barrier_leave takes an immediate operand", AMDGPU::FeatureSBarrierLeaveImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
738 { "s-memrealtime", "Has s_memrealtime instruction", AMDGPU::FeatureSMemRealTime, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
739 { "s-memtime-inst", "Has s_memtime instruction", AMDGPU::FeatureSMemTimeInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
740 { "s-wakeup-barrier-inst", "Has s_wakeup_barrier instruction.", AMDGPU::FeatureSWakeupBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
741 { "s-wakeup-imm", "s_wakeup takes an immediate operand", AMDGPU::FeatureSWakeupImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
742 { "sad-insts", "Has v_sad* instructions", AMDGPU::FeatureSadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
743 { "safe-cu-prefetch", "VMEM CU scope prefetches do not fail on illegal address", AMDGPU::FeatureSafeCUPrefetch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
744 { "safe-smem-prefetch", "SMEM prefetches do not fail on illegal address", AMDGPU::FeatureSafeSmemPrefetch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
745 { "salu-float", "Has SALU floating point instructions", AMDGPU::FeatureSALUFloatInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
746 { "scalar-atomics", "Has atomic scalar memory instructions", AMDGPU::FeatureScalarAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
747 { "scalar-dwordx3-loads", "Has 96-bit scalar load instructions", AMDGPU::FeatureScalarDwordx3Loads, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
748 { "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", AMDGPU::FeatureScalarFlatScratchInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
749 { "scalar-stores", "Has store scalar memory instructions", AMDGPU::FeatureScalarStores, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
750 { "sdwa", "Support SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
751 { "sdwa-mav", "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAMac, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
752 { "sdwa-omod", "Support OMod with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAOmod, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
753 { "sdwa-out-mods-vopc", "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAOutModsVOPC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
754 { "sdwa-scalar", "Support scalar register with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAScalar, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
755 { "sdwa-sdst", "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWASdst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
756 { "sea-islands", "SEA_ISLANDS GPU generation", AMDGPU::FeatureSeaIslands, { { { 0x40089000f000400ULL, 0x300048020100ULL, 0x800004001420041ULL, 0x800024000044000ULL, 0x10ULL, 0x0ULL, } } } },
757 { "setprio-inc-wg-inst", "Has s_setprio_inc_wg instruction.", AMDGPU::FeatureSetPrioIncWgInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
758 { "setreg-vgpr-msb-fixup", "S_SETREG to MODE clobbers VGPR MSB bits, requires fixup", AMDGPU::FeatureSetregVGPRMSBFixup, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
759 { "sgpr-init-bug", "VI SGPR initialization bug requiring a fixed SGPR allocation size", AMDGPU::FeatureSGPRInitBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
760 { "shader-cycles-hi-lo-registers", "Has SHADER_CYCLES_HI/LO hardware registers", AMDGPU::FeatureShaderCyclesHiLoRegisters, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
761 { "shader-cycles-register", "Has SHADER_CYCLES hardware register", AMDGPU::FeatureShaderCyclesRegister, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
762 { "si-scheduler", "Enable SI Machine Scheduler", AMDGPU::FeatureEnableSIScheduler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
763 { "smem-to-vector-write-hazard", "s_load_dword followed by v_cmp page faults", AMDGPU::FeatureSMEMtoVectorWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
764 { "southern-islands", "SOUTHERN_ISLANDS GPU generation", AMDGPU::FeatureSouthernIslands, { { { 0x40088000a000200ULL, 0x100008020100ULL, 0x4001422041ULL, 0x800004000044000ULL, 0x10ULL, 0x0ULL, } } } },
765 { "sramecc", "Enable SRAMECC", AMDGPU::FeatureSRAMECC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
766 { "sramecc-support", "Hardware supports SRAMECC", AMDGPU::FeatureSupportsSRAMECC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
767 { "tanh-insts", "Has v_tanh_f32/f16 instructions", AMDGPU::FeatureTanhInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
768 { "tensor-cvt-lut-insts", "Has v_perm_pk16* instructions", AMDGPU::FeatureTensorCvtLutInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
769 { "tgsplit", "Enable threadgroup split execution", AMDGPU::FeatureTgSplit, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
770 { "transpose-load-f4f6-insts", "Has ds_load_tr4/tr6 and global_load_tr4/tr6 instructions", AMDGPU::FeatureTransposeLoadF4F6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
771 { "trap-handler", "Trap handler support", AMDGPU::FeatureTrapHandler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
772 { "trig-reduced-range", "Requires use of fract on arguments to trig instructions", AMDGPU::FeatureTrigReducedRange, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
773 { "true16", "True 16-bit operand instructions", AMDGPU::FeatureTrue16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
774 { "unaligned-access-mode", "Enable unaligned global, local and region loads and stores if the hardware supports it", AMDGPU::FeatureUnalignedAccessMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
775 { "unaligned-buffer-access", "Hardware supports unaligned global loads and stores", AMDGPU::FeatureUnalignedBufferAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
776 { "unaligned-ds-access", "Hardware supports unaligned local and region loads and stores", AMDGPU::FeatureUnalignedDSAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
777 { "unaligned-scratch-access", "Support unaligned scratch loads and stores", AMDGPU::FeatureUnalignedScratchAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
778 { "unpacked-d16-vmem", "Has unpacked d16 vmem instructions", AMDGPU::FeatureUnpackedD16VMem, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
779 { "unsafe-ds-offset-folding", "Force using DS instruction immediate offsets on SI", AMDGPU::FeatureEnableUnsafeDSOffsetFolding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
780 { "use-add-pc64-inst", "Use s_add_pc_i64 instruction.", AMDGPU::FeatureUseAddPC64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
781 { "user-sgpr-init16-bug", "Bug requiring at least 16 user+system SGPRs to be enabled", AMDGPU::FeatureUserSGPRInit16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
782 { "valu-trans-use-hazard", "Hazard when TRANS instructions are closely followed by a use of the result", AMDGPU::FeatureVALUTransUseHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
783 { "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", AMDGPU::FeatureVcmpxExecWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
784 { "vcmpx-permlane-hazard", "TODO: describe me", AMDGPU::FeatureVcmpxPermlaneHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
785 { "vgpr-align2", "VGPR and AGPR tuple operands require even alignment", AMDGPU::FeatureRequiresAlignedVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
786 { "vgpr-index-mode", "Has VGPR mode register indexing", AMDGPU::FeatureVGPRIndexMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
787 { "vmem-pref-insts", "Has flat_prefect_b8 and global_prefetch_b8 instructions", AMDGPU::FeatureVmemPrefInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
788 { "vmem-to-lds-load-insts", "The platform has memory to lds instructions (global_load w/lds bit set, buffer_loadw/lds bit set or global_load_lds. This does not include scratch_load_lds.", AMDGPU::FeatureVMemToLDSLoad, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
789 { "vmem-to-scalar-write-hazard", "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", AMDGPU::FeatureVMEMtoScalarWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
790 { "vmem-write-vgpr-in-order", "VMEM instructions of the same type write VGPR results in order", AMDGPU::FeatureVmemWriteVgprInOrder, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
791 { "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", AMDGPU::FeatureVolcanicIslands, { { { 0x550890000000402ULL, 0x780058020100ULL, 0x800004001420641ULL, 0x804024001046160ULL, 0x10ULL, 0x0ULL, } } } },
792 { "vop3-literal", "Can use one literal in VOP3", AMDGPU::FeatureVOP3Literal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
793 { "vop3p", "Has VOP3P packed instructions", AMDGPU::FeatureVOP3PInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
794 { "vopd", "Has VOPD dual issue wave32 instructions", AMDGPU::FeatureVOPDInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
795 { "vscnt", "Has separate store vscnt counter", AMDGPU::FeatureVscnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
796 { "wait-xcnt", "Has s_wait_xcnt instruction", AMDGPU::FeatureWaitXcnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
797 { "waits-before-system-scope-stores", "Target requires waits for loads and atomics before system scope stores", AMDGPU::FeatureWaitsBeforeSystemScopeStores, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
798 { "wavefrontsize16", "The number of threads per wavefront", AMDGPU::FeatureWavefrontSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
799 { "wavefrontsize32", "The number of threads per wavefront", AMDGPU::FeatureWavefrontSize32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
800 { "wavefrontsize64", "The number of threads per wavefront", AMDGPU::FeatureWavefrontSize64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
801 { "wmma-128b-insts", "Has WMMA instructions where A and B matrices do not have duplicated data", AMDGPU::FeatureWMMA128bInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
802 { "wmma-256b-insts", "Has WMMA instructions where A and B matrices have duplicated data", AMDGPU::FeatureWMMA256bInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
803 { "xf32-insts", "Has instructions that support xf32 format, such as v_mfma_f32_16x16x8_xf32 and v_mfma_f32_32x32x4_xf32", AMDGPU::FeatureXF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
804 { "xnack", "Enable XNACK support", AMDGPU::FeatureXNACK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
805 { "xnack-support", "Hardware supports XNACK", AMDGPU::FeatureSupportsXNACK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
806};
807
808#ifdef DBGFIELD
809#error "<target>GenSubtargetInfo.inc requires a DBGFIELD macro"
810#endif
811#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
812#define DBGFIELD(x) x,
813#define DBGVAL_OR_NULLPTR(x) x
814#else
815#define DBGFIELD(x)
816#define DBGVAL_OR_NULLPTR(x) nullptr
817#endif
818
819// ===============================================================
820// Data tables for the new per-operand machine model.
821
822// {ProcResourceIdx, ReleaseAtCycle, AcquireAtCycle}
823extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[] = {
824 { 0, 0, 0 }, // Invalid
825 { 4, 1, 0}, // #1
826 { 5, 1, 0}, // #2
827 { 5, 2, 0}, // #3
828 { 6, 1, 0}, // #4
829 { 3, 1, 0}, // #5
830 { 6, 1, 0}, // #6
831 { 3, 2, 0}, // #7
832 { 2, 1, 0}, // #8
833 { 1, 1, 0}, // #9
834 { 6, 3, 0}, // #10
835 { 7, 2, 0}, // #11
836 { 7, 8, 0}, // #12
837 { 7, 16, 0}, // #13
838 { 4, 1, 0}, // #14
839 { 7, 1, 0}, // #15
840 { 4, 2, 0}, // #16
841 { 7, 2, 0}, // #17
842 { 4, 1, 0}, // #18
843 { 8, 1, 0}, // #19
844 { 3, 1, 0}, // #20
845 { 4, 2, 0}, // #21
846 { 8, 1, 0}, // #22
847 { 3, 1, 0}, // #23
848 { 4, 1, 0}, // #24
849 { 3, 2, 0}, // #25
850 { 4, 2, 0}, // #26
851 { 2, 1, 0}, // #27
852 { 4, 1, 0}, // #28
853 { 4, 2, 0}, // #29
854 { 5, 1, 0}, // #30
855 { 7, 1, 0}, // #31
856 { 4, 1, 0}, // #32
857 { 6, 1, 0}, // #33
858 { 4, 1, 0}, // #34
859 { 6, 1, 0}, // #35
860 { 7, 1, 0}, // #36
861 { 4, 3, 0}, // #37
862 { 8, 3, 0}, // #38
863 { 4, 2, 0}, // #39
864 { 6, 2, 0}, // #40
865 { 3, 1, 0}, // #41
866 { 4, 2, 0}, // #42
867 { 7, 1, 0}, // #43
868 { 4, 2, 0}, // #44
869 { 5, 1, 0}, // #45
870 { 6, 1, 0}, // #46
871 { 4, 3, 0}, // #47
872 { 7, 3, 0}, // #48
873 { 9, 8, 0}, // #49
874 { 9, 16, 0}, // #50
875 { 5, 4, 0}, // #51
876 { 5, 8, 0}, // #52
877 { 7, 4, 0}, // #53
878 { 5, 16, 0} // #54
879}; // AMDGPUWriteProcResTable
880
881// {Cycles, WriteResourceID}
882extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[] = {
883 { 0, 0}, // Invalid
884 { 1, 0}, // #1 WriteSALU_Write32Bit_WriteFloatFMA_WriteDoubleAdd_Write64Bit_WriteDoubleCvt_WriteIntMul
885 { 1, 0}, // #2 Write32Bit_WriteSALU_Write64Bit
886 { 1, 0}, // #3 Write32Bit
887 {80, 0}, // #4 WriteVMEM
888 {80, 0}, // #5 WriteVMEM
889 { 5, 0}, // #6 WriteLDS_WriteSMEM_Write32Bit_WriteFloatCvt_WriteFloatFMA
890 { 5, 0}, // #7 WriteLDS_Write32Bit
891 { 5, 0}, // #8 WriteLDS
892 { 4, 0}, // #9 WriteExport_WriteTrans32_WriteFloatCvt_WriteDoubleCvt_WriteIntMul_WriteQuarterRate32_WriteSFPU_WriteTrans64_Write4PassDGEMM_Write4PassMAI
893 { 8, 0}, // #10 WriteBranch_WriteDoubleAdd_Write8PassMAI_WriteIntMul_WriteQuarterRate32_WriteTrans32_WritePseudoScalarTrans_WriteXDL2PassWMMA_Write8PassDGEMM
894 {500, 0}, // #11 WriteBarrier
895 { 1, 0}, // #12 WriteSALU
896 { 2, 0}, // #13 Write64Bit_Write2PassMAI_WriteSALU_WriteDoubleAdd
897 {16, 0}, // #14 WriteFloatFMA_WriteDouble_WriteTrans64_Write16PassMAI_WriteExport_WriteXDL4PassWMMA_Write4PassWMMA_Write16PassDGEMM
898 {16, 0}, // #15 WriteFloatFMA_WriteDouble
899 { 1, 0}, // #16 WriteSALU
900 { 4, 0}, // #17 WriteIntMul_WriteDouble
901 { 1, 0}, // #18 WriteSALU
902 { 2, 0}, // #19 Write64Bit
903 { 2, 0}, // #20 Write64Bit
904 {80, 0}, // #21 WriteVMEM
905 {80, 0}, // #22 WriteVMEM
906 {80, 0}, // #23 WriteVMEM
907 { 8, 0}, // #24 WriteDoubleAdd
908 { 1, 0}, // #25 Write32Bit
909 {320, 0}, // #26 WriteVMEM
910 {320, 0}, // #27 WriteVMEM
911 {20, 0}, // #28 WriteLDS_WriteSMEM
912 {20, 0}, // #29 WriteLDS
913 {20, 0}, // #30 WriteLDS
914 {32, 0}, // #31 WriteBranch
915 {2000, 0}, // #32 WriteBarrier
916 { 2, 0}, // #33 WriteSALU
917 { 6, 0}, // #34 Write64Bit_WriteQuarterRate32
918 { 5, 0}, // #35 Write32Bit_WriteFloatFMA
919 { 2, 0}, // #36 WriteSALU
920 {22, 0}, // #37 WriteDoubleAdd_WriteDoubleCvt
921 {10, 0}, // #38 WriteTrans32
922 {22, 0}, // #39 WriteDouble
923 { 2, 0}, // #40 WriteSALU
924 { 8, 0}, // #41 WriteIntMul
925 { 2, 0}, // #42 WriteSALU
926 {24, 0}, // #43 WriteTrans64
927 { 6, 0}, // #44 Write64Bit
928 { 6, 0}, // #45 Write64Bit
929 {320, 0}, // #46 WriteVMEM
930 {320, 0}, // #47 WriteVMEM
931 {320, 0}, // #48 WriteVMEM
932 {22, 0}, // #49 WriteDoubleAdd
933 { 5, 0}, // #50 Write32Bit
934 {38, 0}, // #51 WriteDoubleAdd_WriteDoubleCvt_WriteTrans64
935 {38, 0}, // #52 WriteDouble
936 { 2, 0}, // #53 WriteSALU
937 {40, 0}, // #54 WriteTrans64
938 {38, 0}, // #55 WriteDoubleAdd
939 { 5, 0}, // #56 Write32Bit
940 { 7, 0}, // #57 WritePseudoScalarTrans
941 {37, 0}, // #58 WriteDoubleAdd_WriteDoubleCvt
942 {37, 0}, // #59 WriteDouble
943 { 2, 0}, // #60 WriteSALU
944 {37, 0}, // #61 WriteDoubleAdd
945 { 5, 0}, // #62 Write32Bit
946 { 2, 0}, // #63 WriteDoubleAdd
947 { 1, 0} // #64 Write32Bit
948}; // AMDGPUWriteLatencyTable
949
950// {UseIdx, WriteResourceID, Cycles}
951extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[] = {
952 {0, 0, 0}, // Invalid
953 {0, 0, -4}, // #1
954 {0, 0, -2} // #2
955}; // AMDGPUReadAdvanceTable
956
957// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
958static const llvm::MCSchedClassDesc SIQuarterSpeedModelSchedClasses[] = {
959 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
960 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
961 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
962 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 2, 2, 0, 0}, // #3
963 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
964 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
965 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
966 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 7, 2, 0, 0}, // #7
967 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
968 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
969 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
970 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
971 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
972 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
973 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
974 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 12, 2, 0, 0}, // #15
975 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
976 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 2, 1, 10, 1, 0, 0}, // #17
977 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #18
978 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
979 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
980 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #21
981 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 2, 1, 14, 1, 0, 0}, // #22
982 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 2, 1, 14, 1, 0, 0}, // #23
983 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 15, 2, 0, 0}, // #24
984 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 15, 2, 0, 0}, // #25
985 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 17, 2, 0, 0}, // #26
986 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #27
987 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
988 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 14, 1, 0, 0}, // #29
989 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 3, 1, 19, 2, 0, 0}, // #30
990 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
991 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
992 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 24, 2, 0, 0}, // #33
993 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
994 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
995 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #36
996 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #37
997 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #38
998 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
999 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #40
1000 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #41
1001 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #42
1002 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #43
1003 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1004 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #45
1005 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #46
1006 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #47
1007 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1008 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49
1009 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50
1010 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #51
1011 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #52
1012 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #53
1013 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1014 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1015 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1016 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1017 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1018 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1019 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1020 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1021 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1022 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1023 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1024 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1025 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1026 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #67
1027 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1028 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 1, false, false, true, 2, 1, 13, 1, 2, 1}, // #69
1029 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #70
1030 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1031 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1032 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1033 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1034 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1035}; // SIQuarterSpeedModelSchedClasses
1036
1037// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1038static const llvm::MCSchedClassDesc GFX10SpeedModelSchedClasses[] = {
1039 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1040 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #1
1041 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #2
1042 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #3
1043 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 18, 2, 26, 1, 0, 0}, // #4
1044 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 20, 3, 27, 2, 0, 0}, // #5
1045 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #6
1046 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 25, 2, 29, 2, 0, 0}, // #7
1047 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 27, 2, 14, 1, 0, 0}, // #8
1048 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #9
1049 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1050 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #11
1051 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1052 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #13
1053 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 32, 1, 0, 0}, // #14
1054 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 29, 3, 33, 2, 0, 0}, // #15
1055 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #16
1056 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 14, 2, 37, 1, 0, 0}, // #17
1057 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #18
1058 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 32, 2, 38, 1, 0, 0}, // #19
1059 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #20
1060 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 14, 2, 37, 1, 0, 0}, // #21
1061 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #22
1062 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 14, 2, 37, 1, 0, 0}, // #23
1063 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #24
1064 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 29, 3, 39, 2, 0, 0}, // #25
1065 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 29, 3, 41, 2, 0, 0}, // #26
1066 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #27
1067 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #28
1068 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 34, 3, 43, 1, 0, 0}, // #29
1069 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 16, 2, 44, 2, 0, 0}, // #30
1070 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1071 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 37, 2, 46, 3, 0, 0}, // #32
1072 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 16, 2, 49, 2, 0, 0}, // #33
1073 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1074 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #35
1075 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #36
1076 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #37
1077 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #38
1078 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #39
1079 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #40
1080 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #41
1081 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #42
1082 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #43
1083 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #44
1084 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #45
1085 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #46
1086 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #47
1087 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #48
1088 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #49
1089 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #50
1090 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #51
1091 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #52
1092 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #53
1093 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #54
1094 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #55
1095 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #56
1096 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #57
1097 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #58
1098 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #59
1099 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #60
1100 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #61
1101 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #62
1102 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #63
1103 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #64
1104 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #65
1105 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #66
1106 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #67
1107 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #68
1108 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1109 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1110 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1111 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1112 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1113 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1114 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1115}; // GFX10SpeedModelSchedClasses
1116
1117// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1118static const llvm::MCSchedClassDesc GFX11SpeedModelSchedClasses[] = {
1119 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1120 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #1
1121 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #2
1122 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #3
1123 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 18, 2, 26, 1, 0, 0}, // #4
1124 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 20, 3, 27, 2, 0, 0}, // #5
1125 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #6
1126 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 25, 2, 28, 2, 0, 0}, // #7
1127 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 27, 2, 14, 1, 0, 0}, // #8
1128 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #9
1129 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1130 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #11
1131 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, true, 1, 2, 9, 1, 0, 0}, // #12
1132 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #13
1133 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 32, 1, 0, 0}, // #14
1134 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 29, 3, 33, 2, 0, 0}, // #15
1135 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #16
1136 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 14, 2, 51, 1, 0, 0}, // #17
1137 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #18
1138 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 32, 2, 38, 1, 0, 0}, // #19
1139 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #20
1140 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 14, 2, 51, 1, 0, 0}, // #21
1141 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #22
1142 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 14, 2, 51, 1, 0, 0}, // #23
1143 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #24
1144 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 29, 3, 52, 2, 0, 0}, // #25
1145 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 29, 3, 41, 2, 0, 0}, // #26
1146 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #27
1147 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #28
1148 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 34, 3, 54, 1, 0, 0}, // #29
1149 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 16, 2, 44, 2, 0, 0}, // #30
1150 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1151 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 37, 2, 46, 3, 0, 0}, // #32
1152 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 16, 2, 55, 2, 0, 0}, // #33
1153 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1154 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #35
1155 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #36
1156 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #37
1157 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #38
1158 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #39
1159 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #40
1160 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #41
1161 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #42
1162 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #43
1163 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #44
1164 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #45
1165 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #46
1166 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #47
1167 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #48
1168 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #49
1169 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #50
1170 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #51
1171 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #52
1172 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #53
1173 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #54
1174 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #55
1175 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #56
1176 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #57
1177 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #58
1178 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #59
1179 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #60
1180 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #61
1181 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #62
1182 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #63
1183 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #64
1184 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #65
1185 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #66
1186 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #67
1187 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #68
1188 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1189 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1190 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1191 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1192 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1193 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1194 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1195}; // GFX11SpeedModelSchedClasses
1196
1197// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1198static const llvm::MCSchedClassDesc GFX12SpeedModelSchedClasses[] = {
1199 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1200 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #1
1201 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #2
1202 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #3
1203 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 14, 2, 26, 1, 0, 0}, // #4
1204 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 41, 3, 27, 2, 0, 0}, // #5
1205 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #6
1206 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 25, 2, 28, 2, 0, 0}, // #7
1207 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 27, 2, 14, 1, 0, 0}, // #8
1208 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #9
1209 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1210 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #11
1211 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 1, 2, 9, 1, 0, 0}, // #12
1212 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #13
1213 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 9, 1, 32, 1, 0, 0}, // #14
1214 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 44, 3, 33, 2, 0, 0}, // #15
1215 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 44, 3, 35, 2, 0, 0}, // #16
1216 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 32, 2, 51, 1, 0, 0}, // #17
1217 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 32, 2, 34, 1, 0, 0}, // #18
1218 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 32, 2, 38, 1, 0, 0}, // #19
1219 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #20
1220 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 32, 2, 51, 1, 0, 0}, // #21
1221 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #22
1222 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 32, 2, 51, 1, 0, 0}, // #23
1223 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, false, 44, 3, 35, 2, 0, 0}, // #24
1224 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, false, 44, 3, 52, 2, 0, 0}, // #25
1225 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, false, 44, 3, 41, 2, 0, 0}, // #26
1226 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 32, 2, 10, 1, 0, 0}, // #27
1227 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, false, 32, 2, 10, 1, 0, 0}, // #28
1228 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 32, 2, 54, 1, 0, 0}, // #29
1229 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 39, 2, 44, 2, 0, 0}, // #30
1230 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 1, false, false, false, 32, 2, 57, 1, 0, 0}, // #31
1231 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, false, 47, 2, 46, 3, 0, 0}, // #32
1232 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, false, 39, 2, 55, 2, 0, 0}, // #33
1233 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1234 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #35
1235 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #36
1236 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #37
1237 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #38
1238 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #39
1239 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #40
1240 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #41
1241 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #42
1242 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #43
1243 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #44
1244 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #45
1245 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #46
1246 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #47
1247 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #48
1248 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #49
1249 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #50
1250 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #51
1251 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #52
1252 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #53
1253 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #54
1254 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #55
1255 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #56
1256 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #57
1257 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #58
1258 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #59
1259 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #60
1260 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #61
1261 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #62
1262 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #63
1263 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #64
1264 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #65
1265 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #66
1266 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, false, 32, 2, 34, 1, 0, 0}, // #67
1267 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #68
1268 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1269 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1270 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1271 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1272 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1273 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1274 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1275}; // GFX12SpeedModelSchedClasses
1276
1277// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1278static const llvm::MCSchedClassDesc GFX1250SpeedModelSchedClasses[] = {
1279 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1280 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #1
1281 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #2
1282 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 16, 2, 6, 2, 0, 0}, // #3
1283 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 18, 2, 26, 1, 0, 0}, // #4
1284 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 20, 3, 27, 2, 0, 0}, // #5
1285 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #6
1286 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 25, 2, 28, 2, 0, 0}, // #7
1287 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 27, 2, 14, 1, 0, 0}, // #8
1288 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #9
1289 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1290 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #11
1291 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 1, 2, 9, 1, 0, 0}, // #12
1292 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #13
1293 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 9, 1, 32, 1, 0, 0}, // #14
1294 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 29, 3, 33, 2, 0, 0}, // #15
1295 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 29, 3, 35, 2, 0, 0}, // #16
1296 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 14, 2, 58, 1, 0, 0}, // #17
1297 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 14, 2, 34, 1, 0, 0}, // #18
1298 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 32, 2, 10, 1, 0, 0}, // #19
1299 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #20
1300 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 14, 2, 58, 1, 0, 0}, // #21
1301 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #22
1302 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 14, 2, 58, 1, 0, 0}, // #23
1303 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, false, 29, 3, 35, 2, 0, 0}, // #24
1304 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, false, 29, 3, 59, 2, 0, 0}, // #25
1305 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, false, 29, 3, 41, 2, 0, 0}, // #26
1306 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 14, 2, 10, 1, 0, 0}, // #27
1307 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, false, 14, 2, 34, 1, 0, 0}, // #28
1308 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 34, 3, 51, 1, 0, 0}, // #29
1309 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 16, 2, 44, 2, 0, 0}, // #30
1310 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 1, false, false, false, 14, 2, 10, 1, 0, 0}, // #31
1311 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, false, 37, 2, 46, 3, 0, 0}, // #32
1312 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, false, 16, 2, 61, 2, 0, 0}, // #33
1313 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1314 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #35
1315 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #36
1316 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #37
1317 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #38
1318 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #39
1319 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #40
1320 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #41
1321 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #42
1322 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #43
1323 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #44
1324 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #45
1325 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #46
1326 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #47
1327 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #48
1328 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #49
1329 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #50
1330 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #51
1331 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #52
1332 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #53
1333 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #54
1334 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #55
1335 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #56
1336 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #57
1337 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, false, 50, 1, 14, 1, 0, 0}, // #58
1338 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 1, false, false, false, 50, 1, 14, 1, 0, 0}, // #59
1339 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #60
1340 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #61
1341 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 1, false, false, false, 15, 1, 14, 1, 0, 0}, // #62
1342 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, false, 15, 1, 14, 1, 0, 0}, // #63
1343 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #64
1344 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #65
1345 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #66
1346 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, false, 14, 2, 34, 1, 0, 0}, // #67
1347 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #68
1348 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1349 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1350 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1351 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1352 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1353 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 1, false, false, false, 50, 1, 14, 1, 0, 0}, // #74
1354 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #75
1355}; // GFX1250SpeedModelSchedClasses
1356
1357// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1358static const llvm::MCSchedClassDesc SIFullSpeedModelSchedClasses[] = {
1359 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1360 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1361 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1362 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1363 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1364 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1365 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1366 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1367 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1368 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1369 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1370 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1371 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1372 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1373 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1374 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 12, 2, 0, 0}, // #15
1375 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1376 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #17
1377 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #18
1378 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1379 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1380 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #21
1381 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #22
1382 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #23
1383 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1384 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 17, 2, 0, 0}, // #25
1385 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 17, 2, 0, 0}, // #26
1386 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #27
1387 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1388 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #29
1389 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 3, 1, 19, 2, 0, 0}, // #30
1390 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1391 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1392 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 63, 2, 0, 0}, // #33
1393 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1394 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #35
1395 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #36
1396 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #37
1397 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #38
1398 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #39
1399 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40
1400 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #41
1401 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #42
1402 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #43
1403 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #44
1404 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #45
1405 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #46
1406 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #47
1407 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #48
1408 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49
1409 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50
1410 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #51
1411 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #52
1412 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53
1413 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1414 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1415 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1416 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1417 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1418 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1419 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1420 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1421 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1422 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1423 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1424 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1425 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1426 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #67
1427 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1428 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1429 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1430 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1431 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1432 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1433 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1434 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1435}; // SIFullSpeedModelSchedClasses
1436
1437// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1438static const llvm::MCSchedClassDesc SIDPGFX942FullSpeedModelSchedClasses[] = {
1439 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1440 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1441 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1442 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1443 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1444 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1445 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1446 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1447 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1448 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1449 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1450 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1451 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1452 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1453 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1454 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #15
1455 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1456 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #17
1457 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #18
1458 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1459 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1460 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #21
1461 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #22
1462 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #23
1463 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1464 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #25
1465 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #26
1466 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #27
1467 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1468 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 2, 1, 9, 1, 0, 0}, // #29
1469 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 3, 1, 1, 2, 0, 0}, // #30
1470 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1471 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1472 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #33
1473 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1474 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #35
1475 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 51, 1, 9, 1, 1, 1}, // #36
1476 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 52, 1, 10, 1, 1, 1}, // #37
1477 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #38
1478 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1479 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40
1480 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #41
1481 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #42
1482 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #43
1483 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1484 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #45
1485 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #46
1486 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #47
1487 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1488 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #49
1489 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #50
1490 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #51
1491 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #52
1492 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53
1493 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1494 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1495 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1496 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1497 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1498 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1499 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1500 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1501 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1502 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1503 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1504 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1505 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1506 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #67
1507 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1508 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1509 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1510 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1511 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1512 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1513 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1514 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1515}; // SIDPGFX942FullSpeedModelSchedClasses
1516
1517// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1518static const llvm::MCSchedClassDesc SIDPFullSpeedModelSchedClasses[] = {
1519 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1520 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1521 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1522 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1523 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1524 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1525 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1526 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1527 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1528 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1529 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1530 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1531 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1532 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1533 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1534 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #15
1535 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1536 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #17
1537 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #18
1538 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1539 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1540 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #21
1541 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #22
1542 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #23
1543 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1544 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #25
1545 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #26
1546 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #27
1547 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1548 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #29
1549 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #30
1550 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1551 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1552 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #33
1553 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1554 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #35
1555 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 51, 1, 9, 1, 1, 1}, // #36
1556 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 52, 1, 10, 1, 1, 1}, // #37
1557 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #38
1558 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1559 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #40
1560 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #41
1561 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #42
1562 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #43
1563 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1564 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #45
1565 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #46
1566 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #47
1567 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1568 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49
1569 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50
1570 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #51
1571 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #52
1572 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #53
1573 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1574 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1575 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1576 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1577 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1578 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1579 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1580 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1581 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1582 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1583 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1584 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1585 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1586 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #67
1587 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1588 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1589 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1590 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1591 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1592 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1593 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1594 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1595}; // SIDPFullSpeedModelSchedClasses
1596
1597// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1598static const llvm::MCSchedClassDesc SIDPGFX950FullSpeedModelSchedClasses[] = {
1599 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1600 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1601 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1602 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1603 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1604 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1605 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1606 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1607 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1608 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1609 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1610 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1611 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1612 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1613 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1614 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #15
1615 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1616 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #17
1617 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #18
1618 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1619 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1620 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #21
1621 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #22
1622 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #23
1623 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1624 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #25
1625 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #26
1626 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #27
1627 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1628 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 2, 1, 9, 1, 0, 0}, // #29
1629 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 3, 1, 1, 2, 0, 0}, // #30
1630 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1631 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1632 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #33
1633 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1634 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #35
1635 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 51, 1, 9, 1, 1, 1}, // #36
1636 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 54, 1, 14, 1, 1, 1}, // #37
1637 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #38
1638 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1639 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40
1640 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #41
1641 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #42
1642 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #43
1643 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1644 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #45
1645 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #46
1646 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #47
1647 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1648 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #49
1649 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #50
1650 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #51
1651 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #52
1652 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #53
1653 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #54
1654 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #55
1655 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1656 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 41049) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1657 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 42250) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1658 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 43166) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1659 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 43318) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1660 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 44740) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1661 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 47548) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1662 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 47585) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1663 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 47663) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1664 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 47791) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1665 {DBGFIELD(/*Write32Bit*/ 48043) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1666 {DBGFIELD(/*Write64Bit*/ 48054) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #67
1667 {DBGFIELD(/*WriteSALU*/ 48065) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1668 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 48075) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1669 {DBGFIELD(/*Write64Bit_ReadDefault*/ 48097) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1670 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 48120) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #71
1671 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 48146) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #72
1672 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 48171) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #73
1673 {DBGFIELD(/*WriteXDL4PassWMMA*/ 48196) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1674 {DBGFIELD(/*WriteXDL2PassWMMA*/ 48214) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1675}; // SIDPGFX950FullSpeedModelSchedClasses
1676
1677#ifdef __GNUC__
1678#pragma GCC diagnostic push
1679#pragma GCC diagnostic ignored "-Woverlength-strings"
1680#endif
1681static constexpr char AMDGPUSchedClassNamesStorage[] =
1682 "\0"
1683 "InvalidSchedClass\0"
1684 "NullALU_WriteSALU\0"
1685 "NullALU_Write32Bit\0"
1686 "NullALU_Write32Bit_Write32Bit\0"
1687 "NullALU_WriteVMEM\0"
1688 "NullALU_WriteVMEM_WriteLDS\0"
1689 "NullALU_WriteLDS\0"
1690 "NullALU_WriteLDS_WriteLDS\0"
1691 "NullALU_WriteExport\0"
1692 "WriteBranch\0"
1693 "NullALU\0"
1694 "NullALU_WriteBranch\0"
1695 "NullALU_WriteSFPU\0"
1696 "NullALU_WriteSMEM\0"
1697 "NullALU_WriteBarrier\0"
1698 "NullALU_WriteSALU_Write64Bit\0"
1699 "NullALU_Write32Bit_WriteSALU\0"
1700 "NullALU_WriteDoubleAdd\0"
1701 "NullALU_Write64Bit\0"
1702 "NullALU_WriteTrans32\0"
1703 "NullALU_WriteFloatCvt\0"
1704 "NullALU_WriteDoubleCvt\0"
1705 "NullALU_WriteFloatFMA\0"
1706 "NullALU_WriteDouble\0"
1707 "NullALU_WriteFloatFMA_WriteSALU\0"
1708 "NullALU_WriteDouble_WriteSALU\0"
1709 "NullALU_WriteIntMul_WriteSALU\0"
1710 "NullALU_WriteIntMul\0"
1711 "NullALU_WriteQuarterRate32\0"
1712 "NullALU_WriteTrans64\0"
1713 "NullALU_Write64Bit_Write64Bit\0"
1714 "NullALU_WritePseudoScalarTrans\0"
1715 "NullALU_WriteVMEM_WriteVMEM_WriteVMEM\0"
1716 "NullALU_WriteDoubleAdd_Write32Bit\0"
1717 "COPY\0"
1718 "V_ACCVGPR_WRITE_B32_e64\0"
1719 "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0"
1720 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
1721 "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0"
1722 "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0"
1723 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
1724 "V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd\0"
1725 "V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi\0"
1726 "V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd\0"
1727 "V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi\0"
1728 "V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd\0"
1729 "V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0"
1730 "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd\0"
1731 "V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi\0"
1732 "V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940\0"
1733 "V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940\0"
1734 "V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
1735 "V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd\0"
1736 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0"
1737 "V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0"
1738 "V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd\0"
1739 "V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx1170_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx1170_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250\0"
1740 "V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr\0"
1741 "V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx1170_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx1170_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250\0"
1742 "V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr\0"
1743 "V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr\0"
1744 "V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250\0"
1745 "V_WMMA_F32_16X16X4_F32_w32_threeaddr\0"
1746 "V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250\0"
1747 "V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr\0"
1748 "V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250\0"
1749 "Write32Bit\0"
1750 "Write64Bit\0"
1751 "WriteSALU\0"
1752 "Write64Bit_MIVGPRRead\0"
1753 "Write64Bit_ReadDefault\0"
1754 "Write16PassMAI_MIMFMARead\0"
1755 "Write8PassMAI_MIMFMARead\0"
1756 "Write4PassMAI_MIMFMARead\0"
1757 "WriteXDL4PassWMMA\0"
1758 "WriteXDL2PassWMMA\0"
1759 ;
1760#ifdef __GNUC__
1761#pragma GCC diagnostic pop
1762#endif
1763
1764static constexpr llvm::StringTable
1765AMDGPUSchedClassNames = AMDGPUSchedClassNamesStorage;
1766
1767static const llvm::MCSchedModel NoSchedModel = {
1768 MCSchedModel::DefaultIssueWidth,
1769 MCSchedModel::DefaultMicroOpBufferSize,
1770 MCSchedModel::DefaultLoopMicroOpBufferSize,
1771 MCSchedModel::DefaultLoadLatency,
1772 MCSchedModel::DefaultHighLatency,
1773 MCSchedModel::DefaultMispredictPenalty,
1774 false, // PostRAScheduler
1775 false, // CompleteModel
1776 false, // EnableIntervals
1777 0, // Processor ID
1778 nullptr, nullptr, 0, 0, // No instruction-level machine model.
1779 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1780 nullptr, // No Itinerary
1781 nullptr // No extra processor descriptor
1782};
1783
1784static const unsigned SIQuarterSpeedModelProcResourceSubUnits[] = {
1785 0, // Invalid
1786};
1787
1788// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1789static const llvm::MCProcResourceDesc SIQuarterSpeedModelProcResources[] = {
1790 {"InvalidUnit", 0, 0, 0, 0},
1791 {"HWBranch", 1, 0, 1, nullptr}, // #1
1792 {"HWExport", 1, 0, 1, nullptr}, // #2
1793 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1794 {"HWSALU", 1, 0, 1, nullptr}, // #4
1795 {"HWVALU", 1, 0, 1, nullptr}, // #5
1796 {"HWVMEM", 1, 0, 1, nullptr}, // #6
1797 {"HWXDL", 1, 0, 0, nullptr}, // #7
1798};
1799
1800static const llvm::MCSchedModel SIQuarterSpeedModel = {
1801 1, // IssueWidth
1802 1, // MicroOpBufferSize
1803 MCSchedModel::DefaultLoopMicroOpBufferSize,
1804 MCSchedModel::DefaultLoadLatency,
1805 MCSchedModel::DefaultHighLatency,
1806 20, // MispredictPenalty
1807 true, // PostRAScheduler
1808 true, // CompleteModel
1809 false, // EnableIntervals
1810 1, // Processor ID
1811 SIQuarterSpeedModelProcResources,
1812 SIQuarterSpeedModelSchedClasses,
1813 8,
1814 76,
1815 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1816 nullptr, // No Itinerary
1817 nullptr // No extra processor descriptor
1818};
1819
1820static const unsigned GFX10SpeedModelProcResourceSubUnits[] = {
1821 0, // Invalid
1822};
1823
1824// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1825static const llvm::MCProcResourceDesc GFX10SpeedModelProcResources[] = {
1826 {"InvalidUnit", 0, 0, 0, 0},
1827 {"HWBranch", 1, 0, 1, nullptr}, // #1
1828 {"HWExport", 1, 0, 1, nullptr}, // #2
1829 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1830 {"HWRC", 1, 0, 1, nullptr}, // #4
1831 {"HWSALU", 1, 0, 1, nullptr}, // #5
1832 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
1833 {"HWVALU", 1, 0, 1, nullptr}, // #7
1834 {"HWVMEM", 1, 0, 1, nullptr}, // #8
1835};
1836
1837static const llvm::MCSchedModel GFX10SpeedModel = {
1838 1, // IssueWidth
1839 1, // MicroOpBufferSize
1840 MCSchedModel::DefaultLoopMicroOpBufferSize,
1841 MCSchedModel::DefaultLoadLatency,
1842 MCSchedModel::DefaultHighLatency,
1843 20, // MispredictPenalty
1844 true, // PostRAScheduler
1845 true, // CompleteModel
1846 false, // EnableIntervals
1847 2, // Processor ID
1848 GFX10SpeedModelProcResources,
1849 GFX10SpeedModelSchedClasses,
1850 9,
1851 76,
1852 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1853 nullptr, // No Itinerary
1854 nullptr // No extra processor descriptor
1855};
1856
1857static const unsigned GFX11SpeedModelProcResourceSubUnits[] = {
1858 0, // Invalid
1859};
1860
1861// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1862static const llvm::MCProcResourceDesc GFX11SpeedModelProcResources[] = {
1863 {"InvalidUnit", 0, 0, 0, 0},
1864 {"HWBranch", 1, 0, 1, nullptr}, // #1
1865 {"HWExport", 1, 0, 1, nullptr}, // #2
1866 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1867 {"HWRC", 1, 0, 1, nullptr}, // #4
1868 {"HWSALU", 1, 0, 1, nullptr}, // #5
1869 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
1870 {"HWVALU", 1, 0, 1, nullptr}, // #7
1871 {"HWVMEM", 1, 0, 1, nullptr}, // #8
1872};
1873
1874static const llvm::MCSchedModel GFX11SpeedModel = {
1875 1, // IssueWidth
1876 1, // MicroOpBufferSize
1877 MCSchedModel::DefaultLoopMicroOpBufferSize,
1878 MCSchedModel::DefaultLoadLatency,
1879 MCSchedModel::DefaultHighLatency,
1880 20, // MispredictPenalty
1881 true, // PostRAScheduler
1882 true, // CompleteModel
1883 false, // EnableIntervals
1884 3, // Processor ID
1885 GFX11SpeedModelProcResources,
1886 GFX11SpeedModelSchedClasses,
1887 9,
1888 76,
1889 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1890 nullptr, // No Itinerary
1891 nullptr // No extra processor descriptor
1892};
1893
1894static const unsigned GFX12SpeedModelProcResourceSubUnits[] = {
1895 0, // Invalid
1896};
1897
1898// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1899static const llvm::MCProcResourceDesc GFX12SpeedModelProcResources[] = {
1900 {"InvalidUnit", 0, 0, 0, 0},
1901 {"HWBranch", 1, 0, 1, nullptr}, // #1
1902 {"HWExport", 1, 0, 1, nullptr}, // #2
1903 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1904 {"HWRC", 1, 0, 1, nullptr}, // #4
1905 {"HWSALU", 1, 0, 1, nullptr}, // #5
1906 {"HWVALU", 1, 0, 1, nullptr}, // #6
1907 {"HWVMEM", 1, 0, 1, nullptr}, // #7
1908};
1909
1910static const llvm::MCSchedModel GFX12SpeedModel = {
1911 1, // IssueWidth
1912 1, // MicroOpBufferSize
1913 MCSchedModel::DefaultLoopMicroOpBufferSize,
1914 MCSchedModel::DefaultLoadLatency,
1915 MCSchedModel::DefaultHighLatency,
1916 20, // MispredictPenalty
1917 true, // PostRAScheduler
1918 true, // CompleteModel
1919 false, // EnableIntervals
1920 4, // Processor ID
1921 GFX12SpeedModelProcResources,
1922 GFX12SpeedModelSchedClasses,
1923 8,
1924 76,
1925 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1926 nullptr, // No Itinerary
1927 nullptr // No extra processor descriptor
1928};
1929
1930static const unsigned GFX1250SpeedModelProcResourceSubUnits[] = {
1931 0, // Invalid
1932};
1933
1934// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1935static const llvm::MCProcResourceDesc GFX1250SpeedModelProcResources[] = {
1936 {"InvalidUnit", 0, 0, 0, 0},
1937 {"HWBranch", 1, 0, 1, nullptr}, // #1
1938 {"HWExport", 1, 0, 1, nullptr}, // #2
1939 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1940 {"HWRC", 1, 0, 1, nullptr}, // #4
1941 {"HWSALU", 1, 0, 1, nullptr}, // #5
1942 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
1943 {"HWVALU", 1, 0, 1, nullptr}, // #7
1944 {"HWVMEM", 1, 0, 1, nullptr}, // #8
1945 {"HWXDL", 1, 0, 0, nullptr}, // #9
1946};
1947
1948static const llvm::MCSchedModel GFX1250SpeedModel = {
1949 1, // IssueWidth
1950 1, // MicroOpBufferSize
1951 MCSchedModel::DefaultLoopMicroOpBufferSize,
1952 MCSchedModel::DefaultLoadLatency,
1953 MCSchedModel::DefaultHighLatency,
1954 20, // MispredictPenalty
1955 true, // PostRAScheduler
1956 true, // CompleteModel
1957 false, // EnableIntervals
1958 5, // Processor ID
1959 GFX1250SpeedModelProcResources,
1960 GFX1250SpeedModelSchedClasses,
1961 10,
1962 76,
1963 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1964 nullptr, // No Itinerary
1965 nullptr // No extra processor descriptor
1966};
1967
1968static const unsigned SIFullSpeedModelProcResourceSubUnits[] = {
1969 0, // Invalid
1970};
1971
1972// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1973static const llvm::MCProcResourceDesc SIFullSpeedModelProcResources[] = {
1974 {"InvalidUnit", 0, 0, 0, 0},
1975 {"HWBranch", 1, 0, 1, nullptr}, // #1
1976 {"HWExport", 1, 0, 1, nullptr}, // #2
1977 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1978 {"HWSALU", 1, 0, 1, nullptr}, // #4
1979 {"HWVALU", 1, 0, 1, nullptr}, // #5
1980 {"HWVMEM", 1, 0, 1, nullptr}, // #6
1981 {"HWXDL", 1, 0, 0, nullptr}, // #7
1982};
1983
1984static const llvm::MCSchedModel SIFullSpeedModel = {
1985 1, // IssueWidth
1986 1, // MicroOpBufferSize
1987 MCSchedModel::DefaultLoopMicroOpBufferSize,
1988 MCSchedModel::DefaultLoadLatency,
1989 MCSchedModel::DefaultHighLatency,
1990 20, // MispredictPenalty
1991 true, // PostRAScheduler
1992 true, // CompleteModel
1993 false, // EnableIntervals
1994 6, // Processor ID
1995 SIFullSpeedModelProcResources,
1996 SIFullSpeedModelSchedClasses,
1997 8,
1998 76,
1999 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2000 nullptr, // No Itinerary
2001 nullptr // No extra processor descriptor
2002};
2003
2004static const unsigned SIDPGFX942FullSpeedModelProcResourceSubUnits[] = {
2005 0, // Invalid
2006};
2007
2008// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2009static const llvm::MCProcResourceDesc SIDPGFX942FullSpeedModelProcResources[] = {
2010 {"InvalidUnit", 0, 0, 0, 0},
2011 {"HWBranch", 1, 0, 1, nullptr}, // #1
2012 {"HWExport", 1, 0, 1, nullptr}, // #2
2013 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2014 {"HWSALU", 1, 0, 1, nullptr}, // #4
2015 {"HWVALU", 1, 0, 1, nullptr}, // #5
2016 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2017 {"HWXDL", 1, 0, 0, nullptr}, // #7
2018};
2019
2020static const llvm::MCSchedModel SIDPGFX942FullSpeedModel = {
2021 1, // IssueWidth
2022 1, // MicroOpBufferSize
2023 MCSchedModel::DefaultLoopMicroOpBufferSize,
2024 MCSchedModel::DefaultLoadLatency,
2025 MCSchedModel::DefaultHighLatency,
2026 20, // MispredictPenalty
2027 true, // PostRAScheduler
2028 true, // CompleteModel
2029 false, // EnableIntervals
2030 7, // Processor ID
2031 SIDPGFX942FullSpeedModelProcResources,
2032 SIDPGFX942FullSpeedModelSchedClasses,
2033 8,
2034 76,
2035 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2036 nullptr, // No Itinerary
2037 nullptr // No extra processor descriptor
2038};
2039
2040static const unsigned SIDPFullSpeedModelProcResourceSubUnits[] = {
2041 0, // Invalid
2042};
2043
2044// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2045static const llvm::MCProcResourceDesc SIDPFullSpeedModelProcResources[] = {
2046 {"InvalidUnit", 0, 0, 0, 0},
2047 {"HWBranch", 1, 0, 1, nullptr}, // #1
2048 {"HWExport", 1, 0, 1, nullptr}, // #2
2049 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2050 {"HWSALU", 1, 0, 1, nullptr}, // #4
2051 {"HWVALU", 1, 0, 1, nullptr}, // #5
2052 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2053 {"HWXDL", 1, 0, 0, nullptr}, // #7
2054};
2055
2056static const llvm::MCSchedModel SIDPFullSpeedModel = {
2057 1, // IssueWidth
2058 1, // MicroOpBufferSize
2059 MCSchedModel::DefaultLoopMicroOpBufferSize,
2060 MCSchedModel::DefaultLoadLatency,
2061 MCSchedModel::DefaultHighLatency,
2062 20, // MispredictPenalty
2063 true, // PostRAScheduler
2064 true, // CompleteModel
2065 false, // EnableIntervals
2066 8, // Processor ID
2067 SIDPFullSpeedModelProcResources,
2068 SIDPFullSpeedModelSchedClasses,
2069 8,
2070 76,
2071 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2072 nullptr, // No Itinerary
2073 nullptr // No extra processor descriptor
2074};
2075
2076static const unsigned SIDPGFX950FullSpeedModelProcResourceSubUnits[] = {
2077 0, // Invalid
2078};
2079
2080// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2081static const llvm::MCProcResourceDesc SIDPGFX950FullSpeedModelProcResources[] = {
2082 {"InvalidUnit", 0, 0, 0, 0},
2083 {"HWBranch", 1, 0, 1, nullptr}, // #1
2084 {"HWExport", 1, 0, 1, nullptr}, // #2
2085 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2086 {"HWSALU", 1, 0, 1, nullptr}, // #4
2087 {"HWVALU", 1, 0, 1, nullptr}, // #5
2088 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2089 {"HWXDL", 1, 0, 0, nullptr}, // #7
2090};
2091
2092static const llvm::MCSchedModel SIDPGFX950FullSpeedModel = {
2093 1, // IssueWidth
2094 1, // MicroOpBufferSize
2095 MCSchedModel::DefaultLoopMicroOpBufferSize,
2096 MCSchedModel::DefaultLoadLatency,
2097 MCSchedModel::DefaultHighLatency,
2098 20, // MispredictPenalty
2099 true, // PostRAScheduler
2100 true, // CompleteModel
2101 false, // EnableIntervals
2102 9, // Processor ID
2103 SIDPGFX950FullSpeedModelProcResources,
2104 SIDPGFX950FullSpeedModelSchedClasses,
2105 8,
2106 76,
2107 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2108 nullptr, // No Itinerary
2109 nullptr // No extra processor descriptor
2110};
2111
2112#undef DBGFIELD
2113
2114#undef DBGVAL_OR_NULLPTR
2115
2116// Sorted (by key) array of values for CPU subtype.
2117extern const llvm::SubtargetSubTypeKV AMDGPUSubTypeKV[] = {
2118 { "bonaire", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2119 { "carrizo", { { { 0x0ULL, 0x20000000ULL, 0x2008ULL, 0x1000100100000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2120 { "fiji", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x1000100000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2121 { "generic", { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
2122 { "generic-hsa", { { { 0x0ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
2123 { "gfx10-1-generic", { { { 0x4004000000000ULL, 0x2002000000100ULL, 0x4b8001016102ULL, 0x308000101a01002ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2124 { "gfx10-3-generic", { { { 0x9804004000000000ULL, 0x3a000000000013ULL, 0x10000002000ULL, 0x20000002ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2125 { "gfx1010", { { { 0x4004000000000ULL, 0x2002000000100ULL, 0x4b8001016102ULL, 0x308000101a01000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2126 { "gfx1011", { { { 0x9804004000000000ULL, 0x2002000000113ULL, 0x4b8001016102ULL, 0x308000101a01000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2127 { "gfx1012", { { { 0x9804004000000000ULL, 0x2002000000113ULL, 0x4b8001016102ULL, 0x308000101a01000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2128 { "gfx1013", { { { 0x4004000000000ULL, 0x12002000000100ULL, 0x4b8001016102ULL, 0x308000101a01000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2129 { "gfx1030", { { { 0x9804004000000000ULL, 0x3a000000000013ULL, 0x10000002000ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2130 { "gfx1031", { { { 0x9804004000000000ULL, 0x3a000000000013ULL, 0x10000002000ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2131 { "gfx1032", { { { 0x9804004000000000ULL, 0x3a000000000013ULL, 0x10000002000ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2132 { "gfx1033", { { { 0x9804004000000000ULL, 0x3a000000000013ULL, 0x10000002000ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2133 { "gfx1034", { { { 0x9804004000000000ULL, 0x3a000000000013ULL, 0x10000002000ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2134 { "gfx1035", { { { 0x9804004000000000ULL, 0x3a000000000013ULL, 0x10000002000ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2135 { "gfx1036", { { { 0x9804004000000000ULL, 0x3a000000000013ULL, 0x10000002000ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2136 { "gfx11-generic", { { { 0x8006004030008000ULL, 0x4000008000005eULL, 0xa103010200882040ULL, 0x8203000020000002ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2137 { "gfx1100", { { { 0x8006004030008001ULL, 0x4000008000005eULL, 0x2103010200882040ULL, 0x8203000020000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2138 { "gfx1101", { { { 0x8006004030008001ULL, 0x4000008000005eULL, 0x2103010200882040ULL, 0x8202000020000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2139 { "gfx1102", { { { 0x8006004030008000ULL, 0x4000008000005eULL, 0x2103010200882040ULL, 0x8203000020000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2140 { "gfx1103", { { { 0x8006004030008000ULL, 0x4000008000005eULL, 0x2103010200882040ULL, 0x8202000020000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2141 { "gfx1150", { { { 0x8086004030008000ULL, 0x4000008000005eULL, 0xa043010200002040ULL, 0x8200000020000008ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2142 { "gfx1151", { { { 0x8086004030008001ULL, 0x4000008000005eULL, 0xa043010200002040ULL, 0x8200000020000008ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2143 { "gfx1152", { { { 0x8086004030008000ULL, 0x4000008000005eULL, 0xa043010200002040ULL, 0x8200000020000008ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2144 { "gfx1153", { { { 0x8086004030008000ULL, 0x4000008000005eULL, 0xa003010200002040ULL, 0x8200000020000008ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2145 { "gfx1170", { { { 0x86004030008000ULL, 0x4000008080007eULL, 0x2003010200002040ULL, 0x4200000020000008ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2146 { "gfx12-generic", { { { 0x87a860f0a98401ULL, 0x10000008082007eULL, 0xc03010208022050ULL, 0x420000001044000eULL, 0x2ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2147 { "gfx1200", { { { 0x87a860f0a98401ULL, 0x10000008082007eULL, 0xc03010208022050ULL, 0x420000001044000cULL, 0x2ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2148 { "gfx1201", { { { 0x87a860f0a98401ULL, 0x10000008082007eULL, 0xc03010208022050ULL, 0x420000001044000cULL, 0x2ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2149 { "gfx1250", { { { 0x87eedcfcab915cULL, 0x8100014382800406ULL, 0xe1580271406a804ULL, 0x60000179c45000dULL, 0x49ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX1250SpeedModel },
2150 { "gfx1251", { { { 0x8feedcfcab915cULL, 0x8100014382800406ULL, 0xe1580271406a804ULL, 0x60000179445000dULL, 0x49ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX1250SpeedModel },
2151 { "gfx1310", { { { 0x85ea9cfcab8409ULL, 0x8400014080840006ULL, 0xe07010000022014ULL, 0x20000162045000cULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2152 { "gfx600", { { { 0x0ULL, 0x20000000ULL, 0x2008ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2153 { "gfx601", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2154 { "gfx602", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2155 { "gfx700", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2156 { "gfx701", { { { 0x0ULL, 0x20000000ULL, 0x2008ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2157 { "gfx702", { { { 0x0ULL, 0x20000000ULL, 0x1000ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2158 { "gfx703", { { { 0x0ULL, 0x0ULL, 0x1000ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2159 { "gfx704", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2160 { "gfx705", { { { 0x0ULL, 0x0ULL, 0x1000ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2161 { "gfx801", { { { 0x0ULL, 0x20000000ULL, 0x2008ULL, 0x1000100100000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2162 { "gfx802", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x1000100000000800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2163 { "gfx803", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x1000100000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2164 { "gfx805", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x1000100000000800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2165 { "gfx810", { { { 0x0ULL, 0x0ULL, 0x10a0ULL, 0x1000000100000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2166 { "gfx9-4-generic", { { { 0xf80c0040fc88a400ULL, 0x3000838180000013ULL, 0x21800200142800ULL, 0x80000003ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX942FullSpeedModel },
2167 { "gfx9-generic", { { { 0x400ULL, 0x900000020100ULL, 0x1002060ULL, 0x2ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2168 { "gfx900", { { { 0x400ULL, 0x900000020100ULL, 0x3002060ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2169 { "gfx902", { { { 0x400ULL, 0x900000020100ULL, 0x3002060ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2170 { "gfx904", { { { 0x400ULL, 0x908000020100ULL, 0x1002060ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2171 { "gfx906", { { { 0x1804000000000400ULL, 0x908000020112ULL, 0x1002068ULL, 0x80000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2172 { "gfx908", { { { 0xf804000010100400ULL, 0x908000020113ULL, 0x20000001302068ULL, 0x80000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2173 { "gfx909", { { { 0x400ULL, 0x900000020100ULL, 0x3002060ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2174 { "gfx90a", { { { 0xf80c00403c080400ULL, 0x1000838100000013ULL, 0x21800001102840ULL, 0x80000001ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPFullSpeedModel },
2175 { "gfx90c", { { { 0x400ULL, 0x900000020100ULL, 0x3002060ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2176 { "gfx942", { { { 0xf80c1040fc88a400ULL, 0x3000838184800013ULL, 0x21800200142800ULL, 0x80000001ULL, 0x20ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX942FullSpeedModel },
2177 { "gfx950", { { { 0xf80c00c6fca8a800ULL, 0x7000838185e000d3ULL, 0x221800200142800ULL, 0x80000001ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX950FullSpeedModel },
2178 { "hainan", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2179 { "hawaii", { { { 0x0ULL, 0x20000000ULL, 0x2008ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2180 { "iceland", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x1000100000000800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2181 { "kabini", { { { 0x0ULL, 0x0ULL, 0x1000ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2182 { "kaveri", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2183 { "mullins", { { { 0x0ULL, 0x0ULL, 0x1000ULL, 0x2000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2184 { "oland", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2185 { "pitcairn", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2186 { "polaris10", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x1000100000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2187 { "polaris11", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x1000100000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2188 { "stoney", { { { 0x0ULL, 0x0ULL, 0x10a0ULL, 0x1000000100000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2189 { "tahiti", { { { 0x0ULL, 0x20000000ULL, 0x2008ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2190 { "tonga", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x1000100000000800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2191 { "tongapro", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x1000100000000800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2192 { "verde", { { { 0x0ULL, 0x0ULL, 0x2000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2193};
2194
2195// Sorted array of names of CPU subtypes, including aliases.
2196extern const llvm::StringRef AMDGPUNames[] = {
2197"bonaire",
2198"carrizo",
2199"fiji",
2200"generic",
2201"generic-hsa",
2202"gfx10-1-generic",
2203"gfx10-3-generic",
2204"gfx1010",
2205"gfx1011",
2206"gfx1012",
2207"gfx1013",
2208"gfx1030",
2209"gfx1031",
2210"gfx1032",
2211"gfx1033",
2212"gfx1034",
2213"gfx1035",
2214"gfx1036",
2215"gfx11-generic",
2216"gfx1100",
2217"gfx1101",
2218"gfx1102",
2219"gfx1103",
2220"gfx1150",
2221"gfx1151",
2222"gfx1152",
2223"gfx1153",
2224"gfx1170",
2225"gfx12-generic",
2226"gfx1200",
2227"gfx1201",
2228"gfx1250",
2229"gfx1251",
2230"gfx1310",
2231"gfx600",
2232"gfx601",
2233"gfx602",
2234"gfx700",
2235"gfx701",
2236"gfx702",
2237"gfx703",
2238"gfx704",
2239"gfx705",
2240"gfx801",
2241"gfx802",
2242"gfx803",
2243"gfx805",
2244"gfx810",
2245"gfx9-4-generic",
2246"gfx9-generic",
2247"gfx900",
2248"gfx902",
2249"gfx904",
2250"gfx906",
2251"gfx908",
2252"gfx909",
2253"gfx90a",
2254"gfx90c",
2255"gfx942",
2256"gfx950",
2257"hainan",
2258"hawaii",
2259"iceland",
2260"kabini",
2261"kaveri",
2262"mullins",
2263"oland",
2264"pitcairn",
2265"polaris10",
2266"polaris11",
2267"stoney",
2268"tahiti",
2269"tonga",
2270"tongapro",
2271"verde"};
2272
2273namespace AMDGPU_MC {
2274
2275unsigned resolveVariantSchedClassImpl(unsigned SchedClass,
2276 const MCInst *MI, const MCInstrInfo *MCII, const MCSubtargetInfo &STI, unsigned CPUID) {
2277 switch (SchedClass) {
2278 case 34: // COPY
2279 if (CPUID == 1) { // SIQuarterSpeedModel
2280 return 68; // WriteSALU
2281 }
2282 if (CPUID == 2) { // GFX10SpeedModel
2283 return 68; // WriteSALU
2284 }
2285 if (CPUID == 3) { // GFX11SpeedModel
2286 return 68; // WriteSALU
2287 }
2288 if (CPUID == 4) { // GFX12SpeedModel
2289 return 68; // WriteSALU
2290 }
2291 if (CPUID == 5) { // GFX1250SpeedModel
2292 return 68; // WriteSALU
2293 }
2294 if (CPUID == 6) { // SIFullSpeedModel
2295 return 68; // WriteSALU
2296 }
2297 if (CPUID == 7) { // SIDPGFX942FullSpeedModel
2298 return 68; // WriteSALU
2299 }
2300 if (CPUID == 8) { // SIDPFullSpeedModel
2301 return 68; // WriteSALU
2302 }
2303 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2304 return 68; // WriteSALU
2305 }
2306 break;
2307 case 35: // V_ACCVGPR_WRITE_B32_e64
2308 if (CPUID == 1) { // SIQuarterSpeedModel
2309 return 70; // Write64Bit_ReadDefault
2310 }
2311 break;
2312 case 38: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi
2313 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2314 return 72; // Write8PassMAI_MIMFMARead
2315 }
2316 break;
2317 case 53: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2318 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2319 return 73; // Write4PassMAI_MIMFMARead
2320 }
2321 break;
2322 case 54: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2323 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2324 return 73; // Write4PassMAI_MIMFMARead
2325 }
2326 break;
2327 case 55: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd
2328 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2329 return 72; // Write8PassMAI_MIMFMARead
2330 }
2331 break;
2332 case 60: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr
2333 if (CPUID == 5) { // GFX1250SpeedModel
2334 return 75; // WriteXDL2PassWMMA
2335 }
2336 break;
2337 case 61: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250
2338 if (CPUID == 5) { // GFX1250SpeedModel
2339 return 75; // WriteXDL2PassWMMA
2340 }
2341 break;
2342 };
2343 // Don't know how to resolve this scheduling class.
2344 return 0;
2345}
2346
2347} // namespace AMDGPU_MC
2348struct AMDGPUGenMCSubtargetInfo : public MCSubtargetInfo {
2349 AMDGPUGenMCSubtargetInfo(const Triple &TT,
2350 StringRef CPU, StringRef TuneCPU, StringRef FS,
2351 ArrayRef<StringRef> PN,
2352 ArrayRef<SubtargetFeatureKV> PF,
2353 ArrayRef<SubtargetSubTypeKV> PD,
2354 const MCWriteProcResEntry *WPR,
2355 const MCWriteLatencyEntry *WL,
2356 const MCReadAdvanceEntry *RA, const InstrStage *IS,
2357 const unsigned *OC, const unsigned *FP) :
2358 MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD,
2359 WPR, WL, RA, IS, OC, FP) { }
2360
2361 unsigned resolveVariantSchedClass(unsigned SchedClass,
2362 const MCInst *MI, const MCInstrInfo *MCII,
2363 unsigned CPUID) const final {
2364 return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);
2365 }
2366 unsigned getHwModeSet() const final;
2367 unsigned getHwMode(enum HwModeType type = HwMode_Default) const final;
2368};
2369unsigned AMDGPUGenMCSubtargetInfo::getHwModeSet() const {
2370 [[maybe_unused]] const FeatureBitset &FB = getFeatureBits();
2371 // Collect HwModes and store them as a bit set.
2372 unsigned Modes = 0;
2373 if (FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs]) Modes |= (1 << 0);
2374 if (!FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs] && FB[AMDGPU::FeatureWavefrontSize32]) Modes |= (1 << 1);
2375 if (!FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs] && FB[AMDGPU::FeatureWavefrontSize64]) Modes |= (1 << 2);
2376 if ((FB[AMDGPU::FeatureWavefrontSize32] || FB[AMDGPU::FeatureAssemblerPermissiveWavesize]) && !FB[AMDGPU::FeatureRequiresAlignedVGPRs]) Modes |= (1 << 3);
2377 return Modes;
2378}
2379unsigned AMDGPUGenMCSubtargetInfo::getHwMode(enum HwModeType type) const {
2380 unsigned Modes = getHwModeSet();
2381
2382 if (!Modes)
2383 return Modes;
2384
2385 switch (type) {
2386 case HwMode_Default:
2387 return llvm::countr_zero(Modes) + 1;
2388 case HwMode_ValueType:
2389 Modes &= 15;
2390 if (!Modes)
2391 return Modes;
2392 if (!llvm::has_single_bit<unsigned>(Modes))
2393 llvm_unreachable("Two or more HwModes for ValueType were found!");
2394 return llvm::countr_zero(Modes) + 1;
2395 case HwMode_RegInfo:
2396 Modes &= 15;
2397 if (!Modes)
2398 return Modes;
2399 if (!llvm::has_single_bit<unsigned>(Modes))
2400 llvm_unreachable("Two or more HwModes for RegInfo were found!");
2401 return llvm::countr_zero(Modes) + 1;
2402 case HwMode_EncodingInfo:
2403 Modes &= 0;
2404 if (!Modes)
2405 return Modes;
2406 if (!llvm::has_single_bit<unsigned>(Modes))
2407 llvm_unreachable("Two or more HwModes for EncodingInfo were found!");
2408 return llvm::countr_zero(Modes) + 1;
2409 }
2410 llvm_unreachable("unexpected HwModeType");
2411 return 0; // should not get here
2412}
2413
2414static inline MCSubtargetInfo *createAMDGPUMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS) {
2415 return new AMDGPUGenMCSubtargetInfo(TT, CPU, TuneCPU, FS, AMDGPUNames, AMDGPUFeatureKV, AMDGPUSubTypeKV,
2416 AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable,
2417 nullptr, nullptr, nullptr);
2418}
2419
2420
2421} // namespace llvm
2422
2423#endif // GET_SUBTARGETINFO_MC_DESC
2424
2425#ifdef GET_SUBTARGETINFO_TARGET_DESC
2426#undef GET_SUBTARGETINFO_TARGET_DESC
2427
2428#include "llvm/ADT/BitmaskEnum.h"
2429#include "llvm/Support/Debug.h"
2430#include "llvm/Support/raw_ostream.h"
2431
2432// ParseSubtargetFeatures - Parses features string setting specified
2433// subtarget options.
2434void llvm::AMDGPUSubtarget::ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS) {
2435 LLVM_DEBUG(dbgs() << "\nFeatures:" << FS);
2436 LLVM_DEBUG(dbgs() << "\nCPU:" << CPU);
2437 LLVM_DEBUG(dbgs() << "\nTuneCPU:" << TuneCPU << "\n\n");
2438 InitMCProcessorInfo(CPU, TuneCPU, FS);
2439 const FeatureBitset &Bits = getFeatureBits();
2440 if (Bits[AMDGPU::Feature1_5xVGPRs]) Has1_5xVGPRs = true;
2441 if (Bits[AMDGPU::Feature16BitInsts]) Has16BitInsts = true;
2442 if (Bits[AMDGPU::Feature45BitNumRecordsBufferResource]) Has45BitNumRecordsBufferResource = true;
2443 if (Bits[AMDGPU::Feature64BitLiterals]) Has64BitLiterals = true;
2444 if (Bits[AMDGPU::Feature1024AddressableVGPRs]) Has1024AddressableVGPRs = true;
2445 if (Bits[AMDGPU::FeatureA16]) HasA16 = true;
2446 if (Bits[AMDGPU::FeatureAddMinMaxInsts]) HasAddMinMaxInsts = true;
2447 if (Bits[AMDGPU::FeatureAddNoCarryInsts]) HasAddNoCarryInsts = true;
2448 if (Bits[AMDGPU::FeatureAddSubU64Insts]) HasAddSubU64Insts = true;
2449 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize32768] && AddressableLocalMemorySize < 32768) AddressableLocalMemorySize = 32768;
2450 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize65536] && AddressableLocalMemorySize < 65536) AddressableLocalMemorySize = 65536;
2451 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize163840] && AddressableLocalMemorySize < 163840) AddressableLocalMemorySize = 163840;
2452 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize327680] && AddressableLocalMemorySize < 327680) AddressableLocalMemorySize = 327680;
2453 if (Bits[AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics]) HasAgentScopeFineGrainedRemoteMemoryAtomics = true;
2454 if (Bits[AMDGPU::FeatureApertureRegs]) HasApertureRegs = true;
2455 if (Bits[AMDGPU::FeatureArchitectedFlatScratch]) HasArchitectedFlatScratch = true;
2456 if (Bits[AMDGPU::FeatureArchitectedSGPRs]) HasArchitectedSGPRs = true;
2457 if (Bits[AMDGPU::FeatureAshrPkInsts]) HasAshrPkInsts = true;
2458 if (Bits[AMDGPU::FeatureAssemblerPermissiveWavesize]) HasAssemblerPermissiveWavesize = true;
2459 if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts]) HasAtomicBufferGlobalPkAddF16Insts = true;
2460 if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts]) HasAtomicBufferGlobalPkAddF16NoRtnInsts = true;
2461 if (Bits[AMDGPU::FeatureAtomicBufferPkAddBF16Inst]) HasAtomicBufferPkAddBF16Inst = true;
2462 if (Bits[AMDGPU::FeatureAtomicCSubNoRtnInsts]) HasAtomicCSubNoRtnInsts = true;
2463 if (Bits[AMDGPU::FeatureAtomicDsPkAdd16Insts]) HasAtomicDsPkAdd16Insts = true;
2464 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts]) HasAtomicFMinFMaxF32FlatInsts = true;
2465 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts]) HasAtomicFMinFMaxF32GlobalInsts = true;
2466 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts]) HasAtomicFMinFMaxF64FlatInsts = true;
2467 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts]) HasAtomicFMinFMaxF64GlobalInsts = true;
2468 if (Bits[AMDGPU::FeatureAtomicFaddNoRtnInsts]) HasAtomicFaddNoRtnInsts = true;
2469 if (Bits[AMDGPU::FeatureAtomicFaddRtnInsts]) HasAtomicFaddRtnInsts = true;
2470 if (Bits[AMDGPU::FeatureAtomicFlatPkAdd16Insts]) HasAtomicFlatPkAdd16Insts = true;
2471 if (Bits[AMDGPU::FeatureAtomicGlobalPkAddBF16Inst]) HasAtomicGlobalPkAddBF16Inst = true;
2472 if (Bits[AMDGPU::FeatureAutoWaitcntBeforeBarrier]) HasAutoWaitcntBeforeBarrier = true;
2473 if (Bits[AMDGPU::FeatureBF8ConversionScaleInsts]) HasBF8ConversionScaleInsts = true;
2474 if (Bits[AMDGPU::FeatureBF16ConversionInsts]) HasBF16ConversionInsts = true;
2475 if (Bits[AMDGPU::FeatureBF16PackedInsts]) HasBF16PackedInsts = true;
2476 if (Bits[AMDGPU::FeatureBF16TransInsts]) HasBF16TransInsts = true;
2477 if (Bits[AMDGPU::FeatureBVHDualAndBVH8Insts]) HasBVHDualAndBVH8Insts = true;
2478 if (Bits[AMDGPU::FeatureBackOffBarrier]) HasBackOffBarrier = true;
2479 if (Bits[AMDGPU::FeatureBitOp3Insts]) HasBitOp3Insts = true;
2480 if (Bits[AMDGPU::FeatureCIInsts]) HasCIInsts = true;
2481 if (Bits[AMDGPU::FeatureClusters]) HasClusters = true;
2482 if (Bits[AMDGPU::FeatureCuMode]) EnableCuMode = true;
2483 if (Bits[AMDGPU::FeatureCubeInsts]) HasCubeInsts = true;
2484 if (Bits[AMDGPU::FeatureCvtFP8VOP1Bug]) HasCvtFP8VOP1Bug = true;
2485 if (Bits[AMDGPU::FeatureCvtNormInsts]) HasCvtNormInsts = true;
2486 if (Bits[AMDGPU::FeatureCvtPkF16F32Inst]) HasCvtPkF16F32Inst = true;
2487 if (Bits[AMDGPU::FeatureCvtPkNormVOP2Insts]) HasCvtPkNormVOP2Insts = true;
2488 if (Bits[AMDGPU::FeatureCvtPkNormVOP3Insts]) HasCvtPkNormVOP3Insts = true;
2489 if (Bits[AMDGPU::FeatureD16Writes32BitVgpr]) HasD16Writes32BitVgpr = true;
2490 if (Bits[AMDGPU::FeatureDLInsts]) HasDLInsts = true;
2491 if (Bits[AMDGPU::FeatureDPALU_DPP]) HasDPALU_DPP = true;
2492 if (Bits[AMDGPU::FeatureDPP]) HasDPP = true;
2493 if (Bits[AMDGPU::FeatureDPP8]) HasDPP8 = true;
2494 if (Bits[AMDGPU::FeatureDPPBroadcasts]) HasDPPBroadcasts = true;
2495 if (Bits[AMDGPU::FeatureDPPSrc1SGPR]) HasDPPSrc1SGPR = true;
2496 if (Bits[AMDGPU::FeatureDPPWavefrontShifts]) HasDPPWavefrontShifts = true;
2497 if (Bits[AMDGPU::FeatureDefaultComponentBroadcast]) HasDefaultComponentBroadcast = true;
2498 if (Bits[AMDGPU::FeatureDefaultComponentZero]) HasDefaultComponentZero = true;
2499 if (Bits[AMDGPU::FeatureDot1Insts]) HasDot1Insts = true;
2500 if (Bits[AMDGPU::FeatureDot2Insts]) HasDot2Insts = true;
2501 if (Bits[AMDGPU::FeatureDot3Insts]) HasDot3Insts = true;
2502 if (Bits[AMDGPU::FeatureDot4Insts]) HasDot4Insts = true;
2503 if (Bits[AMDGPU::FeatureDot5Insts]) HasDot5Insts = true;
2504 if (Bits[AMDGPU::FeatureDot6Insts]) HasDot6Insts = true;
2505 if (Bits[AMDGPU::FeatureDot7Insts]) HasDot7Insts = true;
2506 if (Bits[AMDGPU::FeatureDot8Insts]) HasDot8Insts = true;
2507 if (Bits[AMDGPU::FeatureDot9Insts]) HasDot9Insts = true;
2508 if (Bits[AMDGPU::FeatureDot10Insts]) HasDot10Insts = true;
2509 if (Bits[AMDGPU::FeatureDot11Insts]) HasDot11Insts = true;
2510 if (Bits[AMDGPU::FeatureDot12Insts]) HasDot12Insts = true;
2511 if (Bits[AMDGPU::FeatureDot13Insts]) HasDot13Insts = true;
2512 if (Bits[AMDGPU::FeatureDsSrc2Insts]) HasDsSrc2Insts = true;
2513 if (Bits[AMDGPU::FeatureDumpCodeLower]) DumpCode = true;
2514 if (Bits[AMDGPU::FeatureEmulatedSystemScopeAtomics]) HasEmulatedSystemScopeAtomics = true;
2515 if (Bits[AMDGPU::FeatureEnableDS128]) EnableDS128 = true;
2516 if (Bits[AMDGPU::FeatureEnableFlatScratch]) EnableFlatScratch = true;
2517 if (Bits[AMDGPU::FeatureEnableLoadStoreOpt]) EnableLoadStoreOpt = true;
2518 if (Bits[AMDGPU::FeatureEnablePRTStrictNull]) EnablePRTStrictNull = true;
2519 if (Bits[AMDGPU::FeatureEnableSIScheduler]) EnableSIScheduler = true;
2520 if (Bits[AMDGPU::FeatureEnableUnsafeDSOffsetFolding]) EnableUnsafeDSOffsetFolding = true;
2521 if (Bits[AMDGPU::FeatureExtendedImageInsts]) HasExtendedImageInsts = true;
2522 if (Bits[AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts]) HasF16BF16ToFP6BF6ConversionScaleInsts = true;
2523 if (Bits[AMDGPU::FeatureF32ToF16BF16ConversionSRInsts]) HasF32ToF16BF16ConversionSRInsts = true;
2524 if (Bits[AMDGPU::FeatureFMA]) HasFMA = true;
2525 if (Bits[AMDGPU::FeatureFP4ConversionScaleInsts]) HasFP4ConversionScaleInsts = true;
2526 if (Bits[AMDGPU::FeatureFP6BF6ConversionScaleInsts]) HasFP6BF6ConversionScaleInsts = true;
2527 if (Bits[AMDGPU::FeatureFP8ConversionInsts]) HasFP8ConversionInsts = true;
2528 if (Bits[AMDGPU::FeatureFP8ConversionScaleInsts]) HasFP8ConversionScaleInsts = true;
2529 if (Bits[AMDGPU::FeatureFP8E5M3Insts]) HasFP8E5M3Insts = true;
2530 if (Bits[AMDGPU::FeatureFP8Insts]) HasFP8Insts = true;
2531 if (Bits[AMDGPU::FeatureFP64]) HasFP64 = true;
2532 if (Bits[AMDGPU::FeatureFastDenormalF32]) HasFastDenormalF32 = true;
2533 if (Bits[AMDGPU::FeatureFastFMAF32]) HasFastFMAF32 = true;
2534 if (Bits[AMDGPU::FeatureFlatAddressSpace]) HasFlatAddressSpace = true;
2535 if (Bits[AMDGPU::FeatureFlatAtomicFaddF32Inst]) HasFlatAtomicFaddF32Inst = true;
2536 if (Bits[AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst]) HasFlatBufferGlobalAtomicFaddF64Inst = true;
2537 if (Bits[AMDGPU::FeatureFlatGVSMode]) HasFlatGVSMode = true;
2538 if (Bits[AMDGPU::FeatureFlatGlobalInsts]) HasFlatGlobalInsts = true;
2539 if (Bits[AMDGPU::FeatureFlatInstOffsets]) HasFlatInstOffsets = true;
2540 if (Bits[AMDGPU::FeatureFlatScratchInsts]) HasFlatScratchInsts = true;
2541 if (Bits[AMDGPU::FeatureFlatSegmentOffsetBug]) HasFlatSegmentOffsetBug = true;
2542 if (Bits[AMDGPU::FeatureFmaMixBF16Insts]) HasFmaMixBF16Insts = true;
2543 if (Bits[AMDGPU::FeatureFmaMixInsts]) HasFmaMixInsts = true;
2544 if (Bits[AMDGPU::FeatureFmacF64Inst]) HasFmacF64Inst = true;
2545 if (Bits[AMDGPU::FeatureFullRate64Ops]) HasFullRate64Ops = true;
2546 if (Bits[AMDGPU::FeatureG16]) HasG16 = true;
2547 if (Bits[AMDGPU::FeatureGCN3Encoding]) HasGCN3Encoding = true;
2548 if (Bits[AMDGPU::FeatureGDS]) HasGDS = true;
2549 if (Bits[AMDGPU::FeatureGFX7GFX8GFX9Insts]) HasGFX7GFX8GFX9Insts = true;
2550 if (Bits[AMDGPU::FeatureGFX8Insts]) HasGFX8Insts = true;
2551 if (Bits[AMDGPU::FeatureGFX9] && Gen < GCNSubtarget::GFX9) Gen = GCNSubtarget::GFX9;
2552 if (Bits[AMDGPU::FeatureGFX9Insts]) HasGFX9Insts = true;
2553 if (Bits[AMDGPU::FeatureGFX10] && Gen < GCNSubtarget::GFX10) Gen = GCNSubtarget::GFX10;
2554 if (Bits[AMDGPU::FeatureGFX10Insts]) HasGFX10Insts = true;
2555 if (Bits[AMDGPU::FeatureGFX10_3Insts]) HasGFX10_3Insts = true;
2556 if (Bits[AMDGPU::FeatureGFX10_AEncoding]) HasGFX10_AEncoding = true;
2557 if (Bits[AMDGPU::FeatureGFX10_BEncoding]) HasGFX10_BEncoding = true;
2558 if (Bits[AMDGPU::FeatureGFX11] && Gen < GCNSubtarget::GFX11) Gen = GCNSubtarget::GFX11;
2559 if (Bits[AMDGPU::FeatureGFX11Insts]) HasGFX11Insts = true;
2560 if (Bits[AMDGPU::FeatureGFX12] && Gen < GCNSubtarget::GFX12) Gen = GCNSubtarget::GFX12;
2561 if (Bits[AMDGPU::FeatureGFX12Insts]) HasGFX12Insts = true;
2562 if (Bits[AMDGPU::FeatureGFX13] && Gen < GCNSubtarget::GFX13) Gen = GCNSubtarget::GFX13;
2563 if (Bits[AMDGPU::FeatureGFX13Insts]) HasGFX13Insts = true;
2564 if (Bits[AMDGPU::FeatureGFX90AInsts]) HasGFX90AInsts = true;
2565 if (Bits[AMDGPU::FeatureGFX940Insts]) HasGFX940Insts = true;
2566 if (Bits[AMDGPU::FeatureGFX950Insts]) HasGFX950Insts = true;
2567 if (Bits[AMDGPU::FeatureGFX1250Insts]) HasGFX1250Insts = true;
2568 if (Bits[AMDGPU::FeatureGWS]) HasGWS = true;
2569 if (Bits[AMDGPU::FeatureGetWaveIdInst]) HasGetWaveIdInst = true;
2570 if (Bits[AMDGPU::FeatureGloballyAddressableScratch]) HasGloballyAddressableScratch = true;
2571 if (Bits[AMDGPU::FeatureHalfRate64Ops]) HasHalfRate64Ops = true;
2572 if (Bits[AMDGPU::FeatureIEEEMinimumMaximumInsts]) HasIEEEMinimumMaximumInsts = true;
2573 if (Bits[AMDGPU::FeatureImageGather4D16Bug]) HasImageGather4D16Bug = true;
2574 if (Bits[AMDGPU::FeatureImageInsts]) HasImageInsts = true;
2575 if (Bits[AMDGPU::FeatureImageStoreD16Bug]) HasImageStoreD16Bug = true;
2576 if (Bits[AMDGPU::FeatureInstFwdPrefetchBug]) HasInstFwdPrefetchBug = true;
2577 if (Bits[AMDGPU::FeatureIntClamp]) HasIntClamp = true;
2578 if (Bits[AMDGPU::FeatureInv2PiInlineImm]) HasInv2PiInlineImm = true;
2579 if (Bits[AMDGPU::FeatureKernargPreload]) HasKernargPreload = true;
2580 if (Bits[AMDGPU::FeatureLDSBankCount16] && LDSBankCount < 16) LDSBankCount = 16;
2581 if (Bits[AMDGPU::FeatureLDSBankCount32] && LDSBankCount < 32) LDSBankCount = 32;
2582 if (Bits[AMDGPU::FeatureLDSMisalignedBug]) HasLDSMisalignedBug = true;
2583 if (Bits[AMDGPU::FeatureLdsBarrierArriveAtomic]) HasLdsBarrierArriveAtomic = true;
2584 if (Bits[AMDGPU::FeatureLdsBranchVmemWARHazard]) HasLdsBranchVmemWARHazard = true;
2585 if (Bits[AMDGPU::FeatureLerpInst]) HasLerpInst = true;
2586 if (Bits[AMDGPU::FeatureLshlAddU64Inst]) HasLshlAddU64Inst = true;
2587 if (Bits[AMDGPU::FeatureMADIntraFwdBug]) HasMADIntraFwdBug = true;
2588 if (Bits[AMDGPU::FeatureMAIInsts]) HasMAIInsts = true;
2589 if (Bits[AMDGPU::FeatureMFMAInlineLiteralBug]) HasMFMAInlineLiteralBug = true;
2590 if (Bits[AMDGPU::FeatureMIMG_R128]) HasMIMG_R128 = true;
2591 if (Bits[AMDGPU::FeatureMSAALoadDstSelBug]) HasMSAALoadDstSelBug = true;
2592 if (Bits[AMDGPU::FeatureMadMacF32Insts]) HasMadMacF32Insts = true;
2593 if (Bits[AMDGPU::FeatureMadMixInsts]) HasMadMixInsts = true;
2594 if (Bits[AMDGPU::FeatureMadU32Inst]) HasMadU32Inst = true;
2595 if (Bits[AMDGPU::FeatureMaxHardClauseLength32] && MaxHardClauseLength < 32) MaxHardClauseLength = 32;
2596 if (Bits[AMDGPU::FeatureMaxHardClauseLength63] && MaxHardClauseLength < 63) MaxHardClauseLength = 63;
2597 if (Bits[AMDGPU::FeatureMaxPrivateElementSize4] && MaxPrivateElementSize < 4) MaxPrivateElementSize = 4;
2598 if (Bits[AMDGPU::FeatureMaxPrivateElementSize8] && MaxPrivateElementSize < 8) MaxPrivateElementSize = 8;
2599 if (Bits[AMDGPU::FeatureMaxPrivateElementSize16] && MaxPrivateElementSize < 16) MaxPrivateElementSize = 16;
2600 if (Bits[AMDGPU::FeatureMcastLoadInsts]) HasMcastLoadInsts = true;
2601 if (Bits[AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport]) HasMemoryAtomicFaddF32DenormalSupport = true;
2602 if (Bits[AMDGPU::FeatureMin3Max3PKF16]) HasMin3Max3PKF16 = true;
2603 if (Bits[AMDGPU::FeatureMinimum3Maximum3F16]) HasMinimum3Maximum3F16 = true;
2604 if (Bits[AMDGPU::FeatureMinimum3Maximum3F32]) HasMinimum3Maximum3F32 = true;
2605 if (Bits[AMDGPU::FeatureMinimum3Maximum3PKF16]) HasMinimum3Maximum3PKF16 = true;
2606 if (Bits[AMDGPU::FeatureMovrel]) HasMovrel = true;
2607 if (Bits[AMDGPU::FeatureNSAClauseBug]) HasNSAClauseBug = true;
2608 if (Bits[AMDGPU::FeatureNSAEncoding]) HasNSAEncoding = true;
2609 if (Bits[AMDGPU::FeatureNSAtoVMEMBug]) HasNSAtoVMEMBug = true;
2610 if (Bits[AMDGPU::FeatureNegativeScratchOffsetBug]) HasNegativeScratchOffsetBug = true;
2611 if (Bits[AMDGPU::FeatureNegativeUnalignedScratchOffsetBug]) HasNegativeUnalignedScratchOffsetBug = true;
2612 if (Bits[AMDGPU::FeatureNoDataDepHazard]) HasNoDataDepHazard = true;
2613 if (Bits[AMDGPU::FeatureNoSdstCMPX]) HasNoSdstCMPX = true;
2614 if (Bits[AMDGPU::FeatureOffset3fBug]) HasOffset3fBug = true;
2615 if (Bits[AMDGPU::FeaturePackedFP32Ops]) HasPackedFP32Ops = true;
2616 if (Bits[AMDGPU::FeaturePackedTID]) HasPackedTID = true;
2617 if (Bits[AMDGPU::FeaturePartialNSAEncoding]) HasPartialNSAEncoding = true;
2618 if (Bits[AMDGPU::FeaturePermlane16Swap]) HasPermlane16Swap = true;
2619 if (Bits[AMDGPU::FeaturePermlane32Swap]) HasPermlane32Swap = true;
2620 if (Bits[AMDGPU::FeaturePkAddMinMaxInsts]) HasPkAddMinMaxInsts = true;
2621 if (Bits[AMDGPU::FeaturePkFmacF16Inst]) HasPkFmacF16Inst = true;
2622 if (Bits[AMDGPU::FeaturePointSampleAccel]) HasPointSampleAccel = true;
2623 if (Bits[AMDGPU::FeaturePreciseMemory]) EnablePreciseMemory = true;
2624 if (Bits[AMDGPU::FeaturePrivEnabledTrap2NopBug]) HasPrivEnabledTrap2NopBug = true;
2625 if (Bits[AMDGPU::FeaturePrngInst]) HasPrngInst = true;
2626 if (Bits[AMDGPU::FeaturePseudoScalarTrans]) HasPseudoScalarTrans = true;
2627 if (Bits[AMDGPU::FeatureQsadInsts]) HasQsadInsts = true;
2628 if (Bits[AMDGPU::FeatureR128A16]) HasR128A16 = true;
2629 if (Bits[AMDGPU::FeatureRealTrue16Insts]) EnableRealTrue16Insts = true;
2630 if (Bits[AMDGPU::FeatureRelaxedBufferOOBMode]) HasRelaxedBufferOOBMode = true;
2631 if (Bits[AMDGPU::FeatureRequiredExportPriority]) HasRequiredExportPriority = true;
2632 if (Bits[AMDGPU::FeatureRequiresAlignedVGPRs]) RequiresAlignVGPR = true;
2633 if (Bits[AMDGPU::FeatureRequiresCOV6]) RequiresCOV6 = true;
2634 if (Bits[AMDGPU::FeatureRestrictedSOffset]) HasRestrictedSOffset = true;
2635 if (Bits[AMDGPU::FeatureSALUFloatInsts]) HasSALUFloatInsts = true;
2636 if (Bits[AMDGPU::FeatureSBarrierLeaveImm]) HasSBarrierLeaveImm = true;
2637 if (Bits[AMDGPU::FeatureSDWA]) HasSDWA = true;
2638 if (Bits[AMDGPU::FeatureSDWAMac]) HasSDWAMac = true;
2639 if (Bits[AMDGPU::FeatureSDWAOmod]) HasSDWAOmod = true;
2640 if (Bits[AMDGPU::FeatureSDWAOutModsVOPC]) HasSDWAOutModsVOPC = true;
2641 if (Bits[AMDGPU::FeatureSDWAScalar]) HasSDWAScalar = true;
2642 if (Bits[AMDGPU::FeatureSDWASdst]) HasSDWASdst = true;
2643 if (Bits[AMDGPU::FeatureSGPRInitBug]) HasSGPRInitBug = true;
2644 if (Bits[AMDGPU::FeatureSMEMtoVectorWriteHazard]) HasSMEMtoVectorWriteHazard = true;
2645 if (Bits[AMDGPU::FeatureSMemRealTime]) HasSMemRealTime = true;
2646 if (Bits[AMDGPU::FeatureSMemTimeInst]) HasSMemTimeInst = true;
2647 if (Bits[AMDGPU::FeatureSRAMECC]) EnableSRAMECC = true;
2648 if (Bits[AMDGPU::FeatureSWakeupBarrier]) HasSWakeupBarrier = true;
2649 if (Bits[AMDGPU::FeatureSWakeupImm]) HasSWakeupImm = true;
2650 if (Bits[AMDGPU::FeatureSadInsts]) HasSadInsts = true;
2651 if (Bits[AMDGPU::FeatureSafeCUPrefetch]) HasSafeCUPrefetch = true;
2652 if (Bits[AMDGPU::FeatureSafeSmemPrefetch]) HasSafeSmemPrefetch = true;
2653 if (Bits[AMDGPU::FeatureScalarAtomics]) HasScalarAtomics = true;
2654 if (Bits[AMDGPU::FeatureScalarDwordx3Loads]) HasScalarDwordx3Loads = true;
2655 if (Bits[AMDGPU::FeatureScalarFlatScratchInsts]) HasScalarFlatScratchInsts = true;
2656 if (Bits[AMDGPU::FeatureScalarStores]) HasScalarStores = true;
2657 if (Bits[AMDGPU::FeatureSeaIslands] && Gen < GCNSubtarget::SEA_ISLANDS) Gen = GCNSubtarget::SEA_ISLANDS;
2658 if (Bits[AMDGPU::FeatureSetPrioIncWgInst]) HasSetPrioIncWgInst = true;
2659 if (Bits[AMDGPU::FeatureSetregVGPRMSBFixup]) HasSetregVGPRMSBFixup = true;
2660 if (Bits[AMDGPU::FeatureShaderCyclesHiLoRegisters]) HasShaderCyclesHiLoRegisters = true;
2661 if (Bits[AMDGPU::FeatureShaderCyclesRegister]) HasShaderCyclesRegister = true;
2662 if (Bits[AMDGPU::FeatureSouthernIslands] && Gen < GCNSubtarget::SOUTHERN_ISLANDS) Gen = GCNSubtarget::SOUTHERN_ISLANDS;
2663 if (Bits[AMDGPU::FeatureSupportsSRAMECC]) SupportsSRAMECC = true;
2664 if (Bits[AMDGPU::FeatureSupportsXNACK]) SupportsXNACK = true;
2665 if (Bits[AMDGPU::FeatureTanhInsts]) HasTanhInsts = true;
2666 if (Bits[AMDGPU::FeatureTensorCvtLutInsts]) HasTensorCvtLutInsts = true;
2667 if (Bits[AMDGPU::FeatureTgSplit]) EnableTgSplit = true;
2668 if (Bits[AMDGPU::FeatureTransposeLoadF4F6Insts]) HasTransposeLoadF4F6Insts = true;
2669 if (Bits[AMDGPU::FeatureTrapHandler]) HasTrapHandler = true;
2670 if (Bits[AMDGPU::FeatureTrigReducedRange]) HasTrigReducedRange = true;
2671 if (Bits[AMDGPU::FeatureTrue16BitInsts]) HasTrue16BitInsts = true;
2672 if (Bits[AMDGPU::FeatureUnalignedAccessMode]) HasUnalignedAccessMode = true;
2673 if (Bits[AMDGPU::FeatureUnalignedBufferAccess]) HasUnalignedBufferAccess = true;
2674 if (Bits[AMDGPU::FeatureUnalignedDSAccess]) HasUnalignedDSAccess = true;
2675 if (Bits[AMDGPU::FeatureUnalignedScratchAccess]) HasUnalignedScratchAccess = true;
2676 if (Bits[AMDGPU::FeatureUnpackedD16VMem]) HasUnpackedD16VMem = true;
2677 if (Bits[AMDGPU::FeatureUseAddPC64Inst]) UseAddPC64Inst = true;
2678 if (Bits[AMDGPU::FeatureUseBlockVGPROpsForCSR]) UseBlockVGPROpsForCSR = true;
2679 if (Bits[AMDGPU::FeatureUseFlatForGlobal]) UseFlatForGlobal = true;
2680 if (Bits[AMDGPU::FeatureUserSGPRInit16Bug]) HasUserSGPRInit16Bug = true;
2681 if (Bits[AMDGPU::FeatureVALUTransUseHazard]) HasVALUTransUseHazard = true;
2682 if (Bits[AMDGPU::FeatureVGPRIndexMode]) HasVGPRIndexMode = true;
2683 if (Bits[AMDGPU::FeatureVMEMtoScalarWriteHazard]) HasVMEMtoScalarWriteHazard = true;
2684 if (Bits[AMDGPU::FeatureVMemToLDSLoad]) HasVMemToLDSLoad = true;
2685 if (Bits[AMDGPU::FeatureVOP3Literal]) HasVOP3Literal = true;
2686 if (Bits[AMDGPU::FeatureVOP3PInsts]) HasVOP3PInsts = true;
2687 if (Bits[AMDGPU::FeatureVOPDInsts]) HasVOPDInsts = true;
2688 if (Bits[AMDGPU::FeatureVcmpxExecWARHazard]) HasVcmpxExecWARHazard = true;
2689 if (Bits[AMDGPU::FeatureVcmpxPermlaneHazard]) HasVcmpxPermlaneHazard = true;
2690 if (Bits[AMDGPU::FeatureVmemPrefInsts]) HasVmemPrefInsts = true;
2691 if (Bits[AMDGPU::FeatureVmemWriteVgprInOrder]) HasVmemWriteVgprInOrder = true;
2692 if (Bits[AMDGPU::FeatureVolcanicIslands] && Gen < GCNSubtarget::VOLCANIC_ISLANDS) Gen = GCNSubtarget::VOLCANIC_ISLANDS;
2693 if (Bits[AMDGPU::FeatureVscnt]) HasVscnt = true;
2694 if (Bits[AMDGPU::FeatureWMMA128bInsts]) HasWMMA128bInsts = true;
2695 if (Bits[AMDGPU::FeatureWMMA256bInsts]) HasWMMA256bInsts = true;
2696 if (Bits[AMDGPU::FeatureWaitXcnt]) HasWaitXcnt = true;
2697 if (Bits[AMDGPU::FeatureWaitsBeforeSystemScopeStores]) RequiresWaitsBeforeSystemScopeStores = true;
2698 if (Bits[AMDGPU::FeatureWavefrontSize16] && WavefrontSizeLog2 < 4) WavefrontSizeLog2 = 4;
2699 if (Bits[AMDGPU::FeatureWavefrontSize32] && WavefrontSizeLog2 < 5) WavefrontSizeLog2 = 5;
2700 if (Bits[AMDGPU::FeatureWavefrontSize64] && WavefrontSizeLog2 < 6) WavefrontSizeLog2 = 6;
2701 if (Bits[AMDGPU::FeatureXF32Insts]) HasXF32Insts = true;
2702 if (Bits[AMDGPU::FeatureXNACK]) EnableXNACK = true;
2703}
2704
2705#endif // GET_SUBTARGETINFO_TARGET_DESC
2706
2707#ifdef GET_SUBTARGETINFO_HEADER
2708#undef GET_SUBTARGETINFO_HEADER
2709
2710namespace llvm {
2711
2712class DFAPacketizer;
2713namespace AMDGPU_MC {
2714
2715unsigned resolveVariantSchedClassImpl(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, const MCSubtargetInfo &STI, unsigned CPUID);
2716
2717} // namespace AMDGPU_MC
2718struct AMDGPUGenSubtargetInfo : public TargetSubtargetInfo {
2719 explicit AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS);
2720public:
2721 unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *DefMI, const TargetSchedModel *SchedModel) const final;
2722 unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const final;
2723 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
2724 enum class AMDGPUHwModeBits : unsigned {
2725 DefaultMode = 0,
2726 AVAlign2LoadStoreMode = (1 << 0),
2727 AlignedVGPRNoAGPRMode_Wave32 = (1 << 1),
2728 AlignedVGPRNoAGPRMode_Wave64 = (1 << 2),
2729 anonymous_14593 = (1 << 3),
2730
2731 LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/anonymous_14593),
2732 };
2733 unsigned getHwModeSet() const final;
2734 unsigned getHwMode(enum HwModeType type = HwMode_Default) const final;
2735};
2736
2737} // namespace llvm
2738
2739#endif // GET_SUBTARGETINFO_HEADER
2740
2741#ifdef GET_SUBTARGETINFO_CTOR
2742#undef GET_SUBTARGETINFO_CTOR
2743
2744#include "llvm/CodeGen/TargetSchedule.h"
2745
2746namespace llvm {
2747
2748extern const llvm::StringRef AMDGPUNames[];
2749extern const llvm::SubtargetFeatureKV AMDGPUFeatureKV[];
2750extern const llvm::SubtargetSubTypeKV AMDGPUSubTypeKV[];
2751extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[];
2752extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[];
2753extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[];
2754AMDGPUGenSubtargetInfo::AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS)
2755 : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, ArrayRef(AMDGPUNames, 75), ArrayRef(AMDGPUFeatureKV, 263), ArrayRef(AMDGPUSubTypeKV, 75),
2756 AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable,
2757 nullptr, nullptr, nullptr) {}
2758
2759unsigned AMDGPUGenSubtargetInfo
2760::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
2761
2762 const SIInstrInfo *TII =
2763 static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo());
2764 (void)TII;
2765
2766 switch (SchedClass) {
2767 case 34: // COPY
2768 if (SchedModel->getProcessorID() == 1) { // SIQuarterSpeedModel
2769 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2770 return 66; // Write32Bit
2771 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2772 return 67; // Write64Bit
2773 return 68; // WriteSALU
2774 }
2775 if (SchedModel->getProcessorID() == 2) { // GFX10SpeedModel
2776 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2777 return 66; // Write32Bit
2778 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2779 return 67; // Write64Bit
2780 return 68; // WriteSALU
2781 }
2782 if (SchedModel->getProcessorID() == 3) { // GFX11SpeedModel
2783 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2784 return 66; // Write32Bit
2785 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2786 return 67; // Write64Bit
2787 return 68; // WriteSALU
2788 }
2789 if (SchedModel->getProcessorID() == 4) { // GFX12SpeedModel
2790 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2791 return 66; // Write32Bit
2792 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2793 return 67; // Write64Bit
2794 return 68; // WriteSALU
2795 }
2796 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
2797 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2798 return 66; // Write32Bit
2799 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2800 return 67; // Write64Bit
2801 return 68; // WriteSALU
2802 }
2803 if (SchedModel->getProcessorID() == 6) { // SIFullSpeedModel
2804 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2805 return 66; // Write32Bit
2806 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2807 return 67; // Write64Bit
2808 return 68; // WriteSALU
2809 }
2810 if (SchedModel->getProcessorID() == 7) { // SIDPGFX942FullSpeedModel
2811 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2812 return 66; // Write32Bit
2813 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2814 return 67; // Write64Bit
2815 return 68; // WriteSALU
2816 }
2817 if (SchedModel->getProcessorID() == 8) { // SIDPFullSpeedModel
2818 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2819 return 66; // Write32Bit
2820 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2821 return 67; // Write64Bit
2822 return 68; // WriteSALU
2823 }
2824 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2825 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2826 return 66; // Write32Bit
2827 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2828 return 67; // Write64Bit
2829 return 68; // WriteSALU
2830 }
2831 break;
2832 case 35: // V_ACCVGPR_WRITE_B32_e64
2833 if (SchedModel->getProcessorID() == 1) { // SIQuarterSpeedModel
2834 if (TII->hasVGPRUses(*MI))
2835 return 69; // Write64Bit_MIVGPRRead
2836 return 70; // Write64Bit_ReadDefault
2837 }
2838 break;
2839 case 38: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi
2840 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2841 if (
2842 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2843 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2844)
2845 return 71; // Write16PassMAI_MIMFMARead
2846 return 72; // Write8PassMAI_MIMFMARead
2847 }
2848 break;
2849 case 53: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2850 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2851 if (
2852 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2853 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2854)
2855 return 72; // Write8PassMAI_MIMFMARead
2856 return 73; // Write4PassMAI_MIMFMARead
2857 }
2858 break;
2859 case 54: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2860 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2861 if (
2862 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2863 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2864)
2865 return 72; // Write8PassMAI_MIMFMARead
2866 return 73; // Write4PassMAI_MIMFMARead
2867 }
2868 break;
2869 case 55: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd
2870 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2871 if (
2872 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2873 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2874)
2875 return 71; // Write16PassMAI_MIMFMARead
2876 return 72; // Write8PassMAI_MIMFMARead
2877 }
2878 break;
2879 case 60: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr
2880 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
2881 if (
2882 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8 ||
2883 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8
2884)
2885 return 74; // WriteXDL4PassWMMA
2886 return 75; // WriteXDL2PassWMMA
2887 }
2888 break;
2889 case 61: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250
2890 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
2891 if (
2892 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8 ||
2893 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8
2894)
2895 return 74; // WriteXDL4PassWMMA
2896 return 75; // WriteXDL2PassWMMA
2897 }
2898 break;
2899 };
2900 report_fatal_error("Expected a variant SchedClass");
2901} // AMDGPUGenSubtargetInfo::resolveSchedClass
2902
2903unsigned AMDGPUGenSubtargetInfo
2904::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const {
2905 return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);
2906} // AMDGPUGenSubtargetInfo::resolveVariantSchedClass
2907
2908unsigned AMDGPUGenSubtargetInfo::getHwModeSet() const {
2909 [[maybe_unused]] const auto *Subtarget =
2910 static_cast<const AMDGPUSubtarget *>(this);
2911 // Collect HwModes and store them as a bit set.
2912 unsigned Modes = 0;
2913 if ((Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs())) Modes |= (1 << 0);
2914 if ((!Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs()) && (Subtarget->isWave32())) Modes |= (1 << 1);
2915 if ((!Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs()) && (Subtarget->isWave64())) Modes |= (1 << 2);
2916 if ((Subtarget->isWave32()) && (!Subtarget->needsAlignedVGPRs())) Modes |= (1 << 3);
2917 return Modes;
2918}
2919unsigned AMDGPUGenSubtargetInfo::getHwMode(enum HwModeType type) const {
2920 unsigned Modes = getHwModeSet();
2921
2922 if (!Modes)
2923 return Modes;
2924
2925 switch (type) {
2926 case HwMode_Default:
2927 return llvm::countr_zero(Modes) + 1;
2928 case HwMode_ValueType:
2929 Modes &= 15;
2930 if (!Modes)
2931 return Modes;
2932 if (!llvm::has_single_bit<unsigned>(Modes))
2933 llvm_unreachable("Two or more HwModes for ValueType were found!");
2934 return llvm::countr_zero(Modes) + 1;
2935 case HwMode_RegInfo:
2936 Modes &= 15;
2937 if (!Modes)
2938 return Modes;
2939 if (!llvm::has_single_bit<unsigned>(Modes))
2940 llvm_unreachable("Two or more HwModes for RegInfo were found!");
2941 return llvm::countr_zero(Modes) + 1;
2942 case HwMode_EncodingInfo:
2943 Modes &= 0;
2944 if (!Modes)
2945 return Modes;
2946 if (!llvm::has_single_bit<unsigned>(Modes))
2947 llvm_unreachable("Two or more HwModes for EncodingInfo were found!");
2948 return llvm::countr_zero(Modes) + 1;
2949 }
2950 llvm_unreachable("unexpected HwModeType");
2951 return 0; // should not get here
2952}
2953
2954} // namespace llvm
2955
2956#endif // GET_SUBTARGETINFO_CTOR
2957
2958#ifdef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
2959#undef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
2960
2961
2962#endif // GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
2963
2964#ifdef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
2965#undef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
2966
2967
2968#endif // GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
2969
2970