1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Subtarget Enumeration Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_SUBTARGETINFO_ENUM
10#undef GET_SUBTARGETINFO_ENUM
11
12namespace llvm {
13
14namespace AMDGPU {
15
16enum {
17 Feature1_5xVGPRs = 0,
18 Feature16BitInsts = 1,
19 Feature45BitNumRecordsBufferResource = 2,
20 Feature64BitLiterals = 3,
21 Feature1024AddressableVGPRs = 4,
22 FeatureA16 = 5,
23 FeatureAddMinMaxInsts = 6,
24 FeatureAddNoCarryInsts = 7,
25 FeatureAddSubU64Insts = 8,
26 FeatureAddressableLocalMemorySize32768 = 9,
27 FeatureAddressableLocalMemorySize65536 = 10,
28 FeatureAddressableLocalMemorySize163840 = 11,
29 FeatureAddressableLocalMemorySize327680 = 12,
30 FeatureAgentScopeFineGrainedRemoteMemoryAtomics = 13,
31 FeatureApertureRegs = 14,
32 FeatureArchitectedFlatScratch = 15,
33 FeatureArchitectedSGPRs = 16,
34 FeatureAshrPkInsts = 17,
35 FeatureAssemblerPermissiveWavesize = 18,
36 FeatureAtomicBufferGlobalPkAddF16Insts = 19,
37 FeatureAtomicBufferGlobalPkAddF16NoRtnInsts = 20,
38 FeatureAtomicBufferPkAddBF16Inst = 21,
39 FeatureAtomicCSubNoRtnInsts = 22,
40 FeatureAtomicDsPkAdd16Insts = 23,
41 FeatureAtomicFMinFMaxF32FlatInsts = 24,
42 FeatureAtomicFMinFMaxF32GlobalInsts = 25,
43 FeatureAtomicFMinFMaxF64FlatInsts = 26,
44 FeatureAtomicFMinFMaxF64GlobalInsts = 27,
45 FeatureAtomicFaddNoRtnInsts = 28,
46 FeatureAtomicFaddRtnInsts = 29,
47 FeatureAtomicFlatPkAdd16Insts = 30,
48 FeatureAtomicGlobalPkAddBF16Inst = 31,
49 FeatureAutoWaitcntBeforeBarrier = 32,
50 FeatureBF8ConversionScaleInsts = 33,
51 FeatureBF16ConversionInsts = 34,
52 FeatureBF16PackedInsts = 35,
53 FeatureBF16TransInsts = 36,
54 FeatureBVHDualAndBVH8Insts = 37,
55 FeatureBackOffBarrier = 38,
56 FeatureBitOp3Insts = 39,
57 FeatureCIInsts = 40,
58 FeatureClusters = 41,
59 FeatureCuMode = 42,
60 FeatureCubeInsts = 43,
61 FeatureCvtFP8VOP1Bug = 44,
62 FeatureCvtNormInsts = 45,
63 FeatureCvtPkF16F32Inst = 46,
64 FeatureCvtPkNormVOP2Insts = 47,
65 FeatureCvtPkNormVOP3Insts = 48,
66 FeatureD16Writes32BitVgpr = 49,
67 FeatureDLInsts = 50,
68 FeatureDPALU_DPP = 51,
69 FeatureDPP = 52,
70 FeatureDPP8 = 53,
71 FeatureDPPSrc1SGPR = 54,
72 FeatureDefaultComponentBroadcast = 55,
73 FeatureDefaultComponentZero = 56,
74 FeatureDot1Insts = 57,
75 FeatureDot2Insts = 58,
76 FeatureDot3Insts = 59,
77 FeatureDot4Insts = 60,
78 FeatureDot5Insts = 61,
79 FeatureDot6Insts = 62,
80 FeatureDot7Insts = 63,
81 FeatureDot8Insts = 64,
82 FeatureDot9Insts = 65,
83 FeatureDot10Insts = 66,
84 FeatureDot11Insts = 67,
85 FeatureDot12Insts = 68,
86 FeatureDot13Insts = 69,
87 FeatureDsSrc2Insts = 70,
88 FeatureDumpCodeLower = 71,
89 FeatureEmulatedSystemScopeAtomics = 72,
90 FeatureEnableDS128 = 73,
91 FeatureEnableFlatScratch = 74,
92 FeatureEnableLoadStoreOpt = 75,
93 FeatureEnablePRTStrictNull = 76,
94 FeatureEnableSIScheduler = 77,
95 FeatureEnableUnsafeDSOffsetFolding = 78,
96 FeatureExtendedImageInsts = 79,
97 FeatureF16BF16ToFP6BF6ConversionScaleInsts = 80,
98 FeatureF32ToF16BF16ConversionSRInsts = 81,
99 FeatureFMA = 82,
100 FeatureFP4ConversionScaleInsts = 83,
101 FeatureFP6BF6ConversionScaleInsts = 84,
102 FeatureFP8ConversionInsts = 85,
103 FeatureFP8ConversionScaleInsts = 86,
104 FeatureFP8E5M3Insts = 87,
105 FeatureFP8Insts = 88,
106 FeatureFP64 = 89,
107 FeatureFastDenormalF32 = 90,
108 FeatureFastFMAF32 = 91,
109 FeatureFlatAddressSpace = 92,
110 FeatureFlatAtomicFaddF32Inst = 93,
111 FeatureFlatBufferGlobalAtomicFaddF64Inst = 94,
112 FeatureFlatGVSMode = 95,
113 FeatureFlatGlobalInsts = 96,
114 FeatureFlatInstOffsets = 97,
115 FeatureFlatScratchInsts = 98,
116 FeatureFlatSegmentOffsetBug = 99,
117 FeatureFmaMixBF16Insts = 100,
118 FeatureFmaMixInsts = 101,
119 FeatureFmacF64Inst = 102,
120 FeatureFullRate64Ops = 103,
121 FeatureG16 = 104,
122 FeatureGCN3Encoding = 105,
123 FeatureGDS = 106,
124 FeatureGFX7GFX8GFX9Insts = 107,
125 FeatureGFX8Insts = 108,
126 FeatureGFX9 = 109,
127 FeatureGFX9Insts = 110,
128 FeatureGFX10 = 111,
129 FeatureGFX10Insts = 112,
130 FeatureGFX10_3Insts = 113,
131 FeatureGFX10_AEncoding = 114,
132 FeatureGFX10_BEncoding = 115,
133 FeatureGFX11 = 116,
134 FeatureGFX11Insts = 117,
135 FeatureGFX12 = 118,
136 FeatureGFX12Insts = 119,
137 FeatureGFX13 = 120,
138 FeatureGFX13Insts = 121,
139 FeatureGFX90AInsts = 122,
140 FeatureGFX940Insts = 123,
141 FeatureGFX950Insts = 124,
142 FeatureGFX1250Insts = 125,
143 FeatureGWS = 126,
144 FeatureGetWaveIdInst = 127,
145 FeatureGloballyAddressableScratch = 128,
146 FeatureHalfRate64Ops = 129,
147 FeatureIEEEMinimumMaximumInsts = 130,
148 FeatureImageGather4D16Bug = 131,
149 FeatureImageInsts = 132,
150 FeatureImageStoreD16Bug = 133,
151 FeatureInstFwdPrefetchBug = 134,
152 FeatureIntClamp = 135,
153 FeatureInv2PiInlineImm = 136,
154 FeatureKernargPreload = 137,
155 FeatureLDSBankCount16 = 138,
156 FeatureLDSBankCount32 = 139,
157 FeatureLDSMisalignedBug = 140,
158 FeatureLdsBarrierArriveAtomic = 141,
159 FeatureLdsBranchVmemWARHazard = 142,
160 FeatureLerpInst = 143,
161 FeatureLshlAddU64Inst = 144,
162 FeatureMADIntraFwdBug = 145,
163 FeatureMAIInsts = 146,
164 FeatureMFMAInlineLiteralBug = 147,
165 FeatureMIMG_R128 = 148,
166 FeatureMSAALoadDstSelBug = 149,
167 FeatureMadMacF32Insts = 150,
168 FeatureMadMixInsts = 151,
169 FeatureMadU32Inst = 152,
170 FeatureMaxHardClauseLength32 = 153,
171 FeatureMaxHardClauseLength63 = 154,
172 FeatureMaxPrivateElementSize4 = 155,
173 FeatureMaxPrivateElementSize8 = 156,
174 FeatureMaxPrivateElementSize16 = 157,
175 FeatureMcastLoadInsts = 158,
176 FeatureMemoryAtomicFAddF32DenormalSupport = 159,
177 FeatureMin3Max3PKF16 = 160,
178 FeatureMinimum3Maximum3F16 = 161,
179 FeatureMinimum3Maximum3F32 = 162,
180 FeatureMinimum3Maximum3PKF16 = 163,
181 FeatureMovrel = 164,
182 FeatureNSAClauseBug = 165,
183 FeatureNSAEncoding = 166,
184 FeatureNSAtoVMEMBug = 167,
185 FeatureNegativeScratchOffsetBug = 168,
186 FeatureNegativeUnalignedScratchOffsetBug = 169,
187 FeatureNoDataDepHazard = 170,
188 FeatureNoSdstCMPX = 171,
189 FeatureOffset3fBug = 172,
190 FeaturePackedFP32Ops = 173,
191 FeaturePackedTID = 174,
192 FeaturePartialNSAEncoding = 175,
193 FeaturePermlane16Swap = 176,
194 FeaturePermlane32Swap = 177,
195 FeaturePkAddMinMaxInsts = 178,
196 FeaturePkFmacF16Inst = 179,
197 FeaturePointSampleAccel = 180,
198 FeaturePreciseMemory = 181,
199 FeaturePrivEnabledTrap2NopBug = 182,
200 FeaturePrngInst = 183,
201 FeaturePromoteAlloca = 184,
202 FeaturePseudoScalarTrans = 185,
203 FeatureQsadInsts = 186,
204 FeatureR128A16 = 187,
205 FeatureRealTrue16Insts = 188,
206 FeatureRelaxedBufferOOBMode = 189,
207 FeatureRequiredExportPriority = 190,
208 FeatureRequiresAlignedVGPRs = 191,
209 FeatureRequiresCOV6 = 192,
210 FeatureRestrictedSOffset = 193,
211 FeatureSALUFloatInsts = 194,
212 FeatureSBarrierLeaveImm = 195,
213 FeatureSDWA = 196,
214 FeatureSDWAMac = 197,
215 FeatureSDWAOmod = 198,
216 FeatureSDWAOutModsVOPC = 199,
217 FeatureSDWAScalar = 200,
218 FeatureSDWASdst = 201,
219 FeatureSGPRInitBug = 202,
220 FeatureSMEMtoVectorWriteHazard = 203,
221 FeatureSMemRealTime = 204,
222 FeatureSMemTimeInst = 205,
223 FeatureSRAMECC = 206,
224 FeatureSWakeupBarrier = 207,
225 FeatureSWakeupImm = 208,
226 FeatureSadInsts = 209,
227 FeatureSafeCUPrefetch = 210,
228 FeatureSafeSmemPrefetch = 211,
229 FeatureScalarAtomics = 212,
230 FeatureScalarDwordx3Loads = 213,
231 FeatureScalarFlatScratchInsts = 214,
232 FeatureScalarStores = 215,
233 FeatureSeaIslands = 216,
234 FeatureSetPrioIncWgInst = 217,
235 FeatureSetregVGPRMSBFixup = 218,
236 FeatureShaderCyclesHiLoRegisters = 219,
237 FeatureShaderCyclesRegister = 220,
238 FeatureSouthernIslands = 221,
239 FeatureSupportsSRAMECC = 222,
240 FeatureSupportsXNACK = 223,
241 FeatureTanhInsts = 224,
242 FeatureTensorCvtLutInsts = 225,
243 FeatureTgSplit = 226,
244 FeatureTransposeLoadF4F6Insts = 227,
245 FeatureTrapHandler = 228,
246 FeatureTrigReducedRange = 229,
247 FeatureTrue16BitInsts = 230,
248 FeatureUnalignedAccessMode = 231,
249 FeatureUnalignedBufferAccess = 232,
250 FeatureUnalignedDSAccess = 233,
251 FeatureUnalignedScratchAccess = 234,
252 FeatureUnpackedD16VMem = 235,
253 FeatureUseAddPC64Inst = 236,
254 FeatureUseBlockVGPROpsForCSR = 237,
255 FeatureUseFlatForGlobal = 238,
256 FeatureUserSGPRInit16Bug = 239,
257 FeatureVALUTransUseHazard = 240,
258 FeatureVGPRIndexMode = 241,
259 FeatureVMEMtoScalarWriteHazard = 242,
260 FeatureVMemToLDSLoad = 243,
261 FeatureVOP3Literal = 244,
262 FeatureVOP3PInsts = 245,
263 FeatureVOPDInsts = 246,
264 FeatureVcmpxExecWARHazard = 247,
265 FeatureVcmpxPermlaneHazard = 248,
266 FeatureVmemPrefInsts = 249,
267 FeatureVmemWriteVgprInOrder = 250,
268 FeatureVolcanicIslands = 251,
269 FeatureVscnt = 252,
270 FeatureWaitXcnt = 253,
271 FeatureWaitsBeforeSystemScopeStores = 254,
272 FeatureWavefrontSize16 = 255,
273 FeatureWavefrontSize32 = 256,
274 FeatureWavefrontSize64 = 257,
275 FeatureXF32Insts = 258,
276 FeatureXNACK = 259,
277 NumSubtargetFeatures = 260
278};
279
280} // namespace AMDGPU
281
282} // namespace llvm
283
284#endif // GET_SUBTARGETINFO_ENUM
285
286#ifdef GET_SUBTARGETINFO_MACRO
287
288GET_SUBTARGETINFO_MACRO(DumpCode, false, dumpCode)
289GET_SUBTARGETINFO_MACRO(EnableCuMode, false, enableCuMode)
290GET_SUBTARGETINFO_MACRO(EnableDS128, false, enableDS128)
291GET_SUBTARGETINFO_MACRO(EnableFlatScratch, false, enableFlatScratch)
292GET_SUBTARGETINFO_MACRO(EnableLoadStoreOpt, false, enableLoadStoreOpt)
293GET_SUBTARGETINFO_MACRO(EnablePRTStrictNull, false, enablePRTStrictNull)
294GET_SUBTARGETINFO_MACRO(EnablePreciseMemory, false, enablePreciseMemory)
295GET_SUBTARGETINFO_MACRO(EnablePromoteAlloca, false, enablePromoteAlloca)
296GET_SUBTARGETINFO_MACRO(EnableRealTrue16Insts, false, enableRealTrue16Insts)
297GET_SUBTARGETINFO_MACRO(EnableSIScheduler, false, enableSIScheduler)
298GET_SUBTARGETINFO_MACRO(EnableSRAMECC, false, enableSRAMECC)
299GET_SUBTARGETINFO_MACRO(EnableTgSplit, false, enableTgSplit)
300GET_SUBTARGETINFO_MACRO(EnableUnsafeDSOffsetFolding, false, enableUnsafeDSOffsetFolding)
301GET_SUBTARGETINFO_MACRO(EnableXNACK, false, enableXNACK)
302GET_SUBTARGETINFO_MACRO(Has1024AddressableVGPRs, false, has1024AddressableVGPRs)
303GET_SUBTARGETINFO_MACRO(Has16BitInsts, false, has16BitInsts)
304GET_SUBTARGETINFO_MACRO(Has1_5xVGPRs, false, has1_5xVGPRs)
305GET_SUBTARGETINFO_MACRO(Has45BitNumRecordsBufferResource, false, has45BitNumRecordsBufferResource)
306GET_SUBTARGETINFO_MACRO(Has64BitLiterals, false, has64BitLiterals)
307GET_SUBTARGETINFO_MACRO(HasA16, false, hasA16)
308GET_SUBTARGETINFO_MACRO(HasAddMinMaxInsts, false, hasAddMinMaxInsts)
309GET_SUBTARGETINFO_MACRO(HasAddNoCarryInsts, false, hasAddNoCarryInsts)
310GET_SUBTARGETINFO_MACRO(HasAddSubU64Insts, false, hasAddSubU64Insts)
311GET_SUBTARGETINFO_MACRO(HasAgentScopeFineGrainedRemoteMemoryAtomics, false, hasAgentScopeFineGrainedRemoteMemoryAtomics)
312GET_SUBTARGETINFO_MACRO(HasApertureRegs, false, hasApertureRegs)
313GET_SUBTARGETINFO_MACRO(HasArchitectedFlatScratch, false, hasArchitectedFlatScratch)
314GET_SUBTARGETINFO_MACRO(HasArchitectedSGPRs, false, hasArchitectedSGPRs)
315GET_SUBTARGETINFO_MACRO(HasAshrPkInsts, false, hasAshrPkInsts)
316GET_SUBTARGETINFO_MACRO(HasAssemblerPermissiveWavesize, false, hasAssemblerPermissiveWavesize)
317GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16Insts, false, hasAtomicBufferGlobalPkAddF16Insts)
318GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16NoRtnInsts, false, hasAtomicBufferGlobalPkAddF16NoRtnInsts)
319GET_SUBTARGETINFO_MACRO(HasAtomicBufferPkAddBF16Inst, false, hasAtomicBufferPkAddBF16Inst)
320GET_SUBTARGETINFO_MACRO(HasAtomicCSubNoRtnInsts, false, hasAtomicCSubNoRtnInsts)
321GET_SUBTARGETINFO_MACRO(HasAtomicDsPkAdd16Insts, false, hasAtomicDsPkAdd16Insts)
322GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32FlatInsts, false, hasAtomicFMinFMaxF32FlatInsts)
323GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32GlobalInsts, false, hasAtomicFMinFMaxF32GlobalInsts)
324GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64FlatInsts, false, hasAtomicFMinFMaxF64FlatInsts)
325GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64GlobalInsts, false, hasAtomicFMinFMaxF64GlobalInsts)
326GET_SUBTARGETINFO_MACRO(HasAtomicFaddNoRtnInsts, false, hasAtomicFaddNoRtnInsts)
327GET_SUBTARGETINFO_MACRO(HasAtomicFaddRtnInsts, false, hasAtomicFaddRtnInsts)
328GET_SUBTARGETINFO_MACRO(HasAtomicFlatPkAdd16Insts, false, hasAtomicFlatPkAdd16Insts)
329GET_SUBTARGETINFO_MACRO(HasAtomicGlobalPkAddBF16Inst, false, hasAtomicGlobalPkAddBF16Inst)
330GET_SUBTARGETINFO_MACRO(HasAutoWaitcntBeforeBarrier, false, hasAutoWaitcntBeforeBarrier)
331GET_SUBTARGETINFO_MACRO(HasBF16ConversionInsts, false, hasBF16ConversionInsts)
332GET_SUBTARGETINFO_MACRO(HasBF16PackedInsts, false, hasBF16PackedInsts)
333GET_SUBTARGETINFO_MACRO(HasBF16TransInsts, false, hasBF16TransInsts)
334GET_SUBTARGETINFO_MACRO(HasBF8ConversionScaleInsts, false, hasBF8ConversionScaleInsts)
335GET_SUBTARGETINFO_MACRO(HasBVHDualAndBVH8Insts, false, hasBVHDualAndBVH8Insts)
336GET_SUBTARGETINFO_MACRO(HasBackOffBarrier, false, hasBackOffBarrier)
337GET_SUBTARGETINFO_MACRO(HasBitOp3Insts, false, hasBitOp3Insts)
338GET_SUBTARGETINFO_MACRO(HasCIInsts, false, hasCIInsts)
339GET_SUBTARGETINFO_MACRO(HasClusters, false, hasClusters)
340GET_SUBTARGETINFO_MACRO(HasCubeInsts, false, hasCubeInsts)
341GET_SUBTARGETINFO_MACRO(HasCvtFP8VOP1Bug, false, hasCvtFP8VOP1Bug)
342GET_SUBTARGETINFO_MACRO(HasCvtNormInsts, false, hasCvtNormInsts)
343GET_SUBTARGETINFO_MACRO(HasCvtPkF16F32Inst, false, hasCvtPkF16F32Inst)
344GET_SUBTARGETINFO_MACRO(HasCvtPkNormVOP2Insts, false, hasCvtPkNormVOP2Insts)
345GET_SUBTARGETINFO_MACRO(HasCvtPkNormVOP3Insts, false, hasCvtPkNormVOP3Insts)
346GET_SUBTARGETINFO_MACRO(HasD16Writes32BitVgpr, false, hasD16Writes32BitVgpr)
347GET_SUBTARGETINFO_MACRO(HasDLInsts, false, hasDLInsts)
348GET_SUBTARGETINFO_MACRO(HasDPALU_DPP, false, hasDPALU_DPP)
349GET_SUBTARGETINFO_MACRO(HasDPP, false, hasDPP)
350GET_SUBTARGETINFO_MACRO(HasDPP8, false, hasDPP8)
351GET_SUBTARGETINFO_MACRO(HasDPPSrc1SGPR, false, hasDPPSrc1SGPR)
352GET_SUBTARGETINFO_MACRO(HasDefaultComponentBroadcast, false, hasDefaultComponentBroadcast)
353GET_SUBTARGETINFO_MACRO(HasDefaultComponentZero, false, hasDefaultComponentZero)
354GET_SUBTARGETINFO_MACRO(HasDot10Insts, false, hasDot10Insts)
355GET_SUBTARGETINFO_MACRO(HasDot11Insts, false, hasDot11Insts)
356GET_SUBTARGETINFO_MACRO(HasDot12Insts, false, hasDot12Insts)
357GET_SUBTARGETINFO_MACRO(HasDot13Insts, false, hasDot13Insts)
358GET_SUBTARGETINFO_MACRO(HasDot1Insts, false, hasDot1Insts)
359GET_SUBTARGETINFO_MACRO(HasDot2Insts, false, hasDot2Insts)
360GET_SUBTARGETINFO_MACRO(HasDot3Insts, false, hasDot3Insts)
361GET_SUBTARGETINFO_MACRO(HasDot4Insts, false, hasDot4Insts)
362GET_SUBTARGETINFO_MACRO(HasDot5Insts, false, hasDot5Insts)
363GET_SUBTARGETINFO_MACRO(HasDot6Insts, false, hasDot6Insts)
364GET_SUBTARGETINFO_MACRO(HasDot7Insts, false, hasDot7Insts)
365GET_SUBTARGETINFO_MACRO(HasDot8Insts, false, hasDot8Insts)
366GET_SUBTARGETINFO_MACRO(HasDot9Insts, false, hasDot9Insts)
367GET_SUBTARGETINFO_MACRO(HasDsSrc2Insts, false, hasDsSrc2Insts)
368GET_SUBTARGETINFO_MACRO(HasEmulatedSystemScopeAtomics, false, hasEmulatedSystemScopeAtomics)
369GET_SUBTARGETINFO_MACRO(HasExtendedImageInsts, false, hasExtendedImageInsts)
370GET_SUBTARGETINFO_MACRO(HasF16BF16ToFP6BF6ConversionScaleInsts, false, hasF16BF16ToFP6BF6ConversionScaleInsts)
371GET_SUBTARGETINFO_MACRO(HasF32ToF16BF16ConversionSRInsts, false, hasF32ToF16BF16ConversionSRInsts)
372GET_SUBTARGETINFO_MACRO(HasFMA, false, hasFMA)
373GET_SUBTARGETINFO_MACRO(HasFP4ConversionScaleInsts, false, hasFP4ConversionScaleInsts)
374GET_SUBTARGETINFO_MACRO(HasFP64, false, hasFP64)
375GET_SUBTARGETINFO_MACRO(HasFP6BF6ConversionScaleInsts, false, hasFP6BF6ConversionScaleInsts)
376GET_SUBTARGETINFO_MACRO(HasFP8ConversionInsts, false, hasFP8ConversionInsts)
377GET_SUBTARGETINFO_MACRO(HasFP8ConversionScaleInsts, false, hasFP8ConversionScaleInsts)
378GET_SUBTARGETINFO_MACRO(HasFP8E5M3Insts, false, hasFP8E5M3Insts)
379GET_SUBTARGETINFO_MACRO(HasFP8Insts, false, hasFP8Insts)
380GET_SUBTARGETINFO_MACRO(HasFastDenormalF32, false, hasFastDenormalF32)
381GET_SUBTARGETINFO_MACRO(HasFastFMAF32, false, hasFastFMAF32)
382GET_SUBTARGETINFO_MACRO(HasFlatAddressSpace, false, hasFlatAddressSpace)
383GET_SUBTARGETINFO_MACRO(HasFlatAtomicFaddF32Inst, false, hasFlatAtomicFaddF32Inst)
384GET_SUBTARGETINFO_MACRO(HasFlatBufferGlobalAtomicFaddF64Inst, false, hasFlatBufferGlobalAtomicFaddF64Inst)
385GET_SUBTARGETINFO_MACRO(HasFlatGVSMode, false, hasFlatGVSMode)
386GET_SUBTARGETINFO_MACRO(HasFlatGlobalInsts, false, hasFlatGlobalInsts)
387GET_SUBTARGETINFO_MACRO(HasFlatInstOffsets, false, hasFlatInstOffsets)
388GET_SUBTARGETINFO_MACRO(HasFlatScratchInsts, false, hasFlatScratchInsts)
389GET_SUBTARGETINFO_MACRO(HasFlatSegmentOffsetBug, false, hasFlatSegmentOffsetBug)
390GET_SUBTARGETINFO_MACRO(HasFmaMixBF16Insts, false, hasFmaMixBF16Insts)
391GET_SUBTARGETINFO_MACRO(HasFmaMixInsts, false, hasFmaMixInsts)
392GET_SUBTARGETINFO_MACRO(HasFmacF64Inst, false, hasFmacF64Inst)
393GET_SUBTARGETINFO_MACRO(HasFullRate64Ops, false, hasFullRate64Ops)
394GET_SUBTARGETINFO_MACRO(HasG16, false, hasG16)
395GET_SUBTARGETINFO_MACRO(HasGCN3Encoding, false, hasGCN3Encoding)
396GET_SUBTARGETINFO_MACRO(HasGDS, false, hasGDS)
397GET_SUBTARGETINFO_MACRO(HasGFX10Insts, false, hasGFX10Insts)
398GET_SUBTARGETINFO_MACRO(HasGFX10_3Insts, false, hasGFX10_3Insts)
399GET_SUBTARGETINFO_MACRO(HasGFX10_AEncoding, false, hasGFX10_AEncoding)
400GET_SUBTARGETINFO_MACRO(HasGFX10_BEncoding, false, hasGFX10_BEncoding)
401GET_SUBTARGETINFO_MACRO(HasGFX11Insts, false, hasGFX11Insts)
402GET_SUBTARGETINFO_MACRO(HasGFX1250Insts, false, hasGFX1250Insts)
403GET_SUBTARGETINFO_MACRO(HasGFX12Insts, false, hasGFX12Insts)
404GET_SUBTARGETINFO_MACRO(HasGFX13Insts, false, hasGFX13Insts)
405GET_SUBTARGETINFO_MACRO(HasGFX7GFX8GFX9Insts, false, hasGFX7GFX8GFX9Insts)
406GET_SUBTARGETINFO_MACRO(HasGFX8Insts, false, hasGFX8Insts)
407GET_SUBTARGETINFO_MACRO(HasGFX90AInsts, false, hasGFX90AInsts)
408GET_SUBTARGETINFO_MACRO(HasGFX940Insts, false, hasGFX940Insts)
409GET_SUBTARGETINFO_MACRO(HasGFX950Insts, false, hasGFX950Insts)
410GET_SUBTARGETINFO_MACRO(HasGFX9Insts, false, hasGFX9Insts)
411GET_SUBTARGETINFO_MACRO(HasGWS, false, hasGWS)
412GET_SUBTARGETINFO_MACRO(HasGetWaveIdInst, false, hasGetWaveIdInst)
413GET_SUBTARGETINFO_MACRO(HasGloballyAddressableScratch, false, hasGloballyAddressableScratch)
414GET_SUBTARGETINFO_MACRO(HasHalfRate64Ops, false, hasHalfRate64Ops)
415GET_SUBTARGETINFO_MACRO(HasIEEEMinimumMaximumInsts, false, hasIEEEMinimumMaximumInsts)
416GET_SUBTARGETINFO_MACRO(HasImageGather4D16Bug, false, hasImageGather4D16Bug)
417GET_SUBTARGETINFO_MACRO(HasImageInsts, false, hasImageInsts)
418GET_SUBTARGETINFO_MACRO(HasImageStoreD16Bug, false, hasImageStoreD16Bug)
419GET_SUBTARGETINFO_MACRO(HasInstFwdPrefetchBug, false, hasInstFwdPrefetchBug)
420GET_SUBTARGETINFO_MACRO(HasIntClamp, false, hasIntClamp)
421GET_SUBTARGETINFO_MACRO(HasInv2PiInlineImm, false, hasInv2PiInlineImm)
422GET_SUBTARGETINFO_MACRO(HasKernargPreload, false, hasKernargPreload)
423GET_SUBTARGETINFO_MACRO(HasLDSMisalignedBug, false, hasLDSMisalignedBug)
424GET_SUBTARGETINFO_MACRO(HasLdsBarrierArriveAtomic, false, hasLdsBarrierArriveAtomic)
425GET_SUBTARGETINFO_MACRO(HasLdsBranchVmemWARHazard, false, hasLdsBranchVmemWARHazard)
426GET_SUBTARGETINFO_MACRO(HasLerpInst, false, hasLerpInst)
427GET_SUBTARGETINFO_MACRO(HasLshlAddU64Inst, false, hasLshlAddU64Inst)
428GET_SUBTARGETINFO_MACRO(HasMADIntraFwdBug, false, hasMADIntraFwdBug)
429GET_SUBTARGETINFO_MACRO(HasMAIInsts, false, hasMAIInsts)
430GET_SUBTARGETINFO_MACRO(HasMFMAInlineLiteralBug, false, hasMFMAInlineLiteralBug)
431GET_SUBTARGETINFO_MACRO(HasMIMG_R128, false, hasMIMG_R128)
432GET_SUBTARGETINFO_MACRO(HasMSAALoadDstSelBug, false, hasMSAALoadDstSelBug)
433GET_SUBTARGETINFO_MACRO(HasMadMacF32Insts, false, hasMadMacF32Insts)
434GET_SUBTARGETINFO_MACRO(HasMadMixInsts, false, hasMadMixInsts)
435GET_SUBTARGETINFO_MACRO(HasMadU32Inst, false, hasMadU32Inst)
436GET_SUBTARGETINFO_MACRO(HasMcastLoadInsts, false, hasMcastLoadInsts)
437GET_SUBTARGETINFO_MACRO(HasMemoryAtomicFaddF32DenormalSupport, false, hasMemoryAtomicFaddF32DenormalSupport)
438GET_SUBTARGETINFO_MACRO(HasMin3Max3PKF16, false, hasMin3Max3PKF16)
439GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F16, false, hasMinimum3Maximum3F16)
440GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F32, false, hasMinimum3Maximum3F32)
441GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3PKF16, false, hasMinimum3Maximum3PKF16)
442GET_SUBTARGETINFO_MACRO(HasMovrel, false, hasMovrel)
443GET_SUBTARGETINFO_MACRO(HasNSAClauseBug, false, hasNSAClauseBug)
444GET_SUBTARGETINFO_MACRO(HasNSAEncoding, false, hasNSAEncoding)
445GET_SUBTARGETINFO_MACRO(HasNSAtoVMEMBug, false, hasNSAtoVMEMBug)
446GET_SUBTARGETINFO_MACRO(HasNegativeScratchOffsetBug, false, hasNegativeScratchOffsetBug)
447GET_SUBTARGETINFO_MACRO(HasNegativeUnalignedScratchOffsetBug, false, hasNegativeUnalignedScratchOffsetBug)
448GET_SUBTARGETINFO_MACRO(HasNoDataDepHazard, false, hasNoDataDepHazard)
449GET_SUBTARGETINFO_MACRO(HasNoSdstCMPX, false, hasNoSdstCMPX)
450GET_SUBTARGETINFO_MACRO(HasOffset3fBug, false, hasOffset3fBug)
451GET_SUBTARGETINFO_MACRO(HasPackedFP32Ops, false, hasPackedFP32Ops)
452GET_SUBTARGETINFO_MACRO(HasPackedTID, false, hasPackedTID)
453GET_SUBTARGETINFO_MACRO(HasPartialNSAEncoding, false, hasPartialNSAEncoding)
454GET_SUBTARGETINFO_MACRO(HasPermlane16Swap, false, hasPermlane16Swap)
455GET_SUBTARGETINFO_MACRO(HasPermlane32Swap, false, hasPermlane32Swap)
456GET_SUBTARGETINFO_MACRO(HasPkAddMinMaxInsts, false, hasPkAddMinMaxInsts)
457GET_SUBTARGETINFO_MACRO(HasPkFmacF16Inst, false, hasPkFmacF16Inst)
458GET_SUBTARGETINFO_MACRO(HasPointSampleAccel, false, hasPointSampleAccel)
459GET_SUBTARGETINFO_MACRO(HasPrivEnabledTrap2NopBug, false, hasPrivEnabledTrap2NopBug)
460GET_SUBTARGETINFO_MACRO(HasPrngInst, false, hasPrngInst)
461GET_SUBTARGETINFO_MACRO(HasPseudoScalarTrans, false, hasPseudoScalarTrans)
462GET_SUBTARGETINFO_MACRO(HasQsadInsts, false, hasQsadInsts)
463GET_SUBTARGETINFO_MACRO(HasR128A16, false, hasR128A16)
464GET_SUBTARGETINFO_MACRO(HasRelaxedBufferOOBMode, false, hasRelaxedBufferOOBMode)
465GET_SUBTARGETINFO_MACRO(HasRequiredExportPriority, false, hasRequiredExportPriority)
466GET_SUBTARGETINFO_MACRO(HasRestrictedSOffset, false, hasRestrictedSOffset)
467GET_SUBTARGETINFO_MACRO(HasSALUFloatInsts, false, hasSALUFloatInsts)
468GET_SUBTARGETINFO_MACRO(HasSBarrierLeaveImm, false, hasSBarrierLeaveImm)
469GET_SUBTARGETINFO_MACRO(HasSDWA, false, hasSDWA)
470GET_SUBTARGETINFO_MACRO(HasSDWAMac, false, hasSDWAMac)
471GET_SUBTARGETINFO_MACRO(HasSDWAOmod, false, hasSDWAOmod)
472GET_SUBTARGETINFO_MACRO(HasSDWAOutModsVOPC, false, hasSDWAOutModsVOPC)
473GET_SUBTARGETINFO_MACRO(HasSDWAScalar, false, hasSDWAScalar)
474GET_SUBTARGETINFO_MACRO(HasSDWASdst, false, hasSDWASdst)
475GET_SUBTARGETINFO_MACRO(HasSGPRInitBug, false, hasSGPRInitBug)
476GET_SUBTARGETINFO_MACRO(HasSMEMtoVectorWriteHazard, false, hasSMEMtoVectorWriteHazard)
477GET_SUBTARGETINFO_MACRO(HasSMemRealTime, false, hasSMemRealTime)
478GET_SUBTARGETINFO_MACRO(HasSMemTimeInst, false, hasSMemTimeInst)
479GET_SUBTARGETINFO_MACRO(HasSWakeupBarrier, false, hasSWakeupBarrier)
480GET_SUBTARGETINFO_MACRO(HasSWakeupImm, false, hasSWakeupImm)
481GET_SUBTARGETINFO_MACRO(HasSadInsts, false, hasSadInsts)
482GET_SUBTARGETINFO_MACRO(HasSafeCUPrefetch, false, hasSafeCUPrefetch)
483GET_SUBTARGETINFO_MACRO(HasSafeSmemPrefetch, false, hasSafeSmemPrefetch)
484GET_SUBTARGETINFO_MACRO(HasScalarAtomics, false, hasScalarAtomics)
485GET_SUBTARGETINFO_MACRO(HasScalarDwordx3Loads, false, hasScalarDwordx3Loads)
486GET_SUBTARGETINFO_MACRO(HasScalarFlatScratchInsts, false, hasScalarFlatScratchInsts)
487GET_SUBTARGETINFO_MACRO(HasScalarStores, false, hasScalarStores)
488GET_SUBTARGETINFO_MACRO(HasSetPrioIncWgInst, false, hasSetPrioIncWgInst)
489GET_SUBTARGETINFO_MACRO(HasSetregVGPRMSBFixup, false, hasSetregVGPRMSBFixup)
490GET_SUBTARGETINFO_MACRO(HasShaderCyclesHiLoRegisters, false, hasShaderCyclesHiLoRegisters)
491GET_SUBTARGETINFO_MACRO(HasShaderCyclesRegister, false, hasShaderCyclesRegister)
492GET_SUBTARGETINFO_MACRO(HasTanhInsts, false, hasTanhInsts)
493GET_SUBTARGETINFO_MACRO(HasTensorCvtLutInsts, false, hasTensorCvtLutInsts)
494GET_SUBTARGETINFO_MACRO(HasTransposeLoadF4F6Insts, false, hasTransposeLoadF4F6Insts)
495GET_SUBTARGETINFO_MACRO(HasTrapHandler, false, hasTrapHandler)
496GET_SUBTARGETINFO_MACRO(HasTrigReducedRange, false, hasTrigReducedRange)
497GET_SUBTARGETINFO_MACRO(HasTrue16BitInsts, false, hasTrue16BitInsts)
498GET_SUBTARGETINFO_MACRO(HasUnalignedAccessMode, false, hasUnalignedAccessMode)
499GET_SUBTARGETINFO_MACRO(HasUnalignedBufferAccess, false, hasUnalignedBufferAccess)
500GET_SUBTARGETINFO_MACRO(HasUnalignedDSAccess, false, hasUnalignedDSAccess)
501GET_SUBTARGETINFO_MACRO(HasUnalignedScratchAccess, false, hasUnalignedScratchAccess)
502GET_SUBTARGETINFO_MACRO(HasUnpackedD16VMem, false, hasUnpackedD16VMem)
503GET_SUBTARGETINFO_MACRO(HasUserSGPRInit16Bug, false, hasUserSGPRInit16Bug)
504GET_SUBTARGETINFO_MACRO(HasVALUTransUseHazard, false, hasVALUTransUseHazard)
505GET_SUBTARGETINFO_MACRO(HasVGPRIndexMode, false, hasVGPRIndexMode)
506GET_SUBTARGETINFO_MACRO(HasVMEMtoScalarWriteHazard, false, hasVMEMtoScalarWriteHazard)
507GET_SUBTARGETINFO_MACRO(HasVMemToLDSLoad, false, hasVMemToLDSLoad)
508GET_SUBTARGETINFO_MACRO(HasVOP3Literal, false, hasVOP3Literal)
509GET_SUBTARGETINFO_MACRO(HasVOP3PInsts, false, hasVOP3PInsts)
510GET_SUBTARGETINFO_MACRO(HasVOPDInsts, false, hasVOPDInsts)
511GET_SUBTARGETINFO_MACRO(HasVcmpxExecWARHazard, false, hasVcmpxExecWARHazard)
512GET_SUBTARGETINFO_MACRO(HasVcmpxPermlaneHazard, false, hasVcmpxPermlaneHazard)
513GET_SUBTARGETINFO_MACRO(HasVmemPrefInsts, false, hasVmemPrefInsts)
514GET_SUBTARGETINFO_MACRO(HasVmemWriteVgprInOrder, false, hasVmemWriteVgprInOrder)
515GET_SUBTARGETINFO_MACRO(HasVscnt, false, hasVscnt)
516GET_SUBTARGETINFO_MACRO(HasWaitXcnt, false, hasWaitXcnt)
517GET_SUBTARGETINFO_MACRO(HasXF32Insts, false, hasXF32Insts)
518GET_SUBTARGETINFO_MACRO(RequiresAlignVGPR, false, requiresAlignVGPR)
519GET_SUBTARGETINFO_MACRO(RequiresCOV6, false, requiresCOV6)
520GET_SUBTARGETINFO_MACRO(RequiresWaitsBeforeSystemScopeStores, false, requiresWaitsBeforeSystemScopeStores)
521GET_SUBTARGETINFO_MACRO(SupportsSRAMECC, false, supportsSRAMECC)
522GET_SUBTARGETINFO_MACRO(SupportsXNACK, false, supportsXNACK)
523GET_SUBTARGETINFO_MACRO(UseAddPC64Inst, false, useAddPC64Inst)
524GET_SUBTARGETINFO_MACRO(UseBlockVGPROpsForCSR, false, useBlockVGPROpsForCSR)
525GET_SUBTARGETINFO_MACRO(UseFlatForGlobal, false, useFlatForGlobal)
526
527#undef GET_SUBTARGETINFO_MACRO
528#endif // GET_SUBTARGETINFO_MACRO
529
530#ifdef GET_SUBTARGETINFO_MC_DESC
531#undef GET_SUBTARGETINFO_MC_DESC
532
533namespace llvm {
534
535// Sorted (by key) array of values for CPU features.
536extern const llvm::SubtargetFeatureKV AMDGPUFeatureKV[] = {
537 { "1024-addressable-vgprs", "Has 1024 addressable VGPRs", AMDGPU::Feature1024AddressableVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
538 { "16-bit-insts", "Has i16/f16 instructions", AMDGPU::Feature16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
539 { "45-bit-num-records-buffer-resource", "The buffer resource (V#) supports 45-bit num_records", AMDGPU::Feature45BitNumRecordsBufferResource, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
540 { "64-bit-literals", "Can use 64-bit literals with single DWORD instructions", AMDGPU::Feature64BitLiterals, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
541 { "a16", "Support A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands", AMDGPU::FeatureA16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
542 { "add-min-max-insts", "Has v_add_{min|max}_{i|u}32 instructions", AMDGPU::FeatureAddMinMaxInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
543 { "add-no-carry-insts", "Have VALU add/sub instructions without carry out", AMDGPU::FeatureAddNoCarryInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
544 { "add-sub-u64-insts", "Has v_add_u64 and v_sub_u64 instructions", AMDGPU::FeatureAddSubU64Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
545 { "addressablelocalmemorysize163840", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize163840, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
546 { "addressablelocalmemorysize32768", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize32768, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
547 { "addressablelocalmemorysize327680", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize327680, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
548 { "addressablelocalmemorysize65536", "The size of local memory in bytes", AMDGPU::FeatureAddressableLocalMemorySize65536, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
549 { "agent-scope-fine-grained-remote-memory-atomics", "Agent (device) scoped atomic operations, excluding those directly supported by PCIe (i.e. integer atomic add, exchange, and compare-and-swap), are functional for allocations in host or peer device memory.", AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
550 { "allocate1_5xvgprs", "Has 50% more physical VGPRs and 50% larger allocation granule", AMDGPU::Feature1_5xVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
551 { "aperture-regs", "Has Memory Aperture Base and Size Registers", AMDGPU::FeatureApertureRegs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
552 { "architected-flat-scratch", "Flat Scratch register is a readonly SPI initialized architected register", AMDGPU::FeatureArchitectedFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
553 { "architected-sgprs", "Enable the architected SGPRs", AMDGPU::FeatureArchitectedSGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
554 { "ashr-pk-insts", "Has Arithmetic Shift Pack instructions", AMDGPU::FeatureAshrPkInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
555 { "assembler-permissive-wavesize", "Allow parsing wave32 and wave64 variants of instructions", AMDGPU::FeatureAssemblerPermissiveWavesize, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
556 { "atomic-buffer-global-pk-add-f16-insts", "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that can return original value", AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts, { { { 0x0ULL, 0x100000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
557 { "atomic-buffer-global-pk-add-f16-no-rtn-insts", "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that don't return original value", AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts, { { { 0x0ULL, 0x100000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
558 { "atomic-buffer-pk-add-bf16-inst", "Has buffer_atomic_pk_add_bf16 instruction", AMDGPU::FeatureAtomicBufferPkAddBF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
559 { "atomic-csub-no-rtn-insts", "Has buffer_atomic_csub and global_atomic_csub instructions that don't return original value", AMDGPU::FeatureAtomicCSubNoRtnInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
560 { "atomic-ds-pk-add-16-insts", "Has ds_pk_add_bf16, ds_pk_add_f16, ds_pk_add_rtn_bf16, ds_pk_add_rtn_f16 instructions", AMDGPU::FeatureAtomicDsPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
561 { "atomic-fadd-no-rtn-insts", "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that don't return original value", AMDGPU::FeatureAtomicFaddNoRtnInsts, { { { 0x0ULL, 0x100000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
562 { "atomic-fadd-rtn-insts", "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that return original value", AMDGPU::FeatureAtomicFaddRtnInsts, { { { 0x0ULL, 0x100000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
563 { "atomic-flat-pk-add-16-insts", "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions", AMDGPU::FeatureAtomicFlatPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
564 { "atomic-fmin-fmax-flat-f32", "Has flat memory instructions for atomicrmw fmin/fmax for float", AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts, { { { 0x0ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
565 { "atomic-fmin-fmax-flat-f64", "Has flat memory instructions for atomicrmw fmin/fmax for double", AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts, { { { 0x0ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
566 { "atomic-fmin-fmax-global-f32", "Has global/buffer instructions for atomicrmw fmin/fmax for float", AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
567 { "atomic-fmin-fmax-global-f64", "Has global/buffer instructions for atomicrmw fmin/fmax for float", AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
568 { "atomic-global-pk-add-bf16-inst", "Has global_atomic_pk_add_bf16 instruction", AMDGPU::FeatureAtomicGlobalPkAddBF16Inst, { { { 0x0ULL, 0x100000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
569 { "auto-waitcnt-before-barrier", "Hardware automatically inserts waitcnt before barrier", AMDGPU::FeatureAutoWaitcntBeforeBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
570 { "back-off-barrier", "Hardware supports backing off s_barrier if an exception occurs", AMDGPU::FeatureBackOffBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
571 { "bf16-cvt-insts", "Has bf16 conversion instructions", AMDGPU::FeatureBF16ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
572 { "bf16-pk-insts", "Has bf16 packed instructions (fma, add, mul, max, min)", AMDGPU::FeatureBF16PackedInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
573 { "bf16-trans-insts", "Has bf16 transcendental instructions", AMDGPU::FeatureBF16TransInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
574 { "bf8-cvt-scale-insts", "Has bf8 conversion scale instructions", AMDGPU::FeatureBF8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
575 { "bitop3-insts", "Has v_bitop3_b32/v_bitop3_b16 instructions", AMDGPU::FeatureBitOp3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
576 { "block-vgpr-csr", "Use block load/store for VGPR callee saved registers", AMDGPU::FeatureUseBlockVGPROpsForCSR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
577 { "bvh-dual-bvh-8-insts", "Has image_bvh_dual_intersect_ray and image_bvh8_intersect_ray instructions", AMDGPU::FeatureBVHDualAndBVH8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
578 { "ci-insts", "Additional instructions for CI+", AMDGPU::FeatureCIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
579 { "clusters", "Has clusters of workgroups support", AMDGPU::FeatureClusters, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
580 { "cube-insts", "Has v_cube* instructions", AMDGPU::FeatureCubeInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
581 { "cumode", "Enable CU wavefront execution mode", AMDGPU::FeatureCuMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
582 { "cvt-fp8-vop1-bug", "FP8/BF8 VOP1 form of conversion to F32 is unreliable", AMDGPU::FeatureCvtFP8VOP1Bug, { { { 0x0ULL, 0x200000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
583 { "cvt-norm-insts", "Has v_cvt_norm* instructions", AMDGPU::FeatureCvtNormInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
584 { "cvt-pk-f16-f32-inst", "Has cvt_pk_f16_f32 instruction", AMDGPU::FeatureCvtPkF16F32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
585 { "cvt-pknorm-vop2-insts", "Has v_cvt_pk_norm_*f32 instructions/Has v_cvt_pk_norm_*_f16 instructions", AMDGPU::FeatureCvtPkNormVOP2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
586 { "cvt-pknorm-vop3-insts", "Has v_cvt_pk_norm_*f32 instructions/Has v_cvt_pk_norm_*_f16 instructions", AMDGPU::FeatureCvtPkNormVOP3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
587 { "d16-write-vgpr32", "D16 instructions potentially have 32-bit data dependencies", AMDGPU::FeatureD16Writes32BitVgpr, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
588 { "default-component-broadcast", "BUFFER/IMAGE store instructions set unspecified components to x component (GFX12)", AMDGPU::FeatureDefaultComponentBroadcast, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
589 { "default-component-zero", "BUFFER/IMAGE store instructions set unspecified components to zero (before GFX12)", AMDGPU::FeatureDefaultComponentZero, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
590 { "dl-insts", "Has v_fmac_f32 and v_xnor_b32 instructions", AMDGPU::FeatureDLInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
591 { "dot1-insts", "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", AMDGPU::FeatureDot1Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
592 { "dot10-insts", "Has v_dot2_f32_f16 instruction", AMDGPU::FeatureDot10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
593 { "dot11-insts", "Has v_dot4_f32_fp8_fp8, v_dot4_f32_fp8_bf8, v_dot4_f32_bf8_fp8, v_dot4_f32_bf8_bf8 instructions", AMDGPU::FeatureDot11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
594 { "dot12-insts", "Has v_dot2_f32_bf16 instructions", AMDGPU::FeatureDot12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
595 { "dot13-insts", "Has v_dot2c_f32_bf16 instructions", AMDGPU::FeatureDot13Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
596 { "dot2-insts", "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions", AMDGPU::FeatureDot2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
597 { "dot3-insts", "Has v_dot8c_i32_i4 instruction", AMDGPU::FeatureDot3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
598 { "dot4-insts", "Has v_dot2c_i32_i16 instruction", AMDGPU::FeatureDot4Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
599 { "dot5-insts", "Has v_dot2c_f32_f16 instruction", AMDGPU::FeatureDot5Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
600 { "dot6-insts", "Has v_dot4c_i32_i8 instruction", AMDGPU::FeatureDot6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
601 { "dot7-insts", "Has v_dot4_u32_u8, v_dot8_u32_u4 instructions", AMDGPU::FeatureDot7Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
602 { "dot8-insts", "Has v_dot4_i32_iu8, v_dot8_i32_iu4 instructions", AMDGPU::FeatureDot8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
603 { "dot9-insts", "Has v_dot2_f16_f16, v_dot2_bf16_bf16 instructions", AMDGPU::FeatureDot9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
604 { "dpp", "Support DPP (Data Parallel Primitives) extension", AMDGPU::FeatureDPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
605 { "dpp-64bit", "Support DPP (Data Parallel Primitives) extension in DP ALU", AMDGPU::FeatureDPALU_DPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
606 { "dpp-src1-sgpr", "Support SGPR for Src1 of DPP instructions", AMDGPU::FeatureDPPSrc1SGPR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
607 { "dpp8", "Support DPP8 (Data Parallel Primitives) extension", AMDGPU::FeatureDPP8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
608 { "ds-src2-insts", "Has ds_*_src2 instructions", AMDGPU::FeatureDsSrc2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
609 { "dumpcode", "Dump MachineInstrs in the CodeEmitter", AMDGPU::FeatureDumpCodeLower, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
610 { "emulated-system-scope-atomics", "System scope atomics unsupported by the PCI-e are emulated in HW via CAS loop and functional.", AMDGPU::FeatureEmulatedSystemScopeAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
611 { "enable-ds128", "Use ds_{read|write}_b128", AMDGPU::FeatureEnableDS128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
612 { "enable-flat-scratch", "Use scratch_* flat memory instructions to access scratch", AMDGPU::FeatureEnableFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
613 { "enable-prt-strict-null", "Enable zeroing of result registers for sparse texture fetches", AMDGPU::FeatureEnablePRTStrictNull, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
614 { "extended-image-insts", "Support mips != 0, lod != 0, gather4, and get_lod", AMDGPU::FeatureExtendedImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
615 { "f16bf16-to-fp6bf6-cvt-scale-insts", "Has f16bf16 to fp6bf6 conversion scale instructions", AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
616 { "f32-to-f16bf16-cvt-sr-insts", "Has f32 to f16bf16 conversion scale instructions", AMDGPU::FeatureF32ToF16BF16ConversionSRInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
617 { "fast-denormal-f32", "Enabling denormals does not cause f32 instructions to run at f64 rates", AMDGPU::FeatureFastDenormalF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
618 { "fast-fmaf", "Assuming f32 fma is at least as fast as mul + add", AMDGPU::FeatureFastFMAF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
619 { "flat-address-space", "Support flat address space", AMDGPU::FeatureFlatAddressSpace, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
620 { "flat-atomic-fadd-f32-inst", "Has flat_atomic_add_f32 instruction", AMDGPU::FeatureFlatAtomicFaddF32Inst, { { { 0x0ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
621 { "flat-buffer-global-fadd-f64-inst", "Has flat, buffer, and global instructions for f64 atomic fadd", AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
622 { "flat-for-global", "Force to generate flat instruction for global", AMDGPU::FeatureUseFlatForGlobal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
623 { "flat-global-insts", "Have global_* flat memory instructions", AMDGPU::FeatureFlatGlobalInsts, { { { 0x0ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
624 { "flat-gvs-mode", "Have GVS addressing mode with flat_* instructions", AMDGPU::FeatureFlatGVSMode, { { { 0x0ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
625 { "flat-inst-offsets", "Flat instructions have immediate offset addressing mode", AMDGPU::FeatureFlatInstOffsets, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
626 { "flat-scratch-insts", "Have scratch_* flat memory instructions", AMDGPU::FeatureFlatScratchInsts, { { { 0x0ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
627 { "flat-segment-offset-bug", "GFX10 bug where inst_offset is ignored when flat instructions access global memory", AMDGPU::FeatureFlatSegmentOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
628 { "fma-mix-bf16-insts", "Has v_fma_mix_f32_bf16, v_fma_mixlo_bf16, v_fma_mixhi_bf16 instructions", AMDGPU::FeatureFmaMixBF16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
629 { "fma-mix-insts", "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", AMDGPU::FeatureFmaMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
630 { "fmacf64-inst", "Has v_fmac_f64 instruction", AMDGPU::FeatureFmacF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
631 { "fmaf", "Enable single precision FMA (not as fast as mul+add, but fused)", AMDGPU::FeatureFMA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
632 { "fp4-cvt-scale-insts", "Has fp4 conversion scale instructions", AMDGPU::FeatureFP4ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
633 { "fp64", "Enable double precision operations", AMDGPU::FeatureFP64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
634 { "fp6bf6-cvt-scale-insts", "Has fp6 and bf6 conversion scale instructions", AMDGPU::FeatureFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
635 { "fp8-conversion-insts", "Has fp8 and bf8 conversion instructions", AMDGPU::FeatureFP8ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
636 { "fp8-cvt-scale-insts", "Has fp8 conversion scale instructions", AMDGPU::FeatureFP8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
637 { "fp8-insts", "Has fp8 and bf8 instructions", AMDGPU::FeatureFP8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
638 { "fp8e5m3-insts", "Has fp8 e5m3 format support", AMDGPU::FeatureFP8E5M3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
639 { "full-rate-64-ops", "Most fp64 instructions are full rate", AMDGPU::FeatureFullRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
640 { "g16", "Support G16 for 16-bit gradient image operands", AMDGPU::FeatureG16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
641 { "gcn3-encoding", "Encoding format for VI", AMDGPU::FeatureGCN3Encoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
642 { "gds", "Has Global Data Share", AMDGPU::FeatureGDS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
643 { "get-wave-id-inst", "Has s_get_waveid_in_workgroup instruction", AMDGPU::FeatureGetWaveIdInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
644 { "gfx10", "GFX10 GPU generation", AMDGPU::FeatureGFX10, { { { 0x131a9000f0044a2ULL, 0x400155271e008000ULL, 0x4080c1004108190ULL, 0x1438070000023350ULL, 0x0ULL, 0x0ULL, } } } },
645 { "gfx10-3-insts", "Additional instructions for GFX10.3", AMDGPU::FeatureGFX10_3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
646 { "gfx10-insts", "Additional instructions for GFX10+", AMDGPU::FeatureGFX10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
647 { "gfx10_a-encoding", "Has BVH ray tracing instructions", AMDGPU::FeatureGFX10_AEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
648 { "gfx10_b-encoding", "Encoding format GFX10_B", AMDGPU::FeatureGFX10_BEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
649 { "gfx11", "GFX11 GPU generation", AMDGPU::FeatureGFX11, { { { 0x131a900030044a2ULL, 0x402f55271e008000ULL, 0x4080c1002108180ULL, 0x1470074000020000ULL, 0x0ULL, 0x0ULL, } } } },
650 { "gfx11-insts", "Additional instructions for GFX11+", AMDGPU::FeatureGFX11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
651 { "gfx12", "GFX12 GPU generation", AMDGPU::FeatureGFX12, { { { 0xb00100030060a2ULL, 0xaf51271e000000ULL, 0x80c1602100184ULL, 0x1070074000000000ULL, 0x0ULL, 0x0ULL, } } } },
652 { "gfx12-insts", "Additional instructions for GFX12+", AMDGPU::FeatureGFX12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
653 { "gfx1250-insts", "Additional instructions for GFX1250+", AMDGPU::FeatureGFX1250Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
654 { "gfx13", "GFX13 GPU generation", AMDGPU::FeatureGFX13, { { { 0xb00100030060a2ULL, 0x2af51271e000000ULL, 0x80c1602100194ULL, 0x1070074000000000ULL, 0x0ULL, 0x0ULL, } } } },
655 { "gfx13-insts", "Additional instructions for GFX13+", AMDGPU::FeatureGFX13Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x10008ULL, 0x0ULL, 0x0ULL, } } } },
656 { "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", AMDGPU::FeatureGFX7GFX8GFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
657 { "gfx8-insts", "Additional instructions for GFX8+", AMDGPU::FeatureGFX8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
658 { "gfx9", "GFX9 GPU generation", AMDGPU::FeatureGFX9, { { { 0x111a900000040a2ULL, 0x40005a071e000000ULL, 0xc00010000008180ULL, 0x42a070080d23350ULL, 0x2ULL, 0x0ULL, } } } },
659 { "gfx9-insts", "Additional instructions for GFX9+", AMDGPU::FeatureGFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
660 { "gfx90a-insts", "Additional instructions for GFX90A+", AMDGPU::FeatureGFX90AInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
661 { "gfx940-insts", "Additional instructions for GFX940+", AMDGPU::FeatureGFX940Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
662 { "gfx950-insts", "Additional instructions for GFX950+", AMDGPU::FeatureGFX950Insts, { { { 0x400200020000ULL, 0x5b0000ULL, 0x3000c00000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
663 { "globally-addressable-scratch", "FLAT instructions can access scratch memory for any thread in any wave", AMDGPU::FeatureGloballyAddressableScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
664 { "gws", "Has Global Wave Sync", AMDGPU::FeatureGWS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
665 { "half-rate-64-ops", "Most fp64 instructions are half rate instead of quarter", AMDGPU::FeatureHalfRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
666 { "ieee-minimum-maximum-insts", "Has v_minimum/maximum_f16/f32/f64, v_minimummaximum/maximumminimum_f16/f32 andv_pk_minimum/maximum_f16 instructions", AMDGPU::FeatureIEEEMinimumMaximumInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
667 { "image-gather4-d16-bug", "Image Gather4 D16 hardware bug", AMDGPU::FeatureImageGather4D16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
668 { "image-insts", "Support image instructions", AMDGPU::FeatureImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
669 { "image-store-d16-bug", "Image Store D16 hardware bug", AMDGPU::FeatureImageStoreD16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
670 { "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", AMDGPU::FeatureInstFwdPrefetchBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
671 { "int-clamp-insts", "Support clamp for integer destination", AMDGPU::FeatureIntClamp, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
672 { "inv-2pi-inline-imm", "Has 1 / (2 * pi) as inline immediate", AMDGPU::FeatureInv2PiInlineImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
673 { "kernarg-preload", "Hardware supports preloading of kernel arguments in user SGPRs.", AMDGPU::FeatureKernargPreload, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
674 { "lds-barrier-arrive-atomic", "Has LDS barrier-arrive atomic instructions", AMDGPU::FeatureLdsBarrierArriveAtomic, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
675 { "lds-branch-vmem-war-hazard", "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", AMDGPU::FeatureLdsBranchVmemWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
676 { "lds-misaligned-bug", "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode", AMDGPU::FeatureLDSMisalignedBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
677 { "ldsbankcount16", "The number of LDS banks per compute unit.", AMDGPU::FeatureLDSBankCount16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
678 { "ldsbankcount32", "The number of LDS banks per compute unit.", AMDGPU::FeatureLDSBankCount32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
679 { "lerp-inst", "Has v_lerp_u8 instruction", AMDGPU::FeatureLerpInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
680 { "load-store-opt", "Enable SI load/store optimizer pass", AMDGPU::FeatureEnableLoadStoreOpt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
681 { "lshl-add-u64-inst", "Has v_lshl_add_u64 instruction", AMDGPU::FeatureLshlAddU64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
682 { "mad-intra-fwd-bug", "MAD_U64/I64 intra instruction forwarding bug", AMDGPU::FeatureMADIntraFwdBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
683 { "mad-mac-f32-insts", "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions", AMDGPU::FeatureMadMacF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
684 { "mad-mix-insts", "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", AMDGPU::FeatureMadMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
685 { "mad-u32-inst", "Has v_mad_u32 instruction", AMDGPU::FeatureMadU32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
686 { "mai-insts", "Has mAI instructions", AMDGPU::FeatureMAIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
687 { "max-hard-clause-length-32", "Maximum number of instructions in an explicit S_CLAUSE is 32", AMDGPU::FeatureMaxHardClauseLength32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
688 { "max-hard-clause-length-63", "Maximum number of instructions in an explicit S_CLAUSE is 63", AMDGPU::FeatureMaxHardClauseLength63, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
689 { "max-private-element-size-16", "Maximum private access size may be 16", AMDGPU::FeatureMaxPrivateElementSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
690 { "max-private-element-size-4", "Maximum private access size may be 4", AMDGPU::FeatureMaxPrivateElementSize4, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
691 { "max-private-element-size-8", "Maximum private access size may be 8", AMDGPU::FeatureMaxPrivateElementSize8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
692 { "mcast-load-insts", "Has multicast load instructions", AMDGPU::FeatureMcastLoadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
693 { "memory-atomic-fadd-f32-denormal-support", "global/flat/buffer atomic fadd for float supports denormal handling", AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
694 { "mfma-inline-literal-bug", "MFMA cannot use inline literal as SrcC", AMDGPU::FeatureMFMAInlineLiteralBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
695 { "mimg-r128", "Support 128-bit texture resources", AMDGPU::FeatureMIMG_R128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
696 { "min3-max3-pkf16", "Has v_pk_min3_num_f16 and v_pk_max3_num_f16 instructions", AMDGPU::FeatureMin3Max3PKF16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
697 { "minimum3-maximum3-f16", "Has v_minimum3_f16 and v_maximum3_f16 instructions", AMDGPU::FeatureMinimum3Maximum3F16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
698 { "minimum3-maximum3-f32", "Has v_minimum3_f32 and v_maximum3_f32 instructions", AMDGPU::FeatureMinimum3Maximum3F32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
699 { "minimum3-maximum3-pkf16", "Has v_pk_minimum3_f16 and v_pk_maximum3_f16 instructions", AMDGPU::FeatureMinimum3Maximum3PKF16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
700 { "movrel", "Has v_movrel*_b32 instructions", AMDGPU::FeatureMovrel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
701 { "msaa-load-dst-sel-bug", "MSAA loads not honoring dst_sel bug", AMDGPU::FeatureMSAALoadDstSelBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
702 { "negative-scratch-offset-bug", "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9", AMDGPU::FeatureNegativeScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
703 { "negative-unaligned-scratch-offset-bug", "Scratch instructions with a VGPR offset and a negative immediate offset thatis not a multiple of 4 read wrong memory on GFX10", AMDGPU::FeatureNegativeUnalignedScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
704 { "no-data-dep-hazard", "Does not need SW waitstates", AMDGPU::FeatureNoDataDepHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
705 { "no-sdst-cmpx", "V_CMPX does not write VCC/SGPR in addition to EXEC", AMDGPU::FeatureNoSdstCMPX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
706 { "nsa-clause-bug", "MIMG-NSA in a hard clause has unpredictable results on GFX10.1", AMDGPU::FeatureNSAClauseBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
707 { "nsa-encoding", "Support NSA encoding for image instructions", AMDGPU::FeatureNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
708 { "nsa-to-vmem-bug", "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", AMDGPU::FeatureNSAtoVMEMBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
709 { "offset-3f-bug", "Branch offset of 3f hardware bug", AMDGPU::FeatureOffset3fBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
710 { "packed-fp32-ops", "Support packed fp32 instructions", AMDGPU::FeaturePackedFP32Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
711 { "packed-tid", "Workitem IDs are packed into v0 at kernel launch", AMDGPU::FeaturePackedTID, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
712 { "partial-nsa-encoding", "Support partial NSA encoding for image instructions", AMDGPU::FeaturePartialNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
713 { "permlane16-swap", "Has v_permlane16_swap_b32 instructions", AMDGPU::FeaturePermlane16Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
714 { "permlane32-swap", "Has v_permlane32_swap_b32 instructions", AMDGPU::FeaturePermlane32Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
715 { "pk-add-min-max-insts", "Has v_pk_add_{min|max}_{i|u}16 instructions", AMDGPU::FeaturePkAddMinMaxInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
716 { "pk-fmac-f16-inst", "Has v_pk_fmac_f16 instruction", AMDGPU::FeaturePkFmacF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
717 { "point-sample-accel", "Has point sample acceleration feature", AMDGPU::FeaturePointSampleAccel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
718 { "precise-memory", "Enable precise memory mode", AMDGPU::FeaturePreciseMemory, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
719 { "priv-enabled-trap2-nop-bug", "Hardware that runs with PRIV=1 interpreting 's_trap 2' as a nop bug", AMDGPU::FeaturePrivEnabledTrap2NopBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
720 { "prng-inst", "Has v_prng_b32 instruction", AMDGPU::FeaturePrngInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
721 { "promote-alloca", "Enable promote alloca pass", AMDGPU::FeaturePromoteAlloca, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
722 { "pseudo-scalar-trans", "Has Pseudo Scalar Transcendental instructions", AMDGPU::FeaturePseudoScalarTrans, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
723 { "qsad-insts", "Has v_qsad* instructions", AMDGPU::FeatureQsadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
724 { "r128-a16", "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128", AMDGPU::FeatureR128A16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
725 { "real-true16", "Use true 16-bit registers", AMDGPU::FeatureRealTrue16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
726 { "relaxed-buffer-oob-mode", "Disable strict out-of-bounds buffer guarantees. An OOB access may potentiallycause an adjacent access to be treated as if it were also OOB", AMDGPU::FeatureRelaxedBufferOOBMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
727 { "required-export-priority", "Export priority must be explicitly manipulated on GFX11.5", AMDGPU::FeatureRequiredExportPriority, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
728 { "requires-cov6", "Target Requires Code Object V6", AMDGPU::FeatureRequiresCOV6, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
729 { "restricted-soffset", "Has restricted SOffset (immediate not supported).", AMDGPU::FeatureRestrictedSOffset, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
730 { "s-barrier-leave-imm", "s_barrier_leave takes an immediate operand", AMDGPU::FeatureSBarrierLeaveImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
731 { "s-memrealtime", "Has s_memrealtime instruction", AMDGPU::FeatureSMemRealTime, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
732 { "s-memtime-inst", "Has s_memtime instruction", AMDGPU::FeatureSMemTimeInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
733 { "s-wakeup-barrier-inst", "Has s_wakeup_barrier instruction.", AMDGPU::FeatureSWakeupBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
734 { "s-wakeup-imm", "s_wakeup takes an immediate operand", AMDGPU::FeatureSWakeupImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
735 { "sad-insts", "Has v_sad* instructions", AMDGPU::FeatureSadInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
736 { "safe-cu-prefetch", "VMEM CU scope prefetches do not fail on illegal address", AMDGPU::FeatureSafeCUPrefetch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
737 { "safe-smem-prefetch", "SMEM prefetches do not fail on illegal address", AMDGPU::FeatureSafeSmemPrefetch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
738 { "salu-float", "Has SALU floating point instructions", AMDGPU::FeatureSALUFloatInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
739 { "scalar-atomics", "Has atomic scalar memory instructions", AMDGPU::FeatureScalarAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
740 { "scalar-dwordx3-loads", "Has 96-bit scalar load instructions", AMDGPU::FeatureScalarDwordx3Loads, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
741 { "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", AMDGPU::FeatureScalarFlatScratchInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
742 { "scalar-stores", "Has store scalar memory instructions", AMDGPU::FeatureScalarStores, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
743 { "sdwa", "Support SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
744 { "sdwa-mav", "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAMac, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
745 { "sdwa-omod", "Support OMod with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAOmod, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
746 { "sdwa-out-mods-vopc", "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAOutModsVOPC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
747 { "sdwa-scalar", "Support scalar register with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWAScalar, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
748 { "sdwa-sdst", "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", AMDGPU::FeatureSDWASdst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
749 { "sea-islands", "SEA_ISLANDS GPU generation", AMDGPU::FeatureSeaIslands, { { { 0x10089000f000400ULL, 0x40000c0012008040ULL, 0x400001000508010ULL, 0x400012000022000ULL, 0x2ULL, 0x0ULL, } } } },
750 { "setprio-inc-wg-inst", "Has s_setprio_inc_wg instruction.", AMDGPU::FeatureSetPrioIncWgInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
751 { "setreg-vgpr-msb-fixup", "S_SETREG to MODE clobbers VGPR MSB bits, requires fixup", AMDGPU::FeatureSetregVGPRMSBFixup, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
752 { "sgpr-init-bug", "VI SGPR initialization bug requiring a fixed SGPR allocation size", AMDGPU::FeatureSGPRInitBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
753 { "shader-cycles-hi-lo-registers", "Has SHADER_CYCLES_HI/LO hardware registers", AMDGPU::FeatureShaderCyclesHiLoRegisters, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
754 { "shader-cycles-register", "Has SHADER_CYCLES hardware register", AMDGPU::FeatureShaderCyclesRegister, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
755 { "si-scheduler", "Enable SI Machine Scheduler", AMDGPU::FeatureEnableSIScheduler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
756 { "smem-to-vector-write-hazard", "s_load_dword followed by v_cmp page faults", AMDGPU::FeatureSMEMtoVectorWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
757 { "southern-islands", "SOUTHERN_ISLANDS GPU generation", AMDGPU::FeatureSouthernIslands, { { { 0x10088000a000200ULL, 0x4000040002008040ULL, 0x1000508810ULL, 0x400002000022000ULL, 0x2ULL, 0x0ULL, } } } },
758 { "sramecc", "Enable SRAMECC", AMDGPU::FeatureSRAMECC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
759 { "sramecc-support", "Hardware supports SRAMECC", AMDGPU::FeatureSupportsSRAMECC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
760 { "tanh-insts", "Has v_tanh_f32/f16 instructions", AMDGPU::FeatureTanhInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
761 { "tensor-cvt-lut-insts", "Has v_perm_pk16* instructions", AMDGPU::FeatureTensorCvtLutInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
762 { "tgsplit", "Enable threadgroup split execution", AMDGPU::FeatureTgSplit, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
763 { "transpose-load-f4f6-insts", "Has ds_load_tr4/tr6 and global_load_tr4/tr6 instructions", AMDGPU::FeatureTransposeLoadF4F6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
764 { "trap-handler", "Trap handler support", AMDGPU::FeatureTrapHandler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
765 { "trig-reduced-range", "Requires use of fract on arguments to trig instructions", AMDGPU::FeatureTrigReducedRange, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
766 { "true16", "True 16-bit operand instructions", AMDGPU::FeatureTrue16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
767 { "unaligned-access-mode", "Enable unaligned global, local and region loads and stores if the hardware supports it", AMDGPU::FeatureUnalignedAccessMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
768 { "unaligned-buffer-access", "Hardware supports unaligned global loads and stores", AMDGPU::FeatureUnalignedBufferAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
769 { "unaligned-ds-access", "Hardware supports unaligned local and region loads and stores", AMDGPU::FeatureUnalignedDSAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
770 { "unaligned-scratch-access", "Support unaligned scratch loads and stores", AMDGPU::FeatureUnalignedScratchAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
771 { "unpacked-d16-vmem", "Has unpacked d16 vmem instructions", AMDGPU::FeatureUnpackedD16VMem, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
772 { "unsafe-ds-offset-folding", "Force using DS instruction immediate offsets on SI", AMDGPU::FeatureEnableUnsafeDSOffsetFolding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
773 { "use-add-pc64-inst", "Use s_add_pc_i64 instruction.", AMDGPU::FeatureUseAddPC64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
774 { "user-sgpr-init16-bug", "Bug requiring at least 16 user+system SGPRs to be enabled", AMDGPU::FeatureUserSGPRInit16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
775 { "valu-trans-use-hazard", "Hazard when TRANS instructions are closely followed by a use of the result", AMDGPU::FeatureVALUTransUseHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
776 { "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", AMDGPU::FeatureVcmpxExecWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
777 { "vcmpx-permlane-hazard", "TODO: describe me", AMDGPU::FeatureVcmpxPermlaneHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
778 { "vgpr-align2", "VGPR and AGPR tuple operands require even alignment", AMDGPU::FeatureRequiresAlignedVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
779 { "vgpr-index-mode", "Has VGPR mode register indexing", AMDGPU::FeatureVGPRIndexMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
780 { "vmem-pref-insts", "Has flat_prefect_b8 and global_prefetch_b8 instructions", AMDGPU::FeatureVmemPrefInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
781 { "vmem-to-lds-load-insts", "The platform has memory to lds instructions (global_load w/lds bit set, buffer_loadw/lds bit set or global_load_lds. This does not include scratch_load_lds.", AMDGPU::FeatureVMemToLDSLoad, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
782 { "vmem-to-scalar-write-hazard", "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", AMDGPU::FeatureVMEMtoScalarWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
783 { "vmem-write-vgpr-in-order", "VMEM instructions of the same type write VGPR results in order", AMDGPU::FeatureVmemWriteVgprInOrder, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
784 { "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", AMDGPU::FeatureVolcanicIslands, { { { 0x110890000000402ULL, 0x40001e0016008040ULL, 0x400001000508190ULL, 0x4020120008230b0ULL, 0x2ULL, 0x0ULL, } } } },
785 { "vop3-literal", "Can use one literal in VOP3", AMDGPU::FeatureVOP3Literal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
786 { "vop3p", "Has VOP3P packed instructions", AMDGPU::FeatureVOP3PInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
787 { "vopd", "Has VOPD dual issue wave32 instructions", AMDGPU::FeatureVOPDInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
788 { "vscnt", "Has separate store vscnt counter", AMDGPU::FeatureVscnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
789 { "wait-xcnt", "Has s_wait_xcnt instruction", AMDGPU::FeatureWaitXcnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
790 { "waits-before-system-scope-stores", "Target requires waits for loads and atomics before system scope stores", AMDGPU::FeatureWaitsBeforeSystemScopeStores, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
791 { "wavefrontsize16", "The number of threads per wavefront", AMDGPU::FeatureWavefrontSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
792 { "wavefrontsize32", "The number of threads per wavefront", AMDGPU::FeatureWavefrontSize32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
793 { "wavefrontsize64", "The number of threads per wavefront", AMDGPU::FeatureWavefrontSize64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
794 { "xf32-insts", "Has instructions that support xf32 format, such as v_mfma_f32_16x16x8_xf32 and v_mfma_f32_32x32x4_xf32", AMDGPU::FeatureXF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
795 { "xnack", "Enable XNACK support", AMDGPU::FeatureXNACK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
796 { "xnack-support", "Hardware supports XNACK", AMDGPU::FeatureSupportsXNACK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
797};
798
799#ifdef DBGFIELD
800#error "<target>GenSubtargetInfo.inc requires a DBGFIELD macro"
801#endif
802#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
803#define DBGFIELD(x) x,
804#define DBGVAL_OR_NULLPTR(x) x
805#else
806#define DBGFIELD(x)
807#define DBGVAL_OR_NULLPTR(x) nullptr
808#endif
809
810// ===============================================================
811// Data tables for the new per-operand machine model.
812
813// {ProcResourceIdx, ReleaseAtCycle, AcquireAtCycle}
814extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[] = {
815 { 0, 0, 0 }, // Invalid
816 { 4, 1, 0}, // #1
817 { 5, 1, 0}, // #2
818 { 5, 2, 0}, // #3
819 { 6, 1, 0}, // #4
820 { 3, 1, 0}, // #5
821 { 6, 1, 0}, // #6
822 { 3, 2, 0}, // #7
823 { 2, 1, 0}, // #8
824 { 1, 1, 0}, // #9
825 { 6, 3, 0}, // #10
826 { 7, 2, 0}, // #11
827 { 7, 8, 0}, // #12
828 { 7, 16, 0}, // #13
829 { 4, 1, 0}, // #14
830 { 7, 1, 0}, // #15
831 { 4, 2, 0}, // #16
832 { 7, 2, 0}, // #17
833 { 4, 1, 0}, // #18
834 { 8, 1, 0}, // #19
835 { 3, 1, 0}, // #20
836 { 4, 2, 0}, // #21
837 { 8, 1, 0}, // #22
838 { 3, 1, 0}, // #23
839 { 4, 1, 0}, // #24
840 { 3, 2, 0}, // #25
841 { 4, 2, 0}, // #26
842 { 2, 1, 0}, // #27
843 { 4, 1, 0}, // #28
844 { 4, 2, 0}, // #29
845 { 5, 1, 0}, // #30
846 { 7, 1, 0}, // #31
847 { 4, 1, 0}, // #32
848 { 6, 1, 0}, // #33
849 { 4, 1, 0}, // #34
850 { 6, 1, 0}, // #35
851 { 7, 1, 0}, // #36
852 { 4, 3, 0}, // #37
853 { 8, 3, 0}, // #38
854 { 4, 2, 0}, // #39
855 { 6, 2, 0}, // #40
856 { 3, 1, 0}, // #41
857 { 4, 2, 0}, // #42
858 { 7, 1, 0}, // #43
859 { 4, 2, 0}, // #44
860 { 5, 1, 0}, // #45
861 { 6, 1, 0}, // #46
862 { 4, 3, 0}, // #47
863 { 7, 3, 0}, // #48
864 { 9, 8, 0}, // #49
865 { 9, 16, 0}, // #50
866 { 5, 4, 0}, // #51
867 { 5, 8, 0}, // #52
868 { 7, 4, 0}, // #53
869 { 5, 16, 0} // #54
870}; // AMDGPUWriteProcResTable
871
872// {Cycles, WriteResourceID}
873extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[] = {
874 { 0, 0}, // Invalid
875 { 1, 0}, // #1 WriteSALU_Write32Bit_WriteFloatFMA_WriteDoubleAdd_Write64Bit_WriteDoubleCvt_WriteIntMul
876 { 1, 0}, // #2 Write32Bit_WriteSALU_Write64Bit
877 { 1, 0}, // #3 Write32Bit
878 {80, 0}, // #4 WriteVMEM
879 {80, 0}, // #5 WriteVMEM
880 { 5, 0}, // #6 WriteLDS_WriteSMEM_Write32Bit_WriteFloatCvt_WriteFloatFMA
881 { 5, 0}, // #7 WriteLDS_Write32Bit
882 { 5, 0}, // #8 WriteLDS
883 { 4, 0}, // #9 WriteExport_WriteTrans32_WriteFloatCvt_WriteDoubleCvt_WriteIntMul_WriteQuarterRate32_WriteSFPU_WriteTrans64_Write4PassDGEMM_Write4PassMAI
884 { 8, 0}, // #10 WriteBranch_WriteDoubleAdd_Write8PassMAI_WriteIntMul_WriteQuarterRate32_WritePseudoScalarTrans_WriteXDL2PassWMMA_Write8PassDGEMM
885 {500, 0}, // #11 WriteBarrier
886 { 1, 0}, // #12 WriteSALU
887 { 2, 0}, // #13 Write64Bit_Write2PassMAI_WriteSALU_WriteDoubleAdd
888 {16, 0}, // #14 WriteFloatFMA_WriteDouble_WriteTrans64_Write16PassMAI_WriteExport_WriteXDL4PassWMMA_Write4PassWMMA_Write16PassDGEMM
889 {16, 0}, // #15 WriteFloatFMA_WriteDouble
890 { 1, 0}, // #16 WriteSALU
891 { 4, 0}, // #17 WriteIntMul_WriteDouble
892 { 1, 0}, // #18 WriteSALU
893 { 2, 0}, // #19 Write64Bit
894 { 2, 0}, // #20 Write64Bit
895 {80, 0}, // #21 WriteVMEM
896 {80, 0}, // #22 WriteVMEM
897 {80, 0}, // #23 WriteVMEM
898 { 8, 0}, // #24 WriteDoubleAdd
899 { 1, 0}, // #25 Write32Bit
900 {320, 0}, // #26 WriteVMEM
901 {320, 0}, // #27 WriteVMEM
902 {20, 0}, // #28 WriteLDS_WriteSMEM
903 {20, 0}, // #29 WriteLDS
904 {20, 0}, // #30 WriteLDS
905 {32, 0}, // #31 WriteBranch_WriteDoubleAdd_WriteDoubleCvt
906 {2000, 0}, // #32 WriteBarrier
907 { 2, 0}, // #33 WriteSALU
908 { 6, 0}, // #34 Write64Bit_WriteQuarterRate32
909 { 5, 0}, // #35 Write32Bit_WriteFloatFMA
910 { 2, 0}, // #36 WriteSALU
911 {22, 0}, // #37 WriteDoubleAdd_WriteDoubleCvt
912 {10, 0}, // #38 WriteTrans32
913 {22, 0}, // #39 WriteDouble
914 { 2, 0}, // #40 WriteSALU
915 { 8, 0}, // #41 WriteIntMul
916 { 2, 0}, // #42 WriteSALU
917 {24, 0}, // #43 WriteTrans64
918 { 6, 0}, // #44 Write64Bit
919 { 6, 0}, // #45 Write64Bit
920 {320, 0}, // #46 WriteVMEM
921 {320, 0}, // #47 WriteVMEM
922 {320, 0}, // #48 WriteVMEM
923 {22, 0}, // #49 WriteDoubleAdd
924 { 5, 0}, // #50 Write32Bit
925 {38, 0}, // #51 WriteDoubleAdd_WriteDoubleCvt_WriteTrans64
926 {38, 0}, // #52 WriteDouble
927 { 2, 0}, // #53 WriteSALU
928 {40, 0}, // #54 WriteTrans64
929 {38, 0}, // #55 WriteDoubleAdd
930 { 5, 0}, // #56 Write32Bit
931 { 7, 0}, // #57 WritePseudoScalarTrans_Write64Bit_WriteTrans32
932 { 2, 0}, // #58 WriteSALU
933 { 7, 0}, // #59 Write64Bit
934 {32, 0}, // #60 WriteDouble
935 { 2, 0}, // #61 WriteSALU
936 {11, 0}, // #62 WriteIntMul
937 { 2, 0}, // #63 WriteSALU
938 { 7, 0}, // #64 Write64Bit
939 { 7, 0}, // #65 Write64Bit
940 {32, 0}, // #66 WriteDoubleAdd
941 { 5, 0}, // #67 Write32Bit
942 { 2, 0}, // #68 WriteDoubleAdd
943 { 1, 0} // #69 Write32Bit
944}; // AMDGPUWriteLatencyTable
945
946// {UseIdx, WriteResourceID, Cycles}
947extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[] = {
948 {0, 0, 0}, // Invalid
949 {0, 0, -4}, // #1
950 {0, 0, -2} // #2
951}; // AMDGPUReadAdvanceTable
952
953// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
954static const llvm::MCSchedClassDesc SIQuarterSpeedModelSchedClasses[] = {
955 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
956 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
957 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
958 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 2, 2, 0, 0}, // #3
959 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
960 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
961 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
962 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 7, 2, 0, 0}, // #7
963 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
964 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
965 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
966 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
967 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
968 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
969 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
970 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 12, 2, 0, 0}, // #15
971 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
972 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 2, 1, 10, 1, 0, 0}, // #17
973 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #18
974 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
975 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
976 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #21
977 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 2, 1, 14, 1, 0, 0}, // #22
978 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 2, 1, 14, 1, 0, 0}, // #23
979 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 15, 2, 0, 0}, // #24
980 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 15, 2, 0, 0}, // #25
981 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 17, 2, 0, 0}, // #26
982 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #27
983 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
984 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 14, 1, 0, 0}, // #29
985 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 3, 1, 19, 2, 0, 0}, // #30
986 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
987 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
988 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 24, 2, 0, 0}, // #33
989 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
990 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #35
991 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #36
992 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #37
993 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #38
994 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
995 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #40
996 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #41
997 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #42
998 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #43
999 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1000 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #45
1001 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #46
1002 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #47
1003 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1004 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49
1005 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50
1006 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #51
1007 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #52
1008 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #53
1009 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1010 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1011 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1012 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 40291) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1013 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41492) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1014 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42138) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1015 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42290) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1016 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43712) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1017 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 46520) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1018 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 46557) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1019 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46635) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1020 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46763) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1021 {DBGFIELD(/*Write32Bit*/ 47015) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1022 {DBGFIELD(/*Write64Bit*/ 47026) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #67
1023 {DBGFIELD(/*WriteSALU*/ 47037) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1024 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 47047) 1, false, false, true, 2, 1, 13, 1, 2, 1}, // #69
1025 {DBGFIELD(/*Write64Bit_ReadDefault*/ 47069) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #70
1026 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 47092) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1027 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 47118) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1028 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 47143) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1029 {DBGFIELD(/*WriteXDL4PassWMMA*/ 47168) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1030 {DBGFIELD(/*WriteXDL2PassWMMA*/ 47186) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1031}; // SIQuarterSpeedModelSchedClasses
1032
1033// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1034static const llvm::MCSchedClassDesc GFX10SpeedModelSchedClasses[] = {
1035 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1036 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #1
1037 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #2
1038 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #3
1039 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 18, 2, 26, 1, 0, 0}, // #4
1040 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 20, 3, 27, 2, 0, 0}, // #5
1041 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #6
1042 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 25, 2, 29, 2, 0, 0}, // #7
1043 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 27, 2, 14, 1, 0, 0}, // #8
1044 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #9
1045 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1046 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #11
1047 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1048 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #13
1049 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 32, 1, 0, 0}, // #14
1050 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 29, 3, 33, 2, 0, 0}, // #15
1051 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #16
1052 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 14, 2, 37, 1, 0, 0}, // #17
1053 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #18
1054 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 32, 2, 38, 1, 0, 0}, // #19
1055 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #20
1056 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 14, 2, 37, 1, 0, 0}, // #21
1057 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #22
1058 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 14, 2, 37, 1, 0, 0}, // #23
1059 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #24
1060 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 29, 3, 39, 2, 0, 0}, // #25
1061 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 29, 3, 41, 2, 0, 0}, // #26
1062 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #27
1063 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #28
1064 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 34, 3, 43, 1, 0, 0}, // #29
1065 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 16, 2, 44, 2, 0, 0}, // #30
1066 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1067 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 37, 2, 46, 3, 0, 0}, // #32
1068 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 16, 2, 49, 2, 0, 0}, // #33
1069 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1070 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #35
1071 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #36
1072 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #37
1073 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #38
1074 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #39
1075 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #40
1076 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #41
1077 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #42
1078 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #43
1079 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #44
1080 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #45
1081 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #46
1082 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #47
1083 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #48
1084 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #49
1085 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #50
1086 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #51
1087 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #52
1088 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #53
1089 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #54
1090 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #55
1091 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #56
1092 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 40291) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #57
1093 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41492) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #58
1094 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42138) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #59
1095 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42290) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #60
1096 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43712) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #61
1097 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 46520) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #62
1098 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 46557) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #63
1099 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46635) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #64
1100 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46763) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #65
1101 {DBGFIELD(/*Write32Bit*/ 47015) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #66
1102 {DBGFIELD(/*Write64Bit*/ 47026) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #67
1103 {DBGFIELD(/*WriteSALU*/ 47037) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #68
1104 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 47047) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1105 {DBGFIELD(/*Write64Bit_ReadDefault*/ 47069) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1106 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 47092) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1107 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 47118) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1108 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 47143) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1109 {DBGFIELD(/*WriteXDL4PassWMMA*/ 47168) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1110 {DBGFIELD(/*WriteXDL2PassWMMA*/ 47186) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1111}; // GFX10SpeedModelSchedClasses
1112
1113// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1114static const llvm::MCSchedClassDesc GFX11SpeedModelSchedClasses[] = {
1115 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1116 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #1
1117 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #2
1118 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #3
1119 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 18, 2, 26, 1, 0, 0}, // #4
1120 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 20, 3, 27, 2, 0, 0}, // #5
1121 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #6
1122 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 25, 2, 28, 2, 0, 0}, // #7
1123 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 27, 2, 14, 1, 0, 0}, // #8
1124 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #9
1125 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1126 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 31, 1, 0, 0}, // #11
1127 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, true, 1, 2, 9, 1, 0, 0}, // #12
1128 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 23, 2, 28, 1, 0, 0}, // #13
1129 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 32, 1, 0, 0}, // #14
1130 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 29, 3, 33, 2, 0, 0}, // #15
1131 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #16
1132 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 14, 2, 51, 1, 0, 0}, // #17
1133 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #18
1134 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 32, 2, 38, 1, 0, 0}, // #19
1135 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #20
1136 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 14, 2, 51, 1, 0, 0}, // #21
1137 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #22
1138 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 14, 2, 51, 1, 0, 0}, // #23
1139 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 29, 3, 35, 2, 0, 0}, // #24
1140 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 29, 3, 52, 2, 0, 0}, // #25
1141 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 29, 3, 41, 2, 0, 0}, // #26
1142 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #27
1143 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 14, 2, 10, 1, 0, 0}, // #28
1144 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 34, 3, 54, 1, 0, 0}, // #29
1145 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 16, 2, 44, 2, 0, 0}, // #30
1146 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1147 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 37, 2, 46, 3, 0, 0}, // #32
1148 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 16, 2, 55, 2, 0, 0}, // #33
1149 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1150 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #35
1151 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #36
1152 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #37
1153 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #38
1154 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #39
1155 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #40
1156 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #41
1157 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #42
1158 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #43
1159 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #44
1160 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #45
1161 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #46
1162 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #47
1163 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #48
1164 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #49
1165 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #50
1166 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #51
1167 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #52
1168 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #53
1169 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #54
1170 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #55
1171 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #56
1172 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 40291) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #57
1173 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41492) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #58
1174 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42138) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #59
1175 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42290) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #60
1176 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43712) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #61
1177 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 46520) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #62
1178 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 46557) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #63
1179 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46635) 2, false, false, true, 16, 2, 6, 2, 0, 0}, // #64
1180 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46763) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #65
1181 {DBGFIELD(/*Write32Bit*/ 47015) 1, false, false, true, 14, 2, 6, 1, 0, 0}, // #66
1182 {DBGFIELD(/*Write64Bit*/ 47026) 1, false, false, true, 14, 2, 34, 1, 0, 0}, // #67
1183 {DBGFIELD(/*WriteSALU*/ 47037) 1, false, false, true, 1, 2, 13, 1, 0, 0}, // #68
1184 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 47047) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1185 {DBGFIELD(/*Write64Bit_ReadDefault*/ 47069) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1186 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 47092) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1187 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 47118) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1188 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 47143) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1189 {DBGFIELD(/*WriteXDL4PassWMMA*/ 47168) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1190 {DBGFIELD(/*WriteXDL2PassWMMA*/ 47186) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1191}; // GFX11SpeedModelSchedClasses
1192
1193// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1194static const llvm::MCSchedClassDesc GFX12SpeedModelSchedClasses[] = {
1195 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1196 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #1
1197 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #2
1198 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #3
1199 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 14, 2, 26, 1, 0, 0}, // #4
1200 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 41, 3, 27, 2, 0, 0}, // #5
1201 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #6
1202 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 25, 2, 28, 2, 0, 0}, // #7
1203 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 27, 2, 14, 1, 0, 0}, // #8
1204 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #9
1205 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1206 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #11
1207 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 1, 2, 9, 1, 0, 0}, // #12
1208 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #13
1209 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 9, 1, 32, 1, 0, 0}, // #14
1210 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 44, 3, 33, 2, 0, 0}, // #15
1211 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 44, 3, 35, 2, 0, 0}, // #16
1212 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 32, 2, 51, 1, 0, 0}, // #17
1213 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 32, 2, 34, 1, 0, 0}, // #18
1214 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 32, 2, 38, 1, 0, 0}, // #19
1215 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #20
1216 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 32, 2, 51, 1, 0, 0}, // #21
1217 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #22
1218 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 32, 2, 51, 1, 0, 0}, // #23
1219 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, false, 44, 3, 35, 2, 0, 0}, // #24
1220 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, false, 44, 3, 52, 2, 0, 0}, // #25
1221 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, false, 44, 3, 41, 2, 0, 0}, // #26
1222 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 32, 2, 10, 1, 0, 0}, // #27
1223 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, false, 32, 2, 10, 1, 0, 0}, // #28
1224 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 32, 2, 54, 1, 0, 0}, // #29
1225 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 39, 2, 44, 2, 0, 0}, // #30
1226 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 1, false, false, false, 32, 2, 57, 1, 0, 0}, // #31
1227 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, false, 47, 2, 46, 3, 0, 0}, // #32
1228 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, false, 39, 2, 55, 2, 0, 0}, // #33
1229 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1230 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #35
1231 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #36
1232 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #37
1233 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #38
1234 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #39
1235 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #40
1236 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #41
1237 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #42
1238 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #43
1239 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #44
1240 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #45
1241 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #46
1242 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #47
1243 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #48
1244 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #49
1245 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #50
1246 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #51
1247 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #52
1248 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #53
1249 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #54
1250 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #55
1251 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #56
1252 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 40291) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #57
1253 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41492) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #58
1254 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42138) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #59
1255 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42290) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #60
1256 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43712) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #61
1257 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 46520) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #62
1258 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 46557) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #63
1259 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46635) 2, false, false, false, 39, 2, 6, 2, 0, 0}, // #64
1260 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46763) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #65
1261 {DBGFIELD(/*Write32Bit*/ 47015) 1, false, false, false, 32, 2, 6, 1, 0, 0}, // #66
1262 {DBGFIELD(/*Write64Bit*/ 47026) 1, false, false, false, 32, 2, 34, 1, 0, 0}, // #67
1263 {DBGFIELD(/*WriteSALU*/ 47037) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #68
1264 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 47047) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1265 {DBGFIELD(/*Write64Bit_ReadDefault*/ 47069) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1266 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 47092) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1267 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 47118) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1268 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 47143) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1269 {DBGFIELD(/*WriteXDL4PassWMMA*/ 47168) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1270 {DBGFIELD(/*WriteXDL2PassWMMA*/ 47186) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1271}; // GFX12SpeedModelSchedClasses
1272
1273// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1274static const llvm::MCSchedClassDesc GFX1250SpeedModelSchedClasses[] = {
1275 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1276 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #1
1277 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #2
1278 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, false, 16, 2, 6, 2, 0, 0}, // #3
1279 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, false, 18, 2, 26, 1, 0, 0}, // #4
1280 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, false, 20, 3, 27, 2, 0, 0}, // #5
1281 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #6
1282 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, false, 25, 2, 28, 2, 0, 0}, // #7
1283 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, false, 27, 2, 14, 1, 0, 0}, // #8
1284 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #9
1285 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1286 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, false, 9, 1, 31, 1, 0, 0}, // #11
1287 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 1, false, false, false, 1, 2, 9, 1, 0, 0}, // #12
1288 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, false, 23, 2, 28, 1, 0, 0}, // #13
1289 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, false, 9, 1, 32, 1, 0, 0}, // #14
1290 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, false, 29, 3, 58, 2, 0, 0}, // #15
1291 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, false, 29, 3, 35, 2, 0, 0}, // #16
1292 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 14, 2, 31, 1, 0, 0}, // #17
1293 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 14, 2, 57, 1, 0, 0}, // #18
1294 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, false, 32, 2, 57, 1, 0, 0}, // #19
1295 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #20
1296 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 14, 2, 31, 1, 0, 0}, // #21
1297 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #22
1298 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 14, 2, 31, 1, 0, 0}, // #23
1299 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, false, 29, 3, 35, 2, 0, 0}, // #24
1300 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, false, 29, 3, 60, 2, 0, 0}, // #25
1301 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, false, 29, 3, 62, 2, 0, 0}, // #26
1302 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 14, 2, 62, 1, 0, 0}, // #27
1303 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, false, 14, 2, 34, 1, 0, 0}, // #28
1304 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 34, 3, 51, 1, 0, 0}, // #29
1305 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 16, 2, 64, 2, 0, 0}, // #30
1306 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 1, false, false, false, 14, 2, 10, 1, 0, 0}, // #31
1307 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, false, 37, 2, 46, 3, 0, 0}, // #32
1308 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, false, 16, 2, 66, 2, 0, 0}, // #33
1309 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1310 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #35
1311 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #36
1312 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #37
1313 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #38
1314 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #39
1315 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #40
1316 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #41
1317 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #42
1318 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #43
1319 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #44
1320 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #45
1321 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #46
1322 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #47
1323 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #48
1324 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #49
1325 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #50
1326 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #51
1327 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #52
1328 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #53
1329 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #54
1330 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #55
1331 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #56
1332 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 40291) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #57
1333 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41492) 1, false, false, false, 50, 1, 14, 1, 0, 0}, // #58
1334 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42138) 1, false, false, false, 50, 1, 14, 1, 0, 0}, // #59
1335 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42290) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #60
1336 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43712) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #61
1337 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 46520) 1, false, false, false, 15, 1, 14, 1, 0, 0}, // #62
1338 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 46557) 1, false, false, false, 15, 1, 14, 1, 0, 0}, // #63
1339 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46635) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #64
1340 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46763) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #65
1341 {DBGFIELD(/*Write32Bit*/ 47015) 1, false, false, false, 14, 2, 6, 1, 0, 0}, // #66
1342 {DBGFIELD(/*Write64Bit*/ 47026) 1, false, false, false, 14, 2, 57, 1, 0, 0}, // #67
1343 {DBGFIELD(/*WriteSALU*/ 47037) 1, false, false, false, 1, 2, 13, 1, 0, 0}, // #68
1344 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 47047) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1345 {DBGFIELD(/*Write64Bit_ReadDefault*/ 47069) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1346 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 47092) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1347 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 47118) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1348 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 47143) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1349 {DBGFIELD(/*WriteXDL4PassWMMA*/ 47168) 1, false, false, false, 50, 1, 14, 1, 0, 0}, // #74
1350 {DBGFIELD(/*WriteXDL2PassWMMA*/ 47186) 1, false, false, false, 49, 1, 10, 1, 0, 0}, // #75
1351}; // GFX1250SpeedModelSchedClasses
1352
1353// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1354static const llvm::MCSchedClassDesc SIFullSpeedModelSchedClasses[] = {
1355 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1356 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1357 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1358 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1359 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1360 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1361 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1362 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1363 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1364 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1365 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1366 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1367 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1368 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1369 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1370 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 12, 2, 0, 0}, // #15
1371 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1372 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #17
1373 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #18
1374 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1375 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1376 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #21
1377 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #22
1378 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #23
1379 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1380 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 17, 2, 0, 0}, // #25
1381 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 17, 2, 0, 0}, // #26
1382 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #27
1383 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1384 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #29
1385 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 3, 1, 19, 2, 0, 0}, // #30
1386 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1387 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1388 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 68, 2, 0, 0}, // #33
1389 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1390 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #35
1391 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #36
1392 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #37
1393 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #38
1394 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #39
1395 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40
1396 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #41
1397 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #42
1398 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #43
1399 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #44
1400 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #45
1401 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #46
1402 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #47
1403 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #48
1404 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49
1405 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50
1406 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #51
1407 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #52
1408 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53
1409 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1410 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1411 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1412 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 40291) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1413 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41492) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1414 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42138) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1415 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42290) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1416 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43712) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1417 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 46520) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1418 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 46557) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1419 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46635) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1420 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46763) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1421 {DBGFIELD(/*Write32Bit*/ 47015) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1422 {DBGFIELD(/*Write64Bit*/ 47026) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #67
1423 {DBGFIELD(/*WriteSALU*/ 47037) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1424 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 47047) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1425 {DBGFIELD(/*Write64Bit_ReadDefault*/ 47069) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1426 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 47092) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1427 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 47118) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1428 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 47143) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1429 {DBGFIELD(/*WriteXDL4PassWMMA*/ 47168) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1430 {DBGFIELD(/*WriteXDL2PassWMMA*/ 47186) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1431}; // SIFullSpeedModelSchedClasses
1432
1433// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1434static const llvm::MCSchedClassDesc SIDPGFX942FullSpeedModelSchedClasses[] = {
1435 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1436 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1437 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1438 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1439 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1440 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1441 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1442 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1443 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1444 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1445 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1446 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1447 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1448 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1449 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1450 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #15
1451 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1452 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #17
1453 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #18
1454 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1455 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1456 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #21
1457 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #22
1458 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #23
1459 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1460 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #25
1461 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #26
1462 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #27
1463 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1464 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 2, 1, 9, 1, 0, 0}, // #29
1465 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 3, 1, 1, 2, 0, 0}, // #30
1466 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1467 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1468 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #33
1469 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1470 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #35
1471 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 51, 1, 9, 1, 1, 1}, // #36
1472 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 52, 1, 10, 1, 1, 1}, // #37
1473 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #38
1474 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1475 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40
1476 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #41
1477 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #42
1478 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #43
1479 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1480 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #45
1481 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #46
1482 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #47
1483 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1484 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #49
1485 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #50
1486 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #51
1487 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #52
1488 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53
1489 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1490 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1491 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1492 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 40291) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1493 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41492) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1494 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42138) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1495 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42290) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1496 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43712) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1497 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 46520) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1498 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 46557) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1499 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46635) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1500 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46763) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1501 {DBGFIELD(/*Write32Bit*/ 47015) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1502 {DBGFIELD(/*Write64Bit*/ 47026) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #67
1503 {DBGFIELD(/*WriteSALU*/ 47037) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1504 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 47047) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1505 {DBGFIELD(/*Write64Bit_ReadDefault*/ 47069) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1506 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 47092) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1507 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 47118) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1508 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 47143) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1509 {DBGFIELD(/*WriteXDL4PassWMMA*/ 47168) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1510 {DBGFIELD(/*WriteXDL2PassWMMA*/ 47186) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1511}; // SIDPGFX942FullSpeedModelSchedClasses
1512
1513// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1514static const llvm::MCSchedClassDesc SIDPFullSpeedModelSchedClasses[] = {
1515 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1516 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1517 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1518 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1519 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1520 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1521 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1522 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1523 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1524 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1525 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1526 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1527 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1528 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1529 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1530 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #15
1531 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1532 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #17
1533 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #18
1534 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1535 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1536 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #21
1537 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #22
1538 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #23
1539 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1540 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #25
1541 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #26
1542 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #27
1543 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1544 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #29
1545 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #30
1546 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1547 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1548 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #33
1549 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1550 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #35
1551 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 51, 1, 9, 1, 1, 1}, // #36
1552 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 52, 1, 10, 1, 1, 1}, // #37
1553 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #38
1554 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1555 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #40
1556 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #41
1557 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #42
1558 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #43
1559 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1560 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #45
1561 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #46
1562 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #47
1563 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1564 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49
1565 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50
1566 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #51
1567 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #52
1568 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #53
1569 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54
1570 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55
1571 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1572 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 40291) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1573 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41492) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1574 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42138) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1575 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42290) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1576 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43712) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1577 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 46520) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1578 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 46557) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1579 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46635) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1580 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46763) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1581 {DBGFIELD(/*Write32Bit*/ 47015) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1582 {DBGFIELD(/*Write64Bit*/ 47026) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #67
1583 {DBGFIELD(/*WriteSALU*/ 47037) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1584 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 47047) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1585 {DBGFIELD(/*Write64Bit_ReadDefault*/ 47069) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1586 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 47092) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #71
1587 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 47118) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #72
1588 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 47143) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #73
1589 {DBGFIELD(/*WriteXDL4PassWMMA*/ 47168) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1590 {DBGFIELD(/*WriteXDL2PassWMMA*/ 47186) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1591}; // SIDPFullSpeedModelSchedClasses
1592
1593// {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#}
1594static const llvm::MCSchedClassDesc SIDPGFX950FullSpeedModelSchedClasses[] = {
1595 {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
1596 {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1
1597 {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2
1598 {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 56) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #3
1599 {DBGFIELD(/*NullALU_WriteVMEM*/ 86) 1, false, false, true, 4, 1, 4, 1, 0, 0}, // #4
1600 {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 104) 2, false, false, true, 5, 2, 5, 2, 0, 0}, // #5
1601 {DBGFIELD(/*NullALU_WriteLDS*/ 131) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #6
1602 {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 148) 2, false, false, true, 7, 1, 6, 2, 0, 0}, // #7
1603 {DBGFIELD(/*NullALU_WriteExport*/ 174) 1, false, false, true, 8, 1, 9, 1, 0, 0}, // #8
1604 {DBGFIELD(/*WriteBranch*/ 194) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #9
1605 {DBGFIELD(/*NullALU*/ 206) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #10
1606 {DBGFIELD(/*NullALU_WriteBranch*/ 214) 1, false, false, true, 9, 1, 10, 1, 0, 0}, // #11
1607 {DBGFIELD(/*NullALU_WriteSFPU*/ 234) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #12
1608 {DBGFIELD(/*NullALU_WriteSMEM*/ 252) 1, false, false, true, 5, 1, 6, 1, 0, 0}, // #13
1609 {DBGFIELD(/*NullALU_WriteBarrier*/ 270) 1, false, false, true, 9, 1, 11, 1, 0, 0}, // #14
1610 {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 291) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #15
1611 {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 320) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #16
1612 {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 349) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #17
1613 {DBGFIELD(/*NullALU_Write64Bit*/ 372) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #18
1614 {DBGFIELD(/*NullALU_WriteTrans32*/ 391) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #19
1615 {DBGFIELD(/*NullALU_WriteFloatCvt*/ 412) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #20
1616 {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 434) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #21
1617 {DBGFIELD(/*NullALU_WriteFloatFMA*/ 457) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #22
1618 {DBGFIELD(/*NullALU_WriteDouble*/ 479) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #23
1619 {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 499) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #24
1620 {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 531) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #25
1621 {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 561) 2, false, false, true, 1, 2, 1, 2, 0, 0}, // #26
1622 {DBGFIELD(/*NullALU_WriteIntMul*/ 591) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #27
1623 {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 611) 1, false, false, true, 2, 1, 9, 1, 0, 0}, // #28
1624 {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 2, 1, 9, 1, 0, 0}, // #29
1625 {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 3, 1, 1, 2, 0, 0}, // #30
1626 {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31
1627 {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 10, 1, 21, 3, 0, 0}, // #32
1628 {DBGFIELD(/*NullALU_WriteDoubleAdd_Write32Bit*/ 758) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #33
1629 {DBGFIELD(/*COPY*/ 792) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34
1630 {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 797) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #35
1631 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 821) 1, false, false, true, 51, 1, 9, 1, 1, 1}, // #36
1632 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1947) 1, false, false, true, 54, 1, 14, 1, 1, 1}, // #37
1633 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2_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7330) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #38
1634 {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14210) 1, false, false, true, 11, 1, 13, 1, 1, 1}, // #39
1635 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15157) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40
1636 {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20282) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #41
1637 {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20411) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #42
1638 {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 21005) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #43
1639 {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21996) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #44
1640 {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23342) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #45
1641 {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23540) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #46
1642 {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24323) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #47
1643 {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25841) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #48
1644 {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27702) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #49
1645 {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28658) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #50
1646 {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29604) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #51
1647 {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29733) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #52
1648 {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29931) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #53
1649 {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31488) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #54
1650 {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33261) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #55
1651 {DBGFIELD(/*V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250*/ 35907) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56
1652 {DBGFIELD(/*V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr*/ 40291) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #57
1653 {DBGFIELD(/*V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250*/ 41492) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #58
1654 {DBGFIELD(/*V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr*/ 42138) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #59
1655 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr*/ 42290) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #60
1656 {DBGFIELD(/*V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250*/ 43712) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #61
1657 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_threeaddr*/ 46520) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #62
1658 {DBGFIELD(/*V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250*/ 46557) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #63
1659 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr*/ 46635) 2, false, false, true, 3, 1, 1, 2, 0, 0}, // #64
1660 {DBGFIELD(/*V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250*/ 46763) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #65
1661 {DBGFIELD(/*Write32Bit*/ 47015) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #66
1662 {DBGFIELD(/*Write64Bit*/ 47026) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #67
1663 {DBGFIELD(/*WriteSALU*/ 47037) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #68
1664 {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 47047) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #69
1665 {DBGFIELD(/*Write64Bit_ReadDefault*/ 47069) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #70
1666 {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 47092) 1, false, false, true, 13, 1, 14, 1, 1, 1}, // #71
1667 {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 47118) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #72
1668 {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 47143) 1, false, false, true, 53, 1, 9, 1, 1, 1}, // #73
1669 {DBGFIELD(/*WriteXDL4PassWMMA*/ 47168) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #74
1670 {DBGFIELD(/*WriteXDL2PassWMMA*/ 47186) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #75
1671}; // SIDPGFX950FullSpeedModelSchedClasses
1672
1673#ifdef __GNUC__
1674#pragma GCC diagnostic push
1675#pragma GCC diagnostic ignored "-Woverlength-strings"
1676#endif
1677static constexpr char AMDGPUSchedClassNamesStorage[] =
1678 "\0"
1679 "InvalidSchedClass\0"
1680 "NullALU_WriteSALU\0"
1681 "NullALU_Write32Bit\0"
1682 "NullALU_Write32Bit_Write32Bit\0"
1683 "NullALU_WriteVMEM\0"
1684 "NullALU_WriteVMEM_WriteLDS\0"
1685 "NullALU_WriteLDS\0"
1686 "NullALU_WriteLDS_WriteLDS\0"
1687 "NullALU_WriteExport\0"
1688 "WriteBranch\0"
1689 "NullALU\0"
1690 "NullALU_WriteBranch\0"
1691 "NullALU_WriteSFPU\0"
1692 "NullALU_WriteSMEM\0"
1693 "NullALU_WriteBarrier\0"
1694 "NullALU_WriteSALU_Write64Bit\0"
1695 "NullALU_Write32Bit_WriteSALU\0"
1696 "NullALU_WriteDoubleAdd\0"
1697 "NullALU_Write64Bit\0"
1698 "NullALU_WriteTrans32\0"
1699 "NullALU_WriteFloatCvt\0"
1700 "NullALU_WriteDoubleCvt\0"
1701 "NullALU_WriteFloatFMA\0"
1702 "NullALU_WriteDouble\0"
1703 "NullALU_WriteFloatFMA_WriteSALU\0"
1704 "NullALU_WriteDouble_WriteSALU\0"
1705 "NullALU_WriteIntMul_WriteSALU\0"
1706 "NullALU_WriteIntMul\0"
1707 "NullALU_WriteQuarterRate32\0"
1708 "NullALU_WriteTrans64\0"
1709 "NullALU_Write64Bit_Write64Bit\0"
1710 "NullALU_WritePseudoScalarTrans\0"
1711 "NullALU_WriteVMEM_WriteVMEM_WriteVMEM\0"
1712 "NullALU_WriteDoubleAdd_Write32Bit\0"
1713 "COPY\0"
1714 "V_ACCVGPR_WRITE_B32_e64\0"
1715 "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0"
1716 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
1717 "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0"
1718 "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0"
1719 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
1720 "V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd\0"
1721 "V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi\0"
1722 "V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd\0"
1723 "V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi\0"
1724 "V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd\0"
1725 "V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0"
1726 "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd\0"
1727 "V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi\0"
1728 "V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940\0"
1729 "V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940\0"
1730 "V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0"
1731 "V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd\0"
1732 "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0"
1733 "V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0"
1734 "V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd\0"
1735 "V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F16_16X16X16_F16_w32_twoaddr_V_WMMA_F16_16X16X32_F16_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X16_F16_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_V_WMMA_F32_16X16X32_F16_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_V_SWMMAC_BF16F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_BF16_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_BF16_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F16_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F16_16X16X64_F16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X32_BF16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_BF8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_F16_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_BF8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X32_FP8_FP8_w32_twoaddr_gfx12_V_SWMMAC_F32_16X16X64_BF16_w32_twoaddr_gfx1250_V_SWMMAC_F32_16X16X64_F16_w32_twoaddr_gfx1250_V_WMMA_BF16F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_BF16_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_BF16_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F16_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F16_16X16X64_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_FP8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X16_BF16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_BF8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_F16_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_BF8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X16_FP8_FP8_w32_twoaddr_gfx12_V_WMMA_F32_16X16X32_BF16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X32_F16_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_BF8_FP8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_BF8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X64_FP8_FP8_w32_twoaddr_gfx1250\0"
1736 "V_WMMA_BF16F32_16X16X32_BF16_w32_threeaddr_V_WMMA_BF16_16X16X16_BF16_w32_threeaddr_V_WMMA_BF16_16X16X32_BF16_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F16_16X16X16_F16_w32_threeaddr_V_WMMA_F16_16X16X32_F16_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F16_16X16X64_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X128_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_BF16_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X16_F16_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X16_FP8_FP8_w32_threeaddr_V_WMMA_F32_16X16X32_BF16_w32_threeaddr_V_WMMA_F32_16X16X32_F16_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_BF8_FP8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_BF8_w32_threeaddr_V_WMMA_F32_16X16X64_FP8_FP8_w32_threeaddr\0"
1737 "V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_V_SWMMAC_I32_16X16X128_IU8_w32_twoaddr_gfx1250_V_SWMMAC_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X32_IU8_w32_twoaddr_gfx12_V_SWMMAC_I32_16X16X64_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X16_IU8_w32_twoaddr_gfx12_V_WMMA_I32_16X16X32_IU4_w32_twoaddr_gfx12_V_WMMA_I32_16X16X64_IU8_w32_twoaddr_gfx1250\0"
1738 "V_WMMA_I32_16X16X16_IU4_w32_threeaddr_V_WMMA_I32_16X16X16_IU8_w32_threeaddr_V_WMMA_I32_16X16X32_IU4_w32_threeaddr_V_WMMA_I32_16X16X64_IU8_w32_threeaddr\0"
1739 "V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr\0"
1740 "V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250\0"
1741 "V_WMMA_F32_16X16X4_F32_w32_threeaddr\0"
1742 "V_WMMA_F32_16X16X4_F32_w32_twoaddr_V_WMMA_F32_16X16X4_F32_w32_twoaddr_gfx1250\0"
1743 "V_WMMA_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_threeaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_threeaddr\0"
1744 "V_WMMA_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE16_F32_32X16X128_F4_w32_twoaddr_V_WMMA_SCALE_F32_32X16X128_F4_w32_twoaddr_V_WMMA_F32_32X16X128_F4_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_32X16X128_F4_w32_gfx1250_V_WMMA_SCALE_F32_32X16X128_F4_w32_gfx1250\0"
1745 "Write32Bit\0"
1746 "Write64Bit\0"
1747 "WriteSALU\0"
1748 "Write64Bit_MIVGPRRead\0"
1749 "Write64Bit_ReadDefault\0"
1750 "Write16PassMAI_MIMFMARead\0"
1751 "Write8PassMAI_MIMFMARead\0"
1752 "Write4PassMAI_MIMFMARead\0"
1753 "WriteXDL4PassWMMA\0"
1754 "WriteXDL2PassWMMA\0"
1755 ;
1756#ifdef __GNUC__
1757#pragma GCC diagnostic pop
1758#endif
1759
1760static constexpr llvm::StringTable
1761AMDGPUSchedClassNames = AMDGPUSchedClassNamesStorage;
1762
1763static const llvm::MCSchedModel NoSchedModel = {
1764 MCSchedModel::DefaultIssueWidth,
1765 MCSchedModel::DefaultMicroOpBufferSize,
1766 MCSchedModel::DefaultLoopMicroOpBufferSize,
1767 MCSchedModel::DefaultLoadLatency,
1768 MCSchedModel::DefaultHighLatency,
1769 MCSchedModel::DefaultMispredictPenalty,
1770 false, // PostRAScheduler
1771 false, // CompleteModel
1772 false, // EnableIntervals
1773 0, // Processor ID
1774 nullptr, nullptr, 0, 0, // No instruction-level machine model.
1775 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1776 nullptr, // No Itinerary
1777 nullptr // No extra processor descriptor
1778};
1779
1780static const unsigned SIQuarterSpeedModelProcResourceSubUnits[] = {
1781 0, // Invalid
1782};
1783
1784// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1785static const llvm::MCProcResourceDesc SIQuarterSpeedModelProcResources[] = {
1786 {"InvalidUnit", 0, 0, 0, 0},
1787 {"HWBranch", 1, 0, 1, nullptr}, // #1
1788 {"HWExport", 1, 0, 1, nullptr}, // #2
1789 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1790 {"HWSALU", 1, 0, 1, nullptr}, // #4
1791 {"HWVALU", 1, 0, 1, nullptr}, // #5
1792 {"HWVMEM", 1, 0, 1, nullptr}, // #6
1793 {"HWXDL", 1, 0, 0, nullptr}, // #7
1794};
1795
1796static const llvm::MCSchedModel SIQuarterSpeedModel = {
1797 1, // IssueWidth
1798 1, // MicroOpBufferSize
1799 MCSchedModel::DefaultLoopMicroOpBufferSize,
1800 MCSchedModel::DefaultLoadLatency,
1801 MCSchedModel::DefaultHighLatency,
1802 20, // MispredictPenalty
1803 true, // PostRAScheduler
1804 true, // CompleteModel
1805 false, // EnableIntervals
1806 1, // Processor ID
1807 SIQuarterSpeedModelProcResources,
1808 SIQuarterSpeedModelSchedClasses,
1809 8,
1810 76,
1811 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1812 nullptr, // No Itinerary
1813 nullptr // No extra processor descriptor
1814};
1815
1816static const unsigned GFX10SpeedModelProcResourceSubUnits[] = {
1817 0, // Invalid
1818};
1819
1820// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1821static const llvm::MCProcResourceDesc GFX10SpeedModelProcResources[] = {
1822 {"InvalidUnit", 0, 0, 0, 0},
1823 {"HWBranch", 1, 0, 1, nullptr}, // #1
1824 {"HWExport", 1, 0, 1, nullptr}, // #2
1825 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1826 {"HWRC", 1, 0, 1, nullptr}, // #4
1827 {"HWSALU", 1, 0, 1, nullptr}, // #5
1828 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
1829 {"HWVALU", 1, 0, 1, nullptr}, // #7
1830 {"HWVMEM", 1, 0, 1, nullptr}, // #8
1831};
1832
1833static const llvm::MCSchedModel GFX10SpeedModel = {
1834 1, // IssueWidth
1835 1, // MicroOpBufferSize
1836 MCSchedModel::DefaultLoopMicroOpBufferSize,
1837 MCSchedModel::DefaultLoadLatency,
1838 MCSchedModel::DefaultHighLatency,
1839 20, // MispredictPenalty
1840 true, // PostRAScheduler
1841 true, // CompleteModel
1842 false, // EnableIntervals
1843 2, // Processor ID
1844 GFX10SpeedModelProcResources,
1845 GFX10SpeedModelSchedClasses,
1846 9,
1847 76,
1848 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1849 nullptr, // No Itinerary
1850 nullptr // No extra processor descriptor
1851};
1852
1853static const unsigned GFX11SpeedModelProcResourceSubUnits[] = {
1854 0, // Invalid
1855};
1856
1857// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1858static const llvm::MCProcResourceDesc GFX11SpeedModelProcResources[] = {
1859 {"InvalidUnit", 0, 0, 0, 0},
1860 {"HWBranch", 1, 0, 1, nullptr}, // #1
1861 {"HWExport", 1, 0, 1, nullptr}, // #2
1862 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1863 {"HWRC", 1, 0, 1, nullptr}, // #4
1864 {"HWSALU", 1, 0, 1, nullptr}, // #5
1865 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
1866 {"HWVALU", 1, 0, 1, nullptr}, // #7
1867 {"HWVMEM", 1, 0, 1, nullptr}, // #8
1868};
1869
1870static const llvm::MCSchedModel GFX11SpeedModel = {
1871 1, // IssueWidth
1872 1, // MicroOpBufferSize
1873 MCSchedModel::DefaultLoopMicroOpBufferSize,
1874 MCSchedModel::DefaultLoadLatency,
1875 MCSchedModel::DefaultHighLatency,
1876 20, // MispredictPenalty
1877 true, // PostRAScheduler
1878 true, // CompleteModel
1879 false, // EnableIntervals
1880 3, // Processor ID
1881 GFX11SpeedModelProcResources,
1882 GFX11SpeedModelSchedClasses,
1883 9,
1884 76,
1885 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1886 nullptr, // No Itinerary
1887 nullptr // No extra processor descriptor
1888};
1889
1890static const unsigned GFX12SpeedModelProcResourceSubUnits[] = {
1891 0, // Invalid
1892};
1893
1894// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1895static const llvm::MCProcResourceDesc GFX12SpeedModelProcResources[] = {
1896 {"InvalidUnit", 0, 0, 0, 0},
1897 {"HWBranch", 1, 0, 1, nullptr}, // #1
1898 {"HWExport", 1, 0, 1, nullptr}, // #2
1899 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1900 {"HWRC", 1, 0, 1, nullptr}, // #4
1901 {"HWSALU", 1, 0, 1, nullptr}, // #5
1902 {"HWVALU", 1, 0, 1, nullptr}, // #6
1903 {"HWVMEM", 1, 0, 1, nullptr}, // #7
1904};
1905
1906static const llvm::MCSchedModel GFX12SpeedModel = {
1907 1, // IssueWidth
1908 1, // MicroOpBufferSize
1909 MCSchedModel::DefaultLoopMicroOpBufferSize,
1910 MCSchedModel::DefaultLoadLatency,
1911 MCSchedModel::DefaultHighLatency,
1912 20, // MispredictPenalty
1913 true, // PostRAScheduler
1914 true, // CompleteModel
1915 false, // EnableIntervals
1916 4, // Processor ID
1917 GFX12SpeedModelProcResources,
1918 GFX12SpeedModelSchedClasses,
1919 8,
1920 76,
1921 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1922 nullptr, // No Itinerary
1923 nullptr // No extra processor descriptor
1924};
1925
1926static const unsigned GFX1250SpeedModelProcResourceSubUnits[] = {
1927 0, // Invalid
1928};
1929
1930// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1931static const llvm::MCProcResourceDesc GFX1250SpeedModelProcResources[] = {
1932 {"InvalidUnit", 0, 0, 0, 0},
1933 {"HWBranch", 1, 0, 1, nullptr}, // #1
1934 {"HWExport", 1, 0, 1, nullptr}, // #2
1935 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1936 {"HWRC", 1, 0, 1, nullptr}, // #4
1937 {"HWSALU", 1, 0, 1, nullptr}, // #5
1938 {"HWTransVALU", 1, 0, 1, nullptr}, // #6
1939 {"HWVALU", 1, 0, 1, nullptr}, // #7
1940 {"HWVMEM", 1, 0, 1, nullptr}, // #8
1941 {"HWXDL", 1, 0, 0, nullptr}, // #9
1942};
1943
1944static const llvm::MCSchedModel GFX1250SpeedModel = {
1945 1, // IssueWidth
1946 1, // MicroOpBufferSize
1947 MCSchedModel::DefaultLoopMicroOpBufferSize,
1948 MCSchedModel::DefaultLoadLatency,
1949 MCSchedModel::DefaultHighLatency,
1950 20, // MispredictPenalty
1951 true, // PostRAScheduler
1952 true, // CompleteModel
1953 false, // EnableIntervals
1954 5, // Processor ID
1955 GFX1250SpeedModelProcResources,
1956 GFX1250SpeedModelSchedClasses,
1957 10,
1958 76,
1959 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1960 nullptr, // No Itinerary
1961 nullptr // No extra processor descriptor
1962};
1963
1964static const unsigned SIFullSpeedModelProcResourceSubUnits[] = {
1965 0, // Invalid
1966};
1967
1968// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
1969static const llvm::MCProcResourceDesc SIFullSpeedModelProcResources[] = {
1970 {"InvalidUnit", 0, 0, 0, 0},
1971 {"HWBranch", 1, 0, 1, nullptr}, // #1
1972 {"HWExport", 1, 0, 1, nullptr}, // #2
1973 {"HWLGKM", 1, 0, 1, nullptr}, // #3
1974 {"HWSALU", 1, 0, 1, nullptr}, // #4
1975 {"HWVALU", 1, 0, 1, nullptr}, // #5
1976 {"HWVMEM", 1, 0, 1, nullptr}, // #6
1977 {"HWXDL", 1, 0, 0, nullptr}, // #7
1978};
1979
1980static const llvm::MCSchedModel SIFullSpeedModel = {
1981 1, // IssueWidth
1982 1, // MicroOpBufferSize
1983 MCSchedModel::DefaultLoopMicroOpBufferSize,
1984 MCSchedModel::DefaultLoadLatency,
1985 MCSchedModel::DefaultHighLatency,
1986 20, // MispredictPenalty
1987 true, // PostRAScheduler
1988 true, // CompleteModel
1989 false, // EnableIntervals
1990 6, // Processor ID
1991 SIFullSpeedModelProcResources,
1992 SIFullSpeedModelSchedClasses,
1993 8,
1994 76,
1995 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
1996 nullptr, // No Itinerary
1997 nullptr // No extra processor descriptor
1998};
1999
2000static const unsigned SIDPGFX942FullSpeedModelProcResourceSubUnits[] = {
2001 0, // Invalid
2002};
2003
2004// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2005static const llvm::MCProcResourceDesc SIDPGFX942FullSpeedModelProcResources[] = {
2006 {"InvalidUnit", 0, 0, 0, 0},
2007 {"HWBranch", 1, 0, 1, nullptr}, // #1
2008 {"HWExport", 1, 0, 1, nullptr}, // #2
2009 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2010 {"HWSALU", 1, 0, 1, nullptr}, // #4
2011 {"HWVALU", 1, 0, 1, nullptr}, // #5
2012 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2013 {"HWXDL", 1, 0, 0, nullptr}, // #7
2014};
2015
2016static const llvm::MCSchedModel SIDPGFX942FullSpeedModel = {
2017 1, // IssueWidth
2018 1, // MicroOpBufferSize
2019 MCSchedModel::DefaultLoopMicroOpBufferSize,
2020 MCSchedModel::DefaultLoadLatency,
2021 MCSchedModel::DefaultHighLatency,
2022 20, // MispredictPenalty
2023 true, // PostRAScheduler
2024 true, // CompleteModel
2025 false, // EnableIntervals
2026 7, // Processor ID
2027 SIDPGFX942FullSpeedModelProcResources,
2028 SIDPGFX942FullSpeedModelSchedClasses,
2029 8,
2030 76,
2031 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2032 nullptr, // No Itinerary
2033 nullptr // No extra processor descriptor
2034};
2035
2036static const unsigned SIDPFullSpeedModelProcResourceSubUnits[] = {
2037 0, // Invalid
2038};
2039
2040// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2041static const llvm::MCProcResourceDesc SIDPFullSpeedModelProcResources[] = {
2042 {"InvalidUnit", 0, 0, 0, 0},
2043 {"HWBranch", 1, 0, 1, nullptr}, // #1
2044 {"HWExport", 1, 0, 1, nullptr}, // #2
2045 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2046 {"HWSALU", 1, 0, 1, nullptr}, // #4
2047 {"HWVALU", 1, 0, 1, nullptr}, // #5
2048 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2049 {"HWXDL", 1, 0, 0, nullptr}, // #7
2050};
2051
2052static const llvm::MCSchedModel SIDPFullSpeedModel = {
2053 1, // IssueWidth
2054 1, // MicroOpBufferSize
2055 MCSchedModel::DefaultLoopMicroOpBufferSize,
2056 MCSchedModel::DefaultLoadLatency,
2057 MCSchedModel::DefaultHighLatency,
2058 20, // MispredictPenalty
2059 true, // PostRAScheduler
2060 true, // CompleteModel
2061 false, // EnableIntervals
2062 8, // Processor ID
2063 SIDPFullSpeedModelProcResources,
2064 SIDPFullSpeedModelSchedClasses,
2065 8,
2066 76,
2067 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2068 nullptr, // No Itinerary
2069 nullptr // No extra processor descriptor
2070};
2071
2072static const unsigned SIDPGFX950FullSpeedModelProcResourceSubUnits[] = {
2073 0, // Invalid
2074};
2075
2076// {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin}
2077static const llvm::MCProcResourceDesc SIDPGFX950FullSpeedModelProcResources[] = {
2078 {"InvalidUnit", 0, 0, 0, 0},
2079 {"HWBranch", 1, 0, 1, nullptr}, // #1
2080 {"HWExport", 1, 0, 1, nullptr}, // #2
2081 {"HWLGKM", 1, 0, 1, nullptr}, // #3
2082 {"HWSALU", 1, 0, 1, nullptr}, // #4
2083 {"HWVALU", 1, 0, 1, nullptr}, // #5
2084 {"HWVMEM", 1, 0, 1, nullptr}, // #6
2085 {"HWXDL", 1, 0, 0, nullptr}, // #7
2086};
2087
2088static const llvm::MCSchedModel SIDPGFX950FullSpeedModel = {
2089 1, // IssueWidth
2090 1, // MicroOpBufferSize
2091 MCSchedModel::DefaultLoopMicroOpBufferSize,
2092 MCSchedModel::DefaultLoadLatency,
2093 MCSchedModel::DefaultHighLatency,
2094 20, // MispredictPenalty
2095 true, // PostRAScheduler
2096 true, // CompleteModel
2097 false, // EnableIntervals
2098 9, // Processor ID
2099 SIDPGFX950FullSpeedModelProcResources,
2100 SIDPGFX950FullSpeedModelSchedClasses,
2101 8,
2102 76,
2103 DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames
2104 nullptr, // No Itinerary
2105 nullptr // No extra processor descriptor
2106};
2107
2108#undef DBGFIELD
2109
2110#undef DBGVAL_OR_NULLPTR
2111
2112// Sorted (by key) array of values for CPU subtype.
2113extern const llvm::SubtargetSubTypeKV AMDGPUSubTypeKV[] = {
2114 { "bonaire", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2115 { "carrizo", { { { 0x0ULL, 0x8000000ULL, 0x802ULL, 0x800080080000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2116 { "fiji", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x800080000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2117 { "generic", { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
2118 { "generic-hsa", { { { 0x0ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
2119 { "gfx10-1-generic", { { { 0x4004000000000ULL, 0x8000800800000040ULL, 0x12e000405840ULL, 0x184000080d00801ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2120 { "gfx10-3-generic", { { { 0xe604004000000000ULL, 0xe800000000004ULL, 0x4000000800ULL, 0x10000001ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2121 { "gfx1010", { { { 0x4004000000000ULL, 0x8000800800000040ULL, 0x12e000405840ULL, 0x184000080d00800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2122 { "gfx1011", { { { 0xe604004000000000ULL, 0x8000800800000044ULL, 0x12e000405840ULL, 0x184000080d00800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2123 { "gfx1012", { { { 0xe604004000000000ULL, 0x8000800800000044ULL, 0x12e000405840ULL, 0x184000080d00800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2124 { "gfx1013", { { { 0x4004000000000ULL, 0x8004800800000040ULL, 0x12e000405840ULL, 0x184000080d00800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2125 { "gfx1030", { { { 0xe604004000000000ULL, 0xe800000000004ULL, 0x4000000800ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2126 { "gfx1031", { { { 0xe604004000000000ULL, 0xe800000000004ULL, 0x4000000800ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2127 { "gfx1032", { { { 0xe604004000000000ULL, 0xe800000000004ULL, 0x4000000800ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2128 { "gfx1033", { { { 0xe604004000000000ULL, 0xe800000000004ULL, 0x4000000800ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2129 { "gfx1034", { { { 0xe604004000000000ULL, 0xe800000000004ULL, 0x4000000800ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2130 { "gfx1035", { { { 0xe604004000000000ULL, 0xe800000000004ULL, 0x4000000800ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2131 { "gfx1036", { { { 0xe604004000000000ULL, 0xe800000000004ULL, 0x4000000800ULL, 0x10000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel },
2132 { "gfx11-generic", { { { 0xa006004030008000ULL, 0x10000020000017ULL, 0x5040c04080220810ULL, 0x101800010000001ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2133 { "gfx1100", { { { 0xa006004030008001ULL, 0x10000020000017ULL, 0x1040c04080220810ULL, 0x101800010000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2134 { "gfx1101", { { { 0xa006004030008001ULL, 0x10000020000017ULL, 0x1040c04080220810ULL, 0x101000010000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2135 { "gfx1102", { { { 0xa006004030008000ULL, 0x10000020000017ULL, 0x1040c04080220810ULL, 0x101800010000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2136 { "gfx1103", { { { 0xa006004030008000ULL, 0x10000020000017ULL, 0x1040c04080220810ULL, 0x101000010000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2137 { "gfx1150", { { { 0xa046004030008000ULL, 0x10000020000017ULL, 0x5010c04080000810ULL, 0x100000010000004ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2138 { "gfx1151", { { { 0xa046004030008001ULL, 0x10000020000017ULL, 0x5010c04080000810ULL, 0x100000010000004ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2139 { "gfx1152", { { { 0xa046004030008000ULL, 0x10000020000017ULL, 0x5010c04080000810ULL, 0x100000010000004ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2140 { "gfx1153", { { { 0xa046004030008000ULL, 0x10000020000017ULL, 0x5000c04080000810ULL, 0x100000010000004ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel },
2141 { "gfx12-generic", { { { 0x8047a860f0a98401ULL, 0x4000002020801fULL, 0x600c04082008814ULL, 0x4100000008220007ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2142 { "gfx1200", { { { 0x8047a860f0a98401ULL, 0x4000002020801fULL, 0x600c04082008814ULL, 0x4100000008220006ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2143 { "gfx1201", { { { 0x8047a860f0a98401ULL, 0x4000002020801fULL, 0x600c04082008814ULL, 0x4100000008220006ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2144 { "gfx1250", { { { 0x8047ee9cfcab915cULL, 0x20400050e0a00101ULL, 0x86856009c501aa01ULL, 0x2300000bce228006ULL, 0x9ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX1250SpeedModel },
2145 { "gfx1251", { { { 0x804fee9cfcab915cULL, 0x20400050e0a00101ULL, 0x86856009c501aa01ULL, 0x2300000bca228006ULL, 0x9ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX1250SpeedModel },
2146 { "gfx1310", { { { 0x8045ea9cfcab8409ULL, 0x2100005020210001ULL, 0x681c04000008805ULL, 0x100000b10228006ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel },
2147 { "gfx600", { { { 0x0ULL, 0x8000000ULL, 0x802ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2148 { "gfx601", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2149 { "gfx602", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2150 { "gfx700", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2151 { "gfx701", { { { 0x0ULL, 0x8000000ULL, 0x802ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2152 { "gfx702", { { { 0x0ULL, 0x8000000ULL, 0x400ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2153 { "gfx703", { { { 0x0ULL, 0x0ULL, 0x400ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2154 { "gfx704", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2155 { "gfx705", { { { 0x0ULL, 0x0ULL, 0x400ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2156 { "gfx801", { { { 0x0ULL, 0x8000000ULL, 0x802ULL, 0x800080080000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2157 { "gfx802", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x800080000000400ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2158 { "gfx803", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x800080000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2159 { "gfx805", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x800080000000400ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2160 { "gfx810", { { { 0x0ULL, 0x0ULL, 0x428ULL, 0x800000080000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2161 { "gfx9-4-generic", { { { 0xfe0c0040fc88a400ULL, 0xc0020e060000004ULL, 0x8008600080050a00ULL, 0x40000001ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX942FullSpeedModel },
2162 { "gfx9-generic", { { { 0x400ULL, 0x240000008040ULL, 0x400818ULL, 0x1ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2163 { "gfx900", { { { 0x400ULL, 0x240000008040ULL, 0xc00818ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2164 { "gfx902", { { { 0x400ULL, 0x240000008040ULL, 0xc00818ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2165 { "gfx904", { { { 0x400ULL, 0x242000008040ULL, 0x400818ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2166 { "gfx906", { { { 0x8604000000000400ULL, 0x242000008044ULL, 0x40081aULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2167 { "gfx908", { { { 0xfe04000010100400ULL, 0x242000008044ULL, 0x80000004c081aULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2168 { "gfx909", { { { 0x400ULL, 0x240000008040ULL, 0xc00818ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2169 { "gfx90a", { { { 0xfe0c00403c080400ULL, 0x40020e040000004ULL, 0x8008600000440a10ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPFullSpeedModel },
2170 { "gfx90c", { { { 0x400ULL, 0x240000008040ULL, 0xc00818ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2171 { "gfx942", { { { 0xfe0c1040fc88a400ULL, 0xc0020e061200004ULL, 0x8008600080050a00ULL, 0x40000000ULL, 0x4ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX942FullSpeedModel },
2172 { "gfx950", { { { 0xfe0c00c6fca8a800ULL, 0x1c0020e061780034ULL, 0x8088600080050a00ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX950FullSpeedModel },
2173 { "hainan", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2174 { "hawaii", { { { 0x0ULL, 0x8000000ULL, 0x802ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2175 { "iceland", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x800080000000400ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2176 { "kabini", { { { 0x0ULL, 0x0ULL, 0x400ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2177 { "kaveri", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2178 { "mullins", { { { 0x0ULL, 0x0ULL, 0x400ULL, 0x1000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2179 { "oland", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2180 { "pitcairn", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2181 { "polaris10", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x800080000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2182 { "polaris11", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x800080000000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2183 { "stoney", { { { 0x0ULL, 0x0ULL, 0x428ULL, 0x800000080000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2184 { "tahiti", { { { 0x0ULL, 0x8000000ULL, 0x802ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel },
2185 { "tonga", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x800080000000400ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2186 { "tongapro", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x800080000000400ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2187 { "verde", { { { 0x0ULL, 0x0ULL, 0x800ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel },
2188};
2189
2190// Sorted array of names of CPU subtypes, including aliases.
2191extern const llvm::StringRef AMDGPUNames[] = {
2192"bonaire",
2193"carrizo",
2194"fiji",
2195"generic",
2196"generic-hsa",
2197"gfx10-1-generic",
2198"gfx10-3-generic",
2199"gfx1010",
2200"gfx1011",
2201"gfx1012",
2202"gfx1013",
2203"gfx1030",
2204"gfx1031",
2205"gfx1032",
2206"gfx1033",
2207"gfx1034",
2208"gfx1035",
2209"gfx1036",
2210"gfx11-generic",
2211"gfx1100",
2212"gfx1101",
2213"gfx1102",
2214"gfx1103",
2215"gfx1150",
2216"gfx1151",
2217"gfx1152",
2218"gfx1153",
2219"gfx12-generic",
2220"gfx1200",
2221"gfx1201",
2222"gfx1250",
2223"gfx1251",
2224"gfx1310",
2225"gfx600",
2226"gfx601",
2227"gfx602",
2228"gfx700",
2229"gfx701",
2230"gfx702",
2231"gfx703",
2232"gfx704",
2233"gfx705",
2234"gfx801",
2235"gfx802",
2236"gfx803",
2237"gfx805",
2238"gfx810",
2239"gfx9-4-generic",
2240"gfx9-generic",
2241"gfx900",
2242"gfx902",
2243"gfx904",
2244"gfx906",
2245"gfx908",
2246"gfx909",
2247"gfx90a",
2248"gfx90c",
2249"gfx942",
2250"gfx950",
2251"hainan",
2252"hawaii",
2253"iceland",
2254"kabini",
2255"kaveri",
2256"mullins",
2257"oland",
2258"pitcairn",
2259"polaris10",
2260"polaris11",
2261"stoney",
2262"tahiti",
2263"tonga",
2264"tongapro",
2265"verde"};
2266
2267namespace AMDGPU_MC {
2268
2269unsigned resolveVariantSchedClassImpl(unsigned SchedClass,
2270 const MCInst *MI, const MCInstrInfo *MCII, const MCSubtargetInfo &STI, unsigned CPUID) {
2271 switch (SchedClass) {
2272 case 34: // COPY
2273 if (CPUID == 1) { // SIQuarterSpeedModel
2274 return 68; // WriteSALU
2275 }
2276 if (CPUID == 2) { // GFX10SpeedModel
2277 return 68; // WriteSALU
2278 }
2279 if (CPUID == 3) { // GFX11SpeedModel
2280 return 68; // WriteSALU
2281 }
2282 if (CPUID == 4) { // GFX12SpeedModel
2283 return 68; // WriteSALU
2284 }
2285 if (CPUID == 5) { // GFX1250SpeedModel
2286 return 68; // WriteSALU
2287 }
2288 if (CPUID == 6) { // SIFullSpeedModel
2289 return 68; // WriteSALU
2290 }
2291 if (CPUID == 7) { // SIDPGFX942FullSpeedModel
2292 return 68; // WriteSALU
2293 }
2294 if (CPUID == 8) { // SIDPFullSpeedModel
2295 return 68; // WriteSALU
2296 }
2297 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2298 return 68; // WriteSALU
2299 }
2300 break;
2301 case 35: // V_ACCVGPR_WRITE_B32_e64
2302 if (CPUID == 1) { // SIQuarterSpeedModel
2303 return 70; // Write64Bit_ReadDefault
2304 }
2305 break;
2306 case 38: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi
2307 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2308 return 72; // Write8PassMAI_MIMFMARead
2309 }
2310 break;
2311 case 53: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2312 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2313 return 73; // Write4PassMAI_MIMFMARead
2314 }
2315 break;
2316 case 54: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2317 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2318 return 73; // Write4PassMAI_MIMFMARead
2319 }
2320 break;
2321 case 55: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd
2322 if (CPUID == 9) { // SIDPGFX950FullSpeedModel
2323 return 72; // Write8PassMAI_MIMFMARead
2324 }
2325 break;
2326 case 60: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr
2327 if (CPUID == 5) { // GFX1250SpeedModel
2328 return 75; // WriteXDL2PassWMMA
2329 }
2330 break;
2331 case 61: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250
2332 if (CPUID == 5) { // GFX1250SpeedModel
2333 return 75; // WriteXDL2PassWMMA
2334 }
2335 break;
2336 };
2337 // Don't know how to resolve this scheduling class.
2338 return 0;
2339}
2340
2341} // namespace AMDGPU_MC
2342struct AMDGPUGenMCSubtargetInfo : public MCSubtargetInfo {
2343 AMDGPUGenMCSubtargetInfo(const Triple &TT,
2344 StringRef CPU, StringRef TuneCPU, StringRef FS,
2345 ArrayRef<StringRef> PN,
2346 ArrayRef<SubtargetFeatureKV> PF,
2347 ArrayRef<SubtargetSubTypeKV> PD,
2348 const MCWriteProcResEntry *WPR,
2349 const MCWriteLatencyEntry *WL,
2350 const MCReadAdvanceEntry *RA, const InstrStage *IS,
2351 const unsigned *OC, const unsigned *FP) :
2352 MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD,
2353 WPR, WL, RA, IS, OC, FP) { }
2354
2355 unsigned resolveVariantSchedClass(unsigned SchedClass,
2356 const MCInst *MI, const MCInstrInfo *MCII,
2357 unsigned CPUID) const final {
2358 return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);
2359 }
2360 unsigned getHwModeSet() const final;
2361 unsigned getHwMode(enum HwModeType type = HwMode_Default) const final;
2362};
2363unsigned AMDGPUGenMCSubtargetInfo::getHwModeSet() const {
2364 [[maybe_unused]] const FeatureBitset &FB = getFeatureBits();
2365 // Collect HwModes and store them as a bit set.
2366 unsigned Modes = 0;
2367 if (FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs]) Modes |= (1 << 0);
2368 if (!FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs] && FB[AMDGPU::FeatureWavefrontSize32]) Modes |= (1 << 1);
2369 if (!FB[AMDGPU::FeatureMAIInsts] && FB[AMDGPU::FeatureRequiresAlignedVGPRs] && FB[AMDGPU::FeatureWavefrontSize64]) Modes |= (1 << 2);
2370 if ((FB[AMDGPU::FeatureWavefrontSize32] || FB[AMDGPU::FeatureAssemblerPermissiveWavesize]) && !FB[AMDGPU::FeatureRequiresAlignedVGPRs]) Modes |= (1 << 3);
2371 return Modes;
2372}
2373unsigned AMDGPUGenMCSubtargetInfo::getHwMode(enum HwModeType type) const {
2374 unsigned Modes = getHwModeSet();
2375
2376 if (!Modes)
2377 return Modes;
2378
2379 switch (type) {
2380 case HwMode_Default:
2381 return llvm::countr_zero(Modes) + 1;
2382 case HwMode_ValueType:
2383 Modes &= 15;
2384 if (!Modes)
2385 return Modes;
2386 if (!llvm::has_single_bit<unsigned>(Modes))
2387 llvm_unreachable("Two or more HwModes for ValueType were found!");
2388 return llvm::countr_zero(Modes) + 1;
2389 case HwMode_RegInfo:
2390 Modes &= 15;
2391 if (!Modes)
2392 return Modes;
2393 if (!llvm::has_single_bit<unsigned>(Modes))
2394 llvm_unreachable("Two or more HwModes for RegInfo were found!");
2395 return llvm::countr_zero(Modes) + 1;
2396 case HwMode_EncodingInfo:
2397 Modes &= 0;
2398 if (!Modes)
2399 return Modes;
2400 if (!llvm::has_single_bit<unsigned>(Modes))
2401 llvm_unreachable("Two or more HwModes for EncodingInfo were found!");
2402 return llvm::countr_zero(Modes) + 1;
2403 }
2404 llvm_unreachable("unexpected HwModeType");
2405 return 0; // should not get here
2406}
2407
2408static inline MCSubtargetInfo *createAMDGPUMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS) {
2409 return new AMDGPUGenMCSubtargetInfo(TT, CPU, TuneCPU, FS, AMDGPUNames, AMDGPUFeatureKV, AMDGPUSubTypeKV,
2410 AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable,
2411 nullptr, nullptr, nullptr);
2412}
2413
2414
2415} // namespace llvm
2416
2417#endif // GET_SUBTARGETINFO_MC_DESC
2418
2419#ifdef GET_SUBTARGETINFO_TARGET_DESC
2420#undef GET_SUBTARGETINFO_TARGET_DESC
2421
2422#include "llvm/ADT/BitmaskEnum.h"
2423#include "llvm/Support/Debug.h"
2424#include "llvm/Support/raw_ostream.h"
2425
2426// ParseSubtargetFeatures - Parses features string setting specified
2427// subtarget options.
2428void llvm::AMDGPUSubtarget::ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS) {
2429 LLVM_DEBUG(dbgs() << "\nFeatures:" << FS);
2430 LLVM_DEBUG(dbgs() << "\nCPU:" << CPU);
2431 LLVM_DEBUG(dbgs() << "\nTuneCPU:" << TuneCPU << "\n\n");
2432 InitMCProcessorInfo(CPU, TuneCPU, FS);
2433 const FeatureBitset &Bits = getFeatureBits();
2434 if (Bits[AMDGPU::Feature1_5xVGPRs]) Has1_5xVGPRs = true;
2435 if (Bits[AMDGPU::Feature16BitInsts]) Has16BitInsts = true;
2436 if (Bits[AMDGPU::Feature45BitNumRecordsBufferResource]) Has45BitNumRecordsBufferResource = true;
2437 if (Bits[AMDGPU::Feature64BitLiterals]) Has64BitLiterals = true;
2438 if (Bits[AMDGPU::Feature1024AddressableVGPRs]) Has1024AddressableVGPRs = true;
2439 if (Bits[AMDGPU::FeatureA16]) HasA16 = true;
2440 if (Bits[AMDGPU::FeatureAddMinMaxInsts]) HasAddMinMaxInsts = true;
2441 if (Bits[AMDGPU::FeatureAddNoCarryInsts]) HasAddNoCarryInsts = true;
2442 if (Bits[AMDGPU::FeatureAddSubU64Insts]) HasAddSubU64Insts = true;
2443 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize32768] && AddressableLocalMemorySize < 32768) AddressableLocalMemorySize = 32768;
2444 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize65536] && AddressableLocalMemorySize < 65536) AddressableLocalMemorySize = 65536;
2445 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize163840] && AddressableLocalMemorySize < 163840) AddressableLocalMemorySize = 163840;
2446 if (Bits[AMDGPU::FeatureAddressableLocalMemorySize327680] && AddressableLocalMemorySize < 327680) AddressableLocalMemorySize = 327680;
2447 if (Bits[AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics]) HasAgentScopeFineGrainedRemoteMemoryAtomics = true;
2448 if (Bits[AMDGPU::FeatureApertureRegs]) HasApertureRegs = true;
2449 if (Bits[AMDGPU::FeatureArchitectedFlatScratch]) HasArchitectedFlatScratch = true;
2450 if (Bits[AMDGPU::FeatureArchitectedSGPRs]) HasArchitectedSGPRs = true;
2451 if (Bits[AMDGPU::FeatureAshrPkInsts]) HasAshrPkInsts = true;
2452 if (Bits[AMDGPU::FeatureAssemblerPermissiveWavesize]) HasAssemblerPermissiveWavesize = true;
2453 if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts]) HasAtomicBufferGlobalPkAddF16Insts = true;
2454 if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts]) HasAtomicBufferGlobalPkAddF16NoRtnInsts = true;
2455 if (Bits[AMDGPU::FeatureAtomicBufferPkAddBF16Inst]) HasAtomicBufferPkAddBF16Inst = true;
2456 if (Bits[AMDGPU::FeatureAtomicCSubNoRtnInsts]) HasAtomicCSubNoRtnInsts = true;
2457 if (Bits[AMDGPU::FeatureAtomicDsPkAdd16Insts]) HasAtomicDsPkAdd16Insts = true;
2458 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts]) HasAtomicFMinFMaxF32FlatInsts = true;
2459 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts]) HasAtomicFMinFMaxF32GlobalInsts = true;
2460 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts]) HasAtomicFMinFMaxF64FlatInsts = true;
2461 if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts]) HasAtomicFMinFMaxF64GlobalInsts = true;
2462 if (Bits[AMDGPU::FeatureAtomicFaddNoRtnInsts]) HasAtomicFaddNoRtnInsts = true;
2463 if (Bits[AMDGPU::FeatureAtomicFaddRtnInsts]) HasAtomicFaddRtnInsts = true;
2464 if (Bits[AMDGPU::FeatureAtomicFlatPkAdd16Insts]) HasAtomicFlatPkAdd16Insts = true;
2465 if (Bits[AMDGPU::FeatureAtomicGlobalPkAddBF16Inst]) HasAtomicGlobalPkAddBF16Inst = true;
2466 if (Bits[AMDGPU::FeatureAutoWaitcntBeforeBarrier]) HasAutoWaitcntBeforeBarrier = true;
2467 if (Bits[AMDGPU::FeatureBF8ConversionScaleInsts]) HasBF8ConversionScaleInsts = true;
2468 if (Bits[AMDGPU::FeatureBF16ConversionInsts]) HasBF16ConversionInsts = true;
2469 if (Bits[AMDGPU::FeatureBF16PackedInsts]) HasBF16PackedInsts = true;
2470 if (Bits[AMDGPU::FeatureBF16TransInsts]) HasBF16TransInsts = true;
2471 if (Bits[AMDGPU::FeatureBVHDualAndBVH8Insts]) HasBVHDualAndBVH8Insts = true;
2472 if (Bits[AMDGPU::FeatureBackOffBarrier]) HasBackOffBarrier = true;
2473 if (Bits[AMDGPU::FeatureBitOp3Insts]) HasBitOp3Insts = true;
2474 if (Bits[AMDGPU::FeatureCIInsts]) HasCIInsts = true;
2475 if (Bits[AMDGPU::FeatureClusters]) HasClusters = true;
2476 if (Bits[AMDGPU::FeatureCuMode]) EnableCuMode = true;
2477 if (Bits[AMDGPU::FeatureCubeInsts]) HasCubeInsts = true;
2478 if (Bits[AMDGPU::FeatureCvtFP8VOP1Bug]) HasCvtFP8VOP1Bug = true;
2479 if (Bits[AMDGPU::FeatureCvtNormInsts]) HasCvtNormInsts = true;
2480 if (Bits[AMDGPU::FeatureCvtPkF16F32Inst]) HasCvtPkF16F32Inst = true;
2481 if (Bits[AMDGPU::FeatureCvtPkNormVOP2Insts]) HasCvtPkNormVOP2Insts = true;
2482 if (Bits[AMDGPU::FeatureCvtPkNormVOP3Insts]) HasCvtPkNormVOP3Insts = true;
2483 if (Bits[AMDGPU::FeatureD16Writes32BitVgpr]) HasD16Writes32BitVgpr = true;
2484 if (Bits[AMDGPU::FeatureDLInsts]) HasDLInsts = true;
2485 if (Bits[AMDGPU::FeatureDPALU_DPP]) HasDPALU_DPP = true;
2486 if (Bits[AMDGPU::FeatureDPP]) HasDPP = true;
2487 if (Bits[AMDGPU::FeatureDPP8]) HasDPP8 = true;
2488 if (Bits[AMDGPU::FeatureDPPSrc1SGPR]) HasDPPSrc1SGPR = true;
2489 if (Bits[AMDGPU::FeatureDefaultComponentBroadcast]) HasDefaultComponentBroadcast = true;
2490 if (Bits[AMDGPU::FeatureDefaultComponentZero]) HasDefaultComponentZero = true;
2491 if (Bits[AMDGPU::FeatureDot1Insts]) HasDot1Insts = true;
2492 if (Bits[AMDGPU::FeatureDot2Insts]) HasDot2Insts = true;
2493 if (Bits[AMDGPU::FeatureDot3Insts]) HasDot3Insts = true;
2494 if (Bits[AMDGPU::FeatureDot4Insts]) HasDot4Insts = true;
2495 if (Bits[AMDGPU::FeatureDot5Insts]) HasDot5Insts = true;
2496 if (Bits[AMDGPU::FeatureDot6Insts]) HasDot6Insts = true;
2497 if (Bits[AMDGPU::FeatureDot7Insts]) HasDot7Insts = true;
2498 if (Bits[AMDGPU::FeatureDot8Insts]) HasDot8Insts = true;
2499 if (Bits[AMDGPU::FeatureDot9Insts]) HasDot9Insts = true;
2500 if (Bits[AMDGPU::FeatureDot10Insts]) HasDot10Insts = true;
2501 if (Bits[AMDGPU::FeatureDot11Insts]) HasDot11Insts = true;
2502 if (Bits[AMDGPU::FeatureDot12Insts]) HasDot12Insts = true;
2503 if (Bits[AMDGPU::FeatureDot13Insts]) HasDot13Insts = true;
2504 if (Bits[AMDGPU::FeatureDsSrc2Insts]) HasDsSrc2Insts = true;
2505 if (Bits[AMDGPU::FeatureDumpCodeLower]) DumpCode = true;
2506 if (Bits[AMDGPU::FeatureEmulatedSystemScopeAtomics]) HasEmulatedSystemScopeAtomics = true;
2507 if (Bits[AMDGPU::FeatureEnableDS128]) EnableDS128 = true;
2508 if (Bits[AMDGPU::FeatureEnableFlatScratch]) EnableFlatScratch = true;
2509 if (Bits[AMDGPU::FeatureEnableLoadStoreOpt]) EnableLoadStoreOpt = true;
2510 if (Bits[AMDGPU::FeatureEnablePRTStrictNull]) EnablePRTStrictNull = true;
2511 if (Bits[AMDGPU::FeatureEnableSIScheduler]) EnableSIScheduler = true;
2512 if (Bits[AMDGPU::FeatureEnableUnsafeDSOffsetFolding]) EnableUnsafeDSOffsetFolding = true;
2513 if (Bits[AMDGPU::FeatureExtendedImageInsts]) HasExtendedImageInsts = true;
2514 if (Bits[AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts]) HasF16BF16ToFP6BF6ConversionScaleInsts = true;
2515 if (Bits[AMDGPU::FeatureF32ToF16BF16ConversionSRInsts]) HasF32ToF16BF16ConversionSRInsts = true;
2516 if (Bits[AMDGPU::FeatureFMA]) HasFMA = true;
2517 if (Bits[AMDGPU::FeatureFP4ConversionScaleInsts]) HasFP4ConversionScaleInsts = true;
2518 if (Bits[AMDGPU::FeatureFP6BF6ConversionScaleInsts]) HasFP6BF6ConversionScaleInsts = true;
2519 if (Bits[AMDGPU::FeatureFP8ConversionInsts]) HasFP8ConversionInsts = true;
2520 if (Bits[AMDGPU::FeatureFP8ConversionScaleInsts]) HasFP8ConversionScaleInsts = true;
2521 if (Bits[AMDGPU::FeatureFP8E5M3Insts]) HasFP8E5M3Insts = true;
2522 if (Bits[AMDGPU::FeatureFP8Insts]) HasFP8Insts = true;
2523 if (Bits[AMDGPU::FeatureFP64]) HasFP64 = true;
2524 if (Bits[AMDGPU::FeatureFastDenormalF32]) HasFastDenormalF32 = true;
2525 if (Bits[AMDGPU::FeatureFastFMAF32]) HasFastFMAF32 = true;
2526 if (Bits[AMDGPU::FeatureFlatAddressSpace]) HasFlatAddressSpace = true;
2527 if (Bits[AMDGPU::FeatureFlatAtomicFaddF32Inst]) HasFlatAtomicFaddF32Inst = true;
2528 if (Bits[AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst]) HasFlatBufferGlobalAtomicFaddF64Inst = true;
2529 if (Bits[AMDGPU::FeatureFlatGVSMode]) HasFlatGVSMode = true;
2530 if (Bits[AMDGPU::FeatureFlatGlobalInsts]) HasFlatGlobalInsts = true;
2531 if (Bits[AMDGPU::FeatureFlatInstOffsets]) HasFlatInstOffsets = true;
2532 if (Bits[AMDGPU::FeatureFlatScratchInsts]) HasFlatScratchInsts = true;
2533 if (Bits[AMDGPU::FeatureFlatSegmentOffsetBug]) HasFlatSegmentOffsetBug = true;
2534 if (Bits[AMDGPU::FeatureFmaMixBF16Insts]) HasFmaMixBF16Insts = true;
2535 if (Bits[AMDGPU::FeatureFmaMixInsts]) HasFmaMixInsts = true;
2536 if (Bits[AMDGPU::FeatureFmacF64Inst]) HasFmacF64Inst = true;
2537 if (Bits[AMDGPU::FeatureFullRate64Ops]) HasFullRate64Ops = true;
2538 if (Bits[AMDGPU::FeatureG16]) HasG16 = true;
2539 if (Bits[AMDGPU::FeatureGCN3Encoding]) HasGCN3Encoding = true;
2540 if (Bits[AMDGPU::FeatureGDS]) HasGDS = true;
2541 if (Bits[AMDGPU::FeatureGFX7GFX8GFX9Insts]) HasGFX7GFX8GFX9Insts = true;
2542 if (Bits[AMDGPU::FeatureGFX8Insts]) HasGFX8Insts = true;
2543 if (Bits[AMDGPU::FeatureGFX9] && Gen < GCNSubtarget::GFX9) Gen = GCNSubtarget::GFX9;
2544 if (Bits[AMDGPU::FeatureGFX9Insts]) HasGFX9Insts = true;
2545 if (Bits[AMDGPU::FeatureGFX10] && Gen < GCNSubtarget::GFX10) Gen = GCNSubtarget::GFX10;
2546 if (Bits[AMDGPU::FeatureGFX10Insts]) HasGFX10Insts = true;
2547 if (Bits[AMDGPU::FeatureGFX10_3Insts]) HasGFX10_3Insts = true;
2548 if (Bits[AMDGPU::FeatureGFX10_AEncoding]) HasGFX10_AEncoding = true;
2549 if (Bits[AMDGPU::FeatureGFX10_BEncoding]) HasGFX10_BEncoding = true;
2550 if (Bits[AMDGPU::FeatureGFX11] && Gen < GCNSubtarget::GFX11) Gen = GCNSubtarget::GFX11;
2551 if (Bits[AMDGPU::FeatureGFX11Insts]) HasGFX11Insts = true;
2552 if (Bits[AMDGPU::FeatureGFX12] && Gen < GCNSubtarget::GFX12) Gen = GCNSubtarget::GFX12;
2553 if (Bits[AMDGPU::FeatureGFX12Insts]) HasGFX12Insts = true;
2554 if (Bits[AMDGPU::FeatureGFX13] && Gen < GCNSubtarget::GFX13) Gen = GCNSubtarget::GFX13;
2555 if (Bits[AMDGPU::FeatureGFX13Insts]) HasGFX13Insts = true;
2556 if (Bits[AMDGPU::FeatureGFX90AInsts]) HasGFX90AInsts = true;
2557 if (Bits[AMDGPU::FeatureGFX940Insts]) HasGFX940Insts = true;
2558 if (Bits[AMDGPU::FeatureGFX950Insts]) HasGFX950Insts = true;
2559 if (Bits[AMDGPU::FeatureGFX1250Insts]) HasGFX1250Insts = true;
2560 if (Bits[AMDGPU::FeatureGWS]) HasGWS = true;
2561 if (Bits[AMDGPU::FeatureGetWaveIdInst]) HasGetWaveIdInst = true;
2562 if (Bits[AMDGPU::FeatureGloballyAddressableScratch]) HasGloballyAddressableScratch = true;
2563 if (Bits[AMDGPU::FeatureHalfRate64Ops]) HasHalfRate64Ops = true;
2564 if (Bits[AMDGPU::FeatureIEEEMinimumMaximumInsts]) HasIEEEMinimumMaximumInsts = true;
2565 if (Bits[AMDGPU::FeatureImageGather4D16Bug]) HasImageGather4D16Bug = true;
2566 if (Bits[AMDGPU::FeatureImageInsts]) HasImageInsts = true;
2567 if (Bits[AMDGPU::FeatureImageStoreD16Bug]) HasImageStoreD16Bug = true;
2568 if (Bits[AMDGPU::FeatureInstFwdPrefetchBug]) HasInstFwdPrefetchBug = true;
2569 if (Bits[AMDGPU::FeatureIntClamp]) HasIntClamp = true;
2570 if (Bits[AMDGPU::FeatureInv2PiInlineImm]) HasInv2PiInlineImm = true;
2571 if (Bits[AMDGPU::FeatureKernargPreload]) HasKernargPreload = true;
2572 if (Bits[AMDGPU::FeatureLDSBankCount16] && LDSBankCount < 16) LDSBankCount = 16;
2573 if (Bits[AMDGPU::FeatureLDSBankCount32] && LDSBankCount < 32) LDSBankCount = 32;
2574 if (Bits[AMDGPU::FeatureLDSMisalignedBug]) HasLDSMisalignedBug = true;
2575 if (Bits[AMDGPU::FeatureLdsBarrierArriveAtomic]) HasLdsBarrierArriveAtomic = true;
2576 if (Bits[AMDGPU::FeatureLdsBranchVmemWARHazard]) HasLdsBranchVmemWARHazard = true;
2577 if (Bits[AMDGPU::FeatureLerpInst]) HasLerpInst = true;
2578 if (Bits[AMDGPU::FeatureLshlAddU64Inst]) HasLshlAddU64Inst = true;
2579 if (Bits[AMDGPU::FeatureMADIntraFwdBug]) HasMADIntraFwdBug = true;
2580 if (Bits[AMDGPU::FeatureMAIInsts]) HasMAIInsts = true;
2581 if (Bits[AMDGPU::FeatureMFMAInlineLiteralBug]) HasMFMAInlineLiteralBug = true;
2582 if (Bits[AMDGPU::FeatureMIMG_R128]) HasMIMG_R128 = true;
2583 if (Bits[AMDGPU::FeatureMSAALoadDstSelBug]) HasMSAALoadDstSelBug = true;
2584 if (Bits[AMDGPU::FeatureMadMacF32Insts]) HasMadMacF32Insts = true;
2585 if (Bits[AMDGPU::FeatureMadMixInsts]) HasMadMixInsts = true;
2586 if (Bits[AMDGPU::FeatureMadU32Inst]) HasMadU32Inst = true;
2587 if (Bits[AMDGPU::FeatureMaxHardClauseLength32] && MaxHardClauseLength < 32) MaxHardClauseLength = 32;
2588 if (Bits[AMDGPU::FeatureMaxHardClauseLength63] && MaxHardClauseLength < 63) MaxHardClauseLength = 63;
2589 if (Bits[AMDGPU::FeatureMaxPrivateElementSize4] && MaxPrivateElementSize < 4) MaxPrivateElementSize = 4;
2590 if (Bits[AMDGPU::FeatureMaxPrivateElementSize8] && MaxPrivateElementSize < 8) MaxPrivateElementSize = 8;
2591 if (Bits[AMDGPU::FeatureMaxPrivateElementSize16] && MaxPrivateElementSize < 16) MaxPrivateElementSize = 16;
2592 if (Bits[AMDGPU::FeatureMcastLoadInsts]) HasMcastLoadInsts = true;
2593 if (Bits[AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport]) HasMemoryAtomicFaddF32DenormalSupport = true;
2594 if (Bits[AMDGPU::FeatureMin3Max3PKF16]) HasMin3Max3PKF16 = true;
2595 if (Bits[AMDGPU::FeatureMinimum3Maximum3F16]) HasMinimum3Maximum3F16 = true;
2596 if (Bits[AMDGPU::FeatureMinimum3Maximum3F32]) HasMinimum3Maximum3F32 = true;
2597 if (Bits[AMDGPU::FeatureMinimum3Maximum3PKF16]) HasMinimum3Maximum3PKF16 = true;
2598 if (Bits[AMDGPU::FeatureMovrel]) HasMovrel = true;
2599 if (Bits[AMDGPU::FeatureNSAClauseBug]) HasNSAClauseBug = true;
2600 if (Bits[AMDGPU::FeatureNSAEncoding]) HasNSAEncoding = true;
2601 if (Bits[AMDGPU::FeatureNSAtoVMEMBug]) HasNSAtoVMEMBug = true;
2602 if (Bits[AMDGPU::FeatureNegativeScratchOffsetBug]) HasNegativeScratchOffsetBug = true;
2603 if (Bits[AMDGPU::FeatureNegativeUnalignedScratchOffsetBug]) HasNegativeUnalignedScratchOffsetBug = true;
2604 if (Bits[AMDGPU::FeatureNoDataDepHazard]) HasNoDataDepHazard = true;
2605 if (Bits[AMDGPU::FeatureNoSdstCMPX]) HasNoSdstCMPX = true;
2606 if (Bits[AMDGPU::FeatureOffset3fBug]) HasOffset3fBug = true;
2607 if (Bits[AMDGPU::FeaturePackedFP32Ops]) HasPackedFP32Ops = true;
2608 if (Bits[AMDGPU::FeaturePackedTID]) HasPackedTID = true;
2609 if (Bits[AMDGPU::FeaturePartialNSAEncoding]) HasPartialNSAEncoding = true;
2610 if (Bits[AMDGPU::FeaturePermlane16Swap]) HasPermlane16Swap = true;
2611 if (Bits[AMDGPU::FeaturePermlane32Swap]) HasPermlane32Swap = true;
2612 if (Bits[AMDGPU::FeaturePkAddMinMaxInsts]) HasPkAddMinMaxInsts = true;
2613 if (Bits[AMDGPU::FeaturePkFmacF16Inst]) HasPkFmacF16Inst = true;
2614 if (Bits[AMDGPU::FeaturePointSampleAccel]) HasPointSampleAccel = true;
2615 if (Bits[AMDGPU::FeaturePreciseMemory]) EnablePreciseMemory = true;
2616 if (Bits[AMDGPU::FeaturePrivEnabledTrap2NopBug]) HasPrivEnabledTrap2NopBug = true;
2617 if (Bits[AMDGPU::FeaturePrngInst]) HasPrngInst = true;
2618 if (Bits[AMDGPU::FeaturePromoteAlloca]) EnablePromoteAlloca = true;
2619 if (Bits[AMDGPU::FeaturePseudoScalarTrans]) HasPseudoScalarTrans = true;
2620 if (Bits[AMDGPU::FeatureQsadInsts]) HasQsadInsts = true;
2621 if (Bits[AMDGPU::FeatureR128A16]) HasR128A16 = true;
2622 if (Bits[AMDGPU::FeatureRealTrue16Insts]) EnableRealTrue16Insts = true;
2623 if (Bits[AMDGPU::FeatureRelaxedBufferOOBMode]) HasRelaxedBufferOOBMode = true;
2624 if (Bits[AMDGPU::FeatureRequiredExportPriority]) HasRequiredExportPriority = true;
2625 if (Bits[AMDGPU::FeatureRequiresAlignedVGPRs]) RequiresAlignVGPR = true;
2626 if (Bits[AMDGPU::FeatureRequiresCOV6]) RequiresCOV6 = true;
2627 if (Bits[AMDGPU::FeatureRestrictedSOffset]) HasRestrictedSOffset = true;
2628 if (Bits[AMDGPU::FeatureSALUFloatInsts]) HasSALUFloatInsts = true;
2629 if (Bits[AMDGPU::FeatureSBarrierLeaveImm]) HasSBarrierLeaveImm = true;
2630 if (Bits[AMDGPU::FeatureSDWA]) HasSDWA = true;
2631 if (Bits[AMDGPU::FeatureSDWAMac]) HasSDWAMac = true;
2632 if (Bits[AMDGPU::FeatureSDWAOmod]) HasSDWAOmod = true;
2633 if (Bits[AMDGPU::FeatureSDWAOutModsVOPC]) HasSDWAOutModsVOPC = true;
2634 if (Bits[AMDGPU::FeatureSDWAScalar]) HasSDWAScalar = true;
2635 if (Bits[AMDGPU::FeatureSDWASdst]) HasSDWASdst = true;
2636 if (Bits[AMDGPU::FeatureSGPRInitBug]) HasSGPRInitBug = true;
2637 if (Bits[AMDGPU::FeatureSMEMtoVectorWriteHazard]) HasSMEMtoVectorWriteHazard = true;
2638 if (Bits[AMDGPU::FeatureSMemRealTime]) HasSMemRealTime = true;
2639 if (Bits[AMDGPU::FeatureSMemTimeInst]) HasSMemTimeInst = true;
2640 if (Bits[AMDGPU::FeatureSRAMECC]) EnableSRAMECC = true;
2641 if (Bits[AMDGPU::FeatureSWakeupBarrier]) HasSWakeupBarrier = true;
2642 if (Bits[AMDGPU::FeatureSWakeupImm]) HasSWakeupImm = true;
2643 if (Bits[AMDGPU::FeatureSadInsts]) HasSadInsts = true;
2644 if (Bits[AMDGPU::FeatureSafeCUPrefetch]) HasSafeCUPrefetch = true;
2645 if (Bits[AMDGPU::FeatureSafeSmemPrefetch]) HasSafeSmemPrefetch = true;
2646 if (Bits[AMDGPU::FeatureScalarAtomics]) HasScalarAtomics = true;
2647 if (Bits[AMDGPU::FeatureScalarDwordx3Loads]) HasScalarDwordx3Loads = true;
2648 if (Bits[AMDGPU::FeatureScalarFlatScratchInsts]) HasScalarFlatScratchInsts = true;
2649 if (Bits[AMDGPU::FeatureScalarStores]) HasScalarStores = true;
2650 if (Bits[AMDGPU::FeatureSeaIslands] && Gen < GCNSubtarget::SEA_ISLANDS) Gen = GCNSubtarget::SEA_ISLANDS;
2651 if (Bits[AMDGPU::FeatureSetPrioIncWgInst]) HasSetPrioIncWgInst = true;
2652 if (Bits[AMDGPU::FeatureSetregVGPRMSBFixup]) HasSetregVGPRMSBFixup = true;
2653 if (Bits[AMDGPU::FeatureShaderCyclesHiLoRegisters]) HasShaderCyclesHiLoRegisters = true;
2654 if (Bits[AMDGPU::FeatureShaderCyclesRegister]) HasShaderCyclesRegister = true;
2655 if (Bits[AMDGPU::FeatureSouthernIslands] && Gen < GCNSubtarget::SOUTHERN_ISLANDS) Gen = GCNSubtarget::SOUTHERN_ISLANDS;
2656 if (Bits[AMDGPU::FeatureSupportsSRAMECC]) SupportsSRAMECC = true;
2657 if (Bits[AMDGPU::FeatureSupportsXNACK]) SupportsXNACK = true;
2658 if (Bits[AMDGPU::FeatureTanhInsts]) HasTanhInsts = true;
2659 if (Bits[AMDGPU::FeatureTensorCvtLutInsts]) HasTensorCvtLutInsts = true;
2660 if (Bits[AMDGPU::FeatureTgSplit]) EnableTgSplit = true;
2661 if (Bits[AMDGPU::FeatureTransposeLoadF4F6Insts]) HasTransposeLoadF4F6Insts = true;
2662 if (Bits[AMDGPU::FeatureTrapHandler]) HasTrapHandler = true;
2663 if (Bits[AMDGPU::FeatureTrigReducedRange]) HasTrigReducedRange = true;
2664 if (Bits[AMDGPU::FeatureTrue16BitInsts]) HasTrue16BitInsts = true;
2665 if (Bits[AMDGPU::FeatureUnalignedAccessMode]) HasUnalignedAccessMode = true;
2666 if (Bits[AMDGPU::FeatureUnalignedBufferAccess]) HasUnalignedBufferAccess = true;
2667 if (Bits[AMDGPU::FeatureUnalignedDSAccess]) HasUnalignedDSAccess = true;
2668 if (Bits[AMDGPU::FeatureUnalignedScratchAccess]) HasUnalignedScratchAccess = true;
2669 if (Bits[AMDGPU::FeatureUnpackedD16VMem]) HasUnpackedD16VMem = true;
2670 if (Bits[AMDGPU::FeatureUseAddPC64Inst]) UseAddPC64Inst = true;
2671 if (Bits[AMDGPU::FeatureUseBlockVGPROpsForCSR]) UseBlockVGPROpsForCSR = true;
2672 if (Bits[AMDGPU::FeatureUseFlatForGlobal]) UseFlatForGlobal = true;
2673 if (Bits[AMDGPU::FeatureUserSGPRInit16Bug]) HasUserSGPRInit16Bug = true;
2674 if (Bits[AMDGPU::FeatureVALUTransUseHazard]) HasVALUTransUseHazard = true;
2675 if (Bits[AMDGPU::FeatureVGPRIndexMode]) HasVGPRIndexMode = true;
2676 if (Bits[AMDGPU::FeatureVMEMtoScalarWriteHazard]) HasVMEMtoScalarWriteHazard = true;
2677 if (Bits[AMDGPU::FeatureVMemToLDSLoad]) HasVMemToLDSLoad = true;
2678 if (Bits[AMDGPU::FeatureVOP3Literal]) HasVOP3Literal = true;
2679 if (Bits[AMDGPU::FeatureVOP3PInsts]) HasVOP3PInsts = true;
2680 if (Bits[AMDGPU::FeatureVOPDInsts]) HasVOPDInsts = true;
2681 if (Bits[AMDGPU::FeatureVcmpxExecWARHazard]) HasVcmpxExecWARHazard = true;
2682 if (Bits[AMDGPU::FeatureVcmpxPermlaneHazard]) HasVcmpxPermlaneHazard = true;
2683 if (Bits[AMDGPU::FeatureVmemPrefInsts]) HasVmemPrefInsts = true;
2684 if (Bits[AMDGPU::FeatureVmemWriteVgprInOrder]) HasVmemWriteVgprInOrder = true;
2685 if (Bits[AMDGPU::FeatureVolcanicIslands] && Gen < GCNSubtarget::VOLCANIC_ISLANDS) Gen = GCNSubtarget::VOLCANIC_ISLANDS;
2686 if (Bits[AMDGPU::FeatureVscnt]) HasVscnt = true;
2687 if (Bits[AMDGPU::FeatureWaitXcnt]) HasWaitXcnt = true;
2688 if (Bits[AMDGPU::FeatureWaitsBeforeSystemScopeStores]) RequiresWaitsBeforeSystemScopeStores = true;
2689 if (Bits[AMDGPU::FeatureWavefrontSize16] && WavefrontSizeLog2 < 4) WavefrontSizeLog2 = 4;
2690 if (Bits[AMDGPU::FeatureWavefrontSize32] && WavefrontSizeLog2 < 5) WavefrontSizeLog2 = 5;
2691 if (Bits[AMDGPU::FeatureWavefrontSize64] && WavefrontSizeLog2 < 6) WavefrontSizeLog2 = 6;
2692 if (Bits[AMDGPU::FeatureXF32Insts]) HasXF32Insts = true;
2693 if (Bits[AMDGPU::FeatureXNACK]) EnableXNACK = true;
2694}
2695
2696#endif // GET_SUBTARGETINFO_TARGET_DESC
2697
2698#ifdef GET_SUBTARGETINFO_HEADER
2699#undef GET_SUBTARGETINFO_HEADER
2700
2701namespace llvm {
2702
2703class DFAPacketizer;
2704namespace AMDGPU_MC {
2705
2706unsigned resolveVariantSchedClassImpl(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, const MCSubtargetInfo &STI, unsigned CPUID);
2707
2708} // namespace AMDGPU_MC
2709struct AMDGPUGenSubtargetInfo : public TargetSubtargetInfo {
2710 explicit AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS);
2711public:
2712 unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *DefMI, const TargetSchedModel *SchedModel) const final;
2713 unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const final;
2714 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
2715 enum class AMDGPUHwModeBits : unsigned {
2716 DefaultMode = 0,
2717 AVAlign2LoadStoreMode = (1 << 0),
2718 AlignedVGPRNoAGPRMode_Wave32 = (1 << 1),
2719 AlignedVGPRNoAGPRMode_Wave64 = (1 << 2),
2720 anonymous_14566 = (1 << 3),
2721
2722 LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/anonymous_14566),
2723 };
2724 unsigned getHwModeSet() const final;
2725 unsigned getHwMode(enum HwModeType type = HwMode_Default) const final;
2726};
2727
2728} // namespace llvm
2729
2730#endif // GET_SUBTARGETINFO_HEADER
2731
2732#ifdef GET_SUBTARGETINFO_CTOR
2733#undef GET_SUBTARGETINFO_CTOR
2734
2735#include "llvm/CodeGen/TargetSchedule.h"
2736
2737namespace llvm {
2738
2739extern const llvm::StringRef AMDGPUNames[];
2740extern const llvm::SubtargetFeatureKV AMDGPUFeatureKV[];
2741extern const llvm::SubtargetSubTypeKV AMDGPUSubTypeKV[];
2742extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[];
2743extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[];
2744extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[];
2745AMDGPUGenSubtargetInfo::AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS)
2746 : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, ArrayRef(AMDGPUNames, 74), ArrayRef(AMDGPUFeatureKV, 260), ArrayRef(AMDGPUSubTypeKV, 74),
2747 AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable,
2748 nullptr, nullptr, nullptr) {}
2749
2750unsigned AMDGPUGenSubtargetInfo
2751::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
2752
2753 const SIInstrInfo *TII =
2754 static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo());
2755 (void)TII;
2756
2757 switch (SchedClass) {
2758 case 34: // COPY
2759 if (SchedModel->getProcessorID() == 1) { // SIQuarterSpeedModel
2760 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2761 return 66; // Write32Bit
2762 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2763 return 67; // Write64Bit
2764 return 68; // WriteSALU
2765 }
2766 if (SchedModel->getProcessorID() == 2) { // GFX10SpeedModel
2767 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2768 return 66; // Write32Bit
2769 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2770 return 67; // Write64Bit
2771 return 68; // WriteSALU
2772 }
2773 if (SchedModel->getProcessorID() == 3) { // GFX11SpeedModel
2774 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2775 return 66; // Write32Bit
2776 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2777 return 67; // Write64Bit
2778 return 68; // WriteSALU
2779 }
2780 if (SchedModel->getProcessorID() == 4) { // GFX12SpeedModel
2781 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2782 return 66; // Write32Bit
2783 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2784 return 67; // Write64Bit
2785 return 68; // WriteSALU
2786 }
2787 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
2788 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2789 return 66; // Write32Bit
2790 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2791 return 67; // Write64Bit
2792 return 68; // WriteSALU
2793 }
2794 if (SchedModel->getProcessorID() == 6) { // SIFullSpeedModel
2795 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2796 return 66; // Write32Bit
2797 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2798 return 67; // Write64Bit
2799 return 68; // WriteSALU
2800 }
2801 if (SchedModel->getProcessorID() == 7) { // SIDPGFX942FullSpeedModel
2802 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2803 return 66; // Write32Bit
2804 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2805 return 67; // Write64Bit
2806 return 68; // WriteSALU
2807 }
2808 if (SchedModel->getProcessorID() == 8) { // SIDPFullSpeedModel
2809 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2810 return 66; // Write32Bit
2811 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2812 return 67; // Write64Bit
2813 return 68; // WriteSALU
2814 }
2815 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2816 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32)
2817 return 66; // Write32Bit
2818 if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32)
2819 return 67; // Write64Bit
2820 return 68; // WriteSALU
2821 }
2822 break;
2823 case 35: // V_ACCVGPR_WRITE_B32_e64
2824 if (SchedModel->getProcessorID() == 1) { // SIQuarterSpeedModel
2825 if (TII->hasVGPRUses(*MI))
2826 return 69; // Write64Bit_MIVGPRRead
2827 return 70; // Write64Bit_ReadDefault
2828 }
2829 break;
2830 case 38: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi
2831 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2832 if (
2833 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2834 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2835)
2836 return 71; // Write16PassMAI_MIMFMARead
2837 return 72; // Write8PassMAI_MIMFMARead
2838 }
2839 break;
2840 case 53: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2841 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2842 if (
2843 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2844 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2845)
2846 return 72; // Write8PassMAI_MIMFMARead
2847 return 73; // Write4PassMAI_MIMFMARead
2848 }
2849 break;
2850 case 54: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd
2851 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2852 if (
2853 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2854 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2855)
2856 return 72; // Write8PassMAI_MIMFMARead
2857 return 73; // Write4PassMAI_MIMFMARead
2858 }
2859 break;
2860 case 55: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd
2861 if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel
2862 if (
2863 TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 ||
2864 TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2
2865)
2866 return 71; // Write16PassMAI_MIMFMARead
2867 return 72; // Write8PassMAI_MIMFMARead
2868 }
2869 break;
2870 case 60: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_threeaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr
2871 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
2872 if (
2873 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8 ||
2874 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8
2875)
2876 return 74; // WriteXDL4PassWMMA
2877 return 75; // WriteXDL2PassWMMA
2878 }
2879 break;
2880 case 61: // V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_V_WMMA_F32_16X16X128_F8F6F4_f4_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f4_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f6_f8_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f4_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f6_w32_twoaddr_gfx1250_V_WMMA_F32_16X16X128_F8F6F4_f8_f8_w32_twoaddr_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_w32_gfx1250_V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_gfx1250
2881 if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel
2882 if (
2883 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_a_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8 ||
2884 TII->getNamedOperand(*MI, AMDGPU::OpName::matrix_b_fmt)->getImm() <= AMDGPU::WMMA::MATRIX_FMT_BF8
2885)
2886 return 74; // WriteXDL4PassWMMA
2887 return 75; // WriteXDL2PassWMMA
2888 }
2889 break;
2890 };
2891 report_fatal_error("Expected a variant SchedClass");
2892} // AMDGPUGenSubtargetInfo::resolveSchedClass
2893
2894unsigned AMDGPUGenSubtargetInfo
2895::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const {
2896 return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);
2897} // AMDGPUGenSubtargetInfo::resolveVariantSchedClass
2898
2899unsigned AMDGPUGenSubtargetInfo::getHwModeSet() const {
2900 [[maybe_unused]] const auto *Subtarget =
2901 static_cast<const AMDGPUSubtarget *>(this);
2902 // Collect HwModes and store them as a bit set.
2903 unsigned Modes = 0;
2904 if ((Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs())) Modes |= (1 << 0);
2905 if ((!Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs()) && (Subtarget->isWave32())) Modes |= (1 << 1);
2906 if ((!Subtarget->hasMAIInsts()) && (Subtarget->needsAlignedVGPRs()) && (Subtarget->isWave64())) Modes |= (1 << 2);
2907 if ((Subtarget->isWave32()) && (!Subtarget->needsAlignedVGPRs())) Modes |= (1 << 3);
2908 return Modes;
2909}
2910unsigned AMDGPUGenSubtargetInfo::getHwMode(enum HwModeType type) const {
2911 unsigned Modes = getHwModeSet();
2912
2913 if (!Modes)
2914 return Modes;
2915
2916 switch (type) {
2917 case HwMode_Default:
2918 return llvm::countr_zero(Modes) + 1;
2919 case HwMode_ValueType:
2920 Modes &= 15;
2921 if (!Modes)
2922 return Modes;
2923 if (!llvm::has_single_bit<unsigned>(Modes))
2924 llvm_unreachable("Two or more HwModes for ValueType were found!");
2925 return llvm::countr_zero(Modes) + 1;
2926 case HwMode_RegInfo:
2927 Modes &= 15;
2928 if (!Modes)
2929 return Modes;
2930 if (!llvm::has_single_bit<unsigned>(Modes))
2931 llvm_unreachable("Two or more HwModes for RegInfo were found!");
2932 return llvm::countr_zero(Modes) + 1;
2933 case HwMode_EncodingInfo:
2934 Modes &= 0;
2935 if (!Modes)
2936 return Modes;
2937 if (!llvm::has_single_bit<unsigned>(Modes))
2938 llvm_unreachable("Two or more HwModes for EncodingInfo were found!");
2939 return llvm::countr_zero(Modes) + 1;
2940 }
2941 llvm_unreachable("unexpected HwModeType");
2942 return 0; // should not get here
2943}
2944
2945} // namespace llvm
2946
2947#endif // GET_SUBTARGETINFO_CTOR
2948
2949#ifdef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
2950#undef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
2951
2952
2953#endif // GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
2954
2955#ifdef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
2956#undef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
2957
2958
2959#endif // GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
2960
2961