1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_CALLING_CONV_IMPL
10#undef GET_CALLING_CONV_IMPL
11
12static bool CC_BPF32(unsigned ValNo, MVT ValVT,
13 MVT LocVT, CCValAssign::LocInfo LocInfo,
14 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
15static bool CC_BPF64(unsigned ValNo, MVT ValVT,
16 MVT LocVT, CCValAssign::LocInfo LocInfo,
17 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
18static bool RetCC_BPF32(unsigned ValNo, MVT ValVT,
19 MVT LocVT, CCValAssign::LocInfo LocInfo,
20 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
21static bool RetCC_BPF64(unsigned ValNo, MVT ValVT,
22 MVT LocVT, CCValAssign::LocInfo LocInfo,
23 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
24
25
26static bool CC_BPF32(unsigned ValNo, MVT ValVT,
27 MVT LocVT, CCValAssign::LocInfo LocInfo,
28 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
29
30 if (LocVT == MVT::i32) {
31 static const MCPhysReg RegList1[] = {
32 BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5
33 };
34 static const MCPhysReg RegList2[] = {
35 BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5
36 };
37 if (MCRegister Reg = State.AllocateReg(Regs: RegList1, ShadowRegs: RegList2)) {
38 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
39 return false;
40 }
41 }
42
43 if (LocVT == MVT::i64) {
44 static const MCPhysReg RegList3[] = {
45 BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5
46 };
47 static const MCPhysReg RegList4[] = {
48 BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5
49 };
50 if (MCRegister Reg = State.AllocateReg(Regs: RegList3, ShadowRegs: RegList4)) {
51 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
52 return false;
53 }
54 }
55
56 int64_t Offset5 = State.AllocateStack(Size: 8, Alignment: Align(8));
57 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset5, LocVT, HTP: LocInfo));
58 return false;
59
60 return true; // CC didn't match.
61}
62
63
64static bool CC_BPF64(unsigned ValNo, MVT ValVT,
65 MVT LocVT, CCValAssign::LocInfo LocInfo,
66 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
67
68 if (LocVT == MVT::i8 ||
69 LocVT == MVT::i16 ||
70 LocVT == MVT::i32) {
71 LocVT = MVT::i64;
72 if (ArgFlags.isSExt())
73 LocInfo = CCValAssign::SExt;
74 else if (ArgFlags.isZExt())
75 LocInfo = CCValAssign::ZExt;
76 else
77 LocInfo = CCValAssign::AExt;
78 }
79
80 if (LocVT == MVT::i64) {
81 static const MCPhysReg RegList1[] = {
82 BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5
83 };
84 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
85 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
86 return false;
87 }
88 }
89
90 int64_t Offset2 = State.AllocateStack(Size: 8, Alignment: Align(8));
91 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset2, LocVT, HTP: LocInfo));
92 return false;
93
94 return true; // CC didn't match.
95}
96
97
98static bool RetCC_BPF32(unsigned ValNo, MVT ValVT,
99 MVT LocVT, CCValAssign::LocInfo LocInfo,
100 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
101
102 if (LocVT == MVT::i32) {
103 static const MCPhysReg RegList1[] = {
104 BPF::W0, BPF::W2
105 };
106 static const MCPhysReg RegList2[] = {
107 BPF::R0, BPF::R2
108 };
109 if (MCRegister Reg = State.AllocateReg(Regs: RegList1, ShadowRegs: RegList2)) {
110 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
111 return false;
112 }
113 }
114
115 if (LocVT == MVT::i64) {
116 static const MCPhysReg RegList3[] = {
117 BPF::R0, BPF::R2
118 };
119 static const MCPhysReg RegList4[] = {
120 BPF::W0, BPF::W2
121 };
122 if (MCRegister Reg = State.AllocateReg(Regs: RegList3, ShadowRegs: RegList4)) {
123 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
124 return false;
125 }
126 }
127
128 return true; // CC didn't match.
129}
130
131
132static bool RetCC_BPF64(unsigned ValNo, MVT ValVT,
133 MVT LocVT, CCValAssign::LocInfo LocInfo,
134 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
135
136 if (LocVT == MVT::i64) {
137 static const MCPhysReg RegList1[] = {
138 BPF::R0, BPF::R2
139 };
140 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
141 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
142 return false;
143 }
144 }
145
146 return true; // CC didn't match.
147}
148
149#endif // GET_CALLING_CONV_IMPL
150
151#ifdef GET_CC_REGISTER_LISTS
152#undef GET_CC_REGISTER_LISTS
153
154const MCRegister CC_BPF32_ArgRegs[] = { 0 };
155const MCRegister CC_BPF64_ArgRegs[] = { BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5 };
156const MCRegister RetCC_BPF32_ArgRegs[] = { 0 };
157const MCRegister RetCC_BPF64_ArgRegs[] = { BPF::R0, BPF::R2 };
158
159#endif // GET_CC_REGISTER_LISTS
160
161