1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#if !defined(GET_CC_REGISTER_LISTS)
10
11static bool CC_BPF32(unsigned ValNo, MVT ValVT,
12 MVT LocVT, CCValAssign::LocInfo LocInfo,
13 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
14static bool CC_BPF64(unsigned ValNo, MVT ValVT,
15 MVT LocVT, CCValAssign::LocInfo LocInfo,
16 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
17static bool RetCC_BPF32(unsigned ValNo, MVT ValVT,
18 MVT LocVT, CCValAssign::LocInfo LocInfo,
19 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
20static bool RetCC_BPF64(unsigned ValNo, MVT ValVT,
21 MVT LocVT, CCValAssign::LocInfo LocInfo,
22 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
23
24
25static bool CC_BPF32(unsigned ValNo, MVT ValVT,
26 MVT LocVT, CCValAssign::LocInfo LocInfo,
27 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
28
29 if (LocVT == MVT::i32) {
30 static const MCPhysReg RegList1[] = {
31 BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5
32 };
33 static const MCPhysReg RegList2[] = {
34 BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5
35 };
36 if (MCRegister Reg = State.AllocateReg(Regs: RegList1, ShadowRegs: RegList2)) {
37 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
38 return false;
39 }
40 }
41
42 if (LocVT == MVT::i64) {
43 static const MCPhysReg RegList3[] = {
44 BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5
45 };
46 static const MCPhysReg RegList4[] = {
47 BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5
48 };
49 if (MCRegister Reg = State.AllocateReg(Regs: RegList3, ShadowRegs: RegList4)) {
50 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
51 return false;
52 }
53 }
54
55 int64_t Offset5 = State.AllocateStack(Size: 8, Alignment: Align(8));
56 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset5, LocVT, HTP: LocInfo));
57 return false;
58
59 return true; // CC didn't match.
60}
61
62
63static bool CC_BPF64(unsigned ValNo, MVT ValVT,
64 MVT LocVT, CCValAssign::LocInfo LocInfo,
65 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
66
67 if (LocVT == MVT::i8 ||
68 LocVT == MVT::i16 ||
69 LocVT == MVT::i32) {
70 LocVT = MVT::i64;
71 if (ArgFlags.isSExt())
72 LocInfo = CCValAssign::SExt;
73 else if (ArgFlags.isZExt())
74 LocInfo = CCValAssign::ZExt;
75 else
76 LocInfo = CCValAssign::AExt;
77 }
78
79 if (LocVT == MVT::i64) {
80 static const MCPhysReg RegList1[] = {
81 BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5
82 };
83 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
84 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
85 return false;
86 }
87 }
88
89 int64_t Offset2 = State.AllocateStack(Size: 8, Alignment: Align(8));
90 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset2, LocVT, HTP: LocInfo));
91 return false;
92
93 return true; // CC didn't match.
94}
95
96
97static bool RetCC_BPF32(unsigned ValNo, MVT ValVT,
98 MVT LocVT, CCValAssign::LocInfo LocInfo,
99 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
100
101 if (LocVT == MVT::i32) {
102 static const MCPhysReg RegList1[] = {
103 BPF::W0, BPF::W2
104 };
105 static const MCPhysReg RegList2[] = {
106 BPF::R0, BPF::R2
107 };
108 if (MCRegister Reg = State.AllocateReg(Regs: RegList1, ShadowRegs: RegList2)) {
109 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
110 return false;
111 }
112 }
113
114 if (LocVT == MVT::i64) {
115 static const MCPhysReg RegList3[] = {
116 BPF::R0, BPF::R2
117 };
118 static const MCPhysReg RegList4[] = {
119 BPF::W0, BPF::W2
120 };
121 if (MCRegister Reg = State.AllocateReg(Regs: RegList3, ShadowRegs: RegList4)) {
122 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
123 return false;
124 }
125 }
126
127 return true; // CC didn't match.
128}
129
130
131static bool RetCC_BPF64(unsigned ValNo, MVT ValVT,
132 MVT LocVT, CCValAssign::LocInfo LocInfo,
133 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
134
135 if (LocVT == MVT::i64) {
136 static const MCPhysReg RegList1[] = {
137 BPF::R0, BPF::R2
138 };
139 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
140 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
141 return false;
142 }
143 }
144
145 return true; // CC didn't match.
146}
147
148#else
149
150const MCRegister CC_BPF32_ArgRegs[] = { 0 };
151const MCRegister CC_BPF64_ArgRegs[] = { BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5 };
152const MCRegister RetCC_BPF32_ArgRegs[] = { 0 };
153const MCRegister RetCC_BPF64_ArgRegs[] = { BPF::R0, BPF::R2 };
154
155#endif // !defined(GET_CC_REGISTER_LISTS)
156
157