1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register Enum Values *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11class MCRegisterClass;
12extern const MCRegisterClass LanaiMCRegisterClasses[];
13
14namespace Lanai {
15
16enum : unsigned {
17 NoRegister,
18 FP = 1,
19 PC = 2,
20 RCA = 3,
21 RV = 4,
22 SP = 5,
23 SR = 6,
24 R0 = 7,
25 R1 = 8,
26 R2 = 9,
27 R3 = 10,
28 R4 = 11,
29 R5 = 12,
30 R6 = 13,
31 R7 = 14,
32 R8 = 15,
33 R9 = 16,
34 R10 = 17,
35 R11 = 18,
36 R12 = 19,
37 R13 = 20,
38 R14 = 21,
39 R15 = 22,
40 R16 = 23,
41 R17 = 24,
42 R18 = 25,
43 R19 = 26,
44 R20 = 27,
45 R21 = 28,
46 R22 = 29,
47 R23 = 30,
48 R24 = 31,
49 R25 = 32,
50 R26 = 33,
51 R27 = 34,
52 R28 = 35,
53 R29 = 36,
54 R30 = 37,
55 R31 = 38,
56 RR1 = 39,
57 RR2 = 40,
58 NUM_TARGET_REGS // 41
59};
60
61} // namespace Lanai
62
63// Register classes
64
65namespace Lanai {
66
67enum {
68 GPRRegClassID = 0,
69 GPR_with_sub_32RegClassID = 1,
70 CCRRegClassID = 2,
71
72};
73
74} // namespace Lanai
75
76// Subregister indices
77
78namespace Lanai {
79
80enum : uint16_t {
81 NoSubRegister,
82 sub_32, // 1
83 NUM_TARGET_SUBREGS
84};
85
86} // namespace Lanai
87// Register pressure sets enum.
88namespace Lanai {
89
90enum RegisterPressureSets {
91 GPR_with_sub_32 = 0,
92 GPR = 1,
93};
94
95} // namespace Lanai
96
97} // namespace llvm
98