| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
|---|---|
| 2 | |* *| |
| 3 | |* Target Instruction Enum Values and Descriptors *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #ifdef GET_INSTRINFO_ENUM |
| 10 | #undef GET_INSTRINFO_ENUM |
| 11 | |
| 12 | namespace llvm::LoongArch { |
| 13 | |
| 14 | enum { |
| 15 | PHI = 0, // Target.td:1329 |
| 16 | INLINEASM = 1, // Target.td:1335 |
| 17 | INLINEASM_BR = 2, // Target.td:1341 |
| 18 | CFI_INSTRUCTION = 3, // Target.td:1350 |
| 19 | EH_LABEL = 4, // Target.td:1359 |
| 20 | GC_LABEL = 5, // Target.td:1368 |
| 21 | ANNOTATION_LABEL = 6, // Target.td:1377 |
| 22 | KILL = 7, // Target.td:1385 |
| 23 | EXTRACT_SUBREG = 8, // Target.td:1392 |
| 24 | INSERT_SUBREG = 9, // Target.td:1398 |
| 25 | IMPLICIT_DEF = 10, // Target.td:1405 |
| 26 | INIT_UNDEF = 11, // Target.td:1414 |
| 27 | SUBREG_TO_REG = 12, // Target.td:1421 |
| 28 | COPY_TO_REGCLASS = 13, // Target.td:1427 |
| 29 | DBG_VALUE = 14, // Target.td:1434 |
| 30 | DBG_VALUE_LIST = 15, // Target.td:1441 |
| 31 | DBG_INSTR_REF = 16, // Target.td:1448 |
| 32 | DBG_PHI = 17, // Target.td:1455 |
| 33 | DBG_LABEL = 18, // Target.td:1462 |
| 34 | REG_SEQUENCE = 19, // Target.td:1469 |
| 35 | COPY = 20, // Target.td:1476 |
| 36 | COPY_LANEMASK = 21, // Target.td:1484 |
| 37 | BUNDLE = 22, // Target.td:1491 |
| 38 | LIFETIME_START = 23, // Target.td:1497 |
| 39 | LIFETIME_END = 24, // Target.td:1504 |
| 40 | PSEUDO_PROBE = 25, // Target.td:1511 |
| 41 | ARITH_FENCE = 26, // Target.td:1518 |
| 42 | STACKMAP = 27, // Target.td:1527 |
| 43 | FENTRY_CALL = 28, // Target.td:1662 |
| 44 | PATCHPOINT = 29, // Target.td:1535 |
| 45 | LOAD_STACK_GUARD = 30, // Target.td:1553 |
| 46 | PREALLOCATED_SETUP = 31, // Target.td:1561 |
| 47 | PREALLOCATED_ARG = 32, // Target.td:1567 |
| 48 | STATEPOINT = 33, // Target.td:1544 |
| 49 | LOCAL_ESCAPE = 34, // Target.td:1573 |
| 50 | FAULTING_OP = 35, // Target.td:1582 |
| 51 | PATCHABLE_OP = 36, // Target.td:1602 |
| 52 | PATCHABLE_FUNCTION_ENTER = 37, // Target.td:1610 |
| 53 | PATCHABLE_RET = 38, // Target.td:1617 |
| 54 | PATCHABLE_FUNCTION_EXIT = 39, // Target.td:1626 |
| 55 | PATCHABLE_TAIL_CALL = 40, // Target.td:1634 |
| 56 | PATCHABLE_EVENT_CALL = 41, // Target.td:1642 |
| 57 | PATCHABLE_TYPED_EVENT_CALL = 42, // Target.td:1652 |
| 58 | ICALL_BRANCH_FUNNEL = 43, // Target.td:1672 |
| 59 | FAKE_USE = 44, // Target.td:1592 |
| 60 | MEMBARRIER = 45, // Target.td:1678 |
| 61 | JUMP_TABLE_DEBUG_INFO = 46, // Target.td:1686 |
| 62 | RELOC_NONE = 47, // Target.td:1694 |
| 63 | CONVERGENCECTRL_ENTRY = 48, // Target.td:1706 |
| 64 | CONVERGENCECTRL_ANCHOR = 49, // Target.td:1702 |
| 65 | CONVERGENCECTRL_LOOP = 50, // Target.td:1710 |
| 66 | CONVERGENCECTRL_GLUE = 51, // Target.td:1714 |
| 67 | G_ASSERT_SEXT = 52, // GenericOpcodes.td:1937 |
| 68 | G_ASSERT_ZEXT = 53, // GenericOpcodes.td:1929 |
| 69 | G_ASSERT_ALIGN = 54, // GenericOpcodes.td:1944 |
| 70 | G_ADD = 55, // GenericOpcodes.td:308 |
| 71 | G_SUB = 56, // GenericOpcodes.td:316 |
| 72 | G_MUL = 57, // GenericOpcodes.td:324 |
| 73 | G_SDIV = 58, // GenericOpcodes.td:332 |
| 74 | G_UDIV = 59, // GenericOpcodes.td:340 |
| 75 | G_SREM = 60, // GenericOpcodes.td:348 |
| 76 | G_UREM = 61, // GenericOpcodes.td:356 |
| 77 | G_SDIVREM = 62, // GenericOpcodes.td:364 |
| 78 | G_UDIVREM = 63, // GenericOpcodes.td:372 |
| 79 | G_AND = 64, // GenericOpcodes.td:380 |
| 80 | G_OR = 65, // GenericOpcodes.td:388 |
| 81 | G_XOR = 66, // GenericOpcodes.td:396 |
| 82 | G_ABDS = 67, // GenericOpcodes.td:425 |
| 83 | G_ABDU = 68, // GenericOpcodes.td:433 |
| 84 | G_UAVGFLOOR = 69, // GenericOpcodes.td:441 |
| 85 | G_UAVGCEIL = 70, // GenericOpcodes.td:448 |
| 86 | G_SAVGFLOOR = 71, // GenericOpcodes.td:455 |
| 87 | G_SAVGCEIL = 72, // GenericOpcodes.td:462 |
| 88 | G_IMPLICIT_DEF = 73, // GenericOpcodes.td:111 |
| 89 | G_PHI = 74, // GenericOpcodes.td:118 |
| 90 | G_FRAME_INDEX = 75, // GenericOpcodes.td:125 |
| 91 | G_GLOBAL_VALUE = 76, // GenericOpcodes.td:131 |
| 92 | G_PTRAUTH_GLOBAL_VALUE = 77, // GenericOpcodes.td:137 |
| 93 | G_CONSTANT_POOL = 78, // GenericOpcodes.td:143 |
| 94 | G_EXTRACT = 79, // GenericOpcodes.td:1522 |
| 95 | G_UNMERGE_VALUES = 80, // GenericOpcodes.td:1535 |
| 96 | G_INSERT = 81, // GenericOpcodes.td:1544 |
| 97 | G_MERGE_VALUES = 82, // GenericOpcodes.td:1554 |
| 98 | G_BUILD_VECTOR = 83, // GenericOpcodes.td:1574 |
| 99 | G_BUILD_VECTOR_TRUNC = 84, // GenericOpcodes.td:1584 |
| 100 | G_CONCAT_VECTORS = 85, // GenericOpcodes.td:1591 |
| 101 | G_PTRTOINT = 86, // GenericOpcodes.td:155 |
| 102 | G_INTTOPTR = 87, // GenericOpcodes.td:149 |
| 103 | G_BITCAST = 88, // GenericOpcodes.td:161 |
| 104 | G_FREEZE = 89, // GenericOpcodes.td:284 |
| 105 | G_CONSTANT_FOLD_BARRIER = 90, // GenericOpcodes.td:1951 |
| 106 | G_INTRINSIC_FPTRUNC_ROUND = 91, // GenericOpcodes.td:1280 |
| 107 | G_INTRINSIC_TRUNC = 92, // GenericOpcodes.td:1286 |
| 108 | G_INTRINSIC_ROUND = 93, // GenericOpcodes.td:1292 |
| 109 | G_INTRINSIC_LRINT = 94, // GenericOpcodes.td:1298 |
| 110 | G_INTRINSIC_LLRINT = 95, // GenericOpcodes.td:1304 |
| 111 | G_INTRINSIC_ROUNDEVEN = 96, // GenericOpcodes.td:1310 |
| 112 | G_READCYCLECOUNTER = 97, // GenericOpcodes.td:1316 |
| 113 | G_READSTEADYCOUNTER = 98, // GenericOpcodes.td:1322 |
| 114 | G_LOAD = 99, // GenericOpcodes.td:1349 |
| 115 | G_SEXTLOAD = 100, // GenericOpcodes.td:1358 |
| 116 | G_ZEXTLOAD = 101, // GenericOpcodes.td:1366 |
| 117 | G_FPEXTLOAD = 102, // GenericOpcodes.td:1375 |
| 118 | G_INDEXED_LOAD = 103, // GenericOpcodes.td:1385 |
| 119 | G_INDEXED_SEXTLOAD = 104, // GenericOpcodes.td:1394 |
| 120 | G_INDEXED_ZEXTLOAD = 105, // GenericOpcodes.td:1402 |
| 121 | G_STORE = 106, // GenericOpcodes.td:1410 |
| 122 | G_FPTRUNCSTORE = 107, // GenericOpcodes.td:1420 |
| 123 | G_INDEXED_STORE = 108, // GenericOpcodes.td:1428 |
| 124 | G_ATOMIC_CMPXCHG_WITH_SUCCESS = 109, // GenericOpcodes.td:1439 |
| 125 | G_ATOMIC_CMPXCHG = 110, // GenericOpcodes.td:1450 |
| 126 | G_ATOMICRMW_XCHG = 111, // GenericOpcodes.td:1470 |
| 127 | G_ATOMICRMW_ADD = 112, // GenericOpcodes.td:1471 |
| 128 | G_ATOMICRMW_SUB = 113, // GenericOpcodes.td:1472 |
| 129 | G_ATOMICRMW_AND = 114, // GenericOpcodes.td:1473 |
| 130 | G_ATOMICRMW_NAND = 115, // GenericOpcodes.td:1474 |
| 131 | G_ATOMICRMW_OR = 116, // GenericOpcodes.td:1475 |
| 132 | G_ATOMICRMW_XOR = 117, // GenericOpcodes.td:1476 |
| 133 | G_ATOMICRMW_MAX = 118, // GenericOpcodes.td:1477 |
| 134 | G_ATOMICRMW_MIN = 119, // GenericOpcodes.td:1478 |
| 135 | G_ATOMICRMW_UMAX = 120, // GenericOpcodes.td:1479 |
| 136 | G_ATOMICRMW_UMIN = 121, // GenericOpcodes.td:1480 |
| 137 | G_ATOMICRMW_FADD = 122, // GenericOpcodes.td:1491 |
| 138 | G_ATOMICRMW_FSUB = 123, // GenericOpcodes.td:1492 |
| 139 | G_ATOMICRMW_FMAX = 124, // GenericOpcodes.td:1493 |
| 140 | G_ATOMICRMW_FMIN = 125, // GenericOpcodes.td:1494 |
| 141 | G_ATOMICRMW_FMAXIMUM = 126, // GenericOpcodes.td:1495 |
| 142 | G_ATOMICRMW_FMINIMUM = 127, // GenericOpcodes.td:1496 |
| 143 | G_ATOMICRMW_FMAXIMUMNUM = 128, // GenericOpcodes.td:1497 |
| 144 | G_ATOMICRMW_FMINIMUMNUM = 129, // GenericOpcodes.td:1498 |
| 145 | G_ATOMICRMW_UINC_WRAP = 130, // GenericOpcodes.td:1481 |
| 146 | G_ATOMICRMW_UDEC_WRAP = 131, // GenericOpcodes.td:1482 |
| 147 | G_ATOMICRMW_USUB_COND = 132, // GenericOpcodes.td:1483 |
| 148 | G_ATOMICRMW_USUB_SAT = 133, // GenericOpcodes.td:1484 |
| 149 | G_FENCE = 134, // GenericOpcodes.td:1500 |
| 150 | G_PREFETCH = 135, // GenericOpcodes.td:1507 |
| 151 | G_BRCOND = 136, // GenericOpcodes.td:1647 |
| 152 | G_BRINDIRECT = 137, // GenericOpcodes.td:1656 |
| 153 | G_INVOKE_REGION_START = 138, // GenericOpcodes.td:1679 |
| 154 | G_INTRINSIC = 139, // GenericOpcodes.td:1599 |
| 155 | G_INTRINSIC_W_SIDE_EFFECTS = 140, // GenericOpcodes.td:1606 |
| 156 | G_INTRINSIC_CONVERGENT = 141, // GenericOpcodes.td:1615 |
| 157 | G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 142, // GenericOpcodes.td:1623 |
| 158 | G_ANYEXT = 143, // GenericOpcodes.td:44 |
| 159 | G_TRUNC = 144, // GenericOpcodes.td:83 |
| 160 | G_TRUNC_SSAT_S = 145, // GenericOpcodes.td:91 |
| 161 | G_TRUNC_SSAT_U = 146, // GenericOpcodes.td:98 |
| 162 | G_TRUNC_USAT_U = 147, // GenericOpcodes.td:105 |
| 163 | G_CONSTANT = 148, // GenericOpcodes.td:169 |
| 164 | G_FCONSTANT = 149, // GenericOpcodes.td:177 |
| 165 | G_VASTART = 150, // GenericOpcodes.td:184 |
| 166 | G_VAARG = 151, // GenericOpcodes.td:191 |
| 167 | G_SEXT = 152, // GenericOpcodes.td:52 |
| 168 | G_SEXT_INREG = 153, // GenericOpcodes.td:66 |
| 169 | G_ZEXT = 154, // GenericOpcodes.td:74 |
| 170 | G_SHL = 155, // GenericOpcodes.td:404 |
| 171 | G_LSHR = 156, // GenericOpcodes.td:411 |
| 172 | G_ASHR = 157, // GenericOpcodes.td:418 |
| 173 | G_FSHL = 158, // GenericOpcodes.td:470 |
| 174 | G_FSHR = 159, // GenericOpcodes.td:478 |
| 175 | G_ROTR = 160, // GenericOpcodes.td:485 |
| 176 | G_ROTL = 161, // GenericOpcodes.td:492 |
| 177 | G_ICMP = 162, // GenericOpcodes.td:499 |
| 178 | G_FCMP = 163, // GenericOpcodes.td:506 |
| 179 | G_SCMP = 164, // GenericOpcodes.td:513 |
| 180 | G_UCMP = 165, // GenericOpcodes.td:520 |
| 181 | G_SELECT = 166, // GenericOpcodes.td:527 |
| 182 | G_UADDO = 167, // GenericOpcodes.td:601 |
| 183 | G_UADDE = 168, // GenericOpcodes.td:609 |
| 184 | G_USUBO = 169, // GenericOpcodes.td:631 |
| 185 | G_USUBE = 170, // GenericOpcodes.td:637 |
| 186 | G_SADDO = 171, // GenericOpcodes.td:616 |
| 187 | G_SADDE = 172, // GenericOpcodes.td:624 |
| 188 | G_SSUBO = 173, // GenericOpcodes.td:644 |
| 189 | G_SSUBE = 174, // GenericOpcodes.td:651 |
| 190 | G_UMULO = 175, // GenericOpcodes.td:658 |
| 191 | G_SMULO = 176, // GenericOpcodes.td:666 |
| 192 | G_UMULH = 177, // GenericOpcodes.td:675 |
| 193 | G_SMULH = 178, // GenericOpcodes.td:684 |
| 194 | G_UADDSAT = 179, // GenericOpcodes.td:696 |
| 195 | G_SADDSAT = 180, // GenericOpcodes.td:704 |
| 196 | G_USUBSAT = 181, // GenericOpcodes.td:712 |
| 197 | G_SSUBSAT = 182, // GenericOpcodes.td:720 |
| 198 | G_USHLSAT = 183, // GenericOpcodes.td:728 |
| 199 | G_SSHLSAT = 184, // GenericOpcodes.td:736 |
| 200 | G_SMULFIX = 185, // GenericOpcodes.td:748 |
| 201 | G_UMULFIX = 186, // GenericOpcodes.td:755 |
| 202 | G_SMULFIXSAT = 187, // GenericOpcodes.td:765 |
| 203 | G_UMULFIXSAT = 188, // GenericOpcodes.td:772 |
| 204 | G_SDIVFIX = 189, // GenericOpcodes.td:783 |
| 205 | G_UDIVFIX = 190, // GenericOpcodes.td:790 |
| 206 | G_SDIVFIXSAT = 191, // GenericOpcodes.td:800 |
| 207 | G_UDIVFIXSAT = 192, // GenericOpcodes.td:807 |
| 208 | G_FADD = 193, // GenericOpcodes.td:980 |
| 209 | G_FSUB = 194, // GenericOpcodes.td:988 |
| 210 | G_FMUL = 195, // GenericOpcodes.td:996 |
| 211 | G_FMA = 196, // GenericOpcodes.td:1005 |
| 212 | G_FMAD = 197, // GenericOpcodes.td:1014 |
| 213 | G_FDIV = 198, // GenericOpcodes.td:1022 |
| 214 | G_FREM = 199, // GenericOpcodes.td:1029 |
| 215 | G_FMODF = 200, // GenericOpcodes.td:1036 |
| 216 | G_FPOW = 201, // GenericOpcodes.td:1043 |
| 217 | G_FPOWI = 202, // GenericOpcodes.td:1050 |
| 218 | G_FEXP = 203, // GenericOpcodes.td:1057 |
| 219 | G_FEXP2 = 204, // GenericOpcodes.td:1064 |
| 220 | G_FEXP10 = 205, // GenericOpcodes.td:1071 |
| 221 | G_FLOG = 206, // GenericOpcodes.td:1078 |
| 222 | G_FLOG2 = 207, // GenericOpcodes.td:1085 |
| 223 | G_FLOG10 = 208, // GenericOpcodes.td:1092 |
| 224 | G_FLDEXP = 209, // GenericOpcodes.td:1099 |
| 225 | G_FFREXP = 210, // GenericOpcodes.td:1106 |
| 226 | G_FNEG = 211, // GenericOpcodes.td:818 |
| 227 | G_FPEXT = 212, // GenericOpcodes.td:824 |
| 228 | G_FPTRUNC = 213, // GenericOpcodes.td:830 |
| 229 | G_FPTOSI = 214, // GenericOpcodes.td:836 |
| 230 | G_FPTOUI = 215, // GenericOpcodes.td:842 |
| 231 | G_SITOFP = 216, // GenericOpcodes.td:848 |
| 232 | G_UITOFP = 217, // GenericOpcodes.td:854 |
| 233 | G_FPTOSI_SAT = 218, // GenericOpcodes.td:860 |
| 234 | G_FPTOUI_SAT = 219, // GenericOpcodes.td:866 |
| 235 | G_FABS = 220, // GenericOpcodes.td:872 |
| 236 | G_FCOPYSIGN = 221, // GenericOpcodes.td:878 |
| 237 | G_IS_FPCLASS = 222, // GenericOpcodes.td:891 |
| 238 | G_FCANONICALIZE = 223, // GenericOpcodes.td:884 |
| 239 | G_FMINNUM = 224, // GenericOpcodes.td:904 |
| 240 | G_FMAXNUM = 225, // GenericOpcodes.td:911 |
| 241 | G_FMINNUM_IEEE = 226, // GenericOpcodes.td:929 |
| 242 | G_FMAXNUM_IEEE = 227, // GenericOpcodes.td:936 |
| 243 | G_FMINIMUM = 228, // GenericOpcodes.td:946 |
| 244 | G_FMAXIMUM = 229, // GenericOpcodes.td:953 |
| 245 | G_FMINIMUMNUM = 230, // GenericOpcodes.td:961 |
| 246 | G_FMAXIMUMNUM = 231, // GenericOpcodes.td:968 |
| 247 | G_GET_FPENV = 232, // GenericOpcodes.td:1236 |
| 248 | G_SET_FPENV = 233, // GenericOpcodes.td:1243 |
| 249 | G_RESET_FPENV = 234, // GenericOpcodes.td:1250 |
| 250 | G_GET_FPMODE = 235, // GenericOpcodes.td:1257 |
| 251 | G_SET_FPMODE = 236, // GenericOpcodes.td:1264 |
| 252 | G_RESET_FPMODE = 237, // GenericOpcodes.td:1271 |
| 253 | G_GET_ROUNDING = 238, // GenericOpcodes.td:1328 |
| 254 | G_SET_ROUNDING = 239, // GenericOpcodes.td:1334 |
| 255 | G_PTR_ADD = 240, // GenericOpcodes.td:534 |
| 256 | G_PTRMASK = 241, // GenericOpcodes.td:542 |
| 257 | G_SMIN = 242, // GenericOpcodes.td:549 |
| 258 | G_SMAX = 243, // GenericOpcodes.td:557 |
| 259 | G_UMIN = 244, // GenericOpcodes.td:565 |
| 260 | G_UMAX = 245, // GenericOpcodes.td:573 |
| 261 | G_ABS = 246, // GenericOpcodes.td:581 |
| 262 | G_LROUND = 247, // GenericOpcodes.td:291 |
| 263 | G_LLROUND = 248, // GenericOpcodes.td:297 |
| 264 | G_BR = 249, // GenericOpcodes.td:1637 |
| 265 | G_BRJT = 250, // GenericOpcodes.td:1667 |
| 266 | G_VSCALE = 251, // GenericOpcodes.td:1565 |
| 267 | G_INSERT_SUBVECTOR = 252, // GenericOpcodes.td:1711 |
| 268 | G_EXTRACT_SUBVECTOR = 253, // GenericOpcodes.td:1719 |
| 269 | G_INSERT_VECTOR_ELT = 254, // GenericOpcodes.td:1727 |
| 270 | G_EXTRACT_VECTOR_ELT = 255, // GenericOpcodes.td:1735 |
| 271 | G_SHUFFLE_VECTOR = 256, // GenericOpcodes.td:1746 |
| 272 | G_SPLAT_VECTOR = 257, // GenericOpcodes.td:1754 |
| 273 | G_STEP_VECTOR = 258, // GenericOpcodes.td:1762 |
| 274 | G_VECTOR_COMPRESS = 259, // GenericOpcodes.td:1769 |
| 275 | G_CTTZ = 260, // GenericOpcodes.td:211 |
| 276 | G_CTTZ_ZERO_POISON = 261, // GenericOpcodes.td:217 |
| 277 | G_CTLZ = 262, // GenericOpcodes.td:199 |
| 278 | G_CTLZ_ZERO_POISON = 263, // GenericOpcodes.td:205 |
| 279 | G_CTLS = 264, // GenericOpcodes.td:223 |
| 280 | G_CTPOP = 265, // GenericOpcodes.td:229 |
| 281 | G_BSWAP = 266, // GenericOpcodes.td:235 |
| 282 | G_BITREVERSE = 267, // GenericOpcodes.td:242 |
| 283 | G_CLMUL = 268, // GenericOpcodes.td:588 |
| 284 | G_FCEIL = 269, // GenericOpcodes.td:1113 |
| 285 | G_FCOS = 270, // GenericOpcodes.td:1120 |
| 286 | G_FSIN = 271, // GenericOpcodes.td:1127 |
| 287 | G_FSINCOS = 272, // GenericOpcodes.td:1134 |
| 288 | G_FTAN = 273, // GenericOpcodes.td:1141 |
| 289 | G_FACOS = 274, // GenericOpcodes.td:1148 |
| 290 | G_FASIN = 275, // GenericOpcodes.td:1155 |
| 291 | G_FATAN = 276, // GenericOpcodes.td:1162 |
| 292 | G_FATAN2 = 277, // GenericOpcodes.td:1169 |
| 293 | G_FCOSH = 278, // GenericOpcodes.td:1176 |
| 294 | G_FSINH = 279, // GenericOpcodes.td:1183 |
| 295 | G_FTANH = 280, // GenericOpcodes.td:1190 |
| 296 | G_FSQRT = 281, // GenericOpcodes.td:1200 |
| 297 | G_FFLOOR = 282, // GenericOpcodes.td:1207 |
| 298 | G_FRINT = 283, // GenericOpcodes.td:1214 |
| 299 | G_FNEARBYINT = 284, // GenericOpcodes.td:1221 |
| 300 | G_ADDRSPACE_CAST = 285, // GenericOpcodes.td:248 |
| 301 | G_BLOCK_ADDR = 286, // GenericOpcodes.td:254 |
| 302 | G_JUMP_TABLE = 287, // GenericOpcodes.td:260 |
| 303 | G_DYN_STACKALLOC = 288, // GenericOpcodes.td:266 |
| 304 | G_STACKSAVE = 289, // GenericOpcodes.td:272 |
| 305 | G_STACKRESTORE = 290, // GenericOpcodes.td:278 |
| 306 | G_STRICT_FADD = 291, // GenericOpcodes.td:1821 |
| 307 | G_STRICT_FSUB = 292, // GenericOpcodes.td:1822 |
| 308 | G_STRICT_FMUL = 293, // GenericOpcodes.td:1823 |
| 309 | G_STRICT_FDIV = 294, // GenericOpcodes.td:1824 |
| 310 | G_STRICT_FREM = 295, // GenericOpcodes.td:1825 |
| 311 | G_STRICT_FMA = 296, // GenericOpcodes.td:1826 |
| 312 | G_STRICT_FSQRT = 297, // GenericOpcodes.td:1827 |
| 313 | G_STRICT_FLDEXP = 298, // GenericOpcodes.td:1828 |
| 314 | G_STRICT_FCMP = 299, // GenericOpcodes.td:1829 |
| 315 | G_STRICT_FCMPS = 300, // GenericOpcodes.td:1830 |
| 316 | G_READ_REGISTER = 301, // GenericOpcodes.td:1686 |
| 317 | G_WRITE_REGISTER = 302, // GenericOpcodes.td:1696 |
| 318 | G_MEMCPY = 303, // GenericOpcodes.td:1836 |
| 319 | G_MEMCPY_INLINE = 304, // GenericOpcodes.td:1844 |
| 320 | G_MEMMOVE = 305, // GenericOpcodes.td:1852 |
| 321 | G_MEMSET = 306, // GenericOpcodes.td:1860 |
| 322 | G_BZERO = 307, // GenericOpcodes.td:1867 |
| 323 | G_MEMSET_INLINE = 308, // GenericOpcodes.td:1874 |
| 324 | G_TRAP = 309, // GenericOpcodes.td:1884 |
| 325 | G_DEBUGTRAP = 310, // GenericOpcodes.td:1891 |
| 326 | G_UBSANTRAP = 311, // GenericOpcodes.td:1897 |
| 327 | G_VECREDUCE_SEQ_FADD = 312, // GenericOpcodes.td:1785 |
| 328 | G_VECREDUCE_SEQ_FMUL = 313, // GenericOpcodes.td:1791 |
| 329 | G_VECREDUCE_FADD = 314, // GenericOpcodes.td:1797 |
| 330 | G_VECREDUCE_FMUL = 315, // GenericOpcodes.td:1798 |
| 331 | G_VECREDUCE_FMAX = 316, // GenericOpcodes.td:1800 |
| 332 | G_VECREDUCE_FMIN = 317, // GenericOpcodes.td:1801 |
| 333 | G_VECREDUCE_FMAXIMUM = 318, // GenericOpcodes.td:1802 |
| 334 | G_VECREDUCE_FMINIMUM = 319, // GenericOpcodes.td:1803 |
| 335 | G_VECREDUCE_FMAXIMUMNUM = 320, // GenericOpcodes.td:1804 |
| 336 | G_VECREDUCE_FMINIMUMNUM = 321, // GenericOpcodes.td:1805 |
| 337 | G_VECREDUCE_ADD = 322, // GenericOpcodes.td:1807 |
| 338 | G_VECREDUCE_MUL = 323, // GenericOpcodes.td:1808 |
| 339 | G_VECREDUCE_AND = 324, // GenericOpcodes.td:1809 |
| 340 | G_VECREDUCE_OR = 325, // GenericOpcodes.td:1810 |
| 341 | G_VECREDUCE_XOR = 326, // GenericOpcodes.td:1811 |
| 342 | G_VECREDUCE_SMAX = 327, // GenericOpcodes.td:1812 |
| 343 | G_VECREDUCE_SMIN = 328, // GenericOpcodes.td:1813 |
| 344 | G_VECREDUCE_UMAX = 329, // GenericOpcodes.td:1814 |
| 345 | G_VECREDUCE_UMIN = 330, // GenericOpcodes.td:1815 |
| 346 | G_SBFX = 331, // GenericOpcodes.td:1909 |
| 347 | G_UBFX = 332, // GenericOpcodes.td:1917 |
| 348 | ADJCALLSTACKDOWN = 333, // LoongArchInstrInfo.td:2459 |
| 349 | ADJCALLSTACKUP = 334, // LoongArchInstrInfo.td:2461 |
| 350 | BuildPairF64Pseudo = 335, // LoongArchFloat64InstrInfo.td:362 |
| 351 | PROBED_STACKALLOC = 336, // LoongArchInstrInfo.td:2470 |
| 352 | PROBED_STACKALLOC_DYN = 337, // LoongArchInstrInfo.td:2475 |
| 353 | PseudoAddTPRel_D = 338, // LoongArchInstrInfo.td:1773 |
| 354 | PseudoAddTPRel_W = 339, // LoongArchInstrInfo.td:1769 |
| 355 | PseudoAtomicLoadAdd32 = 340, // LoongArchInstrInfo.td:2123 |
| 356 | PseudoAtomicLoadAnd32 = 341, // LoongArchInstrInfo.td:2125 |
| 357 | PseudoAtomicLoadMax32 = 342, // LoongArchInstrInfo.td:2130 |
| 358 | PseudoAtomicLoadMin32 = 343, // LoongArchInstrInfo.td:2131 |
| 359 | PseudoAtomicLoadNand32 = 344, // LoongArchInstrInfo.td:2121 |
| 360 | PseudoAtomicLoadNand64 = 345, // LoongArchInstrInfo.td:2122 |
| 361 | PseudoAtomicLoadOr32 = 346, // LoongArchInstrInfo.td:2126 |
| 362 | PseudoAtomicLoadSub32 = 347, // LoongArchInstrInfo.td:2124 |
| 363 | PseudoAtomicLoadUMax32 = 348, // LoongArchInstrInfo.td:2128 |
| 364 | PseudoAtomicLoadUMin32 = 349, // LoongArchInstrInfo.td:2129 |
| 365 | PseudoAtomicLoadXor32 = 350, // LoongArchInstrInfo.td:2127 |
| 366 | PseudoAtomicStoreD = 351, // LoongArchInstrInfo.td:2082 |
| 367 | PseudoAtomicStoreW = 352, // LoongArchInstrInfo.td:2074 |
| 368 | PseudoAtomicSwap32 = 353, // LoongArchInstrInfo.td:2120 |
| 369 | PseudoBR = 354, // LoongArchInstrInfo.td:1625 |
| 370 | PseudoBRIND = 355, // LoongArchInstrInfo.td:1629 |
| 371 | PseudoB_TAIL = 356, // LoongArchInstrInfo.td:1722 |
| 372 | PseudoCALL = 357, // LoongArchInstrInfo.td:1734 |
| 373 | PseudoCALL30 = 358, // LoongArchInstrInfo.td:1744 |
| 374 | PseudoCALL36 = 359, // LoongArchInstrInfo.td:1754 |
| 375 | PseudoCALLIndirect = 360, // LoongArchInstrInfo.td:1666 |
| 376 | PseudoCALL_LARGE = 361, // LoongArchInstrInfo.td:1656 |
| 377 | PseudoCALL_MEDIUM = 362, // LoongArchInstrInfo.td:1647 |
| 378 | PseudoCALL_SMALL = 363, // LoongArchInstrInfo.td:1638 |
| 379 | PseudoCTPOP_B = 364, // LoongArchLSXInstrInfo.td:1343 |
| 380 | PseudoCTPOP_D = 365, // LoongArchLSXInstrInfo.td:1359 |
| 381 | PseudoCTPOP_H = 366, // LoongArchLSXInstrInfo.td:1345 |
| 382 | PseudoCTPOP_H_LA32 = 367, // LoongArchLSXInstrInfo.td:1349 |
| 383 | PseudoCTPOP_W = 368, // LoongArchLSXInstrInfo.td:1356 |
| 384 | PseudoCTPOP_W_LA32 = 369, // LoongArchLSXInstrInfo.td:1351 |
| 385 | PseudoCmpXchg128 = 370, // LoongArchInstrInfo.td:2209 |
| 386 | PseudoCmpXchg128Acquire = 371, // LoongArchInstrInfo.td:2210 |
| 387 | PseudoCmpXchg32 = 372, // LoongArchInstrInfo.td:2195 |
| 388 | PseudoCmpXchg64 = 373, // LoongArchInstrInfo.td:2196 |
| 389 | PseudoCopyCFR = 374, // LoongArchFloat32InstrInfo.td:162 |
| 390 | PseudoDESC_CALL = 375, // LoongArchInstrInfo.td:1829 |
| 391 | PseudoJIRL_CALL = 376, // LoongArchInstrInfo.td:1674 |
| 392 | PseudoJIRL_TAIL = 377, // LoongArchInstrInfo.td:1727 |
| 393 | PseudoLA_ABS = 378, // LoongArchInstrInfo.td:1784 |
| 394 | PseudoLA_ABS_LARGE = 379, // LoongArchInstrInfo.td:1786 |
| 395 | PseudoLA_GOT = 380, // LoongArchInstrInfo.td:1812 |
| 396 | PseudoLA_GOT_LARGE = 381, // LoongArchInstrInfo.td:1816 |
| 397 | PseudoLA_PCREL = 382, // LoongArchInstrInfo.td:1789 |
| 398 | PseudoLA_PCREL_LARGE = 383, // LoongArchInstrInfo.td:1795 |
| 399 | PseudoLA_TLS_DESC = 384, // LoongArchInstrInfo.td:1835 |
| 400 | PseudoLA_TLS_DESC_LARGE = 385, // LoongArchInstrInfo.td:1839 |
| 401 | PseudoLA_TLS_GD = 386, // LoongArchInstrInfo.td:1793 |
| 402 | PseudoLA_TLS_GD_LARGE = 387, // LoongArchInstrInfo.td:1805 |
| 403 | PseudoLA_TLS_IE = 388, // LoongArchInstrInfo.td:1814 |
| 404 | PseudoLA_TLS_IE_LARGE = 389, // LoongArchInstrInfo.td:1820 |
| 405 | PseudoLA_TLS_LD = 390, // LoongArchInstrInfo.td:1791 |
| 406 | PseudoLA_TLS_LD_LARGE = 391, // LoongArchInstrInfo.td:1801 |
| 407 | PseudoLA_TLS_LE = 392, // LoongArchInstrInfo.td:1799 |
| 408 | PseudoLD_CFR = 393, // LoongArchFloat32InstrInfo.td:150 |
| 409 | PseudoLI_D = 394, // LoongArchInstrInfo.td:2527 |
| 410 | PseudoLI_W = 395, // LoongArchInstrInfo.td:2525 |
| 411 | PseudoMaskedAtomicLoadAdd32 = 396, // LoongArchInstrInfo.td:2107 |
| 412 | PseudoMaskedAtomicLoadMax32 = 397, // LoongArchInstrInfo.td:2172 |
| 413 | PseudoMaskedAtomicLoadMin32 = 398, // LoongArchInstrInfo.td:2173 |
| 414 | PseudoMaskedAtomicLoadNand32 = 399, // LoongArchInstrInfo.td:2109 |
| 415 | PseudoMaskedAtomicLoadSub32 = 400, // LoongArchInstrInfo.td:2108 |
| 416 | PseudoMaskedAtomicLoadUMax32 = 401, // LoongArchInstrInfo.td:2157 |
| 417 | PseudoMaskedAtomicLoadUMin32 = 402, // LoongArchInstrInfo.td:2158 |
| 418 | PseudoMaskedAtomicSwap32 = 403, // LoongArchInstrInfo.td:2106 |
| 419 | PseudoMaskedCmpXchg32 = 404, // LoongArchInstrInfo.td:2212 |
| 420 | PseudoRET = 405, // LoongArchInstrInfo.td:1679 |
| 421 | PseudoST_CFR = 406, // LoongArchFloat32InstrInfo.td:147 |
| 422 | PseudoTAIL = 407, // LoongArchInstrInfo.td:1738 |
| 423 | PseudoTAIL30 = 408, // LoongArchInstrInfo.td:1748 |
| 424 | PseudoTAIL36 = 409, // LoongArchInstrInfo.td:1760 |
| 425 | PseudoTAILIndirect = 410, // LoongArchInstrInfo.td:1713 |
| 426 | PseudoTAIL_LARGE = 411, // LoongArchInstrInfo.td:1703 |
| 427 | PseudoTAIL_MEDIUM = 412, // LoongArchInstrInfo.td:1694 |
| 428 | PseudoTAIL_SMALL = 413, // LoongArchInstrInfo.td:1684 |
| 429 | PseudoUNIMP = 414, // LoongArchInstrInfo.td:1431 |
| 430 | PseudoVBNZ = 415, // LoongArchLSXInstrInfo.td:1334 |
| 431 | PseudoVBNZ_B = 416, // LoongArchLSXInstrInfo.td:1330 |
| 432 | PseudoVBNZ_D = 417, // LoongArchLSXInstrInfo.td:1333 |
| 433 | PseudoVBNZ_H = 418, // LoongArchLSXInstrInfo.td:1331 |
| 434 | PseudoVBNZ_W = 419, // LoongArchLSXInstrInfo.td:1332 |
| 435 | PseudoVBZ = 420, // LoongArchLSXInstrInfo.td:1340 |
| 436 | PseudoVBZ_B = 421, // LoongArchLSXInstrInfo.td:1336 |
| 437 | PseudoVBZ_D = 422, // LoongArchLSXInstrInfo.td:1339 |
| 438 | PseudoVBZ_H = 423, // LoongArchLSXInstrInfo.td:1337 |
| 439 | PseudoVBZ_W = 424, // LoongArchLSXInstrInfo.td:1338 |
| 440 | PseudoVMSKEQZ_B = 425, // LoongArchLSXInstrInfo.td:1370 |
| 441 | PseudoVMSKGEZ_B = 426, // LoongArchLSXInstrInfo.td:1369 |
| 442 | PseudoVMSKLTZ_B = 427, // LoongArchLSXInstrInfo.td:1365 |
| 443 | PseudoVMSKLTZ_D = 428, // LoongArchLSXInstrInfo.td:1368 |
| 444 | PseudoVMSKLTZ_H = 429, // LoongArchLSXInstrInfo.td:1366 |
| 445 | PseudoVMSKLTZ_W = 430, // LoongArchLSXInstrInfo.td:1367 |
| 446 | PseudoVMSKNEZ_B = 431, // LoongArchLSXInstrInfo.td:1371 |
| 447 | PseudoVREPLI_B = 432, // LoongArchLSXInstrInfo.td:1320 |
| 448 | PseudoVREPLI_D = 433, // LoongArchLSXInstrInfo.td:1326 |
| 449 | PseudoVREPLI_H = 434, // LoongArchLSXInstrInfo.td:1322 |
| 450 | PseudoVREPLI_W = 435, // LoongArchLSXInstrInfo.td:1324 |
| 451 | PseudoXVBNZ = 436, // LoongArchLASXInstrInfo.td:1093 |
| 452 | PseudoXVBNZ_B = 437, // LoongArchLASXInstrInfo.td:1089 |
| 453 | PseudoXVBNZ_D = 438, // LoongArchLASXInstrInfo.td:1092 |
| 454 | PseudoXVBNZ_H = 439, // LoongArchLASXInstrInfo.td:1090 |
| 455 | PseudoXVBNZ_W = 440, // LoongArchLASXInstrInfo.td:1091 |
| 456 | PseudoXVBZ = 441, // LoongArchLASXInstrInfo.td:1099 |
| 457 | PseudoXVBZ_B = 442, // LoongArchLASXInstrInfo.td:1095 |
| 458 | PseudoXVBZ_D = 443, // LoongArchLASXInstrInfo.td:1098 |
| 459 | PseudoXVBZ_H = 444, // LoongArchLASXInstrInfo.td:1096 |
| 460 | PseudoXVBZ_W = 445, // LoongArchLASXInstrInfo.td:1097 |
| 461 | PseudoXVINSGR2VR_B = 446, // LoongArchLASXInstrInfo.td:1102 |
| 462 | PseudoXVINSGR2VR_H = 447, // LoongArchLASXInstrInfo.td:1104 |
| 463 | PseudoXVMSKEQZ_B = 448, // LoongArchLASXInstrInfo.td:1114 |
| 464 | PseudoXVMSKGEZ_B = 449, // LoongArchLASXInstrInfo.td:1113 |
| 465 | PseudoXVMSKLTZ_B = 450, // LoongArchLASXInstrInfo.td:1109 |
| 466 | PseudoXVMSKLTZ_D = 451, // LoongArchLASXInstrInfo.td:1112 |
| 467 | PseudoXVMSKLTZ_H = 452, // LoongArchLASXInstrInfo.td:1110 |
| 468 | PseudoXVMSKLTZ_W = 453, // LoongArchLASXInstrInfo.td:1111 |
| 469 | PseudoXVMSKNEZ_B = 454, // LoongArchLASXInstrInfo.td:1115 |
| 470 | PseudoXVREPLI_B = 455, // LoongArchLASXInstrInfo.td:1079 |
| 471 | PseudoXVREPLI_D = 456, // LoongArchLASXInstrInfo.td:1085 |
| 472 | PseudoXVREPLI_H = 457, // LoongArchLASXInstrInfo.td:1081 |
| 473 | PseudoXVREPLI_W = 458, // LoongArchLASXInstrInfo.td:1083 |
| 474 | RDFCSR = 459, // LoongArchInstrInfo.td:2541 |
| 475 | Select_GPR_Using_CC_GPR = 460, // LoongArchInstrInfo.td:1575 |
| 476 | SplitPairF64Pseudo = 461, // LoongArchFloat64InstrInfo.td:368 |
| 477 | WRFCSR = 462, // LoongArchInstrInfo.td:2539 |
| 478 | ADC_B = 463, // LoongArchLBTInstrInfo.td:27 |
| 479 | ADC_D = 464, // LoongArchLBTInstrInfo.td:192 |
| 480 | ADC_H = 465, // LoongArchLBTInstrInfo.td:28 |
| 481 | ADC_W = 466, // LoongArchLBTInstrInfo.td:29 |
| 482 | ADDI_D = 467, // LoongArchInstrInfo.td:1003 |
| 483 | ADDI_W = 468, // LoongArchInstrInfo.td:860 |
| 484 | ADDU12I_D = 469, // LoongArchLBTInstrInfo.td:191 |
| 485 | ADDU12I_W = 470, // LoongArchLBTInstrInfo.td:25 |
| 486 | ADDU16I_D = 471, // LoongArchInstrInfo.td:1005 |
| 487 | ADD_D = 472, // LoongArchInstrInfo.td:997 |
| 488 | ADD_W = 473, // LoongArchInstrInfo.td:858 |
| 489 | ALSL_D = 474, // LoongArchInstrInfo.td:1007 |
| 490 | ALSL_W = 475, // LoongArchInstrInfo.td:955 |
| 491 | ALSL_WU = 476, // LoongArchInstrInfo.td:1006 |
| 492 | AMADD_B = 477, // LoongArchInstrInfo.td:1109 |
| 493 | AMADD_D = 478, // LoongArchInstrInfo.td:1112 |
| 494 | AMADD_H = 479, // LoongArchInstrInfo.td:1110 |
| 495 | AMADD_W = 480, // LoongArchInstrInfo.td:1111 |
| 496 | AMADD__DB_B = 481, // LoongArchInstrInfo.td:1131 |
| 497 | AMADD__DB_D = 482, // LoongArchInstrInfo.td:1134 |
| 498 | AMADD__DB_H = 483, // LoongArchInstrInfo.td:1132 |
| 499 | AMADD__DB_W = 484, // LoongArchInstrInfo.td:1133 |
| 500 | AMAND_D = 485, // LoongArchInstrInfo.td:1114 |
| 501 | AMAND_W = 486, // LoongArchInstrInfo.td:1113 |
| 502 | AMAND__DB_D = 487, // LoongArchInstrInfo.td:1136 |
| 503 | AMAND__DB_W = 488, // LoongArchInstrInfo.td:1135 |
| 504 | AMCAS_B = 489, // LoongArchInstrInfo.td:1149 |
| 505 | AMCAS_D = 490, // LoongArchInstrInfo.td:1152 |
| 506 | AMCAS_H = 491, // LoongArchInstrInfo.td:1150 |
| 507 | AMCAS_W = 492, // LoongArchInstrInfo.td:1151 |
| 508 | AMCAS__DB_B = 493, // LoongArchInstrInfo.td:1153 |
| 509 | AMCAS__DB_D = 494, // LoongArchInstrInfo.td:1156 |
| 510 | AMCAS__DB_H = 495, // LoongArchInstrInfo.td:1154 |
| 511 | AMCAS__DB_W = 496, // LoongArchInstrInfo.td:1155 |
| 512 | AMMAX_D = 497, // LoongArchInstrInfo.td:1120 |
| 513 | AMMAX_DU = 498, // LoongArchInstrInfo.td:1124 |
| 514 | AMMAX_W = 499, // LoongArchInstrInfo.td:1119 |
| 515 | AMMAX_WU = 500, // LoongArchInstrInfo.td:1123 |
| 516 | AMMAX__DB_D = 501, // LoongArchInstrInfo.td:1142 |
| 517 | AMMAX__DB_DU = 502, // LoongArchInstrInfo.td:1146 |
| 518 | AMMAX__DB_W = 503, // LoongArchInstrInfo.td:1141 |
| 519 | AMMAX__DB_WU = 504, // LoongArchInstrInfo.td:1145 |
| 520 | AMMIN_D = 505, // LoongArchInstrInfo.td:1122 |
| 521 | AMMIN_DU = 506, // LoongArchInstrInfo.td:1126 |
| 522 | AMMIN_W = 507, // LoongArchInstrInfo.td:1121 |
| 523 | AMMIN_WU = 508, // LoongArchInstrInfo.td:1125 |
| 524 | AMMIN__DB_D = 509, // LoongArchInstrInfo.td:1144 |
| 525 | AMMIN__DB_DU = 510, // LoongArchInstrInfo.td:1148 |
| 526 | AMMIN__DB_W = 511, // LoongArchInstrInfo.td:1143 |
| 527 | AMMIN__DB_WU = 512, // LoongArchInstrInfo.td:1147 |
| 528 | AMOR_D = 513, // LoongArchInstrInfo.td:1116 |
| 529 | AMOR_W = 514, // LoongArchInstrInfo.td:1115 |
| 530 | AMOR__DB_D = 515, // LoongArchInstrInfo.td:1138 |
| 531 | AMOR__DB_W = 516, // LoongArchInstrInfo.td:1137 |
| 532 | AMSWAP_B = 517, // LoongArchInstrInfo.td:1105 |
| 533 | AMSWAP_D = 518, // LoongArchInstrInfo.td:1108 |
| 534 | AMSWAP_H = 519, // LoongArchInstrInfo.td:1106 |
| 535 | AMSWAP_W = 520, // LoongArchInstrInfo.td:1107 |
| 536 | AMSWAP__DB_B = 521, // LoongArchInstrInfo.td:1127 |
| 537 | AMSWAP__DB_D = 522, // LoongArchInstrInfo.td:1130 |
| 538 | AMSWAP__DB_H = 523, // LoongArchInstrInfo.td:1128 |
| 539 | AMSWAP__DB_W = 524, // LoongArchInstrInfo.td:1129 |
| 540 | AMXOR_D = 525, // LoongArchInstrInfo.td:1118 |
| 541 | AMXOR_W = 526, // LoongArchInstrInfo.td:1117 |
| 542 | AMXOR__DB_D = 527, // LoongArchInstrInfo.td:1140 |
| 543 | AMXOR__DB_W = 528, // LoongArchInstrInfo.td:1139 |
| 544 | AND = 529, // LoongArchInstrInfo.td:869 |
| 545 | ANDI = 530, // LoongArchInstrInfo.td:873 |
| 546 | ANDN = 531, // LoongArchInstrInfo.td:956 |
| 547 | ARMADC_W = 532, // LoongArchLBTInstrInfo.td:168 |
| 548 | ARMADD_W = 533, // LoongArchLBTInstrInfo.td:166 |
| 549 | ARMAND_W = 534, // LoongArchLBTInstrInfo.td:170 |
| 550 | ARMMFFLAG = 535, // LoongArchLBTInstrInfo.td:186 |
| 551 | ARMMOVE = 536, // LoongArchLBTInstrInfo.td:183 |
| 552 | ARMMOV_D = 537, // LoongArchLBTInstrInfo.td:238 |
| 553 | ARMMOV_W = 538, // LoongArchLBTInstrInfo.td:184 |
| 554 | ARMMTFLAG = 539, // LoongArchLBTInstrInfo.td:187 |
| 555 | ARMNOT_W = 540, // LoongArchLBTInstrInfo.td:173 |
| 556 | ARMOR_W = 541, // LoongArchLBTInstrInfo.td:171 |
| 557 | ARMROTRI_W = 542, // LoongArchLBTInstrInfo.td:181 |
| 558 | ARMROTR_W = 543, // LoongArchLBTInstrInfo.td:177 |
| 559 | ARMRRX_W = 544, // LoongArchLBTInstrInfo.td:182 |
| 560 | ARMSBC_W = 545, // LoongArchLBTInstrInfo.td:169 |
| 561 | ARMSLLI_W = 546, // LoongArchLBTInstrInfo.td:178 |
| 562 | ARMSLL_W = 547, // LoongArchLBTInstrInfo.td:174 |
| 563 | ARMSRAI_W = 548, // LoongArchLBTInstrInfo.td:180 |
| 564 | ARMSRA_W = 549, // LoongArchLBTInstrInfo.td:176 |
| 565 | ARMSRLI_W = 550, // LoongArchLBTInstrInfo.td:179 |
| 566 | ARMSRL_W = 551, // LoongArchLBTInstrInfo.td:175 |
| 567 | ARMSUB_W = 552, // LoongArchLBTInstrInfo.td:167 |
| 568 | ARMXOR_W = 553, // LoongArchLBTInstrInfo.td:172 |
| 569 | ASRTGT_D = 554, // LoongArchInstrInfo.td:1178 |
| 570 | ASRTLE_D = 555, // LoongArchInstrInfo.td:1176 |
| 571 | B = 556, // LoongArchInstrInfo.td:905 |
| 572 | BCEQZ = 557, // LoongArchFloat32InstrInfo.td:130 |
| 573 | BCNEZ = 558, // LoongArchFloat32InstrInfo.td:131 |
| 574 | BEQ = 559, // LoongArchInstrInfo.td:899 |
| 575 | BEQZ = 560, // LoongArchInstrInfo.td:988 |
| 576 | BGE = 561, // LoongArchInstrInfo.td:902 |
| 577 | BGEU = 562, // LoongArchInstrInfo.td:904 |
| 578 | BITREV_4B = 563, // LoongArchInstrInfo.td:974 |
| 579 | BITREV_8B = 564, // LoongArchInstrInfo.td:1052 |
| 580 | BITREV_D = 565, // LoongArchInstrInfo.td:1053 |
| 581 | BITREV_W = 566, // LoongArchInstrInfo.td:975 |
| 582 | BL = 567, // LoongArchInstrInfo.td:908 |
| 583 | BLT = 568, // LoongArchInstrInfo.td:901 |
| 584 | BLTU = 569, // LoongArchInstrInfo.td:903 |
| 585 | BNE = 570, // LoongArchInstrInfo.td:900 |
| 586 | BNEZ = 571, // LoongArchInstrInfo.td:989 |
| 587 | BREAK = 572, // LoongArchInstrInfo.td:936 |
| 588 | BSTRINS_D = 573, // LoongArchInstrInfo.td:1055 |
| 589 | BSTRINS_W = 574, // LoongArchInstrInfo.td:977 |
| 590 | BSTRPICK_D = 575, // LoongArchInstrInfo.td:1059 |
| 591 | BSTRPICK_W = 576, // LoongArchInstrInfo.td:981 |
| 592 | BYTEPICK_D = 577, // LoongArchInstrInfo.td:1046 |
| 593 | BYTEPICK_W = 578, // LoongArchInstrInfo.td:972 |
| 594 | CACOP = 579, // LoongArchInstrInfo.td:950 |
| 595 | CLO_D = 580, // LoongArchInstrInfo.td:1042 |
| 596 | CLO_W = 581, // LoongArchInstrInfo.td:968 |
| 597 | CLZ_D = 582, // LoongArchInstrInfo.td:1043 |
| 598 | CLZ_W = 583, // LoongArchInstrInfo.td:969 |
| 599 | CPUCFG = 584, // LoongArchInstrInfo.td:947 |
| 600 | CRCC_W_B_W = 585, // LoongArchInstrInfo.td:1170 |
| 601 | CRCC_W_D_W = 586, // LoongArchInstrInfo.td:1173 |
| 602 | CRCC_W_H_W = 587, // LoongArchInstrInfo.td:1171 |
| 603 | CRCC_W_W_W = 588, // LoongArchInstrInfo.td:1172 |
| 604 | CRC_W_B_W = 589, // LoongArchInstrInfo.td:1166 |
| 605 | CRC_W_D_W = 590, // LoongArchInstrInfo.td:1169 |
| 606 | CRC_W_H_W = 591, // LoongArchInstrInfo.td:1167 |
| 607 | CRC_W_W_W = 592, // LoongArchInstrInfo.td:1168 |
| 608 | CSRRD = 593, // LoongArchInstrInfo.td:2551 |
| 609 | CSRWR = 594, // LoongArchInstrInfo.td:2554 |
| 610 | CSRXCHG = 595, // LoongArchInstrInfo.td:2556 |
| 611 | CTO_D = 596, // LoongArchInstrInfo.td:1044 |
| 612 | CTO_W = 597, // LoongArchInstrInfo.td:970 |
| 613 | CTZ_D = 598, // LoongArchInstrInfo.td:1045 |
| 614 | CTZ_W = 599, // LoongArchInstrInfo.td:971 |
| 615 | DBAR = 600, // LoongArchInstrInfo.td:931 |
| 616 | DBCL = 601, // LoongArchInstrInfo.td:2594 |
| 617 | DIV_D = 602, // LoongArchInstrInfo.td:1025 |
| 618 | DIV_DU = 603, // LoongArchInstrInfo.td:1027 |
| 619 | DIV_W = 604, // LoongArchInstrInfo.td:883 |
| 620 | DIV_WU = 605, // LoongArchInstrInfo.td:885 |
| 621 | ERTN = 606, // LoongArchInstrInfo.td:2593 |
| 622 | EXT_W_B = 607, // LoongArchInstrInfo.td:966 |
| 623 | EXT_W_H = 608, // LoongArchInstrInfo.td:967 |
| 624 | FABS_D = 609, // LoongArchFloat64InstrInfo.td:48 |
| 625 | FABS_S = 610, // LoongArchFloat32InstrInfo.td:69 |
| 626 | FADD_D = 611, // LoongArchFloat64InstrInfo.td:36 |
| 627 | FADD_S = 612, // LoongArchFloat32InstrInfo.td:57 |
| 628 | FCLASS_D = 613, // LoongArchFloat64InstrInfo.td:58 |
| 629 | FCLASS_S = 614, // LoongArchFloat32InstrInfo.td:79 |
| 630 | FCMP_CAF_D = 615, // LoongArchFloat64InstrInfo.td:61 |
| 631 | FCMP_CAF_S = 616, // LoongArchFloat32InstrInfo.td:83 |
| 632 | FCMP_CEQ_D = 617, // LoongArchFloat64InstrInfo.td:63 |
| 633 | FCMP_CEQ_S = 618, // LoongArchFloat32InstrInfo.td:85 |
| 634 | FCMP_CLE_D = 619, // LoongArchFloat64InstrInfo.td:67 |
| 635 | FCMP_CLE_S = 620, // LoongArchFloat32InstrInfo.td:89 |
| 636 | FCMP_CLT_D = 621, // LoongArchFloat64InstrInfo.td:65 |
| 637 | FCMP_CLT_S = 622, // LoongArchFloat32InstrInfo.td:87 |
| 638 | FCMP_CNE_D = 623, // LoongArchFloat64InstrInfo.td:69 |
| 639 | FCMP_CNE_S = 624, // LoongArchFloat32InstrInfo.td:91 |
| 640 | FCMP_COR_D = 625, // LoongArchFloat64InstrInfo.td:70 |
| 641 | FCMP_COR_S = 626, // LoongArchFloat32InstrInfo.td:92 |
| 642 | FCMP_CUEQ_D = 627, // LoongArchFloat64InstrInfo.td:64 |
| 643 | FCMP_CUEQ_S = 628, // LoongArchFloat32InstrInfo.td:86 |
| 644 | FCMP_CULE_D = 629, // LoongArchFloat64InstrInfo.td:68 |
| 645 | FCMP_CULE_S = 630, // LoongArchFloat32InstrInfo.td:90 |
| 646 | FCMP_CULT_D = 631, // LoongArchFloat64InstrInfo.td:66 |
| 647 | FCMP_CULT_S = 632, // LoongArchFloat32InstrInfo.td:88 |
| 648 | FCMP_CUNE_D = 633, // LoongArchFloat64InstrInfo.td:71 |
| 649 | FCMP_CUNE_S = 634, // LoongArchFloat32InstrInfo.td:93 |
| 650 | FCMP_CUN_D = 635, // LoongArchFloat64InstrInfo.td:62 |
| 651 | FCMP_CUN_S = 636, // LoongArchFloat32InstrInfo.td:84 |
| 652 | FCMP_SAF_D = 637, // LoongArchFloat64InstrInfo.td:72 |
| 653 | FCMP_SAF_S = 638, // LoongArchFloat32InstrInfo.td:94 |
| 654 | FCMP_SEQ_D = 639, // LoongArchFloat64InstrInfo.td:74 |
| 655 | FCMP_SEQ_S = 640, // LoongArchFloat32InstrInfo.td:96 |
| 656 | FCMP_SLE_D = 641, // LoongArchFloat64InstrInfo.td:78 |
| 657 | FCMP_SLE_S = 642, // LoongArchFloat32InstrInfo.td:100 |
| 658 | FCMP_SLT_D = 643, // LoongArchFloat64InstrInfo.td:76 |
| 659 | FCMP_SLT_S = 644, // LoongArchFloat32InstrInfo.td:98 |
| 660 | FCMP_SNE_D = 645, // LoongArchFloat64InstrInfo.td:80 |
| 661 | FCMP_SNE_S = 646, // LoongArchFloat32InstrInfo.td:102 |
| 662 | FCMP_SOR_D = 647, // LoongArchFloat64InstrInfo.td:81 |
| 663 | FCMP_SOR_S = 648, // LoongArchFloat32InstrInfo.td:103 |
| 664 | FCMP_SUEQ_D = 649, // LoongArchFloat64InstrInfo.td:75 |
| 665 | FCMP_SUEQ_S = 650, // LoongArchFloat32InstrInfo.td:97 |
| 666 | FCMP_SULE_D = 651, // LoongArchFloat64InstrInfo.td:79 |
| 667 | FCMP_SULE_S = 652, // LoongArchFloat32InstrInfo.td:101 |
| 668 | FCMP_SULT_D = 653, // LoongArchFloat64InstrInfo.td:77 |
| 669 | FCMP_SULT_S = 654, // LoongArchFloat32InstrInfo.td:99 |
| 670 | FCMP_SUNE_D = 655, // LoongArchFloat64InstrInfo.td:82 |
| 671 | FCMP_SUNE_S = 656, // LoongArchFloat32InstrInfo.td:104 |
| 672 | FCMP_SUN_D = 657, // LoongArchFloat64InstrInfo.td:73 |
| 673 | FCMP_SUN_S = 658, // LoongArchFloat32InstrInfo.td:95 |
| 674 | FCOPYSIGN_D = 659, // LoongArchFloat64InstrInfo.td:57 |
| 675 | FCOPYSIGN_S = 660, // LoongArchFloat32InstrInfo.td:78 |
| 676 | FCVT_D_LD = 661, // LoongArchLBTInstrInfo.td:51 |
| 677 | FCVT_D_S = 662, // LoongArchFloat64InstrInfo.td:92 |
| 678 | FCVT_LD_D = 663, // LoongArchLBTInstrInfo.td:50 |
| 679 | FCVT_S_D = 664, // LoongArchFloat64InstrInfo.td:91 |
| 680 | FCVT_UD_D = 665, // LoongArchLBTInstrInfo.td:49 |
| 681 | FDIV_D = 666, // LoongArchFloat64InstrInfo.td:39 |
| 682 | FDIV_S = 667, // LoongArchFloat32InstrInfo.td:60 |
| 683 | FFINT_D_L = 668, // LoongArchFloat64InstrInfo.td:94 |
| 684 | FFINT_D_W = 669, // LoongArchFloat64InstrInfo.td:93 |
| 685 | FFINT_S_L = 670, // LoongArchFloat64InstrInfo.td:85 |
| 686 | FFINT_S_W = 671, // LoongArchFloat32InstrInfo.td:107 |
| 687 | FLDGT_D = 672, // LoongArchFloat64InstrInfo.td:127 |
| 688 | FLDGT_S = 673, // LoongArchFloat32InstrInfo.td:140 |
| 689 | FLDLE_D = 674, // LoongArchFloat64InstrInfo.td:128 |
| 690 | FLDLE_S = 675, // LoongArchFloat32InstrInfo.td:141 |
| 691 | FLDX_D = 676, // LoongArchFloat64InstrInfo.td:123 |
| 692 | FLDX_S = 677, // LoongArchFloat32InstrInfo.td:136 |
| 693 | FLD_D = 678, // LoongArchFloat64InstrInfo.td:121 |
| 694 | FLD_S = 679, // LoongArchFloat32InstrInfo.td:134 |
| 695 | FLOGB_D = 680, // LoongArchFloat64InstrInfo.td:56 |
| 696 | FLOGB_S = 681, // LoongArchFloat32InstrInfo.td:77 |
| 697 | FMADD_D = 682, // LoongArchFloat64InstrInfo.td:40 |
| 698 | FMADD_S = 683, // LoongArchFloat32InstrInfo.td:61 |
| 699 | FMAXA_D = 684, // LoongArchFloat64InstrInfo.td:46 |
| 700 | FMAXA_S = 685, // LoongArchFloat32InstrInfo.td:67 |
| 701 | FMAX_D = 686, // LoongArchFloat64InstrInfo.td:44 |
| 702 | FMAX_S = 687, // LoongArchFloat32InstrInfo.td:65 |
| 703 | FMINA_D = 688, // LoongArchFloat64InstrInfo.td:47 |
| 704 | FMINA_S = 689, // LoongArchFloat32InstrInfo.td:68 |
| 705 | FMIN_D = 690, // LoongArchFloat64InstrInfo.td:45 |
| 706 | FMIN_S = 691, // LoongArchFloat32InstrInfo.td:66 |
| 707 | FMOV_D = 692, // LoongArchFloat64InstrInfo.td:108 |
| 708 | FMOV_S = 693, // LoongArchFloat32InstrInfo.td:117 |
| 709 | FMSUB_D = 694, // LoongArchFloat64InstrInfo.td:41 |
| 710 | FMSUB_S = 695, // LoongArchFloat32InstrInfo.td:62 |
| 711 | FMUL_D = 696, // LoongArchFloat64InstrInfo.td:38 |
| 712 | FMUL_S = 697, // LoongArchFloat32InstrInfo.td:59 |
| 713 | FNEG_D = 698, // LoongArchFloat64InstrInfo.td:49 |
| 714 | FNEG_S = 699, // LoongArchFloat32InstrInfo.td:70 |
| 715 | FNMADD_D = 700, // LoongArchFloat64InstrInfo.td:42 |
| 716 | FNMADD_S = 701, // LoongArchFloat32InstrInfo.td:63 |
| 717 | FNMSUB_D = 702, // LoongArchFloat64InstrInfo.td:43 |
| 718 | FNMSUB_S = 703, // LoongArchFloat32InstrInfo.td:64 |
| 719 | FRECIPE_D = 704, // LoongArchFloat64InstrInfo.td:53 |
| 720 | FRECIPE_S = 705, // LoongArchFloat32InstrInfo.td:74 |
| 721 | FRECIP_D = 706, // LoongArchFloat64InstrInfo.td:51 |
| 722 | FRECIP_S = 707, // LoongArchFloat32InstrInfo.td:72 |
| 723 | FRINT_D = 708, // LoongArchFloat64InstrInfo.td:105 |
| 724 | FRINT_S = 709, // LoongArchFloat32InstrInfo.td:113 |
| 725 | FRSQRTE_D = 710, // LoongArchFloat64InstrInfo.td:54 |
| 726 | FRSQRTE_S = 711, // LoongArchFloat32InstrInfo.td:75 |
| 727 | FRSQRT_D = 712, // LoongArchFloat64InstrInfo.td:52 |
| 728 | FRSQRT_S = 713, // LoongArchFloat32InstrInfo.td:73 |
| 729 | FSCALEB_D = 714, // LoongArchFloat64InstrInfo.td:55 |
| 730 | FSCALEB_S = 715, // LoongArchFloat32InstrInfo.td:76 |
| 731 | FSEL_xD = 716, // LoongArchFloat64InstrInfo.td:112 |
| 732 | FSEL_xS = 717, // LoongArchFloat32InstrInfo.td:116 |
| 733 | FSQRT_D = 718, // LoongArchFloat64InstrInfo.td:50 |
| 734 | FSQRT_S = 719, // LoongArchFloat32InstrInfo.td:71 |
| 735 | FSTGT_D = 720, // LoongArchFloat64InstrInfo.td:129 |
| 736 | FSTGT_S = 721, // LoongArchFloat32InstrInfo.td:142 |
| 737 | FSTLE_D = 722, // LoongArchFloat64InstrInfo.td:130 |
| 738 | FSTLE_S = 723, // LoongArchFloat32InstrInfo.td:143 |
| 739 | FSTX_D = 724, // LoongArchFloat64InstrInfo.td:124 |
| 740 | FSTX_S = 725, // LoongArchFloat32InstrInfo.td:137 |
| 741 | FST_D = 726, // LoongArchFloat64InstrInfo.td:122 |
| 742 | FST_S = 727, // LoongArchFloat32InstrInfo.td:135 |
| 743 | FSUB_D = 728, // LoongArchFloat64InstrInfo.td:37 |
| 744 | FSUB_S = 729, // LoongArchFloat32InstrInfo.td:58 |
| 745 | FTINTRM_L_D = 730, // LoongArchFloat64InstrInfo.td:98 |
| 746 | FTINTRM_L_S = 731, // LoongArchFloat64InstrInfo.td:87 |
| 747 | FTINTRM_W_D = 732, // LoongArchFloat64InstrInfo.td:97 |
| 748 | FTINTRM_W_S = 733, // LoongArchFloat32InstrInfo.td:109 |
| 749 | FTINTRNE_L_D = 734, // LoongArchFloat64InstrInfo.td:104 |
| 750 | FTINTRNE_L_S = 735, // LoongArchFloat64InstrInfo.td:90 |
| 751 | FTINTRNE_W_D = 736, // LoongArchFloat64InstrInfo.td:103 |
| 752 | FTINTRNE_W_S = 737, // LoongArchFloat32InstrInfo.td:112 |
| 753 | FTINTRP_L_D = 738, // LoongArchFloat64InstrInfo.td:100 |
| 754 | FTINTRP_L_S = 739, // LoongArchFloat64InstrInfo.td:88 |
| 755 | FTINTRP_W_D = 740, // LoongArchFloat64InstrInfo.td:99 |
| 756 | FTINTRP_W_S = 741, // LoongArchFloat32InstrInfo.td:110 |
| 757 | FTINTRZ_L_D = 742, // LoongArchFloat64InstrInfo.td:102 |
| 758 | FTINTRZ_L_S = 743, // LoongArchFloat64InstrInfo.td:89 |
| 759 | FTINTRZ_W_D = 744, // LoongArchFloat64InstrInfo.td:101 |
| 760 | FTINTRZ_W_S = 745, // LoongArchFloat32InstrInfo.td:111 |
| 761 | FTINT_L_D = 746, // LoongArchFloat64InstrInfo.td:96 |
| 762 | FTINT_L_S = 747, // LoongArchFloat64InstrInfo.td:86 |
| 763 | FTINT_W_D = 748, // LoongArchFloat64InstrInfo.td:95 |
| 764 | FTINT_W_S = 749, // LoongArchFloat32InstrInfo.td:108 |
| 765 | GCSRRD = 750, // LoongArchLVZInstrInfo.td:19 |
| 766 | GCSRWR = 751, // LoongArchLVZInstrInfo.td:23 |
| 767 | GCSRXCHG = 752, // LoongArchLVZInstrInfo.td:25 |
| 768 | GTLBFLUSH = 753, // LoongArchLVZInstrInfo.td:30 |
| 769 | HVCL = 754, // LoongArchLVZInstrInfo.td:31 |
| 770 | IBAR = 755, // LoongArchInstrInfo.td:932 |
| 771 | IDLE = 756, // LoongArchInstrInfo.td:2595 |
| 772 | INVTLB = 757, // LoongArchInstrInfo.td:2581 |
| 773 | IOCSRRD_B = 758, // LoongArchInstrInfo.td:2562 |
| 774 | IOCSRRD_D = 759, // LoongArchInstrInfo.td:2569 |
| 775 | IOCSRRD_H = 760, // LoongArchInstrInfo.td:2563 |
| 776 | IOCSRRD_W = 761, // LoongArchInstrInfo.td:2564 |
| 777 | IOCSRWR_B = 762, // LoongArchInstrInfo.td:2565 |
| 778 | IOCSRWR_D = 763, // LoongArchInstrInfo.td:2570 |
| 779 | IOCSRWR_H = 764, // LoongArchInstrInfo.td:2566 |
| 780 | IOCSRWR_W = 765, // LoongArchInstrInfo.td:2567 |
| 781 | JIRL = 766, // LoongArchInstrInfo.td:910 |
| 782 | JISCR0 = 767, // LoongArchLBTInstrInfo.td:22 |
| 783 | JISCR1 = 768, // LoongArchLBTInstrInfo.td:23 |
| 784 | LDDIR = 769, // LoongArchInstrInfo.td:2586 |
| 785 | LDGT_B = 770, // LoongArchInstrInfo.td:1087 |
| 786 | LDGT_D = 771, // LoongArchInstrInfo.td:1090 |
| 787 | LDGT_H = 772, // LoongArchInstrInfo.td:1088 |
| 788 | LDGT_W = 773, // LoongArchInstrInfo.td:1089 |
| 789 | LDLE_B = 774, // LoongArchInstrInfo.td:1091 |
| 790 | LDLE_D = 775, // LoongArchInstrInfo.td:1094 |
| 791 | LDLE_H = 776, // LoongArchInstrInfo.td:1092 |
| 792 | LDLE_W = 777, // LoongArchInstrInfo.td:1093 |
| 793 | LDL_D = 778, // LoongArchLBTInstrInfo.td:199 |
| 794 | LDL_W = 779, // LoongArchLBTInstrInfo.td:54 |
| 795 | LDPTE = 780, // LoongArchInstrInfo.td:2588 |
| 796 | LDPTR_D = 781, // LoongArchInstrInfo.td:1079 |
| 797 | LDPTR_W = 782, // LoongArchInstrInfo.td:1078 |
| 798 | LDR_D = 783, // LoongArchLBTInstrInfo.td:200 |
| 799 | LDR_W = 784, // LoongArchLBTInstrInfo.td:55 |
| 800 | LDX_B = 785, // LoongArchInstrInfo.td:1067 |
| 801 | LDX_BU = 786, // LoongArchInstrInfo.td:1071 |
| 802 | LDX_D = 787, // LoongArchInstrInfo.td:1070 |
| 803 | LDX_H = 788, // LoongArchInstrInfo.td:1068 |
| 804 | LDX_HU = 789, // LoongArchInstrInfo.td:1072 |
| 805 | LDX_W = 790, // LoongArchInstrInfo.td:1069 |
| 806 | LDX_WU = 791, // LoongArchInstrInfo.td:1073 |
| 807 | LD_B = 792, // LoongArchInstrInfo.td:914 |
| 808 | LD_BU = 793, // LoongArchInstrInfo.td:917 |
| 809 | LD_D = 794, // LoongArchInstrInfo.td:1065 |
| 810 | LD_H = 795, // LoongArchInstrInfo.td:915 |
| 811 | LD_HU = 796, // LoongArchInstrInfo.td:918 |
| 812 | LD_W = 797, // LoongArchInstrInfo.td:916 |
| 813 | LD_WU = 798, // LoongArchInstrInfo.td:1064 |
| 814 | LLACQ_D = 799, // LoongArchInstrInfo.td:1162 |
| 815 | LLACQ_W = 800, // LoongArchInstrInfo.td:1160 |
| 816 | LL_D = 801, // LoongArchInstrInfo.td:1157 |
| 817 | LL_W = 802, // LoongArchInstrInfo.td:927 |
| 818 | LU12I_W = 803, // LoongArchInstrInfo.td:862 |
| 819 | LU32I_D = 804, // LoongArchInstrInfo.td:1011 |
| 820 | LU52I_D = 805, // LoongArchInstrInfo.td:1016 |
| 821 | MASKEQZ = 806, // LoongArchInstrInfo.td:984 |
| 822 | MASKNEZ = 807, // LoongArchInstrInfo.td:985 |
| 823 | MOD_D = 808, // LoongArchInstrInfo.td:1026 |
| 824 | MOD_DU = 809, // LoongArchInstrInfo.td:1028 |
| 825 | MOD_W = 810, // LoongArchInstrInfo.td:884 |
| 826 | MOD_WU = 811, // LoongArchInstrInfo.td:886 |
| 827 | MOVCF2FR_xS = 812, // LoongArchFloat32InstrInfo.td:125 |
| 828 | MOVCF2GR = 813, // LoongArchFloat32InstrInfo.td:127 |
| 829 | MOVFCSR2GR = 814, // LoongArchFloat32InstrInfo.td:122 |
| 830 | MOVFR2CF_xS = 815, // LoongArchFloat32InstrInfo.td:124 |
| 831 | MOVFR2GR_D = 816, // LoongArchFloat64InstrInfo.td:137 |
| 832 | MOVFR2GR_S = 817, // LoongArchFloat32InstrInfo.td:119 |
| 833 | MOVFR2GR_S_64 = 818, // LoongArchFloat64InstrInfo.td:111 |
| 834 | MOVFRH2GR_S = 819, // LoongArchFloat64InstrInfo.td:109 |
| 835 | MOVGR2CF = 820, // LoongArchFloat32InstrInfo.td:126 |
| 836 | MOVGR2FCSR = 821, // LoongArchFloat32InstrInfo.td:121 |
| 837 | MOVGR2FRH_W = 822, // LoongArchFloat64InstrInfo.td:115 |
| 838 | MOVGR2FR_D = 823, // LoongArchFloat64InstrInfo.td:136 |
| 839 | MOVGR2FR_W = 824, // LoongArchFloat32InstrInfo.td:118 |
| 840 | MOVGR2FR_W_64 = 825, // LoongArchFloat64InstrInfo.td:142 |
| 841 | MOVGR2SCR = 826, // LoongArchLBTInstrInfo.td:19 |
| 842 | MOVSCR2GR = 827, // LoongArchLBTInstrInfo.td:20 |
| 843 | MULH_D = 828, // LoongArchInstrInfo.td:1020 |
| 844 | MULH_DU = 829, // LoongArchInstrInfo.td:1021 |
| 845 | MULH_W = 830, // LoongArchInstrInfo.td:880 |
| 846 | MULH_WU = 831, // LoongArchInstrInfo.td:881 |
| 847 | MULW_D_W = 832, // LoongArchInstrInfo.td:1022 |
| 848 | MULW_D_WU = 833, // LoongArchInstrInfo.td:1023 |
| 849 | MUL_D = 834, // LoongArchInstrInfo.td:1019 |
| 850 | MUL_W = 835, // LoongArchInstrInfo.td:879 |
| 851 | NOR = 836, // LoongArchInstrInfo.td:871 |
| 852 | OR = 837, // LoongArchInstrInfo.td:870 |
| 853 | ORI = 838, // LoongArchInstrInfo.td:876 |
| 854 | ORN = 839, // LoongArchInstrInfo.td:957 |
| 855 | PCADDI = 840, // LoongArchInstrInfo.td:958 |
| 856 | PCADDU12I = 841, // LoongArchInstrInfo.td:868 |
| 857 | PCADDU18I = 842, // LoongArchInstrInfo.td:1018 |
| 858 | PCALAU12I = 843, // LoongArchInstrInfo.td:959 |
| 859 | PRELD = 844, // LoongArchInstrInfo.td:923 |
| 860 | PRELDX = 845, // LoongArchInstrInfo.td:1083 |
| 861 | RCRI_B = 846, // LoongArchLBTInstrInfo.td:45 |
| 862 | RCRI_D = 847, // LoongArchLBTInstrInfo.td:195 |
| 863 | RCRI_H = 848, // LoongArchLBTInstrInfo.td:46 |
| 864 | RCRI_W = 849, // LoongArchLBTInstrInfo.td:47 |
| 865 | RCR_B = 850, // LoongArchLBTInstrInfo.td:41 |
| 866 | RCR_D = 851, // LoongArchLBTInstrInfo.td:194 |
| 867 | RCR_H = 852, // LoongArchLBTInstrInfo.td:42 |
| 868 | RCR_W = 853, // LoongArchLBTInstrInfo.td:43 |
| 869 | RDTIMEH_W = 854, // LoongArchInstrInfo.td:938 |
| 870 | RDTIMEL_W = 855, // LoongArchInstrInfo.td:937 |
| 871 | RDTIME_D = 856, // LoongArchInstrInfo.td:1180 |
| 872 | REVB_2H = 857, // LoongArchInstrInfo.td:973 |
| 873 | REVB_2W = 858, // LoongArchInstrInfo.td:1048 |
| 874 | REVB_4H = 859, // LoongArchInstrInfo.td:1047 |
| 875 | REVB_D = 860, // LoongArchInstrInfo.td:1049 |
| 876 | REVH_2W = 861, // LoongArchInstrInfo.td:1050 |
| 877 | REVH_D = 862, // LoongArchInstrInfo.td:1051 |
| 878 | ROTRI_B = 863, // LoongArchLBTInstrInfo.td:38 |
| 879 | ROTRI_D = 864, // LoongArchInstrInfo.td:1039 |
| 880 | ROTRI_H = 865, // LoongArchLBTInstrInfo.td:39 |
| 881 | ROTRI_W = 866, // LoongArchInstrInfo.td:963 |
| 882 | ROTR_B = 867, // LoongArchLBTInstrInfo.td:35 |
| 883 | ROTR_D = 868, // LoongArchInstrInfo.td:1035 |
| 884 | ROTR_H = 869, // LoongArchLBTInstrInfo.td:36 |
| 885 | ROTR_W = 870, // LoongArchInstrInfo.td:962 |
| 886 | SBC_B = 871, // LoongArchLBTInstrInfo.td:31 |
| 887 | SBC_D = 872, // LoongArchLBTInstrInfo.td:193 |
| 888 | SBC_H = 873, // LoongArchLBTInstrInfo.td:32 |
| 889 | SBC_W = 874, // LoongArchLBTInstrInfo.td:33 |
| 890 | SCREL_D = 875, // LoongArchInstrInfo.td:1163 |
| 891 | SCREL_W = 876, // LoongArchInstrInfo.td:1161 |
| 892 | SC_D = 877, // LoongArchInstrInfo.td:1158 |
| 893 | SC_Q = 878, // LoongArchInstrInfo.td:1159 |
| 894 | SC_W = 879, // LoongArchInstrInfo.td:928 |
| 895 | SETARMJ = 880, // LoongArchLBTInstrInfo.td:188 |
| 896 | SETX86J = 881, // LoongArchLBTInstrInfo.td:152 |
| 897 | SETX86LOOPE = 882, // LoongArchLBTInstrInfo.td:153 |
| 898 | SETX86LOOPNE = 883, // LoongArchLBTInstrInfo.td:154 |
| 899 | SET_CFR_FALSE = 884, // LoongArchFloat32InstrInfo.td:157 |
| 900 | SET_CFR_TRUE = 885, // LoongArchFloat32InstrInfo.td:159 |
| 901 | SLLI_D = 886, // LoongArchInstrInfo.td:1036 |
| 902 | SLLI_W = 887, // LoongArchInstrInfo.td:894 |
| 903 | SLL_D = 888, // LoongArchInstrInfo.td:1032 |
| 904 | SLL_W = 889, // LoongArchInstrInfo.td:890 |
| 905 | SLT = 890, // LoongArchInstrInfo.td:864 |
| 906 | SLTI = 891, // LoongArchInstrInfo.td:866 |
| 907 | SLTU = 892, // LoongArchInstrInfo.td:865 |
| 908 | SLTUI = 893, // LoongArchInstrInfo.td:867 |
| 909 | SRAI_D = 894, // LoongArchInstrInfo.td:1038 |
| 910 | SRAI_W = 895, // LoongArchInstrInfo.td:896 |
| 911 | SRA_D = 896, // LoongArchInstrInfo.td:1034 |
| 912 | SRA_W = 897, // LoongArchInstrInfo.td:892 |
| 913 | SRLI_D = 898, // LoongArchInstrInfo.td:1037 |
| 914 | SRLI_W = 899, // LoongArchInstrInfo.td:895 |
| 915 | SRL_D = 900, // LoongArchInstrInfo.td:1033 |
| 916 | SRL_W = 901, // LoongArchInstrInfo.td:891 |
| 917 | STGT_B = 902, // LoongArchInstrInfo.td:1095 |
| 918 | STGT_D = 903, // LoongArchInstrInfo.td:1098 |
| 919 | STGT_H = 904, // LoongArchInstrInfo.td:1096 |
| 920 | STGT_W = 905, // LoongArchInstrInfo.td:1097 |
| 921 | STLE_B = 906, // LoongArchInstrInfo.td:1099 |
| 922 | STLE_D = 907, // LoongArchInstrInfo.td:1102 |
| 923 | STLE_H = 908, // LoongArchInstrInfo.td:1100 |
| 924 | STLE_W = 909, // LoongArchInstrInfo.td:1101 |
| 925 | STL_D = 910, // LoongArchLBTInstrInfo.td:204 |
| 926 | STL_W = 911, // LoongArchLBTInstrInfo.td:59 |
| 927 | STPTR_D = 912, // LoongArchInstrInfo.td:1081 |
| 928 | STPTR_W = 913, // LoongArchInstrInfo.td:1080 |
| 929 | STR_D = 914, // LoongArchLBTInstrInfo.td:205 |
| 930 | STR_W = 915, // LoongArchLBTInstrInfo.td:60 |
| 931 | STX_B = 916, // LoongArchInstrInfo.td:1074 |
| 932 | STX_D = 917, // LoongArchInstrInfo.td:1077 |
| 933 | STX_H = 918, // LoongArchInstrInfo.td:1075 |
| 934 | STX_W = 919, // LoongArchInstrInfo.td:1076 |
| 935 | ST_B = 920, // LoongArchInstrInfo.td:919 |
| 936 | ST_D = 921, // LoongArchInstrInfo.td:1066 |
| 937 | ST_H = 922, // LoongArchInstrInfo.td:920 |
| 938 | ST_W = 923, // LoongArchInstrInfo.td:921 |
| 939 | SUB_D = 924, // LoongArchInstrInfo.td:998 |
| 940 | SUB_W = 925, // LoongArchInstrInfo.td:859 |
| 941 | SYSCALL = 926, // LoongArchInstrInfo.td:935 |
| 942 | TLBCLR = 927, // LoongArchInstrInfo.td:2579 |
| 943 | TLBFILL = 928, // LoongArchInstrInfo.td:2578 |
| 944 | TLBFLUSH = 929, // LoongArchInstrInfo.td:2580 |
| 945 | TLBRD = 930, // LoongArchInstrInfo.td:2576 |
| 946 | TLBSRCH = 931, // LoongArchInstrInfo.td:2575 |
| 947 | TLBWR = 932, // LoongArchInstrInfo.td:2577 |
| 948 | UD = 933, // LoongArchInstrInfo.td:941 |
| 949 | VABSD_B = 934, // LoongArchLSXInstrInfo.td:616 |
| 950 | VABSD_BU = 935, // LoongArchLSXInstrInfo.td:620 |
| 951 | VABSD_D = 936, // LoongArchLSXInstrInfo.td:619 |
| 952 | VABSD_DU = 937, // LoongArchLSXInstrInfo.td:623 |
| 953 | VABSD_H = 938, // LoongArchLSXInstrInfo.td:617 |
| 954 | VABSD_HU = 939, // LoongArchLSXInstrInfo.td:621 |
| 955 | VABSD_W = 940, // LoongArchLSXInstrInfo.td:618 |
| 956 | VABSD_WU = 941, // LoongArchLSXInstrInfo.td:622 |
| 957 | VADDA_B = 942, // LoongArchLSXInstrInfo.td:625 |
| 958 | VADDA_D = 943, // LoongArchLSXInstrInfo.td:628 |
| 959 | VADDA_H = 944, // LoongArchLSXInstrInfo.td:626 |
| 960 | VADDA_W = 945, // LoongArchLSXInstrInfo.td:627 |
| 961 | VADDI_BU = 946, // LoongArchLSXInstrInfo.td:503 |
| 962 | VADDI_DU = 947, // LoongArchLSXInstrInfo.td:506 |
| 963 | VADDI_HU = 948, // LoongArchLSXInstrInfo.td:504 |
| 964 | VADDI_WU = 949, // LoongArchLSXInstrInfo.td:505 |
| 965 | VADDWEV_D_W = 950, // LoongArchLSXInstrInfo.td:556 |
| 966 | VADDWEV_D_WU = 951, // LoongArchLSXInstrInfo.td:574 |
| 967 | VADDWEV_D_WU_W = 952, // LoongArchLSXInstrInfo.td:592 |
| 968 | VADDWEV_H_B = 953, // LoongArchLSXInstrInfo.td:554 |
| 969 | VADDWEV_H_BU = 954, // LoongArchLSXInstrInfo.td:572 |
| 970 | VADDWEV_H_BU_B = 955, // LoongArchLSXInstrInfo.td:590 |
| 971 | VADDWEV_Q_D = 956, // LoongArchLSXInstrInfo.td:557 |
| 972 | VADDWEV_Q_DU = 957, // LoongArchLSXInstrInfo.td:575 |
| 973 | VADDWEV_Q_DU_D = 958, // LoongArchLSXInstrInfo.td:593 |
| 974 | VADDWEV_W_H = 959, // LoongArchLSXInstrInfo.td:555 |
| 975 | VADDWEV_W_HU = 960, // LoongArchLSXInstrInfo.td:573 |
| 976 | VADDWEV_W_HU_H = 961, // LoongArchLSXInstrInfo.td:591 |
| 977 | VADDWOD_D_W = 962, // LoongArchLSXInstrInfo.td:560 |
| 978 | VADDWOD_D_WU = 963, // LoongArchLSXInstrInfo.td:578 |
| 979 | VADDWOD_D_WU_W = 964, // LoongArchLSXInstrInfo.td:596 |
| 980 | VADDWOD_H_B = 965, // LoongArchLSXInstrInfo.td:558 |
| 981 | VADDWOD_H_BU = 966, // LoongArchLSXInstrInfo.td:576 |
| 982 | VADDWOD_H_BU_B = 967, // LoongArchLSXInstrInfo.td:594 |
| 983 | VADDWOD_Q_D = 968, // LoongArchLSXInstrInfo.td:561 |
| 984 | VADDWOD_Q_DU = 969, // LoongArchLSXInstrInfo.td:579 |
| 985 | VADDWOD_Q_DU_D = 970, // LoongArchLSXInstrInfo.td:597 |
| 986 | VADDWOD_W_H = 971, // LoongArchLSXInstrInfo.td:559 |
| 987 | VADDWOD_W_HU = 972, // LoongArchLSXInstrInfo.td:577 |
| 988 | VADDWOD_W_HU_H = 973, // LoongArchLSXInstrInfo.td:595 |
| 989 | VADD_B = 974, // LoongArchLSXInstrInfo.td:491 |
| 990 | VADD_D = 975, // LoongArchLSXInstrInfo.td:494 |
| 991 | VADD_H = 976, // LoongArchLSXInstrInfo.td:492 |
| 992 | VADD_Q = 977, // LoongArchLSXInstrInfo.td:495 |
| 993 | VADD_W = 978, // LoongArchLSXInstrInfo.td:493 |
| 994 | VANDI_B = 979, // LoongArchLSXInstrInfo.td:799 |
| 995 | VANDN_V = 980, // LoongArchLSXInstrInfo.td:796 |
| 996 | VAND_V = 981, // LoongArchLSXInstrInfo.td:792 |
| 997 | VAVGR_B = 982, // LoongArchLSXInstrInfo.td:607 |
| 998 | VAVGR_BU = 983, // LoongArchLSXInstrInfo.td:611 |
| 999 | VAVGR_D = 984, // LoongArchLSXInstrInfo.td:610 |
| 1000 | VAVGR_DU = 985, // LoongArchLSXInstrInfo.td:614 |
| 1001 | VAVGR_H = 986, // LoongArchLSXInstrInfo.td:608 |
| 1002 | VAVGR_HU = 987, // LoongArchLSXInstrInfo.td:612 |
| 1003 | VAVGR_W = 988, // LoongArchLSXInstrInfo.td:609 |
| 1004 | VAVGR_WU = 989, // LoongArchLSXInstrInfo.td:613 |
| 1005 | VAVG_B = 990, // LoongArchLSXInstrInfo.td:599 |
| 1006 | VAVG_BU = 991, // LoongArchLSXInstrInfo.td:603 |
| 1007 | VAVG_D = 992, // LoongArchLSXInstrInfo.td:602 |
| 1008 | VAVG_DU = 993, // LoongArchLSXInstrInfo.td:606 |
| 1009 | VAVG_H = 994, // LoongArchLSXInstrInfo.td:600 |
| 1010 | VAVG_HU = 995, // LoongArchLSXInstrInfo.td:604 |
| 1011 | VAVG_W = 996, // LoongArchLSXInstrInfo.td:601 |
| 1012 | VAVG_WU = 997, // LoongArchLSXInstrInfo.td:605 |
| 1013 | VBITCLRI_B = 998, // LoongArchLSXInstrInfo.td:977 |
| 1014 | VBITCLRI_D = 999, // LoongArchLSXInstrInfo.td:980 |
| 1015 | VBITCLRI_H = 1000, // LoongArchLSXInstrInfo.td:978 |
| 1016 | VBITCLRI_W = 1001, // LoongArchLSXInstrInfo.td:979 |
| 1017 | VBITCLR_B = 1002, // LoongArchLSXInstrInfo.td:973 |
| 1018 | VBITCLR_D = 1003, // LoongArchLSXInstrInfo.td:976 |
| 1019 | VBITCLR_H = 1004, // LoongArchLSXInstrInfo.td:974 |
| 1020 | VBITCLR_W = 1005, // LoongArchLSXInstrInfo.td:975 |
| 1021 | VBITREVI_B = 1006, // LoongArchLSXInstrInfo.td:995 |
| 1022 | VBITREVI_D = 1007, // LoongArchLSXInstrInfo.td:998 |
| 1023 | VBITREVI_H = 1008, // LoongArchLSXInstrInfo.td:996 |
| 1024 | VBITREVI_W = 1009, // LoongArchLSXInstrInfo.td:997 |
| 1025 | VBITREV_B = 1010, // LoongArchLSXInstrInfo.td:991 |
| 1026 | VBITREV_D = 1011, // LoongArchLSXInstrInfo.td:994 |
| 1027 | VBITREV_H = 1012, // LoongArchLSXInstrInfo.td:992 |
| 1028 | VBITREV_W = 1013, // LoongArchLSXInstrInfo.td:993 |
| 1029 | VBITSELI_B = 1014, // LoongArchLSXInstrInfo.td:1201 |
| 1030 | VBITSEL_V = 1015, // LoongArchLSXInstrInfo.td:1199 |
| 1031 | VBITSETI_B = 1016, // LoongArchLSXInstrInfo.td:986 |
| 1032 | VBITSETI_D = 1017, // LoongArchLSXInstrInfo.td:989 |
| 1033 | VBITSETI_H = 1018, // LoongArchLSXInstrInfo.td:987 |
| 1034 | VBITSETI_W = 1019, // LoongArchLSXInstrInfo.td:988 |
| 1035 | VBITSET_B = 1020, // LoongArchLSXInstrInfo.td:982 |
| 1036 | VBITSET_D = 1021, // LoongArchLSXInstrInfo.td:985 |
| 1037 | VBITSET_H = 1022, // LoongArchLSXInstrInfo.td:983 |
| 1038 | VBITSET_W = 1023, // LoongArchLSXInstrInfo.td:984 |
| 1039 | VBSLL_V = 1024, // LoongArchLSXInstrInfo.td:1243 |
| 1040 | VBSRL_V = 1025, // LoongArchLSXInstrInfo.td:1244 |
| 1041 | VCLO_B = 1026, // LoongArchLSXInstrInfo.td:959 |
| 1042 | VCLO_D = 1027, // LoongArchLSXInstrInfo.td:962 |
| 1043 | VCLO_H = 1028, // LoongArchLSXInstrInfo.td:960 |
| 1044 | VCLO_W = 1029, // LoongArchLSXInstrInfo.td:961 |
| 1045 | VCLZ_B = 1030, // LoongArchLSXInstrInfo.td:963 |
| 1046 | VCLZ_D = 1031, // LoongArchLSXInstrInfo.td:966 |
| 1047 | VCLZ_H = 1032, // LoongArchLSXInstrInfo.td:964 |
| 1048 | VCLZ_W = 1033, // LoongArchLSXInstrInfo.td:965 |
| 1049 | VDIV_B = 1034, // LoongArchLSXInstrInfo.td:738 |
| 1050 | VDIV_BU = 1035, // LoongArchLSXInstrInfo.td:742 |
| 1051 | VDIV_D = 1036, // LoongArchLSXInstrInfo.td:741 |
| 1052 | VDIV_DU = 1037, // LoongArchLSXInstrInfo.td:745 |
| 1053 | VDIV_H = 1038, // LoongArchLSXInstrInfo.td:739 |
| 1054 | VDIV_HU = 1039, // LoongArchLSXInstrInfo.td:743 |
| 1055 | VDIV_W = 1040, // LoongArchLSXInstrInfo.td:740 |
| 1056 | VDIV_WU = 1041, // LoongArchLSXInstrInfo.td:744 |
| 1057 | VEXT2XV_DU_BU = 1042, // LoongArchLASXInstrInfo.td:518 |
| 1058 | VEXT2XV_DU_HU = 1043, // LoongArchLASXInstrInfo.td:520 |
| 1059 | VEXT2XV_DU_WU = 1044, // LoongArchLASXInstrInfo.td:521 |
| 1060 | VEXT2XV_D_B = 1045, // LoongArchLASXInstrInfo.td:512 |
| 1061 | VEXT2XV_D_H = 1046, // LoongArchLASXInstrInfo.td:514 |
| 1062 | VEXT2XV_D_W = 1047, // LoongArchLASXInstrInfo.td:515 |
| 1063 | VEXT2XV_HU_BU = 1048, // LoongArchLASXInstrInfo.td:516 |
| 1064 | VEXT2XV_H_B = 1049, // LoongArchLASXInstrInfo.td:510 |
| 1065 | VEXT2XV_WU_BU = 1050, // LoongArchLASXInstrInfo.td:517 |
| 1066 | VEXT2XV_WU_HU = 1051, // LoongArchLASXInstrInfo.td:519 |
| 1067 | VEXT2XV_W_B = 1052, // LoongArchLASXInstrInfo.td:511 |
| 1068 | VEXT2XV_W_H = 1053, // LoongArchLASXInstrInfo.td:513 |
| 1069 | VEXTH_DU_WU = 1054, // LoongArchLSXInstrInfo.td:771 |
| 1070 | VEXTH_D_W = 1055, // LoongArchLSXInstrInfo.td:767 |
| 1071 | VEXTH_HU_BU = 1056, // LoongArchLSXInstrInfo.td:769 |
| 1072 | VEXTH_H_B = 1057, // LoongArchLSXInstrInfo.td:765 |
| 1073 | VEXTH_QU_DU = 1058, // LoongArchLSXInstrInfo.td:772 |
| 1074 | VEXTH_Q_D = 1059, // LoongArchLSXInstrInfo.td:768 |
| 1075 | VEXTH_WU_HU = 1060, // LoongArchLSXInstrInfo.td:770 |
| 1076 | VEXTH_W_H = 1061, // LoongArchLSXInstrInfo.td:766 |
| 1077 | VEXTL_QU_DU = 1062, // LoongArchLSXInstrInfo.td:847 |
| 1078 | VEXTL_Q_D = 1063, // LoongArchLSXInstrInfo.td:843 |
| 1079 | VEXTRINS_B = 1064, // LoongArchLSXInstrInfo.td:1289 |
| 1080 | VEXTRINS_D = 1065, // LoongArchLSXInstrInfo.td:1286 |
| 1081 | VEXTRINS_H = 1066, // LoongArchLSXInstrInfo.td:1288 |
| 1082 | VEXTRINS_W = 1067, // LoongArchLSXInstrInfo.td:1287 |
| 1083 | VFADD_D = 1068, // LoongArchLSXInstrInfo.td:1006 |
| 1084 | VFADD_S = 1069, // LoongArchLSXInstrInfo.td:1005 |
| 1085 | VFCLASS_D = 1070, // LoongArchLSXInstrInfo.td:1037 |
| 1086 | VFCLASS_S = 1071, // LoongArchLSXInstrInfo.td:1036 |
| 1087 | VFCMP_CAF_D = 1072, // LoongArchLSXInstrInfo.td:1176 |
| 1088 | VFCMP_CAF_S = 1073, // LoongArchLSXInstrInfo.td:1153 |
| 1089 | VFCMP_CEQ_D = 1074, // LoongArchLSXInstrInfo.td:1180 |
| 1090 | VFCMP_CEQ_S = 1075, // LoongArchLSXInstrInfo.td:1157 |
| 1091 | VFCMP_CLE_D = 1076, // LoongArchLSXInstrInfo.td:1182 |
| 1092 | VFCMP_CLE_S = 1077, // LoongArchLSXInstrInfo.td:1159 |
| 1093 | VFCMP_CLT_D = 1078, // LoongArchLSXInstrInfo.td:1178 |
| 1094 | VFCMP_CLT_S = 1079, // LoongArchLSXInstrInfo.td:1155 |
| 1095 | VFCMP_CNE_D = 1080, // LoongArchLSXInstrInfo.td:1192 |
| 1096 | VFCMP_CNE_S = 1081, // LoongArchLSXInstrInfo.td:1169 |
| 1097 | VFCMP_COR_D = 1082, // LoongArchLSXInstrInfo.td:1194 |
| 1098 | VFCMP_COR_S = 1083, // LoongArchLSXInstrInfo.td:1171 |
| 1099 | VFCMP_CUEQ_D = 1084, // LoongArchLSXInstrInfo.td:1188 |
| 1100 | VFCMP_CUEQ_S = 1085, // LoongArchLSXInstrInfo.td:1165 |
| 1101 | VFCMP_CULE_D = 1086, // LoongArchLSXInstrInfo.td:1190 |
| 1102 | VFCMP_CULE_S = 1087, // LoongArchLSXInstrInfo.td:1167 |
| 1103 | VFCMP_CULT_D = 1088, // LoongArchLSXInstrInfo.td:1186 |
| 1104 | VFCMP_CULT_S = 1089, // LoongArchLSXInstrInfo.td:1163 |
| 1105 | VFCMP_CUNE_D = 1090, // LoongArchLSXInstrInfo.td:1196 |
| 1106 | VFCMP_CUNE_S = 1091, // LoongArchLSXInstrInfo.td:1173 |
| 1107 | VFCMP_CUN_D = 1092, // LoongArchLSXInstrInfo.td:1184 |
| 1108 | VFCMP_CUN_S = 1093, // LoongArchLSXInstrInfo.td:1161 |
| 1109 | VFCMP_SAF_D = 1094, // LoongArchLSXInstrInfo.td:1177 |
| 1110 | VFCMP_SAF_S = 1095, // LoongArchLSXInstrInfo.td:1154 |
| 1111 | VFCMP_SEQ_D = 1096, // LoongArchLSXInstrInfo.td:1181 |
| 1112 | VFCMP_SEQ_S = 1097, // LoongArchLSXInstrInfo.td:1158 |
| 1113 | VFCMP_SLE_D = 1098, // LoongArchLSXInstrInfo.td:1183 |
| 1114 | VFCMP_SLE_S = 1099, // LoongArchLSXInstrInfo.td:1160 |
| 1115 | VFCMP_SLT_D = 1100, // LoongArchLSXInstrInfo.td:1179 |
| 1116 | VFCMP_SLT_S = 1101, // LoongArchLSXInstrInfo.td:1156 |
| 1117 | VFCMP_SNE_D = 1102, // LoongArchLSXInstrInfo.td:1193 |
| 1118 | VFCMP_SNE_S = 1103, // LoongArchLSXInstrInfo.td:1170 |
| 1119 | VFCMP_SOR_D = 1104, // LoongArchLSXInstrInfo.td:1195 |
| 1120 | VFCMP_SOR_S = 1105, // LoongArchLSXInstrInfo.td:1172 |
| 1121 | VFCMP_SUEQ_D = 1106, // LoongArchLSXInstrInfo.td:1189 |
| 1122 | VFCMP_SUEQ_S = 1107, // LoongArchLSXInstrInfo.td:1166 |
| 1123 | VFCMP_SULE_D = 1108, // LoongArchLSXInstrInfo.td:1191 |
| 1124 | VFCMP_SULE_S = 1109, // LoongArchLSXInstrInfo.td:1168 |
| 1125 | VFCMP_SULT_D = 1110, // LoongArchLSXInstrInfo.td:1187 |
| 1126 | VFCMP_SULT_S = 1111, // LoongArchLSXInstrInfo.td:1164 |
| 1127 | VFCMP_SUNE_D = 1112, // LoongArchLSXInstrInfo.td:1197 |
| 1128 | VFCMP_SUNE_S = 1113, // LoongArchLSXInstrInfo.td:1174 |
| 1129 | VFCMP_SUN_D = 1114, // LoongArchLSXInstrInfo.td:1185 |
| 1130 | VFCMP_SUN_S = 1115, // LoongArchLSXInstrInfo.td:1162 |
| 1131 | VFCVTH_D_S = 1116, // LoongArchLSXInstrInfo.td:1053 |
| 1132 | VFCVTH_S_H = 1117, // LoongArchLSXInstrInfo.td:1051 |
| 1133 | VFCVTL_D_S = 1118, // LoongArchLSXInstrInfo.td:1052 |
| 1134 | VFCVTL_S_H = 1119, // LoongArchLSXInstrInfo.td:1050 |
| 1135 | VFCVT_H_S = 1120, // LoongArchLSXInstrInfo.td:1054 |
| 1136 | VFCVT_S_D = 1121, // LoongArchLSXInstrInfo.td:1055 |
| 1137 | VFDIV_D = 1122, // LoongArchLSXInstrInfo.td:1012 |
| 1138 | VFDIV_S = 1123, // LoongArchLSXInstrInfo.td:1011 |
| 1139 | VFFINTH_D_W = 1124, // LoongArchLSXInstrInfo.td:1105 |
| 1140 | VFFINTL_D_W = 1125, // LoongArchLSXInstrInfo.td:1104 |
| 1141 | VFFINT_D_L = 1126, // LoongArchLSXInstrInfo.td:1101 |
| 1142 | VFFINT_D_LU = 1127, // LoongArchLSXInstrInfo.td:1103 |
| 1143 | VFFINT_S_L = 1128, // LoongArchLSXInstrInfo.td:1106 |
| 1144 | VFFINT_S_W = 1129, // LoongArchLSXInstrInfo.td:1100 |
| 1145 | VFFINT_S_WU = 1130, // LoongArchLSXInstrInfo.td:1102 |
| 1146 | VFLOGB_D = 1131, // LoongArchLSXInstrInfo.td:1034 |
| 1147 | VFLOGB_S = 1132, // LoongArchLSXInstrInfo.td:1033 |
| 1148 | VFMADD_D = 1133, // LoongArchLSXInstrInfo.td:1015 |
| 1149 | VFMADD_S = 1134, // LoongArchLSXInstrInfo.td:1014 |
| 1150 | VFMAXA_D = 1135, // LoongArchLSXInstrInfo.td:1029 |
| 1151 | VFMAXA_S = 1136, // LoongArchLSXInstrInfo.td:1028 |
| 1152 | VFMAX_D = 1137, // LoongArchLSXInstrInfo.td:1024 |
| 1153 | VFMAX_S = 1138, // LoongArchLSXInstrInfo.td:1023 |
| 1154 | VFMINA_D = 1139, // LoongArchLSXInstrInfo.td:1031 |
| 1155 | VFMINA_S = 1140, // LoongArchLSXInstrInfo.td:1030 |
| 1156 | VFMIN_D = 1141, // LoongArchLSXInstrInfo.td:1026 |
| 1157 | VFMIN_S = 1142, // LoongArchLSXInstrInfo.td:1025 |
| 1158 | VFMSUB_D = 1143, // LoongArchLSXInstrInfo.td:1017 |
| 1159 | VFMSUB_S = 1144, // LoongArchLSXInstrInfo.td:1016 |
| 1160 | VFMUL_D = 1145, // LoongArchLSXInstrInfo.td:1010 |
| 1161 | VFMUL_S = 1146, // LoongArchLSXInstrInfo.td:1009 |
| 1162 | VFNMADD_D = 1147, // LoongArchLSXInstrInfo.td:1019 |
| 1163 | VFNMADD_S = 1148, // LoongArchLSXInstrInfo.td:1018 |
| 1164 | VFNMSUB_D = 1149, // LoongArchLSXInstrInfo.td:1021 |
| 1165 | VFNMSUB_S = 1150, // LoongArchLSXInstrInfo.td:1020 |
| 1166 | VFRECIPE_D = 1151, // LoongArchLSXInstrInfo.td:1046 |
| 1167 | VFRECIPE_S = 1152, // LoongArchLSXInstrInfo.td:1045 |
| 1168 | VFRECIP_D = 1153, // LoongArchLSXInstrInfo.td:1042 |
| 1169 | VFRECIP_S = 1154, // LoongArchLSXInstrInfo.td:1041 |
| 1170 | VFRINTRM_D = 1155, // LoongArchLSXInstrInfo.td:1064 |
| 1171 | VFRINTRM_S = 1156, // LoongArchLSXInstrInfo.td:1063 |
| 1172 | VFRINTRNE_D = 1157, // LoongArchLSXInstrInfo.td:1058 |
| 1173 | VFRINTRNE_S = 1158, // LoongArchLSXInstrInfo.td:1057 |
| 1174 | VFRINTRP_D = 1159, // LoongArchLSXInstrInfo.td:1062 |
| 1175 | VFRINTRP_S = 1160, // LoongArchLSXInstrInfo.td:1061 |
| 1176 | VFRINTRZ_D = 1161, // LoongArchLSXInstrInfo.td:1060 |
| 1177 | VFRINTRZ_S = 1162, // LoongArchLSXInstrInfo.td:1059 |
| 1178 | VFRINT_D = 1163, // LoongArchLSXInstrInfo.td:1066 |
| 1179 | VFRINT_S = 1164, // LoongArchLSXInstrInfo.td:1065 |
| 1180 | VFRSQRTE_D = 1165, // LoongArchLSXInstrInfo.td:1048 |
| 1181 | VFRSQRTE_S = 1166, // LoongArchLSXInstrInfo.td:1047 |
| 1182 | VFRSQRT_D = 1167, // LoongArchLSXInstrInfo.td:1044 |
| 1183 | VFRSQRT_S = 1168, // LoongArchLSXInstrInfo.td:1043 |
| 1184 | VFRSTPI_B = 1169, // LoongArchLSXInstrInfo.td:1002 |
| 1185 | VFRSTPI_H = 1170, // LoongArchLSXInstrInfo.td:1003 |
| 1186 | VFRSTP_B = 1171, // LoongArchLSXInstrInfo.td:1000 |
| 1187 | VFRSTP_H = 1172, // LoongArchLSXInstrInfo.td:1001 |
| 1188 | VFSQRT_D = 1173, // LoongArchLSXInstrInfo.td:1040 |
| 1189 | VFSQRT_S = 1174, // LoongArchLSXInstrInfo.td:1039 |
| 1190 | VFSUB_D = 1175, // LoongArchLSXInstrInfo.td:1008 |
| 1191 | VFSUB_S = 1176, // LoongArchLSXInstrInfo.td:1007 |
| 1192 | VFTINTH_L_S = 1177, // LoongArchLSXInstrInfo.td:1098 |
| 1193 | VFTINTL_L_S = 1178, // LoongArchLSXInstrInfo.td:1097 |
| 1194 | VFTINTRMH_L_S = 1179, // LoongArchLSXInstrInfo.td:1096 |
| 1195 | VFTINTRML_L_S = 1180, // LoongArchLSXInstrInfo.td:1095 |
| 1196 | VFTINTRM_L_D = 1181, // LoongArchLSXInstrInfo.td:1075 |
| 1197 | VFTINTRM_W_D = 1182, // LoongArchLSXInstrInfo.td:1086 |
| 1198 | VFTINTRM_W_S = 1183, // LoongArchLSXInstrInfo.td:1074 |
| 1199 | VFTINTRNEH_L_S = 1184, // LoongArchLSXInstrInfo.td:1090 |
| 1200 | VFTINTRNEL_L_S = 1185, // LoongArchLSXInstrInfo.td:1089 |
| 1201 | VFTINTRNE_L_D = 1186, // LoongArchLSXInstrInfo.td:1069 |
| 1202 | VFTINTRNE_W_D = 1187, // LoongArchLSXInstrInfo.td:1083 |
| 1203 | VFTINTRNE_W_S = 1188, // LoongArchLSXInstrInfo.td:1068 |
| 1204 | VFTINTRPH_L_S = 1189, // LoongArchLSXInstrInfo.td:1094 |
| 1205 | VFTINTRPL_L_S = 1190, // LoongArchLSXInstrInfo.td:1093 |
| 1206 | VFTINTRP_L_D = 1191, // LoongArchLSXInstrInfo.td:1073 |
| 1207 | VFTINTRP_W_D = 1192, // LoongArchLSXInstrInfo.td:1085 |
| 1208 | VFTINTRP_W_S = 1193, // LoongArchLSXInstrInfo.td:1072 |
| 1209 | VFTINTRZH_L_S = 1194, // LoongArchLSXInstrInfo.td:1092 |
| 1210 | VFTINTRZL_L_S = 1195, // LoongArchLSXInstrInfo.td:1091 |
| 1211 | VFTINTRZ_LU_D = 1196, // LoongArchLSXInstrInfo.td:1079 |
| 1212 | VFTINTRZ_L_D = 1197, // LoongArchLSXInstrInfo.td:1071 |
| 1213 | VFTINTRZ_WU_S = 1198, // LoongArchLSXInstrInfo.td:1078 |
| 1214 | VFTINTRZ_W_D = 1199, // LoongArchLSXInstrInfo.td:1084 |
| 1215 | VFTINTRZ_W_S = 1200, // LoongArchLSXInstrInfo.td:1070 |
| 1216 | VFTINT_LU_D = 1201, // LoongArchLSXInstrInfo.td:1081 |
| 1217 | VFTINT_L_D = 1202, // LoongArchLSXInstrInfo.td:1077 |
| 1218 | VFTINT_WU_S = 1203, // LoongArchLSXInstrInfo.td:1080 |
| 1219 | VFTINT_W_D = 1204, // LoongArchLSXInstrInfo.td:1087 |
| 1220 | VFTINT_W_S = 1205, // LoongArchLSXInstrInfo.td:1076 |
| 1221 | VHADDW_DU_WU = 1206, // LoongArchLSXInstrInfo.td:542 |
| 1222 | VHADDW_D_W = 1207, // LoongArchLSXInstrInfo.td:538 |
| 1223 | VHADDW_HU_BU = 1208, // LoongArchLSXInstrInfo.td:540 |
| 1224 | VHADDW_H_B = 1209, // LoongArchLSXInstrInfo.td:536 |
| 1225 | VHADDW_QU_DU = 1210, // LoongArchLSXInstrInfo.td:543 |
| 1226 | VHADDW_Q_D = 1211, // LoongArchLSXInstrInfo.td:539 |
| 1227 | VHADDW_WU_HU = 1212, // LoongArchLSXInstrInfo.td:541 |
| 1228 | VHADDW_W_H = 1213, // LoongArchLSXInstrInfo.td:537 |
| 1229 | VHSUBW_DU_WU = 1214, // LoongArchLSXInstrInfo.td:551 |
| 1230 | VHSUBW_D_W = 1215, // LoongArchLSXInstrInfo.td:547 |
| 1231 | VHSUBW_HU_BU = 1216, // LoongArchLSXInstrInfo.td:549 |
| 1232 | VHSUBW_H_B = 1217, // LoongArchLSXInstrInfo.td:545 |
| 1233 | VHSUBW_QU_DU = 1218, // LoongArchLSXInstrInfo.td:552 |
| 1234 | VHSUBW_Q_D = 1219, // LoongArchLSXInstrInfo.td:548 |
| 1235 | VHSUBW_WU_HU = 1220, // LoongArchLSXInstrInfo.td:550 |
| 1236 | VHSUBW_W_H = 1221, // LoongArchLSXInstrInfo.td:546 |
| 1237 | VILVH_B = 1222, // LoongArchLSXInstrInfo.td:1268 |
| 1238 | VILVH_D = 1223, // LoongArchLSXInstrInfo.td:1271 |
| 1239 | VILVH_H = 1224, // LoongArchLSXInstrInfo.td:1269 |
| 1240 | VILVH_W = 1225, // LoongArchLSXInstrInfo.td:1270 |
| 1241 | VILVL_B = 1226, // LoongArchLSXInstrInfo.td:1264 |
| 1242 | VILVL_D = 1227, // LoongArchLSXInstrInfo.td:1267 |
| 1243 | VILVL_H = 1228, // LoongArchLSXInstrInfo.td:1265 |
| 1244 | VILVL_W = 1229, // LoongArchLSXInstrInfo.td:1266 |
| 1245 | VINSGR2VR_B = 1230, // LoongArchLSXInstrInfo.td:1214 |
| 1246 | VINSGR2VR_D = 1231, // LoongArchLSXInstrInfo.td:1217 |
| 1247 | VINSGR2VR_H = 1232, // LoongArchLSXInstrInfo.td:1215 |
| 1248 | VINSGR2VR_W = 1233, // LoongArchLSXInstrInfo.td:1216 |
| 1249 | VLD = 1234, // LoongArchLSXInstrInfo.td:1293 |
| 1250 | VLDI = 1235, // LoongArchLSXInstrInfo.td:789 |
| 1251 | VLDREPL_B = 1236, // LoongArchLSXInstrInfo.td:1296 |
| 1252 | VLDREPL_D = 1237, // LoongArchLSXInstrInfo.td:1299 |
| 1253 | VLDREPL_H = 1238, // LoongArchLSXInstrInfo.td:1297 |
| 1254 | VLDREPL_W = 1239, // LoongArchLSXInstrInfo.td:1298 |
| 1255 | VLDX = 1240, // LoongArchLSXInstrInfo.td:1294 |
| 1256 | VMADDWEV_D_W = 1241, // LoongArchLSXInstrInfo.td:715 |
| 1257 | VMADDWEV_D_WU = 1242, // LoongArchLSXInstrInfo.td:723 |
| 1258 | VMADDWEV_D_WU_W = 1243, // LoongArchLSXInstrInfo.td:731 |
| 1259 | VMADDWEV_H_B = 1244, // LoongArchLSXInstrInfo.td:713 |
| 1260 | VMADDWEV_H_BU = 1245, // LoongArchLSXInstrInfo.td:721 |
| 1261 | VMADDWEV_H_BU_B = 1246, // LoongArchLSXInstrInfo.td:729 |
| 1262 | VMADDWEV_Q_D = 1247, // LoongArchLSXInstrInfo.td:716 |
| 1263 | VMADDWEV_Q_DU = 1248, // LoongArchLSXInstrInfo.td:724 |
| 1264 | VMADDWEV_Q_DU_D = 1249, // LoongArchLSXInstrInfo.td:732 |
| 1265 | VMADDWEV_W_H = 1250, // LoongArchLSXInstrInfo.td:714 |
| 1266 | VMADDWEV_W_HU = 1251, // LoongArchLSXInstrInfo.td:722 |
| 1267 | VMADDWEV_W_HU_H = 1252, // LoongArchLSXInstrInfo.td:730 |
| 1268 | VMADDWOD_D_W = 1253, // LoongArchLSXInstrInfo.td:719 |
| 1269 | VMADDWOD_D_WU = 1254, // LoongArchLSXInstrInfo.td:727 |
| 1270 | VMADDWOD_D_WU_W = 1255, // LoongArchLSXInstrInfo.td:735 |
| 1271 | VMADDWOD_H_B = 1256, // LoongArchLSXInstrInfo.td:717 |
| 1272 | VMADDWOD_H_BU = 1257, // LoongArchLSXInstrInfo.td:725 |
| 1273 | VMADDWOD_H_BU_B = 1258, // LoongArchLSXInstrInfo.td:733 |
| 1274 | VMADDWOD_Q_D = 1259, // LoongArchLSXInstrInfo.td:720 |
| 1275 | VMADDWOD_Q_DU = 1260, // LoongArchLSXInstrInfo.td:728 |
| 1276 | VMADDWOD_Q_DU_D = 1261, // LoongArchLSXInstrInfo.td:736 |
| 1277 | VMADDWOD_W_H = 1262, // LoongArchLSXInstrInfo.td:718 |
| 1278 | VMADDWOD_W_HU = 1263, // LoongArchLSXInstrInfo.td:726 |
| 1279 | VMADDWOD_W_HU_H = 1264, // LoongArchLSXInstrInfo.td:734 |
| 1280 | VMADD_B = 1265, // LoongArchLSXInstrInfo.td:703 |
| 1281 | VMADD_D = 1266, // LoongArchLSXInstrInfo.td:706 |
| 1282 | VMADD_H = 1267, // LoongArchLSXInstrInfo.td:704 |
| 1283 | VMADD_W = 1268, // LoongArchLSXInstrInfo.td:705 |
| 1284 | VMAXI_B = 1269, // LoongArchLSXInstrInfo.td:634 |
| 1285 | VMAXI_BU = 1270, // LoongArchLSXInstrInfo.td:642 |
| 1286 | VMAXI_D = 1271, // LoongArchLSXInstrInfo.td:637 |
| 1287 | VMAXI_DU = 1272, // LoongArchLSXInstrInfo.td:645 |
| 1288 | VMAXI_H = 1273, // LoongArchLSXInstrInfo.td:635 |
| 1289 | VMAXI_HU = 1274, // LoongArchLSXInstrInfo.td:643 |
| 1290 | VMAXI_W = 1275, // LoongArchLSXInstrInfo.td:636 |
| 1291 | VMAXI_WU = 1276, // LoongArchLSXInstrInfo.td:644 |
| 1292 | VMAX_B = 1277, // LoongArchLSXInstrInfo.td:630 |
| 1293 | VMAX_BU = 1278, // LoongArchLSXInstrInfo.td:638 |
| 1294 | VMAX_D = 1279, // LoongArchLSXInstrInfo.td:633 |
| 1295 | VMAX_DU = 1280, // LoongArchLSXInstrInfo.td:641 |
| 1296 | VMAX_H = 1281, // LoongArchLSXInstrInfo.td:631 |
| 1297 | VMAX_HU = 1282, // LoongArchLSXInstrInfo.td:639 |
| 1298 | VMAX_W = 1283, // LoongArchLSXInstrInfo.td:632 |
| 1299 | VMAX_WU = 1284, // LoongArchLSXInstrInfo.td:640 |
| 1300 | VMINI_B = 1285, // LoongArchLSXInstrInfo.td:651 |
| 1301 | VMINI_BU = 1286, // LoongArchLSXInstrInfo.td:659 |
| 1302 | VMINI_D = 1287, // LoongArchLSXInstrInfo.td:654 |
| 1303 | VMINI_DU = 1288, // LoongArchLSXInstrInfo.td:662 |
| 1304 | VMINI_H = 1289, // LoongArchLSXInstrInfo.td:652 |
| 1305 | VMINI_HU = 1290, // LoongArchLSXInstrInfo.td:660 |
| 1306 | VMINI_W = 1291, // LoongArchLSXInstrInfo.td:653 |
| 1307 | VMINI_WU = 1292, // LoongArchLSXInstrInfo.td:661 |
| 1308 | VMIN_B = 1293, // LoongArchLSXInstrInfo.td:647 |
| 1309 | VMIN_BU = 1294, // LoongArchLSXInstrInfo.td:655 |
| 1310 | VMIN_D = 1295, // LoongArchLSXInstrInfo.td:650 |
| 1311 | VMIN_DU = 1296, // LoongArchLSXInstrInfo.td:658 |
| 1312 | VMIN_H = 1297, // LoongArchLSXInstrInfo.td:648 |
| 1313 | VMIN_HU = 1298, // LoongArchLSXInstrInfo.td:656 |
| 1314 | VMIN_W = 1299, // LoongArchLSXInstrInfo.td:649 |
| 1315 | VMIN_WU = 1300, // LoongArchLSXInstrInfo.td:657 |
| 1316 | VMOD_B = 1301, // LoongArchLSXInstrInfo.td:747 |
| 1317 | VMOD_BU = 1302, // LoongArchLSXInstrInfo.td:751 |
| 1318 | VMOD_D = 1303, // LoongArchLSXInstrInfo.td:750 |
| 1319 | VMOD_DU = 1304, // LoongArchLSXInstrInfo.td:754 |
| 1320 | VMOD_H = 1305, // LoongArchLSXInstrInfo.td:748 |
| 1321 | VMOD_HU = 1306, // LoongArchLSXInstrInfo.td:752 |
| 1322 | VMOD_W = 1307, // LoongArchLSXInstrInfo.td:749 |
| 1323 | VMOD_WU = 1308, // LoongArchLSXInstrInfo.td:753 |
| 1324 | VMSKGEZ_B = 1309, // LoongArchLSXInstrInfo.td:784 |
| 1325 | VMSKLTZ_B = 1310, // LoongArchLSXInstrInfo.td:779 |
| 1326 | VMSKLTZ_D = 1311, // LoongArchLSXInstrInfo.td:782 |
| 1327 | VMSKLTZ_H = 1312, // LoongArchLSXInstrInfo.td:780 |
| 1328 | VMSKLTZ_W = 1313, // LoongArchLSXInstrInfo.td:781 |
| 1329 | VMSKNZ_B = 1314, // LoongArchLSXInstrInfo.td:786 |
| 1330 | VMSUB_B = 1315, // LoongArchLSXInstrInfo.td:708 |
| 1331 | VMSUB_D = 1316, // LoongArchLSXInstrInfo.td:711 |
| 1332 | VMSUB_H = 1317, // LoongArchLSXInstrInfo.td:709 |
| 1333 | VMSUB_W = 1318, // LoongArchLSXInstrInfo.td:710 |
| 1334 | VMUH_B = 1319, // LoongArchLSXInstrInfo.td:669 |
| 1335 | VMUH_BU = 1320, // LoongArchLSXInstrInfo.td:673 |
| 1336 | VMUH_D = 1321, // LoongArchLSXInstrInfo.td:672 |
| 1337 | VMUH_DU = 1322, // LoongArchLSXInstrInfo.td:676 |
| 1338 | VMUH_H = 1323, // LoongArchLSXInstrInfo.td:670 |
| 1339 | VMUH_HU = 1324, // LoongArchLSXInstrInfo.td:674 |
| 1340 | VMUH_W = 1325, // LoongArchLSXInstrInfo.td:671 |
| 1341 | VMUH_WU = 1326, // LoongArchLSXInstrInfo.td:675 |
| 1342 | VMULWEV_D_W = 1327, // LoongArchLSXInstrInfo.td:680 |
| 1343 | VMULWEV_D_WU = 1328, // LoongArchLSXInstrInfo.td:688 |
| 1344 | VMULWEV_D_WU_W = 1329, // LoongArchLSXInstrInfo.td:696 |
| 1345 | VMULWEV_H_B = 1330, // LoongArchLSXInstrInfo.td:678 |
| 1346 | VMULWEV_H_BU = 1331, // LoongArchLSXInstrInfo.td:686 |
| 1347 | VMULWEV_H_BU_B = 1332, // LoongArchLSXInstrInfo.td:694 |
| 1348 | VMULWEV_Q_D = 1333, // LoongArchLSXInstrInfo.td:681 |
| 1349 | VMULWEV_Q_DU = 1334, // LoongArchLSXInstrInfo.td:689 |
| 1350 | VMULWEV_Q_DU_D = 1335, // LoongArchLSXInstrInfo.td:697 |
| 1351 | VMULWEV_W_H = 1336, // LoongArchLSXInstrInfo.td:679 |
| 1352 | VMULWEV_W_HU = 1337, // LoongArchLSXInstrInfo.td:687 |
| 1353 | VMULWEV_W_HU_H = 1338, // LoongArchLSXInstrInfo.td:695 |
| 1354 | VMULWOD_D_W = 1339, // LoongArchLSXInstrInfo.td:684 |
| 1355 | VMULWOD_D_WU = 1340, // LoongArchLSXInstrInfo.td:692 |
| 1356 | VMULWOD_D_WU_W = 1341, // LoongArchLSXInstrInfo.td:700 |
| 1357 | VMULWOD_H_B = 1342, // LoongArchLSXInstrInfo.td:682 |
| 1358 | VMULWOD_H_BU = 1343, // LoongArchLSXInstrInfo.td:690 |
| 1359 | VMULWOD_H_BU_B = 1344, // LoongArchLSXInstrInfo.td:698 |
| 1360 | VMULWOD_Q_D = 1345, // LoongArchLSXInstrInfo.td:685 |
| 1361 | VMULWOD_Q_DU = 1346, // LoongArchLSXInstrInfo.td:693 |
| 1362 | VMULWOD_Q_DU_D = 1347, // LoongArchLSXInstrInfo.td:701 |
| 1363 | VMULWOD_W_H = 1348, // LoongArchLSXInstrInfo.td:683 |
| 1364 | VMULWOD_W_HU = 1349, // LoongArchLSXInstrInfo.td:691 |
| 1365 | VMULWOD_W_HU_H = 1350, // LoongArchLSXInstrInfo.td:699 |
| 1366 | VMUL_B = 1351, // LoongArchLSXInstrInfo.td:664 |
| 1367 | VMUL_D = 1352, // LoongArchLSXInstrInfo.td:667 |
| 1368 | VMUL_H = 1353, // LoongArchLSXInstrInfo.td:665 |
| 1369 | VMUL_W = 1354, // LoongArchLSXInstrInfo.td:666 |
| 1370 | VNEG_B = 1355, // LoongArchLSXInstrInfo.td:513 |
| 1371 | VNEG_D = 1356, // LoongArchLSXInstrInfo.td:516 |
| 1372 | VNEG_H = 1357, // LoongArchLSXInstrInfo.td:514 |
| 1373 | VNEG_W = 1358, // LoongArchLSXInstrInfo.td:515 |
| 1374 | VNORI_B = 1359, // LoongArchLSXInstrInfo.td:802 |
| 1375 | VNOR_V = 1360, // LoongArchLSXInstrInfo.td:795 |
| 1376 | VORI_B = 1361, // LoongArchLSXInstrInfo.td:800 |
| 1377 | VORN_V = 1362, // LoongArchLSXInstrInfo.td:797 |
| 1378 | VOR_V = 1363, // LoongArchLSXInstrInfo.td:793 |
| 1379 | VPACKEV_B = 1364, // LoongArchLSXInstrInfo.td:1246 |
| 1380 | VPACKEV_D = 1365, // LoongArchLSXInstrInfo.td:1249 |
| 1381 | VPACKEV_H = 1366, // LoongArchLSXInstrInfo.td:1247 |
| 1382 | VPACKEV_W = 1367, // LoongArchLSXInstrInfo.td:1248 |
| 1383 | VPACKOD_B = 1368, // LoongArchLSXInstrInfo.td:1250 |
| 1384 | VPACKOD_D = 1369, // LoongArchLSXInstrInfo.td:1253 |
| 1385 | VPACKOD_H = 1370, // LoongArchLSXInstrInfo.td:1251 |
| 1386 | VPACKOD_W = 1371, // LoongArchLSXInstrInfo.td:1252 |
| 1387 | VPCNT_B = 1372, // LoongArchLSXInstrInfo.td:968 |
| 1388 | VPCNT_D = 1373, // LoongArchLSXInstrInfo.td:971 |
| 1389 | VPCNT_H = 1374, // LoongArchLSXInstrInfo.td:969 |
| 1390 | VPCNT_W = 1375, // LoongArchLSXInstrInfo.td:970 |
| 1391 | VPERMI_W = 1376, // LoongArchLSXInstrInfo.td:1284 |
| 1392 | VPICKEV_B = 1377, // LoongArchLSXInstrInfo.td:1255 |
| 1393 | VPICKEV_D = 1378, // LoongArchLSXInstrInfo.td:1258 |
| 1394 | VPICKEV_H = 1379, // LoongArchLSXInstrInfo.td:1256 |
| 1395 | VPICKEV_W = 1380, // LoongArchLSXInstrInfo.td:1257 |
| 1396 | VPICKOD_B = 1381, // LoongArchLSXInstrInfo.td:1259 |
| 1397 | VPICKOD_D = 1382, // LoongArchLSXInstrInfo.td:1262 |
| 1398 | VPICKOD_H = 1383, // LoongArchLSXInstrInfo.td:1260 |
| 1399 | VPICKOD_W = 1384, // LoongArchLSXInstrInfo.td:1261 |
| 1400 | VPICKVE2GR_B = 1385, // LoongArchLSXInstrInfo.td:1218 |
| 1401 | VPICKVE2GR_BU = 1386, // LoongArchLSXInstrInfo.td:1222 |
| 1402 | VPICKVE2GR_D = 1387, // LoongArchLSXInstrInfo.td:1221 |
| 1403 | VPICKVE2GR_DU = 1388, // LoongArchLSXInstrInfo.td:1225 |
| 1404 | VPICKVE2GR_H = 1389, // LoongArchLSXInstrInfo.td:1219 |
| 1405 | VPICKVE2GR_HU = 1390, // LoongArchLSXInstrInfo.td:1223 |
| 1406 | VPICKVE2GR_W = 1391, // LoongArchLSXInstrInfo.td:1220 |
| 1407 | VPICKVE2GR_WU = 1392, // LoongArchLSXInstrInfo.td:1224 |
| 1408 | VREPLGR2VR_B = 1393, // LoongArchLSXInstrInfo.td:1228 |
| 1409 | VREPLGR2VR_D = 1394, // LoongArchLSXInstrInfo.td:1231 |
| 1410 | VREPLGR2VR_H = 1395, // LoongArchLSXInstrInfo.td:1229 |
| 1411 | VREPLGR2VR_W = 1396, // LoongArchLSXInstrInfo.td:1230 |
| 1412 | VREPLVEI_B = 1397, // LoongArchLSXInstrInfo.td:1238 |
| 1413 | VREPLVEI_D = 1398, // LoongArchLSXInstrInfo.td:1241 |
| 1414 | VREPLVEI_H = 1399, // LoongArchLSXInstrInfo.td:1239 |
| 1415 | VREPLVEI_W = 1400, // LoongArchLSXInstrInfo.td:1240 |
| 1416 | VREPLVE_B = 1401, // LoongArchLSXInstrInfo.td:1234 |
| 1417 | VREPLVE_D = 1402, // LoongArchLSXInstrInfo.td:1237 |
| 1418 | VREPLVE_H = 1403, // LoongArchLSXInstrInfo.td:1235 |
| 1419 | VREPLVE_W = 1404, // LoongArchLSXInstrInfo.td:1236 |
| 1420 | VROTRI_B = 1405, // LoongArchLSXInstrInfo.td:835 |
| 1421 | VROTRI_D = 1406, // LoongArchLSXInstrInfo.td:838 |
| 1422 | VROTRI_H = 1407, // LoongArchLSXInstrInfo.td:836 |
| 1423 | VROTRI_W = 1408, // LoongArchLSXInstrInfo.td:837 |
| 1424 | VROTR_B = 1409, // LoongArchLSXInstrInfo.td:831 |
| 1425 | VROTR_D = 1410, // LoongArchLSXInstrInfo.td:834 |
| 1426 | VROTR_H = 1411, // LoongArchLSXInstrInfo.td:832 |
| 1427 | VROTR_W = 1412, // LoongArchLSXInstrInfo.td:833 |
| 1428 | VSADD_B = 1413, // LoongArchLSXInstrInfo.td:518 |
| 1429 | VSADD_BU = 1414, // LoongArchLSXInstrInfo.td:522 |
| 1430 | VSADD_D = 1415, // LoongArchLSXInstrInfo.td:521 |
| 1431 | VSADD_DU = 1416, // LoongArchLSXInstrInfo.td:525 |
| 1432 | VSADD_H = 1417, // LoongArchLSXInstrInfo.td:519 |
| 1433 | VSADD_HU = 1418, // LoongArchLSXInstrInfo.td:523 |
| 1434 | VSADD_W = 1419, // LoongArchLSXInstrInfo.td:520 |
| 1435 | VSADD_WU = 1420, // LoongArchLSXInstrInfo.td:524 |
| 1436 | VSAT_B = 1421, // LoongArchLSXInstrInfo.td:756 |
| 1437 | VSAT_BU = 1422, // LoongArchLSXInstrInfo.td:760 |
| 1438 | VSAT_D = 1423, // LoongArchLSXInstrInfo.td:759 |
| 1439 | VSAT_DU = 1424, // LoongArchLSXInstrInfo.td:763 |
| 1440 | VSAT_H = 1425, // LoongArchLSXInstrInfo.td:757 |
| 1441 | VSAT_HU = 1426, // LoongArchLSXInstrInfo.td:761 |
| 1442 | VSAT_W = 1427, // LoongArchLSXInstrInfo.td:758 |
| 1443 | VSAT_WU = 1428, // LoongArchLSXInstrInfo.td:762 |
| 1444 | VSEQI_B = 1429, // LoongArchLSXInstrInfo.td:1112 |
| 1445 | VSEQI_D = 1430, // LoongArchLSXInstrInfo.td:1115 |
| 1446 | VSEQI_H = 1431, // LoongArchLSXInstrInfo.td:1113 |
| 1447 | VSEQI_W = 1432, // LoongArchLSXInstrInfo.td:1114 |
| 1448 | VSEQ_B = 1433, // LoongArchLSXInstrInfo.td:1108 |
| 1449 | VSEQ_D = 1434, // LoongArchLSXInstrInfo.td:1111 |
| 1450 | VSEQ_H = 1435, // LoongArchLSXInstrInfo.td:1109 |
| 1451 | VSEQ_W = 1436, // LoongArchLSXInstrInfo.td:1110 |
| 1452 | VSETALLNEZ_B = 1437, // LoongArchLSXInstrInfo.td:1209 |
| 1453 | VSETALLNEZ_D = 1438, // LoongArchLSXInstrInfo.td:1212 |
| 1454 | VSETALLNEZ_H = 1439, // LoongArchLSXInstrInfo.td:1210 |
| 1455 | VSETALLNEZ_W = 1440, // LoongArchLSXInstrInfo.td:1211 |
| 1456 | VSETANYEQZ_B = 1441, // LoongArchLSXInstrInfo.td:1205 |
| 1457 | VSETANYEQZ_D = 1442, // LoongArchLSXInstrInfo.td:1208 |
| 1458 | VSETANYEQZ_H = 1443, // LoongArchLSXInstrInfo.td:1206 |
| 1459 | VSETANYEQZ_W = 1444, // LoongArchLSXInstrInfo.td:1207 |
| 1460 | VSETEQZ_V = 1445, // LoongArchLSXInstrInfo.td:1203 |
| 1461 | VSETNEZ_V = 1446, // LoongArchLSXInstrInfo.td:1204 |
| 1462 | VSHUF4I_B = 1447, // LoongArchLSXInstrInfo.td:1279 |
| 1463 | VSHUF4I_D = 1448, // LoongArchLSXInstrInfo.td:1282 |
| 1464 | VSHUF4I_H = 1449, // LoongArchLSXInstrInfo.td:1280 |
| 1465 | VSHUF4I_W = 1450, // LoongArchLSXInstrInfo.td:1281 |
| 1466 | VSHUF_B = 1451, // LoongArchLSXInstrInfo.td:1273 |
| 1467 | VSHUF_D = 1452, // LoongArchLSXInstrInfo.td:1277 |
| 1468 | VSHUF_H = 1453, // LoongArchLSXInstrInfo.td:1275 |
| 1469 | VSHUF_W = 1454, // LoongArchLSXInstrInfo.td:1276 |
| 1470 | VSIGNCOV_B = 1455, // LoongArchLSXInstrInfo.td:774 |
| 1471 | VSIGNCOV_D = 1456, // LoongArchLSXInstrInfo.td:777 |
| 1472 | VSIGNCOV_H = 1457, // LoongArchLSXInstrInfo.td:775 |
| 1473 | VSIGNCOV_W = 1458, // LoongArchLSXInstrInfo.td:776 |
| 1474 | VSLEI_B = 1459, // LoongArchLSXInstrInfo.td:1121 |
| 1475 | VSLEI_BU = 1460, // LoongArchLSXInstrInfo.td:1130 |
| 1476 | VSLEI_D = 1461, // LoongArchLSXInstrInfo.td:1124 |
| 1477 | VSLEI_DU = 1462, // LoongArchLSXInstrInfo.td:1133 |
| 1478 | VSLEI_H = 1463, // LoongArchLSXInstrInfo.td:1122 |
| 1479 | VSLEI_HU = 1464, // LoongArchLSXInstrInfo.td:1131 |
| 1480 | VSLEI_W = 1465, // LoongArchLSXInstrInfo.td:1123 |
| 1481 | VSLEI_WU = 1466, // LoongArchLSXInstrInfo.td:1132 |
| 1482 | VSLE_B = 1467, // LoongArchLSXInstrInfo.td:1117 |
| 1483 | VSLE_BU = 1468, // LoongArchLSXInstrInfo.td:1126 |
| 1484 | VSLE_D = 1469, // LoongArchLSXInstrInfo.td:1120 |
| 1485 | VSLE_DU = 1470, // LoongArchLSXInstrInfo.td:1129 |
| 1486 | VSLE_H = 1471, // LoongArchLSXInstrInfo.td:1118 |
| 1487 | VSLE_HU = 1472, // LoongArchLSXInstrInfo.td:1127 |
| 1488 | VSLE_W = 1473, // LoongArchLSXInstrInfo.td:1119 |
| 1489 | VSLE_WU = 1474, // LoongArchLSXInstrInfo.td:1128 |
| 1490 | VSLLI_B = 1475, // LoongArchLSXInstrInfo.td:808 |
| 1491 | VSLLI_D = 1476, // LoongArchLSXInstrInfo.td:811 |
| 1492 | VSLLI_H = 1477, // LoongArchLSXInstrInfo.td:809 |
| 1493 | VSLLI_W = 1478, // LoongArchLSXInstrInfo.td:810 |
| 1494 | VSLLWIL_DU_WU = 1479, // LoongArchLSXInstrInfo.td:846 |
| 1495 | VSLLWIL_D_W = 1480, // LoongArchLSXInstrInfo.td:842 |
| 1496 | VSLLWIL_HU_BU = 1481, // LoongArchLSXInstrInfo.td:844 |
| 1497 | VSLLWIL_H_B = 1482, // LoongArchLSXInstrInfo.td:840 |
| 1498 | VSLLWIL_WU_HU = 1483, // LoongArchLSXInstrInfo.td:845 |
| 1499 | VSLLWIL_W_H = 1484, // LoongArchLSXInstrInfo.td:841 |
| 1500 | VSLL_B = 1485, // LoongArchLSXInstrInfo.td:804 |
| 1501 | VSLL_D = 1486, // LoongArchLSXInstrInfo.td:807 |
| 1502 | VSLL_H = 1487, // LoongArchLSXInstrInfo.td:805 |
| 1503 | VSLL_W = 1488, // LoongArchLSXInstrInfo.td:806 |
| 1504 | VSLTI_B = 1489, // LoongArchLSXInstrInfo.td:1139 |
| 1505 | VSLTI_BU = 1490, // LoongArchLSXInstrInfo.td:1148 |
| 1506 | VSLTI_D = 1491, // LoongArchLSXInstrInfo.td:1142 |
| 1507 | VSLTI_DU = 1492, // LoongArchLSXInstrInfo.td:1151 |
| 1508 | VSLTI_H = 1493, // LoongArchLSXInstrInfo.td:1140 |
| 1509 | VSLTI_HU = 1494, // LoongArchLSXInstrInfo.td:1149 |
| 1510 | VSLTI_W = 1495, // LoongArchLSXInstrInfo.td:1141 |
| 1511 | VSLTI_WU = 1496, // LoongArchLSXInstrInfo.td:1150 |
| 1512 | VSLT_B = 1497, // LoongArchLSXInstrInfo.td:1135 |
| 1513 | VSLT_BU = 1498, // LoongArchLSXInstrInfo.td:1144 |
| 1514 | VSLT_D = 1499, // LoongArchLSXInstrInfo.td:1138 |
| 1515 | VSLT_DU = 1500, // LoongArchLSXInstrInfo.td:1147 |
| 1516 | VSLT_H = 1501, // LoongArchLSXInstrInfo.td:1136 |
| 1517 | VSLT_HU = 1502, // LoongArchLSXInstrInfo.td:1145 |
| 1518 | VSLT_W = 1503, // LoongArchLSXInstrInfo.td:1137 |
| 1519 | VSLT_WU = 1504, // LoongArchLSXInstrInfo.td:1146 |
| 1520 | VSRAI_B = 1505, // LoongArchLSXInstrInfo.td:826 |
| 1521 | VSRAI_D = 1506, // LoongArchLSXInstrInfo.td:829 |
| 1522 | VSRAI_H = 1507, // LoongArchLSXInstrInfo.td:827 |
| 1523 | VSRAI_W = 1508, // LoongArchLSXInstrInfo.td:828 |
| 1524 | VSRANI_B_H = 1509, // LoongArchLSXInstrInfo.td:878 |
| 1525 | VSRANI_D_Q = 1510, // LoongArchLSXInstrInfo.td:881 |
| 1526 | VSRANI_H_W = 1511, // LoongArchLSXInstrInfo.td:879 |
| 1527 | VSRANI_W_D = 1512, // LoongArchLSXInstrInfo.td:880 |
| 1528 | VSRAN_B_H = 1513, // LoongArchLSXInstrInfo.td:870 |
| 1529 | VSRAN_H_W = 1514, // LoongArchLSXInstrInfo.td:871 |
| 1530 | VSRAN_W_D = 1515, // LoongArchLSXInstrInfo.td:872 |
| 1531 | VSRARI_B = 1516, // LoongArchLSXInstrInfo.td:862 |
| 1532 | VSRARI_D = 1517, // LoongArchLSXInstrInfo.td:865 |
| 1533 | VSRARI_H = 1518, // LoongArchLSXInstrInfo.td:863 |
| 1534 | VSRARI_W = 1519, // LoongArchLSXInstrInfo.td:864 |
| 1535 | VSRARNI_B_H = 1520, // LoongArchLSXInstrInfo.td:894 |
| 1536 | VSRARNI_D_Q = 1521, // LoongArchLSXInstrInfo.td:897 |
| 1537 | VSRARNI_H_W = 1522, // LoongArchLSXInstrInfo.td:895 |
| 1538 | VSRARNI_W_D = 1523, // LoongArchLSXInstrInfo.td:896 |
| 1539 | VSRARN_B_H = 1524, // LoongArchLSXInstrInfo.td:886 |
| 1540 | VSRARN_H_W = 1525, // LoongArchLSXInstrInfo.td:887 |
| 1541 | VSRARN_W_D = 1526, // LoongArchLSXInstrInfo.td:888 |
| 1542 | VSRAR_B = 1527, // LoongArchLSXInstrInfo.td:858 |
| 1543 | VSRAR_D = 1528, // LoongArchLSXInstrInfo.td:861 |
| 1544 | VSRAR_H = 1529, // LoongArchLSXInstrInfo.td:859 |
| 1545 | VSRAR_W = 1530, // LoongArchLSXInstrInfo.td:860 |
| 1546 | VSRA_B = 1531, // LoongArchLSXInstrInfo.td:822 |
| 1547 | VSRA_D = 1532, // LoongArchLSXInstrInfo.td:825 |
| 1548 | VSRA_H = 1533, // LoongArchLSXInstrInfo.td:823 |
| 1549 | VSRA_W = 1534, // LoongArchLSXInstrInfo.td:824 |
| 1550 | VSRLI_B = 1535, // LoongArchLSXInstrInfo.td:817 |
| 1551 | VSRLI_D = 1536, // LoongArchLSXInstrInfo.td:820 |
| 1552 | VSRLI_H = 1537, // LoongArchLSXInstrInfo.td:818 |
| 1553 | VSRLI_W = 1538, // LoongArchLSXInstrInfo.td:819 |
| 1554 | VSRLNI_B_H = 1539, // LoongArchLSXInstrInfo.td:874 |
| 1555 | VSRLNI_D_Q = 1540, // LoongArchLSXInstrInfo.td:877 |
| 1556 | VSRLNI_H_W = 1541, // LoongArchLSXInstrInfo.td:875 |
| 1557 | VSRLNI_W_D = 1542, // LoongArchLSXInstrInfo.td:876 |
| 1558 | VSRLN_B_H = 1543, // LoongArchLSXInstrInfo.td:867 |
| 1559 | VSRLN_H_W = 1544, // LoongArchLSXInstrInfo.td:868 |
| 1560 | VSRLN_W_D = 1545, // LoongArchLSXInstrInfo.td:869 |
| 1561 | VSRLRI_B = 1546, // LoongArchLSXInstrInfo.td:853 |
| 1562 | VSRLRI_D = 1547, // LoongArchLSXInstrInfo.td:856 |
| 1563 | VSRLRI_H = 1548, // LoongArchLSXInstrInfo.td:854 |
| 1564 | VSRLRI_W = 1549, // LoongArchLSXInstrInfo.td:855 |
| 1565 | VSRLRNI_B_H = 1550, // LoongArchLSXInstrInfo.td:890 |
| 1566 | VSRLRNI_D_Q = 1551, // LoongArchLSXInstrInfo.td:893 |
| 1567 | VSRLRNI_H_W = 1552, // LoongArchLSXInstrInfo.td:891 |
| 1568 | VSRLRNI_W_D = 1553, // LoongArchLSXInstrInfo.td:892 |
| 1569 | VSRLRN_B_H = 1554, // LoongArchLSXInstrInfo.td:883 |
| 1570 | VSRLRN_H_W = 1555, // LoongArchLSXInstrInfo.td:884 |
| 1571 | VSRLRN_W_D = 1556, // LoongArchLSXInstrInfo.td:885 |
| 1572 | VSRLR_B = 1557, // LoongArchLSXInstrInfo.td:849 |
| 1573 | VSRLR_D = 1558, // LoongArchLSXInstrInfo.td:852 |
| 1574 | VSRLR_H = 1559, // LoongArchLSXInstrInfo.td:850 |
| 1575 | VSRLR_W = 1560, // LoongArchLSXInstrInfo.td:851 |
| 1576 | VSRL_B = 1561, // LoongArchLSXInstrInfo.td:813 |
| 1577 | VSRL_D = 1562, // LoongArchLSXInstrInfo.td:816 |
| 1578 | VSRL_H = 1563, // LoongArchLSXInstrInfo.td:814 |
| 1579 | VSRL_W = 1564, // LoongArchLSXInstrInfo.td:815 |
| 1580 | VSSRANI_BU_H = 1565, // LoongArchLSXInstrInfo.td:924 |
| 1581 | VSSRANI_B_H = 1566, // LoongArchLSXInstrInfo.td:916 |
| 1582 | VSSRANI_DU_Q = 1567, // LoongArchLSXInstrInfo.td:927 |
| 1583 | VSSRANI_D_Q = 1568, // LoongArchLSXInstrInfo.td:919 |
| 1584 | VSSRANI_HU_W = 1569, // LoongArchLSXInstrInfo.td:925 |
| 1585 | VSSRANI_H_W = 1570, // LoongArchLSXInstrInfo.td:917 |
| 1586 | VSSRANI_WU_D = 1571, // LoongArchLSXInstrInfo.td:926 |
| 1587 | VSSRANI_W_D = 1572, // LoongArchLSXInstrInfo.td:918 |
| 1588 | VSSRAN_BU_H = 1573, // LoongArchLSXInstrInfo.td:908 |
| 1589 | VSSRAN_B_H = 1574, // LoongArchLSXInstrInfo.td:902 |
| 1590 | VSSRAN_HU_W = 1575, // LoongArchLSXInstrInfo.td:909 |
| 1591 | VSSRAN_H_W = 1576, // LoongArchLSXInstrInfo.td:903 |
| 1592 | VSSRAN_WU_D = 1577, // LoongArchLSXInstrInfo.td:910 |
| 1593 | VSSRAN_W_D = 1578, // LoongArchLSXInstrInfo.td:904 |
| 1594 | VSSRARNI_BU_H = 1579, // LoongArchLSXInstrInfo.td:954 |
| 1595 | VSSRARNI_B_H = 1580, // LoongArchLSXInstrInfo.td:946 |
| 1596 | VSSRARNI_DU_Q = 1581, // LoongArchLSXInstrInfo.td:957 |
| 1597 | VSSRARNI_D_Q = 1582, // LoongArchLSXInstrInfo.td:949 |
| 1598 | VSSRARNI_HU_W = 1583, // LoongArchLSXInstrInfo.td:955 |
| 1599 | VSSRARNI_H_W = 1584, // LoongArchLSXInstrInfo.td:947 |
| 1600 | VSSRARNI_WU_D = 1585, // LoongArchLSXInstrInfo.td:956 |
| 1601 | VSSRARNI_W_D = 1586, // LoongArchLSXInstrInfo.td:948 |
| 1602 | VSSRARN_BU_H = 1587, // LoongArchLSXInstrInfo.td:938 |
| 1603 | VSSRARN_B_H = 1588, // LoongArchLSXInstrInfo.td:932 |
| 1604 | VSSRARN_HU_W = 1589, // LoongArchLSXInstrInfo.td:939 |
| 1605 | VSSRARN_H_W = 1590, // LoongArchLSXInstrInfo.td:933 |
| 1606 | VSSRARN_WU_D = 1591, // LoongArchLSXInstrInfo.td:940 |
| 1607 | VSSRARN_W_D = 1592, // LoongArchLSXInstrInfo.td:934 |
| 1608 | VSSRLNI_BU_H = 1593, // LoongArchLSXInstrInfo.td:920 |
| 1609 | VSSRLNI_B_H = 1594, // LoongArchLSXInstrInfo.td:912 |
| 1610 | VSSRLNI_DU_Q = 1595, // LoongArchLSXInstrInfo.td:923 |
| 1611 | VSSRLNI_D_Q = 1596, // LoongArchLSXInstrInfo.td:915 |
| 1612 | VSSRLNI_HU_W = 1597, // LoongArchLSXInstrInfo.td:921 |
| 1613 | VSSRLNI_H_W = 1598, // LoongArchLSXInstrInfo.td:913 |
| 1614 | VSSRLNI_WU_D = 1599, // LoongArchLSXInstrInfo.td:922 |
| 1615 | VSSRLNI_W_D = 1600, // LoongArchLSXInstrInfo.td:914 |
| 1616 | VSSRLN_BU_H = 1601, // LoongArchLSXInstrInfo.td:905 |
| 1617 | VSSRLN_B_H = 1602, // LoongArchLSXInstrInfo.td:899 |
| 1618 | VSSRLN_HU_W = 1603, // LoongArchLSXInstrInfo.td:906 |
| 1619 | VSSRLN_H_W = 1604, // LoongArchLSXInstrInfo.td:900 |
| 1620 | VSSRLN_WU_D = 1605, // LoongArchLSXInstrInfo.td:907 |
| 1621 | VSSRLN_W_D = 1606, // LoongArchLSXInstrInfo.td:901 |
| 1622 | VSSRLRNI_BU_H = 1607, // LoongArchLSXInstrInfo.td:950 |
| 1623 | VSSRLRNI_B_H = 1608, // LoongArchLSXInstrInfo.td:942 |
| 1624 | VSSRLRNI_DU_Q = 1609, // LoongArchLSXInstrInfo.td:953 |
| 1625 | VSSRLRNI_D_Q = 1610, // LoongArchLSXInstrInfo.td:945 |
| 1626 | VSSRLRNI_HU_W = 1611, // LoongArchLSXInstrInfo.td:951 |
| 1627 | VSSRLRNI_H_W = 1612, // LoongArchLSXInstrInfo.td:943 |
| 1628 | VSSRLRNI_WU_D = 1613, // LoongArchLSXInstrInfo.td:952 |
| 1629 | VSSRLRNI_W_D = 1614, // LoongArchLSXInstrInfo.td:944 |
| 1630 | VSSRLRN_BU_H = 1615, // LoongArchLSXInstrInfo.td:935 |
| 1631 | VSSRLRN_B_H = 1616, // LoongArchLSXInstrInfo.td:929 |
| 1632 | VSSRLRN_HU_W = 1617, // LoongArchLSXInstrInfo.td:936 |
| 1633 | VSSRLRN_H_W = 1618, // LoongArchLSXInstrInfo.td:930 |
| 1634 | VSSRLRN_WU_D = 1619, // LoongArchLSXInstrInfo.td:937 |
| 1635 | VSSRLRN_W_D = 1620, // LoongArchLSXInstrInfo.td:931 |
| 1636 | VSSUB_B = 1621, // LoongArchLSXInstrInfo.td:527 |
| 1637 | VSSUB_BU = 1622, // LoongArchLSXInstrInfo.td:531 |
| 1638 | VSSUB_D = 1623, // LoongArchLSXInstrInfo.td:530 |
| 1639 | VSSUB_DU = 1624, // LoongArchLSXInstrInfo.td:534 |
| 1640 | VSSUB_H = 1625, // LoongArchLSXInstrInfo.td:528 |
| 1641 | VSSUB_HU = 1626, // LoongArchLSXInstrInfo.td:532 |
| 1642 | VSSUB_W = 1627, // LoongArchLSXInstrInfo.td:529 |
| 1643 | VSSUB_WU = 1628, // LoongArchLSXInstrInfo.td:533 |
| 1644 | VST = 1629, // LoongArchLSXInstrInfo.td:1303 |
| 1645 | VSTELM_B = 1630, // LoongArchLSXInstrInfo.td:1306 |
| 1646 | VSTELM_D = 1631, // LoongArchLSXInstrInfo.td:1309 |
| 1647 | VSTELM_H = 1632, // LoongArchLSXInstrInfo.td:1307 |
| 1648 | VSTELM_W = 1633, // LoongArchLSXInstrInfo.td:1308 |
| 1649 | VSTX = 1634, // LoongArchLSXInstrInfo.td:1304 |
| 1650 | VSUBI_BU = 1635, // LoongArchLSXInstrInfo.td:508 |
| 1651 | VSUBI_DU = 1636, // LoongArchLSXInstrInfo.td:511 |
| 1652 | VSUBI_HU = 1637, // LoongArchLSXInstrInfo.td:509 |
| 1653 | VSUBI_WU = 1638, // LoongArchLSXInstrInfo.td:510 |
| 1654 | VSUBWEV_D_W = 1639, // LoongArchLSXInstrInfo.td:565 |
| 1655 | VSUBWEV_D_WU = 1640, // LoongArchLSXInstrInfo.td:583 |
| 1656 | VSUBWEV_H_B = 1641, // LoongArchLSXInstrInfo.td:563 |
| 1657 | VSUBWEV_H_BU = 1642, // LoongArchLSXInstrInfo.td:581 |
| 1658 | VSUBWEV_Q_D = 1643, // LoongArchLSXInstrInfo.td:566 |
| 1659 | VSUBWEV_Q_DU = 1644, // LoongArchLSXInstrInfo.td:584 |
| 1660 | VSUBWEV_W_H = 1645, // LoongArchLSXInstrInfo.td:564 |
| 1661 | VSUBWEV_W_HU = 1646, // LoongArchLSXInstrInfo.td:582 |
| 1662 | VSUBWOD_D_W = 1647, // LoongArchLSXInstrInfo.td:569 |
| 1663 | VSUBWOD_D_WU = 1648, // LoongArchLSXInstrInfo.td:587 |
| 1664 | VSUBWOD_H_B = 1649, // LoongArchLSXInstrInfo.td:567 |
| 1665 | VSUBWOD_H_BU = 1650, // LoongArchLSXInstrInfo.td:585 |
| 1666 | VSUBWOD_Q_D = 1651, // LoongArchLSXInstrInfo.td:570 |
| 1667 | VSUBWOD_Q_DU = 1652, // LoongArchLSXInstrInfo.td:588 |
| 1668 | VSUBWOD_W_H = 1653, // LoongArchLSXInstrInfo.td:568 |
| 1669 | VSUBWOD_W_HU = 1654, // LoongArchLSXInstrInfo.td:586 |
| 1670 | VSUB_B = 1655, // LoongArchLSXInstrInfo.td:497 |
| 1671 | VSUB_D = 1656, // LoongArchLSXInstrInfo.td:500 |
| 1672 | VSUB_H = 1657, // LoongArchLSXInstrInfo.td:498 |
| 1673 | VSUB_Q = 1658, // LoongArchLSXInstrInfo.td:501 |
| 1674 | VSUB_W = 1659, // LoongArchLSXInstrInfo.td:499 |
| 1675 | VXORI_B = 1660, // LoongArchLSXInstrInfo.td:801 |
| 1676 | VXOR_V = 1661, // LoongArchLSXInstrInfo.td:794 |
| 1677 | X86ADC_B = 1662, // LoongArchLBTInstrInfo.td:63 |
| 1678 | X86ADC_D = 1663, // LoongArchLBTInstrInfo.td:208 |
| 1679 | X86ADC_H = 1664, // LoongArchLBTInstrInfo.td:64 |
| 1680 | X86ADC_W = 1665, // LoongArchLBTInstrInfo.td:65 |
| 1681 | X86ADD_B = 1666, // LoongArchLBTInstrInfo.td:66 |
| 1682 | X86ADD_D = 1667, // LoongArchLBTInstrInfo.td:209 |
| 1683 | X86ADD_DU = 1668, // LoongArchLBTInstrInfo.td:211 |
| 1684 | X86ADD_H = 1669, // LoongArchLBTInstrInfo.td:67 |
| 1685 | X86ADD_W = 1670, // LoongArchLBTInstrInfo.td:68 |
| 1686 | X86ADD_WU = 1671, // LoongArchLBTInstrInfo.td:210 |
| 1687 | X86AND_B = 1672, // LoongArchLBTInstrInfo.td:85 |
| 1688 | X86AND_D = 1673, // LoongArchLBTInstrInfo.td:218 |
| 1689 | X86AND_H = 1674, // LoongArchLBTInstrInfo.td:86 |
| 1690 | X86AND_W = 1675, // LoongArchLBTInstrInfo.td:87 |
| 1691 | X86CLRTM = 1676, // LoongArchLBTInstrInfo.td:163 |
| 1692 | X86DECTOP = 1677, // LoongArchLBTInstrInfo.td:161 |
| 1693 | X86DEC_B = 1678, // LoongArchLBTInstrInfo.td:81 |
| 1694 | X86DEC_D = 1679, // LoongArchLBTInstrInfo.td:217 |
| 1695 | X86DEC_H = 1680, // LoongArchLBTInstrInfo.td:82 |
| 1696 | X86DEC_W = 1681, // LoongArchLBTInstrInfo.td:83 |
| 1697 | X86INCTOP = 1682, // LoongArchLBTInstrInfo.td:160 |
| 1698 | X86INC_B = 1683, // LoongArchLBTInstrInfo.td:70 |
| 1699 | X86INC_D = 1684, // LoongArchLBTInstrInfo.td:212 |
| 1700 | X86INC_H = 1685, // LoongArchLBTInstrInfo.td:71 |
| 1701 | X86INC_W = 1686, // LoongArchLBTInstrInfo.td:72 |
| 1702 | X86MFFLAG = 1687, // LoongArchLBTInstrInfo.td:155 |
| 1703 | X86MFTOP = 1688, // LoongArchLBTInstrInfo.td:157 |
| 1704 | X86MTFLAG = 1689, // LoongArchLBTInstrInfo.td:156 |
| 1705 | X86MTTOP = 1690, // LoongArchLBTInstrInfo.td:158 |
| 1706 | X86MUL_B = 1691, // LoongArchLBTInstrInfo.td:97 |
| 1707 | X86MUL_BU = 1692, // LoongArchLBTInstrInfo.td:100 |
| 1708 | X86MUL_D = 1693, // LoongArchLBTInstrInfo.td:221 |
| 1709 | X86MUL_DU = 1694, // LoongArchLBTInstrInfo.td:223 |
| 1710 | X86MUL_H = 1695, // LoongArchLBTInstrInfo.td:98 |
| 1711 | X86MUL_HU = 1696, // LoongArchLBTInstrInfo.td:101 |
| 1712 | X86MUL_W = 1697, // LoongArchLBTInstrInfo.td:99 |
| 1713 | X86MUL_WU = 1698, // LoongArchLBTInstrInfo.td:222 |
| 1714 | X86OR_B = 1699, // LoongArchLBTInstrInfo.td:89 |
| 1715 | X86OR_D = 1700, // LoongArchLBTInstrInfo.td:219 |
| 1716 | X86OR_H = 1701, // LoongArchLBTInstrInfo.td:90 |
| 1717 | X86OR_W = 1702, // LoongArchLBTInstrInfo.td:91 |
| 1718 | X86RCLI_B = 1703, // LoongArchLBTInstrInfo.td:106 |
| 1719 | X86RCLI_D = 1704, // LoongArchLBTInstrInfo.td:225 |
| 1720 | X86RCLI_H = 1705, // LoongArchLBTInstrInfo.td:107 |
| 1721 | X86RCLI_W = 1706, // LoongArchLBTInstrInfo.td:108 |
| 1722 | X86RCL_B = 1707, // LoongArchLBTInstrInfo.td:103 |
| 1723 | X86RCL_D = 1708, // LoongArchLBTInstrInfo.td:224 |
| 1724 | X86RCL_H = 1709, // LoongArchLBTInstrInfo.td:104 |
| 1725 | X86RCL_W = 1710, // LoongArchLBTInstrInfo.td:105 |
| 1726 | X86RCRI_B = 1711, // LoongArchLBTInstrInfo.td:113 |
| 1727 | X86RCRI_D = 1712, // LoongArchLBTInstrInfo.td:227 |
| 1728 | X86RCRI_H = 1713, // LoongArchLBTInstrInfo.td:114 |
| 1729 | X86RCRI_W = 1714, // LoongArchLBTInstrInfo.td:115 |
| 1730 | X86RCR_B = 1715, // LoongArchLBTInstrInfo.td:110 |
| 1731 | X86RCR_D = 1716, // LoongArchLBTInstrInfo.td:226 |
| 1732 | X86RCR_H = 1717, // LoongArchLBTInstrInfo.td:111 |
| 1733 | X86RCR_W = 1718, // LoongArchLBTInstrInfo.td:112 |
| 1734 | X86ROTLI_B = 1719, // LoongArchLBTInstrInfo.td:120 |
| 1735 | X86ROTLI_D = 1720, // LoongArchLBTInstrInfo.td:229 |
| 1736 | X86ROTLI_H = 1721, // LoongArchLBTInstrInfo.td:121 |
| 1737 | X86ROTLI_W = 1722, // LoongArchLBTInstrInfo.td:122 |
| 1738 | X86ROTL_B = 1723, // LoongArchLBTInstrInfo.td:117 |
| 1739 | X86ROTL_D = 1724, // LoongArchLBTInstrInfo.td:228 |
| 1740 | X86ROTL_H = 1725, // LoongArchLBTInstrInfo.td:118 |
| 1741 | X86ROTL_W = 1726, // LoongArchLBTInstrInfo.td:119 |
| 1742 | X86ROTRI_B = 1727, // LoongArchLBTInstrInfo.td:127 |
| 1743 | X86ROTRI_D = 1728, // LoongArchLBTInstrInfo.td:231 |
| 1744 | X86ROTRI_H = 1729, // LoongArchLBTInstrInfo.td:128 |
| 1745 | X86ROTRI_W = 1730, // LoongArchLBTInstrInfo.td:129 |
| 1746 | X86ROTR_B = 1731, // LoongArchLBTInstrInfo.td:124 |
| 1747 | X86ROTR_D = 1732, // LoongArchLBTInstrInfo.td:230 |
| 1748 | X86ROTR_H = 1733, // LoongArchLBTInstrInfo.td:125 |
| 1749 | X86ROTR_W = 1734, // LoongArchLBTInstrInfo.td:126 |
| 1750 | X86SBC_B = 1735, // LoongArchLBTInstrInfo.td:74 |
| 1751 | X86SBC_D = 1736, // LoongArchLBTInstrInfo.td:213 |
| 1752 | X86SBC_H = 1737, // LoongArchLBTInstrInfo.td:75 |
| 1753 | X86SBC_W = 1738, // LoongArchLBTInstrInfo.td:76 |
| 1754 | X86SETTAG = 1739, // LoongArchLBTInstrInfo.td:164 |
| 1755 | X86SETTM = 1740, // LoongArchLBTInstrInfo.td:162 |
| 1756 | X86SLLI_B = 1741, // LoongArchLBTInstrInfo.td:134 |
| 1757 | X86SLLI_D = 1742, // LoongArchLBTInstrInfo.td:233 |
| 1758 | X86SLLI_H = 1743, // LoongArchLBTInstrInfo.td:135 |
| 1759 | X86SLLI_W = 1744, // LoongArchLBTInstrInfo.td:136 |
| 1760 | X86SLL_B = 1745, // LoongArchLBTInstrInfo.td:131 |
| 1761 | X86SLL_D = 1746, // LoongArchLBTInstrInfo.td:232 |
| 1762 | X86SLL_H = 1747, // LoongArchLBTInstrInfo.td:132 |
| 1763 | X86SLL_W = 1748, // LoongArchLBTInstrInfo.td:133 |
| 1764 | X86SRAI_B = 1749, // LoongArchLBTInstrInfo.td:148 |
| 1765 | X86SRAI_D = 1750, // LoongArchLBTInstrInfo.td:237 |
| 1766 | X86SRAI_H = 1751, // LoongArchLBTInstrInfo.td:149 |
| 1767 | X86SRAI_W = 1752, // LoongArchLBTInstrInfo.td:150 |
| 1768 | X86SRA_B = 1753, // LoongArchLBTInstrInfo.td:145 |
| 1769 | X86SRA_D = 1754, // LoongArchLBTInstrInfo.td:236 |
| 1770 | X86SRA_H = 1755, // LoongArchLBTInstrInfo.td:146 |
| 1771 | X86SRA_W = 1756, // LoongArchLBTInstrInfo.td:147 |
| 1772 | X86SRLI_B = 1757, // LoongArchLBTInstrInfo.td:141 |
| 1773 | X86SRLI_D = 1758, // LoongArchLBTInstrInfo.td:235 |
| 1774 | X86SRLI_H = 1759, // LoongArchLBTInstrInfo.td:142 |
| 1775 | X86SRLI_W = 1760, // LoongArchLBTInstrInfo.td:143 |
| 1776 | X86SRL_B = 1761, // LoongArchLBTInstrInfo.td:138 |
| 1777 | X86SRL_D = 1762, // LoongArchLBTInstrInfo.td:234 |
| 1778 | X86SRL_H = 1763, // LoongArchLBTInstrInfo.td:139 |
| 1779 | X86SRL_W = 1764, // LoongArchLBTInstrInfo.td:140 |
| 1780 | X86SUB_B = 1765, // LoongArchLBTInstrInfo.td:77 |
| 1781 | X86SUB_D = 1766, // LoongArchLBTInstrInfo.td:215 |
| 1782 | X86SUB_DU = 1767, // LoongArchLBTInstrInfo.td:216 |
| 1783 | X86SUB_H = 1768, // LoongArchLBTInstrInfo.td:78 |
| 1784 | X86SUB_W = 1769, // LoongArchLBTInstrInfo.td:79 |
| 1785 | X86SUB_WU = 1770, // LoongArchLBTInstrInfo.td:214 |
| 1786 | X86XOR_B = 1771, // LoongArchLBTInstrInfo.td:93 |
| 1787 | X86XOR_D = 1772, // LoongArchLBTInstrInfo.td:220 |
| 1788 | X86XOR_H = 1773, // LoongArchLBTInstrInfo.td:94 |
| 1789 | X86XOR_W = 1774, // LoongArchLBTInstrInfo.td:95 |
| 1790 | XOR = 1775, // LoongArchInstrInfo.td:872 |
| 1791 | XORI = 1776, // LoongArchInstrInfo.td:877 |
| 1792 | XVABSD_B = 1777, // LoongArchLASXInstrInfo.td:352 |
| 1793 | XVABSD_BU = 1778, // LoongArchLASXInstrInfo.td:356 |
| 1794 | XVABSD_D = 1779, // LoongArchLASXInstrInfo.td:355 |
| 1795 | XVABSD_DU = 1780, // LoongArchLASXInstrInfo.td:359 |
| 1796 | XVABSD_H = 1781, // LoongArchLASXInstrInfo.td:353 |
| 1797 | XVABSD_HU = 1782, // LoongArchLASXInstrInfo.td:357 |
| 1798 | XVABSD_W = 1783, // LoongArchLASXInstrInfo.td:354 |
| 1799 | XVABSD_WU = 1784, // LoongArchLASXInstrInfo.td:358 |
| 1800 | XVADDA_B = 1785, // LoongArchLASXInstrInfo.td:361 |
| 1801 | XVADDA_D = 1786, // LoongArchLASXInstrInfo.td:364 |
| 1802 | XVADDA_H = 1787, // LoongArchLASXInstrInfo.td:362 |
| 1803 | XVADDA_W = 1788, // LoongArchLASXInstrInfo.td:363 |
| 1804 | XVADDI_BU = 1789, // LoongArchLASXInstrInfo.td:239 |
| 1805 | XVADDI_DU = 1790, // LoongArchLASXInstrInfo.td:242 |
| 1806 | XVADDI_HU = 1791, // LoongArchLASXInstrInfo.td:240 |
| 1807 | XVADDI_WU = 1792, // LoongArchLASXInstrInfo.td:241 |
| 1808 | XVADDWEV_D_W = 1793, // LoongArchLASXInstrInfo.td:292 |
| 1809 | XVADDWEV_D_WU = 1794, // LoongArchLASXInstrInfo.td:310 |
| 1810 | XVADDWEV_D_WU_W = 1795, // LoongArchLASXInstrInfo.td:328 |
| 1811 | XVADDWEV_H_B = 1796, // LoongArchLASXInstrInfo.td:290 |
| 1812 | XVADDWEV_H_BU = 1797, // LoongArchLASXInstrInfo.td:308 |
| 1813 | XVADDWEV_H_BU_B = 1798, // LoongArchLASXInstrInfo.td:326 |
| 1814 | XVADDWEV_Q_D = 1799, // LoongArchLASXInstrInfo.td:293 |
| 1815 | XVADDWEV_Q_DU = 1800, // LoongArchLASXInstrInfo.td:311 |
| 1816 | XVADDWEV_Q_DU_D = 1801, // LoongArchLASXInstrInfo.td:329 |
| 1817 | XVADDWEV_W_H = 1802, // LoongArchLASXInstrInfo.td:291 |
| 1818 | XVADDWEV_W_HU = 1803, // LoongArchLASXInstrInfo.td:309 |
| 1819 | XVADDWEV_W_HU_H = 1804, // LoongArchLASXInstrInfo.td:327 |
| 1820 | XVADDWOD_D_W = 1805, // LoongArchLASXInstrInfo.td:296 |
| 1821 | XVADDWOD_D_WU = 1806, // LoongArchLASXInstrInfo.td:314 |
| 1822 | XVADDWOD_D_WU_W = 1807, // LoongArchLASXInstrInfo.td:332 |
| 1823 | XVADDWOD_H_B = 1808, // LoongArchLASXInstrInfo.td:294 |
| 1824 | XVADDWOD_H_BU = 1809, // LoongArchLASXInstrInfo.td:312 |
| 1825 | XVADDWOD_H_BU_B = 1810, // LoongArchLASXInstrInfo.td:330 |
| 1826 | XVADDWOD_Q_D = 1811, // LoongArchLASXInstrInfo.td:297 |
| 1827 | XVADDWOD_Q_DU = 1812, // LoongArchLASXInstrInfo.td:315 |
| 1828 | XVADDWOD_Q_DU_D = 1813, // LoongArchLASXInstrInfo.td:333 |
| 1829 | XVADDWOD_W_H = 1814, // LoongArchLASXInstrInfo.td:295 |
| 1830 | XVADDWOD_W_HU = 1815, // LoongArchLASXInstrInfo.td:313 |
| 1831 | XVADDWOD_W_HU_H = 1816, // LoongArchLASXInstrInfo.td:331 |
| 1832 | XVADD_B = 1817, // LoongArchLASXInstrInfo.td:227 |
| 1833 | XVADD_D = 1818, // LoongArchLASXInstrInfo.td:230 |
| 1834 | XVADD_H = 1819, // LoongArchLASXInstrInfo.td:228 |
| 1835 | XVADD_Q = 1820, // LoongArchLASXInstrInfo.td:231 |
| 1836 | XVADD_W = 1821, // LoongArchLASXInstrInfo.td:229 |
| 1837 | XVANDI_B = 1822, // LoongArchLASXInstrInfo.td:548 |
| 1838 | XVANDN_V = 1823, // LoongArchLASXInstrInfo.td:545 |
| 1839 | XVAND_V = 1824, // LoongArchLASXInstrInfo.td:541 |
| 1840 | XVAVGR_B = 1825, // LoongArchLASXInstrInfo.td:343 |
| 1841 | XVAVGR_BU = 1826, // LoongArchLASXInstrInfo.td:347 |
| 1842 | XVAVGR_D = 1827, // LoongArchLASXInstrInfo.td:346 |
| 1843 | XVAVGR_DU = 1828, // LoongArchLASXInstrInfo.td:350 |
| 1844 | XVAVGR_H = 1829, // LoongArchLASXInstrInfo.td:344 |
| 1845 | XVAVGR_HU = 1830, // LoongArchLASXInstrInfo.td:348 |
| 1846 | XVAVGR_W = 1831, // LoongArchLASXInstrInfo.td:345 |
| 1847 | XVAVGR_WU = 1832, // LoongArchLASXInstrInfo.td:349 |
| 1848 | XVAVG_B = 1833, // LoongArchLASXInstrInfo.td:335 |
| 1849 | XVAVG_BU = 1834, // LoongArchLASXInstrInfo.td:339 |
| 1850 | XVAVG_D = 1835, // LoongArchLASXInstrInfo.td:338 |
| 1851 | XVAVG_DU = 1836, // LoongArchLASXInstrInfo.td:342 |
| 1852 | XVAVG_H = 1837, // LoongArchLASXInstrInfo.td:336 |
| 1853 | XVAVG_HU = 1838, // LoongArchLASXInstrInfo.td:340 |
| 1854 | XVAVG_W = 1839, // LoongArchLASXInstrInfo.td:337 |
| 1855 | XVAVG_WU = 1840, // LoongArchLASXInstrInfo.td:341 |
| 1856 | XVBITCLRI_B = 1841, // LoongArchLASXInstrInfo.td:726 |
| 1857 | XVBITCLRI_D = 1842, // LoongArchLASXInstrInfo.td:729 |
| 1858 | XVBITCLRI_H = 1843, // LoongArchLASXInstrInfo.td:727 |
| 1859 | XVBITCLRI_W = 1844, // LoongArchLASXInstrInfo.td:728 |
| 1860 | XVBITCLR_B = 1845, // LoongArchLASXInstrInfo.td:722 |
| 1861 | XVBITCLR_D = 1846, // LoongArchLASXInstrInfo.td:725 |
| 1862 | XVBITCLR_H = 1847, // LoongArchLASXInstrInfo.td:723 |
| 1863 | XVBITCLR_W = 1848, // LoongArchLASXInstrInfo.td:724 |
| 1864 | XVBITREVI_B = 1849, // LoongArchLASXInstrInfo.td:744 |
| 1865 | XVBITREVI_D = 1850, // LoongArchLASXInstrInfo.td:747 |
| 1866 | XVBITREVI_H = 1851, // LoongArchLASXInstrInfo.td:745 |
| 1867 | XVBITREVI_W = 1852, // LoongArchLASXInstrInfo.td:746 |
| 1868 | XVBITREV_B = 1853, // LoongArchLASXInstrInfo.td:740 |
| 1869 | XVBITREV_D = 1854, // LoongArchLASXInstrInfo.td:743 |
| 1870 | XVBITREV_H = 1855, // LoongArchLASXInstrInfo.td:741 |
| 1871 | XVBITREV_W = 1856, // LoongArchLASXInstrInfo.td:742 |
| 1872 | XVBITSELI_B = 1857, // LoongArchLASXInstrInfo.td:950 |
| 1873 | XVBITSEL_V = 1858, // LoongArchLASXInstrInfo.td:948 |
| 1874 | XVBITSETI_B = 1859, // LoongArchLASXInstrInfo.td:735 |
| 1875 | XVBITSETI_D = 1860, // LoongArchLASXInstrInfo.td:738 |
| 1876 | XVBITSETI_H = 1861, // LoongArchLASXInstrInfo.td:736 |
| 1877 | XVBITSETI_W = 1862, // LoongArchLASXInstrInfo.td:737 |
| 1878 | XVBITSET_B = 1863, // LoongArchLASXInstrInfo.td:731 |
| 1879 | XVBITSET_D = 1864, // LoongArchLASXInstrInfo.td:734 |
| 1880 | XVBITSET_H = 1865, // LoongArchLASXInstrInfo.td:732 |
| 1881 | XVBITSET_W = 1866, // LoongArchLASXInstrInfo.td:733 |
| 1882 | XVBSLL_V = 1867, // LoongArchLASXInstrInfo.td:998 |
| 1883 | XVBSRL_V = 1868, // LoongArchLASXInstrInfo.td:999 |
| 1884 | XVCLO_B = 1869, // LoongArchLASXInstrInfo.td:708 |
| 1885 | XVCLO_D = 1870, // LoongArchLASXInstrInfo.td:711 |
| 1886 | XVCLO_H = 1871, // LoongArchLASXInstrInfo.td:709 |
| 1887 | XVCLO_W = 1872, // LoongArchLASXInstrInfo.td:710 |
| 1888 | XVCLZ_B = 1873, // LoongArchLASXInstrInfo.td:712 |
| 1889 | XVCLZ_D = 1874, // LoongArchLASXInstrInfo.td:715 |
| 1890 | XVCLZ_H = 1875, // LoongArchLASXInstrInfo.td:713 |
| 1891 | XVCLZ_W = 1876, // LoongArchLASXInstrInfo.td:714 |
| 1892 | XVDIV_B = 1877, // LoongArchLASXInstrInfo.td:474 |
| 1893 | XVDIV_BU = 1878, // LoongArchLASXInstrInfo.td:478 |
| 1894 | XVDIV_D = 1879, // LoongArchLASXInstrInfo.td:477 |
| 1895 | XVDIV_DU = 1880, // LoongArchLASXInstrInfo.td:481 |
| 1896 | XVDIV_H = 1881, // LoongArchLASXInstrInfo.td:475 |
| 1897 | XVDIV_HU = 1882, // LoongArchLASXInstrInfo.td:479 |
| 1898 | XVDIV_W = 1883, // LoongArchLASXInstrInfo.td:476 |
| 1899 | XVDIV_WU = 1884, // LoongArchLASXInstrInfo.td:480 |
| 1900 | XVEXTH_DU_WU = 1885, // LoongArchLASXInstrInfo.td:507 |
| 1901 | XVEXTH_D_W = 1886, // LoongArchLASXInstrInfo.td:503 |
| 1902 | XVEXTH_HU_BU = 1887, // LoongArchLASXInstrInfo.td:505 |
| 1903 | XVEXTH_H_B = 1888, // LoongArchLASXInstrInfo.td:501 |
| 1904 | XVEXTH_QU_DU = 1889, // LoongArchLASXInstrInfo.td:508 |
| 1905 | XVEXTH_Q_D = 1890, // LoongArchLASXInstrInfo.td:504 |
| 1906 | XVEXTH_WU_HU = 1891, // LoongArchLASXInstrInfo.td:506 |
| 1907 | XVEXTH_W_H = 1892, // LoongArchLASXInstrInfo.td:502 |
| 1908 | XVEXTL_QU_DU = 1893, // LoongArchLASXInstrInfo.td:596 |
| 1909 | XVEXTL_Q_D = 1894, // LoongArchLASXInstrInfo.td:592 |
| 1910 | XVEXTRINS_B = 1895, // LoongArchLASXInstrInfo.td:1048 |
| 1911 | XVEXTRINS_D = 1896, // LoongArchLASXInstrInfo.td:1045 |
| 1912 | XVEXTRINS_H = 1897, // LoongArchLASXInstrInfo.td:1047 |
| 1913 | XVEXTRINS_W = 1898, // LoongArchLASXInstrInfo.td:1046 |
| 1914 | XVFADD_D = 1899, // LoongArchLASXInstrInfo.td:755 |
| 1915 | XVFADD_S = 1900, // LoongArchLASXInstrInfo.td:754 |
| 1916 | XVFCLASS_D = 1901, // LoongArchLASXInstrInfo.td:786 |
| 1917 | XVFCLASS_S = 1902, // LoongArchLASXInstrInfo.td:785 |
| 1918 | XVFCMP_CAF_D = 1903, // LoongArchLASXInstrInfo.td:925 |
| 1919 | XVFCMP_CAF_S = 1904, // LoongArchLASXInstrInfo.td:902 |
| 1920 | XVFCMP_CEQ_D = 1905, // LoongArchLASXInstrInfo.td:929 |
| 1921 | XVFCMP_CEQ_S = 1906, // LoongArchLASXInstrInfo.td:906 |
| 1922 | XVFCMP_CLE_D = 1907, // LoongArchLASXInstrInfo.td:931 |
| 1923 | XVFCMP_CLE_S = 1908, // LoongArchLASXInstrInfo.td:908 |
| 1924 | XVFCMP_CLT_D = 1909, // LoongArchLASXInstrInfo.td:927 |
| 1925 | XVFCMP_CLT_S = 1910, // LoongArchLASXInstrInfo.td:904 |
| 1926 | XVFCMP_CNE_D = 1911, // LoongArchLASXInstrInfo.td:941 |
| 1927 | XVFCMP_CNE_S = 1912, // LoongArchLASXInstrInfo.td:918 |
| 1928 | XVFCMP_COR_D = 1913, // LoongArchLASXInstrInfo.td:943 |
| 1929 | XVFCMP_COR_S = 1914, // LoongArchLASXInstrInfo.td:920 |
| 1930 | XVFCMP_CUEQ_D = 1915, // LoongArchLASXInstrInfo.td:937 |
| 1931 | XVFCMP_CUEQ_S = 1916, // LoongArchLASXInstrInfo.td:914 |
| 1932 | XVFCMP_CULE_D = 1917, // LoongArchLASXInstrInfo.td:939 |
| 1933 | XVFCMP_CULE_S = 1918, // LoongArchLASXInstrInfo.td:916 |
| 1934 | XVFCMP_CULT_D = 1919, // LoongArchLASXInstrInfo.td:935 |
| 1935 | XVFCMP_CULT_S = 1920, // LoongArchLASXInstrInfo.td:912 |
| 1936 | XVFCMP_CUNE_D = 1921, // LoongArchLASXInstrInfo.td:945 |
| 1937 | XVFCMP_CUNE_S = 1922, // LoongArchLASXInstrInfo.td:922 |
| 1938 | XVFCMP_CUN_D = 1923, // LoongArchLASXInstrInfo.td:933 |
| 1939 | XVFCMP_CUN_S = 1924, // LoongArchLASXInstrInfo.td:910 |
| 1940 | XVFCMP_SAF_D = 1925, // LoongArchLASXInstrInfo.td:926 |
| 1941 | XVFCMP_SAF_S = 1926, // LoongArchLASXInstrInfo.td:903 |
| 1942 | XVFCMP_SEQ_D = 1927, // LoongArchLASXInstrInfo.td:930 |
| 1943 | XVFCMP_SEQ_S = 1928, // LoongArchLASXInstrInfo.td:907 |
| 1944 | XVFCMP_SLE_D = 1929, // LoongArchLASXInstrInfo.td:932 |
| 1945 | XVFCMP_SLE_S = 1930, // LoongArchLASXInstrInfo.td:909 |
| 1946 | XVFCMP_SLT_D = 1931, // LoongArchLASXInstrInfo.td:928 |
| 1947 | XVFCMP_SLT_S = 1932, // LoongArchLASXInstrInfo.td:905 |
| 1948 | XVFCMP_SNE_D = 1933, // LoongArchLASXInstrInfo.td:942 |
| 1949 | XVFCMP_SNE_S = 1934, // LoongArchLASXInstrInfo.td:919 |
| 1950 | XVFCMP_SOR_D = 1935, // LoongArchLASXInstrInfo.td:944 |
| 1951 | XVFCMP_SOR_S = 1936, // LoongArchLASXInstrInfo.td:921 |
| 1952 | XVFCMP_SUEQ_D = 1937, // LoongArchLASXInstrInfo.td:938 |
| 1953 | XVFCMP_SUEQ_S = 1938, // LoongArchLASXInstrInfo.td:915 |
| 1954 | XVFCMP_SULE_D = 1939, // LoongArchLASXInstrInfo.td:940 |
| 1955 | XVFCMP_SULE_S = 1940, // LoongArchLASXInstrInfo.td:917 |
| 1956 | XVFCMP_SULT_D = 1941, // LoongArchLASXInstrInfo.td:936 |
| 1957 | XVFCMP_SULT_S = 1942, // LoongArchLASXInstrInfo.td:913 |
| 1958 | XVFCMP_SUNE_D = 1943, // LoongArchLASXInstrInfo.td:946 |
| 1959 | XVFCMP_SUNE_S = 1944, // LoongArchLASXInstrInfo.td:923 |
| 1960 | XVFCMP_SUN_D = 1945, // LoongArchLASXInstrInfo.td:934 |
| 1961 | XVFCMP_SUN_S = 1946, // LoongArchLASXInstrInfo.td:911 |
| 1962 | XVFCVTH_D_S = 1947, // LoongArchLASXInstrInfo.td:802 |
| 1963 | XVFCVTH_S_H = 1948, // LoongArchLASXInstrInfo.td:800 |
| 1964 | XVFCVTL_D_S = 1949, // LoongArchLASXInstrInfo.td:801 |
| 1965 | XVFCVTL_S_H = 1950, // LoongArchLASXInstrInfo.td:799 |
| 1966 | XVFCVT_H_S = 1951, // LoongArchLASXInstrInfo.td:803 |
| 1967 | XVFCVT_S_D = 1952, // LoongArchLASXInstrInfo.td:804 |
| 1968 | XVFDIV_D = 1953, // LoongArchLASXInstrInfo.td:761 |
| 1969 | XVFDIV_S = 1954, // LoongArchLASXInstrInfo.td:760 |
| 1970 | XVFFINTH_D_W = 1955, // LoongArchLASXInstrInfo.td:854 |
| 1971 | XVFFINTL_D_W = 1956, // LoongArchLASXInstrInfo.td:853 |
| 1972 | XVFFINT_D_L = 1957, // LoongArchLASXInstrInfo.td:850 |
| 1973 | XVFFINT_D_LU = 1958, // LoongArchLASXInstrInfo.td:852 |
| 1974 | XVFFINT_S_L = 1959, // LoongArchLASXInstrInfo.td:855 |
| 1975 | XVFFINT_S_W = 1960, // LoongArchLASXInstrInfo.td:849 |
| 1976 | XVFFINT_S_WU = 1961, // LoongArchLASXInstrInfo.td:851 |
| 1977 | XVFLOGB_D = 1962, // LoongArchLASXInstrInfo.td:783 |
| 1978 | XVFLOGB_S = 1963, // LoongArchLASXInstrInfo.td:782 |
| 1979 | XVFMADD_D = 1964, // LoongArchLASXInstrInfo.td:764 |
| 1980 | XVFMADD_S = 1965, // LoongArchLASXInstrInfo.td:763 |
| 1981 | XVFMAXA_D = 1966, // LoongArchLASXInstrInfo.td:778 |
| 1982 | XVFMAXA_S = 1967, // LoongArchLASXInstrInfo.td:777 |
| 1983 | XVFMAX_D = 1968, // LoongArchLASXInstrInfo.td:773 |
| 1984 | XVFMAX_S = 1969, // LoongArchLASXInstrInfo.td:772 |
| 1985 | XVFMINA_D = 1970, // LoongArchLASXInstrInfo.td:780 |
| 1986 | XVFMINA_S = 1971, // LoongArchLASXInstrInfo.td:779 |
| 1987 | XVFMIN_D = 1972, // LoongArchLASXInstrInfo.td:775 |
| 1988 | XVFMIN_S = 1973, // LoongArchLASXInstrInfo.td:774 |
| 1989 | XVFMSUB_D = 1974, // LoongArchLASXInstrInfo.td:766 |
| 1990 | XVFMSUB_S = 1975, // LoongArchLASXInstrInfo.td:765 |
| 1991 | XVFMUL_D = 1976, // LoongArchLASXInstrInfo.td:759 |
| 1992 | XVFMUL_S = 1977, // LoongArchLASXInstrInfo.td:758 |
| 1993 | XVFNMADD_D = 1978, // LoongArchLASXInstrInfo.td:768 |
| 1994 | XVFNMADD_S = 1979, // LoongArchLASXInstrInfo.td:767 |
| 1995 | XVFNMSUB_D = 1980, // LoongArchLASXInstrInfo.td:770 |
| 1996 | XVFNMSUB_S = 1981, // LoongArchLASXInstrInfo.td:769 |
| 1997 | XVFRECIPE_D = 1982, // LoongArchLASXInstrInfo.td:795 |
| 1998 | XVFRECIPE_S = 1983, // LoongArchLASXInstrInfo.td:794 |
| 1999 | XVFRECIP_D = 1984, // LoongArchLASXInstrInfo.td:791 |
| 2000 | XVFRECIP_S = 1985, // LoongArchLASXInstrInfo.td:790 |
| 2001 | XVFRINTRM_D = 1986, // LoongArchLASXInstrInfo.td:813 |
| 2002 | XVFRINTRM_S = 1987, // LoongArchLASXInstrInfo.td:812 |
| 2003 | XVFRINTRNE_D = 1988, // LoongArchLASXInstrInfo.td:807 |
| 2004 | XVFRINTRNE_S = 1989, // LoongArchLASXInstrInfo.td:806 |
| 2005 | XVFRINTRP_D = 1990, // LoongArchLASXInstrInfo.td:811 |
| 2006 | XVFRINTRP_S = 1991, // LoongArchLASXInstrInfo.td:810 |
| 2007 | XVFRINTRZ_D = 1992, // LoongArchLASXInstrInfo.td:809 |
| 2008 | XVFRINTRZ_S = 1993, // LoongArchLASXInstrInfo.td:808 |
| 2009 | XVFRINT_D = 1994, // LoongArchLASXInstrInfo.td:815 |
| 2010 | XVFRINT_S = 1995, // LoongArchLASXInstrInfo.td:814 |
| 2011 | XVFRSQRTE_D = 1996, // LoongArchLASXInstrInfo.td:797 |
| 2012 | XVFRSQRTE_S = 1997, // LoongArchLASXInstrInfo.td:796 |
| 2013 | XVFRSQRT_D = 1998, // LoongArchLASXInstrInfo.td:793 |
| 2014 | XVFRSQRT_S = 1999, // LoongArchLASXInstrInfo.td:792 |
| 2015 | XVFRSTPI_B = 2000, // LoongArchLASXInstrInfo.td:751 |
| 2016 | XVFRSTPI_H = 2001, // LoongArchLASXInstrInfo.td:752 |
| 2017 | XVFRSTP_B = 2002, // LoongArchLASXInstrInfo.td:749 |
| 2018 | XVFRSTP_H = 2003, // LoongArchLASXInstrInfo.td:750 |
| 2019 | XVFSQRT_D = 2004, // LoongArchLASXInstrInfo.td:789 |
| 2020 | XVFSQRT_S = 2005, // LoongArchLASXInstrInfo.td:788 |
| 2021 | XVFSUB_D = 2006, // LoongArchLASXInstrInfo.td:757 |
| 2022 | XVFSUB_S = 2007, // LoongArchLASXInstrInfo.td:756 |
| 2023 | XVFTINTH_L_S = 2008, // LoongArchLASXInstrInfo.td:847 |
| 2024 | XVFTINTL_L_S = 2009, // LoongArchLASXInstrInfo.td:846 |
| 2025 | XVFTINTRMH_L_S = 2010, // LoongArchLASXInstrInfo.td:845 |
| 2026 | XVFTINTRML_L_S = 2011, // LoongArchLASXInstrInfo.td:844 |
| 2027 | XVFTINTRM_L_D = 2012, // LoongArchLASXInstrInfo.td:824 |
| 2028 | XVFTINTRM_W_D = 2013, // LoongArchLASXInstrInfo.td:835 |
| 2029 | XVFTINTRM_W_S = 2014, // LoongArchLASXInstrInfo.td:823 |
| 2030 | XVFTINTRNEH_L_S = 2015, // LoongArchLASXInstrInfo.td:839 |
| 2031 | XVFTINTRNEL_L_S = 2016, // LoongArchLASXInstrInfo.td:838 |
| 2032 | XVFTINTRNE_L_D = 2017, // LoongArchLASXInstrInfo.td:818 |
| 2033 | XVFTINTRNE_W_D = 2018, // LoongArchLASXInstrInfo.td:832 |
| 2034 | XVFTINTRNE_W_S = 2019, // LoongArchLASXInstrInfo.td:817 |
| 2035 | XVFTINTRPH_L_S = 2020, // LoongArchLASXInstrInfo.td:843 |
| 2036 | XVFTINTRPL_L_S = 2021, // LoongArchLASXInstrInfo.td:842 |
| 2037 | XVFTINTRP_L_D = 2022, // LoongArchLASXInstrInfo.td:822 |
| 2038 | XVFTINTRP_W_D = 2023, // LoongArchLASXInstrInfo.td:834 |
| 2039 | XVFTINTRP_W_S = 2024, // LoongArchLASXInstrInfo.td:821 |
| 2040 | XVFTINTRZH_L_S = 2025, // LoongArchLASXInstrInfo.td:841 |
| 2041 | XVFTINTRZL_L_S = 2026, // LoongArchLASXInstrInfo.td:840 |
| 2042 | XVFTINTRZ_LU_D = 2027, // LoongArchLASXInstrInfo.td:828 |
| 2043 | XVFTINTRZ_L_D = 2028, // LoongArchLASXInstrInfo.td:820 |
| 2044 | XVFTINTRZ_WU_S = 2029, // LoongArchLASXInstrInfo.td:827 |
| 2045 | XVFTINTRZ_W_D = 2030, // LoongArchLASXInstrInfo.td:833 |
| 2046 | XVFTINTRZ_W_S = 2031, // LoongArchLASXInstrInfo.td:819 |
| 2047 | XVFTINT_LU_D = 2032, // LoongArchLASXInstrInfo.td:830 |
| 2048 | XVFTINT_L_D = 2033, // LoongArchLASXInstrInfo.td:826 |
| 2049 | XVFTINT_WU_S = 2034, // LoongArchLASXInstrInfo.td:829 |
| 2050 | XVFTINT_W_D = 2035, // LoongArchLASXInstrInfo.td:836 |
| 2051 | XVFTINT_W_S = 2036, // LoongArchLASXInstrInfo.td:825 |
| 2052 | XVHADDW_DU_WU = 2037, // LoongArchLASXInstrInfo.td:278 |
| 2053 | XVHADDW_D_W = 2038, // LoongArchLASXInstrInfo.td:274 |
| 2054 | XVHADDW_HU_BU = 2039, // LoongArchLASXInstrInfo.td:276 |
| 2055 | XVHADDW_H_B = 2040, // LoongArchLASXInstrInfo.td:272 |
| 2056 | XVHADDW_QU_DU = 2041, // LoongArchLASXInstrInfo.td:279 |
| 2057 | XVHADDW_Q_D = 2042, // LoongArchLASXInstrInfo.td:275 |
| 2058 | XVHADDW_WU_HU = 2043, // LoongArchLASXInstrInfo.td:277 |
| 2059 | XVHADDW_W_H = 2044, // LoongArchLASXInstrInfo.td:273 |
| 2060 | XVHSELI_D = 2045, // LoongArchLASXInstrInfo.td:523 |
| 2061 | XVHSUBW_DU_WU = 2046, // LoongArchLASXInstrInfo.td:287 |
| 2062 | XVHSUBW_D_W = 2047, // LoongArchLASXInstrInfo.td:283 |
| 2063 | XVHSUBW_HU_BU = 2048, // LoongArchLASXInstrInfo.td:285 |
| 2064 | XVHSUBW_H_B = 2049, // LoongArchLASXInstrInfo.td:281 |
| 2065 | XVHSUBW_QU_DU = 2050, // LoongArchLASXInstrInfo.td:288 |
| 2066 | XVHSUBW_Q_D = 2051, // LoongArchLASXInstrInfo.td:284 |
| 2067 | XVHSUBW_WU_HU = 2052, // LoongArchLASXInstrInfo.td:286 |
| 2068 | XVHSUBW_W_H = 2053, // LoongArchLASXInstrInfo.td:282 |
| 2069 | XVILVH_B = 2054, // LoongArchLASXInstrInfo.td:1023 |
| 2070 | XVILVH_D = 2055, // LoongArchLASXInstrInfo.td:1026 |
| 2071 | XVILVH_H = 2056, // LoongArchLASXInstrInfo.td:1024 |
| 2072 | XVILVH_W = 2057, // LoongArchLASXInstrInfo.td:1025 |
| 2073 | XVILVL_B = 2058, // LoongArchLASXInstrInfo.td:1019 |
| 2074 | XVILVL_D = 2059, // LoongArchLASXInstrInfo.td:1022 |
| 2075 | XVILVL_H = 2060, // LoongArchLASXInstrInfo.td:1020 |
| 2076 | XVILVL_W = 2061, // LoongArchLASXInstrInfo.td:1021 |
| 2077 | XVINSGR2VR_D = 2062, // LoongArchLASXInstrInfo.td:964 |
| 2078 | XVINSGR2VR_W = 2063, // LoongArchLASXInstrInfo.td:963 |
| 2079 | XVINSVE0_D = 2064, // LoongArchLASXInstrInfo.td:993 |
| 2080 | XVINSVE0_W = 2065, // LoongArchLASXInstrInfo.td:992 |
| 2081 | XVLD = 2066, // LoongArchLASXInstrInfo.td:1052 |
| 2082 | XVLDI = 2067, // LoongArchLASXInstrInfo.td:539 |
| 2083 | XVLDREPL_B = 2068, // LoongArchLASXInstrInfo.td:1055 |
| 2084 | XVLDREPL_D = 2069, // LoongArchLASXInstrInfo.td:1058 |
| 2085 | XVLDREPL_H = 2070, // LoongArchLASXInstrInfo.td:1056 |
| 2086 | XVLDREPL_W = 2071, // LoongArchLASXInstrInfo.td:1057 |
| 2087 | XVLDX = 2072, // LoongArchLASXInstrInfo.td:1053 |
| 2088 | XVMADDWEV_D_W = 2073, // LoongArchLASXInstrInfo.td:451 |
| 2089 | XVMADDWEV_D_WU = 2074, // LoongArchLASXInstrInfo.td:459 |
| 2090 | XVMADDWEV_D_WU_W = 2075, // LoongArchLASXInstrInfo.td:467 |
| 2091 | XVMADDWEV_H_B = 2076, // LoongArchLASXInstrInfo.td:449 |
| 2092 | XVMADDWEV_H_BU = 2077, // LoongArchLASXInstrInfo.td:457 |
| 2093 | XVMADDWEV_H_BU_B = 2078, // LoongArchLASXInstrInfo.td:465 |
| 2094 | XVMADDWEV_Q_D = 2079, // LoongArchLASXInstrInfo.td:452 |
| 2095 | XVMADDWEV_Q_DU = 2080, // LoongArchLASXInstrInfo.td:460 |
| 2096 | XVMADDWEV_Q_DU_D = 2081, // LoongArchLASXInstrInfo.td:468 |
| 2097 | XVMADDWEV_W_H = 2082, // LoongArchLASXInstrInfo.td:450 |
| 2098 | XVMADDWEV_W_HU = 2083, // LoongArchLASXInstrInfo.td:458 |
| 2099 | XVMADDWEV_W_HU_H = 2084, // LoongArchLASXInstrInfo.td:466 |
| 2100 | XVMADDWOD_D_W = 2085, // LoongArchLASXInstrInfo.td:455 |
| 2101 | XVMADDWOD_D_WU = 2086, // LoongArchLASXInstrInfo.td:463 |
| 2102 | XVMADDWOD_D_WU_W = 2087, // LoongArchLASXInstrInfo.td:471 |
| 2103 | XVMADDWOD_H_B = 2088, // LoongArchLASXInstrInfo.td:453 |
| 2104 | XVMADDWOD_H_BU = 2089, // LoongArchLASXInstrInfo.td:461 |
| 2105 | XVMADDWOD_H_BU_B = 2090, // LoongArchLASXInstrInfo.td:469 |
| 2106 | XVMADDWOD_Q_D = 2091, // LoongArchLASXInstrInfo.td:456 |
| 2107 | XVMADDWOD_Q_DU = 2092, // LoongArchLASXInstrInfo.td:464 |
| 2108 | XVMADDWOD_Q_DU_D = 2093, // LoongArchLASXInstrInfo.td:472 |
| 2109 | XVMADDWOD_W_H = 2094, // LoongArchLASXInstrInfo.td:454 |
| 2110 | XVMADDWOD_W_HU = 2095, // LoongArchLASXInstrInfo.td:462 |
| 2111 | XVMADDWOD_W_HU_H = 2096, // LoongArchLASXInstrInfo.td:470 |
| 2112 | XVMADD_B = 2097, // LoongArchLASXInstrInfo.td:439 |
| 2113 | XVMADD_D = 2098, // LoongArchLASXInstrInfo.td:442 |
| 2114 | XVMADD_H = 2099, // LoongArchLASXInstrInfo.td:440 |
| 2115 | XVMADD_W = 2100, // LoongArchLASXInstrInfo.td:441 |
| 2116 | XVMAXI_B = 2101, // LoongArchLASXInstrInfo.td:370 |
| 2117 | XVMAXI_BU = 2102, // LoongArchLASXInstrInfo.td:378 |
| 2118 | XVMAXI_D = 2103, // LoongArchLASXInstrInfo.td:373 |
| 2119 | XVMAXI_DU = 2104, // LoongArchLASXInstrInfo.td:381 |
| 2120 | XVMAXI_H = 2105, // LoongArchLASXInstrInfo.td:371 |
| 2121 | XVMAXI_HU = 2106, // LoongArchLASXInstrInfo.td:379 |
| 2122 | XVMAXI_W = 2107, // LoongArchLASXInstrInfo.td:372 |
| 2123 | XVMAXI_WU = 2108, // LoongArchLASXInstrInfo.td:380 |
| 2124 | XVMAX_B = 2109, // LoongArchLASXInstrInfo.td:366 |
| 2125 | XVMAX_BU = 2110, // LoongArchLASXInstrInfo.td:374 |
| 2126 | XVMAX_D = 2111, // LoongArchLASXInstrInfo.td:369 |
| 2127 | XVMAX_DU = 2112, // LoongArchLASXInstrInfo.td:377 |
| 2128 | XVMAX_H = 2113, // LoongArchLASXInstrInfo.td:367 |
| 2129 | XVMAX_HU = 2114, // LoongArchLASXInstrInfo.td:375 |
| 2130 | XVMAX_W = 2115, // LoongArchLASXInstrInfo.td:368 |
| 2131 | XVMAX_WU = 2116, // LoongArchLASXInstrInfo.td:376 |
| 2132 | XVMINI_B = 2117, // LoongArchLASXInstrInfo.td:387 |
| 2133 | XVMINI_BU = 2118, // LoongArchLASXInstrInfo.td:395 |
| 2134 | XVMINI_D = 2119, // LoongArchLASXInstrInfo.td:390 |
| 2135 | XVMINI_DU = 2120, // LoongArchLASXInstrInfo.td:398 |
| 2136 | XVMINI_H = 2121, // LoongArchLASXInstrInfo.td:388 |
| 2137 | XVMINI_HU = 2122, // LoongArchLASXInstrInfo.td:396 |
| 2138 | XVMINI_W = 2123, // LoongArchLASXInstrInfo.td:389 |
| 2139 | XVMINI_WU = 2124, // LoongArchLASXInstrInfo.td:397 |
| 2140 | XVMIN_B = 2125, // LoongArchLASXInstrInfo.td:383 |
| 2141 | XVMIN_BU = 2126, // LoongArchLASXInstrInfo.td:391 |
| 2142 | XVMIN_D = 2127, // LoongArchLASXInstrInfo.td:386 |
| 2143 | XVMIN_DU = 2128, // LoongArchLASXInstrInfo.td:394 |
| 2144 | XVMIN_H = 2129, // LoongArchLASXInstrInfo.td:384 |
| 2145 | XVMIN_HU = 2130, // LoongArchLASXInstrInfo.td:392 |
| 2146 | XVMIN_W = 2131, // LoongArchLASXInstrInfo.td:385 |
| 2147 | XVMIN_WU = 2132, // LoongArchLASXInstrInfo.td:393 |
| 2148 | XVMOD_B = 2133, // LoongArchLASXInstrInfo.td:483 |
| 2149 | XVMOD_BU = 2134, // LoongArchLASXInstrInfo.td:487 |
| 2150 | XVMOD_D = 2135, // LoongArchLASXInstrInfo.td:486 |
| 2151 | XVMOD_DU = 2136, // LoongArchLASXInstrInfo.td:490 |
| 2152 | XVMOD_H = 2137, // LoongArchLASXInstrInfo.td:484 |
| 2153 | XVMOD_HU = 2138, // LoongArchLASXInstrInfo.td:488 |
| 2154 | XVMOD_W = 2139, // LoongArchLASXInstrInfo.td:485 |
| 2155 | XVMOD_WU = 2140, // LoongArchLASXInstrInfo.td:489 |
| 2156 | XVMSKGEZ_B = 2141, // LoongArchLASXInstrInfo.td:535 |
| 2157 | XVMSKLTZ_B = 2142, // LoongArchLASXInstrInfo.td:530 |
| 2158 | XVMSKLTZ_D = 2143, // LoongArchLASXInstrInfo.td:533 |
| 2159 | XVMSKLTZ_H = 2144, // LoongArchLASXInstrInfo.td:531 |
| 2160 | XVMSKLTZ_W = 2145, // LoongArchLASXInstrInfo.td:532 |
| 2161 | XVMSKNZ_B = 2146, // LoongArchLASXInstrInfo.td:537 |
| 2162 | XVMSUB_B = 2147, // LoongArchLASXInstrInfo.td:444 |
| 2163 | XVMSUB_D = 2148, // LoongArchLASXInstrInfo.td:447 |
| 2164 | XVMSUB_H = 2149, // LoongArchLASXInstrInfo.td:445 |
| 2165 | XVMSUB_W = 2150, // LoongArchLASXInstrInfo.td:446 |
| 2166 | XVMUH_B = 2151, // LoongArchLASXInstrInfo.td:405 |
| 2167 | XVMUH_BU = 2152, // LoongArchLASXInstrInfo.td:409 |
| 2168 | XVMUH_D = 2153, // LoongArchLASXInstrInfo.td:408 |
| 2169 | XVMUH_DU = 2154, // LoongArchLASXInstrInfo.td:412 |
| 2170 | XVMUH_H = 2155, // LoongArchLASXInstrInfo.td:406 |
| 2171 | XVMUH_HU = 2156, // LoongArchLASXInstrInfo.td:410 |
| 2172 | XVMUH_W = 2157, // LoongArchLASXInstrInfo.td:407 |
| 2173 | XVMUH_WU = 2158, // LoongArchLASXInstrInfo.td:411 |
| 2174 | XVMULWEV_D_W = 2159, // LoongArchLASXInstrInfo.td:416 |
| 2175 | XVMULWEV_D_WU = 2160, // LoongArchLASXInstrInfo.td:424 |
| 2176 | XVMULWEV_D_WU_W = 2161, // LoongArchLASXInstrInfo.td:432 |
| 2177 | XVMULWEV_H_B = 2162, // LoongArchLASXInstrInfo.td:414 |
| 2178 | XVMULWEV_H_BU = 2163, // LoongArchLASXInstrInfo.td:422 |
| 2179 | XVMULWEV_H_BU_B = 2164, // LoongArchLASXInstrInfo.td:430 |
| 2180 | XVMULWEV_Q_D = 2165, // LoongArchLASXInstrInfo.td:417 |
| 2181 | XVMULWEV_Q_DU = 2166, // LoongArchLASXInstrInfo.td:425 |
| 2182 | XVMULWEV_Q_DU_D = 2167, // LoongArchLASXInstrInfo.td:433 |
| 2183 | XVMULWEV_W_H = 2168, // LoongArchLASXInstrInfo.td:415 |
| 2184 | XVMULWEV_W_HU = 2169, // LoongArchLASXInstrInfo.td:423 |
| 2185 | XVMULWEV_W_HU_H = 2170, // LoongArchLASXInstrInfo.td:431 |
| 2186 | XVMULWOD_D_W = 2171, // LoongArchLASXInstrInfo.td:420 |
| 2187 | XVMULWOD_D_WU = 2172, // LoongArchLASXInstrInfo.td:428 |
| 2188 | XVMULWOD_D_WU_W = 2173, // LoongArchLASXInstrInfo.td:436 |
| 2189 | XVMULWOD_H_B = 2174, // LoongArchLASXInstrInfo.td:418 |
| 2190 | XVMULWOD_H_BU = 2175, // LoongArchLASXInstrInfo.td:426 |
| 2191 | XVMULWOD_H_BU_B = 2176, // LoongArchLASXInstrInfo.td:434 |
| 2192 | XVMULWOD_Q_D = 2177, // LoongArchLASXInstrInfo.td:421 |
| 2193 | XVMULWOD_Q_DU = 2178, // LoongArchLASXInstrInfo.td:429 |
| 2194 | XVMULWOD_Q_DU_D = 2179, // LoongArchLASXInstrInfo.td:437 |
| 2195 | XVMULWOD_W_H = 2180, // LoongArchLASXInstrInfo.td:419 |
| 2196 | XVMULWOD_W_HU = 2181, // LoongArchLASXInstrInfo.td:427 |
| 2197 | XVMULWOD_W_HU_H = 2182, // LoongArchLASXInstrInfo.td:435 |
| 2198 | XVMUL_B = 2183, // LoongArchLASXInstrInfo.td:400 |
| 2199 | XVMUL_D = 2184, // LoongArchLASXInstrInfo.td:403 |
| 2200 | XVMUL_H = 2185, // LoongArchLASXInstrInfo.td:401 |
| 2201 | XVMUL_W = 2186, // LoongArchLASXInstrInfo.td:402 |
| 2202 | XVNEG_B = 2187, // LoongArchLASXInstrInfo.td:249 |
| 2203 | XVNEG_D = 2188, // LoongArchLASXInstrInfo.td:252 |
| 2204 | XVNEG_H = 2189, // LoongArchLASXInstrInfo.td:250 |
| 2205 | XVNEG_W = 2190, // LoongArchLASXInstrInfo.td:251 |
| 2206 | XVNORI_B = 2191, // LoongArchLASXInstrInfo.td:551 |
| 2207 | XVNOR_V = 2192, // LoongArchLASXInstrInfo.td:544 |
| 2208 | XVORI_B = 2193, // LoongArchLASXInstrInfo.td:549 |
| 2209 | XVORN_V = 2194, // LoongArchLASXInstrInfo.td:546 |
| 2210 | XVOR_V = 2195, // LoongArchLASXInstrInfo.td:542 |
| 2211 | XVPACKEV_B = 2196, // LoongArchLASXInstrInfo.td:1001 |
| 2212 | XVPACKEV_D = 2197, // LoongArchLASXInstrInfo.td:1004 |
| 2213 | XVPACKEV_H = 2198, // LoongArchLASXInstrInfo.td:1002 |
| 2214 | XVPACKEV_W = 2199, // LoongArchLASXInstrInfo.td:1003 |
| 2215 | XVPACKOD_B = 2200, // LoongArchLASXInstrInfo.td:1005 |
| 2216 | XVPACKOD_D = 2201, // LoongArchLASXInstrInfo.td:1008 |
| 2217 | XVPACKOD_H = 2202, // LoongArchLASXInstrInfo.td:1006 |
| 2218 | XVPACKOD_W = 2203, // LoongArchLASXInstrInfo.td:1007 |
| 2219 | XVPCNT_B = 2204, // LoongArchLASXInstrInfo.td:717 |
| 2220 | XVPCNT_D = 2205, // LoongArchLASXInstrInfo.td:720 |
| 2221 | XVPCNT_H = 2206, // LoongArchLASXInstrInfo.td:718 |
| 2222 | XVPCNT_W = 2207, // LoongArchLASXInstrInfo.td:719 |
| 2223 | XVPERMI_D = 2208, // LoongArchLASXInstrInfo.td:1042 |
| 2224 | XVPERMI_Q = 2209, // LoongArchLASXInstrInfo.td:1043 |
| 2225 | XVPERMI_W = 2210, // LoongArchLASXInstrInfo.td:1041 |
| 2226 | XVPERM_W = 2211, // LoongArchLASXInstrInfo.td:1034 |
| 2227 | XVPICKEV_B = 2212, // LoongArchLASXInstrInfo.td:1010 |
| 2228 | XVPICKEV_D = 2213, // LoongArchLASXInstrInfo.td:1013 |
| 2229 | XVPICKEV_H = 2214, // LoongArchLASXInstrInfo.td:1011 |
| 2230 | XVPICKEV_W = 2215, // LoongArchLASXInstrInfo.td:1012 |
| 2231 | XVPICKOD_B = 2216, // LoongArchLASXInstrInfo.td:1014 |
| 2232 | XVPICKOD_D = 2217, // LoongArchLASXInstrInfo.td:1017 |
| 2233 | XVPICKOD_H = 2218, // LoongArchLASXInstrInfo.td:1015 |
| 2234 | XVPICKOD_W = 2219, // LoongArchLASXInstrInfo.td:1016 |
| 2235 | XVPICKVE2GR_D = 2220, // LoongArchLASXInstrInfo.td:966 |
| 2236 | XVPICKVE2GR_DU = 2221, // LoongArchLASXInstrInfo.td:968 |
| 2237 | XVPICKVE2GR_W = 2222, // LoongArchLASXInstrInfo.td:965 |
| 2238 | XVPICKVE2GR_WU = 2223, // LoongArchLASXInstrInfo.td:967 |
| 2239 | XVPICKVE_D = 2224, // LoongArchLASXInstrInfo.td:996 |
| 2240 | XVPICKVE_W = 2225, // LoongArchLASXInstrInfo.td:995 |
| 2241 | XVREPL128VEI_B = 2226, // LoongArchLASXInstrInfo.td:981 |
| 2242 | XVREPL128VEI_D = 2227, // LoongArchLASXInstrInfo.td:984 |
| 2243 | XVREPL128VEI_H = 2228, // LoongArchLASXInstrInfo.td:982 |
| 2244 | XVREPL128VEI_W = 2229, // LoongArchLASXInstrInfo.td:983 |
| 2245 | XVREPLGR2VR_B = 2230, // LoongArchLASXInstrInfo.td:971 |
| 2246 | XVREPLGR2VR_D = 2231, // LoongArchLASXInstrInfo.td:974 |
| 2247 | XVREPLGR2VR_H = 2232, // LoongArchLASXInstrInfo.td:972 |
| 2248 | XVREPLGR2VR_W = 2233, // LoongArchLASXInstrInfo.td:973 |
| 2249 | XVREPLVE0_B = 2234, // LoongArchLASXInstrInfo.td:986 |
| 2250 | XVREPLVE0_D = 2235, // LoongArchLASXInstrInfo.td:989 |
| 2251 | XVREPLVE0_H = 2236, // LoongArchLASXInstrInfo.td:987 |
| 2252 | XVREPLVE0_Q = 2237, // LoongArchLASXInstrInfo.td:990 |
| 2253 | XVREPLVE0_W = 2238, // LoongArchLASXInstrInfo.td:988 |
| 2254 | XVREPLVE_B = 2239, // LoongArchLASXInstrInfo.td:977 |
| 2255 | XVREPLVE_D = 2240, // LoongArchLASXInstrInfo.td:980 |
| 2256 | XVREPLVE_H = 2241, // LoongArchLASXInstrInfo.td:978 |
| 2257 | XVREPLVE_W = 2242, // LoongArchLASXInstrInfo.td:979 |
| 2258 | XVROTRI_B = 2243, // LoongArchLASXInstrInfo.td:584 |
| 2259 | XVROTRI_D = 2244, // LoongArchLASXInstrInfo.td:587 |
| 2260 | XVROTRI_H = 2245, // LoongArchLASXInstrInfo.td:585 |
| 2261 | XVROTRI_W = 2246, // LoongArchLASXInstrInfo.td:586 |
| 2262 | XVROTR_B = 2247, // LoongArchLASXInstrInfo.td:580 |
| 2263 | XVROTR_D = 2248, // LoongArchLASXInstrInfo.td:583 |
| 2264 | XVROTR_H = 2249, // LoongArchLASXInstrInfo.td:581 |
| 2265 | XVROTR_W = 2250, // LoongArchLASXInstrInfo.td:582 |
| 2266 | XVSADD_B = 2251, // LoongArchLASXInstrInfo.td:254 |
| 2267 | XVSADD_BU = 2252, // LoongArchLASXInstrInfo.td:258 |
| 2268 | XVSADD_D = 2253, // LoongArchLASXInstrInfo.td:257 |
| 2269 | XVSADD_DU = 2254, // LoongArchLASXInstrInfo.td:261 |
| 2270 | XVSADD_H = 2255, // LoongArchLASXInstrInfo.td:255 |
| 2271 | XVSADD_HU = 2256, // LoongArchLASXInstrInfo.td:259 |
| 2272 | XVSADD_W = 2257, // LoongArchLASXInstrInfo.td:256 |
| 2273 | XVSADD_WU = 2258, // LoongArchLASXInstrInfo.td:260 |
| 2274 | XVSAT_B = 2259, // LoongArchLASXInstrInfo.td:492 |
| 2275 | XVSAT_BU = 2260, // LoongArchLASXInstrInfo.td:496 |
| 2276 | XVSAT_D = 2261, // LoongArchLASXInstrInfo.td:495 |
| 2277 | XVSAT_DU = 2262, // LoongArchLASXInstrInfo.td:499 |
| 2278 | XVSAT_H = 2263, // LoongArchLASXInstrInfo.td:493 |
| 2279 | XVSAT_HU = 2264, // LoongArchLASXInstrInfo.td:497 |
| 2280 | XVSAT_W = 2265, // LoongArchLASXInstrInfo.td:494 |
| 2281 | XVSAT_WU = 2266, // LoongArchLASXInstrInfo.td:498 |
| 2282 | XVSEQI_B = 2267, // LoongArchLASXInstrInfo.td:861 |
| 2283 | XVSEQI_D = 2268, // LoongArchLASXInstrInfo.td:864 |
| 2284 | XVSEQI_H = 2269, // LoongArchLASXInstrInfo.td:862 |
| 2285 | XVSEQI_W = 2270, // LoongArchLASXInstrInfo.td:863 |
| 2286 | XVSEQ_B = 2271, // LoongArchLASXInstrInfo.td:857 |
| 2287 | XVSEQ_D = 2272, // LoongArchLASXInstrInfo.td:860 |
| 2288 | XVSEQ_H = 2273, // LoongArchLASXInstrInfo.td:858 |
| 2289 | XVSEQ_W = 2274, // LoongArchLASXInstrInfo.td:859 |
| 2290 | XVSETALLNEZ_B = 2275, // LoongArchLASXInstrInfo.td:958 |
| 2291 | XVSETALLNEZ_D = 2276, // LoongArchLASXInstrInfo.td:961 |
| 2292 | XVSETALLNEZ_H = 2277, // LoongArchLASXInstrInfo.td:959 |
| 2293 | XVSETALLNEZ_W = 2278, // LoongArchLASXInstrInfo.td:960 |
| 2294 | XVSETANYEQZ_B = 2279, // LoongArchLASXInstrInfo.td:954 |
| 2295 | XVSETANYEQZ_D = 2280, // LoongArchLASXInstrInfo.td:957 |
| 2296 | XVSETANYEQZ_H = 2281, // LoongArchLASXInstrInfo.td:955 |
| 2297 | XVSETANYEQZ_W = 2282, // LoongArchLASXInstrInfo.td:956 |
| 2298 | XVSETEQZ_V = 2283, // LoongArchLASXInstrInfo.td:952 |
| 2299 | XVSETNEZ_V = 2284, // LoongArchLASXInstrInfo.td:953 |
| 2300 | XVSHUF4I_B = 2285, // LoongArchLASXInstrInfo.td:1036 |
| 2301 | XVSHUF4I_D = 2286, // LoongArchLASXInstrInfo.td:1039 |
| 2302 | XVSHUF4I_H = 2287, // LoongArchLASXInstrInfo.td:1037 |
| 2303 | XVSHUF4I_W = 2288, // LoongArchLASXInstrInfo.td:1038 |
| 2304 | XVSHUF_B = 2289, // LoongArchLASXInstrInfo.td:1028 |
| 2305 | XVSHUF_D = 2290, // LoongArchLASXInstrInfo.td:1032 |
| 2306 | XVSHUF_H = 2291, // LoongArchLASXInstrInfo.td:1030 |
| 2307 | XVSHUF_W = 2292, // LoongArchLASXInstrInfo.td:1031 |
| 2308 | XVSIGNCOV_B = 2293, // LoongArchLASXInstrInfo.td:525 |
| 2309 | XVSIGNCOV_D = 2294, // LoongArchLASXInstrInfo.td:528 |
| 2310 | XVSIGNCOV_H = 2295, // LoongArchLASXInstrInfo.td:526 |
| 2311 | XVSIGNCOV_W = 2296, // LoongArchLASXInstrInfo.td:527 |
| 2312 | XVSLEI_B = 2297, // LoongArchLASXInstrInfo.td:870 |
| 2313 | XVSLEI_BU = 2298, // LoongArchLASXInstrInfo.td:879 |
| 2314 | XVSLEI_D = 2299, // LoongArchLASXInstrInfo.td:873 |
| 2315 | XVSLEI_DU = 2300, // LoongArchLASXInstrInfo.td:882 |
| 2316 | XVSLEI_H = 2301, // LoongArchLASXInstrInfo.td:871 |
| 2317 | XVSLEI_HU = 2302, // LoongArchLASXInstrInfo.td:880 |
| 2318 | XVSLEI_W = 2303, // LoongArchLASXInstrInfo.td:872 |
| 2319 | XVSLEI_WU = 2304, // LoongArchLASXInstrInfo.td:881 |
| 2320 | XVSLE_B = 2305, // LoongArchLASXInstrInfo.td:866 |
| 2321 | XVSLE_BU = 2306, // LoongArchLASXInstrInfo.td:875 |
| 2322 | XVSLE_D = 2307, // LoongArchLASXInstrInfo.td:869 |
| 2323 | XVSLE_DU = 2308, // LoongArchLASXInstrInfo.td:878 |
| 2324 | XVSLE_H = 2309, // LoongArchLASXInstrInfo.td:867 |
| 2325 | XVSLE_HU = 2310, // LoongArchLASXInstrInfo.td:876 |
| 2326 | XVSLE_W = 2311, // LoongArchLASXInstrInfo.td:868 |
| 2327 | XVSLE_WU = 2312, // LoongArchLASXInstrInfo.td:877 |
| 2328 | XVSLLI_B = 2313, // LoongArchLASXInstrInfo.td:557 |
| 2329 | XVSLLI_D = 2314, // LoongArchLASXInstrInfo.td:560 |
| 2330 | XVSLLI_H = 2315, // LoongArchLASXInstrInfo.td:558 |
| 2331 | XVSLLI_W = 2316, // LoongArchLASXInstrInfo.td:559 |
| 2332 | XVSLLWIL_DU_WU = 2317, // LoongArchLASXInstrInfo.td:595 |
| 2333 | XVSLLWIL_D_W = 2318, // LoongArchLASXInstrInfo.td:591 |
| 2334 | XVSLLWIL_HU_BU = 2319, // LoongArchLASXInstrInfo.td:593 |
| 2335 | XVSLLWIL_H_B = 2320, // LoongArchLASXInstrInfo.td:589 |
| 2336 | XVSLLWIL_WU_HU = 2321, // LoongArchLASXInstrInfo.td:594 |
| 2337 | XVSLLWIL_W_H = 2322, // LoongArchLASXInstrInfo.td:590 |
| 2338 | XVSLL_B = 2323, // LoongArchLASXInstrInfo.td:553 |
| 2339 | XVSLL_D = 2324, // LoongArchLASXInstrInfo.td:556 |
| 2340 | XVSLL_H = 2325, // LoongArchLASXInstrInfo.td:554 |
| 2341 | XVSLL_W = 2326, // LoongArchLASXInstrInfo.td:555 |
| 2342 | XVSLTI_B = 2327, // LoongArchLASXInstrInfo.td:888 |
| 2343 | XVSLTI_BU = 2328, // LoongArchLASXInstrInfo.td:897 |
| 2344 | XVSLTI_D = 2329, // LoongArchLASXInstrInfo.td:891 |
| 2345 | XVSLTI_DU = 2330, // LoongArchLASXInstrInfo.td:900 |
| 2346 | XVSLTI_H = 2331, // LoongArchLASXInstrInfo.td:889 |
| 2347 | XVSLTI_HU = 2332, // LoongArchLASXInstrInfo.td:898 |
| 2348 | XVSLTI_W = 2333, // LoongArchLASXInstrInfo.td:890 |
| 2349 | XVSLTI_WU = 2334, // LoongArchLASXInstrInfo.td:899 |
| 2350 | XVSLT_B = 2335, // LoongArchLASXInstrInfo.td:884 |
| 2351 | XVSLT_BU = 2336, // LoongArchLASXInstrInfo.td:893 |
| 2352 | XVSLT_D = 2337, // LoongArchLASXInstrInfo.td:887 |
| 2353 | XVSLT_DU = 2338, // LoongArchLASXInstrInfo.td:896 |
| 2354 | XVSLT_H = 2339, // LoongArchLASXInstrInfo.td:885 |
| 2355 | XVSLT_HU = 2340, // LoongArchLASXInstrInfo.td:894 |
| 2356 | XVSLT_W = 2341, // LoongArchLASXInstrInfo.td:886 |
| 2357 | XVSLT_WU = 2342, // LoongArchLASXInstrInfo.td:895 |
| 2358 | XVSRAI_B = 2343, // LoongArchLASXInstrInfo.td:575 |
| 2359 | XVSRAI_D = 2344, // LoongArchLASXInstrInfo.td:578 |
| 2360 | XVSRAI_H = 2345, // LoongArchLASXInstrInfo.td:576 |
| 2361 | XVSRAI_W = 2346, // LoongArchLASXInstrInfo.td:577 |
| 2362 | XVSRANI_B_H = 2347, // LoongArchLASXInstrInfo.td:627 |
| 2363 | XVSRANI_D_Q = 2348, // LoongArchLASXInstrInfo.td:630 |
| 2364 | XVSRANI_H_W = 2349, // LoongArchLASXInstrInfo.td:628 |
| 2365 | XVSRANI_W_D = 2350, // LoongArchLASXInstrInfo.td:629 |
| 2366 | XVSRAN_B_H = 2351, // LoongArchLASXInstrInfo.td:619 |
| 2367 | XVSRAN_H_W = 2352, // LoongArchLASXInstrInfo.td:620 |
| 2368 | XVSRAN_W_D = 2353, // LoongArchLASXInstrInfo.td:621 |
| 2369 | XVSRARI_B = 2354, // LoongArchLASXInstrInfo.td:611 |
| 2370 | XVSRARI_D = 2355, // LoongArchLASXInstrInfo.td:614 |
| 2371 | XVSRARI_H = 2356, // LoongArchLASXInstrInfo.td:612 |
| 2372 | XVSRARI_W = 2357, // LoongArchLASXInstrInfo.td:613 |
| 2373 | XVSRARNI_B_H = 2358, // LoongArchLASXInstrInfo.td:643 |
| 2374 | XVSRARNI_D_Q = 2359, // LoongArchLASXInstrInfo.td:646 |
| 2375 | XVSRARNI_H_W = 2360, // LoongArchLASXInstrInfo.td:644 |
| 2376 | XVSRARNI_W_D = 2361, // LoongArchLASXInstrInfo.td:645 |
| 2377 | XVSRARN_B_H = 2362, // LoongArchLASXInstrInfo.td:635 |
| 2378 | XVSRARN_H_W = 2363, // LoongArchLASXInstrInfo.td:636 |
| 2379 | XVSRARN_W_D = 2364, // LoongArchLASXInstrInfo.td:637 |
| 2380 | XVSRAR_B = 2365, // LoongArchLASXInstrInfo.td:607 |
| 2381 | XVSRAR_D = 2366, // LoongArchLASXInstrInfo.td:610 |
| 2382 | XVSRAR_H = 2367, // LoongArchLASXInstrInfo.td:608 |
| 2383 | XVSRAR_W = 2368, // LoongArchLASXInstrInfo.td:609 |
| 2384 | XVSRA_B = 2369, // LoongArchLASXInstrInfo.td:571 |
| 2385 | XVSRA_D = 2370, // LoongArchLASXInstrInfo.td:574 |
| 2386 | XVSRA_H = 2371, // LoongArchLASXInstrInfo.td:572 |
| 2387 | XVSRA_W = 2372, // LoongArchLASXInstrInfo.td:573 |
| 2388 | XVSRLI_B = 2373, // LoongArchLASXInstrInfo.td:566 |
| 2389 | XVSRLI_D = 2374, // LoongArchLASXInstrInfo.td:569 |
| 2390 | XVSRLI_H = 2375, // LoongArchLASXInstrInfo.td:567 |
| 2391 | XVSRLI_W = 2376, // LoongArchLASXInstrInfo.td:568 |
| 2392 | XVSRLNI_B_H = 2377, // LoongArchLASXInstrInfo.td:623 |
| 2393 | XVSRLNI_D_Q = 2378, // LoongArchLASXInstrInfo.td:626 |
| 2394 | XVSRLNI_H_W = 2379, // LoongArchLASXInstrInfo.td:624 |
| 2395 | XVSRLNI_W_D = 2380, // LoongArchLASXInstrInfo.td:625 |
| 2396 | XVSRLN_B_H = 2381, // LoongArchLASXInstrInfo.td:616 |
| 2397 | XVSRLN_H_W = 2382, // LoongArchLASXInstrInfo.td:617 |
| 2398 | XVSRLN_W_D = 2383, // LoongArchLASXInstrInfo.td:618 |
| 2399 | XVSRLRI_B = 2384, // LoongArchLASXInstrInfo.td:602 |
| 2400 | XVSRLRI_D = 2385, // LoongArchLASXInstrInfo.td:605 |
| 2401 | XVSRLRI_H = 2386, // LoongArchLASXInstrInfo.td:603 |
| 2402 | XVSRLRI_W = 2387, // LoongArchLASXInstrInfo.td:604 |
| 2403 | XVSRLRNI_B_H = 2388, // LoongArchLASXInstrInfo.td:639 |
| 2404 | XVSRLRNI_D_Q = 2389, // LoongArchLASXInstrInfo.td:642 |
| 2405 | XVSRLRNI_H_W = 2390, // LoongArchLASXInstrInfo.td:640 |
| 2406 | XVSRLRNI_W_D = 2391, // LoongArchLASXInstrInfo.td:641 |
| 2407 | XVSRLRN_B_H = 2392, // LoongArchLASXInstrInfo.td:632 |
| 2408 | XVSRLRN_H_W = 2393, // LoongArchLASXInstrInfo.td:633 |
| 2409 | XVSRLRN_W_D = 2394, // LoongArchLASXInstrInfo.td:634 |
| 2410 | XVSRLR_B = 2395, // LoongArchLASXInstrInfo.td:598 |
| 2411 | XVSRLR_D = 2396, // LoongArchLASXInstrInfo.td:601 |
| 2412 | XVSRLR_H = 2397, // LoongArchLASXInstrInfo.td:599 |
| 2413 | XVSRLR_W = 2398, // LoongArchLASXInstrInfo.td:600 |
| 2414 | XVSRL_B = 2399, // LoongArchLASXInstrInfo.td:562 |
| 2415 | XVSRL_D = 2400, // LoongArchLASXInstrInfo.td:565 |
| 2416 | XVSRL_H = 2401, // LoongArchLASXInstrInfo.td:563 |
| 2417 | XVSRL_W = 2402, // LoongArchLASXInstrInfo.td:564 |
| 2418 | XVSSRANI_BU_H = 2403, // LoongArchLASXInstrInfo.td:673 |
| 2419 | XVSSRANI_B_H = 2404, // LoongArchLASXInstrInfo.td:665 |
| 2420 | XVSSRANI_DU_Q = 2405, // LoongArchLASXInstrInfo.td:676 |
| 2421 | XVSSRANI_D_Q = 2406, // LoongArchLASXInstrInfo.td:668 |
| 2422 | XVSSRANI_HU_W = 2407, // LoongArchLASXInstrInfo.td:674 |
| 2423 | XVSSRANI_H_W = 2408, // LoongArchLASXInstrInfo.td:666 |
| 2424 | XVSSRANI_WU_D = 2409, // LoongArchLASXInstrInfo.td:675 |
| 2425 | XVSSRANI_W_D = 2410, // LoongArchLASXInstrInfo.td:667 |
| 2426 | XVSSRAN_BU_H = 2411, // LoongArchLASXInstrInfo.td:657 |
| 2427 | XVSSRAN_B_H = 2412, // LoongArchLASXInstrInfo.td:651 |
| 2428 | XVSSRAN_HU_W = 2413, // LoongArchLASXInstrInfo.td:658 |
| 2429 | XVSSRAN_H_W = 2414, // LoongArchLASXInstrInfo.td:652 |
| 2430 | XVSSRAN_WU_D = 2415, // LoongArchLASXInstrInfo.td:659 |
| 2431 | XVSSRAN_W_D = 2416, // LoongArchLASXInstrInfo.td:653 |
| 2432 | XVSSRARNI_BU_H = 2417, // LoongArchLASXInstrInfo.td:703 |
| 2433 | XVSSRARNI_B_H = 2418, // LoongArchLASXInstrInfo.td:695 |
| 2434 | XVSSRARNI_DU_Q = 2419, // LoongArchLASXInstrInfo.td:706 |
| 2435 | XVSSRARNI_D_Q = 2420, // LoongArchLASXInstrInfo.td:698 |
| 2436 | XVSSRARNI_HU_W = 2421, // LoongArchLASXInstrInfo.td:704 |
| 2437 | XVSSRARNI_H_W = 2422, // LoongArchLASXInstrInfo.td:696 |
| 2438 | XVSSRARNI_WU_D = 2423, // LoongArchLASXInstrInfo.td:705 |
| 2439 | XVSSRARNI_W_D = 2424, // LoongArchLASXInstrInfo.td:697 |
| 2440 | XVSSRARN_BU_H = 2425, // LoongArchLASXInstrInfo.td:687 |
| 2441 | XVSSRARN_B_H = 2426, // LoongArchLASXInstrInfo.td:681 |
| 2442 | XVSSRARN_HU_W = 2427, // LoongArchLASXInstrInfo.td:688 |
| 2443 | XVSSRARN_H_W = 2428, // LoongArchLASXInstrInfo.td:682 |
| 2444 | XVSSRARN_WU_D = 2429, // LoongArchLASXInstrInfo.td:689 |
| 2445 | XVSSRARN_W_D = 2430, // LoongArchLASXInstrInfo.td:683 |
| 2446 | XVSSRLNI_BU_H = 2431, // LoongArchLASXInstrInfo.td:669 |
| 2447 | XVSSRLNI_B_H = 2432, // LoongArchLASXInstrInfo.td:661 |
| 2448 | XVSSRLNI_DU_Q = 2433, // LoongArchLASXInstrInfo.td:672 |
| 2449 | XVSSRLNI_D_Q = 2434, // LoongArchLASXInstrInfo.td:664 |
| 2450 | XVSSRLNI_HU_W = 2435, // LoongArchLASXInstrInfo.td:670 |
| 2451 | XVSSRLNI_H_W = 2436, // LoongArchLASXInstrInfo.td:662 |
| 2452 | XVSSRLNI_WU_D = 2437, // LoongArchLASXInstrInfo.td:671 |
| 2453 | XVSSRLNI_W_D = 2438, // LoongArchLASXInstrInfo.td:663 |
| 2454 | XVSSRLN_BU_H = 2439, // LoongArchLASXInstrInfo.td:654 |
| 2455 | XVSSRLN_B_H = 2440, // LoongArchLASXInstrInfo.td:648 |
| 2456 | XVSSRLN_HU_W = 2441, // LoongArchLASXInstrInfo.td:655 |
| 2457 | XVSSRLN_H_W = 2442, // LoongArchLASXInstrInfo.td:649 |
| 2458 | XVSSRLN_WU_D = 2443, // LoongArchLASXInstrInfo.td:656 |
| 2459 | XVSSRLN_W_D = 2444, // LoongArchLASXInstrInfo.td:650 |
| 2460 | XVSSRLRNI_BU_H = 2445, // LoongArchLASXInstrInfo.td:699 |
| 2461 | XVSSRLRNI_B_H = 2446, // LoongArchLASXInstrInfo.td:691 |
| 2462 | XVSSRLRNI_DU_Q = 2447, // LoongArchLASXInstrInfo.td:702 |
| 2463 | XVSSRLRNI_D_Q = 2448, // LoongArchLASXInstrInfo.td:694 |
| 2464 | XVSSRLRNI_HU_W = 2449, // LoongArchLASXInstrInfo.td:700 |
| 2465 | XVSSRLRNI_H_W = 2450, // LoongArchLASXInstrInfo.td:692 |
| 2466 | XVSSRLRNI_WU_D = 2451, // LoongArchLASXInstrInfo.td:701 |
| 2467 | XVSSRLRNI_W_D = 2452, // LoongArchLASXInstrInfo.td:693 |
| 2468 | XVSSRLRN_BU_H = 2453, // LoongArchLASXInstrInfo.td:684 |
| 2469 | XVSSRLRN_B_H = 2454, // LoongArchLASXInstrInfo.td:678 |
| 2470 | XVSSRLRN_HU_W = 2455, // LoongArchLASXInstrInfo.td:685 |
| 2471 | XVSSRLRN_H_W = 2456, // LoongArchLASXInstrInfo.td:679 |
| 2472 | XVSSRLRN_WU_D = 2457, // LoongArchLASXInstrInfo.td:686 |
| 2473 | XVSSRLRN_W_D = 2458, // LoongArchLASXInstrInfo.td:680 |
| 2474 | XVSSUB_B = 2459, // LoongArchLASXInstrInfo.td:263 |
| 2475 | XVSSUB_BU = 2460, // LoongArchLASXInstrInfo.td:267 |
| 2476 | XVSSUB_D = 2461, // LoongArchLASXInstrInfo.td:266 |
| 2477 | XVSSUB_DU = 2462, // LoongArchLASXInstrInfo.td:270 |
| 2478 | XVSSUB_H = 2463, // LoongArchLASXInstrInfo.td:264 |
| 2479 | XVSSUB_HU = 2464, // LoongArchLASXInstrInfo.td:268 |
| 2480 | XVSSUB_W = 2465, // LoongArchLASXInstrInfo.td:265 |
| 2481 | XVSSUB_WU = 2466, // LoongArchLASXInstrInfo.td:269 |
| 2482 | XVST = 2467, // LoongArchLASXInstrInfo.td:1062 |
| 2483 | XVSTELM_B = 2468, // LoongArchLASXInstrInfo.td:1065 |
| 2484 | XVSTELM_D = 2469, // LoongArchLASXInstrInfo.td:1068 |
| 2485 | XVSTELM_H = 2470, // LoongArchLASXInstrInfo.td:1066 |
| 2486 | XVSTELM_W = 2471, // LoongArchLASXInstrInfo.td:1067 |
| 2487 | XVSTX = 2472, // LoongArchLASXInstrInfo.td:1063 |
| 2488 | XVSUBI_BU = 2473, // LoongArchLASXInstrInfo.td:244 |
| 2489 | XVSUBI_DU = 2474, // LoongArchLASXInstrInfo.td:247 |
| 2490 | XVSUBI_HU = 2475, // LoongArchLASXInstrInfo.td:245 |
| 2491 | XVSUBI_WU = 2476, // LoongArchLASXInstrInfo.td:246 |
| 2492 | XVSUBWEV_D_W = 2477, // LoongArchLASXInstrInfo.td:301 |
| 2493 | XVSUBWEV_D_WU = 2478, // LoongArchLASXInstrInfo.td:319 |
| 2494 | XVSUBWEV_H_B = 2479, // LoongArchLASXInstrInfo.td:299 |
| 2495 | XVSUBWEV_H_BU = 2480, // LoongArchLASXInstrInfo.td:317 |
| 2496 | XVSUBWEV_Q_D = 2481, // LoongArchLASXInstrInfo.td:302 |
| 2497 | XVSUBWEV_Q_DU = 2482, // LoongArchLASXInstrInfo.td:320 |
| 2498 | XVSUBWEV_W_H = 2483, // LoongArchLASXInstrInfo.td:300 |
| 2499 | XVSUBWEV_W_HU = 2484, // LoongArchLASXInstrInfo.td:318 |
| 2500 | XVSUBWOD_D_W = 2485, // LoongArchLASXInstrInfo.td:305 |
| 2501 | XVSUBWOD_D_WU = 2486, // LoongArchLASXInstrInfo.td:323 |
| 2502 | XVSUBWOD_H_B = 2487, // LoongArchLASXInstrInfo.td:303 |
| 2503 | XVSUBWOD_H_BU = 2488, // LoongArchLASXInstrInfo.td:321 |
| 2504 | XVSUBWOD_Q_D = 2489, // LoongArchLASXInstrInfo.td:306 |
| 2505 | XVSUBWOD_Q_DU = 2490, // LoongArchLASXInstrInfo.td:324 |
| 2506 | XVSUBWOD_W_H = 2491, // LoongArchLASXInstrInfo.td:304 |
| 2507 | XVSUBWOD_W_HU = 2492, // LoongArchLASXInstrInfo.td:322 |
| 2508 | XVSUB_B = 2493, // LoongArchLASXInstrInfo.td:233 |
| 2509 | XVSUB_D = 2494, // LoongArchLASXInstrInfo.td:236 |
| 2510 | XVSUB_H = 2495, // LoongArchLASXInstrInfo.td:234 |
| 2511 | XVSUB_Q = 2496, // LoongArchLASXInstrInfo.td:237 |
| 2512 | XVSUB_W = 2497, // LoongArchLASXInstrInfo.td:235 |
| 2513 | XVXORI_B = 2498, // LoongArchLASXInstrInfo.td:550 |
| 2514 | XVXOR_V = 2499, // LoongArchLASXInstrInfo.td:543 |
| 2515 | INSTRUCTION_LIST_END = 2500 |
| 2516 | }; |
| 2517 | |
| 2518 | } // namespace llvm::LoongArch |
| 2519 | |
| 2520 | #endif // GET_INSTRINFO_ENUM |
| 2521 | |
| 2522 | #ifdef GET_INSTRINFO_SCHED_ENUM |
| 2523 | #undef GET_INSTRINFO_SCHED_ENUM |
| 2524 | |
| 2525 | namespace llvm::LoongArch::Sched { |
| 2526 | |
| 2527 | enum { |
| 2528 | NoInstrModel = 0, |
| 2529 | SCHED_LIST_END = 1 |
| 2530 | }; |
| 2531 | |
| 2532 | } // namespace llvm::LoongArch::Sched |
| 2533 | |
| 2534 | #endif // GET_INSTRINFO_SCHED_ENUM |
| 2535 | |
| 2536 | #if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
| 2537 | |
| 2538 | namespace llvm { |
| 2539 | |
| 2540 | struct LoongArchInstrTable { |
| 2541 | MCInstrDesc Insts[2500]; |
| 2542 | static_assert(alignof(MCInstrDesc) >= alignof(MCPhysReg), "Unwanted padding between Insts and ImplicitOps"); |
| 2543 | MCPhysReg ImplicitOps[12]; |
| 2544 | char Padding[sizeof(MCOperandInfo) - sizeof ImplicitOps % sizeof(MCOperandInfo)]; |
| 2545 | static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo"); |
| 2546 | MCOperandInfo OperandInfo[437]; |
| 2547 | }; |
| 2548 | } // namespace llvm |
| 2549 | |
| 2550 | #endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
| 2551 | |
| 2552 | #ifdef GET_INSTRINFO_MC_DESC |
| 2553 | #undef GET_INSTRINFO_MC_DESC |
| 2554 | |
| 2555 | namespace llvm { |
| 2556 | |
| 2557 | static_assert((sizeof LoongArchInstrTable::ImplicitOps + sizeof LoongArchInstrTable::Padding) % sizeof(MCOperandInfo) == 0); |
| 2558 | static constexpr unsigned LoongArchOpInfoBase = (sizeof LoongArchInstrTable::ImplicitOps + sizeof LoongArchInstrTable::Padding) / sizeof(MCOperandInfo); |
| 2559 | |
| 2560 | extern const LoongArchInstrTable LoongArchDescs = { |
| 2561 | { |
| 2562 | { 2499, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVXOR_V |
| 2563 | { 2498, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVXORI_B |
| 2564 | { 2497, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_W |
| 2565 | { 2496, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_Q |
| 2566 | { 2495, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_H |
| 2567 | { 2494, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_D |
| 2568 | { 2493, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_B |
| 2569 | { 2492, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_W_HU |
| 2570 | { 2491, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_W_H |
| 2571 | { 2490, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_Q_DU |
| 2572 | { 2489, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_Q_D |
| 2573 | { 2488, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_H_BU |
| 2574 | { 2487, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_H_B |
| 2575 | { 2486, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_D_WU |
| 2576 | { 2485, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_D_W |
| 2577 | { 2484, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_W_HU |
| 2578 | { 2483, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_W_H |
| 2579 | { 2482, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_Q_DU |
| 2580 | { 2481, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_Q_D |
| 2581 | { 2480, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_H_BU |
| 2582 | { 2479, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_H_B |
| 2583 | { 2478, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_D_WU |
| 2584 | { 2477, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_D_W |
| 2585 | { 2476, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSUBI_WU |
| 2586 | { 2475, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSUBI_HU |
| 2587 | { 2474, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSUBI_DU |
| 2588 | { 2473, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSUBI_BU |
| 2589 | { 2472, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 420, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTX |
| 2590 | { 2471, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 433, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTELM_W |
| 2591 | { 2470, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 433, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTELM_H |
| 2592 | { 2469, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 433, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTELM_D |
| 2593 | { 2468, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 433, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTELM_B |
| 2594 | { 2467, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVST |
| 2595 | { 2466, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_WU |
| 2596 | { 2465, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_W |
| 2597 | { 2464, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_HU |
| 2598 | { 2463, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_H |
| 2599 | { 2462, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_DU |
| 2600 | { 2461, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_D |
| 2601 | { 2460, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_BU |
| 2602 | { 2459, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_B |
| 2603 | { 2458, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_W_D |
| 2604 | { 2457, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_WU_D |
| 2605 | { 2456, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_H_W |
| 2606 | { 2455, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_HU_W |
| 2607 | { 2454, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_B_H |
| 2608 | { 2453, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_BU_H |
| 2609 | { 2452, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_W_D |
| 2610 | { 2451, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_WU_D |
| 2611 | { 2450, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_H_W |
| 2612 | { 2449, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_HU_W |
| 2613 | { 2448, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_D_Q |
| 2614 | { 2447, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_DU_Q |
| 2615 | { 2446, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_B_H |
| 2616 | { 2445, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_BU_H |
| 2617 | { 2444, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_W_D |
| 2618 | { 2443, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_WU_D |
| 2619 | { 2442, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_H_W |
| 2620 | { 2441, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_HU_W |
| 2621 | { 2440, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_B_H |
| 2622 | { 2439, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_BU_H |
| 2623 | { 2438, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_W_D |
| 2624 | { 2437, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_WU_D |
| 2625 | { 2436, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_H_W |
| 2626 | { 2435, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_HU_W |
| 2627 | { 2434, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_D_Q |
| 2628 | { 2433, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_DU_Q |
| 2629 | { 2432, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_B_H |
| 2630 | { 2431, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_BU_H |
| 2631 | { 2430, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_W_D |
| 2632 | { 2429, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_WU_D |
| 2633 | { 2428, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_H_W |
| 2634 | { 2427, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_HU_W |
| 2635 | { 2426, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_B_H |
| 2636 | { 2425, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_BU_H |
| 2637 | { 2424, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_W_D |
| 2638 | { 2423, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_WU_D |
| 2639 | { 2422, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_H_W |
| 2640 | { 2421, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_HU_W |
| 2641 | { 2420, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_D_Q |
| 2642 | { 2419, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_DU_Q |
| 2643 | { 2418, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_B_H |
| 2644 | { 2417, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_BU_H |
| 2645 | { 2416, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_W_D |
| 2646 | { 2415, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_WU_D |
| 2647 | { 2414, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_H_W |
| 2648 | { 2413, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_HU_W |
| 2649 | { 2412, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_B_H |
| 2650 | { 2411, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_BU_H |
| 2651 | { 2410, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_W_D |
| 2652 | { 2409, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_WU_D |
| 2653 | { 2408, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_H_W |
| 2654 | { 2407, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_HU_W |
| 2655 | { 2406, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_D_Q |
| 2656 | { 2405, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_DU_Q |
| 2657 | { 2404, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_B_H |
| 2658 | { 2403, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_BU_H |
| 2659 | { 2402, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRL_W |
| 2660 | { 2401, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRL_H |
| 2661 | { 2400, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRL_D |
| 2662 | { 2399, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRL_B |
| 2663 | { 2398, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLR_W |
| 2664 | { 2397, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLR_H |
| 2665 | { 2396, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLR_D |
| 2666 | { 2395, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLR_B |
| 2667 | { 2394, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLRN_W_D |
| 2668 | { 2393, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLRN_H_W |
| 2669 | { 2392, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLRN_B_H |
| 2670 | { 2391, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLRNI_W_D |
| 2671 | { 2390, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLRNI_H_W |
| 2672 | { 2389, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLRNI_D_Q |
| 2673 | { 2388, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLRNI_B_H |
| 2674 | { 2387, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLRI_W |
| 2675 | { 2386, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLRI_H |
| 2676 | { 2385, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLRI_D |
| 2677 | { 2384, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLRI_B |
| 2678 | { 2383, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLN_W_D |
| 2679 | { 2382, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLN_H_W |
| 2680 | { 2381, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLN_B_H |
| 2681 | { 2380, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLNI_W_D |
| 2682 | { 2379, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLNI_H_W |
| 2683 | { 2378, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLNI_D_Q |
| 2684 | { 2377, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLNI_B_H |
| 2685 | { 2376, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLI_W |
| 2686 | { 2375, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLI_H |
| 2687 | { 2374, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLI_D |
| 2688 | { 2373, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLI_B |
| 2689 | { 2372, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRA_W |
| 2690 | { 2371, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRA_H |
| 2691 | { 2370, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRA_D |
| 2692 | { 2369, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRA_B |
| 2693 | { 2368, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAR_W |
| 2694 | { 2367, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAR_H |
| 2695 | { 2366, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAR_D |
| 2696 | { 2365, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAR_B |
| 2697 | { 2364, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRARN_W_D |
| 2698 | { 2363, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRARN_H_W |
| 2699 | { 2362, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRARN_B_H |
| 2700 | { 2361, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRARNI_W_D |
| 2701 | { 2360, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRARNI_H_W |
| 2702 | { 2359, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRARNI_D_Q |
| 2703 | { 2358, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRARNI_B_H |
| 2704 | { 2357, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRARI_W |
| 2705 | { 2356, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRARI_H |
| 2706 | { 2355, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRARI_D |
| 2707 | { 2354, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRARI_B |
| 2708 | { 2353, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAN_W_D |
| 2709 | { 2352, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAN_H_W |
| 2710 | { 2351, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAN_B_H |
| 2711 | { 2350, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRANI_W_D |
| 2712 | { 2349, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRANI_H_W |
| 2713 | { 2348, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRANI_D_Q |
| 2714 | { 2347, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRANI_B_H |
| 2715 | { 2346, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRAI_W |
| 2716 | { 2345, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRAI_H |
| 2717 | { 2344, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRAI_D |
| 2718 | { 2343, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRAI_B |
| 2719 | { 2342, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_WU |
| 2720 | { 2341, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_W |
| 2721 | { 2340, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_HU |
| 2722 | { 2339, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_H |
| 2723 | { 2338, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_DU |
| 2724 | { 2337, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_D |
| 2725 | { 2336, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_BU |
| 2726 | { 2335, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_B |
| 2727 | { 2334, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_WU |
| 2728 | { 2333, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_W |
| 2729 | { 2332, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_HU |
| 2730 | { 2331, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_H |
| 2731 | { 2330, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_DU |
| 2732 | { 2329, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_D |
| 2733 | { 2328, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_BU |
| 2734 | { 2327, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_B |
| 2735 | { 2326, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLL_W |
| 2736 | { 2325, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLL_H |
| 2737 | { 2324, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLL_D |
| 2738 | { 2323, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLL_B |
| 2739 | { 2322, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_W_H |
| 2740 | { 2321, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_WU_HU |
| 2741 | { 2320, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_H_B |
| 2742 | { 2319, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_HU_BU |
| 2743 | { 2318, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_D_W |
| 2744 | { 2317, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_DU_WU |
| 2745 | { 2316, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLI_W |
| 2746 | { 2315, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLI_H |
| 2747 | { 2314, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLI_D |
| 2748 | { 2313, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLI_B |
| 2749 | { 2312, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_WU |
| 2750 | { 2311, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_W |
| 2751 | { 2310, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_HU |
| 2752 | { 2309, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_H |
| 2753 | { 2308, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_DU |
| 2754 | { 2307, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_D |
| 2755 | { 2306, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_BU |
| 2756 | { 2305, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_B |
| 2757 | { 2304, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_WU |
| 2758 | { 2303, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_W |
| 2759 | { 2302, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_HU |
| 2760 | { 2301, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_H |
| 2761 | { 2300, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_DU |
| 2762 | { 2299, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_D |
| 2763 | { 2298, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_BU |
| 2764 | { 2297, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_B |
| 2765 | { 2296, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSIGNCOV_W |
| 2766 | { 2295, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSIGNCOV_H |
| 2767 | { 2294, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSIGNCOV_D |
| 2768 | { 2293, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSIGNCOV_B |
| 2769 | { 2292, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVSHUF_W |
| 2770 | { 2291, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVSHUF_H |
| 2771 | { 2290, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVSHUF_D |
| 2772 | { 2289, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVSHUF_B |
| 2773 | { 2288, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSHUF4I_W |
| 2774 | { 2287, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSHUF4I_H |
| 2775 | { 2286, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSHUF4I_D |
| 2776 | { 2285, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSHUF4I_B |
| 2777 | { 2284, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETNEZ_V |
| 2778 | { 2283, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETEQZ_V |
| 2779 | { 2282, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETANYEQZ_W |
| 2780 | { 2281, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETANYEQZ_H |
| 2781 | { 2280, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETANYEQZ_D |
| 2782 | { 2279, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETANYEQZ_B |
| 2783 | { 2278, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETALLNEZ_W |
| 2784 | { 2277, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETALLNEZ_H |
| 2785 | { 2276, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETALLNEZ_D |
| 2786 | { 2275, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETALLNEZ_B |
| 2787 | { 2274, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSEQ_W |
| 2788 | { 2273, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSEQ_H |
| 2789 | { 2272, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSEQ_D |
| 2790 | { 2271, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSEQ_B |
| 2791 | { 2270, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSEQI_W |
| 2792 | { 2269, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSEQI_H |
| 2793 | { 2268, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSEQI_D |
| 2794 | { 2267, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSEQI_B |
| 2795 | { 2266, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_WU |
| 2796 | { 2265, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_W |
| 2797 | { 2264, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_HU |
| 2798 | { 2263, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_H |
| 2799 | { 2262, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_DU |
| 2800 | { 2261, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_D |
| 2801 | { 2260, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_BU |
| 2802 | { 2259, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_B |
| 2803 | { 2258, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_WU |
| 2804 | { 2257, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_W |
| 2805 | { 2256, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_HU |
| 2806 | { 2255, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_H |
| 2807 | { 2254, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_DU |
| 2808 | { 2253, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_D |
| 2809 | { 2252, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_BU |
| 2810 | { 2251, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_B |
| 2811 | { 2250, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVROTR_W |
| 2812 | { 2249, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVROTR_H |
| 2813 | { 2248, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVROTR_D |
| 2814 | { 2247, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVROTR_B |
| 2815 | { 2246, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVROTRI_W |
| 2816 | { 2245, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVROTRI_H |
| 2817 | { 2244, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVROTRI_D |
| 2818 | { 2243, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVROTRI_B |
| 2819 | { 2242, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 428, 0, 0, 0x0ULL }, // XVREPLVE_W |
| 2820 | { 2241, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 428, 0, 0, 0x0ULL }, // XVREPLVE_H |
| 2821 | { 2240, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 428, 0, 0, 0x0ULL }, // XVREPLVE_D |
| 2822 | { 2239, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 428, 0, 0, 0x0ULL }, // XVREPLVE_B |
| 2823 | { 2238, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_W |
| 2824 | { 2237, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_Q |
| 2825 | { 2236, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_H |
| 2826 | { 2235, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_D |
| 2827 | { 2234, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_B |
| 2828 | { 2233, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 426, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // XVREPLGR2VR_W |
| 2829 | { 2232, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 426, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // XVREPLGR2VR_H |
| 2830 | { 2231, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 426, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // XVREPLGR2VR_D |
| 2831 | { 2230, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 426, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // XVREPLGR2VR_B |
| 2832 | { 2229, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVREPL128VEI_W |
| 2833 | { 2228, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVREPL128VEI_H |
| 2834 | { 2227, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVREPL128VEI_D |
| 2835 | { 2226, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVREPL128VEI_B |
| 2836 | { 2225, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVPICKVE_W |
| 2837 | { 2224, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVPICKVE_D |
| 2838 | { 2223, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 423, 0, 0, 0x0ULL }, // XVPICKVE2GR_WU |
| 2839 | { 2222, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 423, 0, 0, 0x0ULL }, // XVPICKVE2GR_W |
| 2840 | { 2221, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 423, 0, 0, 0x0ULL }, // XVPICKVE2GR_DU |
| 2841 | { 2220, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 423, 0, 0, 0x0ULL }, // XVPICKVE2GR_D |
| 2842 | { 2219, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKOD_W |
| 2843 | { 2218, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKOD_H |
| 2844 | { 2217, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKOD_D |
| 2845 | { 2216, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKOD_B |
| 2846 | { 2215, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKEV_W |
| 2847 | { 2214, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKEV_H |
| 2848 | { 2213, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKEV_D |
| 2849 | { 2212, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKEV_B |
| 2850 | { 2211, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPERM_W |
| 2851 | { 2210, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVPERMI_W |
| 2852 | { 2209, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVPERMI_Q |
| 2853 | { 2208, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVPERMI_D |
| 2854 | { 2207, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVPCNT_W |
| 2855 | { 2206, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVPCNT_H |
| 2856 | { 2205, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVPCNT_D |
| 2857 | { 2204, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVPCNT_B |
| 2858 | { 2203, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKOD_W |
| 2859 | { 2202, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKOD_H |
| 2860 | { 2201, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKOD_D |
| 2861 | { 2200, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKOD_B |
| 2862 | { 2199, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKEV_W |
| 2863 | { 2198, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKEV_H |
| 2864 | { 2197, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKEV_D |
| 2865 | { 2196, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKEV_B |
| 2866 | { 2195, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVOR_V |
| 2867 | { 2194, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVORN_V |
| 2868 | { 2193, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVORI_B |
| 2869 | { 2192, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVNOR_V |
| 2870 | { 2191, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVNORI_B |
| 2871 | { 2190, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVNEG_W |
| 2872 | { 2189, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVNEG_H |
| 2873 | { 2188, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVNEG_D |
| 2874 | { 2187, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVNEG_B |
| 2875 | { 2186, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUL_W |
| 2876 | { 2185, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUL_H |
| 2877 | { 2184, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUL_D |
| 2878 | { 2183, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUL_B |
| 2879 | { 2182, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_W_HU_H |
| 2880 | { 2181, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_W_HU |
| 2881 | { 2180, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_W_H |
| 2882 | { 2179, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_Q_DU_D |
| 2883 | { 2178, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_Q_DU |
| 2884 | { 2177, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_Q_D |
| 2885 | { 2176, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_H_BU_B |
| 2886 | { 2175, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_H_BU |
| 2887 | { 2174, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_H_B |
| 2888 | { 2173, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_D_WU_W |
| 2889 | { 2172, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_D_WU |
| 2890 | { 2171, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_D_W |
| 2891 | { 2170, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_W_HU_H |
| 2892 | { 2169, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_W_HU |
| 2893 | { 2168, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_W_H |
| 2894 | { 2167, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_Q_DU_D |
| 2895 | { 2166, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_Q_DU |
| 2896 | { 2165, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_Q_D |
| 2897 | { 2164, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_H_BU_B |
| 2898 | { 2163, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_H_BU |
| 2899 | { 2162, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_H_B |
| 2900 | { 2161, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_D_WU_W |
| 2901 | { 2160, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_D_WU |
| 2902 | { 2159, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_D_W |
| 2903 | { 2158, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_WU |
| 2904 | { 2157, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_W |
| 2905 | { 2156, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_HU |
| 2906 | { 2155, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_H |
| 2907 | { 2154, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_DU |
| 2908 | { 2153, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_D |
| 2909 | { 2152, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_BU |
| 2910 | { 2151, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_B |
| 2911 | { 2150, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMSUB_W |
| 2912 | { 2149, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMSUB_H |
| 2913 | { 2148, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMSUB_D |
| 2914 | { 2147, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMSUB_B |
| 2915 | { 2146, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKNZ_B |
| 2916 | { 2145, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKLTZ_W |
| 2917 | { 2144, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKLTZ_H |
| 2918 | { 2143, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKLTZ_D |
| 2919 | { 2142, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKLTZ_B |
| 2920 | { 2141, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKGEZ_B |
| 2921 | { 2140, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_WU |
| 2922 | { 2139, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_W |
| 2923 | { 2138, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_HU |
| 2924 | { 2137, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_H |
| 2925 | { 2136, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_DU |
| 2926 | { 2135, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_D |
| 2927 | { 2134, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_BU |
| 2928 | { 2133, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_B |
| 2929 | { 2132, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_WU |
| 2930 | { 2131, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_W |
| 2931 | { 2130, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_HU |
| 2932 | { 2129, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_H |
| 2933 | { 2128, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_DU |
| 2934 | { 2127, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_D |
| 2935 | { 2126, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_BU |
| 2936 | { 2125, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_B |
| 2937 | { 2124, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_WU |
| 2938 | { 2123, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_W |
| 2939 | { 2122, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_HU |
| 2940 | { 2121, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_H |
| 2941 | { 2120, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_DU |
| 2942 | { 2119, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_D |
| 2943 | { 2118, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_BU |
| 2944 | { 2117, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_B |
| 2945 | { 2116, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_WU |
| 2946 | { 2115, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_W |
| 2947 | { 2114, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_HU |
| 2948 | { 2113, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_H |
| 2949 | { 2112, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_DU |
| 2950 | { 2111, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_D |
| 2951 | { 2110, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_BU |
| 2952 | { 2109, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_B |
| 2953 | { 2108, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_WU |
| 2954 | { 2107, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_W |
| 2955 | { 2106, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_HU |
| 2956 | { 2105, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_H |
| 2957 | { 2104, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_DU |
| 2958 | { 2103, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_D |
| 2959 | { 2102, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_BU |
| 2960 | { 2101, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_B |
| 2961 | { 2100, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADD_W |
| 2962 | { 2099, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADD_H |
| 2963 | { 2098, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADD_D |
| 2964 | { 2097, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADD_B |
| 2965 | { 2096, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_W_HU_H |
| 2966 | { 2095, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_W_HU |
| 2967 | { 2094, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_W_H |
| 2968 | { 2093, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_Q_DU_D |
| 2969 | { 2092, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_Q_DU |
| 2970 | { 2091, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_Q_D |
| 2971 | { 2090, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_H_BU_B |
| 2972 | { 2089, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_H_BU |
| 2973 | { 2088, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_H_B |
| 2974 | { 2087, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_D_WU_W |
| 2975 | { 2086, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_D_WU |
| 2976 | { 2085, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_D_W |
| 2977 | { 2084, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_W_HU_H |
| 2978 | { 2083, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_W_HU |
| 2979 | { 2082, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_W_H |
| 2980 | { 2081, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_Q_DU_D |
| 2981 | { 2080, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_Q_DU |
| 2982 | { 2079, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_Q_D |
| 2983 | { 2078, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_H_BU_B |
| 2984 | { 2077, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_H_BU |
| 2985 | { 2076, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_H_B |
| 2986 | { 2075, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_D_WU_W |
| 2987 | { 2074, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_D_WU |
| 2988 | { 2073, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_D_W |
| 2989 | { 2072, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 420, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDX |
| 2990 | { 2071, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDREPL_W |
| 2991 | { 2070, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDREPL_H |
| 2992 | { 2069, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDREPL_D |
| 2993 | { 2068, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDREPL_B |
| 2994 | { 2067, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0, 0x0ULL }, // XVLDI |
| 2995 | { 2066, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLD |
| 2996 | { 2065, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVINSVE0_W |
| 2997 | { 2064, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVINSVE0_D |
| 2998 | { 2063, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 221, 0, 0, 0x0ULL }, // XVINSGR2VR_W |
| 2999 | { 2062, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 221, 0, 0, 0x0ULL }, // XVINSGR2VR_D |
| 3000 | { 2061, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVL_W |
| 3001 | { 2060, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVL_H |
| 3002 | { 2059, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVL_D |
| 3003 | { 2058, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVL_B |
| 3004 | { 2057, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVH_W |
| 3005 | { 2056, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVH_H |
| 3006 | { 2055, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVH_D |
| 3007 | { 2054, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVH_B |
| 3008 | { 2053, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_W_H |
| 3009 | { 2052, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_WU_HU |
| 3010 | { 2051, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_Q_D |
| 3011 | { 2050, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_QU_DU |
| 3012 | { 2049, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_H_B |
| 3013 | { 2048, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_HU_BU |
| 3014 | { 2047, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_D_W |
| 3015 | { 2046, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_DU_WU |
| 3016 | { 2045, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVHSELI_D |
| 3017 | { 2044, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_W_H |
| 3018 | { 2043, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_WU_HU |
| 3019 | { 2042, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_Q_D |
| 3020 | { 2041, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_QU_DU |
| 3021 | { 2040, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_H_B |
| 3022 | { 2039, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_HU_BU |
| 3023 | { 2038, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_D_W |
| 3024 | { 2037, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_DU_WU |
| 3025 | { 2036, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINT_W_S |
| 3026 | { 2035, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINT_W_D |
| 3027 | { 2034, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINT_WU_S |
| 3028 | { 2033, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINT_L_D |
| 3029 | { 2032, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINT_LU_D |
| 3030 | { 2031, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZ_W_S |
| 3031 | { 2030, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINTRZ_W_D |
| 3032 | { 2029, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZ_WU_S |
| 3033 | { 2028, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZ_L_D |
| 3034 | { 2027, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZ_LU_D |
| 3035 | { 2026, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZL_L_S |
| 3036 | { 2025, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZH_L_S |
| 3037 | { 2024, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRP_W_S |
| 3038 | { 2023, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINTRP_W_D |
| 3039 | { 2022, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRP_L_D |
| 3040 | { 2021, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRPL_L_S |
| 3041 | { 2020, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRPH_L_S |
| 3042 | { 2019, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRNE_W_S |
| 3043 | { 2018, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINTRNE_W_D |
| 3044 | { 2017, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRNE_L_D |
| 3045 | { 2016, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRNEL_L_S |
| 3046 | { 2015, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRNEH_L_S |
| 3047 | { 2014, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRM_W_S |
| 3048 | { 2013, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINTRM_W_D |
| 3049 | { 2012, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRM_L_D |
| 3050 | { 2011, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRML_L_S |
| 3051 | { 2010, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRMH_L_S |
| 3052 | { 2009, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTL_L_S |
| 3053 | { 2008, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTH_L_S |
| 3054 | { 2007, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFSUB_S |
| 3055 | { 2006, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFSUB_D |
| 3056 | { 2005, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFSQRT_S |
| 3057 | { 2004, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFSQRT_D |
| 3058 | { 2003, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVFRSTP_H |
| 3059 | { 2002, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVFRSTP_B |
| 3060 | { 2001, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVFRSTPI_H |
| 3061 | { 2000, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVFRSTPI_B |
| 3062 | { 1999, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRSQRT_S |
| 3063 | { 1998, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRSQRT_D |
| 3064 | { 1997, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRSQRTE_S |
| 3065 | { 1996, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRSQRTE_D |
| 3066 | { 1995, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINT_S |
| 3067 | { 1994, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINT_D |
| 3068 | { 1993, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRZ_S |
| 3069 | { 1992, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRZ_D |
| 3070 | { 1991, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRP_S |
| 3071 | { 1990, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRP_D |
| 3072 | { 1989, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRNE_S |
| 3073 | { 1988, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRNE_D |
| 3074 | { 1987, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRM_S |
| 3075 | { 1986, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRM_D |
| 3076 | { 1985, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRECIP_S |
| 3077 | { 1984, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRECIP_D |
| 3078 | { 1983, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRECIPE_S |
| 3079 | { 1982, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRECIPE_D |
| 3080 | { 1981, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFNMSUB_S |
| 3081 | { 1980, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFNMSUB_D |
| 3082 | { 1979, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFNMADD_S |
| 3083 | { 1978, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFNMADD_D |
| 3084 | { 1977, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMUL_S |
| 3085 | { 1976, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMUL_D |
| 3086 | { 1975, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFMSUB_S |
| 3087 | { 1974, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFMSUB_D |
| 3088 | { 1973, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMIN_S |
| 3089 | { 1972, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMIN_D |
| 3090 | { 1971, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMINA_S |
| 3091 | { 1970, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMINA_D |
| 3092 | { 1969, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMAX_S |
| 3093 | { 1968, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMAX_D |
| 3094 | { 1967, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMAXA_S |
| 3095 | { 1966, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMAXA_D |
| 3096 | { 1965, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFMADD_S |
| 3097 | { 1964, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFMADD_D |
| 3098 | { 1963, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFLOGB_S |
| 3099 | { 1962, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFLOGB_D |
| 3100 | { 1961, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINT_S_WU |
| 3101 | { 1960, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINT_S_W |
| 3102 | { 1959, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFFINT_S_L |
| 3103 | { 1958, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINT_D_LU |
| 3104 | { 1957, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINT_D_L |
| 3105 | { 1956, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINTL_D_W |
| 3106 | { 1955, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINTH_D_W |
| 3107 | { 1954, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFDIV_S |
| 3108 | { 1953, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFDIV_D |
| 3109 | { 1952, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCVT_S_D |
| 3110 | { 1951, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCVT_H_S |
| 3111 | { 1950, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCVTL_S_H |
| 3112 | { 1949, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCVTL_D_S |
| 3113 | { 1948, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCVTH_S_H |
| 3114 | { 1947, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCVTH_D_S |
| 3115 | { 1946, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUN_S |
| 3116 | { 1945, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUN_D |
| 3117 | { 1944, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUNE_S |
| 3118 | { 1943, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUNE_D |
| 3119 | { 1942, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SULT_S |
| 3120 | { 1941, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SULT_D |
| 3121 | { 1940, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SULE_S |
| 3122 | { 1939, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SULE_D |
| 3123 | { 1938, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUEQ_S |
| 3124 | { 1937, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUEQ_D |
| 3125 | { 1936, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SOR_S |
| 3126 | { 1935, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SOR_D |
| 3127 | { 1934, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SNE_S |
| 3128 | { 1933, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SNE_D |
| 3129 | { 1932, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SLT_S |
| 3130 | { 1931, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SLT_D |
| 3131 | { 1930, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SLE_S |
| 3132 | { 1929, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SLE_D |
| 3133 | { 1928, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SEQ_S |
| 3134 | { 1927, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SEQ_D |
| 3135 | { 1926, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SAF_S |
| 3136 | { 1925, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SAF_D |
| 3137 | { 1924, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUN_S |
| 3138 | { 1923, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUN_D |
| 3139 | { 1922, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUNE_S |
| 3140 | { 1921, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUNE_D |
| 3141 | { 1920, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CULT_S |
| 3142 | { 1919, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CULT_D |
| 3143 | { 1918, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CULE_S |
| 3144 | { 1917, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CULE_D |
| 3145 | { 1916, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUEQ_S |
| 3146 | { 1915, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUEQ_D |
| 3147 | { 1914, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_COR_S |
| 3148 | { 1913, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_COR_D |
| 3149 | { 1912, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CNE_S |
| 3150 | { 1911, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CNE_D |
| 3151 | { 1910, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CLT_S |
| 3152 | { 1909, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CLT_D |
| 3153 | { 1908, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CLE_S |
| 3154 | { 1907, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CLE_D |
| 3155 | { 1906, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CEQ_S |
| 3156 | { 1905, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CEQ_D |
| 3157 | { 1904, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CAF_S |
| 3158 | { 1903, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CAF_D |
| 3159 | { 1902, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCLASS_S |
| 3160 | { 1901, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCLASS_D |
| 3161 | { 1900, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFADD_S |
| 3162 | { 1899, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFADD_D |
| 3163 | { 1898, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVEXTRINS_W |
| 3164 | { 1897, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVEXTRINS_H |
| 3165 | { 1896, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVEXTRINS_D |
| 3166 | { 1895, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVEXTRINS_B |
| 3167 | { 1894, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTL_Q_D |
| 3168 | { 1893, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTL_QU_DU |
| 3169 | { 1892, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_W_H |
| 3170 | { 1891, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_WU_HU |
| 3171 | { 1890, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_Q_D |
| 3172 | { 1889, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_QU_DU |
| 3173 | { 1888, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_H_B |
| 3174 | { 1887, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_HU_BU |
| 3175 | { 1886, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_D_W |
| 3176 | { 1885, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_DU_WU |
| 3177 | { 1884, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_WU |
| 3178 | { 1883, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_W |
| 3179 | { 1882, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_HU |
| 3180 | { 1881, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_H |
| 3181 | { 1880, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_DU |
| 3182 | { 1879, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_D |
| 3183 | { 1878, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_BU |
| 3184 | { 1877, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_B |
| 3185 | { 1876, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLZ_W |
| 3186 | { 1875, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLZ_H |
| 3187 | { 1874, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLZ_D |
| 3188 | { 1873, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLZ_B |
| 3189 | { 1872, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLO_W |
| 3190 | { 1871, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLO_H |
| 3191 | { 1870, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLO_D |
| 3192 | { 1869, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLO_B |
| 3193 | { 1868, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBSRL_V |
| 3194 | { 1867, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBSLL_V |
| 3195 | { 1866, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITSET_W |
| 3196 | { 1865, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITSET_H |
| 3197 | { 1864, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITSET_D |
| 3198 | { 1863, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITSET_B |
| 3199 | { 1862, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITSETI_W |
| 3200 | { 1861, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITSETI_H |
| 3201 | { 1860, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITSETI_D |
| 3202 | { 1859, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITSETI_B |
| 3203 | { 1858, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVBITSEL_V |
| 3204 | { 1857, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVBITSELI_B |
| 3205 | { 1856, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITREV_W |
| 3206 | { 1855, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITREV_H |
| 3207 | { 1854, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITREV_D |
| 3208 | { 1853, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITREV_B |
| 3209 | { 1852, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITREVI_W |
| 3210 | { 1851, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITREVI_H |
| 3211 | { 1850, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITREVI_D |
| 3212 | { 1849, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITREVI_B |
| 3213 | { 1848, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITCLR_W |
| 3214 | { 1847, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITCLR_H |
| 3215 | { 1846, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITCLR_D |
| 3216 | { 1845, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITCLR_B |
| 3217 | { 1844, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITCLRI_W |
| 3218 | { 1843, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITCLRI_H |
| 3219 | { 1842, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITCLRI_D |
| 3220 | { 1841, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITCLRI_B |
| 3221 | { 1840, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_WU |
| 3222 | { 1839, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_W |
| 3223 | { 1838, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_HU |
| 3224 | { 1837, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_H |
| 3225 | { 1836, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_DU |
| 3226 | { 1835, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_D |
| 3227 | { 1834, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_BU |
| 3228 | { 1833, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_B |
| 3229 | { 1832, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_WU |
| 3230 | { 1831, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_W |
| 3231 | { 1830, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_HU |
| 3232 | { 1829, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_H |
| 3233 | { 1828, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_DU |
| 3234 | { 1827, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_D |
| 3235 | { 1826, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_BU |
| 3236 | { 1825, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_B |
| 3237 | { 1824, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAND_V |
| 3238 | { 1823, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVANDN_V |
| 3239 | { 1822, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVANDI_B |
| 3240 | { 1821, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_W |
| 3241 | { 1820, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_Q |
| 3242 | { 1819, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_H |
| 3243 | { 1818, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_D |
| 3244 | { 1817, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_B |
| 3245 | { 1816, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_W_HU_H |
| 3246 | { 1815, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_W_HU |
| 3247 | { 1814, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_W_H |
| 3248 | { 1813, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_Q_DU_D |
| 3249 | { 1812, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_Q_DU |
| 3250 | { 1811, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_Q_D |
| 3251 | { 1810, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_H_BU_B |
| 3252 | { 1809, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_H_BU |
| 3253 | { 1808, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_H_B |
| 3254 | { 1807, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_D_WU_W |
| 3255 | { 1806, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_D_WU |
| 3256 | { 1805, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_D_W |
| 3257 | { 1804, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_W_HU_H |
| 3258 | { 1803, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_W_HU |
| 3259 | { 1802, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_W_H |
| 3260 | { 1801, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_Q_DU_D |
| 3261 | { 1800, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_Q_DU |
| 3262 | { 1799, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_Q_D |
| 3263 | { 1798, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_H_BU_B |
| 3264 | { 1797, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_H_BU |
| 3265 | { 1796, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_H_B |
| 3266 | { 1795, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_D_WU_W |
| 3267 | { 1794, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_D_WU |
| 3268 | { 1793, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_D_W |
| 3269 | { 1792, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVADDI_WU |
| 3270 | { 1791, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVADDI_HU |
| 3271 | { 1790, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVADDI_DU |
| 3272 | { 1789, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVADDI_BU |
| 3273 | { 1788, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDA_W |
| 3274 | { 1787, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDA_H |
| 3275 | { 1786, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDA_D |
| 3276 | { 1785, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDA_B |
| 3277 | { 1784, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_WU |
| 3278 | { 1783, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_W |
| 3279 | { 1782, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_HU |
| 3280 | { 1781, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_H |
| 3281 | { 1780, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_DU |
| 3282 | { 1779, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_D |
| 3283 | { 1778, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_BU |
| 3284 | { 1777, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_B |
| 3285 | { 1776, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // XORI |
| 3286 | { 1775, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // XOR |
| 3287 | { 1774, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86XOR_W |
| 3288 | { 1773, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86XOR_H |
| 3289 | { 1772, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86XOR_D |
| 3290 | { 1771, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86XOR_B |
| 3291 | { 1770, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_WU |
| 3292 | { 1769, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_W |
| 3293 | { 1768, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_H |
| 3294 | { 1767, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_DU |
| 3295 | { 1766, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_D |
| 3296 | { 1765, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_B |
| 3297 | { 1764, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRL_W |
| 3298 | { 1763, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRL_H |
| 3299 | { 1762, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRL_D |
| 3300 | { 1761, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRL_B |
| 3301 | { 1760, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRLI_W |
| 3302 | { 1759, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRLI_H |
| 3303 | { 1758, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRLI_D |
| 3304 | { 1757, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRLI_B |
| 3305 | { 1756, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRA_W |
| 3306 | { 1755, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRA_H |
| 3307 | { 1754, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRA_D |
| 3308 | { 1753, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRA_B |
| 3309 | { 1752, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRAI_W |
| 3310 | { 1751, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRAI_H |
| 3311 | { 1750, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRAI_D |
| 3312 | { 1749, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRAI_B |
| 3313 | { 1748, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SLL_W |
| 3314 | { 1747, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SLL_H |
| 3315 | { 1746, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SLL_D |
| 3316 | { 1745, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SLL_B |
| 3317 | { 1744, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SLLI_W |
| 3318 | { 1743, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SLLI_H |
| 3319 | { 1742, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SLLI_D |
| 3320 | { 1741, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SLLI_B |
| 3321 | { 1740, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0, 0x0ULL }, // X86SETTM |
| 3322 | { 1739, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // X86SETTAG |
| 3323 | { 1738, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SBC_W |
| 3324 | { 1737, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SBC_H |
| 3325 | { 1736, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SBC_D |
| 3326 | { 1735, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SBC_B |
| 3327 | { 1734, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTR_W |
| 3328 | { 1733, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTR_H |
| 3329 | { 1732, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTR_D |
| 3330 | { 1731, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTR_B |
| 3331 | { 1730, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTRI_W |
| 3332 | { 1729, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTRI_H |
| 3333 | { 1728, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTRI_D |
| 3334 | { 1727, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTRI_B |
| 3335 | { 1726, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTL_W |
| 3336 | { 1725, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTL_H |
| 3337 | { 1724, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTL_D |
| 3338 | { 1723, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTL_B |
| 3339 | { 1722, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTLI_W |
| 3340 | { 1721, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTLI_H |
| 3341 | { 1720, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTLI_D |
| 3342 | { 1719, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTLI_B |
| 3343 | { 1718, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCR_W |
| 3344 | { 1717, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCR_H |
| 3345 | { 1716, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCR_D |
| 3346 | { 1715, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCR_B |
| 3347 | { 1714, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCRI_W |
| 3348 | { 1713, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCRI_H |
| 3349 | { 1712, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCRI_D |
| 3350 | { 1711, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCRI_B |
| 3351 | { 1710, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCL_W |
| 3352 | { 1709, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCL_H |
| 3353 | { 1708, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCL_D |
| 3354 | { 1707, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCL_B |
| 3355 | { 1706, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCLI_W |
| 3356 | { 1705, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCLI_H |
| 3357 | { 1704, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCLI_D |
| 3358 | { 1703, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCLI_B |
| 3359 | { 1702, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86OR_W |
| 3360 | { 1701, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86OR_H |
| 3361 | { 1700, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86OR_D |
| 3362 | { 1699, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86OR_B |
| 3363 | { 1698, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_WU |
| 3364 | { 1697, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_W |
| 3365 | { 1696, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_HU |
| 3366 | { 1695, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_H |
| 3367 | { 1694, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_DU |
| 3368 | { 1693, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_D |
| 3369 | { 1692, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_BU |
| 3370 | { 1691, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_B |
| 3371 | { 1690, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0, 0x0ULL }, // X86MTTOP |
| 3372 | { 1689, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86MTFLAG |
| 3373 | { 1688, 1, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86MFTOP |
| 3374 | { 1687, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86MFFLAG |
| 3375 | { 1686, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86INC_W |
| 3376 | { 1685, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86INC_H |
| 3377 | { 1684, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86INC_D |
| 3378 | { 1683, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86INC_B |
| 3379 | { 1682, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0, 0x0ULL }, // X86INCTOP |
| 3380 | { 1681, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86DEC_W |
| 3381 | { 1680, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86DEC_H |
| 3382 | { 1679, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86DEC_D |
| 3383 | { 1678, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86DEC_B |
| 3384 | { 1677, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0, 0x0ULL }, // X86DECTOP |
| 3385 | { 1676, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0, 0x0ULL }, // X86CLRTM |
| 3386 | { 1675, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86AND_W |
| 3387 | { 1674, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86AND_H |
| 3388 | { 1673, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86AND_D |
| 3389 | { 1672, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86AND_B |
| 3390 | { 1671, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_WU |
| 3391 | { 1670, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_W |
| 3392 | { 1669, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_H |
| 3393 | { 1668, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_DU |
| 3394 | { 1667, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_D |
| 3395 | { 1666, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_B |
| 3396 | { 1665, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADC_W |
| 3397 | { 1664, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADC_H |
| 3398 | { 1663, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADC_D |
| 3399 | { 1662, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADC_B |
| 3400 | { 1661, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VXOR_V |
| 3401 | { 1660, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VXORI_B |
| 3402 | { 1659, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_W |
| 3403 | { 1658, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_Q |
| 3404 | { 1657, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_H |
| 3405 | { 1656, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_D |
| 3406 | { 1655, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_B |
| 3407 | { 1654, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_W_HU |
| 3408 | { 1653, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_W_H |
| 3409 | { 1652, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_Q_DU |
| 3410 | { 1651, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_Q_D |
| 3411 | { 1650, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_H_BU |
| 3412 | { 1649, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_H_B |
| 3413 | { 1648, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_D_WU |
| 3414 | { 1647, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_D_W |
| 3415 | { 1646, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_W_HU |
| 3416 | { 1645, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_W_H |
| 3417 | { 1644, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_Q_DU |
| 3418 | { 1643, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_Q_D |
| 3419 | { 1642, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_H_BU |
| 3420 | { 1641, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_H_B |
| 3421 | { 1640, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_D_WU |
| 3422 | { 1639, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_D_W |
| 3423 | { 1638, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSUBI_WU |
| 3424 | { 1637, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSUBI_HU |
| 3425 | { 1636, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSUBI_DU |
| 3426 | { 1635, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSUBI_BU |
| 3427 | { 1634, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 382, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTX |
| 3428 | { 1633, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 395, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTELM_W |
| 3429 | { 1632, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 395, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTELM_H |
| 3430 | { 1631, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 395, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTELM_D |
| 3431 | { 1630, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 395, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTELM_B |
| 3432 | { 1629, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VST |
| 3433 | { 1628, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_WU |
| 3434 | { 1627, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_W |
| 3435 | { 1626, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_HU |
| 3436 | { 1625, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_H |
| 3437 | { 1624, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_DU |
| 3438 | { 1623, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_D |
| 3439 | { 1622, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_BU |
| 3440 | { 1621, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_B |
| 3441 | { 1620, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_W_D |
| 3442 | { 1619, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_WU_D |
| 3443 | { 1618, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_H_W |
| 3444 | { 1617, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_HU_W |
| 3445 | { 1616, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_B_H |
| 3446 | { 1615, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_BU_H |
| 3447 | { 1614, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_W_D |
| 3448 | { 1613, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_WU_D |
| 3449 | { 1612, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_H_W |
| 3450 | { 1611, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_HU_W |
| 3451 | { 1610, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_D_Q |
| 3452 | { 1609, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_DU_Q |
| 3453 | { 1608, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_B_H |
| 3454 | { 1607, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_BU_H |
| 3455 | { 1606, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_W_D |
| 3456 | { 1605, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_WU_D |
| 3457 | { 1604, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_H_W |
| 3458 | { 1603, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_HU_W |
| 3459 | { 1602, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_B_H |
| 3460 | { 1601, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_BU_H |
| 3461 | { 1600, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_W_D |
| 3462 | { 1599, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_WU_D |
| 3463 | { 1598, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_H_W |
| 3464 | { 1597, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_HU_W |
| 3465 | { 1596, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_D_Q |
| 3466 | { 1595, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_DU_Q |
| 3467 | { 1594, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_B_H |
| 3468 | { 1593, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_BU_H |
| 3469 | { 1592, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_W_D |
| 3470 | { 1591, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_WU_D |
| 3471 | { 1590, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_H_W |
| 3472 | { 1589, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_HU_W |
| 3473 | { 1588, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_B_H |
| 3474 | { 1587, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_BU_H |
| 3475 | { 1586, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_W_D |
| 3476 | { 1585, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_WU_D |
| 3477 | { 1584, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_H_W |
| 3478 | { 1583, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_HU_W |
| 3479 | { 1582, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_D_Q |
| 3480 | { 1581, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_DU_Q |
| 3481 | { 1580, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_B_H |
| 3482 | { 1579, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_BU_H |
| 3483 | { 1578, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_W_D |
| 3484 | { 1577, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_WU_D |
| 3485 | { 1576, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_H_W |
| 3486 | { 1575, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_HU_W |
| 3487 | { 1574, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_B_H |
| 3488 | { 1573, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_BU_H |
| 3489 | { 1572, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_W_D |
| 3490 | { 1571, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_WU_D |
| 3491 | { 1570, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_H_W |
| 3492 | { 1569, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_HU_W |
| 3493 | { 1568, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_D_Q |
| 3494 | { 1567, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_DU_Q |
| 3495 | { 1566, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_B_H |
| 3496 | { 1565, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_BU_H |
| 3497 | { 1564, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRL_W |
| 3498 | { 1563, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRL_H |
| 3499 | { 1562, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRL_D |
| 3500 | { 1561, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRL_B |
| 3501 | { 1560, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLR_W |
| 3502 | { 1559, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLR_H |
| 3503 | { 1558, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLR_D |
| 3504 | { 1557, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLR_B |
| 3505 | { 1556, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLRN_W_D |
| 3506 | { 1555, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLRN_H_W |
| 3507 | { 1554, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLRN_B_H |
| 3508 | { 1553, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLRNI_W_D |
| 3509 | { 1552, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLRNI_H_W |
| 3510 | { 1551, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLRNI_D_Q |
| 3511 | { 1550, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLRNI_B_H |
| 3512 | { 1549, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLRI_W |
| 3513 | { 1548, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLRI_H |
| 3514 | { 1547, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLRI_D |
| 3515 | { 1546, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLRI_B |
| 3516 | { 1545, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLN_W_D |
| 3517 | { 1544, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLN_H_W |
| 3518 | { 1543, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLN_B_H |
| 3519 | { 1542, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLNI_W_D |
| 3520 | { 1541, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLNI_H_W |
| 3521 | { 1540, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLNI_D_Q |
| 3522 | { 1539, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLNI_B_H |
| 3523 | { 1538, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLI_W |
| 3524 | { 1537, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLI_H |
| 3525 | { 1536, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLI_D |
| 3526 | { 1535, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLI_B |
| 3527 | { 1534, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRA_W |
| 3528 | { 1533, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRA_H |
| 3529 | { 1532, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRA_D |
| 3530 | { 1531, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRA_B |
| 3531 | { 1530, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAR_W |
| 3532 | { 1529, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAR_H |
| 3533 | { 1528, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAR_D |
| 3534 | { 1527, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAR_B |
| 3535 | { 1526, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRARN_W_D |
| 3536 | { 1525, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRARN_H_W |
| 3537 | { 1524, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRARN_B_H |
| 3538 | { 1523, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRARNI_W_D |
| 3539 | { 1522, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRARNI_H_W |
| 3540 | { 1521, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRARNI_D_Q |
| 3541 | { 1520, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRARNI_B_H |
| 3542 | { 1519, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRARI_W |
| 3543 | { 1518, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRARI_H |
| 3544 | { 1517, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRARI_D |
| 3545 | { 1516, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRARI_B |
| 3546 | { 1515, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAN_W_D |
| 3547 | { 1514, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAN_H_W |
| 3548 | { 1513, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAN_B_H |
| 3549 | { 1512, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRANI_W_D |
| 3550 | { 1511, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRANI_H_W |
| 3551 | { 1510, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRANI_D_Q |
| 3552 | { 1509, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRANI_B_H |
| 3553 | { 1508, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRAI_W |
| 3554 | { 1507, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRAI_H |
| 3555 | { 1506, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRAI_D |
| 3556 | { 1505, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRAI_B |
| 3557 | { 1504, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_WU |
| 3558 | { 1503, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_W |
| 3559 | { 1502, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_HU |
| 3560 | { 1501, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_H |
| 3561 | { 1500, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_DU |
| 3562 | { 1499, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_D |
| 3563 | { 1498, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_BU |
| 3564 | { 1497, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_B |
| 3565 | { 1496, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_WU |
| 3566 | { 1495, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_W |
| 3567 | { 1494, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_HU |
| 3568 | { 1493, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_H |
| 3569 | { 1492, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_DU |
| 3570 | { 1491, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_D |
| 3571 | { 1490, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_BU |
| 3572 | { 1489, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_B |
| 3573 | { 1488, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLL_W |
| 3574 | { 1487, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLL_H |
| 3575 | { 1486, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLL_D |
| 3576 | { 1485, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLL_B |
| 3577 | { 1484, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_W_H |
| 3578 | { 1483, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_WU_HU |
| 3579 | { 1482, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_H_B |
| 3580 | { 1481, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_HU_BU |
| 3581 | { 1480, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_D_W |
| 3582 | { 1479, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_DU_WU |
| 3583 | { 1478, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLI_W |
| 3584 | { 1477, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLI_H |
| 3585 | { 1476, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLI_D |
| 3586 | { 1475, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLI_B |
| 3587 | { 1474, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_WU |
| 3588 | { 1473, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_W |
| 3589 | { 1472, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_HU |
| 3590 | { 1471, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_H |
| 3591 | { 1470, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_DU |
| 3592 | { 1469, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_D |
| 3593 | { 1468, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_BU |
| 3594 | { 1467, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_B |
| 3595 | { 1466, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_WU |
| 3596 | { 1465, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_W |
| 3597 | { 1464, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_HU |
| 3598 | { 1463, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_H |
| 3599 | { 1462, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_DU |
| 3600 | { 1461, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_D |
| 3601 | { 1460, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_BU |
| 3602 | { 1459, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_B |
| 3603 | { 1458, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSIGNCOV_W |
| 3604 | { 1457, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSIGNCOV_H |
| 3605 | { 1456, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSIGNCOV_D |
| 3606 | { 1455, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSIGNCOV_B |
| 3607 | { 1454, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VSHUF_W |
| 3608 | { 1453, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VSHUF_H |
| 3609 | { 1452, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VSHUF_D |
| 3610 | { 1451, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VSHUF_B |
| 3611 | { 1450, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSHUF4I_W |
| 3612 | { 1449, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSHUF4I_H |
| 3613 | { 1448, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSHUF4I_D |
| 3614 | { 1447, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSHUF4I_B |
| 3615 | { 1446, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETNEZ_V |
| 3616 | { 1445, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETEQZ_V |
| 3617 | { 1444, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETANYEQZ_W |
| 3618 | { 1443, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETANYEQZ_H |
| 3619 | { 1442, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETANYEQZ_D |
| 3620 | { 1441, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETANYEQZ_B |
| 3621 | { 1440, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETALLNEZ_W |
| 3622 | { 1439, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETALLNEZ_H |
| 3623 | { 1438, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETALLNEZ_D |
| 3624 | { 1437, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETALLNEZ_B |
| 3625 | { 1436, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSEQ_W |
| 3626 | { 1435, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSEQ_H |
| 3627 | { 1434, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSEQ_D |
| 3628 | { 1433, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSEQ_B |
| 3629 | { 1432, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSEQI_W |
| 3630 | { 1431, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSEQI_H |
| 3631 | { 1430, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSEQI_D |
| 3632 | { 1429, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSEQI_B |
| 3633 | { 1428, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_WU |
| 3634 | { 1427, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_W |
| 3635 | { 1426, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_HU |
| 3636 | { 1425, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_H |
| 3637 | { 1424, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_DU |
| 3638 | { 1423, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_D |
| 3639 | { 1422, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_BU |
| 3640 | { 1421, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_B |
| 3641 | { 1420, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_WU |
| 3642 | { 1419, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_W |
| 3643 | { 1418, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_HU |
| 3644 | { 1417, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_H |
| 3645 | { 1416, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_DU |
| 3646 | { 1415, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_D |
| 3647 | { 1414, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_BU |
| 3648 | { 1413, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_B |
| 3649 | { 1412, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VROTR_W |
| 3650 | { 1411, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VROTR_H |
| 3651 | { 1410, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VROTR_D |
| 3652 | { 1409, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VROTR_B |
| 3653 | { 1408, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VROTRI_W |
| 3654 | { 1407, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VROTRI_H |
| 3655 | { 1406, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VROTRI_D |
| 3656 | { 1405, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VROTRI_B |
| 3657 | { 1404, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 390, 0, 0, 0x0ULL }, // VREPLVE_W |
| 3658 | { 1403, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 390, 0, 0, 0x0ULL }, // VREPLVE_H |
| 3659 | { 1402, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 390, 0, 0, 0x0ULL }, // VREPLVE_D |
| 3660 | { 1401, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 390, 0, 0, 0x0ULL }, // VREPLVE_B |
| 3661 | { 1400, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VREPLVEI_W |
| 3662 | { 1399, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VREPLVEI_H |
| 3663 | { 1398, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VREPLVEI_D |
| 3664 | { 1397, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VREPLVEI_B |
| 3665 | { 1396, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 388, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // VREPLGR2VR_W |
| 3666 | { 1395, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 388, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // VREPLGR2VR_H |
| 3667 | { 1394, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 388, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // VREPLGR2VR_D |
| 3668 | { 1393, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 388, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // VREPLGR2VR_B |
| 3669 | { 1392, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_WU |
| 3670 | { 1391, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_W |
| 3671 | { 1390, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_HU |
| 3672 | { 1389, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_H |
| 3673 | { 1388, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_DU |
| 3674 | { 1387, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_D |
| 3675 | { 1386, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_BU |
| 3676 | { 1385, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_B |
| 3677 | { 1384, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKOD_W |
| 3678 | { 1383, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKOD_H |
| 3679 | { 1382, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKOD_D |
| 3680 | { 1381, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKOD_B |
| 3681 | { 1380, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKEV_W |
| 3682 | { 1379, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKEV_H |
| 3683 | { 1378, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKEV_D |
| 3684 | { 1377, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKEV_B |
| 3685 | { 1376, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VPERMI_W |
| 3686 | { 1375, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VPCNT_W |
| 3687 | { 1374, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VPCNT_H |
| 3688 | { 1373, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VPCNT_D |
| 3689 | { 1372, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VPCNT_B |
| 3690 | { 1371, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKOD_W |
| 3691 | { 1370, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKOD_H |
| 3692 | { 1369, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKOD_D |
| 3693 | { 1368, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKOD_B |
| 3694 | { 1367, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKEV_W |
| 3695 | { 1366, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKEV_H |
| 3696 | { 1365, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKEV_D |
| 3697 | { 1364, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKEV_B |
| 3698 | { 1363, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VOR_V |
| 3699 | { 1362, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VORN_V |
| 3700 | { 1361, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VORI_B |
| 3701 | { 1360, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VNOR_V |
| 3702 | { 1359, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VNORI_B |
| 3703 | { 1358, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VNEG_W |
| 3704 | { 1357, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VNEG_H |
| 3705 | { 1356, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VNEG_D |
| 3706 | { 1355, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VNEG_B |
| 3707 | { 1354, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUL_W |
| 3708 | { 1353, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUL_H |
| 3709 | { 1352, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUL_D |
| 3710 | { 1351, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUL_B |
| 3711 | { 1350, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_W_HU_H |
| 3712 | { 1349, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_W_HU |
| 3713 | { 1348, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_W_H |
| 3714 | { 1347, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_Q_DU_D |
| 3715 | { 1346, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_Q_DU |
| 3716 | { 1345, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_Q_D |
| 3717 | { 1344, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_H_BU_B |
| 3718 | { 1343, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_H_BU |
| 3719 | { 1342, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_H_B |
| 3720 | { 1341, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_D_WU_W |
| 3721 | { 1340, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_D_WU |
| 3722 | { 1339, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_D_W |
| 3723 | { 1338, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_W_HU_H |
| 3724 | { 1337, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_W_HU |
| 3725 | { 1336, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_W_H |
| 3726 | { 1335, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_Q_DU_D |
| 3727 | { 1334, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_Q_DU |
| 3728 | { 1333, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_Q_D |
| 3729 | { 1332, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_H_BU_B |
| 3730 | { 1331, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_H_BU |
| 3731 | { 1330, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_H_B |
| 3732 | { 1329, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_D_WU_W |
| 3733 | { 1328, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_D_WU |
| 3734 | { 1327, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_D_W |
| 3735 | { 1326, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_WU |
| 3736 | { 1325, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_W |
| 3737 | { 1324, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_HU |
| 3738 | { 1323, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_H |
| 3739 | { 1322, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_DU |
| 3740 | { 1321, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_D |
| 3741 | { 1320, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_BU |
| 3742 | { 1319, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_B |
| 3743 | { 1318, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMSUB_W |
| 3744 | { 1317, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMSUB_H |
| 3745 | { 1316, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMSUB_D |
| 3746 | { 1315, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMSUB_B |
| 3747 | { 1314, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKNZ_B |
| 3748 | { 1313, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKLTZ_W |
| 3749 | { 1312, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKLTZ_H |
| 3750 | { 1311, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKLTZ_D |
| 3751 | { 1310, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKLTZ_B |
| 3752 | { 1309, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKGEZ_B |
| 3753 | { 1308, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_WU |
| 3754 | { 1307, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_W |
| 3755 | { 1306, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_HU |
| 3756 | { 1305, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_H |
| 3757 | { 1304, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_DU |
| 3758 | { 1303, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_D |
| 3759 | { 1302, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_BU |
| 3760 | { 1301, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_B |
| 3761 | { 1300, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_WU |
| 3762 | { 1299, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_W |
| 3763 | { 1298, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_HU |
| 3764 | { 1297, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_H |
| 3765 | { 1296, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_DU |
| 3766 | { 1295, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_D |
| 3767 | { 1294, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_BU |
| 3768 | { 1293, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_B |
| 3769 | { 1292, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_WU |
| 3770 | { 1291, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_W |
| 3771 | { 1290, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_HU |
| 3772 | { 1289, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_H |
| 3773 | { 1288, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_DU |
| 3774 | { 1287, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_D |
| 3775 | { 1286, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_BU |
| 3776 | { 1285, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_B |
| 3777 | { 1284, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_WU |
| 3778 | { 1283, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_W |
| 3779 | { 1282, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_HU |
| 3780 | { 1281, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_H |
| 3781 | { 1280, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_DU |
| 3782 | { 1279, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_D |
| 3783 | { 1278, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_BU |
| 3784 | { 1277, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_B |
| 3785 | { 1276, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_WU |
| 3786 | { 1275, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_W |
| 3787 | { 1274, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_HU |
| 3788 | { 1273, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_H |
| 3789 | { 1272, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_DU |
| 3790 | { 1271, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_D |
| 3791 | { 1270, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_BU |
| 3792 | { 1269, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_B |
| 3793 | { 1268, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADD_W |
| 3794 | { 1267, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADD_H |
| 3795 | { 1266, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADD_D |
| 3796 | { 1265, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADD_B |
| 3797 | { 1264, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_W_HU_H |
| 3798 | { 1263, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_W_HU |
| 3799 | { 1262, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_W_H |
| 3800 | { 1261, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_Q_DU_D |
| 3801 | { 1260, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_Q_DU |
| 3802 | { 1259, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_Q_D |
| 3803 | { 1258, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_H_BU_B |
| 3804 | { 1257, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_H_BU |
| 3805 | { 1256, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_H_B |
| 3806 | { 1255, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_D_WU_W |
| 3807 | { 1254, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_D_WU |
| 3808 | { 1253, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_D_W |
| 3809 | { 1252, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_W_HU_H |
| 3810 | { 1251, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_W_HU |
| 3811 | { 1250, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_W_H |
| 3812 | { 1249, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_Q_DU_D |
| 3813 | { 1248, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_Q_DU |
| 3814 | { 1247, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_Q_D |
| 3815 | { 1246, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_H_BU_B |
| 3816 | { 1245, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_H_BU |
| 3817 | { 1244, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_H_B |
| 3818 | { 1243, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_D_WU_W |
| 3819 | { 1242, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_D_WU |
| 3820 | { 1241, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_D_W |
| 3821 | { 1240, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 382, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDX |
| 3822 | { 1239, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDREPL_W |
| 3823 | { 1238, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDREPL_H |
| 3824 | { 1237, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDREPL_D |
| 3825 | { 1236, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDREPL_B |
| 3826 | { 1235, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // VLDI |
| 3827 | { 1234, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLD |
| 3828 | { 1233, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 375, 0, 0, 0x0ULL }, // VINSGR2VR_W |
| 3829 | { 1232, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 375, 0, 0, 0x0ULL }, // VINSGR2VR_H |
| 3830 | { 1231, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 375, 0, 0, 0x0ULL }, // VINSGR2VR_D |
| 3831 | { 1230, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 375, 0, 0, 0x0ULL }, // VINSGR2VR_B |
| 3832 | { 1229, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVL_W |
| 3833 | { 1228, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVL_H |
| 3834 | { 1227, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVL_D |
| 3835 | { 1226, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVL_B |
| 3836 | { 1225, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVH_W |
| 3837 | { 1224, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVH_H |
| 3838 | { 1223, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVH_D |
| 3839 | { 1222, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVH_B |
| 3840 | { 1221, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_W_H |
| 3841 | { 1220, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_WU_HU |
| 3842 | { 1219, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_Q_D |
| 3843 | { 1218, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_QU_DU |
| 3844 | { 1217, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_H_B |
| 3845 | { 1216, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_HU_BU |
| 3846 | { 1215, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_D_W |
| 3847 | { 1214, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_DU_WU |
| 3848 | { 1213, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_W_H |
| 3849 | { 1212, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_WU_HU |
| 3850 | { 1211, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_Q_D |
| 3851 | { 1210, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_QU_DU |
| 3852 | { 1209, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_H_B |
| 3853 | { 1208, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_HU_BU |
| 3854 | { 1207, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_D_W |
| 3855 | { 1206, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_DU_WU |
| 3856 | { 1205, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINT_W_S |
| 3857 | { 1204, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINT_W_D |
| 3858 | { 1203, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINT_WU_S |
| 3859 | { 1202, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINT_L_D |
| 3860 | { 1201, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINT_LU_D |
| 3861 | { 1200, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZ_W_S |
| 3862 | { 1199, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINTRZ_W_D |
| 3863 | { 1198, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZ_WU_S |
| 3864 | { 1197, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZ_L_D |
| 3865 | { 1196, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZ_LU_D |
| 3866 | { 1195, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZL_L_S |
| 3867 | { 1194, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZH_L_S |
| 3868 | { 1193, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRP_W_S |
| 3869 | { 1192, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINTRP_W_D |
| 3870 | { 1191, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRP_L_D |
| 3871 | { 1190, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRPL_L_S |
| 3872 | { 1189, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRPH_L_S |
| 3873 | { 1188, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRNE_W_S |
| 3874 | { 1187, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINTRNE_W_D |
| 3875 | { 1186, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRNE_L_D |
| 3876 | { 1185, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRNEL_L_S |
| 3877 | { 1184, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRNEH_L_S |
| 3878 | { 1183, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRM_W_S |
| 3879 | { 1182, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINTRM_W_D |
| 3880 | { 1181, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRM_L_D |
| 3881 | { 1180, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRML_L_S |
| 3882 | { 1179, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRMH_L_S |
| 3883 | { 1178, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTL_L_S |
| 3884 | { 1177, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTH_L_S |
| 3885 | { 1176, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFSUB_S |
| 3886 | { 1175, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFSUB_D |
| 3887 | { 1174, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFSQRT_S |
| 3888 | { 1173, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFSQRT_D |
| 3889 | { 1172, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VFRSTP_H |
| 3890 | { 1171, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VFRSTP_B |
| 3891 | { 1170, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VFRSTPI_H |
| 3892 | { 1169, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VFRSTPI_B |
| 3893 | { 1168, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRSQRT_S |
| 3894 | { 1167, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRSQRT_D |
| 3895 | { 1166, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRSQRTE_S |
| 3896 | { 1165, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRSQRTE_D |
| 3897 | { 1164, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINT_S |
| 3898 | { 1163, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINT_D |
| 3899 | { 1162, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRZ_S |
| 3900 | { 1161, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRZ_D |
| 3901 | { 1160, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRP_S |
| 3902 | { 1159, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRP_D |
| 3903 | { 1158, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRNE_S |
| 3904 | { 1157, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRNE_D |
| 3905 | { 1156, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRM_S |
| 3906 | { 1155, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRM_D |
| 3907 | { 1154, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRECIP_S |
| 3908 | { 1153, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRECIP_D |
| 3909 | { 1152, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRECIPE_S |
| 3910 | { 1151, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRECIPE_D |
| 3911 | { 1150, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFNMSUB_S |
| 3912 | { 1149, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFNMSUB_D |
| 3913 | { 1148, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFNMADD_S |
| 3914 | { 1147, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFNMADD_D |
| 3915 | { 1146, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMUL_S |
| 3916 | { 1145, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMUL_D |
| 3917 | { 1144, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFMSUB_S |
| 3918 | { 1143, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFMSUB_D |
| 3919 | { 1142, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMIN_S |
| 3920 | { 1141, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMIN_D |
| 3921 | { 1140, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMINA_S |
| 3922 | { 1139, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMINA_D |
| 3923 | { 1138, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMAX_S |
| 3924 | { 1137, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMAX_D |
| 3925 | { 1136, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMAXA_S |
| 3926 | { 1135, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMAXA_D |
| 3927 | { 1134, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFMADD_S |
| 3928 | { 1133, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFMADD_D |
| 3929 | { 1132, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFLOGB_S |
| 3930 | { 1131, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFLOGB_D |
| 3931 | { 1130, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINT_S_WU |
| 3932 | { 1129, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINT_S_W |
| 3933 | { 1128, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFFINT_S_L |
| 3934 | { 1127, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINT_D_LU |
| 3935 | { 1126, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINT_D_L |
| 3936 | { 1125, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINTL_D_W |
| 3937 | { 1124, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINTH_D_W |
| 3938 | { 1123, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFDIV_S |
| 3939 | { 1122, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFDIV_D |
| 3940 | { 1121, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCVT_S_D |
| 3941 | { 1120, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCVT_H_S |
| 3942 | { 1119, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCVTL_S_H |
| 3943 | { 1118, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCVTL_D_S |
| 3944 | { 1117, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCVTH_S_H |
| 3945 | { 1116, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCVTH_D_S |
| 3946 | { 1115, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUN_S |
| 3947 | { 1114, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUN_D |
| 3948 | { 1113, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUNE_S |
| 3949 | { 1112, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUNE_D |
| 3950 | { 1111, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SULT_S |
| 3951 | { 1110, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SULT_D |
| 3952 | { 1109, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SULE_S |
| 3953 | { 1108, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SULE_D |
| 3954 | { 1107, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUEQ_S |
| 3955 | { 1106, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUEQ_D |
| 3956 | { 1105, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SOR_S |
| 3957 | { 1104, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SOR_D |
| 3958 | { 1103, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SNE_S |
| 3959 | { 1102, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SNE_D |
| 3960 | { 1101, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SLT_S |
| 3961 | { 1100, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SLT_D |
| 3962 | { 1099, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SLE_S |
| 3963 | { 1098, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SLE_D |
| 3964 | { 1097, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SEQ_S |
| 3965 | { 1096, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SEQ_D |
| 3966 | { 1095, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SAF_S |
| 3967 | { 1094, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SAF_D |
| 3968 | { 1093, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUN_S |
| 3969 | { 1092, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUN_D |
| 3970 | { 1091, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUNE_S |
| 3971 | { 1090, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUNE_D |
| 3972 | { 1089, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CULT_S |
| 3973 | { 1088, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CULT_D |
| 3974 | { 1087, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CULE_S |
| 3975 | { 1086, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CULE_D |
| 3976 | { 1085, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUEQ_S |
| 3977 | { 1084, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUEQ_D |
| 3978 | { 1083, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_COR_S |
| 3979 | { 1082, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_COR_D |
| 3980 | { 1081, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CNE_S |
| 3981 | { 1080, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CNE_D |
| 3982 | { 1079, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CLT_S |
| 3983 | { 1078, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CLT_D |
| 3984 | { 1077, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CLE_S |
| 3985 | { 1076, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CLE_D |
| 3986 | { 1075, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CEQ_S |
| 3987 | { 1074, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CEQ_D |
| 3988 | { 1073, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CAF_S |
| 3989 | { 1072, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CAF_D |
| 3990 | { 1071, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCLASS_S |
| 3991 | { 1070, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCLASS_D |
| 3992 | { 1069, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFADD_S |
| 3993 | { 1068, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFADD_D |
| 3994 | { 1067, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VEXTRINS_W |
| 3995 | { 1066, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VEXTRINS_H |
| 3996 | { 1065, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VEXTRINS_D |
| 3997 | { 1064, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VEXTRINS_B |
| 3998 | { 1063, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTL_Q_D |
| 3999 | { 1062, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTL_QU_DU |
| 4000 | { 1061, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_W_H |
| 4001 | { 1060, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_WU_HU |
| 4002 | { 1059, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_Q_D |
| 4003 | { 1058, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_QU_DU |
| 4004 | { 1057, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_H_B |
| 4005 | { 1056, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_HU_BU |
| 4006 | { 1055, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_D_W |
| 4007 | { 1054, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_DU_WU |
| 4008 | { 1053, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_W_H |
| 4009 | { 1052, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_W_B |
| 4010 | { 1051, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_WU_HU |
| 4011 | { 1050, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_WU_BU |
| 4012 | { 1049, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_H_B |
| 4013 | { 1048, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_HU_BU |
| 4014 | { 1047, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_D_W |
| 4015 | { 1046, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_D_H |
| 4016 | { 1045, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_D_B |
| 4017 | { 1044, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_DU_WU |
| 4018 | { 1043, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_DU_HU |
| 4019 | { 1042, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_DU_BU |
| 4020 | { 1041, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_WU |
| 4021 | { 1040, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_W |
| 4022 | { 1039, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_HU |
| 4023 | { 1038, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_H |
| 4024 | { 1037, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_DU |
| 4025 | { 1036, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_D |
| 4026 | { 1035, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_BU |
| 4027 | { 1034, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_B |
| 4028 | { 1033, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLZ_W |
| 4029 | { 1032, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLZ_H |
| 4030 | { 1031, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLZ_D |
| 4031 | { 1030, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLZ_B |
| 4032 | { 1029, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLO_W |
| 4033 | { 1028, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLO_H |
| 4034 | { 1027, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLO_D |
| 4035 | { 1026, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLO_B |
| 4036 | { 1025, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBSRL_V |
| 4037 | { 1024, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBSLL_V |
| 4038 | { 1023, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITSET_W |
| 4039 | { 1022, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITSET_H |
| 4040 | { 1021, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITSET_D |
| 4041 | { 1020, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITSET_B |
| 4042 | { 1019, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITSETI_W |
| 4043 | { 1018, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITSETI_H |
| 4044 | { 1017, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITSETI_D |
| 4045 | { 1016, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITSETI_B |
| 4046 | { 1015, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VBITSEL_V |
| 4047 | { 1014, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VBITSELI_B |
| 4048 | { 1013, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITREV_W |
| 4049 | { 1012, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITREV_H |
| 4050 | { 1011, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITREV_D |
| 4051 | { 1010, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITREV_B |
| 4052 | { 1009, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITREVI_W |
| 4053 | { 1008, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITREVI_H |
| 4054 | { 1007, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITREVI_D |
| 4055 | { 1006, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITREVI_B |
| 4056 | { 1005, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITCLR_W |
| 4057 | { 1004, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITCLR_H |
| 4058 | { 1003, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITCLR_D |
| 4059 | { 1002, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITCLR_B |
| 4060 | { 1001, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITCLRI_W |
| 4061 | { 1000, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITCLRI_H |
| 4062 | { 999, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITCLRI_D |
| 4063 | { 998, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITCLRI_B |
| 4064 | { 997, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_WU |
| 4065 | { 996, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_W |
| 4066 | { 995, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_HU |
| 4067 | { 994, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_H |
| 4068 | { 993, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_DU |
| 4069 | { 992, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_D |
| 4070 | { 991, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_BU |
| 4071 | { 990, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_B |
| 4072 | { 989, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_WU |
| 4073 | { 988, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_W |
| 4074 | { 987, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_HU |
| 4075 | { 986, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_H |
| 4076 | { 985, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_DU |
| 4077 | { 984, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_D |
| 4078 | { 983, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_BU |
| 4079 | { 982, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_B |
| 4080 | { 981, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAND_V |
| 4081 | { 980, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VANDN_V |
| 4082 | { 979, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VANDI_B |
| 4083 | { 978, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_W |
| 4084 | { 977, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_Q |
| 4085 | { 976, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_H |
| 4086 | { 975, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_D |
| 4087 | { 974, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_B |
| 4088 | { 973, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_W_HU_H |
| 4089 | { 972, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_W_HU |
| 4090 | { 971, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_W_H |
| 4091 | { 970, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_Q_DU_D |
| 4092 | { 969, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_Q_DU |
| 4093 | { 968, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_Q_D |
| 4094 | { 967, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_H_BU_B |
| 4095 | { 966, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_H_BU |
| 4096 | { 965, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_H_B |
| 4097 | { 964, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_D_WU_W |
| 4098 | { 963, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_D_WU |
| 4099 | { 962, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_D_W |
| 4100 | { 961, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_W_HU_H |
| 4101 | { 960, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_W_HU |
| 4102 | { 959, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_W_H |
| 4103 | { 958, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_Q_DU_D |
| 4104 | { 957, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_Q_DU |
| 4105 | { 956, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_Q_D |
| 4106 | { 955, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_H_BU_B |
| 4107 | { 954, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_H_BU |
| 4108 | { 953, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_H_B |
| 4109 | { 952, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_D_WU_W |
| 4110 | { 951, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_D_WU |
| 4111 | { 950, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_D_W |
| 4112 | { 949, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VADDI_WU |
| 4113 | { 948, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VADDI_HU |
| 4114 | { 947, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VADDI_DU |
| 4115 | { 946, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VADDI_BU |
| 4116 | { 945, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDA_W |
| 4117 | { 944, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDA_H |
| 4118 | { 943, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDA_D |
| 4119 | { 942, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDA_B |
| 4120 | { 941, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_WU |
| 4121 | { 940, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_W |
| 4122 | { 939, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_HU |
| 4123 | { 938, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_H |
| 4124 | { 937, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_DU |
| 4125 | { 936, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_D |
| 4126 | { 935, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_BU |
| 4127 | { 934, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_B |
| 4128 | { 933, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UD |
| 4129 | { 932, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBWR |
| 4130 | { 931, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBSRCH |
| 4131 | { 930, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBRD |
| 4132 | { 929, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBFLUSH |
| 4133 | { 928, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBFILL |
| 4134 | { 927, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBCLR |
| 4135 | { 926, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SYSCALL |
| 4136 | { 925, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SUB_W |
| 4137 | { 924, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SUB_D |
| 4138 | { 923, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // ST_W |
| 4139 | { 922, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // ST_H |
| 4140 | { 921, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // ST_D |
| 4141 | { 920, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // ST_B |
| 4142 | { 919, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STX_W |
| 4143 | { 918, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STX_H |
| 4144 | { 917, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STX_D |
| 4145 | { 916, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STX_B |
| 4146 | { 915, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STR_W |
| 4147 | { 914, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STR_D |
| 4148 | { 913, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STPTR_W |
| 4149 | { 912, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STPTR_D |
| 4150 | { 911, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STL_W |
| 4151 | { 910, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STL_D |
| 4152 | { 909, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STLE_W |
| 4153 | { 908, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STLE_H |
| 4154 | { 907, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STLE_D |
| 4155 | { 906, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STLE_B |
| 4156 | { 905, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STGT_W |
| 4157 | { 904, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STGT_H |
| 4158 | { 903, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STGT_D |
| 4159 | { 902, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STGT_B |
| 4160 | { 901, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SRL_W |
| 4161 | { 900, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SRL_D |
| 4162 | { 899, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SRLI_W |
| 4163 | { 898, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SRLI_D |
| 4164 | { 897, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SRA_W |
| 4165 | { 896, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SRA_D |
| 4166 | { 895, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SRAI_W |
| 4167 | { 894, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SRAI_D |
| 4168 | { 893, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SLTUI |
| 4169 | { 892, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SLTU |
| 4170 | { 891, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SLTI |
| 4171 | { 890, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SLT |
| 4172 | { 889, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SLL_W |
| 4173 | { 888, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SLL_D |
| 4174 | { 887, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SLLI_W |
| 4175 | { 886, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SLLI_D |
| 4176 | { 885, 1, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 352, 0, 0, 0x0ULL }, // SET_CFR_TRUE |
| 4177 | { 884, 1, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 352, 0, 0, 0x0ULL }, // SET_CFR_FALSE |
| 4178 | { 883, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // SETX86LOOPNE |
| 4179 | { 882, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // SETX86LOOPE |
| 4180 | { 881, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // SETX86J |
| 4181 | { 880, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // SETARMJ |
| 4182 | { 879, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 344, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SC_W |
| 4183 | { 878, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 348, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SC_Q |
| 4184 | { 877, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 344, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SC_D |
| 4185 | { 876, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 341, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SCREL_W |
| 4186 | { 875, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 341, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SCREL_D |
| 4187 | { 874, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SBC_W |
| 4188 | { 873, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SBC_H |
| 4189 | { 872, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SBC_D |
| 4190 | { 871, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SBC_B |
| 4191 | { 870, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ROTR_W |
| 4192 | { 869, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ROTR_H |
| 4193 | { 868, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ROTR_D |
| 4194 | { 867, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ROTR_B |
| 4195 | { 866, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ROTRI_W |
| 4196 | { 865, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ROTRI_H |
| 4197 | { 864, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ROTRI_D |
| 4198 | { 863, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ROTRI_B |
| 4199 | { 862, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVH_D |
| 4200 | { 861, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVH_2W |
| 4201 | { 860, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVB_D |
| 4202 | { 859, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVB_4H |
| 4203 | { 858, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVB_2W |
| 4204 | { 857, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVB_2H |
| 4205 | { 856, 2, 2, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDTIME_D |
| 4206 | { 855, 2, 2, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDTIMEL_W |
| 4207 | { 854, 2, 2, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDTIMEH_W |
| 4208 | { 853, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // RCR_W |
| 4209 | { 852, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // RCR_H |
| 4210 | { 851, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // RCR_D |
| 4211 | { 850, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // RCR_B |
| 4212 | { 849, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // RCRI_W |
| 4213 | { 848, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // RCRI_H |
| 4214 | { 847, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // RCRI_D |
| 4215 | { 846, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // RCRI_B |
| 4216 | { 845, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 338, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PRELDX |
| 4217 | { 844, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 36, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PRELD |
| 4218 | { 843, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // PCALAU12I |
| 4219 | { 842, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // PCADDU18I |
| 4220 | { 841, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // PCADDU12I |
| 4221 | { 840, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // PCADDI |
| 4222 | { 839, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ORN |
| 4223 | { 838, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // ORI |
| 4224 | { 837, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // OR |
| 4225 | { 836, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // NOR |
| 4226 | { 835, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MUL_W |
| 4227 | { 834, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MUL_D |
| 4228 | { 833, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULW_D_WU |
| 4229 | { 832, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULW_D_W |
| 4230 | { 831, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULH_WU |
| 4231 | { 830, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULH_W |
| 4232 | { 829, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULH_DU |
| 4233 | { 828, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULH_D |
| 4234 | { 827, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 336, 0, 0, 0x0ULL }, // MOVSCR2GR |
| 4235 | { 826, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 334, 0, 0, 0x0ULL }, // MOVGR2SCR |
| 4236 | { 825, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 330, 0, 0, 0x0ULL }, // MOVGR2FR_W_64 |
| 4237 | { 824, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 332, 0, 0, 0x0ULL }, // MOVGR2FR_W |
| 4238 | { 823, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 330, 0, 0, 0x0ULL }, // MOVGR2FR_D |
| 4239 | { 822, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 327, 0, 0, 0x0ULL }, // MOVGR2FRH_W |
| 4240 | { 821, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 325, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MOVGR2FCSR |
| 4241 | { 820, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 323, 0, 0, 0x0ULL }, // MOVGR2CF |
| 4242 | { 819, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 319, 0, 0, 0x0ULL }, // MOVFRH2GR_S |
| 4243 | { 818, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 319, 0, 0, 0x0ULL }, // MOVFR2GR_S_64 |
| 4244 | { 817, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 321, 0, 0, 0x0ULL }, // MOVFR2GR_S |
| 4245 | { 816, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 319, 0, 0, 0x0ULL }, // MOVFR2GR_D |
| 4246 | { 815, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 317, 0, 0, 0x0ULL }, // MOVFR2CF_xS |
| 4247 | { 814, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 315, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MOVFCSR2GR |
| 4248 | { 813, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 313, 0, 0, 0x0ULL }, // MOVCF2GR |
| 4249 | { 812, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 311, 0, 0, 0x0ULL }, // MOVCF2FR_xS |
| 4250 | { 811, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // MOD_WU |
| 4251 | { 810, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // MOD_W |
| 4252 | { 809, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // MOD_DU |
| 4253 | { 808, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // MOD_D |
| 4254 | { 807, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MASKNEZ |
| 4255 | { 806, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MASKEQZ |
| 4256 | { 805, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // LU52I_D |
| 4257 | { 804, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 259, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // LU32I_D |
| 4258 | { 803, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // LU12I_W |
| 4259 | { 802, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LL_W |
| 4260 | { 801, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LL_D |
| 4261 | { 800, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LLACQ_W |
| 4262 | { 799, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LLACQ_D |
| 4263 | { 798, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_WU |
| 4264 | { 797, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_W |
| 4265 | { 796, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_HU |
| 4266 | { 795, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_H |
| 4267 | { 794, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_D |
| 4268 | { 793, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_BU |
| 4269 | { 792, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_B |
| 4270 | { 791, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_WU |
| 4271 | { 790, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_W |
| 4272 | { 789, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_HU |
| 4273 | { 788, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_H |
| 4274 | { 787, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_D |
| 4275 | { 786, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_BU |
| 4276 | { 785, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_B |
| 4277 | { 784, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDR_W |
| 4278 | { 783, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDR_D |
| 4279 | { 782, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDPTR_W |
| 4280 | { 781, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDPTR_D |
| 4281 | { 780, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDPTE |
| 4282 | { 779, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDL_W |
| 4283 | { 778, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDL_D |
| 4284 | { 777, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDLE_W |
| 4285 | { 776, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDLE_H |
| 4286 | { 775, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDLE_D |
| 4287 | { 774, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDLE_B |
| 4288 | { 773, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDGT_W |
| 4289 | { 772, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDGT_H |
| 4290 | { 771, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDGT_D |
| 4291 | { 770, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDGT_B |
| 4292 | { 769, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDIR |
| 4293 | { 768, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0, 0x0ULL }, // JISCR1 |
| 4294 | { 767, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0, 0x0ULL }, // JISCR0 |
| 4295 | { 766, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // JIRL |
| 4296 | { 765, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRWR_W |
| 4297 | { 764, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRWR_H |
| 4298 | { 763, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRWR_D |
| 4299 | { 762, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRWR_B |
| 4300 | { 761, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRRD_W |
| 4301 | { 760, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRRD_H |
| 4302 | { 759, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRRD_D |
| 4303 | { 758, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRRD_B |
| 4304 | { 757, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INVTLB |
| 4305 | { 756, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IDLE |
| 4306 | { 755, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IBAR |
| 4307 | { 754, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // HVCL |
| 4308 | { 753, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GTLBFLUSH |
| 4309 | { 752, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 262, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GCSRXCHG |
| 4310 | { 751, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 259, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GCSRWR |
| 4311 | { 750, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GCSRRD |
| 4312 | { 749, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINT_W_S |
| 4313 | { 748, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINT_W_D |
| 4314 | { 747, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINT_L_S |
| 4315 | { 746, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINT_L_D |
| 4316 | { 745, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINTRZ_W_S |
| 4317 | { 744, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINTRZ_W_D |
| 4318 | { 743, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINTRZ_L_S |
| 4319 | { 742, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINTRZ_L_D |
| 4320 | { 741, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINTRP_W_S |
| 4321 | { 740, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINTRP_W_D |
| 4322 | { 739, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINTRP_L_S |
| 4323 | { 738, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINTRP_L_D |
| 4324 | { 737, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINTRNE_W_S |
| 4325 | { 736, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINTRNE_W_D |
| 4326 | { 735, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINTRNE_L_S |
| 4327 | { 734, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINTRNE_L_D |
| 4328 | { 733, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINTRM_W_S |
| 4329 | { 732, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINTRM_W_D |
| 4330 | { 731, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINTRM_L_S |
| 4331 | { 730, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINTRM_L_D |
| 4332 | { 729, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FSUB_S |
| 4333 | { 728, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FSUB_D |
| 4334 | { 727, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 292, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FST_S |
| 4335 | { 726, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 289, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FST_D |
| 4336 | { 725, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTX_S |
| 4337 | { 724, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTX_D |
| 4338 | { 723, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTLE_S |
| 4339 | { 722, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTLE_D |
| 4340 | { 721, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTGT_S |
| 4341 | { 720, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTGT_D |
| 4342 | { 719, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FSQRT_S |
| 4343 | { 718, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FSQRT_D |
| 4344 | { 717, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 307, 0, 0, 0x0ULL }, // FSEL_xS |
| 4345 | { 716, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 303, 0, 0, 0x0ULL }, // FSEL_xD |
| 4346 | { 715, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FSCALEB_S |
| 4347 | { 714, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FSCALEB_D |
| 4348 | { 713, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRSQRT_S |
| 4349 | { 712, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRSQRT_D |
| 4350 | { 711, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRSQRTE_S |
| 4351 | { 710, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRSQRTE_D |
| 4352 | { 709, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRINT_S |
| 4353 | { 708, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRINT_D |
| 4354 | { 707, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRECIP_S |
| 4355 | { 706, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRECIP_D |
| 4356 | { 705, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRECIPE_S |
| 4357 | { 704, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRECIPE_D |
| 4358 | { 703, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 299, 0, 0, 0x0ULL }, // FNMSUB_S |
| 4359 | { 702, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 295, 0, 0, 0x0ULL }, // FNMSUB_D |
| 4360 | { 701, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 299, 0, 0, 0x0ULL }, // FNMADD_S |
| 4361 | { 700, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 295, 0, 0, 0x0ULL }, // FNMADD_D |
| 4362 | { 699, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FNEG_S |
| 4363 | { 698, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FNEG_D |
| 4364 | { 697, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMUL_S |
| 4365 | { 696, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMUL_D |
| 4366 | { 695, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 299, 0, 0, 0x0ULL }, // FMSUB_S |
| 4367 | { 694, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 295, 0, 0, 0x0ULL }, // FMSUB_D |
| 4368 | { 693, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FMOV_S |
| 4369 | { 692, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FMOV_D |
| 4370 | { 691, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMIN_S |
| 4371 | { 690, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMIN_D |
| 4372 | { 689, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMINA_S |
| 4373 | { 688, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMINA_D |
| 4374 | { 687, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMAX_S |
| 4375 | { 686, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMAX_D |
| 4376 | { 685, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMAXA_S |
| 4377 | { 684, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMAXA_D |
| 4378 | { 683, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 299, 0, 0, 0x0ULL }, // FMADD_S |
| 4379 | { 682, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 295, 0, 0, 0x0ULL }, // FMADD_D |
| 4380 | { 681, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FLOGB_S |
| 4381 | { 680, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FLOGB_D |
| 4382 | { 679, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 292, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLD_S |
| 4383 | { 678, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 289, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLD_D |
| 4384 | { 677, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDX_S |
| 4385 | { 676, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDX_D |
| 4386 | { 675, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDLE_S |
| 4387 | { 674, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDLE_D |
| 4388 | { 673, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDGT_S |
| 4389 | { 672, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDGT_D |
| 4390 | { 671, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FFINT_S_W |
| 4391 | { 670, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FFINT_S_L |
| 4392 | { 669, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FFINT_D_W |
| 4393 | { 668, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FFINT_D_L |
| 4394 | { 667, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FDIV_S |
| 4395 | { 666, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FDIV_D |
| 4396 | { 665, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FCVT_UD_D |
| 4397 | { 664, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FCVT_S_D |
| 4398 | { 663, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FCVT_LD_D |
| 4399 | { 662, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FCVT_D_S |
| 4400 | { 661, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FCVT_D_LD |
| 4401 | { 660, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FCOPYSIGN_S |
| 4402 | { 659, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FCOPYSIGN_D |
| 4403 | { 658, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SUN_S |
| 4404 | { 657, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SUN_D |
| 4405 | { 656, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SUNE_S |
| 4406 | { 655, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SUNE_D |
| 4407 | { 654, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SULT_S |
| 4408 | { 653, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SULT_D |
| 4409 | { 652, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SULE_S |
| 4410 | { 651, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SULE_D |
| 4411 | { 650, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SUEQ_S |
| 4412 | { 649, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SUEQ_D |
| 4413 | { 648, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SOR_S |
| 4414 | { 647, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SOR_D |
| 4415 | { 646, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SNE_S |
| 4416 | { 645, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SNE_D |
| 4417 | { 644, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SLT_S |
| 4418 | { 643, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SLT_D |
| 4419 | { 642, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SLE_S |
| 4420 | { 641, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SLE_D |
| 4421 | { 640, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SEQ_S |
| 4422 | { 639, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SEQ_D |
| 4423 | { 638, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SAF_S |
| 4424 | { 637, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SAF_D |
| 4425 | { 636, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CUN_S |
| 4426 | { 635, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CUN_D |
| 4427 | { 634, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CUNE_S |
| 4428 | { 633, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CUNE_D |
| 4429 | { 632, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CULT_S |
| 4430 | { 631, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CULT_D |
| 4431 | { 630, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CULE_S |
| 4432 | { 629, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CULE_D |
| 4433 | { 628, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CUEQ_S |
| 4434 | { 627, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CUEQ_D |
| 4435 | { 626, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_COR_S |
| 4436 | { 625, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_COR_D |
| 4437 | { 624, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CNE_S |
| 4438 | { 623, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CNE_D |
| 4439 | { 622, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CLT_S |
| 4440 | { 621, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CLT_D |
| 4441 | { 620, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CLE_S |
| 4442 | { 619, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CLE_D |
| 4443 | { 618, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CEQ_S |
| 4444 | { 617, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CEQ_D |
| 4445 | { 616, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CAF_S |
| 4446 | { 615, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CAF_D |
| 4447 | { 614, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FCLASS_S |
| 4448 | { 613, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FCLASS_D |
| 4449 | { 612, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FADD_S |
| 4450 | { 611, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FADD_D |
| 4451 | { 610, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FABS_S |
| 4452 | { 609, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FABS_D |
| 4453 | { 608, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // EXT_W_H |
| 4454 | { 607, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // EXT_W_B |
| 4455 | { 606, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ERTN |
| 4456 | { 605, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // DIV_WU |
| 4457 | { 604, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // DIV_W |
| 4458 | { 603, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // DIV_DU |
| 4459 | { 602, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // DIV_D |
| 4460 | { 601, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DBCL |
| 4461 | { 600, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DBAR |
| 4462 | { 599, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CTZ_W |
| 4463 | { 598, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CTZ_D |
| 4464 | { 597, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CTO_W |
| 4465 | { 596, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CTO_D |
| 4466 | { 595, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 262, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CSRXCHG |
| 4467 | { 594, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 259, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CSRWR |
| 4468 | { 593, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CSRRD |
| 4469 | { 592, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRC_W_W_W |
| 4470 | { 591, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRC_W_H_W |
| 4471 | { 590, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRC_W_D_W |
| 4472 | { 589, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRC_W_B_W |
| 4473 | { 588, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRCC_W_W_W |
| 4474 | { 587, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRCC_W_H_W |
| 4475 | { 586, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRCC_W_D_W |
| 4476 | { 585, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRCC_W_B_W |
| 4477 | { 584, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CPUCFG |
| 4478 | { 583, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CLZ_W |
| 4479 | { 582, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CLZ_D |
| 4480 | { 581, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CLO_W |
| 4481 | { 580, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CLO_D |
| 4482 | { 579, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 36, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CACOP |
| 4483 | { 578, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // BYTEPICK_W |
| 4484 | { 577, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // BYTEPICK_D |
| 4485 | { 576, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 255, 0, 0, 0x0ULL }, // BSTRPICK_W |
| 4486 | { 575, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 255, 0, 0, 0x0ULL }, // BSTRPICK_D |
| 4487 | { 574, 5, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 250, 0, 0, 0x0ULL }, // BSTRINS_W |
| 4488 | { 573, 5, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 250, 0, 0, 0x0ULL }, // BSTRINS_D |
| 4489 | { 572, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BREAK |
| 4490 | { 571, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BNEZ |
| 4491 | { 570, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BNE |
| 4492 | { 569, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BLTU |
| 4493 | { 568, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BLT |
| 4494 | { 567, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Call), 0x0ULL }, // BL |
| 4495 | { 566, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // BITREV_W |
| 4496 | { 565, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // BITREV_D |
| 4497 | { 564, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // BITREV_8B |
| 4498 | { 563, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // BITREV_4B |
| 4499 | { 562, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BGEU |
| 4500 | { 561, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BGE |
| 4501 | { 560, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BEQZ |
| 4502 | { 559, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BEQ |
| 4503 | { 558, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 248, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BCNEZ |
| 4504 | { 557, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 248, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BCEQZ |
| 4505 | { 556, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // B |
| 4506 | { 555, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ASRTLE_D |
| 4507 | { 554, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ASRTGT_D |
| 4508 | { 553, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMXOR_W |
| 4509 | { 552, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSUB_W |
| 4510 | { 551, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSRL_W |
| 4511 | { 550, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // ARMSRLI_W |
| 4512 | { 549, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSRA_W |
| 4513 | { 548, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // ARMSRAI_W |
| 4514 | { 547, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSLL_W |
| 4515 | { 546, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // ARMSLLI_W |
| 4516 | { 545, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSBC_W |
| 4517 | { 544, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMRRX_W |
| 4518 | { 543, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMROTR_W |
| 4519 | { 542, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // ARMROTRI_W |
| 4520 | { 541, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMOR_W |
| 4521 | { 540, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMNOT_W |
| 4522 | { 539, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMMTFLAG |
| 4523 | { 538, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMMOV_W |
| 4524 | { 537, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMMOV_D |
| 4525 | { 536, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMMOVE |
| 4526 | { 535, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMMFFLAG |
| 4527 | { 534, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMAND_W |
| 4528 | { 533, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMADD_W |
| 4529 | { 532, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMADC_W |
| 4530 | { 531, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ANDN |
| 4531 | { 530, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ANDI |
| 4532 | { 529, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // AND |
| 4533 | { 528, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMXOR__DB_W |
| 4534 | { 527, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMXOR__DB_D |
| 4535 | { 526, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMXOR_W |
| 4536 | { 525, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMXOR_D |
| 4537 | { 524, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP__DB_W |
| 4538 | { 523, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP__DB_H |
| 4539 | { 522, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP__DB_D |
| 4540 | { 521, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP__DB_B |
| 4541 | { 520, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP_W |
| 4542 | { 519, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP_H |
| 4543 | { 518, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP_D |
| 4544 | { 517, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP_B |
| 4545 | { 516, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMOR__DB_W |
| 4546 | { 515, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMOR__DB_D |
| 4547 | { 514, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMOR_W |
| 4548 | { 513, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMOR_D |
| 4549 | { 512, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN__DB_WU |
| 4550 | { 511, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN__DB_W |
| 4551 | { 510, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN__DB_DU |
| 4552 | { 509, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN__DB_D |
| 4553 | { 508, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN_WU |
| 4554 | { 507, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN_W |
| 4555 | { 506, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN_DU |
| 4556 | { 505, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN_D |
| 4557 | { 504, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX__DB_WU |
| 4558 | { 503, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX__DB_W |
| 4559 | { 502, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX__DB_DU |
| 4560 | { 501, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX__DB_D |
| 4561 | { 500, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX_WU |
| 4562 | { 499, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX_W |
| 4563 | { 498, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX_DU |
| 4564 | { 497, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX_D |
| 4565 | { 496, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS__DB_W |
| 4566 | { 495, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS__DB_H |
| 4567 | { 494, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS__DB_D |
| 4568 | { 493, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS__DB_B |
| 4569 | { 492, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS_W |
| 4570 | { 491, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS_H |
| 4571 | { 490, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS_D |
| 4572 | { 489, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS_B |
| 4573 | { 488, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMAND__DB_W |
| 4574 | { 487, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMAND__DB_D |
| 4575 | { 486, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMAND_W |
| 4576 | { 485, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMAND_D |
| 4577 | { 484, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD__DB_W |
| 4578 | { 483, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD__DB_H |
| 4579 | { 482, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD__DB_D |
| 4580 | { 481, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD__DB_B |
| 4581 | { 480, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD_W |
| 4582 | { 479, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD_H |
| 4583 | { 478, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD_D |
| 4584 | { 477, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD_B |
| 4585 | { 476, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // ALSL_WU |
| 4586 | { 475, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // ALSL_W |
| 4587 | { 474, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // ALSL_D |
| 4588 | { 473, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADD_W |
| 4589 | { 472, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADD_D |
| 4590 | { 471, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ADDU16I_D |
| 4591 | { 470, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ADDU12I_W |
| 4592 | { 469, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ADDU12I_D |
| 4593 | { 468, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ADDI_W |
| 4594 | { 467, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // ADDI_D |
| 4595 | { 466, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADC_W |
| 4596 | { 465, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADC_H |
| 4597 | { 464, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADC_D |
| 4598 | { 463, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADC_B |
| 4599 | { 462, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 236, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRFCSR |
| 4600 | { 461, 3, 2, 4, 0, 0, 0, LoongArchOpInfoBase + 233, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SplitPairF64Pseudo |
| 4601 | { 460, 6, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 227, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Select_GPR_Using_CC_GPR |
| 4602 | { 459, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // RDFCSR |
| 4603 | { 458, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoXVREPLI_W |
| 4604 | { 457, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoXVREPLI_H |
| 4605 | { 456, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoXVREPLI_D |
| 4606 | { 455, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoXVREPLI_B |
| 4607 | { 454, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKNEZ_B |
| 4608 | { 453, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKLTZ_W |
| 4609 | { 452, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKLTZ_H |
| 4610 | { 451, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKLTZ_D |
| 4611 | { 450, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKLTZ_B |
| 4612 | { 449, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKGEZ_B |
| 4613 | { 448, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKEQZ_B |
| 4614 | { 447, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 221, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVINSGR2VR_H |
| 4615 | { 446, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 221, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVINSGR2VR_B |
| 4616 | { 445, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ_W |
| 4617 | { 444, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ_H |
| 4618 | { 443, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ_D |
| 4619 | { 442, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ_B |
| 4620 | { 441, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ |
| 4621 | { 440, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ_W |
| 4622 | { 439, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ_H |
| 4623 | { 438, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ_D |
| 4624 | { 437, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ_B |
| 4625 | { 436, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ |
| 4626 | { 435, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoVREPLI_W |
| 4627 | { 434, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoVREPLI_H |
| 4628 | { 433, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoVREPLI_D |
| 4629 | { 432, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoVREPLI_B |
| 4630 | { 431, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKNEZ_B |
| 4631 | { 430, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKLTZ_W |
| 4632 | { 429, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKLTZ_H |
| 4633 | { 428, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKLTZ_D |
| 4634 | { 427, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKLTZ_B |
| 4635 | { 426, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKGEZ_B |
| 4636 | { 425, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKEQZ_B |
| 4637 | { 424, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ_W |
| 4638 | { 423, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ_H |
| 4639 | { 422, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ_D |
| 4640 | { 421, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ_B |
| 4641 | { 420, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ |
| 4642 | { 419, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ_W |
| 4643 | { 418, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ_H |
| 4644 | { 417, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ_D |
| 4645 | { 416, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ_B |
| 4646 | { 415, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ |
| 4647 | { 414, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PseudoUNIMP |
| 4648 | { 413, 1, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL_SMALL |
| 4649 | { 412, 1, 0, 8, 0, 1, 1, LoongArchOpInfoBase + 0, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL_MEDIUM |
| 4650 | { 411, 1, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL_LARGE |
| 4651 | { 410, 1, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 214, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAILIndirect |
| 4652 | { 409, 2, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 34, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL36 |
| 4653 | { 408, 2, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 34, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL30 |
| 4654 | { 407, 2, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 34, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL |
| 4655 | { 406, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 189, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoST_CFR |
| 4656 | { 405, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoRET |
| 4657 | { 404, 7, 2, 44, 0, 0, 0, LoongArchOpInfoBase + 207, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedCmpXchg32 |
| 4658 | { 403, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicSwap32 |
| 4659 | { 402, 7, 3, 48, 0, 0, 0, LoongArchOpInfoBase + 200, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadUMin32 |
| 4660 | { 401, 7, 3, 48, 0, 0, 0, LoongArchOpInfoBase + 200, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadUMax32 |
| 4661 | { 400, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadSub32 |
| 4662 | { 399, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadNand32 |
| 4663 | { 398, 8, 3, 56, 0, 0, 0, LoongArchOpInfoBase + 192, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadMin32 |
| 4664 | { 397, 8, 3, 56, 0, 0, 0, LoongArchOpInfoBase + 192, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadMax32 |
| 4665 | { 396, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadAdd32 |
| 4666 | { 395, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLI_W |
| 4667 | { 394, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLI_D |
| 4668 | { 393, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 189, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLD_CFR |
| 4669 | { 392, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_LE |
| 4670 | { 391, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_LD_LARGE |
| 4671 | { 390, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_LD |
| 4672 | { 389, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_TLS_IE_LARGE |
| 4673 | { 388, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_TLS_IE |
| 4674 | { 387, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_GD_LARGE |
| 4675 | { 386, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_GD |
| 4676 | { 385, 3, 1, 4, 0, 0, 2, LoongArchOpInfoBase + 186, 8, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoLA_TLS_DESC_LARGE |
| 4677 | { 384, 2, 1, 4, 0, 0, 1, LoongArchOpInfoBase + 34, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_TLS_DESC |
| 4678 | { 383, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_PCREL_LARGE |
| 4679 | { 382, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_PCREL |
| 4680 | { 381, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_GOT_LARGE |
| 4681 | { 380, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_GOT |
| 4682 | { 379, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_ABS_LARGE |
| 4683 | { 378, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_ABS |
| 4684 | { 377, 2, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 34, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoJIRL_TAIL |
| 4685 | { 376, 2, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 34, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoJIRL_CALL |
| 4686 | { 375, 3, 1, 4, 0, 1, 1, LoongArchOpInfoBase + 186, 6, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoDESC_CALL |
| 4687 | { 374, 2, 1, 12, 0, 0, 0, LoongArchOpInfoBase + 184, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoCopyCFR |
| 4688 | { 373, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoCmpXchg64 |
| 4689 | { 372, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoCmpXchg32 |
| 4690 | { 371, 8, 3, 36, 0, 0, 0, LoongArchOpInfoBase + 170, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoCmpXchg128Acquire |
| 4691 | { 370, 8, 3, 36, 0, 0, 0, LoongArchOpInfoBase + 170, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoCmpXchg128 |
| 4692 | { 369, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoCTPOP_W_LA32 |
| 4693 | { 368, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoCTPOP_W |
| 4694 | { 367, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoCTPOP_H_LA32 |
| 4695 | { 366, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoCTPOP_H |
| 4696 | { 365, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoCTPOP_D |
| 4697 | { 364, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoCTPOP_B |
| 4698 | { 363, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL_SMALL |
| 4699 | { 362, 1, 0, 8, 0, 0, 2, LoongArchOpInfoBase + 0, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL_MEDIUM |
| 4700 | { 361, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL_LARGE |
| 4701 | { 360, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 28, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALLIndirect |
| 4702 | { 359, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL36 |
| 4703 | { 358, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL30 |
| 4704 | { 357, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL |
| 4705 | { 356, 1, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoB_TAIL |
| 4706 | { 355, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 166, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoBRIND |
| 4707 | { 354, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoBR |
| 4708 | { 353, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicSwap32 |
| 4709 | { 352, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicStoreW |
| 4710 | { 351, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicStoreD |
| 4711 | { 350, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadXor32 |
| 4712 | { 349, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadUMin32 |
| 4713 | { 348, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadUMax32 |
| 4714 | { 347, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadSub32 |
| 4715 | { 346, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadOr32 |
| 4716 | { 345, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadNand64 |
| 4717 | { 344, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadNand32 |
| 4718 | { 343, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadMin32 |
| 4719 | { 342, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadMax32 |
| 4720 | { 341, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadAnd32 |
| 4721 | { 340, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadAdd32 |
| 4722 | { 339, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoAddTPRel_W |
| 4723 | { 338, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoAddTPRel_D |
| 4724 | { 337, 1, 0, 4, 0, 1, 1, LoongArchOpInfoBase + 28, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PROBED_STACKALLOC_DYN |
| 4725 | { 336, 1, 0, 4, 0, 1, 1, LoongArchOpInfoBase + 28, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PROBED_STACKALLOC |
| 4726 | { 335, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // BuildPairF64Pseudo |
| 4727 | { 334, 2, 0, 4, 0, 1, 1, LoongArchOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKUP |
| 4728 | { 333, 2, 0, 4, 0, 1, 1, LoongArchOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKDOWN |
| 4729 | { 332, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UBFX |
| 4730 | { 331, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SBFX |
| 4731 | { 330, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMIN |
| 4732 | { 329, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMAX |
| 4733 | { 328, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMIN |
| 4734 | { 327, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMAX |
| 4735 | { 326, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_XOR |
| 4736 | { 325, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_OR |
| 4737 | { 324, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_AND |
| 4738 | { 323, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_MUL |
| 4739 | { 322, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_ADD |
| 4740 | { 321, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMINIMUMNUM |
| 4741 | { 320, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAXIMUMNUM |
| 4742 | { 319, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMINIMUM |
| 4743 | { 318, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAXIMUM |
| 4744 | { 317, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMIN |
| 4745 | { 316, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAX |
| 4746 | { 315, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMUL |
| 4747 | { 314, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FADD |
| 4748 | { 313, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FMUL |
| 4749 | { 312, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FADD |
| 4750 | { 311, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_UBSANTRAP |
| 4751 | { 310, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DEBUGTRAP |
| 4752 | { 309, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_TRAP |
| 4753 | { 308, 3, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMSET_INLINE |
| 4754 | { 307, 3, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_BZERO |
| 4755 | { 306, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMSET |
| 4756 | { 305, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMMOVE |
| 4757 | { 304, 3, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY_INLINE |
| 4758 | { 303, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY |
| 4759 | { 302, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 141, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_WRITE_REGISTER |
| 4760 | { 301, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_READ_REGISTER |
| 4761 | { 300, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FCMPS |
| 4762 | { 299, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FCMP |
| 4763 | { 298, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FLDEXP |
| 4764 | { 297, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSQRT |
| 4765 | { 296, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMA |
| 4766 | { 295, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FREM |
| 4767 | { 294, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FDIV |
| 4768 | { 293, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMUL |
| 4769 | { 292, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSUB |
| 4770 | { 291, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FADD |
| 4771 | { 290, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKRESTORE |
| 4772 | { 289, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKSAVE |
| 4773 | { 288, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DYN_STACKALLOC |
| 4774 | { 287, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_JUMP_TABLE |
| 4775 | { 286, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BLOCK_ADDR |
| 4776 | { 285, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ADDRSPACE_CAST |
| 4777 | { 284, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEARBYINT |
| 4778 | { 283, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRINT |
| 4779 | { 282, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFLOOR |
| 4780 | { 281, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSQRT |
| 4781 | { 280, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTANH |
| 4782 | { 279, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINH |
| 4783 | { 278, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOSH |
| 4784 | { 277, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN2 |
| 4785 | { 276, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN |
| 4786 | { 275, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FASIN |
| 4787 | { 274, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FACOS |
| 4788 | { 273, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTAN |
| 4789 | { 272, 3, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINCOS |
| 4790 | { 271, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSIN |
| 4791 | { 270, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOS |
| 4792 | { 269, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCEIL |
| 4793 | { 268, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_CLMUL |
| 4794 | { 267, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITREVERSE |
| 4795 | { 266, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BSWAP |
| 4796 | { 265, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTPOP |
| 4797 | { 264, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLS |
| 4798 | { 263, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ_ZERO_POISON |
| 4799 | { 262, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ |
| 4800 | { 261, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ_ZERO_POISON |
| 4801 | { 260, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ |
| 4802 | { 259, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 137, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECTOR_COMPRESS |
| 4803 | { 258, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_STEP_VECTOR |
| 4804 | { 257, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SPLAT_VECTOR |
| 4805 | { 256, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 133, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHUFFLE_VECTOR |
| 4806 | { 255, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_VECTOR_ELT |
| 4807 | { 254, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 126, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_VECTOR_ELT |
| 4808 | { 253, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_SUBVECTOR |
| 4809 | { 252, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_SUBVECTOR |
| 4810 | { 251, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VSCALE |
| 4811 | { 250, 3, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 123, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRJT |
| 4812 | { 249, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BR |
| 4813 | { 248, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LLROUND |
| 4814 | { 247, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LROUND |
| 4815 | { 246, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ABS |
| 4816 | { 245, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMAX |
| 4817 | { 244, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMIN |
| 4818 | { 243, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMAX |
| 4819 | { 242, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMIN |
| 4820 | { 241, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRMASK |
| 4821 | { 240, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTR_ADD |
| 4822 | { 239, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_ROUNDING |
| 4823 | { 238, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_ROUNDING |
| 4824 | { 237, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPMODE |
| 4825 | { 236, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPMODE |
| 4826 | { 235, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPMODE |
| 4827 | { 234, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPENV |
| 4828 | { 233, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPENV |
| 4829 | { 232, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPENV |
| 4830 | { 231, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUMNUM |
| 4831 | { 230, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUMNUM |
| 4832 | { 229, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUM |
| 4833 | { 228, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUM |
| 4834 | { 227, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM_IEEE |
| 4835 | { 226, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM_IEEE |
| 4836 | { 225, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM |
| 4837 | { 224, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM |
| 4838 | { 223, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCANONICALIZE |
| 4839 | { 222, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IS_FPCLASS |
| 4840 | { 221, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOPYSIGN |
| 4841 | { 220, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FABS |
| 4842 | { 219, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI_SAT |
| 4843 | { 218, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI_SAT |
| 4844 | { 217, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UITOFP |
| 4845 | { 216, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SITOFP |
| 4846 | { 215, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI |
| 4847 | { 214, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI |
| 4848 | { 213, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTRUNC |
| 4849 | { 212, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPEXT |
| 4850 | { 211, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEG |
| 4851 | { 210, 3, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFREXP |
| 4852 | { 209, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLDEXP |
| 4853 | { 208, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG10 |
| 4854 | { 207, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG2 |
| 4855 | { 206, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG |
| 4856 | { 205, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP10 |
| 4857 | { 204, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP2 |
| 4858 | { 203, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP |
| 4859 | { 202, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOWI |
| 4860 | { 201, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOW |
| 4861 | { 200, 3, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMODF |
| 4862 | { 199, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREM |
| 4863 | { 198, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FDIV |
| 4864 | { 197, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMAD |
| 4865 | { 196, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMA |
| 4866 | { 195, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMUL |
| 4867 | { 194, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSUB |
| 4868 | { 193, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FADD |
| 4869 | { 192, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIXSAT |
| 4870 | { 191, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIXSAT |
| 4871 | { 190, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIX |
| 4872 | { 189, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIX |
| 4873 | { 188, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIXSAT |
| 4874 | { 187, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIXSAT |
| 4875 | { 186, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIX |
| 4876 | { 185, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIX |
| 4877 | { 184, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSHLSAT |
| 4878 | { 183, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USHLSAT |
| 4879 | { 182, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBSAT |
| 4880 | { 181, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBSAT |
| 4881 | { 180, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDSAT |
| 4882 | { 179, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDSAT |
| 4883 | { 178, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULH |
| 4884 | { 177, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULH |
| 4885 | { 176, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULO |
| 4886 | { 175, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULO |
| 4887 | { 174, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBE |
| 4888 | { 173, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBO |
| 4889 | { 172, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SADDE |
| 4890 | { 171, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDO |
| 4891 | { 170, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBE |
| 4892 | { 169, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBO |
| 4893 | { 168, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UADDE |
| 4894 | { 167, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDO |
| 4895 | { 166, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SELECT |
| 4896 | { 165, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UCMP |
| 4897 | { 164, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SCMP |
| 4898 | { 163, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCMP |
| 4899 | { 162, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ICMP |
| 4900 | { 161, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTL |
| 4901 | { 160, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTR |
| 4902 | { 159, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHR |
| 4903 | { 158, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHL |
| 4904 | { 157, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASHR |
| 4905 | { 156, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LSHR |
| 4906 | { 155, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHL |
| 4907 | { 154, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ZEXT |
| 4908 | { 153, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT_INREG |
| 4909 | { 152, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT |
| 4910 | { 151, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VAARG |
| 4911 | { 150, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VASTART |
| 4912 | { 149, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCONSTANT |
| 4913 | { 148, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT |
| 4914 | { 147, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_USAT_U |
| 4915 | { 146, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_U |
| 4916 | { 145, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_S |
| 4917 | { 144, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC |
| 4918 | { 143, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ANYEXT |
| 4919 | { 142, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
| 4920 | { 141, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT |
| 4921 | { 140, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_INTRINSIC_W_SIDE_EFFECTS |
| 4922 | { 139, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_INTRINSIC |
| 4923 | { 138, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_INVOKE_REGION_START |
| 4924 | { 137, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRINDIRECT |
| 4925 | { 136, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRCOND |
| 4926 | { 135, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 93, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_PREFETCH |
| 4927 | { 134, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 20, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_FENCE |
| 4928 | { 133, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_SAT |
| 4929 | { 132, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_COND |
| 4930 | { 131, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UDEC_WRAP |
| 4931 | { 130, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UINC_WRAP |
| 4932 | { 129, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUMNUM |
| 4933 | { 128, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUMNUM |
| 4934 | { 127, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUM |
| 4935 | { 126, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUM |
| 4936 | { 125, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMIN |
| 4937 | { 124, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAX |
| 4938 | { 123, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FSUB |
| 4939 | { 122, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FADD |
| 4940 | { 121, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMIN |
| 4941 | { 120, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMAX |
| 4942 | { 119, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MIN |
| 4943 | { 118, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MAX |
| 4944 | { 117, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XOR |
| 4945 | { 116, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_OR |
| 4946 | { 115, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_NAND |
| 4947 | { 114, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_AND |
| 4948 | { 113, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_SUB |
| 4949 | { 112, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_ADD |
| 4950 | { 111, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XCHG |
| 4951 | { 110, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG |
| 4952 | { 109, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 81, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
| 4953 | { 108, 5, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 76, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_INDEXED_STORE |
| 4954 | { 107, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_FPTRUNCSTORE |
| 4955 | { 106, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_STORE |
| 4956 | { 105, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_ZEXTLOAD |
| 4957 | { 104, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_SEXTLOAD |
| 4958 | { 103, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_LOAD |
| 4959 | { 102, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_FPEXTLOAD |
| 4960 | { 101, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_ZEXTLOAD |
| 4961 | { 100, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_SEXTLOAD |
| 4962 | { 99, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_LOAD |
| 4963 | { 98, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READSTEADYCOUNTER |
| 4964 | { 97, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READCYCLECOUNTER |
| 4965 | { 96, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUNDEVEN |
| 4966 | { 95, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LLRINT |
| 4967 | { 94, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LRINT |
| 4968 | { 93, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUND |
| 4969 | { 92, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_TRUNC |
| 4970 | { 91, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_FPTRUNC_ROUND |
| 4971 | { 90, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_FOLD_BARRIER |
| 4972 | { 89, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREEZE |
| 4973 | { 88, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITCAST |
| 4974 | { 87, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTTOPTR |
| 4975 | { 86, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRTOINT |
| 4976 | { 85, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_CONCAT_VECTORS |
| 4977 | { 84, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR_TRUNC |
| 4978 | { 83, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR |
| 4979 | { 82, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_MERGE_VALUES |
| 4980 | { 81, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT |
| 4981 | { 80, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_UNMERGE_VALUES |
| 4982 | { 79, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT |
| 4983 | { 78, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_POOL |
| 4984 | { 77, 5, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 52, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRAUTH_GLOBAL_VALUE |
| 4985 | { 76, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_GLOBAL_VALUE |
| 4986 | { 75, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRAME_INDEX |
| 4987 | { 74, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_PHI |
| 4988 | { 73, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IMPLICIT_DEF |
| 4989 | { 72, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGCEIL |
| 4990 | { 71, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGFLOOR |
| 4991 | { 70, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGCEIL |
| 4992 | { 69, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGFLOOR |
| 4993 | { 68, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDU |
| 4994 | { 67, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDS |
| 4995 | { 66, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_XOR |
| 4996 | { 65, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_OR |
| 4997 | { 64, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_AND |
| 4998 | { 63, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVREM |
| 4999 | { 62, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVREM |
| 5000 | { 61, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UREM |
| 5001 | { 60, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SREM |
| 5002 | { 59, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIV |
| 5003 | { 58, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIV |
| 5004 | { 57, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_MUL |
| 5005 | { 56, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SUB |
| 5006 | { 55, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ADD |
| 5007 | { 54, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ALIGN |
| 5008 | { 53, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ZEXT |
| 5009 | { 52, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_SEXT |
| 5010 | { 51, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_GLUE |
| 5011 | { 50, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_LOOP |
| 5012 | { 49, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ANCHOR |
| 5013 | { 48, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ENTRY |
| 5014 | { 47, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RELOC_NONE |
| 5015 | { 46, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // JUMP_TABLE_DEBUG_INFO |
| 5016 | { 45, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MEMBARRIER |
| 5017 | { 44, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // FAKE_USE |
| 5018 | { 43, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ICALL_BRANCH_FUNNEL |
| 5019 | { 42, 3, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 36, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_22143 |
| 5020 | { 41, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_22142 |
| 5021 | { 40, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_TAIL_CALL |
| 5022 | { 39, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_EXIT |
| 5023 | { 38, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_RET |
| 5024 | { 37, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_ENTER |
| 5025 | { 36, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_OP |
| 5026 | { 35, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FAULTING_OP |
| 5027 | { 34, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 32, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // LOCAL_ESCAPE |
| 5028 | { 33, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STATEPOINT |
| 5029 | { 32, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 29, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_22141 |
| 5030 | { 31, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREALLOCATED_SETUP |
| 5031 | { 30, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // anonymous_13978 |
| 5032 | { 29, 6, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 22, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHPOINT |
| 5033 | { 28, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FENTRY_CALL |
| 5034 | { 27, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STACKMAP |
| 5035 | { 26, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 18, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // ARITH_FENCE |
| 5036 | { 25, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 14, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PSEUDO_PROBE |
| 5037 | { 24, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_END |
| 5038 | { 23, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_START |
| 5039 | { 22, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // BUNDLE |
| 5040 | { 21, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 11, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_LANEMASK |
| 5041 | { 20, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY |
| 5042 | { 19, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // REG_SEQUENCE |
| 5043 | { 18, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // DBG_LABEL |
| 5044 | { 17, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_PHI |
| 5045 | { 16, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_INSTR_REF |
| 5046 | { 15, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE_LIST |
| 5047 | { 14, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE |
| 5048 | { 13, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_TO_REGCLASS |
| 5049 | { 12, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // SUBREG_TO_REG |
| 5050 | { 11, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INIT_UNDEF |
| 5051 | { 10, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // IMPLICIT_DEF |
| 5052 | { 9, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 5, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INSERT_SUBREG |
| 5053 | { 8, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // EXTRACT_SUBREG |
| 5054 | { 7, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // KILL |
| 5055 | { 6, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // ANNOTATION_LABEL |
| 5056 | { 5, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // GC_LABEL |
| 5057 | { 4, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // EH_LABEL |
| 5058 | { 3, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // CFI_INSTRUCTION |
| 5059 | { 2, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INLINEASM_BR |
| 5060 | { 1, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // INLINEASM |
| 5061 | { 0, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // PHI |
| 5062 | }, { |
| 5063 | /* 0 */ |
| 5064 | /* 0 */ LoongArch::R3, LoongArch::R3, |
| 5065 | /* 2 */ LoongArch::R3, |
| 5066 | /* 3 */ LoongArch::R1, |
| 5067 | /* 4 */ LoongArch::R1, LoongArch::R20, |
| 5068 | /* 6 */ LoongArch::R4, LoongArch::R4, |
| 5069 | /* 8 */ LoongArch::R1, LoongArch::R4, |
| 5070 | /* 10 */ LoongArch::R3, LoongArch::R20, |
| 5071 | }, { |
| 5072 | 0 |
| 5073 | }, { |
| 5074 | /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5075 | /* 1 */ |
| 5076 | /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5077 | /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5078 | /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5079 | /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5080 | /* 11 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5081 | /* 14 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5082 | /* 18 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, |
| 5083 | /* 20 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5084 | /* 22 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5085 | /* 28 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5086 | /* 29 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5087 | /* 32 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5088 | /* 34 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5089 | /* 36 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5090 | /* 39 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5091 | /* 42 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5092 | /* 45 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5093 | /* 49 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5094 | /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5095 | /* 52 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5096 | /* 57 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5097 | /* 60 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5098 | /* 62 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5099 | /* 66 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5100 | /* 68 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5101 | /* 71 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5102 | /* 76 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5103 | /* 81 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5104 | /* 86 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5105 | /* 90 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5106 | /* 93 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_2, 0 }, |
| 5107 | /* 97 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5108 | /* 100 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5109 | /* 103 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5110 | /* 107 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5111 | /* 111 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5112 | /* 114 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5113 | /* 119 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5114 | /* 123 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5115 | /* 126 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
| 5116 | /* 130 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
| 5117 | /* 133 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5118 | /* 137 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5119 | /* 141 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5120 | /* 143 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5121 | /* 147 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5122 | /* 151 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5123 | /* 154 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5124 | /* 158 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5125 | /* 163 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5126 | /* 166 */ { LoongArch::GPRJRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5127 | /* 168 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5128 | /* 170 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5129 | /* 178 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5130 | /* 184 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5131 | /* 186 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5132 | /* 189 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5133 | /* 192 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5134 | /* 200 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5135 | /* 207 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5136 | /* 214 */ { LoongArch::GPRTRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5137 | /* 215 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5138 | /* 217 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5139 | /* 219 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5140 | /* 221 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5141 | /* 225 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5142 | /* 227 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5143 | /* 233 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5144 | /* 236 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5145 | /* 238 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5146 | /* 241 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5147 | /* 245 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5148 | /* 248 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5149 | /* 250 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5150 | /* 255 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5151 | /* 259 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5152 | /* 262 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRNoR0R1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5153 | /* 266 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5154 | /* 268 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5155 | /* 270 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5156 | /* 273 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5157 | /* 276 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5158 | /* 279 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5159 | /* 282 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5160 | /* 284 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5161 | /* 286 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5162 | /* 289 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5163 | /* 292 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5164 | /* 295 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5165 | /* 299 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5166 | /* 303 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5167 | /* 307 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5168 | /* 311 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5169 | /* 313 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5170 | /* 315 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FCSRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5171 | /* 317 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5172 | /* 319 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5173 | /* 321 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5174 | /* 323 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5175 | /* 325 */ { LoongArch::FCSRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5176 | /* 327 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5177 | /* 330 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5178 | /* 332 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5179 | /* 334 */ { LoongArch::SCRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5180 | /* 336 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::SCRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5181 | /* 338 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5182 | /* 341 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5183 | /* 344 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5184 | /* 348 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5185 | /* 352 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5186 | /* 353 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5187 | /* 356 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5188 | /* 359 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5189 | /* 363 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5190 | /* 367 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5191 | /* 369 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5192 | /* 371 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5193 | /* 375 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5194 | /* 379 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5195 | /* 382 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5196 | /* 385 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5197 | /* 388 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5198 | /* 390 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5199 | /* 393 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5200 | /* 395 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5201 | /* 399 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5202 | /* 402 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5203 | /* 405 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5204 | /* 409 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5205 | /* 413 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5206 | /* 417 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5207 | /* 420 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5208 | /* 423 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5209 | /* 426 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5210 | /* 428 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5211 | /* 431 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5212 | /* 433 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5213 | } |
| 5214 | }; |
| 5215 | |
| 5216 | |
| 5217 | #ifdef __GNUC__ |
| 5218 | #pragma GCC diagnostic push |
| 5219 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 5220 | #endif |
| 5221 | extern const char LoongArchInstrNameData[] = { |
| 5222 | /* 0 */ "G_FLOG10\000" |
| 5223 | /* 9 */ "G_FEXP10\000" |
| 5224 | /* 18 */ "PseudoTAIL30\000" |
| 5225 | /* 31 */ "PseudoCALL30\000" |
| 5226 | /* 44 */ "JISCR0\000" |
| 5227 | /* 51 */ "JISCR1\000" |
| 5228 | /* 58 */ "PseudoCTPOP_H_LA32\000" |
| 5229 | /* 77 */ "PseudoCTPOP_W_LA32\000" |
| 5230 | /* 96 */ "PseudoMaskedAtomicLoadSub32\000" |
| 5231 | /* 124 */ "PseudoAtomicLoadSub32\000" |
| 5232 | /* 146 */ "PseudoMaskedAtomicLoadAdd32\000" |
| 5233 | /* 174 */ "PseudoAtomicLoadAdd32\000" |
| 5234 | /* 196 */ "PseudoAtomicLoadAnd32\000" |
| 5235 | /* 218 */ "PseudoMaskedAtomicLoadNand32\000" |
| 5236 | /* 247 */ "PseudoAtomicLoadNand32\000" |
| 5237 | /* 270 */ "PseudoMaskedCmpXchg32\000" |
| 5238 | /* 292 */ "PseudoCmpXchg32\000" |
| 5239 | /* 308 */ "PseudoMaskedAtomicLoadUMin32\000" |
| 5240 | /* 337 */ "PseudoAtomicLoadUMin32\000" |
| 5241 | /* 360 */ "PseudoMaskedAtomicLoadMin32\000" |
| 5242 | /* 388 */ "PseudoAtomicLoadMin32\000" |
| 5243 | /* 410 */ "PseudoMaskedAtomicSwap32\000" |
| 5244 | /* 435 */ "PseudoAtomicSwap32\000" |
| 5245 | /* 454 */ "PseudoAtomicLoadOr32\000" |
| 5246 | /* 475 */ "PseudoAtomicLoadXor32\000" |
| 5247 | /* 497 */ "PseudoMaskedAtomicLoadUMax32\000" |
| 5248 | /* 526 */ "PseudoAtomicLoadUMax32\000" |
| 5249 | /* 549 */ "PseudoMaskedAtomicLoadMax32\000" |
| 5250 | /* 577 */ "PseudoAtomicLoadMax32\000" |
| 5251 | /* 599 */ "G_FLOG2\000" |
| 5252 | /* 607 */ "G_FATAN2\000" |
| 5253 | /* 616 */ "G_FEXP2\000" |
| 5254 | /* 624 */ "MOVFR2GR_S_64\000" |
| 5255 | /* 638 */ "MOVGR2FR_W_64\000" |
| 5256 | /* 652 */ "PseudoAtomicLoadNand64\000" |
| 5257 | /* 675 */ "PseudoCmpXchg64\000" |
| 5258 | /* 691 */ "PseudoTAIL36\000" |
| 5259 | /* 704 */ "PseudoCALL36\000" |
| 5260 | /* 717 */ "PseudoCmpXchg128\000" |
| 5261 | /* 734 */ "G_FMA\000" |
| 5262 | /* 740 */ "G_STRICT_FMA\000" |
| 5263 | /* 753 */ "BITREV_4B\000" |
| 5264 | /* 763 */ "BITREV_8B\000" |
| 5265 | /* 773 */ "INVTLB\000" |
| 5266 | /* 780 */ "G_FSUB\000" |
| 5267 | /* 787 */ "G_STRICT_FSUB\000" |
| 5268 | /* 801 */ "G_ATOMICRMW_FSUB\000" |
| 5269 | /* 818 */ "G_SUB\000" |
| 5270 | /* 824 */ "G_ATOMICRMW_SUB\000" |
| 5271 | /* 840 */ "XVREPLVE0_B\000" |
| 5272 | /* 852 */ "XVADDA_B\000" |
| 5273 | /* 861 */ "X86SRA_B\000" |
| 5274 | /* 870 */ "XVSRA_B\000" |
| 5275 | /* 878 */ "AMADD__DB_B\000" |
| 5276 | /* 890 */ "AMSWAP__DB_B\000" |
| 5277 | /* 903 */ "AMCAS__DB_B\000" |
| 5278 | /* 915 */ "X86SUB_B\000" |
| 5279 | /* 924 */ "XVMSUB_B\000" |
| 5280 | /* 933 */ "XVSSUB_B\000" |
| 5281 | /* 942 */ "XVSUB_B\000" |
| 5282 | /* 950 */ "X86SBC_B\000" |
| 5283 | /* 959 */ "X86ADC_B\000" |
| 5284 | /* 968 */ "X86DEC_B\000" |
| 5285 | /* 977 */ "X86INC_B\000" |
| 5286 | /* 986 */ "X86ADD_B\000" |
| 5287 | /* 995 */ "AMADD_B\000" |
| 5288 | /* 1003 */ "XVMADD_B\000" |
| 5289 | /* 1012 */ "XVSADD_B\000" |
| 5290 | /* 1021 */ "XVADD_B\000" |
| 5291 | /* 1029 */ "LD_B\000" |
| 5292 | /* 1034 */ "X86AND_B\000" |
| 5293 | /* 1043 */ "XVPACKOD_B\000" |
| 5294 | /* 1054 */ "XVPICKOD_B\000" |
| 5295 | /* 1065 */ "XVMOD_B\000" |
| 5296 | /* 1073 */ "IOCSRRD_B\000" |
| 5297 | /* 1083 */ "XVABSD_B\000" |
| 5298 | /* 1092 */ "VEXT2XV_D_B\000" |
| 5299 | /* 1104 */ "LDLE_B\000" |
| 5300 | /* 1111 */ "XVSLE_B\000" |
| 5301 | /* 1119 */ "STLE_B\000" |
| 5302 | /* 1126 */ "XVREPLVE_B\000" |
| 5303 | /* 1137 */ "XVSHUF_B\000" |
| 5304 | /* 1146 */ "XVNEG_B\000" |
| 5305 | /* 1154 */ "XVAVG_B\000" |
| 5306 | /* 1162 */ "XVMUH_B\000" |
| 5307 | /* 1170 */ "XVILVH_B\000" |
| 5308 | /* 1179 */ "XVSUBWOD_H_B\000" |
| 5309 | /* 1192 */ "XVMADDWOD_H_B\000" |
| 5310 | /* 1206 */ "XVADDWOD_H_B\000" |
| 5311 | /* 1219 */ "XVMULWOD_H_B\000" |
| 5312 | /* 1232 */ "XVEXTH_H_B\000" |
| 5313 | /* 1243 */ "XVSLLWIL_H_B\000" |
| 5314 | /* 1256 */ "XVSUBWEV_H_B\000" |
| 5315 | /* 1269 */ "XVMADDWEV_H_B\000" |
| 5316 | /* 1283 */ "XVADDWEV_H_B\000" |
| 5317 | /* 1296 */ "XVMULWEV_H_B\000" |
| 5318 | /* 1309 */ "VEXT2XV_H_B\000" |
| 5319 | /* 1321 */ "XVHSUBW_H_B\000" |
| 5320 | /* 1333 */ "XVHADDW_H_B\000" |
| 5321 | /* 1345 */ "XVSHUF4I_B\000" |
| 5322 | /* 1356 */ "X86SRAI_B\000" |
| 5323 | /* 1366 */ "XVSRAI_B\000" |
| 5324 | /* 1375 */ "XVANDI_B\000" |
| 5325 | /* 1384 */ "XVSLEI_B\000" |
| 5326 | /* 1393 */ "XVREPL128VEI_B\000" |
| 5327 | /* 1408 */ "VREPLVEI_B\000" |
| 5328 | /* 1419 */ "X86RCLI_B\000" |
| 5329 | /* 1429 */ "XVBITSELI_B\000" |
| 5330 | /* 1441 */ "X86SLLI_B\000" |
| 5331 | /* 1451 */ "XVSLLI_B\000" |
| 5332 | /* 1460 */ "PseudoXVREPLI_B\000" |
| 5333 | /* 1476 */ "PseudoVREPLI_B\000" |
| 5334 | /* 1491 */ "X86SRLI_B\000" |
| 5335 | /* 1501 */ "XVSRLI_B\000" |
| 5336 | /* 1510 */ "X86ROTLI_B\000" |
| 5337 | /* 1521 */ "XVMINI_B\000" |
| 5338 | /* 1530 */ "XVFRSTPI_B\000" |
| 5339 | /* 1541 */ "XVSEQI_B\000" |
| 5340 | /* 1550 */ "XVSRARI_B\000" |
| 5341 | /* 1560 */ "X86RCRI_B\000" |
| 5342 | /* 1570 */ "XVBITCLRI_B\000" |
| 5343 | /* 1582 */ "XVSRLRI_B\000" |
| 5344 | /* 1592 */ "XVNORI_B\000" |
| 5345 | /* 1601 */ "XVORI_B\000" |
| 5346 | /* 1609 */ "XVXORI_B\000" |
| 5347 | /* 1618 */ "X86ROTRI_B\000" |
| 5348 | /* 1629 */ "XVROTRI_B\000" |
| 5349 | /* 1639 */ "XVBITSETI_B\000" |
| 5350 | /* 1651 */ "XVSLTI_B\000" |
| 5351 | /* 1660 */ "XVBITREVI_B\000" |
| 5352 | /* 1672 */ "XVMAXI_B\000" |
| 5353 | /* 1681 */ "X86RCL_B\000" |
| 5354 | /* 1690 */ "X86SLL_B\000" |
| 5355 | /* 1699 */ "XVSLL_B\000" |
| 5356 | /* 1707 */ "XVLDREPL_B\000" |
| 5357 | /* 1718 */ "X86SRL_B\000" |
| 5358 | /* 1727 */ "XVSRL_B\000" |
| 5359 | /* 1735 */ "X86ROTL_B\000" |
| 5360 | /* 1745 */ "X86MUL_B\000" |
| 5361 | /* 1754 */ "XVMUL_B\000" |
| 5362 | /* 1762 */ "XVILVL_B\000" |
| 5363 | /* 1771 */ "XVSTELM_B\000" |
| 5364 | /* 1781 */ "XVMIN_B\000" |
| 5365 | /* 1789 */ "XVCLO_B\000" |
| 5366 | /* 1797 */ "AMSWAP_B\000" |
| 5367 | /* 1806 */ "PseudoCTPOP_B\000" |
| 5368 | /* 1820 */ "XVFRSTP_B\000" |
| 5369 | /* 1830 */ "XVSEQ_B\000" |
| 5370 | /* 1838 */ "XVSRAR_B\000" |
| 5371 | /* 1847 */ "X86RCR_B\000" |
| 5372 | /* 1856 */ "VPICKVE2GR_B\000" |
| 5373 | /* 1869 */ "XVAVGR_B\000" |
| 5374 | /* 1878 */ "XVBITCLR_B\000" |
| 5375 | /* 1889 */ "XVSRLR_B\000" |
| 5376 | /* 1898 */ "X86OR_B\000" |
| 5377 | /* 1906 */ "X86XOR_B\000" |
| 5378 | /* 1915 */ "X86ROTR_B\000" |
| 5379 | /* 1925 */ "XVROTR_B\000" |
| 5380 | /* 1934 */ "XVREPLGR2VR_B\000" |
| 5381 | /* 1948 */ "PseudoXVINSGR2VR_B\000" |
| 5382 | /* 1967 */ "IOCSRWR_B\000" |
| 5383 | /* 1977 */ "AMCAS_B\000" |
| 5384 | /* 1985 */ "XVEXTRINS_B\000" |
| 5385 | /* 1997 */ "XVSAT_B\000" |
| 5386 | /* 2005 */ "XVBITSET_B\000" |
| 5387 | /* 2016 */ "LDGT_B\000" |
| 5388 | /* 2023 */ "STGT_B\000" |
| 5389 | /* 2030 */ "XVSLT_B\000" |
| 5390 | /* 2038 */ "XVPCNT_B\000" |
| 5391 | /* 2047 */ "ST_B\000" |
| 5392 | /* 2052 */ "XVMADDWOD_H_BU_B\000" |
| 5393 | /* 2069 */ "XVADDWOD_H_BU_B\000" |
| 5394 | /* 2085 */ "XVMULWOD_H_BU_B\000" |
| 5395 | /* 2101 */ "XVMADDWEV_H_BU_B\000" |
| 5396 | /* 2118 */ "XVADDWEV_H_BU_B\000" |
| 5397 | /* 2134 */ "XVMULWEV_H_BU_B\000" |
| 5398 | /* 2150 */ "XVPACKEV_B\000" |
| 5399 | /* 2161 */ "XVPICKEV_B\000" |
| 5400 | /* 2172 */ "XVBITREV_B\000" |
| 5401 | /* 2183 */ "XVDIV_B\000" |
| 5402 | /* 2191 */ "XVSIGNCOV_B\000" |
| 5403 | /* 2203 */ "EXT_W_B\000" |
| 5404 | /* 2211 */ "VEXT2XV_W_B\000" |
| 5405 | /* 2223 */ "XVMAX_B\000" |
| 5406 | /* 2231 */ "LDX_B\000" |
| 5407 | /* 2237 */ "STX_B\000" |
| 5408 | /* 2243 */ "PseudoXVBZ_B\000" |
| 5409 | /* 2256 */ "PseudoVBZ_B\000" |
| 5410 | /* 2268 */ "PseudoXVMSKGEZ_B\000" |
| 5411 | /* 2285 */ "PseudoVMSKGEZ_B\000" |
| 5412 | /* 2301 */ "PseudoXVMSKNEZ_B\000" |
| 5413 | /* 2318 */ "PseudoVMSKNEZ_B\000" |
| 5414 | /* 2334 */ "XVSETALLNEZ_B\000" |
| 5415 | /* 2348 */ "XVCLZ_B\000" |
| 5416 | /* 2356 */ "PseudoXVBNZ_B\000" |
| 5417 | /* 2370 */ "PseudoVBNZ_B\000" |
| 5418 | /* 2383 */ "XVMSKNZ_B\000" |
| 5419 | /* 2393 */ "PseudoXVMSKEQZ_B\000" |
| 5420 | /* 2410 */ "PseudoVMSKEQZ_B\000" |
| 5421 | /* 2426 */ "XVSETANYEQZ_B\000" |
| 5422 | /* 2440 */ "PseudoXVMSKLTZ_B\000" |
| 5423 | /* 2457 */ "PseudoVMSKLTZ_B\000" |
| 5424 | /* 2473 */ "G_INTRINSIC\000" |
| 5425 | /* 2485 */ "G_FPTRUNC\000" |
| 5426 | /* 2495 */ "G_INTRINSIC_TRUNC\000" |
| 5427 | /* 2513 */ "G_TRUNC\000" |
| 5428 | /* 2521 */ "G_BUILD_VECTOR_TRUNC\000" |
| 5429 | /* 2542 */ "PROBED_STACKALLOC\000" |
| 5430 | /* 2560 */ "G_DYN_STACKALLOC\000" |
| 5431 | /* 2577 */ "PseudoLA_TLS_DESC\000" |
| 5432 | /* 2595 */ "G_FMAD\000" |
| 5433 | /* 2602 */ "G_FPEXTLOAD\000" |
| 5434 | /* 2614 */ "G_INDEXED_SEXTLOAD\000" |
| 5435 | /* 2633 */ "G_SEXTLOAD\000" |
| 5436 | /* 2644 */ "G_INDEXED_ZEXTLOAD\000" |
| 5437 | /* 2663 */ "G_ZEXTLOAD\000" |
| 5438 | /* 2674 */ "G_INDEXED_LOAD\000" |
| 5439 | /* 2689 */ "G_LOAD\000" |
| 5440 | /* 2696 */ "G_VECREDUCE_FADD\000" |
| 5441 | /* 2713 */ "G_FADD\000" |
| 5442 | /* 2720 */ "G_VECREDUCE_SEQ_FADD\000" |
| 5443 | /* 2741 */ "G_STRICT_FADD\000" |
| 5444 | /* 2755 */ "G_ATOMICRMW_FADD\000" |
| 5445 | /* 2772 */ "G_VECREDUCE_ADD\000" |
| 5446 | /* 2788 */ "G_ADD\000" |
| 5447 | /* 2794 */ "G_PTR_ADD\000" |
| 5448 | /* 2804 */ "G_ATOMICRMW_ADD\000" |
| 5449 | /* 2820 */ "PseudoLA_TLS_GD\000" |
| 5450 | /* 2836 */ "PRELD\000" |
| 5451 | /* 2842 */ "XVLD\000" |
| 5452 | /* 2847 */ "FCVT_D_LD\000" |
| 5453 | /* 2857 */ "PseudoLA_TLS_LD\000" |
| 5454 | /* 2873 */ "G_ATOMICRMW_NAND\000" |
| 5455 | /* 2890 */ "G_VECREDUCE_AND\000" |
| 5456 | /* 2906 */ "G_AND\000" |
| 5457 | /* 2912 */ "G_ATOMICRMW_AND\000" |
| 5458 | /* 2928 */ "LIFETIME_END\000" |
| 5459 | /* 2941 */ "PseudoBRIND\000" |
| 5460 | /* 2953 */ "G_BRCOND\000" |
| 5461 | /* 2962 */ "G_ATOMICRMW_USUB_COND\000" |
| 5462 | /* 2984 */ "G_LLROUND\000" |
| 5463 | /* 2994 */ "G_LROUND\000" |
| 5464 | /* 3003 */ "G_INTRINSIC_ROUND\000" |
| 5465 | /* 3021 */ "G_INTRINSIC_FPTRUNC_ROUND\000" |
| 5466 | /* 3047 */ "LOAD_STACK_GUARD\000" |
| 5467 | /* 3064 */ "TLBRD\000" |
| 5468 | /* 3070 */ "GCSRRD\000" |
| 5469 | /* 3077 */ "UD\000" |
| 5470 | /* 3080 */ "XVREPLVE0_D\000" |
| 5471 | /* 3092 */ "XVINSVE0_D\000" |
| 5472 | /* 3103 */ "XVADDA_D\000" |
| 5473 | /* 3112 */ "XVFMINA_D\000" |
| 5474 | /* 3122 */ "X86SRA_D\000" |
| 5475 | /* 3131 */ "XVSRA_D\000" |
| 5476 | /* 3139 */ "XVFMAXA_D\000" |
| 5477 | /* 3149 */ "AMADD__DB_D\000" |
| 5478 | /* 3161 */ "AMAND__DB_D\000" |
| 5479 | /* 3173 */ "AMMIN__DB_D\000" |
| 5480 | /* 3185 */ "AMSWAP__DB_D\000" |
| 5481 | /* 3198 */ "AMOR__DB_D\000" |
| 5482 | /* 3209 */ "AMXOR__DB_D\000" |
| 5483 | /* 3221 */ "AMCAS__DB_D\000" |
| 5484 | /* 3233 */ "AMMAX__DB_D\000" |
| 5485 | /* 3245 */ "FSCALEB_D\000" |
| 5486 | /* 3255 */ "XVFLOGB_D\000" |
| 5487 | /* 3265 */ "X86SUB_D\000" |
| 5488 | /* 3274 */ "XVFSUB_D\000" |
| 5489 | /* 3283 */ "XVFMSUB_D\000" |
| 5490 | /* 3293 */ "XVFNMSUB_D\000" |
| 5491 | /* 3304 */ "XVMSUB_D\000" |
| 5492 | /* 3313 */ "XVSSUB_D\000" |
| 5493 | /* 3322 */ "XVSUB_D\000" |
| 5494 | /* 3330 */ "REVB_D\000" |
| 5495 | /* 3337 */ "X86SBC_D\000" |
| 5496 | /* 3346 */ "X86ADC_D\000" |
| 5497 | /* 3355 */ "X86DEC_D\000" |
| 5498 | /* 3364 */ "X86INC_D\000" |
| 5499 | /* 3373 */ "SC_D\000" |
| 5500 | /* 3378 */ "X86ADD_D\000" |
| 5501 | /* 3387 */ "XVFADD_D\000" |
| 5502 | /* 3396 */ "AMADD_D\000" |
| 5503 | /* 3404 */ "XVFMADD_D\000" |
| 5504 | /* 3414 */ "XVFNMADD_D\000" |
| 5505 | /* 3425 */ "XVMADD_D\000" |
| 5506 | /* 3434 */ "XVSADD_D\000" |
| 5507 | /* 3443 */ "XVADD_D\000" |
| 5508 | /* 3451 */ "FLD_D\000" |
| 5509 | /* 3457 */ "FCVT_LD_D\000" |
| 5510 | /* 3467 */ "X86AND_D\000" |
| 5511 | /* 3476 */ "AMAND_D\000" |
| 5512 | /* 3484 */ "XVPACKOD_D\000" |
| 5513 | /* 3495 */ "XVPICKOD_D\000" |
| 5514 | /* 3506 */ "XVMOD_D\000" |
| 5515 | /* 3514 */ "IOCSRRD_D\000" |
| 5516 | /* 3524 */ "XVABSD_D\000" |
| 5517 | /* 3533 */ "FCVT_UD_D\000" |
| 5518 | /* 3543 */ "XVFCMP_CLE_D\000" |
| 5519 | /* 3556 */ "FLDLE_D\000" |
| 5520 | /* 3564 */ "XVSLE_D\000" |
| 5521 | /* 3572 */ "XVFCMP_SLE_D\000" |
| 5522 | /* 3585 */ "ASRTLE_D\000" |
| 5523 | /* 3594 */ "FSTLE_D\000" |
| 5524 | /* 3602 */ "XVFCMP_CULE_D\000" |
| 5525 | /* 3616 */ "XVFCMP_SULE_D\000" |
| 5526 | /* 3630 */ "RDTIME_D\000" |
| 5527 | /* 3639 */ "XVFCMP_CNE_D\000" |
| 5528 | /* 3652 */ "XVFRINTRNE_D\000" |
| 5529 | /* 3665 */ "XVFCMP_SNE_D\000" |
| 5530 | /* 3678 */ "XVFCMP_CUNE_D\000" |
| 5531 | /* 3692 */ "XVFCMP_SUNE_D\000" |
| 5532 | /* 3706 */ "XVFRECIPE_D\000" |
| 5533 | /* 3718 */ "XVFRSQRTE_D\000" |
| 5534 | /* 3730 */ "XVPICKVE_D\000" |
| 5535 | /* 3741 */ "XVREPLVE_D\000" |
| 5536 | /* 3752 */ "XVFCMP_CAF_D\000" |
| 5537 | /* 3765 */ "XVFCMP_SAF_D\000" |
| 5538 | /* 3778 */ "XVSHUF_D\000" |
| 5539 | /* 3787 */ "FNEG_D\000" |
| 5540 | /* 3794 */ "XVNEG_D\000" |
| 5541 | /* 3802 */ "XVAVG_D\000" |
| 5542 | /* 3810 */ "MULH_D\000" |
| 5543 | /* 3817 */ "XVMUH_D\000" |
| 5544 | /* 3825 */ "REVH_D\000" |
| 5545 | /* 3832 */ "XVILVH_D\000" |
| 5546 | /* 3841 */ "ADDU12I_D\000" |
| 5547 | /* 3851 */ "LU32I_D\000" |
| 5548 | /* 3859 */ "LU52I_D\000" |
| 5549 | /* 3867 */ "XVSHUF4I_D\000" |
| 5550 | /* 3878 */ "ADDU16I_D\000" |
| 5551 | /* 3888 */ "X86SRAI_D\000" |
| 5552 | /* 3898 */ "XVSRAI_D\000" |
| 5553 | /* 3907 */ "ADDI_D\000" |
| 5554 | /* 3914 */ "XVSLEI_D\000" |
| 5555 | /* 3923 */ "XVREPL128VEI_D\000" |
| 5556 | /* 3938 */ "VREPLVEI_D\000" |
| 5557 | /* 3949 */ "X86RCLI_D\000" |
| 5558 | /* 3959 */ "XVHSELI_D\000" |
| 5559 | /* 3969 */ "X86SLLI_D\000" |
| 5560 | /* 3979 */ "XVSLLI_D\000" |
| 5561 | /* 3988 */ "PseudoXVREPLI_D\000" |
| 5562 | /* 4004 */ "PseudoVREPLI_D\000" |
| 5563 | /* 4019 */ "X86SRLI_D\000" |
| 5564 | /* 4029 */ "XVSRLI_D\000" |
| 5565 | /* 4038 */ "X86ROTLI_D\000" |
| 5566 | /* 4049 */ "PseudoLI_D\000" |
| 5567 | /* 4060 */ "XVPERMI_D\000" |
| 5568 | /* 4070 */ "XVMINI_D\000" |
| 5569 | /* 4079 */ "XVSEQI_D\000" |
| 5570 | /* 4088 */ "XVSRARI_D\000" |
| 5571 | /* 4098 */ "X86RCRI_D\000" |
| 5572 | /* 4108 */ "XVBITCLRI_D\000" |
| 5573 | /* 4120 */ "XVSRLRI_D\000" |
| 5574 | /* 4130 */ "X86ROTRI_D\000" |
| 5575 | /* 4141 */ "XVROTRI_D\000" |
| 5576 | /* 4151 */ "XVBITSETI_D\000" |
| 5577 | /* 4163 */ "XVSLTI_D\000" |
| 5578 | /* 4172 */ "XVBITREVI_D\000" |
| 5579 | /* 4184 */ "XVMAXI_D\000" |
| 5580 | /* 4193 */ "BYTEPICK_D\000" |
| 5581 | /* 4204 */ "BSTRPICK_D\000" |
| 5582 | /* 4215 */ "X86RCL_D\000" |
| 5583 | /* 4224 */ "LDL_D\000" |
| 5584 | /* 4230 */ "SCREL_D\000" |
| 5585 | /* 4238 */ "X86SLL_D\000" |
| 5586 | /* 4247 */ "XVSLL_D\000" |
| 5587 | /* 4255 */ "XVLDREPL_D\000" |
| 5588 | /* 4266 */ "X86SRL_D\000" |
| 5589 | /* 4275 */ "XVSRL_D\000" |
| 5590 | /* 4283 */ "ALSL_D\000" |
| 5591 | /* 4290 */ "X86ROTL_D\000" |
| 5592 | /* 4300 */ "STL_D\000" |
| 5593 | /* 4306 */ "X86MUL_D\000" |
| 5594 | /* 4315 */ "XVFMUL_D\000" |
| 5595 | /* 4324 */ "XVMUL_D\000" |
| 5596 | /* 4332 */ "XVILVL_D\000" |
| 5597 | /* 4341 */ "XVFTINTRNE_L_D\000" |
| 5598 | /* 4356 */ "XVFTINTRM_L_D\000" |
| 5599 | /* 4370 */ "XVFTINTRP_L_D\000" |
| 5600 | /* 4384 */ "XVFTINT_L_D\000" |
| 5601 | /* 4396 */ "XVFTINTRZ_L_D\000" |
| 5602 | /* 4410 */ "XVSTELM_D\000" |
| 5603 | /* 4420 */ "XVFRINTRM_D\000" |
| 5604 | /* 4432 */ "FCOPYSIGN_D\000" |
| 5605 | /* 4444 */ "XVFMIN_D\000" |
| 5606 | /* 4453 */ "AMMIN_D\000" |
| 5607 | /* 4461 */ "XVMIN_D\000" |
| 5608 | /* 4469 */ "XVFCMP_CUN_D\000" |
| 5609 | /* 4482 */ "XVFCMP_SUN_D\000" |
| 5610 | /* 4495 */ "XVCLO_D\000" |
| 5611 | /* 4503 */ "CTO_D\000" |
| 5612 | /* 4509 */ "AMSWAP_D\000" |
| 5613 | /* 4518 */ "XVFRECIP_D\000" |
| 5614 | /* 4529 */ "PseudoCTPOP_D\000" |
| 5615 | /* 4543 */ "XVFRINTRP_D\000" |
| 5616 | /* 4555 */ "LLACQ_D\000" |
| 5617 | /* 4563 */ "XVFCMP_CEQ_D\000" |
| 5618 | /* 4576 */ "XVSEQ_D\000" |
| 5619 | /* 4584 */ "XVFCMP_SEQ_D\000" |
| 5620 | /* 4597 */ "XVFCMP_CUEQ_D\000" |
| 5621 | /* 4611 */ "XVFCMP_SUEQ_D\000" |
| 5622 | /* 4625 */ "XVSUBWOD_Q_D\000" |
| 5623 | /* 4638 */ "XVMADDWOD_Q_D\000" |
| 5624 | /* 4652 */ "XVADDWOD_Q_D\000" |
| 5625 | /* 4665 */ "XVMULWOD_Q_D\000" |
| 5626 | /* 4678 */ "XVEXTH_Q_D\000" |
| 5627 | /* 4689 */ "XVEXTL_Q_D\000" |
| 5628 | /* 4700 */ "XVSUBWEV_Q_D\000" |
| 5629 | /* 4713 */ "XVMADDWEV_Q_D\000" |
| 5630 | /* 4727 */ "XVADDWEV_Q_D\000" |
| 5631 | /* 4740 */ "XVMULWEV_Q_D\000" |
| 5632 | /* 4753 */ "XVHSUBW_Q_D\000" |
| 5633 | /* 4765 */ "XVHADDW_Q_D\000" |
| 5634 | /* 4777 */ "XVSRAR_D\000" |
| 5635 | /* 4786 */ "X86RCR_D\000" |
| 5636 | /* 4795 */ "LDR_D\000" |
| 5637 | /* 4801 */ "MOVGR2FR_D\000" |
| 5638 | /* 4812 */ "XVPICKVE2GR_D\000" |
| 5639 | /* 4826 */ "MOVFR2GR_D\000" |
| 5640 | /* 4837 */ "XVAVGR_D\000" |
| 5641 | /* 4846 */ "XVBITCLR_D\000" |
| 5642 | /* 4857 */ "XVSRLR_D\000" |
| 5643 | /* 4866 */ "X86OR_D\000" |
| 5644 | /* 4874 */ "XVFCMP_COR_D\000" |
| 5645 | /* 4887 */ "AMOR_D\000" |
| 5646 | /* 4894 */ "XVFCMP_SOR_D\000" |
| 5647 | /* 4907 */ "X86XOR_D\000" |
| 5648 | /* 4916 */ "AMXOR_D\000" |
| 5649 | /* 4924 */ "X86ROTR_D\000" |
| 5650 | /* 4934 */ "XVROTR_D\000" |
| 5651 | /* 4943 */ "LDPTR_D\000" |
| 5652 | /* 4951 */ "STPTR_D\000" |
| 5653 | /* 4959 */ "STR_D\000" |
| 5654 | /* 4965 */ "XVREPLGR2VR_D\000" |
| 5655 | /* 4979 */ "XVINSGR2VR_D\000" |
| 5656 | /* 4992 */ "IOCSRWR_D\000" |
| 5657 | /* 5002 */ "AMCAS_D\000" |
| 5658 | /* 5010 */ "FABS_D\000" |
| 5659 | /* 5017 */ "BSTRINS_D\000" |
| 5660 | /* 5027 */ "XVEXTRINS_D\000" |
| 5661 | /* 5039 */ "XVFCLASS_D\000" |
| 5662 | /* 5050 */ "XVFCVT_S_D\000" |
| 5663 | /* 5061 */ "XVSAT_D\000" |
| 5664 | /* 5069 */ "XVBITSET_D\000" |
| 5665 | /* 5080 */ "FLDGT_D\000" |
| 5666 | /* 5088 */ "ASRTGT_D\000" |
| 5667 | /* 5097 */ "FSTGT_D\000" |
| 5668 | /* 5105 */ "XVFCMP_CLT_D\000" |
| 5669 | /* 5118 */ "XVSLT_D\000" |
| 5670 | /* 5126 */ "XVFCMP_SLT_D\000" |
| 5671 | /* 5139 */ "XVFCMP_CULT_D\000" |
| 5672 | /* 5153 */ "XVFCMP_SULT_D\000" |
| 5673 | /* 5167 */ "XVPCNT_D\000" |
| 5674 | /* 5176 */ "XVFRINT_D\000" |
| 5675 | /* 5186 */ "XVFSQRT_D\000" |
| 5676 | /* 5196 */ "XVFRSQRT_D\000" |
| 5677 | /* 5207 */ "FST_D\000" |
| 5678 | /* 5213 */ "XVMADDWOD_Q_DU_D\000" |
| 5679 | /* 5230 */ "XVADDWOD_Q_DU_D\000" |
| 5680 | /* 5246 */ "XVMULWOD_Q_DU_D\000" |
| 5681 | /* 5262 */ "XVMADDWEV_Q_DU_D\000" |
| 5682 | /* 5279 */ "XVADDWEV_Q_DU_D\000" |
| 5683 | /* 5295 */ "XVMULWEV_Q_DU_D\000" |
| 5684 | /* 5311 */ "XVFTINT_LU_D\000" |
| 5685 | /* 5324 */ "XVFTINTRZ_LU_D\000" |
| 5686 | /* 5339 */ "XVSSRANI_WU_D\000" |
| 5687 | /* 5353 */ "XVSSRLNI_WU_D\000" |
| 5688 | /* 5367 */ "XVSSRARNI_WU_D\000" |
| 5689 | /* 5382 */ "XVSSRLRNI_WU_D\000" |
| 5690 | /* 5397 */ "XVSSRAN_WU_D\000" |
| 5691 | /* 5410 */ "XVSSRLN_WU_D\000" |
| 5692 | /* 5423 */ "XVSSRARN_WU_D\000" |
| 5693 | /* 5437 */ "XVSSRLRN_WU_D\000" |
| 5694 | /* 5451 */ "XVPACKEV_D\000" |
| 5695 | /* 5462 */ "XVPICKEV_D\000" |
| 5696 | /* 5473 */ "XVBITREV_D\000" |
| 5697 | /* 5484 */ "XVFDIV_D\000" |
| 5698 | /* 5493 */ "XVDIV_D\000" |
| 5699 | /* 5501 */ "XVSIGNCOV_D\000" |
| 5700 | /* 5513 */ "FMOV_D\000" |
| 5701 | /* 5520 */ "ARMMOV_D\000" |
| 5702 | /* 5529 */ "XVFTINTRNE_W_D\000" |
| 5703 | /* 5544 */ "XVSSRANI_W_D\000" |
| 5704 | /* 5557 */ "XVSRANI_W_D\000" |
| 5705 | /* 5569 */ "XVSSRLNI_W_D\000" |
| 5706 | /* 5582 */ "XVSRLNI_W_D\000" |
| 5707 | /* 5594 */ "XVSSRARNI_W_D\000" |
| 5708 | /* 5608 */ "XVSRARNI_W_D\000" |
| 5709 | /* 5621 */ "XVSSRLRNI_W_D\000" |
| 5710 | /* 5635 */ "XVSRLRNI_W_D\000" |
| 5711 | /* 5648 */ "XVFTINTRM_W_D\000" |
| 5712 | /* 5662 */ "XVSSRAN_W_D\000" |
| 5713 | /* 5674 */ "XVSRAN_W_D\000" |
| 5714 | /* 5685 */ "XVSSRLN_W_D\000" |
| 5715 | /* 5697 */ "XVSRLN_W_D\000" |
| 5716 | /* 5708 */ "XVSSRARN_W_D\000" |
| 5717 | /* 5721 */ "XVSRARN_W_D\000" |
| 5718 | /* 5733 */ "XVSSRLRN_W_D\000" |
| 5719 | /* 5746 */ "XVSRLRN_W_D\000" |
| 5720 | /* 5758 */ "XVFTINTRP_W_D\000" |
| 5721 | /* 5772 */ "XVFTINT_W_D\000" |
| 5722 | /* 5784 */ "XVFTINTRZ_W_D\000" |
| 5723 | /* 5798 */ "XVFMAX_D\000" |
| 5724 | /* 5807 */ "AMMAX_D\000" |
| 5725 | /* 5815 */ "XVMAX_D\000" |
| 5726 | /* 5823 */ "FLDX_D\000" |
| 5727 | /* 5830 */ "FSTX_D\000" |
| 5728 | /* 5837 */ "PseudoXVBZ_D\000" |
| 5729 | /* 5850 */ "PseudoVBZ_D\000" |
| 5730 | /* 5862 */ "XVSETALLNEZ_D\000" |
| 5731 | /* 5876 */ "XVCLZ_D\000" |
| 5732 | /* 5884 */ "PseudoXVBNZ_D\000" |
| 5733 | /* 5898 */ "PseudoVBNZ_D\000" |
| 5734 | /* 5911 */ "XVSETANYEQZ_D\000" |
| 5735 | /* 5925 */ "XVFRINTRZ_D\000" |
| 5736 | /* 5937 */ "CTZ_D\000" |
| 5737 | /* 5943 */ "PseudoXVMSKLTZ_D\000" |
| 5738 | /* 5960 */ "PseudoVMSKLTZ_D\000" |
| 5739 | /* 5976 */ "PseudoAddTPRel_D\000" |
| 5740 | /* 5993 */ "PseudoAtomicStoreD\000" |
| 5741 | /* 6012 */ "FSEL_xD\000" |
| 5742 | /* 6020 */ "PSEUDO_PROBE\000" |
| 5743 | /* 6033 */ "G_SSUBE\000" |
| 5744 | /* 6041 */ "G_USUBE\000" |
| 5745 | /* 6049 */ "G_FENCE\000" |
| 5746 | /* 6057 */ "ARITH_FENCE\000" |
| 5747 | /* 6069 */ "REG_SEQUENCE\000" |
| 5748 | /* 6082 */ "G_SADDE\000" |
| 5749 | /* 6090 */ "G_UADDE\000" |
| 5750 | /* 6098 */ "G_GET_FPMODE\000" |
| 5751 | /* 6111 */ "G_RESET_FPMODE\000" |
| 5752 | /* 6126 */ "G_SET_FPMODE\000" |
| 5753 | /* 6139 */ "G_FMINNUM_IEEE\000" |
| 5754 | /* 6154 */ "G_FMAXNUM_IEEE\000" |
| 5755 | /* 6169 */ "BGE\000" |
| 5756 | /* 6173 */ "PseudoLA_TLS_DESC_LARGE\000" |
| 5757 | /* 6197 */ "PseudoLA_TLS_GD_LARGE\000" |
| 5758 | /* 6219 */ "PseudoLA_TLS_LD_LARGE\000" |
| 5759 | /* 6241 */ "PseudoLA_TLS_IE_LARGE\000" |
| 5760 | /* 6263 */ "PseudoLA_PCREL_LARGE\000" |
| 5761 | /* 6284 */ "PseudoTAIL_LARGE\000" |
| 5762 | /* 6301 */ "PseudoCALL_LARGE\000" |
| 5763 | /* 6318 */ "PseudoLA_ABS_LARGE\000" |
| 5764 | /* 6337 */ "PseudoLA_GOT_LARGE\000" |
| 5765 | /* 6356 */ "PseudoLA_TLS_IE\000" |
| 5766 | /* 6372 */ "G_VSCALE\000" |
| 5767 | /* 6381 */ "G_JUMP_TABLE\000" |
| 5768 | /* 6394 */ "IDLE\000" |
| 5769 | /* 6399 */ "BUNDLE\000" |
| 5770 | /* 6406 */ "PseudoLA_TLS_LE\000" |
| 5771 | /* 6422 */ "BNE\000" |
| 5772 | /* 6426 */ "G_MEMSET_INLINE\000" |
| 5773 | /* 6442 */ "G_MEMCPY_INLINE\000" |
| 5774 | /* 6458 */ "RELOC_NONE\000" |
| 5775 | /* 6469 */ "SETX86LOOPNE\000" |
| 5776 | /* 6482 */ "LOCAL_ESCAPE\000" |
| 5777 | /* 6495 */ "SETX86LOOPE\000" |
| 5778 | /* 6507 */ "G_FPTRUNCSTORE\000" |
| 5779 | /* 6522 */ "G_STACKRESTORE\000" |
| 5780 | /* 6537 */ "G_INDEXED_STORE\000" |
| 5781 | /* 6553 */ "G_STORE\000" |
| 5782 | /* 6561 */ "SET_CFR_FALSE\000" |
| 5783 | /* 6575 */ "G_BITREVERSE\000" |
| 5784 | /* 6588 */ "FAKE_USE\000" |
| 5785 | /* 6597 */ "LDPTE\000" |
| 5786 | /* 6603 */ "DBG_VALUE\000" |
| 5787 | /* 6613 */ "G_GLOBAL_VALUE\000" |
| 5788 | /* 6628 */ "G_PTRAUTH_GLOBAL_VALUE\000" |
| 5789 | /* 6651 */ "CONVERGENCECTRL_GLUE\000" |
| 5790 | /* 6672 */ "SET_CFR_TRUE\000" |
| 5791 | /* 6685 */ "G_STACKSAVE\000" |
| 5792 | /* 6697 */ "G_MEMMOVE\000" |
| 5793 | /* 6707 */ "ARMMOVE\000" |
| 5794 | /* 6715 */ "G_FREEZE\000" |
| 5795 | /* 6724 */ "G_FCANONICALIZE\000" |
| 5796 | /* 6740 */ "MOVGR2CF\000" |
| 5797 | /* 6749 */ "G_FMODF\000" |
| 5798 | /* 6757 */ "INIT_UNDEF\000" |
| 5799 | /* 6768 */ "G_IMPLICIT_DEF\000" |
| 5800 | /* 6783 */ "DBG_INSTR_REF\000" |
| 5801 | /* 6797 */ "X86MFFLAG\000" |
| 5802 | /* 6807 */ "ARMMFFLAG\000" |
| 5803 | /* 6817 */ "X86MTFLAG\000" |
| 5804 | /* 6827 */ "ARMMTFLAG\000" |
| 5805 | /* 6837 */ "X86SETTAG\000" |
| 5806 | /* 6847 */ "G_FNEG\000" |
| 5807 | /* 6854 */ "EXTRACT_SUBREG\000" |
| 5808 | /* 6869 */ "INSERT_SUBREG\000" |
| 5809 | /* 6883 */ "G_SEXT_INREG\000" |
| 5810 | /* 6896 */ "SUBREG_TO_REG\000" |
| 5811 | /* 6910 */ "CPUCFG\000" |
| 5812 | /* 6917 */ "G_ATOMIC_CMPXCHG\000" |
| 5813 | /* 6934 */ "GCSRXCHG\000" |
| 5814 | /* 6943 */ "G_ATOMICRMW_XCHG\000" |
| 5815 | /* 6960 */ "G_GET_ROUNDING\000" |
| 5816 | /* 6975 */ "G_SET_ROUNDING\000" |
| 5817 | /* 6990 */ "G_FLOG\000" |
| 5818 | /* 6997 */ "G_VAARG\000" |
| 5819 | /* 7005 */ "PREALLOCATED_ARG\000" |
| 5820 | /* 7022 */ "REVB_2H\000" |
| 5821 | /* 7030 */ "REVB_4H\000" |
| 5822 | /* 7038 */ "TLBSRCH\000" |
| 5823 | /* 7046 */ "G_PREFETCH\000" |
| 5824 | /* 7057 */ "G_SMULH\000" |
| 5825 | /* 7065 */ "G_UMULH\000" |
| 5826 | /* 7073 */ "G_FTANH\000" |
| 5827 | /* 7081 */ "G_FSINH\000" |
| 5828 | /* 7089 */ "G_FCOSH\000" |
| 5829 | /* 7097 */ "GTLBFLUSH\000" |
| 5830 | /* 7107 */ "XVREPLVE0_H\000" |
| 5831 | /* 7119 */ "XVADDA_H\000" |
| 5832 | /* 7128 */ "X86SRA_H\000" |
| 5833 | /* 7137 */ "XVSRA_H\000" |
| 5834 | /* 7145 */ "AMADD__DB_H\000" |
| 5835 | /* 7157 */ "AMSWAP__DB_H\000" |
| 5836 | /* 7170 */ "AMCAS__DB_H\000" |
| 5837 | /* 7182 */ "X86SUB_H\000" |
| 5838 | /* 7191 */ "XVMSUB_H\000" |
| 5839 | /* 7200 */ "XVSSUB_H\000" |
| 5840 | /* 7209 */ "XVSUB_H\000" |
| 5841 | /* 7217 */ "XVSSRANI_B_H\000" |
| 5842 | /* 7230 */ "XVSRANI_B_H\000" |
| 5843 | /* 7242 */ "XVSSRLNI_B_H\000" |
| 5844 | /* 7255 */ "XVSRLNI_B_H\000" |
| 5845 | /* 7267 */ "XVSSRARNI_B_H\000" |
| 5846 | /* 7281 */ "XVSRARNI_B_H\000" |
| 5847 | /* 7294 */ "XVSSRLRNI_B_H\000" |
| 5848 | /* 7308 */ "XVSRLRNI_B_H\000" |
| 5849 | /* 7321 */ "XVSSRAN_B_H\000" |
| 5850 | /* 7333 */ "XVSRAN_B_H\000" |
| 5851 | /* 7344 */ "XVSSRLN_B_H\000" |
| 5852 | /* 7356 */ "XVSRLN_B_H\000" |
| 5853 | /* 7367 */ "XVSSRARN_B_H\000" |
| 5854 | /* 7380 */ "XVSRARN_B_H\000" |
| 5855 | /* 7392 */ "XVSSRLRN_B_H\000" |
| 5856 | /* 7405 */ "XVSRLRN_B_H\000" |
| 5857 | /* 7417 */ "X86SBC_H\000" |
| 5858 | /* 7426 */ "X86ADC_H\000" |
| 5859 | /* 7435 */ "X86DEC_H\000" |
| 5860 | /* 7444 */ "X86INC_H\000" |
| 5861 | /* 7453 */ "X86ADD_H\000" |
| 5862 | /* 7462 */ "AMADD_H\000" |
| 5863 | /* 7470 */ "XVMADD_H\000" |
| 5864 | /* 7479 */ "XVSADD_H\000" |
| 5865 | /* 7488 */ "XVADD_H\000" |
| 5866 | /* 7496 */ "LD_H\000" |
| 5867 | /* 7501 */ "X86AND_H\000" |
| 5868 | /* 7510 */ "XVPACKOD_H\000" |
| 5869 | /* 7521 */ "XVPICKOD_H\000" |
| 5870 | /* 7532 */ "XVMOD_H\000" |
| 5871 | /* 7540 */ "IOCSRRD_H\000" |
| 5872 | /* 7550 */ "XVABSD_H\000" |
| 5873 | /* 7559 */ "VEXT2XV_D_H\000" |
| 5874 | /* 7571 */ "LDLE_H\000" |
| 5875 | /* 7578 */ "XVSLE_H\000" |
| 5876 | /* 7586 */ "STLE_H\000" |
| 5877 | /* 7593 */ "XVREPLVE_H\000" |
| 5878 | /* 7604 */ "XVSHUF_H\000" |
| 5879 | /* 7613 */ "XVNEG_H\000" |
| 5880 | /* 7621 */ "XVAVG_H\000" |
| 5881 | /* 7629 */ "XVMUH_H\000" |
| 5882 | /* 7637 */ "XVILVH_H\000" |
| 5883 | /* 7646 */ "XVSHUF4I_H\000" |
| 5884 | /* 7657 */ "X86SRAI_H\000" |
| 5885 | /* 7667 */ "XVSRAI_H\000" |
| 5886 | /* 7676 */ "XVSLEI_H\000" |
| 5887 | /* 7685 */ "XVREPL128VEI_H\000" |
| 5888 | /* 7700 */ "VREPLVEI_H\000" |
| 5889 | /* 7711 */ "X86RCLI_H\000" |
| 5890 | /* 7721 */ "X86SLLI_H\000" |
| 5891 | /* 7731 */ "XVSLLI_H\000" |
| 5892 | /* 7740 */ "PseudoXVREPLI_H\000" |
| 5893 | /* 7756 */ "PseudoVREPLI_H\000" |
| 5894 | /* 7771 */ "X86SRLI_H\000" |
| 5895 | /* 7781 */ "XVSRLI_H\000" |
| 5896 | /* 7790 */ "X86ROTLI_H\000" |
| 5897 | /* 7801 */ "XVMINI_H\000" |
| 5898 | /* 7810 */ "XVFRSTPI_H\000" |
| 5899 | /* 7821 */ "XVSEQI_H\000" |
| 5900 | /* 7830 */ "XVSRARI_H\000" |
| 5901 | /* 7840 */ "X86RCRI_H\000" |
| 5902 | /* 7850 */ "XVBITCLRI_H\000" |
| 5903 | /* 7862 */ "XVSRLRI_H\000" |
| 5904 | /* 7872 */ "X86ROTRI_H\000" |
| 5905 | /* 7883 */ "XVROTRI_H\000" |
| 5906 | /* 7893 */ "XVBITSETI_H\000" |
| 5907 | /* 7905 */ "XVSLTI_H\000" |
| 5908 | /* 7914 */ "XVBITREVI_H\000" |
| 5909 | /* 7926 */ "XVMAXI_H\000" |
| 5910 | /* 7935 */ "X86RCL_H\000" |
| 5911 | /* 7944 */ "X86SLL_H\000" |
| 5912 | /* 7953 */ "XVSLL_H\000" |
| 5913 | /* 7961 */ "XVLDREPL_H\000" |
| 5914 | /* 7972 */ "X86SRL_H\000" |
| 5915 | /* 7981 */ "XVSRL_H\000" |
| 5916 | /* 7989 */ "X86ROTL_H\000" |
| 5917 | /* 7999 */ "X86MUL_H\000" |
| 5918 | /* 8008 */ "XVMUL_H\000" |
| 5919 | /* 8016 */ "XVILVL_H\000" |
| 5920 | /* 8025 */ "XVSTELM_H\000" |
| 5921 | /* 8035 */ "XVMIN_H\000" |
| 5922 | /* 8043 */ "XVCLO_H\000" |
| 5923 | /* 8051 */ "AMSWAP_H\000" |
| 5924 | /* 8060 */ "PseudoCTPOP_H\000" |
| 5925 | /* 8074 */ "XVFRSTP_H\000" |
| 5926 | /* 8084 */ "XVSEQ_H\000" |
| 5927 | /* 8092 */ "XVSRAR_H\000" |
| 5928 | /* 8101 */ "X86RCR_H\000" |
| 5929 | /* 8110 */ "VPICKVE2GR_H\000" |
| 5930 | /* 8123 */ "XVAVGR_H\000" |
| 5931 | /* 8132 */ "XVBITCLR_H\000" |
| 5932 | /* 8143 */ "XVSRLR_H\000" |
| 5933 | /* 8152 */ "X86OR_H\000" |
| 5934 | /* 8160 */ "X86XOR_H\000" |
| 5935 | /* 8169 */ "X86ROTR_H\000" |
| 5936 | /* 8179 */ "XVROTR_H\000" |
| 5937 | /* 8188 */ "XVREPLGR2VR_H\000" |
| 5938 | /* 8202 */ "PseudoXVINSGR2VR_H\000" |
| 5939 | /* 8221 */ "IOCSRWR_H\000" |
| 5940 | /* 8231 */ "AMCAS_H\000" |
| 5941 | /* 8239 */ "XVEXTRINS_H\000" |
| 5942 | /* 8251 */ "XVFCVTH_S_H\000" |
| 5943 | /* 8263 */ "XVFCVTL_S_H\000" |
| 5944 | /* 8275 */ "XVSAT_H\000" |
| 5945 | /* 8283 */ "XVBITSET_H\000" |
| 5946 | /* 8294 */ "LDGT_H\000" |
| 5947 | /* 8301 */ "STGT_H\000" |
| 5948 | /* 8308 */ "XVSLT_H\000" |
| 5949 | /* 8316 */ "XVPCNT_H\000" |
| 5950 | /* 8325 */ "ST_H\000" |
| 5951 | /* 8330 */ "XVSSRANI_BU_H\000" |
| 5952 | /* 8344 */ "XVSSRLNI_BU_H\000" |
| 5953 | /* 8358 */ "XVSSRARNI_BU_H\000" |
| 5954 | /* 8373 */ "XVSSRLRNI_BU_H\000" |
| 5955 | /* 8388 */ "XVSSRAN_BU_H\000" |
| 5956 | /* 8401 */ "XVSSRLN_BU_H\000" |
| 5957 | /* 8414 */ "XVSSRARN_BU_H\000" |
| 5958 | /* 8428 */ "XVSSRLRN_BU_H\000" |
| 5959 | /* 8442 */ "XVMADDWOD_W_HU_H\000" |
| 5960 | /* 8459 */ "XVADDWOD_W_HU_H\000" |
| 5961 | /* 8475 */ "XVMULWOD_W_HU_H\000" |
| 5962 | /* 8491 */ "XVMADDWEV_W_HU_H\000" |
| 5963 | /* 8508 */ "XVADDWEV_W_HU_H\000" |
| 5964 | /* 8524 */ "XVMULWEV_W_HU_H\000" |
| 5965 | /* 8540 */ "XVPACKEV_H\000" |
| 5966 | /* 8551 */ "XVPICKEV_H\000" |
| 5967 | /* 8562 */ "XVBITREV_H\000" |
| 5968 | /* 8573 */ "XVDIV_H\000" |
| 5969 | /* 8581 */ "XVSIGNCOV_H\000" |
| 5970 | /* 8593 */ "XVSUBWOD_W_H\000" |
| 5971 | /* 8606 */ "XVMADDWOD_W_H\000" |
| 5972 | /* 8620 */ "XVADDWOD_W_H\000" |
| 5973 | /* 8633 */ "XVMULWOD_W_H\000" |
| 5974 | /* 8646 */ "XVEXTH_W_H\000" |
| 5975 | /* 8657 */ "XVSLLWIL_W_H\000" |
| 5976 | /* 8670 */ "EXT_W_H\000" |
| 5977 | /* 8678 */ "XVSUBWEV_W_H\000" |
| 5978 | /* 8691 */ "XVMADDWEV_W_H\000" |
| 5979 | /* 8705 */ "XVADDWEV_W_H\000" |
| 5980 | /* 8718 */ "XVMULWEV_W_H\000" |
| 5981 | /* 8731 */ "VEXT2XV_W_H\000" |
| 5982 | /* 8743 */ "XVHSUBW_W_H\000" |
| 5983 | /* 8755 */ "XVHADDW_W_H\000" |
| 5984 | /* 8767 */ "XVMAX_H\000" |
| 5985 | /* 8775 */ "LDX_H\000" |
| 5986 | /* 8781 */ "STX_H\000" |
| 5987 | /* 8787 */ "PseudoXVBZ_H\000" |
| 5988 | /* 8800 */ "PseudoVBZ_H\000" |
| 5989 | /* 8812 */ "XVSETALLNEZ_H\000" |
| 5990 | /* 8826 */ "XVCLZ_H\000" |
| 5991 | /* 8834 */ "PseudoXVBNZ_H\000" |
| 5992 | /* 8848 */ "PseudoVBNZ_H\000" |
| 5993 | /* 8861 */ "XVSETANYEQZ_H\000" |
| 5994 | /* 8875 */ "PseudoXVMSKLTZ_H\000" |
| 5995 | /* 8892 */ "PseudoVMSKLTZ_H\000" |
| 5996 | /* 8908 */ "PCALAU12I\000" |
| 5997 | /* 8918 */ "PCADDU12I\000" |
| 5998 | /* 8928 */ "PCADDU18I\000" |
| 5999 | /* 8938 */ "PCADDI\000" |
| 6000 | /* 8945 */ "XVLDI\000" |
| 6001 | /* 8951 */ "ANDI\000" |
| 6002 | /* 8956 */ "DBG_PHI\000" |
| 6003 | /* 8964 */ "XORI\000" |
| 6004 | /* 8969 */ "G_FPTOSI\000" |
| 6005 | /* 8978 */ "SLTI\000" |
| 6006 | /* 8983 */ "G_FPTOUI\000" |
| 6007 | /* 8992 */ "SLTUI\000" |
| 6008 | /* 8998 */ "G_FPOWI\000" |
| 6009 | /* 9006 */ "SETX86J\000" |
| 6010 | /* 9014 */ "SETARMJ\000" |
| 6011 | /* 9022 */ "BREAK\000" |
| 6012 | /* 9028 */ "COPY_LANEMASK\000" |
| 6013 | /* 9042 */ "G_PTRMASK\000" |
| 6014 | /* 9052 */ "BL\000" |
| 6015 | /* 9055 */ "DBCL\000" |
| 6016 | /* 9060 */ "HVCL\000" |
| 6017 | /* 9065 */ "GC_LABEL\000" |
| 6018 | /* 9074 */ "DBG_LABEL\000" |
| 6019 | /* 9084 */ "EH_LABEL\000" |
| 6020 | /* 9093 */ "ANNOTATION_LABEL\000" |
| 6021 | /* 9110 */ "ICALL_BRANCH_FUNNEL\000" |
| 6022 | /* 9130 */ "PseudoLA_PCREL\000" |
| 6023 | /* 9145 */ "G_FSHL\000" |
| 6024 | /* 9152 */ "G_SHL\000" |
| 6025 | /* 9158 */ "PseudoB_TAIL\000" |
| 6026 | /* 9171 */ "PseudoJIRL_TAIL\000" |
| 6027 | /* 9187 */ "PseudoTAIL\000" |
| 6028 | /* 9198 */ "G_FCEIL\000" |
| 6029 | /* 9206 */ "G_SAVGCEIL\000" |
| 6030 | /* 9217 */ "G_UAVGCEIL\000" |
| 6031 | /* 9228 */ "SYSCALL\000" |
| 6032 | /* 9236 */ "PseudoDESC_CALL\000" |
| 6033 | /* 9252 */ "PATCHABLE_TAIL_CALL\000" |
| 6034 | /* 9272 */ "PseudoJIRL_CALL\000" |
| 6035 | /* 9288 */ "PATCHABLE_TYPED_EVENT_CALL\000" |
| 6036 | /* 9315 */ "PATCHABLE_EVENT_CALL\000" |
| 6037 | /* 9336 */ "FENTRY_CALL\000" |
| 6038 | /* 9348 */ "PseudoCALL\000" |
| 6039 | /* 9359 */ "PseudoTAIL_SMALL\000" |
| 6040 | /* 9376 */ "PseudoCALL_SMALL\000" |
| 6041 | /* 9393 */ "TLBFILL\000" |
| 6042 | /* 9401 */ "KILL\000" |
| 6043 | /* 9406 */ "G_CONSTANT_POOL\000" |
| 6044 | /* 9422 */ "JIRL\000" |
| 6045 | /* 9427 */ "G_ROTL\000" |
| 6046 | /* 9434 */ "G_VECREDUCE_FMUL\000" |
| 6047 | /* 9451 */ "G_FMUL\000" |
| 6048 | /* 9458 */ "G_VECREDUCE_SEQ_FMUL\000" |
| 6049 | /* 9479 */ "G_STRICT_FMUL\000" |
| 6050 | /* 9493 */ "G_CLMUL\000" |
| 6051 | /* 9501 */ "G_VECREDUCE_MUL\000" |
| 6052 | /* 9517 */ "G_MUL\000" |
| 6053 | /* 9523 */ "XVFFINT_D_L\000" |
| 6054 | /* 9535 */ "XVFFINT_S_L\000" |
| 6055 | /* 9547 */ "G_FREM\000" |
| 6056 | /* 9554 */ "G_STRICT_FREM\000" |
| 6057 | /* 9568 */ "G_SREM\000" |
| 6058 | /* 9575 */ "G_UREM\000" |
| 6059 | /* 9582 */ "G_SDIVREM\000" |
| 6060 | /* 9592 */ "G_UDIVREM\000" |
| 6061 | /* 9602 */ "INLINEASM\000" |
| 6062 | /* 9612 */ "X86CLRTM\000" |
| 6063 | /* 9621 */ "X86SETTM\000" |
| 6064 | /* 9630 */ "PseudoTAIL_MEDIUM\000" |
| 6065 | /* 9648 */ "PseudoCALL_MEDIUM\000" |
| 6066 | /* 9666 */ "G_VECREDUCE_FMINIMUM\000" |
| 6067 | /* 9687 */ "G_FMINIMUM\000" |
| 6068 | /* 9698 */ "G_ATOMICRMW_FMINIMUM\000" |
| 6069 | /* 9719 */ "G_VECREDUCE_FMAXIMUM\000" |
| 6070 | /* 9740 */ "G_FMAXIMUM\000" |
| 6071 | /* 9751 */ "G_ATOMICRMW_FMAXIMUM\000" |
| 6072 | /* 9772 */ "G_VECREDUCE_FMINIMUMNUM\000" |
| 6073 | /* 9796 */ "G_FMINIMUMNUM\000" |
| 6074 | /* 9810 */ "G_ATOMICRMW_FMINIMUMNUM\000" |
| 6075 | /* 9834 */ "G_VECREDUCE_FMAXIMUMNUM\000" |
| 6076 | /* 9858 */ "G_FMAXIMUMNUM\000" |
| 6077 | /* 9872 */ "G_ATOMICRMW_FMAXIMUMNUM\000" |
| 6078 | /* 9896 */ "G_FMINNUM\000" |
| 6079 | /* 9906 */ "G_FMAXNUM\000" |
| 6080 | /* 9916 */ "G_FATAN\000" |
| 6081 | /* 9924 */ "G_FTAN\000" |
| 6082 | /* 9931 */ "ANDN\000" |
| 6083 | /* 9936 */ "G_INTRINSIC_ROUNDEVEN\000" |
| 6084 | /* 9958 */ "G_ASSERT_ALIGN\000" |
| 6085 | /* 9973 */ "G_FCOPYSIGN\000" |
| 6086 | /* 9985 */ "G_VECREDUCE_FMIN\000" |
| 6087 | /* 10002 */ "G_ATOMICRMW_FMIN\000" |
| 6088 | /* 10019 */ "G_VECREDUCE_SMIN\000" |
| 6089 | /* 10036 */ "G_SMIN\000" |
| 6090 | /* 10043 */ "G_VECREDUCE_UMIN\000" |
| 6091 | /* 10060 */ "G_UMIN\000" |
| 6092 | /* 10067 */ "G_ATOMICRMW_UMIN\000" |
| 6093 | /* 10084 */ "G_ATOMICRMW_MIN\000" |
| 6094 | /* 10100 */ "G_FASIN\000" |
| 6095 | /* 10108 */ "G_FSIN\000" |
| 6096 | /* 10115 */ "CFI_INSTRUCTION\000" |
| 6097 | /* 10131 */ "G_CTLZ_ZERO_POISON\000" |
| 6098 | /* 10150 */ "G_CTTZ_ZERO_POISON\000" |
| 6099 | /* 10169 */ "ORN\000" |
| 6100 | /* 10173 */ "ERTN\000" |
| 6101 | /* 10178 */ "ADJCALLSTACKDOWN\000" |
| 6102 | /* 10195 */ "PROBED_STACKALLOC_DYN\000" |
| 6103 | /* 10217 */ "G_SSUBO\000" |
| 6104 | /* 10225 */ "G_USUBO\000" |
| 6105 | /* 10233 */ "G_SADDO\000" |
| 6106 | /* 10241 */ "G_UADDO\000" |
| 6107 | /* 10249 */ "JUMP_TABLE_DEBUG_INFO\000" |
| 6108 | /* 10271 */ "G_SMULO\000" |
| 6109 | /* 10279 */ "G_UMULO\000" |
| 6110 | /* 10287 */ "G_BZERO\000" |
| 6111 | /* 10295 */ "STACKMAP\000" |
| 6112 | /* 10304 */ "G_DEBUGTRAP\000" |
| 6113 | /* 10316 */ "G_UBSANTRAP\000" |
| 6114 | /* 10328 */ "G_TRAP\000" |
| 6115 | /* 10335 */ "G_ATOMICRMW_UDEC_WRAP\000" |
| 6116 | /* 10357 */ "G_ATOMICRMW_UINC_WRAP\000" |
| 6117 | /* 10379 */ "G_BSWAP\000" |
| 6118 | /* 10387 */ "G_SITOFP\000" |
| 6119 | /* 10396 */ "G_UITOFP\000" |
| 6120 | /* 10405 */ "G_FCMP\000" |
| 6121 | /* 10412 */ "G_STRICT_FCMP\000" |
| 6122 | /* 10426 */ "G_ICMP\000" |
| 6123 | /* 10433 */ "G_SCMP\000" |
| 6124 | /* 10440 */ "G_UCMP\000" |
| 6125 | /* 10447 */ "PseudoUNIMP\000" |
| 6126 | /* 10459 */ "CACOP\000" |
| 6127 | /* 10465 */ "CONVERGENCECTRL_LOOP\000" |
| 6128 | /* 10486 */ "G_CTPOP\000" |
| 6129 | /* 10494 */ "X86DECTOP\000" |
| 6130 | /* 10504 */ "X86INCTOP\000" |
| 6131 | /* 10514 */ "X86MFTOP\000" |
| 6132 | /* 10523 */ "X86MTTOP\000" |
| 6133 | /* 10532 */ "PATCHABLE_OP\000" |
| 6134 | /* 10545 */ "FAULTING_OP\000" |
| 6135 | /* 10557 */ "ADJCALLSTACKUP\000" |
| 6136 | /* 10572 */ "PREALLOCATED_SETUP\000" |
| 6137 | /* 10591 */ "G_FLDEXP\000" |
| 6138 | /* 10600 */ "G_STRICT_FLDEXP\000" |
| 6139 | /* 10616 */ "G_FEXP\000" |
| 6140 | /* 10623 */ "G_FFREXP\000" |
| 6141 | /* 10632 */ "BEQ\000" |
| 6142 | /* 10636 */ "XVREPLVE0_Q\000" |
| 6143 | /* 10648 */ "XVSUB_Q\000" |
| 6144 | /* 10656 */ "SC_Q\000" |
| 6145 | /* 10661 */ "XVADD_Q\000" |
| 6146 | /* 10669 */ "XVSSRANI_D_Q\000" |
| 6147 | /* 10682 */ "XVSRANI_D_Q\000" |
| 6148 | /* 10694 */ "XVSSRLNI_D_Q\000" |
| 6149 | /* 10707 */ "XVSRLNI_D_Q\000" |
| 6150 | /* 10719 */ "XVSSRARNI_D_Q\000" |
| 6151 | /* 10733 */ "XVSRARNI_D_Q\000" |
| 6152 | /* 10746 */ "XVSSRLRNI_D_Q\000" |
| 6153 | /* 10760 */ "XVSRLRNI_D_Q\000" |
| 6154 | /* 10773 */ "XVPERMI_Q\000" |
| 6155 | /* 10783 */ "XVSSRANI_DU_Q\000" |
| 6156 | /* 10797 */ "XVSSRLNI_DU_Q\000" |
| 6157 | /* 10811 */ "XVSSRARNI_DU_Q\000" |
| 6158 | /* 10826 */ "XVSSRLRNI_DU_Q\000" |
| 6159 | /* 10841 */ "DBAR\000" |
| 6160 | /* 10846 */ "IBAR\000" |
| 6161 | /* 10851 */ "G_BR\000" |
| 6162 | /* 10856 */ "INLINEASM_BR\000" |
| 6163 | /* 10869 */ "PseudoBR\000" |
| 6164 | /* 10878 */ "MOVGR2SCR\000" |
| 6165 | /* 10888 */ "G_BLOCK_ADDR\000" |
| 6166 | /* 10901 */ "MEMBARRIER\000" |
| 6167 | /* 10912 */ "G_CONSTANT_FOLD_BARRIER\000" |
| 6168 | /* 10936 */ "PATCHABLE_FUNCTION_ENTER\000" |
| 6169 | /* 10961 */ "G_READCYCLECOUNTER\000" |
| 6170 | /* 10980 */ "G_READSTEADYCOUNTER\000" |
| 6171 | /* 11000 */ "G_READ_REGISTER\000" |
| 6172 | /* 11016 */ "G_WRITE_REGISTER\000" |
| 6173 | /* 11033 */ "PseudoLD_CFR\000" |
| 6174 | /* 11046 */ "PseudoST_CFR\000" |
| 6175 | /* 11059 */ "PseudoCopyCFR\000" |
| 6176 | /* 11073 */ "MOVCF2GR\000" |
| 6177 | /* 11082 */ "MOVSCR2GR\000" |
| 6178 | /* 11092 */ "MOVFCSR2GR\000" |
| 6179 | /* 11103 */ "G_ASHR\000" |
| 6180 | /* 11110 */ "G_FSHR\000" |
| 6181 | /* 11117 */ "G_LSHR\000" |
| 6182 | /* 11124 */ "LDDIR\000" |
| 6183 | /* 11130 */ "TLBCLR\000" |
| 6184 | /* 11137 */ "CONVERGENCECTRL_ANCHOR\000" |
| 6185 | /* 11160 */ "NOR\000" |
| 6186 | /* 11164 */ "G_FFLOOR\000" |
| 6187 | /* 11173 */ "G_SAVGFLOOR\000" |
| 6188 | /* 11185 */ "G_UAVGFLOOR\000" |
| 6189 | /* 11197 */ "G_EXTRACT_SUBVECTOR\000" |
| 6190 | /* 11217 */ "G_INSERT_SUBVECTOR\000" |
| 6191 | /* 11236 */ "G_BUILD_VECTOR\000" |
| 6192 | /* 11251 */ "G_SHUFFLE_VECTOR\000" |
| 6193 | /* 11268 */ "G_STEP_VECTOR\000" |
| 6194 | /* 11282 */ "G_SPLAT_VECTOR\000" |
| 6195 | /* 11297 */ "G_VECREDUCE_XOR\000" |
| 6196 | /* 11313 */ "G_XOR\000" |
| 6197 | /* 11319 */ "G_ATOMICRMW_XOR\000" |
| 6198 | /* 11335 */ "G_VECREDUCE_OR\000" |
| 6199 | /* 11350 */ "G_OR\000" |
| 6200 | /* 11355 */ "G_ATOMICRMW_OR\000" |
| 6201 | /* 11370 */ "Select_GPR_Using_CC_GPR\000" |
| 6202 | /* 11394 */ "MOVGR2FCSR\000" |
| 6203 | /* 11405 */ "RDFCSR\000" |
| 6204 | /* 11412 */ "WRFCSR\000" |
| 6205 | /* 11419 */ "G_ROTR\000" |
| 6206 | /* 11426 */ "G_INTTOPTR\000" |
| 6207 | /* 11437 */ "TLBWR\000" |
| 6208 | /* 11443 */ "GCSRWR\000" |
| 6209 | /* 11450 */ "G_FABS\000" |
| 6210 | /* 11457 */ "PseudoLA_ABS\000" |
| 6211 | /* 11470 */ "G_ABS\000" |
| 6212 | /* 11476 */ "G_ABDS\000" |
| 6213 | /* 11483 */ "G_UNMERGE_VALUES\000" |
| 6214 | /* 11500 */ "G_MERGE_VALUES\000" |
| 6215 | /* 11515 */ "G_CTLS\000" |
| 6216 | /* 11522 */ "G_FACOS\000" |
| 6217 | /* 11530 */ "G_FCOS\000" |
| 6218 | /* 11537 */ "G_FSINCOS\000" |
| 6219 | /* 11547 */ "G_STRICT_FCMPS\000" |
| 6220 | /* 11562 */ "G_CONCAT_VECTORS\000" |
| 6221 | /* 11579 */ "COPY_TO_REGCLASS\000" |
| 6222 | /* 11596 */ "G_IS_FPCLASS\000" |
| 6223 | /* 11609 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\000" |
| 6224 | /* 11639 */ "G_VECTOR_COMPRESS\000" |
| 6225 | /* 11657 */ "G_INTRINSIC_W_SIDE_EFFECTS\000" |
| 6226 | /* 11684 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\000" |
| 6227 | /* 11722 */ "XVFMINA_S\000" |
| 6228 | /* 11732 */ "XVFMAXA_S\000" |
| 6229 | /* 11742 */ "FSCALEB_S\000" |
| 6230 | /* 11752 */ "XVFLOGB_S\000" |
| 6231 | /* 11762 */ "XVFSUB_S\000" |
| 6232 | /* 11771 */ "XVFMSUB_S\000" |
| 6233 | /* 11781 */ "XVFNMSUB_S\000" |
| 6234 | /* 11792 */ "XVFADD_S\000" |
| 6235 | /* 11801 */ "XVFMADD_S\000" |
| 6236 | /* 11811 */ "XVFNMADD_S\000" |
| 6237 | /* 11822 */ "FLD_S\000" |
| 6238 | /* 11828 */ "XVFCVTH_D_S\000" |
| 6239 | /* 11840 */ "XVFCVTL_D_S\000" |
| 6240 | /* 11852 */ "FCVT_D_S\000" |
| 6241 | /* 11861 */ "XVFCMP_CLE_S\000" |
| 6242 | /* 11874 */ "FLDLE_S\000" |
| 6243 | /* 11882 */ "XVFCMP_SLE_S\000" |
| 6244 | /* 11895 */ "FSTLE_S\000" |
| 6245 | /* 11903 */ "XVFCMP_CULE_S\000" |
| 6246 | /* 11917 */ "XVFCMP_SULE_S\000" |
| 6247 | /* 11931 */ "XVFCMP_CNE_S\000" |
| 6248 | /* 11944 */ "XVFRINTRNE_S\000" |
| 6249 | /* 11957 */ "XVFCMP_SNE_S\000" |
| 6250 | /* 11970 */ "XVFCMP_CUNE_S\000" |
| 6251 | /* 11984 */ "XVFCMP_SUNE_S\000" |
| 6252 | /* 11998 */ "XVFRECIPE_S\000" |
| 6253 | /* 12010 */ "XVFRSQRTE_S\000" |
| 6254 | /* 12022 */ "XVFCMP_CAF_S\000" |
| 6255 | /* 12035 */ "XVFCMP_SAF_S\000" |
| 6256 | /* 12048 */ "FNEG_S\000" |
| 6257 | /* 12055 */ "XVFCVT_H_S\000" |
| 6258 | /* 12066 */ "XVFMUL_S\000" |
| 6259 | /* 12075 */ "FTINTRNE_L_S\000" |
| 6260 | /* 12088 */ "XVFTINTRNEH_L_S\000" |
| 6261 | /* 12104 */ "XVFTINTRMH_L_S\000" |
| 6262 | /* 12119 */ "XVFTINTRPH_L_S\000" |
| 6263 | /* 12134 */ "XVFTINTH_L_S\000" |
| 6264 | /* 12147 */ "XVFTINTRZH_L_S\000" |
| 6265 | /* 12162 */ "XVFTINTRNEL_L_S\000" |
| 6266 | /* 12178 */ "XVFTINTRML_L_S\000" |
| 6267 | /* 12193 */ "XVFTINTRPL_L_S\000" |
| 6268 | /* 12208 */ "XVFTINTL_L_S\000" |
| 6269 | /* 12221 */ "XVFTINTRZL_L_S\000" |
| 6270 | /* 12236 */ "FTINTRM_L_S\000" |
| 6271 | /* 12248 */ "FTINTRP_L_S\000" |
| 6272 | /* 12260 */ "FTINT_L_S\000" |
| 6273 | /* 12270 */ "FTINTRZ_L_S\000" |
| 6274 | /* 12282 */ "XVFRINTRM_S\000" |
| 6275 | /* 12294 */ "FCOPYSIGN_S\000" |
| 6276 | /* 12306 */ "XVFMIN_S\000" |
| 6277 | /* 12315 */ "XVFCMP_CUN_S\000" |
| 6278 | /* 12328 */ "XVFCMP_SUN_S\000" |
| 6279 | /* 12341 */ "XVFRECIP_S\000" |
| 6280 | /* 12352 */ "XVFRINTRP_S\000" |
| 6281 | /* 12364 */ "XVFCMP_CEQ_S\000" |
| 6282 | /* 12377 */ "XVFCMP_SEQ_S\000" |
| 6283 | /* 12390 */ "XVFCMP_CUEQ_S\000" |
| 6284 | /* 12404 */ "XVFCMP_SUEQ_S\000" |
| 6285 | /* 12418 */ "MOVFRH2GR_S\000" |
| 6286 | /* 12430 */ "MOVFR2GR_S\000" |
| 6287 | /* 12441 */ "XVFCMP_COR_S\000" |
| 6288 | /* 12454 */ "XVFCMP_SOR_S\000" |
| 6289 | /* 12467 */ "FABS_S\000" |
| 6290 | /* 12474 */ "XVFCLASS_S\000" |
| 6291 | /* 12485 */ "G_TRUNC_SSAT_S\000" |
| 6292 | /* 12500 */ "FLDGT_S\000" |
| 6293 | /* 12508 */ "FSTGT_S\000" |
| 6294 | /* 12516 */ "XVFCMP_CLT_S\000" |
| 6295 | /* 12529 */ "XVFCMP_SLT_S\000" |
| 6296 | /* 12542 */ "XVFCMP_CULT_S\000" |
| 6297 | /* 12556 */ "XVFCMP_SULT_S\000" |
| 6298 | /* 12570 */ "XVFRINT_S\000" |
| 6299 | /* 12580 */ "XVFSQRT_S\000" |
| 6300 | /* 12590 */ "XVFRSQRT_S\000" |
| 6301 | /* 12601 */ "FST_S\000" |
| 6302 | /* 12607 */ "XVFTINT_WU_S\000" |
| 6303 | /* 12620 */ "XVFTINTRZ_WU_S\000" |
| 6304 | /* 12635 */ "XVFDIV_S\000" |
| 6305 | /* 12644 */ "FMOV_S\000" |
| 6306 | /* 12651 */ "XVFTINTRNE_W_S\000" |
| 6307 | /* 12666 */ "XVFTINTRM_W_S\000" |
| 6308 | /* 12680 */ "XVFTINTRP_W_S\000" |
| 6309 | /* 12694 */ "XVFTINT_W_S\000" |
| 6310 | /* 12706 */ "XVFTINTRZ_W_S\000" |
| 6311 | /* 12720 */ "XVFMAX_S\000" |
| 6312 | /* 12729 */ "FLDX_S\000" |
| 6313 | /* 12736 */ "FSTX_S\000" |
| 6314 | /* 12743 */ "XVFRINTRZ_S\000" |
| 6315 | /* 12755 */ "MOVFR2CF_xS\000" |
| 6316 | /* 12767 */ "FSEL_xS\000" |
| 6317 | /* 12775 */ "MOVCF2FR_xS\000" |
| 6318 | /* 12787 */ "G_SSUBSAT\000" |
| 6319 | /* 12797 */ "G_USUBSAT\000" |
| 6320 | /* 12807 */ "G_SADDSAT\000" |
| 6321 | /* 12817 */ "G_UADDSAT\000" |
| 6322 | /* 12827 */ "G_SSHLSAT\000" |
| 6323 | /* 12837 */ "G_USHLSAT\000" |
| 6324 | /* 12847 */ "G_SMULFIXSAT\000" |
| 6325 | /* 12860 */ "G_UMULFIXSAT\000" |
| 6326 | /* 12873 */ "G_SDIVFIXSAT\000" |
| 6327 | /* 12886 */ "G_UDIVFIXSAT\000" |
| 6328 | /* 12899 */ "G_ATOMICRMW_USUB_SAT\000" |
| 6329 | /* 12920 */ "G_FPTOSI_SAT\000" |
| 6330 | /* 12933 */ "G_FPTOUI_SAT\000" |
| 6331 | /* 12946 */ "G_EXTRACT\000" |
| 6332 | /* 12956 */ "G_SELECT\000" |
| 6333 | /* 12965 */ "G_BRINDIRECT\000" |
| 6334 | /* 12978 */ "PATCHABLE_RET\000" |
| 6335 | /* 12992 */ "PseudoRET\000" |
| 6336 | /* 13002 */ "G_MEMSET\000" |
| 6337 | /* 13011 */ "PATCHABLE_FUNCTION_EXIT\000" |
| 6338 | /* 13035 */ "G_BRJT\000" |
| 6339 | /* 13042 */ "BLT\000" |
| 6340 | /* 13046 */ "G_EXTRACT_VECTOR_ELT\000" |
| 6341 | /* 13067 */ "G_INSERT_VECTOR_ELT\000" |
| 6342 | /* 13087 */ "SLT\000" |
| 6343 | /* 13091 */ "G_FCONSTANT\000" |
| 6344 | /* 13103 */ "G_CONSTANT\000" |
| 6345 | /* 13114 */ "G_INTRINSIC_CONVERGENT\000" |
| 6346 | /* 13137 */ "STATEPOINT\000" |
| 6347 | /* 13148 */ "PATCHPOINT\000" |
| 6348 | /* 13159 */ "G_PTRTOINT\000" |
| 6349 | /* 13170 */ "G_FRINT\000" |
| 6350 | /* 13178 */ "G_INTRINSIC_LLRINT\000" |
| 6351 | /* 13197 */ "G_INTRINSIC_LRINT\000" |
| 6352 | /* 13215 */ "G_FNEARBYINT\000" |
| 6353 | /* 13228 */ "PseudoLA_GOT\000" |
| 6354 | /* 13241 */ "G_VASTART\000" |
| 6355 | /* 13251 */ "LIFETIME_START\000" |
| 6356 | /* 13266 */ "G_INVOKE_REGION_START\000" |
| 6357 | /* 13288 */ "G_INSERT\000" |
| 6358 | /* 13297 */ "G_FSQRT\000" |
| 6359 | /* 13305 */ "G_STRICT_FSQRT\000" |
| 6360 | /* 13320 */ "G_BITCAST\000" |
| 6361 | /* 13330 */ "G_ADDRSPACE_CAST\000" |
| 6362 | /* 13347 */ "DBG_VALUE_LIST\000" |
| 6363 | /* 13362 */ "XVST\000" |
| 6364 | /* 13367 */ "G_FPEXT\000" |
| 6365 | /* 13375 */ "G_SEXT\000" |
| 6366 | /* 13382 */ "G_ASSERT_SEXT\000" |
| 6367 | /* 13396 */ "G_ANYEXT\000" |
| 6368 | /* 13405 */ "G_ZEXT\000" |
| 6369 | /* 13412 */ "G_ASSERT_ZEXT\000" |
| 6370 | /* 13426 */ "XVSSUB_BU\000" |
| 6371 | /* 13436 */ "XVSADD_BU\000" |
| 6372 | /* 13446 */ "LD_BU\000" |
| 6373 | /* 13452 */ "XVMOD_BU\000" |
| 6374 | /* 13461 */ "XVABSD_BU\000" |
| 6375 | /* 13471 */ "XVSLE_BU\000" |
| 6376 | /* 13480 */ "XVAVG_BU\000" |
| 6377 | /* 13489 */ "XVMUH_BU\000" |
| 6378 | /* 13498 */ "XVSUBWOD_H_BU\000" |
| 6379 | /* 13512 */ "XVMADDWOD_H_BU\000" |
| 6380 | /* 13527 */ "XVADDWOD_H_BU\000" |
| 6381 | /* 13541 */ "XVMULWOD_H_BU\000" |
| 6382 | /* 13555 */ "XVSUBWEV_H_BU\000" |
| 6383 | /* 13569 */ "XVMADDWEV_H_BU\000" |
| 6384 | /* 13584 */ "XVADDWEV_H_BU\000" |
| 6385 | /* 13598 */ "XVMULWEV_H_BU\000" |
| 6386 | /* 13612 */ "XVSUBI_BU\000" |
| 6387 | /* 13622 */ "XVADDI_BU\000" |
| 6388 | /* 13632 */ "XVSLEI_BU\000" |
| 6389 | /* 13642 */ "XVMINI_BU\000" |
| 6390 | /* 13652 */ "XVSLTI_BU\000" |
| 6391 | /* 13662 */ "XVMAXI_BU\000" |
| 6392 | /* 13672 */ "X86MUL_BU\000" |
| 6393 | /* 13682 */ "XVMIN_BU\000" |
| 6394 | /* 13691 */ "VPICKVE2GR_BU\000" |
| 6395 | /* 13705 */ "XVAVGR_BU\000" |
| 6396 | /* 13715 */ "XVSAT_BU\000" |
| 6397 | /* 13724 */ "XVSLT_BU\000" |
| 6398 | /* 13733 */ "VEXT2XV_DU_BU\000" |
| 6399 | /* 13747 */ "XVEXTH_HU_BU\000" |
| 6400 | /* 13760 */ "XVSLLWIL_HU_BU\000" |
| 6401 | /* 13775 */ "VEXT2XV_HU_BU\000" |
| 6402 | /* 13789 */ "XVHSUBW_HU_BU\000" |
| 6403 | /* 13803 */ "XVHADDW_HU_BU\000" |
| 6404 | /* 13817 */ "VEXT2XV_WU_BU\000" |
| 6405 | /* 13831 */ "XVDIV_BU\000" |
| 6406 | /* 13840 */ "XVMAX_BU\000" |
| 6407 | /* 13849 */ "LDX_BU\000" |
| 6408 | /* 13856 */ "G_ABDU\000" |
| 6409 | /* 13863 */ "AMMIN__DB_DU\000" |
| 6410 | /* 13876 */ "AMMAX__DB_DU\000" |
| 6411 | /* 13889 */ "X86SUB_DU\000" |
| 6412 | /* 13899 */ "XVSSUB_DU\000" |
| 6413 | /* 13909 */ "X86ADD_DU\000" |
| 6414 | /* 13919 */ "XVSADD_DU\000" |
| 6415 | /* 13929 */ "XVMOD_DU\000" |
| 6416 | /* 13938 */ "XVABSD_DU\000" |
| 6417 | /* 13948 */ "XVSLE_DU\000" |
| 6418 | /* 13957 */ "XVAVG_DU\000" |
| 6419 | /* 13966 */ "MULH_DU\000" |
| 6420 | /* 13974 */ "XVMUH_DU\000" |
| 6421 | /* 13983 */ "XVSUBI_DU\000" |
| 6422 | /* 13993 */ "XVADDI_DU\000" |
| 6423 | /* 14003 */ "XVSLEI_DU\000" |
| 6424 | /* 14013 */ "XVMINI_DU\000" |
| 6425 | /* 14023 */ "XVSLTI_DU\000" |
| 6426 | /* 14033 */ "XVMAXI_DU\000" |
| 6427 | /* 14043 */ "X86MUL_DU\000" |
| 6428 | /* 14053 */ "AMMIN_DU\000" |
| 6429 | /* 14062 */ "XVMIN_DU\000" |
| 6430 | /* 14071 */ "XVSUBWOD_Q_DU\000" |
| 6431 | /* 14085 */ "XVMADDWOD_Q_DU\000" |
| 6432 | /* 14100 */ "XVADDWOD_Q_DU\000" |
| 6433 | /* 14114 */ "XVMULWOD_Q_DU\000" |
| 6434 | /* 14128 */ "XVSUBWEV_Q_DU\000" |
| 6435 | /* 14142 */ "XVMADDWEV_Q_DU\000" |
| 6436 | /* 14157 */ "XVADDWEV_Q_DU\000" |
| 6437 | /* 14171 */ "XVMULWEV_Q_DU\000" |
| 6438 | /* 14185 */ "XVPICKVE2GR_DU\000" |
| 6439 | /* 14200 */ "XVAVGR_DU\000" |
| 6440 | /* 14210 */ "XVSAT_DU\000" |
| 6441 | /* 14219 */ "XVSLT_DU\000" |
| 6442 | /* 14228 */ "XVEXTH_QU_DU\000" |
| 6443 | /* 14241 */ "XVEXTL_QU_DU\000" |
| 6444 | /* 14254 */ "XVHSUBW_QU_DU\000" |
| 6445 | /* 14268 */ "XVHADDW_QU_DU\000" |
| 6446 | /* 14282 */ "XVDIV_DU\000" |
| 6447 | /* 14291 */ "AMMAX_DU\000" |
| 6448 | /* 14300 */ "XVMAX_DU\000" |
| 6449 | /* 14309 */ "BGEU\000" |
| 6450 | /* 14314 */ "XVSSUB_HU\000" |
| 6451 | /* 14324 */ "XVSADD_HU\000" |
| 6452 | /* 14334 */ "LD_HU\000" |
| 6453 | /* 14340 */ "XVMOD_HU\000" |
| 6454 | /* 14349 */ "XVABSD_HU\000" |
| 6455 | /* 14359 */ "XVSLE_HU\000" |
| 6456 | /* 14368 */ "XVAVG_HU\000" |
| 6457 | /* 14377 */ "XVMUH_HU\000" |
| 6458 | /* 14386 */ "XVSUBI_HU\000" |
| 6459 | /* 14396 */ "XVADDI_HU\000" |
| 6460 | /* 14406 */ "XVSLEI_HU\000" |
| 6461 | /* 14416 */ "XVMINI_HU\000" |
| 6462 | /* 14426 */ "XVSLTI_HU\000" |
| 6463 | /* 14436 */ "XVMAXI_HU\000" |
| 6464 | /* 14446 */ "X86MUL_HU\000" |
| 6465 | /* 14456 */ "XVMIN_HU\000" |
| 6466 | /* 14465 */ "VPICKVE2GR_HU\000" |
| 6467 | /* 14479 */ "XVAVGR_HU\000" |
| 6468 | /* 14489 */ "XVSAT_HU\000" |
| 6469 | /* 14498 */ "XVSLT_HU\000" |
| 6470 | /* 14507 */ "VEXT2XV_DU_HU\000" |
| 6471 | /* 14521 */ "XVEXTH_WU_HU\000" |
| 6472 | /* 14534 */ "XVSLLWIL_WU_HU\000" |
| 6473 | /* 14549 */ "VEXT2XV_WU_HU\000" |
| 6474 | /* 14563 */ "XVHSUBW_WU_HU\000" |
| 6475 | /* 14577 */ "XVHADDW_WU_HU\000" |
| 6476 | /* 14591 */ "XVDIV_HU\000" |
| 6477 | /* 14600 */ "XVSUBWOD_W_HU\000" |
| 6478 | /* 14614 */ "XVMADDWOD_W_HU\000" |
| 6479 | /* 14629 */ "XVADDWOD_W_HU\000" |
| 6480 | /* 14643 */ "XVMULWOD_W_HU\000" |
| 6481 | /* 14657 */ "XVSUBWEV_W_HU\000" |
| 6482 | /* 14671 */ "XVMADDWEV_W_HU\000" |
| 6483 | /* 14686 */ "XVADDWEV_W_HU\000" |
| 6484 | /* 14700 */ "XVMULWEV_W_HU\000" |
| 6485 | /* 14714 */ "XVMAX_HU\000" |
| 6486 | /* 14723 */ "LDX_HU\000" |
| 6487 | /* 14730 */ "XVFFINT_D_LU\000" |
| 6488 | /* 14743 */ "BLTU\000" |
| 6489 | /* 14748 */ "SLTU\000" |
| 6490 | /* 14753 */ "AMMIN__DB_WU\000" |
| 6491 | /* 14766 */ "AMMAX__DB_WU\000" |
| 6492 | /* 14779 */ "X86SUB_WU\000" |
| 6493 | /* 14789 */ "XVSSUB_WU\000" |
| 6494 | /* 14799 */ "X86ADD_WU\000" |
| 6495 | /* 14809 */ "XVSADD_WU\000" |
| 6496 | /* 14819 */ "LD_WU\000" |
| 6497 | /* 14825 */ "XVMOD_WU\000" |
| 6498 | /* 14834 */ "XVABSD_WU\000" |
| 6499 | /* 14844 */ "XVSUBWOD_D_WU\000" |
| 6500 | /* 14858 */ "XVMADDWOD_D_WU\000" |
| 6501 | /* 14873 */ "XVADDWOD_D_WU\000" |
| 6502 | /* 14887 */ "XVMULWOD_D_WU\000" |
| 6503 | /* 14901 */ "XVSUBWEV_D_WU\000" |
| 6504 | /* 14915 */ "XVMADDWEV_D_WU\000" |
| 6505 | /* 14930 */ "XVADDWEV_D_WU\000" |
| 6506 | /* 14944 */ "XVMULWEV_D_WU\000" |
| 6507 | /* 14958 */ "MULW_D_WU\000" |
| 6508 | /* 14968 */ "XVSLE_WU\000" |
| 6509 | /* 14977 */ "XVAVG_WU\000" |
| 6510 | /* 14986 */ "MULH_WU\000" |
| 6511 | /* 14994 */ "XVMUH_WU\000" |
| 6512 | /* 15003 */ "XVSUBI_WU\000" |
| 6513 | /* 15013 */ "XVADDI_WU\000" |
| 6514 | /* 15023 */ "XVSLEI_WU\000" |
| 6515 | /* 15033 */ "XVMINI_WU\000" |
| 6516 | /* 15043 */ "XVSLTI_WU\000" |
| 6517 | /* 15053 */ "XVMAXI_WU\000" |
| 6518 | /* 15063 */ "ALSL_WU\000" |
| 6519 | /* 15071 */ "X86MUL_WU\000" |
| 6520 | /* 15081 */ "AMMIN_WU\000" |
| 6521 | /* 15090 */ "XVMIN_WU\000" |
| 6522 | /* 15099 */ "XVPICKVE2GR_WU\000" |
| 6523 | /* 15114 */ "XVAVGR_WU\000" |
| 6524 | /* 15124 */ "XVFFINT_S_WU\000" |
| 6525 | /* 15137 */ "XVSAT_WU\000" |
| 6526 | /* 15146 */ "XVSLT_WU\000" |
| 6527 | /* 15155 */ "XVEXTH_DU_WU\000" |
| 6528 | /* 15168 */ "XVSLLWIL_DU_WU\000" |
| 6529 | /* 15183 */ "VEXT2XV_DU_WU\000" |
| 6530 | /* 15197 */ "XVHSUBW_DU_WU\000" |
| 6531 | /* 15211 */ "XVHADDW_DU_WU\000" |
| 6532 | /* 15225 */ "XVDIV_WU\000" |
| 6533 | /* 15234 */ "AMMAX_WU\000" |
| 6534 | /* 15243 */ "XVMAX_WU\000" |
| 6535 | /* 15252 */ "LDX_WU\000" |
| 6536 | /* 15259 */ "G_TRUNC_SSAT_U\000" |
| 6537 | /* 15274 */ "G_TRUNC_USAT_U\000" |
| 6538 | /* 15289 */ "G_FDIV\000" |
| 6539 | /* 15296 */ "G_STRICT_FDIV\000" |
| 6540 | /* 15310 */ "G_SDIV\000" |
| 6541 | /* 15317 */ "G_UDIV\000" |
| 6542 | /* 15324 */ "G_GET_FPENV\000" |
| 6543 | /* 15336 */ "G_RESET_FPENV\000" |
| 6544 | /* 15350 */ "G_SET_FPENV\000" |
| 6545 | /* 15362 */ "XVAND_V\000" |
| 6546 | /* 15370 */ "XVBITSEL_V\000" |
| 6547 | /* 15381 */ "XVBSLL_V\000" |
| 6548 | /* 15390 */ "XVBSRL_V\000" |
| 6549 | /* 15399 */ "XVANDN_V\000" |
| 6550 | /* 15408 */ "XVORN_V\000" |
| 6551 | /* 15416 */ "XVNOR_V\000" |
| 6552 | /* 15424 */ "XVOR_V\000" |
| 6553 | /* 15431 */ "XVXOR_V\000" |
| 6554 | /* 15439 */ "XVSETNEZ_V\000" |
| 6555 | /* 15450 */ "XVSETEQZ_V\000" |
| 6556 | /* 15461 */ "REVB_2W\000" |
| 6557 | /* 15469 */ "REVH_2W\000" |
| 6558 | /* 15477 */ "G_FPOW\000" |
| 6559 | /* 15484 */ "XVREPLVE0_W\000" |
| 6560 | /* 15496 */ "XVINSVE0_W\000" |
| 6561 | /* 15507 */ "XVADDA_W\000" |
| 6562 | /* 15516 */ "X86SRA_W\000" |
| 6563 | /* 15525 */ "ARMSRA_W\000" |
| 6564 | /* 15534 */ "XVSRA_W\000" |
| 6565 | /* 15542 */ "AMADD__DB_W\000" |
| 6566 | /* 15554 */ "AMAND__DB_W\000" |
| 6567 | /* 15566 */ "AMMIN__DB_W\000" |
| 6568 | /* 15578 */ "AMSWAP__DB_W\000" |
| 6569 | /* 15591 */ "AMOR__DB_W\000" |
| 6570 | /* 15602 */ "AMXOR__DB_W\000" |
| 6571 | /* 15614 */ "AMCAS__DB_W\000" |
| 6572 | /* 15626 */ "AMMAX__DB_W\000" |
| 6573 | /* 15638 */ "X86SUB_W\000" |
| 6574 | /* 15647 */ "ARMSUB_W\000" |
| 6575 | /* 15656 */ "XVMSUB_W\000" |
| 6576 | /* 15665 */ "XVSSUB_W\000" |
| 6577 | /* 15674 */ "XVSUB_W\000" |
| 6578 | /* 15682 */ "CRCC_W_B_W\000" |
| 6579 | /* 15693 */ "CRC_W_B_W\000" |
| 6580 | /* 15703 */ "X86SBC_W\000" |
| 6581 | /* 15712 */ "ARMSBC_W\000" |
| 6582 | /* 15721 */ "X86ADC_W\000" |
| 6583 | /* 15730 */ "ARMADC_W\000" |
| 6584 | /* 15739 */ "X86DEC_W\000" |
| 6585 | /* 15748 */ "X86INC_W\000" |
| 6586 | /* 15757 */ "SC_W\000" |
| 6587 | /* 15762 */ "X86ADD_W\000" |
| 6588 | /* 15771 */ "AMADD_W\000" |
| 6589 | /* 15779 */ "ARMADD_W\000" |
| 6590 | /* 15788 */ "XVMADD_W\000" |
| 6591 | /* 15797 */ "XVSADD_W\000" |
| 6592 | /* 15806 */ "XVADD_W\000" |
| 6593 | /* 15814 */ "LD_W\000" |
| 6594 | /* 15819 */ "X86AND_W\000" |
| 6595 | /* 15828 */ "AMAND_W\000" |
| 6596 | /* 15836 */ "ARMAND_W\000" |
| 6597 | /* 15845 */ "XVPACKOD_W\000" |
| 6598 | /* 15856 */ "XVPICKOD_W\000" |
| 6599 | /* 15867 */ "XVMOD_W\000" |
| 6600 | /* 15875 */ "IOCSRRD_W\000" |
| 6601 | /* 15885 */ "XVABSD_W\000" |
| 6602 | /* 15894 */ "XVSUBWOD_D_W\000" |
| 6603 | /* 15907 */ "XVMADDWOD_D_W\000" |
| 6604 | /* 15921 */ "XVADDWOD_D_W\000" |
| 6605 | /* 15934 */ "XVMULWOD_D_W\000" |
| 6606 | /* 15947 */ "XVFFINTH_D_W\000" |
| 6607 | /* 15960 */ "XVEXTH_D_W\000" |
| 6608 | /* 15971 */ "XVSLLWIL_D_W\000" |
| 6609 | /* 15984 */ "XVFFINTL_D_W\000" |
| 6610 | /* 15997 */ "FFINT_D_W\000" |
| 6611 | /* 16007 */ "XVSUBWEV_D_W\000" |
| 6612 | /* 16020 */ "XVMADDWEV_D_W\000" |
| 6613 | /* 16034 */ "XVADDWEV_D_W\000" |
| 6614 | /* 16047 */ "XVMULWEV_D_W\000" |
| 6615 | /* 16060 */ "VEXT2XV_D_W\000" |
| 6616 | /* 16072 */ "XVHSUBW_D_W\000" |
| 6617 | /* 16084 */ "XVHADDW_D_W\000" |
| 6618 | /* 16096 */ "MULW_D_W\000" |
| 6619 | /* 16105 */ "CRCC_W_D_W\000" |
| 6620 | /* 16116 */ "CRC_W_D_W\000" |
| 6621 | /* 16126 */ "LDLE_W\000" |
| 6622 | /* 16133 */ "XVSLE_W\000" |
| 6623 | /* 16141 */ "STLE_W\000" |
| 6624 | /* 16148 */ "XVPICKVE_W\000" |
| 6625 | /* 16159 */ "XVREPLVE_W\000" |
| 6626 | /* 16170 */ "XVSHUF_W\000" |
| 6627 | /* 16179 */ "XVNEG_W\000" |
| 6628 | /* 16187 */ "XVAVG_W\000" |
| 6629 | /* 16195 */ "RDTIMEH_W\000" |
| 6630 | /* 16205 */ "MULH_W\000" |
| 6631 | /* 16212 */ "MOVGR2FRH_W\000" |
| 6632 | /* 16224 */ "XVMUH_W\000" |
| 6633 | /* 16232 */ "XVILVH_W\000" |
| 6634 | /* 16241 */ "XVSSRANI_H_W\000" |
| 6635 | /* 16254 */ "XVSRANI_H_W\000" |
| 6636 | /* 16266 */ "XVSSRLNI_H_W\000" |
| 6637 | /* 16279 */ "XVSRLNI_H_W\000" |
| 6638 | /* 16291 */ "XVSSRARNI_H_W\000" |
| 6639 | /* 16305 */ "XVSRARNI_H_W\000" |
| 6640 | /* 16318 */ "XVSSRLRNI_H_W\000" |
| 6641 | /* 16332 */ "XVSRLRNI_H_W\000" |
| 6642 | /* 16345 */ "XVSSRAN_H_W\000" |
| 6643 | /* 16357 */ "XVSRAN_H_W\000" |
| 6644 | /* 16368 */ "XVSSRLN_H_W\000" |
| 6645 | /* 16380 */ "XVSRLN_H_W\000" |
| 6646 | /* 16391 */ "XVSSRARN_H_W\000" |
| 6647 | /* 16404 */ "XVSRARN_H_W\000" |
| 6648 | /* 16416 */ "XVSSRLRN_H_W\000" |
| 6649 | /* 16429 */ "XVSRLRN_H_W\000" |
| 6650 | /* 16441 */ "CRCC_W_H_W\000" |
| 6651 | /* 16452 */ "CRC_W_H_W\000" |
| 6652 | /* 16462 */ "ADDU12I_W\000" |
| 6653 | /* 16472 */ "LU12I_W\000" |
| 6654 | /* 16480 */ "XVSHUF4I_W\000" |
| 6655 | /* 16491 */ "X86SRAI_W\000" |
| 6656 | /* 16501 */ "ARMSRAI_W\000" |
| 6657 | /* 16511 */ "XVSRAI_W\000" |
| 6658 | /* 16520 */ "ADDI_W\000" |
| 6659 | /* 16527 */ "XVSLEI_W\000" |
| 6660 | /* 16536 */ "XVREPL128VEI_W\000" |
| 6661 | /* 16551 */ "VREPLVEI_W\000" |
| 6662 | /* 16562 */ "X86RCLI_W\000" |
| 6663 | /* 16572 */ "X86SLLI_W\000" |
| 6664 | /* 16582 */ "ARMSLLI_W\000" |
| 6665 | /* 16592 */ "XVSLLI_W\000" |
| 6666 | /* 16601 */ "PseudoXVREPLI_W\000" |
| 6667 | /* 16617 */ "PseudoVREPLI_W\000" |
| 6668 | /* 16632 */ "X86SRLI_W\000" |
| 6669 | /* 16642 */ "ARMSRLI_W\000" |
| 6670 | /* 16652 */ "XVSRLI_W\000" |
| 6671 | /* 16661 */ "X86ROTLI_W\000" |
| 6672 | /* 16672 */ "PseudoLI_W\000" |
| 6673 | /* 16683 */ "XVPERMI_W\000" |
| 6674 | /* 16693 */ "XVMINI_W\000" |
| 6675 | /* 16702 */ "XVSEQI_W\000" |
| 6676 | /* 16711 */ "XVSRARI_W\000" |
| 6677 | /* 16721 */ "X86RCRI_W\000" |
| 6678 | /* 16731 */ "XVBITCLRI_W\000" |
| 6679 | /* 16743 */ "XVSRLRI_W\000" |
| 6680 | /* 16753 */ "X86ROTRI_W\000" |
| 6681 | /* 16764 */ "ARMROTRI_W\000" |
| 6682 | /* 16775 */ "XVROTRI_W\000" |
| 6683 | /* 16785 */ "XVBITSETI_W\000" |
| 6684 | /* 16797 */ "XVSLTI_W\000" |
| 6685 | /* 16806 */ "XVBITREVI_W\000" |
| 6686 | /* 16818 */ "XVMAXI_W\000" |
| 6687 | /* 16827 */ "BYTEPICK_W\000" |
| 6688 | /* 16838 */ "BSTRPICK_W\000" |
| 6689 | /* 16849 */ "X86RCL_W\000" |
| 6690 | /* 16858 */ "LDL_W\000" |
| 6691 | /* 16864 */ "RDTIMEL_W\000" |
| 6692 | /* 16874 */ "SCREL_W\000" |
| 6693 | /* 16882 */ "X86SLL_W\000" |
| 6694 | /* 16891 */ "ARMSLL_W\000" |
| 6695 | /* 16900 */ "XVSLL_W\000" |
| 6696 | /* 16908 */ "XVLDREPL_W\000" |
| 6697 | /* 16919 */ "X86SRL_W\000" |
| 6698 | /* 16928 */ "ARMSRL_W\000" |
| 6699 | /* 16937 */ "XVSRL_W\000" |
| 6700 | /* 16945 */ "ALSL_W\000" |
| 6701 | /* 16952 */ "X86ROTL_W\000" |
| 6702 | /* 16962 */ "STL_W\000" |
| 6703 | /* 16968 */ "X86MUL_W\000" |
| 6704 | /* 16977 */ "XVMUL_W\000" |
| 6705 | /* 16985 */ "XVILVL_W\000" |
| 6706 | /* 16994 */ "XVSTELM_W\000" |
| 6707 | /* 17004 */ "XVPERM_W\000" |
| 6708 | /* 17013 */ "AMMIN_W\000" |
| 6709 | /* 17021 */ "XVMIN_W\000" |
| 6710 | /* 17029 */ "XVCLO_W\000" |
| 6711 | /* 17037 */ "CTO_W\000" |
| 6712 | /* 17043 */ "AMSWAP_W\000" |
| 6713 | /* 17052 */ "PseudoCTPOP_W\000" |
| 6714 | /* 17066 */ "LLACQ_W\000" |
| 6715 | /* 17074 */ "XVSEQ_W\000" |
| 6716 | /* 17082 */ "XVSRAR_W\000" |
| 6717 | /* 17091 */ "X86RCR_W\000" |
| 6718 | /* 17100 */ "LDR_W\000" |
| 6719 | /* 17106 */ "MOVGR2FR_W\000" |
| 6720 | /* 17117 */ "XVPICKVE2GR_W\000" |
| 6721 | /* 17131 */ "XVAVGR_W\000" |
| 6722 | /* 17140 */ "XVBITCLR_W\000" |
| 6723 | /* 17151 */ "XVSRLR_W\000" |
| 6724 | /* 17160 */ "X86OR_W\000" |
| 6725 | /* 17168 */ "AMOR_W\000" |
| 6726 | /* 17175 */ "ARMOR_W\000" |
| 6727 | /* 17183 */ "X86XOR_W\000" |
| 6728 | /* 17192 */ "AMXOR_W\000" |
| 6729 | /* 17200 */ "ARMXOR_W\000" |
| 6730 | /* 17209 */ "X86ROTR_W\000" |
| 6731 | /* 17219 */ "ARMROTR_W\000" |
| 6732 | /* 17229 */ "XVROTR_W\000" |
| 6733 | /* 17238 */ "LDPTR_W\000" |
| 6734 | /* 17246 */ "STPTR_W\000" |
| 6735 | /* 17254 */ "STR_W\000" |
| 6736 | /* 17260 */ "XVREPLGR2VR_W\000" |
| 6737 | /* 17274 */ "XVINSGR2VR_W\000" |
| 6738 | /* 17287 */ "IOCSRWR_W\000" |
| 6739 | /* 17297 */ "AMCAS_W\000" |
| 6740 | /* 17305 */ "BSTRINS_W\000" |
| 6741 | /* 17315 */ "XVEXTRINS_W\000" |
| 6742 | /* 17327 */ "XVFFINT_S_W\000" |
| 6743 | /* 17339 */ "XVSAT_W\000" |
| 6744 | /* 17347 */ "XVBITSET_W\000" |
| 6745 | /* 17358 */ "LDGT_W\000" |
| 6746 | /* 17365 */ "STGT_W\000" |
| 6747 | /* 17372 */ "XVSLT_W\000" |
| 6748 | /* 17380 */ "XVPCNT_W\000" |
| 6749 | /* 17389 */ "ARMNOT_W\000" |
| 6750 | /* 17398 */ "ST_W\000" |
| 6751 | /* 17403 */ "XVSSRANI_HU_W\000" |
| 6752 | /* 17417 */ "XVSSRLNI_HU_W\000" |
| 6753 | /* 17431 */ "XVSSRARNI_HU_W\000" |
| 6754 | /* 17446 */ "XVSSRLRNI_HU_W\000" |
| 6755 | /* 17461 */ "XVSSRAN_HU_W\000" |
| 6756 | /* 17474 */ "XVSSRLN_HU_W\000" |
| 6757 | /* 17487 */ "XVSSRARN_HU_W\000" |
| 6758 | /* 17501 */ "XVSSRLRN_HU_W\000" |
| 6759 | /* 17515 */ "XVMADDWOD_D_WU_W\000" |
| 6760 | /* 17532 */ "XVADDWOD_D_WU_W\000" |
| 6761 | /* 17548 */ "XVMULWOD_D_WU_W\000" |
| 6762 | /* 17564 */ "XVMADDWEV_D_WU_W\000" |
| 6763 | /* 17581 */ "XVADDWEV_D_WU_W\000" |
| 6764 | /* 17597 */ "XVMULWEV_D_WU_W\000" |
| 6765 | /* 17613 */ "XVPACKEV_W\000" |
| 6766 | /* 17624 */ "XVPICKEV_W\000" |
| 6767 | /* 17635 */ "XVBITREV_W\000" |
| 6768 | /* 17646 */ "XVDIV_W\000" |
| 6769 | /* 17654 */ "XVSIGNCOV_W\000" |
| 6770 | /* 17666 */ "ARMMOV_W\000" |
| 6771 | /* 17675 */ "CRCC_W_W_W\000" |
| 6772 | /* 17686 */ "CRC_W_W_W\000" |
| 6773 | /* 17696 */ "AMMAX_W\000" |
| 6774 | /* 17704 */ "XVMAX_W\000" |
| 6775 | /* 17712 */ "LDX_W\000" |
| 6776 | /* 17718 */ "ARMRRX_W\000" |
| 6777 | /* 17727 */ "STX_W\000" |
| 6778 | /* 17733 */ "PseudoXVBZ_W\000" |
| 6779 | /* 17746 */ "PseudoVBZ_W\000" |
| 6780 | /* 17758 */ "XVSETALLNEZ_W\000" |
| 6781 | /* 17772 */ "XVCLZ_W\000" |
| 6782 | /* 17780 */ "PseudoXVBNZ_W\000" |
| 6783 | /* 17794 */ "PseudoVBNZ_W\000" |
| 6784 | /* 17807 */ "XVSETANYEQZ_W\000" |
| 6785 | /* 17821 */ "CTZ_W\000" |
| 6786 | /* 17827 */ "PseudoXVMSKLTZ_W\000" |
| 6787 | /* 17844 */ "PseudoVMSKLTZ_W\000" |
| 6788 | /* 17860 */ "PseudoAddTPRel_W\000" |
| 6789 | /* 17877 */ "PseudoAtomicStoreW\000" |
| 6790 | /* 17896 */ "G_VECREDUCE_FMAX\000" |
| 6791 | /* 17913 */ "G_ATOMICRMW_FMAX\000" |
| 6792 | /* 17930 */ "G_VECREDUCE_SMAX\000" |
| 6793 | /* 17947 */ "G_SMAX\000" |
| 6794 | /* 17954 */ "G_VECREDUCE_UMAX\000" |
| 6795 | /* 17971 */ "G_UMAX\000" |
| 6796 | /* 17978 */ "G_ATOMICRMW_UMAX\000" |
| 6797 | /* 17995 */ "G_ATOMICRMW_MAX\000" |
| 6798 | /* 18011 */ "PRELDX\000" |
| 6799 | /* 18018 */ "XVLDX\000" |
| 6800 | /* 18024 */ "G_FRAME_INDEX\000" |
| 6801 | /* 18038 */ "G_SBFX\000" |
| 6802 | /* 18045 */ "G_UBFX\000" |
| 6803 | /* 18052 */ "G_SMULFIX\000" |
| 6804 | /* 18062 */ "G_UMULFIX\000" |
| 6805 | /* 18072 */ "G_SDIVFIX\000" |
| 6806 | /* 18082 */ "G_UDIVFIX\000" |
| 6807 | /* 18092 */ "XVSTX\000" |
| 6808 | /* 18098 */ "G_MEMCPY\000" |
| 6809 | /* 18107 */ "COPY\000" |
| 6810 | /* 18112 */ "CONVERGENCECTRL_ENTRY\000" |
| 6811 | /* 18134 */ "PseudoXVBZ\000" |
| 6812 | /* 18145 */ "PseudoVBZ\000" |
| 6813 | /* 18155 */ "BNEZ\000" |
| 6814 | /* 18160 */ "BCNEZ\000" |
| 6815 | /* 18166 */ "MASKNEZ\000" |
| 6816 | /* 18174 */ "G_CTLZ\000" |
| 6817 | /* 18181 */ "PseudoXVBNZ\000" |
| 6818 | /* 18193 */ "PseudoVBNZ\000" |
| 6819 | /* 18204 */ "BEQZ\000" |
| 6820 | /* 18209 */ "BCEQZ\000" |
| 6821 | /* 18215 */ "MASKEQZ\000" |
| 6822 | /* 18223 */ "G_CTTZ\000" |
| 6823 | /* 18230 */ "PseudoCmpXchg128Acquire\000" |
| 6824 | /* 18254 */ "BuildPairF64Pseudo\000" |
| 6825 | /* 18273 */ "SplitPairF64Pseudo\000" |
| 6826 | /* 18292 */ "PseudoTAILIndirect\000" |
| 6827 | /* 18311 */ "PseudoCALLIndirect\000" |
| 6828 | }; |
| 6829 | #ifdef __GNUC__ |
| 6830 | #pragma GCC diagnostic pop |
| 6831 | #endif |
| 6832 | |
| 6833 | extern const unsigned LoongArchInstrNameIndices[] = { |
| 6834 | 8960U, 9602U, 10856U, 10115U, 9084U, 9065U, 9093U, 9401U, |
| 6835 | 6854U, 6869U, 6770U, 6757U, 6896U, 11579U, 6603U, 13347U, |
| 6836 | 6783U, 8956U, 9074U, 6069U, 18107U, 9028U, 6399U, 13251U, |
| 6837 | 2928U, 6020U, 6057U, 10295U, 9336U, 13148U, 3047U, 10572U, |
| 6838 | 7005U, 13137U, 6482U, 10545U, 10532U, 10936U, 12978U, 13011U, |
| 6839 | 9252U, 9315U, 9288U, 9110U, 6588U, 10901U, 10249U, 6458U, |
| 6840 | 18112U, 11137U, 10465U, 6651U, 13382U, 13412U, 9958U, 2788U, |
| 6841 | 818U, 9517U, 15310U, 15317U, 9568U, 9575U, 9582U, 9592U, |
| 6842 | 2906U, 11350U, 11313U, 11476U, 13856U, 11185U, 9217U, 11173U, |
| 6843 | 9206U, 6768U, 8958U, 18024U, 6613U, 6628U, 9406U, 12946U, |
| 6844 | 11483U, 13288U, 11500U, 11236U, 2521U, 11562U, 13159U, 11426U, |
| 6845 | 13320U, 6715U, 10912U, 3021U, 2495U, 3003U, 13197U, 13178U, |
| 6846 | 9936U, 10961U, 10980U, 2689U, 2633U, 2663U, 2602U, 2674U, |
| 6847 | 2614U, 2644U, 6553U, 6507U, 6537U, 11609U, 6917U, 6943U, |
| 6848 | 2804U, 824U, 2912U, 2873U, 11355U, 11319U, 17995U, 10084U, |
| 6849 | 17978U, 10067U, 2755U, 801U, 17913U, 10002U, 9751U, 9698U, |
| 6850 | 9872U, 9810U, 10357U, 10335U, 2962U, 12899U, 6049U, 7046U, |
| 6851 | 2953U, 12965U, 13266U, 2473U, 11657U, 13114U, 11684U, 13396U, |
| 6852 | 2513U, 12485U, 15259U, 15274U, 13103U, 13091U, 13241U, 6997U, |
| 6853 | 13375U, 6883U, 13405U, 9152U, 11117U, 11103U, 9145U, 11110U, |
| 6854 | 11419U, 9427U, 10426U, 10405U, 10433U, 10440U, 12956U, 10241U, |
| 6855 | 6090U, 10225U, 6041U, 10233U, 6082U, 10217U, 6033U, 10279U, |
| 6856 | 10271U, 7065U, 7057U, 12817U, 12807U, 12797U, 12787U, 12837U, |
| 6857 | 12827U, 18052U, 18062U, 12847U, 12860U, 18072U, 18082U, 12873U, |
| 6858 | 12886U, 2713U, 780U, 9451U, 734U, 2595U, 15289U, 9547U, |
| 6859 | 6749U, 15477U, 8998U, 10616U, 616U, 9U, 6990U, 599U, |
| 6860 | 0U, 10591U, 10623U, 6847U, 13367U, 2485U, 8969U, 8983U, |
| 6861 | 10387U, 10396U, 12920U, 12933U, 11450U, 9973U, 11596U, 6724U, |
| 6862 | 9896U, 9906U, 6139U, 6154U, 9687U, 9740U, 9796U, 9858U, |
| 6863 | 15324U, 15350U, 15336U, 6098U, 6126U, 6111U, 6960U, 6975U, |
| 6864 | 2794U, 9042U, 10036U, 17947U, 10060U, 17971U, 11470U, 2994U, |
| 6865 | 2984U, 10851U, 13035U, 6372U, 11217U, 11197U, 13067U, 13046U, |
| 6866 | 11251U, 11282U, 11268U, 11639U, 18223U, 10150U, 18174U, 10131U, |
| 6867 | 11515U, 10486U, 10379U, 6575U, 9493U, 9198U, 11530U, 10108U, |
| 6868 | 11537U, 9924U, 11522U, 10100U, 9916U, 607U, 7089U, 7081U, |
| 6869 | 7073U, 13297U, 11164U, 13170U, 13215U, 13330U, 10888U, 6381U, |
| 6870 | 2560U, 6685U, 6522U, 2741U, 787U, 9479U, 15296U, 9554U, |
| 6871 | 740U, 13305U, 10600U, 10412U, 11547U, 11000U, 11016U, 18098U, |
| 6872 | 6442U, 6697U, 13002U, 10287U, 6426U, 10328U, 10304U, 10316U, |
| 6873 | 2720U, 9458U, 2696U, 9434U, 17896U, 9985U, 9719U, 9666U, |
| 6874 | 9834U, 9772U, 2772U, 9501U, 2890U, 11335U, 11297U, 17930U, |
| 6875 | 10019U, 17954U, 10043U, 18038U, 18045U, 10178U, 10557U, 18254U, |
| 6876 | 2542U, 10195U, 5976U, 17860U, 174U, 196U, 577U, 388U, |
| 6877 | 247U, 652U, 454U, 124U, 526U, 337U, 475U, 5993U, |
| 6878 | 17877U, 435U, 10869U, 2941U, 9158U, 9348U, 31U, 704U, |
| 6879 | 18311U, 6301U, 9648U, 9376U, 1806U, 4529U, 8060U, 58U, |
| 6880 | 17052U, 77U, 717U, 18230U, 292U, 675U, 11059U, 9236U, |
| 6881 | 9272U, 9171U, 11457U, 6318U, 13228U, 6337U, 9130U, 6263U, |
| 6882 | 2577U, 6173U, 2820U, 6197U, 6356U, 6241U, 2857U, 6219U, |
| 6883 | 6406U, 11033U, 4049U, 16672U, 146U, 549U, 360U, 218U, |
| 6884 | 96U, 497U, 308U, 410U, 270U, 12992U, 11046U, 9187U, |
| 6885 | 18U, 691U, 18292U, 6284U, 9630U, 9359U, 10447U, 18193U, |
| 6886 | 2370U, 5898U, 8848U, 17794U, 18145U, 2256U, 5850U, 8800U, |
| 6887 | 17746U, 2410U, 2285U, 2457U, 5960U, 8892U, 17844U, 2318U, |
| 6888 | 1476U, 4004U, 7756U, 16617U, 18181U, 2356U, 5884U, 8834U, |
| 6889 | 17780U, 18134U, 2243U, 5837U, 8787U, 17733U, 1948U, 8202U, |
| 6890 | 2393U, 2268U, 2440U, 5943U, 8875U, 17827U, 2301U, 1460U, |
| 6891 | 3988U, 7740U, 16601U, 11405U, 11370U, 18273U, 11412U, 962U, |
| 6892 | 3349U, 7429U, 15724U, 3907U, 16520U, 3841U, 16462U, 3878U, |
| 6893 | 3381U, 15765U, 4283U, 16945U, 15063U, 995U, 3396U, 7462U, |
| 6894 | 15771U, 878U, 3149U, 7145U, 15542U, 3476U, 15828U, 3161U, |
| 6895 | 15554U, 1977U, 5002U, 8231U, 17297U, 903U, 3221U, 7170U, |
| 6896 | 15614U, 5807U, 14291U, 17696U, 15234U, 3233U, 13876U, 15626U, |
| 6897 | 14766U, 4453U, 14053U, 17013U, 15081U, 3173U, 13863U, 15566U, |
| 6898 | 14753U, 4887U, 17168U, 3198U, 15591U, 1797U, 4509U, 8051U, |
| 6899 | 17043U, 890U, 3185U, 7157U, 15578U, 4916U, 17192U, 3209U, |
| 6900 | 15602U, 2886U, 8951U, 9931U, 15730U, 15779U, 15836U, 6807U, |
| 6901 | 6707U, 5520U, 17666U, 6827U, 17389U, 17175U, 16764U, 17219U, |
| 6902 | 17718U, 15712U, 16582U, 16891U, 16501U, 15525U, 16642U, 16928U, |
| 6903 | 15647U, 17200U, 5088U, 3585U, 761U, 18209U, 18160U, 10632U, |
| 6904 | 18204U, 6169U, 14309U, 753U, 763U, 5475U, 17637U, 9052U, |
| 6905 | 13042U, 14743U, 6422U, 18155U, 9022U, 5017U, 17305U, 4204U, |
| 6906 | 16838U, 4193U, 16827U, 10459U, 4497U, 17031U, 5878U, 17774U, |
| 6907 | 6910U, 15682U, 16105U, 16441U, 17675U, 15693U, 16116U, 16452U, |
| 6908 | 17686U, 3071U, 11444U, 6935U, 4503U, 17037U, 5937U, 17821U, |
| 6909 | 10841U, 9055U, 5487U, 14284U, 17648U, 15227U, 10173U, 2203U, |
| 6910 | 8670U, 5010U, 12467U, 3389U, 11794U, 5041U, 12476U, 3754U, |
| 6911 | 12024U, 4565U, 12366U, 3545U, 11863U, 5107U, 12518U, 3641U, |
| 6912 | 11933U, 4876U, 12443U, 4599U, 12392U, 3604U, 11905U, 5141U, |
| 6913 | 12544U, 3680U, 11972U, 4471U, 12317U, 3767U, 12037U, 4586U, |
| 6914 | 12379U, 3574U, 11884U, 5128U, 12531U, 3667U, 11959U, 4896U, |
| 6915 | 12456U, 4613U, 12406U, 3618U, 11919U, 5155U, 12558U, 3694U, |
| 6916 | 11986U, 4484U, 12330U, 4432U, 12294U, 2847U, 11852U, 3457U, |
| 6917 | 5052U, 3533U, 5486U, 12637U, 9525U, 15997U, 9537U, 17329U, |
| 6918 | 5080U, 12500U, 3556U, 11874U, 5823U, 12729U, 3451U, 11822U, |
| 6919 | 3257U, 11754U, 3406U, 11803U, 3141U, 11734U, 5800U, 12722U, |
| 6920 | 3114U, 11724U, 4446U, 12308U, 5513U, 12644U, 3285U, 11773U, |
| 6921 | 4317U, 12068U, 3787U, 12048U, 3416U, 11813U, 3295U, 11783U, |
| 6922 | 3708U, 12000U, 4520U, 12343U, 5178U, 12572U, 3720U, 12012U, |
| 6923 | 5198U, 12592U, 3245U, 11742U, 6012U, 12767U, 5188U, 12582U, |
| 6924 | 5097U, 12508U, 3594U, 11895U, 5830U, 12736U, 5207U, 12601U, |
| 6925 | 3276U, 11764U, 4358U, 12236U, 5650U, 12668U, 4343U, 12075U, |
| 6926 | 5531U, 12653U, 4372U, 12248U, 5760U, 12682U, 4398U, 12270U, |
| 6927 | 5786U, 12708U, 4386U, 12260U, 5774U, 12696U, 3070U, 11443U, |
| 6928 | 6934U, 7097U, 9060U, 10846U, 6394U, 773U, 1073U, 3514U, |
| 6929 | 7540U, 15875U, 1967U, 4992U, 8221U, 17287U, 9422U, 44U, |
| 6930 | 51U, 11124U, 2016U, 5081U, 8294U, 17358U, 1104U, 3557U, |
| 6931 | 7571U, 16126U, 4224U, 16858U, 6597U, 4943U, 17238U, 4795U, |
| 6932 | 17100U, 2231U, 13849U, 5824U, 8775U, 14723U, 17712U, 15252U, |
| 6933 | 1029U, 13446U, 3452U, 7496U, 14334U, 15814U, 14819U, 4555U, |
| 6934 | 17066U, 4242U, 16886U, 16472U, 3851U, 3859U, 18215U, 18166U, |
| 6935 | 3508U, 13931U, 15869U, 14827U, 12775U, 11073U, 11092U, 12755U, |
| 6936 | 4826U, 12430U, 624U, 12418U, 6740U, 11394U, 16212U, 4801U, |
| 6937 | 17106U, 638U, 10878U, 11082U, 3810U, 13966U, 16205U, 14986U, |
| 6938 | 16096U, 14958U, 4309U, 16971U, 11160U, 11157U, 8965U, 10169U, |
| 6939 | 8938U, 8918U, 8928U, 8908U, 2836U, 18011U, 1563U, 4101U, |
| 6940 | 7843U, 16724U, 1850U, 4789U, 8104U, 17094U, 16195U, 16864U, |
| 6941 | 3630U, 7022U, 15461U, 7030U, 3330U, 15469U, 3825U, 1621U, |
| 6942 | 4133U, 7875U, 16756U, 1918U, 4927U, 8172U, 17212U, 953U, |
| 6943 | 3340U, 7420U, 15706U, 4230U, 16874U, 3373U, 10656U, 15757U, |
| 6944 | 9014U, 9006U, 6495U, 6469U, 6561U, 6672U, 3972U, 16575U, |
| 6945 | 4241U, 16885U, 13087U, 8978U, 14748U, 8992U, 3891U, 16494U, |
| 6946 | 3125U, 15519U, 4022U, 16635U, 4269U, 16922U, 2023U, 5098U, |
| 6947 | 8301U, 17365U, 1119U, 3595U, 7586U, 16141U, 4300U, 16962U, |
| 6948 | 4951U, 17246U, 4959U, 17254U, 2237U, 5831U, 8781U, 17727U, |
| 6949 | 2047U, 5208U, 8325U, 17398U, 3268U, 15641U, 9228U, 11130U, |
| 6950 | 9393U, 7098U, 3064U, 7038U, 11437U, 3077U, 1084U, 13462U, |
| 6951 | 3525U, 13939U, 7551U, 14350U, 15886U, 14835U, 853U, 3104U, |
| 6952 | 7120U, 15508U, 13623U, 13994U, 14397U, 15014U, 16035U, 14931U, |
| 6953 | 17582U, 1284U, 13585U, 2119U, 4728U, 14158U, 5280U, 8706U, |
| 6954 | 14687U, 8509U, 15922U, 14874U, 17533U, 1207U, 13528U, 2070U, |
| 6955 | 4653U, 14101U, 5231U, 8621U, 14630U, 8460U, 1022U, 3444U, |
| 6956 | 7489U, 10662U, 15807U, 1376U, 15400U, 15363U, 1870U, 13706U, |
| 6957 | 4838U, 14201U, 8124U, 14480U, 17132U, 15115U, 1155U, 13481U, |
| 6958 | 3803U, 13958U, 7622U, 14369U, 16188U, 14978U, 1571U, 4109U, |
| 6959 | 7851U, 16732U, 1879U, 4847U, 8133U, 17141U, 1661U, 4173U, |
| 6960 | 7915U, 16807U, 2173U, 5474U, 8563U, 17636U, 1430U, 15371U, |
| 6961 | 1640U, 4152U, 7894U, 16786U, 2006U, 5070U, 8284U, 17348U, |
| 6962 | 15382U, 15391U, 1790U, 4496U, 8044U, 17030U, 2349U, 5877U, |
| 6963 | 8827U, 17773U, 2184U, 13832U, 5494U, 14283U, 8574U, 14592U, |
| 6964 | 17647U, 15226U, 13733U, 14507U, 15183U, 1092U, 7559U, 16060U, |
| 6965 | 13775U, 1309U, 13817U, 14549U, 2211U, 8731U, 15156U, 15961U, |
| 6966 | 13748U, 1233U, 14229U, 4679U, 14522U, 8647U, 14242U, 4690U, |
| 6967 | 1986U, 5028U, 8240U, 17316U, 3388U, 11793U, 5040U, 12475U, |
| 6968 | 3753U, 12023U, 4564U, 12365U, 3544U, 11862U, 5106U, 12517U, |
| 6969 | 3640U, 11932U, 4875U, 12442U, 4598U, 12391U, 3603U, 11904U, |
| 6970 | 5140U, 12543U, 3679U, 11971U, 4470U, 12316U, 3766U, 12036U, |
| 6971 | 4585U, 12378U, 3573U, 11883U, 5127U, 12530U, 3666U, 11958U, |
| 6972 | 4895U, 12455U, 4612U, 12405U, 3617U, 11918U, 5154U, 12557U, |
| 6973 | 3693U, 11985U, 4483U, 12329U, 11829U, 8252U, 11841U, 8264U, |
| 6974 | 12056U, 5051U, 5485U, 12636U, 15948U, 15985U, 9524U, 14731U, |
| 6975 | 9536U, 17328U, 15125U, 3256U, 11753U, 3405U, 11802U, 3140U, |
| 6976 | 11733U, 5799U, 12721U, 3113U, 11723U, 4445U, 12307U, 3284U, |
| 6977 | 11772U, 4316U, 12067U, 3415U, 11812U, 3294U, 11782U, 3707U, |
| 6978 | 11999U, 4519U, 12342U, 4421U, 12283U, 3653U, 11945U, 4544U, |
| 6979 | 12353U, 5926U, 12744U, 5177U, 12571U, 3719U, 12011U, 5197U, |
| 6980 | 12591U, 1531U, 7811U, 1821U, 8075U, 5187U, 12581U, 3275U, |
| 6981 | 11763U, 12135U, 12209U, 12105U, 12179U, 4357U, 5649U, 12667U, |
| 6982 | 12089U, 12163U, 4342U, 5530U, 12652U, 12120U, 12194U, 4371U, |
| 6983 | 5759U, 12681U, 12148U, 12222U, 5325U, 4397U, 12621U, 5785U, |
| 6984 | 12707U, 5312U, 4385U, 12608U, 5773U, 12695U, 15212U, 16085U, |
| 6985 | 13804U, 1334U, 14269U, 4766U, 14578U, 8756U, 15198U, 16073U, |
| 6986 | 13790U, 1322U, 14255U, 4754U, 14564U, 8744U, 1171U, 3833U, |
| 6987 | 7638U, 16233U, 1763U, 4333U, 8017U, 16986U, 1955U, 4980U, |
| 6988 | 8209U, 17275U, 2843U, 8946U, 1708U, 4256U, 7962U, 16909U, |
| 6989 | 18019U, 16021U, 14916U, 17565U, 1270U, 13570U, 2102U, 4714U, |
| 6990 | 14143U, 5263U, 8692U, 14672U, 8492U, 15908U, 14859U, 17516U, |
| 6991 | 1193U, 13513U, 2053U, 4639U, 14086U, 5214U, 8607U, 14615U, |
| 6992 | 8443U, 1004U, 3426U, 7471U, 15789U, 1673U, 13663U, 4185U, |
| 6993 | 14034U, 7927U, 14437U, 16819U, 15054U, 2224U, 13841U, 5816U, |
| 6994 | 14301U, 8768U, 14715U, 17705U, 15244U, 1522U, 13643U, 4071U, |
| 6995 | 14014U, 7802U, 14417U, 16694U, 15034U, 1782U, 13683U, 4462U, |
| 6996 | 14063U, 8036U, 14457U, 17022U, 15091U, 1066U, 13453U, 3507U, |
| 6997 | 13930U, 7533U, 14341U, 15868U, 14826U, 2275U, 2447U, 5950U, |
| 6998 | 8882U, 17834U, 2384U, 925U, 3305U, 7192U, 15657U, 1163U, |
| 6999 | 13490U, 3818U, 13975U, 7630U, 14378U, 16225U, 14995U, 16048U, |
| 7000 | 14945U, 17598U, 1297U, 13599U, 2135U, 4741U, 14172U, 5296U, |
| 7001 | 8719U, 14701U, 8525U, 15935U, 14888U, 17549U, 1220U, 13542U, |
| 7002 | 2086U, 4666U, 14115U, 5247U, 8634U, 14644U, 8476U, 1755U, |
| 7003 | 4325U, 8009U, 16978U, 1147U, 3795U, 7614U, 16180U, 1593U, |
| 7004 | 15417U, 1602U, 15409U, 15425U, 2151U, 5452U, 8541U, 17614U, |
| 7005 | 1044U, 3485U, 7511U, 15846U, 2039U, 5168U, 8317U, 17381U, |
| 7006 | 16684U, 2162U, 5463U, 8552U, 17625U, 1055U, 3496U, 7522U, |
| 7007 | 15857U, 1856U, 13691U, 4813U, 14186U, 8110U, 14465U, 17118U, |
| 7008 | 15100U, 1935U, 4966U, 8189U, 17261U, 1408U, 3938U, 7700U, |
| 7009 | 16551U, 1127U, 3742U, 7594U, 16160U, 1630U, 4142U, 7884U, |
| 7010 | 16776U, 1926U, 4935U, 8180U, 17230U, 1013U, 13437U, 3435U, |
| 7011 | 13920U, 7480U, 14325U, 15798U, 14810U, 1998U, 13716U, 5062U, |
| 7012 | 14211U, 8276U, 14490U, 17340U, 15138U, 1542U, 4080U, 7822U, |
| 7013 | 16703U, 1831U, 4577U, 8085U, 17075U, 2335U, 5863U, 8813U, |
| 7014 | 17759U, 2427U, 5912U, 8862U, 17808U, 15451U, 15440U, 1346U, |
| 7015 | 3868U, 7647U, 16481U, 1138U, 3779U, 7605U, 16171U, 2192U, |
| 7016 | 5502U, 8582U, 17655U, 1385U, 13633U, 3915U, 14004U, 7677U, |
| 7017 | 14407U, 16528U, 15024U, 1112U, 13472U, 3565U, 13949U, 7579U, |
| 7018 | 14360U, 16134U, 14969U, 1452U, 3980U, 7732U, 16593U, 15169U, |
| 7019 | 15972U, 13761U, 1244U, 14535U, 8658U, 1700U, 4248U, 7954U, |
| 7020 | 16901U, 1652U, 13653U, 4164U, 14024U, 7906U, 14427U, 16798U, |
| 7021 | 15044U, 2031U, 13725U, 5119U, 14220U, 8309U, 14499U, 17373U, |
| 7022 | 15147U, 1367U, 3899U, 7668U, 16512U, 7231U, 10683U, 16255U, |
| 7023 | 5558U, 7334U, 16358U, 5675U, 1551U, 4089U, 7831U, 16712U, |
| 7024 | 7282U, 10734U, 16306U, 5609U, 7381U, 16405U, 5722U, 1839U, |
| 7025 | 4778U, 8093U, 17083U, 871U, 3132U, 7138U, 15535U, 1502U, |
| 7026 | 4030U, 7782U, 16653U, 7256U, 10708U, 16280U, 5583U, 7357U, |
| 7027 | 16381U, 5698U, 1583U, 4121U, 7863U, 16744U, 7309U, 10761U, |
| 7028 | 16333U, 5636U, 7406U, 16430U, 5747U, 1890U, 4858U, 8144U, |
| 7029 | 17152U, 1728U, 4276U, 7982U, 16938U, 8331U, 7218U, 10784U, |
| 7030 | 10670U, 17404U, 16242U, 5340U, 5545U, 8389U, 7322U, 17462U, |
| 7031 | 16346U, 5398U, 5663U, 8359U, 7268U, 10812U, 10720U, 17432U, |
| 7032 | 16292U, 5368U, 5595U, 8415U, 7368U, 17488U, 16392U, 5424U, |
| 7033 | 5709U, 8345U, 7243U, 10798U, 10695U, 17418U, 16267U, 5354U, |
| 7034 | 5570U, 8402U, 7345U, 17475U, 16369U, 5411U, 5686U, 8374U, |
| 7035 | 7295U, 10827U, 10747U, 17447U, 16319U, 5383U, 5622U, 8429U, |
| 7036 | 7393U, 17502U, 16417U, 5438U, 5734U, 934U, 13427U, 3314U, |
| 7037 | 13900U, 7201U, 14315U, 15666U, 14790U, 13363U, 1772U, 4411U, |
| 7038 | 8026U, 16995U, 18093U, 13613U, 13984U, 14387U, 15004U, 16008U, |
| 7039 | 14902U, 1257U, 13556U, 4701U, 14129U, 8679U, 14658U, 15895U, |
| 7040 | 14845U, 1180U, 13499U, 4626U, 14072U, 8594U, 14601U, 943U, |
| 7041 | 3323U, 7210U, 10649U, 15675U, 1610U, 15432U, 959U, 3346U, |
| 7042 | 7426U, 15721U, 986U, 3378U, 13909U, 7453U, 15762U, 14799U, |
| 7043 | 1034U, 3467U, 7501U, 15819U, 9612U, 10494U, 968U, 3355U, |
| 7044 | 7435U, 15739U, 10504U, 977U, 3364U, 7444U, 15748U, 6797U, |
| 7045 | 10514U, 6817U, 10523U, 1745U, 13672U, 4306U, 14043U, 7999U, |
| 7046 | 14446U, 16968U, 15071U, 1898U, 4866U, 8152U, 17160U, 1419U, |
| 7047 | 3949U, 7711U, 16562U, 1681U, 4215U, 7935U, 16849U, 1560U, |
| 7048 | 4098U, 7840U, 16721U, 1847U, 4786U, 8101U, 17091U, 1510U, |
| 7049 | 4038U, 7790U, 16661U, 1735U, 4290U, 7989U, 16952U, 1618U, |
| 7050 | 4130U, 7872U, 16753U, 1915U, 4924U, 8169U, 17209U, 950U, |
| 7051 | 3337U, 7417U, 15703U, 6837U, 9621U, 1441U, 3969U, 7721U, |
| 7052 | 16572U, 1690U, 4238U, 7944U, 16882U, 1356U, 3888U, 7657U, |
| 7053 | 16491U, 861U, 3122U, 7128U, 15516U, 1491U, 4019U, 7771U, |
| 7054 | 16632U, 1718U, 4266U, 7972U, 16919U, 915U, 3265U, 13889U, |
| 7055 | 7182U, 15638U, 14779U, 1906U, 4907U, 8160U, 17183U, 11309U, |
| 7056 | 8964U, 1083U, 13461U, 3524U, 13938U, 7550U, 14349U, 15885U, |
| 7057 | 14834U, 852U, 3103U, 7119U, 15507U, 13622U, 13993U, 14396U, |
| 7058 | 15013U, 16034U, 14930U, 17581U, 1283U, 13584U, 2118U, 4727U, |
| 7059 | 14157U, 5279U, 8705U, 14686U, 8508U, 15921U, 14873U, 17532U, |
| 7060 | 1206U, 13527U, 2069U, 4652U, 14100U, 5230U, 8620U, 14629U, |
| 7061 | 8459U, 1021U, 3443U, 7488U, 10661U, 15806U, 1375U, 15399U, |
| 7062 | 15362U, 1869U, 13705U, 4837U, 14200U, 8123U, 14479U, 17131U, |
| 7063 | 15114U, 1154U, 13480U, 3802U, 13957U, 7621U, 14368U, 16187U, |
| 7064 | 14977U, 1570U, 4108U, 7850U, 16731U, 1878U, 4846U, 8132U, |
| 7065 | 17140U, 1660U, 4172U, 7914U, 16806U, 2172U, 5473U, 8562U, |
| 7066 | 17635U, 1429U, 15370U, 1639U, 4151U, 7893U, 16785U, 2005U, |
| 7067 | 5069U, 8283U, 17347U, 15381U, 15390U, 1789U, 4495U, 8043U, |
| 7068 | 17029U, 2348U, 5876U, 8826U, 17772U, 2183U, 13831U, 5493U, |
| 7069 | 14282U, 8573U, 14591U, 17646U, 15225U, 15155U, 15960U, 13747U, |
| 7070 | 1232U, 14228U, 4678U, 14521U, 8646U, 14241U, 4689U, 1985U, |
| 7071 | 5027U, 8239U, 17315U, 3387U, 11792U, 5039U, 12474U, 3752U, |
| 7072 | 12022U, 4563U, 12364U, 3543U, 11861U, 5105U, 12516U, 3639U, |
| 7073 | 11931U, 4874U, 12441U, 4597U, 12390U, 3602U, 11903U, 5139U, |
| 7074 | 12542U, 3678U, 11970U, 4469U, 12315U, 3765U, 12035U, 4584U, |
| 7075 | 12377U, 3572U, 11882U, 5126U, 12529U, 3665U, 11957U, 4894U, |
| 7076 | 12454U, 4611U, 12404U, 3616U, 11917U, 5153U, 12556U, 3692U, |
| 7077 | 11984U, 4482U, 12328U, 11828U, 8251U, 11840U, 8263U, 12055U, |
| 7078 | 5050U, 5484U, 12635U, 15947U, 15984U, 9523U, 14730U, 9535U, |
| 7079 | 17327U, 15124U, 3255U, 11752U, 3404U, 11801U, 3139U, 11732U, |
| 7080 | 5798U, 12720U, 3112U, 11722U, 4444U, 12306U, 3283U, 11771U, |
| 7081 | 4315U, 12066U, 3414U, 11811U, 3293U, 11781U, 3706U, 11998U, |
| 7082 | 4518U, 12341U, 4420U, 12282U, 3652U, 11944U, 4543U, 12352U, |
| 7083 | 5925U, 12743U, 5176U, 12570U, 3718U, 12010U, 5196U, 12590U, |
| 7084 | 1530U, 7810U, 1820U, 8074U, 5186U, 12580U, 3274U, 11762U, |
| 7085 | 12134U, 12208U, 12104U, 12178U, 4356U, 5648U, 12666U, 12088U, |
| 7086 | 12162U, 4341U, 5529U, 12651U, 12119U, 12193U, 4370U, 5758U, |
| 7087 | 12680U, 12147U, 12221U, 5324U, 4396U, 12620U, 5784U, 12706U, |
| 7088 | 5311U, 4384U, 12607U, 5772U, 12694U, 15211U, 16084U, 13803U, |
| 7089 | 1333U, 14268U, 4765U, 14577U, 8755U, 3959U, 15197U, 16072U, |
| 7090 | 13789U, 1321U, 14254U, 4753U, 14563U, 8743U, 1170U, 3832U, |
| 7091 | 7637U, 16232U, 1762U, 4332U, 8016U, 16985U, 4979U, 17274U, |
| 7092 | 3092U, 15496U, 2842U, 8945U, 1707U, 4255U, 7961U, 16908U, |
| 7093 | 18018U, 16020U, 14915U, 17564U, 1269U, 13569U, 2101U, 4713U, |
| 7094 | 14142U, 5262U, 8691U, 14671U, 8491U, 15907U, 14858U, 17515U, |
| 7095 | 1192U, 13512U, 2052U, 4638U, 14085U, 5213U, 8606U, 14614U, |
| 7096 | 8442U, 1003U, 3425U, 7470U, 15788U, 1672U, 13662U, 4184U, |
| 7097 | 14033U, 7926U, 14436U, 16818U, 15053U, 2223U, 13840U, 5815U, |
| 7098 | 14300U, 8767U, 14714U, 17704U, 15243U, 1521U, 13642U, 4070U, |
| 7099 | 14013U, 7801U, 14416U, 16693U, 15033U, 1781U, 13682U, 4461U, |
| 7100 | 14062U, 8035U, 14456U, 17021U, 15090U, 1065U, 13452U, 3506U, |
| 7101 | 13929U, 7532U, 14340U, 15867U, 14825U, 2274U, 2446U, 5949U, |
| 7102 | 8881U, 17833U, 2383U, 924U, 3304U, 7191U, 15656U, 1162U, |
| 7103 | 13489U, 3817U, 13974U, 7629U, 14377U, 16224U, 14994U, 16047U, |
| 7104 | 14944U, 17597U, 1296U, 13598U, 2134U, 4740U, 14171U, 5295U, |
| 7105 | 8718U, 14700U, 8524U, 15934U, 14887U, 17548U, 1219U, 13541U, |
| 7106 | 2085U, 4665U, 14114U, 5246U, 8633U, 14643U, 8475U, 1754U, |
| 7107 | 4324U, 8008U, 16977U, 1146U, 3794U, 7613U, 16179U, 1592U, |
| 7108 | 15416U, 1601U, 15408U, 15424U, 2150U, 5451U, 8540U, 17613U, |
| 7109 | 1043U, 3484U, 7510U, 15845U, 2038U, 5167U, 8316U, 17380U, |
| 7110 | 4060U, 10773U, 16683U, 17004U, 2161U, 5462U, 8551U, 17624U, |
| 7111 | 1054U, 3495U, 7521U, 15856U, 4812U, 14185U, 17117U, 15099U, |
| 7112 | 3730U, 16148U, 1393U, 3923U, 7685U, 16536U, 1934U, 4965U, |
| 7113 | 8188U, 17260U, 840U, 3080U, 7107U, 10636U, 15484U, 1126U, |
| 7114 | 3741U, 7593U, 16159U, 1629U, 4141U, 7883U, 16775U, 1925U, |
| 7115 | 4934U, 8179U, 17229U, 1012U, 13436U, 3434U, 13919U, 7479U, |
| 7116 | 14324U, 15797U, 14809U, 1997U, 13715U, 5061U, 14210U, 8275U, |
| 7117 | 14489U, 17339U, 15137U, 1541U, 4079U, 7821U, 16702U, 1830U, |
| 7118 | 4576U, 8084U, 17074U, 2334U, 5862U, 8812U, 17758U, 2426U, |
| 7119 | 5911U, 8861U, 17807U, 15450U, 15439U, 1345U, 3867U, 7646U, |
| 7120 | 16480U, 1137U, 3778U, 7604U, 16170U, 2191U, 5501U, 8581U, |
| 7121 | 17654U, 1384U, 13632U, 3914U, 14003U, 7676U, 14406U, 16527U, |
| 7122 | 15023U, 1111U, 13471U, 3564U, 13948U, 7578U, 14359U, 16133U, |
| 7123 | 14968U, 1451U, 3979U, 7731U, 16592U, 15168U, 15971U, 13760U, |
| 7124 | 1243U, 14534U, 8657U, 1699U, 4247U, 7953U, 16900U, 1651U, |
| 7125 | 13652U, 4163U, 14023U, 7905U, 14426U, 16797U, 15043U, 2030U, |
| 7126 | 13724U, 5118U, 14219U, 8308U, 14498U, 17372U, 15146U, 1366U, |
| 7127 | 3898U, 7667U, 16511U, 7230U, 10682U, 16254U, 5557U, 7333U, |
| 7128 | 16357U, 5674U, 1550U, 4088U, 7830U, 16711U, 7281U, 10733U, |
| 7129 | 16305U, 5608U, 7380U, 16404U, 5721U, 1838U, 4777U, 8092U, |
| 7130 | 17082U, 870U, 3131U, 7137U, 15534U, 1501U, 4029U, 7781U, |
| 7131 | 16652U, 7255U, 10707U, 16279U, 5582U, 7356U, 16380U, 5697U, |
| 7132 | 1582U, 4120U, 7862U, 16743U, 7308U, 10760U, 16332U, 5635U, |
| 7133 | 7405U, 16429U, 5746U, 1889U, 4857U, 8143U, 17151U, 1727U, |
| 7134 | 4275U, 7981U, 16937U, 8330U, 7217U, 10783U, 10669U, 17403U, |
| 7135 | 16241U, 5339U, 5544U, 8388U, 7321U, 17461U, 16345U, 5397U, |
| 7136 | 5662U, 8358U, 7267U, 10811U, 10719U, 17431U, 16291U, 5367U, |
| 7137 | 5594U, 8414U, 7367U, 17487U, 16391U, 5423U, 5708U, 8344U, |
| 7138 | 7242U, 10797U, 10694U, 17417U, 16266U, 5353U, 5569U, 8401U, |
| 7139 | 7344U, 17474U, 16368U, 5410U, 5685U, 8373U, 7294U, 10826U, |
| 7140 | 10746U, 17446U, 16318U, 5382U, 5621U, 8428U, 7392U, 17501U, |
| 7141 | 16416U, 5437U, 5733U, 933U, 13426U, 3313U, 13899U, 7200U, |
| 7142 | 14314U, 15665U, 14789U, 13362U, 1771U, 4410U, 8025U, 16994U, |
| 7143 | 18092U, 13612U, 13983U, 14386U, 15003U, 16007U, 14901U, 1256U, |
| 7144 | 13555U, 4700U, 14128U, 8678U, 14657U, 15894U, 14844U, 1179U, |
| 7145 | 13498U, 4625U, 14071U, 8593U, 14600U, 942U, 3322U, 7209U, |
| 7146 | 10648U, 15674U, 1609U, 15431U, |
| 7147 | }; |
| 7148 | |
| 7149 | static inline void InitLoongArchMCInstrInfo(MCInstrInfo *II) { |
| 7150 | II->InitMCInstrInfo(LoongArchDescs.Insts, LoongArchInstrNameIndices, LoongArchInstrNameData, nullptr, nullptr, 2500, nullptr, 0); |
| 7151 | } |
| 7152 | |
| 7153 | |
| 7154 | } // namespace llvm |
| 7155 | |
| 7156 | #endif // GET_INSTRINFO_MC_DESC |
| 7157 | |
| 7158 | #ifdef GET_INSTRINFO_HEADER |
| 7159 | #undef GET_INSTRINFO_HEADER |
| 7160 | |
| 7161 | namespace llvm { |
| 7162 | |
| 7163 | struct LoongArchGenInstrInfo : public TargetInstrInfo { |
| 7164 | explicit LoongArchGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u); |
| 7165 | ~LoongArchGenInstrInfo() override = default; |
| 7166 | }; |
| 7167 | |
| 7168 | } // namespace llvm |
| 7169 | |
| 7170 | namespace llvm::LoongArch { |
| 7171 | |
| 7172 | |
| 7173 | } // namespace llvm::LoongArch |
| 7174 | |
| 7175 | #endif // GET_INSTRINFO_HEADER |
| 7176 | |
| 7177 | #ifdef GET_INSTRINFO_HELPER_DECLS |
| 7178 | #undef GET_INSTRINFO_HELPER_DECLS |
| 7179 | |
| 7180 | |
| 7181 | #endif // GET_INSTRINFO_HELPER_DECLS |
| 7182 | |
| 7183 | #ifdef GET_INSTRINFO_HELPERS |
| 7184 | #undef GET_INSTRINFO_HELPERS |
| 7185 | |
| 7186 | |
| 7187 | #endif // GET_INSTRINFO_HELPERS |
| 7188 | |
| 7189 | #ifdef GET_INSTRINFO_CTOR_DTOR |
| 7190 | #undef GET_INSTRINFO_CTOR_DTOR |
| 7191 | |
| 7192 | namespace llvm { |
| 7193 | |
| 7194 | extern const LoongArchInstrTable LoongArchDescs; |
| 7195 | extern const unsigned LoongArchInstrNameIndices[]; |
| 7196 | extern const char LoongArchInstrNameData[]; |
| 7197 | LoongArchGenInstrInfo::LoongArchGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode) |
| 7198 | : TargetInstrInfo(TRI, CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { |
| 7199 | InitMCInstrInfo(LoongArchDescs.Insts, LoongArchInstrNameIndices, LoongArchInstrNameData, nullptr, nullptr, 2500); |
| 7200 | } |
| 7201 | |
| 7202 | } // namespace llvm |
| 7203 | |
| 7204 | #endif // GET_INSTRINFO_CTOR_DTOR |
| 7205 | |
| 7206 | #ifdef GET_INSTRINFO_MC_HELPER_DECLS |
| 7207 | #undef GET_INSTRINFO_MC_HELPER_DECLS |
| 7208 | |
| 7209 | namespace llvm { |
| 7210 | |
| 7211 | class MCInst; |
| 7212 | class FeatureBitset; |
| 7213 | |
| 7214 | namespace LoongArch_MC { |
| 7215 | |
| 7216 | void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features); |
| 7217 | |
| 7218 | } // namespace LoongArch_MC |
| 7219 | |
| 7220 | } // namespace llvm |
| 7221 | |
| 7222 | #endif // GET_INSTRINFO_MC_HELPER_DECLS |
| 7223 | |
| 7224 | #ifdef GET_INSTRINFO_MC_HELPERS |
| 7225 | #undef GET_INSTRINFO_MC_HELPERS |
| 7226 | |
| 7227 | namespace llvm::LoongArch_MC { |
| 7228 | |
| 7229 | |
| 7230 | } // namespace llvm::LoongArch_MC |
| 7231 | |
| 7232 | #endif // GET_INSTRINFO_MC_HELPERS |
| 7233 | |
| 7234 | #if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\ |
| 7235 | defined(GET_AVAILABLE_OPCODE_CHECKER) |
| 7236 | #define GET_COMPUTE_FEATURES |
| 7237 | #endif |
| 7238 | #ifdef GET_COMPUTE_FEATURES |
| 7239 | #undef GET_COMPUTE_FEATURES |
| 7240 | |
| 7241 | namespace llvm::LoongArch_MC { |
| 7242 | |
| 7243 | // Bits for subtarget features that participate in instruction matching. |
| 7244 | enum SubtargetFeatureBits : uint8_t { |
| 7245 | Feature_IsLA64Bit = 4, |
| 7246 | Feature_IsLA32Bit = 3, |
| 7247 | Feature_HasLaGlobalWithPcrelBit = 1, |
| 7248 | Feature_HasLaGlobalWithAbsBit = 0, |
| 7249 | Feature_HasLaLocalWithAbsBit = 2, |
| 7250 | }; |
| 7251 | |
| 7252 | inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) { |
| 7253 | FeatureBitset Features; |
| 7254 | if (FB[LoongArch::Feature64Bit]) |
| 7255 | Features.set(Feature_IsLA64Bit); |
| 7256 | if (!(FB[LoongArch::Feature64Bit])) |
| 7257 | Features.set(Feature_IsLA32Bit); |
| 7258 | if (FB[LoongArch::LaGlobalWithPcrel]) |
| 7259 | Features.set(Feature_HasLaGlobalWithPcrelBit); |
| 7260 | if (FB[LoongArch::LaGlobalWithAbs]) |
| 7261 | Features.set(Feature_HasLaGlobalWithAbsBit); |
| 7262 | if (FB[LoongArch::LaLocalWithAbs]) |
| 7263 | Features.set(Feature_HasLaLocalWithAbsBit); |
| 7264 | return Features; |
| 7265 | } |
| 7266 | |
| 7267 | inline FeatureBitset computeRequiredFeatures(unsigned Opcode) { |
| 7268 | enum : uint8_t { |
| 7269 | CEFBS_None, |
| 7270 | CEFBS_IsLA32, |
| 7271 | CEFBS_IsLA64, |
| 7272 | }; |
| 7273 | |
| 7274 | static constexpr FeatureBitset FeatureBitsets[] = { |
| 7275 | {}, // CEFBS_None |
| 7276 | {Feature_IsLA32Bit, }, |
| 7277 | {Feature_IsLA64Bit, }, |
| 7278 | }; |
| 7279 | static constexpr uint8_t RequiredFeaturesRefs[] = { |
| 7280 | CEFBS_None, // PHI |
| 7281 | CEFBS_None, // INLINEASM |
| 7282 | CEFBS_None, // INLINEASM_BR |
| 7283 | CEFBS_None, // CFI_INSTRUCTION |
| 7284 | CEFBS_None, // EH_LABEL |
| 7285 | CEFBS_None, // GC_LABEL |
| 7286 | CEFBS_None, // ANNOTATION_LABEL |
| 7287 | CEFBS_None, // KILL |
| 7288 | CEFBS_None, // EXTRACT_SUBREG |
| 7289 | CEFBS_None, // INSERT_SUBREG |
| 7290 | CEFBS_None, // IMPLICIT_DEF |
| 7291 | CEFBS_None, // INIT_UNDEF |
| 7292 | CEFBS_None, // SUBREG_TO_REG |
| 7293 | CEFBS_None, // COPY_TO_REGCLASS |
| 7294 | CEFBS_None, // DBG_VALUE |
| 7295 | CEFBS_None, // DBG_VALUE_LIST |
| 7296 | CEFBS_None, // DBG_INSTR_REF |
| 7297 | CEFBS_None, // DBG_PHI |
| 7298 | CEFBS_None, // DBG_LABEL |
| 7299 | CEFBS_None, // REG_SEQUENCE |
| 7300 | CEFBS_None, // COPY |
| 7301 | CEFBS_None, // COPY_LANEMASK |
| 7302 | CEFBS_None, // BUNDLE |
| 7303 | CEFBS_None, // LIFETIME_START |
| 7304 | CEFBS_None, // LIFETIME_END |
| 7305 | CEFBS_None, // PSEUDO_PROBE |
| 7306 | CEFBS_None, // ARITH_FENCE |
| 7307 | CEFBS_None, // STACKMAP |
| 7308 | CEFBS_None, // FENTRY_CALL |
| 7309 | CEFBS_None, // PATCHPOINT |
| 7310 | CEFBS_None, // LOAD_STACK_GUARD |
| 7311 | CEFBS_None, // PREALLOCATED_SETUP |
| 7312 | CEFBS_None, // PREALLOCATED_ARG |
| 7313 | CEFBS_None, // STATEPOINT |
| 7314 | CEFBS_None, // LOCAL_ESCAPE |
| 7315 | CEFBS_None, // FAULTING_OP |
| 7316 | CEFBS_None, // PATCHABLE_OP |
| 7317 | CEFBS_None, // PATCHABLE_FUNCTION_ENTER |
| 7318 | CEFBS_None, // PATCHABLE_RET |
| 7319 | CEFBS_None, // PATCHABLE_FUNCTION_EXIT |
| 7320 | CEFBS_None, // PATCHABLE_TAIL_CALL |
| 7321 | CEFBS_None, // PATCHABLE_EVENT_CALL |
| 7322 | CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL |
| 7323 | CEFBS_None, // ICALL_BRANCH_FUNNEL |
| 7324 | CEFBS_None, // FAKE_USE |
| 7325 | CEFBS_None, // MEMBARRIER |
| 7326 | CEFBS_None, // JUMP_TABLE_DEBUG_INFO |
| 7327 | CEFBS_None, // RELOC_NONE |
| 7328 | CEFBS_None, // CONVERGENCECTRL_ENTRY |
| 7329 | CEFBS_None, // CONVERGENCECTRL_ANCHOR |
| 7330 | CEFBS_None, // CONVERGENCECTRL_LOOP |
| 7331 | CEFBS_None, // CONVERGENCECTRL_GLUE |
| 7332 | CEFBS_None, // G_ASSERT_SEXT |
| 7333 | CEFBS_None, // G_ASSERT_ZEXT |
| 7334 | CEFBS_None, // G_ASSERT_ALIGN |
| 7335 | CEFBS_None, // G_ADD |
| 7336 | CEFBS_None, // G_SUB |
| 7337 | CEFBS_None, // G_MUL |
| 7338 | CEFBS_None, // G_SDIV |
| 7339 | CEFBS_None, // G_UDIV |
| 7340 | CEFBS_None, // G_SREM |
| 7341 | CEFBS_None, // G_UREM |
| 7342 | CEFBS_None, // G_SDIVREM |
| 7343 | CEFBS_None, // G_UDIVREM |
| 7344 | CEFBS_None, // G_AND |
| 7345 | CEFBS_None, // G_OR |
| 7346 | CEFBS_None, // G_XOR |
| 7347 | CEFBS_None, // G_ABDS |
| 7348 | CEFBS_None, // G_ABDU |
| 7349 | CEFBS_None, // G_UAVGFLOOR |
| 7350 | CEFBS_None, // G_UAVGCEIL |
| 7351 | CEFBS_None, // G_SAVGFLOOR |
| 7352 | CEFBS_None, // G_SAVGCEIL |
| 7353 | CEFBS_None, // G_IMPLICIT_DEF |
| 7354 | CEFBS_None, // G_PHI |
| 7355 | CEFBS_None, // G_FRAME_INDEX |
| 7356 | CEFBS_None, // G_GLOBAL_VALUE |
| 7357 | CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE |
| 7358 | CEFBS_None, // G_CONSTANT_POOL |
| 7359 | CEFBS_None, // G_EXTRACT |
| 7360 | CEFBS_None, // G_UNMERGE_VALUES |
| 7361 | CEFBS_None, // G_INSERT |
| 7362 | CEFBS_None, // G_MERGE_VALUES |
| 7363 | CEFBS_None, // G_BUILD_VECTOR |
| 7364 | CEFBS_None, // G_BUILD_VECTOR_TRUNC |
| 7365 | CEFBS_None, // G_CONCAT_VECTORS |
| 7366 | CEFBS_None, // G_PTRTOINT |
| 7367 | CEFBS_None, // G_INTTOPTR |
| 7368 | CEFBS_None, // G_BITCAST |
| 7369 | CEFBS_None, // G_FREEZE |
| 7370 | CEFBS_None, // G_CONSTANT_FOLD_BARRIER |
| 7371 | CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND |
| 7372 | CEFBS_None, // G_INTRINSIC_TRUNC |
| 7373 | CEFBS_None, // G_INTRINSIC_ROUND |
| 7374 | CEFBS_None, // G_INTRINSIC_LRINT |
| 7375 | CEFBS_None, // G_INTRINSIC_LLRINT |
| 7376 | CEFBS_None, // G_INTRINSIC_ROUNDEVEN |
| 7377 | CEFBS_None, // G_READCYCLECOUNTER |
| 7378 | CEFBS_None, // G_READSTEADYCOUNTER |
| 7379 | CEFBS_None, // G_LOAD |
| 7380 | CEFBS_None, // G_SEXTLOAD |
| 7381 | CEFBS_None, // G_ZEXTLOAD |
| 7382 | CEFBS_None, // G_FPEXTLOAD |
| 7383 | CEFBS_None, // G_INDEXED_LOAD |
| 7384 | CEFBS_None, // G_INDEXED_SEXTLOAD |
| 7385 | CEFBS_None, // G_INDEXED_ZEXTLOAD |
| 7386 | CEFBS_None, // G_STORE |
| 7387 | CEFBS_None, // G_FPTRUNCSTORE |
| 7388 | CEFBS_None, // G_INDEXED_STORE |
| 7389 | CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
| 7390 | CEFBS_None, // G_ATOMIC_CMPXCHG |
| 7391 | CEFBS_None, // G_ATOMICRMW_XCHG |
| 7392 | CEFBS_None, // G_ATOMICRMW_ADD |
| 7393 | CEFBS_None, // G_ATOMICRMW_SUB |
| 7394 | CEFBS_None, // G_ATOMICRMW_AND |
| 7395 | CEFBS_None, // G_ATOMICRMW_NAND |
| 7396 | CEFBS_None, // G_ATOMICRMW_OR |
| 7397 | CEFBS_None, // G_ATOMICRMW_XOR |
| 7398 | CEFBS_None, // G_ATOMICRMW_MAX |
| 7399 | CEFBS_None, // G_ATOMICRMW_MIN |
| 7400 | CEFBS_None, // G_ATOMICRMW_UMAX |
| 7401 | CEFBS_None, // G_ATOMICRMW_UMIN |
| 7402 | CEFBS_None, // G_ATOMICRMW_FADD |
| 7403 | CEFBS_None, // G_ATOMICRMW_FSUB |
| 7404 | CEFBS_None, // G_ATOMICRMW_FMAX |
| 7405 | CEFBS_None, // G_ATOMICRMW_FMIN |
| 7406 | CEFBS_None, // G_ATOMICRMW_FMAXIMUM |
| 7407 | CEFBS_None, // G_ATOMICRMW_FMINIMUM |
| 7408 | CEFBS_None, // G_ATOMICRMW_FMAXIMUMNUM |
| 7409 | CEFBS_None, // G_ATOMICRMW_FMINIMUMNUM |
| 7410 | CEFBS_None, // G_ATOMICRMW_UINC_WRAP |
| 7411 | CEFBS_None, // G_ATOMICRMW_UDEC_WRAP |
| 7412 | CEFBS_None, // G_ATOMICRMW_USUB_COND |
| 7413 | CEFBS_None, // G_ATOMICRMW_USUB_SAT |
| 7414 | CEFBS_None, // G_FENCE |
| 7415 | CEFBS_None, // G_PREFETCH |
| 7416 | CEFBS_None, // G_BRCOND |
| 7417 | CEFBS_None, // G_BRINDIRECT |
| 7418 | CEFBS_None, // G_INVOKE_REGION_START |
| 7419 | CEFBS_None, // G_INTRINSIC |
| 7420 | CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS |
| 7421 | CEFBS_None, // G_INTRINSIC_CONVERGENT |
| 7422 | CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
| 7423 | CEFBS_None, // G_ANYEXT |
| 7424 | CEFBS_None, // G_TRUNC |
| 7425 | CEFBS_None, // G_TRUNC_SSAT_S |
| 7426 | CEFBS_None, // G_TRUNC_SSAT_U |
| 7427 | CEFBS_None, // G_TRUNC_USAT_U |
| 7428 | CEFBS_None, // G_CONSTANT |
| 7429 | CEFBS_None, // G_FCONSTANT |
| 7430 | CEFBS_None, // G_VASTART |
| 7431 | CEFBS_None, // G_VAARG |
| 7432 | CEFBS_None, // G_SEXT |
| 7433 | CEFBS_None, // G_SEXT_INREG |
| 7434 | CEFBS_None, // G_ZEXT |
| 7435 | CEFBS_None, // G_SHL |
| 7436 | CEFBS_None, // G_LSHR |
| 7437 | CEFBS_None, // G_ASHR |
| 7438 | CEFBS_None, // G_FSHL |
| 7439 | CEFBS_None, // G_FSHR |
| 7440 | CEFBS_None, // G_ROTR |
| 7441 | CEFBS_None, // G_ROTL |
| 7442 | CEFBS_None, // G_ICMP |
| 7443 | CEFBS_None, // G_FCMP |
| 7444 | CEFBS_None, // G_SCMP |
| 7445 | CEFBS_None, // G_UCMP |
| 7446 | CEFBS_None, // G_SELECT |
| 7447 | CEFBS_None, // G_UADDO |
| 7448 | CEFBS_None, // G_UADDE |
| 7449 | CEFBS_None, // G_USUBO |
| 7450 | CEFBS_None, // G_USUBE |
| 7451 | CEFBS_None, // G_SADDO |
| 7452 | CEFBS_None, // G_SADDE |
| 7453 | CEFBS_None, // G_SSUBO |
| 7454 | CEFBS_None, // G_SSUBE |
| 7455 | CEFBS_None, // G_UMULO |
| 7456 | CEFBS_None, // G_SMULO |
| 7457 | CEFBS_None, // G_UMULH |
| 7458 | CEFBS_None, // G_SMULH |
| 7459 | CEFBS_None, // G_UADDSAT |
| 7460 | CEFBS_None, // G_SADDSAT |
| 7461 | CEFBS_None, // G_USUBSAT |
| 7462 | CEFBS_None, // G_SSUBSAT |
| 7463 | CEFBS_None, // G_USHLSAT |
| 7464 | CEFBS_None, // G_SSHLSAT |
| 7465 | CEFBS_None, // G_SMULFIX |
| 7466 | CEFBS_None, // G_UMULFIX |
| 7467 | CEFBS_None, // G_SMULFIXSAT |
| 7468 | CEFBS_None, // G_UMULFIXSAT |
| 7469 | CEFBS_None, // G_SDIVFIX |
| 7470 | CEFBS_None, // G_UDIVFIX |
| 7471 | CEFBS_None, // G_SDIVFIXSAT |
| 7472 | CEFBS_None, // G_UDIVFIXSAT |
| 7473 | CEFBS_None, // G_FADD |
| 7474 | CEFBS_None, // G_FSUB |
| 7475 | CEFBS_None, // G_FMUL |
| 7476 | CEFBS_None, // G_FMA |
| 7477 | CEFBS_None, // G_FMAD |
| 7478 | CEFBS_None, // G_FDIV |
| 7479 | CEFBS_None, // G_FREM |
| 7480 | CEFBS_None, // G_FMODF |
| 7481 | CEFBS_None, // G_FPOW |
| 7482 | CEFBS_None, // G_FPOWI |
| 7483 | CEFBS_None, // G_FEXP |
| 7484 | CEFBS_None, // G_FEXP2 |
| 7485 | CEFBS_None, // G_FEXP10 |
| 7486 | CEFBS_None, // G_FLOG |
| 7487 | CEFBS_None, // G_FLOG2 |
| 7488 | CEFBS_None, // G_FLOG10 |
| 7489 | CEFBS_None, // G_FLDEXP |
| 7490 | CEFBS_None, // G_FFREXP |
| 7491 | CEFBS_None, // G_FNEG |
| 7492 | CEFBS_None, // G_FPEXT |
| 7493 | CEFBS_None, // G_FPTRUNC |
| 7494 | CEFBS_None, // G_FPTOSI |
| 7495 | CEFBS_None, // G_FPTOUI |
| 7496 | CEFBS_None, // G_SITOFP |
| 7497 | CEFBS_None, // G_UITOFP |
| 7498 | CEFBS_None, // G_FPTOSI_SAT |
| 7499 | CEFBS_None, // G_FPTOUI_SAT |
| 7500 | CEFBS_None, // G_FABS |
| 7501 | CEFBS_None, // G_FCOPYSIGN |
| 7502 | CEFBS_None, // G_IS_FPCLASS |
| 7503 | CEFBS_None, // G_FCANONICALIZE |
| 7504 | CEFBS_None, // G_FMINNUM |
| 7505 | CEFBS_None, // G_FMAXNUM |
| 7506 | CEFBS_None, // G_FMINNUM_IEEE |
| 7507 | CEFBS_None, // G_FMAXNUM_IEEE |
| 7508 | CEFBS_None, // G_FMINIMUM |
| 7509 | CEFBS_None, // G_FMAXIMUM |
| 7510 | CEFBS_None, // G_FMINIMUMNUM |
| 7511 | CEFBS_None, // G_FMAXIMUMNUM |
| 7512 | CEFBS_None, // G_GET_FPENV |
| 7513 | CEFBS_None, // G_SET_FPENV |
| 7514 | CEFBS_None, // G_RESET_FPENV |
| 7515 | CEFBS_None, // G_GET_FPMODE |
| 7516 | CEFBS_None, // G_SET_FPMODE |
| 7517 | CEFBS_None, // G_RESET_FPMODE |
| 7518 | CEFBS_None, // G_GET_ROUNDING |
| 7519 | CEFBS_None, // G_SET_ROUNDING |
| 7520 | CEFBS_None, // G_PTR_ADD |
| 7521 | CEFBS_None, // G_PTRMASK |
| 7522 | CEFBS_None, // G_SMIN |
| 7523 | CEFBS_None, // G_SMAX |
| 7524 | CEFBS_None, // G_UMIN |
| 7525 | CEFBS_None, // G_UMAX |
| 7526 | CEFBS_None, // G_ABS |
| 7527 | CEFBS_None, // G_LROUND |
| 7528 | CEFBS_None, // G_LLROUND |
| 7529 | CEFBS_None, // G_BR |
| 7530 | CEFBS_None, // G_BRJT |
| 7531 | CEFBS_None, // G_VSCALE |
| 7532 | CEFBS_None, // G_INSERT_SUBVECTOR |
| 7533 | CEFBS_None, // G_EXTRACT_SUBVECTOR |
| 7534 | CEFBS_None, // G_INSERT_VECTOR_ELT |
| 7535 | CEFBS_None, // G_EXTRACT_VECTOR_ELT |
| 7536 | CEFBS_None, // G_SHUFFLE_VECTOR |
| 7537 | CEFBS_None, // G_SPLAT_VECTOR |
| 7538 | CEFBS_None, // G_STEP_VECTOR |
| 7539 | CEFBS_None, // G_VECTOR_COMPRESS |
| 7540 | CEFBS_None, // G_CTTZ |
| 7541 | CEFBS_None, // G_CTTZ_ZERO_POISON |
| 7542 | CEFBS_None, // G_CTLZ |
| 7543 | CEFBS_None, // G_CTLZ_ZERO_POISON |
| 7544 | CEFBS_None, // G_CTLS |
| 7545 | CEFBS_None, // G_CTPOP |
| 7546 | CEFBS_None, // G_BSWAP |
| 7547 | CEFBS_None, // G_BITREVERSE |
| 7548 | CEFBS_None, // G_CLMUL |
| 7549 | CEFBS_None, // G_FCEIL |
| 7550 | CEFBS_None, // G_FCOS |
| 7551 | CEFBS_None, // G_FSIN |
| 7552 | CEFBS_None, // G_FSINCOS |
| 7553 | CEFBS_None, // G_FTAN |
| 7554 | CEFBS_None, // G_FACOS |
| 7555 | CEFBS_None, // G_FASIN |
| 7556 | CEFBS_None, // G_FATAN |
| 7557 | CEFBS_None, // G_FATAN2 |
| 7558 | CEFBS_None, // G_FCOSH |
| 7559 | CEFBS_None, // G_FSINH |
| 7560 | CEFBS_None, // G_FTANH |
| 7561 | CEFBS_None, // G_FSQRT |
| 7562 | CEFBS_None, // G_FFLOOR |
| 7563 | CEFBS_None, // G_FRINT |
| 7564 | CEFBS_None, // G_FNEARBYINT |
| 7565 | CEFBS_None, // G_ADDRSPACE_CAST |
| 7566 | CEFBS_None, // G_BLOCK_ADDR |
| 7567 | CEFBS_None, // G_JUMP_TABLE |
| 7568 | CEFBS_None, // G_DYN_STACKALLOC |
| 7569 | CEFBS_None, // G_STACKSAVE |
| 7570 | CEFBS_None, // G_STACKRESTORE |
| 7571 | CEFBS_None, // G_STRICT_FADD |
| 7572 | CEFBS_None, // G_STRICT_FSUB |
| 7573 | CEFBS_None, // G_STRICT_FMUL |
| 7574 | CEFBS_None, // G_STRICT_FDIV |
| 7575 | CEFBS_None, // G_STRICT_FREM |
| 7576 | CEFBS_None, // G_STRICT_FMA |
| 7577 | CEFBS_None, // G_STRICT_FSQRT |
| 7578 | CEFBS_None, // G_STRICT_FLDEXP |
| 7579 | CEFBS_None, // G_STRICT_FCMP |
| 7580 | CEFBS_None, // G_STRICT_FCMPS |
| 7581 | CEFBS_None, // G_READ_REGISTER |
| 7582 | CEFBS_None, // G_WRITE_REGISTER |
| 7583 | CEFBS_None, // G_MEMCPY |
| 7584 | CEFBS_None, // G_MEMCPY_INLINE |
| 7585 | CEFBS_None, // G_MEMMOVE |
| 7586 | CEFBS_None, // G_MEMSET |
| 7587 | CEFBS_None, // G_BZERO |
| 7588 | CEFBS_None, // G_MEMSET_INLINE |
| 7589 | CEFBS_None, // G_TRAP |
| 7590 | CEFBS_None, // G_DEBUGTRAP |
| 7591 | CEFBS_None, // G_UBSANTRAP |
| 7592 | CEFBS_None, // G_VECREDUCE_SEQ_FADD |
| 7593 | CEFBS_None, // G_VECREDUCE_SEQ_FMUL |
| 7594 | CEFBS_None, // G_VECREDUCE_FADD |
| 7595 | CEFBS_None, // G_VECREDUCE_FMUL |
| 7596 | CEFBS_None, // G_VECREDUCE_FMAX |
| 7597 | CEFBS_None, // G_VECREDUCE_FMIN |
| 7598 | CEFBS_None, // G_VECREDUCE_FMAXIMUM |
| 7599 | CEFBS_None, // G_VECREDUCE_FMINIMUM |
| 7600 | CEFBS_None, // G_VECREDUCE_FMAXIMUMNUM |
| 7601 | CEFBS_None, // G_VECREDUCE_FMINIMUMNUM |
| 7602 | CEFBS_None, // G_VECREDUCE_ADD |
| 7603 | CEFBS_None, // G_VECREDUCE_MUL |
| 7604 | CEFBS_None, // G_VECREDUCE_AND |
| 7605 | CEFBS_None, // G_VECREDUCE_OR |
| 7606 | CEFBS_None, // G_VECREDUCE_XOR |
| 7607 | CEFBS_None, // G_VECREDUCE_SMAX |
| 7608 | CEFBS_None, // G_VECREDUCE_SMIN |
| 7609 | CEFBS_None, // G_VECREDUCE_UMAX |
| 7610 | CEFBS_None, // G_VECREDUCE_UMIN |
| 7611 | CEFBS_None, // G_SBFX |
| 7612 | CEFBS_None, // G_UBFX |
| 7613 | CEFBS_None, // ADJCALLSTACKDOWN |
| 7614 | CEFBS_None, // ADJCALLSTACKUP |
| 7615 | CEFBS_IsLA32, // BuildPairF64Pseudo |
| 7616 | CEFBS_None, // PROBED_STACKALLOC |
| 7617 | CEFBS_None, // PROBED_STACKALLOC_DYN |
| 7618 | CEFBS_IsLA64, // PseudoAddTPRel_D |
| 7619 | CEFBS_IsLA32, // PseudoAddTPRel_W |
| 7620 | CEFBS_None, // PseudoAtomicLoadAdd32 |
| 7621 | CEFBS_None, // PseudoAtomicLoadAnd32 |
| 7622 | CEFBS_None, // PseudoAtomicLoadMax32 |
| 7623 | CEFBS_None, // PseudoAtomicLoadMin32 |
| 7624 | CEFBS_None, // PseudoAtomicLoadNand32 |
| 7625 | CEFBS_None, // PseudoAtomicLoadNand64 |
| 7626 | CEFBS_None, // PseudoAtomicLoadOr32 |
| 7627 | CEFBS_None, // PseudoAtomicLoadSub32 |
| 7628 | CEFBS_None, // PseudoAtomicLoadUMax32 |
| 7629 | CEFBS_None, // PseudoAtomicLoadUMin32 |
| 7630 | CEFBS_None, // PseudoAtomicLoadXor32 |
| 7631 | CEFBS_IsLA64, // PseudoAtomicStoreD |
| 7632 | CEFBS_None, // PseudoAtomicStoreW |
| 7633 | CEFBS_None, // PseudoAtomicSwap32 |
| 7634 | CEFBS_None, // PseudoBR |
| 7635 | CEFBS_None, // PseudoBRIND |
| 7636 | CEFBS_None, // PseudoB_TAIL |
| 7637 | CEFBS_None, // PseudoCALL |
| 7638 | CEFBS_None, // PseudoCALL30 |
| 7639 | CEFBS_IsLA64, // PseudoCALL36 |
| 7640 | CEFBS_None, // PseudoCALLIndirect |
| 7641 | CEFBS_None, // PseudoCALL_LARGE |
| 7642 | CEFBS_None, // PseudoCALL_MEDIUM |
| 7643 | CEFBS_None, // PseudoCALL_SMALL |
| 7644 | CEFBS_None, // PseudoCTPOP_B |
| 7645 | CEFBS_IsLA64, // PseudoCTPOP_D |
| 7646 | CEFBS_None, // PseudoCTPOP_H |
| 7647 | CEFBS_IsLA32, // PseudoCTPOP_H_LA32 |
| 7648 | CEFBS_IsLA64, // PseudoCTPOP_W |
| 7649 | CEFBS_IsLA32, // PseudoCTPOP_W_LA32 |
| 7650 | CEFBS_None, // PseudoCmpXchg128 |
| 7651 | CEFBS_None, // PseudoCmpXchg128Acquire |
| 7652 | CEFBS_None, // PseudoCmpXchg32 |
| 7653 | CEFBS_None, // PseudoCmpXchg64 |
| 7654 | CEFBS_None, // PseudoCopyCFR |
| 7655 | CEFBS_None, // PseudoDESC_CALL |
| 7656 | CEFBS_None, // PseudoJIRL_CALL |
| 7657 | CEFBS_None, // PseudoJIRL_TAIL |
| 7658 | CEFBS_None, // PseudoLA_ABS |
| 7659 | CEFBS_None, // PseudoLA_ABS_LARGE |
| 7660 | CEFBS_None, // PseudoLA_GOT |
| 7661 | CEFBS_IsLA64, // PseudoLA_GOT_LARGE |
| 7662 | CEFBS_None, // PseudoLA_PCREL |
| 7663 | CEFBS_IsLA64, // PseudoLA_PCREL_LARGE |
| 7664 | CEFBS_None, // PseudoLA_TLS_DESC |
| 7665 | CEFBS_IsLA64, // PseudoLA_TLS_DESC_LARGE |
| 7666 | CEFBS_None, // PseudoLA_TLS_GD |
| 7667 | CEFBS_IsLA64, // PseudoLA_TLS_GD_LARGE |
| 7668 | CEFBS_None, // PseudoLA_TLS_IE |
| 7669 | CEFBS_IsLA64, // PseudoLA_TLS_IE_LARGE |
| 7670 | CEFBS_None, // PseudoLA_TLS_LD |
| 7671 | CEFBS_IsLA64, // PseudoLA_TLS_LD_LARGE |
| 7672 | CEFBS_None, // PseudoLA_TLS_LE |
| 7673 | CEFBS_None, // PseudoLD_CFR |
| 7674 | CEFBS_IsLA64, // PseudoLI_D |
| 7675 | CEFBS_None, // PseudoLI_W |
| 7676 | CEFBS_None, // PseudoMaskedAtomicLoadAdd32 |
| 7677 | CEFBS_None, // PseudoMaskedAtomicLoadMax32 |
| 7678 | CEFBS_None, // PseudoMaskedAtomicLoadMin32 |
| 7679 | CEFBS_None, // PseudoMaskedAtomicLoadNand32 |
| 7680 | CEFBS_None, // PseudoMaskedAtomicLoadSub32 |
| 7681 | CEFBS_None, // PseudoMaskedAtomicLoadUMax32 |
| 7682 | CEFBS_None, // PseudoMaskedAtomicLoadUMin32 |
| 7683 | CEFBS_None, // PseudoMaskedAtomicSwap32 |
| 7684 | CEFBS_None, // PseudoMaskedCmpXchg32 |
| 7685 | CEFBS_None, // PseudoRET |
| 7686 | CEFBS_None, // PseudoST_CFR |
| 7687 | CEFBS_None, // PseudoTAIL |
| 7688 | CEFBS_None, // PseudoTAIL30 |
| 7689 | CEFBS_IsLA64, // PseudoTAIL36 |
| 7690 | CEFBS_None, // PseudoTAILIndirect |
| 7691 | CEFBS_None, // PseudoTAIL_LARGE |
| 7692 | CEFBS_None, // PseudoTAIL_MEDIUM |
| 7693 | CEFBS_None, // PseudoTAIL_SMALL |
| 7694 | CEFBS_None, // PseudoUNIMP |
| 7695 | CEFBS_None, // PseudoVBNZ |
| 7696 | CEFBS_None, // PseudoVBNZ_B |
| 7697 | CEFBS_None, // PseudoVBNZ_D |
| 7698 | CEFBS_None, // PseudoVBNZ_H |
| 7699 | CEFBS_None, // PseudoVBNZ_W |
| 7700 | CEFBS_None, // PseudoVBZ |
| 7701 | CEFBS_None, // PseudoVBZ_B |
| 7702 | CEFBS_None, // PseudoVBZ_D |
| 7703 | CEFBS_None, // PseudoVBZ_H |
| 7704 | CEFBS_None, // PseudoVBZ_W |
| 7705 | CEFBS_None, // PseudoVMSKEQZ_B |
| 7706 | CEFBS_None, // PseudoVMSKGEZ_B |
| 7707 | CEFBS_None, // PseudoVMSKLTZ_B |
| 7708 | CEFBS_None, // PseudoVMSKLTZ_D |
| 7709 | CEFBS_None, // PseudoVMSKLTZ_H |
| 7710 | CEFBS_None, // PseudoVMSKLTZ_W |
| 7711 | CEFBS_None, // PseudoVMSKNEZ_B |
| 7712 | CEFBS_None, // PseudoVREPLI_B |
| 7713 | CEFBS_None, // PseudoVREPLI_D |
| 7714 | CEFBS_None, // PseudoVREPLI_H |
| 7715 | CEFBS_None, // PseudoVREPLI_W |
| 7716 | CEFBS_None, // PseudoXVBNZ |
| 7717 | CEFBS_None, // PseudoXVBNZ_B |
| 7718 | CEFBS_None, // PseudoXVBNZ_D |
| 7719 | CEFBS_None, // PseudoXVBNZ_H |
| 7720 | CEFBS_None, // PseudoXVBNZ_W |
| 7721 | CEFBS_None, // PseudoXVBZ |
| 7722 | CEFBS_None, // PseudoXVBZ_B |
| 7723 | CEFBS_None, // PseudoXVBZ_D |
| 7724 | CEFBS_None, // PseudoXVBZ_H |
| 7725 | CEFBS_None, // PseudoXVBZ_W |
| 7726 | CEFBS_None, // PseudoXVINSGR2VR_B |
| 7727 | CEFBS_None, // PseudoXVINSGR2VR_H |
| 7728 | CEFBS_None, // PseudoXVMSKEQZ_B |
| 7729 | CEFBS_None, // PseudoXVMSKGEZ_B |
| 7730 | CEFBS_None, // PseudoXVMSKLTZ_B |
| 7731 | CEFBS_None, // PseudoXVMSKLTZ_D |
| 7732 | CEFBS_None, // PseudoXVMSKLTZ_H |
| 7733 | CEFBS_None, // PseudoXVMSKLTZ_W |
| 7734 | CEFBS_None, // PseudoXVMSKNEZ_B |
| 7735 | CEFBS_None, // PseudoXVREPLI_B |
| 7736 | CEFBS_None, // PseudoXVREPLI_D |
| 7737 | CEFBS_None, // PseudoXVREPLI_H |
| 7738 | CEFBS_None, // PseudoXVREPLI_W |
| 7739 | CEFBS_None, // RDFCSR |
| 7740 | CEFBS_None, // Select_GPR_Using_CC_GPR |
| 7741 | CEFBS_IsLA32, // SplitPairF64Pseudo |
| 7742 | CEFBS_None, // WRFCSR |
| 7743 | CEFBS_None, // ADC_B |
| 7744 | CEFBS_IsLA64, // ADC_D |
| 7745 | CEFBS_None, // ADC_H |
| 7746 | CEFBS_None, // ADC_W |
| 7747 | CEFBS_IsLA64, // ADDI_D |
| 7748 | CEFBS_None, // ADDI_W |
| 7749 | CEFBS_IsLA64, // ADDU12I_D |
| 7750 | CEFBS_None, // ADDU12I_W |
| 7751 | CEFBS_IsLA64, // ADDU16I_D |
| 7752 | CEFBS_IsLA64, // ADD_D |
| 7753 | CEFBS_None, // ADD_W |
| 7754 | CEFBS_IsLA64, // ALSL_D |
| 7755 | CEFBS_None, // ALSL_W |
| 7756 | CEFBS_IsLA64, // ALSL_WU |
| 7757 | CEFBS_IsLA64, // AMADD_B |
| 7758 | CEFBS_IsLA64, // AMADD_D |
| 7759 | CEFBS_IsLA64, // AMADD_H |
| 7760 | CEFBS_IsLA64, // AMADD_W |
| 7761 | CEFBS_IsLA64, // AMADD__DB_B |
| 7762 | CEFBS_IsLA64, // AMADD__DB_D |
| 7763 | CEFBS_IsLA64, // AMADD__DB_H |
| 7764 | CEFBS_IsLA64, // AMADD__DB_W |
| 7765 | CEFBS_IsLA64, // AMAND_D |
| 7766 | CEFBS_IsLA64, // AMAND_W |
| 7767 | CEFBS_IsLA64, // AMAND__DB_D |
| 7768 | CEFBS_IsLA64, // AMAND__DB_W |
| 7769 | CEFBS_IsLA64, // AMCAS_B |
| 7770 | CEFBS_IsLA64, // AMCAS_D |
| 7771 | CEFBS_IsLA64, // AMCAS_H |
| 7772 | CEFBS_IsLA64, // AMCAS_W |
| 7773 | CEFBS_IsLA64, // AMCAS__DB_B |
| 7774 | CEFBS_IsLA64, // AMCAS__DB_D |
| 7775 | CEFBS_IsLA64, // AMCAS__DB_H |
| 7776 | CEFBS_IsLA64, // AMCAS__DB_W |
| 7777 | CEFBS_IsLA64, // AMMAX_D |
| 7778 | CEFBS_IsLA64, // AMMAX_DU |
| 7779 | CEFBS_IsLA64, // AMMAX_W |
| 7780 | CEFBS_IsLA64, // AMMAX_WU |
| 7781 | CEFBS_IsLA64, // AMMAX__DB_D |
| 7782 | CEFBS_IsLA64, // AMMAX__DB_DU |
| 7783 | CEFBS_IsLA64, // AMMAX__DB_W |
| 7784 | CEFBS_IsLA64, // AMMAX__DB_WU |
| 7785 | CEFBS_IsLA64, // AMMIN_D |
| 7786 | CEFBS_IsLA64, // AMMIN_DU |
| 7787 | CEFBS_IsLA64, // AMMIN_W |
| 7788 | CEFBS_IsLA64, // AMMIN_WU |
| 7789 | CEFBS_IsLA64, // AMMIN__DB_D |
| 7790 | CEFBS_IsLA64, // AMMIN__DB_DU |
| 7791 | CEFBS_IsLA64, // AMMIN__DB_W |
| 7792 | CEFBS_IsLA64, // AMMIN__DB_WU |
| 7793 | CEFBS_IsLA64, // AMOR_D |
| 7794 | CEFBS_IsLA64, // AMOR_W |
| 7795 | CEFBS_IsLA64, // AMOR__DB_D |
| 7796 | CEFBS_IsLA64, // AMOR__DB_W |
| 7797 | CEFBS_IsLA64, // AMSWAP_B |
| 7798 | CEFBS_IsLA64, // AMSWAP_D |
| 7799 | CEFBS_IsLA64, // AMSWAP_H |
| 7800 | CEFBS_IsLA64, // AMSWAP_W |
| 7801 | CEFBS_IsLA64, // AMSWAP__DB_B |
| 7802 | CEFBS_IsLA64, // AMSWAP__DB_D |
| 7803 | CEFBS_IsLA64, // AMSWAP__DB_H |
| 7804 | CEFBS_IsLA64, // AMSWAP__DB_W |
| 7805 | CEFBS_IsLA64, // AMXOR_D |
| 7806 | CEFBS_IsLA64, // AMXOR_W |
| 7807 | CEFBS_IsLA64, // AMXOR__DB_D |
| 7808 | CEFBS_IsLA64, // AMXOR__DB_W |
| 7809 | CEFBS_None, // AND |
| 7810 | CEFBS_None, // ANDI |
| 7811 | CEFBS_None, // ANDN |
| 7812 | CEFBS_None, // ARMADC_W |
| 7813 | CEFBS_None, // ARMADD_W |
| 7814 | CEFBS_None, // ARMAND_W |
| 7815 | CEFBS_None, // ARMMFFLAG |
| 7816 | CEFBS_None, // ARMMOVE |
| 7817 | CEFBS_IsLA64, // ARMMOV_D |
| 7818 | CEFBS_None, // ARMMOV_W |
| 7819 | CEFBS_None, // ARMMTFLAG |
| 7820 | CEFBS_None, // ARMNOT_W |
| 7821 | CEFBS_None, // ARMOR_W |
| 7822 | CEFBS_None, // ARMROTRI_W |
| 7823 | CEFBS_None, // ARMROTR_W |
| 7824 | CEFBS_None, // ARMRRX_W |
| 7825 | CEFBS_None, // ARMSBC_W |
| 7826 | CEFBS_None, // ARMSLLI_W |
| 7827 | CEFBS_None, // ARMSLL_W |
| 7828 | CEFBS_None, // ARMSRAI_W |
| 7829 | CEFBS_None, // ARMSRA_W |
| 7830 | CEFBS_None, // ARMSRLI_W |
| 7831 | CEFBS_None, // ARMSRL_W |
| 7832 | CEFBS_None, // ARMSUB_W |
| 7833 | CEFBS_None, // ARMXOR_W |
| 7834 | CEFBS_IsLA64, // ASRTGT_D |
| 7835 | CEFBS_IsLA64, // ASRTLE_D |
| 7836 | CEFBS_None, // B |
| 7837 | CEFBS_None, // BCEQZ |
| 7838 | CEFBS_None, // BCNEZ |
| 7839 | CEFBS_None, // BEQ |
| 7840 | CEFBS_None, // BEQZ |
| 7841 | CEFBS_None, // BGE |
| 7842 | CEFBS_None, // BGEU |
| 7843 | CEFBS_None, // BITREV_4B |
| 7844 | CEFBS_IsLA64, // BITREV_8B |
| 7845 | CEFBS_IsLA64, // BITREV_D |
| 7846 | CEFBS_None, // BITREV_W |
| 7847 | CEFBS_None, // BL |
| 7848 | CEFBS_None, // BLT |
| 7849 | CEFBS_None, // BLTU |
| 7850 | CEFBS_None, // BNE |
| 7851 | CEFBS_None, // BNEZ |
| 7852 | CEFBS_None, // BREAK |
| 7853 | CEFBS_IsLA64, // BSTRINS_D |
| 7854 | CEFBS_None, // BSTRINS_W |
| 7855 | CEFBS_IsLA64, // BSTRPICK_D |
| 7856 | CEFBS_None, // BSTRPICK_W |
| 7857 | CEFBS_IsLA64, // BYTEPICK_D |
| 7858 | CEFBS_None, // BYTEPICK_W |
| 7859 | CEFBS_None, // CACOP |
| 7860 | CEFBS_IsLA64, // CLO_D |
| 7861 | CEFBS_None, // CLO_W |
| 7862 | CEFBS_IsLA64, // CLZ_D |
| 7863 | CEFBS_None, // CLZ_W |
| 7864 | CEFBS_None, // CPUCFG |
| 7865 | CEFBS_IsLA64, // CRCC_W_B_W |
| 7866 | CEFBS_IsLA64, // CRCC_W_D_W |
| 7867 | CEFBS_IsLA64, // CRCC_W_H_W |
| 7868 | CEFBS_IsLA64, // CRCC_W_W_W |
| 7869 | CEFBS_IsLA64, // CRC_W_B_W |
| 7870 | CEFBS_IsLA64, // CRC_W_D_W |
| 7871 | CEFBS_IsLA64, // CRC_W_H_W |
| 7872 | CEFBS_IsLA64, // CRC_W_W_W |
| 7873 | CEFBS_None, // CSRRD |
| 7874 | CEFBS_None, // CSRWR |
| 7875 | CEFBS_None, // CSRXCHG |
| 7876 | CEFBS_IsLA64, // CTO_D |
| 7877 | CEFBS_None, // CTO_W |
| 7878 | CEFBS_IsLA64, // CTZ_D |
| 7879 | CEFBS_None, // CTZ_W |
| 7880 | CEFBS_None, // DBAR |
| 7881 | CEFBS_None, // DBCL |
| 7882 | CEFBS_IsLA64, // DIV_D |
| 7883 | CEFBS_IsLA64, // DIV_DU |
| 7884 | CEFBS_None, // DIV_W |
| 7885 | CEFBS_None, // DIV_WU |
| 7886 | CEFBS_None, // ERTN |
| 7887 | CEFBS_None, // EXT_W_B |
| 7888 | CEFBS_None, // EXT_W_H |
| 7889 | CEFBS_None, // FABS_D |
| 7890 | CEFBS_None, // FABS_S |
| 7891 | CEFBS_None, // FADD_D |
| 7892 | CEFBS_None, // FADD_S |
| 7893 | CEFBS_None, // FCLASS_D |
| 7894 | CEFBS_None, // FCLASS_S |
| 7895 | CEFBS_None, // FCMP_CAF_D |
| 7896 | CEFBS_None, // FCMP_CAF_S |
| 7897 | CEFBS_None, // FCMP_CEQ_D |
| 7898 | CEFBS_None, // FCMP_CEQ_S |
| 7899 | CEFBS_None, // FCMP_CLE_D |
| 7900 | CEFBS_None, // FCMP_CLE_S |
| 7901 | CEFBS_None, // FCMP_CLT_D |
| 7902 | CEFBS_None, // FCMP_CLT_S |
| 7903 | CEFBS_None, // FCMP_CNE_D |
| 7904 | CEFBS_None, // FCMP_CNE_S |
| 7905 | CEFBS_None, // FCMP_COR_D |
| 7906 | CEFBS_None, // FCMP_COR_S |
| 7907 | CEFBS_None, // FCMP_CUEQ_D |
| 7908 | CEFBS_None, // FCMP_CUEQ_S |
| 7909 | CEFBS_None, // FCMP_CULE_D |
| 7910 | CEFBS_None, // FCMP_CULE_S |
| 7911 | CEFBS_None, // FCMP_CULT_D |
| 7912 | CEFBS_None, // FCMP_CULT_S |
| 7913 | CEFBS_None, // FCMP_CUNE_D |
| 7914 | CEFBS_None, // FCMP_CUNE_S |
| 7915 | CEFBS_None, // FCMP_CUN_D |
| 7916 | CEFBS_None, // FCMP_CUN_S |
| 7917 | CEFBS_None, // FCMP_SAF_D |
| 7918 | CEFBS_None, // FCMP_SAF_S |
| 7919 | CEFBS_None, // FCMP_SEQ_D |
| 7920 | CEFBS_None, // FCMP_SEQ_S |
| 7921 | CEFBS_None, // FCMP_SLE_D |
| 7922 | CEFBS_None, // FCMP_SLE_S |
| 7923 | CEFBS_None, // FCMP_SLT_D |
| 7924 | CEFBS_None, // FCMP_SLT_S |
| 7925 | CEFBS_None, // FCMP_SNE_D |
| 7926 | CEFBS_None, // FCMP_SNE_S |
| 7927 | CEFBS_None, // FCMP_SOR_D |
| 7928 | CEFBS_None, // FCMP_SOR_S |
| 7929 | CEFBS_None, // FCMP_SUEQ_D |
| 7930 | CEFBS_None, // FCMP_SUEQ_S |
| 7931 | CEFBS_None, // FCMP_SULE_D |
| 7932 | CEFBS_None, // FCMP_SULE_S |
| 7933 | CEFBS_None, // FCMP_SULT_D |
| 7934 | CEFBS_None, // FCMP_SULT_S |
| 7935 | CEFBS_None, // FCMP_SUNE_D |
| 7936 | CEFBS_None, // FCMP_SUNE_S |
| 7937 | CEFBS_None, // FCMP_SUN_D |
| 7938 | CEFBS_None, // FCMP_SUN_S |
| 7939 | CEFBS_None, // FCOPYSIGN_D |
| 7940 | CEFBS_None, // FCOPYSIGN_S |
| 7941 | CEFBS_None, // FCVT_D_LD |
| 7942 | CEFBS_None, // FCVT_D_S |
| 7943 | CEFBS_None, // FCVT_LD_D |
| 7944 | CEFBS_None, // FCVT_S_D |
| 7945 | CEFBS_None, // FCVT_UD_D |
| 7946 | CEFBS_None, // FDIV_D |
| 7947 | CEFBS_None, // FDIV_S |
| 7948 | CEFBS_None, // FFINT_D_L |
| 7949 | CEFBS_None, // FFINT_D_W |
| 7950 | CEFBS_None, // FFINT_S_L |
| 7951 | CEFBS_None, // FFINT_S_W |
| 7952 | CEFBS_None, // FLDGT_D |
| 7953 | CEFBS_None, // FLDGT_S |
| 7954 | CEFBS_None, // FLDLE_D |
| 7955 | CEFBS_None, // FLDLE_S |
| 7956 | CEFBS_None, // FLDX_D |
| 7957 | CEFBS_None, // FLDX_S |
| 7958 | CEFBS_None, // FLD_D |
| 7959 | CEFBS_None, // FLD_S |
| 7960 | CEFBS_None, // FLOGB_D |
| 7961 | CEFBS_None, // FLOGB_S |
| 7962 | CEFBS_None, // FMADD_D |
| 7963 | CEFBS_None, // FMADD_S |
| 7964 | CEFBS_None, // FMAXA_D |
| 7965 | CEFBS_None, // FMAXA_S |
| 7966 | CEFBS_None, // FMAX_D |
| 7967 | CEFBS_None, // FMAX_S |
| 7968 | CEFBS_None, // FMINA_D |
| 7969 | CEFBS_None, // FMINA_S |
| 7970 | CEFBS_None, // FMIN_D |
| 7971 | CEFBS_None, // FMIN_S |
| 7972 | CEFBS_None, // FMOV_D |
| 7973 | CEFBS_None, // FMOV_S |
| 7974 | CEFBS_None, // FMSUB_D |
| 7975 | CEFBS_None, // FMSUB_S |
| 7976 | CEFBS_None, // FMUL_D |
| 7977 | CEFBS_None, // FMUL_S |
| 7978 | CEFBS_None, // FNEG_D |
| 7979 | CEFBS_None, // FNEG_S |
| 7980 | CEFBS_None, // FNMADD_D |
| 7981 | CEFBS_None, // FNMADD_S |
| 7982 | CEFBS_None, // FNMSUB_D |
| 7983 | CEFBS_None, // FNMSUB_S |
| 7984 | CEFBS_None, // FRECIPE_D |
| 7985 | CEFBS_None, // FRECIPE_S |
| 7986 | CEFBS_None, // FRECIP_D |
| 7987 | CEFBS_None, // FRECIP_S |
| 7988 | CEFBS_None, // FRINT_D |
| 7989 | CEFBS_None, // FRINT_S |
| 7990 | CEFBS_None, // FRSQRTE_D |
| 7991 | CEFBS_None, // FRSQRTE_S |
| 7992 | CEFBS_None, // FRSQRT_D |
| 7993 | CEFBS_None, // FRSQRT_S |
| 7994 | CEFBS_None, // FSCALEB_D |
| 7995 | CEFBS_None, // FSCALEB_S |
| 7996 | CEFBS_None, // FSEL_xD |
| 7997 | CEFBS_None, // FSEL_xS |
| 7998 | CEFBS_None, // FSQRT_D |
| 7999 | CEFBS_None, // FSQRT_S |
| 8000 | CEFBS_None, // FSTGT_D |
| 8001 | CEFBS_None, // FSTGT_S |
| 8002 | CEFBS_None, // FSTLE_D |
| 8003 | CEFBS_None, // FSTLE_S |
| 8004 | CEFBS_None, // FSTX_D |
| 8005 | CEFBS_None, // FSTX_S |
| 8006 | CEFBS_None, // FST_D |
| 8007 | CEFBS_None, // FST_S |
| 8008 | CEFBS_None, // FSUB_D |
| 8009 | CEFBS_None, // FSUB_S |
| 8010 | CEFBS_None, // FTINTRM_L_D |
| 8011 | CEFBS_None, // FTINTRM_L_S |
| 8012 | CEFBS_None, // FTINTRM_W_D |
| 8013 | CEFBS_None, // FTINTRM_W_S |
| 8014 | CEFBS_None, // FTINTRNE_L_D |
| 8015 | CEFBS_None, // FTINTRNE_L_S |
| 8016 | CEFBS_None, // FTINTRNE_W_D |
| 8017 | CEFBS_None, // FTINTRNE_W_S |
| 8018 | CEFBS_None, // FTINTRP_L_D |
| 8019 | CEFBS_None, // FTINTRP_L_S |
| 8020 | CEFBS_None, // FTINTRP_W_D |
| 8021 | CEFBS_None, // FTINTRP_W_S |
| 8022 | CEFBS_None, // FTINTRZ_L_D |
| 8023 | CEFBS_None, // FTINTRZ_L_S |
| 8024 | CEFBS_None, // FTINTRZ_W_D |
| 8025 | CEFBS_None, // FTINTRZ_W_S |
| 8026 | CEFBS_None, // FTINT_L_D |
| 8027 | CEFBS_None, // FTINT_L_S |
| 8028 | CEFBS_None, // FTINT_W_D |
| 8029 | CEFBS_None, // FTINT_W_S |
| 8030 | CEFBS_None, // GCSRRD |
| 8031 | CEFBS_None, // GCSRWR |
| 8032 | CEFBS_None, // GCSRXCHG |
| 8033 | CEFBS_None, // GTLBFLUSH |
| 8034 | CEFBS_None, // HVCL |
| 8035 | CEFBS_None, // IBAR |
| 8036 | CEFBS_None, // IDLE |
| 8037 | CEFBS_None, // INVTLB |
| 8038 | CEFBS_None, // IOCSRRD_B |
| 8039 | CEFBS_IsLA64, // IOCSRRD_D |
| 8040 | CEFBS_None, // IOCSRRD_H |
| 8041 | CEFBS_None, // IOCSRRD_W |
| 8042 | CEFBS_None, // IOCSRWR_B |
| 8043 | CEFBS_IsLA64, // IOCSRWR_D |
| 8044 | CEFBS_None, // IOCSRWR_H |
| 8045 | CEFBS_None, // IOCSRWR_W |
| 8046 | CEFBS_None, // JIRL |
| 8047 | CEFBS_None, // JISCR0 |
| 8048 | CEFBS_None, // JISCR1 |
| 8049 | CEFBS_None, // LDDIR |
| 8050 | CEFBS_IsLA64, // LDGT_B |
| 8051 | CEFBS_IsLA64, // LDGT_D |
| 8052 | CEFBS_IsLA64, // LDGT_H |
| 8053 | CEFBS_IsLA64, // LDGT_W |
| 8054 | CEFBS_IsLA64, // LDLE_B |
| 8055 | CEFBS_IsLA64, // LDLE_D |
| 8056 | CEFBS_IsLA64, // LDLE_H |
| 8057 | CEFBS_IsLA64, // LDLE_W |
| 8058 | CEFBS_IsLA64, // LDL_D |
| 8059 | CEFBS_None, // LDL_W |
| 8060 | CEFBS_None, // LDPTE |
| 8061 | CEFBS_IsLA64, // LDPTR_D |
| 8062 | CEFBS_IsLA64, // LDPTR_W |
| 8063 | CEFBS_IsLA64, // LDR_D |
| 8064 | CEFBS_None, // LDR_W |
| 8065 | CEFBS_IsLA64, // LDX_B |
| 8066 | CEFBS_IsLA64, // LDX_BU |
| 8067 | CEFBS_IsLA64, // LDX_D |
| 8068 | CEFBS_IsLA64, // LDX_H |
| 8069 | CEFBS_IsLA64, // LDX_HU |
| 8070 | CEFBS_IsLA64, // LDX_W |
| 8071 | CEFBS_IsLA64, // LDX_WU |
| 8072 | CEFBS_None, // LD_B |
| 8073 | CEFBS_None, // LD_BU |
| 8074 | CEFBS_IsLA64, // LD_D |
| 8075 | CEFBS_None, // LD_H |
| 8076 | CEFBS_None, // LD_HU |
| 8077 | CEFBS_None, // LD_W |
| 8078 | CEFBS_IsLA64, // LD_WU |
| 8079 | CEFBS_IsLA64, // LLACQ_D |
| 8080 | CEFBS_IsLA64, // LLACQ_W |
| 8081 | CEFBS_IsLA64, // LL_D |
| 8082 | CEFBS_None, // LL_W |
| 8083 | CEFBS_None, // LU12I_W |
| 8084 | CEFBS_IsLA64, // LU32I_D |
| 8085 | CEFBS_IsLA64, // LU52I_D |
| 8086 | CEFBS_None, // MASKEQZ |
| 8087 | CEFBS_None, // MASKNEZ |
| 8088 | CEFBS_IsLA64, // MOD_D |
| 8089 | CEFBS_IsLA64, // MOD_DU |
| 8090 | CEFBS_None, // MOD_W |
| 8091 | CEFBS_None, // MOD_WU |
| 8092 | CEFBS_None, // MOVCF2FR_xS |
| 8093 | CEFBS_None, // MOVCF2GR |
| 8094 | CEFBS_None, // MOVFCSR2GR |
| 8095 | CEFBS_None, // MOVFR2CF_xS |
| 8096 | CEFBS_IsLA64, // MOVFR2GR_D |
| 8097 | CEFBS_None, // MOVFR2GR_S |
| 8098 | CEFBS_None, // MOVFR2GR_S_64 |
| 8099 | CEFBS_None, // MOVFRH2GR_S |
| 8100 | CEFBS_None, // MOVGR2CF |
| 8101 | CEFBS_None, // MOVGR2FCSR |
| 8102 | CEFBS_None, // MOVGR2FRH_W |
| 8103 | CEFBS_IsLA64, // MOVGR2FR_D |
| 8104 | CEFBS_None, // MOVGR2FR_W |
| 8105 | CEFBS_IsLA32, // MOVGR2FR_W_64 |
| 8106 | CEFBS_None, // MOVGR2SCR |
| 8107 | CEFBS_None, // MOVSCR2GR |
| 8108 | CEFBS_IsLA64, // MULH_D |
| 8109 | CEFBS_IsLA64, // MULH_DU |
| 8110 | CEFBS_None, // MULH_W |
| 8111 | CEFBS_None, // MULH_WU |
| 8112 | CEFBS_IsLA64, // MULW_D_W |
| 8113 | CEFBS_IsLA64, // MULW_D_WU |
| 8114 | CEFBS_IsLA64, // MUL_D |
| 8115 | CEFBS_None, // MUL_W |
| 8116 | CEFBS_None, // NOR |
| 8117 | CEFBS_None, // OR |
| 8118 | CEFBS_None, // ORI |
| 8119 | CEFBS_None, // ORN |
| 8120 | CEFBS_None, // PCADDI |
| 8121 | CEFBS_None, // PCADDU12I |
| 8122 | CEFBS_IsLA64, // PCADDU18I |
| 8123 | CEFBS_None, // PCALAU12I |
| 8124 | CEFBS_None, // PRELD |
| 8125 | CEFBS_IsLA64, // PRELDX |
| 8126 | CEFBS_None, // RCRI_B |
| 8127 | CEFBS_IsLA64, // RCRI_D |
| 8128 | CEFBS_None, // RCRI_H |
| 8129 | CEFBS_None, // RCRI_W |
| 8130 | CEFBS_None, // RCR_B |
| 8131 | CEFBS_IsLA64, // RCR_D |
| 8132 | CEFBS_None, // RCR_H |
| 8133 | CEFBS_None, // RCR_W |
| 8134 | CEFBS_None, // RDTIMEH_W |
| 8135 | CEFBS_None, // RDTIMEL_W |
| 8136 | CEFBS_IsLA64, // RDTIME_D |
| 8137 | CEFBS_None, // REVB_2H |
| 8138 | CEFBS_IsLA64, // REVB_2W |
| 8139 | CEFBS_IsLA64, // REVB_4H |
| 8140 | CEFBS_IsLA64, // REVB_D |
| 8141 | CEFBS_IsLA64, // REVH_2W |
| 8142 | CEFBS_IsLA64, // REVH_D |
| 8143 | CEFBS_None, // ROTRI_B |
| 8144 | CEFBS_IsLA64, // ROTRI_D |
| 8145 | CEFBS_None, // ROTRI_H |
| 8146 | CEFBS_None, // ROTRI_W |
| 8147 | CEFBS_None, // ROTR_B |
| 8148 | CEFBS_IsLA64, // ROTR_D |
| 8149 | CEFBS_None, // ROTR_H |
| 8150 | CEFBS_None, // ROTR_W |
| 8151 | CEFBS_None, // SBC_B |
| 8152 | CEFBS_IsLA64, // SBC_D |
| 8153 | CEFBS_None, // SBC_H |
| 8154 | CEFBS_None, // SBC_W |
| 8155 | CEFBS_IsLA64, // SCREL_D |
| 8156 | CEFBS_IsLA64, // SCREL_W |
| 8157 | CEFBS_IsLA64, // SC_D |
| 8158 | CEFBS_IsLA64, // SC_Q |
| 8159 | CEFBS_None, // SC_W |
| 8160 | CEFBS_None, // SETARMJ |
| 8161 | CEFBS_None, // SETX86J |
| 8162 | CEFBS_None, // SETX86LOOPE |
| 8163 | CEFBS_None, // SETX86LOOPNE |
| 8164 | CEFBS_None, // SET_CFR_FALSE |
| 8165 | CEFBS_None, // SET_CFR_TRUE |
| 8166 | CEFBS_IsLA64, // SLLI_D |
| 8167 | CEFBS_None, // SLLI_W |
| 8168 | CEFBS_IsLA64, // SLL_D |
| 8169 | CEFBS_None, // SLL_W |
| 8170 | CEFBS_None, // SLT |
| 8171 | CEFBS_None, // SLTI |
| 8172 | CEFBS_None, // SLTU |
| 8173 | CEFBS_None, // SLTUI |
| 8174 | CEFBS_IsLA64, // SRAI_D |
| 8175 | CEFBS_None, // SRAI_W |
| 8176 | CEFBS_IsLA64, // SRA_D |
| 8177 | CEFBS_None, // SRA_W |
| 8178 | CEFBS_IsLA64, // SRLI_D |
| 8179 | CEFBS_None, // SRLI_W |
| 8180 | CEFBS_IsLA64, // SRL_D |
| 8181 | CEFBS_None, // SRL_W |
| 8182 | CEFBS_IsLA64, // STGT_B |
| 8183 | CEFBS_IsLA64, // STGT_D |
| 8184 | CEFBS_IsLA64, // STGT_H |
| 8185 | CEFBS_IsLA64, // STGT_W |
| 8186 | CEFBS_IsLA64, // STLE_B |
| 8187 | CEFBS_IsLA64, // STLE_D |
| 8188 | CEFBS_IsLA64, // STLE_H |
| 8189 | CEFBS_IsLA64, // STLE_W |
| 8190 | CEFBS_IsLA64, // STL_D |
| 8191 | CEFBS_None, // STL_W |
| 8192 | CEFBS_IsLA64, // STPTR_D |
| 8193 | CEFBS_IsLA64, // STPTR_W |
| 8194 | CEFBS_IsLA64, // STR_D |
| 8195 | CEFBS_None, // STR_W |
| 8196 | CEFBS_IsLA64, // STX_B |
| 8197 | CEFBS_IsLA64, // STX_D |
| 8198 | CEFBS_IsLA64, // STX_H |
| 8199 | CEFBS_IsLA64, // STX_W |
| 8200 | CEFBS_None, // ST_B |
| 8201 | CEFBS_IsLA64, // ST_D |
| 8202 | CEFBS_None, // ST_H |
| 8203 | CEFBS_None, // ST_W |
| 8204 | CEFBS_IsLA64, // SUB_D |
| 8205 | CEFBS_None, // SUB_W |
| 8206 | CEFBS_None, // SYSCALL |
| 8207 | CEFBS_None, // TLBCLR |
| 8208 | CEFBS_None, // TLBFILL |
| 8209 | CEFBS_None, // TLBFLUSH |
| 8210 | CEFBS_None, // TLBRD |
| 8211 | CEFBS_None, // TLBSRCH |
| 8212 | CEFBS_None, // TLBWR |
| 8213 | CEFBS_None, // UD |
| 8214 | CEFBS_None, // VABSD_B |
| 8215 | CEFBS_None, // VABSD_BU |
| 8216 | CEFBS_None, // VABSD_D |
| 8217 | CEFBS_None, // VABSD_DU |
| 8218 | CEFBS_None, // VABSD_H |
| 8219 | CEFBS_None, // VABSD_HU |
| 8220 | CEFBS_None, // VABSD_W |
| 8221 | CEFBS_None, // VABSD_WU |
| 8222 | CEFBS_None, // VADDA_B |
| 8223 | CEFBS_None, // VADDA_D |
| 8224 | CEFBS_None, // VADDA_H |
| 8225 | CEFBS_None, // VADDA_W |
| 8226 | CEFBS_None, // VADDI_BU |
| 8227 | CEFBS_None, // VADDI_DU |
| 8228 | CEFBS_None, // VADDI_HU |
| 8229 | CEFBS_None, // VADDI_WU |
| 8230 | CEFBS_None, // VADDWEV_D_W |
| 8231 | CEFBS_None, // VADDWEV_D_WU |
| 8232 | CEFBS_None, // VADDWEV_D_WU_W |
| 8233 | CEFBS_None, // VADDWEV_H_B |
| 8234 | CEFBS_None, // VADDWEV_H_BU |
| 8235 | CEFBS_None, // VADDWEV_H_BU_B |
| 8236 | CEFBS_None, // VADDWEV_Q_D |
| 8237 | CEFBS_None, // VADDWEV_Q_DU |
| 8238 | CEFBS_None, // VADDWEV_Q_DU_D |
| 8239 | CEFBS_None, // VADDWEV_W_H |
| 8240 | CEFBS_None, // VADDWEV_W_HU |
| 8241 | CEFBS_None, // VADDWEV_W_HU_H |
| 8242 | CEFBS_None, // VADDWOD_D_W |
| 8243 | CEFBS_None, // VADDWOD_D_WU |
| 8244 | CEFBS_None, // VADDWOD_D_WU_W |
| 8245 | CEFBS_None, // VADDWOD_H_B |
| 8246 | CEFBS_None, // VADDWOD_H_BU |
| 8247 | CEFBS_None, // VADDWOD_H_BU_B |
| 8248 | CEFBS_None, // VADDWOD_Q_D |
| 8249 | CEFBS_None, // VADDWOD_Q_DU |
| 8250 | CEFBS_None, // VADDWOD_Q_DU_D |
| 8251 | CEFBS_None, // VADDWOD_W_H |
| 8252 | CEFBS_None, // VADDWOD_W_HU |
| 8253 | CEFBS_None, // VADDWOD_W_HU_H |
| 8254 | CEFBS_None, // VADD_B |
| 8255 | CEFBS_None, // VADD_D |
| 8256 | CEFBS_None, // VADD_H |
| 8257 | CEFBS_None, // VADD_Q |
| 8258 | CEFBS_None, // VADD_W |
| 8259 | CEFBS_None, // VANDI_B |
| 8260 | CEFBS_None, // VANDN_V |
| 8261 | CEFBS_None, // VAND_V |
| 8262 | CEFBS_None, // VAVGR_B |
| 8263 | CEFBS_None, // VAVGR_BU |
| 8264 | CEFBS_None, // VAVGR_D |
| 8265 | CEFBS_None, // VAVGR_DU |
| 8266 | CEFBS_None, // VAVGR_H |
| 8267 | CEFBS_None, // VAVGR_HU |
| 8268 | CEFBS_None, // VAVGR_W |
| 8269 | CEFBS_None, // VAVGR_WU |
| 8270 | CEFBS_None, // VAVG_B |
| 8271 | CEFBS_None, // VAVG_BU |
| 8272 | CEFBS_None, // VAVG_D |
| 8273 | CEFBS_None, // VAVG_DU |
| 8274 | CEFBS_None, // VAVG_H |
| 8275 | CEFBS_None, // VAVG_HU |
| 8276 | CEFBS_None, // VAVG_W |
| 8277 | CEFBS_None, // VAVG_WU |
| 8278 | CEFBS_None, // VBITCLRI_B |
| 8279 | CEFBS_None, // VBITCLRI_D |
| 8280 | CEFBS_None, // VBITCLRI_H |
| 8281 | CEFBS_None, // VBITCLRI_W |
| 8282 | CEFBS_None, // VBITCLR_B |
| 8283 | CEFBS_None, // VBITCLR_D |
| 8284 | CEFBS_None, // VBITCLR_H |
| 8285 | CEFBS_None, // VBITCLR_W |
| 8286 | CEFBS_None, // VBITREVI_B |
| 8287 | CEFBS_None, // VBITREVI_D |
| 8288 | CEFBS_None, // VBITREVI_H |
| 8289 | CEFBS_None, // VBITREVI_W |
| 8290 | CEFBS_None, // VBITREV_B |
| 8291 | CEFBS_None, // VBITREV_D |
| 8292 | CEFBS_None, // VBITREV_H |
| 8293 | CEFBS_None, // VBITREV_W |
| 8294 | CEFBS_None, // VBITSELI_B |
| 8295 | CEFBS_None, // VBITSEL_V |
| 8296 | CEFBS_None, // VBITSETI_B |
| 8297 | CEFBS_None, // VBITSETI_D |
| 8298 | CEFBS_None, // VBITSETI_H |
| 8299 | CEFBS_None, // VBITSETI_W |
| 8300 | CEFBS_None, // VBITSET_B |
| 8301 | CEFBS_None, // VBITSET_D |
| 8302 | CEFBS_None, // VBITSET_H |
| 8303 | CEFBS_None, // VBITSET_W |
| 8304 | CEFBS_None, // VBSLL_V |
| 8305 | CEFBS_None, // VBSRL_V |
| 8306 | CEFBS_None, // VCLO_B |
| 8307 | CEFBS_None, // VCLO_D |
| 8308 | CEFBS_None, // VCLO_H |
| 8309 | CEFBS_None, // VCLO_W |
| 8310 | CEFBS_None, // VCLZ_B |
| 8311 | CEFBS_None, // VCLZ_D |
| 8312 | CEFBS_None, // VCLZ_H |
| 8313 | CEFBS_None, // VCLZ_W |
| 8314 | CEFBS_None, // VDIV_B |
| 8315 | CEFBS_None, // VDIV_BU |
| 8316 | CEFBS_None, // VDIV_D |
| 8317 | CEFBS_None, // VDIV_DU |
| 8318 | CEFBS_None, // VDIV_H |
| 8319 | CEFBS_None, // VDIV_HU |
| 8320 | CEFBS_None, // VDIV_W |
| 8321 | CEFBS_None, // VDIV_WU |
| 8322 | CEFBS_None, // VEXT2XV_DU_BU |
| 8323 | CEFBS_None, // VEXT2XV_DU_HU |
| 8324 | CEFBS_None, // VEXT2XV_DU_WU |
| 8325 | CEFBS_None, // VEXT2XV_D_B |
| 8326 | CEFBS_None, // VEXT2XV_D_H |
| 8327 | CEFBS_None, // VEXT2XV_D_W |
| 8328 | CEFBS_None, // VEXT2XV_HU_BU |
| 8329 | CEFBS_None, // VEXT2XV_H_B |
| 8330 | CEFBS_None, // VEXT2XV_WU_BU |
| 8331 | CEFBS_None, // VEXT2XV_WU_HU |
| 8332 | CEFBS_None, // VEXT2XV_W_B |
| 8333 | CEFBS_None, // VEXT2XV_W_H |
| 8334 | CEFBS_None, // VEXTH_DU_WU |
| 8335 | CEFBS_None, // VEXTH_D_W |
| 8336 | CEFBS_None, // VEXTH_HU_BU |
| 8337 | CEFBS_None, // VEXTH_H_B |
| 8338 | CEFBS_None, // VEXTH_QU_DU |
| 8339 | CEFBS_None, // VEXTH_Q_D |
| 8340 | CEFBS_None, // VEXTH_WU_HU |
| 8341 | CEFBS_None, // VEXTH_W_H |
| 8342 | CEFBS_None, // VEXTL_QU_DU |
| 8343 | CEFBS_None, // VEXTL_Q_D |
| 8344 | CEFBS_None, // VEXTRINS_B |
| 8345 | CEFBS_None, // VEXTRINS_D |
| 8346 | CEFBS_None, // VEXTRINS_H |
| 8347 | CEFBS_None, // VEXTRINS_W |
| 8348 | CEFBS_None, // VFADD_D |
| 8349 | CEFBS_None, // VFADD_S |
| 8350 | CEFBS_None, // VFCLASS_D |
| 8351 | CEFBS_None, // VFCLASS_S |
| 8352 | CEFBS_None, // VFCMP_CAF_D |
| 8353 | CEFBS_None, // VFCMP_CAF_S |
| 8354 | CEFBS_None, // VFCMP_CEQ_D |
| 8355 | CEFBS_None, // VFCMP_CEQ_S |
| 8356 | CEFBS_None, // VFCMP_CLE_D |
| 8357 | CEFBS_None, // VFCMP_CLE_S |
| 8358 | CEFBS_None, // VFCMP_CLT_D |
| 8359 | CEFBS_None, // VFCMP_CLT_S |
| 8360 | CEFBS_None, // VFCMP_CNE_D |
| 8361 | CEFBS_None, // VFCMP_CNE_S |
| 8362 | CEFBS_None, // VFCMP_COR_D |
| 8363 | CEFBS_None, // VFCMP_COR_S |
| 8364 | CEFBS_None, // VFCMP_CUEQ_D |
| 8365 | CEFBS_None, // VFCMP_CUEQ_S |
| 8366 | CEFBS_None, // VFCMP_CULE_D |
| 8367 | CEFBS_None, // VFCMP_CULE_S |
| 8368 | CEFBS_None, // VFCMP_CULT_D |
| 8369 | CEFBS_None, // VFCMP_CULT_S |
| 8370 | CEFBS_None, // VFCMP_CUNE_D |
| 8371 | CEFBS_None, // VFCMP_CUNE_S |
| 8372 | CEFBS_None, // VFCMP_CUN_D |
| 8373 | CEFBS_None, // VFCMP_CUN_S |
| 8374 | CEFBS_None, // VFCMP_SAF_D |
| 8375 | CEFBS_None, // VFCMP_SAF_S |
| 8376 | CEFBS_None, // VFCMP_SEQ_D |
| 8377 | CEFBS_None, // VFCMP_SEQ_S |
| 8378 | CEFBS_None, // VFCMP_SLE_D |
| 8379 | CEFBS_None, // VFCMP_SLE_S |
| 8380 | CEFBS_None, // VFCMP_SLT_D |
| 8381 | CEFBS_None, // VFCMP_SLT_S |
| 8382 | CEFBS_None, // VFCMP_SNE_D |
| 8383 | CEFBS_None, // VFCMP_SNE_S |
| 8384 | CEFBS_None, // VFCMP_SOR_D |
| 8385 | CEFBS_None, // VFCMP_SOR_S |
| 8386 | CEFBS_None, // VFCMP_SUEQ_D |
| 8387 | CEFBS_None, // VFCMP_SUEQ_S |
| 8388 | CEFBS_None, // VFCMP_SULE_D |
| 8389 | CEFBS_None, // VFCMP_SULE_S |
| 8390 | CEFBS_None, // VFCMP_SULT_D |
| 8391 | CEFBS_None, // VFCMP_SULT_S |
| 8392 | CEFBS_None, // VFCMP_SUNE_D |
| 8393 | CEFBS_None, // VFCMP_SUNE_S |
| 8394 | CEFBS_None, // VFCMP_SUN_D |
| 8395 | CEFBS_None, // VFCMP_SUN_S |
| 8396 | CEFBS_None, // VFCVTH_D_S |
| 8397 | CEFBS_None, // VFCVTH_S_H |
| 8398 | CEFBS_None, // VFCVTL_D_S |
| 8399 | CEFBS_None, // VFCVTL_S_H |
| 8400 | CEFBS_None, // VFCVT_H_S |
| 8401 | CEFBS_None, // VFCVT_S_D |
| 8402 | CEFBS_None, // VFDIV_D |
| 8403 | CEFBS_None, // VFDIV_S |
| 8404 | CEFBS_None, // VFFINTH_D_W |
| 8405 | CEFBS_None, // VFFINTL_D_W |
| 8406 | CEFBS_None, // VFFINT_D_L |
| 8407 | CEFBS_None, // VFFINT_D_LU |
| 8408 | CEFBS_None, // VFFINT_S_L |
| 8409 | CEFBS_None, // VFFINT_S_W |
| 8410 | CEFBS_None, // VFFINT_S_WU |
| 8411 | CEFBS_None, // VFLOGB_D |
| 8412 | CEFBS_None, // VFLOGB_S |
| 8413 | CEFBS_None, // VFMADD_D |
| 8414 | CEFBS_None, // VFMADD_S |
| 8415 | CEFBS_None, // VFMAXA_D |
| 8416 | CEFBS_None, // VFMAXA_S |
| 8417 | CEFBS_None, // VFMAX_D |
| 8418 | CEFBS_None, // VFMAX_S |
| 8419 | CEFBS_None, // VFMINA_D |
| 8420 | CEFBS_None, // VFMINA_S |
| 8421 | CEFBS_None, // VFMIN_D |
| 8422 | CEFBS_None, // VFMIN_S |
| 8423 | CEFBS_None, // VFMSUB_D |
| 8424 | CEFBS_None, // VFMSUB_S |
| 8425 | CEFBS_None, // VFMUL_D |
| 8426 | CEFBS_None, // VFMUL_S |
| 8427 | CEFBS_None, // VFNMADD_D |
| 8428 | CEFBS_None, // VFNMADD_S |
| 8429 | CEFBS_None, // VFNMSUB_D |
| 8430 | CEFBS_None, // VFNMSUB_S |
| 8431 | CEFBS_None, // VFRECIPE_D |
| 8432 | CEFBS_None, // VFRECIPE_S |
| 8433 | CEFBS_None, // VFRECIP_D |
| 8434 | CEFBS_None, // VFRECIP_S |
| 8435 | CEFBS_None, // VFRINTRM_D |
| 8436 | CEFBS_None, // VFRINTRM_S |
| 8437 | CEFBS_None, // VFRINTRNE_D |
| 8438 | CEFBS_None, // VFRINTRNE_S |
| 8439 | CEFBS_None, // VFRINTRP_D |
| 8440 | CEFBS_None, // VFRINTRP_S |
| 8441 | CEFBS_None, // VFRINTRZ_D |
| 8442 | CEFBS_None, // VFRINTRZ_S |
| 8443 | CEFBS_None, // VFRINT_D |
| 8444 | CEFBS_None, // VFRINT_S |
| 8445 | CEFBS_None, // VFRSQRTE_D |
| 8446 | CEFBS_None, // VFRSQRTE_S |
| 8447 | CEFBS_None, // VFRSQRT_D |
| 8448 | CEFBS_None, // VFRSQRT_S |
| 8449 | CEFBS_None, // VFRSTPI_B |
| 8450 | CEFBS_None, // VFRSTPI_H |
| 8451 | CEFBS_None, // VFRSTP_B |
| 8452 | CEFBS_None, // VFRSTP_H |
| 8453 | CEFBS_None, // VFSQRT_D |
| 8454 | CEFBS_None, // VFSQRT_S |
| 8455 | CEFBS_None, // VFSUB_D |
| 8456 | CEFBS_None, // VFSUB_S |
| 8457 | CEFBS_None, // VFTINTH_L_S |
| 8458 | CEFBS_None, // VFTINTL_L_S |
| 8459 | CEFBS_None, // VFTINTRMH_L_S |
| 8460 | CEFBS_None, // VFTINTRML_L_S |
| 8461 | CEFBS_None, // VFTINTRM_L_D |
| 8462 | CEFBS_None, // VFTINTRM_W_D |
| 8463 | CEFBS_None, // VFTINTRM_W_S |
| 8464 | CEFBS_None, // VFTINTRNEH_L_S |
| 8465 | CEFBS_None, // VFTINTRNEL_L_S |
| 8466 | CEFBS_None, // VFTINTRNE_L_D |
| 8467 | CEFBS_None, // VFTINTRNE_W_D |
| 8468 | CEFBS_None, // VFTINTRNE_W_S |
| 8469 | CEFBS_None, // VFTINTRPH_L_S |
| 8470 | CEFBS_None, // VFTINTRPL_L_S |
| 8471 | CEFBS_None, // VFTINTRP_L_D |
| 8472 | CEFBS_None, // VFTINTRP_W_D |
| 8473 | CEFBS_None, // VFTINTRP_W_S |
| 8474 | CEFBS_None, // VFTINTRZH_L_S |
| 8475 | CEFBS_None, // VFTINTRZL_L_S |
| 8476 | CEFBS_None, // VFTINTRZ_LU_D |
| 8477 | CEFBS_None, // VFTINTRZ_L_D |
| 8478 | CEFBS_None, // VFTINTRZ_WU_S |
| 8479 | CEFBS_None, // VFTINTRZ_W_D |
| 8480 | CEFBS_None, // VFTINTRZ_W_S |
| 8481 | CEFBS_None, // VFTINT_LU_D |
| 8482 | CEFBS_None, // VFTINT_L_D |
| 8483 | CEFBS_None, // VFTINT_WU_S |
| 8484 | CEFBS_None, // VFTINT_W_D |
| 8485 | CEFBS_None, // VFTINT_W_S |
| 8486 | CEFBS_None, // VHADDW_DU_WU |
| 8487 | CEFBS_None, // VHADDW_D_W |
| 8488 | CEFBS_None, // VHADDW_HU_BU |
| 8489 | CEFBS_None, // VHADDW_H_B |
| 8490 | CEFBS_None, // VHADDW_QU_DU |
| 8491 | CEFBS_None, // VHADDW_Q_D |
| 8492 | CEFBS_None, // VHADDW_WU_HU |
| 8493 | CEFBS_None, // VHADDW_W_H |
| 8494 | CEFBS_None, // VHSUBW_DU_WU |
| 8495 | CEFBS_None, // VHSUBW_D_W |
| 8496 | CEFBS_None, // VHSUBW_HU_BU |
| 8497 | CEFBS_None, // VHSUBW_H_B |
| 8498 | CEFBS_None, // VHSUBW_QU_DU |
| 8499 | CEFBS_None, // VHSUBW_Q_D |
| 8500 | CEFBS_None, // VHSUBW_WU_HU |
| 8501 | CEFBS_None, // VHSUBW_W_H |
| 8502 | CEFBS_None, // VILVH_B |
| 8503 | CEFBS_None, // VILVH_D |
| 8504 | CEFBS_None, // VILVH_H |
| 8505 | CEFBS_None, // VILVH_W |
| 8506 | CEFBS_None, // VILVL_B |
| 8507 | CEFBS_None, // VILVL_D |
| 8508 | CEFBS_None, // VILVL_H |
| 8509 | CEFBS_None, // VILVL_W |
| 8510 | CEFBS_None, // VINSGR2VR_B |
| 8511 | CEFBS_None, // VINSGR2VR_D |
| 8512 | CEFBS_None, // VINSGR2VR_H |
| 8513 | CEFBS_None, // VINSGR2VR_W |
| 8514 | CEFBS_None, // VLD |
| 8515 | CEFBS_None, // VLDI |
| 8516 | CEFBS_None, // VLDREPL_B |
| 8517 | CEFBS_None, // VLDREPL_D |
| 8518 | CEFBS_None, // VLDREPL_H |
| 8519 | CEFBS_None, // VLDREPL_W |
| 8520 | CEFBS_None, // VLDX |
| 8521 | CEFBS_None, // VMADDWEV_D_W |
| 8522 | CEFBS_None, // VMADDWEV_D_WU |
| 8523 | CEFBS_None, // VMADDWEV_D_WU_W |
| 8524 | CEFBS_None, // VMADDWEV_H_B |
| 8525 | CEFBS_None, // VMADDWEV_H_BU |
| 8526 | CEFBS_None, // VMADDWEV_H_BU_B |
| 8527 | CEFBS_None, // VMADDWEV_Q_D |
| 8528 | CEFBS_None, // VMADDWEV_Q_DU |
| 8529 | CEFBS_None, // VMADDWEV_Q_DU_D |
| 8530 | CEFBS_None, // VMADDWEV_W_H |
| 8531 | CEFBS_None, // VMADDWEV_W_HU |
| 8532 | CEFBS_None, // VMADDWEV_W_HU_H |
| 8533 | CEFBS_None, // VMADDWOD_D_W |
| 8534 | CEFBS_None, // VMADDWOD_D_WU |
| 8535 | CEFBS_None, // VMADDWOD_D_WU_W |
| 8536 | CEFBS_None, // VMADDWOD_H_B |
| 8537 | CEFBS_None, // VMADDWOD_H_BU |
| 8538 | CEFBS_None, // VMADDWOD_H_BU_B |
| 8539 | CEFBS_None, // VMADDWOD_Q_D |
| 8540 | CEFBS_None, // VMADDWOD_Q_DU |
| 8541 | CEFBS_None, // VMADDWOD_Q_DU_D |
| 8542 | CEFBS_None, // VMADDWOD_W_H |
| 8543 | CEFBS_None, // VMADDWOD_W_HU |
| 8544 | CEFBS_None, // VMADDWOD_W_HU_H |
| 8545 | CEFBS_None, // VMADD_B |
| 8546 | CEFBS_None, // VMADD_D |
| 8547 | CEFBS_None, // VMADD_H |
| 8548 | CEFBS_None, // VMADD_W |
| 8549 | CEFBS_None, // VMAXI_B |
| 8550 | CEFBS_None, // VMAXI_BU |
| 8551 | CEFBS_None, // VMAXI_D |
| 8552 | CEFBS_None, // VMAXI_DU |
| 8553 | CEFBS_None, // VMAXI_H |
| 8554 | CEFBS_None, // VMAXI_HU |
| 8555 | CEFBS_None, // VMAXI_W |
| 8556 | CEFBS_None, // VMAXI_WU |
| 8557 | CEFBS_None, // VMAX_B |
| 8558 | CEFBS_None, // VMAX_BU |
| 8559 | CEFBS_None, // VMAX_D |
| 8560 | CEFBS_None, // VMAX_DU |
| 8561 | CEFBS_None, // VMAX_H |
| 8562 | CEFBS_None, // VMAX_HU |
| 8563 | CEFBS_None, // VMAX_W |
| 8564 | CEFBS_None, // VMAX_WU |
| 8565 | CEFBS_None, // VMINI_B |
| 8566 | CEFBS_None, // VMINI_BU |
| 8567 | CEFBS_None, // VMINI_D |
| 8568 | CEFBS_None, // VMINI_DU |
| 8569 | CEFBS_None, // VMINI_H |
| 8570 | CEFBS_None, // VMINI_HU |
| 8571 | CEFBS_None, // VMINI_W |
| 8572 | CEFBS_None, // VMINI_WU |
| 8573 | CEFBS_None, // VMIN_B |
| 8574 | CEFBS_None, // VMIN_BU |
| 8575 | CEFBS_None, // VMIN_D |
| 8576 | CEFBS_None, // VMIN_DU |
| 8577 | CEFBS_None, // VMIN_H |
| 8578 | CEFBS_None, // VMIN_HU |
| 8579 | CEFBS_None, // VMIN_W |
| 8580 | CEFBS_None, // VMIN_WU |
| 8581 | CEFBS_None, // VMOD_B |
| 8582 | CEFBS_None, // VMOD_BU |
| 8583 | CEFBS_None, // VMOD_D |
| 8584 | CEFBS_None, // VMOD_DU |
| 8585 | CEFBS_None, // VMOD_H |
| 8586 | CEFBS_None, // VMOD_HU |
| 8587 | CEFBS_None, // VMOD_W |
| 8588 | CEFBS_None, // VMOD_WU |
| 8589 | CEFBS_None, // VMSKGEZ_B |
| 8590 | CEFBS_None, // VMSKLTZ_B |
| 8591 | CEFBS_None, // VMSKLTZ_D |
| 8592 | CEFBS_None, // VMSKLTZ_H |
| 8593 | CEFBS_None, // VMSKLTZ_W |
| 8594 | CEFBS_None, // VMSKNZ_B |
| 8595 | CEFBS_None, // VMSUB_B |
| 8596 | CEFBS_None, // VMSUB_D |
| 8597 | CEFBS_None, // VMSUB_H |
| 8598 | CEFBS_None, // VMSUB_W |
| 8599 | CEFBS_None, // VMUH_B |
| 8600 | CEFBS_None, // VMUH_BU |
| 8601 | CEFBS_None, // VMUH_D |
| 8602 | CEFBS_None, // VMUH_DU |
| 8603 | CEFBS_None, // VMUH_H |
| 8604 | CEFBS_None, // VMUH_HU |
| 8605 | CEFBS_None, // VMUH_W |
| 8606 | CEFBS_None, // VMUH_WU |
| 8607 | CEFBS_None, // VMULWEV_D_W |
| 8608 | CEFBS_None, // VMULWEV_D_WU |
| 8609 | CEFBS_None, // VMULWEV_D_WU_W |
| 8610 | CEFBS_None, // VMULWEV_H_B |
| 8611 | CEFBS_None, // VMULWEV_H_BU |
| 8612 | CEFBS_None, // VMULWEV_H_BU_B |
| 8613 | CEFBS_None, // VMULWEV_Q_D |
| 8614 | CEFBS_None, // VMULWEV_Q_DU |
| 8615 | CEFBS_None, // VMULWEV_Q_DU_D |
| 8616 | CEFBS_None, // VMULWEV_W_H |
| 8617 | CEFBS_None, // VMULWEV_W_HU |
| 8618 | CEFBS_None, // VMULWEV_W_HU_H |
| 8619 | CEFBS_None, // VMULWOD_D_W |
| 8620 | CEFBS_None, // VMULWOD_D_WU |
| 8621 | CEFBS_None, // VMULWOD_D_WU_W |
| 8622 | CEFBS_None, // VMULWOD_H_B |
| 8623 | CEFBS_None, // VMULWOD_H_BU |
| 8624 | CEFBS_None, // VMULWOD_H_BU_B |
| 8625 | CEFBS_None, // VMULWOD_Q_D |
| 8626 | CEFBS_None, // VMULWOD_Q_DU |
| 8627 | CEFBS_None, // VMULWOD_Q_DU_D |
| 8628 | CEFBS_None, // VMULWOD_W_H |
| 8629 | CEFBS_None, // VMULWOD_W_HU |
| 8630 | CEFBS_None, // VMULWOD_W_HU_H |
| 8631 | CEFBS_None, // VMUL_B |
| 8632 | CEFBS_None, // VMUL_D |
| 8633 | CEFBS_None, // VMUL_H |
| 8634 | CEFBS_None, // VMUL_W |
| 8635 | CEFBS_None, // VNEG_B |
| 8636 | CEFBS_None, // VNEG_D |
| 8637 | CEFBS_None, // VNEG_H |
| 8638 | CEFBS_None, // VNEG_W |
| 8639 | CEFBS_None, // VNORI_B |
| 8640 | CEFBS_None, // VNOR_V |
| 8641 | CEFBS_None, // VORI_B |
| 8642 | CEFBS_None, // VORN_V |
| 8643 | CEFBS_None, // VOR_V |
| 8644 | CEFBS_None, // VPACKEV_B |
| 8645 | CEFBS_None, // VPACKEV_D |
| 8646 | CEFBS_None, // VPACKEV_H |
| 8647 | CEFBS_None, // VPACKEV_W |
| 8648 | CEFBS_None, // VPACKOD_B |
| 8649 | CEFBS_None, // VPACKOD_D |
| 8650 | CEFBS_None, // VPACKOD_H |
| 8651 | CEFBS_None, // VPACKOD_W |
| 8652 | CEFBS_None, // VPCNT_B |
| 8653 | CEFBS_None, // VPCNT_D |
| 8654 | CEFBS_None, // VPCNT_H |
| 8655 | CEFBS_None, // VPCNT_W |
| 8656 | CEFBS_None, // VPERMI_W |
| 8657 | CEFBS_None, // VPICKEV_B |
| 8658 | CEFBS_None, // VPICKEV_D |
| 8659 | CEFBS_None, // VPICKEV_H |
| 8660 | CEFBS_None, // VPICKEV_W |
| 8661 | CEFBS_None, // VPICKOD_B |
| 8662 | CEFBS_None, // VPICKOD_D |
| 8663 | CEFBS_None, // VPICKOD_H |
| 8664 | CEFBS_None, // VPICKOD_W |
| 8665 | CEFBS_None, // VPICKVE2GR_B |
| 8666 | CEFBS_None, // VPICKVE2GR_BU |
| 8667 | CEFBS_None, // VPICKVE2GR_D |
| 8668 | CEFBS_None, // VPICKVE2GR_DU |
| 8669 | CEFBS_None, // VPICKVE2GR_H |
| 8670 | CEFBS_None, // VPICKVE2GR_HU |
| 8671 | CEFBS_None, // VPICKVE2GR_W |
| 8672 | CEFBS_None, // VPICKVE2GR_WU |
| 8673 | CEFBS_None, // VREPLGR2VR_B |
| 8674 | CEFBS_None, // VREPLGR2VR_D |
| 8675 | CEFBS_None, // VREPLGR2VR_H |
| 8676 | CEFBS_None, // VREPLGR2VR_W |
| 8677 | CEFBS_None, // VREPLVEI_B |
| 8678 | CEFBS_None, // VREPLVEI_D |
| 8679 | CEFBS_None, // VREPLVEI_H |
| 8680 | CEFBS_None, // VREPLVEI_W |
| 8681 | CEFBS_None, // VREPLVE_B |
| 8682 | CEFBS_None, // VREPLVE_D |
| 8683 | CEFBS_None, // VREPLVE_H |
| 8684 | CEFBS_None, // VREPLVE_W |
| 8685 | CEFBS_None, // VROTRI_B |
| 8686 | CEFBS_None, // VROTRI_D |
| 8687 | CEFBS_None, // VROTRI_H |
| 8688 | CEFBS_None, // VROTRI_W |
| 8689 | CEFBS_None, // VROTR_B |
| 8690 | CEFBS_None, // VROTR_D |
| 8691 | CEFBS_None, // VROTR_H |
| 8692 | CEFBS_None, // VROTR_W |
| 8693 | CEFBS_None, // VSADD_B |
| 8694 | CEFBS_None, // VSADD_BU |
| 8695 | CEFBS_None, // VSADD_D |
| 8696 | CEFBS_None, // VSADD_DU |
| 8697 | CEFBS_None, // VSADD_H |
| 8698 | CEFBS_None, // VSADD_HU |
| 8699 | CEFBS_None, // VSADD_W |
| 8700 | CEFBS_None, // VSADD_WU |
| 8701 | CEFBS_None, // VSAT_B |
| 8702 | CEFBS_None, // VSAT_BU |
| 8703 | CEFBS_None, // VSAT_D |
| 8704 | CEFBS_None, // VSAT_DU |
| 8705 | CEFBS_None, // VSAT_H |
| 8706 | CEFBS_None, // VSAT_HU |
| 8707 | CEFBS_None, // VSAT_W |
| 8708 | CEFBS_None, // VSAT_WU |
| 8709 | CEFBS_None, // VSEQI_B |
| 8710 | CEFBS_None, // VSEQI_D |
| 8711 | CEFBS_None, // VSEQI_H |
| 8712 | CEFBS_None, // VSEQI_W |
| 8713 | CEFBS_None, // VSEQ_B |
| 8714 | CEFBS_None, // VSEQ_D |
| 8715 | CEFBS_None, // VSEQ_H |
| 8716 | CEFBS_None, // VSEQ_W |
| 8717 | CEFBS_None, // VSETALLNEZ_B |
| 8718 | CEFBS_None, // VSETALLNEZ_D |
| 8719 | CEFBS_None, // VSETALLNEZ_H |
| 8720 | CEFBS_None, // VSETALLNEZ_W |
| 8721 | CEFBS_None, // VSETANYEQZ_B |
| 8722 | CEFBS_None, // VSETANYEQZ_D |
| 8723 | CEFBS_None, // VSETANYEQZ_H |
| 8724 | CEFBS_None, // VSETANYEQZ_W |
| 8725 | CEFBS_None, // VSETEQZ_V |
| 8726 | CEFBS_None, // VSETNEZ_V |
| 8727 | CEFBS_None, // VSHUF4I_B |
| 8728 | CEFBS_None, // VSHUF4I_D |
| 8729 | CEFBS_None, // VSHUF4I_H |
| 8730 | CEFBS_None, // VSHUF4I_W |
| 8731 | CEFBS_None, // VSHUF_B |
| 8732 | CEFBS_None, // VSHUF_D |
| 8733 | CEFBS_None, // VSHUF_H |
| 8734 | CEFBS_None, // VSHUF_W |
| 8735 | CEFBS_None, // VSIGNCOV_B |
| 8736 | CEFBS_None, // VSIGNCOV_D |
| 8737 | CEFBS_None, // VSIGNCOV_H |
| 8738 | CEFBS_None, // VSIGNCOV_W |
| 8739 | CEFBS_None, // VSLEI_B |
| 8740 | CEFBS_None, // VSLEI_BU |
| 8741 | CEFBS_None, // VSLEI_D |
| 8742 | CEFBS_None, // VSLEI_DU |
| 8743 | CEFBS_None, // VSLEI_H |
| 8744 | CEFBS_None, // VSLEI_HU |
| 8745 | CEFBS_None, // VSLEI_W |
| 8746 | CEFBS_None, // VSLEI_WU |
| 8747 | CEFBS_None, // VSLE_B |
| 8748 | CEFBS_None, // VSLE_BU |
| 8749 | CEFBS_None, // VSLE_D |
| 8750 | CEFBS_None, // VSLE_DU |
| 8751 | CEFBS_None, // VSLE_H |
| 8752 | CEFBS_None, // VSLE_HU |
| 8753 | CEFBS_None, // VSLE_W |
| 8754 | CEFBS_None, // VSLE_WU |
| 8755 | CEFBS_None, // VSLLI_B |
| 8756 | CEFBS_None, // VSLLI_D |
| 8757 | CEFBS_None, // VSLLI_H |
| 8758 | CEFBS_None, // VSLLI_W |
| 8759 | CEFBS_None, // VSLLWIL_DU_WU |
| 8760 | CEFBS_None, // VSLLWIL_D_W |
| 8761 | CEFBS_None, // VSLLWIL_HU_BU |
| 8762 | CEFBS_None, // VSLLWIL_H_B |
| 8763 | CEFBS_None, // VSLLWIL_WU_HU |
| 8764 | CEFBS_None, // VSLLWIL_W_H |
| 8765 | CEFBS_None, // VSLL_B |
| 8766 | CEFBS_None, // VSLL_D |
| 8767 | CEFBS_None, // VSLL_H |
| 8768 | CEFBS_None, // VSLL_W |
| 8769 | CEFBS_None, // VSLTI_B |
| 8770 | CEFBS_None, // VSLTI_BU |
| 8771 | CEFBS_None, // VSLTI_D |
| 8772 | CEFBS_None, // VSLTI_DU |
| 8773 | CEFBS_None, // VSLTI_H |
| 8774 | CEFBS_None, // VSLTI_HU |
| 8775 | CEFBS_None, // VSLTI_W |
| 8776 | CEFBS_None, // VSLTI_WU |
| 8777 | CEFBS_None, // VSLT_B |
| 8778 | CEFBS_None, // VSLT_BU |
| 8779 | CEFBS_None, // VSLT_D |
| 8780 | CEFBS_None, // VSLT_DU |
| 8781 | CEFBS_None, // VSLT_H |
| 8782 | CEFBS_None, // VSLT_HU |
| 8783 | CEFBS_None, // VSLT_W |
| 8784 | CEFBS_None, // VSLT_WU |
| 8785 | CEFBS_None, // VSRAI_B |
| 8786 | CEFBS_None, // VSRAI_D |
| 8787 | CEFBS_None, // VSRAI_H |
| 8788 | CEFBS_None, // VSRAI_W |
| 8789 | CEFBS_None, // VSRANI_B_H |
| 8790 | CEFBS_None, // VSRANI_D_Q |
| 8791 | CEFBS_None, // VSRANI_H_W |
| 8792 | CEFBS_None, // VSRANI_W_D |
| 8793 | CEFBS_None, // VSRAN_B_H |
| 8794 | CEFBS_None, // VSRAN_H_W |
| 8795 | CEFBS_None, // VSRAN_W_D |
| 8796 | CEFBS_None, // VSRARI_B |
| 8797 | CEFBS_None, // VSRARI_D |
| 8798 | CEFBS_None, // VSRARI_H |
| 8799 | CEFBS_None, // VSRARI_W |
| 8800 | CEFBS_None, // VSRARNI_B_H |
| 8801 | CEFBS_None, // VSRARNI_D_Q |
| 8802 | CEFBS_None, // VSRARNI_H_W |
| 8803 | CEFBS_None, // VSRARNI_W_D |
| 8804 | CEFBS_None, // VSRARN_B_H |
| 8805 | CEFBS_None, // VSRARN_H_W |
| 8806 | CEFBS_None, // VSRARN_W_D |
| 8807 | CEFBS_None, // VSRAR_B |
| 8808 | CEFBS_None, // VSRAR_D |
| 8809 | CEFBS_None, // VSRAR_H |
| 8810 | CEFBS_None, // VSRAR_W |
| 8811 | CEFBS_None, // VSRA_B |
| 8812 | CEFBS_None, // VSRA_D |
| 8813 | CEFBS_None, // VSRA_H |
| 8814 | CEFBS_None, // VSRA_W |
| 8815 | CEFBS_None, // VSRLI_B |
| 8816 | CEFBS_None, // VSRLI_D |
| 8817 | CEFBS_None, // VSRLI_H |
| 8818 | CEFBS_None, // VSRLI_W |
| 8819 | CEFBS_None, // VSRLNI_B_H |
| 8820 | CEFBS_None, // VSRLNI_D_Q |
| 8821 | CEFBS_None, // VSRLNI_H_W |
| 8822 | CEFBS_None, // VSRLNI_W_D |
| 8823 | CEFBS_None, // VSRLN_B_H |
| 8824 | CEFBS_None, // VSRLN_H_W |
| 8825 | CEFBS_None, // VSRLN_W_D |
| 8826 | CEFBS_None, // VSRLRI_B |
| 8827 | CEFBS_None, // VSRLRI_D |
| 8828 | CEFBS_None, // VSRLRI_H |
| 8829 | CEFBS_None, // VSRLRI_W |
| 8830 | CEFBS_None, // VSRLRNI_B_H |
| 8831 | CEFBS_None, // VSRLRNI_D_Q |
| 8832 | CEFBS_None, // VSRLRNI_H_W |
| 8833 | CEFBS_None, // VSRLRNI_W_D |
| 8834 | CEFBS_None, // VSRLRN_B_H |
| 8835 | CEFBS_None, // VSRLRN_H_W |
| 8836 | CEFBS_None, // VSRLRN_W_D |
| 8837 | CEFBS_None, // VSRLR_B |
| 8838 | CEFBS_None, // VSRLR_D |
| 8839 | CEFBS_None, // VSRLR_H |
| 8840 | CEFBS_None, // VSRLR_W |
| 8841 | CEFBS_None, // VSRL_B |
| 8842 | CEFBS_None, // VSRL_D |
| 8843 | CEFBS_None, // VSRL_H |
| 8844 | CEFBS_None, // VSRL_W |
| 8845 | CEFBS_None, // VSSRANI_BU_H |
| 8846 | CEFBS_None, // VSSRANI_B_H |
| 8847 | CEFBS_None, // VSSRANI_DU_Q |
| 8848 | CEFBS_None, // VSSRANI_D_Q |
| 8849 | CEFBS_None, // VSSRANI_HU_W |
| 8850 | CEFBS_None, // VSSRANI_H_W |
| 8851 | CEFBS_None, // VSSRANI_WU_D |
| 8852 | CEFBS_None, // VSSRANI_W_D |
| 8853 | CEFBS_None, // VSSRAN_BU_H |
| 8854 | CEFBS_None, // VSSRAN_B_H |
| 8855 | CEFBS_None, // VSSRAN_HU_W |
| 8856 | CEFBS_None, // VSSRAN_H_W |
| 8857 | CEFBS_None, // VSSRAN_WU_D |
| 8858 | CEFBS_None, // VSSRAN_W_D |
| 8859 | CEFBS_None, // VSSRARNI_BU_H |
| 8860 | CEFBS_None, // VSSRARNI_B_H |
| 8861 | CEFBS_None, // VSSRARNI_DU_Q |
| 8862 | CEFBS_None, // VSSRARNI_D_Q |
| 8863 | CEFBS_None, // VSSRARNI_HU_W |
| 8864 | CEFBS_None, // VSSRARNI_H_W |
| 8865 | CEFBS_None, // VSSRARNI_WU_D |
| 8866 | CEFBS_None, // VSSRARNI_W_D |
| 8867 | CEFBS_None, // VSSRARN_BU_H |
| 8868 | CEFBS_None, // VSSRARN_B_H |
| 8869 | CEFBS_None, // VSSRARN_HU_W |
| 8870 | CEFBS_None, // VSSRARN_H_W |
| 8871 | CEFBS_None, // VSSRARN_WU_D |
| 8872 | CEFBS_None, // VSSRARN_W_D |
| 8873 | CEFBS_None, // VSSRLNI_BU_H |
| 8874 | CEFBS_None, // VSSRLNI_B_H |
| 8875 | CEFBS_None, // VSSRLNI_DU_Q |
| 8876 | CEFBS_None, // VSSRLNI_D_Q |
| 8877 | CEFBS_None, // VSSRLNI_HU_W |
| 8878 | CEFBS_None, // VSSRLNI_H_W |
| 8879 | CEFBS_None, // VSSRLNI_WU_D |
| 8880 | CEFBS_None, // VSSRLNI_W_D |
| 8881 | CEFBS_None, // VSSRLN_BU_H |
| 8882 | CEFBS_None, // VSSRLN_B_H |
| 8883 | CEFBS_None, // VSSRLN_HU_W |
| 8884 | CEFBS_None, // VSSRLN_H_W |
| 8885 | CEFBS_None, // VSSRLN_WU_D |
| 8886 | CEFBS_None, // VSSRLN_W_D |
| 8887 | CEFBS_None, // VSSRLRNI_BU_H |
| 8888 | CEFBS_None, // VSSRLRNI_B_H |
| 8889 | CEFBS_None, // VSSRLRNI_DU_Q |
| 8890 | CEFBS_None, // VSSRLRNI_D_Q |
| 8891 | CEFBS_None, // VSSRLRNI_HU_W |
| 8892 | CEFBS_None, // VSSRLRNI_H_W |
| 8893 | CEFBS_None, // VSSRLRNI_WU_D |
| 8894 | CEFBS_None, // VSSRLRNI_W_D |
| 8895 | CEFBS_None, // VSSRLRN_BU_H |
| 8896 | CEFBS_None, // VSSRLRN_B_H |
| 8897 | CEFBS_None, // VSSRLRN_HU_W |
| 8898 | CEFBS_None, // VSSRLRN_H_W |
| 8899 | CEFBS_None, // VSSRLRN_WU_D |
| 8900 | CEFBS_None, // VSSRLRN_W_D |
| 8901 | CEFBS_None, // VSSUB_B |
| 8902 | CEFBS_None, // VSSUB_BU |
| 8903 | CEFBS_None, // VSSUB_D |
| 8904 | CEFBS_None, // VSSUB_DU |
| 8905 | CEFBS_None, // VSSUB_H |
| 8906 | CEFBS_None, // VSSUB_HU |
| 8907 | CEFBS_None, // VSSUB_W |
| 8908 | CEFBS_None, // VSSUB_WU |
| 8909 | CEFBS_None, // VST |
| 8910 | CEFBS_None, // VSTELM_B |
| 8911 | CEFBS_None, // VSTELM_D |
| 8912 | CEFBS_None, // VSTELM_H |
| 8913 | CEFBS_None, // VSTELM_W |
| 8914 | CEFBS_None, // VSTX |
| 8915 | CEFBS_None, // VSUBI_BU |
| 8916 | CEFBS_None, // VSUBI_DU |
| 8917 | CEFBS_None, // VSUBI_HU |
| 8918 | CEFBS_None, // VSUBI_WU |
| 8919 | CEFBS_None, // VSUBWEV_D_W |
| 8920 | CEFBS_None, // VSUBWEV_D_WU |
| 8921 | CEFBS_None, // VSUBWEV_H_B |
| 8922 | CEFBS_None, // VSUBWEV_H_BU |
| 8923 | CEFBS_None, // VSUBWEV_Q_D |
| 8924 | CEFBS_None, // VSUBWEV_Q_DU |
| 8925 | CEFBS_None, // VSUBWEV_W_H |
| 8926 | CEFBS_None, // VSUBWEV_W_HU |
| 8927 | CEFBS_None, // VSUBWOD_D_W |
| 8928 | CEFBS_None, // VSUBWOD_D_WU |
| 8929 | CEFBS_None, // VSUBWOD_H_B |
| 8930 | CEFBS_None, // VSUBWOD_H_BU |
| 8931 | CEFBS_None, // VSUBWOD_Q_D |
| 8932 | CEFBS_None, // VSUBWOD_Q_DU |
| 8933 | CEFBS_None, // VSUBWOD_W_H |
| 8934 | CEFBS_None, // VSUBWOD_W_HU |
| 8935 | CEFBS_None, // VSUB_B |
| 8936 | CEFBS_None, // VSUB_D |
| 8937 | CEFBS_None, // VSUB_H |
| 8938 | CEFBS_None, // VSUB_Q |
| 8939 | CEFBS_None, // VSUB_W |
| 8940 | CEFBS_None, // VXORI_B |
| 8941 | CEFBS_None, // VXOR_V |
| 8942 | CEFBS_None, // X86ADC_B |
| 8943 | CEFBS_IsLA64, // X86ADC_D |
| 8944 | CEFBS_None, // X86ADC_H |
| 8945 | CEFBS_None, // X86ADC_W |
| 8946 | CEFBS_None, // X86ADD_B |
| 8947 | CEFBS_IsLA64, // X86ADD_D |
| 8948 | CEFBS_IsLA64, // X86ADD_DU |
| 8949 | CEFBS_None, // X86ADD_H |
| 8950 | CEFBS_None, // X86ADD_W |
| 8951 | CEFBS_IsLA64, // X86ADD_WU |
| 8952 | CEFBS_None, // X86AND_B |
| 8953 | CEFBS_IsLA64, // X86AND_D |
| 8954 | CEFBS_None, // X86AND_H |
| 8955 | CEFBS_None, // X86AND_W |
| 8956 | CEFBS_None, // X86CLRTM |
| 8957 | CEFBS_None, // X86DECTOP |
| 8958 | CEFBS_None, // X86DEC_B |
| 8959 | CEFBS_IsLA64, // X86DEC_D |
| 8960 | CEFBS_None, // X86DEC_H |
| 8961 | CEFBS_None, // X86DEC_W |
| 8962 | CEFBS_None, // X86INCTOP |
| 8963 | CEFBS_None, // X86INC_B |
| 8964 | CEFBS_IsLA64, // X86INC_D |
| 8965 | CEFBS_None, // X86INC_H |
| 8966 | CEFBS_None, // X86INC_W |
| 8967 | CEFBS_None, // X86MFFLAG |
| 8968 | CEFBS_None, // X86MFTOP |
| 8969 | CEFBS_None, // X86MTFLAG |
| 8970 | CEFBS_None, // X86MTTOP |
| 8971 | CEFBS_None, // X86MUL_B |
| 8972 | CEFBS_None, // X86MUL_BU |
| 8973 | CEFBS_IsLA64, // X86MUL_D |
| 8974 | CEFBS_IsLA64, // X86MUL_DU |
| 8975 | CEFBS_None, // X86MUL_H |
| 8976 | CEFBS_None, // X86MUL_HU |
| 8977 | CEFBS_None, // X86MUL_W |
| 8978 | CEFBS_IsLA64, // X86MUL_WU |
| 8979 | CEFBS_None, // X86OR_B |
| 8980 | CEFBS_IsLA64, // X86OR_D |
| 8981 | CEFBS_None, // X86OR_H |
| 8982 | CEFBS_None, // X86OR_W |
| 8983 | CEFBS_None, // X86RCLI_B |
| 8984 | CEFBS_IsLA64, // X86RCLI_D |
| 8985 | CEFBS_None, // X86RCLI_H |
| 8986 | CEFBS_None, // X86RCLI_W |
| 8987 | CEFBS_None, // X86RCL_B |
| 8988 | CEFBS_IsLA64, // X86RCL_D |
| 8989 | CEFBS_None, // X86RCL_H |
| 8990 | CEFBS_None, // X86RCL_W |
| 8991 | CEFBS_None, // X86RCRI_B |
| 8992 | CEFBS_IsLA64, // X86RCRI_D |
| 8993 | CEFBS_None, // X86RCRI_H |
| 8994 | CEFBS_None, // X86RCRI_W |
| 8995 | CEFBS_None, // X86RCR_B |
| 8996 | CEFBS_IsLA64, // X86RCR_D |
| 8997 | CEFBS_None, // X86RCR_H |
| 8998 | CEFBS_None, // X86RCR_W |
| 8999 | CEFBS_None, // X86ROTLI_B |
| 9000 | CEFBS_IsLA64, // X86ROTLI_D |
| 9001 | CEFBS_None, // X86ROTLI_H |
| 9002 | CEFBS_None, // X86ROTLI_W |
| 9003 | CEFBS_None, // X86ROTL_B |
| 9004 | CEFBS_IsLA64, // X86ROTL_D |
| 9005 | CEFBS_None, // X86ROTL_H |
| 9006 | CEFBS_None, // X86ROTL_W |
| 9007 | CEFBS_None, // X86ROTRI_B |
| 9008 | CEFBS_IsLA64, // X86ROTRI_D |
| 9009 | CEFBS_None, // X86ROTRI_H |
| 9010 | CEFBS_None, // X86ROTRI_W |
| 9011 | CEFBS_None, // X86ROTR_B |
| 9012 | CEFBS_IsLA64, // X86ROTR_D |
| 9013 | CEFBS_None, // X86ROTR_H |
| 9014 | CEFBS_None, // X86ROTR_W |
| 9015 | CEFBS_None, // X86SBC_B |
| 9016 | CEFBS_IsLA64, // X86SBC_D |
| 9017 | CEFBS_None, // X86SBC_H |
| 9018 | CEFBS_None, // X86SBC_W |
| 9019 | CEFBS_None, // X86SETTAG |
| 9020 | CEFBS_None, // X86SETTM |
| 9021 | CEFBS_None, // X86SLLI_B |
| 9022 | CEFBS_IsLA64, // X86SLLI_D |
| 9023 | CEFBS_None, // X86SLLI_H |
| 9024 | CEFBS_None, // X86SLLI_W |
| 9025 | CEFBS_None, // X86SLL_B |
| 9026 | CEFBS_IsLA64, // X86SLL_D |
| 9027 | CEFBS_None, // X86SLL_H |
| 9028 | CEFBS_None, // X86SLL_W |
| 9029 | CEFBS_None, // X86SRAI_B |
| 9030 | CEFBS_IsLA64, // X86SRAI_D |
| 9031 | CEFBS_None, // X86SRAI_H |
| 9032 | CEFBS_None, // X86SRAI_W |
| 9033 | CEFBS_None, // X86SRA_B |
| 9034 | CEFBS_IsLA64, // X86SRA_D |
| 9035 | CEFBS_None, // X86SRA_H |
| 9036 | CEFBS_None, // X86SRA_W |
| 9037 | CEFBS_None, // X86SRLI_B |
| 9038 | CEFBS_IsLA64, // X86SRLI_D |
| 9039 | CEFBS_None, // X86SRLI_H |
| 9040 | CEFBS_None, // X86SRLI_W |
| 9041 | CEFBS_None, // X86SRL_B |
| 9042 | CEFBS_IsLA64, // X86SRL_D |
| 9043 | CEFBS_None, // X86SRL_H |
| 9044 | CEFBS_None, // X86SRL_W |
| 9045 | CEFBS_None, // X86SUB_B |
| 9046 | CEFBS_IsLA64, // X86SUB_D |
| 9047 | CEFBS_IsLA64, // X86SUB_DU |
| 9048 | CEFBS_None, // X86SUB_H |
| 9049 | CEFBS_None, // X86SUB_W |
| 9050 | CEFBS_IsLA64, // X86SUB_WU |
| 9051 | CEFBS_None, // X86XOR_B |
| 9052 | CEFBS_IsLA64, // X86XOR_D |
| 9053 | CEFBS_None, // X86XOR_H |
| 9054 | CEFBS_None, // X86XOR_W |
| 9055 | CEFBS_None, // XOR |
| 9056 | CEFBS_None, // XORI |
| 9057 | CEFBS_None, // XVABSD_B |
| 9058 | CEFBS_None, // XVABSD_BU |
| 9059 | CEFBS_None, // XVABSD_D |
| 9060 | CEFBS_None, // XVABSD_DU |
| 9061 | CEFBS_None, // XVABSD_H |
| 9062 | CEFBS_None, // XVABSD_HU |
| 9063 | CEFBS_None, // XVABSD_W |
| 9064 | CEFBS_None, // XVABSD_WU |
| 9065 | CEFBS_None, // XVADDA_B |
| 9066 | CEFBS_None, // XVADDA_D |
| 9067 | CEFBS_None, // XVADDA_H |
| 9068 | CEFBS_None, // XVADDA_W |
| 9069 | CEFBS_None, // XVADDI_BU |
| 9070 | CEFBS_None, // XVADDI_DU |
| 9071 | CEFBS_None, // XVADDI_HU |
| 9072 | CEFBS_None, // XVADDI_WU |
| 9073 | CEFBS_None, // XVADDWEV_D_W |
| 9074 | CEFBS_None, // XVADDWEV_D_WU |
| 9075 | CEFBS_None, // XVADDWEV_D_WU_W |
| 9076 | CEFBS_None, // XVADDWEV_H_B |
| 9077 | CEFBS_None, // XVADDWEV_H_BU |
| 9078 | CEFBS_None, // XVADDWEV_H_BU_B |
| 9079 | CEFBS_None, // XVADDWEV_Q_D |
| 9080 | CEFBS_None, // XVADDWEV_Q_DU |
| 9081 | CEFBS_None, // XVADDWEV_Q_DU_D |
| 9082 | CEFBS_None, // XVADDWEV_W_H |
| 9083 | CEFBS_None, // XVADDWEV_W_HU |
| 9084 | CEFBS_None, // XVADDWEV_W_HU_H |
| 9085 | CEFBS_None, // XVADDWOD_D_W |
| 9086 | CEFBS_None, // XVADDWOD_D_WU |
| 9087 | CEFBS_None, // XVADDWOD_D_WU_W |
| 9088 | CEFBS_None, // XVADDWOD_H_B |
| 9089 | CEFBS_None, // XVADDWOD_H_BU |
| 9090 | CEFBS_None, // XVADDWOD_H_BU_B |
| 9091 | CEFBS_None, // XVADDWOD_Q_D |
| 9092 | CEFBS_None, // XVADDWOD_Q_DU |
| 9093 | CEFBS_None, // XVADDWOD_Q_DU_D |
| 9094 | CEFBS_None, // XVADDWOD_W_H |
| 9095 | CEFBS_None, // XVADDWOD_W_HU |
| 9096 | CEFBS_None, // XVADDWOD_W_HU_H |
| 9097 | CEFBS_None, // XVADD_B |
| 9098 | CEFBS_None, // XVADD_D |
| 9099 | CEFBS_None, // XVADD_H |
| 9100 | CEFBS_None, // XVADD_Q |
| 9101 | CEFBS_None, // XVADD_W |
| 9102 | CEFBS_None, // XVANDI_B |
| 9103 | CEFBS_None, // XVANDN_V |
| 9104 | CEFBS_None, // XVAND_V |
| 9105 | CEFBS_None, // XVAVGR_B |
| 9106 | CEFBS_None, // XVAVGR_BU |
| 9107 | CEFBS_None, // XVAVGR_D |
| 9108 | CEFBS_None, // XVAVGR_DU |
| 9109 | CEFBS_None, // XVAVGR_H |
| 9110 | CEFBS_None, // XVAVGR_HU |
| 9111 | CEFBS_None, // XVAVGR_W |
| 9112 | CEFBS_None, // XVAVGR_WU |
| 9113 | CEFBS_None, // XVAVG_B |
| 9114 | CEFBS_None, // XVAVG_BU |
| 9115 | CEFBS_None, // XVAVG_D |
| 9116 | CEFBS_None, // XVAVG_DU |
| 9117 | CEFBS_None, // XVAVG_H |
| 9118 | CEFBS_None, // XVAVG_HU |
| 9119 | CEFBS_None, // XVAVG_W |
| 9120 | CEFBS_None, // XVAVG_WU |
| 9121 | CEFBS_None, // XVBITCLRI_B |
| 9122 | CEFBS_None, // XVBITCLRI_D |
| 9123 | CEFBS_None, // XVBITCLRI_H |
| 9124 | CEFBS_None, // XVBITCLRI_W |
| 9125 | CEFBS_None, // XVBITCLR_B |
| 9126 | CEFBS_None, // XVBITCLR_D |
| 9127 | CEFBS_None, // XVBITCLR_H |
| 9128 | CEFBS_None, // XVBITCLR_W |
| 9129 | CEFBS_None, // XVBITREVI_B |
| 9130 | CEFBS_None, // XVBITREVI_D |
| 9131 | CEFBS_None, // XVBITREVI_H |
| 9132 | CEFBS_None, // XVBITREVI_W |
| 9133 | CEFBS_None, // XVBITREV_B |
| 9134 | CEFBS_None, // XVBITREV_D |
| 9135 | CEFBS_None, // XVBITREV_H |
| 9136 | CEFBS_None, // XVBITREV_W |
| 9137 | CEFBS_None, // XVBITSELI_B |
| 9138 | CEFBS_None, // XVBITSEL_V |
| 9139 | CEFBS_None, // XVBITSETI_B |
| 9140 | CEFBS_None, // XVBITSETI_D |
| 9141 | CEFBS_None, // XVBITSETI_H |
| 9142 | CEFBS_None, // XVBITSETI_W |
| 9143 | CEFBS_None, // XVBITSET_B |
| 9144 | CEFBS_None, // XVBITSET_D |
| 9145 | CEFBS_None, // XVBITSET_H |
| 9146 | CEFBS_None, // XVBITSET_W |
| 9147 | CEFBS_None, // XVBSLL_V |
| 9148 | CEFBS_None, // XVBSRL_V |
| 9149 | CEFBS_None, // XVCLO_B |
| 9150 | CEFBS_None, // XVCLO_D |
| 9151 | CEFBS_None, // XVCLO_H |
| 9152 | CEFBS_None, // XVCLO_W |
| 9153 | CEFBS_None, // XVCLZ_B |
| 9154 | CEFBS_None, // XVCLZ_D |
| 9155 | CEFBS_None, // XVCLZ_H |
| 9156 | CEFBS_None, // XVCLZ_W |
| 9157 | CEFBS_None, // XVDIV_B |
| 9158 | CEFBS_None, // XVDIV_BU |
| 9159 | CEFBS_None, // XVDIV_D |
| 9160 | CEFBS_None, // XVDIV_DU |
| 9161 | CEFBS_None, // XVDIV_H |
| 9162 | CEFBS_None, // XVDIV_HU |
| 9163 | CEFBS_None, // XVDIV_W |
| 9164 | CEFBS_None, // XVDIV_WU |
| 9165 | CEFBS_None, // XVEXTH_DU_WU |
| 9166 | CEFBS_None, // XVEXTH_D_W |
| 9167 | CEFBS_None, // XVEXTH_HU_BU |
| 9168 | CEFBS_None, // XVEXTH_H_B |
| 9169 | CEFBS_None, // XVEXTH_QU_DU |
| 9170 | CEFBS_None, // XVEXTH_Q_D |
| 9171 | CEFBS_None, // XVEXTH_WU_HU |
| 9172 | CEFBS_None, // XVEXTH_W_H |
| 9173 | CEFBS_None, // XVEXTL_QU_DU |
| 9174 | CEFBS_None, // XVEXTL_Q_D |
| 9175 | CEFBS_None, // XVEXTRINS_B |
| 9176 | CEFBS_None, // XVEXTRINS_D |
| 9177 | CEFBS_None, // XVEXTRINS_H |
| 9178 | CEFBS_None, // XVEXTRINS_W |
| 9179 | CEFBS_None, // XVFADD_D |
| 9180 | CEFBS_None, // XVFADD_S |
| 9181 | CEFBS_None, // XVFCLASS_D |
| 9182 | CEFBS_None, // XVFCLASS_S |
| 9183 | CEFBS_None, // XVFCMP_CAF_D |
| 9184 | CEFBS_None, // XVFCMP_CAF_S |
| 9185 | CEFBS_None, // XVFCMP_CEQ_D |
| 9186 | CEFBS_None, // XVFCMP_CEQ_S |
| 9187 | CEFBS_None, // XVFCMP_CLE_D |
| 9188 | CEFBS_None, // XVFCMP_CLE_S |
| 9189 | CEFBS_None, // XVFCMP_CLT_D |
| 9190 | CEFBS_None, // XVFCMP_CLT_S |
| 9191 | CEFBS_None, // XVFCMP_CNE_D |
| 9192 | CEFBS_None, // XVFCMP_CNE_S |
| 9193 | CEFBS_None, // XVFCMP_COR_D |
| 9194 | CEFBS_None, // XVFCMP_COR_S |
| 9195 | CEFBS_None, // XVFCMP_CUEQ_D |
| 9196 | CEFBS_None, // XVFCMP_CUEQ_S |
| 9197 | CEFBS_None, // XVFCMP_CULE_D |
| 9198 | CEFBS_None, // XVFCMP_CULE_S |
| 9199 | CEFBS_None, // XVFCMP_CULT_D |
| 9200 | CEFBS_None, // XVFCMP_CULT_S |
| 9201 | CEFBS_None, // XVFCMP_CUNE_D |
| 9202 | CEFBS_None, // XVFCMP_CUNE_S |
| 9203 | CEFBS_None, // XVFCMP_CUN_D |
| 9204 | CEFBS_None, // XVFCMP_CUN_S |
| 9205 | CEFBS_None, // XVFCMP_SAF_D |
| 9206 | CEFBS_None, // XVFCMP_SAF_S |
| 9207 | CEFBS_None, // XVFCMP_SEQ_D |
| 9208 | CEFBS_None, // XVFCMP_SEQ_S |
| 9209 | CEFBS_None, // XVFCMP_SLE_D |
| 9210 | CEFBS_None, // XVFCMP_SLE_S |
| 9211 | CEFBS_None, // XVFCMP_SLT_D |
| 9212 | CEFBS_None, // XVFCMP_SLT_S |
| 9213 | CEFBS_None, // XVFCMP_SNE_D |
| 9214 | CEFBS_None, // XVFCMP_SNE_S |
| 9215 | CEFBS_None, // XVFCMP_SOR_D |
| 9216 | CEFBS_None, // XVFCMP_SOR_S |
| 9217 | CEFBS_None, // XVFCMP_SUEQ_D |
| 9218 | CEFBS_None, // XVFCMP_SUEQ_S |
| 9219 | CEFBS_None, // XVFCMP_SULE_D |
| 9220 | CEFBS_None, // XVFCMP_SULE_S |
| 9221 | CEFBS_None, // XVFCMP_SULT_D |
| 9222 | CEFBS_None, // XVFCMP_SULT_S |
| 9223 | CEFBS_None, // XVFCMP_SUNE_D |
| 9224 | CEFBS_None, // XVFCMP_SUNE_S |
| 9225 | CEFBS_None, // XVFCMP_SUN_D |
| 9226 | CEFBS_None, // XVFCMP_SUN_S |
| 9227 | CEFBS_None, // XVFCVTH_D_S |
| 9228 | CEFBS_None, // XVFCVTH_S_H |
| 9229 | CEFBS_None, // XVFCVTL_D_S |
| 9230 | CEFBS_None, // XVFCVTL_S_H |
| 9231 | CEFBS_None, // XVFCVT_H_S |
| 9232 | CEFBS_None, // XVFCVT_S_D |
| 9233 | CEFBS_None, // XVFDIV_D |
| 9234 | CEFBS_None, // XVFDIV_S |
| 9235 | CEFBS_None, // XVFFINTH_D_W |
| 9236 | CEFBS_None, // XVFFINTL_D_W |
| 9237 | CEFBS_None, // XVFFINT_D_L |
| 9238 | CEFBS_None, // XVFFINT_D_LU |
| 9239 | CEFBS_None, // XVFFINT_S_L |
| 9240 | CEFBS_None, // XVFFINT_S_W |
| 9241 | CEFBS_None, // XVFFINT_S_WU |
| 9242 | CEFBS_None, // XVFLOGB_D |
| 9243 | CEFBS_None, // XVFLOGB_S |
| 9244 | CEFBS_None, // XVFMADD_D |
| 9245 | CEFBS_None, // XVFMADD_S |
| 9246 | CEFBS_None, // XVFMAXA_D |
| 9247 | CEFBS_None, // XVFMAXA_S |
| 9248 | CEFBS_None, // XVFMAX_D |
| 9249 | CEFBS_None, // XVFMAX_S |
| 9250 | CEFBS_None, // XVFMINA_D |
| 9251 | CEFBS_None, // XVFMINA_S |
| 9252 | CEFBS_None, // XVFMIN_D |
| 9253 | CEFBS_None, // XVFMIN_S |
| 9254 | CEFBS_None, // XVFMSUB_D |
| 9255 | CEFBS_None, // XVFMSUB_S |
| 9256 | CEFBS_None, // XVFMUL_D |
| 9257 | CEFBS_None, // XVFMUL_S |
| 9258 | CEFBS_None, // XVFNMADD_D |
| 9259 | CEFBS_None, // XVFNMADD_S |
| 9260 | CEFBS_None, // XVFNMSUB_D |
| 9261 | CEFBS_None, // XVFNMSUB_S |
| 9262 | CEFBS_None, // XVFRECIPE_D |
| 9263 | CEFBS_None, // XVFRECIPE_S |
| 9264 | CEFBS_None, // XVFRECIP_D |
| 9265 | CEFBS_None, // XVFRECIP_S |
| 9266 | CEFBS_None, // XVFRINTRM_D |
| 9267 | CEFBS_None, // XVFRINTRM_S |
| 9268 | CEFBS_None, // XVFRINTRNE_D |
| 9269 | CEFBS_None, // XVFRINTRNE_S |
| 9270 | CEFBS_None, // XVFRINTRP_D |
| 9271 | CEFBS_None, // XVFRINTRP_S |
| 9272 | CEFBS_None, // XVFRINTRZ_D |
| 9273 | CEFBS_None, // XVFRINTRZ_S |
| 9274 | CEFBS_None, // XVFRINT_D |
| 9275 | CEFBS_None, // XVFRINT_S |
| 9276 | CEFBS_None, // XVFRSQRTE_D |
| 9277 | CEFBS_None, // XVFRSQRTE_S |
| 9278 | CEFBS_None, // XVFRSQRT_D |
| 9279 | CEFBS_None, // XVFRSQRT_S |
| 9280 | CEFBS_None, // XVFRSTPI_B |
| 9281 | CEFBS_None, // XVFRSTPI_H |
| 9282 | CEFBS_None, // XVFRSTP_B |
| 9283 | CEFBS_None, // XVFRSTP_H |
| 9284 | CEFBS_None, // XVFSQRT_D |
| 9285 | CEFBS_None, // XVFSQRT_S |
| 9286 | CEFBS_None, // XVFSUB_D |
| 9287 | CEFBS_None, // XVFSUB_S |
| 9288 | CEFBS_None, // XVFTINTH_L_S |
| 9289 | CEFBS_None, // XVFTINTL_L_S |
| 9290 | CEFBS_None, // XVFTINTRMH_L_S |
| 9291 | CEFBS_None, // XVFTINTRML_L_S |
| 9292 | CEFBS_None, // XVFTINTRM_L_D |
| 9293 | CEFBS_None, // XVFTINTRM_W_D |
| 9294 | CEFBS_None, // XVFTINTRM_W_S |
| 9295 | CEFBS_None, // XVFTINTRNEH_L_S |
| 9296 | CEFBS_None, // XVFTINTRNEL_L_S |
| 9297 | CEFBS_None, // XVFTINTRNE_L_D |
| 9298 | CEFBS_None, // XVFTINTRNE_W_D |
| 9299 | CEFBS_None, // XVFTINTRNE_W_S |
| 9300 | CEFBS_None, // XVFTINTRPH_L_S |
| 9301 | CEFBS_None, // XVFTINTRPL_L_S |
| 9302 | CEFBS_None, // XVFTINTRP_L_D |
| 9303 | CEFBS_None, // XVFTINTRP_W_D |
| 9304 | CEFBS_None, // XVFTINTRP_W_S |
| 9305 | CEFBS_None, // XVFTINTRZH_L_S |
| 9306 | CEFBS_None, // XVFTINTRZL_L_S |
| 9307 | CEFBS_None, // XVFTINTRZ_LU_D |
| 9308 | CEFBS_None, // XVFTINTRZ_L_D |
| 9309 | CEFBS_None, // XVFTINTRZ_WU_S |
| 9310 | CEFBS_None, // XVFTINTRZ_W_D |
| 9311 | CEFBS_None, // XVFTINTRZ_W_S |
| 9312 | CEFBS_None, // XVFTINT_LU_D |
| 9313 | CEFBS_None, // XVFTINT_L_D |
| 9314 | CEFBS_None, // XVFTINT_WU_S |
| 9315 | CEFBS_None, // XVFTINT_W_D |
| 9316 | CEFBS_None, // XVFTINT_W_S |
| 9317 | CEFBS_None, // XVHADDW_DU_WU |
| 9318 | CEFBS_None, // XVHADDW_D_W |
| 9319 | CEFBS_None, // XVHADDW_HU_BU |
| 9320 | CEFBS_None, // XVHADDW_H_B |
| 9321 | CEFBS_None, // XVHADDW_QU_DU |
| 9322 | CEFBS_None, // XVHADDW_Q_D |
| 9323 | CEFBS_None, // XVHADDW_WU_HU |
| 9324 | CEFBS_None, // XVHADDW_W_H |
| 9325 | CEFBS_None, // XVHSELI_D |
| 9326 | CEFBS_None, // XVHSUBW_DU_WU |
| 9327 | CEFBS_None, // XVHSUBW_D_W |
| 9328 | CEFBS_None, // XVHSUBW_HU_BU |
| 9329 | CEFBS_None, // XVHSUBW_H_B |
| 9330 | CEFBS_None, // XVHSUBW_QU_DU |
| 9331 | CEFBS_None, // XVHSUBW_Q_D |
| 9332 | CEFBS_None, // XVHSUBW_WU_HU |
| 9333 | CEFBS_None, // XVHSUBW_W_H |
| 9334 | CEFBS_None, // XVILVH_B |
| 9335 | CEFBS_None, // XVILVH_D |
| 9336 | CEFBS_None, // XVILVH_H |
| 9337 | CEFBS_None, // XVILVH_W |
| 9338 | CEFBS_None, // XVILVL_B |
| 9339 | CEFBS_None, // XVILVL_D |
| 9340 | CEFBS_None, // XVILVL_H |
| 9341 | CEFBS_None, // XVILVL_W |
| 9342 | CEFBS_None, // XVINSGR2VR_D |
| 9343 | CEFBS_None, // XVINSGR2VR_W |
| 9344 | CEFBS_None, // XVINSVE0_D |
| 9345 | CEFBS_None, // XVINSVE0_W |
| 9346 | CEFBS_None, // XVLD |
| 9347 | CEFBS_None, // XVLDI |
| 9348 | CEFBS_None, // XVLDREPL_B |
| 9349 | CEFBS_None, // XVLDREPL_D |
| 9350 | CEFBS_None, // XVLDREPL_H |
| 9351 | CEFBS_None, // XVLDREPL_W |
| 9352 | CEFBS_None, // XVLDX |
| 9353 | CEFBS_None, // XVMADDWEV_D_W |
| 9354 | CEFBS_None, // XVMADDWEV_D_WU |
| 9355 | CEFBS_None, // XVMADDWEV_D_WU_W |
| 9356 | CEFBS_None, // XVMADDWEV_H_B |
| 9357 | CEFBS_None, // XVMADDWEV_H_BU |
| 9358 | CEFBS_None, // XVMADDWEV_H_BU_B |
| 9359 | CEFBS_None, // XVMADDWEV_Q_D |
| 9360 | CEFBS_None, // XVMADDWEV_Q_DU |
| 9361 | CEFBS_None, // XVMADDWEV_Q_DU_D |
| 9362 | CEFBS_None, // XVMADDWEV_W_H |
| 9363 | CEFBS_None, // XVMADDWEV_W_HU |
| 9364 | CEFBS_None, // XVMADDWEV_W_HU_H |
| 9365 | CEFBS_None, // XVMADDWOD_D_W |
| 9366 | CEFBS_None, // XVMADDWOD_D_WU |
| 9367 | CEFBS_None, // XVMADDWOD_D_WU_W |
| 9368 | CEFBS_None, // XVMADDWOD_H_B |
| 9369 | CEFBS_None, // XVMADDWOD_H_BU |
| 9370 | CEFBS_None, // XVMADDWOD_H_BU_B |
| 9371 | CEFBS_None, // XVMADDWOD_Q_D |
| 9372 | CEFBS_None, // XVMADDWOD_Q_DU |
| 9373 | CEFBS_None, // XVMADDWOD_Q_DU_D |
| 9374 | CEFBS_None, // XVMADDWOD_W_H |
| 9375 | CEFBS_None, // XVMADDWOD_W_HU |
| 9376 | CEFBS_None, // XVMADDWOD_W_HU_H |
| 9377 | CEFBS_None, // XVMADD_B |
| 9378 | CEFBS_None, // XVMADD_D |
| 9379 | CEFBS_None, // XVMADD_H |
| 9380 | CEFBS_None, // XVMADD_W |
| 9381 | CEFBS_None, // XVMAXI_B |
| 9382 | CEFBS_None, // XVMAXI_BU |
| 9383 | CEFBS_None, // XVMAXI_D |
| 9384 | CEFBS_None, // XVMAXI_DU |
| 9385 | CEFBS_None, // XVMAXI_H |
| 9386 | CEFBS_None, // XVMAXI_HU |
| 9387 | CEFBS_None, // XVMAXI_W |
| 9388 | CEFBS_None, // XVMAXI_WU |
| 9389 | CEFBS_None, // XVMAX_B |
| 9390 | CEFBS_None, // XVMAX_BU |
| 9391 | CEFBS_None, // XVMAX_D |
| 9392 | CEFBS_None, // XVMAX_DU |
| 9393 | CEFBS_None, // XVMAX_H |
| 9394 | CEFBS_None, // XVMAX_HU |
| 9395 | CEFBS_None, // XVMAX_W |
| 9396 | CEFBS_None, // XVMAX_WU |
| 9397 | CEFBS_None, // XVMINI_B |
| 9398 | CEFBS_None, // XVMINI_BU |
| 9399 | CEFBS_None, // XVMINI_D |
| 9400 | CEFBS_None, // XVMINI_DU |
| 9401 | CEFBS_None, // XVMINI_H |
| 9402 | CEFBS_None, // XVMINI_HU |
| 9403 | CEFBS_None, // XVMINI_W |
| 9404 | CEFBS_None, // XVMINI_WU |
| 9405 | CEFBS_None, // XVMIN_B |
| 9406 | CEFBS_None, // XVMIN_BU |
| 9407 | CEFBS_None, // XVMIN_D |
| 9408 | CEFBS_None, // XVMIN_DU |
| 9409 | CEFBS_None, // XVMIN_H |
| 9410 | CEFBS_None, // XVMIN_HU |
| 9411 | CEFBS_None, // XVMIN_W |
| 9412 | CEFBS_None, // XVMIN_WU |
| 9413 | CEFBS_None, // XVMOD_B |
| 9414 | CEFBS_None, // XVMOD_BU |
| 9415 | CEFBS_None, // XVMOD_D |
| 9416 | CEFBS_None, // XVMOD_DU |
| 9417 | CEFBS_None, // XVMOD_H |
| 9418 | CEFBS_None, // XVMOD_HU |
| 9419 | CEFBS_None, // XVMOD_W |
| 9420 | CEFBS_None, // XVMOD_WU |
| 9421 | CEFBS_None, // XVMSKGEZ_B |
| 9422 | CEFBS_None, // XVMSKLTZ_B |
| 9423 | CEFBS_None, // XVMSKLTZ_D |
| 9424 | CEFBS_None, // XVMSKLTZ_H |
| 9425 | CEFBS_None, // XVMSKLTZ_W |
| 9426 | CEFBS_None, // XVMSKNZ_B |
| 9427 | CEFBS_None, // XVMSUB_B |
| 9428 | CEFBS_None, // XVMSUB_D |
| 9429 | CEFBS_None, // XVMSUB_H |
| 9430 | CEFBS_None, // XVMSUB_W |
| 9431 | CEFBS_None, // XVMUH_B |
| 9432 | CEFBS_None, // XVMUH_BU |
| 9433 | CEFBS_None, // XVMUH_D |
| 9434 | CEFBS_None, // XVMUH_DU |
| 9435 | CEFBS_None, // XVMUH_H |
| 9436 | CEFBS_None, // XVMUH_HU |
| 9437 | CEFBS_None, // XVMUH_W |
| 9438 | CEFBS_None, // XVMUH_WU |
| 9439 | CEFBS_None, // XVMULWEV_D_W |
| 9440 | CEFBS_None, // XVMULWEV_D_WU |
| 9441 | CEFBS_None, // XVMULWEV_D_WU_W |
| 9442 | CEFBS_None, // XVMULWEV_H_B |
| 9443 | CEFBS_None, // XVMULWEV_H_BU |
| 9444 | CEFBS_None, // XVMULWEV_H_BU_B |
| 9445 | CEFBS_None, // XVMULWEV_Q_D |
| 9446 | CEFBS_None, // XVMULWEV_Q_DU |
| 9447 | CEFBS_None, // XVMULWEV_Q_DU_D |
| 9448 | CEFBS_None, // XVMULWEV_W_H |
| 9449 | CEFBS_None, // XVMULWEV_W_HU |
| 9450 | CEFBS_None, // XVMULWEV_W_HU_H |
| 9451 | CEFBS_None, // XVMULWOD_D_W |
| 9452 | CEFBS_None, // XVMULWOD_D_WU |
| 9453 | CEFBS_None, // XVMULWOD_D_WU_W |
| 9454 | CEFBS_None, // XVMULWOD_H_B |
| 9455 | CEFBS_None, // XVMULWOD_H_BU |
| 9456 | CEFBS_None, // XVMULWOD_H_BU_B |
| 9457 | CEFBS_None, // XVMULWOD_Q_D |
| 9458 | CEFBS_None, // XVMULWOD_Q_DU |
| 9459 | CEFBS_None, // XVMULWOD_Q_DU_D |
| 9460 | CEFBS_None, // XVMULWOD_W_H |
| 9461 | CEFBS_None, // XVMULWOD_W_HU |
| 9462 | CEFBS_None, // XVMULWOD_W_HU_H |
| 9463 | CEFBS_None, // XVMUL_B |
| 9464 | CEFBS_None, // XVMUL_D |
| 9465 | CEFBS_None, // XVMUL_H |
| 9466 | CEFBS_None, // XVMUL_W |
| 9467 | CEFBS_None, // XVNEG_B |
| 9468 | CEFBS_None, // XVNEG_D |
| 9469 | CEFBS_None, // XVNEG_H |
| 9470 | CEFBS_None, // XVNEG_W |
| 9471 | CEFBS_None, // XVNORI_B |
| 9472 | CEFBS_None, // XVNOR_V |
| 9473 | CEFBS_None, // XVORI_B |
| 9474 | CEFBS_None, // XVORN_V |
| 9475 | CEFBS_None, // XVOR_V |
| 9476 | CEFBS_None, // XVPACKEV_B |
| 9477 | CEFBS_None, // XVPACKEV_D |
| 9478 | CEFBS_None, // XVPACKEV_H |
| 9479 | CEFBS_None, // XVPACKEV_W |
| 9480 | CEFBS_None, // XVPACKOD_B |
| 9481 | CEFBS_None, // XVPACKOD_D |
| 9482 | CEFBS_None, // XVPACKOD_H |
| 9483 | CEFBS_None, // XVPACKOD_W |
| 9484 | CEFBS_None, // XVPCNT_B |
| 9485 | CEFBS_None, // XVPCNT_D |
| 9486 | CEFBS_None, // XVPCNT_H |
| 9487 | CEFBS_None, // XVPCNT_W |
| 9488 | CEFBS_None, // XVPERMI_D |
| 9489 | CEFBS_None, // XVPERMI_Q |
| 9490 | CEFBS_None, // XVPERMI_W |
| 9491 | CEFBS_None, // XVPERM_W |
| 9492 | CEFBS_None, // XVPICKEV_B |
| 9493 | CEFBS_None, // XVPICKEV_D |
| 9494 | CEFBS_None, // XVPICKEV_H |
| 9495 | CEFBS_None, // XVPICKEV_W |
| 9496 | CEFBS_None, // XVPICKOD_B |
| 9497 | CEFBS_None, // XVPICKOD_D |
| 9498 | CEFBS_None, // XVPICKOD_H |
| 9499 | CEFBS_None, // XVPICKOD_W |
| 9500 | CEFBS_None, // XVPICKVE2GR_D |
| 9501 | CEFBS_None, // XVPICKVE2GR_DU |
| 9502 | CEFBS_None, // XVPICKVE2GR_W |
| 9503 | CEFBS_None, // XVPICKVE2GR_WU |
| 9504 | CEFBS_None, // XVPICKVE_D |
| 9505 | CEFBS_None, // XVPICKVE_W |
| 9506 | CEFBS_None, // XVREPL128VEI_B |
| 9507 | CEFBS_None, // XVREPL128VEI_D |
| 9508 | CEFBS_None, // XVREPL128VEI_H |
| 9509 | CEFBS_None, // XVREPL128VEI_W |
| 9510 | CEFBS_None, // XVREPLGR2VR_B |
| 9511 | CEFBS_None, // XVREPLGR2VR_D |
| 9512 | CEFBS_None, // XVREPLGR2VR_H |
| 9513 | CEFBS_None, // XVREPLGR2VR_W |
| 9514 | CEFBS_None, // XVREPLVE0_B |
| 9515 | CEFBS_None, // XVREPLVE0_D |
| 9516 | CEFBS_None, // XVREPLVE0_H |
| 9517 | CEFBS_None, // XVREPLVE0_Q |
| 9518 | CEFBS_None, // XVREPLVE0_W |
| 9519 | CEFBS_None, // XVREPLVE_B |
| 9520 | CEFBS_None, // XVREPLVE_D |
| 9521 | CEFBS_None, // XVREPLVE_H |
| 9522 | CEFBS_None, // XVREPLVE_W |
| 9523 | CEFBS_None, // XVROTRI_B |
| 9524 | CEFBS_None, // XVROTRI_D |
| 9525 | CEFBS_None, // XVROTRI_H |
| 9526 | CEFBS_None, // XVROTRI_W |
| 9527 | CEFBS_None, // XVROTR_B |
| 9528 | CEFBS_None, // XVROTR_D |
| 9529 | CEFBS_None, // XVROTR_H |
| 9530 | CEFBS_None, // XVROTR_W |
| 9531 | CEFBS_None, // XVSADD_B |
| 9532 | CEFBS_None, // XVSADD_BU |
| 9533 | CEFBS_None, // XVSADD_D |
| 9534 | CEFBS_None, // XVSADD_DU |
| 9535 | CEFBS_None, // XVSADD_H |
| 9536 | CEFBS_None, // XVSADD_HU |
| 9537 | CEFBS_None, // XVSADD_W |
| 9538 | CEFBS_None, // XVSADD_WU |
| 9539 | CEFBS_None, // XVSAT_B |
| 9540 | CEFBS_None, // XVSAT_BU |
| 9541 | CEFBS_None, // XVSAT_D |
| 9542 | CEFBS_None, // XVSAT_DU |
| 9543 | CEFBS_None, // XVSAT_H |
| 9544 | CEFBS_None, // XVSAT_HU |
| 9545 | CEFBS_None, // XVSAT_W |
| 9546 | CEFBS_None, // XVSAT_WU |
| 9547 | CEFBS_None, // XVSEQI_B |
| 9548 | CEFBS_None, // XVSEQI_D |
| 9549 | CEFBS_None, // XVSEQI_H |
| 9550 | CEFBS_None, // XVSEQI_W |
| 9551 | CEFBS_None, // XVSEQ_B |
| 9552 | CEFBS_None, // XVSEQ_D |
| 9553 | CEFBS_None, // XVSEQ_H |
| 9554 | CEFBS_None, // XVSEQ_W |
| 9555 | CEFBS_None, // XVSETALLNEZ_B |
| 9556 | CEFBS_None, // XVSETALLNEZ_D |
| 9557 | CEFBS_None, // XVSETALLNEZ_H |
| 9558 | CEFBS_None, // XVSETALLNEZ_W |
| 9559 | CEFBS_None, // XVSETANYEQZ_B |
| 9560 | CEFBS_None, // XVSETANYEQZ_D |
| 9561 | CEFBS_None, // XVSETANYEQZ_H |
| 9562 | CEFBS_None, // XVSETANYEQZ_W |
| 9563 | CEFBS_None, // XVSETEQZ_V |
| 9564 | CEFBS_None, // XVSETNEZ_V |
| 9565 | CEFBS_None, // XVSHUF4I_B |
| 9566 | CEFBS_None, // XVSHUF4I_D |
| 9567 | CEFBS_None, // XVSHUF4I_H |
| 9568 | CEFBS_None, // XVSHUF4I_W |
| 9569 | CEFBS_None, // XVSHUF_B |
| 9570 | CEFBS_None, // XVSHUF_D |
| 9571 | CEFBS_None, // XVSHUF_H |
| 9572 | CEFBS_None, // XVSHUF_W |
| 9573 | CEFBS_None, // XVSIGNCOV_B |
| 9574 | CEFBS_None, // XVSIGNCOV_D |
| 9575 | CEFBS_None, // XVSIGNCOV_H |
| 9576 | CEFBS_None, // XVSIGNCOV_W |
| 9577 | CEFBS_None, // XVSLEI_B |
| 9578 | CEFBS_None, // XVSLEI_BU |
| 9579 | CEFBS_None, // XVSLEI_D |
| 9580 | CEFBS_None, // XVSLEI_DU |
| 9581 | CEFBS_None, // XVSLEI_H |
| 9582 | CEFBS_None, // XVSLEI_HU |
| 9583 | CEFBS_None, // XVSLEI_W |
| 9584 | CEFBS_None, // XVSLEI_WU |
| 9585 | CEFBS_None, // XVSLE_B |
| 9586 | CEFBS_None, // XVSLE_BU |
| 9587 | CEFBS_None, // XVSLE_D |
| 9588 | CEFBS_None, // XVSLE_DU |
| 9589 | CEFBS_None, // XVSLE_H |
| 9590 | CEFBS_None, // XVSLE_HU |
| 9591 | CEFBS_None, // XVSLE_W |
| 9592 | CEFBS_None, // XVSLE_WU |
| 9593 | CEFBS_None, // XVSLLI_B |
| 9594 | CEFBS_None, // XVSLLI_D |
| 9595 | CEFBS_None, // XVSLLI_H |
| 9596 | CEFBS_None, // XVSLLI_W |
| 9597 | CEFBS_None, // XVSLLWIL_DU_WU |
| 9598 | CEFBS_None, // XVSLLWIL_D_W |
| 9599 | CEFBS_None, // XVSLLWIL_HU_BU |
| 9600 | CEFBS_None, // XVSLLWIL_H_B |
| 9601 | CEFBS_None, // XVSLLWIL_WU_HU |
| 9602 | CEFBS_None, // XVSLLWIL_W_H |
| 9603 | CEFBS_None, // XVSLL_B |
| 9604 | CEFBS_None, // XVSLL_D |
| 9605 | CEFBS_None, // XVSLL_H |
| 9606 | CEFBS_None, // XVSLL_W |
| 9607 | CEFBS_None, // XVSLTI_B |
| 9608 | CEFBS_None, // XVSLTI_BU |
| 9609 | CEFBS_None, // XVSLTI_D |
| 9610 | CEFBS_None, // XVSLTI_DU |
| 9611 | CEFBS_None, // XVSLTI_H |
| 9612 | CEFBS_None, // XVSLTI_HU |
| 9613 | CEFBS_None, // XVSLTI_W |
| 9614 | CEFBS_None, // XVSLTI_WU |
| 9615 | CEFBS_None, // XVSLT_B |
| 9616 | CEFBS_None, // XVSLT_BU |
| 9617 | CEFBS_None, // XVSLT_D |
| 9618 | CEFBS_None, // XVSLT_DU |
| 9619 | CEFBS_None, // XVSLT_H |
| 9620 | CEFBS_None, // XVSLT_HU |
| 9621 | CEFBS_None, // XVSLT_W |
| 9622 | CEFBS_None, // XVSLT_WU |
| 9623 | CEFBS_None, // XVSRAI_B |
| 9624 | CEFBS_None, // XVSRAI_D |
| 9625 | CEFBS_None, // XVSRAI_H |
| 9626 | CEFBS_None, // XVSRAI_W |
| 9627 | CEFBS_None, // XVSRANI_B_H |
| 9628 | CEFBS_None, // XVSRANI_D_Q |
| 9629 | CEFBS_None, // XVSRANI_H_W |
| 9630 | CEFBS_None, // XVSRANI_W_D |
| 9631 | CEFBS_None, // XVSRAN_B_H |
| 9632 | CEFBS_None, // XVSRAN_H_W |
| 9633 | CEFBS_None, // XVSRAN_W_D |
| 9634 | CEFBS_None, // XVSRARI_B |
| 9635 | CEFBS_None, // XVSRARI_D |
| 9636 | CEFBS_None, // XVSRARI_H |
| 9637 | CEFBS_None, // XVSRARI_W |
| 9638 | CEFBS_None, // XVSRARNI_B_H |
| 9639 | CEFBS_None, // XVSRARNI_D_Q |
| 9640 | CEFBS_None, // XVSRARNI_H_W |
| 9641 | CEFBS_None, // XVSRARNI_W_D |
| 9642 | CEFBS_None, // XVSRARN_B_H |
| 9643 | CEFBS_None, // XVSRARN_H_W |
| 9644 | CEFBS_None, // XVSRARN_W_D |
| 9645 | CEFBS_None, // XVSRAR_B |
| 9646 | CEFBS_None, // XVSRAR_D |
| 9647 | CEFBS_None, // XVSRAR_H |
| 9648 | CEFBS_None, // XVSRAR_W |
| 9649 | CEFBS_None, // XVSRA_B |
| 9650 | CEFBS_None, // XVSRA_D |
| 9651 | CEFBS_None, // XVSRA_H |
| 9652 | CEFBS_None, // XVSRA_W |
| 9653 | CEFBS_None, // XVSRLI_B |
| 9654 | CEFBS_None, // XVSRLI_D |
| 9655 | CEFBS_None, // XVSRLI_H |
| 9656 | CEFBS_None, // XVSRLI_W |
| 9657 | CEFBS_None, // XVSRLNI_B_H |
| 9658 | CEFBS_None, // XVSRLNI_D_Q |
| 9659 | CEFBS_None, // XVSRLNI_H_W |
| 9660 | CEFBS_None, // XVSRLNI_W_D |
| 9661 | CEFBS_None, // XVSRLN_B_H |
| 9662 | CEFBS_None, // XVSRLN_H_W |
| 9663 | CEFBS_None, // XVSRLN_W_D |
| 9664 | CEFBS_None, // XVSRLRI_B |
| 9665 | CEFBS_None, // XVSRLRI_D |
| 9666 | CEFBS_None, // XVSRLRI_H |
| 9667 | CEFBS_None, // XVSRLRI_W |
| 9668 | CEFBS_None, // XVSRLRNI_B_H |
| 9669 | CEFBS_None, // XVSRLRNI_D_Q |
| 9670 | CEFBS_None, // XVSRLRNI_H_W |
| 9671 | CEFBS_None, // XVSRLRNI_W_D |
| 9672 | CEFBS_None, // XVSRLRN_B_H |
| 9673 | CEFBS_None, // XVSRLRN_H_W |
| 9674 | CEFBS_None, // XVSRLRN_W_D |
| 9675 | CEFBS_None, // XVSRLR_B |
| 9676 | CEFBS_None, // XVSRLR_D |
| 9677 | CEFBS_None, // XVSRLR_H |
| 9678 | CEFBS_None, // XVSRLR_W |
| 9679 | CEFBS_None, // XVSRL_B |
| 9680 | CEFBS_None, // XVSRL_D |
| 9681 | CEFBS_None, // XVSRL_H |
| 9682 | CEFBS_None, // XVSRL_W |
| 9683 | CEFBS_None, // XVSSRANI_BU_H |
| 9684 | CEFBS_None, // XVSSRANI_B_H |
| 9685 | CEFBS_None, // XVSSRANI_DU_Q |
| 9686 | CEFBS_None, // XVSSRANI_D_Q |
| 9687 | CEFBS_None, // XVSSRANI_HU_W |
| 9688 | CEFBS_None, // XVSSRANI_H_W |
| 9689 | CEFBS_None, // XVSSRANI_WU_D |
| 9690 | CEFBS_None, // XVSSRANI_W_D |
| 9691 | CEFBS_None, // XVSSRAN_BU_H |
| 9692 | CEFBS_None, // XVSSRAN_B_H |
| 9693 | CEFBS_None, // XVSSRAN_HU_W |
| 9694 | CEFBS_None, // XVSSRAN_H_W |
| 9695 | CEFBS_None, // XVSSRAN_WU_D |
| 9696 | CEFBS_None, // XVSSRAN_W_D |
| 9697 | CEFBS_None, // XVSSRARNI_BU_H |
| 9698 | CEFBS_None, // XVSSRARNI_B_H |
| 9699 | CEFBS_None, // XVSSRARNI_DU_Q |
| 9700 | CEFBS_None, // XVSSRARNI_D_Q |
| 9701 | CEFBS_None, // XVSSRARNI_HU_W |
| 9702 | CEFBS_None, // XVSSRARNI_H_W |
| 9703 | CEFBS_None, // XVSSRARNI_WU_D |
| 9704 | CEFBS_None, // XVSSRARNI_W_D |
| 9705 | CEFBS_None, // XVSSRARN_BU_H |
| 9706 | CEFBS_None, // XVSSRARN_B_H |
| 9707 | CEFBS_None, // XVSSRARN_HU_W |
| 9708 | CEFBS_None, // XVSSRARN_H_W |
| 9709 | CEFBS_None, // XVSSRARN_WU_D |
| 9710 | CEFBS_None, // XVSSRARN_W_D |
| 9711 | CEFBS_None, // XVSSRLNI_BU_H |
| 9712 | CEFBS_None, // XVSSRLNI_B_H |
| 9713 | CEFBS_None, // XVSSRLNI_DU_Q |
| 9714 | CEFBS_None, // XVSSRLNI_D_Q |
| 9715 | CEFBS_None, // XVSSRLNI_HU_W |
| 9716 | CEFBS_None, // XVSSRLNI_H_W |
| 9717 | CEFBS_None, // XVSSRLNI_WU_D |
| 9718 | CEFBS_None, // XVSSRLNI_W_D |
| 9719 | CEFBS_None, // XVSSRLN_BU_H |
| 9720 | CEFBS_None, // XVSSRLN_B_H |
| 9721 | CEFBS_None, // XVSSRLN_HU_W |
| 9722 | CEFBS_None, // XVSSRLN_H_W |
| 9723 | CEFBS_None, // XVSSRLN_WU_D |
| 9724 | CEFBS_None, // XVSSRLN_W_D |
| 9725 | CEFBS_None, // XVSSRLRNI_BU_H |
| 9726 | CEFBS_None, // XVSSRLRNI_B_H |
| 9727 | CEFBS_None, // XVSSRLRNI_DU_Q |
| 9728 | CEFBS_None, // XVSSRLRNI_D_Q |
| 9729 | CEFBS_None, // XVSSRLRNI_HU_W |
| 9730 | CEFBS_None, // XVSSRLRNI_H_W |
| 9731 | CEFBS_None, // XVSSRLRNI_WU_D |
| 9732 | CEFBS_None, // XVSSRLRNI_W_D |
| 9733 | CEFBS_None, // XVSSRLRN_BU_H |
| 9734 | CEFBS_None, // XVSSRLRN_B_H |
| 9735 | CEFBS_None, // XVSSRLRN_HU_W |
| 9736 | CEFBS_None, // XVSSRLRN_H_W |
| 9737 | CEFBS_None, // XVSSRLRN_WU_D |
| 9738 | CEFBS_None, // XVSSRLRN_W_D |
| 9739 | CEFBS_None, // XVSSUB_B |
| 9740 | CEFBS_None, // XVSSUB_BU |
| 9741 | CEFBS_None, // XVSSUB_D |
| 9742 | CEFBS_None, // XVSSUB_DU |
| 9743 | CEFBS_None, // XVSSUB_H |
| 9744 | CEFBS_None, // XVSSUB_HU |
| 9745 | CEFBS_None, // XVSSUB_W |
| 9746 | CEFBS_None, // XVSSUB_WU |
| 9747 | CEFBS_None, // XVST |
| 9748 | CEFBS_None, // XVSTELM_B |
| 9749 | CEFBS_None, // XVSTELM_D |
| 9750 | CEFBS_None, // XVSTELM_H |
| 9751 | CEFBS_None, // XVSTELM_W |
| 9752 | CEFBS_None, // XVSTX |
| 9753 | CEFBS_None, // XVSUBI_BU |
| 9754 | CEFBS_None, // XVSUBI_DU |
| 9755 | CEFBS_None, // XVSUBI_HU |
| 9756 | CEFBS_None, // XVSUBI_WU |
| 9757 | CEFBS_None, // XVSUBWEV_D_W |
| 9758 | CEFBS_None, // XVSUBWEV_D_WU |
| 9759 | CEFBS_None, // XVSUBWEV_H_B |
| 9760 | CEFBS_None, // XVSUBWEV_H_BU |
| 9761 | CEFBS_None, // XVSUBWEV_Q_D |
| 9762 | CEFBS_None, // XVSUBWEV_Q_DU |
| 9763 | CEFBS_None, // XVSUBWEV_W_H |
| 9764 | CEFBS_None, // XVSUBWEV_W_HU |
| 9765 | CEFBS_None, // XVSUBWOD_D_W |
| 9766 | CEFBS_None, // XVSUBWOD_D_WU |
| 9767 | CEFBS_None, // XVSUBWOD_H_B |
| 9768 | CEFBS_None, // XVSUBWOD_H_BU |
| 9769 | CEFBS_None, // XVSUBWOD_Q_D |
| 9770 | CEFBS_None, // XVSUBWOD_Q_DU |
| 9771 | CEFBS_None, // XVSUBWOD_W_H |
| 9772 | CEFBS_None, // XVSUBWOD_W_HU |
| 9773 | CEFBS_None, // XVSUB_B |
| 9774 | CEFBS_None, // XVSUB_D |
| 9775 | CEFBS_None, // XVSUB_H |
| 9776 | CEFBS_None, // XVSUB_Q |
| 9777 | CEFBS_None, // XVSUB_W |
| 9778 | CEFBS_None, // XVXORI_B |
| 9779 | CEFBS_None, // XVXOR_V |
| 9780 | }; |
| 9781 | |
| 9782 | assert(Opcode < 2500); |
| 9783 | return FeatureBitsets[RequiredFeaturesRefs[Opcode]]; |
| 9784 | } |
| 9785 | |
| 9786 | |
| 9787 | } // namespace llvm::LoongArch_MC |
| 9788 | |
| 9789 | #endif // GET_COMPUTE_FEATURES |
| 9790 | |
| 9791 | #ifdef GET_AVAILABLE_OPCODE_CHECKER |
| 9792 | #undef GET_AVAILABLE_OPCODE_CHECKER |
| 9793 | |
| 9794 | namespace llvm::LoongArch_MC { |
| 9795 | |
| 9796 | bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) { |
| 9797 | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
| 9798 | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
| 9799 | FeatureBitset MissingFeatures = |
| 9800 | (AvailableFeatures & RequiredFeatures) ^ |
| 9801 | RequiredFeatures; |
| 9802 | return !MissingFeatures.any(); |
| 9803 | } |
| 9804 | |
| 9805 | } // namespace llvm::LoongArch_MC |
| 9806 | |
| 9807 | #endif // GET_AVAILABLE_OPCODE_CHECKER |
| 9808 | |
| 9809 | #ifdef ENABLE_INSTR_PREDICATE_VERIFIER |
| 9810 | #undef ENABLE_INSTR_PREDICATE_VERIFIER |
| 9811 | |
| 9812 | #include <sstream> |
| 9813 | |
| 9814 | namespace llvm::LoongArch_MC { |
| 9815 | |
| 9816 | #ifndef NDEBUG |
| 9817 | static const char *SubtargetFeatureNames[] = { |
| 9818 | "Feature_HasLaGlobalWithAbs", |
| 9819 | "Feature_HasLaGlobalWithPcrel", |
| 9820 | "Feature_HasLaLocalWithAbs", |
| 9821 | "Feature_IsLA32", |
| 9822 | "Feature_IsLA64", |
| 9823 | nullptr |
| 9824 | }; |
| 9825 | |
| 9826 | #endif // NDEBUG |
| 9827 | |
| 9828 | void verifyInstructionPredicates( |
| 9829 | unsigned Opcode, const FeatureBitset &Features) { |
| 9830 | #ifndef NDEBUG |
| 9831 | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
| 9832 | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
| 9833 | FeatureBitset MissingFeatures = |
| 9834 | (AvailableFeatures & RequiredFeatures) ^ |
| 9835 | RequiredFeatures; |
| 9836 | if (MissingFeatures.any()) { |
| 9837 | std::ostringstream Msg; |
| 9838 | Msg << "Attempting to emit "<< &LoongArchInstrNameData[LoongArchInstrNameIndices[Opcode]] |
| 9839 | << " instruction but the "; |
| 9840 | for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i) |
| 9841 | if (MissingFeatures.test(i)) |
| 9842 | Msg << SubtargetFeatureNames[i] << " "; |
| 9843 | Msg << "predicate(s) are not met"; |
| 9844 | report_fatal_error(Msg.str().c_str()); |
| 9845 | } |
| 9846 | #endif // NDEBUG |
| 9847 | } |
| 9848 | |
| 9849 | } // namespace llvm::LoongArch_MC |
| 9850 | |
| 9851 | #endif // ENABLE_INSTR_PREDICATE_VERIFIER |
| 9852 | |
| 9853 |
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