| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
|---|---|
| 2 | |* *| |
| 3 | |* Target Instruction Enum Values and Descriptors *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #ifdef GET_INSTRINFO_ENUM |
| 10 | #undef GET_INSTRINFO_ENUM |
| 11 | |
| 12 | namespace llvm::LoongArch { |
| 13 | |
| 14 | enum { |
| 15 | PHI = 0, // Target.td:1301 |
| 16 | INLINEASM = 1, // Target.td:1307 |
| 17 | INLINEASM_BR = 2, // Target.td:1313 |
| 18 | CFI_INSTRUCTION = 3, // Target.td:1322 |
| 19 | EH_LABEL = 4, // Target.td:1331 |
| 20 | GC_LABEL = 5, // Target.td:1340 |
| 21 | ANNOTATION_LABEL = 6, // Target.td:1349 |
| 22 | KILL = 7, // Target.td:1357 |
| 23 | EXTRACT_SUBREG = 8, // Target.td:1364 |
| 24 | INSERT_SUBREG = 9, // Target.td:1370 |
| 25 | IMPLICIT_DEF = 10, // Target.td:1377 |
| 26 | INIT_UNDEF = 11, // Target.td:1386 |
| 27 | SUBREG_TO_REG = 12, // Target.td:1393 |
| 28 | COPY_TO_REGCLASS = 13, // Target.td:1399 |
| 29 | DBG_VALUE = 14, // Target.td:1406 |
| 30 | DBG_VALUE_LIST = 15, // Target.td:1413 |
| 31 | DBG_INSTR_REF = 16, // Target.td:1420 |
| 32 | DBG_PHI = 17, // Target.td:1427 |
| 33 | DBG_LABEL = 18, // Target.td:1434 |
| 34 | REG_SEQUENCE = 19, // Target.td:1441 |
| 35 | COPY = 20, // Target.td:1448 |
| 36 | COPY_LANEMASK = 21, // Target.td:1456 |
| 37 | BUNDLE = 22, // Target.td:1463 |
| 38 | LIFETIME_START = 23, // Target.td:1469 |
| 39 | LIFETIME_END = 24, // Target.td:1476 |
| 40 | PSEUDO_PROBE = 25, // Target.td:1483 |
| 41 | ARITH_FENCE = 26, // Target.td:1490 |
| 42 | STACKMAP = 27, // Target.td:1499 |
| 43 | FENTRY_CALL = 28, // Target.td:1634 |
| 44 | PATCHPOINT = 29, // Target.td:1507 |
| 45 | LOAD_STACK_GUARD = 30, // Target.td:1525 |
| 46 | PREALLOCATED_SETUP = 31, // Target.td:1533 |
| 47 | PREALLOCATED_ARG = 32, // Target.td:1539 |
| 48 | STATEPOINT = 33, // Target.td:1516 |
| 49 | LOCAL_ESCAPE = 34, // Target.td:1545 |
| 50 | FAULTING_OP = 35, // Target.td:1554 |
| 51 | PATCHABLE_OP = 36, // Target.td:1574 |
| 52 | PATCHABLE_FUNCTION_ENTER = 37, // Target.td:1582 |
| 53 | PATCHABLE_RET = 38, // Target.td:1589 |
| 54 | PATCHABLE_FUNCTION_EXIT = 39, // Target.td:1598 |
| 55 | PATCHABLE_TAIL_CALL = 40, // Target.td:1606 |
| 56 | PATCHABLE_EVENT_CALL = 41, // Target.td:1614 |
| 57 | PATCHABLE_TYPED_EVENT_CALL = 42, // Target.td:1624 |
| 58 | ICALL_BRANCH_FUNNEL = 43, // Target.td:1644 |
| 59 | FAKE_USE = 44, // Target.td:1564 |
| 60 | MEMBARRIER = 45, // Target.td:1650 |
| 61 | JUMP_TABLE_DEBUG_INFO = 46, // Target.td:1658 |
| 62 | RELOC_NONE = 47, // Target.td:1666 |
| 63 | CONVERGENCECTRL_ENTRY = 48, // Target.td:1678 |
| 64 | CONVERGENCECTRL_ANCHOR = 49, // Target.td:1674 |
| 65 | CONVERGENCECTRL_LOOP = 50, // Target.td:1682 |
| 66 | CONVERGENCECTRL_GLUE = 51, // Target.td:1686 |
| 67 | G_ASSERT_SEXT = 52, // GenericOpcodes.td:1867 |
| 68 | G_ASSERT_ZEXT = 53, // GenericOpcodes.td:1859 |
| 69 | G_ASSERT_ALIGN = 54, // GenericOpcodes.td:1874 |
| 70 | G_ADD = 55, // GenericOpcodes.td:300 |
| 71 | G_SUB = 56, // GenericOpcodes.td:308 |
| 72 | G_MUL = 57, // GenericOpcodes.td:316 |
| 73 | G_SDIV = 58, // GenericOpcodes.td:324 |
| 74 | G_UDIV = 59, // GenericOpcodes.td:332 |
| 75 | G_SREM = 60, // GenericOpcodes.td:340 |
| 76 | G_UREM = 61, // GenericOpcodes.td:348 |
| 77 | G_SDIVREM = 62, // GenericOpcodes.td:356 |
| 78 | G_UDIVREM = 63, // GenericOpcodes.td:364 |
| 79 | G_AND = 64, // GenericOpcodes.td:372 |
| 80 | G_OR = 65, // GenericOpcodes.td:380 |
| 81 | G_XOR = 66, // GenericOpcodes.td:388 |
| 82 | G_ABDS = 67, // GenericOpcodes.td:417 |
| 83 | G_ABDU = 68, // GenericOpcodes.td:425 |
| 84 | G_UAVGFLOOR = 69, // GenericOpcodes.td:433 |
| 85 | G_UAVGCEIL = 70, // GenericOpcodes.td:440 |
| 86 | G_SAVGFLOOR = 71, // GenericOpcodes.td:447 |
| 87 | G_SAVGCEIL = 72, // GenericOpcodes.td:454 |
| 88 | G_IMPLICIT_DEF = 73, // GenericOpcodes.td:110 |
| 89 | G_PHI = 74, // GenericOpcodes.td:116 |
| 90 | G_FRAME_INDEX = 75, // GenericOpcodes.td:122 |
| 91 | G_GLOBAL_VALUE = 76, // GenericOpcodes.td:128 |
| 92 | G_PTRAUTH_GLOBAL_VALUE = 77, // GenericOpcodes.td:134 |
| 93 | G_CONSTANT_POOL = 78, // GenericOpcodes.td:140 |
| 94 | G_EXTRACT = 79, // GenericOpcodes.td:1474 |
| 95 | G_UNMERGE_VALUES = 80, // GenericOpcodes.td:1486 |
| 96 | G_INSERT = 81, // GenericOpcodes.td:1494 |
| 97 | G_MERGE_VALUES = 82, // GenericOpcodes.td:1504 |
| 98 | G_BUILD_VECTOR = 83, // GenericOpcodes.td:1523 |
| 99 | G_BUILD_VECTOR_TRUNC = 84, // GenericOpcodes.td:1532 |
| 100 | G_CONCAT_VECTORS = 85, // GenericOpcodes.td:1539 |
| 101 | G_PTRTOINT = 86, // GenericOpcodes.td:152 |
| 102 | G_INTTOPTR = 87, // GenericOpcodes.td:146 |
| 103 | G_BITCAST = 88, // GenericOpcodes.td:158 |
| 104 | G_FREEZE = 89, // GenericOpcodes.td:277 |
| 105 | G_CONSTANT_FOLD_BARRIER = 90, // GenericOpcodes.td:1881 |
| 106 | G_INTRINSIC_FPTRUNC_ROUND = 91, // GenericOpcodes.td:1263 |
| 107 | G_INTRINSIC_TRUNC = 92, // GenericOpcodes.td:1269 |
| 108 | G_INTRINSIC_ROUND = 93, // GenericOpcodes.td:1275 |
| 109 | G_INTRINSIC_LRINT = 94, // GenericOpcodes.td:1281 |
| 110 | G_INTRINSIC_LLRINT = 95, // GenericOpcodes.td:1287 |
| 111 | G_INTRINSIC_ROUNDEVEN = 96, // GenericOpcodes.td:1293 |
| 112 | G_READCYCLECOUNTER = 97, // GenericOpcodes.td:1299 |
| 113 | G_READSTEADYCOUNTER = 98, // GenericOpcodes.td:1305 |
| 114 | G_LOAD = 99, // GenericOpcodes.td:1332 |
| 115 | G_SEXTLOAD = 100, // GenericOpcodes.td:1340 |
| 116 | G_ZEXTLOAD = 101, // GenericOpcodes.td:1348 |
| 117 | G_INDEXED_LOAD = 102, // GenericOpcodes.td:1358 |
| 118 | G_INDEXED_SEXTLOAD = 103, // GenericOpcodes.td:1366 |
| 119 | G_INDEXED_ZEXTLOAD = 104, // GenericOpcodes.td:1374 |
| 120 | G_STORE = 105, // GenericOpcodes.td:1382 |
| 121 | G_INDEXED_STORE = 106, // GenericOpcodes.td:1390 |
| 122 | G_ATOMIC_CMPXCHG_WITH_SUCCESS = 107, // GenericOpcodes.td:1400 |
| 123 | G_ATOMIC_CMPXCHG = 108, // GenericOpcodes.td:1410 |
| 124 | G_ATOMICRMW_XCHG = 109, // GenericOpcodes.td:1428 |
| 125 | G_ATOMICRMW_ADD = 110, // GenericOpcodes.td:1429 |
| 126 | G_ATOMICRMW_SUB = 111, // GenericOpcodes.td:1430 |
| 127 | G_ATOMICRMW_AND = 112, // GenericOpcodes.td:1431 |
| 128 | G_ATOMICRMW_NAND = 113, // GenericOpcodes.td:1432 |
| 129 | G_ATOMICRMW_OR = 114, // GenericOpcodes.td:1433 |
| 130 | G_ATOMICRMW_XOR = 115, // GenericOpcodes.td:1434 |
| 131 | G_ATOMICRMW_MAX = 116, // GenericOpcodes.td:1435 |
| 132 | G_ATOMICRMW_MIN = 117, // GenericOpcodes.td:1436 |
| 133 | G_ATOMICRMW_UMAX = 118, // GenericOpcodes.td:1437 |
| 134 | G_ATOMICRMW_UMIN = 119, // GenericOpcodes.td:1438 |
| 135 | G_ATOMICRMW_FADD = 120, // GenericOpcodes.td:1439 |
| 136 | G_ATOMICRMW_FSUB = 121, // GenericOpcodes.td:1440 |
| 137 | G_ATOMICRMW_FMAX = 122, // GenericOpcodes.td:1441 |
| 138 | G_ATOMICRMW_FMIN = 123, // GenericOpcodes.td:1442 |
| 139 | G_ATOMICRMW_FMAXIMUM = 124, // GenericOpcodes.td:1443 |
| 140 | G_ATOMICRMW_FMINIMUM = 125, // GenericOpcodes.td:1444 |
| 141 | G_ATOMICRMW_FMAXIMUMNUM = 126, // GenericOpcodes.td:1445 |
| 142 | G_ATOMICRMW_FMINIMUMNUM = 127, // GenericOpcodes.td:1446 |
| 143 | G_ATOMICRMW_UINC_WRAP = 128, // GenericOpcodes.td:1447 |
| 144 | G_ATOMICRMW_UDEC_WRAP = 129, // GenericOpcodes.td:1448 |
| 145 | G_ATOMICRMW_USUB_COND = 130, // GenericOpcodes.td:1449 |
| 146 | G_ATOMICRMW_USUB_SAT = 131, // GenericOpcodes.td:1450 |
| 147 | G_FENCE = 132, // GenericOpcodes.td:1452 |
| 148 | G_PREFETCH = 133, // GenericOpcodes.td:1459 |
| 149 | G_BRCOND = 134, // GenericOpcodes.td:1594 |
| 150 | G_BRINDIRECT = 135, // GenericOpcodes.td:1603 |
| 151 | G_INVOKE_REGION_START = 136, // GenericOpcodes.td:1626 |
| 152 | G_INTRINSIC = 137, // GenericOpcodes.td:1546 |
| 153 | G_INTRINSIC_W_SIDE_EFFECTS = 138, // GenericOpcodes.td:1553 |
| 154 | G_INTRINSIC_CONVERGENT = 139, // GenericOpcodes.td:1562 |
| 155 | G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 140, // GenericOpcodes.td:1570 |
| 156 | G_ANYEXT = 141, // GenericOpcodes.td:44 |
| 157 | G_TRUNC = 142, // GenericOpcodes.td:83 |
| 158 | G_TRUNC_SSAT_S = 143, // GenericOpcodes.td:90 |
| 159 | G_TRUNC_SSAT_U = 144, // GenericOpcodes.td:97 |
| 160 | G_TRUNC_USAT_U = 145, // GenericOpcodes.td:104 |
| 161 | G_CONSTANT = 146, // GenericOpcodes.td:165 |
| 162 | G_FCONSTANT = 147, // GenericOpcodes.td:172 |
| 163 | G_VASTART = 148, // GenericOpcodes.td:178 |
| 164 | G_VAARG = 149, // GenericOpcodes.td:185 |
| 165 | G_SEXT = 150, // GenericOpcodes.td:52 |
| 166 | G_SEXT_INREG = 151, // GenericOpcodes.td:66 |
| 167 | G_ZEXT = 152, // GenericOpcodes.td:74 |
| 168 | G_SHL = 153, // GenericOpcodes.td:396 |
| 169 | G_LSHR = 154, // GenericOpcodes.td:403 |
| 170 | G_ASHR = 155, // GenericOpcodes.td:410 |
| 171 | G_FSHL = 156, // GenericOpcodes.td:462 |
| 172 | G_FSHR = 157, // GenericOpcodes.td:470 |
| 173 | G_ROTR = 158, // GenericOpcodes.td:477 |
| 174 | G_ROTL = 159, // GenericOpcodes.td:484 |
| 175 | G_ICMP = 160, // GenericOpcodes.td:491 |
| 176 | G_FCMP = 161, // GenericOpcodes.td:498 |
| 177 | G_SCMP = 162, // GenericOpcodes.td:505 |
| 178 | G_UCMP = 163, // GenericOpcodes.td:512 |
| 179 | G_SELECT = 164, // GenericOpcodes.td:519 |
| 180 | G_UADDO = 165, // GenericOpcodes.td:584 |
| 181 | G_UADDE = 166, // GenericOpcodes.td:592 |
| 182 | G_USUBO = 167, // GenericOpcodes.td:614 |
| 183 | G_USUBE = 168, // GenericOpcodes.td:620 |
| 184 | G_SADDO = 169, // GenericOpcodes.td:599 |
| 185 | G_SADDE = 170, // GenericOpcodes.td:607 |
| 186 | G_SSUBO = 171, // GenericOpcodes.td:627 |
| 187 | G_SSUBE = 172, // GenericOpcodes.td:634 |
| 188 | G_UMULO = 173, // GenericOpcodes.td:641 |
| 189 | G_SMULO = 174, // GenericOpcodes.td:649 |
| 190 | G_UMULH = 175, // GenericOpcodes.td:658 |
| 191 | G_SMULH = 176, // GenericOpcodes.td:667 |
| 192 | G_UADDSAT = 177, // GenericOpcodes.td:679 |
| 193 | G_SADDSAT = 178, // GenericOpcodes.td:687 |
| 194 | G_USUBSAT = 179, // GenericOpcodes.td:695 |
| 195 | G_SSUBSAT = 180, // GenericOpcodes.td:703 |
| 196 | G_USHLSAT = 181, // GenericOpcodes.td:711 |
| 197 | G_SSHLSAT = 182, // GenericOpcodes.td:719 |
| 198 | G_SMULFIX = 183, // GenericOpcodes.td:731 |
| 199 | G_UMULFIX = 184, // GenericOpcodes.td:738 |
| 200 | G_SMULFIXSAT = 185, // GenericOpcodes.td:748 |
| 201 | G_UMULFIXSAT = 186, // GenericOpcodes.td:755 |
| 202 | G_SDIVFIX = 187, // GenericOpcodes.td:766 |
| 203 | G_UDIVFIX = 188, // GenericOpcodes.td:773 |
| 204 | G_SDIVFIXSAT = 189, // GenericOpcodes.td:783 |
| 205 | G_UDIVFIXSAT = 190, // GenericOpcodes.td:790 |
| 206 | G_FADD = 191, // GenericOpcodes.td:963 |
| 207 | G_FSUB = 192, // GenericOpcodes.td:971 |
| 208 | G_FMUL = 193, // GenericOpcodes.td:979 |
| 209 | G_FMA = 194, // GenericOpcodes.td:988 |
| 210 | G_FMAD = 195, // GenericOpcodes.td:997 |
| 211 | G_FDIV = 196, // GenericOpcodes.td:1005 |
| 212 | G_FREM = 197, // GenericOpcodes.td:1012 |
| 213 | G_FMODF = 198, // GenericOpcodes.td:1019 |
| 214 | G_FPOW = 199, // GenericOpcodes.td:1026 |
| 215 | G_FPOWI = 200, // GenericOpcodes.td:1033 |
| 216 | G_FEXP = 201, // GenericOpcodes.td:1040 |
| 217 | G_FEXP2 = 202, // GenericOpcodes.td:1047 |
| 218 | G_FEXP10 = 203, // GenericOpcodes.td:1054 |
| 219 | G_FLOG = 204, // GenericOpcodes.td:1061 |
| 220 | G_FLOG2 = 205, // GenericOpcodes.td:1068 |
| 221 | G_FLOG10 = 206, // GenericOpcodes.td:1075 |
| 222 | G_FLDEXP = 207, // GenericOpcodes.td:1082 |
| 223 | G_FFREXP = 208, // GenericOpcodes.td:1089 |
| 224 | G_FNEG = 209, // GenericOpcodes.td:801 |
| 225 | G_FPEXT = 210, // GenericOpcodes.td:807 |
| 226 | G_FPTRUNC = 211, // GenericOpcodes.td:813 |
| 227 | G_FPTOSI = 212, // GenericOpcodes.td:819 |
| 228 | G_FPTOUI = 213, // GenericOpcodes.td:825 |
| 229 | G_SITOFP = 214, // GenericOpcodes.td:831 |
| 230 | G_UITOFP = 215, // GenericOpcodes.td:837 |
| 231 | G_FPTOSI_SAT = 216, // GenericOpcodes.td:843 |
| 232 | G_FPTOUI_SAT = 217, // GenericOpcodes.td:849 |
| 233 | G_FABS = 218, // GenericOpcodes.td:855 |
| 234 | G_FCOPYSIGN = 219, // GenericOpcodes.td:861 |
| 235 | G_IS_FPCLASS = 220, // GenericOpcodes.td:874 |
| 236 | G_FCANONICALIZE = 221, // GenericOpcodes.td:867 |
| 237 | G_FMINNUM = 222, // GenericOpcodes.td:887 |
| 238 | G_FMAXNUM = 223, // GenericOpcodes.td:894 |
| 239 | G_FMINNUM_IEEE = 224, // GenericOpcodes.td:912 |
| 240 | G_FMAXNUM_IEEE = 225, // GenericOpcodes.td:919 |
| 241 | G_FMINIMUM = 226, // GenericOpcodes.td:929 |
| 242 | G_FMAXIMUM = 227, // GenericOpcodes.td:936 |
| 243 | G_FMINIMUMNUM = 228, // GenericOpcodes.td:944 |
| 244 | G_FMAXIMUMNUM = 229, // GenericOpcodes.td:951 |
| 245 | G_GET_FPENV = 230, // GenericOpcodes.td:1219 |
| 246 | G_SET_FPENV = 231, // GenericOpcodes.td:1226 |
| 247 | G_RESET_FPENV = 232, // GenericOpcodes.td:1233 |
| 248 | G_GET_FPMODE = 233, // GenericOpcodes.td:1240 |
| 249 | G_SET_FPMODE = 234, // GenericOpcodes.td:1247 |
| 250 | G_RESET_FPMODE = 235, // GenericOpcodes.td:1254 |
| 251 | G_GET_ROUNDING = 236, // GenericOpcodes.td:1311 |
| 252 | G_SET_ROUNDING = 237, // GenericOpcodes.td:1317 |
| 253 | G_PTR_ADD = 238, // GenericOpcodes.td:526 |
| 254 | G_PTRMASK = 239, // GenericOpcodes.td:534 |
| 255 | G_SMIN = 240, // GenericOpcodes.td:541 |
| 256 | G_SMAX = 241, // GenericOpcodes.td:549 |
| 257 | G_UMIN = 242, // GenericOpcodes.td:557 |
| 258 | G_UMAX = 243, // GenericOpcodes.td:565 |
| 259 | G_ABS = 244, // GenericOpcodes.td:573 |
| 260 | G_LROUND = 245, // GenericOpcodes.td:283 |
| 261 | G_LLROUND = 246, // GenericOpcodes.td:289 |
| 262 | G_BR = 247, // GenericOpcodes.td:1584 |
| 263 | G_BRJT = 248, // GenericOpcodes.td:1614 |
| 264 | G_VSCALE = 249, // GenericOpcodes.td:1514 |
| 265 | G_INSERT_SUBVECTOR = 250, // GenericOpcodes.td:1658 |
| 266 | G_EXTRACT_SUBVECTOR = 251, // GenericOpcodes.td:1665 |
| 267 | G_INSERT_VECTOR_ELT = 252, // GenericOpcodes.td:1672 |
| 268 | G_EXTRACT_VECTOR_ELT = 253, // GenericOpcodes.td:1679 |
| 269 | G_SHUFFLE_VECTOR = 254, // GenericOpcodes.td:1689 |
| 270 | G_SPLAT_VECTOR = 255, // GenericOpcodes.td:1696 |
| 271 | G_STEP_VECTOR = 256, // GenericOpcodes.td:1703 |
| 272 | G_VECTOR_COMPRESS = 257, // GenericOpcodes.td:1710 |
| 273 | G_CTTZ = 258, // GenericOpcodes.td:205 |
| 274 | G_CTTZ_ZERO_UNDEF = 259, // GenericOpcodes.td:211 |
| 275 | G_CTLZ = 260, // GenericOpcodes.td:193 |
| 276 | G_CTLZ_ZERO_UNDEF = 261, // GenericOpcodes.td:199 |
| 277 | G_CTLS = 262, // GenericOpcodes.td:217 |
| 278 | G_CTPOP = 263, // GenericOpcodes.td:223 |
| 279 | G_BSWAP = 264, // GenericOpcodes.td:229 |
| 280 | G_BITREVERSE = 265, // GenericOpcodes.td:235 |
| 281 | G_FCEIL = 266, // GenericOpcodes.td:1096 |
| 282 | G_FCOS = 267, // GenericOpcodes.td:1103 |
| 283 | G_FSIN = 268, // GenericOpcodes.td:1110 |
| 284 | G_FSINCOS = 269, // GenericOpcodes.td:1117 |
| 285 | G_FTAN = 270, // GenericOpcodes.td:1124 |
| 286 | G_FACOS = 271, // GenericOpcodes.td:1131 |
| 287 | G_FASIN = 272, // GenericOpcodes.td:1138 |
| 288 | G_FATAN = 273, // GenericOpcodes.td:1145 |
| 289 | G_FATAN2 = 274, // GenericOpcodes.td:1152 |
| 290 | G_FCOSH = 275, // GenericOpcodes.td:1159 |
| 291 | G_FSINH = 276, // GenericOpcodes.td:1166 |
| 292 | G_FTANH = 277, // GenericOpcodes.td:1173 |
| 293 | G_FSQRT = 278, // GenericOpcodes.td:1183 |
| 294 | G_FFLOOR = 279, // GenericOpcodes.td:1190 |
| 295 | G_FRINT = 280, // GenericOpcodes.td:1197 |
| 296 | G_FNEARBYINT = 281, // GenericOpcodes.td:1204 |
| 297 | G_ADDRSPACE_CAST = 282, // GenericOpcodes.td:241 |
| 298 | G_BLOCK_ADDR = 283, // GenericOpcodes.td:247 |
| 299 | G_JUMP_TABLE = 284, // GenericOpcodes.td:253 |
| 300 | G_DYN_STACKALLOC = 285, // GenericOpcodes.td:259 |
| 301 | G_STACKSAVE = 286, // GenericOpcodes.td:265 |
| 302 | G_STACKRESTORE = 287, // GenericOpcodes.td:271 |
| 303 | G_STRICT_FADD = 288, // GenericOpcodes.td:1760 |
| 304 | G_STRICT_FSUB = 289, // GenericOpcodes.td:1761 |
| 305 | G_STRICT_FMUL = 290, // GenericOpcodes.td:1762 |
| 306 | G_STRICT_FDIV = 291, // GenericOpcodes.td:1763 |
| 307 | G_STRICT_FREM = 292, // GenericOpcodes.td:1764 |
| 308 | G_STRICT_FMA = 293, // GenericOpcodes.td:1765 |
| 309 | G_STRICT_FSQRT = 294, // GenericOpcodes.td:1766 |
| 310 | G_STRICT_FLDEXP = 295, // GenericOpcodes.td:1767 |
| 311 | G_READ_REGISTER = 296, // GenericOpcodes.td:1633 |
| 312 | G_WRITE_REGISTER = 297, // GenericOpcodes.td:1643 |
| 313 | G_MEMCPY = 298, // GenericOpcodes.td:1773 |
| 314 | G_MEMCPY_INLINE = 299, // GenericOpcodes.td:1781 |
| 315 | G_MEMMOVE = 300, // GenericOpcodes.td:1789 |
| 316 | G_MEMSET = 301, // GenericOpcodes.td:1797 |
| 317 | G_BZERO = 302, // GenericOpcodes.td:1804 |
| 318 | G_TRAP = 303, // GenericOpcodes.td:1814 |
| 319 | G_DEBUGTRAP = 304, // GenericOpcodes.td:1821 |
| 320 | G_UBSANTRAP = 305, // GenericOpcodes.td:1827 |
| 321 | G_VECREDUCE_SEQ_FADD = 306, // GenericOpcodes.td:1726 |
| 322 | G_VECREDUCE_SEQ_FMUL = 307, // GenericOpcodes.td:1732 |
| 323 | G_VECREDUCE_FADD = 308, // GenericOpcodes.td:1738 |
| 324 | G_VECREDUCE_FMUL = 309, // GenericOpcodes.td:1739 |
| 325 | G_VECREDUCE_FMAX = 310, // GenericOpcodes.td:1741 |
| 326 | G_VECREDUCE_FMIN = 311, // GenericOpcodes.td:1742 |
| 327 | G_VECREDUCE_FMAXIMUM = 312, // GenericOpcodes.td:1743 |
| 328 | G_VECREDUCE_FMINIMUM = 313, // GenericOpcodes.td:1744 |
| 329 | G_VECREDUCE_ADD = 314, // GenericOpcodes.td:1746 |
| 330 | G_VECREDUCE_MUL = 315, // GenericOpcodes.td:1747 |
| 331 | G_VECREDUCE_AND = 316, // GenericOpcodes.td:1748 |
| 332 | G_VECREDUCE_OR = 317, // GenericOpcodes.td:1749 |
| 333 | G_VECREDUCE_XOR = 318, // GenericOpcodes.td:1750 |
| 334 | G_VECREDUCE_SMAX = 319, // GenericOpcodes.td:1751 |
| 335 | G_VECREDUCE_SMIN = 320, // GenericOpcodes.td:1752 |
| 336 | G_VECREDUCE_UMAX = 321, // GenericOpcodes.td:1753 |
| 337 | G_VECREDUCE_UMIN = 322, // GenericOpcodes.td:1754 |
| 338 | G_SBFX = 323, // GenericOpcodes.td:1839 |
| 339 | G_UBFX = 324, // GenericOpcodes.td:1847 |
| 340 | ADJCALLSTACKDOWN = 325, // LoongArchInstrInfo.td:2449 |
| 341 | ADJCALLSTACKUP = 326, // LoongArchInstrInfo.td:2451 |
| 342 | BuildPairF64Pseudo = 327, // LoongArchFloat64InstrInfo.td:362 |
| 343 | PseudoAddTPRel_D = 328, // LoongArchInstrInfo.td:1763 |
| 344 | PseudoAddTPRel_W = 329, // LoongArchInstrInfo.td:1759 |
| 345 | PseudoAtomicLoadAdd32 = 330, // LoongArchInstrInfo.td:2113 |
| 346 | PseudoAtomicLoadAnd32 = 331, // LoongArchInstrInfo.td:2115 |
| 347 | PseudoAtomicLoadMax32 = 332, // LoongArchInstrInfo.td:2120 |
| 348 | PseudoAtomicLoadMin32 = 333, // LoongArchInstrInfo.td:2121 |
| 349 | PseudoAtomicLoadNand32 = 334, // LoongArchInstrInfo.td:2111 |
| 350 | PseudoAtomicLoadNand64 = 335, // LoongArchInstrInfo.td:2112 |
| 351 | PseudoAtomicLoadOr32 = 336, // LoongArchInstrInfo.td:2116 |
| 352 | PseudoAtomicLoadSub32 = 337, // LoongArchInstrInfo.td:2114 |
| 353 | PseudoAtomicLoadUMax32 = 338, // LoongArchInstrInfo.td:2118 |
| 354 | PseudoAtomicLoadUMin32 = 339, // LoongArchInstrInfo.td:2119 |
| 355 | PseudoAtomicLoadXor32 = 340, // LoongArchInstrInfo.td:2117 |
| 356 | PseudoAtomicStoreD = 341, // LoongArchInstrInfo.td:2072 |
| 357 | PseudoAtomicStoreW = 342, // LoongArchInstrInfo.td:2064 |
| 358 | PseudoAtomicSwap32 = 343, // LoongArchInstrInfo.td:2110 |
| 359 | PseudoBR = 344, // LoongArchInstrInfo.td:1615 |
| 360 | PseudoBRIND = 345, // LoongArchInstrInfo.td:1619 |
| 361 | PseudoB_TAIL = 346, // LoongArchInstrInfo.td:1712 |
| 362 | PseudoCALL = 347, // LoongArchInstrInfo.td:1724 |
| 363 | PseudoCALL30 = 348, // LoongArchInstrInfo.td:1734 |
| 364 | PseudoCALL36 = 349, // LoongArchInstrInfo.td:1744 |
| 365 | PseudoCALLIndirect = 350, // LoongArchInstrInfo.td:1656 |
| 366 | PseudoCALL_LARGE = 351, // LoongArchInstrInfo.td:1646 |
| 367 | PseudoCALL_MEDIUM = 352, // LoongArchInstrInfo.td:1637 |
| 368 | PseudoCALL_SMALL = 353, // LoongArchInstrInfo.td:1628 |
| 369 | PseudoCTPOP = 354, // LoongArchLSXInstrInfo.td:1289 |
| 370 | PseudoCmpXchg128 = 355, // LoongArchInstrInfo.td:2199 |
| 371 | PseudoCmpXchg128Acquire = 356, // LoongArchInstrInfo.td:2200 |
| 372 | PseudoCmpXchg32 = 357, // LoongArchInstrInfo.td:2185 |
| 373 | PseudoCmpXchg64 = 358, // LoongArchInstrInfo.td:2186 |
| 374 | PseudoCopyCFR = 359, // LoongArchFloat32InstrInfo.td:162 |
| 375 | PseudoDESC_CALL = 360, // LoongArchInstrInfo.td:1819 |
| 376 | PseudoJIRL_CALL = 361, // LoongArchInstrInfo.td:1664 |
| 377 | PseudoJIRL_TAIL = 362, // LoongArchInstrInfo.td:1717 |
| 378 | PseudoLA_ABS = 363, // LoongArchInstrInfo.td:1774 |
| 379 | PseudoLA_ABS_LARGE = 364, // LoongArchInstrInfo.td:1776 |
| 380 | PseudoLA_GOT = 365, // LoongArchInstrInfo.td:1802 |
| 381 | PseudoLA_GOT_LARGE = 366, // LoongArchInstrInfo.td:1806 |
| 382 | PseudoLA_PCREL = 367, // LoongArchInstrInfo.td:1779 |
| 383 | PseudoLA_PCREL_LARGE = 368, // LoongArchInstrInfo.td:1785 |
| 384 | PseudoLA_TLS_DESC = 369, // LoongArchInstrInfo.td:1825 |
| 385 | PseudoLA_TLS_DESC_LARGE = 370, // LoongArchInstrInfo.td:1829 |
| 386 | PseudoLA_TLS_GD = 371, // LoongArchInstrInfo.td:1783 |
| 387 | PseudoLA_TLS_GD_LARGE = 372, // LoongArchInstrInfo.td:1795 |
| 388 | PseudoLA_TLS_IE = 373, // LoongArchInstrInfo.td:1804 |
| 389 | PseudoLA_TLS_IE_LARGE = 374, // LoongArchInstrInfo.td:1810 |
| 390 | PseudoLA_TLS_LD = 375, // LoongArchInstrInfo.td:1781 |
| 391 | PseudoLA_TLS_LD_LARGE = 376, // LoongArchInstrInfo.td:1791 |
| 392 | PseudoLA_TLS_LE = 377, // LoongArchInstrInfo.td:1789 |
| 393 | PseudoLD_CFR = 378, // LoongArchFloat32InstrInfo.td:150 |
| 394 | PseudoLI_D = 379, // LoongArchInstrInfo.td:2501 |
| 395 | PseudoLI_W = 380, // LoongArchInstrInfo.td:2499 |
| 396 | PseudoMaskedAtomicLoadAdd32 = 381, // LoongArchInstrInfo.td:2097 |
| 397 | PseudoMaskedAtomicLoadMax32 = 382, // LoongArchInstrInfo.td:2162 |
| 398 | PseudoMaskedAtomicLoadMin32 = 383, // LoongArchInstrInfo.td:2163 |
| 399 | PseudoMaskedAtomicLoadNand32 = 384, // LoongArchInstrInfo.td:2099 |
| 400 | PseudoMaskedAtomicLoadSub32 = 385, // LoongArchInstrInfo.td:2098 |
| 401 | PseudoMaskedAtomicLoadUMax32 = 386, // LoongArchInstrInfo.td:2147 |
| 402 | PseudoMaskedAtomicLoadUMin32 = 387, // LoongArchInstrInfo.td:2148 |
| 403 | PseudoMaskedAtomicSwap32 = 388, // LoongArchInstrInfo.td:2096 |
| 404 | PseudoMaskedCmpXchg32 = 389, // LoongArchInstrInfo.td:2202 |
| 405 | PseudoRET = 390, // LoongArchInstrInfo.td:1669 |
| 406 | PseudoST_CFR = 391, // LoongArchFloat32InstrInfo.td:147 |
| 407 | PseudoTAIL = 392, // LoongArchInstrInfo.td:1728 |
| 408 | PseudoTAIL30 = 393, // LoongArchInstrInfo.td:1738 |
| 409 | PseudoTAIL36 = 394, // LoongArchInstrInfo.td:1750 |
| 410 | PseudoTAILIndirect = 395, // LoongArchInstrInfo.td:1703 |
| 411 | PseudoTAIL_LARGE = 396, // LoongArchInstrInfo.td:1693 |
| 412 | PseudoTAIL_MEDIUM = 397, // LoongArchInstrInfo.td:1684 |
| 413 | PseudoTAIL_SMALL = 398, // LoongArchInstrInfo.td:1674 |
| 414 | PseudoUNIMP = 399, // LoongArchInstrInfo.td:1425 |
| 415 | PseudoVBNZ = 400, // LoongArchLSXInstrInfo.td:1280 |
| 416 | PseudoVBNZ_B = 401, // LoongArchLSXInstrInfo.td:1276 |
| 417 | PseudoVBNZ_D = 402, // LoongArchLSXInstrInfo.td:1279 |
| 418 | PseudoVBNZ_H = 403, // LoongArchLSXInstrInfo.td:1277 |
| 419 | PseudoVBNZ_W = 404, // LoongArchLSXInstrInfo.td:1278 |
| 420 | PseudoVBZ = 405, // LoongArchLSXInstrInfo.td:1286 |
| 421 | PseudoVBZ_B = 406, // LoongArchLSXInstrInfo.td:1282 |
| 422 | PseudoVBZ_D = 407, // LoongArchLSXInstrInfo.td:1285 |
| 423 | PseudoVBZ_H = 408, // LoongArchLSXInstrInfo.td:1283 |
| 424 | PseudoVBZ_W = 409, // LoongArchLSXInstrInfo.td:1284 |
| 425 | PseudoVMSKEQZ_B = 410, // LoongArchLSXInstrInfo.td:1298 |
| 426 | PseudoVMSKGEZ_B = 411, // LoongArchLSXInstrInfo.td:1297 |
| 427 | PseudoVMSKLTZ_B = 412, // LoongArchLSXInstrInfo.td:1293 |
| 428 | PseudoVMSKLTZ_D = 413, // LoongArchLSXInstrInfo.td:1296 |
| 429 | PseudoVMSKLTZ_H = 414, // LoongArchLSXInstrInfo.td:1294 |
| 430 | PseudoVMSKLTZ_W = 415, // LoongArchLSXInstrInfo.td:1295 |
| 431 | PseudoVMSKNEZ_B = 416, // LoongArchLSXInstrInfo.td:1299 |
| 432 | PseudoVREPLI_B = 417, // LoongArchLSXInstrInfo.td:1266 |
| 433 | PseudoVREPLI_D = 418, // LoongArchLSXInstrInfo.td:1272 |
| 434 | PseudoVREPLI_H = 419, // LoongArchLSXInstrInfo.td:1268 |
| 435 | PseudoVREPLI_W = 420, // LoongArchLSXInstrInfo.td:1270 |
| 436 | PseudoXVBNZ = 421, // LoongArchLASXInstrInfo.td:1093 |
| 437 | PseudoXVBNZ_B = 422, // LoongArchLASXInstrInfo.td:1089 |
| 438 | PseudoXVBNZ_D = 423, // LoongArchLASXInstrInfo.td:1092 |
| 439 | PseudoXVBNZ_H = 424, // LoongArchLASXInstrInfo.td:1090 |
| 440 | PseudoXVBNZ_W = 425, // LoongArchLASXInstrInfo.td:1091 |
| 441 | PseudoXVBZ = 426, // LoongArchLASXInstrInfo.td:1099 |
| 442 | PseudoXVBZ_B = 427, // LoongArchLASXInstrInfo.td:1095 |
| 443 | PseudoXVBZ_D = 428, // LoongArchLASXInstrInfo.td:1098 |
| 444 | PseudoXVBZ_H = 429, // LoongArchLASXInstrInfo.td:1096 |
| 445 | PseudoXVBZ_W = 430, // LoongArchLASXInstrInfo.td:1097 |
| 446 | PseudoXVINSGR2VR_B = 431, // LoongArchLASXInstrInfo.td:1102 |
| 447 | PseudoXVINSGR2VR_H = 432, // LoongArchLASXInstrInfo.td:1104 |
| 448 | PseudoXVMSKEQZ_B = 433, // LoongArchLASXInstrInfo.td:1114 |
| 449 | PseudoXVMSKGEZ_B = 434, // LoongArchLASXInstrInfo.td:1113 |
| 450 | PseudoXVMSKLTZ_B = 435, // LoongArchLASXInstrInfo.td:1109 |
| 451 | PseudoXVMSKLTZ_D = 436, // LoongArchLASXInstrInfo.td:1112 |
| 452 | PseudoXVMSKLTZ_H = 437, // LoongArchLASXInstrInfo.td:1110 |
| 453 | PseudoXVMSKLTZ_W = 438, // LoongArchLASXInstrInfo.td:1111 |
| 454 | PseudoXVMSKNEZ_B = 439, // LoongArchLASXInstrInfo.td:1115 |
| 455 | PseudoXVREPLI_B = 440, // LoongArchLASXInstrInfo.td:1079 |
| 456 | PseudoXVREPLI_D = 441, // LoongArchLASXInstrInfo.td:1085 |
| 457 | PseudoXVREPLI_H = 442, // LoongArchLASXInstrInfo.td:1081 |
| 458 | PseudoXVREPLI_W = 443, // LoongArchLASXInstrInfo.td:1083 |
| 459 | RDFCSR = 444, // LoongArchInstrInfo.td:2515 |
| 460 | Select_GPR_Using_CC_GPR = 445, // LoongArchInstrInfo.td:1565 |
| 461 | SplitPairF64Pseudo = 446, // LoongArchFloat64InstrInfo.td:368 |
| 462 | WRFCSR = 447, // LoongArchInstrInfo.td:2513 |
| 463 | ADC_B = 448, // LoongArchLBTInstrInfo.td:27 |
| 464 | ADC_D = 449, // LoongArchLBTInstrInfo.td:192 |
| 465 | ADC_H = 450, // LoongArchLBTInstrInfo.td:28 |
| 466 | ADC_W = 451, // LoongArchLBTInstrInfo.td:29 |
| 467 | ADDI_D = 452, // LoongArchInstrInfo.td:997 |
| 468 | ADDI_W = 453, // LoongArchInstrInfo.td:854 |
| 469 | ADDU12I_D = 454, // LoongArchLBTInstrInfo.td:191 |
| 470 | ADDU12I_W = 455, // LoongArchLBTInstrInfo.td:25 |
| 471 | ADDU16I_D = 456, // LoongArchInstrInfo.td:999 |
| 472 | ADD_D = 457, // LoongArchInstrInfo.td:991 |
| 473 | ADD_W = 458, // LoongArchInstrInfo.td:852 |
| 474 | ALSL_D = 459, // LoongArchInstrInfo.td:1001 |
| 475 | ALSL_W = 460, // LoongArchInstrInfo.td:949 |
| 476 | ALSL_WU = 461, // LoongArchInstrInfo.td:1000 |
| 477 | AMADD_B = 462, // LoongArchInstrInfo.td:1103 |
| 478 | AMADD_D = 463, // LoongArchInstrInfo.td:1106 |
| 479 | AMADD_H = 464, // LoongArchInstrInfo.td:1104 |
| 480 | AMADD_W = 465, // LoongArchInstrInfo.td:1105 |
| 481 | AMADD__DB_B = 466, // LoongArchInstrInfo.td:1125 |
| 482 | AMADD__DB_D = 467, // LoongArchInstrInfo.td:1128 |
| 483 | AMADD__DB_H = 468, // LoongArchInstrInfo.td:1126 |
| 484 | AMADD__DB_W = 469, // LoongArchInstrInfo.td:1127 |
| 485 | AMAND_D = 470, // LoongArchInstrInfo.td:1108 |
| 486 | AMAND_W = 471, // LoongArchInstrInfo.td:1107 |
| 487 | AMAND__DB_D = 472, // LoongArchInstrInfo.td:1130 |
| 488 | AMAND__DB_W = 473, // LoongArchInstrInfo.td:1129 |
| 489 | AMCAS_B = 474, // LoongArchInstrInfo.td:1143 |
| 490 | AMCAS_D = 475, // LoongArchInstrInfo.td:1146 |
| 491 | AMCAS_H = 476, // LoongArchInstrInfo.td:1144 |
| 492 | AMCAS_W = 477, // LoongArchInstrInfo.td:1145 |
| 493 | AMCAS__DB_B = 478, // LoongArchInstrInfo.td:1147 |
| 494 | AMCAS__DB_D = 479, // LoongArchInstrInfo.td:1150 |
| 495 | AMCAS__DB_H = 480, // LoongArchInstrInfo.td:1148 |
| 496 | AMCAS__DB_W = 481, // LoongArchInstrInfo.td:1149 |
| 497 | AMMAX_D = 482, // LoongArchInstrInfo.td:1114 |
| 498 | AMMAX_DU = 483, // LoongArchInstrInfo.td:1118 |
| 499 | AMMAX_W = 484, // LoongArchInstrInfo.td:1113 |
| 500 | AMMAX_WU = 485, // LoongArchInstrInfo.td:1117 |
| 501 | AMMAX__DB_D = 486, // LoongArchInstrInfo.td:1136 |
| 502 | AMMAX__DB_DU = 487, // LoongArchInstrInfo.td:1140 |
| 503 | AMMAX__DB_W = 488, // LoongArchInstrInfo.td:1135 |
| 504 | AMMAX__DB_WU = 489, // LoongArchInstrInfo.td:1139 |
| 505 | AMMIN_D = 490, // LoongArchInstrInfo.td:1116 |
| 506 | AMMIN_DU = 491, // LoongArchInstrInfo.td:1120 |
| 507 | AMMIN_W = 492, // LoongArchInstrInfo.td:1115 |
| 508 | AMMIN_WU = 493, // LoongArchInstrInfo.td:1119 |
| 509 | AMMIN__DB_D = 494, // LoongArchInstrInfo.td:1138 |
| 510 | AMMIN__DB_DU = 495, // LoongArchInstrInfo.td:1142 |
| 511 | AMMIN__DB_W = 496, // LoongArchInstrInfo.td:1137 |
| 512 | AMMIN__DB_WU = 497, // LoongArchInstrInfo.td:1141 |
| 513 | AMOR_D = 498, // LoongArchInstrInfo.td:1110 |
| 514 | AMOR_W = 499, // LoongArchInstrInfo.td:1109 |
| 515 | AMOR__DB_D = 500, // LoongArchInstrInfo.td:1132 |
| 516 | AMOR__DB_W = 501, // LoongArchInstrInfo.td:1131 |
| 517 | AMSWAP_B = 502, // LoongArchInstrInfo.td:1099 |
| 518 | AMSWAP_D = 503, // LoongArchInstrInfo.td:1102 |
| 519 | AMSWAP_H = 504, // LoongArchInstrInfo.td:1100 |
| 520 | AMSWAP_W = 505, // LoongArchInstrInfo.td:1101 |
| 521 | AMSWAP__DB_B = 506, // LoongArchInstrInfo.td:1121 |
| 522 | AMSWAP__DB_D = 507, // LoongArchInstrInfo.td:1124 |
| 523 | AMSWAP__DB_H = 508, // LoongArchInstrInfo.td:1122 |
| 524 | AMSWAP__DB_W = 509, // LoongArchInstrInfo.td:1123 |
| 525 | AMXOR_D = 510, // LoongArchInstrInfo.td:1112 |
| 526 | AMXOR_W = 511, // LoongArchInstrInfo.td:1111 |
| 527 | AMXOR__DB_D = 512, // LoongArchInstrInfo.td:1134 |
| 528 | AMXOR__DB_W = 513, // LoongArchInstrInfo.td:1133 |
| 529 | AND = 514, // LoongArchInstrInfo.td:863 |
| 530 | ANDI = 515, // LoongArchInstrInfo.td:867 |
| 531 | ANDN = 516, // LoongArchInstrInfo.td:950 |
| 532 | ARMADC_W = 517, // LoongArchLBTInstrInfo.td:168 |
| 533 | ARMADD_W = 518, // LoongArchLBTInstrInfo.td:166 |
| 534 | ARMAND_W = 519, // LoongArchLBTInstrInfo.td:170 |
| 535 | ARMMFFLAG = 520, // LoongArchLBTInstrInfo.td:186 |
| 536 | ARMMOVE = 521, // LoongArchLBTInstrInfo.td:183 |
| 537 | ARMMOV_D = 522, // LoongArchLBTInstrInfo.td:238 |
| 538 | ARMMOV_W = 523, // LoongArchLBTInstrInfo.td:184 |
| 539 | ARMMTFLAG = 524, // LoongArchLBTInstrInfo.td:187 |
| 540 | ARMNOT_W = 525, // LoongArchLBTInstrInfo.td:173 |
| 541 | ARMOR_W = 526, // LoongArchLBTInstrInfo.td:171 |
| 542 | ARMROTRI_W = 527, // LoongArchLBTInstrInfo.td:181 |
| 543 | ARMROTR_W = 528, // LoongArchLBTInstrInfo.td:177 |
| 544 | ARMRRX_W = 529, // LoongArchLBTInstrInfo.td:182 |
| 545 | ARMSBC_W = 530, // LoongArchLBTInstrInfo.td:169 |
| 546 | ARMSLLI_W = 531, // LoongArchLBTInstrInfo.td:178 |
| 547 | ARMSLL_W = 532, // LoongArchLBTInstrInfo.td:174 |
| 548 | ARMSRAI_W = 533, // LoongArchLBTInstrInfo.td:180 |
| 549 | ARMSRA_W = 534, // LoongArchLBTInstrInfo.td:176 |
| 550 | ARMSRLI_W = 535, // LoongArchLBTInstrInfo.td:179 |
| 551 | ARMSRL_W = 536, // LoongArchLBTInstrInfo.td:175 |
| 552 | ARMSUB_W = 537, // LoongArchLBTInstrInfo.td:167 |
| 553 | ARMXOR_W = 538, // LoongArchLBTInstrInfo.td:172 |
| 554 | ASRTGT_D = 539, // LoongArchInstrInfo.td:1172 |
| 555 | ASRTLE_D = 540, // LoongArchInstrInfo.td:1170 |
| 556 | B = 541, // LoongArchInstrInfo.td:899 |
| 557 | BCEQZ = 542, // LoongArchFloat32InstrInfo.td:130 |
| 558 | BCNEZ = 543, // LoongArchFloat32InstrInfo.td:131 |
| 559 | BEQ = 544, // LoongArchInstrInfo.td:893 |
| 560 | BEQZ = 545, // LoongArchInstrInfo.td:982 |
| 561 | BGE = 546, // LoongArchInstrInfo.td:896 |
| 562 | BGEU = 547, // LoongArchInstrInfo.td:898 |
| 563 | BITREV_4B = 548, // LoongArchInstrInfo.td:968 |
| 564 | BITREV_8B = 549, // LoongArchInstrInfo.td:1046 |
| 565 | BITREV_D = 550, // LoongArchInstrInfo.td:1047 |
| 566 | BITREV_W = 551, // LoongArchInstrInfo.td:969 |
| 567 | BL = 552, // LoongArchInstrInfo.td:902 |
| 568 | BLT = 553, // LoongArchInstrInfo.td:895 |
| 569 | BLTU = 554, // LoongArchInstrInfo.td:897 |
| 570 | BNE = 555, // LoongArchInstrInfo.td:894 |
| 571 | BNEZ = 556, // LoongArchInstrInfo.td:983 |
| 572 | BREAK = 557, // LoongArchInstrInfo.td:930 |
| 573 | BSTRINS_D = 558, // LoongArchInstrInfo.td:1049 |
| 574 | BSTRINS_W = 559, // LoongArchInstrInfo.td:971 |
| 575 | BSTRPICK_D = 560, // LoongArchInstrInfo.td:1053 |
| 576 | BSTRPICK_W = 561, // LoongArchInstrInfo.td:975 |
| 577 | BYTEPICK_D = 562, // LoongArchInstrInfo.td:1040 |
| 578 | BYTEPICK_W = 563, // LoongArchInstrInfo.td:966 |
| 579 | CACOP = 564, // LoongArchInstrInfo.td:944 |
| 580 | CLO_D = 565, // LoongArchInstrInfo.td:1036 |
| 581 | CLO_W = 566, // LoongArchInstrInfo.td:962 |
| 582 | CLZ_D = 567, // LoongArchInstrInfo.td:1037 |
| 583 | CLZ_W = 568, // LoongArchInstrInfo.td:963 |
| 584 | CPUCFG = 569, // LoongArchInstrInfo.td:941 |
| 585 | CRCC_W_B_W = 570, // LoongArchInstrInfo.td:1164 |
| 586 | CRCC_W_D_W = 571, // LoongArchInstrInfo.td:1167 |
| 587 | CRCC_W_H_W = 572, // LoongArchInstrInfo.td:1165 |
| 588 | CRCC_W_W_W = 573, // LoongArchInstrInfo.td:1166 |
| 589 | CRC_W_B_W = 574, // LoongArchInstrInfo.td:1160 |
| 590 | CRC_W_D_W = 575, // LoongArchInstrInfo.td:1163 |
| 591 | CRC_W_H_W = 576, // LoongArchInstrInfo.td:1161 |
| 592 | CRC_W_W_W = 577, // LoongArchInstrInfo.td:1162 |
| 593 | CSRRD = 578, // LoongArchInstrInfo.td:2525 |
| 594 | CSRWR = 579, // LoongArchInstrInfo.td:2528 |
| 595 | CSRXCHG = 580, // LoongArchInstrInfo.td:2530 |
| 596 | CTO_D = 581, // LoongArchInstrInfo.td:1038 |
| 597 | CTO_W = 582, // LoongArchInstrInfo.td:964 |
| 598 | CTZ_D = 583, // LoongArchInstrInfo.td:1039 |
| 599 | CTZ_W = 584, // LoongArchInstrInfo.td:965 |
| 600 | DBAR = 585, // LoongArchInstrInfo.td:925 |
| 601 | DBCL = 586, // LoongArchInstrInfo.td:2568 |
| 602 | DIV_D = 587, // LoongArchInstrInfo.td:1019 |
| 603 | DIV_DU = 588, // LoongArchInstrInfo.td:1021 |
| 604 | DIV_W = 589, // LoongArchInstrInfo.td:877 |
| 605 | DIV_WU = 590, // LoongArchInstrInfo.td:879 |
| 606 | ERTN = 591, // LoongArchInstrInfo.td:2567 |
| 607 | EXT_W_B = 592, // LoongArchInstrInfo.td:960 |
| 608 | EXT_W_H = 593, // LoongArchInstrInfo.td:961 |
| 609 | FABS_D = 594, // LoongArchFloat64InstrInfo.td:48 |
| 610 | FABS_S = 595, // LoongArchFloat32InstrInfo.td:69 |
| 611 | FADD_D = 596, // LoongArchFloat64InstrInfo.td:36 |
| 612 | FADD_S = 597, // LoongArchFloat32InstrInfo.td:57 |
| 613 | FCLASS_D = 598, // LoongArchFloat64InstrInfo.td:58 |
| 614 | FCLASS_S = 599, // LoongArchFloat32InstrInfo.td:79 |
| 615 | FCMP_CAF_D = 600, // LoongArchFloat64InstrInfo.td:61 |
| 616 | FCMP_CAF_S = 601, // LoongArchFloat32InstrInfo.td:83 |
| 617 | FCMP_CEQ_D = 602, // LoongArchFloat64InstrInfo.td:63 |
| 618 | FCMP_CEQ_S = 603, // LoongArchFloat32InstrInfo.td:85 |
| 619 | FCMP_CLE_D = 604, // LoongArchFloat64InstrInfo.td:67 |
| 620 | FCMP_CLE_S = 605, // LoongArchFloat32InstrInfo.td:89 |
| 621 | FCMP_CLT_D = 606, // LoongArchFloat64InstrInfo.td:65 |
| 622 | FCMP_CLT_S = 607, // LoongArchFloat32InstrInfo.td:87 |
| 623 | FCMP_CNE_D = 608, // LoongArchFloat64InstrInfo.td:69 |
| 624 | FCMP_CNE_S = 609, // LoongArchFloat32InstrInfo.td:91 |
| 625 | FCMP_COR_D = 610, // LoongArchFloat64InstrInfo.td:70 |
| 626 | FCMP_COR_S = 611, // LoongArchFloat32InstrInfo.td:92 |
| 627 | FCMP_CUEQ_D = 612, // LoongArchFloat64InstrInfo.td:64 |
| 628 | FCMP_CUEQ_S = 613, // LoongArchFloat32InstrInfo.td:86 |
| 629 | FCMP_CULE_D = 614, // LoongArchFloat64InstrInfo.td:68 |
| 630 | FCMP_CULE_S = 615, // LoongArchFloat32InstrInfo.td:90 |
| 631 | FCMP_CULT_D = 616, // LoongArchFloat64InstrInfo.td:66 |
| 632 | FCMP_CULT_S = 617, // LoongArchFloat32InstrInfo.td:88 |
| 633 | FCMP_CUNE_D = 618, // LoongArchFloat64InstrInfo.td:71 |
| 634 | FCMP_CUNE_S = 619, // LoongArchFloat32InstrInfo.td:93 |
| 635 | FCMP_CUN_D = 620, // LoongArchFloat64InstrInfo.td:62 |
| 636 | FCMP_CUN_S = 621, // LoongArchFloat32InstrInfo.td:84 |
| 637 | FCMP_SAF_D = 622, // LoongArchFloat64InstrInfo.td:72 |
| 638 | FCMP_SAF_S = 623, // LoongArchFloat32InstrInfo.td:94 |
| 639 | FCMP_SEQ_D = 624, // LoongArchFloat64InstrInfo.td:74 |
| 640 | FCMP_SEQ_S = 625, // LoongArchFloat32InstrInfo.td:96 |
| 641 | FCMP_SLE_D = 626, // LoongArchFloat64InstrInfo.td:78 |
| 642 | FCMP_SLE_S = 627, // LoongArchFloat32InstrInfo.td:100 |
| 643 | FCMP_SLT_D = 628, // LoongArchFloat64InstrInfo.td:76 |
| 644 | FCMP_SLT_S = 629, // LoongArchFloat32InstrInfo.td:98 |
| 645 | FCMP_SNE_D = 630, // LoongArchFloat64InstrInfo.td:80 |
| 646 | FCMP_SNE_S = 631, // LoongArchFloat32InstrInfo.td:102 |
| 647 | FCMP_SOR_D = 632, // LoongArchFloat64InstrInfo.td:81 |
| 648 | FCMP_SOR_S = 633, // LoongArchFloat32InstrInfo.td:103 |
| 649 | FCMP_SUEQ_D = 634, // LoongArchFloat64InstrInfo.td:75 |
| 650 | FCMP_SUEQ_S = 635, // LoongArchFloat32InstrInfo.td:97 |
| 651 | FCMP_SULE_D = 636, // LoongArchFloat64InstrInfo.td:79 |
| 652 | FCMP_SULE_S = 637, // LoongArchFloat32InstrInfo.td:101 |
| 653 | FCMP_SULT_D = 638, // LoongArchFloat64InstrInfo.td:77 |
| 654 | FCMP_SULT_S = 639, // LoongArchFloat32InstrInfo.td:99 |
| 655 | FCMP_SUNE_D = 640, // LoongArchFloat64InstrInfo.td:82 |
| 656 | FCMP_SUNE_S = 641, // LoongArchFloat32InstrInfo.td:104 |
| 657 | FCMP_SUN_D = 642, // LoongArchFloat64InstrInfo.td:73 |
| 658 | FCMP_SUN_S = 643, // LoongArchFloat32InstrInfo.td:95 |
| 659 | FCOPYSIGN_D = 644, // LoongArchFloat64InstrInfo.td:57 |
| 660 | FCOPYSIGN_S = 645, // LoongArchFloat32InstrInfo.td:78 |
| 661 | FCVT_D_LD = 646, // LoongArchLBTInstrInfo.td:51 |
| 662 | FCVT_D_S = 647, // LoongArchFloat64InstrInfo.td:92 |
| 663 | FCVT_LD_D = 648, // LoongArchLBTInstrInfo.td:50 |
| 664 | FCVT_S_D = 649, // LoongArchFloat64InstrInfo.td:91 |
| 665 | FCVT_UD_D = 650, // LoongArchLBTInstrInfo.td:49 |
| 666 | FDIV_D = 651, // LoongArchFloat64InstrInfo.td:39 |
| 667 | FDIV_S = 652, // LoongArchFloat32InstrInfo.td:60 |
| 668 | FFINT_D_L = 653, // LoongArchFloat64InstrInfo.td:94 |
| 669 | FFINT_D_W = 654, // LoongArchFloat64InstrInfo.td:93 |
| 670 | FFINT_S_L = 655, // LoongArchFloat64InstrInfo.td:85 |
| 671 | FFINT_S_W = 656, // LoongArchFloat32InstrInfo.td:107 |
| 672 | FLDGT_D = 657, // LoongArchFloat64InstrInfo.td:127 |
| 673 | FLDGT_S = 658, // LoongArchFloat32InstrInfo.td:140 |
| 674 | FLDLE_D = 659, // LoongArchFloat64InstrInfo.td:128 |
| 675 | FLDLE_S = 660, // LoongArchFloat32InstrInfo.td:141 |
| 676 | FLDX_D = 661, // LoongArchFloat64InstrInfo.td:123 |
| 677 | FLDX_S = 662, // LoongArchFloat32InstrInfo.td:136 |
| 678 | FLD_D = 663, // LoongArchFloat64InstrInfo.td:121 |
| 679 | FLD_S = 664, // LoongArchFloat32InstrInfo.td:134 |
| 680 | FLOGB_D = 665, // LoongArchFloat64InstrInfo.td:56 |
| 681 | FLOGB_S = 666, // LoongArchFloat32InstrInfo.td:77 |
| 682 | FMADD_D = 667, // LoongArchFloat64InstrInfo.td:40 |
| 683 | FMADD_S = 668, // LoongArchFloat32InstrInfo.td:61 |
| 684 | FMAXA_D = 669, // LoongArchFloat64InstrInfo.td:46 |
| 685 | FMAXA_S = 670, // LoongArchFloat32InstrInfo.td:67 |
| 686 | FMAX_D = 671, // LoongArchFloat64InstrInfo.td:44 |
| 687 | FMAX_S = 672, // LoongArchFloat32InstrInfo.td:65 |
| 688 | FMINA_D = 673, // LoongArchFloat64InstrInfo.td:47 |
| 689 | FMINA_S = 674, // LoongArchFloat32InstrInfo.td:68 |
| 690 | FMIN_D = 675, // LoongArchFloat64InstrInfo.td:45 |
| 691 | FMIN_S = 676, // LoongArchFloat32InstrInfo.td:66 |
| 692 | FMOV_D = 677, // LoongArchFloat64InstrInfo.td:108 |
| 693 | FMOV_S = 678, // LoongArchFloat32InstrInfo.td:117 |
| 694 | FMSUB_D = 679, // LoongArchFloat64InstrInfo.td:41 |
| 695 | FMSUB_S = 680, // LoongArchFloat32InstrInfo.td:62 |
| 696 | FMUL_D = 681, // LoongArchFloat64InstrInfo.td:38 |
| 697 | FMUL_S = 682, // LoongArchFloat32InstrInfo.td:59 |
| 698 | FNEG_D = 683, // LoongArchFloat64InstrInfo.td:49 |
| 699 | FNEG_S = 684, // LoongArchFloat32InstrInfo.td:70 |
| 700 | FNMADD_D = 685, // LoongArchFloat64InstrInfo.td:42 |
| 701 | FNMADD_S = 686, // LoongArchFloat32InstrInfo.td:63 |
| 702 | FNMSUB_D = 687, // LoongArchFloat64InstrInfo.td:43 |
| 703 | FNMSUB_S = 688, // LoongArchFloat32InstrInfo.td:64 |
| 704 | FRECIPE_D = 689, // LoongArchFloat64InstrInfo.td:53 |
| 705 | FRECIPE_S = 690, // LoongArchFloat32InstrInfo.td:74 |
| 706 | FRECIP_D = 691, // LoongArchFloat64InstrInfo.td:51 |
| 707 | FRECIP_S = 692, // LoongArchFloat32InstrInfo.td:72 |
| 708 | FRINT_D = 693, // LoongArchFloat64InstrInfo.td:105 |
| 709 | FRINT_S = 694, // LoongArchFloat32InstrInfo.td:113 |
| 710 | FRSQRTE_D = 695, // LoongArchFloat64InstrInfo.td:54 |
| 711 | FRSQRTE_S = 696, // LoongArchFloat32InstrInfo.td:75 |
| 712 | FRSQRT_D = 697, // LoongArchFloat64InstrInfo.td:52 |
| 713 | FRSQRT_S = 698, // LoongArchFloat32InstrInfo.td:73 |
| 714 | FSCALEB_D = 699, // LoongArchFloat64InstrInfo.td:55 |
| 715 | FSCALEB_S = 700, // LoongArchFloat32InstrInfo.td:76 |
| 716 | FSEL_xD = 701, // LoongArchFloat64InstrInfo.td:112 |
| 717 | FSEL_xS = 702, // LoongArchFloat32InstrInfo.td:116 |
| 718 | FSQRT_D = 703, // LoongArchFloat64InstrInfo.td:50 |
| 719 | FSQRT_S = 704, // LoongArchFloat32InstrInfo.td:71 |
| 720 | FSTGT_D = 705, // LoongArchFloat64InstrInfo.td:129 |
| 721 | FSTGT_S = 706, // LoongArchFloat32InstrInfo.td:142 |
| 722 | FSTLE_D = 707, // LoongArchFloat64InstrInfo.td:130 |
| 723 | FSTLE_S = 708, // LoongArchFloat32InstrInfo.td:143 |
| 724 | FSTX_D = 709, // LoongArchFloat64InstrInfo.td:124 |
| 725 | FSTX_S = 710, // LoongArchFloat32InstrInfo.td:137 |
| 726 | FST_D = 711, // LoongArchFloat64InstrInfo.td:122 |
| 727 | FST_S = 712, // LoongArchFloat32InstrInfo.td:135 |
| 728 | FSUB_D = 713, // LoongArchFloat64InstrInfo.td:37 |
| 729 | FSUB_S = 714, // LoongArchFloat32InstrInfo.td:58 |
| 730 | FTINTRM_L_D = 715, // LoongArchFloat64InstrInfo.td:98 |
| 731 | FTINTRM_L_S = 716, // LoongArchFloat64InstrInfo.td:87 |
| 732 | FTINTRM_W_D = 717, // LoongArchFloat64InstrInfo.td:97 |
| 733 | FTINTRM_W_S = 718, // LoongArchFloat32InstrInfo.td:109 |
| 734 | FTINTRNE_L_D = 719, // LoongArchFloat64InstrInfo.td:104 |
| 735 | FTINTRNE_L_S = 720, // LoongArchFloat64InstrInfo.td:90 |
| 736 | FTINTRNE_W_D = 721, // LoongArchFloat64InstrInfo.td:103 |
| 737 | FTINTRNE_W_S = 722, // LoongArchFloat32InstrInfo.td:112 |
| 738 | FTINTRP_L_D = 723, // LoongArchFloat64InstrInfo.td:100 |
| 739 | FTINTRP_L_S = 724, // LoongArchFloat64InstrInfo.td:88 |
| 740 | FTINTRP_W_D = 725, // LoongArchFloat64InstrInfo.td:99 |
| 741 | FTINTRP_W_S = 726, // LoongArchFloat32InstrInfo.td:110 |
| 742 | FTINTRZ_L_D = 727, // LoongArchFloat64InstrInfo.td:102 |
| 743 | FTINTRZ_L_S = 728, // LoongArchFloat64InstrInfo.td:89 |
| 744 | FTINTRZ_W_D = 729, // LoongArchFloat64InstrInfo.td:101 |
| 745 | FTINTRZ_W_S = 730, // LoongArchFloat32InstrInfo.td:111 |
| 746 | FTINT_L_D = 731, // LoongArchFloat64InstrInfo.td:96 |
| 747 | FTINT_L_S = 732, // LoongArchFloat64InstrInfo.td:86 |
| 748 | FTINT_W_D = 733, // LoongArchFloat64InstrInfo.td:95 |
| 749 | FTINT_W_S = 734, // LoongArchFloat32InstrInfo.td:108 |
| 750 | GCSRRD = 735, // LoongArchLVZInstrInfo.td:19 |
| 751 | GCSRWR = 736, // LoongArchLVZInstrInfo.td:23 |
| 752 | GCSRXCHG = 737, // LoongArchLVZInstrInfo.td:25 |
| 753 | GTLBFLUSH = 738, // LoongArchLVZInstrInfo.td:30 |
| 754 | HVCL = 739, // LoongArchLVZInstrInfo.td:31 |
| 755 | IBAR = 740, // LoongArchInstrInfo.td:926 |
| 756 | IDLE = 741, // LoongArchInstrInfo.td:2569 |
| 757 | INVTLB = 742, // LoongArchInstrInfo.td:2555 |
| 758 | IOCSRRD_B = 743, // LoongArchInstrInfo.td:2536 |
| 759 | IOCSRRD_D = 744, // LoongArchInstrInfo.td:2543 |
| 760 | IOCSRRD_H = 745, // LoongArchInstrInfo.td:2537 |
| 761 | IOCSRRD_W = 746, // LoongArchInstrInfo.td:2538 |
| 762 | IOCSRWR_B = 747, // LoongArchInstrInfo.td:2539 |
| 763 | IOCSRWR_D = 748, // LoongArchInstrInfo.td:2544 |
| 764 | IOCSRWR_H = 749, // LoongArchInstrInfo.td:2540 |
| 765 | IOCSRWR_W = 750, // LoongArchInstrInfo.td:2541 |
| 766 | JIRL = 751, // LoongArchInstrInfo.td:904 |
| 767 | JISCR0 = 752, // LoongArchLBTInstrInfo.td:22 |
| 768 | JISCR1 = 753, // LoongArchLBTInstrInfo.td:23 |
| 769 | LDDIR = 754, // LoongArchInstrInfo.td:2560 |
| 770 | LDGT_B = 755, // LoongArchInstrInfo.td:1081 |
| 771 | LDGT_D = 756, // LoongArchInstrInfo.td:1084 |
| 772 | LDGT_H = 757, // LoongArchInstrInfo.td:1082 |
| 773 | LDGT_W = 758, // LoongArchInstrInfo.td:1083 |
| 774 | LDLE_B = 759, // LoongArchInstrInfo.td:1085 |
| 775 | LDLE_D = 760, // LoongArchInstrInfo.td:1088 |
| 776 | LDLE_H = 761, // LoongArchInstrInfo.td:1086 |
| 777 | LDLE_W = 762, // LoongArchInstrInfo.td:1087 |
| 778 | LDL_D = 763, // LoongArchLBTInstrInfo.td:199 |
| 779 | LDL_W = 764, // LoongArchLBTInstrInfo.td:54 |
| 780 | LDPTE = 765, // LoongArchInstrInfo.td:2562 |
| 781 | LDPTR_D = 766, // LoongArchInstrInfo.td:1073 |
| 782 | LDPTR_W = 767, // LoongArchInstrInfo.td:1072 |
| 783 | LDR_D = 768, // LoongArchLBTInstrInfo.td:200 |
| 784 | LDR_W = 769, // LoongArchLBTInstrInfo.td:55 |
| 785 | LDX_B = 770, // LoongArchInstrInfo.td:1061 |
| 786 | LDX_BU = 771, // LoongArchInstrInfo.td:1065 |
| 787 | LDX_D = 772, // LoongArchInstrInfo.td:1064 |
| 788 | LDX_H = 773, // LoongArchInstrInfo.td:1062 |
| 789 | LDX_HU = 774, // LoongArchInstrInfo.td:1066 |
| 790 | LDX_W = 775, // LoongArchInstrInfo.td:1063 |
| 791 | LDX_WU = 776, // LoongArchInstrInfo.td:1067 |
| 792 | LD_B = 777, // LoongArchInstrInfo.td:908 |
| 793 | LD_BU = 778, // LoongArchInstrInfo.td:911 |
| 794 | LD_D = 779, // LoongArchInstrInfo.td:1059 |
| 795 | LD_H = 780, // LoongArchInstrInfo.td:909 |
| 796 | LD_HU = 781, // LoongArchInstrInfo.td:912 |
| 797 | LD_W = 782, // LoongArchInstrInfo.td:910 |
| 798 | LD_WU = 783, // LoongArchInstrInfo.td:1058 |
| 799 | LLACQ_D = 784, // LoongArchInstrInfo.td:1156 |
| 800 | LLACQ_W = 785, // LoongArchInstrInfo.td:1154 |
| 801 | LL_D = 786, // LoongArchInstrInfo.td:1151 |
| 802 | LL_W = 787, // LoongArchInstrInfo.td:921 |
| 803 | LU12I_W = 788, // LoongArchInstrInfo.td:856 |
| 804 | LU32I_D = 789, // LoongArchInstrInfo.td:1005 |
| 805 | LU52I_D = 790, // LoongArchInstrInfo.td:1010 |
| 806 | MASKEQZ = 791, // LoongArchInstrInfo.td:978 |
| 807 | MASKNEZ = 792, // LoongArchInstrInfo.td:979 |
| 808 | MOD_D = 793, // LoongArchInstrInfo.td:1020 |
| 809 | MOD_DU = 794, // LoongArchInstrInfo.td:1022 |
| 810 | MOD_W = 795, // LoongArchInstrInfo.td:878 |
| 811 | MOD_WU = 796, // LoongArchInstrInfo.td:880 |
| 812 | MOVCF2FR_xS = 797, // LoongArchFloat32InstrInfo.td:125 |
| 813 | MOVCF2GR = 798, // LoongArchFloat32InstrInfo.td:127 |
| 814 | MOVFCSR2GR = 799, // LoongArchFloat32InstrInfo.td:122 |
| 815 | MOVFR2CF_xS = 800, // LoongArchFloat32InstrInfo.td:124 |
| 816 | MOVFR2GR_D = 801, // LoongArchFloat64InstrInfo.td:137 |
| 817 | MOVFR2GR_S = 802, // LoongArchFloat32InstrInfo.td:119 |
| 818 | MOVFR2GR_S_64 = 803, // LoongArchFloat64InstrInfo.td:111 |
| 819 | MOVFRH2GR_S = 804, // LoongArchFloat64InstrInfo.td:109 |
| 820 | MOVGR2CF = 805, // LoongArchFloat32InstrInfo.td:126 |
| 821 | MOVGR2FCSR = 806, // LoongArchFloat32InstrInfo.td:121 |
| 822 | MOVGR2FRH_W = 807, // LoongArchFloat64InstrInfo.td:115 |
| 823 | MOVGR2FR_D = 808, // LoongArchFloat64InstrInfo.td:136 |
| 824 | MOVGR2FR_W = 809, // LoongArchFloat32InstrInfo.td:118 |
| 825 | MOVGR2FR_W_64 = 810, // LoongArchFloat64InstrInfo.td:142 |
| 826 | MOVGR2SCR = 811, // LoongArchLBTInstrInfo.td:19 |
| 827 | MOVSCR2GR = 812, // LoongArchLBTInstrInfo.td:20 |
| 828 | MULH_D = 813, // LoongArchInstrInfo.td:1014 |
| 829 | MULH_DU = 814, // LoongArchInstrInfo.td:1015 |
| 830 | MULH_W = 815, // LoongArchInstrInfo.td:874 |
| 831 | MULH_WU = 816, // LoongArchInstrInfo.td:875 |
| 832 | MULW_D_W = 817, // LoongArchInstrInfo.td:1016 |
| 833 | MULW_D_WU = 818, // LoongArchInstrInfo.td:1017 |
| 834 | MUL_D = 819, // LoongArchInstrInfo.td:1013 |
| 835 | MUL_W = 820, // LoongArchInstrInfo.td:873 |
| 836 | NOR = 821, // LoongArchInstrInfo.td:865 |
| 837 | OR = 822, // LoongArchInstrInfo.td:864 |
| 838 | ORI = 823, // LoongArchInstrInfo.td:870 |
| 839 | ORN = 824, // LoongArchInstrInfo.td:951 |
| 840 | PCADDI = 825, // LoongArchInstrInfo.td:952 |
| 841 | PCADDU12I = 826, // LoongArchInstrInfo.td:862 |
| 842 | PCADDU18I = 827, // LoongArchInstrInfo.td:1012 |
| 843 | PCALAU12I = 828, // LoongArchInstrInfo.td:953 |
| 844 | PRELD = 829, // LoongArchInstrInfo.td:917 |
| 845 | PRELDX = 830, // LoongArchInstrInfo.td:1077 |
| 846 | RCRI_B = 831, // LoongArchLBTInstrInfo.td:45 |
| 847 | RCRI_D = 832, // LoongArchLBTInstrInfo.td:195 |
| 848 | RCRI_H = 833, // LoongArchLBTInstrInfo.td:46 |
| 849 | RCRI_W = 834, // LoongArchLBTInstrInfo.td:47 |
| 850 | RCR_B = 835, // LoongArchLBTInstrInfo.td:41 |
| 851 | RCR_D = 836, // LoongArchLBTInstrInfo.td:194 |
| 852 | RCR_H = 837, // LoongArchLBTInstrInfo.td:42 |
| 853 | RCR_W = 838, // LoongArchLBTInstrInfo.td:43 |
| 854 | RDTIMEH_W = 839, // LoongArchInstrInfo.td:932 |
| 855 | RDTIMEL_W = 840, // LoongArchInstrInfo.td:931 |
| 856 | RDTIME_D = 841, // LoongArchInstrInfo.td:1174 |
| 857 | REVB_2H = 842, // LoongArchInstrInfo.td:967 |
| 858 | REVB_2W = 843, // LoongArchInstrInfo.td:1042 |
| 859 | REVB_4H = 844, // LoongArchInstrInfo.td:1041 |
| 860 | REVB_D = 845, // LoongArchInstrInfo.td:1043 |
| 861 | REVH_2W = 846, // LoongArchInstrInfo.td:1044 |
| 862 | REVH_D = 847, // LoongArchInstrInfo.td:1045 |
| 863 | ROTRI_B = 848, // LoongArchLBTInstrInfo.td:38 |
| 864 | ROTRI_D = 849, // LoongArchInstrInfo.td:1033 |
| 865 | ROTRI_H = 850, // LoongArchLBTInstrInfo.td:39 |
| 866 | ROTRI_W = 851, // LoongArchInstrInfo.td:957 |
| 867 | ROTR_B = 852, // LoongArchLBTInstrInfo.td:35 |
| 868 | ROTR_D = 853, // LoongArchInstrInfo.td:1029 |
| 869 | ROTR_H = 854, // LoongArchLBTInstrInfo.td:36 |
| 870 | ROTR_W = 855, // LoongArchInstrInfo.td:956 |
| 871 | SBC_B = 856, // LoongArchLBTInstrInfo.td:31 |
| 872 | SBC_D = 857, // LoongArchLBTInstrInfo.td:193 |
| 873 | SBC_H = 858, // LoongArchLBTInstrInfo.td:32 |
| 874 | SBC_W = 859, // LoongArchLBTInstrInfo.td:33 |
| 875 | SCREL_D = 860, // LoongArchInstrInfo.td:1157 |
| 876 | SCREL_W = 861, // LoongArchInstrInfo.td:1155 |
| 877 | SC_D = 862, // LoongArchInstrInfo.td:1152 |
| 878 | SC_Q = 863, // LoongArchInstrInfo.td:1153 |
| 879 | SC_W = 864, // LoongArchInstrInfo.td:922 |
| 880 | SETARMJ = 865, // LoongArchLBTInstrInfo.td:188 |
| 881 | SETX86J = 866, // LoongArchLBTInstrInfo.td:152 |
| 882 | SETX86LOOPE = 867, // LoongArchLBTInstrInfo.td:153 |
| 883 | SETX86LOOPNE = 868, // LoongArchLBTInstrInfo.td:154 |
| 884 | SET_CFR_FALSE = 869, // LoongArchFloat32InstrInfo.td:157 |
| 885 | SET_CFR_TRUE = 870, // LoongArchFloat32InstrInfo.td:159 |
| 886 | SLLI_D = 871, // LoongArchInstrInfo.td:1030 |
| 887 | SLLI_W = 872, // LoongArchInstrInfo.td:888 |
| 888 | SLL_D = 873, // LoongArchInstrInfo.td:1026 |
| 889 | SLL_W = 874, // LoongArchInstrInfo.td:884 |
| 890 | SLT = 875, // LoongArchInstrInfo.td:858 |
| 891 | SLTI = 876, // LoongArchInstrInfo.td:860 |
| 892 | SLTU = 877, // LoongArchInstrInfo.td:859 |
| 893 | SLTUI = 878, // LoongArchInstrInfo.td:861 |
| 894 | SRAI_D = 879, // LoongArchInstrInfo.td:1032 |
| 895 | SRAI_W = 880, // LoongArchInstrInfo.td:890 |
| 896 | SRA_D = 881, // LoongArchInstrInfo.td:1028 |
| 897 | SRA_W = 882, // LoongArchInstrInfo.td:886 |
| 898 | SRLI_D = 883, // LoongArchInstrInfo.td:1031 |
| 899 | SRLI_W = 884, // LoongArchInstrInfo.td:889 |
| 900 | SRL_D = 885, // LoongArchInstrInfo.td:1027 |
| 901 | SRL_W = 886, // LoongArchInstrInfo.td:885 |
| 902 | STGT_B = 887, // LoongArchInstrInfo.td:1089 |
| 903 | STGT_D = 888, // LoongArchInstrInfo.td:1092 |
| 904 | STGT_H = 889, // LoongArchInstrInfo.td:1090 |
| 905 | STGT_W = 890, // LoongArchInstrInfo.td:1091 |
| 906 | STLE_B = 891, // LoongArchInstrInfo.td:1093 |
| 907 | STLE_D = 892, // LoongArchInstrInfo.td:1096 |
| 908 | STLE_H = 893, // LoongArchInstrInfo.td:1094 |
| 909 | STLE_W = 894, // LoongArchInstrInfo.td:1095 |
| 910 | STL_D = 895, // LoongArchLBTInstrInfo.td:204 |
| 911 | STL_W = 896, // LoongArchLBTInstrInfo.td:59 |
| 912 | STPTR_D = 897, // LoongArchInstrInfo.td:1075 |
| 913 | STPTR_W = 898, // LoongArchInstrInfo.td:1074 |
| 914 | STR_D = 899, // LoongArchLBTInstrInfo.td:205 |
| 915 | STR_W = 900, // LoongArchLBTInstrInfo.td:60 |
| 916 | STX_B = 901, // LoongArchInstrInfo.td:1068 |
| 917 | STX_D = 902, // LoongArchInstrInfo.td:1071 |
| 918 | STX_H = 903, // LoongArchInstrInfo.td:1069 |
| 919 | STX_W = 904, // LoongArchInstrInfo.td:1070 |
| 920 | ST_B = 905, // LoongArchInstrInfo.td:913 |
| 921 | ST_D = 906, // LoongArchInstrInfo.td:1060 |
| 922 | ST_H = 907, // LoongArchInstrInfo.td:914 |
| 923 | ST_W = 908, // LoongArchInstrInfo.td:915 |
| 924 | SUB_D = 909, // LoongArchInstrInfo.td:992 |
| 925 | SUB_W = 910, // LoongArchInstrInfo.td:853 |
| 926 | SYSCALL = 911, // LoongArchInstrInfo.td:929 |
| 927 | TLBCLR = 912, // LoongArchInstrInfo.td:2553 |
| 928 | TLBFILL = 913, // LoongArchInstrInfo.td:2552 |
| 929 | TLBFLUSH = 914, // LoongArchInstrInfo.td:2554 |
| 930 | TLBRD = 915, // LoongArchInstrInfo.td:2550 |
| 931 | TLBSRCH = 916, // LoongArchInstrInfo.td:2549 |
| 932 | TLBWR = 917, // LoongArchInstrInfo.td:2551 |
| 933 | UD = 918, // LoongArchInstrInfo.td:935 |
| 934 | VABSD_B = 919, // LoongArchLSXInstrInfo.td:562 |
| 935 | VABSD_BU = 920, // LoongArchLSXInstrInfo.td:566 |
| 936 | VABSD_D = 921, // LoongArchLSXInstrInfo.td:565 |
| 937 | VABSD_DU = 922, // LoongArchLSXInstrInfo.td:569 |
| 938 | VABSD_H = 923, // LoongArchLSXInstrInfo.td:563 |
| 939 | VABSD_HU = 924, // LoongArchLSXInstrInfo.td:567 |
| 940 | VABSD_W = 925, // LoongArchLSXInstrInfo.td:564 |
| 941 | VABSD_WU = 926, // LoongArchLSXInstrInfo.td:568 |
| 942 | VADDA_B = 927, // LoongArchLSXInstrInfo.td:571 |
| 943 | VADDA_D = 928, // LoongArchLSXInstrInfo.td:574 |
| 944 | VADDA_H = 929, // LoongArchLSXInstrInfo.td:572 |
| 945 | VADDA_W = 930, // LoongArchLSXInstrInfo.td:573 |
| 946 | VADDI_BU = 931, // LoongArchLSXInstrInfo.td:449 |
| 947 | VADDI_DU = 932, // LoongArchLSXInstrInfo.td:452 |
| 948 | VADDI_HU = 933, // LoongArchLSXInstrInfo.td:450 |
| 949 | VADDI_WU = 934, // LoongArchLSXInstrInfo.td:451 |
| 950 | VADDWEV_D_W = 935, // LoongArchLSXInstrInfo.td:502 |
| 951 | VADDWEV_D_WU = 936, // LoongArchLSXInstrInfo.td:520 |
| 952 | VADDWEV_D_WU_W = 937, // LoongArchLSXInstrInfo.td:538 |
| 953 | VADDWEV_H_B = 938, // LoongArchLSXInstrInfo.td:500 |
| 954 | VADDWEV_H_BU = 939, // LoongArchLSXInstrInfo.td:518 |
| 955 | VADDWEV_H_BU_B = 940, // LoongArchLSXInstrInfo.td:536 |
| 956 | VADDWEV_Q_D = 941, // LoongArchLSXInstrInfo.td:503 |
| 957 | VADDWEV_Q_DU = 942, // LoongArchLSXInstrInfo.td:521 |
| 958 | VADDWEV_Q_DU_D = 943, // LoongArchLSXInstrInfo.td:539 |
| 959 | VADDWEV_W_H = 944, // LoongArchLSXInstrInfo.td:501 |
| 960 | VADDWEV_W_HU = 945, // LoongArchLSXInstrInfo.td:519 |
| 961 | VADDWEV_W_HU_H = 946, // LoongArchLSXInstrInfo.td:537 |
| 962 | VADDWOD_D_W = 947, // LoongArchLSXInstrInfo.td:506 |
| 963 | VADDWOD_D_WU = 948, // LoongArchLSXInstrInfo.td:524 |
| 964 | VADDWOD_D_WU_W = 949, // LoongArchLSXInstrInfo.td:542 |
| 965 | VADDWOD_H_B = 950, // LoongArchLSXInstrInfo.td:504 |
| 966 | VADDWOD_H_BU = 951, // LoongArchLSXInstrInfo.td:522 |
| 967 | VADDWOD_H_BU_B = 952, // LoongArchLSXInstrInfo.td:540 |
| 968 | VADDWOD_Q_D = 953, // LoongArchLSXInstrInfo.td:507 |
| 969 | VADDWOD_Q_DU = 954, // LoongArchLSXInstrInfo.td:525 |
| 970 | VADDWOD_Q_DU_D = 955, // LoongArchLSXInstrInfo.td:543 |
| 971 | VADDWOD_W_H = 956, // LoongArchLSXInstrInfo.td:505 |
| 972 | VADDWOD_W_HU = 957, // LoongArchLSXInstrInfo.td:523 |
| 973 | VADDWOD_W_HU_H = 958, // LoongArchLSXInstrInfo.td:541 |
| 974 | VADD_B = 959, // LoongArchLSXInstrInfo.td:437 |
| 975 | VADD_D = 960, // LoongArchLSXInstrInfo.td:440 |
| 976 | VADD_H = 961, // LoongArchLSXInstrInfo.td:438 |
| 977 | VADD_Q = 962, // LoongArchLSXInstrInfo.td:441 |
| 978 | VADD_W = 963, // LoongArchLSXInstrInfo.td:439 |
| 979 | VANDI_B = 964, // LoongArchLSXInstrInfo.td:745 |
| 980 | VANDN_V = 965, // LoongArchLSXInstrInfo.td:742 |
| 981 | VAND_V = 966, // LoongArchLSXInstrInfo.td:738 |
| 982 | VAVGR_B = 967, // LoongArchLSXInstrInfo.td:553 |
| 983 | VAVGR_BU = 968, // LoongArchLSXInstrInfo.td:557 |
| 984 | VAVGR_D = 969, // LoongArchLSXInstrInfo.td:556 |
| 985 | VAVGR_DU = 970, // LoongArchLSXInstrInfo.td:560 |
| 986 | VAVGR_H = 971, // LoongArchLSXInstrInfo.td:554 |
| 987 | VAVGR_HU = 972, // LoongArchLSXInstrInfo.td:558 |
| 988 | VAVGR_W = 973, // LoongArchLSXInstrInfo.td:555 |
| 989 | VAVGR_WU = 974, // LoongArchLSXInstrInfo.td:559 |
| 990 | VAVG_B = 975, // LoongArchLSXInstrInfo.td:545 |
| 991 | VAVG_BU = 976, // LoongArchLSXInstrInfo.td:549 |
| 992 | VAVG_D = 977, // LoongArchLSXInstrInfo.td:548 |
| 993 | VAVG_DU = 978, // LoongArchLSXInstrInfo.td:552 |
| 994 | VAVG_H = 979, // LoongArchLSXInstrInfo.td:546 |
| 995 | VAVG_HU = 980, // LoongArchLSXInstrInfo.td:550 |
| 996 | VAVG_W = 981, // LoongArchLSXInstrInfo.td:547 |
| 997 | VAVG_WU = 982, // LoongArchLSXInstrInfo.td:551 |
| 998 | VBITCLRI_B = 983, // LoongArchLSXInstrInfo.td:923 |
| 999 | VBITCLRI_D = 984, // LoongArchLSXInstrInfo.td:926 |
| 1000 | VBITCLRI_H = 985, // LoongArchLSXInstrInfo.td:924 |
| 1001 | VBITCLRI_W = 986, // LoongArchLSXInstrInfo.td:925 |
| 1002 | VBITCLR_B = 987, // LoongArchLSXInstrInfo.td:919 |
| 1003 | VBITCLR_D = 988, // LoongArchLSXInstrInfo.td:922 |
| 1004 | VBITCLR_H = 989, // LoongArchLSXInstrInfo.td:920 |
| 1005 | VBITCLR_W = 990, // LoongArchLSXInstrInfo.td:921 |
| 1006 | VBITREVI_B = 991, // LoongArchLSXInstrInfo.td:941 |
| 1007 | VBITREVI_D = 992, // LoongArchLSXInstrInfo.td:944 |
| 1008 | VBITREVI_H = 993, // LoongArchLSXInstrInfo.td:942 |
| 1009 | VBITREVI_W = 994, // LoongArchLSXInstrInfo.td:943 |
| 1010 | VBITREV_B = 995, // LoongArchLSXInstrInfo.td:937 |
| 1011 | VBITREV_D = 996, // LoongArchLSXInstrInfo.td:940 |
| 1012 | VBITREV_H = 997, // LoongArchLSXInstrInfo.td:938 |
| 1013 | VBITREV_W = 998, // LoongArchLSXInstrInfo.td:939 |
| 1014 | VBITSELI_B = 999, // LoongArchLSXInstrInfo.td:1147 |
| 1015 | VBITSEL_V = 1000, // LoongArchLSXInstrInfo.td:1145 |
| 1016 | VBITSETI_B = 1001, // LoongArchLSXInstrInfo.td:932 |
| 1017 | VBITSETI_D = 1002, // LoongArchLSXInstrInfo.td:935 |
| 1018 | VBITSETI_H = 1003, // LoongArchLSXInstrInfo.td:933 |
| 1019 | VBITSETI_W = 1004, // LoongArchLSXInstrInfo.td:934 |
| 1020 | VBITSET_B = 1005, // LoongArchLSXInstrInfo.td:928 |
| 1021 | VBITSET_D = 1006, // LoongArchLSXInstrInfo.td:931 |
| 1022 | VBITSET_H = 1007, // LoongArchLSXInstrInfo.td:929 |
| 1023 | VBITSET_W = 1008, // LoongArchLSXInstrInfo.td:930 |
| 1024 | VBSLL_V = 1009, // LoongArchLSXInstrInfo.td:1189 |
| 1025 | VBSRL_V = 1010, // LoongArchLSXInstrInfo.td:1190 |
| 1026 | VCLO_B = 1011, // LoongArchLSXInstrInfo.td:905 |
| 1027 | VCLO_D = 1012, // LoongArchLSXInstrInfo.td:908 |
| 1028 | VCLO_H = 1013, // LoongArchLSXInstrInfo.td:906 |
| 1029 | VCLO_W = 1014, // LoongArchLSXInstrInfo.td:907 |
| 1030 | VCLZ_B = 1015, // LoongArchLSXInstrInfo.td:909 |
| 1031 | VCLZ_D = 1016, // LoongArchLSXInstrInfo.td:912 |
| 1032 | VCLZ_H = 1017, // LoongArchLSXInstrInfo.td:910 |
| 1033 | VCLZ_W = 1018, // LoongArchLSXInstrInfo.td:911 |
| 1034 | VDIV_B = 1019, // LoongArchLSXInstrInfo.td:684 |
| 1035 | VDIV_BU = 1020, // LoongArchLSXInstrInfo.td:688 |
| 1036 | VDIV_D = 1021, // LoongArchLSXInstrInfo.td:687 |
| 1037 | VDIV_DU = 1022, // LoongArchLSXInstrInfo.td:691 |
| 1038 | VDIV_H = 1023, // LoongArchLSXInstrInfo.td:685 |
| 1039 | VDIV_HU = 1024, // LoongArchLSXInstrInfo.td:689 |
| 1040 | VDIV_W = 1025, // LoongArchLSXInstrInfo.td:686 |
| 1041 | VDIV_WU = 1026, // LoongArchLSXInstrInfo.td:690 |
| 1042 | VEXT2XV_DU_BU = 1027, // LoongArchLASXInstrInfo.td:518 |
| 1043 | VEXT2XV_DU_HU = 1028, // LoongArchLASXInstrInfo.td:520 |
| 1044 | VEXT2XV_DU_WU = 1029, // LoongArchLASXInstrInfo.td:521 |
| 1045 | VEXT2XV_D_B = 1030, // LoongArchLASXInstrInfo.td:512 |
| 1046 | VEXT2XV_D_H = 1031, // LoongArchLASXInstrInfo.td:514 |
| 1047 | VEXT2XV_D_W = 1032, // LoongArchLASXInstrInfo.td:515 |
| 1048 | VEXT2XV_HU_BU = 1033, // LoongArchLASXInstrInfo.td:516 |
| 1049 | VEXT2XV_H_B = 1034, // LoongArchLASXInstrInfo.td:510 |
| 1050 | VEXT2XV_WU_BU = 1035, // LoongArchLASXInstrInfo.td:517 |
| 1051 | VEXT2XV_WU_HU = 1036, // LoongArchLASXInstrInfo.td:519 |
| 1052 | VEXT2XV_W_B = 1037, // LoongArchLASXInstrInfo.td:511 |
| 1053 | VEXT2XV_W_H = 1038, // LoongArchLASXInstrInfo.td:513 |
| 1054 | VEXTH_DU_WU = 1039, // LoongArchLSXInstrInfo.td:717 |
| 1055 | VEXTH_D_W = 1040, // LoongArchLSXInstrInfo.td:713 |
| 1056 | VEXTH_HU_BU = 1041, // LoongArchLSXInstrInfo.td:715 |
| 1057 | VEXTH_H_B = 1042, // LoongArchLSXInstrInfo.td:711 |
| 1058 | VEXTH_QU_DU = 1043, // LoongArchLSXInstrInfo.td:718 |
| 1059 | VEXTH_Q_D = 1044, // LoongArchLSXInstrInfo.td:714 |
| 1060 | VEXTH_WU_HU = 1045, // LoongArchLSXInstrInfo.td:716 |
| 1061 | VEXTH_W_H = 1046, // LoongArchLSXInstrInfo.td:712 |
| 1062 | VEXTL_QU_DU = 1047, // LoongArchLSXInstrInfo.td:793 |
| 1063 | VEXTL_Q_D = 1048, // LoongArchLSXInstrInfo.td:789 |
| 1064 | VEXTRINS_B = 1049, // LoongArchLSXInstrInfo.td:1235 |
| 1065 | VEXTRINS_D = 1050, // LoongArchLSXInstrInfo.td:1232 |
| 1066 | VEXTRINS_H = 1051, // LoongArchLSXInstrInfo.td:1234 |
| 1067 | VEXTRINS_W = 1052, // LoongArchLSXInstrInfo.td:1233 |
| 1068 | VFADD_D = 1053, // LoongArchLSXInstrInfo.td:952 |
| 1069 | VFADD_S = 1054, // LoongArchLSXInstrInfo.td:951 |
| 1070 | VFCLASS_D = 1055, // LoongArchLSXInstrInfo.td:983 |
| 1071 | VFCLASS_S = 1056, // LoongArchLSXInstrInfo.td:982 |
| 1072 | VFCMP_CAF_D = 1057, // LoongArchLSXInstrInfo.td:1122 |
| 1073 | VFCMP_CAF_S = 1058, // LoongArchLSXInstrInfo.td:1099 |
| 1074 | VFCMP_CEQ_D = 1059, // LoongArchLSXInstrInfo.td:1126 |
| 1075 | VFCMP_CEQ_S = 1060, // LoongArchLSXInstrInfo.td:1103 |
| 1076 | VFCMP_CLE_D = 1061, // LoongArchLSXInstrInfo.td:1128 |
| 1077 | VFCMP_CLE_S = 1062, // LoongArchLSXInstrInfo.td:1105 |
| 1078 | VFCMP_CLT_D = 1063, // LoongArchLSXInstrInfo.td:1124 |
| 1079 | VFCMP_CLT_S = 1064, // LoongArchLSXInstrInfo.td:1101 |
| 1080 | VFCMP_CNE_D = 1065, // LoongArchLSXInstrInfo.td:1138 |
| 1081 | VFCMP_CNE_S = 1066, // LoongArchLSXInstrInfo.td:1115 |
| 1082 | VFCMP_COR_D = 1067, // LoongArchLSXInstrInfo.td:1140 |
| 1083 | VFCMP_COR_S = 1068, // LoongArchLSXInstrInfo.td:1117 |
| 1084 | VFCMP_CUEQ_D = 1069, // LoongArchLSXInstrInfo.td:1134 |
| 1085 | VFCMP_CUEQ_S = 1070, // LoongArchLSXInstrInfo.td:1111 |
| 1086 | VFCMP_CULE_D = 1071, // LoongArchLSXInstrInfo.td:1136 |
| 1087 | VFCMP_CULE_S = 1072, // LoongArchLSXInstrInfo.td:1113 |
| 1088 | VFCMP_CULT_D = 1073, // LoongArchLSXInstrInfo.td:1132 |
| 1089 | VFCMP_CULT_S = 1074, // LoongArchLSXInstrInfo.td:1109 |
| 1090 | VFCMP_CUNE_D = 1075, // LoongArchLSXInstrInfo.td:1142 |
| 1091 | VFCMP_CUNE_S = 1076, // LoongArchLSXInstrInfo.td:1119 |
| 1092 | VFCMP_CUN_D = 1077, // LoongArchLSXInstrInfo.td:1130 |
| 1093 | VFCMP_CUN_S = 1078, // LoongArchLSXInstrInfo.td:1107 |
| 1094 | VFCMP_SAF_D = 1079, // LoongArchLSXInstrInfo.td:1123 |
| 1095 | VFCMP_SAF_S = 1080, // LoongArchLSXInstrInfo.td:1100 |
| 1096 | VFCMP_SEQ_D = 1081, // LoongArchLSXInstrInfo.td:1127 |
| 1097 | VFCMP_SEQ_S = 1082, // LoongArchLSXInstrInfo.td:1104 |
| 1098 | VFCMP_SLE_D = 1083, // LoongArchLSXInstrInfo.td:1129 |
| 1099 | VFCMP_SLE_S = 1084, // LoongArchLSXInstrInfo.td:1106 |
| 1100 | VFCMP_SLT_D = 1085, // LoongArchLSXInstrInfo.td:1125 |
| 1101 | VFCMP_SLT_S = 1086, // LoongArchLSXInstrInfo.td:1102 |
| 1102 | VFCMP_SNE_D = 1087, // LoongArchLSXInstrInfo.td:1139 |
| 1103 | VFCMP_SNE_S = 1088, // LoongArchLSXInstrInfo.td:1116 |
| 1104 | VFCMP_SOR_D = 1089, // LoongArchLSXInstrInfo.td:1141 |
| 1105 | VFCMP_SOR_S = 1090, // LoongArchLSXInstrInfo.td:1118 |
| 1106 | VFCMP_SUEQ_D = 1091, // LoongArchLSXInstrInfo.td:1135 |
| 1107 | VFCMP_SUEQ_S = 1092, // LoongArchLSXInstrInfo.td:1112 |
| 1108 | VFCMP_SULE_D = 1093, // LoongArchLSXInstrInfo.td:1137 |
| 1109 | VFCMP_SULE_S = 1094, // LoongArchLSXInstrInfo.td:1114 |
| 1110 | VFCMP_SULT_D = 1095, // LoongArchLSXInstrInfo.td:1133 |
| 1111 | VFCMP_SULT_S = 1096, // LoongArchLSXInstrInfo.td:1110 |
| 1112 | VFCMP_SUNE_D = 1097, // LoongArchLSXInstrInfo.td:1143 |
| 1113 | VFCMP_SUNE_S = 1098, // LoongArchLSXInstrInfo.td:1120 |
| 1114 | VFCMP_SUN_D = 1099, // LoongArchLSXInstrInfo.td:1131 |
| 1115 | VFCMP_SUN_S = 1100, // LoongArchLSXInstrInfo.td:1108 |
| 1116 | VFCVTH_D_S = 1101, // LoongArchLSXInstrInfo.td:999 |
| 1117 | VFCVTH_S_H = 1102, // LoongArchLSXInstrInfo.td:997 |
| 1118 | VFCVTL_D_S = 1103, // LoongArchLSXInstrInfo.td:998 |
| 1119 | VFCVTL_S_H = 1104, // LoongArchLSXInstrInfo.td:996 |
| 1120 | VFCVT_H_S = 1105, // LoongArchLSXInstrInfo.td:1000 |
| 1121 | VFCVT_S_D = 1106, // LoongArchLSXInstrInfo.td:1001 |
| 1122 | VFDIV_D = 1107, // LoongArchLSXInstrInfo.td:958 |
| 1123 | VFDIV_S = 1108, // LoongArchLSXInstrInfo.td:957 |
| 1124 | VFFINTH_D_W = 1109, // LoongArchLSXInstrInfo.td:1051 |
| 1125 | VFFINTL_D_W = 1110, // LoongArchLSXInstrInfo.td:1050 |
| 1126 | VFFINT_D_L = 1111, // LoongArchLSXInstrInfo.td:1047 |
| 1127 | VFFINT_D_LU = 1112, // LoongArchLSXInstrInfo.td:1049 |
| 1128 | VFFINT_S_L = 1113, // LoongArchLSXInstrInfo.td:1052 |
| 1129 | VFFINT_S_W = 1114, // LoongArchLSXInstrInfo.td:1046 |
| 1130 | VFFINT_S_WU = 1115, // LoongArchLSXInstrInfo.td:1048 |
| 1131 | VFLOGB_D = 1116, // LoongArchLSXInstrInfo.td:980 |
| 1132 | VFLOGB_S = 1117, // LoongArchLSXInstrInfo.td:979 |
| 1133 | VFMADD_D = 1118, // LoongArchLSXInstrInfo.td:961 |
| 1134 | VFMADD_S = 1119, // LoongArchLSXInstrInfo.td:960 |
| 1135 | VFMAXA_D = 1120, // LoongArchLSXInstrInfo.td:975 |
| 1136 | VFMAXA_S = 1121, // LoongArchLSXInstrInfo.td:974 |
| 1137 | VFMAX_D = 1122, // LoongArchLSXInstrInfo.td:970 |
| 1138 | VFMAX_S = 1123, // LoongArchLSXInstrInfo.td:969 |
| 1139 | VFMINA_D = 1124, // LoongArchLSXInstrInfo.td:977 |
| 1140 | VFMINA_S = 1125, // LoongArchLSXInstrInfo.td:976 |
| 1141 | VFMIN_D = 1126, // LoongArchLSXInstrInfo.td:972 |
| 1142 | VFMIN_S = 1127, // LoongArchLSXInstrInfo.td:971 |
| 1143 | VFMSUB_D = 1128, // LoongArchLSXInstrInfo.td:963 |
| 1144 | VFMSUB_S = 1129, // LoongArchLSXInstrInfo.td:962 |
| 1145 | VFMUL_D = 1130, // LoongArchLSXInstrInfo.td:956 |
| 1146 | VFMUL_S = 1131, // LoongArchLSXInstrInfo.td:955 |
| 1147 | VFNMADD_D = 1132, // LoongArchLSXInstrInfo.td:965 |
| 1148 | VFNMADD_S = 1133, // LoongArchLSXInstrInfo.td:964 |
| 1149 | VFNMSUB_D = 1134, // LoongArchLSXInstrInfo.td:967 |
| 1150 | VFNMSUB_S = 1135, // LoongArchLSXInstrInfo.td:966 |
| 1151 | VFRECIPE_D = 1136, // LoongArchLSXInstrInfo.td:992 |
| 1152 | VFRECIPE_S = 1137, // LoongArchLSXInstrInfo.td:991 |
| 1153 | VFRECIP_D = 1138, // LoongArchLSXInstrInfo.td:988 |
| 1154 | VFRECIP_S = 1139, // LoongArchLSXInstrInfo.td:987 |
| 1155 | VFRINTRM_D = 1140, // LoongArchLSXInstrInfo.td:1010 |
| 1156 | VFRINTRM_S = 1141, // LoongArchLSXInstrInfo.td:1009 |
| 1157 | VFRINTRNE_D = 1142, // LoongArchLSXInstrInfo.td:1004 |
| 1158 | VFRINTRNE_S = 1143, // LoongArchLSXInstrInfo.td:1003 |
| 1159 | VFRINTRP_D = 1144, // LoongArchLSXInstrInfo.td:1008 |
| 1160 | VFRINTRP_S = 1145, // LoongArchLSXInstrInfo.td:1007 |
| 1161 | VFRINTRZ_D = 1146, // LoongArchLSXInstrInfo.td:1006 |
| 1162 | VFRINTRZ_S = 1147, // LoongArchLSXInstrInfo.td:1005 |
| 1163 | VFRINT_D = 1148, // LoongArchLSXInstrInfo.td:1012 |
| 1164 | VFRINT_S = 1149, // LoongArchLSXInstrInfo.td:1011 |
| 1165 | VFRSQRTE_D = 1150, // LoongArchLSXInstrInfo.td:994 |
| 1166 | VFRSQRTE_S = 1151, // LoongArchLSXInstrInfo.td:993 |
| 1167 | VFRSQRT_D = 1152, // LoongArchLSXInstrInfo.td:990 |
| 1168 | VFRSQRT_S = 1153, // LoongArchLSXInstrInfo.td:989 |
| 1169 | VFRSTPI_B = 1154, // LoongArchLSXInstrInfo.td:948 |
| 1170 | VFRSTPI_H = 1155, // LoongArchLSXInstrInfo.td:949 |
| 1171 | VFRSTP_B = 1156, // LoongArchLSXInstrInfo.td:946 |
| 1172 | VFRSTP_H = 1157, // LoongArchLSXInstrInfo.td:947 |
| 1173 | VFSQRT_D = 1158, // LoongArchLSXInstrInfo.td:986 |
| 1174 | VFSQRT_S = 1159, // LoongArchLSXInstrInfo.td:985 |
| 1175 | VFSUB_D = 1160, // LoongArchLSXInstrInfo.td:954 |
| 1176 | VFSUB_S = 1161, // LoongArchLSXInstrInfo.td:953 |
| 1177 | VFTINTH_L_S = 1162, // LoongArchLSXInstrInfo.td:1044 |
| 1178 | VFTINTL_L_S = 1163, // LoongArchLSXInstrInfo.td:1043 |
| 1179 | VFTINTRMH_L_S = 1164, // LoongArchLSXInstrInfo.td:1042 |
| 1180 | VFTINTRML_L_S = 1165, // LoongArchLSXInstrInfo.td:1041 |
| 1181 | VFTINTRM_L_D = 1166, // LoongArchLSXInstrInfo.td:1021 |
| 1182 | VFTINTRM_W_D = 1167, // LoongArchLSXInstrInfo.td:1032 |
| 1183 | VFTINTRM_W_S = 1168, // LoongArchLSXInstrInfo.td:1020 |
| 1184 | VFTINTRNEH_L_S = 1169, // LoongArchLSXInstrInfo.td:1036 |
| 1185 | VFTINTRNEL_L_S = 1170, // LoongArchLSXInstrInfo.td:1035 |
| 1186 | VFTINTRNE_L_D = 1171, // LoongArchLSXInstrInfo.td:1015 |
| 1187 | VFTINTRNE_W_D = 1172, // LoongArchLSXInstrInfo.td:1029 |
| 1188 | VFTINTRNE_W_S = 1173, // LoongArchLSXInstrInfo.td:1014 |
| 1189 | VFTINTRPH_L_S = 1174, // LoongArchLSXInstrInfo.td:1040 |
| 1190 | VFTINTRPL_L_S = 1175, // LoongArchLSXInstrInfo.td:1039 |
| 1191 | VFTINTRP_L_D = 1176, // LoongArchLSXInstrInfo.td:1019 |
| 1192 | VFTINTRP_W_D = 1177, // LoongArchLSXInstrInfo.td:1031 |
| 1193 | VFTINTRP_W_S = 1178, // LoongArchLSXInstrInfo.td:1018 |
| 1194 | VFTINTRZH_L_S = 1179, // LoongArchLSXInstrInfo.td:1038 |
| 1195 | VFTINTRZL_L_S = 1180, // LoongArchLSXInstrInfo.td:1037 |
| 1196 | VFTINTRZ_LU_D = 1181, // LoongArchLSXInstrInfo.td:1025 |
| 1197 | VFTINTRZ_L_D = 1182, // LoongArchLSXInstrInfo.td:1017 |
| 1198 | VFTINTRZ_WU_S = 1183, // LoongArchLSXInstrInfo.td:1024 |
| 1199 | VFTINTRZ_W_D = 1184, // LoongArchLSXInstrInfo.td:1030 |
| 1200 | VFTINTRZ_W_S = 1185, // LoongArchLSXInstrInfo.td:1016 |
| 1201 | VFTINT_LU_D = 1186, // LoongArchLSXInstrInfo.td:1027 |
| 1202 | VFTINT_L_D = 1187, // LoongArchLSXInstrInfo.td:1023 |
| 1203 | VFTINT_WU_S = 1188, // LoongArchLSXInstrInfo.td:1026 |
| 1204 | VFTINT_W_D = 1189, // LoongArchLSXInstrInfo.td:1033 |
| 1205 | VFTINT_W_S = 1190, // LoongArchLSXInstrInfo.td:1022 |
| 1206 | VHADDW_DU_WU = 1191, // LoongArchLSXInstrInfo.td:488 |
| 1207 | VHADDW_D_W = 1192, // LoongArchLSXInstrInfo.td:484 |
| 1208 | VHADDW_HU_BU = 1193, // LoongArchLSXInstrInfo.td:486 |
| 1209 | VHADDW_H_B = 1194, // LoongArchLSXInstrInfo.td:482 |
| 1210 | VHADDW_QU_DU = 1195, // LoongArchLSXInstrInfo.td:489 |
| 1211 | VHADDW_Q_D = 1196, // LoongArchLSXInstrInfo.td:485 |
| 1212 | VHADDW_WU_HU = 1197, // LoongArchLSXInstrInfo.td:487 |
| 1213 | VHADDW_W_H = 1198, // LoongArchLSXInstrInfo.td:483 |
| 1214 | VHSUBW_DU_WU = 1199, // LoongArchLSXInstrInfo.td:497 |
| 1215 | VHSUBW_D_W = 1200, // LoongArchLSXInstrInfo.td:493 |
| 1216 | VHSUBW_HU_BU = 1201, // LoongArchLSXInstrInfo.td:495 |
| 1217 | VHSUBW_H_B = 1202, // LoongArchLSXInstrInfo.td:491 |
| 1218 | VHSUBW_QU_DU = 1203, // LoongArchLSXInstrInfo.td:498 |
| 1219 | VHSUBW_Q_D = 1204, // LoongArchLSXInstrInfo.td:494 |
| 1220 | VHSUBW_WU_HU = 1205, // LoongArchLSXInstrInfo.td:496 |
| 1221 | VHSUBW_W_H = 1206, // LoongArchLSXInstrInfo.td:492 |
| 1222 | VILVH_B = 1207, // LoongArchLSXInstrInfo.td:1214 |
| 1223 | VILVH_D = 1208, // LoongArchLSXInstrInfo.td:1217 |
| 1224 | VILVH_H = 1209, // LoongArchLSXInstrInfo.td:1215 |
| 1225 | VILVH_W = 1210, // LoongArchLSXInstrInfo.td:1216 |
| 1226 | VILVL_B = 1211, // LoongArchLSXInstrInfo.td:1210 |
| 1227 | VILVL_D = 1212, // LoongArchLSXInstrInfo.td:1213 |
| 1228 | VILVL_H = 1213, // LoongArchLSXInstrInfo.td:1211 |
| 1229 | VILVL_W = 1214, // LoongArchLSXInstrInfo.td:1212 |
| 1230 | VINSGR2VR_B = 1215, // LoongArchLSXInstrInfo.td:1160 |
| 1231 | VINSGR2VR_D = 1216, // LoongArchLSXInstrInfo.td:1163 |
| 1232 | VINSGR2VR_H = 1217, // LoongArchLSXInstrInfo.td:1161 |
| 1233 | VINSGR2VR_W = 1218, // LoongArchLSXInstrInfo.td:1162 |
| 1234 | VLD = 1219, // LoongArchLSXInstrInfo.td:1239 |
| 1235 | VLDI = 1220, // LoongArchLSXInstrInfo.td:735 |
| 1236 | VLDREPL_B = 1221, // LoongArchLSXInstrInfo.td:1242 |
| 1237 | VLDREPL_D = 1222, // LoongArchLSXInstrInfo.td:1245 |
| 1238 | VLDREPL_H = 1223, // LoongArchLSXInstrInfo.td:1243 |
| 1239 | VLDREPL_W = 1224, // LoongArchLSXInstrInfo.td:1244 |
| 1240 | VLDX = 1225, // LoongArchLSXInstrInfo.td:1240 |
| 1241 | VMADDWEV_D_W = 1226, // LoongArchLSXInstrInfo.td:661 |
| 1242 | VMADDWEV_D_WU = 1227, // LoongArchLSXInstrInfo.td:669 |
| 1243 | VMADDWEV_D_WU_W = 1228, // LoongArchLSXInstrInfo.td:677 |
| 1244 | VMADDWEV_H_B = 1229, // LoongArchLSXInstrInfo.td:659 |
| 1245 | VMADDWEV_H_BU = 1230, // LoongArchLSXInstrInfo.td:667 |
| 1246 | VMADDWEV_H_BU_B = 1231, // LoongArchLSXInstrInfo.td:675 |
| 1247 | VMADDWEV_Q_D = 1232, // LoongArchLSXInstrInfo.td:662 |
| 1248 | VMADDWEV_Q_DU = 1233, // LoongArchLSXInstrInfo.td:670 |
| 1249 | VMADDWEV_Q_DU_D = 1234, // LoongArchLSXInstrInfo.td:678 |
| 1250 | VMADDWEV_W_H = 1235, // LoongArchLSXInstrInfo.td:660 |
| 1251 | VMADDWEV_W_HU = 1236, // LoongArchLSXInstrInfo.td:668 |
| 1252 | VMADDWEV_W_HU_H = 1237, // LoongArchLSXInstrInfo.td:676 |
| 1253 | VMADDWOD_D_W = 1238, // LoongArchLSXInstrInfo.td:665 |
| 1254 | VMADDWOD_D_WU = 1239, // LoongArchLSXInstrInfo.td:673 |
| 1255 | VMADDWOD_D_WU_W = 1240, // LoongArchLSXInstrInfo.td:681 |
| 1256 | VMADDWOD_H_B = 1241, // LoongArchLSXInstrInfo.td:663 |
| 1257 | VMADDWOD_H_BU = 1242, // LoongArchLSXInstrInfo.td:671 |
| 1258 | VMADDWOD_H_BU_B = 1243, // LoongArchLSXInstrInfo.td:679 |
| 1259 | VMADDWOD_Q_D = 1244, // LoongArchLSXInstrInfo.td:666 |
| 1260 | VMADDWOD_Q_DU = 1245, // LoongArchLSXInstrInfo.td:674 |
| 1261 | VMADDWOD_Q_DU_D = 1246, // LoongArchLSXInstrInfo.td:682 |
| 1262 | VMADDWOD_W_H = 1247, // LoongArchLSXInstrInfo.td:664 |
| 1263 | VMADDWOD_W_HU = 1248, // LoongArchLSXInstrInfo.td:672 |
| 1264 | VMADDWOD_W_HU_H = 1249, // LoongArchLSXInstrInfo.td:680 |
| 1265 | VMADD_B = 1250, // LoongArchLSXInstrInfo.td:649 |
| 1266 | VMADD_D = 1251, // LoongArchLSXInstrInfo.td:652 |
| 1267 | VMADD_H = 1252, // LoongArchLSXInstrInfo.td:650 |
| 1268 | VMADD_W = 1253, // LoongArchLSXInstrInfo.td:651 |
| 1269 | VMAXI_B = 1254, // LoongArchLSXInstrInfo.td:580 |
| 1270 | VMAXI_BU = 1255, // LoongArchLSXInstrInfo.td:588 |
| 1271 | VMAXI_D = 1256, // LoongArchLSXInstrInfo.td:583 |
| 1272 | VMAXI_DU = 1257, // LoongArchLSXInstrInfo.td:591 |
| 1273 | VMAXI_H = 1258, // LoongArchLSXInstrInfo.td:581 |
| 1274 | VMAXI_HU = 1259, // LoongArchLSXInstrInfo.td:589 |
| 1275 | VMAXI_W = 1260, // LoongArchLSXInstrInfo.td:582 |
| 1276 | VMAXI_WU = 1261, // LoongArchLSXInstrInfo.td:590 |
| 1277 | VMAX_B = 1262, // LoongArchLSXInstrInfo.td:576 |
| 1278 | VMAX_BU = 1263, // LoongArchLSXInstrInfo.td:584 |
| 1279 | VMAX_D = 1264, // LoongArchLSXInstrInfo.td:579 |
| 1280 | VMAX_DU = 1265, // LoongArchLSXInstrInfo.td:587 |
| 1281 | VMAX_H = 1266, // LoongArchLSXInstrInfo.td:577 |
| 1282 | VMAX_HU = 1267, // LoongArchLSXInstrInfo.td:585 |
| 1283 | VMAX_W = 1268, // LoongArchLSXInstrInfo.td:578 |
| 1284 | VMAX_WU = 1269, // LoongArchLSXInstrInfo.td:586 |
| 1285 | VMINI_B = 1270, // LoongArchLSXInstrInfo.td:597 |
| 1286 | VMINI_BU = 1271, // LoongArchLSXInstrInfo.td:605 |
| 1287 | VMINI_D = 1272, // LoongArchLSXInstrInfo.td:600 |
| 1288 | VMINI_DU = 1273, // LoongArchLSXInstrInfo.td:608 |
| 1289 | VMINI_H = 1274, // LoongArchLSXInstrInfo.td:598 |
| 1290 | VMINI_HU = 1275, // LoongArchLSXInstrInfo.td:606 |
| 1291 | VMINI_W = 1276, // LoongArchLSXInstrInfo.td:599 |
| 1292 | VMINI_WU = 1277, // LoongArchLSXInstrInfo.td:607 |
| 1293 | VMIN_B = 1278, // LoongArchLSXInstrInfo.td:593 |
| 1294 | VMIN_BU = 1279, // LoongArchLSXInstrInfo.td:601 |
| 1295 | VMIN_D = 1280, // LoongArchLSXInstrInfo.td:596 |
| 1296 | VMIN_DU = 1281, // LoongArchLSXInstrInfo.td:604 |
| 1297 | VMIN_H = 1282, // LoongArchLSXInstrInfo.td:594 |
| 1298 | VMIN_HU = 1283, // LoongArchLSXInstrInfo.td:602 |
| 1299 | VMIN_W = 1284, // LoongArchLSXInstrInfo.td:595 |
| 1300 | VMIN_WU = 1285, // LoongArchLSXInstrInfo.td:603 |
| 1301 | VMOD_B = 1286, // LoongArchLSXInstrInfo.td:693 |
| 1302 | VMOD_BU = 1287, // LoongArchLSXInstrInfo.td:697 |
| 1303 | VMOD_D = 1288, // LoongArchLSXInstrInfo.td:696 |
| 1304 | VMOD_DU = 1289, // LoongArchLSXInstrInfo.td:700 |
| 1305 | VMOD_H = 1290, // LoongArchLSXInstrInfo.td:694 |
| 1306 | VMOD_HU = 1291, // LoongArchLSXInstrInfo.td:698 |
| 1307 | VMOD_W = 1292, // LoongArchLSXInstrInfo.td:695 |
| 1308 | VMOD_WU = 1293, // LoongArchLSXInstrInfo.td:699 |
| 1309 | VMSKGEZ_B = 1294, // LoongArchLSXInstrInfo.td:730 |
| 1310 | VMSKLTZ_B = 1295, // LoongArchLSXInstrInfo.td:725 |
| 1311 | VMSKLTZ_D = 1296, // LoongArchLSXInstrInfo.td:728 |
| 1312 | VMSKLTZ_H = 1297, // LoongArchLSXInstrInfo.td:726 |
| 1313 | VMSKLTZ_W = 1298, // LoongArchLSXInstrInfo.td:727 |
| 1314 | VMSKNZ_B = 1299, // LoongArchLSXInstrInfo.td:732 |
| 1315 | VMSUB_B = 1300, // LoongArchLSXInstrInfo.td:654 |
| 1316 | VMSUB_D = 1301, // LoongArchLSXInstrInfo.td:657 |
| 1317 | VMSUB_H = 1302, // LoongArchLSXInstrInfo.td:655 |
| 1318 | VMSUB_W = 1303, // LoongArchLSXInstrInfo.td:656 |
| 1319 | VMUH_B = 1304, // LoongArchLSXInstrInfo.td:615 |
| 1320 | VMUH_BU = 1305, // LoongArchLSXInstrInfo.td:619 |
| 1321 | VMUH_D = 1306, // LoongArchLSXInstrInfo.td:618 |
| 1322 | VMUH_DU = 1307, // LoongArchLSXInstrInfo.td:622 |
| 1323 | VMUH_H = 1308, // LoongArchLSXInstrInfo.td:616 |
| 1324 | VMUH_HU = 1309, // LoongArchLSXInstrInfo.td:620 |
| 1325 | VMUH_W = 1310, // LoongArchLSXInstrInfo.td:617 |
| 1326 | VMUH_WU = 1311, // LoongArchLSXInstrInfo.td:621 |
| 1327 | VMULWEV_D_W = 1312, // LoongArchLSXInstrInfo.td:626 |
| 1328 | VMULWEV_D_WU = 1313, // LoongArchLSXInstrInfo.td:634 |
| 1329 | VMULWEV_D_WU_W = 1314, // LoongArchLSXInstrInfo.td:642 |
| 1330 | VMULWEV_H_B = 1315, // LoongArchLSXInstrInfo.td:624 |
| 1331 | VMULWEV_H_BU = 1316, // LoongArchLSXInstrInfo.td:632 |
| 1332 | VMULWEV_H_BU_B = 1317, // LoongArchLSXInstrInfo.td:640 |
| 1333 | VMULWEV_Q_D = 1318, // LoongArchLSXInstrInfo.td:627 |
| 1334 | VMULWEV_Q_DU = 1319, // LoongArchLSXInstrInfo.td:635 |
| 1335 | VMULWEV_Q_DU_D = 1320, // LoongArchLSXInstrInfo.td:643 |
| 1336 | VMULWEV_W_H = 1321, // LoongArchLSXInstrInfo.td:625 |
| 1337 | VMULWEV_W_HU = 1322, // LoongArchLSXInstrInfo.td:633 |
| 1338 | VMULWEV_W_HU_H = 1323, // LoongArchLSXInstrInfo.td:641 |
| 1339 | VMULWOD_D_W = 1324, // LoongArchLSXInstrInfo.td:630 |
| 1340 | VMULWOD_D_WU = 1325, // LoongArchLSXInstrInfo.td:638 |
| 1341 | VMULWOD_D_WU_W = 1326, // LoongArchLSXInstrInfo.td:646 |
| 1342 | VMULWOD_H_B = 1327, // LoongArchLSXInstrInfo.td:628 |
| 1343 | VMULWOD_H_BU = 1328, // LoongArchLSXInstrInfo.td:636 |
| 1344 | VMULWOD_H_BU_B = 1329, // LoongArchLSXInstrInfo.td:644 |
| 1345 | VMULWOD_Q_D = 1330, // LoongArchLSXInstrInfo.td:631 |
| 1346 | VMULWOD_Q_DU = 1331, // LoongArchLSXInstrInfo.td:639 |
| 1347 | VMULWOD_Q_DU_D = 1332, // LoongArchLSXInstrInfo.td:647 |
| 1348 | VMULWOD_W_H = 1333, // LoongArchLSXInstrInfo.td:629 |
| 1349 | VMULWOD_W_HU = 1334, // LoongArchLSXInstrInfo.td:637 |
| 1350 | VMULWOD_W_HU_H = 1335, // LoongArchLSXInstrInfo.td:645 |
| 1351 | VMUL_B = 1336, // LoongArchLSXInstrInfo.td:610 |
| 1352 | VMUL_D = 1337, // LoongArchLSXInstrInfo.td:613 |
| 1353 | VMUL_H = 1338, // LoongArchLSXInstrInfo.td:611 |
| 1354 | VMUL_W = 1339, // LoongArchLSXInstrInfo.td:612 |
| 1355 | VNEG_B = 1340, // LoongArchLSXInstrInfo.td:459 |
| 1356 | VNEG_D = 1341, // LoongArchLSXInstrInfo.td:462 |
| 1357 | VNEG_H = 1342, // LoongArchLSXInstrInfo.td:460 |
| 1358 | VNEG_W = 1343, // LoongArchLSXInstrInfo.td:461 |
| 1359 | VNORI_B = 1344, // LoongArchLSXInstrInfo.td:748 |
| 1360 | VNOR_V = 1345, // LoongArchLSXInstrInfo.td:741 |
| 1361 | VORI_B = 1346, // LoongArchLSXInstrInfo.td:746 |
| 1362 | VORN_V = 1347, // LoongArchLSXInstrInfo.td:743 |
| 1363 | VOR_V = 1348, // LoongArchLSXInstrInfo.td:739 |
| 1364 | VPACKEV_B = 1349, // LoongArchLSXInstrInfo.td:1192 |
| 1365 | VPACKEV_D = 1350, // LoongArchLSXInstrInfo.td:1195 |
| 1366 | VPACKEV_H = 1351, // LoongArchLSXInstrInfo.td:1193 |
| 1367 | VPACKEV_W = 1352, // LoongArchLSXInstrInfo.td:1194 |
| 1368 | VPACKOD_B = 1353, // LoongArchLSXInstrInfo.td:1196 |
| 1369 | VPACKOD_D = 1354, // LoongArchLSXInstrInfo.td:1199 |
| 1370 | VPACKOD_H = 1355, // LoongArchLSXInstrInfo.td:1197 |
| 1371 | VPACKOD_W = 1356, // LoongArchLSXInstrInfo.td:1198 |
| 1372 | VPCNT_B = 1357, // LoongArchLSXInstrInfo.td:914 |
| 1373 | VPCNT_D = 1358, // LoongArchLSXInstrInfo.td:917 |
| 1374 | VPCNT_H = 1359, // LoongArchLSXInstrInfo.td:915 |
| 1375 | VPCNT_W = 1360, // LoongArchLSXInstrInfo.td:916 |
| 1376 | VPERMI_W = 1361, // LoongArchLSXInstrInfo.td:1230 |
| 1377 | VPICKEV_B = 1362, // LoongArchLSXInstrInfo.td:1201 |
| 1378 | VPICKEV_D = 1363, // LoongArchLSXInstrInfo.td:1204 |
| 1379 | VPICKEV_H = 1364, // LoongArchLSXInstrInfo.td:1202 |
| 1380 | VPICKEV_W = 1365, // LoongArchLSXInstrInfo.td:1203 |
| 1381 | VPICKOD_B = 1366, // LoongArchLSXInstrInfo.td:1205 |
| 1382 | VPICKOD_D = 1367, // LoongArchLSXInstrInfo.td:1208 |
| 1383 | VPICKOD_H = 1368, // LoongArchLSXInstrInfo.td:1206 |
| 1384 | VPICKOD_W = 1369, // LoongArchLSXInstrInfo.td:1207 |
| 1385 | VPICKVE2GR_B = 1370, // LoongArchLSXInstrInfo.td:1164 |
| 1386 | VPICKVE2GR_BU = 1371, // LoongArchLSXInstrInfo.td:1168 |
| 1387 | VPICKVE2GR_D = 1372, // LoongArchLSXInstrInfo.td:1167 |
| 1388 | VPICKVE2GR_DU = 1373, // LoongArchLSXInstrInfo.td:1171 |
| 1389 | VPICKVE2GR_H = 1374, // LoongArchLSXInstrInfo.td:1165 |
| 1390 | VPICKVE2GR_HU = 1375, // LoongArchLSXInstrInfo.td:1169 |
| 1391 | VPICKVE2GR_W = 1376, // LoongArchLSXInstrInfo.td:1166 |
| 1392 | VPICKVE2GR_WU = 1377, // LoongArchLSXInstrInfo.td:1170 |
| 1393 | VREPLGR2VR_B = 1378, // LoongArchLSXInstrInfo.td:1174 |
| 1394 | VREPLGR2VR_D = 1379, // LoongArchLSXInstrInfo.td:1177 |
| 1395 | VREPLGR2VR_H = 1380, // LoongArchLSXInstrInfo.td:1175 |
| 1396 | VREPLGR2VR_W = 1381, // LoongArchLSXInstrInfo.td:1176 |
| 1397 | VREPLVEI_B = 1382, // LoongArchLSXInstrInfo.td:1184 |
| 1398 | VREPLVEI_D = 1383, // LoongArchLSXInstrInfo.td:1187 |
| 1399 | VREPLVEI_H = 1384, // LoongArchLSXInstrInfo.td:1185 |
| 1400 | VREPLVEI_W = 1385, // LoongArchLSXInstrInfo.td:1186 |
| 1401 | VREPLVE_B = 1386, // LoongArchLSXInstrInfo.td:1180 |
| 1402 | VREPLVE_D = 1387, // LoongArchLSXInstrInfo.td:1183 |
| 1403 | VREPLVE_H = 1388, // LoongArchLSXInstrInfo.td:1181 |
| 1404 | VREPLVE_W = 1389, // LoongArchLSXInstrInfo.td:1182 |
| 1405 | VROTRI_B = 1390, // LoongArchLSXInstrInfo.td:781 |
| 1406 | VROTRI_D = 1391, // LoongArchLSXInstrInfo.td:784 |
| 1407 | VROTRI_H = 1392, // LoongArchLSXInstrInfo.td:782 |
| 1408 | VROTRI_W = 1393, // LoongArchLSXInstrInfo.td:783 |
| 1409 | VROTR_B = 1394, // LoongArchLSXInstrInfo.td:777 |
| 1410 | VROTR_D = 1395, // LoongArchLSXInstrInfo.td:780 |
| 1411 | VROTR_H = 1396, // LoongArchLSXInstrInfo.td:778 |
| 1412 | VROTR_W = 1397, // LoongArchLSXInstrInfo.td:779 |
| 1413 | VSADD_B = 1398, // LoongArchLSXInstrInfo.td:464 |
| 1414 | VSADD_BU = 1399, // LoongArchLSXInstrInfo.td:468 |
| 1415 | VSADD_D = 1400, // LoongArchLSXInstrInfo.td:467 |
| 1416 | VSADD_DU = 1401, // LoongArchLSXInstrInfo.td:471 |
| 1417 | VSADD_H = 1402, // LoongArchLSXInstrInfo.td:465 |
| 1418 | VSADD_HU = 1403, // LoongArchLSXInstrInfo.td:469 |
| 1419 | VSADD_W = 1404, // LoongArchLSXInstrInfo.td:466 |
| 1420 | VSADD_WU = 1405, // LoongArchLSXInstrInfo.td:470 |
| 1421 | VSAT_B = 1406, // LoongArchLSXInstrInfo.td:702 |
| 1422 | VSAT_BU = 1407, // LoongArchLSXInstrInfo.td:706 |
| 1423 | VSAT_D = 1408, // LoongArchLSXInstrInfo.td:705 |
| 1424 | VSAT_DU = 1409, // LoongArchLSXInstrInfo.td:709 |
| 1425 | VSAT_H = 1410, // LoongArchLSXInstrInfo.td:703 |
| 1426 | VSAT_HU = 1411, // LoongArchLSXInstrInfo.td:707 |
| 1427 | VSAT_W = 1412, // LoongArchLSXInstrInfo.td:704 |
| 1428 | VSAT_WU = 1413, // LoongArchLSXInstrInfo.td:708 |
| 1429 | VSEQI_B = 1414, // LoongArchLSXInstrInfo.td:1058 |
| 1430 | VSEQI_D = 1415, // LoongArchLSXInstrInfo.td:1061 |
| 1431 | VSEQI_H = 1416, // LoongArchLSXInstrInfo.td:1059 |
| 1432 | VSEQI_W = 1417, // LoongArchLSXInstrInfo.td:1060 |
| 1433 | VSEQ_B = 1418, // LoongArchLSXInstrInfo.td:1054 |
| 1434 | VSEQ_D = 1419, // LoongArchLSXInstrInfo.td:1057 |
| 1435 | VSEQ_H = 1420, // LoongArchLSXInstrInfo.td:1055 |
| 1436 | VSEQ_W = 1421, // LoongArchLSXInstrInfo.td:1056 |
| 1437 | VSETALLNEZ_B = 1422, // LoongArchLSXInstrInfo.td:1155 |
| 1438 | VSETALLNEZ_D = 1423, // LoongArchLSXInstrInfo.td:1158 |
| 1439 | VSETALLNEZ_H = 1424, // LoongArchLSXInstrInfo.td:1156 |
| 1440 | VSETALLNEZ_W = 1425, // LoongArchLSXInstrInfo.td:1157 |
| 1441 | VSETANYEQZ_B = 1426, // LoongArchLSXInstrInfo.td:1151 |
| 1442 | VSETANYEQZ_D = 1427, // LoongArchLSXInstrInfo.td:1154 |
| 1443 | VSETANYEQZ_H = 1428, // LoongArchLSXInstrInfo.td:1152 |
| 1444 | VSETANYEQZ_W = 1429, // LoongArchLSXInstrInfo.td:1153 |
| 1445 | VSETEQZ_V = 1430, // LoongArchLSXInstrInfo.td:1149 |
| 1446 | VSETNEZ_V = 1431, // LoongArchLSXInstrInfo.td:1150 |
| 1447 | VSHUF4I_B = 1432, // LoongArchLSXInstrInfo.td:1225 |
| 1448 | VSHUF4I_D = 1433, // LoongArchLSXInstrInfo.td:1228 |
| 1449 | VSHUF4I_H = 1434, // LoongArchLSXInstrInfo.td:1226 |
| 1450 | VSHUF4I_W = 1435, // LoongArchLSXInstrInfo.td:1227 |
| 1451 | VSHUF_B = 1436, // LoongArchLSXInstrInfo.td:1219 |
| 1452 | VSHUF_D = 1437, // LoongArchLSXInstrInfo.td:1223 |
| 1453 | VSHUF_H = 1438, // LoongArchLSXInstrInfo.td:1221 |
| 1454 | VSHUF_W = 1439, // LoongArchLSXInstrInfo.td:1222 |
| 1455 | VSIGNCOV_B = 1440, // LoongArchLSXInstrInfo.td:720 |
| 1456 | VSIGNCOV_D = 1441, // LoongArchLSXInstrInfo.td:723 |
| 1457 | VSIGNCOV_H = 1442, // LoongArchLSXInstrInfo.td:721 |
| 1458 | VSIGNCOV_W = 1443, // LoongArchLSXInstrInfo.td:722 |
| 1459 | VSLEI_B = 1444, // LoongArchLSXInstrInfo.td:1067 |
| 1460 | VSLEI_BU = 1445, // LoongArchLSXInstrInfo.td:1076 |
| 1461 | VSLEI_D = 1446, // LoongArchLSXInstrInfo.td:1070 |
| 1462 | VSLEI_DU = 1447, // LoongArchLSXInstrInfo.td:1079 |
| 1463 | VSLEI_H = 1448, // LoongArchLSXInstrInfo.td:1068 |
| 1464 | VSLEI_HU = 1449, // LoongArchLSXInstrInfo.td:1077 |
| 1465 | VSLEI_W = 1450, // LoongArchLSXInstrInfo.td:1069 |
| 1466 | VSLEI_WU = 1451, // LoongArchLSXInstrInfo.td:1078 |
| 1467 | VSLE_B = 1452, // LoongArchLSXInstrInfo.td:1063 |
| 1468 | VSLE_BU = 1453, // LoongArchLSXInstrInfo.td:1072 |
| 1469 | VSLE_D = 1454, // LoongArchLSXInstrInfo.td:1066 |
| 1470 | VSLE_DU = 1455, // LoongArchLSXInstrInfo.td:1075 |
| 1471 | VSLE_H = 1456, // LoongArchLSXInstrInfo.td:1064 |
| 1472 | VSLE_HU = 1457, // LoongArchLSXInstrInfo.td:1073 |
| 1473 | VSLE_W = 1458, // LoongArchLSXInstrInfo.td:1065 |
| 1474 | VSLE_WU = 1459, // LoongArchLSXInstrInfo.td:1074 |
| 1475 | VSLLI_B = 1460, // LoongArchLSXInstrInfo.td:754 |
| 1476 | VSLLI_D = 1461, // LoongArchLSXInstrInfo.td:757 |
| 1477 | VSLLI_H = 1462, // LoongArchLSXInstrInfo.td:755 |
| 1478 | VSLLI_W = 1463, // LoongArchLSXInstrInfo.td:756 |
| 1479 | VSLLWIL_DU_WU = 1464, // LoongArchLSXInstrInfo.td:792 |
| 1480 | VSLLWIL_D_W = 1465, // LoongArchLSXInstrInfo.td:788 |
| 1481 | VSLLWIL_HU_BU = 1466, // LoongArchLSXInstrInfo.td:790 |
| 1482 | VSLLWIL_H_B = 1467, // LoongArchLSXInstrInfo.td:786 |
| 1483 | VSLLWIL_WU_HU = 1468, // LoongArchLSXInstrInfo.td:791 |
| 1484 | VSLLWIL_W_H = 1469, // LoongArchLSXInstrInfo.td:787 |
| 1485 | VSLL_B = 1470, // LoongArchLSXInstrInfo.td:750 |
| 1486 | VSLL_D = 1471, // LoongArchLSXInstrInfo.td:753 |
| 1487 | VSLL_H = 1472, // LoongArchLSXInstrInfo.td:751 |
| 1488 | VSLL_W = 1473, // LoongArchLSXInstrInfo.td:752 |
| 1489 | VSLTI_B = 1474, // LoongArchLSXInstrInfo.td:1085 |
| 1490 | VSLTI_BU = 1475, // LoongArchLSXInstrInfo.td:1094 |
| 1491 | VSLTI_D = 1476, // LoongArchLSXInstrInfo.td:1088 |
| 1492 | VSLTI_DU = 1477, // LoongArchLSXInstrInfo.td:1097 |
| 1493 | VSLTI_H = 1478, // LoongArchLSXInstrInfo.td:1086 |
| 1494 | VSLTI_HU = 1479, // LoongArchLSXInstrInfo.td:1095 |
| 1495 | VSLTI_W = 1480, // LoongArchLSXInstrInfo.td:1087 |
| 1496 | VSLTI_WU = 1481, // LoongArchLSXInstrInfo.td:1096 |
| 1497 | VSLT_B = 1482, // LoongArchLSXInstrInfo.td:1081 |
| 1498 | VSLT_BU = 1483, // LoongArchLSXInstrInfo.td:1090 |
| 1499 | VSLT_D = 1484, // LoongArchLSXInstrInfo.td:1084 |
| 1500 | VSLT_DU = 1485, // LoongArchLSXInstrInfo.td:1093 |
| 1501 | VSLT_H = 1486, // LoongArchLSXInstrInfo.td:1082 |
| 1502 | VSLT_HU = 1487, // LoongArchLSXInstrInfo.td:1091 |
| 1503 | VSLT_W = 1488, // LoongArchLSXInstrInfo.td:1083 |
| 1504 | VSLT_WU = 1489, // LoongArchLSXInstrInfo.td:1092 |
| 1505 | VSRAI_B = 1490, // LoongArchLSXInstrInfo.td:772 |
| 1506 | VSRAI_D = 1491, // LoongArchLSXInstrInfo.td:775 |
| 1507 | VSRAI_H = 1492, // LoongArchLSXInstrInfo.td:773 |
| 1508 | VSRAI_W = 1493, // LoongArchLSXInstrInfo.td:774 |
| 1509 | VSRANI_B_H = 1494, // LoongArchLSXInstrInfo.td:824 |
| 1510 | VSRANI_D_Q = 1495, // LoongArchLSXInstrInfo.td:827 |
| 1511 | VSRANI_H_W = 1496, // LoongArchLSXInstrInfo.td:825 |
| 1512 | VSRANI_W_D = 1497, // LoongArchLSXInstrInfo.td:826 |
| 1513 | VSRAN_B_H = 1498, // LoongArchLSXInstrInfo.td:816 |
| 1514 | VSRAN_H_W = 1499, // LoongArchLSXInstrInfo.td:817 |
| 1515 | VSRAN_W_D = 1500, // LoongArchLSXInstrInfo.td:818 |
| 1516 | VSRARI_B = 1501, // LoongArchLSXInstrInfo.td:808 |
| 1517 | VSRARI_D = 1502, // LoongArchLSXInstrInfo.td:811 |
| 1518 | VSRARI_H = 1503, // LoongArchLSXInstrInfo.td:809 |
| 1519 | VSRARI_W = 1504, // LoongArchLSXInstrInfo.td:810 |
| 1520 | VSRARNI_B_H = 1505, // LoongArchLSXInstrInfo.td:840 |
| 1521 | VSRARNI_D_Q = 1506, // LoongArchLSXInstrInfo.td:843 |
| 1522 | VSRARNI_H_W = 1507, // LoongArchLSXInstrInfo.td:841 |
| 1523 | VSRARNI_W_D = 1508, // LoongArchLSXInstrInfo.td:842 |
| 1524 | VSRARN_B_H = 1509, // LoongArchLSXInstrInfo.td:832 |
| 1525 | VSRARN_H_W = 1510, // LoongArchLSXInstrInfo.td:833 |
| 1526 | VSRARN_W_D = 1511, // LoongArchLSXInstrInfo.td:834 |
| 1527 | VSRAR_B = 1512, // LoongArchLSXInstrInfo.td:804 |
| 1528 | VSRAR_D = 1513, // LoongArchLSXInstrInfo.td:807 |
| 1529 | VSRAR_H = 1514, // LoongArchLSXInstrInfo.td:805 |
| 1530 | VSRAR_W = 1515, // LoongArchLSXInstrInfo.td:806 |
| 1531 | VSRA_B = 1516, // LoongArchLSXInstrInfo.td:768 |
| 1532 | VSRA_D = 1517, // LoongArchLSXInstrInfo.td:771 |
| 1533 | VSRA_H = 1518, // LoongArchLSXInstrInfo.td:769 |
| 1534 | VSRA_W = 1519, // LoongArchLSXInstrInfo.td:770 |
| 1535 | VSRLI_B = 1520, // LoongArchLSXInstrInfo.td:763 |
| 1536 | VSRLI_D = 1521, // LoongArchLSXInstrInfo.td:766 |
| 1537 | VSRLI_H = 1522, // LoongArchLSXInstrInfo.td:764 |
| 1538 | VSRLI_W = 1523, // LoongArchLSXInstrInfo.td:765 |
| 1539 | VSRLNI_B_H = 1524, // LoongArchLSXInstrInfo.td:820 |
| 1540 | VSRLNI_D_Q = 1525, // LoongArchLSXInstrInfo.td:823 |
| 1541 | VSRLNI_H_W = 1526, // LoongArchLSXInstrInfo.td:821 |
| 1542 | VSRLNI_W_D = 1527, // LoongArchLSXInstrInfo.td:822 |
| 1543 | VSRLN_B_H = 1528, // LoongArchLSXInstrInfo.td:813 |
| 1544 | VSRLN_H_W = 1529, // LoongArchLSXInstrInfo.td:814 |
| 1545 | VSRLN_W_D = 1530, // LoongArchLSXInstrInfo.td:815 |
| 1546 | VSRLRI_B = 1531, // LoongArchLSXInstrInfo.td:799 |
| 1547 | VSRLRI_D = 1532, // LoongArchLSXInstrInfo.td:802 |
| 1548 | VSRLRI_H = 1533, // LoongArchLSXInstrInfo.td:800 |
| 1549 | VSRLRI_W = 1534, // LoongArchLSXInstrInfo.td:801 |
| 1550 | VSRLRNI_B_H = 1535, // LoongArchLSXInstrInfo.td:836 |
| 1551 | VSRLRNI_D_Q = 1536, // LoongArchLSXInstrInfo.td:839 |
| 1552 | VSRLRNI_H_W = 1537, // LoongArchLSXInstrInfo.td:837 |
| 1553 | VSRLRNI_W_D = 1538, // LoongArchLSXInstrInfo.td:838 |
| 1554 | VSRLRN_B_H = 1539, // LoongArchLSXInstrInfo.td:829 |
| 1555 | VSRLRN_H_W = 1540, // LoongArchLSXInstrInfo.td:830 |
| 1556 | VSRLRN_W_D = 1541, // LoongArchLSXInstrInfo.td:831 |
| 1557 | VSRLR_B = 1542, // LoongArchLSXInstrInfo.td:795 |
| 1558 | VSRLR_D = 1543, // LoongArchLSXInstrInfo.td:798 |
| 1559 | VSRLR_H = 1544, // LoongArchLSXInstrInfo.td:796 |
| 1560 | VSRLR_W = 1545, // LoongArchLSXInstrInfo.td:797 |
| 1561 | VSRL_B = 1546, // LoongArchLSXInstrInfo.td:759 |
| 1562 | VSRL_D = 1547, // LoongArchLSXInstrInfo.td:762 |
| 1563 | VSRL_H = 1548, // LoongArchLSXInstrInfo.td:760 |
| 1564 | VSRL_W = 1549, // LoongArchLSXInstrInfo.td:761 |
| 1565 | VSSRANI_BU_H = 1550, // LoongArchLSXInstrInfo.td:870 |
| 1566 | VSSRANI_B_H = 1551, // LoongArchLSXInstrInfo.td:862 |
| 1567 | VSSRANI_DU_Q = 1552, // LoongArchLSXInstrInfo.td:873 |
| 1568 | VSSRANI_D_Q = 1553, // LoongArchLSXInstrInfo.td:865 |
| 1569 | VSSRANI_HU_W = 1554, // LoongArchLSXInstrInfo.td:871 |
| 1570 | VSSRANI_H_W = 1555, // LoongArchLSXInstrInfo.td:863 |
| 1571 | VSSRANI_WU_D = 1556, // LoongArchLSXInstrInfo.td:872 |
| 1572 | VSSRANI_W_D = 1557, // LoongArchLSXInstrInfo.td:864 |
| 1573 | VSSRAN_BU_H = 1558, // LoongArchLSXInstrInfo.td:854 |
| 1574 | VSSRAN_B_H = 1559, // LoongArchLSXInstrInfo.td:848 |
| 1575 | VSSRAN_HU_W = 1560, // LoongArchLSXInstrInfo.td:855 |
| 1576 | VSSRAN_H_W = 1561, // LoongArchLSXInstrInfo.td:849 |
| 1577 | VSSRAN_WU_D = 1562, // LoongArchLSXInstrInfo.td:856 |
| 1578 | VSSRAN_W_D = 1563, // LoongArchLSXInstrInfo.td:850 |
| 1579 | VSSRARNI_BU_H = 1564, // LoongArchLSXInstrInfo.td:900 |
| 1580 | VSSRARNI_B_H = 1565, // LoongArchLSXInstrInfo.td:892 |
| 1581 | VSSRARNI_DU_Q = 1566, // LoongArchLSXInstrInfo.td:903 |
| 1582 | VSSRARNI_D_Q = 1567, // LoongArchLSXInstrInfo.td:895 |
| 1583 | VSSRARNI_HU_W = 1568, // LoongArchLSXInstrInfo.td:901 |
| 1584 | VSSRARNI_H_W = 1569, // LoongArchLSXInstrInfo.td:893 |
| 1585 | VSSRARNI_WU_D = 1570, // LoongArchLSXInstrInfo.td:902 |
| 1586 | VSSRARNI_W_D = 1571, // LoongArchLSXInstrInfo.td:894 |
| 1587 | VSSRARN_BU_H = 1572, // LoongArchLSXInstrInfo.td:884 |
| 1588 | VSSRARN_B_H = 1573, // LoongArchLSXInstrInfo.td:878 |
| 1589 | VSSRARN_HU_W = 1574, // LoongArchLSXInstrInfo.td:885 |
| 1590 | VSSRARN_H_W = 1575, // LoongArchLSXInstrInfo.td:879 |
| 1591 | VSSRARN_WU_D = 1576, // LoongArchLSXInstrInfo.td:886 |
| 1592 | VSSRARN_W_D = 1577, // LoongArchLSXInstrInfo.td:880 |
| 1593 | VSSRLNI_BU_H = 1578, // LoongArchLSXInstrInfo.td:866 |
| 1594 | VSSRLNI_B_H = 1579, // LoongArchLSXInstrInfo.td:858 |
| 1595 | VSSRLNI_DU_Q = 1580, // LoongArchLSXInstrInfo.td:869 |
| 1596 | VSSRLNI_D_Q = 1581, // LoongArchLSXInstrInfo.td:861 |
| 1597 | VSSRLNI_HU_W = 1582, // LoongArchLSXInstrInfo.td:867 |
| 1598 | VSSRLNI_H_W = 1583, // LoongArchLSXInstrInfo.td:859 |
| 1599 | VSSRLNI_WU_D = 1584, // LoongArchLSXInstrInfo.td:868 |
| 1600 | VSSRLNI_W_D = 1585, // LoongArchLSXInstrInfo.td:860 |
| 1601 | VSSRLN_BU_H = 1586, // LoongArchLSXInstrInfo.td:851 |
| 1602 | VSSRLN_B_H = 1587, // LoongArchLSXInstrInfo.td:845 |
| 1603 | VSSRLN_HU_W = 1588, // LoongArchLSXInstrInfo.td:852 |
| 1604 | VSSRLN_H_W = 1589, // LoongArchLSXInstrInfo.td:846 |
| 1605 | VSSRLN_WU_D = 1590, // LoongArchLSXInstrInfo.td:853 |
| 1606 | VSSRLN_W_D = 1591, // LoongArchLSXInstrInfo.td:847 |
| 1607 | VSSRLRNI_BU_H = 1592, // LoongArchLSXInstrInfo.td:896 |
| 1608 | VSSRLRNI_B_H = 1593, // LoongArchLSXInstrInfo.td:888 |
| 1609 | VSSRLRNI_DU_Q = 1594, // LoongArchLSXInstrInfo.td:899 |
| 1610 | VSSRLRNI_D_Q = 1595, // LoongArchLSXInstrInfo.td:891 |
| 1611 | VSSRLRNI_HU_W = 1596, // LoongArchLSXInstrInfo.td:897 |
| 1612 | VSSRLRNI_H_W = 1597, // LoongArchLSXInstrInfo.td:889 |
| 1613 | VSSRLRNI_WU_D = 1598, // LoongArchLSXInstrInfo.td:898 |
| 1614 | VSSRLRNI_W_D = 1599, // LoongArchLSXInstrInfo.td:890 |
| 1615 | VSSRLRN_BU_H = 1600, // LoongArchLSXInstrInfo.td:881 |
| 1616 | VSSRLRN_B_H = 1601, // LoongArchLSXInstrInfo.td:875 |
| 1617 | VSSRLRN_HU_W = 1602, // LoongArchLSXInstrInfo.td:882 |
| 1618 | VSSRLRN_H_W = 1603, // LoongArchLSXInstrInfo.td:876 |
| 1619 | VSSRLRN_WU_D = 1604, // LoongArchLSXInstrInfo.td:883 |
| 1620 | VSSRLRN_W_D = 1605, // LoongArchLSXInstrInfo.td:877 |
| 1621 | VSSUB_B = 1606, // LoongArchLSXInstrInfo.td:473 |
| 1622 | VSSUB_BU = 1607, // LoongArchLSXInstrInfo.td:477 |
| 1623 | VSSUB_D = 1608, // LoongArchLSXInstrInfo.td:476 |
| 1624 | VSSUB_DU = 1609, // LoongArchLSXInstrInfo.td:480 |
| 1625 | VSSUB_H = 1610, // LoongArchLSXInstrInfo.td:474 |
| 1626 | VSSUB_HU = 1611, // LoongArchLSXInstrInfo.td:478 |
| 1627 | VSSUB_W = 1612, // LoongArchLSXInstrInfo.td:475 |
| 1628 | VSSUB_WU = 1613, // LoongArchLSXInstrInfo.td:479 |
| 1629 | VST = 1614, // LoongArchLSXInstrInfo.td:1249 |
| 1630 | VSTELM_B = 1615, // LoongArchLSXInstrInfo.td:1252 |
| 1631 | VSTELM_D = 1616, // LoongArchLSXInstrInfo.td:1255 |
| 1632 | VSTELM_H = 1617, // LoongArchLSXInstrInfo.td:1253 |
| 1633 | VSTELM_W = 1618, // LoongArchLSXInstrInfo.td:1254 |
| 1634 | VSTX = 1619, // LoongArchLSXInstrInfo.td:1250 |
| 1635 | VSUBI_BU = 1620, // LoongArchLSXInstrInfo.td:454 |
| 1636 | VSUBI_DU = 1621, // LoongArchLSXInstrInfo.td:457 |
| 1637 | VSUBI_HU = 1622, // LoongArchLSXInstrInfo.td:455 |
| 1638 | VSUBI_WU = 1623, // LoongArchLSXInstrInfo.td:456 |
| 1639 | VSUBWEV_D_W = 1624, // LoongArchLSXInstrInfo.td:511 |
| 1640 | VSUBWEV_D_WU = 1625, // LoongArchLSXInstrInfo.td:529 |
| 1641 | VSUBWEV_H_B = 1626, // LoongArchLSXInstrInfo.td:509 |
| 1642 | VSUBWEV_H_BU = 1627, // LoongArchLSXInstrInfo.td:527 |
| 1643 | VSUBWEV_Q_D = 1628, // LoongArchLSXInstrInfo.td:512 |
| 1644 | VSUBWEV_Q_DU = 1629, // LoongArchLSXInstrInfo.td:530 |
| 1645 | VSUBWEV_W_H = 1630, // LoongArchLSXInstrInfo.td:510 |
| 1646 | VSUBWEV_W_HU = 1631, // LoongArchLSXInstrInfo.td:528 |
| 1647 | VSUBWOD_D_W = 1632, // LoongArchLSXInstrInfo.td:515 |
| 1648 | VSUBWOD_D_WU = 1633, // LoongArchLSXInstrInfo.td:533 |
| 1649 | VSUBWOD_H_B = 1634, // LoongArchLSXInstrInfo.td:513 |
| 1650 | VSUBWOD_H_BU = 1635, // LoongArchLSXInstrInfo.td:531 |
| 1651 | VSUBWOD_Q_D = 1636, // LoongArchLSXInstrInfo.td:516 |
| 1652 | VSUBWOD_Q_DU = 1637, // LoongArchLSXInstrInfo.td:534 |
| 1653 | VSUBWOD_W_H = 1638, // LoongArchLSXInstrInfo.td:514 |
| 1654 | VSUBWOD_W_HU = 1639, // LoongArchLSXInstrInfo.td:532 |
| 1655 | VSUB_B = 1640, // LoongArchLSXInstrInfo.td:443 |
| 1656 | VSUB_D = 1641, // LoongArchLSXInstrInfo.td:446 |
| 1657 | VSUB_H = 1642, // LoongArchLSXInstrInfo.td:444 |
| 1658 | VSUB_Q = 1643, // LoongArchLSXInstrInfo.td:447 |
| 1659 | VSUB_W = 1644, // LoongArchLSXInstrInfo.td:445 |
| 1660 | VXORI_B = 1645, // LoongArchLSXInstrInfo.td:747 |
| 1661 | VXOR_V = 1646, // LoongArchLSXInstrInfo.td:740 |
| 1662 | X86ADC_B = 1647, // LoongArchLBTInstrInfo.td:63 |
| 1663 | X86ADC_D = 1648, // LoongArchLBTInstrInfo.td:208 |
| 1664 | X86ADC_H = 1649, // LoongArchLBTInstrInfo.td:64 |
| 1665 | X86ADC_W = 1650, // LoongArchLBTInstrInfo.td:65 |
| 1666 | X86ADD_B = 1651, // LoongArchLBTInstrInfo.td:66 |
| 1667 | X86ADD_D = 1652, // LoongArchLBTInstrInfo.td:209 |
| 1668 | X86ADD_DU = 1653, // LoongArchLBTInstrInfo.td:211 |
| 1669 | X86ADD_H = 1654, // LoongArchLBTInstrInfo.td:67 |
| 1670 | X86ADD_W = 1655, // LoongArchLBTInstrInfo.td:68 |
| 1671 | X86ADD_WU = 1656, // LoongArchLBTInstrInfo.td:210 |
| 1672 | X86AND_B = 1657, // LoongArchLBTInstrInfo.td:85 |
| 1673 | X86AND_D = 1658, // LoongArchLBTInstrInfo.td:218 |
| 1674 | X86AND_H = 1659, // LoongArchLBTInstrInfo.td:86 |
| 1675 | X86AND_W = 1660, // LoongArchLBTInstrInfo.td:87 |
| 1676 | X86CLRTM = 1661, // LoongArchLBTInstrInfo.td:163 |
| 1677 | X86DECTOP = 1662, // LoongArchLBTInstrInfo.td:161 |
| 1678 | X86DEC_B = 1663, // LoongArchLBTInstrInfo.td:81 |
| 1679 | X86DEC_D = 1664, // LoongArchLBTInstrInfo.td:217 |
| 1680 | X86DEC_H = 1665, // LoongArchLBTInstrInfo.td:82 |
| 1681 | X86DEC_W = 1666, // LoongArchLBTInstrInfo.td:83 |
| 1682 | X86INCTOP = 1667, // LoongArchLBTInstrInfo.td:160 |
| 1683 | X86INC_B = 1668, // LoongArchLBTInstrInfo.td:70 |
| 1684 | X86INC_D = 1669, // LoongArchLBTInstrInfo.td:212 |
| 1685 | X86INC_H = 1670, // LoongArchLBTInstrInfo.td:71 |
| 1686 | X86INC_W = 1671, // LoongArchLBTInstrInfo.td:72 |
| 1687 | X86MFFLAG = 1672, // LoongArchLBTInstrInfo.td:155 |
| 1688 | X86MFTOP = 1673, // LoongArchLBTInstrInfo.td:157 |
| 1689 | X86MTFLAG = 1674, // LoongArchLBTInstrInfo.td:156 |
| 1690 | X86MTTOP = 1675, // LoongArchLBTInstrInfo.td:158 |
| 1691 | X86MUL_B = 1676, // LoongArchLBTInstrInfo.td:97 |
| 1692 | X86MUL_BU = 1677, // LoongArchLBTInstrInfo.td:100 |
| 1693 | X86MUL_D = 1678, // LoongArchLBTInstrInfo.td:221 |
| 1694 | X86MUL_DU = 1679, // LoongArchLBTInstrInfo.td:223 |
| 1695 | X86MUL_H = 1680, // LoongArchLBTInstrInfo.td:98 |
| 1696 | X86MUL_HU = 1681, // LoongArchLBTInstrInfo.td:101 |
| 1697 | X86MUL_W = 1682, // LoongArchLBTInstrInfo.td:99 |
| 1698 | X86MUL_WU = 1683, // LoongArchLBTInstrInfo.td:222 |
| 1699 | X86OR_B = 1684, // LoongArchLBTInstrInfo.td:89 |
| 1700 | X86OR_D = 1685, // LoongArchLBTInstrInfo.td:219 |
| 1701 | X86OR_H = 1686, // LoongArchLBTInstrInfo.td:90 |
| 1702 | X86OR_W = 1687, // LoongArchLBTInstrInfo.td:91 |
| 1703 | X86RCLI_B = 1688, // LoongArchLBTInstrInfo.td:106 |
| 1704 | X86RCLI_D = 1689, // LoongArchLBTInstrInfo.td:225 |
| 1705 | X86RCLI_H = 1690, // LoongArchLBTInstrInfo.td:107 |
| 1706 | X86RCLI_W = 1691, // LoongArchLBTInstrInfo.td:108 |
| 1707 | X86RCL_B = 1692, // LoongArchLBTInstrInfo.td:103 |
| 1708 | X86RCL_D = 1693, // LoongArchLBTInstrInfo.td:224 |
| 1709 | X86RCL_H = 1694, // LoongArchLBTInstrInfo.td:104 |
| 1710 | X86RCL_W = 1695, // LoongArchLBTInstrInfo.td:105 |
| 1711 | X86RCRI_B = 1696, // LoongArchLBTInstrInfo.td:113 |
| 1712 | X86RCRI_D = 1697, // LoongArchLBTInstrInfo.td:227 |
| 1713 | X86RCRI_H = 1698, // LoongArchLBTInstrInfo.td:114 |
| 1714 | X86RCRI_W = 1699, // LoongArchLBTInstrInfo.td:115 |
| 1715 | X86RCR_B = 1700, // LoongArchLBTInstrInfo.td:110 |
| 1716 | X86RCR_D = 1701, // LoongArchLBTInstrInfo.td:226 |
| 1717 | X86RCR_H = 1702, // LoongArchLBTInstrInfo.td:111 |
| 1718 | X86RCR_W = 1703, // LoongArchLBTInstrInfo.td:112 |
| 1719 | X86ROTLI_B = 1704, // LoongArchLBTInstrInfo.td:120 |
| 1720 | X86ROTLI_D = 1705, // LoongArchLBTInstrInfo.td:229 |
| 1721 | X86ROTLI_H = 1706, // LoongArchLBTInstrInfo.td:121 |
| 1722 | X86ROTLI_W = 1707, // LoongArchLBTInstrInfo.td:122 |
| 1723 | X86ROTL_B = 1708, // LoongArchLBTInstrInfo.td:117 |
| 1724 | X86ROTL_D = 1709, // LoongArchLBTInstrInfo.td:228 |
| 1725 | X86ROTL_H = 1710, // LoongArchLBTInstrInfo.td:118 |
| 1726 | X86ROTL_W = 1711, // LoongArchLBTInstrInfo.td:119 |
| 1727 | X86ROTRI_B = 1712, // LoongArchLBTInstrInfo.td:127 |
| 1728 | X86ROTRI_D = 1713, // LoongArchLBTInstrInfo.td:231 |
| 1729 | X86ROTRI_H = 1714, // LoongArchLBTInstrInfo.td:128 |
| 1730 | X86ROTRI_W = 1715, // LoongArchLBTInstrInfo.td:129 |
| 1731 | X86ROTR_B = 1716, // LoongArchLBTInstrInfo.td:124 |
| 1732 | X86ROTR_D = 1717, // LoongArchLBTInstrInfo.td:230 |
| 1733 | X86ROTR_H = 1718, // LoongArchLBTInstrInfo.td:125 |
| 1734 | X86ROTR_W = 1719, // LoongArchLBTInstrInfo.td:126 |
| 1735 | X86SBC_B = 1720, // LoongArchLBTInstrInfo.td:74 |
| 1736 | X86SBC_D = 1721, // LoongArchLBTInstrInfo.td:213 |
| 1737 | X86SBC_H = 1722, // LoongArchLBTInstrInfo.td:75 |
| 1738 | X86SBC_W = 1723, // LoongArchLBTInstrInfo.td:76 |
| 1739 | X86SETTAG = 1724, // LoongArchLBTInstrInfo.td:164 |
| 1740 | X86SETTM = 1725, // LoongArchLBTInstrInfo.td:162 |
| 1741 | X86SLLI_B = 1726, // LoongArchLBTInstrInfo.td:134 |
| 1742 | X86SLLI_D = 1727, // LoongArchLBTInstrInfo.td:233 |
| 1743 | X86SLLI_H = 1728, // LoongArchLBTInstrInfo.td:135 |
| 1744 | X86SLLI_W = 1729, // LoongArchLBTInstrInfo.td:136 |
| 1745 | X86SLL_B = 1730, // LoongArchLBTInstrInfo.td:131 |
| 1746 | X86SLL_D = 1731, // LoongArchLBTInstrInfo.td:232 |
| 1747 | X86SLL_H = 1732, // LoongArchLBTInstrInfo.td:132 |
| 1748 | X86SLL_W = 1733, // LoongArchLBTInstrInfo.td:133 |
| 1749 | X86SRAI_B = 1734, // LoongArchLBTInstrInfo.td:148 |
| 1750 | X86SRAI_D = 1735, // LoongArchLBTInstrInfo.td:237 |
| 1751 | X86SRAI_H = 1736, // LoongArchLBTInstrInfo.td:149 |
| 1752 | X86SRAI_W = 1737, // LoongArchLBTInstrInfo.td:150 |
| 1753 | X86SRA_B = 1738, // LoongArchLBTInstrInfo.td:145 |
| 1754 | X86SRA_D = 1739, // LoongArchLBTInstrInfo.td:236 |
| 1755 | X86SRA_H = 1740, // LoongArchLBTInstrInfo.td:146 |
| 1756 | X86SRA_W = 1741, // LoongArchLBTInstrInfo.td:147 |
| 1757 | X86SRLI_B = 1742, // LoongArchLBTInstrInfo.td:141 |
| 1758 | X86SRLI_D = 1743, // LoongArchLBTInstrInfo.td:235 |
| 1759 | X86SRLI_H = 1744, // LoongArchLBTInstrInfo.td:142 |
| 1760 | X86SRLI_W = 1745, // LoongArchLBTInstrInfo.td:143 |
| 1761 | X86SRL_B = 1746, // LoongArchLBTInstrInfo.td:138 |
| 1762 | X86SRL_D = 1747, // LoongArchLBTInstrInfo.td:234 |
| 1763 | X86SRL_H = 1748, // LoongArchLBTInstrInfo.td:139 |
| 1764 | X86SRL_W = 1749, // LoongArchLBTInstrInfo.td:140 |
| 1765 | X86SUB_B = 1750, // LoongArchLBTInstrInfo.td:77 |
| 1766 | X86SUB_D = 1751, // LoongArchLBTInstrInfo.td:215 |
| 1767 | X86SUB_DU = 1752, // LoongArchLBTInstrInfo.td:216 |
| 1768 | X86SUB_H = 1753, // LoongArchLBTInstrInfo.td:78 |
| 1769 | X86SUB_W = 1754, // LoongArchLBTInstrInfo.td:79 |
| 1770 | X86SUB_WU = 1755, // LoongArchLBTInstrInfo.td:214 |
| 1771 | X86XOR_B = 1756, // LoongArchLBTInstrInfo.td:93 |
| 1772 | X86XOR_D = 1757, // LoongArchLBTInstrInfo.td:220 |
| 1773 | X86XOR_H = 1758, // LoongArchLBTInstrInfo.td:94 |
| 1774 | X86XOR_W = 1759, // LoongArchLBTInstrInfo.td:95 |
| 1775 | XOR = 1760, // LoongArchInstrInfo.td:866 |
| 1776 | XORI = 1761, // LoongArchInstrInfo.td:871 |
| 1777 | XVABSD_B = 1762, // LoongArchLASXInstrInfo.td:352 |
| 1778 | XVABSD_BU = 1763, // LoongArchLASXInstrInfo.td:356 |
| 1779 | XVABSD_D = 1764, // LoongArchLASXInstrInfo.td:355 |
| 1780 | XVABSD_DU = 1765, // LoongArchLASXInstrInfo.td:359 |
| 1781 | XVABSD_H = 1766, // LoongArchLASXInstrInfo.td:353 |
| 1782 | XVABSD_HU = 1767, // LoongArchLASXInstrInfo.td:357 |
| 1783 | XVABSD_W = 1768, // LoongArchLASXInstrInfo.td:354 |
| 1784 | XVABSD_WU = 1769, // LoongArchLASXInstrInfo.td:358 |
| 1785 | XVADDA_B = 1770, // LoongArchLASXInstrInfo.td:361 |
| 1786 | XVADDA_D = 1771, // LoongArchLASXInstrInfo.td:364 |
| 1787 | XVADDA_H = 1772, // LoongArchLASXInstrInfo.td:362 |
| 1788 | XVADDA_W = 1773, // LoongArchLASXInstrInfo.td:363 |
| 1789 | XVADDI_BU = 1774, // LoongArchLASXInstrInfo.td:239 |
| 1790 | XVADDI_DU = 1775, // LoongArchLASXInstrInfo.td:242 |
| 1791 | XVADDI_HU = 1776, // LoongArchLASXInstrInfo.td:240 |
| 1792 | XVADDI_WU = 1777, // LoongArchLASXInstrInfo.td:241 |
| 1793 | XVADDWEV_D_W = 1778, // LoongArchLASXInstrInfo.td:292 |
| 1794 | XVADDWEV_D_WU = 1779, // LoongArchLASXInstrInfo.td:310 |
| 1795 | XVADDWEV_D_WU_W = 1780, // LoongArchLASXInstrInfo.td:328 |
| 1796 | XVADDWEV_H_B = 1781, // LoongArchLASXInstrInfo.td:290 |
| 1797 | XVADDWEV_H_BU = 1782, // LoongArchLASXInstrInfo.td:308 |
| 1798 | XVADDWEV_H_BU_B = 1783, // LoongArchLASXInstrInfo.td:326 |
| 1799 | XVADDWEV_Q_D = 1784, // LoongArchLASXInstrInfo.td:293 |
| 1800 | XVADDWEV_Q_DU = 1785, // LoongArchLASXInstrInfo.td:311 |
| 1801 | XVADDWEV_Q_DU_D = 1786, // LoongArchLASXInstrInfo.td:329 |
| 1802 | XVADDWEV_W_H = 1787, // LoongArchLASXInstrInfo.td:291 |
| 1803 | XVADDWEV_W_HU = 1788, // LoongArchLASXInstrInfo.td:309 |
| 1804 | XVADDWEV_W_HU_H = 1789, // LoongArchLASXInstrInfo.td:327 |
| 1805 | XVADDWOD_D_W = 1790, // LoongArchLASXInstrInfo.td:296 |
| 1806 | XVADDWOD_D_WU = 1791, // LoongArchLASXInstrInfo.td:314 |
| 1807 | XVADDWOD_D_WU_W = 1792, // LoongArchLASXInstrInfo.td:332 |
| 1808 | XVADDWOD_H_B = 1793, // LoongArchLASXInstrInfo.td:294 |
| 1809 | XVADDWOD_H_BU = 1794, // LoongArchLASXInstrInfo.td:312 |
| 1810 | XVADDWOD_H_BU_B = 1795, // LoongArchLASXInstrInfo.td:330 |
| 1811 | XVADDWOD_Q_D = 1796, // LoongArchLASXInstrInfo.td:297 |
| 1812 | XVADDWOD_Q_DU = 1797, // LoongArchLASXInstrInfo.td:315 |
| 1813 | XVADDWOD_Q_DU_D = 1798, // LoongArchLASXInstrInfo.td:333 |
| 1814 | XVADDWOD_W_H = 1799, // LoongArchLASXInstrInfo.td:295 |
| 1815 | XVADDWOD_W_HU = 1800, // LoongArchLASXInstrInfo.td:313 |
| 1816 | XVADDWOD_W_HU_H = 1801, // LoongArchLASXInstrInfo.td:331 |
| 1817 | XVADD_B = 1802, // LoongArchLASXInstrInfo.td:227 |
| 1818 | XVADD_D = 1803, // LoongArchLASXInstrInfo.td:230 |
| 1819 | XVADD_H = 1804, // LoongArchLASXInstrInfo.td:228 |
| 1820 | XVADD_Q = 1805, // LoongArchLASXInstrInfo.td:231 |
| 1821 | XVADD_W = 1806, // LoongArchLASXInstrInfo.td:229 |
| 1822 | XVANDI_B = 1807, // LoongArchLASXInstrInfo.td:548 |
| 1823 | XVANDN_V = 1808, // LoongArchLASXInstrInfo.td:545 |
| 1824 | XVAND_V = 1809, // LoongArchLASXInstrInfo.td:541 |
| 1825 | XVAVGR_B = 1810, // LoongArchLASXInstrInfo.td:343 |
| 1826 | XVAVGR_BU = 1811, // LoongArchLASXInstrInfo.td:347 |
| 1827 | XVAVGR_D = 1812, // LoongArchLASXInstrInfo.td:346 |
| 1828 | XVAVGR_DU = 1813, // LoongArchLASXInstrInfo.td:350 |
| 1829 | XVAVGR_H = 1814, // LoongArchLASXInstrInfo.td:344 |
| 1830 | XVAVGR_HU = 1815, // LoongArchLASXInstrInfo.td:348 |
| 1831 | XVAVGR_W = 1816, // LoongArchLASXInstrInfo.td:345 |
| 1832 | XVAVGR_WU = 1817, // LoongArchLASXInstrInfo.td:349 |
| 1833 | XVAVG_B = 1818, // LoongArchLASXInstrInfo.td:335 |
| 1834 | XVAVG_BU = 1819, // LoongArchLASXInstrInfo.td:339 |
| 1835 | XVAVG_D = 1820, // LoongArchLASXInstrInfo.td:338 |
| 1836 | XVAVG_DU = 1821, // LoongArchLASXInstrInfo.td:342 |
| 1837 | XVAVG_H = 1822, // LoongArchLASXInstrInfo.td:336 |
| 1838 | XVAVG_HU = 1823, // LoongArchLASXInstrInfo.td:340 |
| 1839 | XVAVG_W = 1824, // LoongArchLASXInstrInfo.td:337 |
| 1840 | XVAVG_WU = 1825, // LoongArchLASXInstrInfo.td:341 |
| 1841 | XVBITCLRI_B = 1826, // LoongArchLASXInstrInfo.td:726 |
| 1842 | XVBITCLRI_D = 1827, // LoongArchLASXInstrInfo.td:729 |
| 1843 | XVBITCLRI_H = 1828, // LoongArchLASXInstrInfo.td:727 |
| 1844 | XVBITCLRI_W = 1829, // LoongArchLASXInstrInfo.td:728 |
| 1845 | XVBITCLR_B = 1830, // LoongArchLASXInstrInfo.td:722 |
| 1846 | XVBITCLR_D = 1831, // LoongArchLASXInstrInfo.td:725 |
| 1847 | XVBITCLR_H = 1832, // LoongArchLASXInstrInfo.td:723 |
| 1848 | XVBITCLR_W = 1833, // LoongArchLASXInstrInfo.td:724 |
| 1849 | XVBITREVI_B = 1834, // LoongArchLASXInstrInfo.td:744 |
| 1850 | XVBITREVI_D = 1835, // LoongArchLASXInstrInfo.td:747 |
| 1851 | XVBITREVI_H = 1836, // LoongArchLASXInstrInfo.td:745 |
| 1852 | XVBITREVI_W = 1837, // LoongArchLASXInstrInfo.td:746 |
| 1853 | XVBITREV_B = 1838, // LoongArchLASXInstrInfo.td:740 |
| 1854 | XVBITREV_D = 1839, // LoongArchLASXInstrInfo.td:743 |
| 1855 | XVBITREV_H = 1840, // LoongArchLASXInstrInfo.td:741 |
| 1856 | XVBITREV_W = 1841, // LoongArchLASXInstrInfo.td:742 |
| 1857 | XVBITSELI_B = 1842, // LoongArchLASXInstrInfo.td:950 |
| 1858 | XVBITSEL_V = 1843, // LoongArchLASXInstrInfo.td:948 |
| 1859 | XVBITSETI_B = 1844, // LoongArchLASXInstrInfo.td:735 |
| 1860 | XVBITSETI_D = 1845, // LoongArchLASXInstrInfo.td:738 |
| 1861 | XVBITSETI_H = 1846, // LoongArchLASXInstrInfo.td:736 |
| 1862 | XVBITSETI_W = 1847, // LoongArchLASXInstrInfo.td:737 |
| 1863 | XVBITSET_B = 1848, // LoongArchLASXInstrInfo.td:731 |
| 1864 | XVBITSET_D = 1849, // LoongArchLASXInstrInfo.td:734 |
| 1865 | XVBITSET_H = 1850, // LoongArchLASXInstrInfo.td:732 |
| 1866 | XVBITSET_W = 1851, // LoongArchLASXInstrInfo.td:733 |
| 1867 | XVBSLL_V = 1852, // LoongArchLASXInstrInfo.td:998 |
| 1868 | XVBSRL_V = 1853, // LoongArchLASXInstrInfo.td:999 |
| 1869 | XVCLO_B = 1854, // LoongArchLASXInstrInfo.td:708 |
| 1870 | XVCLO_D = 1855, // LoongArchLASXInstrInfo.td:711 |
| 1871 | XVCLO_H = 1856, // LoongArchLASXInstrInfo.td:709 |
| 1872 | XVCLO_W = 1857, // LoongArchLASXInstrInfo.td:710 |
| 1873 | XVCLZ_B = 1858, // LoongArchLASXInstrInfo.td:712 |
| 1874 | XVCLZ_D = 1859, // LoongArchLASXInstrInfo.td:715 |
| 1875 | XVCLZ_H = 1860, // LoongArchLASXInstrInfo.td:713 |
| 1876 | XVCLZ_W = 1861, // LoongArchLASXInstrInfo.td:714 |
| 1877 | XVDIV_B = 1862, // LoongArchLASXInstrInfo.td:474 |
| 1878 | XVDIV_BU = 1863, // LoongArchLASXInstrInfo.td:478 |
| 1879 | XVDIV_D = 1864, // LoongArchLASXInstrInfo.td:477 |
| 1880 | XVDIV_DU = 1865, // LoongArchLASXInstrInfo.td:481 |
| 1881 | XVDIV_H = 1866, // LoongArchLASXInstrInfo.td:475 |
| 1882 | XVDIV_HU = 1867, // LoongArchLASXInstrInfo.td:479 |
| 1883 | XVDIV_W = 1868, // LoongArchLASXInstrInfo.td:476 |
| 1884 | XVDIV_WU = 1869, // LoongArchLASXInstrInfo.td:480 |
| 1885 | XVEXTH_DU_WU = 1870, // LoongArchLASXInstrInfo.td:507 |
| 1886 | XVEXTH_D_W = 1871, // LoongArchLASXInstrInfo.td:503 |
| 1887 | XVEXTH_HU_BU = 1872, // LoongArchLASXInstrInfo.td:505 |
| 1888 | XVEXTH_H_B = 1873, // LoongArchLASXInstrInfo.td:501 |
| 1889 | XVEXTH_QU_DU = 1874, // LoongArchLASXInstrInfo.td:508 |
| 1890 | XVEXTH_Q_D = 1875, // LoongArchLASXInstrInfo.td:504 |
| 1891 | XVEXTH_WU_HU = 1876, // LoongArchLASXInstrInfo.td:506 |
| 1892 | XVEXTH_W_H = 1877, // LoongArchLASXInstrInfo.td:502 |
| 1893 | XVEXTL_QU_DU = 1878, // LoongArchLASXInstrInfo.td:596 |
| 1894 | XVEXTL_Q_D = 1879, // LoongArchLASXInstrInfo.td:592 |
| 1895 | XVEXTRINS_B = 1880, // LoongArchLASXInstrInfo.td:1048 |
| 1896 | XVEXTRINS_D = 1881, // LoongArchLASXInstrInfo.td:1045 |
| 1897 | XVEXTRINS_H = 1882, // LoongArchLASXInstrInfo.td:1047 |
| 1898 | XVEXTRINS_W = 1883, // LoongArchLASXInstrInfo.td:1046 |
| 1899 | XVFADD_D = 1884, // LoongArchLASXInstrInfo.td:755 |
| 1900 | XVFADD_S = 1885, // LoongArchLASXInstrInfo.td:754 |
| 1901 | XVFCLASS_D = 1886, // LoongArchLASXInstrInfo.td:786 |
| 1902 | XVFCLASS_S = 1887, // LoongArchLASXInstrInfo.td:785 |
| 1903 | XVFCMP_CAF_D = 1888, // LoongArchLASXInstrInfo.td:925 |
| 1904 | XVFCMP_CAF_S = 1889, // LoongArchLASXInstrInfo.td:902 |
| 1905 | XVFCMP_CEQ_D = 1890, // LoongArchLASXInstrInfo.td:929 |
| 1906 | XVFCMP_CEQ_S = 1891, // LoongArchLASXInstrInfo.td:906 |
| 1907 | XVFCMP_CLE_D = 1892, // LoongArchLASXInstrInfo.td:931 |
| 1908 | XVFCMP_CLE_S = 1893, // LoongArchLASXInstrInfo.td:908 |
| 1909 | XVFCMP_CLT_D = 1894, // LoongArchLASXInstrInfo.td:927 |
| 1910 | XVFCMP_CLT_S = 1895, // LoongArchLASXInstrInfo.td:904 |
| 1911 | XVFCMP_CNE_D = 1896, // LoongArchLASXInstrInfo.td:941 |
| 1912 | XVFCMP_CNE_S = 1897, // LoongArchLASXInstrInfo.td:918 |
| 1913 | XVFCMP_COR_D = 1898, // LoongArchLASXInstrInfo.td:943 |
| 1914 | XVFCMP_COR_S = 1899, // LoongArchLASXInstrInfo.td:920 |
| 1915 | XVFCMP_CUEQ_D = 1900, // LoongArchLASXInstrInfo.td:937 |
| 1916 | XVFCMP_CUEQ_S = 1901, // LoongArchLASXInstrInfo.td:914 |
| 1917 | XVFCMP_CULE_D = 1902, // LoongArchLASXInstrInfo.td:939 |
| 1918 | XVFCMP_CULE_S = 1903, // LoongArchLASXInstrInfo.td:916 |
| 1919 | XVFCMP_CULT_D = 1904, // LoongArchLASXInstrInfo.td:935 |
| 1920 | XVFCMP_CULT_S = 1905, // LoongArchLASXInstrInfo.td:912 |
| 1921 | XVFCMP_CUNE_D = 1906, // LoongArchLASXInstrInfo.td:945 |
| 1922 | XVFCMP_CUNE_S = 1907, // LoongArchLASXInstrInfo.td:922 |
| 1923 | XVFCMP_CUN_D = 1908, // LoongArchLASXInstrInfo.td:933 |
| 1924 | XVFCMP_CUN_S = 1909, // LoongArchLASXInstrInfo.td:910 |
| 1925 | XVFCMP_SAF_D = 1910, // LoongArchLASXInstrInfo.td:926 |
| 1926 | XVFCMP_SAF_S = 1911, // LoongArchLASXInstrInfo.td:903 |
| 1927 | XVFCMP_SEQ_D = 1912, // LoongArchLASXInstrInfo.td:930 |
| 1928 | XVFCMP_SEQ_S = 1913, // LoongArchLASXInstrInfo.td:907 |
| 1929 | XVFCMP_SLE_D = 1914, // LoongArchLASXInstrInfo.td:932 |
| 1930 | XVFCMP_SLE_S = 1915, // LoongArchLASXInstrInfo.td:909 |
| 1931 | XVFCMP_SLT_D = 1916, // LoongArchLASXInstrInfo.td:928 |
| 1932 | XVFCMP_SLT_S = 1917, // LoongArchLASXInstrInfo.td:905 |
| 1933 | XVFCMP_SNE_D = 1918, // LoongArchLASXInstrInfo.td:942 |
| 1934 | XVFCMP_SNE_S = 1919, // LoongArchLASXInstrInfo.td:919 |
| 1935 | XVFCMP_SOR_D = 1920, // LoongArchLASXInstrInfo.td:944 |
| 1936 | XVFCMP_SOR_S = 1921, // LoongArchLASXInstrInfo.td:921 |
| 1937 | XVFCMP_SUEQ_D = 1922, // LoongArchLASXInstrInfo.td:938 |
| 1938 | XVFCMP_SUEQ_S = 1923, // LoongArchLASXInstrInfo.td:915 |
| 1939 | XVFCMP_SULE_D = 1924, // LoongArchLASXInstrInfo.td:940 |
| 1940 | XVFCMP_SULE_S = 1925, // LoongArchLASXInstrInfo.td:917 |
| 1941 | XVFCMP_SULT_D = 1926, // LoongArchLASXInstrInfo.td:936 |
| 1942 | XVFCMP_SULT_S = 1927, // LoongArchLASXInstrInfo.td:913 |
| 1943 | XVFCMP_SUNE_D = 1928, // LoongArchLASXInstrInfo.td:946 |
| 1944 | XVFCMP_SUNE_S = 1929, // LoongArchLASXInstrInfo.td:923 |
| 1945 | XVFCMP_SUN_D = 1930, // LoongArchLASXInstrInfo.td:934 |
| 1946 | XVFCMP_SUN_S = 1931, // LoongArchLASXInstrInfo.td:911 |
| 1947 | XVFCVTH_D_S = 1932, // LoongArchLASXInstrInfo.td:802 |
| 1948 | XVFCVTH_S_H = 1933, // LoongArchLASXInstrInfo.td:800 |
| 1949 | XVFCVTL_D_S = 1934, // LoongArchLASXInstrInfo.td:801 |
| 1950 | XVFCVTL_S_H = 1935, // LoongArchLASXInstrInfo.td:799 |
| 1951 | XVFCVT_H_S = 1936, // LoongArchLASXInstrInfo.td:803 |
| 1952 | XVFCVT_S_D = 1937, // LoongArchLASXInstrInfo.td:804 |
| 1953 | XVFDIV_D = 1938, // LoongArchLASXInstrInfo.td:761 |
| 1954 | XVFDIV_S = 1939, // LoongArchLASXInstrInfo.td:760 |
| 1955 | XVFFINTH_D_W = 1940, // LoongArchLASXInstrInfo.td:854 |
| 1956 | XVFFINTL_D_W = 1941, // LoongArchLASXInstrInfo.td:853 |
| 1957 | XVFFINT_D_L = 1942, // LoongArchLASXInstrInfo.td:850 |
| 1958 | XVFFINT_D_LU = 1943, // LoongArchLASXInstrInfo.td:852 |
| 1959 | XVFFINT_S_L = 1944, // LoongArchLASXInstrInfo.td:855 |
| 1960 | XVFFINT_S_W = 1945, // LoongArchLASXInstrInfo.td:849 |
| 1961 | XVFFINT_S_WU = 1946, // LoongArchLASXInstrInfo.td:851 |
| 1962 | XVFLOGB_D = 1947, // LoongArchLASXInstrInfo.td:783 |
| 1963 | XVFLOGB_S = 1948, // LoongArchLASXInstrInfo.td:782 |
| 1964 | XVFMADD_D = 1949, // LoongArchLASXInstrInfo.td:764 |
| 1965 | XVFMADD_S = 1950, // LoongArchLASXInstrInfo.td:763 |
| 1966 | XVFMAXA_D = 1951, // LoongArchLASXInstrInfo.td:778 |
| 1967 | XVFMAXA_S = 1952, // LoongArchLASXInstrInfo.td:777 |
| 1968 | XVFMAX_D = 1953, // LoongArchLASXInstrInfo.td:773 |
| 1969 | XVFMAX_S = 1954, // LoongArchLASXInstrInfo.td:772 |
| 1970 | XVFMINA_D = 1955, // LoongArchLASXInstrInfo.td:780 |
| 1971 | XVFMINA_S = 1956, // LoongArchLASXInstrInfo.td:779 |
| 1972 | XVFMIN_D = 1957, // LoongArchLASXInstrInfo.td:775 |
| 1973 | XVFMIN_S = 1958, // LoongArchLASXInstrInfo.td:774 |
| 1974 | XVFMSUB_D = 1959, // LoongArchLASXInstrInfo.td:766 |
| 1975 | XVFMSUB_S = 1960, // LoongArchLASXInstrInfo.td:765 |
| 1976 | XVFMUL_D = 1961, // LoongArchLASXInstrInfo.td:759 |
| 1977 | XVFMUL_S = 1962, // LoongArchLASXInstrInfo.td:758 |
| 1978 | XVFNMADD_D = 1963, // LoongArchLASXInstrInfo.td:768 |
| 1979 | XVFNMADD_S = 1964, // LoongArchLASXInstrInfo.td:767 |
| 1980 | XVFNMSUB_D = 1965, // LoongArchLASXInstrInfo.td:770 |
| 1981 | XVFNMSUB_S = 1966, // LoongArchLASXInstrInfo.td:769 |
| 1982 | XVFRECIPE_D = 1967, // LoongArchLASXInstrInfo.td:795 |
| 1983 | XVFRECIPE_S = 1968, // LoongArchLASXInstrInfo.td:794 |
| 1984 | XVFRECIP_D = 1969, // LoongArchLASXInstrInfo.td:791 |
| 1985 | XVFRECIP_S = 1970, // LoongArchLASXInstrInfo.td:790 |
| 1986 | XVFRINTRM_D = 1971, // LoongArchLASXInstrInfo.td:813 |
| 1987 | XVFRINTRM_S = 1972, // LoongArchLASXInstrInfo.td:812 |
| 1988 | XVFRINTRNE_D = 1973, // LoongArchLASXInstrInfo.td:807 |
| 1989 | XVFRINTRNE_S = 1974, // LoongArchLASXInstrInfo.td:806 |
| 1990 | XVFRINTRP_D = 1975, // LoongArchLASXInstrInfo.td:811 |
| 1991 | XVFRINTRP_S = 1976, // LoongArchLASXInstrInfo.td:810 |
| 1992 | XVFRINTRZ_D = 1977, // LoongArchLASXInstrInfo.td:809 |
| 1993 | XVFRINTRZ_S = 1978, // LoongArchLASXInstrInfo.td:808 |
| 1994 | XVFRINT_D = 1979, // LoongArchLASXInstrInfo.td:815 |
| 1995 | XVFRINT_S = 1980, // LoongArchLASXInstrInfo.td:814 |
| 1996 | XVFRSQRTE_D = 1981, // LoongArchLASXInstrInfo.td:797 |
| 1997 | XVFRSQRTE_S = 1982, // LoongArchLASXInstrInfo.td:796 |
| 1998 | XVFRSQRT_D = 1983, // LoongArchLASXInstrInfo.td:793 |
| 1999 | XVFRSQRT_S = 1984, // LoongArchLASXInstrInfo.td:792 |
| 2000 | XVFRSTPI_B = 1985, // LoongArchLASXInstrInfo.td:751 |
| 2001 | XVFRSTPI_H = 1986, // LoongArchLASXInstrInfo.td:752 |
| 2002 | XVFRSTP_B = 1987, // LoongArchLASXInstrInfo.td:749 |
| 2003 | XVFRSTP_H = 1988, // LoongArchLASXInstrInfo.td:750 |
| 2004 | XVFSQRT_D = 1989, // LoongArchLASXInstrInfo.td:789 |
| 2005 | XVFSQRT_S = 1990, // LoongArchLASXInstrInfo.td:788 |
| 2006 | XVFSUB_D = 1991, // LoongArchLASXInstrInfo.td:757 |
| 2007 | XVFSUB_S = 1992, // LoongArchLASXInstrInfo.td:756 |
| 2008 | XVFTINTH_L_S = 1993, // LoongArchLASXInstrInfo.td:847 |
| 2009 | XVFTINTL_L_S = 1994, // LoongArchLASXInstrInfo.td:846 |
| 2010 | XVFTINTRMH_L_S = 1995, // LoongArchLASXInstrInfo.td:845 |
| 2011 | XVFTINTRML_L_S = 1996, // LoongArchLASXInstrInfo.td:844 |
| 2012 | XVFTINTRM_L_D = 1997, // LoongArchLASXInstrInfo.td:824 |
| 2013 | XVFTINTRM_W_D = 1998, // LoongArchLASXInstrInfo.td:835 |
| 2014 | XVFTINTRM_W_S = 1999, // LoongArchLASXInstrInfo.td:823 |
| 2015 | XVFTINTRNEH_L_S = 2000, // LoongArchLASXInstrInfo.td:839 |
| 2016 | XVFTINTRNEL_L_S = 2001, // LoongArchLASXInstrInfo.td:838 |
| 2017 | XVFTINTRNE_L_D = 2002, // LoongArchLASXInstrInfo.td:818 |
| 2018 | XVFTINTRNE_W_D = 2003, // LoongArchLASXInstrInfo.td:832 |
| 2019 | XVFTINTRNE_W_S = 2004, // LoongArchLASXInstrInfo.td:817 |
| 2020 | XVFTINTRPH_L_S = 2005, // LoongArchLASXInstrInfo.td:843 |
| 2021 | XVFTINTRPL_L_S = 2006, // LoongArchLASXInstrInfo.td:842 |
| 2022 | XVFTINTRP_L_D = 2007, // LoongArchLASXInstrInfo.td:822 |
| 2023 | XVFTINTRP_W_D = 2008, // LoongArchLASXInstrInfo.td:834 |
| 2024 | XVFTINTRP_W_S = 2009, // LoongArchLASXInstrInfo.td:821 |
| 2025 | XVFTINTRZH_L_S = 2010, // LoongArchLASXInstrInfo.td:841 |
| 2026 | XVFTINTRZL_L_S = 2011, // LoongArchLASXInstrInfo.td:840 |
| 2027 | XVFTINTRZ_LU_D = 2012, // LoongArchLASXInstrInfo.td:828 |
| 2028 | XVFTINTRZ_L_D = 2013, // LoongArchLASXInstrInfo.td:820 |
| 2029 | XVFTINTRZ_WU_S = 2014, // LoongArchLASXInstrInfo.td:827 |
| 2030 | XVFTINTRZ_W_D = 2015, // LoongArchLASXInstrInfo.td:833 |
| 2031 | XVFTINTRZ_W_S = 2016, // LoongArchLASXInstrInfo.td:819 |
| 2032 | XVFTINT_LU_D = 2017, // LoongArchLASXInstrInfo.td:830 |
| 2033 | XVFTINT_L_D = 2018, // LoongArchLASXInstrInfo.td:826 |
| 2034 | XVFTINT_WU_S = 2019, // LoongArchLASXInstrInfo.td:829 |
| 2035 | XVFTINT_W_D = 2020, // LoongArchLASXInstrInfo.td:836 |
| 2036 | XVFTINT_W_S = 2021, // LoongArchLASXInstrInfo.td:825 |
| 2037 | XVHADDW_DU_WU = 2022, // LoongArchLASXInstrInfo.td:278 |
| 2038 | XVHADDW_D_W = 2023, // LoongArchLASXInstrInfo.td:274 |
| 2039 | XVHADDW_HU_BU = 2024, // LoongArchLASXInstrInfo.td:276 |
| 2040 | XVHADDW_H_B = 2025, // LoongArchLASXInstrInfo.td:272 |
| 2041 | XVHADDW_QU_DU = 2026, // LoongArchLASXInstrInfo.td:279 |
| 2042 | XVHADDW_Q_D = 2027, // LoongArchLASXInstrInfo.td:275 |
| 2043 | XVHADDW_WU_HU = 2028, // LoongArchLASXInstrInfo.td:277 |
| 2044 | XVHADDW_W_H = 2029, // LoongArchLASXInstrInfo.td:273 |
| 2045 | XVHSELI_D = 2030, // LoongArchLASXInstrInfo.td:523 |
| 2046 | XVHSUBW_DU_WU = 2031, // LoongArchLASXInstrInfo.td:287 |
| 2047 | XVHSUBW_D_W = 2032, // LoongArchLASXInstrInfo.td:283 |
| 2048 | XVHSUBW_HU_BU = 2033, // LoongArchLASXInstrInfo.td:285 |
| 2049 | XVHSUBW_H_B = 2034, // LoongArchLASXInstrInfo.td:281 |
| 2050 | XVHSUBW_QU_DU = 2035, // LoongArchLASXInstrInfo.td:288 |
| 2051 | XVHSUBW_Q_D = 2036, // LoongArchLASXInstrInfo.td:284 |
| 2052 | XVHSUBW_WU_HU = 2037, // LoongArchLASXInstrInfo.td:286 |
| 2053 | XVHSUBW_W_H = 2038, // LoongArchLASXInstrInfo.td:282 |
| 2054 | XVILVH_B = 2039, // LoongArchLASXInstrInfo.td:1023 |
| 2055 | XVILVH_D = 2040, // LoongArchLASXInstrInfo.td:1026 |
| 2056 | XVILVH_H = 2041, // LoongArchLASXInstrInfo.td:1024 |
| 2057 | XVILVH_W = 2042, // LoongArchLASXInstrInfo.td:1025 |
| 2058 | XVILVL_B = 2043, // LoongArchLASXInstrInfo.td:1019 |
| 2059 | XVILVL_D = 2044, // LoongArchLASXInstrInfo.td:1022 |
| 2060 | XVILVL_H = 2045, // LoongArchLASXInstrInfo.td:1020 |
| 2061 | XVILVL_W = 2046, // LoongArchLASXInstrInfo.td:1021 |
| 2062 | XVINSGR2VR_D = 2047, // LoongArchLASXInstrInfo.td:964 |
| 2063 | XVINSGR2VR_W = 2048, // LoongArchLASXInstrInfo.td:963 |
| 2064 | XVINSVE0_D = 2049, // LoongArchLASXInstrInfo.td:993 |
| 2065 | XVINSVE0_W = 2050, // LoongArchLASXInstrInfo.td:992 |
| 2066 | XVLD = 2051, // LoongArchLASXInstrInfo.td:1052 |
| 2067 | XVLDI = 2052, // LoongArchLASXInstrInfo.td:539 |
| 2068 | XVLDREPL_B = 2053, // LoongArchLASXInstrInfo.td:1055 |
| 2069 | XVLDREPL_D = 2054, // LoongArchLASXInstrInfo.td:1058 |
| 2070 | XVLDREPL_H = 2055, // LoongArchLASXInstrInfo.td:1056 |
| 2071 | XVLDREPL_W = 2056, // LoongArchLASXInstrInfo.td:1057 |
| 2072 | XVLDX = 2057, // LoongArchLASXInstrInfo.td:1053 |
| 2073 | XVMADDWEV_D_W = 2058, // LoongArchLASXInstrInfo.td:451 |
| 2074 | XVMADDWEV_D_WU = 2059, // LoongArchLASXInstrInfo.td:459 |
| 2075 | XVMADDWEV_D_WU_W = 2060, // LoongArchLASXInstrInfo.td:467 |
| 2076 | XVMADDWEV_H_B = 2061, // LoongArchLASXInstrInfo.td:449 |
| 2077 | XVMADDWEV_H_BU = 2062, // LoongArchLASXInstrInfo.td:457 |
| 2078 | XVMADDWEV_H_BU_B = 2063, // LoongArchLASXInstrInfo.td:465 |
| 2079 | XVMADDWEV_Q_D = 2064, // LoongArchLASXInstrInfo.td:452 |
| 2080 | XVMADDWEV_Q_DU = 2065, // LoongArchLASXInstrInfo.td:460 |
| 2081 | XVMADDWEV_Q_DU_D = 2066, // LoongArchLASXInstrInfo.td:468 |
| 2082 | XVMADDWEV_W_H = 2067, // LoongArchLASXInstrInfo.td:450 |
| 2083 | XVMADDWEV_W_HU = 2068, // LoongArchLASXInstrInfo.td:458 |
| 2084 | XVMADDWEV_W_HU_H = 2069, // LoongArchLASXInstrInfo.td:466 |
| 2085 | XVMADDWOD_D_W = 2070, // LoongArchLASXInstrInfo.td:455 |
| 2086 | XVMADDWOD_D_WU = 2071, // LoongArchLASXInstrInfo.td:463 |
| 2087 | XVMADDWOD_D_WU_W = 2072, // LoongArchLASXInstrInfo.td:471 |
| 2088 | XVMADDWOD_H_B = 2073, // LoongArchLASXInstrInfo.td:453 |
| 2089 | XVMADDWOD_H_BU = 2074, // LoongArchLASXInstrInfo.td:461 |
| 2090 | XVMADDWOD_H_BU_B = 2075, // LoongArchLASXInstrInfo.td:469 |
| 2091 | XVMADDWOD_Q_D = 2076, // LoongArchLASXInstrInfo.td:456 |
| 2092 | XVMADDWOD_Q_DU = 2077, // LoongArchLASXInstrInfo.td:464 |
| 2093 | XVMADDWOD_Q_DU_D = 2078, // LoongArchLASXInstrInfo.td:472 |
| 2094 | XVMADDWOD_W_H = 2079, // LoongArchLASXInstrInfo.td:454 |
| 2095 | XVMADDWOD_W_HU = 2080, // LoongArchLASXInstrInfo.td:462 |
| 2096 | XVMADDWOD_W_HU_H = 2081, // LoongArchLASXInstrInfo.td:470 |
| 2097 | XVMADD_B = 2082, // LoongArchLASXInstrInfo.td:439 |
| 2098 | XVMADD_D = 2083, // LoongArchLASXInstrInfo.td:442 |
| 2099 | XVMADD_H = 2084, // LoongArchLASXInstrInfo.td:440 |
| 2100 | XVMADD_W = 2085, // LoongArchLASXInstrInfo.td:441 |
| 2101 | XVMAXI_B = 2086, // LoongArchLASXInstrInfo.td:370 |
| 2102 | XVMAXI_BU = 2087, // LoongArchLASXInstrInfo.td:378 |
| 2103 | XVMAXI_D = 2088, // LoongArchLASXInstrInfo.td:373 |
| 2104 | XVMAXI_DU = 2089, // LoongArchLASXInstrInfo.td:381 |
| 2105 | XVMAXI_H = 2090, // LoongArchLASXInstrInfo.td:371 |
| 2106 | XVMAXI_HU = 2091, // LoongArchLASXInstrInfo.td:379 |
| 2107 | XVMAXI_W = 2092, // LoongArchLASXInstrInfo.td:372 |
| 2108 | XVMAXI_WU = 2093, // LoongArchLASXInstrInfo.td:380 |
| 2109 | XVMAX_B = 2094, // LoongArchLASXInstrInfo.td:366 |
| 2110 | XVMAX_BU = 2095, // LoongArchLASXInstrInfo.td:374 |
| 2111 | XVMAX_D = 2096, // LoongArchLASXInstrInfo.td:369 |
| 2112 | XVMAX_DU = 2097, // LoongArchLASXInstrInfo.td:377 |
| 2113 | XVMAX_H = 2098, // LoongArchLASXInstrInfo.td:367 |
| 2114 | XVMAX_HU = 2099, // LoongArchLASXInstrInfo.td:375 |
| 2115 | XVMAX_W = 2100, // LoongArchLASXInstrInfo.td:368 |
| 2116 | XVMAX_WU = 2101, // LoongArchLASXInstrInfo.td:376 |
| 2117 | XVMINI_B = 2102, // LoongArchLASXInstrInfo.td:387 |
| 2118 | XVMINI_BU = 2103, // LoongArchLASXInstrInfo.td:395 |
| 2119 | XVMINI_D = 2104, // LoongArchLASXInstrInfo.td:390 |
| 2120 | XVMINI_DU = 2105, // LoongArchLASXInstrInfo.td:398 |
| 2121 | XVMINI_H = 2106, // LoongArchLASXInstrInfo.td:388 |
| 2122 | XVMINI_HU = 2107, // LoongArchLASXInstrInfo.td:396 |
| 2123 | XVMINI_W = 2108, // LoongArchLASXInstrInfo.td:389 |
| 2124 | XVMINI_WU = 2109, // LoongArchLASXInstrInfo.td:397 |
| 2125 | XVMIN_B = 2110, // LoongArchLASXInstrInfo.td:383 |
| 2126 | XVMIN_BU = 2111, // LoongArchLASXInstrInfo.td:391 |
| 2127 | XVMIN_D = 2112, // LoongArchLASXInstrInfo.td:386 |
| 2128 | XVMIN_DU = 2113, // LoongArchLASXInstrInfo.td:394 |
| 2129 | XVMIN_H = 2114, // LoongArchLASXInstrInfo.td:384 |
| 2130 | XVMIN_HU = 2115, // LoongArchLASXInstrInfo.td:392 |
| 2131 | XVMIN_W = 2116, // LoongArchLASXInstrInfo.td:385 |
| 2132 | XVMIN_WU = 2117, // LoongArchLASXInstrInfo.td:393 |
| 2133 | XVMOD_B = 2118, // LoongArchLASXInstrInfo.td:483 |
| 2134 | XVMOD_BU = 2119, // LoongArchLASXInstrInfo.td:487 |
| 2135 | XVMOD_D = 2120, // LoongArchLASXInstrInfo.td:486 |
| 2136 | XVMOD_DU = 2121, // LoongArchLASXInstrInfo.td:490 |
| 2137 | XVMOD_H = 2122, // LoongArchLASXInstrInfo.td:484 |
| 2138 | XVMOD_HU = 2123, // LoongArchLASXInstrInfo.td:488 |
| 2139 | XVMOD_W = 2124, // LoongArchLASXInstrInfo.td:485 |
| 2140 | XVMOD_WU = 2125, // LoongArchLASXInstrInfo.td:489 |
| 2141 | XVMSKGEZ_B = 2126, // LoongArchLASXInstrInfo.td:535 |
| 2142 | XVMSKLTZ_B = 2127, // LoongArchLASXInstrInfo.td:530 |
| 2143 | XVMSKLTZ_D = 2128, // LoongArchLASXInstrInfo.td:533 |
| 2144 | XVMSKLTZ_H = 2129, // LoongArchLASXInstrInfo.td:531 |
| 2145 | XVMSKLTZ_W = 2130, // LoongArchLASXInstrInfo.td:532 |
| 2146 | XVMSKNZ_B = 2131, // LoongArchLASXInstrInfo.td:537 |
| 2147 | XVMSUB_B = 2132, // LoongArchLASXInstrInfo.td:444 |
| 2148 | XVMSUB_D = 2133, // LoongArchLASXInstrInfo.td:447 |
| 2149 | XVMSUB_H = 2134, // LoongArchLASXInstrInfo.td:445 |
| 2150 | XVMSUB_W = 2135, // LoongArchLASXInstrInfo.td:446 |
| 2151 | XVMUH_B = 2136, // LoongArchLASXInstrInfo.td:405 |
| 2152 | XVMUH_BU = 2137, // LoongArchLASXInstrInfo.td:409 |
| 2153 | XVMUH_D = 2138, // LoongArchLASXInstrInfo.td:408 |
| 2154 | XVMUH_DU = 2139, // LoongArchLASXInstrInfo.td:412 |
| 2155 | XVMUH_H = 2140, // LoongArchLASXInstrInfo.td:406 |
| 2156 | XVMUH_HU = 2141, // LoongArchLASXInstrInfo.td:410 |
| 2157 | XVMUH_W = 2142, // LoongArchLASXInstrInfo.td:407 |
| 2158 | XVMUH_WU = 2143, // LoongArchLASXInstrInfo.td:411 |
| 2159 | XVMULWEV_D_W = 2144, // LoongArchLASXInstrInfo.td:416 |
| 2160 | XVMULWEV_D_WU = 2145, // LoongArchLASXInstrInfo.td:424 |
| 2161 | XVMULWEV_D_WU_W = 2146, // LoongArchLASXInstrInfo.td:432 |
| 2162 | XVMULWEV_H_B = 2147, // LoongArchLASXInstrInfo.td:414 |
| 2163 | XVMULWEV_H_BU = 2148, // LoongArchLASXInstrInfo.td:422 |
| 2164 | XVMULWEV_H_BU_B = 2149, // LoongArchLASXInstrInfo.td:430 |
| 2165 | XVMULWEV_Q_D = 2150, // LoongArchLASXInstrInfo.td:417 |
| 2166 | XVMULWEV_Q_DU = 2151, // LoongArchLASXInstrInfo.td:425 |
| 2167 | XVMULWEV_Q_DU_D = 2152, // LoongArchLASXInstrInfo.td:433 |
| 2168 | XVMULWEV_W_H = 2153, // LoongArchLASXInstrInfo.td:415 |
| 2169 | XVMULWEV_W_HU = 2154, // LoongArchLASXInstrInfo.td:423 |
| 2170 | XVMULWEV_W_HU_H = 2155, // LoongArchLASXInstrInfo.td:431 |
| 2171 | XVMULWOD_D_W = 2156, // LoongArchLASXInstrInfo.td:420 |
| 2172 | XVMULWOD_D_WU = 2157, // LoongArchLASXInstrInfo.td:428 |
| 2173 | XVMULWOD_D_WU_W = 2158, // LoongArchLASXInstrInfo.td:436 |
| 2174 | XVMULWOD_H_B = 2159, // LoongArchLASXInstrInfo.td:418 |
| 2175 | XVMULWOD_H_BU = 2160, // LoongArchLASXInstrInfo.td:426 |
| 2176 | XVMULWOD_H_BU_B = 2161, // LoongArchLASXInstrInfo.td:434 |
| 2177 | XVMULWOD_Q_D = 2162, // LoongArchLASXInstrInfo.td:421 |
| 2178 | XVMULWOD_Q_DU = 2163, // LoongArchLASXInstrInfo.td:429 |
| 2179 | XVMULWOD_Q_DU_D = 2164, // LoongArchLASXInstrInfo.td:437 |
| 2180 | XVMULWOD_W_H = 2165, // LoongArchLASXInstrInfo.td:419 |
| 2181 | XVMULWOD_W_HU = 2166, // LoongArchLASXInstrInfo.td:427 |
| 2182 | XVMULWOD_W_HU_H = 2167, // LoongArchLASXInstrInfo.td:435 |
| 2183 | XVMUL_B = 2168, // LoongArchLASXInstrInfo.td:400 |
| 2184 | XVMUL_D = 2169, // LoongArchLASXInstrInfo.td:403 |
| 2185 | XVMUL_H = 2170, // LoongArchLASXInstrInfo.td:401 |
| 2186 | XVMUL_W = 2171, // LoongArchLASXInstrInfo.td:402 |
| 2187 | XVNEG_B = 2172, // LoongArchLASXInstrInfo.td:249 |
| 2188 | XVNEG_D = 2173, // LoongArchLASXInstrInfo.td:252 |
| 2189 | XVNEG_H = 2174, // LoongArchLASXInstrInfo.td:250 |
| 2190 | XVNEG_W = 2175, // LoongArchLASXInstrInfo.td:251 |
| 2191 | XVNORI_B = 2176, // LoongArchLASXInstrInfo.td:551 |
| 2192 | XVNOR_V = 2177, // LoongArchLASXInstrInfo.td:544 |
| 2193 | XVORI_B = 2178, // LoongArchLASXInstrInfo.td:549 |
| 2194 | XVORN_V = 2179, // LoongArchLASXInstrInfo.td:546 |
| 2195 | XVOR_V = 2180, // LoongArchLASXInstrInfo.td:542 |
| 2196 | XVPACKEV_B = 2181, // LoongArchLASXInstrInfo.td:1001 |
| 2197 | XVPACKEV_D = 2182, // LoongArchLASXInstrInfo.td:1004 |
| 2198 | XVPACKEV_H = 2183, // LoongArchLASXInstrInfo.td:1002 |
| 2199 | XVPACKEV_W = 2184, // LoongArchLASXInstrInfo.td:1003 |
| 2200 | XVPACKOD_B = 2185, // LoongArchLASXInstrInfo.td:1005 |
| 2201 | XVPACKOD_D = 2186, // LoongArchLASXInstrInfo.td:1008 |
| 2202 | XVPACKOD_H = 2187, // LoongArchLASXInstrInfo.td:1006 |
| 2203 | XVPACKOD_W = 2188, // LoongArchLASXInstrInfo.td:1007 |
| 2204 | XVPCNT_B = 2189, // LoongArchLASXInstrInfo.td:717 |
| 2205 | XVPCNT_D = 2190, // LoongArchLASXInstrInfo.td:720 |
| 2206 | XVPCNT_H = 2191, // LoongArchLASXInstrInfo.td:718 |
| 2207 | XVPCNT_W = 2192, // LoongArchLASXInstrInfo.td:719 |
| 2208 | XVPERMI_D = 2193, // LoongArchLASXInstrInfo.td:1042 |
| 2209 | XVPERMI_Q = 2194, // LoongArchLASXInstrInfo.td:1043 |
| 2210 | XVPERMI_W = 2195, // LoongArchLASXInstrInfo.td:1041 |
| 2211 | XVPERM_W = 2196, // LoongArchLASXInstrInfo.td:1034 |
| 2212 | XVPICKEV_B = 2197, // LoongArchLASXInstrInfo.td:1010 |
| 2213 | XVPICKEV_D = 2198, // LoongArchLASXInstrInfo.td:1013 |
| 2214 | XVPICKEV_H = 2199, // LoongArchLASXInstrInfo.td:1011 |
| 2215 | XVPICKEV_W = 2200, // LoongArchLASXInstrInfo.td:1012 |
| 2216 | XVPICKOD_B = 2201, // LoongArchLASXInstrInfo.td:1014 |
| 2217 | XVPICKOD_D = 2202, // LoongArchLASXInstrInfo.td:1017 |
| 2218 | XVPICKOD_H = 2203, // LoongArchLASXInstrInfo.td:1015 |
| 2219 | XVPICKOD_W = 2204, // LoongArchLASXInstrInfo.td:1016 |
| 2220 | XVPICKVE2GR_D = 2205, // LoongArchLASXInstrInfo.td:966 |
| 2221 | XVPICKVE2GR_DU = 2206, // LoongArchLASXInstrInfo.td:968 |
| 2222 | XVPICKVE2GR_W = 2207, // LoongArchLASXInstrInfo.td:965 |
| 2223 | XVPICKVE2GR_WU = 2208, // LoongArchLASXInstrInfo.td:967 |
| 2224 | XVPICKVE_D = 2209, // LoongArchLASXInstrInfo.td:996 |
| 2225 | XVPICKVE_W = 2210, // LoongArchLASXInstrInfo.td:995 |
| 2226 | XVREPL128VEI_B = 2211, // LoongArchLASXInstrInfo.td:981 |
| 2227 | XVREPL128VEI_D = 2212, // LoongArchLASXInstrInfo.td:984 |
| 2228 | XVREPL128VEI_H = 2213, // LoongArchLASXInstrInfo.td:982 |
| 2229 | XVREPL128VEI_W = 2214, // LoongArchLASXInstrInfo.td:983 |
| 2230 | XVREPLGR2VR_B = 2215, // LoongArchLASXInstrInfo.td:971 |
| 2231 | XVREPLGR2VR_D = 2216, // LoongArchLASXInstrInfo.td:974 |
| 2232 | XVREPLGR2VR_H = 2217, // LoongArchLASXInstrInfo.td:972 |
| 2233 | XVREPLGR2VR_W = 2218, // LoongArchLASXInstrInfo.td:973 |
| 2234 | XVREPLVE0_B = 2219, // LoongArchLASXInstrInfo.td:986 |
| 2235 | XVREPLVE0_D = 2220, // LoongArchLASXInstrInfo.td:989 |
| 2236 | XVREPLVE0_H = 2221, // LoongArchLASXInstrInfo.td:987 |
| 2237 | XVREPLVE0_Q = 2222, // LoongArchLASXInstrInfo.td:990 |
| 2238 | XVREPLVE0_W = 2223, // LoongArchLASXInstrInfo.td:988 |
| 2239 | XVREPLVE_B = 2224, // LoongArchLASXInstrInfo.td:977 |
| 2240 | XVREPLVE_D = 2225, // LoongArchLASXInstrInfo.td:980 |
| 2241 | XVREPLVE_H = 2226, // LoongArchLASXInstrInfo.td:978 |
| 2242 | XVREPLVE_W = 2227, // LoongArchLASXInstrInfo.td:979 |
| 2243 | XVROTRI_B = 2228, // LoongArchLASXInstrInfo.td:584 |
| 2244 | XVROTRI_D = 2229, // LoongArchLASXInstrInfo.td:587 |
| 2245 | XVROTRI_H = 2230, // LoongArchLASXInstrInfo.td:585 |
| 2246 | XVROTRI_W = 2231, // LoongArchLASXInstrInfo.td:586 |
| 2247 | XVROTR_B = 2232, // LoongArchLASXInstrInfo.td:580 |
| 2248 | XVROTR_D = 2233, // LoongArchLASXInstrInfo.td:583 |
| 2249 | XVROTR_H = 2234, // LoongArchLASXInstrInfo.td:581 |
| 2250 | XVROTR_W = 2235, // LoongArchLASXInstrInfo.td:582 |
| 2251 | XVSADD_B = 2236, // LoongArchLASXInstrInfo.td:254 |
| 2252 | XVSADD_BU = 2237, // LoongArchLASXInstrInfo.td:258 |
| 2253 | XVSADD_D = 2238, // LoongArchLASXInstrInfo.td:257 |
| 2254 | XVSADD_DU = 2239, // LoongArchLASXInstrInfo.td:261 |
| 2255 | XVSADD_H = 2240, // LoongArchLASXInstrInfo.td:255 |
| 2256 | XVSADD_HU = 2241, // LoongArchLASXInstrInfo.td:259 |
| 2257 | XVSADD_W = 2242, // LoongArchLASXInstrInfo.td:256 |
| 2258 | XVSADD_WU = 2243, // LoongArchLASXInstrInfo.td:260 |
| 2259 | XVSAT_B = 2244, // LoongArchLASXInstrInfo.td:492 |
| 2260 | XVSAT_BU = 2245, // LoongArchLASXInstrInfo.td:496 |
| 2261 | XVSAT_D = 2246, // LoongArchLASXInstrInfo.td:495 |
| 2262 | XVSAT_DU = 2247, // LoongArchLASXInstrInfo.td:499 |
| 2263 | XVSAT_H = 2248, // LoongArchLASXInstrInfo.td:493 |
| 2264 | XVSAT_HU = 2249, // LoongArchLASXInstrInfo.td:497 |
| 2265 | XVSAT_W = 2250, // LoongArchLASXInstrInfo.td:494 |
| 2266 | XVSAT_WU = 2251, // LoongArchLASXInstrInfo.td:498 |
| 2267 | XVSEQI_B = 2252, // LoongArchLASXInstrInfo.td:861 |
| 2268 | XVSEQI_D = 2253, // LoongArchLASXInstrInfo.td:864 |
| 2269 | XVSEQI_H = 2254, // LoongArchLASXInstrInfo.td:862 |
| 2270 | XVSEQI_W = 2255, // LoongArchLASXInstrInfo.td:863 |
| 2271 | XVSEQ_B = 2256, // LoongArchLASXInstrInfo.td:857 |
| 2272 | XVSEQ_D = 2257, // LoongArchLASXInstrInfo.td:860 |
| 2273 | XVSEQ_H = 2258, // LoongArchLASXInstrInfo.td:858 |
| 2274 | XVSEQ_W = 2259, // LoongArchLASXInstrInfo.td:859 |
| 2275 | XVSETALLNEZ_B = 2260, // LoongArchLASXInstrInfo.td:958 |
| 2276 | XVSETALLNEZ_D = 2261, // LoongArchLASXInstrInfo.td:961 |
| 2277 | XVSETALLNEZ_H = 2262, // LoongArchLASXInstrInfo.td:959 |
| 2278 | XVSETALLNEZ_W = 2263, // LoongArchLASXInstrInfo.td:960 |
| 2279 | XVSETANYEQZ_B = 2264, // LoongArchLASXInstrInfo.td:954 |
| 2280 | XVSETANYEQZ_D = 2265, // LoongArchLASXInstrInfo.td:957 |
| 2281 | XVSETANYEQZ_H = 2266, // LoongArchLASXInstrInfo.td:955 |
| 2282 | XVSETANYEQZ_W = 2267, // LoongArchLASXInstrInfo.td:956 |
| 2283 | XVSETEQZ_V = 2268, // LoongArchLASXInstrInfo.td:952 |
| 2284 | XVSETNEZ_V = 2269, // LoongArchLASXInstrInfo.td:953 |
| 2285 | XVSHUF4I_B = 2270, // LoongArchLASXInstrInfo.td:1036 |
| 2286 | XVSHUF4I_D = 2271, // LoongArchLASXInstrInfo.td:1039 |
| 2287 | XVSHUF4I_H = 2272, // LoongArchLASXInstrInfo.td:1037 |
| 2288 | XVSHUF4I_W = 2273, // LoongArchLASXInstrInfo.td:1038 |
| 2289 | XVSHUF_B = 2274, // LoongArchLASXInstrInfo.td:1028 |
| 2290 | XVSHUF_D = 2275, // LoongArchLASXInstrInfo.td:1032 |
| 2291 | XVSHUF_H = 2276, // LoongArchLASXInstrInfo.td:1030 |
| 2292 | XVSHUF_W = 2277, // LoongArchLASXInstrInfo.td:1031 |
| 2293 | XVSIGNCOV_B = 2278, // LoongArchLASXInstrInfo.td:525 |
| 2294 | XVSIGNCOV_D = 2279, // LoongArchLASXInstrInfo.td:528 |
| 2295 | XVSIGNCOV_H = 2280, // LoongArchLASXInstrInfo.td:526 |
| 2296 | XVSIGNCOV_W = 2281, // LoongArchLASXInstrInfo.td:527 |
| 2297 | XVSLEI_B = 2282, // LoongArchLASXInstrInfo.td:870 |
| 2298 | XVSLEI_BU = 2283, // LoongArchLASXInstrInfo.td:879 |
| 2299 | XVSLEI_D = 2284, // LoongArchLASXInstrInfo.td:873 |
| 2300 | XVSLEI_DU = 2285, // LoongArchLASXInstrInfo.td:882 |
| 2301 | XVSLEI_H = 2286, // LoongArchLASXInstrInfo.td:871 |
| 2302 | XVSLEI_HU = 2287, // LoongArchLASXInstrInfo.td:880 |
| 2303 | XVSLEI_W = 2288, // LoongArchLASXInstrInfo.td:872 |
| 2304 | XVSLEI_WU = 2289, // LoongArchLASXInstrInfo.td:881 |
| 2305 | XVSLE_B = 2290, // LoongArchLASXInstrInfo.td:866 |
| 2306 | XVSLE_BU = 2291, // LoongArchLASXInstrInfo.td:875 |
| 2307 | XVSLE_D = 2292, // LoongArchLASXInstrInfo.td:869 |
| 2308 | XVSLE_DU = 2293, // LoongArchLASXInstrInfo.td:878 |
| 2309 | XVSLE_H = 2294, // LoongArchLASXInstrInfo.td:867 |
| 2310 | XVSLE_HU = 2295, // LoongArchLASXInstrInfo.td:876 |
| 2311 | XVSLE_W = 2296, // LoongArchLASXInstrInfo.td:868 |
| 2312 | XVSLE_WU = 2297, // LoongArchLASXInstrInfo.td:877 |
| 2313 | XVSLLI_B = 2298, // LoongArchLASXInstrInfo.td:557 |
| 2314 | XVSLLI_D = 2299, // LoongArchLASXInstrInfo.td:560 |
| 2315 | XVSLLI_H = 2300, // LoongArchLASXInstrInfo.td:558 |
| 2316 | XVSLLI_W = 2301, // LoongArchLASXInstrInfo.td:559 |
| 2317 | XVSLLWIL_DU_WU = 2302, // LoongArchLASXInstrInfo.td:595 |
| 2318 | XVSLLWIL_D_W = 2303, // LoongArchLASXInstrInfo.td:591 |
| 2319 | XVSLLWIL_HU_BU = 2304, // LoongArchLASXInstrInfo.td:593 |
| 2320 | XVSLLWIL_H_B = 2305, // LoongArchLASXInstrInfo.td:589 |
| 2321 | XVSLLWIL_WU_HU = 2306, // LoongArchLASXInstrInfo.td:594 |
| 2322 | XVSLLWIL_W_H = 2307, // LoongArchLASXInstrInfo.td:590 |
| 2323 | XVSLL_B = 2308, // LoongArchLASXInstrInfo.td:553 |
| 2324 | XVSLL_D = 2309, // LoongArchLASXInstrInfo.td:556 |
| 2325 | XVSLL_H = 2310, // LoongArchLASXInstrInfo.td:554 |
| 2326 | XVSLL_W = 2311, // LoongArchLASXInstrInfo.td:555 |
| 2327 | XVSLTI_B = 2312, // LoongArchLASXInstrInfo.td:888 |
| 2328 | XVSLTI_BU = 2313, // LoongArchLASXInstrInfo.td:897 |
| 2329 | XVSLTI_D = 2314, // LoongArchLASXInstrInfo.td:891 |
| 2330 | XVSLTI_DU = 2315, // LoongArchLASXInstrInfo.td:900 |
| 2331 | XVSLTI_H = 2316, // LoongArchLASXInstrInfo.td:889 |
| 2332 | XVSLTI_HU = 2317, // LoongArchLASXInstrInfo.td:898 |
| 2333 | XVSLTI_W = 2318, // LoongArchLASXInstrInfo.td:890 |
| 2334 | XVSLTI_WU = 2319, // LoongArchLASXInstrInfo.td:899 |
| 2335 | XVSLT_B = 2320, // LoongArchLASXInstrInfo.td:884 |
| 2336 | XVSLT_BU = 2321, // LoongArchLASXInstrInfo.td:893 |
| 2337 | XVSLT_D = 2322, // LoongArchLASXInstrInfo.td:887 |
| 2338 | XVSLT_DU = 2323, // LoongArchLASXInstrInfo.td:896 |
| 2339 | XVSLT_H = 2324, // LoongArchLASXInstrInfo.td:885 |
| 2340 | XVSLT_HU = 2325, // LoongArchLASXInstrInfo.td:894 |
| 2341 | XVSLT_W = 2326, // LoongArchLASXInstrInfo.td:886 |
| 2342 | XVSLT_WU = 2327, // LoongArchLASXInstrInfo.td:895 |
| 2343 | XVSRAI_B = 2328, // LoongArchLASXInstrInfo.td:575 |
| 2344 | XVSRAI_D = 2329, // LoongArchLASXInstrInfo.td:578 |
| 2345 | XVSRAI_H = 2330, // LoongArchLASXInstrInfo.td:576 |
| 2346 | XVSRAI_W = 2331, // LoongArchLASXInstrInfo.td:577 |
| 2347 | XVSRANI_B_H = 2332, // LoongArchLASXInstrInfo.td:627 |
| 2348 | XVSRANI_D_Q = 2333, // LoongArchLASXInstrInfo.td:630 |
| 2349 | XVSRANI_H_W = 2334, // LoongArchLASXInstrInfo.td:628 |
| 2350 | XVSRANI_W_D = 2335, // LoongArchLASXInstrInfo.td:629 |
| 2351 | XVSRAN_B_H = 2336, // LoongArchLASXInstrInfo.td:619 |
| 2352 | XVSRAN_H_W = 2337, // LoongArchLASXInstrInfo.td:620 |
| 2353 | XVSRAN_W_D = 2338, // LoongArchLASXInstrInfo.td:621 |
| 2354 | XVSRARI_B = 2339, // LoongArchLASXInstrInfo.td:611 |
| 2355 | XVSRARI_D = 2340, // LoongArchLASXInstrInfo.td:614 |
| 2356 | XVSRARI_H = 2341, // LoongArchLASXInstrInfo.td:612 |
| 2357 | XVSRARI_W = 2342, // LoongArchLASXInstrInfo.td:613 |
| 2358 | XVSRARNI_B_H = 2343, // LoongArchLASXInstrInfo.td:643 |
| 2359 | XVSRARNI_D_Q = 2344, // LoongArchLASXInstrInfo.td:646 |
| 2360 | XVSRARNI_H_W = 2345, // LoongArchLASXInstrInfo.td:644 |
| 2361 | XVSRARNI_W_D = 2346, // LoongArchLASXInstrInfo.td:645 |
| 2362 | XVSRARN_B_H = 2347, // LoongArchLASXInstrInfo.td:635 |
| 2363 | XVSRARN_H_W = 2348, // LoongArchLASXInstrInfo.td:636 |
| 2364 | XVSRARN_W_D = 2349, // LoongArchLASXInstrInfo.td:637 |
| 2365 | XVSRAR_B = 2350, // LoongArchLASXInstrInfo.td:607 |
| 2366 | XVSRAR_D = 2351, // LoongArchLASXInstrInfo.td:610 |
| 2367 | XVSRAR_H = 2352, // LoongArchLASXInstrInfo.td:608 |
| 2368 | XVSRAR_W = 2353, // LoongArchLASXInstrInfo.td:609 |
| 2369 | XVSRA_B = 2354, // LoongArchLASXInstrInfo.td:571 |
| 2370 | XVSRA_D = 2355, // LoongArchLASXInstrInfo.td:574 |
| 2371 | XVSRA_H = 2356, // LoongArchLASXInstrInfo.td:572 |
| 2372 | XVSRA_W = 2357, // LoongArchLASXInstrInfo.td:573 |
| 2373 | XVSRLI_B = 2358, // LoongArchLASXInstrInfo.td:566 |
| 2374 | XVSRLI_D = 2359, // LoongArchLASXInstrInfo.td:569 |
| 2375 | XVSRLI_H = 2360, // LoongArchLASXInstrInfo.td:567 |
| 2376 | XVSRLI_W = 2361, // LoongArchLASXInstrInfo.td:568 |
| 2377 | XVSRLNI_B_H = 2362, // LoongArchLASXInstrInfo.td:623 |
| 2378 | XVSRLNI_D_Q = 2363, // LoongArchLASXInstrInfo.td:626 |
| 2379 | XVSRLNI_H_W = 2364, // LoongArchLASXInstrInfo.td:624 |
| 2380 | XVSRLNI_W_D = 2365, // LoongArchLASXInstrInfo.td:625 |
| 2381 | XVSRLN_B_H = 2366, // LoongArchLASXInstrInfo.td:616 |
| 2382 | XVSRLN_H_W = 2367, // LoongArchLASXInstrInfo.td:617 |
| 2383 | XVSRLN_W_D = 2368, // LoongArchLASXInstrInfo.td:618 |
| 2384 | XVSRLRI_B = 2369, // LoongArchLASXInstrInfo.td:602 |
| 2385 | XVSRLRI_D = 2370, // LoongArchLASXInstrInfo.td:605 |
| 2386 | XVSRLRI_H = 2371, // LoongArchLASXInstrInfo.td:603 |
| 2387 | XVSRLRI_W = 2372, // LoongArchLASXInstrInfo.td:604 |
| 2388 | XVSRLRNI_B_H = 2373, // LoongArchLASXInstrInfo.td:639 |
| 2389 | XVSRLRNI_D_Q = 2374, // LoongArchLASXInstrInfo.td:642 |
| 2390 | XVSRLRNI_H_W = 2375, // LoongArchLASXInstrInfo.td:640 |
| 2391 | XVSRLRNI_W_D = 2376, // LoongArchLASXInstrInfo.td:641 |
| 2392 | XVSRLRN_B_H = 2377, // LoongArchLASXInstrInfo.td:632 |
| 2393 | XVSRLRN_H_W = 2378, // LoongArchLASXInstrInfo.td:633 |
| 2394 | XVSRLRN_W_D = 2379, // LoongArchLASXInstrInfo.td:634 |
| 2395 | XVSRLR_B = 2380, // LoongArchLASXInstrInfo.td:598 |
| 2396 | XVSRLR_D = 2381, // LoongArchLASXInstrInfo.td:601 |
| 2397 | XVSRLR_H = 2382, // LoongArchLASXInstrInfo.td:599 |
| 2398 | XVSRLR_W = 2383, // LoongArchLASXInstrInfo.td:600 |
| 2399 | XVSRL_B = 2384, // LoongArchLASXInstrInfo.td:562 |
| 2400 | XVSRL_D = 2385, // LoongArchLASXInstrInfo.td:565 |
| 2401 | XVSRL_H = 2386, // LoongArchLASXInstrInfo.td:563 |
| 2402 | XVSRL_W = 2387, // LoongArchLASXInstrInfo.td:564 |
| 2403 | XVSSRANI_BU_H = 2388, // LoongArchLASXInstrInfo.td:673 |
| 2404 | XVSSRANI_B_H = 2389, // LoongArchLASXInstrInfo.td:665 |
| 2405 | XVSSRANI_DU_Q = 2390, // LoongArchLASXInstrInfo.td:676 |
| 2406 | XVSSRANI_D_Q = 2391, // LoongArchLASXInstrInfo.td:668 |
| 2407 | XVSSRANI_HU_W = 2392, // LoongArchLASXInstrInfo.td:674 |
| 2408 | XVSSRANI_H_W = 2393, // LoongArchLASXInstrInfo.td:666 |
| 2409 | XVSSRANI_WU_D = 2394, // LoongArchLASXInstrInfo.td:675 |
| 2410 | XVSSRANI_W_D = 2395, // LoongArchLASXInstrInfo.td:667 |
| 2411 | XVSSRAN_BU_H = 2396, // LoongArchLASXInstrInfo.td:657 |
| 2412 | XVSSRAN_B_H = 2397, // LoongArchLASXInstrInfo.td:651 |
| 2413 | XVSSRAN_HU_W = 2398, // LoongArchLASXInstrInfo.td:658 |
| 2414 | XVSSRAN_H_W = 2399, // LoongArchLASXInstrInfo.td:652 |
| 2415 | XVSSRAN_WU_D = 2400, // LoongArchLASXInstrInfo.td:659 |
| 2416 | XVSSRAN_W_D = 2401, // LoongArchLASXInstrInfo.td:653 |
| 2417 | XVSSRARNI_BU_H = 2402, // LoongArchLASXInstrInfo.td:703 |
| 2418 | XVSSRARNI_B_H = 2403, // LoongArchLASXInstrInfo.td:695 |
| 2419 | XVSSRARNI_DU_Q = 2404, // LoongArchLASXInstrInfo.td:706 |
| 2420 | XVSSRARNI_D_Q = 2405, // LoongArchLASXInstrInfo.td:698 |
| 2421 | XVSSRARNI_HU_W = 2406, // LoongArchLASXInstrInfo.td:704 |
| 2422 | XVSSRARNI_H_W = 2407, // LoongArchLASXInstrInfo.td:696 |
| 2423 | XVSSRARNI_WU_D = 2408, // LoongArchLASXInstrInfo.td:705 |
| 2424 | XVSSRARNI_W_D = 2409, // LoongArchLASXInstrInfo.td:697 |
| 2425 | XVSSRARN_BU_H = 2410, // LoongArchLASXInstrInfo.td:687 |
| 2426 | XVSSRARN_B_H = 2411, // LoongArchLASXInstrInfo.td:681 |
| 2427 | XVSSRARN_HU_W = 2412, // LoongArchLASXInstrInfo.td:688 |
| 2428 | XVSSRARN_H_W = 2413, // LoongArchLASXInstrInfo.td:682 |
| 2429 | XVSSRARN_WU_D = 2414, // LoongArchLASXInstrInfo.td:689 |
| 2430 | XVSSRARN_W_D = 2415, // LoongArchLASXInstrInfo.td:683 |
| 2431 | XVSSRLNI_BU_H = 2416, // LoongArchLASXInstrInfo.td:669 |
| 2432 | XVSSRLNI_B_H = 2417, // LoongArchLASXInstrInfo.td:661 |
| 2433 | XVSSRLNI_DU_Q = 2418, // LoongArchLASXInstrInfo.td:672 |
| 2434 | XVSSRLNI_D_Q = 2419, // LoongArchLASXInstrInfo.td:664 |
| 2435 | XVSSRLNI_HU_W = 2420, // LoongArchLASXInstrInfo.td:670 |
| 2436 | XVSSRLNI_H_W = 2421, // LoongArchLASXInstrInfo.td:662 |
| 2437 | XVSSRLNI_WU_D = 2422, // LoongArchLASXInstrInfo.td:671 |
| 2438 | XVSSRLNI_W_D = 2423, // LoongArchLASXInstrInfo.td:663 |
| 2439 | XVSSRLN_BU_H = 2424, // LoongArchLASXInstrInfo.td:654 |
| 2440 | XVSSRLN_B_H = 2425, // LoongArchLASXInstrInfo.td:648 |
| 2441 | XVSSRLN_HU_W = 2426, // LoongArchLASXInstrInfo.td:655 |
| 2442 | XVSSRLN_H_W = 2427, // LoongArchLASXInstrInfo.td:649 |
| 2443 | XVSSRLN_WU_D = 2428, // LoongArchLASXInstrInfo.td:656 |
| 2444 | XVSSRLN_W_D = 2429, // LoongArchLASXInstrInfo.td:650 |
| 2445 | XVSSRLRNI_BU_H = 2430, // LoongArchLASXInstrInfo.td:699 |
| 2446 | XVSSRLRNI_B_H = 2431, // LoongArchLASXInstrInfo.td:691 |
| 2447 | XVSSRLRNI_DU_Q = 2432, // LoongArchLASXInstrInfo.td:702 |
| 2448 | XVSSRLRNI_D_Q = 2433, // LoongArchLASXInstrInfo.td:694 |
| 2449 | XVSSRLRNI_HU_W = 2434, // LoongArchLASXInstrInfo.td:700 |
| 2450 | XVSSRLRNI_H_W = 2435, // LoongArchLASXInstrInfo.td:692 |
| 2451 | XVSSRLRNI_WU_D = 2436, // LoongArchLASXInstrInfo.td:701 |
| 2452 | XVSSRLRNI_W_D = 2437, // LoongArchLASXInstrInfo.td:693 |
| 2453 | XVSSRLRN_BU_H = 2438, // LoongArchLASXInstrInfo.td:684 |
| 2454 | XVSSRLRN_B_H = 2439, // LoongArchLASXInstrInfo.td:678 |
| 2455 | XVSSRLRN_HU_W = 2440, // LoongArchLASXInstrInfo.td:685 |
| 2456 | XVSSRLRN_H_W = 2441, // LoongArchLASXInstrInfo.td:679 |
| 2457 | XVSSRLRN_WU_D = 2442, // LoongArchLASXInstrInfo.td:686 |
| 2458 | XVSSRLRN_W_D = 2443, // LoongArchLASXInstrInfo.td:680 |
| 2459 | XVSSUB_B = 2444, // LoongArchLASXInstrInfo.td:263 |
| 2460 | XVSSUB_BU = 2445, // LoongArchLASXInstrInfo.td:267 |
| 2461 | XVSSUB_D = 2446, // LoongArchLASXInstrInfo.td:266 |
| 2462 | XVSSUB_DU = 2447, // LoongArchLASXInstrInfo.td:270 |
| 2463 | XVSSUB_H = 2448, // LoongArchLASXInstrInfo.td:264 |
| 2464 | XVSSUB_HU = 2449, // LoongArchLASXInstrInfo.td:268 |
| 2465 | XVSSUB_W = 2450, // LoongArchLASXInstrInfo.td:265 |
| 2466 | XVSSUB_WU = 2451, // LoongArchLASXInstrInfo.td:269 |
| 2467 | XVST = 2452, // LoongArchLASXInstrInfo.td:1062 |
| 2468 | XVSTELM_B = 2453, // LoongArchLASXInstrInfo.td:1065 |
| 2469 | XVSTELM_D = 2454, // LoongArchLASXInstrInfo.td:1068 |
| 2470 | XVSTELM_H = 2455, // LoongArchLASXInstrInfo.td:1066 |
| 2471 | XVSTELM_W = 2456, // LoongArchLASXInstrInfo.td:1067 |
| 2472 | XVSTX = 2457, // LoongArchLASXInstrInfo.td:1063 |
| 2473 | XVSUBI_BU = 2458, // LoongArchLASXInstrInfo.td:244 |
| 2474 | XVSUBI_DU = 2459, // LoongArchLASXInstrInfo.td:247 |
| 2475 | XVSUBI_HU = 2460, // LoongArchLASXInstrInfo.td:245 |
| 2476 | XVSUBI_WU = 2461, // LoongArchLASXInstrInfo.td:246 |
| 2477 | XVSUBWEV_D_W = 2462, // LoongArchLASXInstrInfo.td:301 |
| 2478 | XVSUBWEV_D_WU = 2463, // LoongArchLASXInstrInfo.td:319 |
| 2479 | XVSUBWEV_H_B = 2464, // LoongArchLASXInstrInfo.td:299 |
| 2480 | XVSUBWEV_H_BU = 2465, // LoongArchLASXInstrInfo.td:317 |
| 2481 | XVSUBWEV_Q_D = 2466, // LoongArchLASXInstrInfo.td:302 |
| 2482 | XVSUBWEV_Q_DU = 2467, // LoongArchLASXInstrInfo.td:320 |
| 2483 | XVSUBWEV_W_H = 2468, // LoongArchLASXInstrInfo.td:300 |
| 2484 | XVSUBWEV_W_HU = 2469, // LoongArchLASXInstrInfo.td:318 |
| 2485 | XVSUBWOD_D_W = 2470, // LoongArchLASXInstrInfo.td:305 |
| 2486 | XVSUBWOD_D_WU = 2471, // LoongArchLASXInstrInfo.td:323 |
| 2487 | XVSUBWOD_H_B = 2472, // LoongArchLASXInstrInfo.td:303 |
| 2488 | XVSUBWOD_H_BU = 2473, // LoongArchLASXInstrInfo.td:321 |
| 2489 | XVSUBWOD_Q_D = 2474, // LoongArchLASXInstrInfo.td:306 |
| 2490 | XVSUBWOD_Q_DU = 2475, // LoongArchLASXInstrInfo.td:324 |
| 2491 | XVSUBWOD_W_H = 2476, // LoongArchLASXInstrInfo.td:304 |
| 2492 | XVSUBWOD_W_HU = 2477, // LoongArchLASXInstrInfo.td:322 |
| 2493 | XVSUB_B = 2478, // LoongArchLASXInstrInfo.td:233 |
| 2494 | XVSUB_D = 2479, // LoongArchLASXInstrInfo.td:236 |
| 2495 | XVSUB_H = 2480, // LoongArchLASXInstrInfo.td:234 |
| 2496 | XVSUB_Q = 2481, // LoongArchLASXInstrInfo.td:237 |
| 2497 | XVSUB_W = 2482, // LoongArchLASXInstrInfo.td:235 |
| 2498 | XVXORI_B = 2483, // LoongArchLASXInstrInfo.td:550 |
| 2499 | XVXOR_V = 2484, // LoongArchLASXInstrInfo.td:543 |
| 2500 | INSTRUCTION_LIST_END = 2485 |
| 2501 | }; |
| 2502 | |
| 2503 | } // namespace llvm::LoongArch |
| 2504 | |
| 2505 | #endif // GET_INSTRINFO_ENUM |
| 2506 | |
| 2507 | #ifdef GET_INSTRINFO_SCHED_ENUM |
| 2508 | #undef GET_INSTRINFO_SCHED_ENUM |
| 2509 | |
| 2510 | namespace llvm::LoongArch::Sched { |
| 2511 | |
| 2512 | enum { |
| 2513 | NoInstrModel = 0, |
| 2514 | SCHED_LIST_END = 1 |
| 2515 | }; |
| 2516 | |
| 2517 | } // namespace llvm::LoongArch::Sched |
| 2518 | |
| 2519 | #endif // GET_INSTRINFO_SCHED_ENUM |
| 2520 | |
| 2521 | #if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
| 2522 | |
| 2523 | namespace llvm { |
| 2524 | |
| 2525 | struct LoongArchInstrTable { |
| 2526 | MCInstrDesc Insts[2485]; |
| 2527 | static_assert(alignof(MCInstrDesc) >= alignof(MCPhysReg), "Unwanted padding between Insts and ImplicitOps"); |
| 2528 | MCPhysReg ImplicitOps[12]; |
| 2529 | char Padding[sizeof(MCOperandInfo) - sizeof ImplicitOps % sizeof(MCOperandInfo)]; |
| 2530 | static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo"); |
| 2531 | MCOperandInfo OperandInfo[437]; |
| 2532 | }; |
| 2533 | } // namespace llvm |
| 2534 | |
| 2535 | #endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
| 2536 | |
| 2537 | #ifdef GET_INSTRINFO_MC_DESC |
| 2538 | #undef GET_INSTRINFO_MC_DESC |
| 2539 | |
| 2540 | namespace llvm { |
| 2541 | |
| 2542 | static_assert((sizeof LoongArchInstrTable::ImplicitOps + sizeof LoongArchInstrTable::Padding) % sizeof(MCOperandInfo) == 0); |
| 2543 | static constexpr unsigned LoongArchOpInfoBase = (sizeof LoongArchInstrTable::ImplicitOps + sizeof LoongArchInstrTable::Padding) / sizeof(MCOperandInfo); |
| 2544 | |
| 2545 | extern const LoongArchInstrTable LoongArchDescs = { |
| 2546 | { |
| 2547 | { 2484, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVXOR_V |
| 2548 | { 2483, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVXORI_B |
| 2549 | { 2482, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_W |
| 2550 | { 2481, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_Q |
| 2551 | { 2480, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_H |
| 2552 | { 2479, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_D |
| 2553 | { 2478, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUB_B |
| 2554 | { 2477, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_W_HU |
| 2555 | { 2476, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_W_H |
| 2556 | { 2475, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_Q_DU |
| 2557 | { 2474, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_Q_D |
| 2558 | { 2473, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_H_BU |
| 2559 | { 2472, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_H_B |
| 2560 | { 2471, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_D_WU |
| 2561 | { 2470, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWOD_D_W |
| 2562 | { 2469, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_W_HU |
| 2563 | { 2468, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_W_H |
| 2564 | { 2467, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_Q_DU |
| 2565 | { 2466, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_Q_D |
| 2566 | { 2465, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_H_BU |
| 2567 | { 2464, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_H_B |
| 2568 | { 2463, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_D_WU |
| 2569 | { 2462, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSUBWEV_D_W |
| 2570 | { 2461, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSUBI_WU |
| 2571 | { 2460, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSUBI_HU |
| 2572 | { 2459, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSUBI_DU |
| 2573 | { 2458, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSUBI_BU |
| 2574 | { 2457, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 420, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTX |
| 2575 | { 2456, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 433, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTELM_W |
| 2576 | { 2455, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 433, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTELM_H |
| 2577 | { 2454, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 433, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTELM_D |
| 2578 | { 2453, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 433, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVSTELM_B |
| 2579 | { 2452, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // XVST |
| 2580 | { 2451, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_WU |
| 2581 | { 2450, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_W |
| 2582 | { 2449, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_HU |
| 2583 | { 2448, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_H |
| 2584 | { 2447, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_DU |
| 2585 | { 2446, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_D |
| 2586 | { 2445, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_BU |
| 2587 | { 2444, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSUB_B |
| 2588 | { 2443, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_W_D |
| 2589 | { 2442, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_WU_D |
| 2590 | { 2441, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_H_W |
| 2591 | { 2440, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_HU_W |
| 2592 | { 2439, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_B_H |
| 2593 | { 2438, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLRN_BU_H |
| 2594 | { 2437, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_W_D |
| 2595 | { 2436, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_WU_D |
| 2596 | { 2435, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_H_W |
| 2597 | { 2434, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_HU_W |
| 2598 | { 2433, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_D_Q |
| 2599 | { 2432, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_DU_Q |
| 2600 | { 2431, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_B_H |
| 2601 | { 2430, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLRNI_BU_H |
| 2602 | { 2429, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_W_D |
| 2603 | { 2428, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_WU_D |
| 2604 | { 2427, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_H_W |
| 2605 | { 2426, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_HU_W |
| 2606 | { 2425, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_B_H |
| 2607 | { 2424, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRLN_BU_H |
| 2608 | { 2423, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_W_D |
| 2609 | { 2422, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_WU_D |
| 2610 | { 2421, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_H_W |
| 2611 | { 2420, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_HU_W |
| 2612 | { 2419, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_D_Q |
| 2613 | { 2418, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_DU_Q |
| 2614 | { 2417, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_B_H |
| 2615 | { 2416, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRLNI_BU_H |
| 2616 | { 2415, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_W_D |
| 2617 | { 2414, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_WU_D |
| 2618 | { 2413, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_H_W |
| 2619 | { 2412, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_HU_W |
| 2620 | { 2411, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_B_H |
| 2621 | { 2410, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRARN_BU_H |
| 2622 | { 2409, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_W_D |
| 2623 | { 2408, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_WU_D |
| 2624 | { 2407, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_H_W |
| 2625 | { 2406, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_HU_W |
| 2626 | { 2405, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_D_Q |
| 2627 | { 2404, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_DU_Q |
| 2628 | { 2403, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_B_H |
| 2629 | { 2402, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRARNI_BU_H |
| 2630 | { 2401, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_W_D |
| 2631 | { 2400, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_WU_D |
| 2632 | { 2399, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_H_W |
| 2633 | { 2398, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_HU_W |
| 2634 | { 2397, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_B_H |
| 2635 | { 2396, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSSRAN_BU_H |
| 2636 | { 2395, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_W_D |
| 2637 | { 2394, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_WU_D |
| 2638 | { 2393, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_H_W |
| 2639 | { 2392, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_HU_W |
| 2640 | { 2391, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_D_Q |
| 2641 | { 2390, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_DU_Q |
| 2642 | { 2389, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_B_H |
| 2643 | { 2388, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSSRANI_BU_H |
| 2644 | { 2387, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRL_W |
| 2645 | { 2386, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRL_H |
| 2646 | { 2385, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRL_D |
| 2647 | { 2384, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRL_B |
| 2648 | { 2383, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLR_W |
| 2649 | { 2382, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLR_H |
| 2650 | { 2381, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLR_D |
| 2651 | { 2380, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLR_B |
| 2652 | { 2379, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLRN_W_D |
| 2653 | { 2378, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLRN_H_W |
| 2654 | { 2377, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLRN_B_H |
| 2655 | { 2376, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLRNI_W_D |
| 2656 | { 2375, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLRNI_H_W |
| 2657 | { 2374, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLRNI_D_Q |
| 2658 | { 2373, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLRNI_B_H |
| 2659 | { 2372, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLRI_W |
| 2660 | { 2371, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLRI_H |
| 2661 | { 2370, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLRI_D |
| 2662 | { 2369, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLRI_B |
| 2663 | { 2368, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLN_W_D |
| 2664 | { 2367, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLN_H_W |
| 2665 | { 2366, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRLN_B_H |
| 2666 | { 2365, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLNI_W_D |
| 2667 | { 2364, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLNI_H_W |
| 2668 | { 2363, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLNI_D_Q |
| 2669 | { 2362, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRLNI_B_H |
| 2670 | { 2361, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLI_W |
| 2671 | { 2360, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLI_H |
| 2672 | { 2359, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLI_D |
| 2673 | { 2358, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRLI_B |
| 2674 | { 2357, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRA_W |
| 2675 | { 2356, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRA_H |
| 2676 | { 2355, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRA_D |
| 2677 | { 2354, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRA_B |
| 2678 | { 2353, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAR_W |
| 2679 | { 2352, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAR_H |
| 2680 | { 2351, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAR_D |
| 2681 | { 2350, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAR_B |
| 2682 | { 2349, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRARN_W_D |
| 2683 | { 2348, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRARN_H_W |
| 2684 | { 2347, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRARN_B_H |
| 2685 | { 2346, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRARNI_W_D |
| 2686 | { 2345, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRARNI_H_W |
| 2687 | { 2344, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRARNI_D_Q |
| 2688 | { 2343, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRARNI_B_H |
| 2689 | { 2342, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRARI_W |
| 2690 | { 2341, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRARI_H |
| 2691 | { 2340, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRARI_D |
| 2692 | { 2339, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRARI_B |
| 2693 | { 2338, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAN_W_D |
| 2694 | { 2337, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAN_H_W |
| 2695 | { 2336, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSRAN_B_H |
| 2696 | { 2335, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRANI_W_D |
| 2697 | { 2334, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRANI_H_W |
| 2698 | { 2333, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRANI_D_Q |
| 2699 | { 2332, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSRANI_B_H |
| 2700 | { 2331, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRAI_W |
| 2701 | { 2330, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRAI_H |
| 2702 | { 2329, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRAI_D |
| 2703 | { 2328, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSRAI_B |
| 2704 | { 2327, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_WU |
| 2705 | { 2326, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_W |
| 2706 | { 2325, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_HU |
| 2707 | { 2324, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_H |
| 2708 | { 2323, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_DU |
| 2709 | { 2322, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_D |
| 2710 | { 2321, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_BU |
| 2711 | { 2320, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLT_B |
| 2712 | { 2319, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_WU |
| 2713 | { 2318, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_W |
| 2714 | { 2317, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_HU |
| 2715 | { 2316, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_H |
| 2716 | { 2315, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_DU |
| 2717 | { 2314, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_D |
| 2718 | { 2313, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_BU |
| 2719 | { 2312, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLTI_B |
| 2720 | { 2311, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLL_W |
| 2721 | { 2310, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLL_H |
| 2722 | { 2309, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLL_D |
| 2723 | { 2308, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLL_B |
| 2724 | { 2307, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_W_H |
| 2725 | { 2306, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_WU_HU |
| 2726 | { 2305, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_H_B |
| 2727 | { 2304, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_HU_BU |
| 2728 | { 2303, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_D_W |
| 2729 | { 2302, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLWIL_DU_WU |
| 2730 | { 2301, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLI_W |
| 2731 | { 2300, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLI_H |
| 2732 | { 2299, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLI_D |
| 2733 | { 2298, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLLI_B |
| 2734 | { 2297, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_WU |
| 2735 | { 2296, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_W |
| 2736 | { 2295, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_HU |
| 2737 | { 2294, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_H |
| 2738 | { 2293, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_DU |
| 2739 | { 2292, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_D |
| 2740 | { 2291, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_BU |
| 2741 | { 2290, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSLE_B |
| 2742 | { 2289, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_WU |
| 2743 | { 2288, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_W |
| 2744 | { 2287, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_HU |
| 2745 | { 2286, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_H |
| 2746 | { 2285, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_DU |
| 2747 | { 2284, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_D |
| 2748 | { 2283, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_BU |
| 2749 | { 2282, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSLEI_B |
| 2750 | { 2281, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSIGNCOV_W |
| 2751 | { 2280, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSIGNCOV_H |
| 2752 | { 2279, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSIGNCOV_D |
| 2753 | { 2278, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSIGNCOV_B |
| 2754 | { 2277, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVSHUF_W |
| 2755 | { 2276, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVSHUF_H |
| 2756 | { 2275, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVSHUF_D |
| 2757 | { 2274, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVSHUF_B |
| 2758 | { 2273, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSHUF4I_W |
| 2759 | { 2272, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSHUF4I_H |
| 2760 | { 2271, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVSHUF4I_D |
| 2761 | { 2270, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSHUF4I_B |
| 2762 | { 2269, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETNEZ_V |
| 2763 | { 2268, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETEQZ_V |
| 2764 | { 2267, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETANYEQZ_W |
| 2765 | { 2266, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETANYEQZ_H |
| 2766 | { 2265, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETANYEQZ_D |
| 2767 | { 2264, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETANYEQZ_B |
| 2768 | { 2263, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETALLNEZ_W |
| 2769 | { 2262, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETALLNEZ_H |
| 2770 | { 2261, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETALLNEZ_D |
| 2771 | { 2260, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 431, 0, 0, 0x0ULL }, // XVSETALLNEZ_B |
| 2772 | { 2259, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSEQ_W |
| 2773 | { 2258, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSEQ_H |
| 2774 | { 2257, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSEQ_D |
| 2775 | { 2256, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSEQ_B |
| 2776 | { 2255, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSEQI_W |
| 2777 | { 2254, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSEQI_H |
| 2778 | { 2253, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSEQI_D |
| 2779 | { 2252, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSEQI_B |
| 2780 | { 2251, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_WU |
| 2781 | { 2250, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_W |
| 2782 | { 2249, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_HU |
| 2783 | { 2248, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_H |
| 2784 | { 2247, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_DU |
| 2785 | { 2246, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_D |
| 2786 | { 2245, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_BU |
| 2787 | { 2244, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVSAT_B |
| 2788 | { 2243, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_WU |
| 2789 | { 2242, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_W |
| 2790 | { 2241, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_HU |
| 2791 | { 2240, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_H |
| 2792 | { 2239, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_DU |
| 2793 | { 2238, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_D |
| 2794 | { 2237, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_BU |
| 2795 | { 2236, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVSADD_B |
| 2796 | { 2235, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVROTR_W |
| 2797 | { 2234, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVROTR_H |
| 2798 | { 2233, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVROTR_D |
| 2799 | { 2232, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVROTR_B |
| 2800 | { 2231, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVROTRI_W |
| 2801 | { 2230, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVROTRI_H |
| 2802 | { 2229, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVROTRI_D |
| 2803 | { 2228, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVROTRI_B |
| 2804 | { 2227, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 428, 0, 0, 0x0ULL }, // XVREPLVE_W |
| 2805 | { 2226, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 428, 0, 0, 0x0ULL }, // XVREPLVE_H |
| 2806 | { 2225, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 428, 0, 0, 0x0ULL }, // XVREPLVE_D |
| 2807 | { 2224, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 428, 0, 0, 0x0ULL }, // XVREPLVE_B |
| 2808 | { 2223, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_W |
| 2809 | { 2222, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_Q |
| 2810 | { 2221, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_H |
| 2811 | { 2220, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_D |
| 2812 | { 2219, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVREPLVE0_B |
| 2813 | { 2218, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 426, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // XVREPLGR2VR_W |
| 2814 | { 2217, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 426, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // XVREPLGR2VR_H |
| 2815 | { 2216, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 426, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // XVREPLGR2VR_D |
| 2816 | { 2215, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 426, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // XVREPLGR2VR_B |
| 2817 | { 2214, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVREPL128VEI_W |
| 2818 | { 2213, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVREPL128VEI_H |
| 2819 | { 2212, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVREPL128VEI_D |
| 2820 | { 2211, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVREPL128VEI_B |
| 2821 | { 2210, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVPICKVE_W |
| 2822 | { 2209, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVPICKVE_D |
| 2823 | { 2208, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 423, 0, 0, 0x0ULL }, // XVPICKVE2GR_WU |
| 2824 | { 2207, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 423, 0, 0, 0x0ULL }, // XVPICKVE2GR_W |
| 2825 | { 2206, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 423, 0, 0, 0x0ULL }, // XVPICKVE2GR_DU |
| 2826 | { 2205, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 423, 0, 0, 0x0ULL }, // XVPICKVE2GR_D |
| 2827 | { 2204, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKOD_W |
| 2828 | { 2203, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKOD_H |
| 2829 | { 2202, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKOD_D |
| 2830 | { 2201, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKOD_B |
| 2831 | { 2200, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKEV_W |
| 2832 | { 2199, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKEV_H |
| 2833 | { 2198, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKEV_D |
| 2834 | { 2197, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPICKEV_B |
| 2835 | { 2196, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPERM_W |
| 2836 | { 2195, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVPERMI_W |
| 2837 | { 2194, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVPERMI_Q |
| 2838 | { 2193, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVPERMI_D |
| 2839 | { 2192, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVPCNT_W |
| 2840 | { 2191, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVPCNT_H |
| 2841 | { 2190, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVPCNT_D |
| 2842 | { 2189, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVPCNT_B |
| 2843 | { 2188, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKOD_W |
| 2844 | { 2187, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKOD_H |
| 2845 | { 2186, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKOD_D |
| 2846 | { 2185, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKOD_B |
| 2847 | { 2184, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKEV_W |
| 2848 | { 2183, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKEV_H |
| 2849 | { 2182, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKEV_D |
| 2850 | { 2181, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVPACKEV_B |
| 2851 | { 2180, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVOR_V |
| 2852 | { 2179, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVORN_V |
| 2853 | { 2178, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVORI_B |
| 2854 | { 2177, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVNOR_V |
| 2855 | { 2176, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVNORI_B |
| 2856 | { 2175, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVNEG_W |
| 2857 | { 2174, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVNEG_H |
| 2858 | { 2173, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVNEG_D |
| 2859 | { 2172, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVNEG_B |
| 2860 | { 2171, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUL_W |
| 2861 | { 2170, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUL_H |
| 2862 | { 2169, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUL_D |
| 2863 | { 2168, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUL_B |
| 2864 | { 2167, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_W_HU_H |
| 2865 | { 2166, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_W_HU |
| 2866 | { 2165, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_W_H |
| 2867 | { 2164, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_Q_DU_D |
| 2868 | { 2163, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_Q_DU |
| 2869 | { 2162, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_Q_D |
| 2870 | { 2161, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_H_BU_B |
| 2871 | { 2160, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_H_BU |
| 2872 | { 2159, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_H_B |
| 2873 | { 2158, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_D_WU_W |
| 2874 | { 2157, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_D_WU |
| 2875 | { 2156, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWOD_D_W |
| 2876 | { 2155, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_W_HU_H |
| 2877 | { 2154, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_W_HU |
| 2878 | { 2153, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_W_H |
| 2879 | { 2152, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_Q_DU_D |
| 2880 | { 2151, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_Q_DU |
| 2881 | { 2150, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_Q_D |
| 2882 | { 2149, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_H_BU_B |
| 2883 | { 2148, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_H_BU |
| 2884 | { 2147, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_H_B |
| 2885 | { 2146, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_D_WU_W |
| 2886 | { 2145, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_D_WU |
| 2887 | { 2144, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMULWEV_D_W |
| 2888 | { 2143, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_WU |
| 2889 | { 2142, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_W |
| 2890 | { 2141, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_HU |
| 2891 | { 2140, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_H |
| 2892 | { 2139, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_DU |
| 2893 | { 2138, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_D |
| 2894 | { 2137, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_BU |
| 2895 | { 2136, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMUH_B |
| 2896 | { 2135, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMSUB_W |
| 2897 | { 2134, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMSUB_H |
| 2898 | { 2133, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMSUB_D |
| 2899 | { 2132, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMSUB_B |
| 2900 | { 2131, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKNZ_B |
| 2901 | { 2130, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKLTZ_W |
| 2902 | { 2129, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKLTZ_H |
| 2903 | { 2128, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKLTZ_D |
| 2904 | { 2127, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKLTZ_B |
| 2905 | { 2126, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVMSKGEZ_B |
| 2906 | { 2125, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_WU |
| 2907 | { 2124, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_W |
| 2908 | { 2123, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_HU |
| 2909 | { 2122, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_H |
| 2910 | { 2121, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_DU |
| 2911 | { 2120, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_D |
| 2912 | { 2119, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_BU |
| 2913 | { 2118, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMOD_B |
| 2914 | { 2117, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_WU |
| 2915 | { 2116, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_W |
| 2916 | { 2115, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_HU |
| 2917 | { 2114, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_H |
| 2918 | { 2113, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_DU |
| 2919 | { 2112, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_D |
| 2920 | { 2111, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_BU |
| 2921 | { 2110, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMIN_B |
| 2922 | { 2109, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_WU |
| 2923 | { 2108, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_W |
| 2924 | { 2107, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_HU |
| 2925 | { 2106, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_H |
| 2926 | { 2105, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_DU |
| 2927 | { 2104, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_D |
| 2928 | { 2103, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_BU |
| 2929 | { 2102, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMINI_B |
| 2930 | { 2101, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_WU |
| 2931 | { 2100, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_W |
| 2932 | { 2099, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_HU |
| 2933 | { 2098, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_H |
| 2934 | { 2097, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_DU |
| 2935 | { 2096, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_D |
| 2936 | { 2095, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_BU |
| 2937 | { 2094, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVMAX_B |
| 2938 | { 2093, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_WU |
| 2939 | { 2092, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_W |
| 2940 | { 2091, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_HU |
| 2941 | { 2090, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_H |
| 2942 | { 2089, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_DU |
| 2943 | { 2088, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_D |
| 2944 | { 2087, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_BU |
| 2945 | { 2086, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVMAXI_B |
| 2946 | { 2085, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADD_W |
| 2947 | { 2084, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADD_H |
| 2948 | { 2083, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADD_D |
| 2949 | { 2082, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADD_B |
| 2950 | { 2081, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_W_HU_H |
| 2951 | { 2080, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_W_HU |
| 2952 | { 2079, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_W_H |
| 2953 | { 2078, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_Q_DU_D |
| 2954 | { 2077, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_Q_DU |
| 2955 | { 2076, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_Q_D |
| 2956 | { 2075, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_H_BU_B |
| 2957 | { 2074, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_H_BU |
| 2958 | { 2073, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_H_B |
| 2959 | { 2072, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_D_WU_W |
| 2960 | { 2071, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_D_WU |
| 2961 | { 2070, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWOD_D_W |
| 2962 | { 2069, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_W_HU_H |
| 2963 | { 2068, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_W_HU |
| 2964 | { 2067, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_W_H |
| 2965 | { 2066, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_Q_DU_D |
| 2966 | { 2065, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_Q_DU |
| 2967 | { 2064, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_Q_D |
| 2968 | { 2063, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_H_BU_B |
| 2969 | { 2062, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_H_BU |
| 2970 | { 2061, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_H_B |
| 2971 | { 2060, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_D_WU_W |
| 2972 | { 2059, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_D_WU |
| 2973 | { 2058, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVMADDWEV_D_W |
| 2974 | { 2057, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 420, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDX |
| 2975 | { 2056, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDREPL_W |
| 2976 | { 2055, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDREPL_H |
| 2977 | { 2054, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDREPL_D |
| 2978 | { 2053, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLDREPL_B |
| 2979 | { 2052, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0, 0x0ULL }, // XVLDI |
| 2980 | { 2051, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 417, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // XVLD |
| 2981 | { 2050, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVINSVE0_W |
| 2982 | { 2049, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVINSVE0_D |
| 2983 | { 2048, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 221, 0, 0, 0x0ULL }, // XVINSGR2VR_W |
| 2984 | { 2047, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 221, 0, 0, 0x0ULL }, // XVINSGR2VR_D |
| 2985 | { 2046, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVL_W |
| 2986 | { 2045, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVL_H |
| 2987 | { 2044, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVL_D |
| 2988 | { 2043, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVL_B |
| 2989 | { 2042, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVH_W |
| 2990 | { 2041, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVH_H |
| 2991 | { 2040, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVH_D |
| 2992 | { 2039, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVILVH_B |
| 2993 | { 2038, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_W_H |
| 2994 | { 2037, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_WU_HU |
| 2995 | { 2036, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_Q_D |
| 2996 | { 2035, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_QU_DU |
| 2997 | { 2034, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_H_B |
| 2998 | { 2033, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_HU_BU |
| 2999 | { 2032, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_D_W |
| 3000 | { 2031, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHSUBW_DU_WU |
| 3001 | { 2030, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVHSELI_D |
| 3002 | { 2029, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_W_H |
| 3003 | { 2028, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_WU_HU |
| 3004 | { 2027, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_Q_D |
| 3005 | { 2026, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_QU_DU |
| 3006 | { 2025, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_H_B |
| 3007 | { 2024, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_HU_BU |
| 3008 | { 2023, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_D_W |
| 3009 | { 2022, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVHADDW_DU_WU |
| 3010 | { 2021, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINT_W_S |
| 3011 | { 2020, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINT_W_D |
| 3012 | { 2019, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINT_WU_S |
| 3013 | { 2018, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINT_L_D |
| 3014 | { 2017, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINT_LU_D |
| 3015 | { 2016, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZ_W_S |
| 3016 | { 2015, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINTRZ_W_D |
| 3017 | { 2014, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZ_WU_S |
| 3018 | { 2013, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZ_L_D |
| 3019 | { 2012, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZ_LU_D |
| 3020 | { 2011, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZL_L_S |
| 3021 | { 2010, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRZH_L_S |
| 3022 | { 2009, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRP_W_S |
| 3023 | { 2008, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINTRP_W_D |
| 3024 | { 2007, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRP_L_D |
| 3025 | { 2006, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRPL_L_S |
| 3026 | { 2005, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRPH_L_S |
| 3027 | { 2004, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRNE_W_S |
| 3028 | { 2003, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINTRNE_W_D |
| 3029 | { 2002, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRNE_L_D |
| 3030 | { 2001, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRNEL_L_S |
| 3031 | { 2000, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRNEH_L_S |
| 3032 | { 1999, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRM_W_S |
| 3033 | { 1998, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFTINTRM_W_D |
| 3034 | { 1997, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRM_L_D |
| 3035 | { 1996, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRML_L_S |
| 3036 | { 1995, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTRMH_L_S |
| 3037 | { 1994, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTL_L_S |
| 3038 | { 1993, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFTINTH_L_S |
| 3039 | { 1992, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFSUB_S |
| 3040 | { 1991, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFSUB_D |
| 3041 | { 1990, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFSQRT_S |
| 3042 | { 1989, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFSQRT_D |
| 3043 | { 1988, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVFRSTP_H |
| 3044 | { 1987, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 413, 0, 0, 0x0ULL }, // XVFRSTP_B |
| 3045 | { 1986, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVFRSTPI_H |
| 3046 | { 1985, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVFRSTPI_B |
| 3047 | { 1984, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRSQRT_S |
| 3048 | { 1983, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRSQRT_D |
| 3049 | { 1982, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRSQRTE_S |
| 3050 | { 1981, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRSQRTE_D |
| 3051 | { 1980, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINT_S |
| 3052 | { 1979, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINT_D |
| 3053 | { 1978, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRZ_S |
| 3054 | { 1977, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRZ_D |
| 3055 | { 1976, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRP_S |
| 3056 | { 1975, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRP_D |
| 3057 | { 1974, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRNE_S |
| 3058 | { 1973, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRNE_D |
| 3059 | { 1972, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRM_S |
| 3060 | { 1971, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRINTRM_D |
| 3061 | { 1970, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRECIP_S |
| 3062 | { 1969, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRECIP_D |
| 3063 | { 1968, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRECIPE_S |
| 3064 | { 1967, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFRECIPE_D |
| 3065 | { 1966, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFNMSUB_S |
| 3066 | { 1965, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFNMSUB_D |
| 3067 | { 1964, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFNMADD_S |
| 3068 | { 1963, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFNMADD_D |
| 3069 | { 1962, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMUL_S |
| 3070 | { 1961, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMUL_D |
| 3071 | { 1960, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFMSUB_S |
| 3072 | { 1959, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFMSUB_D |
| 3073 | { 1958, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMIN_S |
| 3074 | { 1957, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMIN_D |
| 3075 | { 1956, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMINA_S |
| 3076 | { 1955, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMINA_D |
| 3077 | { 1954, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMAX_S |
| 3078 | { 1953, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMAX_D |
| 3079 | { 1952, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMAXA_S |
| 3080 | { 1951, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFMAXA_D |
| 3081 | { 1950, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFMADD_S |
| 3082 | { 1949, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVFMADD_D |
| 3083 | { 1948, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFLOGB_S |
| 3084 | { 1947, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFLOGB_D |
| 3085 | { 1946, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINT_S_WU |
| 3086 | { 1945, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINT_S_W |
| 3087 | { 1944, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFFINT_S_L |
| 3088 | { 1943, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINT_D_LU |
| 3089 | { 1942, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINT_D_L |
| 3090 | { 1941, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINTL_D_W |
| 3091 | { 1940, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFFINTH_D_W |
| 3092 | { 1939, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFDIV_S |
| 3093 | { 1938, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFDIV_D |
| 3094 | { 1937, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCVT_S_D |
| 3095 | { 1936, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCVT_H_S |
| 3096 | { 1935, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCVTL_S_H |
| 3097 | { 1934, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCVTL_D_S |
| 3098 | { 1933, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCVTH_S_H |
| 3099 | { 1932, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCVTH_D_S |
| 3100 | { 1931, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUN_S |
| 3101 | { 1930, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUN_D |
| 3102 | { 1929, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUNE_S |
| 3103 | { 1928, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUNE_D |
| 3104 | { 1927, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SULT_S |
| 3105 | { 1926, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SULT_D |
| 3106 | { 1925, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SULE_S |
| 3107 | { 1924, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SULE_D |
| 3108 | { 1923, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUEQ_S |
| 3109 | { 1922, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SUEQ_D |
| 3110 | { 1921, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SOR_S |
| 3111 | { 1920, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SOR_D |
| 3112 | { 1919, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SNE_S |
| 3113 | { 1918, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SNE_D |
| 3114 | { 1917, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SLT_S |
| 3115 | { 1916, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SLT_D |
| 3116 | { 1915, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SLE_S |
| 3117 | { 1914, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SLE_D |
| 3118 | { 1913, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SEQ_S |
| 3119 | { 1912, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SEQ_D |
| 3120 | { 1911, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SAF_S |
| 3121 | { 1910, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_SAF_D |
| 3122 | { 1909, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUN_S |
| 3123 | { 1908, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUN_D |
| 3124 | { 1907, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUNE_S |
| 3125 | { 1906, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUNE_D |
| 3126 | { 1905, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CULT_S |
| 3127 | { 1904, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CULT_D |
| 3128 | { 1903, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CULE_S |
| 3129 | { 1902, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CULE_D |
| 3130 | { 1901, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUEQ_S |
| 3131 | { 1900, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CUEQ_D |
| 3132 | { 1899, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_COR_S |
| 3133 | { 1898, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_COR_D |
| 3134 | { 1897, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CNE_S |
| 3135 | { 1896, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CNE_D |
| 3136 | { 1895, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CLT_S |
| 3137 | { 1894, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CLT_D |
| 3138 | { 1893, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CLE_S |
| 3139 | { 1892, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CLE_D |
| 3140 | { 1891, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CEQ_S |
| 3141 | { 1890, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CEQ_D |
| 3142 | { 1889, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CAF_S |
| 3143 | { 1888, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFCMP_CAF_D |
| 3144 | { 1887, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCLASS_S |
| 3145 | { 1886, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVFCLASS_D |
| 3146 | { 1885, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFADD_S |
| 3147 | { 1884, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVFADD_D |
| 3148 | { 1883, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVEXTRINS_W |
| 3149 | { 1882, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVEXTRINS_H |
| 3150 | { 1881, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVEXTRINS_D |
| 3151 | { 1880, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVEXTRINS_B |
| 3152 | { 1879, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTL_Q_D |
| 3153 | { 1878, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTL_QU_DU |
| 3154 | { 1877, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_W_H |
| 3155 | { 1876, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_WU_HU |
| 3156 | { 1875, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_Q_D |
| 3157 | { 1874, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_QU_DU |
| 3158 | { 1873, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_H_B |
| 3159 | { 1872, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_HU_BU |
| 3160 | { 1871, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_D_W |
| 3161 | { 1870, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVEXTH_DU_WU |
| 3162 | { 1869, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_WU |
| 3163 | { 1868, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_W |
| 3164 | { 1867, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_HU |
| 3165 | { 1866, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_H |
| 3166 | { 1865, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_DU |
| 3167 | { 1864, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_D |
| 3168 | { 1863, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_BU |
| 3169 | { 1862, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVDIV_B |
| 3170 | { 1861, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLZ_W |
| 3171 | { 1860, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLZ_H |
| 3172 | { 1859, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLZ_D |
| 3173 | { 1858, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLZ_B |
| 3174 | { 1857, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLO_W |
| 3175 | { 1856, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLO_H |
| 3176 | { 1855, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLO_D |
| 3177 | { 1854, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // XVCLO_B |
| 3178 | { 1853, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBSRL_V |
| 3179 | { 1852, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBSLL_V |
| 3180 | { 1851, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITSET_W |
| 3181 | { 1850, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITSET_H |
| 3182 | { 1849, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITSET_D |
| 3183 | { 1848, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITSET_B |
| 3184 | { 1847, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITSETI_W |
| 3185 | { 1846, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITSETI_H |
| 3186 | { 1845, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITSETI_D |
| 3187 | { 1844, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITSETI_B |
| 3188 | { 1843, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 409, 0, 0, 0x0ULL }, // XVBITSEL_V |
| 3189 | { 1842, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 405, 0, 0, 0x0ULL }, // XVBITSELI_B |
| 3190 | { 1841, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITREV_W |
| 3191 | { 1840, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITREV_H |
| 3192 | { 1839, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITREV_D |
| 3193 | { 1838, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITREV_B |
| 3194 | { 1837, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITREVI_W |
| 3195 | { 1836, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITREVI_H |
| 3196 | { 1835, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITREVI_D |
| 3197 | { 1834, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITREVI_B |
| 3198 | { 1833, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITCLR_W |
| 3199 | { 1832, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITCLR_H |
| 3200 | { 1831, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITCLR_D |
| 3201 | { 1830, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVBITCLR_B |
| 3202 | { 1829, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITCLRI_W |
| 3203 | { 1828, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITCLRI_H |
| 3204 | { 1827, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITCLRI_D |
| 3205 | { 1826, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVBITCLRI_B |
| 3206 | { 1825, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_WU |
| 3207 | { 1824, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_W |
| 3208 | { 1823, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_HU |
| 3209 | { 1822, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_H |
| 3210 | { 1821, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_DU |
| 3211 | { 1820, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_D |
| 3212 | { 1819, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_BU |
| 3213 | { 1818, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVG_B |
| 3214 | { 1817, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_WU |
| 3215 | { 1816, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_W |
| 3216 | { 1815, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_HU |
| 3217 | { 1814, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_H |
| 3218 | { 1813, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_DU |
| 3219 | { 1812, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_D |
| 3220 | { 1811, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_BU |
| 3221 | { 1810, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAVGR_B |
| 3222 | { 1809, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVAND_V |
| 3223 | { 1808, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVANDN_V |
| 3224 | { 1807, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVANDI_B |
| 3225 | { 1806, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_W |
| 3226 | { 1805, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_Q |
| 3227 | { 1804, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_H |
| 3228 | { 1803, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_D |
| 3229 | { 1802, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADD_B |
| 3230 | { 1801, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_W_HU_H |
| 3231 | { 1800, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_W_HU |
| 3232 | { 1799, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_W_H |
| 3233 | { 1798, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_Q_DU_D |
| 3234 | { 1797, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_Q_DU |
| 3235 | { 1796, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_Q_D |
| 3236 | { 1795, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_H_BU_B |
| 3237 | { 1794, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_H_BU |
| 3238 | { 1793, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_H_B |
| 3239 | { 1792, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_D_WU_W |
| 3240 | { 1791, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_D_WU |
| 3241 | { 1790, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWOD_D_W |
| 3242 | { 1789, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_W_HU_H |
| 3243 | { 1788, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_W_HU |
| 3244 | { 1787, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_W_H |
| 3245 | { 1786, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_Q_DU_D |
| 3246 | { 1785, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_Q_DU |
| 3247 | { 1784, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_Q_D |
| 3248 | { 1783, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_H_BU_B |
| 3249 | { 1782, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_H_BU |
| 3250 | { 1781, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_H_B |
| 3251 | { 1780, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_D_WU_W |
| 3252 | { 1779, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_D_WU |
| 3253 | { 1778, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDWEV_D_W |
| 3254 | { 1777, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVADDI_WU |
| 3255 | { 1776, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVADDI_HU |
| 3256 | { 1775, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVADDI_DU |
| 3257 | { 1774, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 402, 0, 0, 0x0ULL }, // XVADDI_BU |
| 3258 | { 1773, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDA_W |
| 3259 | { 1772, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDA_H |
| 3260 | { 1771, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDA_D |
| 3261 | { 1770, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVADDA_B |
| 3262 | { 1769, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_WU |
| 3263 | { 1768, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_W |
| 3264 | { 1767, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_HU |
| 3265 | { 1766, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_H |
| 3266 | { 1765, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_DU |
| 3267 | { 1764, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_D |
| 3268 | { 1763, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_BU |
| 3269 | { 1762, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 399, 0, 0, 0x0ULL }, // XVABSD_B |
| 3270 | { 1761, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // XORI |
| 3271 | { 1760, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // XOR |
| 3272 | { 1759, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86XOR_W |
| 3273 | { 1758, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86XOR_H |
| 3274 | { 1757, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86XOR_D |
| 3275 | { 1756, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86XOR_B |
| 3276 | { 1755, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_WU |
| 3277 | { 1754, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_W |
| 3278 | { 1753, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_H |
| 3279 | { 1752, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_DU |
| 3280 | { 1751, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_D |
| 3281 | { 1750, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SUB_B |
| 3282 | { 1749, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRL_W |
| 3283 | { 1748, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRL_H |
| 3284 | { 1747, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRL_D |
| 3285 | { 1746, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRL_B |
| 3286 | { 1745, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRLI_W |
| 3287 | { 1744, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRLI_H |
| 3288 | { 1743, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRLI_D |
| 3289 | { 1742, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRLI_B |
| 3290 | { 1741, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRA_W |
| 3291 | { 1740, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRA_H |
| 3292 | { 1739, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRA_D |
| 3293 | { 1738, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SRA_B |
| 3294 | { 1737, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRAI_W |
| 3295 | { 1736, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRAI_H |
| 3296 | { 1735, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRAI_D |
| 3297 | { 1734, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SRAI_B |
| 3298 | { 1733, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SLL_W |
| 3299 | { 1732, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SLL_H |
| 3300 | { 1731, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SLL_D |
| 3301 | { 1730, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SLL_B |
| 3302 | { 1729, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SLLI_W |
| 3303 | { 1728, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SLLI_H |
| 3304 | { 1727, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SLLI_D |
| 3305 | { 1726, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86SLLI_B |
| 3306 | { 1725, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0, 0x0ULL }, // X86SETTM |
| 3307 | { 1724, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // X86SETTAG |
| 3308 | { 1723, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SBC_W |
| 3309 | { 1722, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SBC_H |
| 3310 | { 1721, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SBC_D |
| 3311 | { 1720, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86SBC_B |
| 3312 | { 1719, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTR_W |
| 3313 | { 1718, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTR_H |
| 3314 | { 1717, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTR_D |
| 3315 | { 1716, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTR_B |
| 3316 | { 1715, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTRI_W |
| 3317 | { 1714, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTRI_H |
| 3318 | { 1713, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTRI_D |
| 3319 | { 1712, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTRI_B |
| 3320 | { 1711, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTL_W |
| 3321 | { 1710, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTL_H |
| 3322 | { 1709, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTL_D |
| 3323 | { 1708, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ROTL_B |
| 3324 | { 1707, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTLI_W |
| 3325 | { 1706, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTLI_H |
| 3326 | { 1705, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTLI_D |
| 3327 | { 1704, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86ROTLI_B |
| 3328 | { 1703, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCR_W |
| 3329 | { 1702, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCR_H |
| 3330 | { 1701, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCR_D |
| 3331 | { 1700, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCR_B |
| 3332 | { 1699, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCRI_W |
| 3333 | { 1698, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCRI_H |
| 3334 | { 1697, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCRI_D |
| 3335 | { 1696, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCRI_B |
| 3336 | { 1695, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCL_W |
| 3337 | { 1694, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCL_H |
| 3338 | { 1693, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCL_D |
| 3339 | { 1692, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86RCL_B |
| 3340 | { 1691, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCLI_W |
| 3341 | { 1690, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCLI_H |
| 3342 | { 1689, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCLI_D |
| 3343 | { 1688, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86RCLI_B |
| 3344 | { 1687, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86OR_W |
| 3345 | { 1686, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86OR_H |
| 3346 | { 1685, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86OR_D |
| 3347 | { 1684, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86OR_B |
| 3348 | { 1683, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_WU |
| 3349 | { 1682, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_W |
| 3350 | { 1681, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_HU |
| 3351 | { 1680, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_H |
| 3352 | { 1679, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_DU |
| 3353 | { 1678, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_D |
| 3354 | { 1677, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_BU |
| 3355 | { 1676, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86MUL_B |
| 3356 | { 1675, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0, 0x0ULL }, // X86MTTOP |
| 3357 | { 1674, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86MTFLAG |
| 3358 | { 1673, 1, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86MFTOP |
| 3359 | { 1672, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // X86MFFLAG |
| 3360 | { 1671, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86INC_W |
| 3361 | { 1670, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86INC_H |
| 3362 | { 1669, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86INC_D |
| 3363 | { 1668, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86INC_B |
| 3364 | { 1667, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0, 0x0ULL }, // X86INCTOP |
| 3365 | { 1666, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86DEC_W |
| 3366 | { 1665, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86DEC_H |
| 3367 | { 1664, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86DEC_D |
| 3368 | { 1663, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0, 0x0ULL }, // X86DEC_B |
| 3369 | { 1662, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0, 0x0ULL }, // X86DECTOP |
| 3370 | { 1661, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0, 0x0ULL }, // X86CLRTM |
| 3371 | { 1660, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86AND_W |
| 3372 | { 1659, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86AND_H |
| 3373 | { 1658, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86AND_D |
| 3374 | { 1657, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86AND_B |
| 3375 | { 1656, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_WU |
| 3376 | { 1655, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_W |
| 3377 | { 1654, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_H |
| 3378 | { 1653, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_DU |
| 3379 | { 1652, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_D |
| 3380 | { 1651, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADD_B |
| 3381 | { 1650, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADC_W |
| 3382 | { 1649, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADC_H |
| 3383 | { 1648, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADC_D |
| 3384 | { 1647, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // X86ADC_B |
| 3385 | { 1646, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VXOR_V |
| 3386 | { 1645, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VXORI_B |
| 3387 | { 1644, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_W |
| 3388 | { 1643, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_Q |
| 3389 | { 1642, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_H |
| 3390 | { 1641, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_D |
| 3391 | { 1640, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUB_B |
| 3392 | { 1639, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_W_HU |
| 3393 | { 1638, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_W_H |
| 3394 | { 1637, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_Q_DU |
| 3395 | { 1636, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_Q_D |
| 3396 | { 1635, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_H_BU |
| 3397 | { 1634, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_H_B |
| 3398 | { 1633, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_D_WU |
| 3399 | { 1632, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWOD_D_W |
| 3400 | { 1631, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_W_HU |
| 3401 | { 1630, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_W_H |
| 3402 | { 1629, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_Q_DU |
| 3403 | { 1628, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_Q_D |
| 3404 | { 1627, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_H_BU |
| 3405 | { 1626, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_H_B |
| 3406 | { 1625, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_D_WU |
| 3407 | { 1624, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSUBWEV_D_W |
| 3408 | { 1623, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSUBI_WU |
| 3409 | { 1622, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSUBI_HU |
| 3410 | { 1621, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSUBI_DU |
| 3411 | { 1620, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSUBI_BU |
| 3412 | { 1619, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 382, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTX |
| 3413 | { 1618, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 395, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTELM_W |
| 3414 | { 1617, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 395, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTELM_H |
| 3415 | { 1616, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 395, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTELM_D |
| 3416 | { 1615, 4, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 395, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VSTELM_B |
| 3417 | { 1614, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // VST |
| 3418 | { 1613, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_WU |
| 3419 | { 1612, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_W |
| 3420 | { 1611, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_HU |
| 3421 | { 1610, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_H |
| 3422 | { 1609, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_DU |
| 3423 | { 1608, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_D |
| 3424 | { 1607, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_BU |
| 3425 | { 1606, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSUB_B |
| 3426 | { 1605, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_W_D |
| 3427 | { 1604, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_WU_D |
| 3428 | { 1603, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_H_W |
| 3429 | { 1602, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_HU_W |
| 3430 | { 1601, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_B_H |
| 3431 | { 1600, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLRN_BU_H |
| 3432 | { 1599, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_W_D |
| 3433 | { 1598, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_WU_D |
| 3434 | { 1597, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_H_W |
| 3435 | { 1596, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_HU_W |
| 3436 | { 1595, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_D_Q |
| 3437 | { 1594, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_DU_Q |
| 3438 | { 1593, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_B_H |
| 3439 | { 1592, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLRNI_BU_H |
| 3440 | { 1591, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_W_D |
| 3441 | { 1590, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_WU_D |
| 3442 | { 1589, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_H_W |
| 3443 | { 1588, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_HU_W |
| 3444 | { 1587, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_B_H |
| 3445 | { 1586, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRLN_BU_H |
| 3446 | { 1585, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_W_D |
| 3447 | { 1584, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_WU_D |
| 3448 | { 1583, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_H_W |
| 3449 | { 1582, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_HU_W |
| 3450 | { 1581, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_D_Q |
| 3451 | { 1580, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_DU_Q |
| 3452 | { 1579, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_B_H |
| 3453 | { 1578, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRLNI_BU_H |
| 3454 | { 1577, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_W_D |
| 3455 | { 1576, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_WU_D |
| 3456 | { 1575, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_H_W |
| 3457 | { 1574, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_HU_W |
| 3458 | { 1573, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_B_H |
| 3459 | { 1572, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRARN_BU_H |
| 3460 | { 1571, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_W_D |
| 3461 | { 1570, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_WU_D |
| 3462 | { 1569, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_H_W |
| 3463 | { 1568, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_HU_W |
| 3464 | { 1567, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_D_Q |
| 3465 | { 1566, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_DU_Q |
| 3466 | { 1565, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_B_H |
| 3467 | { 1564, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRARNI_BU_H |
| 3468 | { 1563, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_W_D |
| 3469 | { 1562, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_WU_D |
| 3470 | { 1561, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_H_W |
| 3471 | { 1560, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_HU_W |
| 3472 | { 1559, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_B_H |
| 3473 | { 1558, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSSRAN_BU_H |
| 3474 | { 1557, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_W_D |
| 3475 | { 1556, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_WU_D |
| 3476 | { 1555, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_H_W |
| 3477 | { 1554, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_HU_W |
| 3478 | { 1553, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_D_Q |
| 3479 | { 1552, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_DU_Q |
| 3480 | { 1551, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_B_H |
| 3481 | { 1550, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSSRANI_BU_H |
| 3482 | { 1549, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRL_W |
| 3483 | { 1548, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRL_H |
| 3484 | { 1547, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRL_D |
| 3485 | { 1546, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRL_B |
| 3486 | { 1545, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLR_W |
| 3487 | { 1544, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLR_H |
| 3488 | { 1543, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLR_D |
| 3489 | { 1542, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLR_B |
| 3490 | { 1541, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLRN_W_D |
| 3491 | { 1540, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLRN_H_W |
| 3492 | { 1539, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLRN_B_H |
| 3493 | { 1538, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLRNI_W_D |
| 3494 | { 1537, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLRNI_H_W |
| 3495 | { 1536, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLRNI_D_Q |
| 3496 | { 1535, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLRNI_B_H |
| 3497 | { 1534, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLRI_W |
| 3498 | { 1533, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLRI_H |
| 3499 | { 1532, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLRI_D |
| 3500 | { 1531, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLRI_B |
| 3501 | { 1530, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLN_W_D |
| 3502 | { 1529, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLN_H_W |
| 3503 | { 1528, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRLN_B_H |
| 3504 | { 1527, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLNI_W_D |
| 3505 | { 1526, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLNI_H_W |
| 3506 | { 1525, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLNI_D_Q |
| 3507 | { 1524, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRLNI_B_H |
| 3508 | { 1523, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLI_W |
| 3509 | { 1522, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLI_H |
| 3510 | { 1521, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLI_D |
| 3511 | { 1520, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRLI_B |
| 3512 | { 1519, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRA_W |
| 3513 | { 1518, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRA_H |
| 3514 | { 1517, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRA_D |
| 3515 | { 1516, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRA_B |
| 3516 | { 1515, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAR_W |
| 3517 | { 1514, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAR_H |
| 3518 | { 1513, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAR_D |
| 3519 | { 1512, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAR_B |
| 3520 | { 1511, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRARN_W_D |
| 3521 | { 1510, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRARN_H_W |
| 3522 | { 1509, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRARN_B_H |
| 3523 | { 1508, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRARNI_W_D |
| 3524 | { 1507, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRARNI_H_W |
| 3525 | { 1506, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRARNI_D_Q |
| 3526 | { 1505, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRARNI_B_H |
| 3527 | { 1504, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRARI_W |
| 3528 | { 1503, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRARI_H |
| 3529 | { 1502, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRARI_D |
| 3530 | { 1501, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRARI_B |
| 3531 | { 1500, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAN_W_D |
| 3532 | { 1499, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAN_H_W |
| 3533 | { 1498, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSRAN_B_H |
| 3534 | { 1497, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRANI_W_D |
| 3535 | { 1496, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRANI_H_W |
| 3536 | { 1495, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRANI_D_Q |
| 3537 | { 1494, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSRANI_B_H |
| 3538 | { 1493, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRAI_W |
| 3539 | { 1492, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRAI_H |
| 3540 | { 1491, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRAI_D |
| 3541 | { 1490, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSRAI_B |
| 3542 | { 1489, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_WU |
| 3543 | { 1488, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_W |
| 3544 | { 1487, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_HU |
| 3545 | { 1486, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_H |
| 3546 | { 1485, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_DU |
| 3547 | { 1484, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_D |
| 3548 | { 1483, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_BU |
| 3549 | { 1482, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLT_B |
| 3550 | { 1481, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_WU |
| 3551 | { 1480, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_W |
| 3552 | { 1479, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_HU |
| 3553 | { 1478, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_H |
| 3554 | { 1477, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_DU |
| 3555 | { 1476, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_D |
| 3556 | { 1475, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_BU |
| 3557 | { 1474, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLTI_B |
| 3558 | { 1473, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLL_W |
| 3559 | { 1472, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLL_H |
| 3560 | { 1471, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLL_D |
| 3561 | { 1470, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLL_B |
| 3562 | { 1469, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_W_H |
| 3563 | { 1468, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_WU_HU |
| 3564 | { 1467, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_H_B |
| 3565 | { 1466, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_HU_BU |
| 3566 | { 1465, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_D_W |
| 3567 | { 1464, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLWIL_DU_WU |
| 3568 | { 1463, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLI_W |
| 3569 | { 1462, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLI_H |
| 3570 | { 1461, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLI_D |
| 3571 | { 1460, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLLI_B |
| 3572 | { 1459, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_WU |
| 3573 | { 1458, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_W |
| 3574 | { 1457, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_HU |
| 3575 | { 1456, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_H |
| 3576 | { 1455, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_DU |
| 3577 | { 1454, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_D |
| 3578 | { 1453, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_BU |
| 3579 | { 1452, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSLE_B |
| 3580 | { 1451, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_WU |
| 3581 | { 1450, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_W |
| 3582 | { 1449, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_HU |
| 3583 | { 1448, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_H |
| 3584 | { 1447, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_DU |
| 3585 | { 1446, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_D |
| 3586 | { 1445, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_BU |
| 3587 | { 1444, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSLEI_B |
| 3588 | { 1443, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSIGNCOV_W |
| 3589 | { 1442, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSIGNCOV_H |
| 3590 | { 1441, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSIGNCOV_D |
| 3591 | { 1440, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSIGNCOV_B |
| 3592 | { 1439, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VSHUF_W |
| 3593 | { 1438, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VSHUF_H |
| 3594 | { 1437, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VSHUF_D |
| 3595 | { 1436, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VSHUF_B |
| 3596 | { 1435, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSHUF4I_W |
| 3597 | { 1434, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSHUF4I_H |
| 3598 | { 1433, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VSHUF4I_D |
| 3599 | { 1432, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSHUF4I_B |
| 3600 | { 1431, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETNEZ_V |
| 3601 | { 1430, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETEQZ_V |
| 3602 | { 1429, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETANYEQZ_W |
| 3603 | { 1428, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETANYEQZ_H |
| 3604 | { 1427, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETANYEQZ_D |
| 3605 | { 1426, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETANYEQZ_B |
| 3606 | { 1425, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETALLNEZ_W |
| 3607 | { 1424, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETALLNEZ_H |
| 3608 | { 1423, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETALLNEZ_D |
| 3609 | { 1422, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 393, 0, 0, 0x0ULL }, // VSETALLNEZ_B |
| 3610 | { 1421, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSEQ_W |
| 3611 | { 1420, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSEQ_H |
| 3612 | { 1419, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSEQ_D |
| 3613 | { 1418, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSEQ_B |
| 3614 | { 1417, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSEQI_W |
| 3615 | { 1416, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSEQI_H |
| 3616 | { 1415, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSEQI_D |
| 3617 | { 1414, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSEQI_B |
| 3618 | { 1413, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_WU |
| 3619 | { 1412, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_W |
| 3620 | { 1411, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_HU |
| 3621 | { 1410, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_H |
| 3622 | { 1409, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_DU |
| 3623 | { 1408, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_D |
| 3624 | { 1407, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_BU |
| 3625 | { 1406, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VSAT_B |
| 3626 | { 1405, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_WU |
| 3627 | { 1404, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_W |
| 3628 | { 1403, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_HU |
| 3629 | { 1402, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_H |
| 3630 | { 1401, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_DU |
| 3631 | { 1400, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_D |
| 3632 | { 1399, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_BU |
| 3633 | { 1398, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VSADD_B |
| 3634 | { 1397, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VROTR_W |
| 3635 | { 1396, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VROTR_H |
| 3636 | { 1395, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VROTR_D |
| 3637 | { 1394, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VROTR_B |
| 3638 | { 1393, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VROTRI_W |
| 3639 | { 1392, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VROTRI_H |
| 3640 | { 1391, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VROTRI_D |
| 3641 | { 1390, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VROTRI_B |
| 3642 | { 1389, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 390, 0, 0, 0x0ULL }, // VREPLVE_W |
| 3643 | { 1388, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 390, 0, 0, 0x0ULL }, // VREPLVE_H |
| 3644 | { 1387, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 390, 0, 0, 0x0ULL }, // VREPLVE_D |
| 3645 | { 1386, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 390, 0, 0, 0x0ULL }, // VREPLVE_B |
| 3646 | { 1385, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VREPLVEI_W |
| 3647 | { 1384, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VREPLVEI_H |
| 3648 | { 1383, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VREPLVEI_D |
| 3649 | { 1382, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VREPLVEI_B |
| 3650 | { 1381, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 388, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // VREPLGR2VR_W |
| 3651 | { 1380, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 388, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // VREPLGR2VR_H |
| 3652 | { 1379, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 388, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // VREPLGR2VR_D |
| 3653 | { 1378, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 388, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // VREPLGR2VR_B |
| 3654 | { 1377, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_WU |
| 3655 | { 1376, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_W |
| 3656 | { 1375, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_HU |
| 3657 | { 1374, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_H |
| 3658 | { 1373, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_DU |
| 3659 | { 1372, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_D |
| 3660 | { 1371, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_BU |
| 3661 | { 1370, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 385, 0, 0, 0x0ULL }, // VPICKVE2GR_B |
| 3662 | { 1369, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKOD_W |
| 3663 | { 1368, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKOD_H |
| 3664 | { 1367, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKOD_D |
| 3665 | { 1366, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKOD_B |
| 3666 | { 1365, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKEV_W |
| 3667 | { 1364, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKEV_H |
| 3668 | { 1363, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKEV_D |
| 3669 | { 1362, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPICKEV_B |
| 3670 | { 1361, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VPERMI_W |
| 3671 | { 1360, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VPCNT_W |
| 3672 | { 1359, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VPCNT_H |
| 3673 | { 1358, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VPCNT_D |
| 3674 | { 1357, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VPCNT_B |
| 3675 | { 1356, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKOD_W |
| 3676 | { 1355, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKOD_H |
| 3677 | { 1354, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKOD_D |
| 3678 | { 1353, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKOD_B |
| 3679 | { 1352, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKEV_W |
| 3680 | { 1351, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKEV_H |
| 3681 | { 1350, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKEV_D |
| 3682 | { 1349, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VPACKEV_B |
| 3683 | { 1348, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VOR_V |
| 3684 | { 1347, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VORN_V |
| 3685 | { 1346, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VORI_B |
| 3686 | { 1345, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VNOR_V |
| 3687 | { 1344, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VNORI_B |
| 3688 | { 1343, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VNEG_W |
| 3689 | { 1342, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VNEG_H |
| 3690 | { 1341, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VNEG_D |
| 3691 | { 1340, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VNEG_B |
| 3692 | { 1339, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUL_W |
| 3693 | { 1338, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUL_H |
| 3694 | { 1337, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUL_D |
| 3695 | { 1336, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUL_B |
| 3696 | { 1335, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_W_HU_H |
| 3697 | { 1334, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_W_HU |
| 3698 | { 1333, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_W_H |
| 3699 | { 1332, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_Q_DU_D |
| 3700 | { 1331, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_Q_DU |
| 3701 | { 1330, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_Q_D |
| 3702 | { 1329, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_H_BU_B |
| 3703 | { 1328, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_H_BU |
| 3704 | { 1327, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_H_B |
| 3705 | { 1326, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_D_WU_W |
| 3706 | { 1325, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_D_WU |
| 3707 | { 1324, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWOD_D_W |
| 3708 | { 1323, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_W_HU_H |
| 3709 | { 1322, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_W_HU |
| 3710 | { 1321, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_W_H |
| 3711 | { 1320, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_Q_DU_D |
| 3712 | { 1319, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_Q_DU |
| 3713 | { 1318, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_Q_D |
| 3714 | { 1317, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_H_BU_B |
| 3715 | { 1316, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_H_BU |
| 3716 | { 1315, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_H_B |
| 3717 | { 1314, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_D_WU_W |
| 3718 | { 1313, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_D_WU |
| 3719 | { 1312, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMULWEV_D_W |
| 3720 | { 1311, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_WU |
| 3721 | { 1310, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_W |
| 3722 | { 1309, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_HU |
| 3723 | { 1308, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_H |
| 3724 | { 1307, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_DU |
| 3725 | { 1306, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_D |
| 3726 | { 1305, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_BU |
| 3727 | { 1304, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMUH_B |
| 3728 | { 1303, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMSUB_W |
| 3729 | { 1302, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMSUB_H |
| 3730 | { 1301, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMSUB_D |
| 3731 | { 1300, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMSUB_B |
| 3732 | { 1299, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKNZ_B |
| 3733 | { 1298, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKLTZ_W |
| 3734 | { 1297, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKLTZ_H |
| 3735 | { 1296, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKLTZ_D |
| 3736 | { 1295, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKLTZ_B |
| 3737 | { 1294, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VMSKGEZ_B |
| 3738 | { 1293, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_WU |
| 3739 | { 1292, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_W |
| 3740 | { 1291, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_HU |
| 3741 | { 1290, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_H |
| 3742 | { 1289, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_DU |
| 3743 | { 1288, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_D |
| 3744 | { 1287, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_BU |
| 3745 | { 1286, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMOD_B |
| 3746 | { 1285, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_WU |
| 3747 | { 1284, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_W |
| 3748 | { 1283, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_HU |
| 3749 | { 1282, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_H |
| 3750 | { 1281, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_DU |
| 3751 | { 1280, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_D |
| 3752 | { 1279, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_BU |
| 3753 | { 1278, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMIN_B |
| 3754 | { 1277, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_WU |
| 3755 | { 1276, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_W |
| 3756 | { 1275, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_HU |
| 3757 | { 1274, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_H |
| 3758 | { 1273, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_DU |
| 3759 | { 1272, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_D |
| 3760 | { 1271, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_BU |
| 3761 | { 1270, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMINI_B |
| 3762 | { 1269, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_WU |
| 3763 | { 1268, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_W |
| 3764 | { 1267, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_HU |
| 3765 | { 1266, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_H |
| 3766 | { 1265, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_DU |
| 3767 | { 1264, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_D |
| 3768 | { 1263, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_BU |
| 3769 | { 1262, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VMAX_B |
| 3770 | { 1261, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_WU |
| 3771 | { 1260, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_W |
| 3772 | { 1259, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_HU |
| 3773 | { 1258, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_H |
| 3774 | { 1257, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_DU |
| 3775 | { 1256, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_D |
| 3776 | { 1255, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_BU |
| 3777 | { 1254, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VMAXI_B |
| 3778 | { 1253, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADD_W |
| 3779 | { 1252, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADD_H |
| 3780 | { 1251, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADD_D |
| 3781 | { 1250, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADD_B |
| 3782 | { 1249, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_W_HU_H |
| 3783 | { 1248, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_W_HU |
| 3784 | { 1247, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_W_H |
| 3785 | { 1246, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_Q_DU_D |
| 3786 | { 1245, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_Q_DU |
| 3787 | { 1244, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_Q_D |
| 3788 | { 1243, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_H_BU_B |
| 3789 | { 1242, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_H_BU |
| 3790 | { 1241, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_H_B |
| 3791 | { 1240, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_D_WU_W |
| 3792 | { 1239, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_D_WU |
| 3793 | { 1238, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWOD_D_W |
| 3794 | { 1237, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_W_HU_H |
| 3795 | { 1236, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_W_HU |
| 3796 | { 1235, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_W_H |
| 3797 | { 1234, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_Q_DU_D |
| 3798 | { 1233, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_Q_DU |
| 3799 | { 1232, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_Q_D |
| 3800 | { 1231, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_H_BU_B |
| 3801 | { 1230, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_H_BU |
| 3802 | { 1229, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_H_B |
| 3803 | { 1228, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_D_WU_W |
| 3804 | { 1227, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_D_WU |
| 3805 | { 1226, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VMADDWEV_D_W |
| 3806 | { 1225, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 382, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDX |
| 3807 | { 1224, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDREPL_W |
| 3808 | { 1223, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDREPL_H |
| 3809 | { 1222, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDREPL_D |
| 3810 | { 1221, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLDREPL_B |
| 3811 | { 1220, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // VLDI |
| 3812 | { 1219, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 379, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // VLD |
| 3813 | { 1218, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 375, 0, 0, 0x0ULL }, // VINSGR2VR_W |
| 3814 | { 1217, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 375, 0, 0, 0x0ULL }, // VINSGR2VR_H |
| 3815 | { 1216, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 375, 0, 0, 0x0ULL }, // VINSGR2VR_D |
| 3816 | { 1215, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 375, 0, 0, 0x0ULL }, // VINSGR2VR_B |
| 3817 | { 1214, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVL_W |
| 3818 | { 1213, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVL_H |
| 3819 | { 1212, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVL_D |
| 3820 | { 1211, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVL_B |
| 3821 | { 1210, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVH_W |
| 3822 | { 1209, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVH_H |
| 3823 | { 1208, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVH_D |
| 3824 | { 1207, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VILVH_B |
| 3825 | { 1206, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_W_H |
| 3826 | { 1205, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_WU_HU |
| 3827 | { 1204, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_Q_D |
| 3828 | { 1203, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_QU_DU |
| 3829 | { 1202, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_H_B |
| 3830 | { 1201, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_HU_BU |
| 3831 | { 1200, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_D_W |
| 3832 | { 1199, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHSUBW_DU_WU |
| 3833 | { 1198, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_W_H |
| 3834 | { 1197, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_WU_HU |
| 3835 | { 1196, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_Q_D |
| 3836 | { 1195, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_QU_DU |
| 3837 | { 1194, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_H_B |
| 3838 | { 1193, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_HU_BU |
| 3839 | { 1192, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_D_W |
| 3840 | { 1191, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VHADDW_DU_WU |
| 3841 | { 1190, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINT_W_S |
| 3842 | { 1189, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINT_W_D |
| 3843 | { 1188, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINT_WU_S |
| 3844 | { 1187, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINT_L_D |
| 3845 | { 1186, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINT_LU_D |
| 3846 | { 1185, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZ_W_S |
| 3847 | { 1184, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINTRZ_W_D |
| 3848 | { 1183, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZ_WU_S |
| 3849 | { 1182, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZ_L_D |
| 3850 | { 1181, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZ_LU_D |
| 3851 | { 1180, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZL_L_S |
| 3852 | { 1179, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRZH_L_S |
| 3853 | { 1178, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRP_W_S |
| 3854 | { 1177, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINTRP_W_D |
| 3855 | { 1176, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRP_L_D |
| 3856 | { 1175, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRPL_L_S |
| 3857 | { 1174, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRPH_L_S |
| 3858 | { 1173, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRNE_W_S |
| 3859 | { 1172, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINTRNE_W_D |
| 3860 | { 1171, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRNE_L_D |
| 3861 | { 1170, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRNEL_L_S |
| 3862 | { 1169, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRNEH_L_S |
| 3863 | { 1168, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRM_W_S |
| 3864 | { 1167, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFTINTRM_W_D |
| 3865 | { 1166, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRM_L_D |
| 3866 | { 1165, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRML_L_S |
| 3867 | { 1164, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTRMH_L_S |
| 3868 | { 1163, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTL_L_S |
| 3869 | { 1162, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFTINTH_L_S |
| 3870 | { 1161, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFSUB_S |
| 3871 | { 1160, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFSUB_D |
| 3872 | { 1159, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFSQRT_S |
| 3873 | { 1158, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFSQRT_D |
| 3874 | { 1157, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VFRSTP_H |
| 3875 | { 1156, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 371, 0, 0, 0x0ULL }, // VFRSTP_B |
| 3876 | { 1155, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VFRSTPI_H |
| 3877 | { 1154, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VFRSTPI_B |
| 3878 | { 1153, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRSQRT_S |
| 3879 | { 1152, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRSQRT_D |
| 3880 | { 1151, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRSQRTE_S |
| 3881 | { 1150, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRSQRTE_D |
| 3882 | { 1149, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINT_S |
| 3883 | { 1148, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINT_D |
| 3884 | { 1147, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRZ_S |
| 3885 | { 1146, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRZ_D |
| 3886 | { 1145, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRP_S |
| 3887 | { 1144, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRP_D |
| 3888 | { 1143, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRNE_S |
| 3889 | { 1142, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRNE_D |
| 3890 | { 1141, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRM_S |
| 3891 | { 1140, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRINTRM_D |
| 3892 | { 1139, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRECIP_S |
| 3893 | { 1138, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRECIP_D |
| 3894 | { 1137, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRECIPE_S |
| 3895 | { 1136, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFRECIPE_D |
| 3896 | { 1135, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFNMSUB_S |
| 3897 | { 1134, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFNMSUB_D |
| 3898 | { 1133, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFNMADD_S |
| 3899 | { 1132, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFNMADD_D |
| 3900 | { 1131, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMUL_S |
| 3901 | { 1130, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMUL_D |
| 3902 | { 1129, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFMSUB_S |
| 3903 | { 1128, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFMSUB_D |
| 3904 | { 1127, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMIN_S |
| 3905 | { 1126, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMIN_D |
| 3906 | { 1125, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMINA_S |
| 3907 | { 1124, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMINA_D |
| 3908 | { 1123, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMAX_S |
| 3909 | { 1122, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMAX_D |
| 3910 | { 1121, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMAXA_S |
| 3911 | { 1120, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFMAXA_D |
| 3912 | { 1119, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFMADD_S |
| 3913 | { 1118, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VFMADD_D |
| 3914 | { 1117, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFLOGB_S |
| 3915 | { 1116, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFLOGB_D |
| 3916 | { 1115, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINT_S_WU |
| 3917 | { 1114, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINT_S_W |
| 3918 | { 1113, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFFINT_S_L |
| 3919 | { 1112, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINT_D_LU |
| 3920 | { 1111, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINT_D_L |
| 3921 | { 1110, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINTL_D_W |
| 3922 | { 1109, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFFINTH_D_W |
| 3923 | { 1108, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFDIV_S |
| 3924 | { 1107, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFDIV_D |
| 3925 | { 1106, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCVT_S_D |
| 3926 | { 1105, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCVT_H_S |
| 3927 | { 1104, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCVTL_S_H |
| 3928 | { 1103, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCVTL_D_S |
| 3929 | { 1102, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCVTH_S_H |
| 3930 | { 1101, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCVTH_D_S |
| 3931 | { 1100, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUN_S |
| 3932 | { 1099, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUN_D |
| 3933 | { 1098, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUNE_S |
| 3934 | { 1097, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUNE_D |
| 3935 | { 1096, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SULT_S |
| 3936 | { 1095, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SULT_D |
| 3937 | { 1094, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SULE_S |
| 3938 | { 1093, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SULE_D |
| 3939 | { 1092, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUEQ_S |
| 3940 | { 1091, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SUEQ_D |
| 3941 | { 1090, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SOR_S |
| 3942 | { 1089, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SOR_D |
| 3943 | { 1088, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SNE_S |
| 3944 | { 1087, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SNE_D |
| 3945 | { 1086, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SLT_S |
| 3946 | { 1085, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SLT_D |
| 3947 | { 1084, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SLE_S |
| 3948 | { 1083, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SLE_D |
| 3949 | { 1082, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SEQ_S |
| 3950 | { 1081, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SEQ_D |
| 3951 | { 1080, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SAF_S |
| 3952 | { 1079, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_SAF_D |
| 3953 | { 1078, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUN_S |
| 3954 | { 1077, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUN_D |
| 3955 | { 1076, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUNE_S |
| 3956 | { 1075, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUNE_D |
| 3957 | { 1074, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CULT_S |
| 3958 | { 1073, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CULT_D |
| 3959 | { 1072, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CULE_S |
| 3960 | { 1071, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CULE_D |
| 3961 | { 1070, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUEQ_S |
| 3962 | { 1069, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CUEQ_D |
| 3963 | { 1068, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_COR_S |
| 3964 | { 1067, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_COR_D |
| 3965 | { 1066, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CNE_S |
| 3966 | { 1065, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CNE_D |
| 3967 | { 1064, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CLT_S |
| 3968 | { 1063, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CLT_D |
| 3969 | { 1062, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CLE_S |
| 3970 | { 1061, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CLE_D |
| 3971 | { 1060, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CEQ_S |
| 3972 | { 1059, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CEQ_D |
| 3973 | { 1058, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CAF_S |
| 3974 | { 1057, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFCMP_CAF_D |
| 3975 | { 1056, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCLASS_S |
| 3976 | { 1055, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VFCLASS_D |
| 3977 | { 1054, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFADD_S |
| 3978 | { 1053, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VFADD_D |
| 3979 | { 1052, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VEXTRINS_W |
| 3980 | { 1051, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VEXTRINS_H |
| 3981 | { 1050, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VEXTRINS_D |
| 3982 | { 1049, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VEXTRINS_B |
| 3983 | { 1048, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTL_Q_D |
| 3984 | { 1047, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTL_QU_DU |
| 3985 | { 1046, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_W_H |
| 3986 | { 1045, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_WU_HU |
| 3987 | { 1044, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_Q_D |
| 3988 | { 1043, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_QU_DU |
| 3989 | { 1042, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_H_B |
| 3990 | { 1041, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_HU_BU |
| 3991 | { 1040, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_D_W |
| 3992 | { 1039, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VEXTH_DU_WU |
| 3993 | { 1038, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_W_H |
| 3994 | { 1037, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_W_B |
| 3995 | { 1036, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_WU_HU |
| 3996 | { 1035, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_WU_BU |
| 3997 | { 1034, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_H_B |
| 3998 | { 1033, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_HU_BU |
| 3999 | { 1032, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_D_W |
| 4000 | { 1031, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_D_H |
| 4001 | { 1030, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_D_B |
| 4002 | { 1029, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_DU_WU |
| 4003 | { 1028, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_DU_HU |
| 4004 | { 1027, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 369, 0, 0, 0x0ULL }, // VEXT2XV_DU_BU |
| 4005 | { 1026, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_WU |
| 4006 | { 1025, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_W |
| 4007 | { 1024, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_HU |
| 4008 | { 1023, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_H |
| 4009 | { 1022, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_DU |
| 4010 | { 1021, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_D |
| 4011 | { 1020, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_BU |
| 4012 | { 1019, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VDIV_B |
| 4013 | { 1018, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLZ_W |
| 4014 | { 1017, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLZ_H |
| 4015 | { 1016, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLZ_D |
| 4016 | { 1015, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLZ_B |
| 4017 | { 1014, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLO_W |
| 4018 | { 1013, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLO_H |
| 4019 | { 1012, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLO_D |
| 4020 | { 1011, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 367, 0, 0, 0x0ULL }, // VCLO_B |
| 4021 | { 1010, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBSRL_V |
| 4022 | { 1009, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBSLL_V |
| 4023 | { 1008, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITSET_W |
| 4024 | { 1007, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITSET_H |
| 4025 | { 1006, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITSET_D |
| 4026 | { 1005, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITSET_B |
| 4027 | { 1004, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITSETI_W |
| 4028 | { 1003, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITSETI_H |
| 4029 | { 1002, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITSETI_D |
| 4030 | { 1001, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITSETI_B |
| 4031 | { 1000, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 363, 0, 0, 0x0ULL }, // VBITSEL_V |
| 4032 | { 999, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 359, 0, 0, 0x0ULL }, // VBITSELI_B |
| 4033 | { 998, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITREV_W |
| 4034 | { 997, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITREV_H |
| 4035 | { 996, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITREV_D |
| 4036 | { 995, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITREV_B |
| 4037 | { 994, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITREVI_W |
| 4038 | { 993, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITREVI_H |
| 4039 | { 992, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITREVI_D |
| 4040 | { 991, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITREVI_B |
| 4041 | { 990, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITCLR_W |
| 4042 | { 989, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITCLR_H |
| 4043 | { 988, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITCLR_D |
| 4044 | { 987, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VBITCLR_B |
| 4045 | { 986, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITCLRI_W |
| 4046 | { 985, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITCLRI_H |
| 4047 | { 984, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITCLRI_D |
| 4048 | { 983, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VBITCLRI_B |
| 4049 | { 982, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_WU |
| 4050 | { 981, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_W |
| 4051 | { 980, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_HU |
| 4052 | { 979, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_H |
| 4053 | { 978, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_DU |
| 4054 | { 977, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_D |
| 4055 | { 976, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_BU |
| 4056 | { 975, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVG_B |
| 4057 | { 974, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_WU |
| 4058 | { 973, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_W |
| 4059 | { 972, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_HU |
| 4060 | { 971, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_H |
| 4061 | { 970, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_DU |
| 4062 | { 969, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_D |
| 4063 | { 968, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_BU |
| 4064 | { 967, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAVGR_B |
| 4065 | { 966, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VAND_V |
| 4066 | { 965, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VANDN_V |
| 4067 | { 964, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VANDI_B |
| 4068 | { 963, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_W |
| 4069 | { 962, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_Q |
| 4070 | { 961, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_H |
| 4071 | { 960, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_D |
| 4072 | { 959, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADD_B |
| 4073 | { 958, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_W_HU_H |
| 4074 | { 957, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_W_HU |
| 4075 | { 956, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_W_H |
| 4076 | { 955, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_Q_DU_D |
| 4077 | { 954, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_Q_DU |
| 4078 | { 953, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_Q_D |
| 4079 | { 952, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_H_BU_B |
| 4080 | { 951, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_H_BU |
| 4081 | { 950, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_H_B |
| 4082 | { 949, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_D_WU_W |
| 4083 | { 948, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_D_WU |
| 4084 | { 947, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWOD_D_W |
| 4085 | { 946, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_W_HU_H |
| 4086 | { 945, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_W_HU |
| 4087 | { 944, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_W_H |
| 4088 | { 943, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_Q_DU_D |
| 4089 | { 942, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_Q_DU |
| 4090 | { 941, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_Q_D |
| 4091 | { 940, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_H_BU_B |
| 4092 | { 939, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_H_BU |
| 4093 | { 938, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_H_B |
| 4094 | { 937, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_D_WU_W |
| 4095 | { 936, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_D_WU |
| 4096 | { 935, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDWEV_D_W |
| 4097 | { 934, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VADDI_WU |
| 4098 | { 933, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VADDI_HU |
| 4099 | { 932, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VADDI_DU |
| 4100 | { 931, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 356, 0, 0, 0x0ULL }, // VADDI_BU |
| 4101 | { 930, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDA_W |
| 4102 | { 929, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDA_H |
| 4103 | { 928, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDA_D |
| 4104 | { 927, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VADDA_B |
| 4105 | { 926, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_WU |
| 4106 | { 925, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_W |
| 4107 | { 924, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_HU |
| 4108 | { 923, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_H |
| 4109 | { 922, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_DU |
| 4110 | { 921, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_D |
| 4111 | { 920, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_BU |
| 4112 | { 919, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 353, 0, 0, 0x0ULL }, // VABSD_B |
| 4113 | { 918, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UD |
| 4114 | { 917, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBWR |
| 4115 | { 916, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBSRCH |
| 4116 | { 915, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBRD |
| 4117 | { 914, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBFLUSH |
| 4118 | { 913, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBFILL |
| 4119 | { 912, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TLBCLR |
| 4120 | { 911, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SYSCALL |
| 4121 | { 910, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SUB_W |
| 4122 | { 909, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SUB_D |
| 4123 | { 908, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // ST_W |
| 4124 | { 907, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // ST_H |
| 4125 | { 906, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // ST_D |
| 4126 | { 905, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // ST_B |
| 4127 | { 904, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STX_W |
| 4128 | { 903, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STX_H |
| 4129 | { 902, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STX_D |
| 4130 | { 901, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STX_B |
| 4131 | { 900, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STR_W |
| 4132 | { 899, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STR_D |
| 4133 | { 898, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STPTR_W |
| 4134 | { 897, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STPTR_D |
| 4135 | { 896, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STL_W |
| 4136 | { 895, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STL_D |
| 4137 | { 894, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STLE_W |
| 4138 | { 893, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STLE_H |
| 4139 | { 892, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STLE_D |
| 4140 | { 891, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STLE_B |
| 4141 | { 890, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STGT_W |
| 4142 | { 889, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STGT_H |
| 4143 | { 888, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STGT_D |
| 4144 | { 887, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STGT_B |
| 4145 | { 886, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SRL_W |
| 4146 | { 885, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SRL_D |
| 4147 | { 884, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SRLI_W |
| 4148 | { 883, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SRLI_D |
| 4149 | { 882, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SRA_W |
| 4150 | { 881, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SRA_D |
| 4151 | { 880, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SRAI_W |
| 4152 | { 879, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SRAI_D |
| 4153 | { 878, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SLTUI |
| 4154 | { 877, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SLTU |
| 4155 | { 876, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SLTI |
| 4156 | { 875, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SLT |
| 4157 | { 874, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SLL_W |
| 4158 | { 873, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SLL_D |
| 4159 | { 872, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SLLI_W |
| 4160 | { 871, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // SLLI_D |
| 4161 | { 870, 1, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 352, 0, 0, 0x0ULL }, // SET_CFR_TRUE |
| 4162 | { 869, 1, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 352, 0, 0, 0x0ULL }, // SET_CFR_FALSE |
| 4163 | { 868, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // SETX86LOOPNE |
| 4164 | { 867, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // SETX86LOOPE |
| 4165 | { 866, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // SETX86J |
| 4166 | { 865, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // SETARMJ |
| 4167 | { 864, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 344, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SC_W |
| 4168 | { 863, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 348, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SC_Q |
| 4169 | { 862, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 344, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SC_D |
| 4170 | { 861, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 341, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SCREL_W |
| 4171 | { 860, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 341, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // SCREL_D |
| 4172 | { 859, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SBC_W |
| 4173 | { 858, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SBC_H |
| 4174 | { 857, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SBC_D |
| 4175 | { 856, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // SBC_B |
| 4176 | { 855, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ROTR_W |
| 4177 | { 854, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ROTR_H |
| 4178 | { 853, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ROTR_D |
| 4179 | { 852, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ROTR_B |
| 4180 | { 851, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ROTRI_W |
| 4181 | { 850, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ROTRI_H |
| 4182 | { 849, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ROTRI_D |
| 4183 | { 848, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ROTRI_B |
| 4184 | { 847, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVH_D |
| 4185 | { 846, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVH_2W |
| 4186 | { 845, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVB_D |
| 4187 | { 844, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVB_4H |
| 4188 | { 843, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVB_2W |
| 4189 | { 842, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // REVB_2H |
| 4190 | { 841, 2, 2, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDTIME_D |
| 4191 | { 840, 2, 2, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDTIMEL_W |
| 4192 | { 839, 2, 2, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDTIMEH_W |
| 4193 | { 838, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // RCR_W |
| 4194 | { 837, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // RCR_H |
| 4195 | { 836, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // RCR_D |
| 4196 | { 835, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // RCR_B |
| 4197 | { 834, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // RCRI_W |
| 4198 | { 833, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // RCRI_H |
| 4199 | { 832, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // RCRI_D |
| 4200 | { 831, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // RCRI_B |
| 4201 | { 830, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 338, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PRELDX |
| 4202 | { 829, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 36, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PRELD |
| 4203 | { 828, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // PCALAU12I |
| 4204 | { 827, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // PCADDU18I |
| 4205 | { 826, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // PCADDU12I |
| 4206 | { 825, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // PCADDI |
| 4207 | { 824, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ORN |
| 4208 | { 823, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // ORI |
| 4209 | { 822, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // OR |
| 4210 | { 821, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // NOR |
| 4211 | { 820, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MUL_W |
| 4212 | { 819, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MUL_D |
| 4213 | { 818, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULW_D_WU |
| 4214 | { 817, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULW_D_W |
| 4215 | { 816, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULH_WU |
| 4216 | { 815, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULH_W |
| 4217 | { 814, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULH_DU |
| 4218 | { 813, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MULH_D |
| 4219 | { 812, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 336, 0, 0, 0x0ULL }, // MOVSCR2GR |
| 4220 | { 811, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 334, 0, 0, 0x0ULL }, // MOVGR2SCR |
| 4221 | { 810, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 330, 0, 0, 0x0ULL }, // MOVGR2FR_W_64 |
| 4222 | { 809, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 332, 0, 0, 0x0ULL }, // MOVGR2FR_W |
| 4223 | { 808, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 330, 0, 0, 0x0ULL }, // MOVGR2FR_D |
| 4224 | { 807, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 327, 0, 0, 0x0ULL }, // MOVGR2FRH_W |
| 4225 | { 806, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 325, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MOVGR2FCSR |
| 4226 | { 805, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 323, 0, 0, 0x0ULL }, // MOVGR2CF |
| 4227 | { 804, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 319, 0, 0, 0x0ULL }, // MOVFRH2GR_S |
| 4228 | { 803, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 319, 0, 0, 0x0ULL }, // MOVFR2GR_S_64 |
| 4229 | { 802, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 321, 0, 0, 0x0ULL }, // MOVFR2GR_S |
| 4230 | { 801, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 319, 0, 0, 0x0ULL }, // MOVFR2GR_D |
| 4231 | { 800, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 317, 0, 0, 0x0ULL }, // MOVFR2CF_xS |
| 4232 | { 799, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 315, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MOVFCSR2GR |
| 4233 | { 798, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 313, 0, 0, 0x0ULL }, // MOVCF2GR |
| 4234 | { 797, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 311, 0, 0, 0x0ULL }, // MOVCF2FR_xS |
| 4235 | { 796, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // MOD_WU |
| 4236 | { 795, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // MOD_W |
| 4237 | { 794, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // MOD_DU |
| 4238 | { 793, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // MOD_D |
| 4239 | { 792, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MASKNEZ |
| 4240 | { 791, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // MASKEQZ |
| 4241 | { 790, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // LU52I_D |
| 4242 | { 789, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 259, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // LU32I_D |
| 4243 | { 788, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // LU12I_W |
| 4244 | { 787, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LL_W |
| 4245 | { 786, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LL_D |
| 4246 | { 785, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LLACQ_W |
| 4247 | { 784, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LLACQ_D |
| 4248 | { 783, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_WU |
| 4249 | { 782, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_W |
| 4250 | { 781, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_HU |
| 4251 | { 780, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_H |
| 4252 | { 779, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_D |
| 4253 | { 778, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_BU |
| 4254 | { 777, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LD_B |
| 4255 | { 776, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_WU |
| 4256 | { 775, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_W |
| 4257 | { 774, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_HU |
| 4258 | { 773, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_H |
| 4259 | { 772, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_D |
| 4260 | { 771, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_BU |
| 4261 | { 770, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDX_B |
| 4262 | { 769, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDR_W |
| 4263 | { 768, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDR_D |
| 4264 | { 767, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDPTR_W |
| 4265 | { 766, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDPTR_D |
| 4266 | { 765, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDPTE |
| 4267 | { 764, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDL_W |
| 4268 | { 763, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDL_D |
| 4269 | { 762, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDLE_W |
| 4270 | { 761, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDLE_H |
| 4271 | { 760, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDLE_D |
| 4272 | { 759, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDLE_B |
| 4273 | { 758, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDGT_W |
| 4274 | { 757, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDGT_H |
| 4275 | { 756, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDGT_D |
| 4276 | { 755, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDGT_B |
| 4277 | { 754, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDIR |
| 4278 | { 753, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0, 0x0ULL }, // JISCR1 |
| 4279 | { 752, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0, 0x0ULL }, // JISCR0 |
| 4280 | { 751, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // JIRL |
| 4281 | { 750, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRWR_W |
| 4282 | { 749, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRWR_H |
| 4283 | { 748, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRWR_D |
| 4284 | { 747, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRWR_B |
| 4285 | { 746, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRRD_W |
| 4286 | { 745, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRRD_H |
| 4287 | { 744, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRRD_D |
| 4288 | { 743, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IOCSRRD_B |
| 4289 | { 742, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INVTLB |
| 4290 | { 741, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IDLE |
| 4291 | { 740, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // IBAR |
| 4292 | { 739, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // HVCL |
| 4293 | { 738, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GTLBFLUSH |
| 4294 | { 737, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 262, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GCSRXCHG |
| 4295 | { 736, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 259, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GCSRWR |
| 4296 | { 735, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GCSRRD |
| 4297 | { 734, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINT_W_S |
| 4298 | { 733, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINT_W_D |
| 4299 | { 732, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINT_L_S |
| 4300 | { 731, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINT_L_D |
| 4301 | { 730, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINTRZ_W_S |
| 4302 | { 729, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINTRZ_W_D |
| 4303 | { 728, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINTRZ_L_S |
| 4304 | { 727, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINTRZ_L_D |
| 4305 | { 726, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINTRP_W_S |
| 4306 | { 725, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINTRP_W_D |
| 4307 | { 724, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINTRP_L_S |
| 4308 | { 723, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINTRP_L_D |
| 4309 | { 722, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINTRNE_W_S |
| 4310 | { 721, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINTRNE_W_D |
| 4311 | { 720, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINTRNE_L_S |
| 4312 | { 719, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINTRNE_L_D |
| 4313 | { 718, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FTINTRM_W_S |
| 4314 | { 717, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FTINTRM_W_D |
| 4315 | { 716, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FTINTRM_L_S |
| 4316 | { 715, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FTINTRM_L_D |
| 4317 | { 714, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FSUB_S |
| 4318 | { 713, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FSUB_D |
| 4319 | { 712, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 292, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FST_S |
| 4320 | { 711, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 289, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FST_D |
| 4321 | { 710, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTX_S |
| 4322 | { 709, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTX_D |
| 4323 | { 708, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTLE_S |
| 4324 | { 707, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTLE_D |
| 4325 | { 706, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTGT_S |
| 4326 | { 705, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // FSTGT_D |
| 4327 | { 704, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FSQRT_S |
| 4328 | { 703, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FSQRT_D |
| 4329 | { 702, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 307, 0, 0, 0x0ULL }, // FSEL_xS |
| 4330 | { 701, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 303, 0, 0, 0x0ULL }, // FSEL_xD |
| 4331 | { 700, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FSCALEB_S |
| 4332 | { 699, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FSCALEB_D |
| 4333 | { 698, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRSQRT_S |
| 4334 | { 697, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRSQRT_D |
| 4335 | { 696, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRSQRTE_S |
| 4336 | { 695, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRSQRTE_D |
| 4337 | { 694, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRINT_S |
| 4338 | { 693, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRINT_D |
| 4339 | { 692, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRECIP_S |
| 4340 | { 691, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRECIP_D |
| 4341 | { 690, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FRECIPE_S |
| 4342 | { 689, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FRECIPE_D |
| 4343 | { 688, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 299, 0, 0, 0x0ULL }, // FNMSUB_S |
| 4344 | { 687, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 295, 0, 0, 0x0ULL }, // FNMSUB_D |
| 4345 | { 686, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 299, 0, 0, 0x0ULL }, // FNMADD_S |
| 4346 | { 685, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 295, 0, 0, 0x0ULL }, // FNMADD_D |
| 4347 | { 684, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FNEG_S |
| 4348 | { 683, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FNEG_D |
| 4349 | { 682, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMUL_S |
| 4350 | { 681, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMUL_D |
| 4351 | { 680, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 299, 0, 0, 0x0ULL }, // FMSUB_S |
| 4352 | { 679, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 295, 0, 0, 0x0ULL }, // FMSUB_D |
| 4353 | { 678, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FMOV_S |
| 4354 | { 677, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FMOV_D |
| 4355 | { 676, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMIN_S |
| 4356 | { 675, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMIN_D |
| 4357 | { 674, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMINA_S |
| 4358 | { 673, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMINA_D |
| 4359 | { 672, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMAX_S |
| 4360 | { 671, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMAX_D |
| 4361 | { 670, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FMAXA_S |
| 4362 | { 669, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FMAXA_D |
| 4363 | { 668, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 299, 0, 0, 0x0ULL }, // FMADD_S |
| 4364 | { 667, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 295, 0, 0, 0x0ULL }, // FMADD_D |
| 4365 | { 666, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FLOGB_S |
| 4366 | { 665, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FLOGB_D |
| 4367 | { 664, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 292, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLD_S |
| 4368 | { 663, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 289, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLD_D |
| 4369 | { 662, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDX_S |
| 4370 | { 661, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDX_D |
| 4371 | { 660, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDLE_S |
| 4372 | { 659, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDLE_D |
| 4373 | { 658, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 286, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDGT_S |
| 4374 | { 657, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // FLDGT_D |
| 4375 | { 656, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FFINT_S_W |
| 4376 | { 655, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FFINT_S_L |
| 4377 | { 654, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FFINT_D_W |
| 4378 | { 653, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FFINT_D_L |
| 4379 | { 652, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FDIV_S |
| 4380 | { 651, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FDIV_D |
| 4381 | { 650, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FCVT_UD_D |
| 4382 | { 649, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 284, 0, 0, 0x0ULL }, // FCVT_S_D |
| 4383 | { 648, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FCVT_LD_D |
| 4384 | { 647, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 282, 0, 0, 0x0ULL }, // FCVT_D_S |
| 4385 | { 646, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FCVT_D_LD |
| 4386 | { 645, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FCOPYSIGN_S |
| 4387 | { 644, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FCOPYSIGN_D |
| 4388 | { 643, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SUN_S |
| 4389 | { 642, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SUN_D |
| 4390 | { 641, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SUNE_S |
| 4391 | { 640, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SUNE_D |
| 4392 | { 639, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SULT_S |
| 4393 | { 638, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SULT_D |
| 4394 | { 637, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SULE_S |
| 4395 | { 636, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SULE_D |
| 4396 | { 635, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SUEQ_S |
| 4397 | { 634, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SUEQ_D |
| 4398 | { 633, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SOR_S |
| 4399 | { 632, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SOR_D |
| 4400 | { 631, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SNE_S |
| 4401 | { 630, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SNE_D |
| 4402 | { 629, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SLT_S |
| 4403 | { 628, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SLT_D |
| 4404 | { 627, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SLE_S |
| 4405 | { 626, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SLE_D |
| 4406 | { 625, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SEQ_S |
| 4407 | { 624, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SEQ_D |
| 4408 | { 623, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_SAF_S |
| 4409 | { 622, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_SAF_D |
| 4410 | { 621, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CUN_S |
| 4411 | { 620, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CUN_D |
| 4412 | { 619, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CUNE_S |
| 4413 | { 618, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CUNE_D |
| 4414 | { 617, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CULT_S |
| 4415 | { 616, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CULT_D |
| 4416 | { 615, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CULE_S |
| 4417 | { 614, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CULE_D |
| 4418 | { 613, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CUEQ_S |
| 4419 | { 612, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CUEQ_D |
| 4420 | { 611, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_COR_S |
| 4421 | { 610, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_COR_D |
| 4422 | { 609, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CNE_S |
| 4423 | { 608, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CNE_D |
| 4424 | { 607, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CLT_S |
| 4425 | { 606, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CLT_D |
| 4426 | { 605, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CLE_S |
| 4427 | { 604, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CLE_D |
| 4428 | { 603, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CEQ_S |
| 4429 | { 602, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CEQ_D |
| 4430 | { 601, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 279, 0, 0, 0x0ULL }, // FCMP_CAF_S |
| 4431 | { 600, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 276, 0, 0, 0x0ULL }, // FCMP_CAF_D |
| 4432 | { 599, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FCLASS_S |
| 4433 | { 598, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FCLASS_D |
| 4434 | { 597, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 273, 0, 0, 0x0ULL }, // FADD_S |
| 4435 | { 596, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 270, 0, 0, 0x0ULL }, // FADD_D |
| 4436 | { 595, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 268, 0, 0, 0x0ULL }, // FABS_S |
| 4437 | { 594, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 266, 0, 0, 0x0ULL }, // FABS_D |
| 4438 | { 593, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // EXT_W_H |
| 4439 | { 592, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // EXT_W_B |
| 4440 | { 591, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ERTN |
| 4441 | { 590, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // DIV_WU |
| 4442 | { 589, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // DIV_W |
| 4443 | { 588, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // DIV_DU |
| 4444 | { 587, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // DIV_D |
| 4445 | { 586, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DBCL |
| 4446 | { 585, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DBAR |
| 4447 | { 584, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CTZ_W |
| 4448 | { 583, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CTZ_D |
| 4449 | { 582, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CTO_W |
| 4450 | { 581, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CTO_D |
| 4451 | { 580, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 262, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CSRXCHG |
| 4452 | { 579, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 259, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CSRWR |
| 4453 | { 578, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CSRRD |
| 4454 | { 577, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRC_W_W_W |
| 4455 | { 576, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRC_W_H_W |
| 4456 | { 575, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRC_W_D_W |
| 4457 | { 574, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRC_W_B_W |
| 4458 | { 573, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRCC_W_W_W |
| 4459 | { 572, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRCC_W_H_W |
| 4460 | { 571, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRCC_W_D_W |
| 4461 | { 570, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // CRCC_W_B_W |
| 4462 | { 569, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CPUCFG |
| 4463 | { 568, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CLZ_W |
| 4464 | { 567, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CLZ_D |
| 4465 | { 566, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CLO_W |
| 4466 | { 565, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // CLO_D |
| 4467 | { 564, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 36, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CACOP |
| 4468 | { 563, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // BYTEPICK_W |
| 4469 | { 562, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // BYTEPICK_D |
| 4470 | { 561, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 255, 0, 0, 0x0ULL }, // BSTRPICK_W |
| 4471 | { 560, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 255, 0, 0, 0x0ULL }, // BSTRPICK_D |
| 4472 | { 559, 5, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 250, 0, 0, 0x0ULL }, // BSTRINS_W |
| 4473 | { 558, 5, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 250, 0, 0, 0x0ULL }, // BSTRINS_D |
| 4474 | { 557, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BREAK |
| 4475 | { 556, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BNEZ |
| 4476 | { 555, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BNE |
| 4477 | { 554, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BLTU |
| 4478 | { 553, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BLT |
| 4479 | { 552, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Call), 0x0ULL }, // BL |
| 4480 | { 551, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // BITREV_W |
| 4481 | { 550, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // BITREV_D |
| 4482 | { 549, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // BITREV_8B |
| 4483 | { 548, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0, 0x0ULL }, // BITREV_4B |
| 4484 | { 547, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BGEU |
| 4485 | { 546, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BGE |
| 4486 | { 545, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BEQZ |
| 4487 | { 544, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BEQ |
| 4488 | { 543, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 248, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BCNEZ |
| 4489 | { 542, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 248, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // BCEQZ |
| 4490 | { 541, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // B |
| 4491 | { 540, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ASRTLE_D |
| 4492 | { 539, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ASRTGT_D |
| 4493 | { 538, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMXOR_W |
| 4494 | { 537, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSUB_W |
| 4495 | { 536, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSRL_W |
| 4496 | { 535, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // ARMSRLI_W |
| 4497 | { 534, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSRA_W |
| 4498 | { 533, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // ARMSRAI_W |
| 4499 | { 532, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSLL_W |
| 4500 | { 531, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // ARMSLLI_W |
| 4501 | { 530, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMSBC_W |
| 4502 | { 529, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMRRX_W |
| 4503 | { 528, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMROTR_W |
| 4504 | { 527, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 245, 0, 0, 0x0ULL }, // ARMROTRI_W |
| 4505 | { 526, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMOR_W |
| 4506 | { 525, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMNOT_W |
| 4507 | { 524, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMMTFLAG |
| 4508 | { 523, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMMOV_W |
| 4509 | { 522, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMMOV_D |
| 4510 | { 521, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMMOVE |
| 4511 | { 520, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0, 0x0ULL }, // ARMMFFLAG |
| 4512 | { 519, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMAND_W |
| 4513 | { 518, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMADD_W |
| 4514 | { 517, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ARMADC_W |
| 4515 | { 516, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ANDN |
| 4516 | { 515, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ANDI |
| 4517 | { 514, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // AND |
| 4518 | { 513, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMXOR__DB_W |
| 4519 | { 512, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMXOR__DB_D |
| 4520 | { 511, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMXOR_W |
| 4521 | { 510, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMXOR_D |
| 4522 | { 509, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP__DB_W |
| 4523 | { 508, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP__DB_H |
| 4524 | { 507, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP__DB_D |
| 4525 | { 506, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP__DB_B |
| 4526 | { 505, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP_W |
| 4527 | { 504, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP_H |
| 4528 | { 503, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP_D |
| 4529 | { 502, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMSWAP_B |
| 4530 | { 501, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMOR__DB_W |
| 4531 | { 500, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMOR__DB_D |
| 4532 | { 499, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMOR_W |
| 4533 | { 498, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMOR_D |
| 4534 | { 497, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN__DB_WU |
| 4535 | { 496, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN__DB_W |
| 4536 | { 495, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN__DB_DU |
| 4537 | { 494, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN__DB_D |
| 4538 | { 493, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN_WU |
| 4539 | { 492, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN_W |
| 4540 | { 491, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN_DU |
| 4541 | { 490, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMIN_D |
| 4542 | { 489, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX__DB_WU |
| 4543 | { 488, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX__DB_W |
| 4544 | { 487, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX__DB_DU |
| 4545 | { 486, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX__DB_D |
| 4546 | { 485, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX_WU |
| 4547 | { 484, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX_W |
| 4548 | { 483, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX_DU |
| 4549 | { 482, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMMAX_D |
| 4550 | { 481, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS__DB_W |
| 4551 | { 480, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS__DB_H |
| 4552 | { 479, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS__DB_D |
| 4553 | { 478, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS__DB_B |
| 4554 | { 477, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS_W |
| 4555 | { 476, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS_H |
| 4556 | { 475, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS_D |
| 4557 | { 474, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 241, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3ULL }, // AMCAS_B |
| 4558 | { 473, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMAND__DB_W |
| 4559 | { 472, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMAND__DB_D |
| 4560 | { 471, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMAND_W |
| 4561 | { 470, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMAND_D |
| 4562 | { 469, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD__DB_W |
| 4563 | { 468, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD__DB_H |
| 4564 | { 467, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD__DB_D |
| 4565 | { 466, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD__DB_B |
| 4566 | { 465, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD_W |
| 4567 | { 464, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD_H |
| 4568 | { 463, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD_D |
| 4569 | { 462, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 238, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1ULL }, // AMADD_B |
| 4570 | { 461, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // ALSL_WU |
| 4571 | { 460, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // ALSL_W |
| 4572 | { 459, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0, 0x0ULL }, // ALSL_D |
| 4573 | { 458, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADD_W |
| 4574 | { 457, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADD_D |
| 4575 | { 456, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ADDU16I_D |
| 4576 | { 455, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ADDU12I_W |
| 4577 | { 454, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ADDU12I_D |
| 4578 | { 453, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0, 0x0ULL }, // ADDI_W |
| 4579 | { 452, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // ADDI_D |
| 4580 | { 451, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADC_W |
| 4581 | { 450, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADC_H |
| 4582 | { 449, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADC_D |
| 4583 | { 448, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0, 0x0ULL }, // ADC_B |
| 4584 | { 447, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 236, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRFCSR |
| 4585 | { 446, 3, 2, 4, 0, 0, 0, LoongArchOpInfoBase + 233, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SplitPairF64Pseudo |
| 4586 | { 445, 6, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 227, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Select_GPR_Using_CC_GPR |
| 4587 | { 444, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // RDFCSR |
| 4588 | { 443, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoXVREPLI_W |
| 4589 | { 442, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoXVREPLI_H |
| 4590 | { 441, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoXVREPLI_D |
| 4591 | { 440, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 225, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoXVREPLI_B |
| 4592 | { 439, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKNEZ_B |
| 4593 | { 438, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKLTZ_W |
| 4594 | { 437, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKLTZ_H |
| 4595 | { 436, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKLTZ_D |
| 4596 | { 435, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKLTZ_B |
| 4597 | { 434, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKGEZ_B |
| 4598 | { 433, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVMSKEQZ_B |
| 4599 | { 432, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 221, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVINSGR2VR_H |
| 4600 | { 431, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 221, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVINSGR2VR_B |
| 4601 | { 430, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ_W |
| 4602 | { 429, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ_H |
| 4603 | { 428, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ_D |
| 4604 | { 427, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ_B |
| 4605 | { 426, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBZ |
| 4606 | { 425, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ_W |
| 4607 | { 424, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ_H |
| 4608 | { 423, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ_D |
| 4609 | { 422, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ_B |
| 4610 | { 421, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 219, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoXVBNZ |
| 4611 | { 420, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoVREPLI_W |
| 4612 | { 419, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoVREPLI_H |
| 4613 | { 418, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoVREPLI_D |
| 4614 | { 417, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 217, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoVREPLI_B |
| 4615 | { 416, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKNEZ_B |
| 4616 | { 415, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKLTZ_W |
| 4617 | { 414, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKLTZ_H |
| 4618 | { 413, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKLTZ_D |
| 4619 | { 412, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKLTZ_B |
| 4620 | { 411, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKGEZ_B |
| 4621 | { 410, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVMSKEQZ_B |
| 4622 | { 409, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ_W |
| 4623 | { 408, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ_H |
| 4624 | { 407, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ_D |
| 4625 | { 406, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ_B |
| 4626 | { 405, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBZ |
| 4627 | { 404, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ_W |
| 4628 | { 403, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ_H |
| 4629 | { 402, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ_D |
| 4630 | { 401, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ_B |
| 4631 | { 400, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 215, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoVBNZ |
| 4632 | { 399, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PseudoUNIMP |
| 4633 | { 398, 1, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL_SMALL |
| 4634 | { 397, 1, 0, 8, 0, 1, 1, LoongArchOpInfoBase + 0, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL_MEDIUM |
| 4635 | { 396, 1, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL_LARGE |
| 4636 | { 395, 1, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 214, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAILIndirect |
| 4637 | { 394, 2, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 34, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL36 |
| 4638 | { 393, 2, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 34, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL30 |
| 4639 | { 392, 2, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 34, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoTAIL |
| 4640 | { 391, 3, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 189, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoST_CFR |
| 4641 | { 390, 0, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoRET |
| 4642 | { 389, 7, 2, 44, 0, 0, 0, LoongArchOpInfoBase + 207, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedCmpXchg32 |
| 4643 | { 388, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicSwap32 |
| 4644 | { 387, 7, 3, 48, 0, 0, 0, LoongArchOpInfoBase + 200, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadUMin32 |
| 4645 | { 386, 7, 3, 48, 0, 0, 0, LoongArchOpInfoBase + 200, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadUMax32 |
| 4646 | { 385, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadSub32 |
| 4647 | { 384, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadNand32 |
| 4648 | { 383, 8, 3, 56, 0, 0, 0, LoongArchOpInfoBase + 192, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadMin32 |
| 4649 | { 382, 8, 3, 56, 0, 0, 0, LoongArchOpInfoBase + 192, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadMax32 |
| 4650 | { 381, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoMaskedAtomicLoadAdd32 |
| 4651 | { 380, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLI_W |
| 4652 | { 379, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLI_D |
| 4653 | { 378, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 189, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLD_CFR |
| 4654 | { 377, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_LE |
| 4655 | { 376, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_LD_LARGE |
| 4656 | { 375, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_LD |
| 4657 | { 374, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_TLS_IE_LARGE |
| 4658 | { 373, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_TLS_IE |
| 4659 | { 372, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_GD_LARGE |
| 4660 | { 371, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_TLS_GD |
| 4661 | { 370, 3, 1, 4, 0, 0, 2, LoongArchOpInfoBase + 186, 8, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoLA_TLS_DESC_LARGE |
| 4662 | { 369, 2, 1, 4, 0, 0, 1, LoongArchOpInfoBase + 34, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_TLS_DESC |
| 4663 | { 368, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_PCREL_LARGE |
| 4664 | { 367, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_PCREL |
| 4665 | { 366, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_GOT_LARGE |
| 4666 | { 365, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // PseudoLA_GOT |
| 4667 | { 364, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 186, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_ABS_LARGE |
| 4668 | { 363, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoLA_ABS |
| 4669 | { 362, 2, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 34, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoJIRL_TAIL |
| 4670 | { 361, 2, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 34, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoJIRL_CALL |
| 4671 | { 360, 3, 1, 4, 0, 1, 1, LoongArchOpInfoBase + 186, 6, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoDESC_CALL |
| 4672 | { 359, 2, 1, 12, 0, 0, 0, LoongArchOpInfoBase + 184, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoCopyCFR |
| 4673 | { 358, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoCmpXchg64 |
| 4674 | { 357, 6, 2, 36, 0, 0, 0, LoongArchOpInfoBase + 178, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoCmpXchg32 |
| 4675 | { 356, 8, 3, 36, 0, 0, 0, LoongArchOpInfoBase + 170, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoCmpXchg128Acquire |
| 4676 | { 355, 8, 3, 36, 0, 0, 0, LoongArchOpInfoBase + 170, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoCmpXchg128 |
| 4677 | { 354, 2, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 168, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // PseudoCTPOP |
| 4678 | { 353, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL_SMALL |
| 4679 | { 352, 1, 0, 8, 0, 0, 2, LoongArchOpInfoBase + 0, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL_MEDIUM |
| 4680 | { 351, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL_LARGE |
| 4681 | { 350, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 28, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALLIndirect |
| 4682 | { 349, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL36 |
| 4683 | { 348, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL30 |
| 4684 | { 347, 1, 0, 4, 0, 0, 1, LoongArchOpInfoBase + 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call), 0x0ULL }, // PseudoCALL |
| 4685 | { 346, 1, 0, 4, 0, 1, 0, LoongArchOpInfoBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoB_TAIL |
| 4686 | { 345, 2, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 166, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoBRIND |
| 4687 | { 344, 1, 0, 4, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // PseudoBR |
| 4688 | { 343, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicSwap32 |
| 4689 | { 342, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicStoreW |
| 4690 | { 341, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 163, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicStoreD |
| 4691 | { 340, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadXor32 |
| 4692 | { 339, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadUMin32 |
| 4693 | { 338, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadUMax32 |
| 4694 | { 337, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadSub32 |
| 4695 | { 336, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadOr32 |
| 4696 | { 335, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadNand64 |
| 4697 | { 334, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadNand32 |
| 4698 | { 333, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadMin32 |
| 4699 | { 332, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadMax32 |
| 4700 | { 331, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadAnd32 |
| 4701 | { 330, 5, 2, 24, 0, 0, 0, LoongArchOpInfoBase + 158, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // PseudoAtomicLoadAdd32 |
| 4702 | { 329, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoAddTPRel_W |
| 4703 | { 328, 4, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 154, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // PseudoAddTPRel_D |
| 4704 | { 327, 3, 1, 4, 0, 0, 0, LoongArchOpInfoBase + 151, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // BuildPairF64Pseudo |
| 4705 | { 326, 2, 0, 4, 0, 1, 1, LoongArchOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKUP |
| 4706 | { 325, 2, 0, 4, 0, 1, 1, LoongArchOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKDOWN |
| 4707 | { 324, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UBFX |
| 4708 | { 323, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SBFX |
| 4709 | { 322, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMIN |
| 4710 | { 321, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMAX |
| 4711 | { 320, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMIN |
| 4712 | { 319, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMAX |
| 4713 | { 318, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_XOR |
| 4714 | { 317, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_OR |
| 4715 | { 316, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_AND |
| 4716 | { 315, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_MUL |
| 4717 | { 314, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_ADD |
| 4718 | { 313, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMINIMUM |
| 4719 | { 312, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAXIMUM |
| 4720 | { 311, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMIN |
| 4721 | { 310, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAX |
| 4722 | { 309, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMUL |
| 4723 | { 308, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FADD |
| 4724 | { 307, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FMUL |
| 4725 | { 306, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FADD |
| 4726 | { 305, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_UBSANTRAP |
| 4727 | { 304, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DEBUGTRAP |
| 4728 | { 303, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_TRAP |
| 4729 | { 302, 3, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_BZERO |
| 4730 | { 301, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMSET |
| 4731 | { 300, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMMOVE |
| 4732 | { 299, 3, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY_INLINE |
| 4733 | { 298, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY |
| 4734 | { 297, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 141, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_WRITE_REGISTER |
| 4735 | { 296, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_READ_REGISTER |
| 4736 | { 295, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FLDEXP |
| 4737 | { 294, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSQRT |
| 4738 | { 293, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMA |
| 4739 | { 292, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FREM |
| 4740 | { 291, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FDIV |
| 4741 | { 290, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMUL |
| 4742 | { 289, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSUB |
| 4743 | { 288, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FADD |
| 4744 | { 287, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKRESTORE |
| 4745 | { 286, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKSAVE |
| 4746 | { 285, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DYN_STACKALLOC |
| 4747 | { 284, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_JUMP_TABLE |
| 4748 | { 283, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BLOCK_ADDR |
| 4749 | { 282, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ADDRSPACE_CAST |
| 4750 | { 281, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEARBYINT |
| 4751 | { 280, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRINT |
| 4752 | { 279, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFLOOR |
| 4753 | { 278, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSQRT |
| 4754 | { 277, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTANH |
| 4755 | { 276, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINH |
| 4756 | { 275, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOSH |
| 4757 | { 274, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN2 |
| 4758 | { 273, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN |
| 4759 | { 272, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FASIN |
| 4760 | { 271, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FACOS |
| 4761 | { 270, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTAN |
| 4762 | { 269, 3, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINCOS |
| 4763 | { 268, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSIN |
| 4764 | { 267, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOS |
| 4765 | { 266, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCEIL |
| 4766 | { 265, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITREVERSE |
| 4767 | { 264, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BSWAP |
| 4768 | { 263, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTPOP |
| 4769 | { 262, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLS |
| 4770 | { 261, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ_ZERO_UNDEF |
| 4771 | { 260, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ |
| 4772 | { 259, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ_ZERO_UNDEF |
| 4773 | { 258, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ |
| 4774 | { 257, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 137, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECTOR_COMPRESS |
| 4775 | { 256, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_STEP_VECTOR |
| 4776 | { 255, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SPLAT_VECTOR |
| 4777 | { 254, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 133, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHUFFLE_VECTOR |
| 4778 | { 253, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_VECTOR_ELT |
| 4779 | { 252, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 126, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_VECTOR_ELT |
| 4780 | { 251, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_SUBVECTOR |
| 4781 | { 250, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_SUBVECTOR |
| 4782 | { 249, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VSCALE |
| 4783 | { 248, 3, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 123, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRJT |
| 4784 | { 247, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BR |
| 4785 | { 246, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LLROUND |
| 4786 | { 245, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LROUND |
| 4787 | { 244, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ABS |
| 4788 | { 243, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMAX |
| 4789 | { 242, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMIN |
| 4790 | { 241, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMAX |
| 4791 | { 240, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMIN |
| 4792 | { 239, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRMASK |
| 4793 | { 238, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTR_ADD |
| 4794 | { 237, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_ROUNDING |
| 4795 | { 236, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_ROUNDING |
| 4796 | { 235, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPMODE |
| 4797 | { 234, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPMODE |
| 4798 | { 233, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPMODE |
| 4799 | { 232, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPENV |
| 4800 | { 231, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPENV |
| 4801 | { 230, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPENV |
| 4802 | { 229, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUMNUM |
| 4803 | { 228, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUMNUM |
| 4804 | { 227, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUM |
| 4805 | { 226, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUM |
| 4806 | { 225, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM_IEEE |
| 4807 | { 224, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM_IEEE |
| 4808 | { 223, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM |
| 4809 | { 222, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM |
| 4810 | { 221, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCANONICALIZE |
| 4811 | { 220, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IS_FPCLASS |
| 4812 | { 219, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOPYSIGN |
| 4813 | { 218, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FABS |
| 4814 | { 217, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI_SAT |
| 4815 | { 216, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI_SAT |
| 4816 | { 215, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UITOFP |
| 4817 | { 214, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SITOFP |
| 4818 | { 213, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI |
| 4819 | { 212, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI |
| 4820 | { 211, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTRUNC |
| 4821 | { 210, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPEXT |
| 4822 | { 209, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEG |
| 4823 | { 208, 3, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFREXP |
| 4824 | { 207, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLDEXP |
| 4825 | { 206, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG10 |
| 4826 | { 205, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG2 |
| 4827 | { 204, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG |
| 4828 | { 203, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP10 |
| 4829 | { 202, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP2 |
| 4830 | { 201, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP |
| 4831 | { 200, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOWI |
| 4832 | { 199, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOW |
| 4833 | { 198, 3, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMODF |
| 4834 | { 197, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREM |
| 4835 | { 196, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FDIV |
| 4836 | { 195, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMAD |
| 4837 | { 194, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMA |
| 4838 | { 193, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMUL |
| 4839 | { 192, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSUB |
| 4840 | { 191, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FADD |
| 4841 | { 190, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIXSAT |
| 4842 | { 189, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIXSAT |
| 4843 | { 188, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIX |
| 4844 | { 187, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIX |
| 4845 | { 186, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIXSAT |
| 4846 | { 185, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIXSAT |
| 4847 | { 184, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIX |
| 4848 | { 183, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIX |
| 4849 | { 182, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSHLSAT |
| 4850 | { 181, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USHLSAT |
| 4851 | { 180, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBSAT |
| 4852 | { 179, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBSAT |
| 4853 | { 178, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDSAT |
| 4854 | { 177, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDSAT |
| 4855 | { 176, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULH |
| 4856 | { 175, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULH |
| 4857 | { 174, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULO |
| 4858 | { 173, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULO |
| 4859 | { 172, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBE |
| 4860 | { 171, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBO |
| 4861 | { 170, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SADDE |
| 4862 | { 169, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDO |
| 4863 | { 168, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBE |
| 4864 | { 167, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBO |
| 4865 | { 166, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UADDE |
| 4866 | { 165, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDO |
| 4867 | { 164, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SELECT |
| 4868 | { 163, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UCMP |
| 4869 | { 162, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SCMP |
| 4870 | { 161, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCMP |
| 4871 | { 160, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ICMP |
| 4872 | { 159, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTL |
| 4873 | { 158, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTR |
| 4874 | { 157, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHR |
| 4875 | { 156, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHL |
| 4876 | { 155, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASHR |
| 4877 | { 154, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LSHR |
| 4878 | { 153, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHL |
| 4879 | { 152, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ZEXT |
| 4880 | { 151, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT_INREG |
| 4881 | { 150, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT |
| 4882 | { 149, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VAARG |
| 4883 | { 148, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VASTART |
| 4884 | { 147, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCONSTANT |
| 4885 | { 146, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT |
| 4886 | { 145, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_USAT_U |
| 4887 | { 144, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_U |
| 4888 | { 143, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_S |
| 4889 | { 142, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC |
| 4890 | { 141, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ANYEXT |
| 4891 | { 140, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
| 4892 | { 139, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT |
| 4893 | { 138, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_INTRINSIC_W_SIDE_EFFECTS |
| 4894 | { 137, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_INTRINSIC |
| 4895 | { 136, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_INVOKE_REGION_START |
| 4896 | { 135, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRINDIRECT |
| 4897 | { 134, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRCOND |
| 4898 | { 133, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 93, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_PREFETCH |
| 4899 | { 132, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 20, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_FENCE |
| 4900 | { 131, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_SAT |
| 4901 | { 130, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_COND |
| 4902 | { 129, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UDEC_WRAP |
| 4903 | { 128, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UINC_WRAP |
| 4904 | { 127, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUMNUM |
| 4905 | { 126, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUMNUM |
| 4906 | { 125, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUM |
| 4907 | { 124, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUM |
| 4908 | { 123, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMIN |
| 4909 | { 122, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAX |
| 4910 | { 121, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FSUB |
| 4911 | { 120, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FADD |
| 4912 | { 119, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMIN |
| 4913 | { 118, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMAX |
| 4914 | { 117, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MIN |
| 4915 | { 116, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MAX |
| 4916 | { 115, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XOR |
| 4917 | { 114, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_OR |
| 4918 | { 113, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_NAND |
| 4919 | { 112, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_AND |
| 4920 | { 111, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_SUB |
| 4921 | { 110, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_ADD |
| 4922 | { 109, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XCHG |
| 4923 | { 108, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG |
| 4924 | { 107, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 81, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
| 4925 | { 106, 5, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 76, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_INDEXED_STORE |
| 4926 | { 105, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_STORE |
| 4927 | { 104, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_ZEXTLOAD |
| 4928 | { 103, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_SEXTLOAD |
| 4929 | { 102, 5, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_LOAD |
| 4930 | { 101, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_ZEXTLOAD |
| 4931 | { 100, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_SEXTLOAD |
| 4932 | { 99, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_LOAD |
| 4933 | { 98, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READSTEADYCOUNTER |
| 4934 | { 97, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READCYCLECOUNTER |
| 4935 | { 96, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUNDEVEN |
| 4936 | { 95, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LLRINT |
| 4937 | { 94, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LRINT |
| 4938 | { 93, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUND |
| 4939 | { 92, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_TRUNC |
| 4940 | { 91, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_FPTRUNC_ROUND |
| 4941 | { 90, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_FOLD_BARRIER |
| 4942 | { 89, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREEZE |
| 4943 | { 88, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITCAST |
| 4944 | { 87, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTTOPTR |
| 4945 | { 86, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRTOINT |
| 4946 | { 85, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_CONCAT_VECTORS |
| 4947 | { 84, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR_TRUNC |
| 4948 | { 83, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR |
| 4949 | { 82, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_MERGE_VALUES |
| 4950 | { 81, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT |
| 4951 | { 80, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_UNMERGE_VALUES |
| 4952 | { 79, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT |
| 4953 | { 78, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_POOL |
| 4954 | { 77, 5, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 52, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRAUTH_GLOBAL_VALUE |
| 4955 | { 76, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_GLOBAL_VALUE |
| 4956 | { 75, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRAME_INDEX |
| 4957 | { 74, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_PHI |
| 4958 | { 73, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IMPLICIT_DEF |
| 4959 | { 72, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGCEIL |
| 4960 | { 71, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGFLOOR |
| 4961 | { 70, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGCEIL |
| 4962 | { 69, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGFLOOR |
| 4963 | { 68, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDU |
| 4964 | { 67, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDS |
| 4965 | { 66, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_XOR |
| 4966 | { 65, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_OR |
| 4967 | { 64, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_AND |
| 4968 | { 63, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVREM |
| 4969 | { 62, 4, 2, 0, 0, 0, 0, LoongArchOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVREM |
| 4970 | { 61, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UREM |
| 4971 | { 60, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SREM |
| 4972 | { 59, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIV |
| 4973 | { 58, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIV |
| 4974 | { 57, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_MUL |
| 4975 | { 56, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SUB |
| 4976 | { 55, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ADD |
| 4977 | { 54, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ALIGN |
| 4978 | { 53, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ZEXT |
| 4979 | { 52, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_SEXT |
| 4980 | { 51, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_GLUE |
| 4981 | { 50, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_LOOP |
| 4982 | { 49, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ANCHOR |
| 4983 | { 48, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ENTRY |
| 4984 | { 47, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RELOC_NONE |
| 4985 | { 46, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // JUMP_TABLE_DEBUG_INFO |
| 4986 | { 45, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MEMBARRIER |
| 4987 | { 44, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // FAKE_USE |
| 4988 | { 43, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ICALL_BRANCH_FUNNEL |
| 4989 | { 42, 3, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 36, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_21411 |
| 4990 | { 41, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_21410 |
| 4991 | { 40, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_TAIL_CALL |
| 4992 | { 39, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_EXIT |
| 4993 | { 38, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_RET |
| 4994 | { 37, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_ENTER |
| 4995 | { 36, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_OP |
| 4996 | { 35, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FAULTING_OP |
| 4997 | { 34, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 32, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // LOCAL_ESCAPE |
| 4998 | { 33, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STATEPOINT |
| 4999 | { 32, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 29, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_21409 |
| 5000 | { 31, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREALLOCATED_SETUP |
| 5001 | { 30, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 28, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // anonymous_13542 |
| 5002 | { 29, 6, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 22, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHPOINT |
| 5003 | { 28, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FENTRY_CALL |
| 5004 | { 27, 2, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STACKMAP |
| 5005 | { 26, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 18, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // ARITH_FENCE |
| 5006 | { 25, 4, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 14, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PSEUDO_PROBE |
| 5007 | { 24, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_END |
| 5008 | { 23, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_START |
| 5009 | { 22, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // BUNDLE |
| 5010 | { 21, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 11, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_LANEMASK |
| 5011 | { 20, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY |
| 5012 | { 19, 2, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // REG_SEQUENCE |
| 5013 | { 18, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // DBG_LABEL |
| 5014 | { 17, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_PHI |
| 5015 | { 16, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_INSTR_REF |
| 5016 | { 15, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE_LIST |
| 5017 | { 14, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE |
| 5018 | { 13, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_TO_REGCLASS |
| 5019 | { 12, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // SUBREG_TO_REG |
| 5020 | { 11, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INIT_UNDEF |
| 5021 | { 10, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // IMPLICIT_DEF |
| 5022 | { 9, 4, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 5, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INSERT_SUBREG |
| 5023 | { 8, 3, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // EXTRACT_SUBREG |
| 5024 | { 7, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // KILL |
| 5025 | { 6, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // ANNOTATION_LABEL |
| 5026 | { 5, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // GC_LABEL |
| 5027 | { 4, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // EH_LABEL |
| 5028 | { 3, 1, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // CFI_INSTRUCTION |
| 5029 | { 2, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INLINEASM_BR |
| 5030 | { 1, 0, 0, 0, 0, 0, 0, LoongArchOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // INLINEASM |
| 5031 | { 0, 1, 1, 0, 0, 0, 0, LoongArchOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // PHI |
| 5032 | }, { |
| 5033 | /* 0 */ |
| 5034 | /* 0 */ LoongArch::R3, LoongArch::R3, |
| 5035 | /* 2 */ LoongArch::R3, |
| 5036 | /* 3 */ LoongArch::R1, |
| 5037 | /* 4 */ LoongArch::R1, LoongArch::R20, |
| 5038 | /* 6 */ LoongArch::R4, LoongArch::R4, |
| 5039 | /* 8 */ LoongArch::R1, LoongArch::R4, |
| 5040 | /* 10 */ LoongArch::R3, LoongArch::R20, |
| 5041 | }, { |
| 5042 | 0 |
| 5043 | }, { |
| 5044 | /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5045 | /* 1 */ |
| 5046 | /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5047 | /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5048 | /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5049 | /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5050 | /* 11 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5051 | /* 14 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5052 | /* 18 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, |
| 5053 | /* 20 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5054 | /* 22 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5055 | /* 28 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5056 | /* 29 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5057 | /* 32 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5058 | /* 34 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5059 | /* 36 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5060 | /* 39 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5061 | /* 42 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5062 | /* 45 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5063 | /* 49 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5064 | /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5065 | /* 52 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5066 | /* 57 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5067 | /* 60 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5068 | /* 62 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5069 | /* 66 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5070 | /* 68 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5071 | /* 71 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5072 | /* 76 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5073 | /* 81 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5074 | /* 86 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5075 | /* 90 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5076 | /* 93 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 5077 | /* 97 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5078 | /* 100 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5079 | /* 103 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5080 | /* 107 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5081 | /* 111 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5082 | /* 114 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5083 | /* 119 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5084 | /* 123 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5085 | /* 126 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
| 5086 | /* 130 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
| 5087 | /* 133 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5088 | /* 137 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5089 | /* 141 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 5090 | /* 143 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 5091 | /* 147 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 5092 | /* 151 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5093 | /* 154 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5094 | /* 158 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5095 | /* 163 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5096 | /* 166 */ { LoongArch::GPRJRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5097 | /* 168 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5098 | /* 170 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5099 | /* 178 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5100 | /* 184 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5101 | /* 186 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5102 | /* 189 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5103 | /* 192 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5104 | /* 200 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5105 | /* 207 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5106 | /* 214 */ { LoongArch::GPRTRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5107 | /* 215 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5108 | /* 217 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5109 | /* 219 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5110 | /* 221 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5111 | /* 225 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5112 | /* 227 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5113 | /* 233 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5114 | /* 236 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5115 | /* 238 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5116 | /* 241 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5117 | /* 245 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5118 | /* 248 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5119 | /* 250 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5120 | /* 255 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5121 | /* 259 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5122 | /* 262 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRNoR0R1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5123 | /* 266 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5124 | /* 268 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5125 | /* 270 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5126 | /* 273 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5127 | /* 276 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5128 | /* 279 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5129 | /* 282 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5130 | /* 284 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5131 | /* 286 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5132 | /* 289 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5133 | /* 292 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5134 | /* 295 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5135 | /* 299 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5136 | /* 303 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5137 | /* 307 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5138 | /* 311 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5139 | /* 313 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5140 | /* 315 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FCSRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5141 | /* 317 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5142 | /* 319 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5143 | /* 321 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5144 | /* 323 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5145 | /* 325 */ { LoongArch::FCSRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5146 | /* 327 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5147 | /* 330 */ { LoongArch::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5148 | /* 332 */ { LoongArch::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5149 | /* 334 */ { LoongArch::SCRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5150 | /* 336 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::SCRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5151 | /* 338 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5152 | /* 341 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5153 | /* 344 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5154 | /* 348 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5155 | /* 352 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5156 | /* 353 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5157 | /* 356 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5158 | /* 359 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5159 | /* 363 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5160 | /* 367 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5161 | /* 369 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5162 | /* 371 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5163 | /* 375 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5164 | /* 379 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5165 | /* 382 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5166 | /* 385 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5167 | /* 388 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5168 | /* 390 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5169 | /* 393 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5170 | /* 395 */ { LoongArch::LSX128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5171 | /* 399 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5172 | /* 402 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5173 | /* 405 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5174 | /* 409 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5175 | /* 413 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5176 | /* 417 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5177 | /* 420 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5178 | /* 423 */ { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5179 | /* 426 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5180 | /* 428 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5181 | /* 431 */ { LoongArch::CFRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 5182 | /* 433 */ { LoongArch::LASX256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { LoongArch::GPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 5183 | } |
| 5184 | }; |
| 5185 | |
| 5186 | |
| 5187 | #ifdef __GNUC__ |
| 5188 | #pragma GCC diagnostic push |
| 5189 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 5190 | #endif |
| 5191 | extern const char LoongArchInstrNameData[] = { |
| 5192 | /* 0 */ "G_FLOG10\000" |
| 5193 | /* 9 */ "G_FEXP10\000" |
| 5194 | /* 18 */ "PseudoTAIL30\000" |
| 5195 | /* 31 */ "PseudoCALL30\000" |
| 5196 | /* 44 */ "JISCR0\000" |
| 5197 | /* 51 */ "JISCR1\000" |
| 5198 | /* 58 */ "PseudoMaskedAtomicLoadSub32\000" |
| 5199 | /* 86 */ "PseudoAtomicLoadSub32\000" |
| 5200 | /* 108 */ "PseudoMaskedAtomicLoadAdd32\000" |
| 5201 | /* 136 */ "PseudoAtomicLoadAdd32\000" |
| 5202 | /* 158 */ "PseudoAtomicLoadAnd32\000" |
| 5203 | /* 180 */ "PseudoMaskedAtomicLoadNand32\000" |
| 5204 | /* 209 */ "PseudoAtomicLoadNand32\000" |
| 5205 | /* 232 */ "PseudoMaskedCmpXchg32\000" |
| 5206 | /* 254 */ "PseudoCmpXchg32\000" |
| 5207 | /* 270 */ "PseudoMaskedAtomicLoadUMin32\000" |
| 5208 | /* 299 */ "PseudoAtomicLoadUMin32\000" |
| 5209 | /* 322 */ "PseudoMaskedAtomicLoadMin32\000" |
| 5210 | /* 350 */ "PseudoAtomicLoadMin32\000" |
| 5211 | /* 372 */ "PseudoMaskedAtomicSwap32\000" |
| 5212 | /* 397 */ "PseudoAtomicSwap32\000" |
| 5213 | /* 416 */ "PseudoAtomicLoadOr32\000" |
| 5214 | /* 437 */ "PseudoAtomicLoadXor32\000" |
| 5215 | /* 459 */ "PseudoMaskedAtomicLoadUMax32\000" |
| 5216 | /* 488 */ "PseudoAtomicLoadUMax32\000" |
| 5217 | /* 511 */ "PseudoMaskedAtomicLoadMax32\000" |
| 5218 | /* 539 */ "PseudoAtomicLoadMax32\000" |
| 5219 | /* 561 */ "G_FLOG2\000" |
| 5220 | /* 569 */ "G_FATAN2\000" |
| 5221 | /* 578 */ "G_FEXP2\000" |
| 5222 | /* 586 */ "MOVFR2GR_S_64\000" |
| 5223 | /* 600 */ "MOVGR2FR_W_64\000" |
| 5224 | /* 614 */ "PseudoAtomicLoadNand64\000" |
| 5225 | /* 637 */ "PseudoCmpXchg64\000" |
| 5226 | /* 653 */ "PseudoTAIL36\000" |
| 5227 | /* 666 */ "PseudoCALL36\000" |
| 5228 | /* 679 */ "PseudoCmpXchg128\000" |
| 5229 | /* 696 */ "G_FMA\000" |
| 5230 | /* 702 */ "G_STRICT_FMA\000" |
| 5231 | /* 715 */ "BITREV_4B\000" |
| 5232 | /* 725 */ "BITREV_8B\000" |
| 5233 | /* 735 */ "INVTLB\000" |
| 5234 | /* 742 */ "G_FSUB\000" |
| 5235 | /* 749 */ "G_STRICT_FSUB\000" |
| 5236 | /* 763 */ "G_ATOMICRMW_FSUB\000" |
| 5237 | /* 780 */ "G_SUB\000" |
| 5238 | /* 786 */ "G_ATOMICRMW_SUB\000" |
| 5239 | /* 802 */ "XVREPLVE0_B\000" |
| 5240 | /* 814 */ "XVADDA_B\000" |
| 5241 | /* 823 */ "X86SRA_B\000" |
| 5242 | /* 832 */ "XVSRA_B\000" |
| 5243 | /* 840 */ "AMADD__DB_B\000" |
| 5244 | /* 852 */ "AMSWAP__DB_B\000" |
| 5245 | /* 865 */ "AMCAS__DB_B\000" |
| 5246 | /* 877 */ "X86SUB_B\000" |
| 5247 | /* 886 */ "XVMSUB_B\000" |
| 5248 | /* 895 */ "XVSSUB_B\000" |
| 5249 | /* 904 */ "XVSUB_B\000" |
| 5250 | /* 912 */ "X86SBC_B\000" |
| 5251 | /* 921 */ "X86ADC_B\000" |
| 5252 | /* 930 */ "X86DEC_B\000" |
| 5253 | /* 939 */ "X86INC_B\000" |
| 5254 | /* 948 */ "X86ADD_B\000" |
| 5255 | /* 957 */ "AMADD_B\000" |
| 5256 | /* 965 */ "XVMADD_B\000" |
| 5257 | /* 974 */ "XVSADD_B\000" |
| 5258 | /* 983 */ "XVADD_B\000" |
| 5259 | /* 991 */ "LD_B\000" |
| 5260 | /* 996 */ "X86AND_B\000" |
| 5261 | /* 1005 */ "XVPACKOD_B\000" |
| 5262 | /* 1016 */ "XVPICKOD_B\000" |
| 5263 | /* 1027 */ "XVMOD_B\000" |
| 5264 | /* 1035 */ "IOCSRRD_B\000" |
| 5265 | /* 1045 */ "XVABSD_B\000" |
| 5266 | /* 1054 */ "VEXT2XV_D_B\000" |
| 5267 | /* 1066 */ "LDLE_B\000" |
| 5268 | /* 1073 */ "XVSLE_B\000" |
| 5269 | /* 1081 */ "STLE_B\000" |
| 5270 | /* 1088 */ "XVREPLVE_B\000" |
| 5271 | /* 1099 */ "XVSHUF_B\000" |
| 5272 | /* 1108 */ "XVNEG_B\000" |
| 5273 | /* 1116 */ "XVAVG_B\000" |
| 5274 | /* 1124 */ "XVMUH_B\000" |
| 5275 | /* 1132 */ "XVILVH_B\000" |
| 5276 | /* 1141 */ "XVSUBWOD_H_B\000" |
| 5277 | /* 1154 */ "XVMADDWOD_H_B\000" |
| 5278 | /* 1168 */ "XVADDWOD_H_B\000" |
| 5279 | /* 1181 */ "XVMULWOD_H_B\000" |
| 5280 | /* 1194 */ "XVEXTH_H_B\000" |
| 5281 | /* 1205 */ "XVSLLWIL_H_B\000" |
| 5282 | /* 1218 */ "XVSUBWEV_H_B\000" |
| 5283 | /* 1231 */ "XVMADDWEV_H_B\000" |
| 5284 | /* 1245 */ "XVADDWEV_H_B\000" |
| 5285 | /* 1258 */ "XVMULWEV_H_B\000" |
| 5286 | /* 1271 */ "VEXT2XV_H_B\000" |
| 5287 | /* 1283 */ "XVHSUBW_H_B\000" |
| 5288 | /* 1295 */ "XVHADDW_H_B\000" |
| 5289 | /* 1307 */ "XVSHUF4I_B\000" |
| 5290 | /* 1318 */ "X86SRAI_B\000" |
| 5291 | /* 1328 */ "XVSRAI_B\000" |
| 5292 | /* 1337 */ "XVANDI_B\000" |
| 5293 | /* 1346 */ "XVSLEI_B\000" |
| 5294 | /* 1355 */ "XVREPL128VEI_B\000" |
| 5295 | /* 1370 */ "VREPLVEI_B\000" |
| 5296 | /* 1381 */ "X86RCLI_B\000" |
| 5297 | /* 1391 */ "XVBITSELI_B\000" |
| 5298 | /* 1403 */ "X86SLLI_B\000" |
| 5299 | /* 1413 */ "XVSLLI_B\000" |
| 5300 | /* 1422 */ "PseudoXVREPLI_B\000" |
| 5301 | /* 1438 */ "PseudoVREPLI_B\000" |
| 5302 | /* 1453 */ "X86SRLI_B\000" |
| 5303 | /* 1463 */ "XVSRLI_B\000" |
| 5304 | /* 1472 */ "X86ROTLI_B\000" |
| 5305 | /* 1483 */ "XVMINI_B\000" |
| 5306 | /* 1492 */ "XVFRSTPI_B\000" |
| 5307 | /* 1503 */ "XVSEQI_B\000" |
| 5308 | /* 1512 */ "XVSRARI_B\000" |
| 5309 | /* 1522 */ "X86RCRI_B\000" |
| 5310 | /* 1532 */ "XVBITCLRI_B\000" |
| 5311 | /* 1544 */ "XVSRLRI_B\000" |
| 5312 | /* 1554 */ "XVNORI_B\000" |
| 5313 | /* 1563 */ "XVORI_B\000" |
| 5314 | /* 1571 */ "XVXORI_B\000" |
| 5315 | /* 1580 */ "X86ROTRI_B\000" |
| 5316 | /* 1591 */ "XVROTRI_B\000" |
| 5317 | /* 1601 */ "XVBITSETI_B\000" |
| 5318 | /* 1613 */ "XVSLTI_B\000" |
| 5319 | /* 1622 */ "XVBITREVI_B\000" |
| 5320 | /* 1634 */ "XVMAXI_B\000" |
| 5321 | /* 1643 */ "X86RCL_B\000" |
| 5322 | /* 1652 */ "X86SLL_B\000" |
| 5323 | /* 1661 */ "XVSLL_B\000" |
| 5324 | /* 1669 */ "XVLDREPL_B\000" |
| 5325 | /* 1680 */ "X86SRL_B\000" |
| 5326 | /* 1689 */ "XVSRL_B\000" |
| 5327 | /* 1697 */ "X86ROTL_B\000" |
| 5328 | /* 1707 */ "X86MUL_B\000" |
| 5329 | /* 1716 */ "XVMUL_B\000" |
| 5330 | /* 1724 */ "XVILVL_B\000" |
| 5331 | /* 1733 */ "XVSTELM_B\000" |
| 5332 | /* 1743 */ "XVMIN_B\000" |
| 5333 | /* 1751 */ "XVCLO_B\000" |
| 5334 | /* 1759 */ "AMSWAP_B\000" |
| 5335 | /* 1768 */ "XVFRSTP_B\000" |
| 5336 | /* 1778 */ "XVSEQ_B\000" |
| 5337 | /* 1786 */ "XVSRAR_B\000" |
| 5338 | /* 1795 */ "X86RCR_B\000" |
| 5339 | /* 1804 */ "VPICKVE2GR_B\000" |
| 5340 | /* 1817 */ "XVAVGR_B\000" |
| 5341 | /* 1826 */ "XVBITCLR_B\000" |
| 5342 | /* 1837 */ "XVSRLR_B\000" |
| 5343 | /* 1846 */ "X86OR_B\000" |
| 5344 | /* 1854 */ "X86XOR_B\000" |
| 5345 | /* 1863 */ "X86ROTR_B\000" |
| 5346 | /* 1873 */ "XVROTR_B\000" |
| 5347 | /* 1882 */ "XVREPLGR2VR_B\000" |
| 5348 | /* 1896 */ "PseudoXVINSGR2VR_B\000" |
| 5349 | /* 1915 */ "IOCSRWR_B\000" |
| 5350 | /* 1925 */ "AMCAS_B\000" |
| 5351 | /* 1933 */ "XVEXTRINS_B\000" |
| 5352 | /* 1945 */ "XVSAT_B\000" |
| 5353 | /* 1953 */ "XVBITSET_B\000" |
| 5354 | /* 1964 */ "LDGT_B\000" |
| 5355 | /* 1971 */ "STGT_B\000" |
| 5356 | /* 1978 */ "XVSLT_B\000" |
| 5357 | /* 1986 */ "XVPCNT_B\000" |
| 5358 | /* 1995 */ "ST_B\000" |
| 5359 | /* 2000 */ "XVMADDWOD_H_BU_B\000" |
| 5360 | /* 2017 */ "XVADDWOD_H_BU_B\000" |
| 5361 | /* 2033 */ "XVMULWOD_H_BU_B\000" |
| 5362 | /* 2049 */ "XVMADDWEV_H_BU_B\000" |
| 5363 | /* 2066 */ "XVADDWEV_H_BU_B\000" |
| 5364 | /* 2082 */ "XVMULWEV_H_BU_B\000" |
| 5365 | /* 2098 */ "XVPACKEV_B\000" |
| 5366 | /* 2109 */ "XVPICKEV_B\000" |
| 5367 | /* 2120 */ "XVBITREV_B\000" |
| 5368 | /* 2131 */ "XVDIV_B\000" |
| 5369 | /* 2139 */ "XVSIGNCOV_B\000" |
| 5370 | /* 2151 */ "EXT_W_B\000" |
| 5371 | /* 2159 */ "VEXT2XV_W_B\000" |
| 5372 | /* 2171 */ "XVMAX_B\000" |
| 5373 | /* 2179 */ "LDX_B\000" |
| 5374 | /* 2185 */ "STX_B\000" |
| 5375 | /* 2191 */ "PseudoXVBZ_B\000" |
| 5376 | /* 2204 */ "PseudoVBZ_B\000" |
| 5377 | /* 2216 */ "PseudoXVMSKGEZ_B\000" |
| 5378 | /* 2233 */ "PseudoVMSKGEZ_B\000" |
| 5379 | /* 2249 */ "PseudoXVMSKNEZ_B\000" |
| 5380 | /* 2266 */ "PseudoVMSKNEZ_B\000" |
| 5381 | /* 2282 */ "XVSETALLNEZ_B\000" |
| 5382 | /* 2296 */ "XVCLZ_B\000" |
| 5383 | /* 2304 */ "PseudoXVBNZ_B\000" |
| 5384 | /* 2318 */ "PseudoVBNZ_B\000" |
| 5385 | /* 2331 */ "XVMSKNZ_B\000" |
| 5386 | /* 2341 */ "PseudoXVMSKEQZ_B\000" |
| 5387 | /* 2358 */ "PseudoVMSKEQZ_B\000" |
| 5388 | /* 2374 */ "XVSETANYEQZ_B\000" |
| 5389 | /* 2388 */ "PseudoXVMSKLTZ_B\000" |
| 5390 | /* 2405 */ "PseudoVMSKLTZ_B\000" |
| 5391 | /* 2421 */ "G_INTRINSIC\000" |
| 5392 | /* 2433 */ "G_FPTRUNC\000" |
| 5393 | /* 2443 */ "G_INTRINSIC_TRUNC\000" |
| 5394 | /* 2461 */ "G_TRUNC\000" |
| 5395 | /* 2469 */ "G_BUILD_VECTOR_TRUNC\000" |
| 5396 | /* 2490 */ "G_DYN_STACKALLOC\000" |
| 5397 | /* 2507 */ "PseudoLA_TLS_DESC\000" |
| 5398 | /* 2525 */ "G_FMAD\000" |
| 5399 | /* 2532 */ "G_INDEXED_SEXTLOAD\000" |
| 5400 | /* 2551 */ "G_SEXTLOAD\000" |
| 5401 | /* 2562 */ "G_INDEXED_ZEXTLOAD\000" |
| 5402 | /* 2581 */ "G_ZEXTLOAD\000" |
| 5403 | /* 2592 */ "G_INDEXED_LOAD\000" |
| 5404 | /* 2607 */ "G_LOAD\000" |
| 5405 | /* 2614 */ "G_VECREDUCE_FADD\000" |
| 5406 | /* 2631 */ "G_FADD\000" |
| 5407 | /* 2638 */ "G_VECREDUCE_SEQ_FADD\000" |
| 5408 | /* 2659 */ "G_STRICT_FADD\000" |
| 5409 | /* 2673 */ "G_ATOMICRMW_FADD\000" |
| 5410 | /* 2690 */ "G_VECREDUCE_ADD\000" |
| 5411 | /* 2706 */ "G_ADD\000" |
| 5412 | /* 2712 */ "G_PTR_ADD\000" |
| 5413 | /* 2722 */ "G_ATOMICRMW_ADD\000" |
| 5414 | /* 2738 */ "PseudoLA_TLS_GD\000" |
| 5415 | /* 2754 */ "PRELD\000" |
| 5416 | /* 2760 */ "XVLD\000" |
| 5417 | /* 2765 */ "FCVT_D_LD\000" |
| 5418 | /* 2775 */ "PseudoLA_TLS_LD\000" |
| 5419 | /* 2791 */ "G_ATOMICRMW_NAND\000" |
| 5420 | /* 2808 */ "G_VECREDUCE_AND\000" |
| 5421 | /* 2824 */ "G_AND\000" |
| 5422 | /* 2830 */ "G_ATOMICRMW_AND\000" |
| 5423 | /* 2846 */ "LIFETIME_END\000" |
| 5424 | /* 2859 */ "PseudoBRIND\000" |
| 5425 | /* 2871 */ "G_BRCOND\000" |
| 5426 | /* 2880 */ "G_ATOMICRMW_USUB_COND\000" |
| 5427 | /* 2902 */ "G_LLROUND\000" |
| 5428 | /* 2912 */ "G_LROUND\000" |
| 5429 | /* 2921 */ "G_INTRINSIC_ROUND\000" |
| 5430 | /* 2939 */ "G_INTRINSIC_FPTRUNC_ROUND\000" |
| 5431 | /* 2965 */ "LOAD_STACK_GUARD\000" |
| 5432 | /* 2982 */ "TLBRD\000" |
| 5433 | /* 2988 */ "GCSRRD\000" |
| 5434 | /* 2995 */ "UD\000" |
| 5435 | /* 2998 */ "XVREPLVE0_D\000" |
| 5436 | /* 3010 */ "XVINSVE0_D\000" |
| 5437 | /* 3021 */ "XVADDA_D\000" |
| 5438 | /* 3030 */ "XVFMINA_D\000" |
| 5439 | /* 3040 */ "X86SRA_D\000" |
| 5440 | /* 3049 */ "XVSRA_D\000" |
| 5441 | /* 3057 */ "XVFMAXA_D\000" |
| 5442 | /* 3067 */ "AMADD__DB_D\000" |
| 5443 | /* 3079 */ "AMAND__DB_D\000" |
| 5444 | /* 3091 */ "AMMIN__DB_D\000" |
| 5445 | /* 3103 */ "AMSWAP__DB_D\000" |
| 5446 | /* 3116 */ "AMOR__DB_D\000" |
| 5447 | /* 3127 */ "AMXOR__DB_D\000" |
| 5448 | /* 3139 */ "AMCAS__DB_D\000" |
| 5449 | /* 3151 */ "AMMAX__DB_D\000" |
| 5450 | /* 3163 */ "FSCALEB_D\000" |
| 5451 | /* 3173 */ "XVFLOGB_D\000" |
| 5452 | /* 3183 */ "X86SUB_D\000" |
| 5453 | /* 3192 */ "XVFSUB_D\000" |
| 5454 | /* 3201 */ "XVFMSUB_D\000" |
| 5455 | /* 3211 */ "XVFNMSUB_D\000" |
| 5456 | /* 3222 */ "XVMSUB_D\000" |
| 5457 | /* 3231 */ "XVSSUB_D\000" |
| 5458 | /* 3240 */ "XVSUB_D\000" |
| 5459 | /* 3248 */ "REVB_D\000" |
| 5460 | /* 3255 */ "X86SBC_D\000" |
| 5461 | /* 3264 */ "X86ADC_D\000" |
| 5462 | /* 3273 */ "X86DEC_D\000" |
| 5463 | /* 3282 */ "X86INC_D\000" |
| 5464 | /* 3291 */ "SC_D\000" |
| 5465 | /* 3296 */ "X86ADD_D\000" |
| 5466 | /* 3305 */ "XVFADD_D\000" |
| 5467 | /* 3314 */ "AMADD_D\000" |
| 5468 | /* 3322 */ "XVFMADD_D\000" |
| 5469 | /* 3332 */ "XVFNMADD_D\000" |
| 5470 | /* 3343 */ "XVMADD_D\000" |
| 5471 | /* 3352 */ "XVSADD_D\000" |
| 5472 | /* 3361 */ "XVADD_D\000" |
| 5473 | /* 3369 */ "FLD_D\000" |
| 5474 | /* 3375 */ "FCVT_LD_D\000" |
| 5475 | /* 3385 */ "X86AND_D\000" |
| 5476 | /* 3394 */ "AMAND_D\000" |
| 5477 | /* 3402 */ "XVPACKOD_D\000" |
| 5478 | /* 3413 */ "XVPICKOD_D\000" |
| 5479 | /* 3424 */ "XVMOD_D\000" |
| 5480 | /* 3432 */ "IOCSRRD_D\000" |
| 5481 | /* 3442 */ "XVABSD_D\000" |
| 5482 | /* 3451 */ "FCVT_UD_D\000" |
| 5483 | /* 3461 */ "XVFCMP_CLE_D\000" |
| 5484 | /* 3474 */ "FLDLE_D\000" |
| 5485 | /* 3482 */ "XVSLE_D\000" |
| 5486 | /* 3490 */ "XVFCMP_SLE_D\000" |
| 5487 | /* 3503 */ "ASRTLE_D\000" |
| 5488 | /* 3512 */ "FSTLE_D\000" |
| 5489 | /* 3520 */ "XVFCMP_CULE_D\000" |
| 5490 | /* 3534 */ "XVFCMP_SULE_D\000" |
| 5491 | /* 3548 */ "RDTIME_D\000" |
| 5492 | /* 3557 */ "XVFCMP_CNE_D\000" |
| 5493 | /* 3570 */ "XVFRINTRNE_D\000" |
| 5494 | /* 3583 */ "XVFCMP_SNE_D\000" |
| 5495 | /* 3596 */ "XVFCMP_CUNE_D\000" |
| 5496 | /* 3610 */ "XVFCMP_SUNE_D\000" |
| 5497 | /* 3624 */ "XVFRECIPE_D\000" |
| 5498 | /* 3636 */ "XVFRSQRTE_D\000" |
| 5499 | /* 3648 */ "XVPICKVE_D\000" |
| 5500 | /* 3659 */ "XVREPLVE_D\000" |
| 5501 | /* 3670 */ "XVFCMP_CAF_D\000" |
| 5502 | /* 3683 */ "XVFCMP_SAF_D\000" |
| 5503 | /* 3696 */ "XVSHUF_D\000" |
| 5504 | /* 3705 */ "FNEG_D\000" |
| 5505 | /* 3712 */ "XVNEG_D\000" |
| 5506 | /* 3720 */ "XVAVG_D\000" |
| 5507 | /* 3728 */ "MULH_D\000" |
| 5508 | /* 3735 */ "XVMUH_D\000" |
| 5509 | /* 3743 */ "REVH_D\000" |
| 5510 | /* 3750 */ "XVILVH_D\000" |
| 5511 | /* 3759 */ "ADDU12I_D\000" |
| 5512 | /* 3769 */ "LU32I_D\000" |
| 5513 | /* 3777 */ "LU52I_D\000" |
| 5514 | /* 3785 */ "XVSHUF4I_D\000" |
| 5515 | /* 3796 */ "ADDU16I_D\000" |
| 5516 | /* 3806 */ "X86SRAI_D\000" |
| 5517 | /* 3816 */ "XVSRAI_D\000" |
| 5518 | /* 3825 */ "ADDI_D\000" |
| 5519 | /* 3832 */ "XVSLEI_D\000" |
| 5520 | /* 3841 */ "XVREPL128VEI_D\000" |
| 5521 | /* 3856 */ "VREPLVEI_D\000" |
| 5522 | /* 3867 */ "X86RCLI_D\000" |
| 5523 | /* 3877 */ "XVHSELI_D\000" |
| 5524 | /* 3887 */ "X86SLLI_D\000" |
| 5525 | /* 3897 */ "XVSLLI_D\000" |
| 5526 | /* 3906 */ "PseudoXVREPLI_D\000" |
| 5527 | /* 3922 */ "PseudoVREPLI_D\000" |
| 5528 | /* 3937 */ "X86SRLI_D\000" |
| 5529 | /* 3947 */ "XVSRLI_D\000" |
| 5530 | /* 3956 */ "X86ROTLI_D\000" |
| 5531 | /* 3967 */ "PseudoLI_D\000" |
| 5532 | /* 3978 */ "XVPERMI_D\000" |
| 5533 | /* 3988 */ "XVMINI_D\000" |
| 5534 | /* 3997 */ "XVSEQI_D\000" |
| 5535 | /* 4006 */ "XVSRARI_D\000" |
| 5536 | /* 4016 */ "X86RCRI_D\000" |
| 5537 | /* 4026 */ "XVBITCLRI_D\000" |
| 5538 | /* 4038 */ "XVSRLRI_D\000" |
| 5539 | /* 4048 */ "X86ROTRI_D\000" |
| 5540 | /* 4059 */ "XVROTRI_D\000" |
| 5541 | /* 4069 */ "XVBITSETI_D\000" |
| 5542 | /* 4081 */ "XVSLTI_D\000" |
| 5543 | /* 4090 */ "XVBITREVI_D\000" |
| 5544 | /* 4102 */ "XVMAXI_D\000" |
| 5545 | /* 4111 */ "BYTEPICK_D\000" |
| 5546 | /* 4122 */ "BSTRPICK_D\000" |
| 5547 | /* 4133 */ "X86RCL_D\000" |
| 5548 | /* 4142 */ "LDL_D\000" |
| 5549 | /* 4148 */ "SCREL_D\000" |
| 5550 | /* 4156 */ "X86SLL_D\000" |
| 5551 | /* 4165 */ "XVSLL_D\000" |
| 5552 | /* 4173 */ "XVLDREPL_D\000" |
| 5553 | /* 4184 */ "X86SRL_D\000" |
| 5554 | /* 4193 */ "XVSRL_D\000" |
| 5555 | /* 4201 */ "ALSL_D\000" |
| 5556 | /* 4208 */ "X86ROTL_D\000" |
| 5557 | /* 4218 */ "STL_D\000" |
| 5558 | /* 4224 */ "X86MUL_D\000" |
| 5559 | /* 4233 */ "XVFMUL_D\000" |
| 5560 | /* 4242 */ "XVMUL_D\000" |
| 5561 | /* 4250 */ "XVILVL_D\000" |
| 5562 | /* 4259 */ "XVFTINTRNE_L_D\000" |
| 5563 | /* 4274 */ "XVFTINTRM_L_D\000" |
| 5564 | /* 4288 */ "XVFTINTRP_L_D\000" |
| 5565 | /* 4302 */ "XVFTINT_L_D\000" |
| 5566 | /* 4314 */ "XVFTINTRZ_L_D\000" |
| 5567 | /* 4328 */ "XVSTELM_D\000" |
| 5568 | /* 4338 */ "XVFRINTRM_D\000" |
| 5569 | /* 4350 */ "FCOPYSIGN_D\000" |
| 5570 | /* 4362 */ "XVFMIN_D\000" |
| 5571 | /* 4371 */ "AMMIN_D\000" |
| 5572 | /* 4379 */ "XVMIN_D\000" |
| 5573 | /* 4387 */ "XVFCMP_CUN_D\000" |
| 5574 | /* 4400 */ "XVFCMP_SUN_D\000" |
| 5575 | /* 4413 */ "XVCLO_D\000" |
| 5576 | /* 4421 */ "CTO_D\000" |
| 5577 | /* 4427 */ "AMSWAP_D\000" |
| 5578 | /* 4436 */ "XVFRECIP_D\000" |
| 5579 | /* 4447 */ "XVFRINTRP_D\000" |
| 5580 | /* 4459 */ "LLACQ_D\000" |
| 5581 | /* 4467 */ "XVFCMP_CEQ_D\000" |
| 5582 | /* 4480 */ "XVSEQ_D\000" |
| 5583 | /* 4488 */ "XVFCMP_SEQ_D\000" |
| 5584 | /* 4501 */ "XVFCMP_CUEQ_D\000" |
| 5585 | /* 4515 */ "XVFCMP_SUEQ_D\000" |
| 5586 | /* 4529 */ "XVSUBWOD_Q_D\000" |
| 5587 | /* 4542 */ "XVMADDWOD_Q_D\000" |
| 5588 | /* 4556 */ "XVADDWOD_Q_D\000" |
| 5589 | /* 4569 */ "XVMULWOD_Q_D\000" |
| 5590 | /* 4582 */ "XVEXTH_Q_D\000" |
| 5591 | /* 4593 */ "XVEXTL_Q_D\000" |
| 5592 | /* 4604 */ "XVSUBWEV_Q_D\000" |
| 5593 | /* 4617 */ "XVMADDWEV_Q_D\000" |
| 5594 | /* 4631 */ "XVADDWEV_Q_D\000" |
| 5595 | /* 4644 */ "XVMULWEV_Q_D\000" |
| 5596 | /* 4657 */ "XVHSUBW_Q_D\000" |
| 5597 | /* 4669 */ "XVHADDW_Q_D\000" |
| 5598 | /* 4681 */ "XVSRAR_D\000" |
| 5599 | /* 4690 */ "X86RCR_D\000" |
| 5600 | /* 4699 */ "LDR_D\000" |
| 5601 | /* 4705 */ "MOVGR2FR_D\000" |
| 5602 | /* 4716 */ "XVPICKVE2GR_D\000" |
| 5603 | /* 4730 */ "MOVFR2GR_D\000" |
| 5604 | /* 4741 */ "XVAVGR_D\000" |
| 5605 | /* 4750 */ "XVBITCLR_D\000" |
| 5606 | /* 4761 */ "XVSRLR_D\000" |
| 5607 | /* 4770 */ "X86OR_D\000" |
| 5608 | /* 4778 */ "XVFCMP_COR_D\000" |
| 5609 | /* 4791 */ "AMOR_D\000" |
| 5610 | /* 4798 */ "XVFCMP_SOR_D\000" |
| 5611 | /* 4811 */ "X86XOR_D\000" |
| 5612 | /* 4820 */ "AMXOR_D\000" |
| 5613 | /* 4828 */ "X86ROTR_D\000" |
| 5614 | /* 4838 */ "XVROTR_D\000" |
| 5615 | /* 4847 */ "LDPTR_D\000" |
| 5616 | /* 4855 */ "STPTR_D\000" |
| 5617 | /* 4863 */ "STR_D\000" |
| 5618 | /* 4869 */ "XVREPLGR2VR_D\000" |
| 5619 | /* 4883 */ "XVINSGR2VR_D\000" |
| 5620 | /* 4896 */ "IOCSRWR_D\000" |
| 5621 | /* 4906 */ "AMCAS_D\000" |
| 5622 | /* 4914 */ "FABS_D\000" |
| 5623 | /* 4921 */ "BSTRINS_D\000" |
| 5624 | /* 4931 */ "XVEXTRINS_D\000" |
| 5625 | /* 4943 */ "XVFCLASS_D\000" |
| 5626 | /* 4954 */ "XVFCVT_S_D\000" |
| 5627 | /* 4965 */ "XVSAT_D\000" |
| 5628 | /* 4973 */ "XVBITSET_D\000" |
| 5629 | /* 4984 */ "FLDGT_D\000" |
| 5630 | /* 4992 */ "ASRTGT_D\000" |
| 5631 | /* 5001 */ "FSTGT_D\000" |
| 5632 | /* 5009 */ "XVFCMP_CLT_D\000" |
| 5633 | /* 5022 */ "XVSLT_D\000" |
| 5634 | /* 5030 */ "XVFCMP_SLT_D\000" |
| 5635 | /* 5043 */ "XVFCMP_CULT_D\000" |
| 5636 | /* 5057 */ "XVFCMP_SULT_D\000" |
| 5637 | /* 5071 */ "XVPCNT_D\000" |
| 5638 | /* 5080 */ "XVFRINT_D\000" |
| 5639 | /* 5090 */ "XVFSQRT_D\000" |
| 5640 | /* 5100 */ "XVFRSQRT_D\000" |
| 5641 | /* 5111 */ "FST_D\000" |
| 5642 | /* 5117 */ "XVMADDWOD_Q_DU_D\000" |
| 5643 | /* 5134 */ "XVADDWOD_Q_DU_D\000" |
| 5644 | /* 5150 */ "XVMULWOD_Q_DU_D\000" |
| 5645 | /* 5166 */ "XVMADDWEV_Q_DU_D\000" |
| 5646 | /* 5183 */ "XVADDWEV_Q_DU_D\000" |
| 5647 | /* 5199 */ "XVMULWEV_Q_DU_D\000" |
| 5648 | /* 5215 */ "XVFTINT_LU_D\000" |
| 5649 | /* 5228 */ "XVFTINTRZ_LU_D\000" |
| 5650 | /* 5243 */ "XVSSRANI_WU_D\000" |
| 5651 | /* 5257 */ "XVSSRLNI_WU_D\000" |
| 5652 | /* 5271 */ "XVSSRARNI_WU_D\000" |
| 5653 | /* 5286 */ "XVSSRLRNI_WU_D\000" |
| 5654 | /* 5301 */ "XVSSRAN_WU_D\000" |
| 5655 | /* 5314 */ "XVSSRLN_WU_D\000" |
| 5656 | /* 5327 */ "XVSSRARN_WU_D\000" |
| 5657 | /* 5341 */ "XVSSRLRN_WU_D\000" |
| 5658 | /* 5355 */ "XVPACKEV_D\000" |
| 5659 | /* 5366 */ "XVPICKEV_D\000" |
| 5660 | /* 5377 */ "XVBITREV_D\000" |
| 5661 | /* 5388 */ "XVFDIV_D\000" |
| 5662 | /* 5397 */ "XVDIV_D\000" |
| 5663 | /* 5405 */ "XVSIGNCOV_D\000" |
| 5664 | /* 5417 */ "FMOV_D\000" |
| 5665 | /* 5424 */ "ARMMOV_D\000" |
| 5666 | /* 5433 */ "XVFTINTRNE_W_D\000" |
| 5667 | /* 5448 */ "XVSSRANI_W_D\000" |
| 5668 | /* 5461 */ "XVSRANI_W_D\000" |
| 5669 | /* 5473 */ "XVSSRLNI_W_D\000" |
| 5670 | /* 5486 */ "XVSRLNI_W_D\000" |
| 5671 | /* 5498 */ "XVSSRARNI_W_D\000" |
| 5672 | /* 5512 */ "XVSRARNI_W_D\000" |
| 5673 | /* 5525 */ "XVSSRLRNI_W_D\000" |
| 5674 | /* 5539 */ "XVSRLRNI_W_D\000" |
| 5675 | /* 5552 */ "XVFTINTRM_W_D\000" |
| 5676 | /* 5566 */ "XVSSRAN_W_D\000" |
| 5677 | /* 5578 */ "XVSRAN_W_D\000" |
| 5678 | /* 5589 */ "XVSSRLN_W_D\000" |
| 5679 | /* 5601 */ "XVSRLN_W_D\000" |
| 5680 | /* 5612 */ "XVSSRARN_W_D\000" |
| 5681 | /* 5625 */ "XVSRARN_W_D\000" |
| 5682 | /* 5637 */ "XVSSRLRN_W_D\000" |
| 5683 | /* 5650 */ "XVSRLRN_W_D\000" |
| 5684 | /* 5662 */ "XVFTINTRP_W_D\000" |
| 5685 | /* 5676 */ "XVFTINT_W_D\000" |
| 5686 | /* 5688 */ "XVFTINTRZ_W_D\000" |
| 5687 | /* 5702 */ "XVFMAX_D\000" |
| 5688 | /* 5711 */ "AMMAX_D\000" |
| 5689 | /* 5719 */ "XVMAX_D\000" |
| 5690 | /* 5727 */ "FLDX_D\000" |
| 5691 | /* 5734 */ "FSTX_D\000" |
| 5692 | /* 5741 */ "PseudoXVBZ_D\000" |
| 5693 | /* 5754 */ "PseudoVBZ_D\000" |
| 5694 | /* 5766 */ "XVSETALLNEZ_D\000" |
| 5695 | /* 5780 */ "XVCLZ_D\000" |
| 5696 | /* 5788 */ "PseudoXVBNZ_D\000" |
| 5697 | /* 5802 */ "PseudoVBNZ_D\000" |
| 5698 | /* 5815 */ "XVSETANYEQZ_D\000" |
| 5699 | /* 5829 */ "XVFRINTRZ_D\000" |
| 5700 | /* 5841 */ "CTZ_D\000" |
| 5701 | /* 5847 */ "PseudoXVMSKLTZ_D\000" |
| 5702 | /* 5864 */ "PseudoVMSKLTZ_D\000" |
| 5703 | /* 5880 */ "PseudoAddTPRel_D\000" |
| 5704 | /* 5897 */ "PseudoAtomicStoreD\000" |
| 5705 | /* 5916 */ "FSEL_xD\000" |
| 5706 | /* 5924 */ "PSEUDO_PROBE\000" |
| 5707 | /* 5937 */ "G_SSUBE\000" |
| 5708 | /* 5945 */ "G_USUBE\000" |
| 5709 | /* 5953 */ "G_FENCE\000" |
| 5710 | /* 5961 */ "ARITH_FENCE\000" |
| 5711 | /* 5973 */ "REG_SEQUENCE\000" |
| 5712 | /* 5986 */ "G_SADDE\000" |
| 5713 | /* 5994 */ "G_UADDE\000" |
| 5714 | /* 6002 */ "G_GET_FPMODE\000" |
| 5715 | /* 6015 */ "G_RESET_FPMODE\000" |
| 5716 | /* 6030 */ "G_SET_FPMODE\000" |
| 5717 | /* 6043 */ "G_FMINNUM_IEEE\000" |
| 5718 | /* 6058 */ "G_FMAXNUM_IEEE\000" |
| 5719 | /* 6073 */ "BGE\000" |
| 5720 | /* 6077 */ "PseudoLA_TLS_DESC_LARGE\000" |
| 5721 | /* 6101 */ "PseudoLA_TLS_GD_LARGE\000" |
| 5722 | /* 6123 */ "PseudoLA_TLS_LD_LARGE\000" |
| 5723 | /* 6145 */ "PseudoLA_TLS_IE_LARGE\000" |
| 5724 | /* 6167 */ "PseudoLA_PCREL_LARGE\000" |
| 5725 | /* 6188 */ "PseudoTAIL_LARGE\000" |
| 5726 | /* 6205 */ "PseudoCALL_LARGE\000" |
| 5727 | /* 6222 */ "PseudoLA_ABS_LARGE\000" |
| 5728 | /* 6241 */ "PseudoLA_GOT_LARGE\000" |
| 5729 | /* 6260 */ "PseudoLA_TLS_IE\000" |
| 5730 | /* 6276 */ "G_VSCALE\000" |
| 5731 | /* 6285 */ "G_JUMP_TABLE\000" |
| 5732 | /* 6298 */ "IDLE\000" |
| 5733 | /* 6303 */ "BUNDLE\000" |
| 5734 | /* 6310 */ "PseudoLA_TLS_LE\000" |
| 5735 | /* 6326 */ "BNE\000" |
| 5736 | /* 6330 */ "G_MEMCPY_INLINE\000" |
| 5737 | /* 6346 */ "RELOC_NONE\000" |
| 5738 | /* 6357 */ "SETX86LOOPNE\000" |
| 5739 | /* 6370 */ "LOCAL_ESCAPE\000" |
| 5740 | /* 6383 */ "SETX86LOOPE\000" |
| 5741 | /* 6395 */ "G_STACKRESTORE\000" |
| 5742 | /* 6410 */ "G_INDEXED_STORE\000" |
| 5743 | /* 6426 */ "G_STORE\000" |
| 5744 | /* 6434 */ "SET_CFR_FALSE\000" |
| 5745 | /* 6448 */ "G_BITREVERSE\000" |
| 5746 | /* 6461 */ "FAKE_USE\000" |
| 5747 | /* 6470 */ "LDPTE\000" |
| 5748 | /* 6476 */ "DBG_VALUE\000" |
| 5749 | /* 6486 */ "G_GLOBAL_VALUE\000" |
| 5750 | /* 6501 */ "G_PTRAUTH_GLOBAL_VALUE\000" |
| 5751 | /* 6524 */ "CONVERGENCECTRL_GLUE\000" |
| 5752 | /* 6545 */ "SET_CFR_TRUE\000" |
| 5753 | /* 6558 */ "G_STACKSAVE\000" |
| 5754 | /* 6570 */ "G_MEMMOVE\000" |
| 5755 | /* 6580 */ "ARMMOVE\000" |
| 5756 | /* 6588 */ "G_FREEZE\000" |
| 5757 | /* 6597 */ "G_FCANONICALIZE\000" |
| 5758 | /* 6613 */ "MOVGR2CF\000" |
| 5759 | /* 6622 */ "G_FMODF\000" |
| 5760 | /* 6630 */ "G_CTLZ_ZERO_UNDEF\000" |
| 5761 | /* 6648 */ "G_CTTZ_ZERO_UNDEF\000" |
| 5762 | /* 6666 */ "INIT_UNDEF\000" |
| 5763 | /* 6677 */ "G_IMPLICIT_DEF\000" |
| 5764 | /* 6692 */ "DBG_INSTR_REF\000" |
| 5765 | /* 6706 */ "X86MFFLAG\000" |
| 5766 | /* 6716 */ "ARMMFFLAG\000" |
| 5767 | /* 6726 */ "X86MTFLAG\000" |
| 5768 | /* 6736 */ "ARMMTFLAG\000" |
| 5769 | /* 6746 */ "X86SETTAG\000" |
| 5770 | /* 6756 */ "G_FNEG\000" |
| 5771 | /* 6763 */ "EXTRACT_SUBREG\000" |
| 5772 | /* 6778 */ "INSERT_SUBREG\000" |
| 5773 | /* 6792 */ "G_SEXT_INREG\000" |
| 5774 | /* 6805 */ "SUBREG_TO_REG\000" |
| 5775 | /* 6819 */ "CPUCFG\000" |
| 5776 | /* 6826 */ "G_ATOMIC_CMPXCHG\000" |
| 5777 | /* 6843 */ "GCSRXCHG\000" |
| 5778 | /* 6852 */ "G_ATOMICRMW_XCHG\000" |
| 5779 | /* 6869 */ "G_GET_ROUNDING\000" |
| 5780 | /* 6884 */ "G_SET_ROUNDING\000" |
| 5781 | /* 6899 */ "G_FLOG\000" |
| 5782 | /* 6906 */ "G_VAARG\000" |
| 5783 | /* 6914 */ "PREALLOCATED_ARG\000" |
| 5784 | /* 6931 */ "REVB_2H\000" |
| 5785 | /* 6939 */ "REVB_4H\000" |
| 5786 | /* 6947 */ "TLBSRCH\000" |
| 5787 | /* 6955 */ "G_PREFETCH\000" |
| 5788 | /* 6966 */ "G_SMULH\000" |
| 5789 | /* 6974 */ "G_UMULH\000" |
| 5790 | /* 6982 */ "G_FTANH\000" |
| 5791 | /* 6990 */ "G_FSINH\000" |
| 5792 | /* 6998 */ "G_FCOSH\000" |
| 5793 | /* 7006 */ "GTLBFLUSH\000" |
| 5794 | /* 7016 */ "XVREPLVE0_H\000" |
| 5795 | /* 7028 */ "XVADDA_H\000" |
| 5796 | /* 7037 */ "X86SRA_H\000" |
| 5797 | /* 7046 */ "XVSRA_H\000" |
| 5798 | /* 7054 */ "AMADD__DB_H\000" |
| 5799 | /* 7066 */ "AMSWAP__DB_H\000" |
| 5800 | /* 7079 */ "AMCAS__DB_H\000" |
| 5801 | /* 7091 */ "X86SUB_H\000" |
| 5802 | /* 7100 */ "XVMSUB_H\000" |
| 5803 | /* 7109 */ "XVSSUB_H\000" |
| 5804 | /* 7118 */ "XVSUB_H\000" |
| 5805 | /* 7126 */ "XVSSRANI_B_H\000" |
| 5806 | /* 7139 */ "XVSRANI_B_H\000" |
| 5807 | /* 7151 */ "XVSSRLNI_B_H\000" |
| 5808 | /* 7164 */ "XVSRLNI_B_H\000" |
| 5809 | /* 7176 */ "XVSSRARNI_B_H\000" |
| 5810 | /* 7190 */ "XVSRARNI_B_H\000" |
| 5811 | /* 7203 */ "XVSSRLRNI_B_H\000" |
| 5812 | /* 7217 */ "XVSRLRNI_B_H\000" |
| 5813 | /* 7230 */ "XVSSRAN_B_H\000" |
| 5814 | /* 7242 */ "XVSRAN_B_H\000" |
| 5815 | /* 7253 */ "XVSSRLN_B_H\000" |
| 5816 | /* 7265 */ "XVSRLN_B_H\000" |
| 5817 | /* 7276 */ "XVSSRARN_B_H\000" |
| 5818 | /* 7289 */ "XVSRARN_B_H\000" |
| 5819 | /* 7301 */ "XVSSRLRN_B_H\000" |
| 5820 | /* 7314 */ "XVSRLRN_B_H\000" |
| 5821 | /* 7326 */ "X86SBC_H\000" |
| 5822 | /* 7335 */ "X86ADC_H\000" |
| 5823 | /* 7344 */ "X86DEC_H\000" |
| 5824 | /* 7353 */ "X86INC_H\000" |
| 5825 | /* 7362 */ "X86ADD_H\000" |
| 5826 | /* 7371 */ "AMADD_H\000" |
| 5827 | /* 7379 */ "XVMADD_H\000" |
| 5828 | /* 7388 */ "XVSADD_H\000" |
| 5829 | /* 7397 */ "XVADD_H\000" |
| 5830 | /* 7405 */ "LD_H\000" |
| 5831 | /* 7410 */ "X86AND_H\000" |
| 5832 | /* 7419 */ "XVPACKOD_H\000" |
| 5833 | /* 7430 */ "XVPICKOD_H\000" |
| 5834 | /* 7441 */ "XVMOD_H\000" |
| 5835 | /* 7449 */ "IOCSRRD_H\000" |
| 5836 | /* 7459 */ "XVABSD_H\000" |
| 5837 | /* 7468 */ "VEXT2XV_D_H\000" |
| 5838 | /* 7480 */ "LDLE_H\000" |
| 5839 | /* 7487 */ "XVSLE_H\000" |
| 5840 | /* 7495 */ "STLE_H\000" |
| 5841 | /* 7502 */ "XVREPLVE_H\000" |
| 5842 | /* 7513 */ "XVSHUF_H\000" |
| 5843 | /* 7522 */ "XVNEG_H\000" |
| 5844 | /* 7530 */ "XVAVG_H\000" |
| 5845 | /* 7538 */ "XVMUH_H\000" |
| 5846 | /* 7546 */ "XVILVH_H\000" |
| 5847 | /* 7555 */ "XVSHUF4I_H\000" |
| 5848 | /* 7566 */ "X86SRAI_H\000" |
| 5849 | /* 7576 */ "XVSRAI_H\000" |
| 5850 | /* 7585 */ "XVSLEI_H\000" |
| 5851 | /* 7594 */ "XVREPL128VEI_H\000" |
| 5852 | /* 7609 */ "VREPLVEI_H\000" |
| 5853 | /* 7620 */ "X86RCLI_H\000" |
| 5854 | /* 7630 */ "X86SLLI_H\000" |
| 5855 | /* 7640 */ "XVSLLI_H\000" |
| 5856 | /* 7649 */ "PseudoXVREPLI_H\000" |
| 5857 | /* 7665 */ "PseudoVREPLI_H\000" |
| 5858 | /* 7680 */ "X86SRLI_H\000" |
| 5859 | /* 7690 */ "XVSRLI_H\000" |
| 5860 | /* 7699 */ "X86ROTLI_H\000" |
| 5861 | /* 7710 */ "XVMINI_H\000" |
| 5862 | /* 7719 */ "XVFRSTPI_H\000" |
| 5863 | /* 7730 */ "XVSEQI_H\000" |
| 5864 | /* 7739 */ "XVSRARI_H\000" |
| 5865 | /* 7749 */ "X86RCRI_H\000" |
| 5866 | /* 7759 */ "XVBITCLRI_H\000" |
| 5867 | /* 7771 */ "XVSRLRI_H\000" |
| 5868 | /* 7781 */ "X86ROTRI_H\000" |
| 5869 | /* 7792 */ "XVROTRI_H\000" |
| 5870 | /* 7802 */ "XVBITSETI_H\000" |
| 5871 | /* 7814 */ "XVSLTI_H\000" |
| 5872 | /* 7823 */ "XVBITREVI_H\000" |
| 5873 | /* 7835 */ "XVMAXI_H\000" |
| 5874 | /* 7844 */ "X86RCL_H\000" |
| 5875 | /* 7853 */ "X86SLL_H\000" |
| 5876 | /* 7862 */ "XVSLL_H\000" |
| 5877 | /* 7870 */ "XVLDREPL_H\000" |
| 5878 | /* 7881 */ "X86SRL_H\000" |
| 5879 | /* 7890 */ "XVSRL_H\000" |
| 5880 | /* 7898 */ "X86ROTL_H\000" |
| 5881 | /* 7908 */ "X86MUL_H\000" |
| 5882 | /* 7917 */ "XVMUL_H\000" |
| 5883 | /* 7925 */ "XVILVL_H\000" |
| 5884 | /* 7934 */ "XVSTELM_H\000" |
| 5885 | /* 7944 */ "XVMIN_H\000" |
| 5886 | /* 7952 */ "XVCLO_H\000" |
| 5887 | /* 7960 */ "AMSWAP_H\000" |
| 5888 | /* 7969 */ "XVFRSTP_H\000" |
| 5889 | /* 7979 */ "XVSEQ_H\000" |
| 5890 | /* 7987 */ "XVSRAR_H\000" |
| 5891 | /* 7996 */ "X86RCR_H\000" |
| 5892 | /* 8005 */ "VPICKVE2GR_H\000" |
| 5893 | /* 8018 */ "XVAVGR_H\000" |
| 5894 | /* 8027 */ "XVBITCLR_H\000" |
| 5895 | /* 8038 */ "XVSRLR_H\000" |
| 5896 | /* 8047 */ "X86OR_H\000" |
| 5897 | /* 8055 */ "X86XOR_H\000" |
| 5898 | /* 8064 */ "X86ROTR_H\000" |
| 5899 | /* 8074 */ "XVROTR_H\000" |
| 5900 | /* 8083 */ "XVREPLGR2VR_H\000" |
| 5901 | /* 8097 */ "PseudoXVINSGR2VR_H\000" |
| 5902 | /* 8116 */ "IOCSRWR_H\000" |
| 5903 | /* 8126 */ "AMCAS_H\000" |
| 5904 | /* 8134 */ "XVEXTRINS_H\000" |
| 5905 | /* 8146 */ "XVFCVTH_S_H\000" |
| 5906 | /* 8158 */ "XVFCVTL_S_H\000" |
| 5907 | /* 8170 */ "XVSAT_H\000" |
| 5908 | /* 8178 */ "XVBITSET_H\000" |
| 5909 | /* 8189 */ "LDGT_H\000" |
| 5910 | /* 8196 */ "STGT_H\000" |
| 5911 | /* 8203 */ "XVSLT_H\000" |
| 5912 | /* 8211 */ "XVPCNT_H\000" |
| 5913 | /* 8220 */ "ST_H\000" |
| 5914 | /* 8225 */ "XVSSRANI_BU_H\000" |
| 5915 | /* 8239 */ "XVSSRLNI_BU_H\000" |
| 5916 | /* 8253 */ "XVSSRARNI_BU_H\000" |
| 5917 | /* 8268 */ "XVSSRLRNI_BU_H\000" |
| 5918 | /* 8283 */ "XVSSRAN_BU_H\000" |
| 5919 | /* 8296 */ "XVSSRLN_BU_H\000" |
| 5920 | /* 8309 */ "XVSSRARN_BU_H\000" |
| 5921 | /* 8323 */ "XVSSRLRN_BU_H\000" |
| 5922 | /* 8337 */ "XVMADDWOD_W_HU_H\000" |
| 5923 | /* 8354 */ "XVADDWOD_W_HU_H\000" |
| 5924 | /* 8370 */ "XVMULWOD_W_HU_H\000" |
| 5925 | /* 8386 */ "XVMADDWEV_W_HU_H\000" |
| 5926 | /* 8403 */ "XVADDWEV_W_HU_H\000" |
| 5927 | /* 8419 */ "XVMULWEV_W_HU_H\000" |
| 5928 | /* 8435 */ "XVPACKEV_H\000" |
| 5929 | /* 8446 */ "XVPICKEV_H\000" |
| 5930 | /* 8457 */ "XVBITREV_H\000" |
| 5931 | /* 8468 */ "XVDIV_H\000" |
| 5932 | /* 8476 */ "XVSIGNCOV_H\000" |
| 5933 | /* 8488 */ "XVSUBWOD_W_H\000" |
| 5934 | /* 8501 */ "XVMADDWOD_W_H\000" |
| 5935 | /* 8515 */ "XVADDWOD_W_H\000" |
| 5936 | /* 8528 */ "XVMULWOD_W_H\000" |
| 5937 | /* 8541 */ "XVEXTH_W_H\000" |
| 5938 | /* 8552 */ "XVSLLWIL_W_H\000" |
| 5939 | /* 8565 */ "EXT_W_H\000" |
| 5940 | /* 8573 */ "XVSUBWEV_W_H\000" |
| 5941 | /* 8586 */ "XVMADDWEV_W_H\000" |
| 5942 | /* 8600 */ "XVADDWEV_W_H\000" |
| 5943 | /* 8613 */ "XVMULWEV_W_H\000" |
| 5944 | /* 8626 */ "VEXT2XV_W_H\000" |
| 5945 | /* 8638 */ "XVHSUBW_W_H\000" |
| 5946 | /* 8650 */ "XVHADDW_W_H\000" |
| 5947 | /* 8662 */ "XVMAX_H\000" |
| 5948 | /* 8670 */ "LDX_H\000" |
| 5949 | /* 8676 */ "STX_H\000" |
| 5950 | /* 8682 */ "PseudoXVBZ_H\000" |
| 5951 | /* 8695 */ "PseudoVBZ_H\000" |
| 5952 | /* 8707 */ "XVSETALLNEZ_H\000" |
| 5953 | /* 8721 */ "XVCLZ_H\000" |
| 5954 | /* 8729 */ "PseudoXVBNZ_H\000" |
| 5955 | /* 8743 */ "PseudoVBNZ_H\000" |
| 5956 | /* 8756 */ "XVSETANYEQZ_H\000" |
| 5957 | /* 8770 */ "PseudoXVMSKLTZ_H\000" |
| 5958 | /* 8787 */ "PseudoVMSKLTZ_H\000" |
| 5959 | /* 8803 */ "PCALAU12I\000" |
| 5960 | /* 8813 */ "PCADDU12I\000" |
| 5961 | /* 8823 */ "PCADDU18I\000" |
| 5962 | /* 8833 */ "PCADDI\000" |
| 5963 | /* 8840 */ "XVLDI\000" |
| 5964 | /* 8846 */ "ANDI\000" |
| 5965 | /* 8851 */ "DBG_PHI\000" |
| 5966 | /* 8859 */ "XORI\000" |
| 5967 | /* 8864 */ "G_FPTOSI\000" |
| 5968 | /* 8873 */ "SLTI\000" |
| 5969 | /* 8878 */ "G_FPTOUI\000" |
| 5970 | /* 8887 */ "SLTUI\000" |
| 5971 | /* 8893 */ "G_FPOWI\000" |
| 5972 | /* 8901 */ "SETX86J\000" |
| 5973 | /* 8909 */ "SETARMJ\000" |
| 5974 | /* 8917 */ "BREAK\000" |
| 5975 | /* 8923 */ "COPY_LANEMASK\000" |
| 5976 | /* 8937 */ "G_PTRMASK\000" |
| 5977 | /* 8947 */ "BL\000" |
| 5978 | /* 8950 */ "DBCL\000" |
| 5979 | /* 8955 */ "HVCL\000" |
| 5980 | /* 8960 */ "GC_LABEL\000" |
| 5981 | /* 8969 */ "DBG_LABEL\000" |
| 5982 | /* 8979 */ "EH_LABEL\000" |
| 5983 | /* 8988 */ "ANNOTATION_LABEL\000" |
| 5984 | /* 9005 */ "ICALL_BRANCH_FUNNEL\000" |
| 5985 | /* 9025 */ "PseudoLA_PCREL\000" |
| 5986 | /* 9040 */ "G_FSHL\000" |
| 5987 | /* 9047 */ "G_SHL\000" |
| 5988 | /* 9053 */ "PseudoB_TAIL\000" |
| 5989 | /* 9066 */ "PseudoJIRL_TAIL\000" |
| 5990 | /* 9082 */ "PseudoTAIL\000" |
| 5991 | /* 9093 */ "G_FCEIL\000" |
| 5992 | /* 9101 */ "G_SAVGCEIL\000" |
| 5993 | /* 9112 */ "G_UAVGCEIL\000" |
| 5994 | /* 9123 */ "SYSCALL\000" |
| 5995 | /* 9131 */ "PseudoDESC_CALL\000" |
| 5996 | /* 9147 */ "PATCHABLE_TAIL_CALL\000" |
| 5997 | /* 9167 */ "PseudoJIRL_CALL\000" |
| 5998 | /* 9183 */ "PATCHABLE_TYPED_EVENT_CALL\000" |
| 5999 | /* 9210 */ "PATCHABLE_EVENT_CALL\000" |
| 6000 | /* 9231 */ "FENTRY_CALL\000" |
| 6001 | /* 9243 */ "PseudoCALL\000" |
| 6002 | /* 9254 */ "PseudoTAIL_SMALL\000" |
| 6003 | /* 9271 */ "PseudoCALL_SMALL\000" |
| 6004 | /* 9288 */ "TLBFILL\000" |
| 6005 | /* 9296 */ "KILL\000" |
| 6006 | /* 9301 */ "G_CONSTANT_POOL\000" |
| 6007 | /* 9317 */ "JIRL\000" |
| 6008 | /* 9322 */ "G_ROTL\000" |
| 6009 | /* 9329 */ "G_VECREDUCE_FMUL\000" |
| 6010 | /* 9346 */ "G_FMUL\000" |
| 6011 | /* 9353 */ "G_VECREDUCE_SEQ_FMUL\000" |
| 6012 | /* 9374 */ "G_STRICT_FMUL\000" |
| 6013 | /* 9388 */ "G_VECREDUCE_MUL\000" |
| 6014 | /* 9404 */ "G_MUL\000" |
| 6015 | /* 9410 */ "XVFFINT_D_L\000" |
| 6016 | /* 9422 */ "XVFFINT_S_L\000" |
| 6017 | /* 9434 */ "G_FREM\000" |
| 6018 | /* 9441 */ "G_STRICT_FREM\000" |
| 6019 | /* 9455 */ "G_SREM\000" |
| 6020 | /* 9462 */ "G_UREM\000" |
| 6021 | /* 9469 */ "G_SDIVREM\000" |
| 6022 | /* 9479 */ "G_UDIVREM\000" |
| 6023 | /* 9489 */ "INLINEASM\000" |
| 6024 | /* 9499 */ "X86CLRTM\000" |
| 6025 | /* 9508 */ "X86SETTM\000" |
| 6026 | /* 9517 */ "PseudoTAIL_MEDIUM\000" |
| 6027 | /* 9535 */ "PseudoCALL_MEDIUM\000" |
| 6028 | /* 9553 */ "G_VECREDUCE_FMINIMUM\000" |
| 6029 | /* 9574 */ "G_FMINIMUM\000" |
| 6030 | /* 9585 */ "G_ATOMICRMW_FMINIMUM\000" |
| 6031 | /* 9606 */ "G_VECREDUCE_FMAXIMUM\000" |
| 6032 | /* 9627 */ "G_FMAXIMUM\000" |
| 6033 | /* 9638 */ "G_ATOMICRMW_FMAXIMUM\000" |
| 6034 | /* 9659 */ "G_FMINIMUMNUM\000" |
| 6035 | /* 9673 */ "G_ATOMICRMW_FMINIMUMNUM\000" |
| 6036 | /* 9697 */ "G_FMAXIMUMNUM\000" |
| 6037 | /* 9711 */ "G_ATOMICRMW_FMAXIMUMNUM\000" |
| 6038 | /* 9735 */ "G_FMINNUM\000" |
| 6039 | /* 9745 */ "G_FMAXNUM\000" |
| 6040 | /* 9755 */ "G_FATAN\000" |
| 6041 | /* 9763 */ "G_FTAN\000" |
| 6042 | /* 9770 */ "ANDN\000" |
| 6043 | /* 9775 */ "G_INTRINSIC_ROUNDEVEN\000" |
| 6044 | /* 9797 */ "G_ASSERT_ALIGN\000" |
| 6045 | /* 9812 */ "G_FCOPYSIGN\000" |
| 6046 | /* 9824 */ "G_VECREDUCE_FMIN\000" |
| 6047 | /* 9841 */ "G_ATOMICRMW_FMIN\000" |
| 6048 | /* 9858 */ "G_VECREDUCE_SMIN\000" |
| 6049 | /* 9875 */ "G_SMIN\000" |
| 6050 | /* 9882 */ "G_VECREDUCE_UMIN\000" |
| 6051 | /* 9899 */ "G_UMIN\000" |
| 6052 | /* 9906 */ "G_ATOMICRMW_UMIN\000" |
| 6053 | /* 9923 */ "G_ATOMICRMW_MIN\000" |
| 6054 | /* 9939 */ "G_FASIN\000" |
| 6055 | /* 9947 */ "G_FSIN\000" |
| 6056 | /* 9954 */ "CFI_INSTRUCTION\000" |
| 6057 | /* 9970 */ "ORN\000" |
| 6058 | /* 9974 */ "ERTN\000" |
| 6059 | /* 9979 */ "ADJCALLSTACKDOWN\000" |
| 6060 | /* 9996 */ "G_SSUBO\000" |
| 6061 | /* 10004 */ "G_USUBO\000" |
| 6062 | /* 10012 */ "G_SADDO\000" |
| 6063 | /* 10020 */ "G_UADDO\000" |
| 6064 | /* 10028 */ "JUMP_TABLE_DEBUG_INFO\000" |
| 6065 | /* 10050 */ "G_SMULO\000" |
| 6066 | /* 10058 */ "G_UMULO\000" |
| 6067 | /* 10066 */ "G_BZERO\000" |
| 6068 | /* 10074 */ "STACKMAP\000" |
| 6069 | /* 10083 */ "G_DEBUGTRAP\000" |
| 6070 | /* 10095 */ "G_UBSANTRAP\000" |
| 6071 | /* 10107 */ "G_TRAP\000" |
| 6072 | /* 10114 */ "G_ATOMICRMW_UDEC_WRAP\000" |
| 6073 | /* 10136 */ "G_ATOMICRMW_UINC_WRAP\000" |
| 6074 | /* 10158 */ "G_BSWAP\000" |
| 6075 | /* 10166 */ "G_SITOFP\000" |
| 6076 | /* 10175 */ "G_UITOFP\000" |
| 6077 | /* 10184 */ "G_FCMP\000" |
| 6078 | /* 10191 */ "G_ICMP\000" |
| 6079 | /* 10198 */ "G_SCMP\000" |
| 6080 | /* 10205 */ "G_UCMP\000" |
| 6081 | /* 10212 */ "PseudoUNIMP\000" |
| 6082 | /* 10224 */ "CACOP\000" |
| 6083 | /* 10230 */ "CONVERGENCECTRL_LOOP\000" |
| 6084 | /* 10251 */ "G_CTPOP\000" |
| 6085 | /* 10259 */ "PseudoCTPOP\000" |
| 6086 | /* 10271 */ "X86DECTOP\000" |
| 6087 | /* 10281 */ "X86INCTOP\000" |
| 6088 | /* 10291 */ "X86MFTOP\000" |
| 6089 | /* 10300 */ "X86MTTOP\000" |
| 6090 | /* 10309 */ "PATCHABLE_OP\000" |
| 6091 | /* 10322 */ "FAULTING_OP\000" |
| 6092 | /* 10334 */ "ADJCALLSTACKUP\000" |
| 6093 | /* 10349 */ "PREALLOCATED_SETUP\000" |
| 6094 | /* 10368 */ "G_FLDEXP\000" |
| 6095 | /* 10377 */ "G_STRICT_FLDEXP\000" |
| 6096 | /* 10393 */ "G_FEXP\000" |
| 6097 | /* 10400 */ "G_FFREXP\000" |
| 6098 | /* 10409 */ "BEQ\000" |
| 6099 | /* 10413 */ "XVREPLVE0_Q\000" |
| 6100 | /* 10425 */ "XVSUB_Q\000" |
| 6101 | /* 10433 */ "SC_Q\000" |
| 6102 | /* 10438 */ "XVADD_Q\000" |
| 6103 | /* 10446 */ "XVSSRANI_D_Q\000" |
| 6104 | /* 10459 */ "XVSRANI_D_Q\000" |
| 6105 | /* 10471 */ "XVSSRLNI_D_Q\000" |
| 6106 | /* 10484 */ "XVSRLNI_D_Q\000" |
| 6107 | /* 10496 */ "XVSSRARNI_D_Q\000" |
| 6108 | /* 10510 */ "XVSRARNI_D_Q\000" |
| 6109 | /* 10523 */ "XVSSRLRNI_D_Q\000" |
| 6110 | /* 10537 */ "XVSRLRNI_D_Q\000" |
| 6111 | /* 10550 */ "XVPERMI_Q\000" |
| 6112 | /* 10560 */ "XVSSRANI_DU_Q\000" |
| 6113 | /* 10574 */ "XVSSRLNI_DU_Q\000" |
| 6114 | /* 10588 */ "XVSSRARNI_DU_Q\000" |
| 6115 | /* 10603 */ "XVSSRLRNI_DU_Q\000" |
| 6116 | /* 10618 */ "DBAR\000" |
| 6117 | /* 10623 */ "IBAR\000" |
| 6118 | /* 10628 */ "G_BR\000" |
| 6119 | /* 10633 */ "INLINEASM_BR\000" |
| 6120 | /* 10646 */ "PseudoBR\000" |
| 6121 | /* 10655 */ "MOVGR2SCR\000" |
| 6122 | /* 10665 */ "G_BLOCK_ADDR\000" |
| 6123 | /* 10678 */ "MEMBARRIER\000" |
| 6124 | /* 10689 */ "G_CONSTANT_FOLD_BARRIER\000" |
| 6125 | /* 10713 */ "PATCHABLE_FUNCTION_ENTER\000" |
| 6126 | /* 10738 */ "G_READCYCLECOUNTER\000" |
| 6127 | /* 10757 */ "G_READSTEADYCOUNTER\000" |
| 6128 | /* 10777 */ "G_READ_REGISTER\000" |
| 6129 | /* 10793 */ "G_WRITE_REGISTER\000" |
| 6130 | /* 10810 */ "PseudoLD_CFR\000" |
| 6131 | /* 10823 */ "PseudoST_CFR\000" |
| 6132 | /* 10836 */ "PseudoCopyCFR\000" |
| 6133 | /* 10850 */ "MOVCF2GR\000" |
| 6134 | /* 10859 */ "MOVSCR2GR\000" |
| 6135 | /* 10869 */ "MOVFCSR2GR\000" |
| 6136 | /* 10880 */ "G_ASHR\000" |
| 6137 | /* 10887 */ "G_FSHR\000" |
| 6138 | /* 10894 */ "G_LSHR\000" |
| 6139 | /* 10901 */ "LDDIR\000" |
| 6140 | /* 10907 */ "TLBCLR\000" |
| 6141 | /* 10914 */ "CONVERGENCECTRL_ANCHOR\000" |
| 6142 | /* 10937 */ "NOR\000" |
| 6143 | /* 10941 */ "G_FFLOOR\000" |
| 6144 | /* 10950 */ "G_SAVGFLOOR\000" |
| 6145 | /* 10962 */ "G_UAVGFLOOR\000" |
| 6146 | /* 10974 */ "G_EXTRACT_SUBVECTOR\000" |
| 6147 | /* 10994 */ "G_INSERT_SUBVECTOR\000" |
| 6148 | /* 11013 */ "G_BUILD_VECTOR\000" |
| 6149 | /* 11028 */ "G_SHUFFLE_VECTOR\000" |
| 6150 | /* 11045 */ "G_STEP_VECTOR\000" |
| 6151 | /* 11059 */ "G_SPLAT_VECTOR\000" |
| 6152 | /* 11074 */ "G_VECREDUCE_XOR\000" |
| 6153 | /* 11090 */ "G_XOR\000" |
| 6154 | /* 11096 */ "G_ATOMICRMW_XOR\000" |
| 6155 | /* 11112 */ "G_VECREDUCE_OR\000" |
| 6156 | /* 11127 */ "G_OR\000" |
| 6157 | /* 11132 */ "G_ATOMICRMW_OR\000" |
| 6158 | /* 11147 */ "Select_GPR_Using_CC_GPR\000" |
| 6159 | /* 11171 */ "MOVGR2FCSR\000" |
| 6160 | /* 11182 */ "RDFCSR\000" |
| 6161 | /* 11189 */ "WRFCSR\000" |
| 6162 | /* 11196 */ "G_ROTR\000" |
| 6163 | /* 11203 */ "G_INTTOPTR\000" |
| 6164 | /* 11214 */ "TLBWR\000" |
| 6165 | /* 11220 */ "GCSRWR\000" |
| 6166 | /* 11227 */ "G_FABS\000" |
| 6167 | /* 11234 */ "PseudoLA_ABS\000" |
| 6168 | /* 11247 */ "G_ABS\000" |
| 6169 | /* 11253 */ "G_ABDS\000" |
| 6170 | /* 11260 */ "G_UNMERGE_VALUES\000" |
| 6171 | /* 11277 */ "G_MERGE_VALUES\000" |
| 6172 | /* 11292 */ "G_CTLS\000" |
| 6173 | /* 11299 */ "G_FACOS\000" |
| 6174 | /* 11307 */ "G_FCOS\000" |
| 6175 | /* 11314 */ "G_FSINCOS\000" |
| 6176 | /* 11324 */ "G_CONCAT_VECTORS\000" |
| 6177 | /* 11341 */ "COPY_TO_REGCLASS\000" |
| 6178 | /* 11358 */ "G_IS_FPCLASS\000" |
| 6179 | /* 11371 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\000" |
| 6180 | /* 11401 */ "G_VECTOR_COMPRESS\000" |
| 6181 | /* 11419 */ "G_INTRINSIC_W_SIDE_EFFECTS\000" |
| 6182 | /* 11446 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\000" |
| 6183 | /* 11484 */ "XVFMINA_S\000" |
| 6184 | /* 11494 */ "XVFMAXA_S\000" |
| 6185 | /* 11504 */ "FSCALEB_S\000" |
| 6186 | /* 11514 */ "XVFLOGB_S\000" |
| 6187 | /* 11524 */ "XVFSUB_S\000" |
| 6188 | /* 11533 */ "XVFMSUB_S\000" |
| 6189 | /* 11543 */ "XVFNMSUB_S\000" |
| 6190 | /* 11554 */ "XVFADD_S\000" |
| 6191 | /* 11563 */ "XVFMADD_S\000" |
| 6192 | /* 11573 */ "XVFNMADD_S\000" |
| 6193 | /* 11584 */ "FLD_S\000" |
| 6194 | /* 11590 */ "XVFCVTH_D_S\000" |
| 6195 | /* 11602 */ "XVFCVTL_D_S\000" |
| 6196 | /* 11614 */ "FCVT_D_S\000" |
| 6197 | /* 11623 */ "XVFCMP_CLE_S\000" |
| 6198 | /* 11636 */ "FLDLE_S\000" |
| 6199 | /* 11644 */ "XVFCMP_SLE_S\000" |
| 6200 | /* 11657 */ "FSTLE_S\000" |
| 6201 | /* 11665 */ "XVFCMP_CULE_S\000" |
| 6202 | /* 11679 */ "XVFCMP_SULE_S\000" |
| 6203 | /* 11693 */ "XVFCMP_CNE_S\000" |
| 6204 | /* 11706 */ "XVFRINTRNE_S\000" |
| 6205 | /* 11719 */ "XVFCMP_SNE_S\000" |
| 6206 | /* 11732 */ "XVFCMP_CUNE_S\000" |
| 6207 | /* 11746 */ "XVFCMP_SUNE_S\000" |
| 6208 | /* 11760 */ "XVFRECIPE_S\000" |
| 6209 | /* 11772 */ "XVFRSQRTE_S\000" |
| 6210 | /* 11784 */ "XVFCMP_CAF_S\000" |
| 6211 | /* 11797 */ "XVFCMP_SAF_S\000" |
| 6212 | /* 11810 */ "FNEG_S\000" |
| 6213 | /* 11817 */ "XVFCVT_H_S\000" |
| 6214 | /* 11828 */ "XVFMUL_S\000" |
| 6215 | /* 11837 */ "FTINTRNE_L_S\000" |
| 6216 | /* 11850 */ "XVFTINTRNEH_L_S\000" |
| 6217 | /* 11866 */ "XVFTINTRMH_L_S\000" |
| 6218 | /* 11881 */ "XVFTINTRPH_L_S\000" |
| 6219 | /* 11896 */ "XVFTINTH_L_S\000" |
| 6220 | /* 11909 */ "XVFTINTRZH_L_S\000" |
| 6221 | /* 11924 */ "XVFTINTRNEL_L_S\000" |
| 6222 | /* 11940 */ "XVFTINTRML_L_S\000" |
| 6223 | /* 11955 */ "XVFTINTRPL_L_S\000" |
| 6224 | /* 11970 */ "XVFTINTL_L_S\000" |
| 6225 | /* 11983 */ "XVFTINTRZL_L_S\000" |
| 6226 | /* 11998 */ "FTINTRM_L_S\000" |
| 6227 | /* 12010 */ "FTINTRP_L_S\000" |
| 6228 | /* 12022 */ "FTINT_L_S\000" |
| 6229 | /* 12032 */ "FTINTRZ_L_S\000" |
| 6230 | /* 12044 */ "XVFRINTRM_S\000" |
| 6231 | /* 12056 */ "FCOPYSIGN_S\000" |
| 6232 | /* 12068 */ "XVFMIN_S\000" |
| 6233 | /* 12077 */ "XVFCMP_CUN_S\000" |
| 6234 | /* 12090 */ "XVFCMP_SUN_S\000" |
| 6235 | /* 12103 */ "XVFRECIP_S\000" |
| 6236 | /* 12114 */ "XVFRINTRP_S\000" |
| 6237 | /* 12126 */ "XVFCMP_CEQ_S\000" |
| 6238 | /* 12139 */ "XVFCMP_SEQ_S\000" |
| 6239 | /* 12152 */ "XVFCMP_CUEQ_S\000" |
| 6240 | /* 12166 */ "XVFCMP_SUEQ_S\000" |
| 6241 | /* 12180 */ "MOVFRH2GR_S\000" |
| 6242 | /* 12192 */ "MOVFR2GR_S\000" |
| 6243 | /* 12203 */ "XVFCMP_COR_S\000" |
| 6244 | /* 12216 */ "XVFCMP_SOR_S\000" |
| 6245 | /* 12229 */ "FABS_S\000" |
| 6246 | /* 12236 */ "XVFCLASS_S\000" |
| 6247 | /* 12247 */ "G_TRUNC_SSAT_S\000" |
| 6248 | /* 12262 */ "FLDGT_S\000" |
| 6249 | /* 12270 */ "FSTGT_S\000" |
| 6250 | /* 12278 */ "XVFCMP_CLT_S\000" |
| 6251 | /* 12291 */ "XVFCMP_SLT_S\000" |
| 6252 | /* 12304 */ "XVFCMP_CULT_S\000" |
| 6253 | /* 12318 */ "XVFCMP_SULT_S\000" |
| 6254 | /* 12332 */ "XVFRINT_S\000" |
| 6255 | /* 12342 */ "XVFSQRT_S\000" |
| 6256 | /* 12352 */ "XVFRSQRT_S\000" |
| 6257 | /* 12363 */ "FST_S\000" |
| 6258 | /* 12369 */ "XVFTINT_WU_S\000" |
| 6259 | /* 12382 */ "XVFTINTRZ_WU_S\000" |
| 6260 | /* 12397 */ "XVFDIV_S\000" |
| 6261 | /* 12406 */ "FMOV_S\000" |
| 6262 | /* 12413 */ "XVFTINTRNE_W_S\000" |
| 6263 | /* 12428 */ "XVFTINTRM_W_S\000" |
| 6264 | /* 12442 */ "XVFTINTRP_W_S\000" |
| 6265 | /* 12456 */ "XVFTINT_W_S\000" |
| 6266 | /* 12468 */ "XVFTINTRZ_W_S\000" |
| 6267 | /* 12482 */ "XVFMAX_S\000" |
| 6268 | /* 12491 */ "FLDX_S\000" |
| 6269 | /* 12498 */ "FSTX_S\000" |
| 6270 | /* 12505 */ "XVFRINTRZ_S\000" |
| 6271 | /* 12517 */ "MOVFR2CF_xS\000" |
| 6272 | /* 12529 */ "FSEL_xS\000" |
| 6273 | /* 12537 */ "MOVCF2FR_xS\000" |
| 6274 | /* 12549 */ "G_SSUBSAT\000" |
| 6275 | /* 12559 */ "G_USUBSAT\000" |
| 6276 | /* 12569 */ "G_SADDSAT\000" |
| 6277 | /* 12579 */ "G_UADDSAT\000" |
| 6278 | /* 12589 */ "G_SSHLSAT\000" |
| 6279 | /* 12599 */ "G_USHLSAT\000" |
| 6280 | /* 12609 */ "G_SMULFIXSAT\000" |
| 6281 | /* 12622 */ "G_UMULFIXSAT\000" |
| 6282 | /* 12635 */ "G_SDIVFIXSAT\000" |
| 6283 | /* 12648 */ "G_UDIVFIXSAT\000" |
| 6284 | /* 12661 */ "G_ATOMICRMW_USUB_SAT\000" |
| 6285 | /* 12682 */ "G_FPTOSI_SAT\000" |
| 6286 | /* 12695 */ "G_FPTOUI_SAT\000" |
| 6287 | /* 12708 */ "G_EXTRACT\000" |
| 6288 | /* 12718 */ "G_SELECT\000" |
| 6289 | /* 12727 */ "G_BRINDIRECT\000" |
| 6290 | /* 12740 */ "PATCHABLE_RET\000" |
| 6291 | /* 12754 */ "PseudoRET\000" |
| 6292 | /* 12764 */ "G_MEMSET\000" |
| 6293 | /* 12773 */ "PATCHABLE_FUNCTION_EXIT\000" |
| 6294 | /* 12797 */ "G_BRJT\000" |
| 6295 | /* 12804 */ "BLT\000" |
| 6296 | /* 12808 */ "G_EXTRACT_VECTOR_ELT\000" |
| 6297 | /* 12829 */ "G_INSERT_VECTOR_ELT\000" |
| 6298 | /* 12849 */ "SLT\000" |
| 6299 | /* 12853 */ "G_FCONSTANT\000" |
| 6300 | /* 12865 */ "G_CONSTANT\000" |
| 6301 | /* 12876 */ "G_INTRINSIC_CONVERGENT\000" |
| 6302 | /* 12899 */ "STATEPOINT\000" |
| 6303 | /* 12910 */ "PATCHPOINT\000" |
| 6304 | /* 12921 */ "G_PTRTOINT\000" |
| 6305 | /* 12932 */ "G_FRINT\000" |
| 6306 | /* 12940 */ "G_INTRINSIC_LLRINT\000" |
| 6307 | /* 12959 */ "G_INTRINSIC_LRINT\000" |
| 6308 | /* 12977 */ "G_FNEARBYINT\000" |
| 6309 | /* 12990 */ "PseudoLA_GOT\000" |
| 6310 | /* 13003 */ "G_VASTART\000" |
| 6311 | /* 13013 */ "LIFETIME_START\000" |
| 6312 | /* 13028 */ "G_INVOKE_REGION_START\000" |
| 6313 | /* 13050 */ "G_INSERT\000" |
| 6314 | /* 13059 */ "G_FSQRT\000" |
| 6315 | /* 13067 */ "G_STRICT_FSQRT\000" |
| 6316 | /* 13082 */ "G_BITCAST\000" |
| 6317 | /* 13092 */ "G_ADDRSPACE_CAST\000" |
| 6318 | /* 13109 */ "DBG_VALUE_LIST\000" |
| 6319 | /* 13124 */ "XVST\000" |
| 6320 | /* 13129 */ "G_FPEXT\000" |
| 6321 | /* 13137 */ "G_SEXT\000" |
| 6322 | /* 13144 */ "G_ASSERT_SEXT\000" |
| 6323 | /* 13158 */ "G_ANYEXT\000" |
| 6324 | /* 13167 */ "G_ZEXT\000" |
| 6325 | /* 13174 */ "G_ASSERT_ZEXT\000" |
| 6326 | /* 13188 */ "XVSSUB_BU\000" |
| 6327 | /* 13198 */ "XVSADD_BU\000" |
| 6328 | /* 13208 */ "LD_BU\000" |
| 6329 | /* 13214 */ "XVMOD_BU\000" |
| 6330 | /* 13223 */ "XVABSD_BU\000" |
| 6331 | /* 13233 */ "XVSLE_BU\000" |
| 6332 | /* 13242 */ "XVAVG_BU\000" |
| 6333 | /* 13251 */ "XVMUH_BU\000" |
| 6334 | /* 13260 */ "XVSUBWOD_H_BU\000" |
| 6335 | /* 13274 */ "XVMADDWOD_H_BU\000" |
| 6336 | /* 13289 */ "XVADDWOD_H_BU\000" |
| 6337 | /* 13303 */ "XVMULWOD_H_BU\000" |
| 6338 | /* 13317 */ "XVSUBWEV_H_BU\000" |
| 6339 | /* 13331 */ "XVMADDWEV_H_BU\000" |
| 6340 | /* 13346 */ "XVADDWEV_H_BU\000" |
| 6341 | /* 13360 */ "XVMULWEV_H_BU\000" |
| 6342 | /* 13374 */ "XVSUBI_BU\000" |
| 6343 | /* 13384 */ "XVADDI_BU\000" |
| 6344 | /* 13394 */ "XVSLEI_BU\000" |
| 6345 | /* 13404 */ "XVMINI_BU\000" |
| 6346 | /* 13414 */ "XVSLTI_BU\000" |
| 6347 | /* 13424 */ "XVMAXI_BU\000" |
| 6348 | /* 13434 */ "X86MUL_BU\000" |
| 6349 | /* 13444 */ "XVMIN_BU\000" |
| 6350 | /* 13453 */ "VPICKVE2GR_BU\000" |
| 6351 | /* 13467 */ "XVAVGR_BU\000" |
| 6352 | /* 13477 */ "XVSAT_BU\000" |
| 6353 | /* 13486 */ "XVSLT_BU\000" |
| 6354 | /* 13495 */ "VEXT2XV_DU_BU\000" |
| 6355 | /* 13509 */ "XVEXTH_HU_BU\000" |
| 6356 | /* 13522 */ "XVSLLWIL_HU_BU\000" |
| 6357 | /* 13537 */ "VEXT2XV_HU_BU\000" |
| 6358 | /* 13551 */ "XVHSUBW_HU_BU\000" |
| 6359 | /* 13565 */ "XVHADDW_HU_BU\000" |
| 6360 | /* 13579 */ "VEXT2XV_WU_BU\000" |
| 6361 | /* 13593 */ "XVDIV_BU\000" |
| 6362 | /* 13602 */ "XVMAX_BU\000" |
| 6363 | /* 13611 */ "LDX_BU\000" |
| 6364 | /* 13618 */ "G_ABDU\000" |
| 6365 | /* 13625 */ "AMMIN__DB_DU\000" |
| 6366 | /* 13638 */ "AMMAX__DB_DU\000" |
| 6367 | /* 13651 */ "X86SUB_DU\000" |
| 6368 | /* 13661 */ "XVSSUB_DU\000" |
| 6369 | /* 13671 */ "X86ADD_DU\000" |
| 6370 | /* 13681 */ "XVSADD_DU\000" |
| 6371 | /* 13691 */ "XVMOD_DU\000" |
| 6372 | /* 13700 */ "XVABSD_DU\000" |
| 6373 | /* 13710 */ "XVSLE_DU\000" |
| 6374 | /* 13719 */ "XVAVG_DU\000" |
| 6375 | /* 13728 */ "MULH_DU\000" |
| 6376 | /* 13736 */ "XVMUH_DU\000" |
| 6377 | /* 13745 */ "XVSUBI_DU\000" |
| 6378 | /* 13755 */ "XVADDI_DU\000" |
| 6379 | /* 13765 */ "XVSLEI_DU\000" |
| 6380 | /* 13775 */ "XVMINI_DU\000" |
| 6381 | /* 13785 */ "XVSLTI_DU\000" |
| 6382 | /* 13795 */ "XVMAXI_DU\000" |
| 6383 | /* 13805 */ "X86MUL_DU\000" |
| 6384 | /* 13815 */ "AMMIN_DU\000" |
| 6385 | /* 13824 */ "XVMIN_DU\000" |
| 6386 | /* 13833 */ "XVSUBWOD_Q_DU\000" |
| 6387 | /* 13847 */ "XVMADDWOD_Q_DU\000" |
| 6388 | /* 13862 */ "XVADDWOD_Q_DU\000" |
| 6389 | /* 13876 */ "XVMULWOD_Q_DU\000" |
| 6390 | /* 13890 */ "XVSUBWEV_Q_DU\000" |
| 6391 | /* 13904 */ "XVMADDWEV_Q_DU\000" |
| 6392 | /* 13919 */ "XVADDWEV_Q_DU\000" |
| 6393 | /* 13933 */ "XVMULWEV_Q_DU\000" |
| 6394 | /* 13947 */ "XVPICKVE2GR_DU\000" |
| 6395 | /* 13962 */ "XVAVGR_DU\000" |
| 6396 | /* 13972 */ "XVSAT_DU\000" |
| 6397 | /* 13981 */ "XVSLT_DU\000" |
| 6398 | /* 13990 */ "XVEXTH_QU_DU\000" |
| 6399 | /* 14003 */ "XVEXTL_QU_DU\000" |
| 6400 | /* 14016 */ "XVHSUBW_QU_DU\000" |
| 6401 | /* 14030 */ "XVHADDW_QU_DU\000" |
| 6402 | /* 14044 */ "XVDIV_DU\000" |
| 6403 | /* 14053 */ "AMMAX_DU\000" |
| 6404 | /* 14062 */ "XVMAX_DU\000" |
| 6405 | /* 14071 */ "BGEU\000" |
| 6406 | /* 14076 */ "XVSSUB_HU\000" |
| 6407 | /* 14086 */ "XVSADD_HU\000" |
| 6408 | /* 14096 */ "LD_HU\000" |
| 6409 | /* 14102 */ "XVMOD_HU\000" |
| 6410 | /* 14111 */ "XVABSD_HU\000" |
| 6411 | /* 14121 */ "XVSLE_HU\000" |
| 6412 | /* 14130 */ "XVAVG_HU\000" |
| 6413 | /* 14139 */ "XVMUH_HU\000" |
| 6414 | /* 14148 */ "XVSUBI_HU\000" |
| 6415 | /* 14158 */ "XVADDI_HU\000" |
| 6416 | /* 14168 */ "XVSLEI_HU\000" |
| 6417 | /* 14178 */ "XVMINI_HU\000" |
| 6418 | /* 14188 */ "XVSLTI_HU\000" |
| 6419 | /* 14198 */ "XVMAXI_HU\000" |
| 6420 | /* 14208 */ "X86MUL_HU\000" |
| 6421 | /* 14218 */ "XVMIN_HU\000" |
| 6422 | /* 14227 */ "VPICKVE2GR_HU\000" |
| 6423 | /* 14241 */ "XVAVGR_HU\000" |
| 6424 | /* 14251 */ "XVSAT_HU\000" |
| 6425 | /* 14260 */ "XVSLT_HU\000" |
| 6426 | /* 14269 */ "VEXT2XV_DU_HU\000" |
| 6427 | /* 14283 */ "XVEXTH_WU_HU\000" |
| 6428 | /* 14296 */ "XVSLLWIL_WU_HU\000" |
| 6429 | /* 14311 */ "VEXT2XV_WU_HU\000" |
| 6430 | /* 14325 */ "XVHSUBW_WU_HU\000" |
| 6431 | /* 14339 */ "XVHADDW_WU_HU\000" |
| 6432 | /* 14353 */ "XVDIV_HU\000" |
| 6433 | /* 14362 */ "XVSUBWOD_W_HU\000" |
| 6434 | /* 14376 */ "XVMADDWOD_W_HU\000" |
| 6435 | /* 14391 */ "XVADDWOD_W_HU\000" |
| 6436 | /* 14405 */ "XVMULWOD_W_HU\000" |
| 6437 | /* 14419 */ "XVSUBWEV_W_HU\000" |
| 6438 | /* 14433 */ "XVMADDWEV_W_HU\000" |
| 6439 | /* 14448 */ "XVADDWEV_W_HU\000" |
| 6440 | /* 14462 */ "XVMULWEV_W_HU\000" |
| 6441 | /* 14476 */ "XVMAX_HU\000" |
| 6442 | /* 14485 */ "LDX_HU\000" |
| 6443 | /* 14492 */ "XVFFINT_D_LU\000" |
| 6444 | /* 14505 */ "BLTU\000" |
| 6445 | /* 14510 */ "SLTU\000" |
| 6446 | /* 14515 */ "AMMIN__DB_WU\000" |
| 6447 | /* 14528 */ "AMMAX__DB_WU\000" |
| 6448 | /* 14541 */ "X86SUB_WU\000" |
| 6449 | /* 14551 */ "XVSSUB_WU\000" |
| 6450 | /* 14561 */ "X86ADD_WU\000" |
| 6451 | /* 14571 */ "XVSADD_WU\000" |
| 6452 | /* 14581 */ "LD_WU\000" |
| 6453 | /* 14587 */ "XVMOD_WU\000" |
| 6454 | /* 14596 */ "XVABSD_WU\000" |
| 6455 | /* 14606 */ "XVSUBWOD_D_WU\000" |
| 6456 | /* 14620 */ "XVMADDWOD_D_WU\000" |
| 6457 | /* 14635 */ "XVADDWOD_D_WU\000" |
| 6458 | /* 14649 */ "XVMULWOD_D_WU\000" |
| 6459 | /* 14663 */ "XVSUBWEV_D_WU\000" |
| 6460 | /* 14677 */ "XVMADDWEV_D_WU\000" |
| 6461 | /* 14692 */ "XVADDWEV_D_WU\000" |
| 6462 | /* 14706 */ "XVMULWEV_D_WU\000" |
| 6463 | /* 14720 */ "MULW_D_WU\000" |
| 6464 | /* 14730 */ "XVSLE_WU\000" |
| 6465 | /* 14739 */ "XVAVG_WU\000" |
| 6466 | /* 14748 */ "MULH_WU\000" |
| 6467 | /* 14756 */ "XVMUH_WU\000" |
| 6468 | /* 14765 */ "XVSUBI_WU\000" |
| 6469 | /* 14775 */ "XVADDI_WU\000" |
| 6470 | /* 14785 */ "XVSLEI_WU\000" |
| 6471 | /* 14795 */ "XVMINI_WU\000" |
| 6472 | /* 14805 */ "XVSLTI_WU\000" |
| 6473 | /* 14815 */ "XVMAXI_WU\000" |
| 6474 | /* 14825 */ "ALSL_WU\000" |
| 6475 | /* 14833 */ "X86MUL_WU\000" |
| 6476 | /* 14843 */ "AMMIN_WU\000" |
| 6477 | /* 14852 */ "XVMIN_WU\000" |
| 6478 | /* 14861 */ "XVPICKVE2GR_WU\000" |
| 6479 | /* 14876 */ "XVAVGR_WU\000" |
| 6480 | /* 14886 */ "XVFFINT_S_WU\000" |
| 6481 | /* 14899 */ "XVSAT_WU\000" |
| 6482 | /* 14908 */ "XVSLT_WU\000" |
| 6483 | /* 14917 */ "XVEXTH_DU_WU\000" |
| 6484 | /* 14930 */ "XVSLLWIL_DU_WU\000" |
| 6485 | /* 14945 */ "VEXT2XV_DU_WU\000" |
| 6486 | /* 14959 */ "XVHSUBW_DU_WU\000" |
| 6487 | /* 14973 */ "XVHADDW_DU_WU\000" |
| 6488 | /* 14987 */ "XVDIV_WU\000" |
| 6489 | /* 14996 */ "AMMAX_WU\000" |
| 6490 | /* 15005 */ "XVMAX_WU\000" |
| 6491 | /* 15014 */ "LDX_WU\000" |
| 6492 | /* 15021 */ "G_TRUNC_SSAT_U\000" |
| 6493 | /* 15036 */ "G_TRUNC_USAT_U\000" |
| 6494 | /* 15051 */ "G_FDIV\000" |
| 6495 | /* 15058 */ "G_STRICT_FDIV\000" |
| 6496 | /* 15072 */ "G_SDIV\000" |
| 6497 | /* 15079 */ "G_UDIV\000" |
| 6498 | /* 15086 */ "G_GET_FPENV\000" |
| 6499 | /* 15098 */ "G_RESET_FPENV\000" |
| 6500 | /* 15112 */ "G_SET_FPENV\000" |
| 6501 | /* 15124 */ "XVAND_V\000" |
| 6502 | /* 15132 */ "XVBITSEL_V\000" |
| 6503 | /* 15143 */ "XVBSLL_V\000" |
| 6504 | /* 15152 */ "XVBSRL_V\000" |
| 6505 | /* 15161 */ "XVANDN_V\000" |
| 6506 | /* 15170 */ "XVORN_V\000" |
| 6507 | /* 15178 */ "XVNOR_V\000" |
| 6508 | /* 15186 */ "XVOR_V\000" |
| 6509 | /* 15193 */ "XVXOR_V\000" |
| 6510 | /* 15201 */ "XVSETNEZ_V\000" |
| 6511 | /* 15212 */ "XVSETEQZ_V\000" |
| 6512 | /* 15223 */ "REVB_2W\000" |
| 6513 | /* 15231 */ "REVH_2W\000" |
| 6514 | /* 15239 */ "G_FPOW\000" |
| 6515 | /* 15246 */ "XVREPLVE0_W\000" |
| 6516 | /* 15258 */ "XVINSVE0_W\000" |
| 6517 | /* 15269 */ "XVADDA_W\000" |
| 6518 | /* 15278 */ "X86SRA_W\000" |
| 6519 | /* 15287 */ "ARMSRA_W\000" |
| 6520 | /* 15296 */ "XVSRA_W\000" |
| 6521 | /* 15304 */ "AMADD__DB_W\000" |
| 6522 | /* 15316 */ "AMAND__DB_W\000" |
| 6523 | /* 15328 */ "AMMIN__DB_W\000" |
| 6524 | /* 15340 */ "AMSWAP__DB_W\000" |
| 6525 | /* 15353 */ "AMOR__DB_W\000" |
| 6526 | /* 15364 */ "AMXOR__DB_W\000" |
| 6527 | /* 15376 */ "AMCAS__DB_W\000" |
| 6528 | /* 15388 */ "AMMAX__DB_W\000" |
| 6529 | /* 15400 */ "X86SUB_W\000" |
| 6530 | /* 15409 */ "ARMSUB_W\000" |
| 6531 | /* 15418 */ "XVMSUB_W\000" |
| 6532 | /* 15427 */ "XVSSUB_W\000" |
| 6533 | /* 15436 */ "XVSUB_W\000" |
| 6534 | /* 15444 */ "CRCC_W_B_W\000" |
| 6535 | /* 15455 */ "CRC_W_B_W\000" |
| 6536 | /* 15465 */ "X86SBC_W\000" |
| 6537 | /* 15474 */ "ARMSBC_W\000" |
| 6538 | /* 15483 */ "X86ADC_W\000" |
| 6539 | /* 15492 */ "ARMADC_W\000" |
| 6540 | /* 15501 */ "X86DEC_W\000" |
| 6541 | /* 15510 */ "X86INC_W\000" |
| 6542 | /* 15519 */ "SC_W\000" |
| 6543 | /* 15524 */ "X86ADD_W\000" |
| 6544 | /* 15533 */ "AMADD_W\000" |
| 6545 | /* 15541 */ "ARMADD_W\000" |
| 6546 | /* 15550 */ "XVMADD_W\000" |
| 6547 | /* 15559 */ "XVSADD_W\000" |
| 6548 | /* 15568 */ "XVADD_W\000" |
| 6549 | /* 15576 */ "LD_W\000" |
| 6550 | /* 15581 */ "X86AND_W\000" |
| 6551 | /* 15590 */ "AMAND_W\000" |
| 6552 | /* 15598 */ "ARMAND_W\000" |
| 6553 | /* 15607 */ "XVPACKOD_W\000" |
| 6554 | /* 15618 */ "XVPICKOD_W\000" |
| 6555 | /* 15629 */ "XVMOD_W\000" |
| 6556 | /* 15637 */ "IOCSRRD_W\000" |
| 6557 | /* 15647 */ "XVABSD_W\000" |
| 6558 | /* 15656 */ "XVSUBWOD_D_W\000" |
| 6559 | /* 15669 */ "XVMADDWOD_D_W\000" |
| 6560 | /* 15683 */ "XVADDWOD_D_W\000" |
| 6561 | /* 15696 */ "XVMULWOD_D_W\000" |
| 6562 | /* 15709 */ "XVFFINTH_D_W\000" |
| 6563 | /* 15722 */ "XVEXTH_D_W\000" |
| 6564 | /* 15733 */ "XVSLLWIL_D_W\000" |
| 6565 | /* 15746 */ "XVFFINTL_D_W\000" |
| 6566 | /* 15759 */ "FFINT_D_W\000" |
| 6567 | /* 15769 */ "XVSUBWEV_D_W\000" |
| 6568 | /* 15782 */ "XVMADDWEV_D_W\000" |
| 6569 | /* 15796 */ "XVADDWEV_D_W\000" |
| 6570 | /* 15809 */ "XVMULWEV_D_W\000" |
| 6571 | /* 15822 */ "VEXT2XV_D_W\000" |
| 6572 | /* 15834 */ "XVHSUBW_D_W\000" |
| 6573 | /* 15846 */ "XVHADDW_D_W\000" |
| 6574 | /* 15858 */ "MULW_D_W\000" |
| 6575 | /* 15867 */ "CRCC_W_D_W\000" |
| 6576 | /* 15878 */ "CRC_W_D_W\000" |
| 6577 | /* 15888 */ "LDLE_W\000" |
| 6578 | /* 15895 */ "XVSLE_W\000" |
| 6579 | /* 15903 */ "STLE_W\000" |
| 6580 | /* 15910 */ "XVPICKVE_W\000" |
| 6581 | /* 15921 */ "XVREPLVE_W\000" |
| 6582 | /* 15932 */ "XVSHUF_W\000" |
| 6583 | /* 15941 */ "XVNEG_W\000" |
| 6584 | /* 15949 */ "XVAVG_W\000" |
| 6585 | /* 15957 */ "RDTIMEH_W\000" |
| 6586 | /* 15967 */ "MULH_W\000" |
| 6587 | /* 15974 */ "MOVGR2FRH_W\000" |
| 6588 | /* 15986 */ "XVMUH_W\000" |
| 6589 | /* 15994 */ "XVILVH_W\000" |
| 6590 | /* 16003 */ "XVSSRANI_H_W\000" |
| 6591 | /* 16016 */ "XVSRANI_H_W\000" |
| 6592 | /* 16028 */ "XVSSRLNI_H_W\000" |
| 6593 | /* 16041 */ "XVSRLNI_H_W\000" |
| 6594 | /* 16053 */ "XVSSRARNI_H_W\000" |
| 6595 | /* 16067 */ "XVSRARNI_H_W\000" |
| 6596 | /* 16080 */ "XVSSRLRNI_H_W\000" |
| 6597 | /* 16094 */ "XVSRLRNI_H_W\000" |
| 6598 | /* 16107 */ "XVSSRAN_H_W\000" |
| 6599 | /* 16119 */ "XVSRAN_H_W\000" |
| 6600 | /* 16130 */ "XVSSRLN_H_W\000" |
| 6601 | /* 16142 */ "XVSRLN_H_W\000" |
| 6602 | /* 16153 */ "XVSSRARN_H_W\000" |
| 6603 | /* 16166 */ "XVSRARN_H_W\000" |
| 6604 | /* 16178 */ "XVSSRLRN_H_W\000" |
| 6605 | /* 16191 */ "XVSRLRN_H_W\000" |
| 6606 | /* 16203 */ "CRCC_W_H_W\000" |
| 6607 | /* 16214 */ "CRC_W_H_W\000" |
| 6608 | /* 16224 */ "ADDU12I_W\000" |
| 6609 | /* 16234 */ "LU12I_W\000" |
| 6610 | /* 16242 */ "XVSHUF4I_W\000" |
| 6611 | /* 16253 */ "X86SRAI_W\000" |
| 6612 | /* 16263 */ "ARMSRAI_W\000" |
| 6613 | /* 16273 */ "XVSRAI_W\000" |
| 6614 | /* 16282 */ "ADDI_W\000" |
| 6615 | /* 16289 */ "XVSLEI_W\000" |
| 6616 | /* 16298 */ "XVREPL128VEI_W\000" |
| 6617 | /* 16313 */ "VREPLVEI_W\000" |
| 6618 | /* 16324 */ "X86RCLI_W\000" |
| 6619 | /* 16334 */ "X86SLLI_W\000" |
| 6620 | /* 16344 */ "ARMSLLI_W\000" |
| 6621 | /* 16354 */ "XVSLLI_W\000" |
| 6622 | /* 16363 */ "PseudoXVREPLI_W\000" |
| 6623 | /* 16379 */ "PseudoVREPLI_W\000" |
| 6624 | /* 16394 */ "X86SRLI_W\000" |
| 6625 | /* 16404 */ "ARMSRLI_W\000" |
| 6626 | /* 16414 */ "XVSRLI_W\000" |
| 6627 | /* 16423 */ "X86ROTLI_W\000" |
| 6628 | /* 16434 */ "PseudoLI_W\000" |
| 6629 | /* 16445 */ "XVPERMI_W\000" |
| 6630 | /* 16455 */ "XVMINI_W\000" |
| 6631 | /* 16464 */ "XVSEQI_W\000" |
| 6632 | /* 16473 */ "XVSRARI_W\000" |
| 6633 | /* 16483 */ "X86RCRI_W\000" |
| 6634 | /* 16493 */ "XVBITCLRI_W\000" |
| 6635 | /* 16505 */ "XVSRLRI_W\000" |
| 6636 | /* 16515 */ "X86ROTRI_W\000" |
| 6637 | /* 16526 */ "ARMROTRI_W\000" |
| 6638 | /* 16537 */ "XVROTRI_W\000" |
| 6639 | /* 16547 */ "XVBITSETI_W\000" |
| 6640 | /* 16559 */ "XVSLTI_W\000" |
| 6641 | /* 16568 */ "XVBITREVI_W\000" |
| 6642 | /* 16580 */ "XVMAXI_W\000" |
| 6643 | /* 16589 */ "BYTEPICK_W\000" |
| 6644 | /* 16600 */ "BSTRPICK_W\000" |
| 6645 | /* 16611 */ "X86RCL_W\000" |
| 6646 | /* 16620 */ "LDL_W\000" |
| 6647 | /* 16626 */ "RDTIMEL_W\000" |
| 6648 | /* 16636 */ "SCREL_W\000" |
| 6649 | /* 16644 */ "X86SLL_W\000" |
| 6650 | /* 16653 */ "ARMSLL_W\000" |
| 6651 | /* 16662 */ "XVSLL_W\000" |
| 6652 | /* 16670 */ "XVLDREPL_W\000" |
| 6653 | /* 16681 */ "X86SRL_W\000" |
| 6654 | /* 16690 */ "ARMSRL_W\000" |
| 6655 | /* 16699 */ "XVSRL_W\000" |
| 6656 | /* 16707 */ "ALSL_W\000" |
| 6657 | /* 16714 */ "X86ROTL_W\000" |
| 6658 | /* 16724 */ "STL_W\000" |
| 6659 | /* 16730 */ "X86MUL_W\000" |
| 6660 | /* 16739 */ "XVMUL_W\000" |
| 6661 | /* 16747 */ "XVILVL_W\000" |
| 6662 | /* 16756 */ "XVSTELM_W\000" |
| 6663 | /* 16766 */ "XVPERM_W\000" |
| 6664 | /* 16775 */ "AMMIN_W\000" |
| 6665 | /* 16783 */ "XVMIN_W\000" |
| 6666 | /* 16791 */ "XVCLO_W\000" |
| 6667 | /* 16799 */ "CTO_W\000" |
| 6668 | /* 16805 */ "AMSWAP_W\000" |
| 6669 | /* 16814 */ "LLACQ_W\000" |
| 6670 | /* 16822 */ "XVSEQ_W\000" |
| 6671 | /* 16830 */ "XVSRAR_W\000" |
| 6672 | /* 16839 */ "X86RCR_W\000" |
| 6673 | /* 16848 */ "LDR_W\000" |
| 6674 | /* 16854 */ "MOVGR2FR_W\000" |
| 6675 | /* 16865 */ "XVPICKVE2GR_W\000" |
| 6676 | /* 16879 */ "XVAVGR_W\000" |
| 6677 | /* 16888 */ "XVBITCLR_W\000" |
| 6678 | /* 16899 */ "XVSRLR_W\000" |
| 6679 | /* 16908 */ "X86OR_W\000" |
| 6680 | /* 16916 */ "AMOR_W\000" |
| 6681 | /* 16923 */ "ARMOR_W\000" |
| 6682 | /* 16931 */ "X86XOR_W\000" |
| 6683 | /* 16940 */ "AMXOR_W\000" |
| 6684 | /* 16948 */ "ARMXOR_W\000" |
| 6685 | /* 16957 */ "X86ROTR_W\000" |
| 6686 | /* 16967 */ "ARMROTR_W\000" |
| 6687 | /* 16977 */ "XVROTR_W\000" |
| 6688 | /* 16986 */ "LDPTR_W\000" |
| 6689 | /* 16994 */ "STPTR_W\000" |
| 6690 | /* 17002 */ "STR_W\000" |
| 6691 | /* 17008 */ "XVREPLGR2VR_W\000" |
| 6692 | /* 17022 */ "XVINSGR2VR_W\000" |
| 6693 | /* 17035 */ "IOCSRWR_W\000" |
| 6694 | /* 17045 */ "AMCAS_W\000" |
| 6695 | /* 17053 */ "BSTRINS_W\000" |
| 6696 | /* 17063 */ "XVEXTRINS_W\000" |
| 6697 | /* 17075 */ "XVFFINT_S_W\000" |
| 6698 | /* 17087 */ "XVSAT_W\000" |
| 6699 | /* 17095 */ "XVBITSET_W\000" |
| 6700 | /* 17106 */ "LDGT_W\000" |
| 6701 | /* 17113 */ "STGT_W\000" |
| 6702 | /* 17120 */ "XVSLT_W\000" |
| 6703 | /* 17128 */ "XVPCNT_W\000" |
| 6704 | /* 17137 */ "ARMNOT_W\000" |
| 6705 | /* 17146 */ "ST_W\000" |
| 6706 | /* 17151 */ "XVSSRANI_HU_W\000" |
| 6707 | /* 17165 */ "XVSSRLNI_HU_W\000" |
| 6708 | /* 17179 */ "XVSSRARNI_HU_W\000" |
| 6709 | /* 17194 */ "XVSSRLRNI_HU_W\000" |
| 6710 | /* 17209 */ "XVSSRAN_HU_W\000" |
| 6711 | /* 17222 */ "XVSSRLN_HU_W\000" |
| 6712 | /* 17235 */ "XVSSRARN_HU_W\000" |
| 6713 | /* 17249 */ "XVSSRLRN_HU_W\000" |
| 6714 | /* 17263 */ "XVMADDWOD_D_WU_W\000" |
| 6715 | /* 17280 */ "XVADDWOD_D_WU_W\000" |
| 6716 | /* 17296 */ "XVMULWOD_D_WU_W\000" |
| 6717 | /* 17312 */ "XVMADDWEV_D_WU_W\000" |
| 6718 | /* 17329 */ "XVADDWEV_D_WU_W\000" |
| 6719 | /* 17345 */ "XVMULWEV_D_WU_W\000" |
| 6720 | /* 17361 */ "XVPACKEV_W\000" |
| 6721 | /* 17372 */ "XVPICKEV_W\000" |
| 6722 | /* 17383 */ "XVBITREV_W\000" |
| 6723 | /* 17394 */ "XVDIV_W\000" |
| 6724 | /* 17402 */ "XVSIGNCOV_W\000" |
| 6725 | /* 17414 */ "ARMMOV_W\000" |
| 6726 | /* 17423 */ "CRCC_W_W_W\000" |
| 6727 | /* 17434 */ "CRC_W_W_W\000" |
| 6728 | /* 17444 */ "AMMAX_W\000" |
| 6729 | /* 17452 */ "XVMAX_W\000" |
| 6730 | /* 17460 */ "LDX_W\000" |
| 6731 | /* 17466 */ "ARMRRX_W\000" |
| 6732 | /* 17475 */ "STX_W\000" |
| 6733 | /* 17481 */ "PseudoXVBZ_W\000" |
| 6734 | /* 17494 */ "PseudoVBZ_W\000" |
| 6735 | /* 17506 */ "XVSETALLNEZ_W\000" |
| 6736 | /* 17520 */ "XVCLZ_W\000" |
| 6737 | /* 17528 */ "PseudoXVBNZ_W\000" |
| 6738 | /* 17542 */ "PseudoVBNZ_W\000" |
| 6739 | /* 17555 */ "XVSETANYEQZ_W\000" |
| 6740 | /* 17569 */ "CTZ_W\000" |
| 6741 | /* 17575 */ "PseudoXVMSKLTZ_W\000" |
| 6742 | /* 17592 */ "PseudoVMSKLTZ_W\000" |
| 6743 | /* 17608 */ "PseudoAddTPRel_W\000" |
| 6744 | /* 17625 */ "PseudoAtomicStoreW\000" |
| 6745 | /* 17644 */ "G_VECREDUCE_FMAX\000" |
| 6746 | /* 17661 */ "G_ATOMICRMW_FMAX\000" |
| 6747 | /* 17678 */ "G_VECREDUCE_SMAX\000" |
| 6748 | /* 17695 */ "G_SMAX\000" |
| 6749 | /* 17702 */ "G_VECREDUCE_UMAX\000" |
| 6750 | /* 17719 */ "G_UMAX\000" |
| 6751 | /* 17726 */ "G_ATOMICRMW_UMAX\000" |
| 6752 | /* 17743 */ "G_ATOMICRMW_MAX\000" |
| 6753 | /* 17759 */ "PRELDX\000" |
| 6754 | /* 17766 */ "XVLDX\000" |
| 6755 | /* 17772 */ "G_FRAME_INDEX\000" |
| 6756 | /* 17786 */ "G_SBFX\000" |
| 6757 | /* 17793 */ "G_UBFX\000" |
| 6758 | /* 17800 */ "G_SMULFIX\000" |
| 6759 | /* 17810 */ "G_UMULFIX\000" |
| 6760 | /* 17820 */ "G_SDIVFIX\000" |
| 6761 | /* 17830 */ "G_UDIVFIX\000" |
| 6762 | /* 17840 */ "XVSTX\000" |
| 6763 | /* 17846 */ "G_MEMCPY\000" |
| 6764 | /* 17855 */ "COPY\000" |
| 6765 | /* 17860 */ "CONVERGENCECTRL_ENTRY\000" |
| 6766 | /* 17882 */ "PseudoXVBZ\000" |
| 6767 | /* 17893 */ "PseudoVBZ\000" |
| 6768 | /* 17903 */ "BNEZ\000" |
| 6769 | /* 17908 */ "BCNEZ\000" |
| 6770 | /* 17914 */ "MASKNEZ\000" |
| 6771 | /* 17922 */ "G_CTLZ\000" |
| 6772 | /* 17929 */ "PseudoXVBNZ\000" |
| 6773 | /* 17941 */ "PseudoVBNZ\000" |
| 6774 | /* 17952 */ "BEQZ\000" |
| 6775 | /* 17957 */ "BCEQZ\000" |
| 6776 | /* 17963 */ "MASKEQZ\000" |
| 6777 | /* 17971 */ "G_CTTZ\000" |
| 6778 | /* 17978 */ "PseudoCmpXchg128Acquire\000" |
| 6779 | /* 18002 */ "BuildPairF64Pseudo\000" |
| 6780 | /* 18021 */ "SplitPairF64Pseudo\000" |
| 6781 | /* 18040 */ "PseudoTAILIndirect\000" |
| 6782 | /* 18059 */ "PseudoCALLIndirect\000" |
| 6783 | }; |
| 6784 | #ifdef __GNUC__ |
| 6785 | #pragma GCC diagnostic pop |
| 6786 | #endif |
| 6787 | |
| 6788 | extern const unsigned LoongArchInstrNameIndices[] = { |
| 6789 | 8855U, 9489U, 10633U, 9954U, 8979U, 8960U, 8988U, 9296U, |
| 6790 | 6763U, 6778U, 6679U, 6666U, 6805U, 11341U, 6476U, 13109U, |
| 6791 | 6692U, 8851U, 8969U, 5973U, 17855U, 8923U, 6303U, 13013U, |
| 6792 | 2846U, 5924U, 5961U, 10074U, 9231U, 12910U, 2965U, 10349U, |
| 6793 | 6914U, 12899U, 6370U, 10322U, 10309U, 10713U, 12740U, 12773U, |
| 6794 | 9147U, 9210U, 9183U, 9005U, 6461U, 10678U, 10028U, 6346U, |
| 6795 | 17860U, 10914U, 10230U, 6524U, 13144U, 13174U, 9797U, 2706U, |
| 6796 | 780U, 9404U, 15072U, 15079U, 9455U, 9462U, 9469U, 9479U, |
| 6797 | 2824U, 11127U, 11090U, 11253U, 13618U, 10962U, 9112U, 10950U, |
| 6798 | 9101U, 6677U, 8853U, 17772U, 6486U, 6501U, 9301U, 12708U, |
| 6799 | 11260U, 13050U, 11277U, 11013U, 2469U, 11324U, 12921U, 11203U, |
| 6800 | 13082U, 6588U, 10689U, 2939U, 2443U, 2921U, 12959U, 12940U, |
| 6801 | 9775U, 10738U, 10757U, 2607U, 2551U, 2581U, 2592U, 2532U, |
| 6802 | 2562U, 6426U, 6410U, 11371U, 6826U, 6852U, 2722U, 786U, |
| 6803 | 2830U, 2791U, 11132U, 11096U, 17743U, 9923U, 17726U, 9906U, |
| 6804 | 2673U, 763U, 17661U, 9841U, 9638U, 9585U, 9711U, 9673U, |
| 6805 | 10136U, 10114U, 2880U, 12661U, 5953U, 6955U, 2871U, 12727U, |
| 6806 | 13028U, 2421U, 11419U, 12876U, 11446U, 13158U, 2461U, 12247U, |
| 6807 | 15021U, 15036U, 12865U, 12853U, 13003U, 6906U, 13137U, 6792U, |
| 6808 | 13167U, 9047U, 10894U, 10880U, 9040U, 10887U, 11196U, 9322U, |
| 6809 | 10191U, 10184U, 10198U, 10205U, 12718U, 10020U, 5994U, 10004U, |
| 6810 | 5945U, 10012U, 5986U, 9996U, 5937U, 10058U, 10050U, 6974U, |
| 6811 | 6966U, 12579U, 12569U, 12559U, 12549U, 12599U, 12589U, 17800U, |
| 6812 | 17810U, 12609U, 12622U, 17820U, 17830U, 12635U, 12648U, 2631U, |
| 6813 | 742U, 9346U, 696U, 2525U, 15051U, 9434U, 6622U, 15239U, |
| 6814 | 8893U, 10393U, 578U, 9U, 6899U, 561U, 0U, 10368U, |
| 6815 | 10400U, 6756U, 13129U, 2433U, 8864U, 8878U, 10166U, 10175U, |
| 6816 | 12682U, 12695U, 11227U, 9812U, 11358U, 6597U, 9735U, 9745U, |
| 6817 | 6043U, 6058U, 9574U, 9627U, 9659U, 9697U, 15086U, 15112U, |
| 6818 | 15098U, 6002U, 6030U, 6015U, 6869U, 6884U, 2712U, 8937U, |
| 6819 | 9875U, 17695U, 9899U, 17719U, 11247U, 2912U, 2902U, 10628U, |
| 6820 | 12797U, 6276U, 10994U, 10974U, 12829U, 12808U, 11028U, 11059U, |
| 6821 | 11045U, 11401U, 17971U, 6648U, 17922U, 6630U, 11292U, 10251U, |
| 6822 | 10158U, 6448U, 9093U, 11307U, 9947U, 11314U, 9763U, 11299U, |
| 6823 | 9939U, 9755U, 569U, 6998U, 6990U, 6982U, 13059U, 10941U, |
| 6824 | 12932U, 12977U, 13092U, 10665U, 6285U, 2490U, 6558U, 6395U, |
| 6825 | 2659U, 749U, 9374U, 15058U, 9441U, 702U, 13067U, 10377U, |
| 6826 | 10777U, 10793U, 17846U, 6330U, 6570U, 12764U, 10066U, 10107U, |
| 6827 | 10083U, 10095U, 2638U, 9353U, 2614U, 9329U, 17644U, 9824U, |
| 6828 | 9606U, 9553U, 2690U, 9388U, 2808U, 11112U, 11074U, 17678U, |
| 6829 | 9858U, 17702U, 9882U, 17786U, 17793U, 9979U, 10334U, 18002U, |
| 6830 | 5880U, 17608U, 136U, 158U, 539U, 350U, 209U, 614U, |
| 6831 | 416U, 86U, 488U, 299U, 437U, 5897U, 17625U, 397U, |
| 6832 | 10646U, 2859U, 9053U, 9243U, 31U, 666U, 18059U, 6205U, |
| 6833 | 9535U, 9271U, 10259U, 679U, 17978U, 254U, 637U, 10836U, |
| 6834 | 9131U, 9167U, 9066U, 11234U, 6222U, 12990U, 6241U, 9025U, |
| 6835 | 6167U, 2507U, 6077U, 2738U, 6101U, 6260U, 6145U, 2775U, |
| 6836 | 6123U, 6310U, 10810U, 3967U, 16434U, 108U, 511U, 322U, |
| 6837 | 180U, 58U, 459U, 270U, 372U, 232U, 12754U, 10823U, |
| 6838 | 9082U, 18U, 653U, 18040U, 6188U, 9517U, 9254U, 10212U, |
| 6839 | 17941U, 2318U, 5802U, 8743U, 17542U, 17893U, 2204U, 5754U, |
| 6840 | 8695U, 17494U, 2358U, 2233U, 2405U, 5864U, 8787U, 17592U, |
| 6841 | 2266U, 1438U, 3922U, 7665U, 16379U, 17929U, 2304U, 5788U, |
| 6842 | 8729U, 17528U, 17882U, 2191U, 5741U, 8682U, 17481U, 1896U, |
| 6843 | 8097U, 2341U, 2216U, 2388U, 5847U, 8770U, 17575U, 2249U, |
| 6844 | 1422U, 3906U, 7649U, 16363U, 11182U, 11147U, 18021U, 11189U, |
| 6845 | 924U, 3267U, 7338U, 15486U, 3825U, 16282U, 3759U, 16224U, |
| 6846 | 3796U, 3299U, 15527U, 4201U, 16707U, 14825U, 957U, 3314U, |
| 6847 | 7371U, 15533U, 840U, 3067U, 7054U, 15304U, 3394U, 15590U, |
| 6848 | 3079U, 15316U, 1925U, 4906U, 8126U, 17045U, 865U, 3139U, |
| 6849 | 7079U, 15376U, 5711U, 14053U, 17444U, 14996U, 3151U, 13638U, |
| 6850 | 15388U, 14528U, 4371U, 13815U, 16775U, 14843U, 3091U, 13625U, |
| 6851 | 15328U, 14515U, 4791U, 16916U, 3116U, 15353U, 1759U, 4427U, |
| 6852 | 7960U, 16805U, 852U, 3103U, 7066U, 15340U, 4820U, 16940U, |
| 6853 | 3127U, 15364U, 2804U, 8846U, 9770U, 15492U, 15541U, 15598U, |
| 6854 | 6716U, 6580U, 5424U, 17414U, 6736U, 17137U, 16923U, 16526U, |
| 6855 | 16967U, 17466U, 15474U, 16344U, 16653U, 16263U, 15287U, 16404U, |
| 6856 | 16690U, 15409U, 16948U, 4992U, 3503U, 723U, 17957U, 17908U, |
| 6857 | 10409U, 17952U, 6073U, 14071U, 715U, 725U, 5379U, 17385U, |
| 6858 | 8947U, 12804U, 14505U, 6326U, 17903U, 8917U, 4921U, 17053U, |
| 6859 | 4122U, 16600U, 4111U, 16589U, 10224U, 4415U, 16793U, 5782U, |
| 6860 | 17522U, 6819U, 15444U, 15867U, 16203U, 17423U, 15455U, 15878U, |
| 6861 | 16214U, 17434U, 2989U, 11221U, 6844U, 4421U, 16799U, 5841U, |
| 6862 | 17569U, 10618U, 8950U, 5391U, 14046U, 17396U, 14989U, 9974U, |
| 6863 | 2151U, 8565U, 4914U, 12229U, 3307U, 11556U, 4945U, 12238U, |
| 6864 | 3672U, 11786U, 4469U, 12128U, 3463U, 11625U, 5011U, 12280U, |
| 6865 | 3559U, 11695U, 4780U, 12205U, 4503U, 12154U, 3522U, 11667U, |
| 6866 | 5045U, 12306U, 3598U, 11734U, 4389U, 12079U, 3685U, 11799U, |
| 6867 | 4490U, 12141U, 3492U, 11646U, 5032U, 12293U, 3585U, 11721U, |
| 6868 | 4800U, 12218U, 4517U, 12168U, 3536U, 11681U, 5059U, 12320U, |
| 6869 | 3612U, 11748U, 4402U, 12092U, 4350U, 12056U, 2765U, 11614U, |
| 6870 | 3375U, 4956U, 3451U, 5390U, 12399U, 9412U, 15759U, 9424U, |
| 6871 | 17077U, 4984U, 12262U, 3474U, 11636U, 5727U, 12491U, 3369U, |
| 6872 | 11584U, 3175U, 11516U, 3324U, 11565U, 3059U, 11496U, 5704U, |
| 6873 | 12484U, 3032U, 11486U, 4364U, 12070U, 5417U, 12406U, 3203U, |
| 6874 | 11535U, 4235U, 11830U, 3705U, 11810U, 3334U, 11575U, 3213U, |
| 6875 | 11545U, 3626U, 11762U, 4438U, 12105U, 5082U, 12334U, 3638U, |
| 6876 | 11774U, 5102U, 12354U, 3163U, 11504U, 5916U, 12529U, 5092U, |
| 6877 | 12344U, 5001U, 12270U, 3512U, 11657U, 5734U, 12498U, 5111U, |
| 6878 | 12363U, 3194U, 11526U, 4276U, 11998U, 5554U, 12430U, 4261U, |
| 6879 | 11837U, 5435U, 12415U, 4290U, 12010U, 5664U, 12444U, 4316U, |
| 6880 | 12032U, 5690U, 12470U, 4304U, 12022U, 5678U, 12458U, 2988U, |
| 6881 | 11220U, 6843U, 7006U, 8955U, 10623U, 6298U, 735U, 1035U, |
| 6882 | 3432U, 7449U, 15637U, 1915U, 4896U, 8116U, 17035U, 9317U, |
| 6883 | 44U, 51U, 10901U, 1964U, 4985U, 8189U, 17106U, 1066U, |
| 6884 | 3475U, 7480U, 15888U, 4142U, 16620U, 6470U, 4847U, 16986U, |
| 6885 | 4699U, 16848U, 2179U, 13611U, 5728U, 8670U, 14485U, 17460U, |
| 6886 | 15014U, 991U, 13208U, 3370U, 7405U, 14096U, 15576U, 14581U, |
| 6887 | 4459U, 16814U, 4160U, 16648U, 16234U, 3769U, 3777U, 17963U, |
| 6888 | 17914U, 3426U, 13693U, 15631U, 14589U, 12537U, 10850U, 10869U, |
| 6889 | 12517U, 4730U, 12192U, 586U, 12180U, 6613U, 11171U, 15974U, |
| 6890 | 4705U, 16854U, 600U, 10655U, 10859U, 3728U, 13728U, 15967U, |
| 6891 | 14748U, 15858U, 14720U, 4227U, 16733U, 10937U, 10934U, 8860U, |
| 6892 | 9970U, 8833U, 8813U, 8823U, 8803U, 2754U, 17759U, 1525U, |
| 6893 | 4019U, 7752U, 16486U, 1798U, 4693U, 7999U, 16842U, 15957U, |
| 6894 | 16626U, 3548U, 6931U, 15223U, 6939U, 3248U, 15231U, 3743U, |
| 6895 | 1583U, 4051U, 7784U, 16518U, 1866U, 4831U, 8067U, 16960U, |
| 6896 | 915U, 3258U, 7329U, 15468U, 4148U, 16636U, 3291U, 10433U, |
| 6897 | 15519U, 8909U, 8901U, 6383U, 6357U, 6434U, 6545U, 3890U, |
| 6898 | 16337U, 4159U, 16647U, 12849U, 8873U, 14510U, 8887U, 3809U, |
| 6899 | 16256U, 3043U, 15281U, 3940U, 16397U, 4187U, 16684U, 1971U, |
| 6900 | 5002U, 8196U, 17113U, 1081U, 3513U, 7495U, 15903U, 4218U, |
| 6901 | 16724U, 4855U, 16994U, 4863U, 17002U, 2185U, 5735U, 8676U, |
| 6902 | 17475U, 1995U, 5112U, 8220U, 17146U, 3186U, 15403U, 9123U, |
| 6903 | 10907U, 9288U, 7007U, 2982U, 6947U, 11214U, 2995U, 1046U, |
| 6904 | 13224U, 3443U, 13701U, 7460U, 14112U, 15648U, 14597U, 815U, |
| 6905 | 3022U, 7029U, 15270U, 13385U, 13756U, 14159U, 14776U, 15797U, |
| 6906 | 14693U, 17330U, 1246U, 13347U, 2067U, 4632U, 13920U, 5184U, |
| 6907 | 8601U, 14449U, 8404U, 15684U, 14636U, 17281U, 1169U, 13290U, |
| 6908 | 2018U, 4557U, 13863U, 5135U, 8516U, 14392U, 8355U, 984U, |
| 6909 | 3362U, 7398U, 10439U, 15569U, 1338U, 15162U, 15125U, 1818U, |
| 6910 | 13468U, 4742U, 13963U, 8019U, 14242U, 16880U, 14877U, 1117U, |
| 6911 | 13243U, 3721U, 13720U, 7531U, 14131U, 15950U, 14740U, 1533U, |
| 6912 | 4027U, 7760U, 16494U, 1827U, 4751U, 8028U, 16889U, 1623U, |
| 6913 | 4091U, 7824U, 16569U, 2121U, 5378U, 8458U, 17384U, 1392U, |
| 6914 | 15133U, 1602U, 4070U, 7803U, 16548U, 1954U, 4974U, 8179U, |
| 6915 | 17096U, 15144U, 15153U, 1752U, 4414U, 7953U, 16792U, 2297U, |
| 6916 | 5781U, 8722U, 17521U, 2132U, 13594U, 5398U, 14045U, 8469U, |
| 6917 | 14354U, 17395U, 14988U, 13495U, 14269U, 14945U, 1054U, 7468U, |
| 6918 | 15822U, 13537U, 1271U, 13579U, 14311U, 2159U, 8626U, 14918U, |
| 6919 | 15723U, 13510U, 1195U, 13991U, 4583U, 14284U, 8542U, 14004U, |
| 6920 | 4594U, 1934U, 4932U, 8135U, 17064U, 3306U, 11555U, 4944U, |
| 6921 | 12237U, 3671U, 11785U, 4468U, 12127U, 3462U, 11624U, 5010U, |
| 6922 | 12279U, 3558U, 11694U, 4779U, 12204U, 4502U, 12153U, 3521U, |
| 6923 | 11666U, 5044U, 12305U, 3597U, 11733U, 4388U, 12078U, 3684U, |
| 6924 | 11798U, 4489U, 12140U, 3491U, 11645U, 5031U, 12292U, 3584U, |
| 6925 | 11720U, 4799U, 12217U, 4516U, 12167U, 3535U, 11680U, 5058U, |
| 6926 | 12319U, 3611U, 11747U, 4401U, 12091U, 11591U, 8147U, 11603U, |
| 6927 | 8159U, 11818U, 4955U, 5389U, 12398U, 15710U, 15747U, 9411U, |
| 6928 | 14493U, 9423U, 17076U, 14887U, 3174U, 11515U, 3323U, 11564U, |
| 6929 | 3058U, 11495U, 5703U, 12483U, 3031U, 11485U, 4363U, 12069U, |
| 6930 | 3202U, 11534U, 4234U, 11829U, 3333U, 11574U, 3212U, 11544U, |
| 6931 | 3625U, 11761U, 4437U, 12104U, 4339U, 12045U, 3571U, 11707U, |
| 6932 | 4448U, 12115U, 5830U, 12506U, 5081U, 12333U, 3637U, 11773U, |
| 6933 | 5101U, 12353U, 1493U, 7720U, 1769U, 7970U, 5091U, 12343U, |
| 6934 | 3193U, 11525U, 11897U, 11971U, 11867U, 11941U, 4275U, 5553U, |
| 6935 | 12429U, 11851U, 11925U, 4260U, 5434U, 12414U, 11882U, 11956U, |
| 6936 | 4289U, 5663U, 12443U, 11910U, 11984U, 5229U, 4315U, 12383U, |
| 6937 | 5689U, 12469U, 5216U, 4303U, 12370U, 5677U, 12457U, 14974U, |
| 6938 | 15847U, 13566U, 1296U, 14031U, 4670U, 14340U, 8651U, 14960U, |
| 6939 | 15835U, 13552U, 1284U, 14017U, 4658U, 14326U, 8639U, 1133U, |
| 6940 | 3751U, 7547U, 15995U, 1725U, 4251U, 7926U, 16748U, 1903U, |
| 6941 | 4884U, 8104U, 17023U, 2761U, 8841U, 1670U, 4174U, 7871U, |
| 6942 | 16671U, 17767U, 15783U, 14678U, 17313U, 1232U, 13332U, 2050U, |
| 6943 | 4618U, 13905U, 5167U, 8587U, 14434U, 8387U, 15670U, 14621U, |
| 6944 | 17264U, 1155U, 13275U, 2001U, 4543U, 13848U, 5118U, 8502U, |
| 6945 | 14377U, 8338U, 966U, 3344U, 7380U, 15551U, 1635U, 13425U, |
| 6946 | 4103U, 13796U, 7836U, 14199U, 16581U, 14816U, 2172U, 13603U, |
| 6947 | 5720U, 14063U, 8663U, 14477U, 17453U, 15006U, 1484U, 13405U, |
| 6948 | 3989U, 13776U, 7711U, 14179U, 16456U, 14796U, 1744U, 13445U, |
| 6949 | 4380U, 13825U, 7945U, 14219U, 16784U, 14853U, 1028U, 13215U, |
| 6950 | 3425U, 13692U, 7442U, 14103U, 15630U, 14588U, 2223U, 2395U, |
| 6951 | 5854U, 8777U, 17582U, 2332U, 887U, 3223U, 7101U, 15419U, |
| 6952 | 1125U, 13252U, 3736U, 13737U, 7539U, 14140U, 15987U, 14757U, |
| 6953 | 15810U, 14707U, 17346U, 1259U, 13361U, 2083U, 4645U, 13934U, |
| 6954 | 5200U, 8614U, 14463U, 8420U, 15697U, 14650U, 17297U, 1182U, |
| 6955 | 13304U, 2034U, 4570U, 13877U, 5151U, 8529U, 14406U, 8371U, |
| 6956 | 1717U, 4243U, 7918U, 16740U, 1109U, 3713U, 7523U, 15942U, |
| 6957 | 1555U, 15179U, 1564U, 15171U, 15187U, 2099U, 5356U, 8436U, |
| 6958 | 17362U, 1006U, 3403U, 7420U, 15608U, 1987U, 5072U, 8212U, |
| 6959 | 17129U, 16446U, 2110U, 5367U, 8447U, 17373U, 1017U, 3414U, |
| 6960 | 7431U, 15619U, 1804U, 13453U, 4717U, 13948U, 8005U, 14227U, |
| 6961 | 16866U, 14862U, 1883U, 4870U, 8084U, 17009U, 1370U, 3856U, |
| 6962 | 7609U, 16313U, 1089U, 3660U, 7503U, 15922U, 1592U, 4060U, |
| 6963 | 7793U, 16538U, 1874U, 4839U, 8075U, 16978U, 975U, 13199U, |
| 6964 | 3353U, 13682U, 7389U, 14087U, 15560U, 14572U, 1946U, 13478U, |
| 6965 | 4966U, 13973U, 8171U, 14252U, 17088U, 14900U, 1504U, 3998U, |
| 6966 | 7731U, 16465U, 1779U, 4481U, 7980U, 16823U, 2283U, 5767U, |
| 6967 | 8708U, 17507U, 2375U, 5816U, 8757U, 17556U, 15213U, 15202U, |
| 6968 | 1308U, 3786U, 7556U, 16243U, 1100U, 3697U, 7514U, 15933U, |
| 6969 | 2140U, 5406U, 8477U, 17403U, 1347U, 13395U, 3833U, 13766U, |
| 6970 | 7586U, 14169U, 16290U, 14786U, 1074U, 13234U, 3483U, 13711U, |
| 6971 | 7488U, 14122U, 15896U, 14731U, 1414U, 3898U, 7641U, 16355U, |
| 6972 | 14931U, 15734U, 13523U, 1206U, 14297U, 8553U, 1662U, 4166U, |
| 6973 | 7863U, 16663U, 1614U, 13415U, 4082U, 13786U, 7815U, 14189U, |
| 6974 | 16560U, 14806U, 1979U, 13487U, 5023U, 13982U, 8204U, 14261U, |
| 6975 | 17121U, 14909U, 1329U, 3817U, 7577U, 16274U, 7140U, 10460U, |
| 6976 | 16017U, 5462U, 7243U, 16120U, 5579U, 1513U, 4007U, 7740U, |
| 6977 | 16474U, 7191U, 10511U, 16068U, 5513U, 7290U, 16167U, 5626U, |
| 6978 | 1787U, 4682U, 7988U, 16831U, 833U, 3050U, 7047U, 15297U, |
| 6979 | 1464U, 3948U, 7691U, 16415U, 7165U, 10485U, 16042U, 5487U, |
| 6980 | 7266U, 16143U, 5602U, 1545U, 4039U, 7772U, 16506U, 7218U, |
| 6981 | 10538U, 16095U, 5540U, 7315U, 16192U, 5651U, 1838U, 4762U, |
| 6982 | 8039U, 16900U, 1690U, 4194U, 7891U, 16700U, 8226U, 7127U, |
| 6983 | 10561U, 10447U, 17152U, 16004U, 5244U, 5449U, 8284U, 7231U, |
| 6984 | 17210U, 16108U, 5302U, 5567U, 8254U, 7177U, 10589U, 10497U, |
| 6985 | 17180U, 16054U, 5272U, 5499U, 8310U, 7277U, 17236U, 16154U, |
| 6986 | 5328U, 5613U, 8240U, 7152U, 10575U, 10472U, 17166U, 16029U, |
| 6987 | 5258U, 5474U, 8297U, 7254U, 17223U, 16131U, 5315U, 5590U, |
| 6988 | 8269U, 7204U, 10604U, 10524U, 17195U, 16081U, 5287U, 5526U, |
| 6989 | 8324U, 7302U, 17250U, 16179U, 5342U, 5638U, 896U, 13189U, |
| 6990 | 3232U, 13662U, 7110U, 14077U, 15428U, 14552U, 13125U, 1734U, |
| 6991 | 4329U, 7935U, 16757U, 17841U, 13375U, 13746U, 14149U, 14766U, |
| 6992 | 15770U, 14664U, 1219U, 13318U, 4605U, 13891U, 8574U, 14420U, |
| 6993 | 15657U, 14607U, 1142U, 13261U, 4530U, 13834U, 8489U, 14363U, |
| 6994 | 905U, 3241U, 7119U, 10426U, 15437U, 1572U, 15194U, 921U, |
| 6995 | 3264U, 7335U, 15483U, 948U, 3296U, 13671U, 7362U, 15524U, |
| 6996 | 14561U, 996U, 3385U, 7410U, 15581U, 9499U, 10271U, 930U, |
| 6997 | 3273U, 7344U, 15501U, 10281U, 939U, 3282U, 7353U, 15510U, |
| 6998 | 6706U, 10291U, 6726U, 10300U, 1707U, 13434U, 4224U, 13805U, |
| 6999 | 7908U, 14208U, 16730U, 14833U, 1846U, 4770U, 8047U, 16908U, |
| 7000 | 1381U, 3867U, 7620U, 16324U, 1643U, 4133U, 7844U, 16611U, |
| 7001 | 1522U, 4016U, 7749U, 16483U, 1795U, 4690U, 7996U, 16839U, |
| 7002 | 1472U, 3956U, 7699U, 16423U, 1697U, 4208U, 7898U, 16714U, |
| 7003 | 1580U, 4048U, 7781U, 16515U, 1863U, 4828U, 8064U, 16957U, |
| 7004 | 912U, 3255U, 7326U, 15465U, 6746U, 9508U, 1403U, 3887U, |
| 7005 | 7630U, 16334U, 1652U, 4156U, 7853U, 16644U, 1318U, 3806U, |
| 7006 | 7566U, 16253U, 823U, 3040U, 7037U, 15278U, 1453U, 3937U, |
| 7007 | 7680U, 16394U, 1680U, 4184U, 7881U, 16681U, 877U, 3183U, |
| 7008 | 13651U, 7091U, 15400U, 14541U, 1854U, 4811U, 8055U, 16931U, |
| 7009 | 11086U, 8859U, 1045U, 13223U, 3442U, 13700U, 7459U, 14111U, |
| 7010 | 15647U, 14596U, 814U, 3021U, 7028U, 15269U, 13384U, 13755U, |
| 7011 | 14158U, 14775U, 15796U, 14692U, 17329U, 1245U, 13346U, 2066U, |
| 7012 | 4631U, 13919U, 5183U, 8600U, 14448U, 8403U, 15683U, 14635U, |
| 7013 | 17280U, 1168U, 13289U, 2017U, 4556U, 13862U, 5134U, 8515U, |
| 7014 | 14391U, 8354U, 983U, 3361U, 7397U, 10438U, 15568U, 1337U, |
| 7015 | 15161U, 15124U, 1817U, 13467U, 4741U, 13962U, 8018U, 14241U, |
| 7016 | 16879U, 14876U, 1116U, 13242U, 3720U, 13719U, 7530U, 14130U, |
| 7017 | 15949U, 14739U, 1532U, 4026U, 7759U, 16493U, 1826U, 4750U, |
| 7018 | 8027U, 16888U, 1622U, 4090U, 7823U, 16568U, 2120U, 5377U, |
| 7019 | 8457U, 17383U, 1391U, 15132U, 1601U, 4069U, 7802U, 16547U, |
| 7020 | 1953U, 4973U, 8178U, 17095U, 15143U, 15152U, 1751U, 4413U, |
| 7021 | 7952U, 16791U, 2296U, 5780U, 8721U, 17520U, 2131U, 13593U, |
| 7022 | 5397U, 14044U, 8468U, 14353U, 17394U, 14987U, 14917U, 15722U, |
| 7023 | 13509U, 1194U, 13990U, 4582U, 14283U, 8541U, 14003U, 4593U, |
| 7024 | 1933U, 4931U, 8134U, 17063U, 3305U, 11554U, 4943U, 12236U, |
| 7025 | 3670U, 11784U, 4467U, 12126U, 3461U, 11623U, 5009U, 12278U, |
| 7026 | 3557U, 11693U, 4778U, 12203U, 4501U, 12152U, 3520U, 11665U, |
| 7027 | 5043U, 12304U, 3596U, 11732U, 4387U, 12077U, 3683U, 11797U, |
| 7028 | 4488U, 12139U, 3490U, 11644U, 5030U, 12291U, 3583U, 11719U, |
| 7029 | 4798U, 12216U, 4515U, 12166U, 3534U, 11679U, 5057U, 12318U, |
| 7030 | 3610U, 11746U, 4400U, 12090U, 11590U, 8146U, 11602U, 8158U, |
| 7031 | 11817U, 4954U, 5388U, 12397U, 15709U, 15746U, 9410U, 14492U, |
| 7032 | 9422U, 17075U, 14886U, 3173U, 11514U, 3322U, 11563U, 3057U, |
| 7033 | 11494U, 5702U, 12482U, 3030U, 11484U, 4362U, 12068U, 3201U, |
| 7034 | 11533U, 4233U, 11828U, 3332U, 11573U, 3211U, 11543U, 3624U, |
| 7035 | 11760U, 4436U, 12103U, 4338U, 12044U, 3570U, 11706U, 4447U, |
| 7036 | 12114U, 5829U, 12505U, 5080U, 12332U, 3636U, 11772U, 5100U, |
| 7037 | 12352U, 1492U, 7719U, 1768U, 7969U, 5090U, 12342U, 3192U, |
| 7038 | 11524U, 11896U, 11970U, 11866U, 11940U, 4274U, 5552U, 12428U, |
| 7039 | 11850U, 11924U, 4259U, 5433U, 12413U, 11881U, 11955U, 4288U, |
| 7040 | 5662U, 12442U, 11909U, 11983U, 5228U, 4314U, 12382U, 5688U, |
| 7041 | 12468U, 5215U, 4302U, 12369U, 5676U, 12456U, 14973U, 15846U, |
| 7042 | 13565U, 1295U, 14030U, 4669U, 14339U, 8650U, 3877U, 14959U, |
| 7043 | 15834U, 13551U, 1283U, 14016U, 4657U, 14325U, 8638U, 1132U, |
| 7044 | 3750U, 7546U, 15994U, 1724U, 4250U, 7925U, 16747U, 4883U, |
| 7045 | 17022U, 3010U, 15258U, 2760U, 8840U, 1669U, 4173U, 7870U, |
| 7046 | 16670U, 17766U, 15782U, 14677U, 17312U, 1231U, 13331U, 2049U, |
| 7047 | 4617U, 13904U, 5166U, 8586U, 14433U, 8386U, 15669U, 14620U, |
| 7048 | 17263U, 1154U, 13274U, 2000U, 4542U, 13847U, 5117U, 8501U, |
| 7049 | 14376U, 8337U, 965U, 3343U, 7379U, 15550U, 1634U, 13424U, |
| 7050 | 4102U, 13795U, 7835U, 14198U, 16580U, 14815U, 2171U, 13602U, |
| 7051 | 5719U, 14062U, 8662U, 14476U, 17452U, 15005U, 1483U, 13404U, |
| 7052 | 3988U, 13775U, 7710U, 14178U, 16455U, 14795U, 1743U, 13444U, |
| 7053 | 4379U, 13824U, 7944U, 14218U, 16783U, 14852U, 1027U, 13214U, |
| 7054 | 3424U, 13691U, 7441U, 14102U, 15629U, 14587U, 2222U, 2394U, |
| 7055 | 5853U, 8776U, 17581U, 2331U, 886U, 3222U, 7100U, 15418U, |
| 7056 | 1124U, 13251U, 3735U, 13736U, 7538U, 14139U, 15986U, 14756U, |
| 7057 | 15809U, 14706U, 17345U, 1258U, 13360U, 2082U, 4644U, 13933U, |
| 7058 | 5199U, 8613U, 14462U, 8419U, 15696U, 14649U, 17296U, 1181U, |
| 7059 | 13303U, 2033U, 4569U, 13876U, 5150U, 8528U, 14405U, 8370U, |
| 7060 | 1716U, 4242U, 7917U, 16739U, 1108U, 3712U, 7522U, 15941U, |
| 7061 | 1554U, 15178U, 1563U, 15170U, 15186U, 2098U, 5355U, 8435U, |
| 7062 | 17361U, 1005U, 3402U, 7419U, 15607U, 1986U, 5071U, 8211U, |
| 7063 | 17128U, 3978U, 10550U, 16445U, 16766U, 2109U, 5366U, 8446U, |
| 7064 | 17372U, 1016U, 3413U, 7430U, 15618U, 4716U, 13947U, 16865U, |
| 7065 | 14861U, 3648U, 15910U, 1355U, 3841U, 7594U, 16298U, 1882U, |
| 7066 | 4869U, 8083U, 17008U, 802U, 2998U, 7016U, 10413U, 15246U, |
| 7067 | 1088U, 3659U, 7502U, 15921U, 1591U, 4059U, 7792U, 16537U, |
| 7068 | 1873U, 4838U, 8074U, 16977U, 974U, 13198U, 3352U, 13681U, |
| 7069 | 7388U, 14086U, 15559U, 14571U, 1945U, 13477U, 4965U, 13972U, |
| 7070 | 8170U, 14251U, 17087U, 14899U, 1503U, 3997U, 7730U, 16464U, |
| 7071 | 1778U, 4480U, 7979U, 16822U, 2282U, 5766U, 8707U, 17506U, |
| 7072 | 2374U, 5815U, 8756U, 17555U, 15212U, 15201U, 1307U, 3785U, |
| 7073 | 7555U, 16242U, 1099U, 3696U, 7513U, 15932U, 2139U, 5405U, |
| 7074 | 8476U, 17402U, 1346U, 13394U, 3832U, 13765U, 7585U, 14168U, |
| 7075 | 16289U, 14785U, 1073U, 13233U, 3482U, 13710U, 7487U, 14121U, |
| 7076 | 15895U, 14730U, 1413U, 3897U, 7640U, 16354U, 14930U, 15733U, |
| 7077 | 13522U, 1205U, 14296U, 8552U, 1661U, 4165U, 7862U, 16662U, |
| 7078 | 1613U, 13414U, 4081U, 13785U, 7814U, 14188U, 16559U, 14805U, |
| 7079 | 1978U, 13486U, 5022U, 13981U, 8203U, 14260U, 17120U, 14908U, |
| 7080 | 1328U, 3816U, 7576U, 16273U, 7139U, 10459U, 16016U, 5461U, |
| 7081 | 7242U, 16119U, 5578U, 1512U, 4006U, 7739U, 16473U, 7190U, |
| 7082 | 10510U, 16067U, 5512U, 7289U, 16166U, 5625U, 1786U, 4681U, |
| 7083 | 7987U, 16830U, 832U, 3049U, 7046U, 15296U, 1463U, 3947U, |
| 7084 | 7690U, 16414U, 7164U, 10484U, 16041U, 5486U, 7265U, 16142U, |
| 7085 | 5601U, 1544U, 4038U, 7771U, 16505U, 7217U, 10537U, 16094U, |
| 7086 | 5539U, 7314U, 16191U, 5650U, 1837U, 4761U, 8038U, 16899U, |
| 7087 | 1689U, 4193U, 7890U, 16699U, 8225U, 7126U, 10560U, 10446U, |
| 7088 | 17151U, 16003U, 5243U, 5448U, 8283U, 7230U, 17209U, 16107U, |
| 7089 | 5301U, 5566U, 8253U, 7176U, 10588U, 10496U, 17179U, 16053U, |
| 7090 | 5271U, 5498U, 8309U, 7276U, 17235U, 16153U, 5327U, 5612U, |
| 7091 | 8239U, 7151U, 10574U, 10471U, 17165U, 16028U, 5257U, 5473U, |
| 7092 | 8296U, 7253U, 17222U, 16130U, 5314U, 5589U, 8268U, 7203U, |
| 7093 | 10603U, 10523U, 17194U, 16080U, 5286U, 5525U, 8323U, 7301U, |
| 7094 | 17249U, 16178U, 5341U, 5637U, 895U, 13188U, 3231U, 13661U, |
| 7095 | 7109U, 14076U, 15427U, 14551U, 13124U, 1733U, 4328U, 7934U, |
| 7096 | 16756U, 17840U, 13374U, 13745U, 14148U, 14765U, 15769U, 14663U, |
| 7097 | 1218U, 13317U, 4604U, 13890U, 8573U, 14419U, 15656U, 14606U, |
| 7098 | 1141U, 13260U, 4529U, 13833U, 8488U, 14362U, 904U, 3240U, |
| 7099 | 7118U, 10425U, 15436U, 1571U, 15193U, |
| 7100 | }; |
| 7101 | |
| 7102 | static inline void InitLoongArchMCInstrInfo(MCInstrInfo *II) { |
| 7103 | II->InitMCInstrInfo(LoongArchDescs.Insts, LoongArchInstrNameIndices, LoongArchInstrNameData, nullptr, nullptr, 2485, nullptr, 0); |
| 7104 | } |
| 7105 | |
| 7106 | |
| 7107 | } // namespace llvm |
| 7108 | |
| 7109 | #endif // GET_INSTRINFO_MC_DESC |
| 7110 | |
| 7111 | #ifdef GET_INSTRINFO_HEADER |
| 7112 | #undef GET_INSTRINFO_HEADER |
| 7113 | |
| 7114 | namespace llvm { |
| 7115 | |
| 7116 | struct LoongArchGenInstrInfo : public TargetInstrInfo { |
| 7117 | explicit LoongArchGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u); |
| 7118 | ~LoongArchGenInstrInfo() override = default; |
| 7119 | }; |
| 7120 | |
| 7121 | } // namespace llvm |
| 7122 | |
| 7123 | namespace llvm::LoongArch { |
| 7124 | |
| 7125 | |
| 7126 | } // namespace llvm::LoongArch |
| 7127 | |
| 7128 | #endif // GET_INSTRINFO_HEADER |
| 7129 | |
| 7130 | #ifdef GET_INSTRINFO_HELPER_DECLS |
| 7131 | #undef GET_INSTRINFO_HELPER_DECLS |
| 7132 | |
| 7133 | |
| 7134 | #endif // GET_INSTRINFO_HELPER_DECLS |
| 7135 | |
| 7136 | #ifdef GET_INSTRINFO_HELPERS |
| 7137 | #undef GET_INSTRINFO_HELPERS |
| 7138 | |
| 7139 | |
| 7140 | #endif // GET_INSTRINFO_HELPERS |
| 7141 | |
| 7142 | #ifdef GET_INSTRINFO_CTOR_DTOR |
| 7143 | #undef GET_INSTRINFO_CTOR_DTOR |
| 7144 | |
| 7145 | namespace llvm { |
| 7146 | |
| 7147 | extern const LoongArchInstrTable LoongArchDescs; |
| 7148 | extern const unsigned LoongArchInstrNameIndices[]; |
| 7149 | extern const char LoongArchInstrNameData[]; |
| 7150 | LoongArchGenInstrInfo::LoongArchGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode) |
| 7151 | : TargetInstrInfo(TRI, CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { |
| 7152 | InitMCInstrInfo(LoongArchDescs.Insts, LoongArchInstrNameIndices, LoongArchInstrNameData, nullptr, nullptr, 2485); |
| 7153 | } |
| 7154 | |
| 7155 | } // namespace llvm |
| 7156 | |
| 7157 | #endif // GET_INSTRINFO_CTOR_DTOR |
| 7158 | |
| 7159 | #ifdef GET_INSTRINFO_MC_HELPER_DECLS |
| 7160 | #undef GET_INSTRINFO_MC_HELPER_DECLS |
| 7161 | |
| 7162 | namespace llvm { |
| 7163 | |
| 7164 | class MCInst; |
| 7165 | class FeatureBitset; |
| 7166 | |
| 7167 | namespace LoongArch_MC { |
| 7168 | |
| 7169 | void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features); |
| 7170 | |
| 7171 | } // namespace LoongArch_MC |
| 7172 | |
| 7173 | } // namespace llvm |
| 7174 | |
| 7175 | #endif // GET_INSTRINFO_MC_HELPER_DECLS |
| 7176 | |
| 7177 | #ifdef GET_INSTRINFO_MC_HELPERS |
| 7178 | #undef GET_INSTRINFO_MC_HELPERS |
| 7179 | |
| 7180 | namespace llvm::LoongArch_MC { |
| 7181 | |
| 7182 | |
| 7183 | } // namespace llvm::LoongArch_MC |
| 7184 | |
| 7185 | #endif // GET_INSTRINFO_MC_HELPERS |
| 7186 | |
| 7187 | #if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\ |
| 7188 | defined(GET_AVAILABLE_OPCODE_CHECKER) |
| 7189 | #define GET_COMPUTE_FEATURES |
| 7190 | #endif |
| 7191 | #ifdef GET_COMPUTE_FEATURES |
| 7192 | #undef GET_COMPUTE_FEATURES |
| 7193 | |
| 7194 | namespace llvm::LoongArch_MC { |
| 7195 | |
| 7196 | // Bits for subtarget features that participate in instruction matching. |
| 7197 | enum SubtargetFeatureBits : uint8_t { |
| 7198 | Feature_IsLA64Bit = 4, |
| 7199 | Feature_IsLA32Bit = 3, |
| 7200 | Feature_HasLaGlobalWithPcrelBit = 1, |
| 7201 | Feature_HasLaGlobalWithAbsBit = 0, |
| 7202 | Feature_HasLaLocalWithAbsBit = 2, |
| 7203 | }; |
| 7204 | |
| 7205 | inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) { |
| 7206 | FeatureBitset Features; |
| 7207 | if (FB[LoongArch::Feature64Bit]) |
| 7208 | Features.set(Feature_IsLA64Bit); |
| 7209 | if (!FB[LoongArch::Feature64Bit]) |
| 7210 | Features.set(Feature_IsLA32Bit); |
| 7211 | if (FB[LoongArch::LaGlobalWithPcrel]) |
| 7212 | Features.set(Feature_HasLaGlobalWithPcrelBit); |
| 7213 | if (FB[LoongArch::LaGlobalWithAbs]) |
| 7214 | Features.set(Feature_HasLaGlobalWithAbsBit); |
| 7215 | if (FB[LoongArch::LaLocalWithAbs]) |
| 7216 | Features.set(Feature_HasLaLocalWithAbsBit); |
| 7217 | return Features; |
| 7218 | } |
| 7219 | |
| 7220 | inline FeatureBitset computeRequiredFeatures(unsigned Opcode) { |
| 7221 | enum : uint8_t { |
| 7222 | CEFBS_None, |
| 7223 | CEFBS_IsLA32, |
| 7224 | CEFBS_IsLA64, |
| 7225 | }; |
| 7226 | |
| 7227 | static constexpr FeatureBitset FeatureBitsets[] = { |
| 7228 | {}, // CEFBS_None |
| 7229 | {Feature_IsLA32Bit, }, |
| 7230 | {Feature_IsLA64Bit, }, |
| 7231 | }; |
| 7232 | static constexpr uint8_t RequiredFeaturesRefs[] = { |
| 7233 | CEFBS_None, // PHI |
| 7234 | CEFBS_None, // INLINEASM |
| 7235 | CEFBS_None, // INLINEASM_BR |
| 7236 | CEFBS_None, // CFI_INSTRUCTION |
| 7237 | CEFBS_None, // EH_LABEL |
| 7238 | CEFBS_None, // GC_LABEL |
| 7239 | CEFBS_None, // ANNOTATION_LABEL |
| 7240 | CEFBS_None, // KILL |
| 7241 | CEFBS_None, // EXTRACT_SUBREG |
| 7242 | CEFBS_None, // INSERT_SUBREG |
| 7243 | CEFBS_None, // IMPLICIT_DEF |
| 7244 | CEFBS_None, // INIT_UNDEF |
| 7245 | CEFBS_None, // SUBREG_TO_REG |
| 7246 | CEFBS_None, // COPY_TO_REGCLASS |
| 7247 | CEFBS_None, // DBG_VALUE |
| 7248 | CEFBS_None, // DBG_VALUE_LIST |
| 7249 | CEFBS_None, // DBG_INSTR_REF |
| 7250 | CEFBS_None, // DBG_PHI |
| 7251 | CEFBS_None, // DBG_LABEL |
| 7252 | CEFBS_None, // REG_SEQUENCE |
| 7253 | CEFBS_None, // COPY |
| 7254 | CEFBS_None, // COPY_LANEMASK |
| 7255 | CEFBS_None, // BUNDLE |
| 7256 | CEFBS_None, // LIFETIME_START |
| 7257 | CEFBS_None, // LIFETIME_END |
| 7258 | CEFBS_None, // PSEUDO_PROBE |
| 7259 | CEFBS_None, // ARITH_FENCE |
| 7260 | CEFBS_None, // STACKMAP |
| 7261 | CEFBS_None, // FENTRY_CALL |
| 7262 | CEFBS_None, // PATCHPOINT |
| 7263 | CEFBS_None, // LOAD_STACK_GUARD |
| 7264 | CEFBS_None, // PREALLOCATED_SETUP |
| 7265 | CEFBS_None, // PREALLOCATED_ARG |
| 7266 | CEFBS_None, // STATEPOINT |
| 7267 | CEFBS_None, // LOCAL_ESCAPE |
| 7268 | CEFBS_None, // FAULTING_OP |
| 7269 | CEFBS_None, // PATCHABLE_OP |
| 7270 | CEFBS_None, // PATCHABLE_FUNCTION_ENTER |
| 7271 | CEFBS_None, // PATCHABLE_RET |
| 7272 | CEFBS_None, // PATCHABLE_FUNCTION_EXIT |
| 7273 | CEFBS_None, // PATCHABLE_TAIL_CALL |
| 7274 | CEFBS_None, // PATCHABLE_EVENT_CALL |
| 7275 | CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL |
| 7276 | CEFBS_None, // ICALL_BRANCH_FUNNEL |
| 7277 | CEFBS_None, // FAKE_USE |
| 7278 | CEFBS_None, // MEMBARRIER |
| 7279 | CEFBS_None, // JUMP_TABLE_DEBUG_INFO |
| 7280 | CEFBS_None, // RELOC_NONE |
| 7281 | CEFBS_None, // CONVERGENCECTRL_ENTRY |
| 7282 | CEFBS_None, // CONVERGENCECTRL_ANCHOR |
| 7283 | CEFBS_None, // CONVERGENCECTRL_LOOP |
| 7284 | CEFBS_None, // CONVERGENCECTRL_GLUE |
| 7285 | CEFBS_None, // G_ASSERT_SEXT |
| 7286 | CEFBS_None, // G_ASSERT_ZEXT |
| 7287 | CEFBS_None, // G_ASSERT_ALIGN |
| 7288 | CEFBS_None, // G_ADD |
| 7289 | CEFBS_None, // G_SUB |
| 7290 | CEFBS_None, // G_MUL |
| 7291 | CEFBS_None, // G_SDIV |
| 7292 | CEFBS_None, // G_UDIV |
| 7293 | CEFBS_None, // G_SREM |
| 7294 | CEFBS_None, // G_UREM |
| 7295 | CEFBS_None, // G_SDIVREM |
| 7296 | CEFBS_None, // G_UDIVREM |
| 7297 | CEFBS_None, // G_AND |
| 7298 | CEFBS_None, // G_OR |
| 7299 | CEFBS_None, // G_XOR |
| 7300 | CEFBS_None, // G_ABDS |
| 7301 | CEFBS_None, // G_ABDU |
| 7302 | CEFBS_None, // G_UAVGFLOOR |
| 7303 | CEFBS_None, // G_UAVGCEIL |
| 7304 | CEFBS_None, // G_SAVGFLOOR |
| 7305 | CEFBS_None, // G_SAVGCEIL |
| 7306 | CEFBS_None, // G_IMPLICIT_DEF |
| 7307 | CEFBS_None, // G_PHI |
| 7308 | CEFBS_None, // G_FRAME_INDEX |
| 7309 | CEFBS_None, // G_GLOBAL_VALUE |
| 7310 | CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE |
| 7311 | CEFBS_None, // G_CONSTANT_POOL |
| 7312 | CEFBS_None, // G_EXTRACT |
| 7313 | CEFBS_None, // G_UNMERGE_VALUES |
| 7314 | CEFBS_None, // G_INSERT |
| 7315 | CEFBS_None, // G_MERGE_VALUES |
| 7316 | CEFBS_None, // G_BUILD_VECTOR |
| 7317 | CEFBS_None, // G_BUILD_VECTOR_TRUNC |
| 7318 | CEFBS_None, // G_CONCAT_VECTORS |
| 7319 | CEFBS_None, // G_PTRTOINT |
| 7320 | CEFBS_None, // G_INTTOPTR |
| 7321 | CEFBS_None, // G_BITCAST |
| 7322 | CEFBS_None, // G_FREEZE |
| 7323 | CEFBS_None, // G_CONSTANT_FOLD_BARRIER |
| 7324 | CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND |
| 7325 | CEFBS_None, // G_INTRINSIC_TRUNC |
| 7326 | CEFBS_None, // G_INTRINSIC_ROUND |
| 7327 | CEFBS_None, // G_INTRINSIC_LRINT |
| 7328 | CEFBS_None, // G_INTRINSIC_LLRINT |
| 7329 | CEFBS_None, // G_INTRINSIC_ROUNDEVEN |
| 7330 | CEFBS_None, // G_READCYCLECOUNTER |
| 7331 | CEFBS_None, // G_READSTEADYCOUNTER |
| 7332 | CEFBS_None, // G_LOAD |
| 7333 | CEFBS_None, // G_SEXTLOAD |
| 7334 | CEFBS_None, // G_ZEXTLOAD |
| 7335 | CEFBS_None, // G_INDEXED_LOAD |
| 7336 | CEFBS_None, // G_INDEXED_SEXTLOAD |
| 7337 | CEFBS_None, // G_INDEXED_ZEXTLOAD |
| 7338 | CEFBS_None, // G_STORE |
| 7339 | CEFBS_None, // G_INDEXED_STORE |
| 7340 | CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
| 7341 | CEFBS_None, // G_ATOMIC_CMPXCHG |
| 7342 | CEFBS_None, // G_ATOMICRMW_XCHG |
| 7343 | CEFBS_None, // G_ATOMICRMW_ADD |
| 7344 | CEFBS_None, // G_ATOMICRMW_SUB |
| 7345 | CEFBS_None, // G_ATOMICRMW_AND |
| 7346 | CEFBS_None, // G_ATOMICRMW_NAND |
| 7347 | CEFBS_None, // G_ATOMICRMW_OR |
| 7348 | CEFBS_None, // G_ATOMICRMW_XOR |
| 7349 | CEFBS_None, // G_ATOMICRMW_MAX |
| 7350 | CEFBS_None, // G_ATOMICRMW_MIN |
| 7351 | CEFBS_None, // G_ATOMICRMW_UMAX |
| 7352 | CEFBS_None, // G_ATOMICRMW_UMIN |
| 7353 | CEFBS_None, // G_ATOMICRMW_FADD |
| 7354 | CEFBS_None, // G_ATOMICRMW_FSUB |
| 7355 | CEFBS_None, // G_ATOMICRMW_FMAX |
| 7356 | CEFBS_None, // G_ATOMICRMW_FMIN |
| 7357 | CEFBS_None, // G_ATOMICRMW_FMAXIMUM |
| 7358 | CEFBS_None, // G_ATOMICRMW_FMINIMUM |
| 7359 | CEFBS_None, // G_ATOMICRMW_FMAXIMUMNUM |
| 7360 | CEFBS_None, // G_ATOMICRMW_FMINIMUMNUM |
| 7361 | CEFBS_None, // G_ATOMICRMW_UINC_WRAP |
| 7362 | CEFBS_None, // G_ATOMICRMW_UDEC_WRAP |
| 7363 | CEFBS_None, // G_ATOMICRMW_USUB_COND |
| 7364 | CEFBS_None, // G_ATOMICRMW_USUB_SAT |
| 7365 | CEFBS_None, // G_FENCE |
| 7366 | CEFBS_None, // G_PREFETCH |
| 7367 | CEFBS_None, // G_BRCOND |
| 7368 | CEFBS_None, // G_BRINDIRECT |
| 7369 | CEFBS_None, // G_INVOKE_REGION_START |
| 7370 | CEFBS_None, // G_INTRINSIC |
| 7371 | CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS |
| 7372 | CEFBS_None, // G_INTRINSIC_CONVERGENT |
| 7373 | CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
| 7374 | CEFBS_None, // G_ANYEXT |
| 7375 | CEFBS_None, // G_TRUNC |
| 7376 | CEFBS_None, // G_TRUNC_SSAT_S |
| 7377 | CEFBS_None, // G_TRUNC_SSAT_U |
| 7378 | CEFBS_None, // G_TRUNC_USAT_U |
| 7379 | CEFBS_None, // G_CONSTANT |
| 7380 | CEFBS_None, // G_FCONSTANT |
| 7381 | CEFBS_None, // G_VASTART |
| 7382 | CEFBS_None, // G_VAARG |
| 7383 | CEFBS_None, // G_SEXT |
| 7384 | CEFBS_None, // G_SEXT_INREG |
| 7385 | CEFBS_None, // G_ZEXT |
| 7386 | CEFBS_None, // G_SHL |
| 7387 | CEFBS_None, // G_LSHR |
| 7388 | CEFBS_None, // G_ASHR |
| 7389 | CEFBS_None, // G_FSHL |
| 7390 | CEFBS_None, // G_FSHR |
| 7391 | CEFBS_None, // G_ROTR |
| 7392 | CEFBS_None, // G_ROTL |
| 7393 | CEFBS_None, // G_ICMP |
| 7394 | CEFBS_None, // G_FCMP |
| 7395 | CEFBS_None, // G_SCMP |
| 7396 | CEFBS_None, // G_UCMP |
| 7397 | CEFBS_None, // G_SELECT |
| 7398 | CEFBS_None, // G_UADDO |
| 7399 | CEFBS_None, // G_UADDE |
| 7400 | CEFBS_None, // G_USUBO |
| 7401 | CEFBS_None, // G_USUBE |
| 7402 | CEFBS_None, // G_SADDO |
| 7403 | CEFBS_None, // G_SADDE |
| 7404 | CEFBS_None, // G_SSUBO |
| 7405 | CEFBS_None, // G_SSUBE |
| 7406 | CEFBS_None, // G_UMULO |
| 7407 | CEFBS_None, // G_SMULO |
| 7408 | CEFBS_None, // G_UMULH |
| 7409 | CEFBS_None, // G_SMULH |
| 7410 | CEFBS_None, // G_UADDSAT |
| 7411 | CEFBS_None, // G_SADDSAT |
| 7412 | CEFBS_None, // G_USUBSAT |
| 7413 | CEFBS_None, // G_SSUBSAT |
| 7414 | CEFBS_None, // G_USHLSAT |
| 7415 | CEFBS_None, // G_SSHLSAT |
| 7416 | CEFBS_None, // G_SMULFIX |
| 7417 | CEFBS_None, // G_UMULFIX |
| 7418 | CEFBS_None, // G_SMULFIXSAT |
| 7419 | CEFBS_None, // G_UMULFIXSAT |
| 7420 | CEFBS_None, // G_SDIVFIX |
| 7421 | CEFBS_None, // G_UDIVFIX |
| 7422 | CEFBS_None, // G_SDIVFIXSAT |
| 7423 | CEFBS_None, // G_UDIVFIXSAT |
| 7424 | CEFBS_None, // G_FADD |
| 7425 | CEFBS_None, // G_FSUB |
| 7426 | CEFBS_None, // G_FMUL |
| 7427 | CEFBS_None, // G_FMA |
| 7428 | CEFBS_None, // G_FMAD |
| 7429 | CEFBS_None, // G_FDIV |
| 7430 | CEFBS_None, // G_FREM |
| 7431 | CEFBS_None, // G_FMODF |
| 7432 | CEFBS_None, // G_FPOW |
| 7433 | CEFBS_None, // G_FPOWI |
| 7434 | CEFBS_None, // G_FEXP |
| 7435 | CEFBS_None, // G_FEXP2 |
| 7436 | CEFBS_None, // G_FEXP10 |
| 7437 | CEFBS_None, // G_FLOG |
| 7438 | CEFBS_None, // G_FLOG2 |
| 7439 | CEFBS_None, // G_FLOG10 |
| 7440 | CEFBS_None, // G_FLDEXP |
| 7441 | CEFBS_None, // G_FFREXP |
| 7442 | CEFBS_None, // G_FNEG |
| 7443 | CEFBS_None, // G_FPEXT |
| 7444 | CEFBS_None, // G_FPTRUNC |
| 7445 | CEFBS_None, // G_FPTOSI |
| 7446 | CEFBS_None, // G_FPTOUI |
| 7447 | CEFBS_None, // G_SITOFP |
| 7448 | CEFBS_None, // G_UITOFP |
| 7449 | CEFBS_None, // G_FPTOSI_SAT |
| 7450 | CEFBS_None, // G_FPTOUI_SAT |
| 7451 | CEFBS_None, // G_FABS |
| 7452 | CEFBS_None, // G_FCOPYSIGN |
| 7453 | CEFBS_None, // G_IS_FPCLASS |
| 7454 | CEFBS_None, // G_FCANONICALIZE |
| 7455 | CEFBS_None, // G_FMINNUM |
| 7456 | CEFBS_None, // G_FMAXNUM |
| 7457 | CEFBS_None, // G_FMINNUM_IEEE |
| 7458 | CEFBS_None, // G_FMAXNUM_IEEE |
| 7459 | CEFBS_None, // G_FMINIMUM |
| 7460 | CEFBS_None, // G_FMAXIMUM |
| 7461 | CEFBS_None, // G_FMINIMUMNUM |
| 7462 | CEFBS_None, // G_FMAXIMUMNUM |
| 7463 | CEFBS_None, // G_GET_FPENV |
| 7464 | CEFBS_None, // G_SET_FPENV |
| 7465 | CEFBS_None, // G_RESET_FPENV |
| 7466 | CEFBS_None, // G_GET_FPMODE |
| 7467 | CEFBS_None, // G_SET_FPMODE |
| 7468 | CEFBS_None, // G_RESET_FPMODE |
| 7469 | CEFBS_None, // G_GET_ROUNDING |
| 7470 | CEFBS_None, // G_SET_ROUNDING |
| 7471 | CEFBS_None, // G_PTR_ADD |
| 7472 | CEFBS_None, // G_PTRMASK |
| 7473 | CEFBS_None, // G_SMIN |
| 7474 | CEFBS_None, // G_SMAX |
| 7475 | CEFBS_None, // G_UMIN |
| 7476 | CEFBS_None, // G_UMAX |
| 7477 | CEFBS_None, // G_ABS |
| 7478 | CEFBS_None, // G_LROUND |
| 7479 | CEFBS_None, // G_LLROUND |
| 7480 | CEFBS_None, // G_BR |
| 7481 | CEFBS_None, // G_BRJT |
| 7482 | CEFBS_None, // G_VSCALE |
| 7483 | CEFBS_None, // G_INSERT_SUBVECTOR |
| 7484 | CEFBS_None, // G_EXTRACT_SUBVECTOR |
| 7485 | CEFBS_None, // G_INSERT_VECTOR_ELT |
| 7486 | CEFBS_None, // G_EXTRACT_VECTOR_ELT |
| 7487 | CEFBS_None, // G_SHUFFLE_VECTOR |
| 7488 | CEFBS_None, // G_SPLAT_VECTOR |
| 7489 | CEFBS_None, // G_STEP_VECTOR |
| 7490 | CEFBS_None, // G_VECTOR_COMPRESS |
| 7491 | CEFBS_None, // G_CTTZ |
| 7492 | CEFBS_None, // G_CTTZ_ZERO_UNDEF |
| 7493 | CEFBS_None, // G_CTLZ |
| 7494 | CEFBS_None, // G_CTLZ_ZERO_UNDEF |
| 7495 | CEFBS_None, // G_CTLS |
| 7496 | CEFBS_None, // G_CTPOP |
| 7497 | CEFBS_None, // G_BSWAP |
| 7498 | CEFBS_None, // G_BITREVERSE |
| 7499 | CEFBS_None, // G_FCEIL |
| 7500 | CEFBS_None, // G_FCOS |
| 7501 | CEFBS_None, // G_FSIN |
| 7502 | CEFBS_None, // G_FSINCOS |
| 7503 | CEFBS_None, // G_FTAN |
| 7504 | CEFBS_None, // G_FACOS |
| 7505 | CEFBS_None, // G_FASIN |
| 7506 | CEFBS_None, // G_FATAN |
| 7507 | CEFBS_None, // G_FATAN2 |
| 7508 | CEFBS_None, // G_FCOSH |
| 7509 | CEFBS_None, // G_FSINH |
| 7510 | CEFBS_None, // G_FTANH |
| 7511 | CEFBS_None, // G_FSQRT |
| 7512 | CEFBS_None, // G_FFLOOR |
| 7513 | CEFBS_None, // G_FRINT |
| 7514 | CEFBS_None, // G_FNEARBYINT |
| 7515 | CEFBS_None, // G_ADDRSPACE_CAST |
| 7516 | CEFBS_None, // G_BLOCK_ADDR |
| 7517 | CEFBS_None, // G_JUMP_TABLE |
| 7518 | CEFBS_None, // G_DYN_STACKALLOC |
| 7519 | CEFBS_None, // G_STACKSAVE |
| 7520 | CEFBS_None, // G_STACKRESTORE |
| 7521 | CEFBS_None, // G_STRICT_FADD |
| 7522 | CEFBS_None, // G_STRICT_FSUB |
| 7523 | CEFBS_None, // G_STRICT_FMUL |
| 7524 | CEFBS_None, // G_STRICT_FDIV |
| 7525 | CEFBS_None, // G_STRICT_FREM |
| 7526 | CEFBS_None, // G_STRICT_FMA |
| 7527 | CEFBS_None, // G_STRICT_FSQRT |
| 7528 | CEFBS_None, // G_STRICT_FLDEXP |
| 7529 | CEFBS_None, // G_READ_REGISTER |
| 7530 | CEFBS_None, // G_WRITE_REGISTER |
| 7531 | CEFBS_None, // G_MEMCPY |
| 7532 | CEFBS_None, // G_MEMCPY_INLINE |
| 7533 | CEFBS_None, // G_MEMMOVE |
| 7534 | CEFBS_None, // G_MEMSET |
| 7535 | CEFBS_None, // G_BZERO |
| 7536 | CEFBS_None, // G_TRAP |
| 7537 | CEFBS_None, // G_DEBUGTRAP |
| 7538 | CEFBS_None, // G_UBSANTRAP |
| 7539 | CEFBS_None, // G_VECREDUCE_SEQ_FADD |
| 7540 | CEFBS_None, // G_VECREDUCE_SEQ_FMUL |
| 7541 | CEFBS_None, // G_VECREDUCE_FADD |
| 7542 | CEFBS_None, // G_VECREDUCE_FMUL |
| 7543 | CEFBS_None, // G_VECREDUCE_FMAX |
| 7544 | CEFBS_None, // G_VECREDUCE_FMIN |
| 7545 | CEFBS_None, // G_VECREDUCE_FMAXIMUM |
| 7546 | CEFBS_None, // G_VECREDUCE_FMINIMUM |
| 7547 | CEFBS_None, // G_VECREDUCE_ADD |
| 7548 | CEFBS_None, // G_VECREDUCE_MUL |
| 7549 | CEFBS_None, // G_VECREDUCE_AND |
| 7550 | CEFBS_None, // G_VECREDUCE_OR |
| 7551 | CEFBS_None, // G_VECREDUCE_XOR |
| 7552 | CEFBS_None, // G_VECREDUCE_SMAX |
| 7553 | CEFBS_None, // G_VECREDUCE_SMIN |
| 7554 | CEFBS_None, // G_VECREDUCE_UMAX |
| 7555 | CEFBS_None, // G_VECREDUCE_UMIN |
| 7556 | CEFBS_None, // G_SBFX |
| 7557 | CEFBS_None, // G_UBFX |
| 7558 | CEFBS_None, // ADJCALLSTACKDOWN |
| 7559 | CEFBS_None, // ADJCALLSTACKUP |
| 7560 | CEFBS_IsLA32, // BuildPairF64Pseudo |
| 7561 | CEFBS_IsLA64, // PseudoAddTPRel_D |
| 7562 | CEFBS_IsLA32, // PseudoAddTPRel_W |
| 7563 | CEFBS_None, // PseudoAtomicLoadAdd32 |
| 7564 | CEFBS_None, // PseudoAtomicLoadAnd32 |
| 7565 | CEFBS_None, // PseudoAtomicLoadMax32 |
| 7566 | CEFBS_None, // PseudoAtomicLoadMin32 |
| 7567 | CEFBS_None, // PseudoAtomicLoadNand32 |
| 7568 | CEFBS_None, // PseudoAtomicLoadNand64 |
| 7569 | CEFBS_None, // PseudoAtomicLoadOr32 |
| 7570 | CEFBS_None, // PseudoAtomicLoadSub32 |
| 7571 | CEFBS_None, // PseudoAtomicLoadUMax32 |
| 7572 | CEFBS_None, // PseudoAtomicLoadUMin32 |
| 7573 | CEFBS_None, // PseudoAtomicLoadXor32 |
| 7574 | CEFBS_IsLA64, // PseudoAtomicStoreD |
| 7575 | CEFBS_None, // PseudoAtomicStoreW |
| 7576 | CEFBS_None, // PseudoAtomicSwap32 |
| 7577 | CEFBS_None, // PseudoBR |
| 7578 | CEFBS_None, // PseudoBRIND |
| 7579 | CEFBS_None, // PseudoB_TAIL |
| 7580 | CEFBS_None, // PseudoCALL |
| 7581 | CEFBS_None, // PseudoCALL30 |
| 7582 | CEFBS_IsLA64, // PseudoCALL36 |
| 7583 | CEFBS_None, // PseudoCALLIndirect |
| 7584 | CEFBS_None, // PseudoCALL_LARGE |
| 7585 | CEFBS_None, // PseudoCALL_MEDIUM |
| 7586 | CEFBS_None, // PseudoCALL_SMALL |
| 7587 | CEFBS_None, // PseudoCTPOP |
| 7588 | CEFBS_None, // PseudoCmpXchg128 |
| 7589 | CEFBS_None, // PseudoCmpXchg128Acquire |
| 7590 | CEFBS_None, // PseudoCmpXchg32 |
| 7591 | CEFBS_None, // PseudoCmpXchg64 |
| 7592 | CEFBS_None, // PseudoCopyCFR |
| 7593 | CEFBS_None, // PseudoDESC_CALL |
| 7594 | CEFBS_None, // PseudoJIRL_CALL |
| 7595 | CEFBS_None, // PseudoJIRL_TAIL |
| 7596 | CEFBS_None, // PseudoLA_ABS |
| 7597 | CEFBS_None, // PseudoLA_ABS_LARGE |
| 7598 | CEFBS_None, // PseudoLA_GOT |
| 7599 | CEFBS_IsLA64, // PseudoLA_GOT_LARGE |
| 7600 | CEFBS_None, // PseudoLA_PCREL |
| 7601 | CEFBS_IsLA64, // PseudoLA_PCREL_LARGE |
| 7602 | CEFBS_None, // PseudoLA_TLS_DESC |
| 7603 | CEFBS_IsLA64, // PseudoLA_TLS_DESC_LARGE |
| 7604 | CEFBS_None, // PseudoLA_TLS_GD |
| 7605 | CEFBS_IsLA64, // PseudoLA_TLS_GD_LARGE |
| 7606 | CEFBS_None, // PseudoLA_TLS_IE |
| 7607 | CEFBS_IsLA64, // PseudoLA_TLS_IE_LARGE |
| 7608 | CEFBS_None, // PseudoLA_TLS_LD |
| 7609 | CEFBS_IsLA64, // PseudoLA_TLS_LD_LARGE |
| 7610 | CEFBS_None, // PseudoLA_TLS_LE |
| 7611 | CEFBS_None, // PseudoLD_CFR |
| 7612 | CEFBS_IsLA64, // PseudoLI_D |
| 7613 | CEFBS_None, // PseudoLI_W |
| 7614 | CEFBS_None, // PseudoMaskedAtomicLoadAdd32 |
| 7615 | CEFBS_None, // PseudoMaskedAtomicLoadMax32 |
| 7616 | CEFBS_None, // PseudoMaskedAtomicLoadMin32 |
| 7617 | CEFBS_None, // PseudoMaskedAtomicLoadNand32 |
| 7618 | CEFBS_None, // PseudoMaskedAtomicLoadSub32 |
| 7619 | CEFBS_None, // PseudoMaskedAtomicLoadUMax32 |
| 7620 | CEFBS_None, // PseudoMaskedAtomicLoadUMin32 |
| 7621 | CEFBS_None, // PseudoMaskedAtomicSwap32 |
| 7622 | CEFBS_None, // PseudoMaskedCmpXchg32 |
| 7623 | CEFBS_None, // PseudoRET |
| 7624 | CEFBS_None, // PseudoST_CFR |
| 7625 | CEFBS_None, // PseudoTAIL |
| 7626 | CEFBS_None, // PseudoTAIL30 |
| 7627 | CEFBS_IsLA64, // PseudoTAIL36 |
| 7628 | CEFBS_None, // PseudoTAILIndirect |
| 7629 | CEFBS_None, // PseudoTAIL_LARGE |
| 7630 | CEFBS_None, // PseudoTAIL_MEDIUM |
| 7631 | CEFBS_None, // PseudoTAIL_SMALL |
| 7632 | CEFBS_None, // PseudoUNIMP |
| 7633 | CEFBS_None, // PseudoVBNZ |
| 7634 | CEFBS_None, // PseudoVBNZ_B |
| 7635 | CEFBS_None, // PseudoVBNZ_D |
| 7636 | CEFBS_None, // PseudoVBNZ_H |
| 7637 | CEFBS_None, // PseudoVBNZ_W |
| 7638 | CEFBS_None, // PseudoVBZ |
| 7639 | CEFBS_None, // PseudoVBZ_B |
| 7640 | CEFBS_None, // PseudoVBZ_D |
| 7641 | CEFBS_None, // PseudoVBZ_H |
| 7642 | CEFBS_None, // PseudoVBZ_W |
| 7643 | CEFBS_None, // PseudoVMSKEQZ_B |
| 7644 | CEFBS_None, // PseudoVMSKGEZ_B |
| 7645 | CEFBS_None, // PseudoVMSKLTZ_B |
| 7646 | CEFBS_None, // PseudoVMSKLTZ_D |
| 7647 | CEFBS_None, // PseudoVMSKLTZ_H |
| 7648 | CEFBS_None, // PseudoVMSKLTZ_W |
| 7649 | CEFBS_None, // PseudoVMSKNEZ_B |
| 7650 | CEFBS_None, // PseudoVREPLI_B |
| 7651 | CEFBS_None, // PseudoVREPLI_D |
| 7652 | CEFBS_None, // PseudoVREPLI_H |
| 7653 | CEFBS_None, // PseudoVREPLI_W |
| 7654 | CEFBS_None, // PseudoXVBNZ |
| 7655 | CEFBS_None, // PseudoXVBNZ_B |
| 7656 | CEFBS_None, // PseudoXVBNZ_D |
| 7657 | CEFBS_None, // PseudoXVBNZ_H |
| 7658 | CEFBS_None, // PseudoXVBNZ_W |
| 7659 | CEFBS_None, // PseudoXVBZ |
| 7660 | CEFBS_None, // PseudoXVBZ_B |
| 7661 | CEFBS_None, // PseudoXVBZ_D |
| 7662 | CEFBS_None, // PseudoXVBZ_H |
| 7663 | CEFBS_None, // PseudoXVBZ_W |
| 7664 | CEFBS_None, // PseudoXVINSGR2VR_B |
| 7665 | CEFBS_None, // PseudoXVINSGR2VR_H |
| 7666 | CEFBS_None, // PseudoXVMSKEQZ_B |
| 7667 | CEFBS_None, // PseudoXVMSKGEZ_B |
| 7668 | CEFBS_None, // PseudoXVMSKLTZ_B |
| 7669 | CEFBS_None, // PseudoXVMSKLTZ_D |
| 7670 | CEFBS_None, // PseudoXVMSKLTZ_H |
| 7671 | CEFBS_None, // PseudoXVMSKLTZ_W |
| 7672 | CEFBS_None, // PseudoXVMSKNEZ_B |
| 7673 | CEFBS_None, // PseudoXVREPLI_B |
| 7674 | CEFBS_None, // PseudoXVREPLI_D |
| 7675 | CEFBS_None, // PseudoXVREPLI_H |
| 7676 | CEFBS_None, // PseudoXVREPLI_W |
| 7677 | CEFBS_None, // RDFCSR |
| 7678 | CEFBS_None, // Select_GPR_Using_CC_GPR |
| 7679 | CEFBS_IsLA32, // SplitPairF64Pseudo |
| 7680 | CEFBS_None, // WRFCSR |
| 7681 | CEFBS_None, // ADC_B |
| 7682 | CEFBS_IsLA64, // ADC_D |
| 7683 | CEFBS_None, // ADC_H |
| 7684 | CEFBS_None, // ADC_W |
| 7685 | CEFBS_IsLA64, // ADDI_D |
| 7686 | CEFBS_None, // ADDI_W |
| 7687 | CEFBS_IsLA64, // ADDU12I_D |
| 7688 | CEFBS_None, // ADDU12I_W |
| 7689 | CEFBS_IsLA64, // ADDU16I_D |
| 7690 | CEFBS_IsLA64, // ADD_D |
| 7691 | CEFBS_None, // ADD_W |
| 7692 | CEFBS_IsLA64, // ALSL_D |
| 7693 | CEFBS_None, // ALSL_W |
| 7694 | CEFBS_IsLA64, // ALSL_WU |
| 7695 | CEFBS_IsLA64, // AMADD_B |
| 7696 | CEFBS_IsLA64, // AMADD_D |
| 7697 | CEFBS_IsLA64, // AMADD_H |
| 7698 | CEFBS_IsLA64, // AMADD_W |
| 7699 | CEFBS_IsLA64, // AMADD__DB_B |
| 7700 | CEFBS_IsLA64, // AMADD__DB_D |
| 7701 | CEFBS_IsLA64, // AMADD__DB_H |
| 7702 | CEFBS_IsLA64, // AMADD__DB_W |
| 7703 | CEFBS_IsLA64, // AMAND_D |
| 7704 | CEFBS_IsLA64, // AMAND_W |
| 7705 | CEFBS_IsLA64, // AMAND__DB_D |
| 7706 | CEFBS_IsLA64, // AMAND__DB_W |
| 7707 | CEFBS_IsLA64, // AMCAS_B |
| 7708 | CEFBS_IsLA64, // AMCAS_D |
| 7709 | CEFBS_IsLA64, // AMCAS_H |
| 7710 | CEFBS_IsLA64, // AMCAS_W |
| 7711 | CEFBS_IsLA64, // AMCAS__DB_B |
| 7712 | CEFBS_IsLA64, // AMCAS__DB_D |
| 7713 | CEFBS_IsLA64, // AMCAS__DB_H |
| 7714 | CEFBS_IsLA64, // AMCAS__DB_W |
| 7715 | CEFBS_IsLA64, // AMMAX_D |
| 7716 | CEFBS_IsLA64, // AMMAX_DU |
| 7717 | CEFBS_IsLA64, // AMMAX_W |
| 7718 | CEFBS_IsLA64, // AMMAX_WU |
| 7719 | CEFBS_IsLA64, // AMMAX__DB_D |
| 7720 | CEFBS_IsLA64, // AMMAX__DB_DU |
| 7721 | CEFBS_IsLA64, // AMMAX__DB_W |
| 7722 | CEFBS_IsLA64, // AMMAX__DB_WU |
| 7723 | CEFBS_IsLA64, // AMMIN_D |
| 7724 | CEFBS_IsLA64, // AMMIN_DU |
| 7725 | CEFBS_IsLA64, // AMMIN_W |
| 7726 | CEFBS_IsLA64, // AMMIN_WU |
| 7727 | CEFBS_IsLA64, // AMMIN__DB_D |
| 7728 | CEFBS_IsLA64, // AMMIN__DB_DU |
| 7729 | CEFBS_IsLA64, // AMMIN__DB_W |
| 7730 | CEFBS_IsLA64, // AMMIN__DB_WU |
| 7731 | CEFBS_IsLA64, // AMOR_D |
| 7732 | CEFBS_IsLA64, // AMOR_W |
| 7733 | CEFBS_IsLA64, // AMOR__DB_D |
| 7734 | CEFBS_IsLA64, // AMOR__DB_W |
| 7735 | CEFBS_IsLA64, // AMSWAP_B |
| 7736 | CEFBS_IsLA64, // AMSWAP_D |
| 7737 | CEFBS_IsLA64, // AMSWAP_H |
| 7738 | CEFBS_IsLA64, // AMSWAP_W |
| 7739 | CEFBS_IsLA64, // AMSWAP__DB_B |
| 7740 | CEFBS_IsLA64, // AMSWAP__DB_D |
| 7741 | CEFBS_IsLA64, // AMSWAP__DB_H |
| 7742 | CEFBS_IsLA64, // AMSWAP__DB_W |
| 7743 | CEFBS_IsLA64, // AMXOR_D |
| 7744 | CEFBS_IsLA64, // AMXOR_W |
| 7745 | CEFBS_IsLA64, // AMXOR__DB_D |
| 7746 | CEFBS_IsLA64, // AMXOR__DB_W |
| 7747 | CEFBS_None, // AND |
| 7748 | CEFBS_None, // ANDI |
| 7749 | CEFBS_None, // ANDN |
| 7750 | CEFBS_None, // ARMADC_W |
| 7751 | CEFBS_None, // ARMADD_W |
| 7752 | CEFBS_None, // ARMAND_W |
| 7753 | CEFBS_None, // ARMMFFLAG |
| 7754 | CEFBS_None, // ARMMOVE |
| 7755 | CEFBS_IsLA64, // ARMMOV_D |
| 7756 | CEFBS_None, // ARMMOV_W |
| 7757 | CEFBS_None, // ARMMTFLAG |
| 7758 | CEFBS_None, // ARMNOT_W |
| 7759 | CEFBS_None, // ARMOR_W |
| 7760 | CEFBS_None, // ARMROTRI_W |
| 7761 | CEFBS_None, // ARMROTR_W |
| 7762 | CEFBS_None, // ARMRRX_W |
| 7763 | CEFBS_None, // ARMSBC_W |
| 7764 | CEFBS_None, // ARMSLLI_W |
| 7765 | CEFBS_None, // ARMSLL_W |
| 7766 | CEFBS_None, // ARMSRAI_W |
| 7767 | CEFBS_None, // ARMSRA_W |
| 7768 | CEFBS_None, // ARMSRLI_W |
| 7769 | CEFBS_None, // ARMSRL_W |
| 7770 | CEFBS_None, // ARMSUB_W |
| 7771 | CEFBS_None, // ARMXOR_W |
| 7772 | CEFBS_IsLA64, // ASRTGT_D |
| 7773 | CEFBS_IsLA64, // ASRTLE_D |
| 7774 | CEFBS_None, // B |
| 7775 | CEFBS_None, // BCEQZ |
| 7776 | CEFBS_None, // BCNEZ |
| 7777 | CEFBS_None, // BEQ |
| 7778 | CEFBS_None, // BEQZ |
| 7779 | CEFBS_None, // BGE |
| 7780 | CEFBS_None, // BGEU |
| 7781 | CEFBS_None, // BITREV_4B |
| 7782 | CEFBS_IsLA64, // BITREV_8B |
| 7783 | CEFBS_IsLA64, // BITREV_D |
| 7784 | CEFBS_None, // BITREV_W |
| 7785 | CEFBS_None, // BL |
| 7786 | CEFBS_None, // BLT |
| 7787 | CEFBS_None, // BLTU |
| 7788 | CEFBS_None, // BNE |
| 7789 | CEFBS_None, // BNEZ |
| 7790 | CEFBS_None, // BREAK |
| 7791 | CEFBS_IsLA64, // BSTRINS_D |
| 7792 | CEFBS_None, // BSTRINS_W |
| 7793 | CEFBS_IsLA64, // BSTRPICK_D |
| 7794 | CEFBS_None, // BSTRPICK_W |
| 7795 | CEFBS_IsLA64, // BYTEPICK_D |
| 7796 | CEFBS_None, // BYTEPICK_W |
| 7797 | CEFBS_None, // CACOP |
| 7798 | CEFBS_IsLA64, // CLO_D |
| 7799 | CEFBS_None, // CLO_W |
| 7800 | CEFBS_IsLA64, // CLZ_D |
| 7801 | CEFBS_None, // CLZ_W |
| 7802 | CEFBS_None, // CPUCFG |
| 7803 | CEFBS_IsLA64, // CRCC_W_B_W |
| 7804 | CEFBS_IsLA64, // CRCC_W_D_W |
| 7805 | CEFBS_IsLA64, // CRCC_W_H_W |
| 7806 | CEFBS_IsLA64, // CRCC_W_W_W |
| 7807 | CEFBS_IsLA64, // CRC_W_B_W |
| 7808 | CEFBS_IsLA64, // CRC_W_D_W |
| 7809 | CEFBS_IsLA64, // CRC_W_H_W |
| 7810 | CEFBS_IsLA64, // CRC_W_W_W |
| 7811 | CEFBS_None, // CSRRD |
| 7812 | CEFBS_None, // CSRWR |
| 7813 | CEFBS_None, // CSRXCHG |
| 7814 | CEFBS_IsLA64, // CTO_D |
| 7815 | CEFBS_None, // CTO_W |
| 7816 | CEFBS_IsLA64, // CTZ_D |
| 7817 | CEFBS_None, // CTZ_W |
| 7818 | CEFBS_None, // DBAR |
| 7819 | CEFBS_None, // DBCL |
| 7820 | CEFBS_IsLA64, // DIV_D |
| 7821 | CEFBS_IsLA64, // DIV_DU |
| 7822 | CEFBS_None, // DIV_W |
| 7823 | CEFBS_None, // DIV_WU |
| 7824 | CEFBS_None, // ERTN |
| 7825 | CEFBS_None, // EXT_W_B |
| 7826 | CEFBS_None, // EXT_W_H |
| 7827 | CEFBS_None, // FABS_D |
| 7828 | CEFBS_None, // FABS_S |
| 7829 | CEFBS_None, // FADD_D |
| 7830 | CEFBS_None, // FADD_S |
| 7831 | CEFBS_None, // FCLASS_D |
| 7832 | CEFBS_None, // FCLASS_S |
| 7833 | CEFBS_None, // FCMP_CAF_D |
| 7834 | CEFBS_None, // FCMP_CAF_S |
| 7835 | CEFBS_None, // FCMP_CEQ_D |
| 7836 | CEFBS_None, // FCMP_CEQ_S |
| 7837 | CEFBS_None, // FCMP_CLE_D |
| 7838 | CEFBS_None, // FCMP_CLE_S |
| 7839 | CEFBS_None, // FCMP_CLT_D |
| 7840 | CEFBS_None, // FCMP_CLT_S |
| 7841 | CEFBS_None, // FCMP_CNE_D |
| 7842 | CEFBS_None, // FCMP_CNE_S |
| 7843 | CEFBS_None, // FCMP_COR_D |
| 7844 | CEFBS_None, // FCMP_COR_S |
| 7845 | CEFBS_None, // FCMP_CUEQ_D |
| 7846 | CEFBS_None, // FCMP_CUEQ_S |
| 7847 | CEFBS_None, // FCMP_CULE_D |
| 7848 | CEFBS_None, // FCMP_CULE_S |
| 7849 | CEFBS_None, // FCMP_CULT_D |
| 7850 | CEFBS_None, // FCMP_CULT_S |
| 7851 | CEFBS_None, // FCMP_CUNE_D |
| 7852 | CEFBS_None, // FCMP_CUNE_S |
| 7853 | CEFBS_None, // FCMP_CUN_D |
| 7854 | CEFBS_None, // FCMP_CUN_S |
| 7855 | CEFBS_None, // FCMP_SAF_D |
| 7856 | CEFBS_None, // FCMP_SAF_S |
| 7857 | CEFBS_None, // FCMP_SEQ_D |
| 7858 | CEFBS_None, // FCMP_SEQ_S |
| 7859 | CEFBS_None, // FCMP_SLE_D |
| 7860 | CEFBS_None, // FCMP_SLE_S |
| 7861 | CEFBS_None, // FCMP_SLT_D |
| 7862 | CEFBS_None, // FCMP_SLT_S |
| 7863 | CEFBS_None, // FCMP_SNE_D |
| 7864 | CEFBS_None, // FCMP_SNE_S |
| 7865 | CEFBS_None, // FCMP_SOR_D |
| 7866 | CEFBS_None, // FCMP_SOR_S |
| 7867 | CEFBS_None, // FCMP_SUEQ_D |
| 7868 | CEFBS_None, // FCMP_SUEQ_S |
| 7869 | CEFBS_None, // FCMP_SULE_D |
| 7870 | CEFBS_None, // FCMP_SULE_S |
| 7871 | CEFBS_None, // FCMP_SULT_D |
| 7872 | CEFBS_None, // FCMP_SULT_S |
| 7873 | CEFBS_None, // FCMP_SUNE_D |
| 7874 | CEFBS_None, // FCMP_SUNE_S |
| 7875 | CEFBS_None, // FCMP_SUN_D |
| 7876 | CEFBS_None, // FCMP_SUN_S |
| 7877 | CEFBS_None, // FCOPYSIGN_D |
| 7878 | CEFBS_None, // FCOPYSIGN_S |
| 7879 | CEFBS_None, // FCVT_D_LD |
| 7880 | CEFBS_None, // FCVT_D_S |
| 7881 | CEFBS_None, // FCVT_LD_D |
| 7882 | CEFBS_None, // FCVT_S_D |
| 7883 | CEFBS_None, // FCVT_UD_D |
| 7884 | CEFBS_None, // FDIV_D |
| 7885 | CEFBS_None, // FDIV_S |
| 7886 | CEFBS_None, // FFINT_D_L |
| 7887 | CEFBS_None, // FFINT_D_W |
| 7888 | CEFBS_None, // FFINT_S_L |
| 7889 | CEFBS_None, // FFINT_S_W |
| 7890 | CEFBS_None, // FLDGT_D |
| 7891 | CEFBS_None, // FLDGT_S |
| 7892 | CEFBS_None, // FLDLE_D |
| 7893 | CEFBS_None, // FLDLE_S |
| 7894 | CEFBS_None, // FLDX_D |
| 7895 | CEFBS_None, // FLDX_S |
| 7896 | CEFBS_None, // FLD_D |
| 7897 | CEFBS_None, // FLD_S |
| 7898 | CEFBS_None, // FLOGB_D |
| 7899 | CEFBS_None, // FLOGB_S |
| 7900 | CEFBS_None, // FMADD_D |
| 7901 | CEFBS_None, // FMADD_S |
| 7902 | CEFBS_None, // FMAXA_D |
| 7903 | CEFBS_None, // FMAXA_S |
| 7904 | CEFBS_None, // FMAX_D |
| 7905 | CEFBS_None, // FMAX_S |
| 7906 | CEFBS_None, // FMINA_D |
| 7907 | CEFBS_None, // FMINA_S |
| 7908 | CEFBS_None, // FMIN_D |
| 7909 | CEFBS_None, // FMIN_S |
| 7910 | CEFBS_None, // FMOV_D |
| 7911 | CEFBS_None, // FMOV_S |
| 7912 | CEFBS_None, // FMSUB_D |
| 7913 | CEFBS_None, // FMSUB_S |
| 7914 | CEFBS_None, // FMUL_D |
| 7915 | CEFBS_None, // FMUL_S |
| 7916 | CEFBS_None, // FNEG_D |
| 7917 | CEFBS_None, // FNEG_S |
| 7918 | CEFBS_None, // FNMADD_D |
| 7919 | CEFBS_None, // FNMADD_S |
| 7920 | CEFBS_None, // FNMSUB_D |
| 7921 | CEFBS_None, // FNMSUB_S |
| 7922 | CEFBS_None, // FRECIPE_D |
| 7923 | CEFBS_None, // FRECIPE_S |
| 7924 | CEFBS_None, // FRECIP_D |
| 7925 | CEFBS_None, // FRECIP_S |
| 7926 | CEFBS_None, // FRINT_D |
| 7927 | CEFBS_None, // FRINT_S |
| 7928 | CEFBS_None, // FRSQRTE_D |
| 7929 | CEFBS_None, // FRSQRTE_S |
| 7930 | CEFBS_None, // FRSQRT_D |
| 7931 | CEFBS_None, // FRSQRT_S |
| 7932 | CEFBS_None, // FSCALEB_D |
| 7933 | CEFBS_None, // FSCALEB_S |
| 7934 | CEFBS_None, // FSEL_xD |
| 7935 | CEFBS_None, // FSEL_xS |
| 7936 | CEFBS_None, // FSQRT_D |
| 7937 | CEFBS_None, // FSQRT_S |
| 7938 | CEFBS_None, // FSTGT_D |
| 7939 | CEFBS_None, // FSTGT_S |
| 7940 | CEFBS_None, // FSTLE_D |
| 7941 | CEFBS_None, // FSTLE_S |
| 7942 | CEFBS_None, // FSTX_D |
| 7943 | CEFBS_None, // FSTX_S |
| 7944 | CEFBS_None, // FST_D |
| 7945 | CEFBS_None, // FST_S |
| 7946 | CEFBS_None, // FSUB_D |
| 7947 | CEFBS_None, // FSUB_S |
| 7948 | CEFBS_None, // FTINTRM_L_D |
| 7949 | CEFBS_None, // FTINTRM_L_S |
| 7950 | CEFBS_None, // FTINTRM_W_D |
| 7951 | CEFBS_None, // FTINTRM_W_S |
| 7952 | CEFBS_None, // FTINTRNE_L_D |
| 7953 | CEFBS_None, // FTINTRNE_L_S |
| 7954 | CEFBS_None, // FTINTRNE_W_D |
| 7955 | CEFBS_None, // FTINTRNE_W_S |
| 7956 | CEFBS_None, // FTINTRP_L_D |
| 7957 | CEFBS_None, // FTINTRP_L_S |
| 7958 | CEFBS_None, // FTINTRP_W_D |
| 7959 | CEFBS_None, // FTINTRP_W_S |
| 7960 | CEFBS_None, // FTINTRZ_L_D |
| 7961 | CEFBS_None, // FTINTRZ_L_S |
| 7962 | CEFBS_None, // FTINTRZ_W_D |
| 7963 | CEFBS_None, // FTINTRZ_W_S |
| 7964 | CEFBS_None, // FTINT_L_D |
| 7965 | CEFBS_None, // FTINT_L_S |
| 7966 | CEFBS_None, // FTINT_W_D |
| 7967 | CEFBS_None, // FTINT_W_S |
| 7968 | CEFBS_None, // GCSRRD |
| 7969 | CEFBS_None, // GCSRWR |
| 7970 | CEFBS_None, // GCSRXCHG |
| 7971 | CEFBS_None, // GTLBFLUSH |
| 7972 | CEFBS_None, // HVCL |
| 7973 | CEFBS_None, // IBAR |
| 7974 | CEFBS_None, // IDLE |
| 7975 | CEFBS_None, // INVTLB |
| 7976 | CEFBS_None, // IOCSRRD_B |
| 7977 | CEFBS_IsLA64, // IOCSRRD_D |
| 7978 | CEFBS_None, // IOCSRRD_H |
| 7979 | CEFBS_None, // IOCSRRD_W |
| 7980 | CEFBS_None, // IOCSRWR_B |
| 7981 | CEFBS_IsLA64, // IOCSRWR_D |
| 7982 | CEFBS_None, // IOCSRWR_H |
| 7983 | CEFBS_None, // IOCSRWR_W |
| 7984 | CEFBS_None, // JIRL |
| 7985 | CEFBS_None, // JISCR0 |
| 7986 | CEFBS_None, // JISCR1 |
| 7987 | CEFBS_None, // LDDIR |
| 7988 | CEFBS_IsLA64, // LDGT_B |
| 7989 | CEFBS_IsLA64, // LDGT_D |
| 7990 | CEFBS_IsLA64, // LDGT_H |
| 7991 | CEFBS_IsLA64, // LDGT_W |
| 7992 | CEFBS_IsLA64, // LDLE_B |
| 7993 | CEFBS_IsLA64, // LDLE_D |
| 7994 | CEFBS_IsLA64, // LDLE_H |
| 7995 | CEFBS_IsLA64, // LDLE_W |
| 7996 | CEFBS_IsLA64, // LDL_D |
| 7997 | CEFBS_None, // LDL_W |
| 7998 | CEFBS_None, // LDPTE |
| 7999 | CEFBS_IsLA64, // LDPTR_D |
| 8000 | CEFBS_IsLA64, // LDPTR_W |
| 8001 | CEFBS_IsLA64, // LDR_D |
| 8002 | CEFBS_None, // LDR_W |
| 8003 | CEFBS_IsLA64, // LDX_B |
| 8004 | CEFBS_IsLA64, // LDX_BU |
| 8005 | CEFBS_IsLA64, // LDX_D |
| 8006 | CEFBS_IsLA64, // LDX_H |
| 8007 | CEFBS_IsLA64, // LDX_HU |
| 8008 | CEFBS_IsLA64, // LDX_W |
| 8009 | CEFBS_IsLA64, // LDX_WU |
| 8010 | CEFBS_None, // LD_B |
| 8011 | CEFBS_None, // LD_BU |
| 8012 | CEFBS_IsLA64, // LD_D |
| 8013 | CEFBS_None, // LD_H |
| 8014 | CEFBS_None, // LD_HU |
| 8015 | CEFBS_None, // LD_W |
| 8016 | CEFBS_IsLA64, // LD_WU |
| 8017 | CEFBS_IsLA64, // LLACQ_D |
| 8018 | CEFBS_IsLA64, // LLACQ_W |
| 8019 | CEFBS_IsLA64, // LL_D |
| 8020 | CEFBS_None, // LL_W |
| 8021 | CEFBS_None, // LU12I_W |
| 8022 | CEFBS_IsLA64, // LU32I_D |
| 8023 | CEFBS_IsLA64, // LU52I_D |
| 8024 | CEFBS_None, // MASKEQZ |
| 8025 | CEFBS_None, // MASKNEZ |
| 8026 | CEFBS_IsLA64, // MOD_D |
| 8027 | CEFBS_IsLA64, // MOD_DU |
| 8028 | CEFBS_None, // MOD_W |
| 8029 | CEFBS_None, // MOD_WU |
| 8030 | CEFBS_None, // MOVCF2FR_xS |
| 8031 | CEFBS_None, // MOVCF2GR |
| 8032 | CEFBS_None, // MOVFCSR2GR |
| 8033 | CEFBS_None, // MOVFR2CF_xS |
| 8034 | CEFBS_IsLA64, // MOVFR2GR_D |
| 8035 | CEFBS_None, // MOVFR2GR_S |
| 8036 | CEFBS_None, // MOVFR2GR_S_64 |
| 8037 | CEFBS_None, // MOVFRH2GR_S |
| 8038 | CEFBS_None, // MOVGR2CF |
| 8039 | CEFBS_None, // MOVGR2FCSR |
| 8040 | CEFBS_None, // MOVGR2FRH_W |
| 8041 | CEFBS_IsLA64, // MOVGR2FR_D |
| 8042 | CEFBS_None, // MOVGR2FR_W |
| 8043 | CEFBS_IsLA32, // MOVGR2FR_W_64 |
| 8044 | CEFBS_None, // MOVGR2SCR |
| 8045 | CEFBS_None, // MOVSCR2GR |
| 8046 | CEFBS_IsLA64, // MULH_D |
| 8047 | CEFBS_IsLA64, // MULH_DU |
| 8048 | CEFBS_None, // MULH_W |
| 8049 | CEFBS_None, // MULH_WU |
| 8050 | CEFBS_IsLA64, // MULW_D_W |
| 8051 | CEFBS_IsLA64, // MULW_D_WU |
| 8052 | CEFBS_IsLA64, // MUL_D |
| 8053 | CEFBS_None, // MUL_W |
| 8054 | CEFBS_None, // NOR |
| 8055 | CEFBS_None, // OR |
| 8056 | CEFBS_None, // ORI |
| 8057 | CEFBS_None, // ORN |
| 8058 | CEFBS_None, // PCADDI |
| 8059 | CEFBS_None, // PCADDU12I |
| 8060 | CEFBS_IsLA64, // PCADDU18I |
| 8061 | CEFBS_None, // PCALAU12I |
| 8062 | CEFBS_None, // PRELD |
| 8063 | CEFBS_IsLA64, // PRELDX |
| 8064 | CEFBS_None, // RCRI_B |
| 8065 | CEFBS_IsLA64, // RCRI_D |
| 8066 | CEFBS_None, // RCRI_H |
| 8067 | CEFBS_None, // RCRI_W |
| 8068 | CEFBS_None, // RCR_B |
| 8069 | CEFBS_IsLA64, // RCR_D |
| 8070 | CEFBS_None, // RCR_H |
| 8071 | CEFBS_None, // RCR_W |
| 8072 | CEFBS_None, // RDTIMEH_W |
| 8073 | CEFBS_None, // RDTIMEL_W |
| 8074 | CEFBS_IsLA64, // RDTIME_D |
| 8075 | CEFBS_None, // REVB_2H |
| 8076 | CEFBS_IsLA64, // REVB_2W |
| 8077 | CEFBS_IsLA64, // REVB_4H |
| 8078 | CEFBS_IsLA64, // REVB_D |
| 8079 | CEFBS_IsLA64, // REVH_2W |
| 8080 | CEFBS_IsLA64, // REVH_D |
| 8081 | CEFBS_None, // ROTRI_B |
| 8082 | CEFBS_IsLA64, // ROTRI_D |
| 8083 | CEFBS_None, // ROTRI_H |
| 8084 | CEFBS_None, // ROTRI_W |
| 8085 | CEFBS_None, // ROTR_B |
| 8086 | CEFBS_IsLA64, // ROTR_D |
| 8087 | CEFBS_None, // ROTR_H |
| 8088 | CEFBS_None, // ROTR_W |
| 8089 | CEFBS_None, // SBC_B |
| 8090 | CEFBS_IsLA64, // SBC_D |
| 8091 | CEFBS_None, // SBC_H |
| 8092 | CEFBS_None, // SBC_W |
| 8093 | CEFBS_IsLA64, // SCREL_D |
| 8094 | CEFBS_IsLA64, // SCREL_W |
| 8095 | CEFBS_IsLA64, // SC_D |
| 8096 | CEFBS_IsLA64, // SC_Q |
| 8097 | CEFBS_None, // SC_W |
| 8098 | CEFBS_None, // SETARMJ |
| 8099 | CEFBS_None, // SETX86J |
| 8100 | CEFBS_None, // SETX86LOOPE |
| 8101 | CEFBS_None, // SETX86LOOPNE |
| 8102 | CEFBS_None, // SET_CFR_FALSE |
| 8103 | CEFBS_None, // SET_CFR_TRUE |
| 8104 | CEFBS_IsLA64, // SLLI_D |
| 8105 | CEFBS_None, // SLLI_W |
| 8106 | CEFBS_IsLA64, // SLL_D |
| 8107 | CEFBS_None, // SLL_W |
| 8108 | CEFBS_None, // SLT |
| 8109 | CEFBS_None, // SLTI |
| 8110 | CEFBS_None, // SLTU |
| 8111 | CEFBS_None, // SLTUI |
| 8112 | CEFBS_IsLA64, // SRAI_D |
| 8113 | CEFBS_None, // SRAI_W |
| 8114 | CEFBS_IsLA64, // SRA_D |
| 8115 | CEFBS_None, // SRA_W |
| 8116 | CEFBS_IsLA64, // SRLI_D |
| 8117 | CEFBS_None, // SRLI_W |
| 8118 | CEFBS_IsLA64, // SRL_D |
| 8119 | CEFBS_None, // SRL_W |
| 8120 | CEFBS_IsLA64, // STGT_B |
| 8121 | CEFBS_IsLA64, // STGT_D |
| 8122 | CEFBS_IsLA64, // STGT_H |
| 8123 | CEFBS_IsLA64, // STGT_W |
| 8124 | CEFBS_IsLA64, // STLE_B |
| 8125 | CEFBS_IsLA64, // STLE_D |
| 8126 | CEFBS_IsLA64, // STLE_H |
| 8127 | CEFBS_IsLA64, // STLE_W |
| 8128 | CEFBS_IsLA64, // STL_D |
| 8129 | CEFBS_None, // STL_W |
| 8130 | CEFBS_IsLA64, // STPTR_D |
| 8131 | CEFBS_IsLA64, // STPTR_W |
| 8132 | CEFBS_IsLA64, // STR_D |
| 8133 | CEFBS_None, // STR_W |
| 8134 | CEFBS_IsLA64, // STX_B |
| 8135 | CEFBS_IsLA64, // STX_D |
| 8136 | CEFBS_IsLA64, // STX_H |
| 8137 | CEFBS_IsLA64, // STX_W |
| 8138 | CEFBS_None, // ST_B |
| 8139 | CEFBS_IsLA64, // ST_D |
| 8140 | CEFBS_None, // ST_H |
| 8141 | CEFBS_None, // ST_W |
| 8142 | CEFBS_IsLA64, // SUB_D |
| 8143 | CEFBS_None, // SUB_W |
| 8144 | CEFBS_None, // SYSCALL |
| 8145 | CEFBS_None, // TLBCLR |
| 8146 | CEFBS_None, // TLBFILL |
| 8147 | CEFBS_None, // TLBFLUSH |
| 8148 | CEFBS_None, // TLBRD |
| 8149 | CEFBS_None, // TLBSRCH |
| 8150 | CEFBS_None, // TLBWR |
| 8151 | CEFBS_None, // UD |
| 8152 | CEFBS_None, // VABSD_B |
| 8153 | CEFBS_None, // VABSD_BU |
| 8154 | CEFBS_None, // VABSD_D |
| 8155 | CEFBS_None, // VABSD_DU |
| 8156 | CEFBS_None, // VABSD_H |
| 8157 | CEFBS_None, // VABSD_HU |
| 8158 | CEFBS_None, // VABSD_W |
| 8159 | CEFBS_None, // VABSD_WU |
| 8160 | CEFBS_None, // VADDA_B |
| 8161 | CEFBS_None, // VADDA_D |
| 8162 | CEFBS_None, // VADDA_H |
| 8163 | CEFBS_None, // VADDA_W |
| 8164 | CEFBS_None, // VADDI_BU |
| 8165 | CEFBS_None, // VADDI_DU |
| 8166 | CEFBS_None, // VADDI_HU |
| 8167 | CEFBS_None, // VADDI_WU |
| 8168 | CEFBS_None, // VADDWEV_D_W |
| 8169 | CEFBS_None, // VADDWEV_D_WU |
| 8170 | CEFBS_None, // VADDWEV_D_WU_W |
| 8171 | CEFBS_None, // VADDWEV_H_B |
| 8172 | CEFBS_None, // VADDWEV_H_BU |
| 8173 | CEFBS_None, // VADDWEV_H_BU_B |
| 8174 | CEFBS_None, // VADDWEV_Q_D |
| 8175 | CEFBS_None, // VADDWEV_Q_DU |
| 8176 | CEFBS_None, // VADDWEV_Q_DU_D |
| 8177 | CEFBS_None, // VADDWEV_W_H |
| 8178 | CEFBS_None, // VADDWEV_W_HU |
| 8179 | CEFBS_None, // VADDWEV_W_HU_H |
| 8180 | CEFBS_None, // VADDWOD_D_W |
| 8181 | CEFBS_None, // VADDWOD_D_WU |
| 8182 | CEFBS_None, // VADDWOD_D_WU_W |
| 8183 | CEFBS_None, // VADDWOD_H_B |
| 8184 | CEFBS_None, // VADDWOD_H_BU |
| 8185 | CEFBS_None, // VADDWOD_H_BU_B |
| 8186 | CEFBS_None, // VADDWOD_Q_D |
| 8187 | CEFBS_None, // VADDWOD_Q_DU |
| 8188 | CEFBS_None, // VADDWOD_Q_DU_D |
| 8189 | CEFBS_None, // VADDWOD_W_H |
| 8190 | CEFBS_None, // VADDWOD_W_HU |
| 8191 | CEFBS_None, // VADDWOD_W_HU_H |
| 8192 | CEFBS_None, // VADD_B |
| 8193 | CEFBS_None, // VADD_D |
| 8194 | CEFBS_None, // VADD_H |
| 8195 | CEFBS_None, // VADD_Q |
| 8196 | CEFBS_None, // VADD_W |
| 8197 | CEFBS_None, // VANDI_B |
| 8198 | CEFBS_None, // VANDN_V |
| 8199 | CEFBS_None, // VAND_V |
| 8200 | CEFBS_None, // VAVGR_B |
| 8201 | CEFBS_None, // VAVGR_BU |
| 8202 | CEFBS_None, // VAVGR_D |
| 8203 | CEFBS_None, // VAVGR_DU |
| 8204 | CEFBS_None, // VAVGR_H |
| 8205 | CEFBS_None, // VAVGR_HU |
| 8206 | CEFBS_None, // VAVGR_W |
| 8207 | CEFBS_None, // VAVGR_WU |
| 8208 | CEFBS_None, // VAVG_B |
| 8209 | CEFBS_None, // VAVG_BU |
| 8210 | CEFBS_None, // VAVG_D |
| 8211 | CEFBS_None, // VAVG_DU |
| 8212 | CEFBS_None, // VAVG_H |
| 8213 | CEFBS_None, // VAVG_HU |
| 8214 | CEFBS_None, // VAVG_W |
| 8215 | CEFBS_None, // VAVG_WU |
| 8216 | CEFBS_None, // VBITCLRI_B |
| 8217 | CEFBS_None, // VBITCLRI_D |
| 8218 | CEFBS_None, // VBITCLRI_H |
| 8219 | CEFBS_None, // VBITCLRI_W |
| 8220 | CEFBS_None, // VBITCLR_B |
| 8221 | CEFBS_None, // VBITCLR_D |
| 8222 | CEFBS_None, // VBITCLR_H |
| 8223 | CEFBS_None, // VBITCLR_W |
| 8224 | CEFBS_None, // VBITREVI_B |
| 8225 | CEFBS_None, // VBITREVI_D |
| 8226 | CEFBS_None, // VBITREVI_H |
| 8227 | CEFBS_None, // VBITREVI_W |
| 8228 | CEFBS_None, // VBITREV_B |
| 8229 | CEFBS_None, // VBITREV_D |
| 8230 | CEFBS_None, // VBITREV_H |
| 8231 | CEFBS_None, // VBITREV_W |
| 8232 | CEFBS_None, // VBITSELI_B |
| 8233 | CEFBS_None, // VBITSEL_V |
| 8234 | CEFBS_None, // VBITSETI_B |
| 8235 | CEFBS_None, // VBITSETI_D |
| 8236 | CEFBS_None, // VBITSETI_H |
| 8237 | CEFBS_None, // VBITSETI_W |
| 8238 | CEFBS_None, // VBITSET_B |
| 8239 | CEFBS_None, // VBITSET_D |
| 8240 | CEFBS_None, // VBITSET_H |
| 8241 | CEFBS_None, // VBITSET_W |
| 8242 | CEFBS_None, // VBSLL_V |
| 8243 | CEFBS_None, // VBSRL_V |
| 8244 | CEFBS_None, // VCLO_B |
| 8245 | CEFBS_None, // VCLO_D |
| 8246 | CEFBS_None, // VCLO_H |
| 8247 | CEFBS_None, // VCLO_W |
| 8248 | CEFBS_None, // VCLZ_B |
| 8249 | CEFBS_None, // VCLZ_D |
| 8250 | CEFBS_None, // VCLZ_H |
| 8251 | CEFBS_None, // VCLZ_W |
| 8252 | CEFBS_None, // VDIV_B |
| 8253 | CEFBS_None, // VDIV_BU |
| 8254 | CEFBS_None, // VDIV_D |
| 8255 | CEFBS_None, // VDIV_DU |
| 8256 | CEFBS_None, // VDIV_H |
| 8257 | CEFBS_None, // VDIV_HU |
| 8258 | CEFBS_None, // VDIV_W |
| 8259 | CEFBS_None, // VDIV_WU |
| 8260 | CEFBS_None, // VEXT2XV_DU_BU |
| 8261 | CEFBS_None, // VEXT2XV_DU_HU |
| 8262 | CEFBS_None, // VEXT2XV_DU_WU |
| 8263 | CEFBS_None, // VEXT2XV_D_B |
| 8264 | CEFBS_None, // VEXT2XV_D_H |
| 8265 | CEFBS_None, // VEXT2XV_D_W |
| 8266 | CEFBS_None, // VEXT2XV_HU_BU |
| 8267 | CEFBS_None, // VEXT2XV_H_B |
| 8268 | CEFBS_None, // VEXT2XV_WU_BU |
| 8269 | CEFBS_None, // VEXT2XV_WU_HU |
| 8270 | CEFBS_None, // VEXT2XV_W_B |
| 8271 | CEFBS_None, // VEXT2XV_W_H |
| 8272 | CEFBS_None, // VEXTH_DU_WU |
| 8273 | CEFBS_None, // VEXTH_D_W |
| 8274 | CEFBS_None, // VEXTH_HU_BU |
| 8275 | CEFBS_None, // VEXTH_H_B |
| 8276 | CEFBS_None, // VEXTH_QU_DU |
| 8277 | CEFBS_None, // VEXTH_Q_D |
| 8278 | CEFBS_None, // VEXTH_WU_HU |
| 8279 | CEFBS_None, // VEXTH_W_H |
| 8280 | CEFBS_None, // VEXTL_QU_DU |
| 8281 | CEFBS_None, // VEXTL_Q_D |
| 8282 | CEFBS_None, // VEXTRINS_B |
| 8283 | CEFBS_None, // VEXTRINS_D |
| 8284 | CEFBS_None, // VEXTRINS_H |
| 8285 | CEFBS_None, // VEXTRINS_W |
| 8286 | CEFBS_None, // VFADD_D |
| 8287 | CEFBS_None, // VFADD_S |
| 8288 | CEFBS_None, // VFCLASS_D |
| 8289 | CEFBS_None, // VFCLASS_S |
| 8290 | CEFBS_None, // VFCMP_CAF_D |
| 8291 | CEFBS_None, // VFCMP_CAF_S |
| 8292 | CEFBS_None, // VFCMP_CEQ_D |
| 8293 | CEFBS_None, // VFCMP_CEQ_S |
| 8294 | CEFBS_None, // VFCMP_CLE_D |
| 8295 | CEFBS_None, // VFCMP_CLE_S |
| 8296 | CEFBS_None, // VFCMP_CLT_D |
| 8297 | CEFBS_None, // VFCMP_CLT_S |
| 8298 | CEFBS_None, // VFCMP_CNE_D |
| 8299 | CEFBS_None, // VFCMP_CNE_S |
| 8300 | CEFBS_None, // VFCMP_COR_D |
| 8301 | CEFBS_None, // VFCMP_COR_S |
| 8302 | CEFBS_None, // VFCMP_CUEQ_D |
| 8303 | CEFBS_None, // VFCMP_CUEQ_S |
| 8304 | CEFBS_None, // VFCMP_CULE_D |
| 8305 | CEFBS_None, // VFCMP_CULE_S |
| 8306 | CEFBS_None, // VFCMP_CULT_D |
| 8307 | CEFBS_None, // VFCMP_CULT_S |
| 8308 | CEFBS_None, // VFCMP_CUNE_D |
| 8309 | CEFBS_None, // VFCMP_CUNE_S |
| 8310 | CEFBS_None, // VFCMP_CUN_D |
| 8311 | CEFBS_None, // VFCMP_CUN_S |
| 8312 | CEFBS_None, // VFCMP_SAF_D |
| 8313 | CEFBS_None, // VFCMP_SAF_S |
| 8314 | CEFBS_None, // VFCMP_SEQ_D |
| 8315 | CEFBS_None, // VFCMP_SEQ_S |
| 8316 | CEFBS_None, // VFCMP_SLE_D |
| 8317 | CEFBS_None, // VFCMP_SLE_S |
| 8318 | CEFBS_None, // VFCMP_SLT_D |
| 8319 | CEFBS_None, // VFCMP_SLT_S |
| 8320 | CEFBS_None, // VFCMP_SNE_D |
| 8321 | CEFBS_None, // VFCMP_SNE_S |
| 8322 | CEFBS_None, // VFCMP_SOR_D |
| 8323 | CEFBS_None, // VFCMP_SOR_S |
| 8324 | CEFBS_None, // VFCMP_SUEQ_D |
| 8325 | CEFBS_None, // VFCMP_SUEQ_S |
| 8326 | CEFBS_None, // VFCMP_SULE_D |
| 8327 | CEFBS_None, // VFCMP_SULE_S |
| 8328 | CEFBS_None, // VFCMP_SULT_D |
| 8329 | CEFBS_None, // VFCMP_SULT_S |
| 8330 | CEFBS_None, // VFCMP_SUNE_D |
| 8331 | CEFBS_None, // VFCMP_SUNE_S |
| 8332 | CEFBS_None, // VFCMP_SUN_D |
| 8333 | CEFBS_None, // VFCMP_SUN_S |
| 8334 | CEFBS_None, // VFCVTH_D_S |
| 8335 | CEFBS_None, // VFCVTH_S_H |
| 8336 | CEFBS_None, // VFCVTL_D_S |
| 8337 | CEFBS_None, // VFCVTL_S_H |
| 8338 | CEFBS_None, // VFCVT_H_S |
| 8339 | CEFBS_None, // VFCVT_S_D |
| 8340 | CEFBS_None, // VFDIV_D |
| 8341 | CEFBS_None, // VFDIV_S |
| 8342 | CEFBS_None, // VFFINTH_D_W |
| 8343 | CEFBS_None, // VFFINTL_D_W |
| 8344 | CEFBS_None, // VFFINT_D_L |
| 8345 | CEFBS_None, // VFFINT_D_LU |
| 8346 | CEFBS_None, // VFFINT_S_L |
| 8347 | CEFBS_None, // VFFINT_S_W |
| 8348 | CEFBS_None, // VFFINT_S_WU |
| 8349 | CEFBS_None, // VFLOGB_D |
| 8350 | CEFBS_None, // VFLOGB_S |
| 8351 | CEFBS_None, // VFMADD_D |
| 8352 | CEFBS_None, // VFMADD_S |
| 8353 | CEFBS_None, // VFMAXA_D |
| 8354 | CEFBS_None, // VFMAXA_S |
| 8355 | CEFBS_None, // VFMAX_D |
| 8356 | CEFBS_None, // VFMAX_S |
| 8357 | CEFBS_None, // VFMINA_D |
| 8358 | CEFBS_None, // VFMINA_S |
| 8359 | CEFBS_None, // VFMIN_D |
| 8360 | CEFBS_None, // VFMIN_S |
| 8361 | CEFBS_None, // VFMSUB_D |
| 8362 | CEFBS_None, // VFMSUB_S |
| 8363 | CEFBS_None, // VFMUL_D |
| 8364 | CEFBS_None, // VFMUL_S |
| 8365 | CEFBS_None, // VFNMADD_D |
| 8366 | CEFBS_None, // VFNMADD_S |
| 8367 | CEFBS_None, // VFNMSUB_D |
| 8368 | CEFBS_None, // VFNMSUB_S |
| 8369 | CEFBS_None, // VFRECIPE_D |
| 8370 | CEFBS_None, // VFRECIPE_S |
| 8371 | CEFBS_None, // VFRECIP_D |
| 8372 | CEFBS_None, // VFRECIP_S |
| 8373 | CEFBS_None, // VFRINTRM_D |
| 8374 | CEFBS_None, // VFRINTRM_S |
| 8375 | CEFBS_None, // VFRINTRNE_D |
| 8376 | CEFBS_None, // VFRINTRNE_S |
| 8377 | CEFBS_None, // VFRINTRP_D |
| 8378 | CEFBS_None, // VFRINTRP_S |
| 8379 | CEFBS_None, // VFRINTRZ_D |
| 8380 | CEFBS_None, // VFRINTRZ_S |
| 8381 | CEFBS_None, // VFRINT_D |
| 8382 | CEFBS_None, // VFRINT_S |
| 8383 | CEFBS_None, // VFRSQRTE_D |
| 8384 | CEFBS_None, // VFRSQRTE_S |
| 8385 | CEFBS_None, // VFRSQRT_D |
| 8386 | CEFBS_None, // VFRSQRT_S |
| 8387 | CEFBS_None, // VFRSTPI_B |
| 8388 | CEFBS_None, // VFRSTPI_H |
| 8389 | CEFBS_None, // VFRSTP_B |
| 8390 | CEFBS_None, // VFRSTP_H |
| 8391 | CEFBS_None, // VFSQRT_D |
| 8392 | CEFBS_None, // VFSQRT_S |
| 8393 | CEFBS_None, // VFSUB_D |
| 8394 | CEFBS_None, // VFSUB_S |
| 8395 | CEFBS_None, // VFTINTH_L_S |
| 8396 | CEFBS_None, // VFTINTL_L_S |
| 8397 | CEFBS_None, // VFTINTRMH_L_S |
| 8398 | CEFBS_None, // VFTINTRML_L_S |
| 8399 | CEFBS_None, // VFTINTRM_L_D |
| 8400 | CEFBS_None, // VFTINTRM_W_D |
| 8401 | CEFBS_None, // VFTINTRM_W_S |
| 8402 | CEFBS_None, // VFTINTRNEH_L_S |
| 8403 | CEFBS_None, // VFTINTRNEL_L_S |
| 8404 | CEFBS_None, // VFTINTRNE_L_D |
| 8405 | CEFBS_None, // VFTINTRNE_W_D |
| 8406 | CEFBS_None, // VFTINTRNE_W_S |
| 8407 | CEFBS_None, // VFTINTRPH_L_S |
| 8408 | CEFBS_None, // VFTINTRPL_L_S |
| 8409 | CEFBS_None, // VFTINTRP_L_D |
| 8410 | CEFBS_None, // VFTINTRP_W_D |
| 8411 | CEFBS_None, // VFTINTRP_W_S |
| 8412 | CEFBS_None, // VFTINTRZH_L_S |
| 8413 | CEFBS_None, // VFTINTRZL_L_S |
| 8414 | CEFBS_None, // VFTINTRZ_LU_D |
| 8415 | CEFBS_None, // VFTINTRZ_L_D |
| 8416 | CEFBS_None, // VFTINTRZ_WU_S |
| 8417 | CEFBS_None, // VFTINTRZ_W_D |
| 8418 | CEFBS_None, // VFTINTRZ_W_S |
| 8419 | CEFBS_None, // VFTINT_LU_D |
| 8420 | CEFBS_None, // VFTINT_L_D |
| 8421 | CEFBS_None, // VFTINT_WU_S |
| 8422 | CEFBS_None, // VFTINT_W_D |
| 8423 | CEFBS_None, // VFTINT_W_S |
| 8424 | CEFBS_None, // VHADDW_DU_WU |
| 8425 | CEFBS_None, // VHADDW_D_W |
| 8426 | CEFBS_None, // VHADDW_HU_BU |
| 8427 | CEFBS_None, // VHADDW_H_B |
| 8428 | CEFBS_None, // VHADDW_QU_DU |
| 8429 | CEFBS_None, // VHADDW_Q_D |
| 8430 | CEFBS_None, // VHADDW_WU_HU |
| 8431 | CEFBS_None, // VHADDW_W_H |
| 8432 | CEFBS_None, // VHSUBW_DU_WU |
| 8433 | CEFBS_None, // VHSUBW_D_W |
| 8434 | CEFBS_None, // VHSUBW_HU_BU |
| 8435 | CEFBS_None, // VHSUBW_H_B |
| 8436 | CEFBS_None, // VHSUBW_QU_DU |
| 8437 | CEFBS_None, // VHSUBW_Q_D |
| 8438 | CEFBS_None, // VHSUBW_WU_HU |
| 8439 | CEFBS_None, // VHSUBW_W_H |
| 8440 | CEFBS_None, // VILVH_B |
| 8441 | CEFBS_None, // VILVH_D |
| 8442 | CEFBS_None, // VILVH_H |
| 8443 | CEFBS_None, // VILVH_W |
| 8444 | CEFBS_None, // VILVL_B |
| 8445 | CEFBS_None, // VILVL_D |
| 8446 | CEFBS_None, // VILVL_H |
| 8447 | CEFBS_None, // VILVL_W |
| 8448 | CEFBS_None, // VINSGR2VR_B |
| 8449 | CEFBS_None, // VINSGR2VR_D |
| 8450 | CEFBS_None, // VINSGR2VR_H |
| 8451 | CEFBS_None, // VINSGR2VR_W |
| 8452 | CEFBS_None, // VLD |
| 8453 | CEFBS_None, // VLDI |
| 8454 | CEFBS_None, // VLDREPL_B |
| 8455 | CEFBS_None, // VLDREPL_D |
| 8456 | CEFBS_None, // VLDREPL_H |
| 8457 | CEFBS_None, // VLDREPL_W |
| 8458 | CEFBS_None, // VLDX |
| 8459 | CEFBS_None, // VMADDWEV_D_W |
| 8460 | CEFBS_None, // VMADDWEV_D_WU |
| 8461 | CEFBS_None, // VMADDWEV_D_WU_W |
| 8462 | CEFBS_None, // VMADDWEV_H_B |
| 8463 | CEFBS_None, // VMADDWEV_H_BU |
| 8464 | CEFBS_None, // VMADDWEV_H_BU_B |
| 8465 | CEFBS_None, // VMADDWEV_Q_D |
| 8466 | CEFBS_None, // VMADDWEV_Q_DU |
| 8467 | CEFBS_None, // VMADDWEV_Q_DU_D |
| 8468 | CEFBS_None, // VMADDWEV_W_H |
| 8469 | CEFBS_None, // VMADDWEV_W_HU |
| 8470 | CEFBS_None, // VMADDWEV_W_HU_H |
| 8471 | CEFBS_None, // VMADDWOD_D_W |
| 8472 | CEFBS_None, // VMADDWOD_D_WU |
| 8473 | CEFBS_None, // VMADDWOD_D_WU_W |
| 8474 | CEFBS_None, // VMADDWOD_H_B |
| 8475 | CEFBS_None, // VMADDWOD_H_BU |
| 8476 | CEFBS_None, // VMADDWOD_H_BU_B |
| 8477 | CEFBS_None, // VMADDWOD_Q_D |
| 8478 | CEFBS_None, // VMADDWOD_Q_DU |
| 8479 | CEFBS_None, // VMADDWOD_Q_DU_D |
| 8480 | CEFBS_None, // VMADDWOD_W_H |
| 8481 | CEFBS_None, // VMADDWOD_W_HU |
| 8482 | CEFBS_None, // VMADDWOD_W_HU_H |
| 8483 | CEFBS_None, // VMADD_B |
| 8484 | CEFBS_None, // VMADD_D |
| 8485 | CEFBS_None, // VMADD_H |
| 8486 | CEFBS_None, // VMADD_W |
| 8487 | CEFBS_None, // VMAXI_B |
| 8488 | CEFBS_None, // VMAXI_BU |
| 8489 | CEFBS_None, // VMAXI_D |
| 8490 | CEFBS_None, // VMAXI_DU |
| 8491 | CEFBS_None, // VMAXI_H |
| 8492 | CEFBS_None, // VMAXI_HU |
| 8493 | CEFBS_None, // VMAXI_W |
| 8494 | CEFBS_None, // VMAXI_WU |
| 8495 | CEFBS_None, // VMAX_B |
| 8496 | CEFBS_None, // VMAX_BU |
| 8497 | CEFBS_None, // VMAX_D |
| 8498 | CEFBS_None, // VMAX_DU |
| 8499 | CEFBS_None, // VMAX_H |
| 8500 | CEFBS_None, // VMAX_HU |
| 8501 | CEFBS_None, // VMAX_W |
| 8502 | CEFBS_None, // VMAX_WU |
| 8503 | CEFBS_None, // VMINI_B |
| 8504 | CEFBS_None, // VMINI_BU |
| 8505 | CEFBS_None, // VMINI_D |
| 8506 | CEFBS_None, // VMINI_DU |
| 8507 | CEFBS_None, // VMINI_H |
| 8508 | CEFBS_None, // VMINI_HU |
| 8509 | CEFBS_None, // VMINI_W |
| 8510 | CEFBS_None, // VMINI_WU |
| 8511 | CEFBS_None, // VMIN_B |
| 8512 | CEFBS_None, // VMIN_BU |
| 8513 | CEFBS_None, // VMIN_D |
| 8514 | CEFBS_None, // VMIN_DU |
| 8515 | CEFBS_None, // VMIN_H |
| 8516 | CEFBS_None, // VMIN_HU |
| 8517 | CEFBS_None, // VMIN_W |
| 8518 | CEFBS_None, // VMIN_WU |
| 8519 | CEFBS_None, // VMOD_B |
| 8520 | CEFBS_None, // VMOD_BU |
| 8521 | CEFBS_None, // VMOD_D |
| 8522 | CEFBS_None, // VMOD_DU |
| 8523 | CEFBS_None, // VMOD_H |
| 8524 | CEFBS_None, // VMOD_HU |
| 8525 | CEFBS_None, // VMOD_W |
| 8526 | CEFBS_None, // VMOD_WU |
| 8527 | CEFBS_None, // VMSKGEZ_B |
| 8528 | CEFBS_None, // VMSKLTZ_B |
| 8529 | CEFBS_None, // VMSKLTZ_D |
| 8530 | CEFBS_None, // VMSKLTZ_H |
| 8531 | CEFBS_None, // VMSKLTZ_W |
| 8532 | CEFBS_None, // VMSKNZ_B |
| 8533 | CEFBS_None, // VMSUB_B |
| 8534 | CEFBS_None, // VMSUB_D |
| 8535 | CEFBS_None, // VMSUB_H |
| 8536 | CEFBS_None, // VMSUB_W |
| 8537 | CEFBS_None, // VMUH_B |
| 8538 | CEFBS_None, // VMUH_BU |
| 8539 | CEFBS_None, // VMUH_D |
| 8540 | CEFBS_None, // VMUH_DU |
| 8541 | CEFBS_None, // VMUH_H |
| 8542 | CEFBS_None, // VMUH_HU |
| 8543 | CEFBS_None, // VMUH_W |
| 8544 | CEFBS_None, // VMUH_WU |
| 8545 | CEFBS_None, // VMULWEV_D_W |
| 8546 | CEFBS_None, // VMULWEV_D_WU |
| 8547 | CEFBS_None, // VMULWEV_D_WU_W |
| 8548 | CEFBS_None, // VMULWEV_H_B |
| 8549 | CEFBS_None, // VMULWEV_H_BU |
| 8550 | CEFBS_None, // VMULWEV_H_BU_B |
| 8551 | CEFBS_None, // VMULWEV_Q_D |
| 8552 | CEFBS_None, // VMULWEV_Q_DU |
| 8553 | CEFBS_None, // VMULWEV_Q_DU_D |
| 8554 | CEFBS_None, // VMULWEV_W_H |
| 8555 | CEFBS_None, // VMULWEV_W_HU |
| 8556 | CEFBS_None, // VMULWEV_W_HU_H |
| 8557 | CEFBS_None, // VMULWOD_D_W |
| 8558 | CEFBS_None, // VMULWOD_D_WU |
| 8559 | CEFBS_None, // VMULWOD_D_WU_W |
| 8560 | CEFBS_None, // VMULWOD_H_B |
| 8561 | CEFBS_None, // VMULWOD_H_BU |
| 8562 | CEFBS_None, // VMULWOD_H_BU_B |
| 8563 | CEFBS_None, // VMULWOD_Q_D |
| 8564 | CEFBS_None, // VMULWOD_Q_DU |
| 8565 | CEFBS_None, // VMULWOD_Q_DU_D |
| 8566 | CEFBS_None, // VMULWOD_W_H |
| 8567 | CEFBS_None, // VMULWOD_W_HU |
| 8568 | CEFBS_None, // VMULWOD_W_HU_H |
| 8569 | CEFBS_None, // VMUL_B |
| 8570 | CEFBS_None, // VMUL_D |
| 8571 | CEFBS_None, // VMUL_H |
| 8572 | CEFBS_None, // VMUL_W |
| 8573 | CEFBS_None, // VNEG_B |
| 8574 | CEFBS_None, // VNEG_D |
| 8575 | CEFBS_None, // VNEG_H |
| 8576 | CEFBS_None, // VNEG_W |
| 8577 | CEFBS_None, // VNORI_B |
| 8578 | CEFBS_None, // VNOR_V |
| 8579 | CEFBS_None, // VORI_B |
| 8580 | CEFBS_None, // VORN_V |
| 8581 | CEFBS_None, // VOR_V |
| 8582 | CEFBS_None, // VPACKEV_B |
| 8583 | CEFBS_None, // VPACKEV_D |
| 8584 | CEFBS_None, // VPACKEV_H |
| 8585 | CEFBS_None, // VPACKEV_W |
| 8586 | CEFBS_None, // VPACKOD_B |
| 8587 | CEFBS_None, // VPACKOD_D |
| 8588 | CEFBS_None, // VPACKOD_H |
| 8589 | CEFBS_None, // VPACKOD_W |
| 8590 | CEFBS_None, // VPCNT_B |
| 8591 | CEFBS_None, // VPCNT_D |
| 8592 | CEFBS_None, // VPCNT_H |
| 8593 | CEFBS_None, // VPCNT_W |
| 8594 | CEFBS_None, // VPERMI_W |
| 8595 | CEFBS_None, // VPICKEV_B |
| 8596 | CEFBS_None, // VPICKEV_D |
| 8597 | CEFBS_None, // VPICKEV_H |
| 8598 | CEFBS_None, // VPICKEV_W |
| 8599 | CEFBS_None, // VPICKOD_B |
| 8600 | CEFBS_None, // VPICKOD_D |
| 8601 | CEFBS_None, // VPICKOD_H |
| 8602 | CEFBS_None, // VPICKOD_W |
| 8603 | CEFBS_None, // VPICKVE2GR_B |
| 8604 | CEFBS_None, // VPICKVE2GR_BU |
| 8605 | CEFBS_None, // VPICKVE2GR_D |
| 8606 | CEFBS_None, // VPICKVE2GR_DU |
| 8607 | CEFBS_None, // VPICKVE2GR_H |
| 8608 | CEFBS_None, // VPICKVE2GR_HU |
| 8609 | CEFBS_None, // VPICKVE2GR_W |
| 8610 | CEFBS_None, // VPICKVE2GR_WU |
| 8611 | CEFBS_None, // VREPLGR2VR_B |
| 8612 | CEFBS_None, // VREPLGR2VR_D |
| 8613 | CEFBS_None, // VREPLGR2VR_H |
| 8614 | CEFBS_None, // VREPLGR2VR_W |
| 8615 | CEFBS_None, // VREPLVEI_B |
| 8616 | CEFBS_None, // VREPLVEI_D |
| 8617 | CEFBS_None, // VREPLVEI_H |
| 8618 | CEFBS_None, // VREPLVEI_W |
| 8619 | CEFBS_None, // VREPLVE_B |
| 8620 | CEFBS_None, // VREPLVE_D |
| 8621 | CEFBS_None, // VREPLVE_H |
| 8622 | CEFBS_None, // VREPLVE_W |
| 8623 | CEFBS_None, // VROTRI_B |
| 8624 | CEFBS_None, // VROTRI_D |
| 8625 | CEFBS_None, // VROTRI_H |
| 8626 | CEFBS_None, // VROTRI_W |
| 8627 | CEFBS_None, // VROTR_B |
| 8628 | CEFBS_None, // VROTR_D |
| 8629 | CEFBS_None, // VROTR_H |
| 8630 | CEFBS_None, // VROTR_W |
| 8631 | CEFBS_None, // VSADD_B |
| 8632 | CEFBS_None, // VSADD_BU |
| 8633 | CEFBS_None, // VSADD_D |
| 8634 | CEFBS_None, // VSADD_DU |
| 8635 | CEFBS_None, // VSADD_H |
| 8636 | CEFBS_None, // VSADD_HU |
| 8637 | CEFBS_None, // VSADD_W |
| 8638 | CEFBS_None, // VSADD_WU |
| 8639 | CEFBS_None, // VSAT_B |
| 8640 | CEFBS_None, // VSAT_BU |
| 8641 | CEFBS_None, // VSAT_D |
| 8642 | CEFBS_None, // VSAT_DU |
| 8643 | CEFBS_None, // VSAT_H |
| 8644 | CEFBS_None, // VSAT_HU |
| 8645 | CEFBS_None, // VSAT_W |
| 8646 | CEFBS_None, // VSAT_WU |
| 8647 | CEFBS_None, // VSEQI_B |
| 8648 | CEFBS_None, // VSEQI_D |
| 8649 | CEFBS_None, // VSEQI_H |
| 8650 | CEFBS_None, // VSEQI_W |
| 8651 | CEFBS_None, // VSEQ_B |
| 8652 | CEFBS_None, // VSEQ_D |
| 8653 | CEFBS_None, // VSEQ_H |
| 8654 | CEFBS_None, // VSEQ_W |
| 8655 | CEFBS_None, // VSETALLNEZ_B |
| 8656 | CEFBS_None, // VSETALLNEZ_D |
| 8657 | CEFBS_None, // VSETALLNEZ_H |
| 8658 | CEFBS_None, // VSETALLNEZ_W |
| 8659 | CEFBS_None, // VSETANYEQZ_B |
| 8660 | CEFBS_None, // VSETANYEQZ_D |
| 8661 | CEFBS_None, // VSETANYEQZ_H |
| 8662 | CEFBS_None, // VSETANYEQZ_W |
| 8663 | CEFBS_None, // VSETEQZ_V |
| 8664 | CEFBS_None, // VSETNEZ_V |
| 8665 | CEFBS_None, // VSHUF4I_B |
| 8666 | CEFBS_None, // VSHUF4I_D |
| 8667 | CEFBS_None, // VSHUF4I_H |
| 8668 | CEFBS_None, // VSHUF4I_W |
| 8669 | CEFBS_None, // VSHUF_B |
| 8670 | CEFBS_None, // VSHUF_D |
| 8671 | CEFBS_None, // VSHUF_H |
| 8672 | CEFBS_None, // VSHUF_W |
| 8673 | CEFBS_None, // VSIGNCOV_B |
| 8674 | CEFBS_None, // VSIGNCOV_D |
| 8675 | CEFBS_None, // VSIGNCOV_H |
| 8676 | CEFBS_None, // VSIGNCOV_W |
| 8677 | CEFBS_None, // VSLEI_B |
| 8678 | CEFBS_None, // VSLEI_BU |
| 8679 | CEFBS_None, // VSLEI_D |
| 8680 | CEFBS_None, // VSLEI_DU |
| 8681 | CEFBS_None, // VSLEI_H |
| 8682 | CEFBS_None, // VSLEI_HU |
| 8683 | CEFBS_None, // VSLEI_W |
| 8684 | CEFBS_None, // VSLEI_WU |
| 8685 | CEFBS_None, // VSLE_B |
| 8686 | CEFBS_None, // VSLE_BU |
| 8687 | CEFBS_None, // VSLE_D |
| 8688 | CEFBS_None, // VSLE_DU |
| 8689 | CEFBS_None, // VSLE_H |
| 8690 | CEFBS_None, // VSLE_HU |
| 8691 | CEFBS_None, // VSLE_W |
| 8692 | CEFBS_None, // VSLE_WU |
| 8693 | CEFBS_None, // VSLLI_B |
| 8694 | CEFBS_None, // VSLLI_D |
| 8695 | CEFBS_None, // VSLLI_H |
| 8696 | CEFBS_None, // VSLLI_W |
| 8697 | CEFBS_None, // VSLLWIL_DU_WU |
| 8698 | CEFBS_None, // VSLLWIL_D_W |
| 8699 | CEFBS_None, // VSLLWIL_HU_BU |
| 8700 | CEFBS_None, // VSLLWIL_H_B |
| 8701 | CEFBS_None, // VSLLWIL_WU_HU |
| 8702 | CEFBS_None, // VSLLWIL_W_H |
| 8703 | CEFBS_None, // VSLL_B |
| 8704 | CEFBS_None, // VSLL_D |
| 8705 | CEFBS_None, // VSLL_H |
| 8706 | CEFBS_None, // VSLL_W |
| 8707 | CEFBS_None, // VSLTI_B |
| 8708 | CEFBS_None, // VSLTI_BU |
| 8709 | CEFBS_None, // VSLTI_D |
| 8710 | CEFBS_None, // VSLTI_DU |
| 8711 | CEFBS_None, // VSLTI_H |
| 8712 | CEFBS_None, // VSLTI_HU |
| 8713 | CEFBS_None, // VSLTI_W |
| 8714 | CEFBS_None, // VSLTI_WU |
| 8715 | CEFBS_None, // VSLT_B |
| 8716 | CEFBS_None, // VSLT_BU |
| 8717 | CEFBS_None, // VSLT_D |
| 8718 | CEFBS_None, // VSLT_DU |
| 8719 | CEFBS_None, // VSLT_H |
| 8720 | CEFBS_None, // VSLT_HU |
| 8721 | CEFBS_None, // VSLT_W |
| 8722 | CEFBS_None, // VSLT_WU |
| 8723 | CEFBS_None, // VSRAI_B |
| 8724 | CEFBS_None, // VSRAI_D |
| 8725 | CEFBS_None, // VSRAI_H |
| 8726 | CEFBS_None, // VSRAI_W |
| 8727 | CEFBS_None, // VSRANI_B_H |
| 8728 | CEFBS_None, // VSRANI_D_Q |
| 8729 | CEFBS_None, // VSRANI_H_W |
| 8730 | CEFBS_None, // VSRANI_W_D |
| 8731 | CEFBS_None, // VSRAN_B_H |
| 8732 | CEFBS_None, // VSRAN_H_W |
| 8733 | CEFBS_None, // VSRAN_W_D |
| 8734 | CEFBS_None, // VSRARI_B |
| 8735 | CEFBS_None, // VSRARI_D |
| 8736 | CEFBS_None, // VSRARI_H |
| 8737 | CEFBS_None, // VSRARI_W |
| 8738 | CEFBS_None, // VSRARNI_B_H |
| 8739 | CEFBS_None, // VSRARNI_D_Q |
| 8740 | CEFBS_None, // VSRARNI_H_W |
| 8741 | CEFBS_None, // VSRARNI_W_D |
| 8742 | CEFBS_None, // VSRARN_B_H |
| 8743 | CEFBS_None, // VSRARN_H_W |
| 8744 | CEFBS_None, // VSRARN_W_D |
| 8745 | CEFBS_None, // VSRAR_B |
| 8746 | CEFBS_None, // VSRAR_D |
| 8747 | CEFBS_None, // VSRAR_H |
| 8748 | CEFBS_None, // VSRAR_W |
| 8749 | CEFBS_None, // VSRA_B |
| 8750 | CEFBS_None, // VSRA_D |
| 8751 | CEFBS_None, // VSRA_H |
| 8752 | CEFBS_None, // VSRA_W |
| 8753 | CEFBS_None, // VSRLI_B |
| 8754 | CEFBS_None, // VSRLI_D |
| 8755 | CEFBS_None, // VSRLI_H |
| 8756 | CEFBS_None, // VSRLI_W |
| 8757 | CEFBS_None, // VSRLNI_B_H |
| 8758 | CEFBS_None, // VSRLNI_D_Q |
| 8759 | CEFBS_None, // VSRLNI_H_W |
| 8760 | CEFBS_None, // VSRLNI_W_D |
| 8761 | CEFBS_None, // VSRLN_B_H |
| 8762 | CEFBS_None, // VSRLN_H_W |
| 8763 | CEFBS_None, // VSRLN_W_D |
| 8764 | CEFBS_None, // VSRLRI_B |
| 8765 | CEFBS_None, // VSRLRI_D |
| 8766 | CEFBS_None, // VSRLRI_H |
| 8767 | CEFBS_None, // VSRLRI_W |
| 8768 | CEFBS_None, // VSRLRNI_B_H |
| 8769 | CEFBS_None, // VSRLRNI_D_Q |
| 8770 | CEFBS_None, // VSRLRNI_H_W |
| 8771 | CEFBS_None, // VSRLRNI_W_D |
| 8772 | CEFBS_None, // VSRLRN_B_H |
| 8773 | CEFBS_None, // VSRLRN_H_W |
| 8774 | CEFBS_None, // VSRLRN_W_D |
| 8775 | CEFBS_None, // VSRLR_B |
| 8776 | CEFBS_None, // VSRLR_D |
| 8777 | CEFBS_None, // VSRLR_H |
| 8778 | CEFBS_None, // VSRLR_W |
| 8779 | CEFBS_None, // VSRL_B |
| 8780 | CEFBS_None, // VSRL_D |
| 8781 | CEFBS_None, // VSRL_H |
| 8782 | CEFBS_None, // VSRL_W |
| 8783 | CEFBS_None, // VSSRANI_BU_H |
| 8784 | CEFBS_None, // VSSRANI_B_H |
| 8785 | CEFBS_None, // VSSRANI_DU_Q |
| 8786 | CEFBS_None, // VSSRANI_D_Q |
| 8787 | CEFBS_None, // VSSRANI_HU_W |
| 8788 | CEFBS_None, // VSSRANI_H_W |
| 8789 | CEFBS_None, // VSSRANI_WU_D |
| 8790 | CEFBS_None, // VSSRANI_W_D |
| 8791 | CEFBS_None, // VSSRAN_BU_H |
| 8792 | CEFBS_None, // VSSRAN_B_H |
| 8793 | CEFBS_None, // VSSRAN_HU_W |
| 8794 | CEFBS_None, // VSSRAN_H_W |
| 8795 | CEFBS_None, // VSSRAN_WU_D |
| 8796 | CEFBS_None, // VSSRAN_W_D |
| 8797 | CEFBS_None, // VSSRARNI_BU_H |
| 8798 | CEFBS_None, // VSSRARNI_B_H |
| 8799 | CEFBS_None, // VSSRARNI_DU_Q |
| 8800 | CEFBS_None, // VSSRARNI_D_Q |
| 8801 | CEFBS_None, // VSSRARNI_HU_W |
| 8802 | CEFBS_None, // VSSRARNI_H_W |
| 8803 | CEFBS_None, // VSSRARNI_WU_D |
| 8804 | CEFBS_None, // VSSRARNI_W_D |
| 8805 | CEFBS_None, // VSSRARN_BU_H |
| 8806 | CEFBS_None, // VSSRARN_B_H |
| 8807 | CEFBS_None, // VSSRARN_HU_W |
| 8808 | CEFBS_None, // VSSRARN_H_W |
| 8809 | CEFBS_None, // VSSRARN_WU_D |
| 8810 | CEFBS_None, // VSSRARN_W_D |
| 8811 | CEFBS_None, // VSSRLNI_BU_H |
| 8812 | CEFBS_None, // VSSRLNI_B_H |
| 8813 | CEFBS_None, // VSSRLNI_DU_Q |
| 8814 | CEFBS_None, // VSSRLNI_D_Q |
| 8815 | CEFBS_None, // VSSRLNI_HU_W |
| 8816 | CEFBS_None, // VSSRLNI_H_W |
| 8817 | CEFBS_None, // VSSRLNI_WU_D |
| 8818 | CEFBS_None, // VSSRLNI_W_D |
| 8819 | CEFBS_None, // VSSRLN_BU_H |
| 8820 | CEFBS_None, // VSSRLN_B_H |
| 8821 | CEFBS_None, // VSSRLN_HU_W |
| 8822 | CEFBS_None, // VSSRLN_H_W |
| 8823 | CEFBS_None, // VSSRLN_WU_D |
| 8824 | CEFBS_None, // VSSRLN_W_D |
| 8825 | CEFBS_None, // VSSRLRNI_BU_H |
| 8826 | CEFBS_None, // VSSRLRNI_B_H |
| 8827 | CEFBS_None, // VSSRLRNI_DU_Q |
| 8828 | CEFBS_None, // VSSRLRNI_D_Q |
| 8829 | CEFBS_None, // VSSRLRNI_HU_W |
| 8830 | CEFBS_None, // VSSRLRNI_H_W |
| 8831 | CEFBS_None, // VSSRLRNI_WU_D |
| 8832 | CEFBS_None, // VSSRLRNI_W_D |
| 8833 | CEFBS_None, // VSSRLRN_BU_H |
| 8834 | CEFBS_None, // VSSRLRN_B_H |
| 8835 | CEFBS_None, // VSSRLRN_HU_W |
| 8836 | CEFBS_None, // VSSRLRN_H_W |
| 8837 | CEFBS_None, // VSSRLRN_WU_D |
| 8838 | CEFBS_None, // VSSRLRN_W_D |
| 8839 | CEFBS_None, // VSSUB_B |
| 8840 | CEFBS_None, // VSSUB_BU |
| 8841 | CEFBS_None, // VSSUB_D |
| 8842 | CEFBS_None, // VSSUB_DU |
| 8843 | CEFBS_None, // VSSUB_H |
| 8844 | CEFBS_None, // VSSUB_HU |
| 8845 | CEFBS_None, // VSSUB_W |
| 8846 | CEFBS_None, // VSSUB_WU |
| 8847 | CEFBS_None, // VST |
| 8848 | CEFBS_None, // VSTELM_B |
| 8849 | CEFBS_None, // VSTELM_D |
| 8850 | CEFBS_None, // VSTELM_H |
| 8851 | CEFBS_None, // VSTELM_W |
| 8852 | CEFBS_None, // VSTX |
| 8853 | CEFBS_None, // VSUBI_BU |
| 8854 | CEFBS_None, // VSUBI_DU |
| 8855 | CEFBS_None, // VSUBI_HU |
| 8856 | CEFBS_None, // VSUBI_WU |
| 8857 | CEFBS_None, // VSUBWEV_D_W |
| 8858 | CEFBS_None, // VSUBWEV_D_WU |
| 8859 | CEFBS_None, // VSUBWEV_H_B |
| 8860 | CEFBS_None, // VSUBWEV_H_BU |
| 8861 | CEFBS_None, // VSUBWEV_Q_D |
| 8862 | CEFBS_None, // VSUBWEV_Q_DU |
| 8863 | CEFBS_None, // VSUBWEV_W_H |
| 8864 | CEFBS_None, // VSUBWEV_W_HU |
| 8865 | CEFBS_None, // VSUBWOD_D_W |
| 8866 | CEFBS_None, // VSUBWOD_D_WU |
| 8867 | CEFBS_None, // VSUBWOD_H_B |
| 8868 | CEFBS_None, // VSUBWOD_H_BU |
| 8869 | CEFBS_None, // VSUBWOD_Q_D |
| 8870 | CEFBS_None, // VSUBWOD_Q_DU |
| 8871 | CEFBS_None, // VSUBWOD_W_H |
| 8872 | CEFBS_None, // VSUBWOD_W_HU |
| 8873 | CEFBS_None, // VSUB_B |
| 8874 | CEFBS_None, // VSUB_D |
| 8875 | CEFBS_None, // VSUB_H |
| 8876 | CEFBS_None, // VSUB_Q |
| 8877 | CEFBS_None, // VSUB_W |
| 8878 | CEFBS_None, // VXORI_B |
| 8879 | CEFBS_None, // VXOR_V |
| 8880 | CEFBS_None, // X86ADC_B |
| 8881 | CEFBS_IsLA64, // X86ADC_D |
| 8882 | CEFBS_None, // X86ADC_H |
| 8883 | CEFBS_None, // X86ADC_W |
| 8884 | CEFBS_None, // X86ADD_B |
| 8885 | CEFBS_IsLA64, // X86ADD_D |
| 8886 | CEFBS_IsLA64, // X86ADD_DU |
| 8887 | CEFBS_None, // X86ADD_H |
| 8888 | CEFBS_None, // X86ADD_W |
| 8889 | CEFBS_IsLA64, // X86ADD_WU |
| 8890 | CEFBS_None, // X86AND_B |
| 8891 | CEFBS_IsLA64, // X86AND_D |
| 8892 | CEFBS_None, // X86AND_H |
| 8893 | CEFBS_None, // X86AND_W |
| 8894 | CEFBS_None, // X86CLRTM |
| 8895 | CEFBS_None, // X86DECTOP |
| 8896 | CEFBS_None, // X86DEC_B |
| 8897 | CEFBS_IsLA64, // X86DEC_D |
| 8898 | CEFBS_None, // X86DEC_H |
| 8899 | CEFBS_None, // X86DEC_W |
| 8900 | CEFBS_None, // X86INCTOP |
| 8901 | CEFBS_None, // X86INC_B |
| 8902 | CEFBS_IsLA64, // X86INC_D |
| 8903 | CEFBS_None, // X86INC_H |
| 8904 | CEFBS_None, // X86INC_W |
| 8905 | CEFBS_None, // X86MFFLAG |
| 8906 | CEFBS_None, // X86MFTOP |
| 8907 | CEFBS_None, // X86MTFLAG |
| 8908 | CEFBS_None, // X86MTTOP |
| 8909 | CEFBS_None, // X86MUL_B |
| 8910 | CEFBS_None, // X86MUL_BU |
| 8911 | CEFBS_IsLA64, // X86MUL_D |
| 8912 | CEFBS_IsLA64, // X86MUL_DU |
| 8913 | CEFBS_None, // X86MUL_H |
| 8914 | CEFBS_None, // X86MUL_HU |
| 8915 | CEFBS_None, // X86MUL_W |
| 8916 | CEFBS_IsLA64, // X86MUL_WU |
| 8917 | CEFBS_None, // X86OR_B |
| 8918 | CEFBS_IsLA64, // X86OR_D |
| 8919 | CEFBS_None, // X86OR_H |
| 8920 | CEFBS_None, // X86OR_W |
| 8921 | CEFBS_None, // X86RCLI_B |
| 8922 | CEFBS_IsLA64, // X86RCLI_D |
| 8923 | CEFBS_None, // X86RCLI_H |
| 8924 | CEFBS_None, // X86RCLI_W |
| 8925 | CEFBS_None, // X86RCL_B |
| 8926 | CEFBS_IsLA64, // X86RCL_D |
| 8927 | CEFBS_None, // X86RCL_H |
| 8928 | CEFBS_None, // X86RCL_W |
| 8929 | CEFBS_None, // X86RCRI_B |
| 8930 | CEFBS_IsLA64, // X86RCRI_D |
| 8931 | CEFBS_None, // X86RCRI_H |
| 8932 | CEFBS_None, // X86RCRI_W |
| 8933 | CEFBS_None, // X86RCR_B |
| 8934 | CEFBS_IsLA64, // X86RCR_D |
| 8935 | CEFBS_None, // X86RCR_H |
| 8936 | CEFBS_None, // X86RCR_W |
| 8937 | CEFBS_None, // X86ROTLI_B |
| 8938 | CEFBS_IsLA64, // X86ROTLI_D |
| 8939 | CEFBS_None, // X86ROTLI_H |
| 8940 | CEFBS_None, // X86ROTLI_W |
| 8941 | CEFBS_None, // X86ROTL_B |
| 8942 | CEFBS_IsLA64, // X86ROTL_D |
| 8943 | CEFBS_None, // X86ROTL_H |
| 8944 | CEFBS_None, // X86ROTL_W |
| 8945 | CEFBS_None, // X86ROTRI_B |
| 8946 | CEFBS_IsLA64, // X86ROTRI_D |
| 8947 | CEFBS_None, // X86ROTRI_H |
| 8948 | CEFBS_None, // X86ROTRI_W |
| 8949 | CEFBS_None, // X86ROTR_B |
| 8950 | CEFBS_IsLA64, // X86ROTR_D |
| 8951 | CEFBS_None, // X86ROTR_H |
| 8952 | CEFBS_None, // X86ROTR_W |
| 8953 | CEFBS_None, // X86SBC_B |
| 8954 | CEFBS_IsLA64, // X86SBC_D |
| 8955 | CEFBS_None, // X86SBC_H |
| 8956 | CEFBS_None, // X86SBC_W |
| 8957 | CEFBS_None, // X86SETTAG |
| 8958 | CEFBS_None, // X86SETTM |
| 8959 | CEFBS_None, // X86SLLI_B |
| 8960 | CEFBS_IsLA64, // X86SLLI_D |
| 8961 | CEFBS_None, // X86SLLI_H |
| 8962 | CEFBS_None, // X86SLLI_W |
| 8963 | CEFBS_None, // X86SLL_B |
| 8964 | CEFBS_IsLA64, // X86SLL_D |
| 8965 | CEFBS_None, // X86SLL_H |
| 8966 | CEFBS_None, // X86SLL_W |
| 8967 | CEFBS_None, // X86SRAI_B |
| 8968 | CEFBS_IsLA64, // X86SRAI_D |
| 8969 | CEFBS_None, // X86SRAI_H |
| 8970 | CEFBS_None, // X86SRAI_W |
| 8971 | CEFBS_None, // X86SRA_B |
| 8972 | CEFBS_IsLA64, // X86SRA_D |
| 8973 | CEFBS_None, // X86SRA_H |
| 8974 | CEFBS_None, // X86SRA_W |
| 8975 | CEFBS_None, // X86SRLI_B |
| 8976 | CEFBS_IsLA64, // X86SRLI_D |
| 8977 | CEFBS_None, // X86SRLI_H |
| 8978 | CEFBS_None, // X86SRLI_W |
| 8979 | CEFBS_None, // X86SRL_B |
| 8980 | CEFBS_IsLA64, // X86SRL_D |
| 8981 | CEFBS_None, // X86SRL_H |
| 8982 | CEFBS_None, // X86SRL_W |
| 8983 | CEFBS_None, // X86SUB_B |
| 8984 | CEFBS_IsLA64, // X86SUB_D |
| 8985 | CEFBS_IsLA64, // X86SUB_DU |
| 8986 | CEFBS_None, // X86SUB_H |
| 8987 | CEFBS_None, // X86SUB_W |
| 8988 | CEFBS_IsLA64, // X86SUB_WU |
| 8989 | CEFBS_None, // X86XOR_B |
| 8990 | CEFBS_IsLA64, // X86XOR_D |
| 8991 | CEFBS_None, // X86XOR_H |
| 8992 | CEFBS_None, // X86XOR_W |
| 8993 | CEFBS_None, // XOR |
| 8994 | CEFBS_None, // XORI |
| 8995 | CEFBS_None, // XVABSD_B |
| 8996 | CEFBS_None, // XVABSD_BU |
| 8997 | CEFBS_None, // XVABSD_D |
| 8998 | CEFBS_None, // XVABSD_DU |
| 8999 | CEFBS_None, // XVABSD_H |
| 9000 | CEFBS_None, // XVABSD_HU |
| 9001 | CEFBS_None, // XVABSD_W |
| 9002 | CEFBS_None, // XVABSD_WU |
| 9003 | CEFBS_None, // XVADDA_B |
| 9004 | CEFBS_None, // XVADDA_D |
| 9005 | CEFBS_None, // XVADDA_H |
| 9006 | CEFBS_None, // XVADDA_W |
| 9007 | CEFBS_None, // XVADDI_BU |
| 9008 | CEFBS_None, // XVADDI_DU |
| 9009 | CEFBS_None, // XVADDI_HU |
| 9010 | CEFBS_None, // XVADDI_WU |
| 9011 | CEFBS_None, // XVADDWEV_D_W |
| 9012 | CEFBS_None, // XVADDWEV_D_WU |
| 9013 | CEFBS_None, // XVADDWEV_D_WU_W |
| 9014 | CEFBS_None, // XVADDWEV_H_B |
| 9015 | CEFBS_None, // XVADDWEV_H_BU |
| 9016 | CEFBS_None, // XVADDWEV_H_BU_B |
| 9017 | CEFBS_None, // XVADDWEV_Q_D |
| 9018 | CEFBS_None, // XVADDWEV_Q_DU |
| 9019 | CEFBS_None, // XVADDWEV_Q_DU_D |
| 9020 | CEFBS_None, // XVADDWEV_W_H |
| 9021 | CEFBS_None, // XVADDWEV_W_HU |
| 9022 | CEFBS_None, // XVADDWEV_W_HU_H |
| 9023 | CEFBS_None, // XVADDWOD_D_W |
| 9024 | CEFBS_None, // XVADDWOD_D_WU |
| 9025 | CEFBS_None, // XVADDWOD_D_WU_W |
| 9026 | CEFBS_None, // XVADDWOD_H_B |
| 9027 | CEFBS_None, // XVADDWOD_H_BU |
| 9028 | CEFBS_None, // XVADDWOD_H_BU_B |
| 9029 | CEFBS_None, // XVADDWOD_Q_D |
| 9030 | CEFBS_None, // XVADDWOD_Q_DU |
| 9031 | CEFBS_None, // XVADDWOD_Q_DU_D |
| 9032 | CEFBS_None, // XVADDWOD_W_H |
| 9033 | CEFBS_None, // XVADDWOD_W_HU |
| 9034 | CEFBS_None, // XVADDWOD_W_HU_H |
| 9035 | CEFBS_None, // XVADD_B |
| 9036 | CEFBS_None, // XVADD_D |
| 9037 | CEFBS_None, // XVADD_H |
| 9038 | CEFBS_None, // XVADD_Q |
| 9039 | CEFBS_None, // XVADD_W |
| 9040 | CEFBS_None, // XVANDI_B |
| 9041 | CEFBS_None, // XVANDN_V |
| 9042 | CEFBS_None, // XVAND_V |
| 9043 | CEFBS_None, // XVAVGR_B |
| 9044 | CEFBS_None, // XVAVGR_BU |
| 9045 | CEFBS_None, // XVAVGR_D |
| 9046 | CEFBS_None, // XVAVGR_DU |
| 9047 | CEFBS_None, // XVAVGR_H |
| 9048 | CEFBS_None, // XVAVGR_HU |
| 9049 | CEFBS_None, // XVAVGR_W |
| 9050 | CEFBS_None, // XVAVGR_WU |
| 9051 | CEFBS_None, // XVAVG_B |
| 9052 | CEFBS_None, // XVAVG_BU |
| 9053 | CEFBS_None, // XVAVG_D |
| 9054 | CEFBS_None, // XVAVG_DU |
| 9055 | CEFBS_None, // XVAVG_H |
| 9056 | CEFBS_None, // XVAVG_HU |
| 9057 | CEFBS_None, // XVAVG_W |
| 9058 | CEFBS_None, // XVAVG_WU |
| 9059 | CEFBS_None, // XVBITCLRI_B |
| 9060 | CEFBS_None, // XVBITCLRI_D |
| 9061 | CEFBS_None, // XVBITCLRI_H |
| 9062 | CEFBS_None, // XVBITCLRI_W |
| 9063 | CEFBS_None, // XVBITCLR_B |
| 9064 | CEFBS_None, // XVBITCLR_D |
| 9065 | CEFBS_None, // XVBITCLR_H |
| 9066 | CEFBS_None, // XVBITCLR_W |
| 9067 | CEFBS_None, // XVBITREVI_B |
| 9068 | CEFBS_None, // XVBITREVI_D |
| 9069 | CEFBS_None, // XVBITREVI_H |
| 9070 | CEFBS_None, // XVBITREVI_W |
| 9071 | CEFBS_None, // XVBITREV_B |
| 9072 | CEFBS_None, // XVBITREV_D |
| 9073 | CEFBS_None, // XVBITREV_H |
| 9074 | CEFBS_None, // XVBITREV_W |
| 9075 | CEFBS_None, // XVBITSELI_B |
| 9076 | CEFBS_None, // XVBITSEL_V |
| 9077 | CEFBS_None, // XVBITSETI_B |
| 9078 | CEFBS_None, // XVBITSETI_D |
| 9079 | CEFBS_None, // XVBITSETI_H |
| 9080 | CEFBS_None, // XVBITSETI_W |
| 9081 | CEFBS_None, // XVBITSET_B |
| 9082 | CEFBS_None, // XVBITSET_D |
| 9083 | CEFBS_None, // XVBITSET_H |
| 9084 | CEFBS_None, // XVBITSET_W |
| 9085 | CEFBS_None, // XVBSLL_V |
| 9086 | CEFBS_None, // XVBSRL_V |
| 9087 | CEFBS_None, // XVCLO_B |
| 9088 | CEFBS_None, // XVCLO_D |
| 9089 | CEFBS_None, // XVCLO_H |
| 9090 | CEFBS_None, // XVCLO_W |
| 9091 | CEFBS_None, // XVCLZ_B |
| 9092 | CEFBS_None, // XVCLZ_D |
| 9093 | CEFBS_None, // XVCLZ_H |
| 9094 | CEFBS_None, // XVCLZ_W |
| 9095 | CEFBS_None, // XVDIV_B |
| 9096 | CEFBS_None, // XVDIV_BU |
| 9097 | CEFBS_None, // XVDIV_D |
| 9098 | CEFBS_None, // XVDIV_DU |
| 9099 | CEFBS_None, // XVDIV_H |
| 9100 | CEFBS_None, // XVDIV_HU |
| 9101 | CEFBS_None, // XVDIV_W |
| 9102 | CEFBS_None, // XVDIV_WU |
| 9103 | CEFBS_None, // XVEXTH_DU_WU |
| 9104 | CEFBS_None, // XVEXTH_D_W |
| 9105 | CEFBS_None, // XVEXTH_HU_BU |
| 9106 | CEFBS_None, // XVEXTH_H_B |
| 9107 | CEFBS_None, // XVEXTH_QU_DU |
| 9108 | CEFBS_None, // XVEXTH_Q_D |
| 9109 | CEFBS_None, // XVEXTH_WU_HU |
| 9110 | CEFBS_None, // XVEXTH_W_H |
| 9111 | CEFBS_None, // XVEXTL_QU_DU |
| 9112 | CEFBS_None, // XVEXTL_Q_D |
| 9113 | CEFBS_None, // XVEXTRINS_B |
| 9114 | CEFBS_None, // XVEXTRINS_D |
| 9115 | CEFBS_None, // XVEXTRINS_H |
| 9116 | CEFBS_None, // XVEXTRINS_W |
| 9117 | CEFBS_None, // XVFADD_D |
| 9118 | CEFBS_None, // XVFADD_S |
| 9119 | CEFBS_None, // XVFCLASS_D |
| 9120 | CEFBS_None, // XVFCLASS_S |
| 9121 | CEFBS_None, // XVFCMP_CAF_D |
| 9122 | CEFBS_None, // XVFCMP_CAF_S |
| 9123 | CEFBS_None, // XVFCMP_CEQ_D |
| 9124 | CEFBS_None, // XVFCMP_CEQ_S |
| 9125 | CEFBS_None, // XVFCMP_CLE_D |
| 9126 | CEFBS_None, // XVFCMP_CLE_S |
| 9127 | CEFBS_None, // XVFCMP_CLT_D |
| 9128 | CEFBS_None, // XVFCMP_CLT_S |
| 9129 | CEFBS_None, // XVFCMP_CNE_D |
| 9130 | CEFBS_None, // XVFCMP_CNE_S |
| 9131 | CEFBS_None, // XVFCMP_COR_D |
| 9132 | CEFBS_None, // XVFCMP_COR_S |
| 9133 | CEFBS_None, // XVFCMP_CUEQ_D |
| 9134 | CEFBS_None, // XVFCMP_CUEQ_S |
| 9135 | CEFBS_None, // XVFCMP_CULE_D |
| 9136 | CEFBS_None, // XVFCMP_CULE_S |
| 9137 | CEFBS_None, // XVFCMP_CULT_D |
| 9138 | CEFBS_None, // XVFCMP_CULT_S |
| 9139 | CEFBS_None, // XVFCMP_CUNE_D |
| 9140 | CEFBS_None, // XVFCMP_CUNE_S |
| 9141 | CEFBS_None, // XVFCMP_CUN_D |
| 9142 | CEFBS_None, // XVFCMP_CUN_S |
| 9143 | CEFBS_None, // XVFCMP_SAF_D |
| 9144 | CEFBS_None, // XVFCMP_SAF_S |
| 9145 | CEFBS_None, // XVFCMP_SEQ_D |
| 9146 | CEFBS_None, // XVFCMP_SEQ_S |
| 9147 | CEFBS_None, // XVFCMP_SLE_D |
| 9148 | CEFBS_None, // XVFCMP_SLE_S |
| 9149 | CEFBS_None, // XVFCMP_SLT_D |
| 9150 | CEFBS_None, // XVFCMP_SLT_S |
| 9151 | CEFBS_None, // XVFCMP_SNE_D |
| 9152 | CEFBS_None, // XVFCMP_SNE_S |
| 9153 | CEFBS_None, // XVFCMP_SOR_D |
| 9154 | CEFBS_None, // XVFCMP_SOR_S |
| 9155 | CEFBS_None, // XVFCMP_SUEQ_D |
| 9156 | CEFBS_None, // XVFCMP_SUEQ_S |
| 9157 | CEFBS_None, // XVFCMP_SULE_D |
| 9158 | CEFBS_None, // XVFCMP_SULE_S |
| 9159 | CEFBS_None, // XVFCMP_SULT_D |
| 9160 | CEFBS_None, // XVFCMP_SULT_S |
| 9161 | CEFBS_None, // XVFCMP_SUNE_D |
| 9162 | CEFBS_None, // XVFCMP_SUNE_S |
| 9163 | CEFBS_None, // XVFCMP_SUN_D |
| 9164 | CEFBS_None, // XVFCMP_SUN_S |
| 9165 | CEFBS_None, // XVFCVTH_D_S |
| 9166 | CEFBS_None, // XVFCVTH_S_H |
| 9167 | CEFBS_None, // XVFCVTL_D_S |
| 9168 | CEFBS_None, // XVFCVTL_S_H |
| 9169 | CEFBS_None, // XVFCVT_H_S |
| 9170 | CEFBS_None, // XVFCVT_S_D |
| 9171 | CEFBS_None, // XVFDIV_D |
| 9172 | CEFBS_None, // XVFDIV_S |
| 9173 | CEFBS_None, // XVFFINTH_D_W |
| 9174 | CEFBS_None, // XVFFINTL_D_W |
| 9175 | CEFBS_None, // XVFFINT_D_L |
| 9176 | CEFBS_None, // XVFFINT_D_LU |
| 9177 | CEFBS_None, // XVFFINT_S_L |
| 9178 | CEFBS_None, // XVFFINT_S_W |
| 9179 | CEFBS_None, // XVFFINT_S_WU |
| 9180 | CEFBS_None, // XVFLOGB_D |
| 9181 | CEFBS_None, // XVFLOGB_S |
| 9182 | CEFBS_None, // XVFMADD_D |
| 9183 | CEFBS_None, // XVFMADD_S |
| 9184 | CEFBS_None, // XVFMAXA_D |
| 9185 | CEFBS_None, // XVFMAXA_S |
| 9186 | CEFBS_None, // XVFMAX_D |
| 9187 | CEFBS_None, // XVFMAX_S |
| 9188 | CEFBS_None, // XVFMINA_D |
| 9189 | CEFBS_None, // XVFMINA_S |
| 9190 | CEFBS_None, // XVFMIN_D |
| 9191 | CEFBS_None, // XVFMIN_S |
| 9192 | CEFBS_None, // XVFMSUB_D |
| 9193 | CEFBS_None, // XVFMSUB_S |
| 9194 | CEFBS_None, // XVFMUL_D |
| 9195 | CEFBS_None, // XVFMUL_S |
| 9196 | CEFBS_None, // XVFNMADD_D |
| 9197 | CEFBS_None, // XVFNMADD_S |
| 9198 | CEFBS_None, // XVFNMSUB_D |
| 9199 | CEFBS_None, // XVFNMSUB_S |
| 9200 | CEFBS_None, // XVFRECIPE_D |
| 9201 | CEFBS_None, // XVFRECIPE_S |
| 9202 | CEFBS_None, // XVFRECIP_D |
| 9203 | CEFBS_None, // XVFRECIP_S |
| 9204 | CEFBS_None, // XVFRINTRM_D |
| 9205 | CEFBS_None, // XVFRINTRM_S |
| 9206 | CEFBS_None, // XVFRINTRNE_D |
| 9207 | CEFBS_None, // XVFRINTRNE_S |
| 9208 | CEFBS_None, // XVFRINTRP_D |
| 9209 | CEFBS_None, // XVFRINTRP_S |
| 9210 | CEFBS_None, // XVFRINTRZ_D |
| 9211 | CEFBS_None, // XVFRINTRZ_S |
| 9212 | CEFBS_None, // XVFRINT_D |
| 9213 | CEFBS_None, // XVFRINT_S |
| 9214 | CEFBS_None, // XVFRSQRTE_D |
| 9215 | CEFBS_None, // XVFRSQRTE_S |
| 9216 | CEFBS_None, // XVFRSQRT_D |
| 9217 | CEFBS_None, // XVFRSQRT_S |
| 9218 | CEFBS_None, // XVFRSTPI_B |
| 9219 | CEFBS_None, // XVFRSTPI_H |
| 9220 | CEFBS_None, // XVFRSTP_B |
| 9221 | CEFBS_None, // XVFRSTP_H |
| 9222 | CEFBS_None, // XVFSQRT_D |
| 9223 | CEFBS_None, // XVFSQRT_S |
| 9224 | CEFBS_None, // XVFSUB_D |
| 9225 | CEFBS_None, // XVFSUB_S |
| 9226 | CEFBS_None, // XVFTINTH_L_S |
| 9227 | CEFBS_None, // XVFTINTL_L_S |
| 9228 | CEFBS_None, // XVFTINTRMH_L_S |
| 9229 | CEFBS_None, // XVFTINTRML_L_S |
| 9230 | CEFBS_None, // XVFTINTRM_L_D |
| 9231 | CEFBS_None, // XVFTINTRM_W_D |
| 9232 | CEFBS_None, // XVFTINTRM_W_S |
| 9233 | CEFBS_None, // XVFTINTRNEH_L_S |
| 9234 | CEFBS_None, // XVFTINTRNEL_L_S |
| 9235 | CEFBS_None, // XVFTINTRNE_L_D |
| 9236 | CEFBS_None, // XVFTINTRNE_W_D |
| 9237 | CEFBS_None, // XVFTINTRNE_W_S |
| 9238 | CEFBS_None, // XVFTINTRPH_L_S |
| 9239 | CEFBS_None, // XVFTINTRPL_L_S |
| 9240 | CEFBS_None, // XVFTINTRP_L_D |
| 9241 | CEFBS_None, // XVFTINTRP_W_D |
| 9242 | CEFBS_None, // XVFTINTRP_W_S |
| 9243 | CEFBS_None, // XVFTINTRZH_L_S |
| 9244 | CEFBS_None, // XVFTINTRZL_L_S |
| 9245 | CEFBS_None, // XVFTINTRZ_LU_D |
| 9246 | CEFBS_None, // XVFTINTRZ_L_D |
| 9247 | CEFBS_None, // XVFTINTRZ_WU_S |
| 9248 | CEFBS_None, // XVFTINTRZ_W_D |
| 9249 | CEFBS_None, // XVFTINTRZ_W_S |
| 9250 | CEFBS_None, // XVFTINT_LU_D |
| 9251 | CEFBS_None, // XVFTINT_L_D |
| 9252 | CEFBS_None, // XVFTINT_WU_S |
| 9253 | CEFBS_None, // XVFTINT_W_D |
| 9254 | CEFBS_None, // XVFTINT_W_S |
| 9255 | CEFBS_None, // XVHADDW_DU_WU |
| 9256 | CEFBS_None, // XVHADDW_D_W |
| 9257 | CEFBS_None, // XVHADDW_HU_BU |
| 9258 | CEFBS_None, // XVHADDW_H_B |
| 9259 | CEFBS_None, // XVHADDW_QU_DU |
| 9260 | CEFBS_None, // XVHADDW_Q_D |
| 9261 | CEFBS_None, // XVHADDW_WU_HU |
| 9262 | CEFBS_None, // XVHADDW_W_H |
| 9263 | CEFBS_None, // XVHSELI_D |
| 9264 | CEFBS_None, // XVHSUBW_DU_WU |
| 9265 | CEFBS_None, // XVHSUBW_D_W |
| 9266 | CEFBS_None, // XVHSUBW_HU_BU |
| 9267 | CEFBS_None, // XVHSUBW_H_B |
| 9268 | CEFBS_None, // XVHSUBW_QU_DU |
| 9269 | CEFBS_None, // XVHSUBW_Q_D |
| 9270 | CEFBS_None, // XVHSUBW_WU_HU |
| 9271 | CEFBS_None, // XVHSUBW_W_H |
| 9272 | CEFBS_None, // XVILVH_B |
| 9273 | CEFBS_None, // XVILVH_D |
| 9274 | CEFBS_None, // XVILVH_H |
| 9275 | CEFBS_None, // XVILVH_W |
| 9276 | CEFBS_None, // XVILVL_B |
| 9277 | CEFBS_None, // XVILVL_D |
| 9278 | CEFBS_None, // XVILVL_H |
| 9279 | CEFBS_None, // XVILVL_W |
| 9280 | CEFBS_None, // XVINSGR2VR_D |
| 9281 | CEFBS_None, // XVINSGR2VR_W |
| 9282 | CEFBS_None, // XVINSVE0_D |
| 9283 | CEFBS_None, // XVINSVE0_W |
| 9284 | CEFBS_None, // XVLD |
| 9285 | CEFBS_None, // XVLDI |
| 9286 | CEFBS_None, // XVLDREPL_B |
| 9287 | CEFBS_None, // XVLDREPL_D |
| 9288 | CEFBS_None, // XVLDREPL_H |
| 9289 | CEFBS_None, // XVLDREPL_W |
| 9290 | CEFBS_None, // XVLDX |
| 9291 | CEFBS_None, // XVMADDWEV_D_W |
| 9292 | CEFBS_None, // XVMADDWEV_D_WU |
| 9293 | CEFBS_None, // XVMADDWEV_D_WU_W |
| 9294 | CEFBS_None, // XVMADDWEV_H_B |
| 9295 | CEFBS_None, // XVMADDWEV_H_BU |
| 9296 | CEFBS_None, // XVMADDWEV_H_BU_B |
| 9297 | CEFBS_None, // XVMADDWEV_Q_D |
| 9298 | CEFBS_None, // XVMADDWEV_Q_DU |
| 9299 | CEFBS_None, // XVMADDWEV_Q_DU_D |
| 9300 | CEFBS_None, // XVMADDWEV_W_H |
| 9301 | CEFBS_None, // XVMADDWEV_W_HU |
| 9302 | CEFBS_None, // XVMADDWEV_W_HU_H |
| 9303 | CEFBS_None, // XVMADDWOD_D_W |
| 9304 | CEFBS_None, // XVMADDWOD_D_WU |
| 9305 | CEFBS_None, // XVMADDWOD_D_WU_W |
| 9306 | CEFBS_None, // XVMADDWOD_H_B |
| 9307 | CEFBS_None, // XVMADDWOD_H_BU |
| 9308 | CEFBS_None, // XVMADDWOD_H_BU_B |
| 9309 | CEFBS_None, // XVMADDWOD_Q_D |
| 9310 | CEFBS_None, // XVMADDWOD_Q_DU |
| 9311 | CEFBS_None, // XVMADDWOD_Q_DU_D |
| 9312 | CEFBS_None, // XVMADDWOD_W_H |
| 9313 | CEFBS_None, // XVMADDWOD_W_HU |
| 9314 | CEFBS_None, // XVMADDWOD_W_HU_H |
| 9315 | CEFBS_None, // XVMADD_B |
| 9316 | CEFBS_None, // XVMADD_D |
| 9317 | CEFBS_None, // XVMADD_H |
| 9318 | CEFBS_None, // XVMADD_W |
| 9319 | CEFBS_None, // XVMAXI_B |
| 9320 | CEFBS_None, // XVMAXI_BU |
| 9321 | CEFBS_None, // XVMAXI_D |
| 9322 | CEFBS_None, // XVMAXI_DU |
| 9323 | CEFBS_None, // XVMAXI_H |
| 9324 | CEFBS_None, // XVMAXI_HU |
| 9325 | CEFBS_None, // XVMAXI_W |
| 9326 | CEFBS_None, // XVMAXI_WU |
| 9327 | CEFBS_None, // XVMAX_B |
| 9328 | CEFBS_None, // XVMAX_BU |
| 9329 | CEFBS_None, // XVMAX_D |
| 9330 | CEFBS_None, // XVMAX_DU |
| 9331 | CEFBS_None, // XVMAX_H |
| 9332 | CEFBS_None, // XVMAX_HU |
| 9333 | CEFBS_None, // XVMAX_W |
| 9334 | CEFBS_None, // XVMAX_WU |
| 9335 | CEFBS_None, // XVMINI_B |
| 9336 | CEFBS_None, // XVMINI_BU |
| 9337 | CEFBS_None, // XVMINI_D |
| 9338 | CEFBS_None, // XVMINI_DU |
| 9339 | CEFBS_None, // XVMINI_H |
| 9340 | CEFBS_None, // XVMINI_HU |
| 9341 | CEFBS_None, // XVMINI_W |
| 9342 | CEFBS_None, // XVMINI_WU |
| 9343 | CEFBS_None, // XVMIN_B |
| 9344 | CEFBS_None, // XVMIN_BU |
| 9345 | CEFBS_None, // XVMIN_D |
| 9346 | CEFBS_None, // XVMIN_DU |
| 9347 | CEFBS_None, // XVMIN_H |
| 9348 | CEFBS_None, // XVMIN_HU |
| 9349 | CEFBS_None, // XVMIN_W |
| 9350 | CEFBS_None, // XVMIN_WU |
| 9351 | CEFBS_None, // XVMOD_B |
| 9352 | CEFBS_None, // XVMOD_BU |
| 9353 | CEFBS_None, // XVMOD_D |
| 9354 | CEFBS_None, // XVMOD_DU |
| 9355 | CEFBS_None, // XVMOD_H |
| 9356 | CEFBS_None, // XVMOD_HU |
| 9357 | CEFBS_None, // XVMOD_W |
| 9358 | CEFBS_None, // XVMOD_WU |
| 9359 | CEFBS_None, // XVMSKGEZ_B |
| 9360 | CEFBS_None, // XVMSKLTZ_B |
| 9361 | CEFBS_None, // XVMSKLTZ_D |
| 9362 | CEFBS_None, // XVMSKLTZ_H |
| 9363 | CEFBS_None, // XVMSKLTZ_W |
| 9364 | CEFBS_None, // XVMSKNZ_B |
| 9365 | CEFBS_None, // XVMSUB_B |
| 9366 | CEFBS_None, // XVMSUB_D |
| 9367 | CEFBS_None, // XVMSUB_H |
| 9368 | CEFBS_None, // XVMSUB_W |
| 9369 | CEFBS_None, // XVMUH_B |
| 9370 | CEFBS_None, // XVMUH_BU |
| 9371 | CEFBS_None, // XVMUH_D |
| 9372 | CEFBS_None, // XVMUH_DU |
| 9373 | CEFBS_None, // XVMUH_H |
| 9374 | CEFBS_None, // XVMUH_HU |
| 9375 | CEFBS_None, // XVMUH_W |
| 9376 | CEFBS_None, // XVMUH_WU |
| 9377 | CEFBS_None, // XVMULWEV_D_W |
| 9378 | CEFBS_None, // XVMULWEV_D_WU |
| 9379 | CEFBS_None, // XVMULWEV_D_WU_W |
| 9380 | CEFBS_None, // XVMULWEV_H_B |
| 9381 | CEFBS_None, // XVMULWEV_H_BU |
| 9382 | CEFBS_None, // XVMULWEV_H_BU_B |
| 9383 | CEFBS_None, // XVMULWEV_Q_D |
| 9384 | CEFBS_None, // XVMULWEV_Q_DU |
| 9385 | CEFBS_None, // XVMULWEV_Q_DU_D |
| 9386 | CEFBS_None, // XVMULWEV_W_H |
| 9387 | CEFBS_None, // XVMULWEV_W_HU |
| 9388 | CEFBS_None, // XVMULWEV_W_HU_H |
| 9389 | CEFBS_None, // XVMULWOD_D_W |
| 9390 | CEFBS_None, // XVMULWOD_D_WU |
| 9391 | CEFBS_None, // XVMULWOD_D_WU_W |
| 9392 | CEFBS_None, // XVMULWOD_H_B |
| 9393 | CEFBS_None, // XVMULWOD_H_BU |
| 9394 | CEFBS_None, // XVMULWOD_H_BU_B |
| 9395 | CEFBS_None, // XVMULWOD_Q_D |
| 9396 | CEFBS_None, // XVMULWOD_Q_DU |
| 9397 | CEFBS_None, // XVMULWOD_Q_DU_D |
| 9398 | CEFBS_None, // XVMULWOD_W_H |
| 9399 | CEFBS_None, // XVMULWOD_W_HU |
| 9400 | CEFBS_None, // XVMULWOD_W_HU_H |
| 9401 | CEFBS_None, // XVMUL_B |
| 9402 | CEFBS_None, // XVMUL_D |
| 9403 | CEFBS_None, // XVMUL_H |
| 9404 | CEFBS_None, // XVMUL_W |
| 9405 | CEFBS_None, // XVNEG_B |
| 9406 | CEFBS_None, // XVNEG_D |
| 9407 | CEFBS_None, // XVNEG_H |
| 9408 | CEFBS_None, // XVNEG_W |
| 9409 | CEFBS_None, // XVNORI_B |
| 9410 | CEFBS_None, // XVNOR_V |
| 9411 | CEFBS_None, // XVORI_B |
| 9412 | CEFBS_None, // XVORN_V |
| 9413 | CEFBS_None, // XVOR_V |
| 9414 | CEFBS_None, // XVPACKEV_B |
| 9415 | CEFBS_None, // XVPACKEV_D |
| 9416 | CEFBS_None, // XVPACKEV_H |
| 9417 | CEFBS_None, // XVPACKEV_W |
| 9418 | CEFBS_None, // XVPACKOD_B |
| 9419 | CEFBS_None, // XVPACKOD_D |
| 9420 | CEFBS_None, // XVPACKOD_H |
| 9421 | CEFBS_None, // XVPACKOD_W |
| 9422 | CEFBS_None, // XVPCNT_B |
| 9423 | CEFBS_None, // XVPCNT_D |
| 9424 | CEFBS_None, // XVPCNT_H |
| 9425 | CEFBS_None, // XVPCNT_W |
| 9426 | CEFBS_None, // XVPERMI_D |
| 9427 | CEFBS_None, // XVPERMI_Q |
| 9428 | CEFBS_None, // XVPERMI_W |
| 9429 | CEFBS_None, // XVPERM_W |
| 9430 | CEFBS_None, // XVPICKEV_B |
| 9431 | CEFBS_None, // XVPICKEV_D |
| 9432 | CEFBS_None, // XVPICKEV_H |
| 9433 | CEFBS_None, // XVPICKEV_W |
| 9434 | CEFBS_None, // XVPICKOD_B |
| 9435 | CEFBS_None, // XVPICKOD_D |
| 9436 | CEFBS_None, // XVPICKOD_H |
| 9437 | CEFBS_None, // XVPICKOD_W |
| 9438 | CEFBS_None, // XVPICKVE2GR_D |
| 9439 | CEFBS_None, // XVPICKVE2GR_DU |
| 9440 | CEFBS_None, // XVPICKVE2GR_W |
| 9441 | CEFBS_None, // XVPICKVE2GR_WU |
| 9442 | CEFBS_None, // XVPICKVE_D |
| 9443 | CEFBS_None, // XVPICKVE_W |
| 9444 | CEFBS_None, // XVREPL128VEI_B |
| 9445 | CEFBS_None, // XVREPL128VEI_D |
| 9446 | CEFBS_None, // XVREPL128VEI_H |
| 9447 | CEFBS_None, // XVREPL128VEI_W |
| 9448 | CEFBS_None, // XVREPLGR2VR_B |
| 9449 | CEFBS_None, // XVREPLGR2VR_D |
| 9450 | CEFBS_None, // XVREPLGR2VR_H |
| 9451 | CEFBS_None, // XVREPLGR2VR_W |
| 9452 | CEFBS_None, // XVREPLVE0_B |
| 9453 | CEFBS_None, // XVREPLVE0_D |
| 9454 | CEFBS_None, // XVREPLVE0_H |
| 9455 | CEFBS_None, // XVREPLVE0_Q |
| 9456 | CEFBS_None, // XVREPLVE0_W |
| 9457 | CEFBS_None, // XVREPLVE_B |
| 9458 | CEFBS_None, // XVREPLVE_D |
| 9459 | CEFBS_None, // XVREPLVE_H |
| 9460 | CEFBS_None, // XVREPLVE_W |
| 9461 | CEFBS_None, // XVROTRI_B |
| 9462 | CEFBS_None, // XVROTRI_D |
| 9463 | CEFBS_None, // XVROTRI_H |
| 9464 | CEFBS_None, // XVROTRI_W |
| 9465 | CEFBS_None, // XVROTR_B |
| 9466 | CEFBS_None, // XVROTR_D |
| 9467 | CEFBS_None, // XVROTR_H |
| 9468 | CEFBS_None, // XVROTR_W |
| 9469 | CEFBS_None, // XVSADD_B |
| 9470 | CEFBS_None, // XVSADD_BU |
| 9471 | CEFBS_None, // XVSADD_D |
| 9472 | CEFBS_None, // XVSADD_DU |
| 9473 | CEFBS_None, // XVSADD_H |
| 9474 | CEFBS_None, // XVSADD_HU |
| 9475 | CEFBS_None, // XVSADD_W |
| 9476 | CEFBS_None, // XVSADD_WU |
| 9477 | CEFBS_None, // XVSAT_B |
| 9478 | CEFBS_None, // XVSAT_BU |
| 9479 | CEFBS_None, // XVSAT_D |
| 9480 | CEFBS_None, // XVSAT_DU |
| 9481 | CEFBS_None, // XVSAT_H |
| 9482 | CEFBS_None, // XVSAT_HU |
| 9483 | CEFBS_None, // XVSAT_W |
| 9484 | CEFBS_None, // XVSAT_WU |
| 9485 | CEFBS_None, // XVSEQI_B |
| 9486 | CEFBS_None, // XVSEQI_D |
| 9487 | CEFBS_None, // XVSEQI_H |
| 9488 | CEFBS_None, // XVSEQI_W |
| 9489 | CEFBS_None, // XVSEQ_B |
| 9490 | CEFBS_None, // XVSEQ_D |
| 9491 | CEFBS_None, // XVSEQ_H |
| 9492 | CEFBS_None, // XVSEQ_W |
| 9493 | CEFBS_None, // XVSETALLNEZ_B |
| 9494 | CEFBS_None, // XVSETALLNEZ_D |
| 9495 | CEFBS_None, // XVSETALLNEZ_H |
| 9496 | CEFBS_None, // XVSETALLNEZ_W |
| 9497 | CEFBS_None, // XVSETANYEQZ_B |
| 9498 | CEFBS_None, // XVSETANYEQZ_D |
| 9499 | CEFBS_None, // XVSETANYEQZ_H |
| 9500 | CEFBS_None, // XVSETANYEQZ_W |
| 9501 | CEFBS_None, // XVSETEQZ_V |
| 9502 | CEFBS_None, // XVSETNEZ_V |
| 9503 | CEFBS_None, // XVSHUF4I_B |
| 9504 | CEFBS_None, // XVSHUF4I_D |
| 9505 | CEFBS_None, // XVSHUF4I_H |
| 9506 | CEFBS_None, // XVSHUF4I_W |
| 9507 | CEFBS_None, // XVSHUF_B |
| 9508 | CEFBS_None, // XVSHUF_D |
| 9509 | CEFBS_None, // XVSHUF_H |
| 9510 | CEFBS_None, // XVSHUF_W |
| 9511 | CEFBS_None, // XVSIGNCOV_B |
| 9512 | CEFBS_None, // XVSIGNCOV_D |
| 9513 | CEFBS_None, // XVSIGNCOV_H |
| 9514 | CEFBS_None, // XVSIGNCOV_W |
| 9515 | CEFBS_None, // XVSLEI_B |
| 9516 | CEFBS_None, // XVSLEI_BU |
| 9517 | CEFBS_None, // XVSLEI_D |
| 9518 | CEFBS_None, // XVSLEI_DU |
| 9519 | CEFBS_None, // XVSLEI_H |
| 9520 | CEFBS_None, // XVSLEI_HU |
| 9521 | CEFBS_None, // XVSLEI_W |
| 9522 | CEFBS_None, // XVSLEI_WU |
| 9523 | CEFBS_None, // XVSLE_B |
| 9524 | CEFBS_None, // XVSLE_BU |
| 9525 | CEFBS_None, // XVSLE_D |
| 9526 | CEFBS_None, // XVSLE_DU |
| 9527 | CEFBS_None, // XVSLE_H |
| 9528 | CEFBS_None, // XVSLE_HU |
| 9529 | CEFBS_None, // XVSLE_W |
| 9530 | CEFBS_None, // XVSLE_WU |
| 9531 | CEFBS_None, // XVSLLI_B |
| 9532 | CEFBS_None, // XVSLLI_D |
| 9533 | CEFBS_None, // XVSLLI_H |
| 9534 | CEFBS_None, // XVSLLI_W |
| 9535 | CEFBS_None, // XVSLLWIL_DU_WU |
| 9536 | CEFBS_None, // XVSLLWIL_D_W |
| 9537 | CEFBS_None, // XVSLLWIL_HU_BU |
| 9538 | CEFBS_None, // XVSLLWIL_H_B |
| 9539 | CEFBS_None, // XVSLLWIL_WU_HU |
| 9540 | CEFBS_None, // XVSLLWIL_W_H |
| 9541 | CEFBS_None, // XVSLL_B |
| 9542 | CEFBS_None, // XVSLL_D |
| 9543 | CEFBS_None, // XVSLL_H |
| 9544 | CEFBS_None, // XVSLL_W |
| 9545 | CEFBS_None, // XVSLTI_B |
| 9546 | CEFBS_None, // XVSLTI_BU |
| 9547 | CEFBS_None, // XVSLTI_D |
| 9548 | CEFBS_None, // XVSLTI_DU |
| 9549 | CEFBS_None, // XVSLTI_H |
| 9550 | CEFBS_None, // XVSLTI_HU |
| 9551 | CEFBS_None, // XVSLTI_W |
| 9552 | CEFBS_None, // XVSLTI_WU |
| 9553 | CEFBS_None, // XVSLT_B |
| 9554 | CEFBS_None, // XVSLT_BU |
| 9555 | CEFBS_None, // XVSLT_D |
| 9556 | CEFBS_None, // XVSLT_DU |
| 9557 | CEFBS_None, // XVSLT_H |
| 9558 | CEFBS_None, // XVSLT_HU |
| 9559 | CEFBS_None, // XVSLT_W |
| 9560 | CEFBS_None, // XVSLT_WU |
| 9561 | CEFBS_None, // XVSRAI_B |
| 9562 | CEFBS_None, // XVSRAI_D |
| 9563 | CEFBS_None, // XVSRAI_H |
| 9564 | CEFBS_None, // XVSRAI_W |
| 9565 | CEFBS_None, // XVSRANI_B_H |
| 9566 | CEFBS_None, // XVSRANI_D_Q |
| 9567 | CEFBS_None, // XVSRANI_H_W |
| 9568 | CEFBS_None, // XVSRANI_W_D |
| 9569 | CEFBS_None, // XVSRAN_B_H |
| 9570 | CEFBS_None, // XVSRAN_H_W |
| 9571 | CEFBS_None, // XVSRAN_W_D |
| 9572 | CEFBS_None, // XVSRARI_B |
| 9573 | CEFBS_None, // XVSRARI_D |
| 9574 | CEFBS_None, // XVSRARI_H |
| 9575 | CEFBS_None, // XVSRARI_W |
| 9576 | CEFBS_None, // XVSRARNI_B_H |
| 9577 | CEFBS_None, // XVSRARNI_D_Q |
| 9578 | CEFBS_None, // XVSRARNI_H_W |
| 9579 | CEFBS_None, // XVSRARNI_W_D |
| 9580 | CEFBS_None, // XVSRARN_B_H |
| 9581 | CEFBS_None, // XVSRARN_H_W |
| 9582 | CEFBS_None, // XVSRARN_W_D |
| 9583 | CEFBS_None, // XVSRAR_B |
| 9584 | CEFBS_None, // XVSRAR_D |
| 9585 | CEFBS_None, // XVSRAR_H |
| 9586 | CEFBS_None, // XVSRAR_W |
| 9587 | CEFBS_None, // XVSRA_B |
| 9588 | CEFBS_None, // XVSRA_D |
| 9589 | CEFBS_None, // XVSRA_H |
| 9590 | CEFBS_None, // XVSRA_W |
| 9591 | CEFBS_None, // XVSRLI_B |
| 9592 | CEFBS_None, // XVSRLI_D |
| 9593 | CEFBS_None, // XVSRLI_H |
| 9594 | CEFBS_None, // XVSRLI_W |
| 9595 | CEFBS_None, // XVSRLNI_B_H |
| 9596 | CEFBS_None, // XVSRLNI_D_Q |
| 9597 | CEFBS_None, // XVSRLNI_H_W |
| 9598 | CEFBS_None, // XVSRLNI_W_D |
| 9599 | CEFBS_None, // XVSRLN_B_H |
| 9600 | CEFBS_None, // XVSRLN_H_W |
| 9601 | CEFBS_None, // XVSRLN_W_D |
| 9602 | CEFBS_None, // XVSRLRI_B |
| 9603 | CEFBS_None, // XVSRLRI_D |
| 9604 | CEFBS_None, // XVSRLRI_H |
| 9605 | CEFBS_None, // XVSRLRI_W |
| 9606 | CEFBS_None, // XVSRLRNI_B_H |
| 9607 | CEFBS_None, // XVSRLRNI_D_Q |
| 9608 | CEFBS_None, // XVSRLRNI_H_W |
| 9609 | CEFBS_None, // XVSRLRNI_W_D |
| 9610 | CEFBS_None, // XVSRLRN_B_H |
| 9611 | CEFBS_None, // XVSRLRN_H_W |
| 9612 | CEFBS_None, // XVSRLRN_W_D |
| 9613 | CEFBS_None, // XVSRLR_B |
| 9614 | CEFBS_None, // XVSRLR_D |
| 9615 | CEFBS_None, // XVSRLR_H |
| 9616 | CEFBS_None, // XVSRLR_W |
| 9617 | CEFBS_None, // XVSRL_B |
| 9618 | CEFBS_None, // XVSRL_D |
| 9619 | CEFBS_None, // XVSRL_H |
| 9620 | CEFBS_None, // XVSRL_W |
| 9621 | CEFBS_None, // XVSSRANI_BU_H |
| 9622 | CEFBS_None, // XVSSRANI_B_H |
| 9623 | CEFBS_None, // XVSSRANI_DU_Q |
| 9624 | CEFBS_None, // XVSSRANI_D_Q |
| 9625 | CEFBS_None, // XVSSRANI_HU_W |
| 9626 | CEFBS_None, // XVSSRANI_H_W |
| 9627 | CEFBS_None, // XVSSRANI_WU_D |
| 9628 | CEFBS_None, // XVSSRANI_W_D |
| 9629 | CEFBS_None, // XVSSRAN_BU_H |
| 9630 | CEFBS_None, // XVSSRAN_B_H |
| 9631 | CEFBS_None, // XVSSRAN_HU_W |
| 9632 | CEFBS_None, // XVSSRAN_H_W |
| 9633 | CEFBS_None, // XVSSRAN_WU_D |
| 9634 | CEFBS_None, // XVSSRAN_W_D |
| 9635 | CEFBS_None, // XVSSRARNI_BU_H |
| 9636 | CEFBS_None, // XVSSRARNI_B_H |
| 9637 | CEFBS_None, // XVSSRARNI_DU_Q |
| 9638 | CEFBS_None, // XVSSRARNI_D_Q |
| 9639 | CEFBS_None, // XVSSRARNI_HU_W |
| 9640 | CEFBS_None, // XVSSRARNI_H_W |
| 9641 | CEFBS_None, // XVSSRARNI_WU_D |
| 9642 | CEFBS_None, // XVSSRARNI_W_D |
| 9643 | CEFBS_None, // XVSSRARN_BU_H |
| 9644 | CEFBS_None, // XVSSRARN_B_H |
| 9645 | CEFBS_None, // XVSSRARN_HU_W |
| 9646 | CEFBS_None, // XVSSRARN_H_W |
| 9647 | CEFBS_None, // XVSSRARN_WU_D |
| 9648 | CEFBS_None, // XVSSRARN_W_D |
| 9649 | CEFBS_None, // XVSSRLNI_BU_H |
| 9650 | CEFBS_None, // XVSSRLNI_B_H |
| 9651 | CEFBS_None, // XVSSRLNI_DU_Q |
| 9652 | CEFBS_None, // XVSSRLNI_D_Q |
| 9653 | CEFBS_None, // XVSSRLNI_HU_W |
| 9654 | CEFBS_None, // XVSSRLNI_H_W |
| 9655 | CEFBS_None, // XVSSRLNI_WU_D |
| 9656 | CEFBS_None, // XVSSRLNI_W_D |
| 9657 | CEFBS_None, // XVSSRLN_BU_H |
| 9658 | CEFBS_None, // XVSSRLN_B_H |
| 9659 | CEFBS_None, // XVSSRLN_HU_W |
| 9660 | CEFBS_None, // XVSSRLN_H_W |
| 9661 | CEFBS_None, // XVSSRLN_WU_D |
| 9662 | CEFBS_None, // XVSSRLN_W_D |
| 9663 | CEFBS_None, // XVSSRLRNI_BU_H |
| 9664 | CEFBS_None, // XVSSRLRNI_B_H |
| 9665 | CEFBS_None, // XVSSRLRNI_DU_Q |
| 9666 | CEFBS_None, // XVSSRLRNI_D_Q |
| 9667 | CEFBS_None, // XVSSRLRNI_HU_W |
| 9668 | CEFBS_None, // XVSSRLRNI_H_W |
| 9669 | CEFBS_None, // XVSSRLRNI_WU_D |
| 9670 | CEFBS_None, // XVSSRLRNI_W_D |
| 9671 | CEFBS_None, // XVSSRLRN_BU_H |
| 9672 | CEFBS_None, // XVSSRLRN_B_H |
| 9673 | CEFBS_None, // XVSSRLRN_HU_W |
| 9674 | CEFBS_None, // XVSSRLRN_H_W |
| 9675 | CEFBS_None, // XVSSRLRN_WU_D |
| 9676 | CEFBS_None, // XVSSRLRN_W_D |
| 9677 | CEFBS_None, // XVSSUB_B |
| 9678 | CEFBS_None, // XVSSUB_BU |
| 9679 | CEFBS_None, // XVSSUB_D |
| 9680 | CEFBS_None, // XVSSUB_DU |
| 9681 | CEFBS_None, // XVSSUB_H |
| 9682 | CEFBS_None, // XVSSUB_HU |
| 9683 | CEFBS_None, // XVSSUB_W |
| 9684 | CEFBS_None, // XVSSUB_WU |
| 9685 | CEFBS_None, // XVST |
| 9686 | CEFBS_None, // XVSTELM_B |
| 9687 | CEFBS_None, // XVSTELM_D |
| 9688 | CEFBS_None, // XVSTELM_H |
| 9689 | CEFBS_None, // XVSTELM_W |
| 9690 | CEFBS_None, // XVSTX |
| 9691 | CEFBS_None, // XVSUBI_BU |
| 9692 | CEFBS_None, // XVSUBI_DU |
| 9693 | CEFBS_None, // XVSUBI_HU |
| 9694 | CEFBS_None, // XVSUBI_WU |
| 9695 | CEFBS_None, // XVSUBWEV_D_W |
| 9696 | CEFBS_None, // XVSUBWEV_D_WU |
| 9697 | CEFBS_None, // XVSUBWEV_H_B |
| 9698 | CEFBS_None, // XVSUBWEV_H_BU |
| 9699 | CEFBS_None, // XVSUBWEV_Q_D |
| 9700 | CEFBS_None, // XVSUBWEV_Q_DU |
| 9701 | CEFBS_None, // XVSUBWEV_W_H |
| 9702 | CEFBS_None, // XVSUBWEV_W_HU |
| 9703 | CEFBS_None, // XVSUBWOD_D_W |
| 9704 | CEFBS_None, // XVSUBWOD_D_WU |
| 9705 | CEFBS_None, // XVSUBWOD_H_B |
| 9706 | CEFBS_None, // XVSUBWOD_H_BU |
| 9707 | CEFBS_None, // XVSUBWOD_Q_D |
| 9708 | CEFBS_None, // XVSUBWOD_Q_DU |
| 9709 | CEFBS_None, // XVSUBWOD_W_H |
| 9710 | CEFBS_None, // XVSUBWOD_W_HU |
| 9711 | CEFBS_None, // XVSUB_B |
| 9712 | CEFBS_None, // XVSUB_D |
| 9713 | CEFBS_None, // XVSUB_H |
| 9714 | CEFBS_None, // XVSUB_Q |
| 9715 | CEFBS_None, // XVSUB_W |
| 9716 | CEFBS_None, // XVXORI_B |
| 9717 | CEFBS_None, // XVXOR_V |
| 9718 | }; |
| 9719 | |
| 9720 | assert(Opcode < 2485); |
| 9721 | return FeatureBitsets[RequiredFeaturesRefs[Opcode]]; |
| 9722 | } |
| 9723 | |
| 9724 | |
| 9725 | } // namespace llvm::LoongArch_MC |
| 9726 | |
| 9727 | #endif // GET_COMPUTE_FEATURES |
| 9728 | |
| 9729 | #ifdef GET_AVAILABLE_OPCODE_CHECKER |
| 9730 | #undef GET_AVAILABLE_OPCODE_CHECKER |
| 9731 | |
| 9732 | namespace llvm::LoongArch_MC { |
| 9733 | |
| 9734 | bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) { |
| 9735 | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
| 9736 | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
| 9737 | FeatureBitset MissingFeatures = |
| 9738 | (AvailableFeatures & RequiredFeatures) ^ |
| 9739 | RequiredFeatures; |
| 9740 | return !MissingFeatures.any(); |
| 9741 | } |
| 9742 | |
| 9743 | } // namespace llvm::LoongArch_MC |
| 9744 | |
| 9745 | #endif // GET_AVAILABLE_OPCODE_CHECKER |
| 9746 | |
| 9747 | #ifdef ENABLE_INSTR_PREDICATE_VERIFIER |
| 9748 | #undef ENABLE_INSTR_PREDICATE_VERIFIER |
| 9749 | |
| 9750 | #include <sstream> |
| 9751 | |
| 9752 | namespace llvm::LoongArch_MC { |
| 9753 | |
| 9754 | #ifndef NDEBUG |
| 9755 | static const char *SubtargetFeatureNames[] = { |
| 9756 | "Feature_HasLaGlobalWithAbs", |
| 9757 | "Feature_HasLaGlobalWithPcrel", |
| 9758 | "Feature_HasLaLocalWithAbs", |
| 9759 | "Feature_IsLA32", |
| 9760 | "Feature_IsLA64", |
| 9761 | nullptr |
| 9762 | }; |
| 9763 | |
| 9764 | #endif // NDEBUG |
| 9765 | |
| 9766 | void verifyInstructionPredicates( |
| 9767 | unsigned Opcode, const FeatureBitset &Features) { |
| 9768 | #ifndef NDEBUG |
| 9769 | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
| 9770 | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
| 9771 | FeatureBitset MissingFeatures = |
| 9772 | (AvailableFeatures & RequiredFeatures) ^ |
| 9773 | RequiredFeatures; |
| 9774 | if (MissingFeatures.any()) { |
| 9775 | std::ostringstream Msg; |
| 9776 | Msg << "Attempting to emit "<< &LoongArchInstrNameData[LoongArchInstrNameIndices[Opcode]] |
| 9777 | << " instruction but the "; |
| 9778 | for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i) |
| 9779 | if (MissingFeatures.test(i)) |
| 9780 | Msg << SubtargetFeatureNames[i] << " "; |
| 9781 | Msg << "predicate(s) are not met"; |
| 9782 | report_fatal_error(Msg.str().c_str()); |
| 9783 | } |
| 9784 | #endif // NDEBUG |
| 9785 | } |
| 9786 | |
| 9787 | } // namespace llvm::LoongArch_MC |
| 9788 | |
| 9789 | #endif // ENABLE_INSTR_PREDICATE_VERIFIER |
| 9790 | |
| 9791 |
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