| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Register Information Header Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 10 | |
| 11 | namespace llvm { |
| 12 | |
| 13 | class LoongArchFrameLowering; |
| 14 | |
| 15 | struct LoongArchGenRegisterInfo : public TargetRegisterInfo { |
| 16 | explicit LoongArchGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0, |
| 17 | unsigned PC = 0, unsigned HwMode = 0); |
| 18 | unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 19 | unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 20 | LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 21 | LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 22 | const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override; |
| 23 | const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override; |
| 24 | const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override; |
| 25 | unsigned getRegUnitWeight(MCRegUnit RegUnit) const override; |
| 26 | unsigned getNumRegPressureSets() const override; |
| 27 | const char *getRegPressureSetName(unsigned Idx) const override; |
| 28 | unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override; |
| 29 | const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override; |
| 30 | const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override; |
| 31 | ArrayRef<const char *> getRegMaskNames() const override; |
| 32 | ArrayRef<const uint32_t *> getRegMasks() const override; |
| 33 | bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override; |
| 34 | bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override; |
| 35 | bool isFixedRegister(const MachineFunction &, MCRegister) const override; |
| 36 | bool isArgumentRegister(const MachineFunction &, MCRegister) const override; |
| 37 | bool isConstantPhysReg(MCRegister PhysReg) const override final; |
| 38 | /// Devirtualized TargetFrameLowering. |
| 39 | static const LoongArchFrameLowering *getFrameLowering( |
| 40 | const MachineFunction &MF); |
| 41 | }; |
| 42 | |
| 43 | namespace LoongArch { // Register classes |
| 44 | extern const TargetRegisterClass FPR32RegClass; |
| 45 | extern const TargetRegisterClass GPRRegClass; |
| 46 | extern const TargetRegisterClass GPRJRRegClass; |
| 47 | extern const TargetRegisterClass GPRNoR0R1RegClass; |
| 48 | extern const TargetRegisterClass GPRTRegClass; |
| 49 | extern const TargetRegisterClass CFRRegClass; |
| 50 | extern const TargetRegisterClass FCSRRegClass; |
| 51 | extern const TargetRegisterClass SCRRegClass; |
| 52 | extern const TargetRegisterClass FPR64RegClass; |
| 53 | extern const TargetRegisterClass LSX128RegClass; |
| 54 | extern const TargetRegisterClass LASX256RegClass; |
| 55 | } // end namespace LoongArch |
| 56 | |
| 57 | } // end namespace llvm |
| 58 | |
| 59 | |