1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register Enum Values *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11class MCRegisterClass;
12const MCRegisterClass &getMipsMCRegisterClass(unsigned RC);
13namespace Mips {
14
15enum : unsigned {
16 NoRegister,
17 DSPCCond = 1,
18 DSPCarry = 2,
19 DSPEFI = 3,
20 DSPOutFlag = 4,
21 DSPPos = 5,
22 DSPSCount = 6,
23 MSAAccess = 7,
24 MSACSR = 8,
25 MSAIR = 9,
26 MSAMap = 10,
27 MSAModify = 11,
28 MSARequest = 12,
29 MSASave = 13,
30 MSAUnmap = 14,
31 PC = 15,
32 AC0 = 16,
33 AC1 = 17,
34 AC2 = 18,
35 AC3 = 19,
36 COP00 = 20,
37 COP01 = 21,
38 COP02 = 22,
39 COP03 = 23,
40 COP04 = 24,
41 COP05 = 25,
42 COP06 = 26,
43 COP07 = 27,
44 COP08 = 28,
45 COP09 = 29,
46 COP20 = 30,
47 COP21 = 31,
48 COP22 = 32,
49 COP23 = 33,
50 COP24 = 34,
51 COP25 = 35,
52 COP26 = 36,
53 COP27 = 37,
54 COP28 = 38,
55 COP29 = 39,
56 COP30 = 40,
57 COP31 = 41,
58 COP32 = 42,
59 COP33 = 43,
60 COP34 = 44,
61 COP35 = 45,
62 COP36 = 46,
63 COP37 = 47,
64 COP38 = 48,
65 COP39 = 49,
66 COP010 = 50,
67 COP011 = 51,
68 COP012 = 52,
69 COP013 = 53,
70 COP014 = 54,
71 COP015 = 55,
72 COP016 = 56,
73 COP017 = 57,
74 COP018 = 58,
75 COP019 = 59,
76 COP020 = 60,
77 COP021 = 61,
78 COP022 = 62,
79 COP023 = 63,
80 COP024 = 64,
81 COP025 = 65,
82 COP026 = 66,
83 COP027 = 67,
84 COP028 = 68,
85 COP029 = 69,
86 COP030 = 70,
87 COP031 = 71,
88 COP210 = 72,
89 COP211 = 73,
90 COP212 = 74,
91 COP213 = 75,
92 COP214 = 76,
93 COP215 = 77,
94 COP216 = 78,
95 COP217 = 79,
96 COP218 = 80,
97 COP219 = 81,
98 COP220 = 82,
99 COP221 = 83,
100 COP222 = 84,
101 COP223 = 85,
102 COP224 = 86,
103 COP225 = 87,
104 COP226 = 88,
105 COP227 = 89,
106 COP228 = 90,
107 COP229 = 91,
108 COP230 = 92,
109 COP231 = 93,
110 COP310 = 94,
111 COP311 = 95,
112 COP312 = 96,
113 COP313 = 97,
114 COP314 = 98,
115 COP315 = 99,
116 COP316 = 100,
117 COP317 = 101,
118 COP318 = 102,
119 COP319 = 103,
120 COP320 = 104,
121 COP321 = 105,
122 COP322 = 106,
123 COP323 = 107,
124 COP324 = 108,
125 COP325 = 109,
126 COP326 = 110,
127 COP327 = 111,
128 COP328 = 112,
129 COP329 = 113,
130 COP330 = 114,
131 COP331 = 115,
132 D0 = 116,
133 D1 = 117,
134 D2 = 118,
135 D3 = 119,
136 D4 = 120,
137 D5 = 121,
138 D6 = 122,
139 D7 = 123,
140 D8 = 124,
141 D9 = 125,
142 D10 = 126,
143 D11 = 127,
144 D12 = 128,
145 D13 = 129,
146 D14 = 130,
147 D15 = 131,
148 DSPOutFlag20 = 132,
149 DSPOutFlag21 = 133,
150 DSPOutFlag22 = 134,
151 DSPOutFlag23 = 135,
152 F0 = 136,
153 F1 = 137,
154 F2 = 138,
155 F3 = 139,
156 F4 = 140,
157 F5 = 141,
158 F6 = 142,
159 F7 = 143,
160 F8 = 144,
161 F9 = 145,
162 F10 = 146,
163 F11 = 147,
164 F12 = 148,
165 F13 = 149,
166 F14 = 150,
167 F15 = 151,
168 F16 = 152,
169 F17 = 153,
170 F18 = 154,
171 F19 = 155,
172 F20 = 156,
173 F21 = 157,
174 F22 = 158,
175 F23 = 159,
176 F24 = 160,
177 F25 = 161,
178 F26 = 162,
179 F27 = 163,
180 F28 = 164,
181 F29 = 165,
182 F30 = 166,
183 F31 = 167,
184 FCC0 = 168,
185 FCC1 = 169,
186 FCC2 = 170,
187 FCC3 = 171,
188 FCC4 = 172,
189 FCC5 = 173,
190 FCC6 = 174,
191 FCC7 = 175,
192 FCR0 = 176,
193 FCR1 = 177,
194 FCR2 = 178,
195 FCR3 = 179,
196 FCR4 = 180,
197 FCR5 = 181,
198 FCR6 = 182,
199 FCR7 = 183,
200 FCR8 = 184,
201 FCR9 = 185,
202 FCR10 = 186,
203 FCR11 = 187,
204 FCR12 = 188,
205 FCR13 = 189,
206 FCR14 = 190,
207 FCR15 = 191,
208 FCR16 = 192,
209 FCR17 = 193,
210 FCR18 = 194,
211 FCR19 = 195,
212 FCR20 = 196,
213 FCR21 = 197,
214 FCR22 = 198,
215 FCR23 = 199,
216 FCR24 = 200,
217 FCR25 = 201,
218 FCR26 = 202,
219 FCR27 = 203,
220 FCR28 = 204,
221 FCR29 = 205,
222 FCR30 = 206,
223 FCR31 = 207,
224 F_HI0 = 208,
225 F_HI1 = 209,
226 F_HI2 = 210,
227 F_HI3 = 211,
228 F_HI4 = 212,
229 F_HI5 = 213,
230 F_HI6 = 214,
231 F_HI7 = 215,
232 F_HI8 = 216,
233 F_HI9 = 217,
234 F_HI10 = 218,
235 F_HI11 = 219,
236 F_HI12 = 220,
237 F_HI13 = 221,
238 F_HI14 = 222,
239 F_HI15 = 223,
240 F_HI16 = 224,
241 F_HI17 = 225,
242 F_HI18 = 226,
243 F_HI19 = 227,
244 F_HI20 = 228,
245 F_HI21 = 229,
246 F_HI22 = 230,
247 F_HI23 = 231,
248 F_HI24 = 232,
249 F_HI25 = 233,
250 F_HI26 = 234,
251 F_HI27 = 235,
252 F_HI28 = 236,
253 F_HI29 = 237,
254 F_HI30 = 238,
255 F_HI31 = 239,
256 HI0 = 240,
257 HI1 = 241,
258 HI2 = 242,
259 HI3 = 243,
260 HWR0 = 244,
261 HWR1 = 245,
262 HWR2 = 246,
263 HWR3 = 247,
264 HWR4 = 248,
265 HWR5 = 249,
266 HWR6 = 250,
267 HWR7 = 251,
268 HWR8 = 252,
269 HWR9 = 253,
270 HWR10 = 254,
271 HWR11 = 255,
272 HWR12 = 256,
273 HWR13 = 257,
274 HWR14 = 258,
275 HWR15 = 259,
276 HWR16 = 260,
277 HWR17 = 261,
278 HWR18 = 262,
279 HWR19 = 263,
280 HWR20 = 264,
281 HWR21 = 265,
282 HWR22 = 266,
283 HWR23 = 267,
284 HWR24 = 268,
285 HWR25 = 269,
286 HWR26 = 270,
287 HWR27 = 271,
288 HWR28 = 272,
289 HWR29 = 273,
290 HWR30 = 274,
291 HWR31 = 275,
292 LO0 = 276,
293 LO1 = 277,
294 LO2 = 278,
295 LO3 = 279,
296 MPL0 = 280,
297 MPL1 = 281,
298 MPL2 = 282,
299 MSA8 = 283,
300 MSA9 = 284,
301 MSA10 = 285,
302 MSA11 = 286,
303 MSA12 = 287,
304 MSA13 = 288,
305 MSA14 = 289,
306 MSA15 = 290,
307 MSA16 = 291,
308 MSA17 = 292,
309 MSA18 = 293,
310 MSA19 = 294,
311 MSA20 = 295,
312 MSA21 = 296,
313 MSA22 = 297,
314 MSA23 = 298,
315 MSA24 = 299,
316 MSA25 = 300,
317 MSA26 = 301,
318 MSA27 = 302,
319 MSA28 = 303,
320 MSA29 = 304,
321 MSA30 = 305,
322 MSA31 = 306,
323 P0 = 307,
324 P1 = 308,
325 P2 = 309,
326 R0 = 310,
327 R1 = 311,
328 R2 = 312,
329 R3 = 313,
330 R4 = 314,
331 R5 = 315,
332 R6 = 316,
333 R7 = 317,
334 R8 = 318,
335 R9 = 319,
336 R10 = 320,
337 R11 = 321,
338 R12 = 322,
339 R13 = 323,
340 R14 = 324,
341 R15 = 325,
342 R16 = 326,
343 R17 = 327,
344 R18 = 328,
345 R19 = 329,
346 R20 = 330,
347 R21 = 331,
348 R22 = 332,
349 R23 = 333,
350 R24 = 334,
351 R25 = 335,
352 R26 = 336,
353 R27 = 337,
354 R28 = 338,
355 R29 = 339,
356 R30 = 340,
357 R31 = 341,
358 W0 = 342,
359 W1 = 343,
360 W2 = 344,
361 W3 = 345,
362 W4 = 346,
363 W5 = 347,
364 W6 = 348,
365 W7 = 349,
366 W8 = 350,
367 W9 = 351,
368 W10 = 352,
369 W11 = 353,
370 W12 = 354,
371 W13 = 355,
372 W14 = 356,
373 W15 = 357,
374 W16 = 358,
375 W17 = 359,
376 W18 = 360,
377 W19 = 361,
378 W20 = 362,
379 W21 = 363,
380 W22 = 364,
381 W23 = 365,
382 W24 = 366,
383 W25 = 367,
384 W26 = 368,
385 W27 = 369,
386 W28 = 370,
387 W29 = 371,
388 W30 = 372,
389 W31 = 373,
390 AC0_64 = 374,
391 D0_64 = 375,
392 D1_64 = 376,
393 D2_64 = 377,
394 D3_64 = 378,
395 D4_64 = 379,
396 D5_64 = 380,
397 D6_64 = 381,
398 D7_64 = 382,
399 D8_64 = 383,
400 D9_64 = 384,
401 D10_64 = 385,
402 D11_64 = 386,
403 D12_64 = 387,
404 D13_64 = 388,
405 D14_64 = 389,
406 D15_64 = 390,
407 D16_64 = 391,
408 D17_64 = 392,
409 D18_64 = 393,
410 D19_64 = 394,
411 D20_64 = 395,
412 D21_64 = 396,
413 D22_64 = 397,
414 D23_64 = 398,
415 D24_64 = 399,
416 D25_64 = 400,
417 D26_64 = 401,
418 D27_64 = 402,
419 D28_64 = 403,
420 D29_64 = 404,
421 D30_64 = 405,
422 D31_64 = 406,
423 DSPOutFlag16_19 = 407,
424 HI0_64 = 408,
425 LO0_64 = 409,
426 R0_64 = 410,
427 R1_64 = 411,
428 R2_64 = 412,
429 R3_64 = 413,
430 R4_64 = 414,
431 R5_64 = 415,
432 R6_64 = 416,
433 R7_64 = 417,
434 R8_64 = 418,
435 R9_64 = 419,
436 R10_64 = 420,
437 R11_64 = 421,
438 R12_64 = 422,
439 R13_64 = 423,
440 R14_64 = 424,
441 R15_64 = 425,
442 R16_64 = 426,
443 R17_64 = 427,
444 R18_64 = 428,
445 R19_64 = 429,
446 R20_64 = 430,
447 R21_64 = 431,
448 R22_64 = 432,
449 R23_64 = 433,
450 R24_64 = 434,
451 R25_64 = 435,
452 R26_64 = 436,
453 R27_64 = 437,
454 R28_64 = 438,
455 R29_64 = 439,
456 R30_64 = 440,
457 R31_64 = 441,
458 NUM_TARGET_REGS // 442
459};
460
461} // namespace Mips
462
463// Register classes
464
465namespace Mips {
466
467enum {
468 CCRRegClassID = 0,
469 COP0RegClassID = 1,
470 COP2RegClassID = 2,
471 COP3RegClassID = 3,
472 DSPRRegClassID = 4,
473 FGR32RegClassID = 5,
474 GPR32RegClassID = 6,
475 HWRegsRegClassID = 7,
476 MSACtrlRegClassID = 8,
477 GPR32NONZERORegClassID = 9,
478 CPU16RegsPlusSPRegClassID = 10,
479 CPU16RegsRegClassID = 11,
480 FCCRegClassID = 12,
481 GPRMM16RegClassID = 13,
482 GPRMM16MovePRegClassID = 14,
483 GPRMM16ZeroRegClassID = 15,
484 CPU16Regs_and_GPRMM16ZeroRegClassID = 16,
485 GPR32NONZERO_and_GPRMM16MovePRegClassID = 17,
486 GPRMM16MovePPairSecondRegClassID = 18,
487 CPU16Regs_and_GPRMM16MovePRegClassID = 19,
488 GPRMM16MoveP_and_GPRMM16ZeroRegClassID = 20,
489 HI32DSPRegClassID = 21,
490 LO32DSPRegClassID = 22,
491 CPU16Regs_and_GPRMM16MovePPairSecondRegClassID = 23,
492 GPRMM16MovePPairFirstRegClassID = 24,
493 GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID = 25,
494 GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClassID = 26,
495 CPURARegRegClassID = 27,
496 CPUSPRegRegClassID = 28,
497 DSPCCRegClassID = 29,
498 GP32RegClassID = 30,
499 GPR32ZERORegClassID = 31,
500 HI32RegClassID = 32,
501 LO32RegClassID = 33,
502 SP32RegClassID = 34,
503 FGR64RegClassID = 35,
504 GPR64RegClassID = 36,
505 GPR64_with_sub_32_in_GPR32NONZERORegClassID = 37,
506 AFGR64RegClassID = 38,
507 GPR64_with_sub_32_in_CPU16RegsPlusSPRegClassID = 39,
508 GPR64_with_sub_32_in_CPU16RegsRegClassID = 40,
509 GPR64_with_sub_32_in_GPRMM16MovePRegClassID = 41,
510 GPR64_with_sub_32_in_GPRMM16ZeroRegClassID = 42,
511 GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroRegClassID = 43,
512 GPR64_with_sub_32_in_GPR32NONZERO_and_GPRMM16MovePRegClassID = 44,
513 GPR64_with_sub_32_in_GPRMM16MovePPairSecondRegClassID = 45,
514 ACC64DSPRegClassID = 46,
515 GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePRegClassID = 47,
516 GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClassID = 48,
517 GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePPairSecondRegClassID = 49,
518 GPR64_with_sub_32_in_GPRMM16MovePPairFirstRegClassID = 50,
519 GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID = 51,
520 OCTEON_MPLRegClassID = 52,
521 OCTEON_PRegClassID = 53,
522 GPR64_with_sub_32_in_GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClassID = 54,
523 ACC64RegClassID = 55,
524 GP64RegClassID = 56,
525 GPR64_with_sub_32_in_CPURARegRegClassID = 57,
526 GPR64_with_sub_32_in_GPR32ZERORegClassID = 58,
527 HI64RegClassID = 59,
528 LO64RegClassID = 60,
529 SP64RegClassID = 61,
530 MSA128BRegClassID = 62,
531 MSA128DRegClassID = 63,
532 MSA128HRegClassID = 64,
533 MSA128WRegClassID = 65,
534 MSA128WEvensRegClassID = 66,
535 ACC128RegClassID = 67,
536
537};
538
539} // namespace Mips
540
541// Register alternate name indices
542
543namespace Mips {
544
545enum {
546 NABIRegAltName, // 0
547 NoRegAltName, // 1
548 OABIRegAltName, // 2
549 PABIRegAltName, // 3
550 RegAliasName, // 4
551 NUM_TARGET_REG_ALT_NAMES = 5
552};
553
554} // namespace Mips
555
556// Subregister indices
557
558namespace Mips {
559
560enum : uint16_t {
561 NoSubRegister,
562 sub_32, // 1
563 sub_64, // 2
564 sub_dsp16_19, // 3
565 sub_dsp20, // 4
566 sub_dsp21, // 5
567 sub_dsp22, // 6
568 sub_dsp23, // 7
569 sub_hi, // 8
570 sub_lo, // 9
571 sub_hi_then_sub_32, // 10
572 sub_32_sub_hi_then_sub_32, // 11
573 NUM_TARGET_SUBREGS
574};
575
576} // namespace Mips
577// Register pressure sets enum.
578namespace Mips {
579
580enum RegisterPressureSets {
581 DSPCC = 0,
582 GPR32ZERO = 1,
583 GPR64_with_sub_32_in_CPURAReg = 2,
584 HI32 = 3,
585 GPRMM16MovePPairFirst = 4,
586 CPU16Regs_and_GPRMM16MoveP = 5,
587 HI32DSP = 6,
588 LO32DSP = 7,
589 GPRMM16MovePPairSecond = 8,
590 GPRMM16MoveP = 9,
591 ACC64DSP = 10,
592 CPU16Regs = 11,
593 GPRMM16Zero_with_GPRMM16MovePPairSecond = 12,
594 CPU16Regs_with_GPRMM16MovePPairSecond = 13,
595 CPU16Regs_with_GPRMM16MoveP = 14,
596 DSPR = 15,
597 FGR32 = 16,
598 MSA128WEvens = 17,
599 FGR32_with_MSA128WEvens = 18,
600 FGR64 = 19,
601};
602
603} // namespace Mips
604
605} // namespace llvm
606