1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register Enum Values *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11class MCRegisterClass;
12extern const MCRegisterClass MipsMCRegisterClasses[];
13
14namespace Mips {
15enum : unsigned {
16 NoRegister,
17 AT = 1,
18 DSPCCond = 2,
19 DSPCarry = 3,
20 DSPEFI = 4,
21 DSPOutFlag = 5,
22 DSPPos = 6,
23 DSPSCount = 7,
24 FP = 8,
25 GP = 9,
26 MSAAccess = 10,
27 MSACSR = 11,
28 MSAIR = 12,
29 MSAMap = 13,
30 MSAModify = 14,
31 MSARequest = 15,
32 MSASave = 16,
33 MSAUnmap = 17,
34 PC = 18,
35 RA = 19,
36 SP = 20,
37 ZERO = 21,
38 A0 = 22,
39 A1 = 23,
40 A2 = 24,
41 A3 = 25,
42 AC0 = 26,
43 AC1 = 27,
44 AC2 = 28,
45 AC3 = 29,
46 AT_64 = 30,
47 COP00 = 31,
48 COP01 = 32,
49 COP02 = 33,
50 COP03 = 34,
51 COP04 = 35,
52 COP05 = 36,
53 COP06 = 37,
54 COP07 = 38,
55 COP08 = 39,
56 COP09 = 40,
57 COP20 = 41,
58 COP21 = 42,
59 COP22 = 43,
60 COP23 = 44,
61 COP24 = 45,
62 COP25 = 46,
63 COP26 = 47,
64 COP27 = 48,
65 COP28 = 49,
66 COP29 = 50,
67 COP30 = 51,
68 COP31 = 52,
69 COP32 = 53,
70 COP33 = 54,
71 COP34 = 55,
72 COP35 = 56,
73 COP36 = 57,
74 COP37 = 58,
75 COP38 = 59,
76 COP39 = 60,
77 COP010 = 61,
78 COP011 = 62,
79 COP012 = 63,
80 COP013 = 64,
81 COP014 = 65,
82 COP015 = 66,
83 COP016 = 67,
84 COP017 = 68,
85 COP018 = 69,
86 COP019 = 70,
87 COP020 = 71,
88 COP021 = 72,
89 COP022 = 73,
90 COP023 = 74,
91 COP024 = 75,
92 COP025 = 76,
93 COP026 = 77,
94 COP027 = 78,
95 COP028 = 79,
96 COP029 = 80,
97 COP030 = 81,
98 COP031 = 82,
99 COP210 = 83,
100 COP211 = 84,
101 COP212 = 85,
102 COP213 = 86,
103 COP214 = 87,
104 COP215 = 88,
105 COP216 = 89,
106 COP217 = 90,
107 COP218 = 91,
108 COP219 = 92,
109 COP220 = 93,
110 COP221 = 94,
111 COP222 = 95,
112 COP223 = 96,
113 COP224 = 97,
114 COP225 = 98,
115 COP226 = 99,
116 COP227 = 100,
117 COP228 = 101,
118 COP229 = 102,
119 COP230 = 103,
120 COP231 = 104,
121 COP310 = 105,
122 COP311 = 106,
123 COP312 = 107,
124 COP313 = 108,
125 COP314 = 109,
126 COP315 = 110,
127 COP316 = 111,
128 COP317 = 112,
129 COP318 = 113,
130 COP319 = 114,
131 COP320 = 115,
132 COP321 = 116,
133 COP322 = 117,
134 COP323 = 118,
135 COP324 = 119,
136 COP325 = 120,
137 COP326 = 121,
138 COP327 = 122,
139 COP328 = 123,
140 COP329 = 124,
141 COP330 = 125,
142 COP331 = 126,
143 D0 = 127,
144 D1 = 128,
145 D2 = 129,
146 D3 = 130,
147 D4 = 131,
148 D5 = 132,
149 D6 = 133,
150 D7 = 134,
151 D8 = 135,
152 D9 = 136,
153 D10 = 137,
154 D11 = 138,
155 D12 = 139,
156 D13 = 140,
157 D14 = 141,
158 D15 = 142,
159 DSPOutFlag20 = 143,
160 DSPOutFlag21 = 144,
161 DSPOutFlag22 = 145,
162 DSPOutFlag23 = 146,
163 F0 = 147,
164 F1 = 148,
165 F2 = 149,
166 F3 = 150,
167 F4 = 151,
168 F5 = 152,
169 F6 = 153,
170 F7 = 154,
171 F8 = 155,
172 F9 = 156,
173 F10 = 157,
174 F11 = 158,
175 F12 = 159,
176 F13 = 160,
177 F14 = 161,
178 F15 = 162,
179 F16 = 163,
180 F17 = 164,
181 F18 = 165,
182 F19 = 166,
183 F20 = 167,
184 F21 = 168,
185 F22 = 169,
186 F23 = 170,
187 F24 = 171,
188 F25 = 172,
189 F26 = 173,
190 F27 = 174,
191 F28 = 175,
192 F29 = 176,
193 F30 = 177,
194 F31 = 178,
195 FCC0 = 179,
196 FCC1 = 180,
197 FCC2 = 181,
198 FCC3 = 182,
199 FCC4 = 183,
200 FCC5 = 184,
201 FCC6 = 185,
202 FCC7 = 186,
203 FCR0 = 187,
204 FCR1 = 188,
205 FCR2 = 189,
206 FCR3 = 190,
207 FCR4 = 191,
208 FCR5 = 192,
209 FCR6 = 193,
210 FCR7 = 194,
211 FCR8 = 195,
212 FCR9 = 196,
213 FCR10 = 197,
214 FCR11 = 198,
215 FCR12 = 199,
216 FCR13 = 200,
217 FCR14 = 201,
218 FCR15 = 202,
219 FCR16 = 203,
220 FCR17 = 204,
221 FCR18 = 205,
222 FCR19 = 206,
223 FCR20 = 207,
224 FCR21 = 208,
225 FCR22 = 209,
226 FCR23 = 210,
227 FCR24 = 211,
228 FCR25 = 212,
229 FCR26 = 213,
230 FCR27 = 214,
231 FCR28 = 215,
232 FCR29 = 216,
233 FCR30 = 217,
234 FCR31 = 218,
235 FP_64 = 219,
236 F_HI0 = 220,
237 F_HI1 = 221,
238 F_HI2 = 222,
239 F_HI3 = 223,
240 F_HI4 = 224,
241 F_HI5 = 225,
242 F_HI6 = 226,
243 F_HI7 = 227,
244 F_HI8 = 228,
245 F_HI9 = 229,
246 F_HI10 = 230,
247 F_HI11 = 231,
248 F_HI12 = 232,
249 F_HI13 = 233,
250 F_HI14 = 234,
251 F_HI15 = 235,
252 F_HI16 = 236,
253 F_HI17 = 237,
254 F_HI18 = 238,
255 F_HI19 = 239,
256 F_HI20 = 240,
257 F_HI21 = 241,
258 F_HI22 = 242,
259 F_HI23 = 243,
260 F_HI24 = 244,
261 F_HI25 = 245,
262 F_HI26 = 246,
263 F_HI27 = 247,
264 F_HI28 = 248,
265 F_HI29 = 249,
266 F_HI30 = 250,
267 F_HI31 = 251,
268 GP_64 = 252,
269 HI0 = 253,
270 HI1 = 254,
271 HI2 = 255,
272 HI3 = 256,
273 HWR0 = 257,
274 HWR1 = 258,
275 HWR2 = 259,
276 HWR3 = 260,
277 HWR4 = 261,
278 HWR5 = 262,
279 HWR6 = 263,
280 HWR7 = 264,
281 HWR8 = 265,
282 HWR9 = 266,
283 HWR10 = 267,
284 HWR11 = 268,
285 HWR12 = 269,
286 HWR13 = 270,
287 HWR14 = 271,
288 HWR15 = 272,
289 HWR16 = 273,
290 HWR17 = 274,
291 HWR18 = 275,
292 HWR19 = 276,
293 HWR20 = 277,
294 HWR21 = 278,
295 HWR22 = 279,
296 HWR23 = 280,
297 HWR24 = 281,
298 HWR25 = 282,
299 HWR26 = 283,
300 HWR27 = 284,
301 HWR28 = 285,
302 HWR29 = 286,
303 HWR30 = 287,
304 HWR31 = 288,
305 K0 = 289,
306 K1 = 290,
307 LO0 = 291,
308 LO1 = 292,
309 LO2 = 293,
310 LO3 = 294,
311 MPL0 = 295,
312 MPL1 = 296,
313 MPL2 = 297,
314 MSA8 = 298,
315 MSA9 = 299,
316 MSA10 = 300,
317 MSA11 = 301,
318 MSA12 = 302,
319 MSA13 = 303,
320 MSA14 = 304,
321 MSA15 = 305,
322 MSA16 = 306,
323 MSA17 = 307,
324 MSA18 = 308,
325 MSA19 = 309,
326 MSA20 = 310,
327 MSA21 = 311,
328 MSA22 = 312,
329 MSA23 = 313,
330 MSA24 = 314,
331 MSA25 = 315,
332 MSA26 = 316,
333 MSA27 = 317,
334 MSA28 = 318,
335 MSA29 = 319,
336 MSA30 = 320,
337 MSA31 = 321,
338 P0 = 322,
339 P1 = 323,
340 P2 = 324,
341 RA_64 = 325,
342 S0 = 326,
343 S1 = 327,
344 S2 = 328,
345 S3 = 329,
346 S4 = 330,
347 S5 = 331,
348 S6 = 332,
349 S7 = 333,
350 SP_64 = 334,
351 T0 = 335,
352 T1 = 336,
353 T2 = 337,
354 T3 = 338,
355 T4 = 339,
356 T5 = 340,
357 T6 = 341,
358 T7 = 342,
359 T8 = 343,
360 T9 = 344,
361 V0 = 345,
362 V1 = 346,
363 W0 = 347,
364 W1 = 348,
365 W2 = 349,
366 W3 = 350,
367 W4 = 351,
368 W5 = 352,
369 W6 = 353,
370 W7 = 354,
371 W8 = 355,
372 W9 = 356,
373 W10 = 357,
374 W11 = 358,
375 W12 = 359,
376 W13 = 360,
377 W14 = 361,
378 W15 = 362,
379 W16 = 363,
380 W17 = 364,
381 W18 = 365,
382 W19 = 366,
383 W20 = 367,
384 W21 = 368,
385 W22 = 369,
386 W23 = 370,
387 W24 = 371,
388 W25 = 372,
389 W26 = 373,
390 W27 = 374,
391 W28 = 375,
392 W29 = 376,
393 W30 = 377,
394 W31 = 378,
395 ZERO_64 = 379,
396 A0_64 = 380,
397 A1_64 = 381,
398 A2_64 = 382,
399 A3_64 = 383,
400 AC0_64 = 384,
401 D0_64 = 385,
402 D1_64 = 386,
403 D2_64 = 387,
404 D3_64 = 388,
405 D4_64 = 389,
406 D5_64 = 390,
407 D6_64 = 391,
408 D7_64 = 392,
409 D8_64 = 393,
410 D9_64 = 394,
411 D10_64 = 395,
412 D11_64 = 396,
413 D12_64 = 397,
414 D13_64 = 398,
415 D14_64 = 399,
416 D15_64 = 400,
417 D16_64 = 401,
418 D17_64 = 402,
419 D18_64 = 403,
420 D19_64 = 404,
421 D20_64 = 405,
422 D21_64 = 406,
423 D22_64 = 407,
424 D23_64 = 408,
425 D24_64 = 409,
426 D25_64 = 410,
427 D26_64 = 411,
428 D27_64 = 412,
429 D28_64 = 413,
430 D29_64 = 414,
431 D30_64 = 415,
432 D31_64 = 416,
433 DSPOutFlag16_19 = 417,
434 HI0_64 = 418,
435 K0_64 = 419,
436 K1_64 = 420,
437 LO0_64 = 421,
438 S0_64 = 422,
439 S1_64 = 423,
440 S2_64 = 424,
441 S3_64 = 425,
442 S4_64 = 426,
443 S5_64 = 427,
444 S6_64 = 428,
445 S7_64 = 429,
446 T0_64 = 430,
447 T1_64 = 431,
448 T2_64 = 432,
449 T3_64 = 433,
450 T4_64 = 434,
451 T5_64 = 435,
452 T6_64 = 436,
453 T7_64 = 437,
454 T8_64 = 438,
455 T9_64 = 439,
456 V0_64 = 440,
457 V1_64 = 441,
458 NUM_TARGET_REGS // 442
459};
460} // end namespace Mips
461
462// Register classes
463
464namespace Mips {
465enum {
466 MSA128F16RegClassID = 0,
467 CCRRegClassID = 1,
468 COP0RegClassID = 2,
469 COP2RegClassID = 3,
470 COP3RegClassID = 4,
471 DSPRRegClassID = 5,
472 FGR32RegClassID = 6,
473 FGR32CCRegClassID = 7,
474 GPR32RegClassID = 8,
475 HWRegsRegClassID = 9,
476 MSACtrlRegClassID = 10,
477 GPR32NONZERORegClassID = 11,
478 CPU16RegsPlusSPRegClassID = 12,
479 CPU16RegsRegClassID = 13,
480 FCCRegClassID = 14,
481 GPRMM16RegClassID = 15,
482 GPRMM16MovePRegClassID = 16,
483 GPRMM16ZeroRegClassID = 17,
484 CPU16Regs_and_GPRMM16ZeroRegClassID = 18,
485 GPR32NONZERO_and_GPRMM16MovePRegClassID = 19,
486 GPRMM16MovePPairSecondRegClassID = 20,
487 CPU16Regs_and_GPRMM16MovePRegClassID = 21,
488 GPRMM16MoveP_and_GPRMM16ZeroRegClassID = 22,
489 HI32DSPRegClassID = 23,
490 LO32DSPRegClassID = 24,
491 CPU16Regs_and_GPRMM16MovePPairSecondRegClassID = 25,
492 GPRMM16MovePPairFirstRegClassID = 26,
493 GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID = 27,
494 GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClassID = 28,
495 CPURARegRegClassID = 29,
496 CPUSPRegRegClassID = 30,
497 DSPCCRegClassID = 31,
498 GP32RegClassID = 32,
499 GPR32ZERORegClassID = 33,
500 HI32RegClassID = 34,
501 LO32RegClassID = 35,
502 SP32RegClassID = 36,
503 FGR64CCRegClassID = 37,
504 FGR64RegClassID = 38,
505 GPR64RegClassID = 39,
506 GPR64_with_sub_32_in_GPR32NONZERORegClassID = 40,
507 AFGR64RegClassID = 41,
508 GPR64_with_sub_32_in_CPU16RegsPlusSPRegClassID = 42,
509 GPR64_with_sub_32_in_CPU16RegsRegClassID = 43,
510 GPR64_with_sub_32_in_GPRMM16MovePRegClassID = 44,
511 GPR64_with_sub_32_in_GPRMM16ZeroRegClassID = 45,
512 GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroRegClassID = 46,
513 GPR64_with_sub_32_in_GPR32NONZERO_and_GPRMM16MovePRegClassID = 47,
514 GPR64_with_sub_32_in_GPRMM16MovePPairSecondRegClassID = 48,
515 ACC64DSPRegClassID = 49,
516 GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePRegClassID = 50,
517 GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClassID = 51,
518 GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePPairSecondRegClassID = 52,
519 GPR64_with_sub_32_in_GPRMM16MovePPairFirstRegClassID = 53,
520 GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID = 54,
521 OCTEON_MPLRegClassID = 55,
522 OCTEON_PRegClassID = 56,
523 GPR64_with_sub_32_in_GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClassID = 57,
524 ACC64RegClassID = 58,
525 GP64RegClassID = 59,
526 GPR64_with_sub_32_in_CPURARegRegClassID = 60,
527 GPR64_with_sub_32_in_GPR32ZERORegClassID = 61,
528 HI64RegClassID = 62,
529 LO64RegClassID = 63,
530 SP64RegClassID = 64,
531 MSA128BRegClassID = 65,
532 MSA128DRegClassID = 66,
533 MSA128HRegClassID = 67,
534 MSA128WRegClassID = 68,
535 MSA128WEvensRegClassID = 69,
536 ACC128RegClassID = 70,
537
538};
539} // end namespace Mips
540
541
542// Subregister indices
543
544namespace Mips {
545enum : uint16_t {
546 NoSubRegister,
547 sub_32, // 1
548 sub_64, // 2
549 sub_dsp16_19, // 3
550 sub_dsp20, // 4
551 sub_dsp21, // 5
552 sub_dsp22, // 6
553 sub_dsp23, // 7
554 sub_hi, // 8
555 sub_lo, // 9
556 sub_hi_then_sub_32, // 10
557 sub_32_sub_hi_then_sub_32, // 11
558 NUM_TARGET_SUBREGS
559};
560} // end namespace Mips
561
562// Register pressure sets enum.
563namespace Mips {
564enum RegisterPressureSets {
565 DSPCC = 0,
566 GPR32ZERO = 1,
567 GPR64_with_sub_32_in_CPURAReg = 2,
568 HI32 = 3,
569 GPRMM16MovePPairFirst = 4,
570 CPU16Regs_and_GPRMM16MoveP = 5,
571 HI32DSP = 6,
572 LO32DSP = 7,
573 GPRMM16MovePPairSecond = 8,
574 GPRMM16MoveP = 9,
575 ACC64DSP = 10,
576 CPU16Regs = 11,
577 GPRMM16Zero_with_GPRMM16MovePPairSecond = 12,
578 CPU16Regs_with_GPRMM16MovePPairSecond = 13,
579 CPU16Regs_with_GPRMM16MoveP = 14,
580 DSPR = 15,
581 FGR32 = 16,
582 MSA128WEvens = 17,
583 FGR32_with_MSA128WEvens = 18,
584 MSA128F16 = 19,
585};
586} // end namespace Mips
587
588} // end namespace llvm
589
590