1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register Enum Values *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11class MCRegisterClass;
12extern const MCRegisterClass MipsMCRegisterClasses[];
13
14namespace Mips {
15
16enum : unsigned {
17 NoRegister,
18 AT = 1,
19 DSPCCond = 2,
20 DSPCarry = 3,
21 DSPEFI = 4,
22 DSPOutFlag = 5,
23 DSPPos = 6,
24 DSPSCount = 7,
25 FP = 8,
26 GP = 9,
27 MSAAccess = 10,
28 MSACSR = 11,
29 MSAIR = 12,
30 MSAMap = 13,
31 MSAModify = 14,
32 MSARequest = 15,
33 MSASave = 16,
34 MSAUnmap = 17,
35 PC = 18,
36 RA = 19,
37 SP = 20,
38 ZERO = 21,
39 A0 = 22,
40 A1 = 23,
41 A2 = 24,
42 A3 = 25,
43 AC0 = 26,
44 AC1 = 27,
45 AC2 = 28,
46 AC3 = 29,
47 AT_64 = 30,
48 COP00 = 31,
49 COP01 = 32,
50 COP02 = 33,
51 COP03 = 34,
52 COP04 = 35,
53 COP05 = 36,
54 COP06 = 37,
55 COP07 = 38,
56 COP08 = 39,
57 COP09 = 40,
58 COP20 = 41,
59 COP21 = 42,
60 COP22 = 43,
61 COP23 = 44,
62 COP24 = 45,
63 COP25 = 46,
64 COP26 = 47,
65 COP27 = 48,
66 COP28 = 49,
67 COP29 = 50,
68 COP30 = 51,
69 COP31 = 52,
70 COP32 = 53,
71 COP33 = 54,
72 COP34 = 55,
73 COP35 = 56,
74 COP36 = 57,
75 COP37 = 58,
76 COP38 = 59,
77 COP39 = 60,
78 COP010 = 61,
79 COP011 = 62,
80 COP012 = 63,
81 COP013 = 64,
82 COP014 = 65,
83 COP015 = 66,
84 COP016 = 67,
85 COP017 = 68,
86 COP018 = 69,
87 COP019 = 70,
88 COP020 = 71,
89 COP021 = 72,
90 COP022 = 73,
91 COP023 = 74,
92 COP024 = 75,
93 COP025 = 76,
94 COP026 = 77,
95 COP027 = 78,
96 COP028 = 79,
97 COP029 = 80,
98 COP030 = 81,
99 COP031 = 82,
100 COP210 = 83,
101 COP211 = 84,
102 COP212 = 85,
103 COP213 = 86,
104 COP214 = 87,
105 COP215 = 88,
106 COP216 = 89,
107 COP217 = 90,
108 COP218 = 91,
109 COP219 = 92,
110 COP220 = 93,
111 COP221 = 94,
112 COP222 = 95,
113 COP223 = 96,
114 COP224 = 97,
115 COP225 = 98,
116 COP226 = 99,
117 COP227 = 100,
118 COP228 = 101,
119 COP229 = 102,
120 COP230 = 103,
121 COP231 = 104,
122 COP310 = 105,
123 COP311 = 106,
124 COP312 = 107,
125 COP313 = 108,
126 COP314 = 109,
127 COP315 = 110,
128 COP316 = 111,
129 COP317 = 112,
130 COP318 = 113,
131 COP319 = 114,
132 COP320 = 115,
133 COP321 = 116,
134 COP322 = 117,
135 COP323 = 118,
136 COP324 = 119,
137 COP325 = 120,
138 COP326 = 121,
139 COP327 = 122,
140 COP328 = 123,
141 COP329 = 124,
142 COP330 = 125,
143 COP331 = 126,
144 D0 = 127,
145 D1 = 128,
146 D2 = 129,
147 D3 = 130,
148 D4 = 131,
149 D5 = 132,
150 D6 = 133,
151 D7 = 134,
152 D8 = 135,
153 D9 = 136,
154 D10 = 137,
155 D11 = 138,
156 D12 = 139,
157 D13 = 140,
158 D14 = 141,
159 D15 = 142,
160 DSPOutFlag20 = 143,
161 DSPOutFlag21 = 144,
162 DSPOutFlag22 = 145,
163 DSPOutFlag23 = 146,
164 F0 = 147,
165 F1 = 148,
166 F2 = 149,
167 F3 = 150,
168 F4 = 151,
169 F5 = 152,
170 F6 = 153,
171 F7 = 154,
172 F8 = 155,
173 F9 = 156,
174 F10 = 157,
175 F11 = 158,
176 F12 = 159,
177 F13 = 160,
178 F14 = 161,
179 F15 = 162,
180 F16 = 163,
181 F17 = 164,
182 F18 = 165,
183 F19 = 166,
184 F20 = 167,
185 F21 = 168,
186 F22 = 169,
187 F23 = 170,
188 F24 = 171,
189 F25 = 172,
190 F26 = 173,
191 F27 = 174,
192 F28 = 175,
193 F29 = 176,
194 F30 = 177,
195 F31 = 178,
196 FCC0 = 179,
197 FCC1 = 180,
198 FCC2 = 181,
199 FCC3 = 182,
200 FCC4 = 183,
201 FCC5 = 184,
202 FCC6 = 185,
203 FCC7 = 186,
204 FCR0 = 187,
205 FCR1 = 188,
206 FCR2 = 189,
207 FCR3 = 190,
208 FCR4 = 191,
209 FCR5 = 192,
210 FCR6 = 193,
211 FCR7 = 194,
212 FCR8 = 195,
213 FCR9 = 196,
214 FCR10 = 197,
215 FCR11 = 198,
216 FCR12 = 199,
217 FCR13 = 200,
218 FCR14 = 201,
219 FCR15 = 202,
220 FCR16 = 203,
221 FCR17 = 204,
222 FCR18 = 205,
223 FCR19 = 206,
224 FCR20 = 207,
225 FCR21 = 208,
226 FCR22 = 209,
227 FCR23 = 210,
228 FCR24 = 211,
229 FCR25 = 212,
230 FCR26 = 213,
231 FCR27 = 214,
232 FCR28 = 215,
233 FCR29 = 216,
234 FCR30 = 217,
235 FCR31 = 218,
236 FP_64 = 219,
237 F_HI0 = 220,
238 F_HI1 = 221,
239 F_HI2 = 222,
240 F_HI3 = 223,
241 F_HI4 = 224,
242 F_HI5 = 225,
243 F_HI6 = 226,
244 F_HI7 = 227,
245 F_HI8 = 228,
246 F_HI9 = 229,
247 F_HI10 = 230,
248 F_HI11 = 231,
249 F_HI12 = 232,
250 F_HI13 = 233,
251 F_HI14 = 234,
252 F_HI15 = 235,
253 F_HI16 = 236,
254 F_HI17 = 237,
255 F_HI18 = 238,
256 F_HI19 = 239,
257 F_HI20 = 240,
258 F_HI21 = 241,
259 F_HI22 = 242,
260 F_HI23 = 243,
261 F_HI24 = 244,
262 F_HI25 = 245,
263 F_HI26 = 246,
264 F_HI27 = 247,
265 F_HI28 = 248,
266 F_HI29 = 249,
267 F_HI30 = 250,
268 F_HI31 = 251,
269 GP_64 = 252,
270 HI0 = 253,
271 HI1 = 254,
272 HI2 = 255,
273 HI3 = 256,
274 HWR0 = 257,
275 HWR1 = 258,
276 HWR2 = 259,
277 HWR3 = 260,
278 HWR4 = 261,
279 HWR5 = 262,
280 HWR6 = 263,
281 HWR7 = 264,
282 HWR8 = 265,
283 HWR9 = 266,
284 HWR10 = 267,
285 HWR11 = 268,
286 HWR12 = 269,
287 HWR13 = 270,
288 HWR14 = 271,
289 HWR15 = 272,
290 HWR16 = 273,
291 HWR17 = 274,
292 HWR18 = 275,
293 HWR19 = 276,
294 HWR20 = 277,
295 HWR21 = 278,
296 HWR22 = 279,
297 HWR23 = 280,
298 HWR24 = 281,
299 HWR25 = 282,
300 HWR26 = 283,
301 HWR27 = 284,
302 HWR28 = 285,
303 HWR29 = 286,
304 HWR30 = 287,
305 HWR31 = 288,
306 K0 = 289,
307 K1 = 290,
308 LO0 = 291,
309 LO1 = 292,
310 LO2 = 293,
311 LO3 = 294,
312 MPL0 = 295,
313 MPL1 = 296,
314 MPL2 = 297,
315 MSA8 = 298,
316 MSA9 = 299,
317 MSA10 = 300,
318 MSA11 = 301,
319 MSA12 = 302,
320 MSA13 = 303,
321 MSA14 = 304,
322 MSA15 = 305,
323 MSA16 = 306,
324 MSA17 = 307,
325 MSA18 = 308,
326 MSA19 = 309,
327 MSA20 = 310,
328 MSA21 = 311,
329 MSA22 = 312,
330 MSA23 = 313,
331 MSA24 = 314,
332 MSA25 = 315,
333 MSA26 = 316,
334 MSA27 = 317,
335 MSA28 = 318,
336 MSA29 = 319,
337 MSA30 = 320,
338 MSA31 = 321,
339 P0 = 322,
340 P1 = 323,
341 P2 = 324,
342 RA_64 = 325,
343 S0 = 326,
344 S1 = 327,
345 S2 = 328,
346 S3 = 329,
347 S4 = 330,
348 S5 = 331,
349 S6 = 332,
350 S7 = 333,
351 SP_64 = 334,
352 T0 = 335,
353 T1 = 336,
354 T2 = 337,
355 T3 = 338,
356 T4 = 339,
357 T5 = 340,
358 T6 = 341,
359 T7 = 342,
360 T8 = 343,
361 T9 = 344,
362 V0 = 345,
363 V1 = 346,
364 W0 = 347,
365 W1 = 348,
366 W2 = 349,
367 W3 = 350,
368 W4 = 351,
369 W5 = 352,
370 W6 = 353,
371 W7 = 354,
372 W8 = 355,
373 W9 = 356,
374 W10 = 357,
375 W11 = 358,
376 W12 = 359,
377 W13 = 360,
378 W14 = 361,
379 W15 = 362,
380 W16 = 363,
381 W17 = 364,
382 W18 = 365,
383 W19 = 366,
384 W20 = 367,
385 W21 = 368,
386 W22 = 369,
387 W23 = 370,
388 W24 = 371,
389 W25 = 372,
390 W26 = 373,
391 W27 = 374,
392 W28 = 375,
393 W29 = 376,
394 W30 = 377,
395 W31 = 378,
396 ZERO_64 = 379,
397 A0_64 = 380,
398 A1_64 = 381,
399 A2_64 = 382,
400 A3_64 = 383,
401 AC0_64 = 384,
402 D0_64 = 385,
403 D1_64 = 386,
404 D2_64 = 387,
405 D3_64 = 388,
406 D4_64 = 389,
407 D5_64 = 390,
408 D6_64 = 391,
409 D7_64 = 392,
410 D8_64 = 393,
411 D9_64 = 394,
412 D10_64 = 395,
413 D11_64 = 396,
414 D12_64 = 397,
415 D13_64 = 398,
416 D14_64 = 399,
417 D15_64 = 400,
418 D16_64 = 401,
419 D17_64 = 402,
420 D18_64 = 403,
421 D19_64 = 404,
422 D20_64 = 405,
423 D21_64 = 406,
424 D22_64 = 407,
425 D23_64 = 408,
426 D24_64 = 409,
427 D25_64 = 410,
428 D26_64 = 411,
429 D27_64 = 412,
430 D28_64 = 413,
431 D29_64 = 414,
432 D30_64 = 415,
433 D31_64 = 416,
434 DSPOutFlag16_19 = 417,
435 HI0_64 = 418,
436 K0_64 = 419,
437 K1_64 = 420,
438 LO0_64 = 421,
439 S0_64 = 422,
440 S1_64 = 423,
441 S2_64 = 424,
442 S3_64 = 425,
443 S4_64 = 426,
444 S5_64 = 427,
445 S6_64 = 428,
446 S7_64 = 429,
447 T0_64 = 430,
448 T1_64 = 431,
449 T2_64 = 432,
450 T3_64 = 433,
451 T4_64 = 434,
452 T5_64 = 435,
453 T6_64 = 436,
454 T7_64 = 437,
455 T8_64 = 438,
456 T9_64 = 439,
457 V0_64 = 440,
458 V1_64 = 441,
459 NUM_TARGET_REGS // 442
460};
461
462} // namespace Mips
463
464// Register classes
465
466namespace Mips {
467
468enum {
469 MSA128F16RegClassID = 0,
470 CCRRegClassID = 1,
471 COP0RegClassID = 2,
472 COP2RegClassID = 3,
473 COP3RegClassID = 4,
474 DSPRRegClassID = 5,
475 FGR32RegClassID = 6,
476 FGR32CCRegClassID = 7,
477 GPR32RegClassID = 8,
478 HWRegsRegClassID = 9,
479 MSACtrlRegClassID = 10,
480 GPR32NONZERORegClassID = 11,
481 CPU16RegsPlusSPRegClassID = 12,
482 CPU16RegsRegClassID = 13,
483 FCCRegClassID = 14,
484 GPRMM16RegClassID = 15,
485 GPRMM16MovePRegClassID = 16,
486 GPRMM16ZeroRegClassID = 17,
487 CPU16Regs_and_GPRMM16ZeroRegClassID = 18,
488 GPR32NONZERO_and_GPRMM16MovePRegClassID = 19,
489 GPRMM16MovePPairSecondRegClassID = 20,
490 CPU16Regs_and_GPRMM16MovePRegClassID = 21,
491 GPRMM16MoveP_and_GPRMM16ZeroRegClassID = 22,
492 HI32DSPRegClassID = 23,
493 LO32DSPRegClassID = 24,
494 CPU16Regs_and_GPRMM16MovePPairSecondRegClassID = 25,
495 GPRMM16MovePPairFirstRegClassID = 26,
496 GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID = 27,
497 GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClassID = 28,
498 CPURARegRegClassID = 29,
499 CPUSPRegRegClassID = 30,
500 DSPCCRegClassID = 31,
501 GP32RegClassID = 32,
502 GPR32ZERORegClassID = 33,
503 HI32RegClassID = 34,
504 LO32RegClassID = 35,
505 SP32RegClassID = 36,
506 FGR64CCRegClassID = 37,
507 FGR64RegClassID = 38,
508 GPR64RegClassID = 39,
509 GPR64_with_sub_32_in_GPR32NONZERORegClassID = 40,
510 AFGR64RegClassID = 41,
511 GPR64_with_sub_32_in_CPU16RegsPlusSPRegClassID = 42,
512 GPR64_with_sub_32_in_CPU16RegsRegClassID = 43,
513 GPR64_with_sub_32_in_GPRMM16MovePRegClassID = 44,
514 GPR64_with_sub_32_in_GPRMM16ZeroRegClassID = 45,
515 GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroRegClassID = 46,
516 GPR64_with_sub_32_in_GPR32NONZERO_and_GPRMM16MovePRegClassID = 47,
517 GPR64_with_sub_32_in_GPRMM16MovePPairSecondRegClassID = 48,
518 ACC64DSPRegClassID = 49,
519 GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePRegClassID = 50,
520 GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClassID = 51,
521 GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePPairSecondRegClassID = 52,
522 GPR64_with_sub_32_in_GPRMM16MovePPairFirstRegClassID = 53,
523 GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID = 54,
524 OCTEON_MPLRegClassID = 55,
525 OCTEON_PRegClassID = 56,
526 GPR64_with_sub_32_in_GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClassID = 57,
527 ACC64RegClassID = 58,
528 GP64RegClassID = 59,
529 GPR64_with_sub_32_in_CPURARegRegClassID = 60,
530 GPR64_with_sub_32_in_GPR32ZERORegClassID = 61,
531 HI64RegClassID = 62,
532 LO64RegClassID = 63,
533 SP64RegClassID = 64,
534 MSA128BRegClassID = 65,
535 MSA128DRegClassID = 66,
536 MSA128HRegClassID = 67,
537 MSA128WRegClassID = 68,
538 MSA128WEvensRegClassID = 69,
539 ACC128RegClassID = 70,
540
541};
542
543} // namespace Mips
544
545// Subregister indices
546
547namespace Mips {
548
549enum : uint16_t {
550 NoSubRegister,
551 sub_32, // 1
552 sub_64, // 2
553 sub_dsp16_19, // 3
554 sub_dsp20, // 4
555 sub_dsp21, // 5
556 sub_dsp22, // 6
557 sub_dsp23, // 7
558 sub_hi, // 8
559 sub_lo, // 9
560 sub_hi_then_sub_32, // 10
561 sub_32_sub_hi_then_sub_32, // 11
562 NUM_TARGET_SUBREGS
563};
564
565} // namespace Mips
566// Register pressure sets enum.
567namespace Mips {
568
569enum RegisterPressureSets {
570 DSPCC = 0,
571 GPR32ZERO = 1,
572 GPR64_with_sub_32_in_CPURAReg = 2,
573 HI32 = 3,
574 GPRMM16MovePPairFirst = 4,
575 CPU16Regs_and_GPRMM16MoveP = 5,
576 HI32DSP = 6,
577 LO32DSP = 7,
578 GPRMM16MovePPairSecond = 8,
579 GPRMM16MoveP = 9,
580 ACC64DSP = 10,
581 CPU16Regs = 11,
582 GPRMM16Zero_with_GPRMM16MovePPairSecond = 12,
583 CPU16Regs_with_GPRMM16MovePPairSecond = 13,
584 CPU16Regs_with_GPRMM16MoveP = 14,
585 DSPR = 15,
586 FGR32 = 16,
587 MSA128WEvens = 17,
588 FGR32_with_MSA128WEvens = 18,
589 MSA128F16 = 19,
590};
591
592} // namespace Mips
593
594} // namespace llvm
595