| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Register Information Header Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 10 | |
| 11 | namespace llvm { |
| 12 | |
| 13 | class MipsFrameLowering; |
| 14 | |
| 15 | extern const MCRegisterClassStorage<70, 830, 2580, 336, 18, 197> MipsMCRegisterClassStorage; |
| 16 | |
| 17 | struct MipsGenRegisterInfo : public TargetRegisterInfo { |
| 18 | explicit MipsGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0, |
| 19 | unsigned PC = 0, unsigned HwMode = 0); |
| 20 | unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 21 | unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 22 | LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 23 | LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 24 | const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override; |
| 25 | const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override; |
| 26 | const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override; |
| 27 | unsigned getRegUnitWeight(MCRegUnit RegUnit) const override; |
| 28 | unsigned getNumRegPressureSets() const override; |
| 29 | const char *getRegPressureSetName(unsigned Idx) const override; |
| 30 | unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override; |
| 31 | const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override; |
| 32 | const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override; |
| 33 | ArrayRef<const char *> getRegMaskNames() const override; |
| 34 | ArrayRef<const uint32_t *> getRegMasks() const override; |
| 35 | bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override; |
| 36 | bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override; |
| 37 | bool isFixedRegister(const MachineFunction &, MCRegister) const override; |
| 38 | bool isArgumentRegister(const MachineFunction &, MCRegister) const override; |
| 39 | bool isConstantPhysReg(MCRegister PhysReg) const override final; |
| 40 | /// Devirtualized TargetFrameLowering. |
| 41 | static const MipsFrameLowering *getFrameLowering( |
| 42 | const MachineFunction &MF); |
| 43 | ArrayRef<MCPhysReg> getRawAllocationOrder(const TargetRegisterClass &RC, const MachineFunction &MF, bool Rev) const override; |
| 44 | const TargetRegisterClass *getMinimalPhysRegClass(MCRegister Reg) const override; |
| 45 | }; |
| 46 | |
| 47 | namespace Mips { |
| 48 | |
| 49 | // Register classes |
| 50 | static constexpr const TargetRegisterClass &CCRRegClass = MipsMCRegisterClassStorage.Classes[0]; |
| 51 | static constexpr const TargetRegisterClass &COP0RegClass = MipsMCRegisterClassStorage.Classes[1]; |
| 52 | static constexpr const TargetRegisterClass &COP2RegClass = MipsMCRegisterClassStorage.Classes[2]; |
| 53 | static constexpr const TargetRegisterClass &COP3RegClass = MipsMCRegisterClassStorage.Classes[3]; |
| 54 | static constexpr const TargetRegisterClass &DSPRRegClass = MipsMCRegisterClassStorage.Classes[4]; |
| 55 | static constexpr const TargetRegisterClass &FGR32RegClass = MipsMCRegisterClassStorage.Classes[5]; |
| 56 | static constexpr const TargetRegisterClass &FGR32CCRegClass = MipsMCRegisterClassStorage.Classes[6]; |
| 57 | static constexpr const TargetRegisterClass &GPR32RegClass = MipsMCRegisterClassStorage.Classes[7]; |
| 58 | static constexpr const TargetRegisterClass &HWRegsRegClass = MipsMCRegisterClassStorage.Classes[8]; |
| 59 | static constexpr const TargetRegisterClass &MSACtrlRegClass = MipsMCRegisterClassStorage.Classes[9]; |
| 60 | static constexpr const TargetRegisterClass &GPR32NONZERORegClass = MipsMCRegisterClassStorage.Classes[10]; |
| 61 | static constexpr const TargetRegisterClass &CPU16RegsPlusSPRegClass = MipsMCRegisterClassStorage.Classes[11]; |
| 62 | static constexpr const TargetRegisterClass &CPU16RegsRegClass = MipsMCRegisterClassStorage.Classes[12]; |
| 63 | static constexpr const TargetRegisterClass &FCCRegClass = MipsMCRegisterClassStorage.Classes[13]; |
| 64 | static constexpr const TargetRegisterClass &GPRMM16RegClass = MipsMCRegisterClassStorage.Classes[14]; |
| 65 | static constexpr const TargetRegisterClass &GPRMM16MovePRegClass = MipsMCRegisterClassStorage.Classes[15]; |
| 66 | static constexpr const TargetRegisterClass &GPRMM16ZeroRegClass = MipsMCRegisterClassStorage.Classes[16]; |
| 67 | static constexpr const TargetRegisterClass &CPU16Regs_and_GPRMM16ZeroRegClass = MipsMCRegisterClassStorage.Classes[17]; |
| 68 | static constexpr const TargetRegisterClass &GPR32NONZERO_and_GPRMM16MovePRegClass = MipsMCRegisterClassStorage.Classes[18]; |
| 69 | static constexpr const TargetRegisterClass &GPRMM16MovePPairSecondRegClass = MipsMCRegisterClassStorage.Classes[19]; |
| 70 | static constexpr const TargetRegisterClass &CPU16Regs_and_GPRMM16MovePRegClass = MipsMCRegisterClassStorage.Classes[20]; |
| 71 | static constexpr const TargetRegisterClass &GPRMM16MoveP_and_GPRMM16ZeroRegClass = MipsMCRegisterClassStorage.Classes[21]; |
| 72 | static constexpr const TargetRegisterClass &HI32DSPRegClass = MipsMCRegisterClassStorage.Classes[22]; |
| 73 | static constexpr const TargetRegisterClass &LO32DSPRegClass = MipsMCRegisterClassStorage.Classes[23]; |
| 74 | static constexpr const TargetRegisterClass &CPU16Regs_and_GPRMM16MovePPairSecondRegClass = MipsMCRegisterClassStorage.Classes[24]; |
| 75 | static constexpr const TargetRegisterClass &GPRMM16MovePPairFirstRegClass = MipsMCRegisterClassStorage.Classes[25]; |
| 76 | static constexpr const TargetRegisterClass &GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClass = MipsMCRegisterClassStorage.Classes[26]; |
| 77 | static constexpr const TargetRegisterClass &GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClass = MipsMCRegisterClassStorage.Classes[27]; |
| 78 | static constexpr const TargetRegisterClass &CPURARegRegClass = MipsMCRegisterClassStorage.Classes[28]; |
| 79 | static constexpr const TargetRegisterClass &CPUSPRegRegClass = MipsMCRegisterClassStorage.Classes[29]; |
| 80 | static constexpr const TargetRegisterClass &DSPCCRegClass = MipsMCRegisterClassStorage.Classes[30]; |
| 81 | static constexpr const TargetRegisterClass &GP32RegClass = MipsMCRegisterClassStorage.Classes[31]; |
| 82 | static constexpr const TargetRegisterClass &GPR32ZERORegClass = MipsMCRegisterClassStorage.Classes[32]; |
| 83 | static constexpr const TargetRegisterClass &HI32RegClass = MipsMCRegisterClassStorage.Classes[33]; |
| 84 | static constexpr const TargetRegisterClass &LO32RegClass = MipsMCRegisterClassStorage.Classes[34]; |
| 85 | static constexpr const TargetRegisterClass &SP32RegClass = MipsMCRegisterClassStorage.Classes[35]; |
| 86 | static constexpr const TargetRegisterClass &FGR64CCRegClass = MipsMCRegisterClassStorage.Classes[36]; |
| 87 | static constexpr const TargetRegisterClass &FGR64RegClass = MipsMCRegisterClassStorage.Classes[37]; |
| 88 | static constexpr const TargetRegisterClass &GPR64RegClass = MipsMCRegisterClassStorage.Classes[38]; |
| 89 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPR32NONZERORegClass = MipsMCRegisterClassStorage.Classes[39]; |
| 90 | static constexpr const TargetRegisterClass &AFGR64RegClass = MipsMCRegisterClassStorage.Classes[40]; |
| 91 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_CPU16RegsPlusSPRegClass = MipsMCRegisterClassStorage.Classes[41]; |
| 92 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_CPU16RegsRegClass = MipsMCRegisterClassStorage.Classes[42]; |
| 93 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPRMM16MovePRegClass = MipsMCRegisterClassStorage.Classes[43]; |
| 94 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPRMM16ZeroRegClass = MipsMCRegisterClassStorage.Classes[44]; |
| 95 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroRegClass = MipsMCRegisterClassStorage.Classes[45]; |
| 96 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPR32NONZERO_and_GPRMM16MovePRegClass = MipsMCRegisterClassStorage.Classes[46]; |
| 97 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPRMM16MovePPairSecondRegClass = MipsMCRegisterClassStorage.Classes[47]; |
| 98 | static constexpr const TargetRegisterClass &ACC64DSPRegClass = MipsMCRegisterClassStorage.Classes[48]; |
| 99 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePRegClass = MipsMCRegisterClassStorage.Classes[49]; |
| 100 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClass = MipsMCRegisterClassStorage.Classes[50]; |
| 101 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePPairSecondRegClass = MipsMCRegisterClassStorage.Classes[51]; |
| 102 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPRMM16MovePPairFirstRegClass = MipsMCRegisterClassStorage.Classes[52]; |
| 103 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClass = MipsMCRegisterClassStorage.Classes[53]; |
| 104 | static constexpr const TargetRegisterClass &OCTEON_MPLRegClass = MipsMCRegisterClassStorage.Classes[54]; |
| 105 | static constexpr const TargetRegisterClass &OCTEON_PRegClass = MipsMCRegisterClassStorage.Classes[55]; |
| 106 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClass = MipsMCRegisterClassStorage.Classes[56]; |
| 107 | static constexpr const TargetRegisterClass &ACC64RegClass = MipsMCRegisterClassStorage.Classes[57]; |
| 108 | static constexpr const TargetRegisterClass &GP64RegClass = MipsMCRegisterClassStorage.Classes[58]; |
| 109 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_CPURARegRegClass = MipsMCRegisterClassStorage.Classes[59]; |
| 110 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_GPR32ZERORegClass = MipsMCRegisterClassStorage.Classes[60]; |
| 111 | static constexpr const TargetRegisterClass &HI64RegClass = MipsMCRegisterClassStorage.Classes[61]; |
| 112 | static constexpr const TargetRegisterClass &LO64RegClass = MipsMCRegisterClassStorage.Classes[62]; |
| 113 | static constexpr const TargetRegisterClass &SP64RegClass = MipsMCRegisterClassStorage.Classes[63]; |
| 114 | static constexpr const TargetRegisterClass &MSA128BRegClass = MipsMCRegisterClassStorage.Classes[64]; |
| 115 | static constexpr const TargetRegisterClass &MSA128DRegClass = MipsMCRegisterClassStorage.Classes[65]; |
| 116 | static constexpr const TargetRegisterClass &MSA128HRegClass = MipsMCRegisterClassStorage.Classes[66]; |
| 117 | static constexpr const TargetRegisterClass &MSA128WRegClass = MipsMCRegisterClassStorage.Classes[67]; |
| 118 | static constexpr const TargetRegisterClass &MSA128WEvensRegClass = MipsMCRegisterClassStorage.Classes[68]; |
| 119 | static constexpr const TargetRegisterClass &ACC128RegClass = MipsMCRegisterClassStorage.Classes[69]; |
| 120 | |
| 121 | } // namespace Mips |
| 122 | |
| 123 | } // namespace llvm |
| 124 | |