1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Register Information Header Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#include "llvm/CodeGen/TargetRegisterInfo.h"
10
11namespace llvm {
12
13class MipsFrameLowering;
14
15struct MipsGenRegisterInfo : public TargetRegisterInfo {
16 explicit MipsGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0,
17 unsigned PC = 0, unsigned HwMode = 0);
18 unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override;
19 unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override;
20 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
21 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
22 const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override;
23 const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override;
24 const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override;
25 unsigned getRegUnitWeight(MCRegUnit RegUnit) const override;
26 unsigned getNumRegPressureSets() const override;
27 const char *getRegPressureSetName(unsigned Idx) const override;
28 unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override;
29 const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override;
30 const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override;
31 ArrayRef<const char *> getRegMaskNames() const override;
32 ArrayRef<const uint32_t *> getRegMasks() const override;
33 bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override;
34 bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override;
35 bool isFixedRegister(const MachineFunction &, MCRegister) const override;
36 bool isArgumentRegister(const MachineFunction &, MCRegister) const override;
37 bool isConstantPhysReg(MCRegister PhysReg) const override final;
38 /// Devirtualized TargetFrameLowering.
39 static const MipsFrameLowering *getFrameLowering(
40 const MachineFunction &MF);
41};
42
43namespace Mips { // Register classes
44 extern const TargetRegisterClass MSA128F16RegClass;
45 extern const TargetRegisterClass CCRRegClass;
46 extern const TargetRegisterClass COP0RegClass;
47 extern const TargetRegisterClass COP2RegClass;
48 extern const TargetRegisterClass COP3RegClass;
49 extern const TargetRegisterClass DSPRRegClass;
50 extern const TargetRegisterClass FGR32RegClass;
51 extern const TargetRegisterClass FGR32CCRegClass;
52 extern const TargetRegisterClass GPR32RegClass;
53 extern const TargetRegisterClass HWRegsRegClass;
54 extern const TargetRegisterClass MSACtrlRegClass;
55 extern const TargetRegisterClass GPR32NONZERORegClass;
56 extern const TargetRegisterClass CPU16RegsPlusSPRegClass;
57 extern const TargetRegisterClass CPU16RegsRegClass;
58 extern const TargetRegisterClass FCCRegClass;
59 extern const TargetRegisterClass GPRMM16RegClass;
60 extern const TargetRegisterClass GPRMM16MovePRegClass;
61 extern const TargetRegisterClass GPRMM16ZeroRegClass;
62 extern const TargetRegisterClass CPU16Regs_and_GPRMM16ZeroRegClass;
63 extern const TargetRegisterClass GPR32NONZERO_and_GPRMM16MovePRegClass;
64 extern const TargetRegisterClass GPRMM16MovePPairSecondRegClass;
65 extern const TargetRegisterClass CPU16Regs_and_GPRMM16MovePRegClass;
66 extern const TargetRegisterClass GPRMM16MoveP_and_GPRMM16ZeroRegClass;
67 extern const TargetRegisterClass HI32DSPRegClass;
68 extern const TargetRegisterClass LO32DSPRegClass;
69 extern const TargetRegisterClass CPU16Regs_and_GPRMM16MovePPairSecondRegClass;
70 extern const TargetRegisterClass GPRMM16MovePPairFirstRegClass;
71 extern const TargetRegisterClass GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClass;
72 extern const TargetRegisterClass GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClass;
73 extern const TargetRegisterClass CPURARegRegClass;
74 extern const TargetRegisterClass CPUSPRegRegClass;
75 extern const TargetRegisterClass DSPCCRegClass;
76 extern const TargetRegisterClass GP32RegClass;
77 extern const TargetRegisterClass GPR32ZERORegClass;
78 extern const TargetRegisterClass HI32RegClass;
79 extern const TargetRegisterClass LO32RegClass;
80 extern const TargetRegisterClass SP32RegClass;
81 extern const TargetRegisterClass FGR64CCRegClass;
82 extern const TargetRegisterClass FGR64RegClass;
83 extern const TargetRegisterClass GPR64RegClass;
84 extern const TargetRegisterClass GPR64_with_sub_32_in_GPR32NONZERORegClass;
85 extern const TargetRegisterClass AFGR64RegClass;
86 extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16RegsPlusSPRegClass;
87 extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16RegsRegClass;
88 extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MovePRegClass;
89 extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16ZeroRegClass;
90 extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroRegClass;
91 extern const TargetRegisterClass GPR64_with_sub_32_in_GPR32NONZERO_and_GPRMM16MovePRegClass;
92 extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MovePPairSecondRegClass;
93 extern const TargetRegisterClass ACC64DSPRegClass;
94 extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePRegClass;
95 extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClass;
96 extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePPairSecondRegClass;
97 extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MovePPairFirstRegClass;
98 extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClass;
99 extern const TargetRegisterClass OCTEON_MPLRegClass;
100 extern const TargetRegisterClass OCTEON_PRegClass;
101 extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClass;
102 extern const TargetRegisterClass ACC64RegClass;
103 extern const TargetRegisterClass GP64RegClass;
104 extern const TargetRegisterClass GPR64_with_sub_32_in_CPURARegRegClass;
105 extern const TargetRegisterClass GPR64_with_sub_32_in_GPR32ZERORegClass;
106 extern const TargetRegisterClass HI64RegClass;
107 extern const TargetRegisterClass LO64RegClass;
108 extern const TargetRegisterClass SP64RegClass;
109 extern const TargetRegisterClass MSA128BRegClass;
110 extern const TargetRegisterClass MSA128DRegClass;
111 extern const TargetRegisterClass MSA128HRegClass;
112 extern const TargetRegisterClass MSA128WRegClass;
113 extern const TargetRegisterClass MSA128WEvensRegClass;
114 extern const TargetRegisterClass ACC128RegClass;
115} // end namespace Mips
116
117} // end namespace llvm
118
119