1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: Mips.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::MipsISD {
14
15enum GenNodeType : unsigned {
16 BuildPairF64 = ISD::BUILTIN_OP_END,
17 CIns,
18 CMovFP_F,
19 CMovFP_T,
20 DPAQX_SA_W_PH,
21 DPAQX_S_W_PH,
22 DPAQ_SA_L_W,
23 DPAQ_S_W_PH,
24 DPAU_H_QBL,
25 DPAU_H_QBR,
26 DPAX_W_PH,
27 DPA_W_PH,
28 DPSQX_SA_W_PH,
29 DPSQX_S_W_PH,
30 DPSQ_SA_L_W,
31 DPSQ_S_W_PH,
32 DPSU_H_QBL,
33 DPSU_H_QBR,
34 DPSX_W_PH,
35 DPS_W_PH,
36 DivRem,
37 DivRem16,
38 DivRemU,
39 DivRemU16,
40 EH_RETURN,
41 ERet,
42 EXTP,
43 EXTPDP,
44 EXTR_RS_W,
45 EXTR_R_W,
46 EXTR_S_H,
47 EXTR_W,
48 Ext,
49 ExtractElementF64,
50 FMS,
51 FPBrcond,
52 FPCmp,
53 FSELECT,
54 GPRel,
55 GotHi,
56 Hi,
57 Higher,
58 Highest,
59 ILVEV,
60 ILVL,
61 ILVOD,
62 ILVR,
63 INSVE,
64 Ins,
65 JmpLink,
66 LDL,
67 LDR,
68 LWL,
69 LWR,
70 Lo,
71 MADDU_DSP,
72 MADD_DSP,
73 MAQ_SA_W_PHL,
74 MAQ_SA_W_PHR,
75 MAQ_S_W_PHL,
76 MAQ_S_W_PHR,
77 MAdd,
78 MAddu,
79 MFHI,
80 MFLO,
81 MSUBU_DSP,
82 MSUB_DSP,
83 MSub,
84 MSubu,
85 MTC1_D64,
86 MTHLIP,
87 MTLOHI,
88 MULSAQ_S_W_PH,
89 MULSA_W_PH,
90 MULT,
91 MULTU,
92 Mult,
93 Multu,
94 PCKEV,
95 PCKOD,
96 Ret,
97 SDL,
98 SDR,
99 SELECT_CC_DSP,
100 SETCC_DSP,
101 SHF,
102 SHILO,
103 SHLL_DSP,
104 SHRA_DSP,
105 SHRL_DSP,
106 SWL,
107 SWR,
108 Sync,
109 TailCall,
110 ThreadPointer,
111 TlsHi,
112 TruncIntFP,
113 VALL_NONZERO,
114 VALL_ZERO,
115 VANY_NONZERO,
116 VANY_ZERO,
117 VEXTRACT_SEXT_ELT,
118 VEXTRACT_ZEXT_ELT,
119 VNOR,
120 VSHF,
121 Wrapper,
122};
123
124static constexpr unsigned GENERATED_OPCODE_END = Wrapper + 1;
125
126} // namespace llvm::MipsISD
127
128#endif // GET_SDNODE_ENUM
129
130#ifdef GET_SDNODE_DESC
131#undef GET_SDNODE_DESC
132
133namespace llvm {
134
135
136#ifdef __GNUC__
137#pragma GCC diagnostic push
138#pragma GCC diagnostic ignored "-Woverlength-strings"
139#endif
140static constexpr char MipsSDNodeNamesStorage[] =
141 "\0"
142 "MipsISD::BuildPairF64\0"
143 "MipsISD::CIns\0"
144 "MipsISD::CMovFP_F\0"
145 "MipsISD::CMovFP_T\0"
146 "MipsISD::DPAQX_SA_W_PH\0"
147 "MipsISD::DPAQX_S_W_PH\0"
148 "MipsISD::DPAQ_SA_L_W\0"
149 "MipsISD::DPAQ_S_W_PH\0"
150 "MipsISD::DPAU_H_QBL\0"
151 "MipsISD::DPAU_H_QBR\0"
152 "MipsISD::DPAX_W_PH\0"
153 "MipsISD::DPA_W_PH\0"
154 "MipsISD::DPSQX_SA_W_PH\0"
155 "MipsISD::DPSQX_S_W_PH\0"
156 "MipsISD::DPSQ_SA_L_W\0"
157 "MipsISD::DPSQ_S_W_PH\0"
158 "MipsISD::DPSU_H_QBL\0"
159 "MipsISD::DPSU_H_QBR\0"
160 "MipsISD::DPSX_W_PH\0"
161 "MipsISD::DPS_W_PH\0"
162 "MipsISD::DivRem\0"
163 "MipsISD::DivRem16\0"
164 "MipsISD::DivRemU\0"
165 "MipsISD::DivRemU16\0"
166 "MipsISD::EH_RETURN\0"
167 "MipsISD::ERet\0"
168 "MipsISD::EXTP\0"
169 "MipsISD::EXTPDP\0"
170 "MipsISD::EXTR_RS_W\0"
171 "MipsISD::EXTR_R_W\0"
172 "MipsISD::EXTR_S_H\0"
173 "MipsISD::EXTR_W\0"
174 "MipsISD::Ext\0"
175 "MipsISD::ExtractElementF64\0"
176 "MipsISD::FMS\0"
177 "MipsISD::FPBrcond\0"
178 "MipsISD::FPCmp\0"
179 "MipsISD::FSELECT\0"
180 "MipsISD::GPRel\0"
181 "MipsISD::GotHi\0"
182 "MipsISD::Hi\0"
183 "MipsISD::Higher\0"
184 "MipsISD::Highest\0"
185 "MipsISD::ILVEV\0"
186 "MipsISD::ILVL\0"
187 "MipsISD::ILVOD\0"
188 "MipsISD::ILVR\0"
189 "MipsISD::INSVE\0"
190 "MipsISD::Ins\0"
191 "MipsISD::JmpLink\0"
192 "MipsISD::LDL\0"
193 "MipsISD::LDR\0"
194 "MipsISD::LWL\0"
195 "MipsISD::LWR\0"
196 "MipsISD::Lo\0"
197 "MipsISD::MADDU_DSP\0"
198 "MipsISD::MADD_DSP\0"
199 "MipsISD::MAQ_SA_W_PHL\0"
200 "MipsISD::MAQ_SA_W_PHR\0"
201 "MipsISD::MAQ_S_W_PHL\0"
202 "MipsISD::MAQ_S_W_PHR\0"
203 "MipsISD::MAdd\0"
204 "MipsISD::MAddu\0"
205 "MipsISD::MFHI\0"
206 "MipsISD::MFLO\0"
207 "MipsISD::MSUBU_DSP\0"
208 "MipsISD::MSUB_DSP\0"
209 "MipsISD::MSub\0"
210 "MipsISD::MSubu\0"
211 "MipsISD::MTC1_D64\0"
212 "MipsISD::MTHLIP\0"
213 "MipsISD::MTLOHI\0"
214 "MipsISD::MULSAQ_S_W_PH\0"
215 "MipsISD::MULSA_W_PH\0"
216 "MipsISD::MULT\0"
217 "MipsISD::MULTU\0"
218 "MipsISD::Mult\0"
219 "MipsISD::Multu\0"
220 "MipsISD::PCKEV\0"
221 "MipsISD::PCKOD\0"
222 "MipsISD::Ret\0"
223 "MipsISD::SDL\0"
224 "MipsISD::SDR\0"
225 "MipsISD::SELECT_CC_DSP\0"
226 "MipsISD::SETCC_DSP\0"
227 "MipsISD::SHF\0"
228 "MipsISD::SHILO\0"
229 "MipsISD::SHLL_DSP\0"
230 "MipsISD::SHRA_DSP\0"
231 "MipsISD::SHRL_DSP\0"
232 "MipsISD::SWL\0"
233 "MipsISD::SWR\0"
234 "MipsISD::Sync\0"
235 "MipsISD::TailCall\0"
236 "MipsISD::ThreadPointer\0"
237 "MipsISD::TlsHi\0"
238 "MipsISD::TruncIntFP\0"
239 "MipsISD::VALL_NONZERO\0"
240 "MipsISD::VALL_ZERO\0"
241 "MipsISD::VANY_NONZERO\0"
242 "MipsISD::VANY_ZERO\0"
243 "MipsISD::VEXTRACT_SEXT_ELT\0"
244 "MipsISD::VEXTRACT_ZEXT_ELT\0"
245 "MipsISD::VNOR\0"
246 "MipsISD::VSHF\0"
247 "MipsISD::Wrapper\0"
248 ;
249#ifdef __GNUC__
250#pragma GCC diagnostic pop
251#endif
252
253static constexpr llvm::StringTable
254MipsSDNodeNames = MipsSDNodeNamesStorage;
255
256static const VTByHwModePair MipsVTByHwModeTable[] = {
257 /* dummy */ {0, MVT::INVALID_SIMPLE_VALUE_TYPE}
258};
259
260static const SDTypeConstraint MipsSDTypeConstraints[] = {
261 /* 0 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
262 /* 3 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVT, 1, 0, 0, MVT::f64}, {SDTCisVT, 0, 0, 0, MVT::i32},
263 /* 6 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64},
264 /* 9 */ {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
265 /* 12 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
266 /* 16 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::v4i8}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
267 /* 20 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::v2i16}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
268 /* 24 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
269 /* 27 */ {SDTCisVT, 0, 0, 0, MVT::iPTR},
270 /* 28 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
271 /* 29 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
272 /* 33 */ {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
273 /* 37 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
274 /* 43 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
275 /* 48 */ {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
276 /* 51 */ {SDTCisVT, 1, 0, 0, MVT::Untyped}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
277 /* 53 */ {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisPtrTy, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
278 /* 56 */ {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
279 /* 58 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
280 /* 61 */ {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
281 /* 63 */ {SDTCisVT, 4, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
282 /* 68 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
283 /* 70 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
284 /* 73 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
285 /* 77 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
286 /* 80 */ {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
287 /* 83 */ {SDTCisPtrTy, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
288 /* 84 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
289 /* 87 */ {SDTCisVT, 5, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 3, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
290 /* 91 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
291};
292
293static const SDNodeDesc MipsSDNodeDescs[] = {
294 {1, 2, 0, 0, 0, 1, 6, 3}, // BuildPairF64
295 {1, 3, 0, 0, 0, 23, 44, 4}, // CIns
296 {1, 3, 0|1<<SDNPInGlue, 0, 0, 37, 80, 3}, // CMovFP_F
297 {1, 3, 0|1<<SDNPInGlue, 0, 0, 55, 80, 3}, // CMovFP_T
298 {1, 3, 0|1<<SDNPHasChain, 0, 0, 73, 20, 4}, // DPAQX_SA_W_PH
299 {1, 3, 0|1<<SDNPHasChain, 0, 0, 96, 20, 4}, // DPAQX_S_W_PH
300 {1, 3, 0|1<<SDNPHasChain, 0, 0, 118, 12, 4}, // DPAQ_SA_L_W
301 {1, 3, 0|1<<SDNPHasChain, 0, 0, 139, 20, 4}, // DPAQ_S_W_PH
302 {1, 3, 0, 0, 0, 160, 16, 4}, // DPAU_H_QBL
303 {1, 3, 0, 0, 0, 180, 16, 4}, // DPAU_H_QBR
304 {1, 3, 0, 0, 0, 200, 20, 4}, // DPAX_W_PH
305 {1, 3, 0, 0, 0, 219, 20, 4}, // DPA_W_PH
306 {1, 3, 0|1<<SDNPHasChain, 0, 0, 237, 20, 4}, // DPSQX_SA_W_PH
307 {1, 3, 0|1<<SDNPHasChain, 0, 0, 260, 20, 4}, // DPSQX_S_W_PH
308 {1, 3, 0|1<<SDNPHasChain, 0, 0, 282, 12, 4}, // DPSQ_SA_L_W
309 {1, 3, 0|1<<SDNPHasChain, 0, 0, 303, 20, 4}, // DPSQ_S_W_PH
310 {1, 3, 0, 0, 0, 324, 16, 4}, // DPSU_H_QBL
311 {1, 3, 0, 0, 0, 344, 16, 4}, // DPSU_H_QBR
312 {1, 3, 0, 0, 0, 364, 20, 4}, // DPSX_W_PH
313 {1, 3, 0, 0, 0, 383, 20, 4}, // DPS_W_PH
314 {1, 2, 0, 0, 0, 401, 24, 3}, // DivRem
315 {0, 2, 0|1<<SDNPOutGlue, 0, 0, 417, 46, 2}, // DivRem16
316 {1, 2, 0, 0, 0, 435, 24, 3}, // DivRemU
317 {0, 2, 0|1<<SDNPOutGlue, 0, 0, 452, 46, 2}, // DivRemU16
318 {0, 2, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 471, 54, 2}, // EH_RETURN
319 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 490, 0, 0}, // ERet
320 {1, 2, 0|1<<SDNPHasChain, 0, 0, 504, 0, 3}, // EXTP
321 {1, 2, 0|1<<SDNPHasChain, 0, 0, 518, 0, 3}, // EXTPDP
322 {1, 2, 0|1<<SDNPHasChain, 0, 0, 534, 0, 3}, // EXTR_RS_W
323 {1, 2, 0|1<<SDNPHasChain, 0, 0, 553, 0, 3}, // EXTR_R_W
324 {1, 2, 0|1<<SDNPHasChain, 0, 0, 571, 0, 3}, // EXTR_S_H
325 {1, 2, 0|1<<SDNPHasChain, 0, 0, 589, 0, 3}, // EXTR_W
326 {1, 3, 0, 0, 0, 605, 44, 4}, // Ext
327 {1, 2, 0, 0, 0, 618, 3, 3}, // ExtractElementF64
328 {1, 3, 0, 0, 0, 645, 73, 4}, // FMS
329 {0, 3, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 658, 48, 3}, // FPBrcond
330 {0, 3, 0|1<<SDNPOutGlue, 0, 0, 676, 77, 3}, // FPCmp
331 {1, 3, 0, 0, 0, 691, 84, 3}, // FSELECT
332 {1, 1, 0, 0, 0, 708, 68, 2}, // GPRel
333 {1, 1, 0, 0, 0, 723, 68, 2}, // GotHi
334 {1, 1, 0, 0, 0, 738, 68, 2}, // Hi
335 {1, 1, 0, 0, 0, 750, 68, 2}, // Higher
336 {1, 1, 0, 0, 0, 766, 68, 2}, // Highest
337 {1, 2, 0, 0, 0, 783, 29, 4}, // ILVEV
338 {1, 2, 0, 0, 0, 798, 29, 4}, // ILVL
339 {1, 2, 0, 0, 0, 812, 29, 4}, // ILVOD
340 {1, 2, 0, 0, 0, 827, 29, 4}, // ILVR
341 {1, 4, 0, 0, 0, 841, 63, 5}, // INSVE
342 {1, 4, 0, 0, 0, 856, 43, 5}, // Ins
343 {0, 1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 869, 27, 1}, // JmpLink
344 {1, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 886, 53, 3}, // LDL
345 {1, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 899, 53, 3}, // LDR
346 {1, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 912, 53, 3}, // LWL
347 {1, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 925, 53, 3}, // LWR
348 {1, 1, 0, 0, 0, 938, 68, 2}, // Lo
349 {1, 3, 0, 0, 0, 950, 12, 4}, // MADDU_DSP
350 {1, 3, 0, 0, 0, 969, 12, 4}, // MADD_DSP
351 {1, 3, 0|1<<SDNPHasChain, 0, 0, 987, 20, 4}, // MAQ_SA_W_PHL
352 {1, 3, 0|1<<SDNPHasChain, 0, 0, 1009, 20, 4}, // MAQ_SA_W_PHR
353 {1, 3, 0|1<<SDNPHasChain, 0, 0, 1031, 20, 4}, // MAQ_S_W_PHL
354 {1, 3, 0|1<<SDNPHasChain, 0, 0, 1052, 20, 4}, // MAQ_S_W_PHR
355 {1, 3, 0, 0, 0, 1073, 12, 4}, // MAdd
356 {1, 3, 0, 0, 0, 1087, 12, 4}, // MAddu
357 {1, 1, 0, 0, 0, 1102, 51, 2}, // MFHI
358 {1, 1, 0, 0, 0, 1116, 51, 2}, // MFLO
359 {1, 3, 0, 0, 0, 1130, 12, 4}, // MSUBU_DSP
360 {1, 3, 0, 0, 0, 1149, 12, 4}, // MSUB_DSP
361 {1, 3, 0, 0, 0, 1167, 12, 4}, // MSub
362 {1, 3, 0, 0, 0, 1181, 12, 4}, // MSubu
363 {1, 1, 0, 0, 0, 1196, 7, 2}, // MTC1_D64
364 {1, 2, 0|1<<SDNPHasChain, 0, 0, 1214, 9, 3}, // MTHLIP
365 {1, 2, 0, 0, 0, 1230, 24, 3}, // MTLOHI
366 {1, 3, 0|1<<SDNPHasChain, 0, 0, 1246, 20, 4}, // MULSAQ_S_W_PH
367 {1, 3, 0, 0, 0, 1269, 20, 4}, // MULSA_W_PH
368 {1, 3, 0, 0, 0, 1289, 12, 4}, // MULT
369 {1, 3, 0, 0, 0, 1303, 12, 4}, // MULTU
370 {1, 2, 0, 0, 0, 1318, 24, 3}, // Mult
371 {1, 2, 0, 0, 0, 1332, 24, 3}, // Multu
372 {1, 2, 0, 0, 0, 1347, 29, 4}, // PCKEV
373 {1, 2, 0, 0, 0, 1362, 29, 4}, // PCKOD
374 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1377, 0, 0}, // Ret
375 {0, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1390, 83, 1}, // SDL
376 {0, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1403, 83, 1}, // SDR
377 {1, 5, 0, 0, 0, 1416, 87, 4}, // SELECT_CC_DSP
378 {1, 3, 0, 0, 0, 1439, 58, 3}, // SETCC_DSP
379 {1, 2, 0, 0, 0, 1458, 33, 4}, // SHF
380 {1, 2, 0, 0, 0, 1471, 9, 3}, // SHILO
381 {1, 2, 0, 0, 0, 1486, 65, 3}, // SHLL_DSP
382 {1, 2, 0, 0, 0, 1504, 65, 3}, // SHRA_DSP
383 {1, 2, 0, 0, 0, 1522, 65, 3}, // SHRL_DSP
384 {0, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1540, 83, 1}, // SWL
385 {0, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1553, 83, 1}, // SWR
386 {0, 1, 0|1<<SDNPHasChain, 0, 0, 1566, 2, 1}, // Sync
387 {0, 1, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1580, 27, 1}, // TailCall
388 {1, 0, 0, 0, 0, 1598, 28, 1}, // ThreadPointer
389 {1, 1, 0, 0, 0, 1621, 68, 2}, // TlsHi
390 {1, 1, 0, 0, 0, 1636, 61, 2}, // TruncIntFP
391 {1, 1, 0, 0, 0, 1656, 56, 2}, // VALL_NONZERO
392 {1, 1, 0, 0, 0, 1678, 56, 2}, // VALL_ZERO
393 {1, 1, 0, 0, 0, 1697, 56, 2}, // VANY_NONZERO
394 {1, 1, 0, 0, 0, 1719, 56, 2}, // VANY_ZERO
395 {1, 3, 0, 0, 0, 1738, 91, 1}, // VEXTRACT_SEXT_ELT
396 {1, 3, 0, 0, 0, 1765, 91, 1}, // VEXTRACT_ZEXT_ELT
397 {1, 2, 0, 0, 0, 1792, 70, 3}, // VNOR
398 {1, 3, 0, 0, 0, 1806, 37, 6}, // VSHF
399 {1, 2, 0, 0, 0, 1820, 70, 3}, // Wrapper
400};
401
402static const SDNodeInfo MipsGenSDNodeInfo(
403 /*NumOpcodes=*/106, MipsSDNodeDescs, MipsSDNodeNames,
404 MipsVTByHwModeTable, MipsSDTypeConstraints);
405
406} // namespace llvm
407
408#endif // GET_SDNODE_DESC
409
410