| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Assembly Matcher Source Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* From: PPC.td *| |
| 7 | |* *| |
| 8 | \*===----------------------------------------------------------------------===*/ |
| 9 | |
| 10 | |
| 11 | #ifdef GET_ASSEMBLER_HEADER |
| 12 | #undef GET_ASSEMBLER_HEADER |
| 13 | // This should be included into the middle of the declaration of |
| 14 | // your subclasses implementation of MCTargetAsmParser. |
| 15 | FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const; |
| 16 | void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
| 17 | const OperandVector &Operands); |
| 18 | void convertToMapAndConstraints(unsigned Kind, |
| 19 | const OperandVector &Operands) override; |
| 20 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
| 21 | MCInst &Inst, |
| 22 | uint64_t &ErrorInfo, |
| 23 | FeatureBitset &MissingFeatures, |
| 24 | bool matchingInlineAsm, |
| 25 | unsigned VariantID = 0); |
| 26 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
| 27 | MCInst &Inst, |
| 28 | uint64_t &ErrorInfo, |
| 29 | bool matchingInlineAsm, |
| 30 | unsigned VariantID = 0) { |
| 31 | FeatureBitset MissingFeatures; |
| 32 | return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, |
| 33 | matchingInlineAsm, VariantID); |
| 34 | } |
| 35 | |
| 36 | #endif // GET_ASSEMBLER_HEADER |
| 37 | |
| 38 | |
| 39 | #ifdef GET_OPERAND_DIAGNOSTIC_TYPES |
| 40 | #undef GET_OPERAND_DIAGNOSTIC_TYPES |
| 41 | |
| 42 | #endif // GET_OPERAND_DIAGNOSTIC_TYPES |
| 43 | |
| 44 | |
| 45 | #ifdef GET_REGISTER_MATCHER |
| 46 | #undef GET_REGISTER_MATCHER |
| 47 | |
| 48 | // Bits for subtarget features that participate in instruction matching. |
| 49 | enum SubtargetFeatureBits : uint8_t { |
| 50 | Feature_ModernAsBit = 0, |
| 51 | }; |
| 52 | |
| 53 | static MCRegister MatchRegisterName(StringRef Name) { |
| 54 | switch (Name.size()) { |
| 55 | default: break; |
| 56 | case 1: // 12 strings to match. |
| 57 | switch (Name[0]) { |
| 58 | default: break; |
| 59 | case '0': // 3 strings to match. |
| 60 | return PPC::ZERO; // "0" |
| 61 | case '1': // 1 string to match. |
| 62 | return PPC::CR0GT; // "1" |
| 63 | case '2': // 1 string to match. |
| 64 | return PPC::CR0EQ; // "2" |
| 65 | case '3': // 1 string to match. |
| 66 | return PPC::CR0UN; // "3" |
| 67 | case '4': // 1 string to match. |
| 68 | return PPC::CR1LT; // "4" |
| 69 | case '5': // 1 string to match. |
| 70 | return PPC::CR1GT; // "5" |
| 71 | case '6': // 1 string to match. |
| 72 | return PPC::CR1EQ; // "6" |
| 73 | case '7': // 1 string to match. |
| 74 | return PPC::CR1UN; // "7" |
| 75 | case '8': // 1 string to match. |
| 76 | return PPC::CR2LT; // "8" |
| 77 | case '9': // 1 string to match. |
| 78 | return PPC::CR2GT; // "9" |
| 79 | } |
| 80 | break; |
| 81 | case 2: // 89 strings to match. |
| 82 | switch (Name[0]) { |
| 83 | default: break; |
| 84 | case '1': // 10 strings to match. |
| 85 | switch (Name[1]) { |
| 86 | default: break; |
| 87 | case '0': // 1 string to match. |
| 88 | return PPC::CR2EQ; // "10" |
| 89 | case '1': // 1 string to match. |
| 90 | return PPC::CR2UN; // "11" |
| 91 | case '2': // 1 string to match. |
| 92 | return PPC::CR3LT; // "12" |
| 93 | case '3': // 1 string to match. |
| 94 | return PPC::CR3GT; // "13" |
| 95 | case '4': // 1 string to match. |
| 96 | return PPC::CR3EQ; // "14" |
| 97 | case '5': // 1 string to match. |
| 98 | return PPC::CR3UN; // "15" |
| 99 | case '6': // 1 string to match. |
| 100 | return PPC::CR4LT; // "16" |
| 101 | case '7': // 1 string to match. |
| 102 | return PPC::CR4GT; // "17" |
| 103 | case '8': // 1 string to match. |
| 104 | return PPC::CR4EQ; // "18" |
| 105 | case '9': // 1 string to match. |
| 106 | return PPC::CR4UN; // "19" |
| 107 | } |
| 108 | break; |
| 109 | case '2': // 10 strings to match. |
| 110 | switch (Name[1]) { |
| 111 | default: break; |
| 112 | case '0': // 1 string to match. |
| 113 | return PPC::CR5LT; // "20" |
| 114 | case '1': // 1 string to match. |
| 115 | return PPC::CR5GT; // "21" |
| 116 | case '2': // 1 string to match. |
| 117 | return PPC::CR5EQ; // "22" |
| 118 | case '3': // 1 string to match. |
| 119 | return PPC::CR5UN; // "23" |
| 120 | case '4': // 1 string to match. |
| 121 | return PPC::CR6LT; // "24" |
| 122 | case '5': // 1 string to match. |
| 123 | return PPC::CR6GT; // "25" |
| 124 | case '6': // 1 string to match. |
| 125 | return PPC::CR6EQ; // "26" |
| 126 | case '7': // 1 string to match. |
| 127 | return PPC::CR6UN; // "27" |
| 128 | case '8': // 1 string to match. |
| 129 | return PPC::CR7LT; // "28" |
| 130 | case '9': // 1 string to match. |
| 131 | return PPC::CR7GT; // "29" |
| 132 | } |
| 133 | break; |
| 134 | case '3': // 2 strings to match. |
| 135 | switch (Name[1]) { |
| 136 | default: break; |
| 137 | case '0': // 1 string to match. |
| 138 | return PPC::CR7EQ; // "30" |
| 139 | case '1': // 1 string to match. |
| 140 | return PPC::CR7UN; // "31" |
| 141 | } |
| 142 | break; |
| 143 | case 'f': // 10 strings to match. |
| 144 | switch (Name[1]) { |
| 145 | default: break; |
| 146 | case '0': // 1 string to match. |
| 147 | return PPC::F0; // "f0" |
| 148 | case '1': // 1 string to match. |
| 149 | return PPC::F1; // "f1" |
| 150 | case '2': // 1 string to match. |
| 151 | return PPC::F2; // "f2" |
| 152 | case '3': // 1 string to match. |
| 153 | return PPC::F3; // "f3" |
| 154 | case '4': // 1 string to match. |
| 155 | return PPC::F4; // "f4" |
| 156 | case '5': // 1 string to match. |
| 157 | return PPC::F5; // "f5" |
| 158 | case '6': // 1 string to match. |
| 159 | return PPC::F6; // "f6" |
| 160 | case '7': // 1 string to match. |
| 161 | return PPC::F7; // "f7" |
| 162 | case '8': // 1 string to match. |
| 163 | return PPC::F8; // "f8" |
| 164 | case '9': // 1 string to match. |
| 165 | return PPC::F9; // "f9" |
| 166 | } |
| 167 | break; |
| 168 | case 'l': // 2 strings to match. |
| 169 | if (Name[1] != 'r') |
| 170 | break; |
| 171 | return PPC::LR; // "lr" |
| 172 | case 'r': // 35 strings to match. |
| 173 | switch (Name[1]) { |
| 174 | default: break; |
| 175 | case '0': // 4 strings to match. |
| 176 | return PPC::R0; // "r0" |
| 177 | case '1': // 3 strings to match. |
| 178 | return PPC::R1; // "r1" |
| 179 | case '2': // 4 strings to match. |
| 180 | return PPC::R2; // "r2" |
| 181 | case '3': // 3 strings to match. |
| 182 | return PPC::R3; // "r3" |
| 183 | case '4': // 4 strings to match. |
| 184 | return PPC::R4; // "r4" |
| 185 | case '5': // 3 strings to match. |
| 186 | return PPC::R5; // "r5" |
| 187 | case '6': // 4 strings to match. |
| 188 | return PPC::R6; // "r6" |
| 189 | case '7': // 3 strings to match. |
| 190 | return PPC::R7; // "r7" |
| 191 | case '8': // 4 strings to match. |
| 192 | return PPC::R8; // "r8" |
| 193 | case '9': // 3 strings to match. |
| 194 | return PPC::R9; // "r9" |
| 195 | } |
| 196 | break; |
| 197 | case 'v': // 20 strings to match. |
| 198 | switch (Name[1]) { |
| 199 | default: break; |
| 200 | case '0': // 2 strings to match. |
| 201 | return PPC::V0; // "v0" |
| 202 | case '1': // 2 strings to match. |
| 203 | return PPC::V1; // "v1" |
| 204 | case '2': // 2 strings to match. |
| 205 | return PPC::V2; // "v2" |
| 206 | case '3': // 2 strings to match. |
| 207 | return PPC::V3; // "v3" |
| 208 | case '4': // 2 strings to match. |
| 209 | return PPC::V4; // "v4" |
| 210 | case '5': // 2 strings to match. |
| 211 | return PPC::V5; // "v5" |
| 212 | case '6': // 2 strings to match. |
| 213 | return PPC::V6; // "v6" |
| 214 | case '7': // 2 strings to match. |
| 215 | return PPC::V7; // "v7" |
| 216 | case '8': // 2 strings to match. |
| 217 | return PPC::V8; // "v8" |
| 218 | case '9': // 2 strings to match. |
| 219 | return PPC::V9; // "v9" |
| 220 | } |
| 221 | break; |
| 222 | } |
| 223 | break; |
| 224 | case 3: // 170 strings to match. |
| 225 | switch (Name[0]) { |
| 226 | default: break; |
| 227 | case 'c': // 10 strings to match. |
| 228 | switch (Name[1]) { |
| 229 | default: break; |
| 230 | case 'r': // 8 strings to match. |
| 231 | switch (Name[2]) { |
| 232 | default: break; |
| 233 | case '0': // 1 string to match. |
| 234 | return PPC::CR0; // "cr0" |
| 235 | case '1': // 1 string to match. |
| 236 | return PPC::CR1; // "cr1" |
| 237 | case '2': // 1 string to match. |
| 238 | return PPC::CR2; // "cr2" |
| 239 | case '3': // 1 string to match. |
| 240 | return PPC::CR3; // "cr3" |
| 241 | case '4': // 1 string to match. |
| 242 | return PPC::CR4; // "cr4" |
| 243 | case '5': // 1 string to match. |
| 244 | return PPC::CR5; // "cr5" |
| 245 | case '6': // 1 string to match. |
| 246 | return PPC::CR6; // "cr6" |
| 247 | case '7': // 1 string to match. |
| 248 | return PPC::CR7; // "cr7" |
| 249 | } |
| 250 | break; |
| 251 | case 't': // 2 strings to match. |
| 252 | if (Name[2] != 'r') |
| 253 | break; |
| 254 | return PPC::CTR; // "ctr" |
| 255 | } |
| 256 | break; |
| 257 | case 'f': // 27 strings to match. |
| 258 | switch (Name[1]) { |
| 259 | default: break; |
| 260 | case '1': // 10 strings to match. |
| 261 | switch (Name[2]) { |
| 262 | default: break; |
| 263 | case '0': // 1 string to match. |
| 264 | return PPC::F10; // "f10" |
| 265 | case '1': // 1 string to match. |
| 266 | return PPC::F11; // "f11" |
| 267 | case '2': // 1 string to match. |
| 268 | return PPC::F12; // "f12" |
| 269 | case '3': // 1 string to match. |
| 270 | return PPC::F13; // "f13" |
| 271 | case '4': // 1 string to match. |
| 272 | return PPC::F14; // "f14" |
| 273 | case '5': // 1 string to match. |
| 274 | return PPC::F15; // "f15" |
| 275 | case '6': // 1 string to match. |
| 276 | return PPC::F16; // "f16" |
| 277 | case '7': // 1 string to match. |
| 278 | return PPC::F17; // "f17" |
| 279 | case '8': // 1 string to match. |
| 280 | return PPC::F18; // "f18" |
| 281 | case '9': // 1 string to match. |
| 282 | return PPC::F19; // "f19" |
| 283 | } |
| 284 | break; |
| 285 | case '2': // 10 strings to match. |
| 286 | switch (Name[2]) { |
| 287 | default: break; |
| 288 | case '0': // 1 string to match. |
| 289 | return PPC::F20; // "f20" |
| 290 | case '1': // 1 string to match. |
| 291 | return PPC::F21; // "f21" |
| 292 | case '2': // 1 string to match. |
| 293 | return PPC::F22; // "f22" |
| 294 | case '3': // 1 string to match. |
| 295 | return PPC::F23; // "f23" |
| 296 | case '4': // 1 string to match. |
| 297 | return PPC::F24; // "f24" |
| 298 | case '5': // 1 string to match. |
| 299 | return PPC::F25; // "f25" |
| 300 | case '6': // 1 string to match. |
| 301 | return PPC::F26; // "f26" |
| 302 | case '7': // 1 string to match. |
| 303 | return PPC::F27; // "f27" |
| 304 | case '8': // 1 string to match. |
| 305 | return PPC::F28; // "f28" |
| 306 | case '9': // 1 string to match. |
| 307 | return PPC::F29; // "f29" |
| 308 | } |
| 309 | break; |
| 310 | case '3': // 2 strings to match. |
| 311 | switch (Name[2]) { |
| 312 | default: break; |
| 313 | case '0': // 1 string to match. |
| 314 | return PPC::F30; // "f30" |
| 315 | case '1': // 1 string to match. |
| 316 | return PPC::F31; // "f31" |
| 317 | } |
| 318 | break; |
| 319 | case 'p': // 5 strings to match. |
| 320 | switch (Name[2]) { |
| 321 | default: break; |
| 322 | case '0': // 1 string to match. |
| 323 | return PPC::Fpair0; // "fp0" |
| 324 | case '2': // 1 string to match. |
| 325 | return PPC::Fpair2; // "fp2" |
| 326 | case '4': // 1 string to match. |
| 327 | return PPC::Fpair4; // "fp4" |
| 328 | case '6': // 1 string to match. |
| 329 | return PPC::Fpair6; // "fp6" |
| 330 | case '8': // 1 string to match. |
| 331 | return PPC::Fpair8; // "fp8" |
| 332 | } |
| 333 | break; |
| 334 | } |
| 335 | break; |
| 336 | case 'r': // 77 strings to match. |
| 337 | switch (Name[1]) { |
| 338 | default: break; |
| 339 | case '1': // 35 strings to match. |
| 340 | switch (Name[2]) { |
| 341 | default: break; |
| 342 | case '0': // 4 strings to match. |
| 343 | return PPC::R10; // "r10" |
| 344 | case '1': // 3 strings to match. |
| 345 | return PPC::R11; // "r11" |
| 346 | case '2': // 4 strings to match. |
| 347 | return PPC::R12; // "r12" |
| 348 | case '3': // 3 strings to match. |
| 349 | return PPC::R13; // "r13" |
| 350 | case '4': // 4 strings to match. |
| 351 | return PPC::R14; // "r14" |
| 352 | case '5': // 3 strings to match. |
| 353 | return PPC::R15; // "r15" |
| 354 | case '6': // 4 strings to match. |
| 355 | return PPC::R16; // "r16" |
| 356 | case '7': // 3 strings to match. |
| 357 | return PPC::R17; // "r17" |
| 358 | case '8': // 4 strings to match. |
| 359 | return PPC::R18; // "r18" |
| 360 | case '9': // 3 strings to match. |
| 361 | return PPC::R19; // "r19" |
| 362 | } |
| 363 | break; |
| 364 | case '2': // 35 strings to match. |
| 365 | switch (Name[2]) { |
| 366 | default: break; |
| 367 | case '0': // 4 strings to match. |
| 368 | return PPC::R20; // "r20" |
| 369 | case '1': // 3 strings to match. |
| 370 | return PPC::R21; // "r21" |
| 371 | case '2': // 4 strings to match. |
| 372 | return PPC::R22; // "r22" |
| 373 | case '3': // 3 strings to match. |
| 374 | return PPC::R23; // "r23" |
| 375 | case '4': // 4 strings to match. |
| 376 | return PPC::R24; // "r24" |
| 377 | case '5': // 3 strings to match. |
| 378 | return PPC::R25; // "r25" |
| 379 | case '6': // 4 strings to match. |
| 380 | return PPC::R26; // "r26" |
| 381 | case '7': // 3 strings to match. |
| 382 | return PPC::R27; // "r27" |
| 383 | case '8': // 4 strings to match. |
| 384 | return PPC::R28; // "r28" |
| 385 | case '9': // 3 strings to match. |
| 386 | return PPC::R29; // "r29" |
| 387 | } |
| 388 | break; |
| 389 | case '3': // 7 strings to match. |
| 390 | switch (Name[2]) { |
| 391 | default: break; |
| 392 | case '0': // 4 strings to match. |
| 393 | return PPC::R30; // "r30" |
| 394 | case '1': // 3 strings to match. |
| 395 | return PPC::R31; // "r31" |
| 396 | } |
| 397 | break; |
| 398 | } |
| 399 | break; |
| 400 | case 'v': // 54 strings to match. |
| 401 | switch (Name[1]) { |
| 402 | default: break; |
| 403 | case '1': // 20 strings to match. |
| 404 | switch (Name[2]) { |
| 405 | default: break; |
| 406 | case '0': // 2 strings to match. |
| 407 | return PPC::V10; // "v10" |
| 408 | case '1': // 2 strings to match. |
| 409 | return PPC::V11; // "v11" |
| 410 | case '2': // 2 strings to match. |
| 411 | return PPC::V12; // "v12" |
| 412 | case '3': // 2 strings to match. |
| 413 | return PPC::V13; // "v13" |
| 414 | case '4': // 2 strings to match. |
| 415 | return PPC::V14; // "v14" |
| 416 | case '5': // 2 strings to match. |
| 417 | return PPC::V15; // "v15" |
| 418 | case '6': // 2 strings to match. |
| 419 | return PPC::V16; // "v16" |
| 420 | case '7': // 2 strings to match. |
| 421 | return PPC::V17; // "v17" |
| 422 | case '8': // 2 strings to match. |
| 423 | return PPC::V18; // "v18" |
| 424 | case '9': // 2 strings to match. |
| 425 | return PPC::V19; // "v19" |
| 426 | } |
| 427 | break; |
| 428 | case '2': // 20 strings to match. |
| 429 | switch (Name[2]) { |
| 430 | default: break; |
| 431 | case '0': // 2 strings to match. |
| 432 | return PPC::V20; // "v20" |
| 433 | case '1': // 2 strings to match. |
| 434 | return PPC::V21; // "v21" |
| 435 | case '2': // 2 strings to match. |
| 436 | return PPC::V22; // "v22" |
| 437 | case '3': // 2 strings to match. |
| 438 | return PPC::V23; // "v23" |
| 439 | case '4': // 2 strings to match. |
| 440 | return PPC::V24; // "v24" |
| 441 | case '5': // 2 strings to match. |
| 442 | return PPC::V25; // "v25" |
| 443 | case '6': // 2 strings to match. |
| 444 | return PPC::V26; // "v26" |
| 445 | case '7': // 2 strings to match. |
| 446 | return PPC::V27; // "v27" |
| 447 | case '8': // 2 strings to match. |
| 448 | return PPC::V28; // "v28" |
| 449 | case '9': // 2 strings to match. |
| 450 | return PPC::V29; // "v29" |
| 451 | } |
| 452 | break; |
| 453 | case '3': // 4 strings to match. |
| 454 | switch (Name[2]) { |
| 455 | default: break; |
| 456 | case '0': // 2 strings to match. |
| 457 | return PPC::V30; // "v30" |
| 458 | case '1': // 2 strings to match. |
| 459 | return PPC::V31; // "v31" |
| 460 | } |
| 461 | break; |
| 462 | case 's': // 10 strings to match. |
| 463 | switch (Name[2]) { |
| 464 | default: break; |
| 465 | case '0': // 1 string to match. |
| 466 | return PPC::VSL0; // "vs0" |
| 467 | case '1': // 1 string to match. |
| 468 | return PPC::VSL1; // "vs1" |
| 469 | case '2': // 1 string to match. |
| 470 | return PPC::VSL2; // "vs2" |
| 471 | case '3': // 1 string to match. |
| 472 | return PPC::VSL3; // "vs3" |
| 473 | case '4': // 1 string to match. |
| 474 | return PPC::VSL4; // "vs4" |
| 475 | case '5': // 1 string to match. |
| 476 | return PPC::VSL5; // "vs5" |
| 477 | case '6': // 1 string to match. |
| 478 | return PPC::VSL6; // "vs6" |
| 479 | case '7': // 1 string to match. |
| 480 | return PPC::VSL7; // "vs7" |
| 481 | case '8': // 1 string to match. |
| 482 | return PPC::VSL8; // "vs8" |
| 483 | case '9': // 1 string to match. |
| 484 | return PPC::VSL9; // "vs9" |
| 485 | } |
| 486 | break; |
| 487 | } |
| 488 | break; |
| 489 | case 'x': // 2 strings to match. |
| 490 | if (memcmp(Name.data()+1, "er" , 2) != 0) |
| 491 | break; |
| 492 | return PPC::CARRY; // "xer" |
| 493 | } |
| 494 | break; |
| 495 | case 4: // 94 strings to match. |
| 496 | switch (Name[0]) { |
| 497 | default: break; |
| 498 | case 'a': // 16 strings to match. |
| 499 | if (memcmp(Name.data()+1, "cc" , 2) != 0) |
| 500 | break; |
| 501 | switch (Name[3]) { |
| 502 | default: break; |
| 503 | case '0': // 2 strings to match. |
| 504 | return PPC::ACC0; // "acc0" |
| 505 | case '1': // 2 strings to match. |
| 506 | return PPC::ACC1; // "acc1" |
| 507 | case '2': // 2 strings to match. |
| 508 | return PPC::ACC2; // "acc2" |
| 509 | case '3': // 2 strings to match. |
| 510 | return PPC::ACC3; // "acc3" |
| 511 | case '4': // 2 strings to match. |
| 512 | return PPC::ACC4; // "acc4" |
| 513 | case '5': // 2 strings to match. |
| 514 | return PPC::ACC5; // "acc5" |
| 515 | case '6': // 2 strings to match. |
| 516 | return PPC::ACC6; // "acc6" |
| 517 | case '7': // 2 strings to match. |
| 518 | return PPC::ACC7; // "acc7" |
| 519 | } |
| 520 | break; |
| 521 | case 'd': // 8 strings to match. |
| 522 | if (memcmp(Name.data()+1, "mr" , 2) != 0) |
| 523 | break; |
| 524 | switch (Name[3]) { |
| 525 | default: break; |
| 526 | case '0': // 1 string to match. |
| 527 | return PPC::DMR0; // "dmr0" |
| 528 | case '1': // 1 string to match. |
| 529 | return PPC::DMR1; // "dmr1" |
| 530 | case '2': // 1 string to match. |
| 531 | return PPC::DMR2; // "dmr2" |
| 532 | case '3': // 1 string to match. |
| 533 | return PPC::DMR3; // "dmr3" |
| 534 | case '4': // 1 string to match. |
| 535 | return PPC::DMR4; // "dmr4" |
| 536 | case '5': // 1 string to match. |
| 537 | return PPC::DMR5; // "dmr5" |
| 538 | case '6': // 1 string to match. |
| 539 | return PPC::DMR6; // "dmr6" |
| 540 | case '7': // 1 string to match. |
| 541 | return PPC::DMR7; // "dmr7" |
| 542 | } |
| 543 | break; |
| 544 | case 'f': // 11 strings to match. |
| 545 | if (Name[1] != 'p') |
| 546 | break; |
| 547 | switch (Name[2]) { |
| 548 | default: break; |
| 549 | case '1': // 5 strings to match. |
| 550 | switch (Name[3]) { |
| 551 | default: break; |
| 552 | case '0': // 1 string to match. |
| 553 | return PPC::Fpair10; // "fp10" |
| 554 | case '2': // 1 string to match. |
| 555 | return PPC::Fpair12; // "fp12" |
| 556 | case '4': // 1 string to match. |
| 557 | return PPC::Fpair14; // "fp14" |
| 558 | case '6': // 1 string to match. |
| 559 | return PPC::Fpair16; // "fp16" |
| 560 | case '8': // 1 string to match. |
| 561 | return PPC::Fpair18; // "fp18" |
| 562 | } |
| 563 | break; |
| 564 | case '2': // 5 strings to match. |
| 565 | switch (Name[3]) { |
| 566 | default: break; |
| 567 | case '0': // 1 string to match. |
| 568 | return PPC::Fpair20; // "fp20" |
| 569 | case '2': // 1 string to match. |
| 570 | return PPC::Fpair22; // "fp22" |
| 571 | case '4': // 1 string to match. |
| 572 | return PPC::Fpair24; // "fp24" |
| 573 | case '6': // 1 string to match. |
| 574 | return PPC::Fpair26; // "fp26" |
| 575 | case '8': // 1 string to match. |
| 576 | return PPC::Fpair28; // "fp28" |
| 577 | } |
| 578 | break; |
| 579 | case '3': // 1 string to match. |
| 580 | if (Name[3] != '0') |
| 581 | break; |
| 582 | return PPC::Fpair30; // "fp30" |
| 583 | } |
| 584 | break; |
| 585 | case 'v': // 59 strings to match. |
| 586 | if (Name[1] != 's') |
| 587 | break; |
| 588 | switch (Name[2]) { |
| 589 | default: break; |
| 590 | case '1': // 10 strings to match. |
| 591 | switch (Name[3]) { |
| 592 | default: break; |
| 593 | case '0': // 1 string to match. |
| 594 | return PPC::VSL10; // "vs10" |
| 595 | case '1': // 1 string to match. |
| 596 | return PPC::VSL11; // "vs11" |
| 597 | case '2': // 1 string to match. |
| 598 | return PPC::VSL12; // "vs12" |
| 599 | case '3': // 1 string to match. |
| 600 | return PPC::VSL13; // "vs13" |
| 601 | case '4': // 1 string to match. |
| 602 | return PPC::VSL14; // "vs14" |
| 603 | case '5': // 1 string to match. |
| 604 | return PPC::VSL15; // "vs15" |
| 605 | case '6': // 1 string to match. |
| 606 | return PPC::VSL16; // "vs16" |
| 607 | case '7': // 1 string to match. |
| 608 | return PPC::VSL17; // "vs17" |
| 609 | case '8': // 1 string to match. |
| 610 | return PPC::VSL18; // "vs18" |
| 611 | case '9': // 1 string to match. |
| 612 | return PPC::VSL19; // "vs19" |
| 613 | } |
| 614 | break; |
| 615 | case '2': // 10 strings to match. |
| 616 | switch (Name[3]) { |
| 617 | default: break; |
| 618 | case '0': // 1 string to match. |
| 619 | return PPC::VSL20; // "vs20" |
| 620 | case '1': // 1 string to match. |
| 621 | return PPC::VSL21; // "vs21" |
| 622 | case '2': // 1 string to match. |
| 623 | return PPC::VSL22; // "vs22" |
| 624 | case '3': // 1 string to match. |
| 625 | return PPC::VSL23; // "vs23" |
| 626 | case '4': // 1 string to match. |
| 627 | return PPC::VSL24; // "vs24" |
| 628 | case '5': // 1 string to match. |
| 629 | return PPC::VSL25; // "vs25" |
| 630 | case '6': // 1 string to match. |
| 631 | return PPC::VSL26; // "vs26" |
| 632 | case '7': // 1 string to match. |
| 633 | return PPC::VSL27; // "vs27" |
| 634 | case '8': // 1 string to match. |
| 635 | return PPC::VSL28; // "vs28" |
| 636 | case '9': // 1 string to match. |
| 637 | return PPC::VSL29; // "vs29" |
| 638 | } |
| 639 | break; |
| 640 | case '3': // 10 strings to match. |
| 641 | switch (Name[3]) { |
| 642 | default: break; |
| 643 | case '0': // 1 string to match. |
| 644 | return PPC::VSL30; // "vs30" |
| 645 | case '1': // 1 string to match. |
| 646 | return PPC::VSL31; // "vs31" |
| 647 | case '2': // 1 string to match. |
| 648 | return PPC::VSX32; // "vs32" |
| 649 | case '3': // 1 string to match. |
| 650 | return PPC::VSX33; // "vs33" |
| 651 | case '4': // 1 string to match. |
| 652 | return PPC::VSX34; // "vs34" |
| 653 | case '5': // 1 string to match. |
| 654 | return PPC::VSX35; // "vs35" |
| 655 | case '6': // 1 string to match. |
| 656 | return PPC::VSX36; // "vs36" |
| 657 | case '7': // 1 string to match. |
| 658 | return PPC::VSX37; // "vs37" |
| 659 | case '8': // 1 string to match. |
| 660 | return PPC::VSX38; // "vs38" |
| 661 | case '9': // 1 string to match. |
| 662 | return PPC::VSX39; // "vs39" |
| 663 | } |
| 664 | break; |
| 665 | case '4': // 10 strings to match. |
| 666 | switch (Name[3]) { |
| 667 | default: break; |
| 668 | case '0': // 1 string to match. |
| 669 | return PPC::VSX40; // "vs40" |
| 670 | case '1': // 1 string to match. |
| 671 | return PPC::VSX41; // "vs41" |
| 672 | case '2': // 1 string to match. |
| 673 | return PPC::VSX42; // "vs42" |
| 674 | case '3': // 1 string to match. |
| 675 | return PPC::VSX43; // "vs43" |
| 676 | case '4': // 1 string to match. |
| 677 | return PPC::VSX44; // "vs44" |
| 678 | case '5': // 1 string to match. |
| 679 | return PPC::VSX45; // "vs45" |
| 680 | case '6': // 1 string to match. |
| 681 | return PPC::VSX46; // "vs46" |
| 682 | case '7': // 1 string to match. |
| 683 | return PPC::VSX47; // "vs47" |
| 684 | case '8': // 1 string to match. |
| 685 | return PPC::VSX48; // "vs48" |
| 686 | case '9': // 1 string to match. |
| 687 | return PPC::VSX49; // "vs49" |
| 688 | } |
| 689 | break; |
| 690 | case '5': // 10 strings to match. |
| 691 | switch (Name[3]) { |
| 692 | default: break; |
| 693 | case '0': // 1 string to match. |
| 694 | return PPC::VSX50; // "vs50" |
| 695 | case '1': // 1 string to match. |
| 696 | return PPC::VSX51; // "vs51" |
| 697 | case '2': // 1 string to match. |
| 698 | return PPC::VSX52; // "vs52" |
| 699 | case '3': // 1 string to match. |
| 700 | return PPC::VSX53; // "vs53" |
| 701 | case '4': // 1 string to match. |
| 702 | return PPC::VSX54; // "vs54" |
| 703 | case '5': // 1 string to match. |
| 704 | return PPC::VSX55; // "vs55" |
| 705 | case '6': // 1 string to match. |
| 706 | return PPC::VSX56; // "vs56" |
| 707 | case '7': // 1 string to match. |
| 708 | return PPC::VSX57; // "vs57" |
| 709 | case '8': // 1 string to match. |
| 710 | return PPC::VSX58; // "vs58" |
| 711 | case '9': // 1 string to match. |
| 712 | return PPC::VSX59; // "vs59" |
| 713 | } |
| 714 | break; |
| 715 | case '6': // 4 strings to match. |
| 716 | switch (Name[3]) { |
| 717 | default: break; |
| 718 | case '0': // 1 string to match. |
| 719 | return PPC::VSX60; // "vs60" |
| 720 | case '1': // 1 string to match. |
| 721 | return PPC::VSX61; // "vs61" |
| 722 | case '2': // 1 string to match. |
| 723 | return PPC::VSX62; // "vs62" |
| 724 | case '3': // 1 string to match. |
| 725 | return PPC::VSX63; // "vs63" |
| 726 | } |
| 727 | break; |
| 728 | case 'p': // 5 strings to match. |
| 729 | switch (Name[3]) { |
| 730 | default: break; |
| 731 | case '0': // 1 string to match. |
| 732 | return PPC::VSRp0; // "vsp0" |
| 733 | case '2': // 1 string to match. |
| 734 | return PPC::VSRp1; // "vsp2" |
| 735 | case '4': // 1 string to match. |
| 736 | return PPC::VSRp2; // "vsp4" |
| 737 | case '6': // 1 string to match. |
| 738 | return PPC::VSRp3; // "vsp6" |
| 739 | case '8': // 1 string to match. |
| 740 | return PPC::VSRp4; // "vsp8" |
| 741 | } |
| 742 | break; |
| 743 | } |
| 744 | break; |
| 745 | } |
| 746 | break; |
| 747 | case 5: // 39 strings to match. |
| 748 | switch (Name[0]) { |
| 749 | default: break; |
| 750 | case 'd': // 4 strings to match. |
| 751 | if (memcmp(Name.data()+1, "mrp" , 3) != 0) |
| 752 | break; |
| 753 | switch (Name[4]) { |
| 754 | default: break; |
| 755 | case '0': // 1 string to match. |
| 756 | return PPC::DMRp0; // "dmrp0" |
| 757 | case '1': // 1 string to match. |
| 758 | return PPC::DMRp1; // "dmrp1" |
| 759 | case '2': // 1 string to match. |
| 760 | return PPC::DMRp2; // "dmrp2" |
| 761 | case '3': // 1 string to match. |
| 762 | return PPC::DMRp3; // "dmrp3" |
| 763 | } |
| 764 | break; |
| 765 | case 'v': // 27 strings to match. |
| 766 | if (memcmp(Name.data()+1, "sp" , 2) != 0) |
| 767 | break; |
| 768 | switch (Name[3]) { |
| 769 | default: break; |
| 770 | case '1': // 5 strings to match. |
| 771 | switch (Name[4]) { |
| 772 | default: break; |
| 773 | case '0': // 1 string to match. |
| 774 | return PPC::VSRp5; // "vsp10" |
| 775 | case '2': // 1 string to match. |
| 776 | return PPC::VSRp6; // "vsp12" |
| 777 | case '4': // 1 string to match. |
| 778 | return PPC::VSRp7; // "vsp14" |
| 779 | case '6': // 1 string to match. |
| 780 | return PPC::VSRp8; // "vsp16" |
| 781 | case '8': // 1 string to match. |
| 782 | return PPC::VSRp9; // "vsp18" |
| 783 | } |
| 784 | break; |
| 785 | case '2': // 5 strings to match. |
| 786 | switch (Name[4]) { |
| 787 | default: break; |
| 788 | case '0': // 1 string to match. |
| 789 | return PPC::VSRp10; // "vsp20" |
| 790 | case '2': // 1 string to match. |
| 791 | return PPC::VSRp11; // "vsp22" |
| 792 | case '4': // 1 string to match. |
| 793 | return PPC::VSRp12; // "vsp24" |
| 794 | case '6': // 1 string to match. |
| 795 | return PPC::VSRp13; // "vsp26" |
| 796 | case '8': // 1 string to match. |
| 797 | return PPC::VSRp14; // "vsp28" |
| 798 | } |
| 799 | break; |
| 800 | case '3': // 5 strings to match. |
| 801 | switch (Name[4]) { |
| 802 | default: break; |
| 803 | case '0': // 1 string to match. |
| 804 | return PPC::VSRp15; // "vsp30" |
| 805 | case '2': // 1 string to match. |
| 806 | return PPC::VSRp16; // "vsp32" |
| 807 | case '4': // 1 string to match. |
| 808 | return PPC::VSRp17; // "vsp34" |
| 809 | case '6': // 1 string to match. |
| 810 | return PPC::VSRp18; // "vsp36" |
| 811 | case '8': // 1 string to match. |
| 812 | return PPC::VSRp19; // "vsp38" |
| 813 | } |
| 814 | break; |
| 815 | case '4': // 5 strings to match. |
| 816 | switch (Name[4]) { |
| 817 | default: break; |
| 818 | case '0': // 1 string to match. |
| 819 | return PPC::VSRp20; // "vsp40" |
| 820 | case '2': // 1 string to match. |
| 821 | return PPC::VSRp21; // "vsp42" |
| 822 | case '4': // 1 string to match. |
| 823 | return PPC::VSRp22; // "vsp44" |
| 824 | case '6': // 1 string to match. |
| 825 | return PPC::VSRp23; // "vsp46" |
| 826 | case '8': // 1 string to match. |
| 827 | return PPC::VSRp24; // "vsp48" |
| 828 | } |
| 829 | break; |
| 830 | case '5': // 5 strings to match. |
| 831 | switch (Name[4]) { |
| 832 | default: break; |
| 833 | case '0': // 1 string to match. |
| 834 | return PPC::VSRp25; // "vsp50" |
| 835 | case '2': // 1 string to match. |
| 836 | return PPC::VSRp26; // "vsp52" |
| 837 | case '4': // 1 string to match. |
| 838 | return PPC::VSRp27; // "vsp54" |
| 839 | case '6': // 1 string to match. |
| 840 | return PPC::VSRp28; // "vsp56" |
| 841 | case '8': // 1 string to match. |
| 842 | return PPC::VSRp29; // "vsp58" |
| 843 | } |
| 844 | break; |
| 845 | case '6': // 2 strings to match. |
| 846 | switch (Name[4]) { |
| 847 | default: break; |
| 848 | case '0': // 1 string to match. |
| 849 | return PPC::VSRp30; // "vsp60" |
| 850 | case '2': // 1 string to match. |
| 851 | return PPC::VSRp31; // "vsp62" |
| 852 | } |
| 853 | break; |
| 854 | } |
| 855 | break; |
| 856 | case 'w': // 8 strings to match. |
| 857 | if (memcmp(Name.data()+1, "acc" , 3) != 0) |
| 858 | break; |
| 859 | switch (Name[4]) { |
| 860 | default: break; |
| 861 | case '0': // 1 string to match. |
| 862 | return PPC::WACC0; // "wacc0" |
| 863 | case '1': // 1 string to match. |
| 864 | return PPC::WACC1; // "wacc1" |
| 865 | case '2': // 1 string to match. |
| 866 | return PPC::WACC2; // "wacc2" |
| 867 | case '3': // 1 string to match. |
| 868 | return PPC::WACC3; // "wacc3" |
| 869 | case '4': // 1 string to match. |
| 870 | return PPC::WACC4; // "wacc4" |
| 871 | case '5': // 1 string to match. |
| 872 | return PPC::WACC5; // "wacc5" |
| 873 | case '6': // 1 string to match. |
| 874 | return PPC::WACC6; // "wacc6" |
| 875 | case '7': // 1 string to match. |
| 876 | return PPC::WACC7; // "wacc7" |
| 877 | } |
| 878 | break; |
| 879 | } |
| 880 | break; |
| 881 | case 6: // 1 string to match. |
| 882 | if (memcmp(Name.data()+0, "vrsave" , 6) != 0) |
| 883 | break; |
| 884 | return PPC::VRSAVE; // "vrsave" |
| 885 | case 7: // 11 strings to match. |
| 886 | switch (Name[0]) { |
| 887 | default: break; |
| 888 | case 'd': // 10 strings to match. |
| 889 | if (memcmp(Name.data()+1, "mrrow" , 5) != 0) |
| 890 | break; |
| 891 | switch (Name[6]) { |
| 892 | default: break; |
| 893 | case '0': // 1 string to match. |
| 894 | return PPC::DMRROW0; // "dmrrow0" |
| 895 | case '1': // 1 string to match. |
| 896 | return PPC::DMRROW1; // "dmrrow1" |
| 897 | case '2': // 1 string to match. |
| 898 | return PPC::DMRROW2; // "dmrrow2" |
| 899 | case '3': // 1 string to match. |
| 900 | return PPC::DMRROW3; // "dmrrow3" |
| 901 | case '4': // 1 string to match. |
| 902 | return PPC::DMRROW4; // "dmrrow4" |
| 903 | case '5': // 1 string to match. |
| 904 | return PPC::DMRROW5; // "dmrrow5" |
| 905 | case '6': // 1 string to match. |
| 906 | return PPC::DMRROW6; // "dmrrow6" |
| 907 | case '7': // 1 string to match. |
| 908 | return PPC::DMRROW7; // "dmrrow7" |
| 909 | case '8': // 1 string to match. |
| 910 | return PPC::DMRROW8; // "dmrrow8" |
| 911 | case '9': // 1 string to match. |
| 912 | return PPC::DMRROW9; // "dmrrow9" |
| 913 | } |
| 914 | break; |
| 915 | case 's': // 1 string to match. |
| 916 | if (memcmp(Name.data()+1, "pefscr" , 6) != 0) |
| 917 | break; |
| 918 | return PPC::SPEFSCR; // "spefscr" |
| 919 | } |
| 920 | break; |
| 921 | case 8: // 72 strings to match. |
| 922 | switch (Name[0]) { |
| 923 | default: break; |
| 924 | case 'd': // 64 strings to match. |
| 925 | if (memcmp(Name.data()+1, "mrrow" , 5) != 0) |
| 926 | break; |
| 927 | switch (Name[6]) { |
| 928 | default: break; |
| 929 | case '1': // 10 strings to match. |
| 930 | switch (Name[7]) { |
| 931 | default: break; |
| 932 | case '0': // 1 string to match. |
| 933 | return PPC::DMRROW10; // "dmrrow10" |
| 934 | case '1': // 1 string to match. |
| 935 | return PPC::DMRROW11; // "dmrrow11" |
| 936 | case '2': // 1 string to match. |
| 937 | return PPC::DMRROW12; // "dmrrow12" |
| 938 | case '3': // 1 string to match. |
| 939 | return PPC::DMRROW13; // "dmrrow13" |
| 940 | case '4': // 1 string to match. |
| 941 | return PPC::DMRROW14; // "dmrrow14" |
| 942 | case '5': // 1 string to match. |
| 943 | return PPC::DMRROW15; // "dmrrow15" |
| 944 | case '6': // 1 string to match. |
| 945 | return PPC::DMRROW16; // "dmrrow16" |
| 946 | case '7': // 1 string to match. |
| 947 | return PPC::DMRROW17; // "dmrrow17" |
| 948 | case '8': // 1 string to match. |
| 949 | return PPC::DMRROW18; // "dmrrow18" |
| 950 | case '9': // 1 string to match. |
| 951 | return PPC::DMRROW19; // "dmrrow19" |
| 952 | } |
| 953 | break; |
| 954 | case '2': // 10 strings to match. |
| 955 | switch (Name[7]) { |
| 956 | default: break; |
| 957 | case '0': // 1 string to match. |
| 958 | return PPC::DMRROW20; // "dmrrow20" |
| 959 | case '1': // 1 string to match. |
| 960 | return PPC::DMRROW21; // "dmrrow21" |
| 961 | case '2': // 1 string to match. |
| 962 | return PPC::DMRROW22; // "dmrrow22" |
| 963 | case '3': // 1 string to match. |
| 964 | return PPC::DMRROW23; // "dmrrow23" |
| 965 | case '4': // 1 string to match. |
| 966 | return PPC::DMRROW24; // "dmrrow24" |
| 967 | case '5': // 1 string to match. |
| 968 | return PPC::DMRROW25; // "dmrrow25" |
| 969 | case '6': // 1 string to match. |
| 970 | return PPC::DMRROW26; // "dmrrow26" |
| 971 | case '7': // 1 string to match. |
| 972 | return PPC::DMRROW27; // "dmrrow27" |
| 973 | case '8': // 1 string to match. |
| 974 | return PPC::DMRROW28; // "dmrrow28" |
| 975 | case '9': // 1 string to match. |
| 976 | return PPC::DMRROW29; // "dmrrow29" |
| 977 | } |
| 978 | break; |
| 979 | case '3': // 10 strings to match. |
| 980 | switch (Name[7]) { |
| 981 | default: break; |
| 982 | case '0': // 1 string to match. |
| 983 | return PPC::DMRROW30; // "dmrrow30" |
| 984 | case '1': // 1 string to match. |
| 985 | return PPC::DMRROW31; // "dmrrow31" |
| 986 | case '2': // 1 string to match. |
| 987 | return PPC::DMRROW32; // "dmrrow32" |
| 988 | case '3': // 1 string to match. |
| 989 | return PPC::DMRROW33; // "dmrrow33" |
| 990 | case '4': // 1 string to match. |
| 991 | return PPC::DMRROW34; // "dmrrow34" |
| 992 | case '5': // 1 string to match. |
| 993 | return PPC::DMRROW35; // "dmrrow35" |
| 994 | case '6': // 1 string to match. |
| 995 | return PPC::DMRROW36; // "dmrrow36" |
| 996 | case '7': // 1 string to match. |
| 997 | return PPC::DMRROW37; // "dmrrow37" |
| 998 | case '8': // 1 string to match. |
| 999 | return PPC::DMRROW38; // "dmrrow38" |
| 1000 | case '9': // 1 string to match. |
| 1001 | return PPC::DMRROW39; // "dmrrow39" |
| 1002 | } |
| 1003 | break; |
| 1004 | case '4': // 10 strings to match. |
| 1005 | switch (Name[7]) { |
| 1006 | default: break; |
| 1007 | case '0': // 1 string to match. |
| 1008 | return PPC::DMRROW40; // "dmrrow40" |
| 1009 | case '1': // 1 string to match. |
| 1010 | return PPC::DMRROW41; // "dmrrow41" |
| 1011 | case '2': // 1 string to match. |
| 1012 | return PPC::DMRROW42; // "dmrrow42" |
| 1013 | case '3': // 1 string to match. |
| 1014 | return PPC::DMRROW43; // "dmrrow43" |
| 1015 | case '4': // 1 string to match. |
| 1016 | return PPC::DMRROW44; // "dmrrow44" |
| 1017 | case '5': // 1 string to match. |
| 1018 | return PPC::DMRROW45; // "dmrrow45" |
| 1019 | case '6': // 1 string to match. |
| 1020 | return PPC::DMRROW46; // "dmrrow46" |
| 1021 | case '7': // 1 string to match. |
| 1022 | return PPC::DMRROW47; // "dmrrow47" |
| 1023 | case '8': // 1 string to match. |
| 1024 | return PPC::DMRROW48; // "dmrrow48" |
| 1025 | case '9': // 1 string to match. |
| 1026 | return PPC::DMRROW49; // "dmrrow49" |
| 1027 | } |
| 1028 | break; |
| 1029 | case '5': // 10 strings to match. |
| 1030 | switch (Name[7]) { |
| 1031 | default: break; |
| 1032 | case '0': // 1 string to match. |
| 1033 | return PPC::DMRROW50; // "dmrrow50" |
| 1034 | case '1': // 1 string to match. |
| 1035 | return PPC::DMRROW51; // "dmrrow51" |
| 1036 | case '2': // 1 string to match. |
| 1037 | return PPC::DMRROW52; // "dmrrow52" |
| 1038 | case '3': // 1 string to match. |
| 1039 | return PPC::DMRROW53; // "dmrrow53" |
| 1040 | case '4': // 1 string to match. |
| 1041 | return PPC::DMRROW54; // "dmrrow54" |
| 1042 | case '5': // 1 string to match. |
| 1043 | return PPC::DMRROW55; // "dmrrow55" |
| 1044 | case '6': // 1 string to match. |
| 1045 | return PPC::DMRROW56; // "dmrrow56" |
| 1046 | case '7': // 1 string to match. |
| 1047 | return PPC::DMRROW57; // "dmrrow57" |
| 1048 | case '8': // 1 string to match. |
| 1049 | return PPC::DMRROW58; // "dmrrow58" |
| 1050 | case '9': // 1 string to match. |
| 1051 | return PPC::DMRROW59; // "dmrrow59" |
| 1052 | } |
| 1053 | break; |
| 1054 | case '6': // 4 strings to match. |
| 1055 | switch (Name[7]) { |
| 1056 | default: break; |
| 1057 | case '0': // 1 string to match. |
| 1058 | return PPC::DMRROW60; // "dmrrow60" |
| 1059 | case '1': // 1 string to match. |
| 1060 | return PPC::DMRROW61; // "dmrrow61" |
| 1061 | case '2': // 1 string to match. |
| 1062 | return PPC::DMRROW62; // "dmrrow62" |
| 1063 | case '3': // 1 string to match. |
| 1064 | return PPC::DMRROW63; // "dmrrow63" |
| 1065 | } |
| 1066 | break; |
| 1067 | case 'p': // 10 strings to match. |
| 1068 | switch (Name[7]) { |
| 1069 | default: break; |
| 1070 | case '0': // 1 string to match. |
| 1071 | return PPC::DMRROWp0; // "dmrrowp0" |
| 1072 | case '1': // 1 string to match. |
| 1073 | return PPC::DMRROWp1; // "dmrrowp1" |
| 1074 | case '2': // 1 string to match. |
| 1075 | return PPC::DMRROWp2; // "dmrrowp2" |
| 1076 | case '3': // 1 string to match. |
| 1077 | return PPC::DMRROWp3; // "dmrrowp3" |
| 1078 | case '4': // 1 string to match. |
| 1079 | return PPC::DMRROWp4; // "dmrrowp4" |
| 1080 | case '5': // 1 string to match. |
| 1081 | return PPC::DMRROWp5; // "dmrrowp5" |
| 1082 | case '6': // 1 string to match. |
| 1083 | return PPC::DMRROWp6; // "dmrrowp6" |
| 1084 | case '7': // 1 string to match. |
| 1085 | return PPC::DMRROWp7; // "dmrrowp7" |
| 1086 | case '8': // 1 string to match. |
| 1087 | return PPC::DMRROWp8; // "dmrrowp8" |
| 1088 | case '9': // 1 string to match. |
| 1089 | return PPC::DMRROWp9; // "dmrrowp9" |
| 1090 | } |
| 1091 | break; |
| 1092 | } |
| 1093 | break; |
| 1094 | case 'w': // 8 strings to match. |
| 1095 | if (memcmp(Name.data()+1, "acc_hi" , 6) != 0) |
| 1096 | break; |
| 1097 | switch (Name[7]) { |
| 1098 | default: break; |
| 1099 | case '0': // 1 string to match. |
| 1100 | return PPC::WACC_HI0; // "wacc_hi0" |
| 1101 | case '1': // 1 string to match. |
| 1102 | return PPC::WACC_HI1; // "wacc_hi1" |
| 1103 | case '2': // 1 string to match. |
| 1104 | return PPC::WACC_HI2; // "wacc_hi2" |
| 1105 | case '3': // 1 string to match. |
| 1106 | return PPC::WACC_HI3; // "wacc_hi3" |
| 1107 | case '4': // 1 string to match. |
| 1108 | return PPC::WACC_HI4; // "wacc_hi4" |
| 1109 | case '5': // 1 string to match. |
| 1110 | return PPC::WACC_HI5; // "wacc_hi5" |
| 1111 | case '6': // 1 string to match. |
| 1112 | return PPC::WACC_HI6; // "wacc_hi6" |
| 1113 | case '7': // 1 string to match. |
| 1114 | return PPC::WACC_HI7; // "wacc_hi7" |
| 1115 | } |
| 1116 | break; |
| 1117 | } |
| 1118 | break; |
| 1119 | case 9: // 22 strings to match. |
| 1120 | if (memcmp(Name.data()+0, "dmrrowp" , 7) != 0) |
| 1121 | break; |
| 1122 | switch (Name[7]) { |
| 1123 | default: break; |
| 1124 | case '1': // 10 strings to match. |
| 1125 | switch (Name[8]) { |
| 1126 | default: break; |
| 1127 | case '0': // 1 string to match. |
| 1128 | return PPC::DMRROWp10; // "dmrrowp10" |
| 1129 | case '1': // 1 string to match. |
| 1130 | return PPC::DMRROWp11; // "dmrrowp11" |
| 1131 | case '2': // 1 string to match. |
| 1132 | return PPC::DMRROWp12; // "dmrrowp12" |
| 1133 | case '3': // 1 string to match. |
| 1134 | return PPC::DMRROWp13; // "dmrrowp13" |
| 1135 | case '4': // 1 string to match. |
| 1136 | return PPC::DMRROWp14; // "dmrrowp14" |
| 1137 | case '5': // 1 string to match. |
| 1138 | return PPC::DMRROWp15; // "dmrrowp15" |
| 1139 | case '6': // 1 string to match. |
| 1140 | return PPC::DMRROWp16; // "dmrrowp16" |
| 1141 | case '7': // 1 string to match. |
| 1142 | return PPC::DMRROWp17; // "dmrrowp17" |
| 1143 | case '8': // 1 string to match. |
| 1144 | return PPC::DMRROWp18; // "dmrrowp18" |
| 1145 | case '9': // 1 string to match. |
| 1146 | return PPC::DMRROWp19; // "dmrrowp19" |
| 1147 | } |
| 1148 | break; |
| 1149 | case '2': // 10 strings to match. |
| 1150 | switch (Name[8]) { |
| 1151 | default: break; |
| 1152 | case '0': // 1 string to match. |
| 1153 | return PPC::DMRROWp20; // "dmrrowp20" |
| 1154 | case '1': // 1 string to match. |
| 1155 | return PPC::DMRROWp21; // "dmrrowp21" |
| 1156 | case '2': // 1 string to match. |
| 1157 | return PPC::DMRROWp22; // "dmrrowp22" |
| 1158 | case '3': // 1 string to match. |
| 1159 | return PPC::DMRROWp23; // "dmrrowp23" |
| 1160 | case '4': // 1 string to match. |
| 1161 | return PPC::DMRROWp24; // "dmrrowp24" |
| 1162 | case '5': // 1 string to match. |
| 1163 | return PPC::DMRROWp25; // "dmrrowp25" |
| 1164 | case '6': // 1 string to match. |
| 1165 | return PPC::DMRROWp26; // "dmrrowp26" |
| 1166 | case '7': // 1 string to match. |
| 1167 | return PPC::DMRROWp27; // "dmrrowp27" |
| 1168 | case '8': // 1 string to match. |
| 1169 | return PPC::DMRROWp28; // "dmrrowp28" |
| 1170 | case '9': // 1 string to match. |
| 1171 | return PPC::DMRROWp29; // "dmrrowp29" |
| 1172 | } |
| 1173 | break; |
| 1174 | case '3': // 2 strings to match. |
| 1175 | switch (Name[8]) { |
| 1176 | default: break; |
| 1177 | case '0': // 1 string to match. |
| 1178 | return PPC::DMRROWp30; // "dmrrowp30" |
| 1179 | case '1': // 1 string to match. |
| 1180 | return PPC::DMRROWp31; // "dmrrowp31" |
| 1181 | } |
| 1182 | break; |
| 1183 | } |
| 1184 | break; |
| 1185 | case 16: // 2 strings to match. |
| 1186 | if (memcmp(Name.data()+0, "**BASE POINTER**" , 16) != 0) |
| 1187 | break; |
| 1188 | return PPC::BP; // "**BASE POINTER**" |
| 1189 | case 17: // 3 strings to match. |
| 1190 | if (memcmp(Name.data()+0, "**" , 2) != 0) |
| 1191 | break; |
| 1192 | switch (Name[2]) { |
| 1193 | default: break; |
| 1194 | case 'F': // 2 strings to match. |
| 1195 | if (memcmp(Name.data()+3, "RAME POINTER**" , 14) != 0) |
| 1196 | break; |
| 1197 | return PPC::FP; // "**FRAME POINTER**" |
| 1198 | case 'R': // 1 string to match. |
| 1199 | if (memcmp(Name.data()+3, "OUNDING MODE**" , 14) != 0) |
| 1200 | break; |
| 1201 | return PPC::RM; // "**ROUNDING MODE**" |
| 1202 | } |
| 1203 | break; |
| 1204 | } |
| 1205 | return PPC::NoRegister; |
| 1206 | } |
| 1207 | |
| 1208 | #endif // GET_REGISTER_MATCHER |
| 1209 | |
| 1210 | |
| 1211 | #ifdef GET_SUBTARGET_FEATURE_NAME |
| 1212 | #undef GET_SUBTARGET_FEATURE_NAME |
| 1213 | |
| 1214 | // User-level names for subtarget features that participate in |
| 1215 | // instruction matching. |
| 1216 | static const char *getSubtargetFeatureName(uint64_t Val) { |
| 1217 | switch(Val) { |
| 1218 | case Feature_ModernAsBit: return "" ; |
| 1219 | default: return "(unknown)" ; |
| 1220 | } |
| 1221 | } |
| 1222 | |
| 1223 | #endif // GET_SUBTARGET_FEATURE_NAME |
| 1224 | |
| 1225 | |
| 1226 | #ifdef GET_MATCHER_IMPLEMENTATION |
| 1227 | #undef GET_MATCHER_IMPLEMENTATION |
| 1228 | |
| 1229 | static void applyMnemonicAliases(StringRef &Mnemonic, const FeatureBitset &Features, unsigned VariantID) { |
| 1230 | switch (Mnemonic.size()) { |
| 1231 | default: break; |
| 1232 | case 5: // 1 string to match. |
| 1233 | if (memcmp(Mnemonic.data()+0, "cntlz" , 5) != 0) |
| 1234 | break; |
| 1235 | Mnemonic = "cntlzw" ; // "cntlz" |
| 1236 | return; |
| 1237 | case 6: // 1 string to match. |
| 1238 | if (memcmp(Mnemonic.data()+0, "cntlz." , 6) != 0) |
| 1239 | break; |
| 1240 | Mnemonic = "cntlzw." ; // "cntlz." |
| 1241 | return; |
| 1242 | } |
| 1243 | } |
| 1244 | |
| 1245 | enum { |
| 1246 | Tie0_1_1, |
| 1247 | }; |
| 1248 | |
| 1249 | static const uint8_t TiedAsmOperandTable[][3] = { |
| 1250 | /* Tie0_1_1 */ { 0, 1, 1 }, |
| 1251 | }; |
| 1252 | |
| 1253 | namespace { |
| 1254 | enum OperatorConversionKind { |
| 1255 | CVT_Done, |
| 1256 | CVT_Reg, |
| 1257 | CVT_Tied, |
| 1258 | CVT_95_addRegG8RCOperands, |
| 1259 | CVT_95_addTLSRegOperands, |
| 1260 | CVT_95_addRegGPRCOperands, |
| 1261 | CVT_95_addImmOperands, |
| 1262 | CVT_95_addRegGPRCNoR0Operands, |
| 1263 | CVT_95_addS16ImmOperands, |
| 1264 | CVT_95_addU16ImmOperands, |
| 1265 | CVT_95_addBranchTargetOperands, |
| 1266 | CVT_95_addRegCRBITRCOperands, |
| 1267 | CVT_imm_95_3, |
| 1268 | CVT_imm_95_2, |
| 1269 | CVT_imm_95_0, |
| 1270 | CVT_95_addRegVRRCOperands, |
| 1271 | CVT_imm_95_8, |
| 1272 | CVT_imm_95_10, |
| 1273 | CVT_imm_95_76, |
| 1274 | CVT_regCR0, |
| 1275 | CVT_95_addRegCRRCOperands, |
| 1276 | CVT_imm_95_79, |
| 1277 | CVT_imm_95_78, |
| 1278 | CVT_imm_95_4, |
| 1279 | CVT_imm_95_7, |
| 1280 | CVT_imm_95_6, |
| 1281 | CVT_imm_95_44, |
| 1282 | CVT_imm_95_47, |
| 1283 | CVT_imm_95_46, |
| 1284 | CVT_imm_95_36, |
| 1285 | CVT_imm_95_39, |
| 1286 | CVT_imm_95_38, |
| 1287 | CVT_imm_95_12, |
| 1288 | CVT_imm_95_15, |
| 1289 | CVT_imm_95_14, |
| 1290 | CVT_imm_95_68, |
| 1291 | CVT_imm_95_71, |
| 1292 | CVT_imm_95_70, |
| 1293 | CVT_imm_95_100, |
| 1294 | CVT_imm_95_103, |
| 1295 | CVT_imm_95_102, |
| 1296 | CVT_imm_95_108, |
| 1297 | CVT_imm_95_111, |
| 1298 | CVT_imm_95_110, |
| 1299 | CVT_imm_95_31, |
| 1300 | CVT_95_addRegF8RCOperands, |
| 1301 | CVT_95_addRegFpRCOperands, |
| 1302 | CVT_95_addRegGxRCNoR0Operands, |
| 1303 | CVT_95_addRegGxRCOperands, |
| 1304 | CVT_regR0, |
| 1305 | CVT_95_addRegDMRpRCOperands, |
| 1306 | CVT_95_addRegDMRRCOperands, |
| 1307 | CVT_imm_95_1, |
| 1308 | CVT_95_addRegVSRpRCOperands, |
| 1309 | CVT_95_addRegVSRCOperands, |
| 1310 | CVT_95_addRegDMRROWpRCOperands, |
| 1311 | CVT_95_addRegACCRCOperands, |
| 1312 | CVT_95_addRegSPERCOperands, |
| 1313 | CVT_95_addRegSPE4RCOperands, |
| 1314 | CVT_95_addRegF4RCOperands, |
| 1315 | CVT_95_addRegG8RCNoX0Operands, |
| 1316 | CVT_regCR0EQ, |
| 1317 | CVT_regCR0GT, |
| 1318 | CVT_regCR0LT, |
| 1319 | CVT_95_addRegG8pRCOperands, |
| 1320 | CVT_regZERO8, |
| 1321 | CVT_regZERO, |
| 1322 | CVT_95_addRegVFRCOperands, |
| 1323 | CVT_95_addRegVSFRCOperands, |
| 1324 | CVT_95_addRegVSSRCOperands, |
| 1325 | CVT_imm_95_29, |
| 1326 | CVT_imm_95_280, |
| 1327 | CVT_imm_95_128, |
| 1328 | CVT_imm_95_129, |
| 1329 | CVT_imm_95_130, |
| 1330 | CVT_imm_95_131, |
| 1331 | CVT_imm_95_132, |
| 1332 | CVT_imm_95_133, |
| 1333 | CVT_imm_95_134, |
| 1334 | CVT_imm_95_135, |
| 1335 | CVT_imm_95_28, |
| 1336 | CVT_imm_95_9, |
| 1337 | CVT_imm_95_19, |
| 1338 | CVT_imm_95_537, |
| 1339 | CVT_imm_95_539, |
| 1340 | CVT_imm_95_541, |
| 1341 | CVT_imm_95_543, |
| 1342 | CVT_imm_95_536, |
| 1343 | CVT_imm_95_538, |
| 1344 | CVT_imm_95_540, |
| 1345 | CVT_imm_95_542, |
| 1346 | CVT_imm_95_1018, |
| 1347 | CVT_imm_95_981, |
| 1348 | CVT_imm_95_22, |
| 1349 | CVT_imm_95_17, |
| 1350 | CVT_imm_95_18, |
| 1351 | CVT_imm_95_980, |
| 1352 | CVT_imm_95_529, |
| 1353 | CVT_imm_95_531, |
| 1354 | CVT_imm_95_533, |
| 1355 | CVT_imm_95_535, |
| 1356 | CVT_imm_95_528, |
| 1357 | CVT_imm_95_530, |
| 1358 | CVT_imm_95_532, |
| 1359 | CVT_imm_95_534, |
| 1360 | CVT_imm_95_1019, |
| 1361 | CVT_95_addCRBitMaskOperands, |
| 1362 | CVT_imm_95_48, |
| 1363 | CVT_imm_95_896, |
| 1364 | CVT_imm_95_287, |
| 1365 | CVT_imm_95_5, |
| 1366 | CVT_imm_95_25, |
| 1367 | CVT_imm_95_512, |
| 1368 | CVT_imm_95_272, |
| 1369 | CVT_imm_95_273, |
| 1370 | CVT_imm_95_274, |
| 1371 | CVT_imm_95_275, |
| 1372 | CVT_imm_95_260, |
| 1373 | CVT_imm_95_261, |
| 1374 | CVT_imm_95_262, |
| 1375 | CVT_imm_95_263, |
| 1376 | CVT_imm_95_26, |
| 1377 | CVT_imm_95_27, |
| 1378 | CVT_imm_95_990, |
| 1379 | CVT_imm_95_991, |
| 1380 | CVT_imm_95_268, |
| 1381 | CVT_imm_95_988, |
| 1382 | CVT_imm_95_989, |
| 1383 | CVT_imm_95_269, |
| 1384 | CVT_imm_95_986, |
| 1385 | CVT_imm_95_13, |
| 1386 | CVT_imm_95_255, |
| 1387 | CVT_imm_95_284, |
| 1388 | CVT_imm_95_285, |
| 1389 | CVT_regX0, |
| 1390 | CVT_95_addRegVSRpEvenRCOperands, |
| 1391 | CVT_imm_95_20, |
| 1392 | CVT_imm_95_16, |
| 1393 | CVT_imm_95_24, |
| 1394 | CVT_NUM_CONVERTERS |
| 1395 | }; |
| 1396 | |
| 1397 | enum InstructionConversionKind { |
| 1398 | Convert__RegG8RC1_0__RegG8RC1_1__TLSReg1_2, |
| 1399 | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, |
| 1400 | Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, |
| 1401 | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U2Imm1_3, |
| 1402 | Convert__RegGPRC1_0__RegGPRCNoR01_1__S16Imm1_2, |
| 1403 | Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, |
| 1404 | Convert__RegGPRC1_1__RegGPRC1_2__S16Imm1_3, |
| 1405 | Convert__RegGPRC1_0__RegGPRCNoR01_1__S17Imm1_2, |
| 1406 | Convert__RegGPRC1_0__RegGPRC1_1, |
| 1407 | Convert__RegGPRC1_1__RegGPRC1_2, |
| 1408 | Convert__RegG8RC1_0__Imm1_1, |
| 1409 | Convert__RegGPRC1_1__RegGPRC1_2__U16Imm1_3, |
| 1410 | Convert_NoOperands, |
| 1411 | Convert__DirectBr1_0, |
| 1412 | Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, |
| 1413 | Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, |
| 1414 | Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, |
| 1415 | Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, |
| 1416 | Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, |
| 1417 | Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, |
| 1418 | Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, |
| 1419 | Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, |
| 1420 | Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, |
| 1421 | Convert__RegVRRC1_1__RegVRRC1_2, |
| 1422 | Convert__CondBr1_0, |
| 1423 | Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, |
| 1424 | Convert__imm_95_0__RegCRBITRC1_0__imm_95_0, |
| 1425 | Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, |
| 1426 | Convert__imm_95_8__RegCRBITRC1_0__imm_95_0, |
| 1427 | Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, |
| 1428 | Convert__imm_95_2__RegCRBITRC1_0__imm_95_0, |
| 1429 | Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, |
| 1430 | Convert__imm_95_10__RegCRBITRC1_0__imm_95_0, |
| 1431 | Convert__imm_95_76__regCR0__CondBr1_0, |
| 1432 | Convert__imm_95_76__RegCRRC1_0__CondBr1_1, |
| 1433 | Convert__imm_95_79__regCR0__CondBr1_0, |
| 1434 | Convert__imm_95_79__RegCRRC1_0__CondBr1_1, |
| 1435 | Convert__imm_95_78__regCR0__CondBr1_0, |
| 1436 | Convert__imm_95_78__RegCRRC1_0__CondBr1_1, |
| 1437 | Convert__imm_95_76__regCR0, |
| 1438 | Convert__imm_95_76__RegCRRC1_0, |
| 1439 | Convert__imm_95_79__regCR0, |
| 1440 | Convert__imm_95_79__RegCRRC1_0, |
| 1441 | Convert__imm_95_78__regCR0, |
| 1442 | Convert__imm_95_78__RegCRRC1_0, |
| 1443 | Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, |
| 1444 | Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, |
| 1445 | Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, |
| 1446 | Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, |
| 1447 | Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, |
| 1448 | Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, |
| 1449 | Convert__imm_95_4__regCR0__CondBr1_0, |
| 1450 | Convert__imm_95_4__RegCRRC1_0__CondBr1_1, |
| 1451 | Convert__imm_95_7__regCR0__CondBr1_0, |
| 1452 | Convert__imm_95_7__RegCRRC1_0__CondBr1_1, |
| 1453 | Convert__imm_95_6__regCR0__CondBr1_0, |
| 1454 | Convert__imm_95_6__RegCRRC1_0__CondBr1_1, |
| 1455 | Convert__imm_95_4__regCR0, |
| 1456 | Convert__imm_95_4__RegCRRC1_0, |
| 1457 | Convert__imm_95_7__regCR0, |
| 1458 | Convert__imm_95_7__RegCRRC1_0, |
| 1459 | Convert__imm_95_6__regCR0, |
| 1460 | Convert__imm_95_6__RegCRRC1_0, |
| 1461 | Convert__imm_95_44__regCR0__CondBr1_0, |
| 1462 | Convert__imm_95_44__RegCRRC1_0__CondBr1_1, |
| 1463 | Convert__imm_95_47__regCR0__CondBr1_0, |
| 1464 | Convert__imm_95_47__RegCRRC1_0__CondBr1_1, |
| 1465 | Convert__imm_95_46__regCR0__CondBr1_0, |
| 1466 | Convert__imm_95_46__RegCRRC1_0__CondBr1_1, |
| 1467 | Convert__imm_95_44__regCR0, |
| 1468 | Convert__imm_95_44__RegCRRC1_0, |
| 1469 | Convert__imm_95_47__regCR0, |
| 1470 | Convert__imm_95_47__RegCRRC1_0, |
| 1471 | Convert__imm_95_46__regCR0, |
| 1472 | Convert__imm_95_46__RegCRRC1_0, |
| 1473 | Convert__DirectBr1_0__Imm1_1, |
| 1474 | Convert__imm_95_36__regCR0__CondBr1_0, |
| 1475 | Convert__imm_95_36__RegCRRC1_0__CondBr1_1, |
| 1476 | Convert__imm_95_39__regCR0__CondBr1_0, |
| 1477 | Convert__imm_95_39__RegCRRC1_0__CondBr1_1, |
| 1478 | Convert__imm_95_38__regCR0__CondBr1_0, |
| 1479 | Convert__imm_95_38__RegCRRC1_0__CondBr1_1, |
| 1480 | Convert__imm_95_36__regCR0, |
| 1481 | Convert__imm_95_36__RegCRRC1_0, |
| 1482 | Convert__imm_95_39__regCR0, |
| 1483 | Convert__imm_95_39__RegCRRC1_0, |
| 1484 | Convert__imm_95_38__regCR0, |
| 1485 | Convert__imm_95_38__RegCRRC1_0, |
| 1486 | Convert__imm_95_12__regCR0__CondBr1_0, |
| 1487 | Convert__imm_95_12__RegCRRC1_0__CondBr1_1, |
| 1488 | Convert__imm_95_15__regCR0__CondBr1_0, |
| 1489 | Convert__imm_95_15__RegCRRC1_0__CondBr1_1, |
| 1490 | Convert__imm_95_14__regCR0__CondBr1_0, |
| 1491 | Convert__imm_95_14__RegCRRC1_0__CondBr1_1, |
| 1492 | Convert__imm_95_12__regCR0, |
| 1493 | Convert__imm_95_12__RegCRRC1_0, |
| 1494 | Convert__imm_95_15__regCR0, |
| 1495 | Convert__imm_95_15__RegCRRC1_0, |
| 1496 | Convert__imm_95_14__regCR0, |
| 1497 | Convert__imm_95_14__RegCRRC1_0, |
| 1498 | Convert__imm_95_68__regCR0__CondBr1_0, |
| 1499 | Convert__imm_95_68__RegCRRC1_0__CondBr1_1, |
| 1500 | Convert__imm_95_71__regCR0__CondBr1_0, |
| 1501 | Convert__imm_95_71__RegCRRC1_0__CondBr1_1, |
| 1502 | Convert__imm_95_70__regCR0__CondBr1_0, |
| 1503 | Convert__imm_95_70__RegCRRC1_0__CondBr1_1, |
| 1504 | Convert__imm_95_68__regCR0, |
| 1505 | Convert__imm_95_68__RegCRRC1_0, |
| 1506 | Convert__imm_95_71__regCR0, |
| 1507 | Convert__imm_95_71__RegCRRC1_0, |
| 1508 | Convert__imm_95_70__regCR0, |
| 1509 | Convert__imm_95_70__RegCRRC1_0, |
| 1510 | Convert__imm_95_100__regCR0__CondBr1_0, |
| 1511 | Convert__imm_95_100__RegCRRC1_0__CondBr1_1, |
| 1512 | Convert__imm_95_103__regCR0__CondBr1_0, |
| 1513 | Convert__imm_95_103__RegCRRC1_0__CondBr1_1, |
| 1514 | Convert__imm_95_102__regCR0__CondBr1_0, |
| 1515 | Convert__imm_95_102__RegCRRC1_0__CondBr1_1, |
| 1516 | Convert__imm_95_100__regCR0, |
| 1517 | Convert__imm_95_100__RegCRRC1_0, |
| 1518 | Convert__imm_95_103__regCR0, |
| 1519 | Convert__imm_95_103__RegCRRC1_0, |
| 1520 | Convert__imm_95_102__regCR0, |
| 1521 | Convert__imm_95_102__RegCRRC1_0, |
| 1522 | Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, |
| 1523 | Convert__RegG8RC1_0__RegG8RC1_1, |
| 1524 | Convert__imm_95_108__regCR0__CondBr1_0, |
| 1525 | Convert__imm_95_108__RegCRRC1_0__CondBr1_1, |
| 1526 | Convert__imm_95_111__regCR0__CondBr1_0, |
| 1527 | Convert__imm_95_111__RegCRRC1_0__CondBr1_1, |
| 1528 | Convert__imm_95_110__regCR0__CondBr1_0, |
| 1529 | Convert__imm_95_110__RegCRRC1_0__CondBr1_1, |
| 1530 | Convert__imm_95_108__regCR0, |
| 1531 | Convert__imm_95_108__RegCRRC1_0, |
| 1532 | Convert__imm_95_111__regCR0, |
| 1533 | Convert__imm_95_111__RegCRRC1_0, |
| 1534 | Convert__imm_95_110__regCR0, |
| 1535 | Convert__imm_95_110__RegCRRC1_0, |
| 1536 | Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, |
| 1537 | Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, |
| 1538 | Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, |
| 1539 | Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, |
| 1540 | Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, |
| 1541 | Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, |
| 1542 | Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U6Imm1_2, |
| 1543 | Convert__RegG8RC1_0__RegGPRC1_1__imm_95_0__U6Imm1_2, |
| 1544 | Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U6Imm1_3, |
| 1545 | Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, |
| 1546 | Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, |
| 1547 | Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, |
| 1548 | Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, |
| 1549 | Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U5Imm1_2__imm_95_31, |
| 1550 | Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0__U5Imm1_2__imm_95_31, |
| 1551 | Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U5Imm1_3__imm_95_31, |
| 1552 | Convert__RegGPRC1_1__RegGPRC1_2__imm_95_0__U5Imm1_3__imm_95_31, |
| 1553 | Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, |
| 1554 | Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, |
| 1555 | Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, |
| 1556 | Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, |
| 1557 | Convert__RegCRRC1_0__RegGPRC1_2__RegGPRC1_3, |
| 1558 | Convert__RegCRRC1_0__RegG8RC1_2__RegG8RC1_3, |
| 1559 | Convert__regCR0__RegG8RC1_0__RegG8RC1_1, |
| 1560 | Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2, |
| 1561 | Convert__regCR0__RegG8RC1_0__S16Imm1_1, |
| 1562 | Convert__RegCRRC1_0__RegG8RC1_1__S16Imm1_2, |
| 1563 | Convert__RegCRRC1_0__RegGPRC1_2__S16Imm1_3, |
| 1564 | Convert__RegCRRC1_0__RegG8RC1_2__S16Imm1_3, |
| 1565 | Convert__regCR0__RegG8RC1_0__U16Imm1_1, |
| 1566 | Convert__RegCRRC1_0__RegG8RC1_1__U16Imm1_2, |
| 1567 | Convert__RegCRRC1_0__RegGPRC1_2__U16Imm1_3, |
| 1568 | Convert__RegCRRC1_0__RegG8RC1_2__U16Imm1_3, |
| 1569 | Convert__regCR0__RegGPRC1_0__RegGPRC1_1, |
| 1570 | Convert__RegCRRC1_0__RegGPRC1_1__RegGPRC1_2, |
| 1571 | Convert__regCR0__RegGPRC1_0__U16Imm1_1, |
| 1572 | Convert__RegCRRC1_0__RegGPRC1_1__U16Imm1_2, |
| 1573 | Convert__RegCRRC1_0__U1Imm1_1__RegGPRC1_2__RegGPRC1_3, |
| 1574 | Convert__regCR0__RegGPRC1_0__S16Imm1_1, |
| 1575 | Convert__RegCRRC1_0__RegGPRC1_1__S16Imm1_2, |
| 1576 | Convert__RegG8RC1_1__RegG8RC1_2, |
| 1577 | Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, |
| 1578 | Convert__RegCRBITRC1_0__RegCRBITRC1_0__RegCRBITRC1_0, |
| 1579 | Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_1, |
| 1580 | Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, |
| 1581 | Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, |
| 1582 | Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, |
| 1583 | Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, |
| 1584 | Convert__RegG8RC1_0__U2Imm1_1, |
| 1585 | Convert__RegGxRCNoR01_0__RegGxRC1_1, |
| 1586 | Convert__U3Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, |
| 1587 | Convert__U5Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, |
| 1588 | Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, |
| 1589 | Convert__RegGxRCNoR01_1__RegGxRC1_2__U5Imm1_0, |
| 1590 | Convert__regR0__regR0, |
| 1591 | Convert__RegF8RC1_0__RegF8RC1_1, |
| 1592 | Convert__RegF8RC1_1__RegF8RC1_2, |
| 1593 | Convert__RegFpRC1_0__RegF8RC1_1, |
| 1594 | Convert__RegFpRC1_1__RegF8RC1_2, |
| 1595 | Convert__RegFpRC1_0__RegVRRC1_1, |
| 1596 | Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, |
| 1597 | Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2, |
| 1598 | Convert__RegF8RC1_0__RegFpRC1_1, |
| 1599 | Convert__RegF8RC1_1__RegFpRC1_2, |
| 1600 | Convert__RegVRRC1_0__RegFpRC1_1, |
| 1601 | Convert__RegF8RC1_1__U2Imm1_0__RegF8RC1_2, |
| 1602 | Convert__RegF8RC1_2__U2Imm1_1__RegF8RC1_3, |
| 1603 | Convert__RegFpRC1_1__U2Imm1_0__RegFpRC1_2, |
| 1604 | Convert__RegFpRC1_2__U2Imm1_1__RegFpRC1_3, |
| 1605 | Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2, |
| 1606 | Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3, |
| 1607 | Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2, |
| 1608 | Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3, |
| 1609 | Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2, |
| 1610 | Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3, |
| 1611 | Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, |
| 1612 | Convert__RegDMRpRC1_0__Tie0_1_1__imm_95_12, |
| 1613 | Convert__RegDMRRC1_0__RegDMRRC1_1, |
| 1614 | Convert__RegDMRRC1_0, |
| 1615 | Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1__imm_95_0, |
| 1616 | Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1__U1Imm1_2, |
| 1617 | Convert__RegDMRpRC1_0__Tie0_1_1__imm_95_0, |
| 1618 | Convert__RegDMRpRC1_0__Tie0_1_1__U5Imm1_1, |
| 1619 | Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1__imm_95_1, |
| 1620 | Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1, |
| 1621 | Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2, |
| 1622 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, |
| 1623 | Convert__RegVSRpRC1_0__RegDMRROWpRC1_1__U2Imm1_2, |
| 1624 | Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegACCRC1_2, |
| 1625 | Convert__RegDMRROWpRC1_0__RegVSRpRC1_1__U2Imm1_2, |
| 1626 | Convert__RegACCRC1_0__RegVSRpRC1_1__RegVSRpRC1_2, |
| 1627 | Convert__RegACCRC1_0__Tie0_1_1, |
| 1628 | Convert__RegACCRC1_0, |
| 1629 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_3__imm_95_0__imm_95_0, |
| 1630 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_3, |
| 1631 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_2, |
| 1632 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_1, |
| 1633 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_0, |
| 1634 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_2__imm_95_0__imm_95_0, |
| 1635 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_1__U1Imm1_2__imm_95_1, |
| 1636 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_1__U1Imm1_2__imm_95_0, |
| 1637 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__U2Imm1_2__U1Imm1_3__U2Imm1_4, |
| 1638 | Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__U2Imm1_3, |
| 1639 | Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__U2Imm1_4, |
| 1640 | Convert__RegF8RC1_1__S5Imm1_0__RegF8RC1_2__U2Imm1_3, |
| 1641 | Convert__RegF8RC1_2__S5Imm1_1__RegF8RC1_3__U2Imm1_4, |
| 1642 | Convert__RegFpRC1_1__S5Imm1_0__RegFpRC1_2__U2Imm1_3, |
| 1643 | Convert__RegFpRC1_2__S5Imm1_1__RegFpRC1_3__U2Imm1_4, |
| 1644 | Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2__U2Imm1_3, |
| 1645 | Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3__U2Imm1_4, |
| 1646 | Convert__RegFpRC1_0__RegFpRC1_1, |
| 1647 | Convert__RegFpRC1_1__RegFpRC1_2, |
| 1648 | Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2__U2Imm1_3, |
| 1649 | Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3__U2Imm1_4, |
| 1650 | Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2__U2Imm1_3, |
| 1651 | Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3__U2Imm1_4, |
| 1652 | Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2__U2Imm1_3, |
| 1653 | Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3__U2Imm1_4, |
| 1654 | Convert__RegF8RC1_0__RegF8RC1_1__U6Imm1_2, |
| 1655 | Convert__RegF8RC1_1__RegF8RC1_2__U6Imm1_3, |
| 1656 | Convert__RegFpRC1_0__RegFpRC1_1__U6Imm1_2, |
| 1657 | Convert__RegFpRC1_1__RegFpRC1_2__U6Imm1_3, |
| 1658 | Convert__U5Imm1_0, |
| 1659 | Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, |
| 1660 | Convert__RegCRRC1_0__RegF8RC1_1__U6Imm1_2, |
| 1661 | Convert__RegCRRC1_0__RegFpRC1_1__U6Imm1_2, |
| 1662 | Convert__RegCRRC1_0__U6Imm1_1__RegF8RC1_2, |
| 1663 | Convert__RegCRRC1_0__U6Imm1_1__RegFpRC1_2, |
| 1664 | Convert__RegCRRC1_0__RegF8RC1_1__RegFpRC1_2, |
| 1665 | Convert__RegSPERC1_0__RegSPERC1_1, |
| 1666 | Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, |
| 1667 | Convert__RegSPERC1_0__RegSPE4RC1_1, |
| 1668 | Convert__RegSPERC1_0__RegGPRC1_1, |
| 1669 | Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, |
| 1670 | Convert__RegGPRC1_0__RegSPERC1_1, |
| 1671 | Convert__RegSPE4RC1_0__RegSPE4RC1_1, |
| 1672 | Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, |
| 1673 | Convert__RegSPE4RC1_0__RegSPERC1_1, |
| 1674 | Convert__RegSPE4RC1_0__RegGPRC1_1, |
| 1675 | Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2, |
| 1676 | Convert__RegGPRC1_0__RegSPE4RC1_1, |
| 1677 | Convert__RegSPERC1_0__RegSPERC1_2__U5Imm1_1, |
| 1678 | Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, |
| 1679 | Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1680 | Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2, |
| 1681 | Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, |
| 1682 | Convert__RegSPERC1_0__RegGPRC1_1__RegGPRC1_2, |
| 1683 | Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, |
| 1684 | Convert__RegSPERC1_1__RegSPERC1_2__RegSPERC1_3__imm_95_0, |
| 1685 | Convert__RegSPERC1_0__S5Imm1_1, |
| 1686 | Convert__RegSPERC1_0__U5Imm1_1__RegSPERC1_2, |
| 1687 | Convert__RegF4RC1_0__RegF4RC1_1, |
| 1688 | Convert__RegF4RC1_1__RegF4RC1_2, |
| 1689 | Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, |
| 1690 | Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, |
| 1691 | Convert__RegF4RC1_0__RegF8RC1_1, |
| 1692 | Convert__RegF4RC1_1__RegF8RC1_2, |
| 1693 | Convert__RegCRRC1_0__RegF4RC1_1__RegF4RC1_2, |
| 1694 | Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, |
| 1695 | Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, |
| 1696 | Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, |
| 1697 | Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, |
| 1698 | Convert__RegF4RC1_0__RegF8RC1_1__RegF4RC1_2__RegF4RC1_3, |
| 1699 | Convert__RegF4RC1_1__RegF8RC1_2__RegF4RC1_3__RegF4RC1_4, |
| 1700 | Convert__RegCRRC1_0__RegF8RC1_1, |
| 1701 | Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, |
| 1702 | Convert__imm_95_0__imm_95_0, |
| 1703 | Convert__imm_95_0, |
| 1704 | Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1705 | Convert__U4Imm1_1__RegGxRCNoR01_2__RegGxRC1_3, |
| 1706 | Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__RegCRBITRC1_3, |
| 1707 | Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0EQ, |
| 1708 | Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0EQ, |
| 1709 | Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0GT, |
| 1710 | Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0GT, |
| 1711 | Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0LT, |
| 1712 | Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0LT, |
| 1713 | Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, |
| 1714 | Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1715 | Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, |
| 1716 | Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1717 | Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, |
| 1718 | Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, |
| 1719 | Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1720 | Convert__RegG8pRC1_0__Tie0_1_1__RegGxRCNoR01_1__U5Imm1_2, |
| 1721 | Convert__RegG8RC1_0__imm_95_0__DispRIX1_1__RegGxRCNoR01_2, |
| 1722 | Convert__RegG8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1723 | Convert__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, |
| 1724 | Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1725 | Convert__RegF8RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, |
| 1726 | Convert__RegF8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1727 | Convert__RegF8RC1_0__RegGxRCNoR01_1__TLSReg1_2, |
| 1728 | Convert__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, |
| 1729 | Convert__RegF4RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, |
| 1730 | Convert__RegF4RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1731 | Convert__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1732 | Convert__RegF4RC1_0__RegGxRCNoR01_1__TLSReg1_2, |
| 1733 | Convert__RegG8RC1_0__regZERO8__S16Imm1_1, |
| 1734 | Convert__RegGPRC1_0__S16Imm1_1, |
| 1735 | Convert__RegGPRC1_0__regZERO__S16Imm1_1, |
| 1736 | Convert__RegG8RC1_0__regZERO8__S17Imm1_1, |
| 1737 | Convert__RegGPRC1_0__S17Imm1_1, |
| 1738 | Convert__RegGPRC1_0__regZERO__S17Imm1_1, |
| 1739 | Convert__RegG8RC1_0__imm_95_0, |
| 1740 | Convert__RegG8pRC1_0__DispRIX161_1__RegGxRCNoR01_2, |
| 1741 | Convert__RegG8pRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1742 | Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1743 | Convert__imm_95_1, |
| 1744 | Convert__RegSPE4RC1_0__DispRI1_1__RegGxRCNoR01_2, |
| 1745 | Convert__RegSPE4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1746 | Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, |
| 1747 | Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1748 | Convert__RegVSSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1749 | Convert__RegVSRC1_0__DispRIX161_1__RegGxRCNoR01_2, |
| 1750 | Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1751 | Convert__RegVSRC1_0__U5Imm1_1, |
| 1752 | Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, |
| 1753 | Convert__RegVSRpRC1_0__DispRIX161_1__RegGxRCNoR01_2, |
| 1754 | Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, |
| 1755 | Convert__RegVSRpRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 1756 | Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, |
| 1757 | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, |
| 1758 | Convert__RegCRRC1_0__RegCRRC1_1, |
| 1759 | Convert__RegCRRC1_0, |
| 1760 | Convert__RegG8RC1_0__imm_95_29, |
| 1761 | Convert__RegGPRC1_0__imm_95_29, |
| 1762 | Convert__RegG8RC1_0__imm_95_280, |
| 1763 | Convert__RegGPRC1_0__imm_95_280, |
| 1764 | Convert__RegGPRC1_0__U10Imm1_1, |
| 1765 | Convert__RegGPRC1_0__imm_95_128, |
| 1766 | Convert__RegGPRC1_0__imm_95_129, |
| 1767 | Convert__RegGPRC1_0__imm_95_130, |
| 1768 | Convert__RegGPRC1_0__imm_95_131, |
| 1769 | Convert__RegGPRC1_0__imm_95_132, |
| 1770 | Convert__RegGPRC1_0__imm_95_133, |
| 1771 | Convert__RegGPRC1_0__imm_95_134, |
| 1772 | Convert__RegGPRC1_0__imm_95_135, |
| 1773 | Convert__RegG8RC1_0__imm_95_28, |
| 1774 | Convert__RegGPRC1_0__imm_95_28, |
| 1775 | Convert__RegGPRC1_0, |
| 1776 | Convert__RegG8RC1_0__imm_95_9, |
| 1777 | Convert__RegGPRC1_0__imm_95_9, |
| 1778 | Convert__RegG8RC1_0__imm_95_19, |
| 1779 | Convert__RegGPRC1_0__imm_95_19, |
| 1780 | Convert__RegGPRC1_0__imm_95_537, |
| 1781 | Convert__RegGPRC1_0__imm_95_539, |
| 1782 | Convert__RegGPRC1_0__imm_95_541, |
| 1783 | Convert__RegGPRC1_0__imm_95_543, |
| 1784 | Convert__RegGPRC1_0__imm_95_536, |
| 1785 | Convert__RegGPRC1_0__imm_95_538, |
| 1786 | Convert__RegGPRC1_0__imm_95_540, |
| 1787 | Convert__RegGPRC1_0__imm_95_542, |
| 1788 | Convert__RegGPRC1_0__imm_95_1018, |
| 1789 | Convert__RegGPRC1_0__Imm1_1, |
| 1790 | Convert__RegGPRC1_0__imm_95_981, |
| 1791 | Convert__RegG8RC1_0__imm_95_22, |
| 1792 | Convert__RegGPRC1_0__imm_95_22, |
| 1793 | Convert__RegG8RC1_0__imm_95_17, |
| 1794 | Convert__RegGPRC1_0__imm_95_17, |
| 1795 | Convert__RegG8RC1_0__imm_95_18, |
| 1796 | Convert__RegGPRC1_0__imm_95_18, |
| 1797 | Convert__RegGPRC1_0__imm_95_980, |
| 1798 | Convert__RegG8RC1_0__RegF8RC1_1, |
| 1799 | Convert__RegGPRC1_0__RegF8RC1_1, |
| 1800 | Convert__RegF8RC1_0, |
| 1801 | Convert__RegF8RC1_1, |
| 1802 | Convert__RegF8RC1_0__U3Imm1_1, |
| 1803 | Convert__RegF8RC1_0__U2Imm1_1, |
| 1804 | Convert__RegGPRC1_0__imm_95_529, |
| 1805 | Convert__RegGPRC1_0__imm_95_531, |
| 1806 | Convert__RegGPRC1_0__imm_95_533, |
| 1807 | Convert__RegGPRC1_0__imm_95_535, |
| 1808 | Convert__RegGPRC1_0__imm_95_528, |
| 1809 | Convert__RegGPRC1_0__imm_95_530, |
| 1810 | Convert__RegGPRC1_0__imm_95_532, |
| 1811 | Convert__RegGPRC1_0__imm_95_534, |
| 1812 | Convert__RegGPRC1_0__imm_95_1019, |
| 1813 | Convert__RegG8RC1_0__imm_95_8, |
| 1814 | Convert__RegGPRC1_0__imm_95_8, |
| 1815 | Convert__RegGPRC1_0__CRBitMask1_1, |
| 1816 | Convert__RegGPRC1_0__imm_95_48, |
| 1817 | Convert__RegGPRC1_0__imm_95_896, |
| 1818 | Convert__RegG8RC1_0__imm_95_287, |
| 1819 | Convert__RegGPRC1_0__imm_95_287, |
| 1820 | Convert__RegG8RC1_0__imm_95_5, |
| 1821 | Convert__RegGPRC1_0__imm_95_5, |
| 1822 | Convert__RegG8RC1_0__imm_95_4, |
| 1823 | Convert__RegGPRC1_0__imm_95_4, |
| 1824 | Convert__RegG8RC1_0__imm_95_25, |
| 1825 | Convert__RegGPRC1_0__imm_95_25, |
| 1826 | Convert__RegG8RC1_0__imm_95_512, |
| 1827 | Convert__RegGPRC1_0__imm_95_512, |
| 1828 | Convert__RegG8RC1_0__imm_95_272, |
| 1829 | Convert__RegG8RC1_0__imm_95_273, |
| 1830 | Convert__RegG8RC1_0__imm_95_274, |
| 1831 | Convert__RegG8RC1_0__imm_95_275, |
| 1832 | Convert__RegGPRC1_0__imm_95_272, |
| 1833 | Convert__RegGPRC1_0__imm_95_273, |
| 1834 | Convert__RegGPRC1_0__imm_95_274, |
| 1835 | Convert__RegGPRC1_0__imm_95_275, |
| 1836 | Convert__RegGPRC1_0__imm_95_260, |
| 1837 | Convert__RegGPRC1_0__imm_95_261, |
| 1838 | Convert__RegGPRC1_0__imm_95_262, |
| 1839 | Convert__RegGPRC1_0__imm_95_263, |
| 1840 | Convert__RegGPRC1_0__U4Imm1_1, |
| 1841 | Convert__RegG8RC1_0__imm_95_26, |
| 1842 | Convert__RegGPRC1_0__imm_95_26, |
| 1843 | Convert__RegG8RC1_0__imm_95_27, |
| 1844 | Convert__RegGPRC1_0__imm_95_27, |
| 1845 | Convert__RegGPRC1_0__imm_95_990, |
| 1846 | Convert__RegGPRC1_0__imm_95_991, |
| 1847 | Convert__RegGPRC1_0__imm_95_268, |
| 1848 | Convert__RegGPRC1_0__imm_95_988, |
| 1849 | Convert__RegGPRC1_0__imm_95_989, |
| 1850 | Convert__RegGPRC1_0__imm_95_269, |
| 1851 | Convert__RegGPRC1_0__imm_95_986, |
| 1852 | Convert__RegG8RC1_0__imm_95_13, |
| 1853 | Convert__RegGPRC1_0__imm_95_13, |
| 1854 | Convert__RegG8RC1_0__imm_95_3, |
| 1855 | Convert__RegGPRC1_0__imm_95_3, |
| 1856 | Convert__RegG8RC1_0__RegVRRC1_1, |
| 1857 | Convert__RegGPRC1_0__RegVRRC1_1, |
| 1858 | Convert__RegVRRC1_0, |
| 1859 | Convert__RegG8RC1_0__RegVSFRC1_1, |
| 1860 | Convert__RegG8RC1_0__RegVSRC1_1, |
| 1861 | Convert__RegGPRC1_0__RegVSFRC1_1, |
| 1862 | Convert__RegG8RC1_0__imm_95_1, |
| 1863 | Convert__RegGPRC1_0__imm_95_1, |
| 1864 | Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_1, |
| 1865 | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_1, |
| 1866 | Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_2, |
| 1867 | Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_2, |
| 1868 | Convert__imm_95_29__RegG8RC1_0, |
| 1869 | Convert__imm_95_29__RegGPRC1_0, |
| 1870 | Convert__imm_95_280__RegG8RC1_0, |
| 1871 | Convert__imm_95_280__RegGPRC1_0, |
| 1872 | Convert__imm_95_28__RegG8RC1_0, |
| 1873 | Convert__imm_95_28__RegGPRC1_0, |
| 1874 | Convert__imm_95_255__RegG8RC1_0, |
| 1875 | Convert__imm_95_255__RegGPRC1_0, |
| 1876 | Convert__Imm1_0__RegGPRC1_1, |
| 1877 | Convert__imm_95_9__RegG8RC1_0, |
| 1878 | Convert__imm_95_9__RegGPRC1_0, |
| 1879 | Convert__imm_95_19__RegG8RC1_0, |
| 1880 | Convert__imm_95_19__RegGPRC1_0, |
| 1881 | Convert__imm_95_537__RegGPRC1_1, |
| 1882 | Convert__imm_95_539__RegGPRC1_1, |
| 1883 | Convert__imm_95_541__RegGPRC1_1, |
| 1884 | Convert__imm_95_543__RegGPRC1_1, |
| 1885 | Convert__imm_95_536__RegGPRC1_1, |
| 1886 | Convert__imm_95_538__RegGPRC1_1, |
| 1887 | Convert__imm_95_540__RegGPRC1_1, |
| 1888 | Convert__imm_95_542__RegGPRC1_1, |
| 1889 | Convert__imm_95_1018__RegGPRC1_0, |
| 1890 | Convert__RegGPRC1_1__Imm1_0, |
| 1891 | Convert__imm_95_981__RegGPRC1_0, |
| 1892 | Convert__imm_95_22__RegG8RC1_0, |
| 1893 | Convert__imm_95_22__RegGPRC1_0, |
| 1894 | Convert__imm_95_17__RegG8RC1_0, |
| 1895 | Convert__imm_95_17__RegGPRC1_0, |
| 1896 | Convert__imm_95_18__RegG8RC1_0, |
| 1897 | Convert__imm_95_18__RegGPRC1_0, |
| 1898 | Convert__imm_95_980__RegGPRC1_0, |
| 1899 | Convert__RegF8RC1_0__RegG8RC1_1, |
| 1900 | Convert__RegF8RC1_0__RegGPRC1_1, |
| 1901 | Convert__Imm1_0__RegF8RC1_1__imm_95_0__imm_95_0, |
| 1902 | Convert__Imm1_1__RegF8RC1_2__imm_95_0__imm_95_0, |
| 1903 | Convert__Imm1_0__RegF8RC1_1__U1Imm1_2__Imm1_3, |
| 1904 | Convert__Imm1_1__RegF8RC1_2__U1Imm1_3__Imm1_4, |
| 1905 | Convert__U3Imm1_0__U4Imm1_1__imm_95_0, |
| 1906 | Convert__U3Imm1_1__U4Imm1_2__imm_95_0, |
| 1907 | Convert__U3Imm1_0__U4Imm1_1__Imm1_2, |
| 1908 | Convert__U3Imm1_1__U4Imm1_2__U1Imm1_3, |
| 1909 | Convert__imm_95_529__RegGPRC1_1, |
| 1910 | Convert__imm_95_531__RegGPRC1_1, |
| 1911 | Convert__imm_95_533__RegGPRC1_1, |
| 1912 | Convert__imm_95_535__RegGPRC1_1, |
| 1913 | Convert__imm_95_528__RegGPRC1_1, |
| 1914 | Convert__imm_95_530__RegGPRC1_1, |
| 1915 | Convert__imm_95_532__RegGPRC1_1, |
| 1916 | Convert__imm_95_534__RegGPRC1_1, |
| 1917 | Convert__imm_95_1019__RegGPRC1_0, |
| 1918 | Convert__imm_95_8__RegG8RC1_0, |
| 1919 | Convert__imm_95_8__RegGPRC1_0, |
| 1920 | Convert__RegGPRC1_0__imm_95_0, |
| 1921 | Convert__RegGPRC1_0__U1Imm1_1, |
| 1922 | Convert__CRBitMask1_0__RegGPRC1_1, |
| 1923 | Convert__imm_95_48__RegGPRC1_0, |
| 1924 | Convert__imm_95_896__RegGPRC1_0, |
| 1925 | Convert__imm_95_25__RegG8RC1_0, |
| 1926 | Convert__imm_95_25__RegGPRC1_0, |
| 1927 | Convert__imm_95_512__RegG8RC1_0, |
| 1928 | Convert__imm_95_512__RegGPRC1_0, |
| 1929 | Convert__RegGPRC1_1, |
| 1930 | Convert__imm_95_272__RegG8RC1_1, |
| 1931 | Convert__imm_95_272__RegGPRC1_1, |
| 1932 | Convert__imm_95_273__RegG8RC1_1, |
| 1933 | Convert__imm_95_273__RegGPRC1_1, |
| 1934 | Convert__imm_95_274__RegG8RC1_1, |
| 1935 | Convert__imm_95_274__RegGPRC1_1, |
| 1936 | Convert__imm_95_275__RegG8RC1_1, |
| 1937 | Convert__imm_95_275__RegGPRC1_1, |
| 1938 | Convert__imm_95_260__RegGPRC1_1, |
| 1939 | Convert__imm_95_261__RegGPRC1_1, |
| 1940 | Convert__imm_95_262__RegGPRC1_1, |
| 1941 | Convert__imm_95_263__RegGPRC1_1, |
| 1942 | Convert__imm_95_272__RegG8RC1_0, |
| 1943 | Convert__imm_95_272__RegGPRC1_0, |
| 1944 | Convert__imm_95_273__RegG8RC1_0, |
| 1945 | Convert__imm_95_273__RegGPRC1_0, |
| 1946 | Convert__imm_95_274__RegG8RC1_0, |
| 1947 | Convert__imm_95_274__RegGPRC1_0, |
| 1948 | Convert__imm_95_275__RegG8RC1_0, |
| 1949 | Convert__imm_95_275__RegGPRC1_0, |
| 1950 | Convert__imm_95_260__RegGPRC1_0, |
| 1951 | Convert__imm_95_261__RegGPRC1_0, |
| 1952 | Convert__imm_95_262__RegGPRC1_0, |
| 1953 | Convert__imm_95_263__RegGPRC1_0, |
| 1954 | Convert__RegGPRC1_1__U4Imm1_0, |
| 1955 | Convert__imm_95_26__RegG8RC1_0, |
| 1956 | Convert__imm_95_26__RegGPRC1_0, |
| 1957 | Convert__imm_95_27__RegG8RC1_0, |
| 1958 | Convert__imm_95_27__RegGPRC1_0, |
| 1959 | Convert__imm_95_990__RegGPRC1_0, |
| 1960 | Convert__imm_95_991__RegGPRC1_0, |
| 1961 | Convert__imm_95_988__RegGPRC1_0, |
| 1962 | Convert__imm_95_284__RegG8RC1_0, |
| 1963 | Convert__imm_95_284__RegGPRC1_0, |
| 1964 | Convert__imm_95_989__RegGPRC1_0, |
| 1965 | Convert__imm_95_285__RegG8RC1_0, |
| 1966 | Convert__imm_95_285__RegGPRC1_0, |
| 1967 | Convert__imm_95_986__RegGPRC1_0, |
| 1968 | Convert__imm_95_13__RegG8RC1_0, |
| 1969 | Convert__imm_95_13__RegGPRC1_0, |
| 1970 | Convert__imm_95_3__RegG8RC1_0, |
| 1971 | Convert__imm_95_3__RegGPRC1_0, |
| 1972 | Convert__RegVRRC1_0__RegG8RC1_1, |
| 1973 | Convert__RegVRRC1_0__RegGPRC1_1, |
| 1974 | Convert__RegVRRC1_0__U16Imm1_1, |
| 1975 | Convert__RegVSFRC1_0__RegG8RC1_1, |
| 1976 | Convert__RegVSRC1_0__RegG8RCNoX01_1__RegG8RC1_2, |
| 1977 | Convert__RegVSFRC1_0__RegGPRC1_1, |
| 1978 | Convert__RegVSRC1_0__RegGPRC1_1, |
| 1979 | Convert__imm_95_1__RegG8RC1_0, |
| 1980 | Convert__imm_95_1__RegGPRC1_0, |
| 1981 | Convert__regR0__regR0__imm_95_0, |
| 1982 | Convert__regX0__regX0__imm_95_0, |
| 1983 | Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, |
| 1984 | Convert__RegG8RC1_0__RegG8RCNoX01_1__S34Imm1_2, |
| 1985 | Convert__RegGPRC1_0__ImmZero1_1__S34Imm1_2, |
| 1986 | Convert__RegGPRC1_0__RegGPRCNoR01_1__S34Imm1_2, |
| 1987 | Convert__RegGPRC1_0__ImmZero1_1__S32Imm1_2, |
| 1988 | Convert__RegGPRC1_0__RegGPRCNoR01_1__S32Imm1_2, |
| 1989 | Convert__RegGPRC1_1__RegGPRC1_2__imm_95_1, |
| 1990 | Convert__RegGPRC1_1__RegGPRC1_2__U1Imm1_3, |
| 1991 | Convert__imm_95_2__imm_95_0, |
| 1992 | Convert__imm_95_4__imm_95_0, |
| 1993 | Convert__RegG8RC1_0__S34Imm1_1, |
| 1994 | Convert__RegGPRC1_0__S34Imm1_1, |
| 1995 | Convert__RegG8RC1_0__RegG8RCNoX01_2__S34Imm1_1, |
| 1996 | Convert__RegGPRC1_0__RegGPRCNoR01_2__S34Imm1_1, |
| 1997 | Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, |
| 1998 | Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, |
| 1999 | Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, |
| 2000 | Convert__RegG8RC1_0__DispRI341_1__ImmZero1_2, |
| 2001 | Convert__RegF8RC1_0__S34Imm1_1, |
| 2002 | Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, |
| 2003 | Convert__RegF8RC1_0__DispRI341_1__ImmZero1_2, |
| 2004 | Convert__RegF4RC1_0__S34Imm1_1, |
| 2005 | Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, |
| 2006 | Convert__RegF4RC1_0__DispRI341_1__ImmZero1_2, |
| 2007 | Convert__imm_95_5__imm_95_0, |
| 2008 | Convert__RegVFRC1_0__S34Imm1_1, |
| 2009 | Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, |
| 2010 | Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, |
| 2011 | Convert__RegVSRC1_0__S34Imm1_1, |
| 2012 | Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, |
| 2013 | Convert__RegVSRC1_0__DispRI341_1__ImmZero1_2, |
| 2014 | Convert__RegVSRpRC1_0__S34Imm1_1, |
| 2015 | Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, |
| 2016 | Convert__RegVSRpRC1_0__DispRI341_1__ImmZero1_2, |
| 2017 | Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, |
| 2018 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, |
| 2019 | Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U4Imm1_5, |
| 2020 | Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U4Imm1_5, |
| 2021 | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, |
| 2022 | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, |
| 2023 | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, |
| 2024 | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, |
| 2025 | Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, |
| 2026 | Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, |
| 2027 | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5, |
| 2028 | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5, |
| 2029 | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, |
| 2030 | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, |
| 2031 | Convert__imm_95_2, |
| 2032 | Convert__RegG8RC1_0, |
| 2033 | Convert__U1Imm1_0, |
| 2034 | Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__U6Imm1_3, |
| 2035 | Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__U6Imm1_4, |
| 2036 | Convert__RegG8RC1_0__Tie0_1_1__RegG8RC1_1__U6Imm1_2__U6Imm1_3, |
| 2037 | Convert__RegG8RC1_1__Tie0_1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, |
| 2038 | Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3, |
| 2039 | Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4, |
| 2040 | Convert__RegGPRC1_0__Tie0_1_1__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4, |
| 2041 | Convert__RegGPRC1_1__Tie0_1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5, |
| 2042 | Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4, |
| 2043 | Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5, |
| 2044 | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, |
| 2045 | Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__U5Imm1_4__U5Imm1_5, |
| 2046 | Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__imm_95_0, |
| 2047 | Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__imm_95_0, |
| 2048 | Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__imm_95_0, |
| 2049 | Convert__RegG8RC1_0__RegGPRC1_1__U6Imm1_2__imm_95_0, |
| 2050 | Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__imm_95_0, |
| 2051 | Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__imm_95_0__imm_95_31, |
| 2052 | Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__imm_95_0__imm_95_31, |
| 2053 | Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3__imm_95_0__imm_95_31, |
| 2054 | Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__imm_95_0__imm_95_31, |
| 2055 | Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__imm_95_0__imm_95_31, |
| 2056 | Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__imm_95_0__imm_95_31, |
| 2057 | Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__imm_95_0__imm_95_31, |
| 2058 | Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__imm_95_0__imm_95_31, |
| 2059 | Convert__Imm1_0, |
| 2060 | Convert__RegGPRC1_0__RegCRRC1_1, |
| 2061 | Convert__RegGPRC1_0__RegCRBITRC1_1, |
| 2062 | Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2, |
| 2063 | Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3, |
| 2064 | Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3, |
| 2065 | Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, |
| 2066 | Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 2067 | Convert__imm_95_0__imm_95_2, |
| 2068 | Convert__RegG8RC1_0__RegGxRCNoR01_1__U5Imm1_2, |
| 2069 | Convert__RegG8RC1_1__RegGxRCNoR01_2__RegGxRC1_3, |
| 2070 | Convert__imm_95_0__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, |
| 2071 | Convert__imm_95_0__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 2072 | Convert__imm_95_0__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, |
| 2073 | Convert__imm_95_0__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 2074 | Convert__imm_95_0__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, |
| 2075 | Convert__imm_95_0__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, |
| 2076 | Convert__imm_95_1__imm_95_1, |
| 2077 | Convert__RegG8pRC1_0__DispRIX1_1__RegGxRCNoR01_2, |
| 2078 | Convert__RegG8pRC1_1__RegGxRCNoR01_2__RegGxRC1_3, |
| 2079 | Convert__imm_95_0__imm_95_3, |
| 2080 | Convert__RegGPRC1_0__RegGxRCNoR01_1__U5Imm1_2, |
| 2081 | Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_1, |
| 2082 | Convert__RegGPRC1_0__RegGPRC1_2__RegGPRC1_1, |
| 2083 | Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_2, |
| 2084 | Convert__RegGPRC1_1__RegGPRC1_3__RegGPRC1_2, |
| 2085 | Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_3__U1Imm1_1, |
| 2086 | Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_4__U1Imm1_2, |
| 2087 | Convert__RegG8RC1_0__S16Imm1_1, |
| 2088 | Convert__U2Imm1_0, |
| 2089 | Convert__U3Imm1_0__imm_95_0, |
| 2090 | Convert__U3Imm1_0__U2Imm1_1, |
| 2091 | Convert__U5Imm1_1__RegGPRC1_2__RegGPRC1_3, |
| 2092 | Convert__U5Imm1_1__RegGPRC1_2__U5Imm1_3, |
| 2093 | Convert__U1Imm1_1, |
| 2094 | Convert__U5Imm1_0__RegG8RC1_1__RegG8RC1_2, |
| 2095 | Convert__imm_95_4__RegG8RC1_0__RegG8RC1_1, |
| 2096 | Convert__imm_95_4__RegG8RC1_0__S16Imm1_1, |
| 2097 | Convert__imm_95_12__RegG8RC1_0__RegG8RC1_1, |
| 2098 | Convert__imm_95_12__RegG8RC1_0__S16Imm1_1, |
| 2099 | Convert__imm_95_8__RegG8RC1_0__RegG8RC1_1, |
| 2100 | Convert__imm_95_8__RegG8RC1_0__S16Imm1_1, |
| 2101 | Convert__U5Imm1_0__RegG8RC1_1__S16Imm1_2, |
| 2102 | Convert__imm_95_20__RegG8RC1_0__RegG8RC1_1, |
| 2103 | Convert__imm_95_20__RegG8RC1_0__S16Imm1_1, |
| 2104 | Convert__imm_95_5__RegG8RC1_0__RegG8RC1_1, |
| 2105 | Convert__imm_95_5__RegG8RC1_0__S16Imm1_1, |
| 2106 | Convert__imm_95_1__RegG8RC1_0__RegG8RC1_1, |
| 2107 | Convert__imm_95_1__RegG8RC1_0__S16Imm1_1, |
| 2108 | Convert__imm_95_6__RegG8RC1_0__RegG8RC1_1, |
| 2109 | Convert__imm_95_6__RegG8RC1_0__S16Imm1_1, |
| 2110 | Convert__imm_95_2__RegG8RC1_0__RegG8RC1_1, |
| 2111 | Convert__imm_95_2__RegG8RC1_0__S16Imm1_1, |
| 2112 | Convert__imm_95_16__RegG8RC1_0__RegG8RC1_1, |
| 2113 | Convert__imm_95_16__RegG8RC1_0__S16Imm1_1, |
| 2114 | Convert__imm_95_24__RegG8RC1_0__RegG8RC1_1, |
| 2115 | Convert__imm_95_24__RegG8RC1_0__S16Imm1_1, |
| 2116 | Convert__imm_95_31__RegG8RC1_0__RegG8RC1_1, |
| 2117 | Convert__imm_95_31__RegG8RC1_0__S16Imm1_1, |
| 2118 | Convert__regR0__RegGPRC1_0, |
| 2119 | Convert__regR0__RegGPRC1_0__imm_95_0__imm_95_0__imm_95_0, |
| 2120 | Convert__RegGPRC1_1__RegGPRC1_0, |
| 2121 | Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0__imm_95_0__imm_95_0, |
| 2122 | Convert__RegGPRC1_0__RegGPRC1_1__U2Imm1_2__U1Imm1_3__U1Imm1_4, |
| 2123 | Convert__RegG8RC1_0__RegG8RC1_1__U2Imm1_2, |
| 2124 | Convert__U2Imm1_0__RegGPRC1_1__RegGPRC1_2, |
| 2125 | Convert__imm_95_0__regR0__regR0, |
| 2126 | Convert__imm_95_1__regR0__regR0, |
| 2127 | Convert__imm_95_3__regR0__RegGPRC1_0, |
| 2128 | Convert__imm_95_3__RegGPRC1_0__RegGPRC1_1, |
| 2129 | Convert__RegGPRC1_0__RegGPRC1_1__Imm1_2, |
| 2130 | Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0, |
| 2131 | Convert__RegGPRC1_0__RegGPRC1_1__imm_95_1, |
| 2132 | Convert__imm_95_31__regR0__regR0, |
| 2133 | Convert__U5Imm1_0__RegGPRC1_1__RegGPRC1_2, |
| 2134 | Convert__imm_95_4__RegGPRC1_0__RegGPRC1_1, |
| 2135 | Convert__imm_95_4__RegGPRC1_0__S16Imm1_1, |
| 2136 | Convert__imm_95_12__RegGPRC1_0__RegGPRC1_1, |
| 2137 | Convert__imm_95_12__RegGPRC1_0__S16Imm1_1, |
| 2138 | Convert__imm_95_8__RegGPRC1_0__RegGPRC1_1, |
| 2139 | Convert__imm_95_8__RegGPRC1_0__S16Imm1_1, |
| 2140 | Convert__U5Imm1_0__RegGPRC1_1__S16Imm1_2, |
| 2141 | Convert__imm_95_20__RegGPRC1_0__RegGPRC1_1, |
| 2142 | Convert__imm_95_20__RegGPRC1_0__S16Imm1_1, |
| 2143 | Convert__imm_95_5__RegGPRC1_0__RegGPRC1_1, |
| 2144 | Convert__imm_95_5__RegGPRC1_0__S16Imm1_1, |
| 2145 | Convert__imm_95_1__RegGPRC1_0__RegGPRC1_1, |
| 2146 | Convert__imm_95_1__RegGPRC1_0__S16Imm1_1, |
| 2147 | Convert__imm_95_6__RegGPRC1_0__RegGPRC1_1, |
| 2148 | Convert__imm_95_6__RegGPRC1_0__S16Imm1_1, |
| 2149 | Convert__imm_95_2__RegGPRC1_0__RegGPRC1_1, |
| 2150 | Convert__imm_95_2__RegGPRC1_0__S16Imm1_1, |
| 2151 | Convert__imm_95_16__RegGPRC1_0__RegGPRC1_1, |
| 2152 | Convert__imm_95_16__RegGPRC1_0__S16Imm1_1, |
| 2153 | Convert__imm_95_24__RegGPRC1_0__RegGPRC1_1, |
| 2154 | Convert__imm_95_24__RegGPRC1_0__S16Imm1_1, |
| 2155 | Convert__imm_95_31__RegGPRC1_0__RegGPRC1_1, |
| 2156 | Convert__imm_95_31__RegGPRC1_0__S16Imm1_1, |
| 2157 | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, |
| 2158 | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, |
| 2159 | Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, |
| 2160 | Convert__RegVRRC1_0__RegVRRC1_1__RegGPRC1_2, |
| 2161 | Convert__RegVRRC1_0__RegVRRC1_1, |
| 2162 | Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, |
| 2163 | Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, |
| 2164 | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, |
| 2165 | Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, |
| 2166 | Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, |
| 2167 | Convert__RegG8RC1_0__RegVRRC1_1__U3Imm1_2, |
| 2168 | Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, |
| 2169 | Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, |
| 2170 | Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegG8RC1_1, |
| 2171 | Convert__RegVRRC1_0__Tie0_1_1__RegG8RC1_1__RegG8RC1_2, |
| 2172 | Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1, |
| 2173 | Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegGPRC1_1, |
| 2174 | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_1, |
| 2175 | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1, |
| 2176 | Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2__U4Imm1_3, |
| 2177 | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U3Imm1_3, |
| 2178 | Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U4Imm1_3, |
| 2179 | Convert__RegVRRC1_0__S5Imm1_1, |
| 2180 | Convert__RegVRRC1_0__RegVRRC1_1__U2Imm1_2, |
| 2181 | Convert__RegVRRC1_0__RegVRRC1_1__U3Imm1_2, |
| 2182 | Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2, |
| 2183 | Convert__imm_95_1__imm_95_0, |
| 2184 | Convert__U2Imm1_0__U2Imm1_1, |
| 2185 | Convert__RegVSFRC1_0__RegVSFRC1_1, |
| 2186 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, |
| 2187 | Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, |
| 2188 | Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, |
| 2189 | Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, |
| 2190 | Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, |
| 2191 | Convert__RegVRRC1_0__RegVFRC1_1, |
| 2192 | Convert__RegVSRC1_0__RegVSSRC1_1, |
| 2193 | Convert__RegVFRC1_0__RegVRRC1_1, |
| 2194 | Convert__RegVSSRC1_0__RegVSRC1_1, |
| 2195 | Convert__RegVSSRC1_0__RegVSFRC1_1, |
| 2196 | Convert__RegVSRC1_0__RegG8RC1_1__RegG8RC1_2, |
| 2197 | Convert__RegVRRC1_0__RegVRRC1_1__RegVSFRC1_2, |
| 2198 | Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, |
| 2199 | Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, |
| 2200 | Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, |
| 2201 | Convert__RegVSSRC1_0__RegVSSRC1_1, |
| 2202 | Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3, |
| 2203 | Convert__RegCRRC1_0__RegVSFRC1_1, |
| 2204 | Convert__RegCRRC1_0__U7Imm1_2__RegVSFRC1_1, |
| 2205 | Convert__RegCRRC1_0__U7Imm1_2__RegVRRC1_1, |
| 2206 | Convert__RegCRRC1_0__U7Imm1_2__RegVSSRC1_1, |
| 2207 | Convert__RegVSRC1_0__RegVSRC1_1, |
| 2208 | Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, |
| 2209 | Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, |
| 2210 | Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, |
| 2211 | Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2, |
| 2212 | Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, |
| 2213 | Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, |
| 2214 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1, |
| 2215 | Convert__RegCRRC1_0__RegVSRC1_1__RegVSRC1_2, |
| 2216 | Convert__RegCRRC1_0__RegVSRC1_1, |
| 2217 | Convert__RegVSRC1_0__U7Imm1_2__RegVSRC1_1, |
| 2218 | Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_0, |
| 2219 | Convert__RegVSRpRC1_0__RegVSRpRC1_1__imm_95_0, |
| 2220 | Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_1, |
| 2221 | Convert__RegVSRpRC1_0__RegVSRpRC1_1__imm_95_1, |
| 2222 | Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_2, |
| 2223 | Convert__RegVSRpRC1_0__RegVSRpRC1_1__imm_95_2, |
| 2224 | Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__U2Imm1_3, |
| 2225 | Convert__RegVSRpRC1_0__RegVSRpRC1_1__U2Imm1_2, |
| 2226 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, |
| 2227 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U8Imm1_4, |
| 2228 | Convert__RegVSFRC1_0__RegVSRC1_1__U4Imm1_2, |
| 2229 | Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, |
| 2230 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3, |
| 2231 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_0, |
| 2232 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_1, |
| 2233 | Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__U4Imm1_2, |
| 2234 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_3, |
| 2235 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U3Imm1_3, |
| 2236 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3__U1Imm1_4__U1Imm1_5, |
| 2237 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3__U1Imm1_4, |
| 2238 | Convert__RegVSRC1_0__RegVSRC1_1__Tie0_1_1__RegVSRC1_2, |
| 2239 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U2Imm1_3, |
| 2240 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U3Imm1_4, |
| 2241 | Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_0, |
| 2242 | Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_3, |
| 2243 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_0, |
| 2244 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_3, |
| 2245 | Convert__RegVSRC1_0__Tie0_1_1__U1Imm1_1__Imm1_2, |
| 2246 | Convert__RegVSRC1_0__U8Imm1_1, |
| 2247 | Convert__RegVSRC1_0__Imm1_1, |
| 2248 | Convert__RegVSRC1_0__RegVSRC1_1__U2Imm1_2, |
| 2249 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U1Imm1_4, |
| 2250 | Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_2, |
| 2251 | Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_2, |
| 2252 | CVT_NUM_SIGNATURES |
| 2253 | }; |
| 2254 | |
| 2255 | } // end anonymous namespace |
| 2256 | |
| 2257 | static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][15] = { |
| 2258 | // Convert__RegG8RC1_0__RegG8RC1_1__TLSReg1_2 |
| 2259 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addTLSRegOperands, 3, CVT_Done }, |
| 2260 | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2 |
| 2261 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 2262 | // Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3 |
| 2263 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
| 2264 | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U2Imm1_3 |
| 2265 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2266 | // Convert__RegGPRC1_0__RegGPRCNoR01_1__S16Imm1_2 |
| 2267 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
| 2268 | // Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2 |
| 2269 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
| 2270 | // Convert__RegGPRC1_1__RegGPRC1_2__S16Imm1_3 |
| 2271 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addS16ImmOperands, 4, CVT_Done }, |
| 2272 | // Convert__RegGPRC1_0__RegGPRCNoR01_1__S17Imm1_2 |
| 2273 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
| 2274 | // Convert__RegGPRC1_0__RegGPRC1_1 |
| 2275 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 2276 | // Convert__RegGPRC1_1__RegGPRC1_2 |
| 2277 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 2278 | // Convert__RegG8RC1_0__Imm1_1 |
| 2279 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 2280 | // Convert__RegGPRC1_1__RegGPRC1_2__U16Imm1_3 |
| 2281 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addU16ImmOperands, 4, CVT_Done }, |
| 2282 | // Convert_NoOperands |
| 2283 | { CVT_Done }, |
| 2284 | // Convert__DirectBr1_0 |
| 2285 | { CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2286 | // Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2 |
| 2287 | { CVT_95_addImmOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addBranchTargetOperands, 3, CVT_Done }, |
| 2288 | // Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3 |
| 2289 | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegCRBITRCOperands, 3, CVT_95_addBranchTargetOperands, 4, CVT_Done }, |
| 2290 | // Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2 |
| 2291 | { CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addBranchTargetOperands, 3, CVT_Done }, |
| 2292 | // Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2 |
| 2293 | { CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addBranchTargetOperands, 3, CVT_Done }, |
| 2294 | // Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0 |
| 2295 | { CVT_95_addImmOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
| 2296 | // Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2 |
| 2297 | { CVT_95_addImmOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2298 | // Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4 |
| 2299 | { CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addRegVRRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2300 | // Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3 |
| 2301 | { CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2302 | // Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3 |
| 2303 | { CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addRegVRRCOperands, 4, CVT_Done }, |
| 2304 | // Convert__RegVRRC1_1__RegVRRC1_2 |
| 2305 | { CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
| 2306 | // Convert__CondBr1_0 |
| 2307 | { CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2308 | // Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1 |
| 2309 | { CVT_imm_95_0, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2310 | // Convert__imm_95_0__RegCRBITRC1_0__imm_95_0 |
| 2311 | { CVT_imm_95_0, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2312 | // Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1 |
| 2313 | { CVT_imm_95_8, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2314 | // Convert__imm_95_8__RegCRBITRC1_0__imm_95_0 |
| 2315 | { CVT_imm_95_8, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2316 | // Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1 |
| 2317 | { CVT_imm_95_2, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2318 | // Convert__imm_95_2__RegCRBITRC1_0__imm_95_0 |
| 2319 | { CVT_imm_95_2, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2320 | // Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1 |
| 2321 | { CVT_imm_95_10, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2322 | // Convert__imm_95_10__RegCRBITRC1_0__imm_95_0 |
| 2323 | { CVT_imm_95_10, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2324 | // Convert__imm_95_76__regCR0__CondBr1_0 |
| 2325 | { CVT_imm_95_76, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2326 | // Convert__imm_95_76__RegCRRC1_0__CondBr1_1 |
| 2327 | { CVT_imm_95_76, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2328 | // Convert__imm_95_79__regCR0__CondBr1_0 |
| 2329 | { CVT_imm_95_79, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2330 | // Convert__imm_95_79__RegCRRC1_0__CondBr1_1 |
| 2331 | { CVT_imm_95_79, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2332 | // Convert__imm_95_78__regCR0__CondBr1_0 |
| 2333 | { CVT_imm_95_78, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2334 | // Convert__imm_95_78__RegCRRC1_0__CondBr1_1 |
| 2335 | { CVT_imm_95_78, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2336 | // Convert__imm_95_76__regCR0 |
| 2337 | { CVT_imm_95_76, 0, CVT_regCR0, 0, CVT_Done }, |
| 2338 | // Convert__imm_95_76__RegCRRC1_0 |
| 2339 | { CVT_imm_95_76, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2340 | // Convert__imm_95_79__regCR0 |
| 2341 | { CVT_imm_95_79, 0, CVT_regCR0, 0, CVT_Done }, |
| 2342 | // Convert__imm_95_79__RegCRRC1_0 |
| 2343 | { CVT_imm_95_79, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2344 | // Convert__imm_95_78__regCR0 |
| 2345 | { CVT_imm_95_78, 0, CVT_regCR0, 0, CVT_Done }, |
| 2346 | // Convert__imm_95_78__RegCRRC1_0 |
| 2347 | { CVT_imm_95_78, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2348 | // Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1 |
| 2349 | { CVT_imm_95_4, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2350 | // Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1 |
| 2351 | { CVT_imm_95_7, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2352 | // Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1 |
| 2353 | { CVT_imm_95_6, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2354 | // Convert__imm_95_4__RegCRBITRC1_0__imm_95_0 |
| 2355 | { CVT_imm_95_4, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2356 | // Convert__imm_95_7__RegCRBITRC1_0__imm_95_0 |
| 2357 | { CVT_imm_95_7, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2358 | // Convert__imm_95_6__RegCRBITRC1_0__imm_95_0 |
| 2359 | { CVT_imm_95_6, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2360 | // Convert__imm_95_4__regCR0__CondBr1_0 |
| 2361 | { CVT_imm_95_4, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2362 | // Convert__imm_95_4__RegCRRC1_0__CondBr1_1 |
| 2363 | { CVT_imm_95_4, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2364 | // Convert__imm_95_7__regCR0__CondBr1_0 |
| 2365 | { CVT_imm_95_7, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2366 | // Convert__imm_95_7__RegCRRC1_0__CondBr1_1 |
| 2367 | { CVT_imm_95_7, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2368 | // Convert__imm_95_6__regCR0__CondBr1_0 |
| 2369 | { CVT_imm_95_6, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2370 | // Convert__imm_95_6__RegCRRC1_0__CondBr1_1 |
| 2371 | { CVT_imm_95_6, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2372 | // Convert__imm_95_4__regCR0 |
| 2373 | { CVT_imm_95_4, 0, CVT_regCR0, 0, CVT_Done }, |
| 2374 | // Convert__imm_95_4__RegCRRC1_0 |
| 2375 | { CVT_imm_95_4, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2376 | // Convert__imm_95_7__regCR0 |
| 2377 | { CVT_imm_95_7, 0, CVT_regCR0, 0, CVT_Done }, |
| 2378 | // Convert__imm_95_7__RegCRRC1_0 |
| 2379 | { CVT_imm_95_7, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2380 | // Convert__imm_95_6__regCR0 |
| 2381 | { CVT_imm_95_6, 0, CVT_regCR0, 0, CVT_Done }, |
| 2382 | // Convert__imm_95_6__RegCRRC1_0 |
| 2383 | { CVT_imm_95_6, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2384 | // Convert__imm_95_44__regCR0__CondBr1_0 |
| 2385 | { CVT_imm_95_44, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2386 | // Convert__imm_95_44__RegCRRC1_0__CondBr1_1 |
| 2387 | { CVT_imm_95_44, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2388 | // Convert__imm_95_47__regCR0__CondBr1_0 |
| 2389 | { CVT_imm_95_47, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2390 | // Convert__imm_95_47__RegCRRC1_0__CondBr1_1 |
| 2391 | { CVT_imm_95_47, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2392 | // Convert__imm_95_46__regCR0__CondBr1_0 |
| 2393 | { CVT_imm_95_46, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2394 | // Convert__imm_95_46__RegCRRC1_0__CondBr1_1 |
| 2395 | { CVT_imm_95_46, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2396 | // Convert__imm_95_44__regCR0 |
| 2397 | { CVT_imm_95_44, 0, CVT_regCR0, 0, CVT_Done }, |
| 2398 | // Convert__imm_95_44__RegCRRC1_0 |
| 2399 | { CVT_imm_95_44, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2400 | // Convert__imm_95_47__regCR0 |
| 2401 | { CVT_imm_95_47, 0, CVT_regCR0, 0, CVT_Done }, |
| 2402 | // Convert__imm_95_47__RegCRRC1_0 |
| 2403 | { CVT_imm_95_47, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2404 | // Convert__imm_95_46__regCR0 |
| 2405 | { CVT_imm_95_46, 0, CVT_regCR0, 0, CVT_Done }, |
| 2406 | // Convert__imm_95_46__RegCRRC1_0 |
| 2407 | { CVT_imm_95_46, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2408 | // Convert__DirectBr1_0__Imm1_1 |
| 2409 | { CVT_95_addBranchTargetOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 2410 | // Convert__imm_95_36__regCR0__CondBr1_0 |
| 2411 | { CVT_imm_95_36, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2412 | // Convert__imm_95_36__RegCRRC1_0__CondBr1_1 |
| 2413 | { CVT_imm_95_36, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2414 | // Convert__imm_95_39__regCR0__CondBr1_0 |
| 2415 | { CVT_imm_95_39, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2416 | // Convert__imm_95_39__RegCRRC1_0__CondBr1_1 |
| 2417 | { CVT_imm_95_39, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2418 | // Convert__imm_95_38__regCR0__CondBr1_0 |
| 2419 | { CVT_imm_95_38, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2420 | // Convert__imm_95_38__RegCRRC1_0__CondBr1_1 |
| 2421 | { CVT_imm_95_38, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2422 | // Convert__imm_95_36__regCR0 |
| 2423 | { CVT_imm_95_36, 0, CVT_regCR0, 0, CVT_Done }, |
| 2424 | // Convert__imm_95_36__RegCRRC1_0 |
| 2425 | { CVT_imm_95_36, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2426 | // Convert__imm_95_39__regCR0 |
| 2427 | { CVT_imm_95_39, 0, CVT_regCR0, 0, CVT_Done }, |
| 2428 | // Convert__imm_95_39__RegCRRC1_0 |
| 2429 | { CVT_imm_95_39, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2430 | // Convert__imm_95_38__regCR0 |
| 2431 | { CVT_imm_95_38, 0, CVT_regCR0, 0, CVT_Done }, |
| 2432 | // Convert__imm_95_38__RegCRRC1_0 |
| 2433 | { CVT_imm_95_38, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2434 | // Convert__imm_95_12__regCR0__CondBr1_0 |
| 2435 | { CVT_imm_95_12, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2436 | // Convert__imm_95_12__RegCRRC1_0__CondBr1_1 |
| 2437 | { CVT_imm_95_12, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2438 | // Convert__imm_95_15__regCR0__CondBr1_0 |
| 2439 | { CVT_imm_95_15, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2440 | // Convert__imm_95_15__RegCRRC1_0__CondBr1_1 |
| 2441 | { CVT_imm_95_15, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2442 | // Convert__imm_95_14__regCR0__CondBr1_0 |
| 2443 | { CVT_imm_95_14, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2444 | // Convert__imm_95_14__RegCRRC1_0__CondBr1_1 |
| 2445 | { CVT_imm_95_14, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2446 | // Convert__imm_95_12__regCR0 |
| 2447 | { CVT_imm_95_12, 0, CVT_regCR0, 0, CVT_Done }, |
| 2448 | // Convert__imm_95_12__RegCRRC1_0 |
| 2449 | { CVT_imm_95_12, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2450 | // Convert__imm_95_15__regCR0 |
| 2451 | { CVT_imm_95_15, 0, CVT_regCR0, 0, CVT_Done }, |
| 2452 | // Convert__imm_95_15__RegCRRC1_0 |
| 2453 | { CVT_imm_95_15, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2454 | // Convert__imm_95_14__regCR0 |
| 2455 | { CVT_imm_95_14, 0, CVT_regCR0, 0, CVT_Done }, |
| 2456 | // Convert__imm_95_14__RegCRRC1_0 |
| 2457 | { CVT_imm_95_14, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2458 | // Convert__imm_95_68__regCR0__CondBr1_0 |
| 2459 | { CVT_imm_95_68, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2460 | // Convert__imm_95_68__RegCRRC1_0__CondBr1_1 |
| 2461 | { CVT_imm_95_68, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2462 | // Convert__imm_95_71__regCR0__CondBr1_0 |
| 2463 | { CVT_imm_95_71, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2464 | // Convert__imm_95_71__RegCRRC1_0__CondBr1_1 |
| 2465 | { CVT_imm_95_71, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2466 | // Convert__imm_95_70__regCR0__CondBr1_0 |
| 2467 | { CVT_imm_95_70, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2468 | // Convert__imm_95_70__RegCRRC1_0__CondBr1_1 |
| 2469 | { CVT_imm_95_70, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2470 | // Convert__imm_95_68__regCR0 |
| 2471 | { CVT_imm_95_68, 0, CVT_regCR0, 0, CVT_Done }, |
| 2472 | // Convert__imm_95_68__RegCRRC1_0 |
| 2473 | { CVT_imm_95_68, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2474 | // Convert__imm_95_71__regCR0 |
| 2475 | { CVT_imm_95_71, 0, CVT_regCR0, 0, CVT_Done }, |
| 2476 | // Convert__imm_95_71__RegCRRC1_0 |
| 2477 | { CVT_imm_95_71, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2478 | // Convert__imm_95_70__regCR0 |
| 2479 | { CVT_imm_95_70, 0, CVT_regCR0, 0, CVT_Done }, |
| 2480 | // Convert__imm_95_70__RegCRRC1_0 |
| 2481 | { CVT_imm_95_70, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2482 | // Convert__imm_95_100__regCR0__CondBr1_0 |
| 2483 | { CVT_imm_95_100, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2484 | // Convert__imm_95_100__RegCRRC1_0__CondBr1_1 |
| 2485 | { CVT_imm_95_100, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2486 | // Convert__imm_95_103__regCR0__CondBr1_0 |
| 2487 | { CVT_imm_95_103, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2488 | // Convert__imm_95_103__RegCRRC1_0__CondBr1_1 |
| 2489 | { CVT_imm_95_103, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2490 | // Convert__imm_95_102__regCR0__CondBr1_0 |
| 2491 | { CVT_imm_95_102, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2492 | // Convert__imm_95_102__RegCRRC1_0__CondBr1_1 |
| 2493 | { CVT_imm_95_102, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2494 | // Convert__imm_95_100__regCR0 |
| 2495 | { CVT_imm_95_100, 0, CVT_regCR0, 0, CVT_Done }, |
| 2496 | // Convert__imm_95_100__RegCRRC1_0 |
| 2497 | { CVT_imm_95_100, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2498 | // Convert__imm_95_103__regCR0 |
| 2499 | { CVT_imm_95_103, 0, CVT_regCR0, 0, CVT_Done }, |
| 2500 | // Convert__imm_95_103__RegCRRC1_0 |
| 2501 | { CVT_imm_95_103, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2502 | // Convert__imm_95_102__regCR0 |
| 2503 | { CVT_imm_95_102, 0, CVT_regCR0, 0, CVT_Done }, |
| 2504 | // Convert__imm_95_102__RegCRRC1_0 |
| 2505 | { CVT_imm_95_102, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2506 | // Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2 |
| 2507 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 2508 | // Convert__RegG8RC1_0__RegG8RC1_1 |
| 2509 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 2510 | // Convert__imm_95_108__regCR0__CondBr1_0 |
| 2511 | { CVT_imm_95_108, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2512 | // Convert__imm_95_108__RegCRRC1_0__CondBr1_1 |
| 2513 | { CVT_imm_95_108, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2514 | // Convert__imm_95_111__regCR0__CondBr1_0 |
| 2515 | { CVT_imm_95_111, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2516 | // Convert__imm_95_111__RegCRRC1_0__CondBr1_1 |
| 2517 | { CVT_imm_95_111, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2518 | // Convert__imm_95_110__regCR0__CondBr1_0 |
| 2519 | { CVT_imm_95_110, 0, CVT_regCR0, 0, CVT_95_addBranchTargetOperands, 1, CVT_Done }, |
| 2520 | // Convert__imm_95_110__RegCRRC1_0__CondBr1_1 |
| 2521 | { CVT_imm_95_110, 0, CVT_95_addRegCRRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2522 | // Convert__imm_95_108__regCR0 |
| 2523 | { CVT_imm_95_108, 0, CVT_regCR0, 0, CVT_Done }, |
| 2524 | // Convert__imm_95_108__RegCRRC1_0 |
| 2525 | { CVT_imm_95_108, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2526 | // Convert__imm_95_111__regCR0 |
| 2527 | { CVT_imm_95_111, 0, CVT_regCR0, 0, CVT_Done }, |
| 2528 | // Convert__imm_95_111__RegCRRC1_0 |
| 2529 | { CVT_imm_95_111, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2530 | // Convert__imm_95_110__regCR0 |
| 2531 | { CVT_imm_95_110, 0, CVT_regCR0, 0, CVT_Done }, |
| 2532 | // Convert__imm_95_110__RegCRRC1_0 |
| 2533 | { CVT_imm_95_110, 0, CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2534 | // Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1 |
| 2535 | { CVT_imm_95_12, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2536 | // Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1 |
| 2537 | { CVT_imm_95_15, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2538 | // Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1 |
| 2539 | { CVT_imm_95_14, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addBranchTargetOperands, 2, CVT_Done }, |
| 2540 | // Convert__imm_95_12__RegCRBITRC1_0__imm_95_0 |
| 2541 | { CVT_imm_95_12, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2542 | // Convert__imm_95_15__RegCRBITRC1_0__imm_95_0 |
| 2543 | { CVT_imm_95_15, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2544 | // Convert__imm_95_14__RegCRBITRC1_0__imm_95_0 |
| 2545 | { CVT_imm_95_14, 0, CVT_95_addRegCRBITRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2546 | // Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U6Imm1_2 |
| 2547 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2548 | // Convert__RegG8RC1_0__RegGPRC1_1__imm_95_0__U6Imm1_2 |
| 2549 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2550 | // Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U6Imm1_3 |
| 2551 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_imm_95_0, 0, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2552 | // Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3 |
| 2553 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2554 | // Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4 |
| 2555 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2556 | // Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3 |
| 2557 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2558 | // Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4 |
| 2559 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2560 | // Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U5Imm1_2__imm_95_31 |
| 2561 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_imm_95_31, 0, CVT_Done }, |
| 2562 | // Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0__U5Imm1_2__imm_95_31 |
| 2563 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_imm_95_31, 0, CVT_Done }, |
| 2564 | // Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U5Imm1_3__imm_95_31 |
| 2565 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_imm_95_0, 0, CVT_95_addImmOperands, 4, CVT_imm_95_31, 0, CVT_Done }, |
| 2566 | // Convert__RegGPRC1_1__RegGPRC1_2__imm_95_0__U5Imm1_3__imm_95_31 |
| 2567 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_imm_95_0, 0, CVT_95_addImmOperands, 4, CVT_imm_95_31, 0, CVT_Done }, |
| 2568 | // Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2 |
| 2569 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2570 | // Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3 |
| 2571 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2572 | // Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2 |
| 2573 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2574 | // Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3 |
| 2575 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2576 | // Convert__RegCRRC1_0__RegGPRC1_2__RegGPRC1_3 |
| 2577 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
| 2578 | // Convert__RegCRRC1_0__RegG8RC1_2__RegG8RC1_3 |
| 2579 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_Done }, |
| 2580 | // Convert__regCR0__RegG8RC1_0__RegG8RC1_1 |
| 2581 | { CVT_regCR0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 2582 | // Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2 |
| 2583 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 2584 | // Convert__regCR0__RegG8RC1_0__S16Imm1_1 |
| 2585 | { CVT_regCR0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 2586 | // Convert__RegCRRC1_0__RegG8RC1_1__S16Imm1_2 |
| 2587 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
| 2588 | // Convert__RegCRRC1_0__RegGPRC1_2__S16Imm1_3 |
| 2589 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 3, CVT_95_addS16ImmOperands, 4, CVT_Done }, |
| 2590 | // Convert__RegCRRC1_0__RegG8RC1_2__S16Imm1_3 |
| 2591 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addS16ImmOperands, 4, CVT_Done }, |
| 2592 | // Convert__regCR0__RegG8RC1_0__U16Imm1_1 |
| 2593 | { CVT_regCR0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addU16ImmOperands, 2, CVT_Done }, |
| 2594 | // Convert__RegCRRC1_0__RegG8RC1_1__U16Imm1_2 |
| 2595 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addU16ImmOperands, 3, CVT_Done }, |
| 2596 | // Convert__RegCRRC1_0__RegGPRC1_2__U16Imm1_3 |
| 2597 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 3, CVT_95_addU16ImmOperands, 4, CVT_Done }, |
| 2598 | // Convert__RegCRRC1_0__RegG8RC1_2__U16Imm1_3 |
| 2599 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addU16ImmOperands, 4, CVT_Done }, |
| 2600 | // Convert__regCR0__RegGPRC1_0__RegGPRC1_1 |
| 2601 | { CVT_regCR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 2602 | // Convert__RegCRRC1_0__RegGPRC1_1__RegGPRC1_2 |
| 2603 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 2604 | // Convert__regCR0__RegGPRC1_0__U16Imm1_1 |
| 2605 | { CVT_regCR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addU16ImmOperands, 2, CVT_Done }, |
| 2606 | // Convert__RegCRRC1_0__RegGPRC1_1__U16Imm1_2 |
| 2607 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addU16ImmOperands, 3, CVT_Done }, |
| 2608 | // Convert__RegCRRC1_0__U1Imm1_1__RegGPRC1_2__RegGPRC1_3 |
| 2609 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
| 2610 | // Convert__regCR0__RegGPRC1_0__S16Imm1_1 |
| 2611 | { CVT_regCR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 2612 | // Convert__RegCRRC1_0__RegGPRC1_1__S16Imm1_2 |
| 2613 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
| 2614 | // Convert__RegG8RC1_1__RegG8RC1_2 |
| 2615 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 2616 | // Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2 |
| 2617 | { CVT_95_addRegCRBITRCOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addRegCRBITRCOperands, 3, CVT_Done }, |
| 2618 | // Convert__RegCRBITRC1_0__RegCRBITRC1_0__RegCRBITRC1_0 |
| 2619 | { CVT_95_addRegCRBITRCOperands, 1, CVT_95_addRegCRBITRCOperands, 1, CVT_95_addRegCRBITRCOperands, 1, CVT_Done }, |
| 2620 | // Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_1 |
| 2621 | { CVT_95_addRegCRBITRCOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_95_addRegCRBITRCOperands, 2, CVT_Done }, |
| 2622 | // Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2 |
| 2623 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
| 2624 | // Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3 |
| 2625 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF8RCOperands, 4, CVT_Done }, |
| 2626 | // Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2 |
| 2627 | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
| 2628 | // Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3 |
| 2629 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addRegFpRCOperands, 4, CVT_Done }, |
| 2630 | // Convert__RegG8RC1_0__U2Imm1_1 |
| 2631 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 2632 | // Convert__RegGxRCNoR01_0__RegGxRC1_1 |
| 2633 | { CVT_95_addRegGxRCNoR0Operands, 1, CVT_95_addRegGxRCOperands, 2, CVT_Done }, |
| 2634 | // Convert__U3Imm1_2__RegGxRCNoR01_0__RegGxRC1_1 |
| 2635 | { CVT_95_addImmOperands, 3, CVT_95_addRegGxRCNoR0Operands, 1, CVT_95_addRegGxRCOperands, 2, CVT_Done }, |
| 2636 | // Convert__U5Imm1_2__RegGxRCNoR01_0__RegGxRC1_1 |
| 2637 | { CVT_95_addImmOperands, 3, CVT_95_addRegGxRCNoR0Operands, 1, CVT_95_addRegGxRCOperands, 2, CVT_Done }, |
| 2638 | // Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2 |
| 2639 | { CVT_95_addRegGxRCNoR0Operands, 1, CVT_95_addRegGxRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2640 | // Convert__RegGxRCNoR01_1__RegGxRC1_2__U5Imm1_0 |
| 2641 | { CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_95_addImmOperands, 1, CVT_Done }, |
| 2642 | // Convert__regR0__regR0 |
| 2643 | { CVT_regR0, 0, CVT_regR0, 0, CVT_Done }, |
| 2644 | // Convert__RegF8RC1_0__RegF8RC1_1 |
| 2645 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
| 2646 | // Convert__RegF8RC1_1__RegF8RC1_2 |
| 2647 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
| 2648 | // Convert__RegFpRC1_0__RegF8RC1_1 |
| 2649 | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
| 2650 | // Convert__RegFpRC1_1__RegF8RC1_2 |
| 2651 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
| 2652 | // Convert__RegFpRC1_0__RegVRRC1_1 |
| 2653 | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 2654 | // Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2 |
| 2655 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
| 2656 | // Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2 |
| 2657 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
| 2658 | // Convert__RegF8RC1_0__RegFpRC1_1 |
| 2659 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_Done }, |
| 2660 | // Convert__RegF8RC1_1__RegFpRC1_2 |
| 2661 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
| 2662 | // Convert__RegVRRC1_0__RegFpRC1_1 |
| 2663 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_Done }, |
| 2664 | // Convert__RegF8RC1_1__U2Imm1_0__RegF8RC1_2 |
| 2665 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
| 2666 | // Convert__RegF8RC1_2__U2Imm1_1__RegF8RC1_3 |
| 2667 | { CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 4, CVT_Done }, |
| 2668 | // Convert__RegFpRC1_1__U2Imm1_0__RegFpRC1_2 |
| 2669 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
| 2670 | // Convert__RegFpRC1_2__U2Imm1_1__RegFpRC1_3 |
| 2671 | { CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 4, CVT_Done }, |
| 2672 | // Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2 |
| 2673 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
| 2674 | // Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3 |
| 2675 | { CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 4, CVT_Done }, |
| 2676 | // Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2 |
| 2677 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
| 2678 | // Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3 |
| 2679 | { CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 4, CVT_Done }, |
| 2680 | // Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2 |
| 2681 | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
| 2682 | // Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3 |
| 2683 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegFpRCOperands, 4, CVT_Done }, |
| 2684 | // Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3 |
| 2685 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_Done }, |
| 2686 | // Convert__RegDMRpRC1_0__Tie0_1_1__imm_95_12 |
| 2687 | { CVT_95_addRegDMRpRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_imm_95_12, 0, CVT_Done }, |
| 2688 | // Convert__RegDMRRC1_0__RegDMRRC1_1 |
| 2689 | { CVT_95_addRegDMRRCOperands, 1, CVT_95_addRegDMRRCOperands, 2, CVT_Done }, |
| 2690 | // Convert__RegDMRRC1_0 |
| 2691 | { CVT_95_addRegDMRRCOperands, 1, CVT_Done }, |
| 2692 | // Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1__imm_95_0 |
| 2693 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegDMRRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
| 2694 | // Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1__U1Imm1_2 |
| 2695 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegDMRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2696 | // Convert__RegDMRpRC1_0__Tie0_1_1__imm_95_0 |
| 2697 | { CVT_95_addRegDMRpRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_imm_95_0, 0, CVT_Done }, |
| 2698 | // Convert__RegDMRpRC1_0__Tie0_1_1__U5Imm1_1 |
| 2699 | { CVT_95_addRegDMRpRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 2700 | // Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1__imm_95_1 |
| 2701 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegDMRRCOperands, 2, CVT_imm_95_1, 0, CVT_Done }, |
| 2702 | // Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1 |
| 2703 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegDMRRCOperands, 2, CVT_Done }, |
| 2704 | // Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2 |
| 2705 | { CVT_95_addRegDMRRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 2706 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2 |
| 2707 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 2708 | // Convert__RegVSRpRC1_0__RegDMRROWpRC1_1__U2Imm1_2 |
| 2709 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegDMRROWpRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2710 | // Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegACCRC1_2 |
| 2711 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegACCRCOperands, 3, CVT_Done }, |
| 2712 | // Convert__RegDMRROWpRC1_0__RegVSRpRC1_1__U2Imm1_2 |
| 2713 | { CVT_95_addRegDMRROWpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2714 | // Convert__RegACCRC1_0__RegVSRpRC1_1__RegVSRpRC1_2 |
| 2715 | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRpRCOperands, 3, CVT_Done }, |
| 2716 | // Convert__RegACCRC1_0__Tie0_1_1 |
| 2717 | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_Done }, |
| 2718 | // Convert__RegACCRC1_0 |
| 2719 | { CVT_95_addRegACCRCOperands, 1, CVT_Done }, |
| 2720 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_3__imm_95_0__imm_95_0 |
| 2721 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_3, 0, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 2722 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_3 |
| 2723 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_Done }, |
| 2724 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_2 |
| 2725 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_Done }, |
| 2726 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_1 |
| 2727 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done }, |
| 2728 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_0 |
| 2729 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
| 2730 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_2__imm_95_0__imm_95_0 |
| 2731 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_2, 0, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 2732 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_1__U1Imm1_2__imm_95_1 |
| 2733 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_1, 0, CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done }, |
| 2734 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_1__U1Imm1_2__imm_95_0 |
| 2735 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_1, 0, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
| 2736 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__U2Imm1_2__U1Imm1_3__U2Imm1_4 |
| 2737 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2738 | // Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__U2Imm1_3 |
| 2739 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2740 | // Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__U2Imm1_4 |
| 2741 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF8RCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2742 | // Convert__RegF8RC1_1__S5Imm1_0__RegF8RC1_2__U2Imm1_3 |
| 2743 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2744 | // Convert__RegF8RC1_2__S5Imm1_1__RegF8RC1_3__U2Imm1_4 |
| 2745 | { CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2746 | // Convert__RegFpRC1_1__S5Imm1_0__RegFpRC1_2__U2Imm1_3 |
| 2747 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2748 | // Convert__RegFpRC1_2__S5Imm1_1__RegFpRC1_3__U2Imm1_4 |
| 2749 | { CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2750 | // Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2__U2Imm1_3 |
| 2751 | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2752 | // Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3__U2Imm1_4 |
| 2753 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addRegFpRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2754 | // Convert__RegFpRC1_0__RegFpRC1_1 |
| 2755 | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_Done }, |
| 2756 | // Convert__RegFpRC1_1__RegFpRC1_2 |
| 2757 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
| 2758 | // Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2__U2Imm1_3 |
| 2759 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2760 | // Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3__U2Imm1_4 |
| 2761 | { CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2762 | // Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2__U2Imm1_3 |
| 2763 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2764 | // Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3__U2Imm1_4 |
| 2765 | { CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2766 | // Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2__U2Imm1_3 |
| 2767 | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2768 | // Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3__U2Imm1_4 |
| 2769 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegFpRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2770 | // Convert__RegF8RC1_0__RegF8RC1_1__U6Imm1_2 |
| 2771 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2772 | // Convert__RegF8RC1_1__RegF8RC1_2__U6Imm1_3 |
| 2773 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2774 | // Convert__RegFpRC1_0__RegFpRC1_1__U6Imm1_2 |
| 2775 | { CVT_95_addRegFpRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2776 | // Convert__RegFpRC1_1__RegFpRC1_2__U6Imm1_3 |
| 2777 | { CVT_95_addRegFpRCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2778 | // Convert__U5Imm1_0 |
| 2779 | { CVT_95_addImmOperands, 1, CVT_Done }, |
| 2780 | // Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1 |
| 2781 | { CVT_95_addImmOperands, 3, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 2782 | // Convert__RegCRRC1_0__RegF8RC1_1__U6Imm1_2 |
| 2783 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2784 | // Convert__RegCRRC1_0__RegFpRC1_1__U6Imm1_2 |
| 2785 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegFpRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2786 | // Convert__RegCRRC1_0__U6Imm1_1__RegF8RC1_2 |
| 2787 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
| 2788 | // Convert__RegCRRC1_0__U6Imm1_1__RegFpRC1_2 |
| 2789 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
| 2790 | // Convert__RegCRRC1_0__RegF8RC1_1__RegFpRC1_2 |
| 2791 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegFpRCOperands, 3, CVT_Done }, |
| 2792 | // Convert__RegSPERC1_0__RegSPERC1_1 |
| 2793 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_Done }, |
| 2794 | // Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2 |
| 2795 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_95_addRegSPERCOperands, 3, CVT_Done }, |
| 2796 | // Convert__RegSPERC1_0__RegSPE4RC1_1 |
| 2797 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_Done }, |
| 2798 | // Convert__RegSPERC1_0__RegGPRC1_1 |
| 2799 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 2800 | // Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2 |
| 2801 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_95_addRegSPERCOperands, 3, CVT_Done }, |
| 2802 | // Convert__RegGPRC1_0__RegSPERC1_1 |
| 2803 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_Done }, |
| 2804 | // Convert__RegSPE4RC1_0__RegSPE4RC1_1 |
| 2805 | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_Done }, |
| 2806 | // Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2 |
| 2807 | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_95_addRegSPE4RCOperands, 3, CVT_Done }, |
| 2808 | // Convert__RegSPE4RC1_0__RegSPERC1_1 |
| 2809 | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_Done }, |
| 2810 | // Convert__RegSPE4RC1_0__RegGPRC1_1 |
| 2811 | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 2812 | // Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2 |
| 2813 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_95_addRegSPE4RCOperands, 3, CVT_Done }, |
| 2814 | // Convert__RegGPRC1_0__RegSPE4RC1_1 |
| 2815 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegSPE4RCOperands, 2, CVT_Done }, |
| 2816 | // Convert__RegSPERC1_0__RegSPERC1_2__U5Imm1_1 |
| 2817 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPERCOperands, 3, CVT_95_addImmOperands, 2, CVT_Done }, |
| 2818 | // Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2 |
| 2819 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2820 | // Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2821 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2822 | // Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2 |
| 2823 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2824 | // Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2 |
| 2825 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2826 | // Convert__RegSPERC1_0__RegGPRC1_1__RegGPRC1_2 |
| 2827 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 2828 | // Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2 |
| 2829 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addRegSPERCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2830 | // Convert__RegSPERC1_1__RegSPERC1_2__RegSPERC1_3__imm_95_0 |
| 2831 | { CVT_95_addRegSPERCOperands, 2, CVT_95_addRegSPERCOperands, 3, CVT_95_addRegSPERCOperands, 4, CVT_imm_95_0, 0, CVT_Done }, |
| 2832 | // Convert__RegSPERC1_0__S5Imm1_1 |
| 2833 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 2834 | // Convert__RegSPERC1_0__U5Imm1_1__RegSPERC1_2 |
| 2835 | { CVT_95_addRegSPERCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegSPERCOperands, 3, CVT_Done }, |
| 2836 | // Convert__RegF4RC1_0__RegF4RC1_1 |
| 2837 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF4RCOperands, 2, CVT_Done }, |
| 2838 | // Convert__RegF4RC1_1__RegF4RC1_2 |
| 2839 | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_Done }, |
| 2840 | // Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2 |
| 2841 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_Done }, |
| 2842 | // Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3 |
| 2843 | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_Done }, |
| 2844 | // Convert__RegF4RC1_0__RegF8RC1_1 |
| 2845 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
| 2846 | // Convert__RegF4RC1_1__RegF8RC1_2 |
| 2847 | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_Done }, |
| 2848 | // Convert__RegCRRC1_0__RegF4RC1_1__RegF4RC1_2 |
| 2849 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_Done }, |
| 2850 | // Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3 |
| 2851 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF8RCOperands, 4, CVT_Done }, |
| 2852 | // Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4 |
| 2853 | { CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF8RCOperands, 4, CVT_95_addRegF8RCOperands, 5, CVT_Done }, |
| 2854 | // Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3 |
| 2855 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_Done }, |
| 2856 | // Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4 |
| 2857 | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_95_addRegF4RCOperands, 5, CVT_Done }, |
| 2858 | // Convert__RegF4RC1_0__RegF8RC1_1__RegF4RC1_2__RegF4RC1_3 |
| 2859 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addRegF4RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_Done }, |
| 2860 | // Convert__RegF4RC1_1__RegF8RC1_2__RegF4RC1_3__RegF4RC1_4 |
| 2861 | { CVT_95_addRegF4RCOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addRegF4RCOperands, 4, CVT_95_addRegF4RCOperands, 5, CVT_Done }, |
| 2862 | // Convert__RegCRRC1_0__RegF8RC1_1 |
| 2863 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
| 2864 | // Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2 |
| 2865 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2866 | // Convert__imm_95_0__imm_95_0 |
| 2867 | { CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 2868 | // Convert__imm_95_0 |
| 2869 | { CVT_imm_95_0, 0, CVT_Done }, |
| 2870 | // Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2871 | { CVT_95_addImmOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2872 | // Convert__U4Imm1_1__RegGxRCNoR01_2__RegGxRC1_3 |
| 2873 | { CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_95_addRegGxRCOperands, 4, CVT_Done }, |
| 2874 | // Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__RegCRBITRC1_3 |
| 2875 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegCRBITRCOperands, 4, CVT_Done }, |
| 2876 | // Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0EQ |
| 2877 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addRegG8RCOperands, 3, CVT_regCR0EQ, 0, CVT_Done }, |
| 2878 | // Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0EQ |
| 2879 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addRegGPRCOperands, 3, CVT_regCR0EQ, 0, CVT_Done }, |
| 2880 | // Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0GT |
| 2881 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addRegG8RCOperands, 3, CVT_regCR0GT, 0, CVT_Done }, |
| 2882 | // Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0GT |
| 2883 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addRegGPRCOperands, 3, CVT_regCR0GT, 0, CVT_Done }, |
| 2884 | // Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0LT |
| 2885 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addRegG8RCOperands, 3, CVT_regCR0LT, 0, CVT_Done }, |
| 2886 | // Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0LT |
| 2887 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addRegGPRCOperands, 3, CVT_regCR0LT, 0, CVT_Done }, |
| 2888 | // Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2 |
| 2889 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2890 | // Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2891 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2892 | // Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2 |
| 2893 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_0, 0, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2894 | // Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2895 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_0, 0, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2896 | // Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2 |
| 2897 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addTLSRegOperands, 3, CVT_Done }, |
| 2898 | // Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2 |
| 2899 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2900 | // Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2901 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2902 | // Convert__RegG8pRC1_0__Tie0_1_1__RegGxRCNoR01_1__U5Imm1_2 |
| 2903 | { CVT_95_addRegG8pRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2904 | // Convert__RegG8RC1_0__imm_95_0__DispRIX1_1__RegGxRCNoR01_2 |
| 2905 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2906 | // Convert__RegG8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2907 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2908 | // Convert__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2 |
| 2909 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2910 | // Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2911 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2912 | // Convert__RegF8RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2 |
| 2913 | { CVT_95_addRegF8RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2914 | // Convert__RegF8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2915 | { CVT_95_addRegF8RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2916 | // Convert__RegF8RC1_0__RegGxRCNoR01_1__TLSReg1_2 |
| 2917 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addTLSRegOperands, 3, CVT_Done }, |
| 2918 | // Convert__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2 |
| 2919 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2920 | // Convert__RegF4RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2 |
| 2921 | { CVT_95_addRegF4RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2922 | // Convert__RegF4RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2923 | { CVT_95_addRegF4RCOperands, 1, CVT_imm_95_0, 0, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2924 | // Convert__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2925 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2926 | // Convert__RegF4RC1_0__RegGxRCNoR01_1__TLSReg1_2 |
| 2927 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addTLSRegOperands, 3, CVT_Done }, |
| 2928 | // Convert__RegG8RC1_0__regZERO8__S16Imm1_1 |
| 2929 | { CVT_95_addRegG8RCOperands, 1, CVT_regZERO8, 0, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 2930 | // Convert__RegGPRC1_0__S16Imm1_1 |
| 2931 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 2932 | // Convert__RegGPRC1_0__regZERO__S16Imm1_1 |
| 2933 | { CVT_95_addRegGPRCOperands, 1, CVT_regZERO, 0, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 2934 | // Convert__RegG8RC1_0__regZERO8__S17Imm1_1 |
| 2935 | { CVT_95_addRegG8RCOperands, 1, CVT_regZERO8, 0, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 2936 | // Convert__RegGPRC1_0__S17Imm1_1 |
| 2937 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 2938 | // Convert__RegGPRC1_0__regZERO__S17Imm1_1 |
| 2939 | { CVT_95_addRegGPRCOperands, 1, CVT_regZERO, 0, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 2940 | // Convert__RegG8RC1_0__imm_95_0 |
| 2941 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 2942 | // Convert__RegG8pRC1_0__DispRIX161_1__RegGxRCNoR01_2 |
| 2943 | { CVT_95_addRegG8pRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2944 | // Convert__RegG8pRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2945 | { CVT_95_addRegG8pRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2946 | // Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2947 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2948 | // Convert__imm_95_1 |
| 2949 | { CVT_imm_95_1, 0, CVT_Done }, |
| 2950 | // Convert__RegSPE4RC1_0__DispRI1_1__RegGxRCNoR01_2 |
| 2951 | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2952 | // Convert__RegSPE4RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2953 | { CVT_95_addRegSPE4RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2954 | // Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2 |
| 2955 | { CVT_95_addRegVFRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2956 | // Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2957 | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2958 | // Convert__RegVSSRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2959 | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2960 | // Convert__RegVSRC1_0__DispRIX161_1__RegGxRCNoR01_2 |
| 2961 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2962 | // Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2963 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2964 | // Convert__RegVSRC1_0__U5Imm1_1 |
| 2965 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 2966 | // Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2 |
| 2967 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 2968 | // Convert__RegVSRpRC1_0__DispRIX161_1__RegGxRCNoR01_2 |
| 2969 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 2970 | // Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2 |
| 2971 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 2972 | // Convert__RegVSRpRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 2973 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 2974 | // Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3 |
| 2975 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_Done }, |
| 2976 | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3 |
| 2977 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
| 2978 | // Convert__RegCRRC1_0__RegCRRC1_1 |
| 2979 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegCRRCOperands, 2, CVT_Done }, |
| 2980 | // Convert__RegCRRC1_0 |
| 2981 | { CVT_95_addRegCRRCOperands, 1, CVT_Done }, |
| 2982 | // Convert__RegG8RC1_0__imm_95_29 |
| 2983 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_29, 0, CVT_Done }, |
| 2984 | // Convert__RegGPRC1_0__imm_95_29 |
| 2985 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_29, 0, CVT_Done }, |
| 2986 | // Convert__RegG8RC1_0__imm_95_280 |
| 2987 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_280, 0, CVT_Done }, |
| 2988 | // Convert__RegGPRC1_0__imm_95_280 |
| 2989 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_280, 0, CVT_Done }, |
| 2990 | // Convert__RegGPRC1_0__U10Imm1_1 |
| 2991 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 2992 | // Convert__RegGPRC1_0__imm_95_128 |
| 2993 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_128, 0, CVT_Done }, |
| 2994 | // Convert__RegGPRC1_0__imm_95_129 |
| 2995 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_129, 0, CVT_Done }, |
| 2996 | // Convert__RegGPRC1_0__imm_95_130 |
| 2997 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_130, 0, CVT_Done }, |
| 2998 | // Convert__RegGPRC1_0__imm_95_131 |
| 2999 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_131, 0, CVT_Done }, |
| 3000 | // Convert__RegGPRC1_0__imm_95_132 |
| 3001 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_132, 0, CVT_Done }, |
| 3002 | // Convert__RegGPRC1_0__imm_95_133 |
| 3003 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_133, 0, CVT_Done }, |
| 3004 | // Convert__RegGPRC1_0__imm_95_134 |
| 3005 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_134, 0, CVT_Done }, |
| 3006 | // Convert__RegGPRC1_0__imm_95_135 |
| 3007 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_135, 0, CVT_Done }, |
| 3008 | // Convert__RegG8RC1_0__imm_95_28 |
| 3009 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_28, 0, CVT_Done }, |
| 3010 | // Convert__RegGPRC1_0__imm_95_28 |
| 3011 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_28, 0, CVT_Done }, |
| 3012 | // Convert__RegGPRC1_0 |
| 3013 | { CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3014 | // Convert__RegG8RC1_0__imm_95_9 |
| 3015 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_9, 0, CVT_Done }, |
| 3016 | // Convert__RegGPRC1_0__imm_95_9 |
| 3017 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_9, 0, CVT_Done }, |
| 3018 | // Convert__RegG8RC1_0__imm_95_19 |
| 3019 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_19, 0, CVT_Done }, |
| 3020 | // Convert__RegGPRC1_0__imm_95_19 |
| 3021 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_19, 0, CVT_Done }, |
| 3022 | // Convert__RegGPRC1_0__imm_95_537 |
| 3023 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_537, 0, CVT_Done }, |
| 3024 | // Convert__RegGPRC1_0__imm_95_539 |
| 3025 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_539, 0, CVT_Done }, |
| 3026 | // Convert__RegGPRC1_0__imm_95_541 |
| 3027 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_541, 0, CVT_Done }, |
| 3028 | // Convert__RegGPRC1_0__imm_95_543 |
| 3029 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_543, 0, CVT_Done }, |
| 3030 | // Convert__RegGPRC1_0__imm_95_536 |
| 3031 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_536, 0, CVT_Done }, |
| 3032 | // Convert__RegGPRC1_0__imm_95_538 |
| 3033 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_538, 0, CVT_Done }, |
| 3034 | // Convert__RegGPRC1_0__imm_95_540 |
| 3035 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_540, 0, CVT_Done }, |
| 3036 | // Convert__RegGPRC1_0__imm_95_542 |
| 3037 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_542, 0, CVT_Done }, |
| 3038 | // Convert__RegGPRC1_0__imm_95_1018 |
| 3039 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_1018, 0, CVT_Done }, |
| 3040 | // Convert__RegGPRC1_0__Imm1_1 |
| 3041 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3042 | // Convert__RegGPRC1_0__imm_95_981 |
| 3043 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_981, 0, CVT_Done }, |
| 3044 | // Convert__RegG8RC1_0__imm_95_22 |
| 3045 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_22, 0, CVT_Done }, |
| 3046 | // Convert__RegGPRC1_0__imm_95_22 |
| 3047 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_22, 0, CVT_Done }, |
| 3048 | // Convert__RegG8RC1_0__imm_95_17 |
| 3049 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_17, 0, CVT_Done }, |
| 3050 | // Convert__RegGPRC1_0__imm_95_17 |
| 3051 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_17, 0, CVT_Done }, |
| 3052 | // Convert__RegG8RC1_0__imm_95_18 |
| 3053 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_18, 0, CVT_Done }, |
| 3054 | // Convert__RegGPRC1_0__imm_95_18 |
| 3055 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_18, 0, CVT_Done }, |
| 3056 | // Convert__RegGPRC1_0__imm_95_980 |
| 3057 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_980, 0, CVT_Done }, |
| 3058 | // Convert__RegG8RC1_0__RegF8RC1_1 |
| 3059 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
| 3060 | // Convert__RegGPRC1_0__RegF8RC1_1 |
| 3061 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
| 3062 | // Convert__RegF8RC1_0 |
| 3063 | { CVT_95_addRegF8RCOperands, 1, CVT_Done }, |
| 3064 | // Convert__RegF8RC1_1 |
| 3065 | { CVT_95_addRegF8RCOperands, 2, CVT_Done }, |
| 3066 | // Convert__RegF8RC1_0__U3Imm1_1 |
| 3067 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3068 | // Convert__RegF8RC1_0__U2Imm1_1 |
| 3069 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3070 | // Convert__RegGPRC1_0__imm_95_529 |
| 3071 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_529, 0, CVT_Done }, |
| 3072 | // Convert__RegGPRC1_0__imm_95_531 |
| 3073 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_531, 0, CVT_Done }, |
| 3074 | // Convert__RegGPRC1_0__imm_95_533 |
| 3075 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_533, 0, CVT_Done }, |
| 3076 | // Convert__RegGPRC1_0__imm_95_535 |
| 3077 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_535, 0, CVT_Done }, |
| 3078 | // Convert__RegGPRC1_0__imm_95_528 |
| 3079 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_528, 0, CVT_Done }, |
| 3080 | // Convert__RegGPRC1_0__imm_95_530 |
| 3081 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_530, 0, CVT_Done }, |
| 3082 | // Convert__RegGPRC1_0__imm_95_532 |
| 3083 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_532, 0, CVT_Done }, |
| 3084 | // Convert__RegGPRC1_0__imm_95_534 |
| 3085 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_534, 0, CVT_Done }, |
| 3086 | // Convert__RegGPRC1_0__imm_95_1019 |
| 3087 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_1019, 0, CVT_Done }, |
| 3088 | // Convert__RegG8RC1_0__imm_95_8 |
| 3089 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_8, 0, CVT_Done }, |
| 3090 | // Convert__RegGPRC1_0__imm_95_8 |
| 3091 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_8, 0, CVT_Done }, |
| 3092 | // Convert__RegGPRC1_0__CRBitMask1_1 |
| 3093 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addCRBitMaskOperands, 2, CVT_Done }, |
| 3094 | // Convert__RegGPRC1_0__imm_95_48 |
| 3095 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_48, 0, CVT_Done }, |
| 3096 | // Convert__RegGPRC1_0__imm_95_896 |
| 3097 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_896, 0, CVT_Done }, |
| 3098 | // Convert__RegG8RC1_0__imm_95_287 |
| 3099 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_287, 0, CVT_Done }, |
| 3100 | // Convert__RegGPRC1_0__imm_95_287 |
| 3101 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_287, 0, CVT_Done }, |
| 3102 | // Convert__RegG8RC1_0__imm_95_5 |
| 3103 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_5, 0, CVT_Done }, |
| 3104 | // Convert__RegGPRC1_0__imm_95_5 |
| 3105 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_5, 0, CVT_Done }, |
| 3106 | // Convert__RegG8RC1_0__imm_95_4 |
| 3107 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_4, 0, CVT_Done }, |
| 3108 | // Convert__RegGPRC1_0__imm_95_4 |
| 3109 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_4, 0, CVT_Done }, |
| 3110 | // Convert__RegG8RC1_0__imm_95_25 |
| 3111 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_25, 0, CVT_Done }, |
| 3112 | // Convert__RegGPRC1_0__imm_95_25 |
| 3113 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_25, 0, CVT_Done }, |
| 3114 | // Convert__RegG8RC1_0__imm_95_512 |
| 3115 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_512, 0, CVT_Done }, |
| 3116 | // Convert__RegGPRC1_0__imm_95_512 |
| 3117 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_512, 0, CVT_Done }, |
| 3118 | // Convert__RegG8RC1_0__imm_95_272 |
| 3119 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_272, 0, CVT_Done }, |
| 3120 | // Convert__RegG8RC1_0__imm_95_273 |
| 3121 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_273, 0, CVT_Done }, |
| 3122 | // Convert__RegG8RC1_0__imm_95_274 |
| 3123 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_274, 0, CVT_Done }, |
| 3124 | // Convert__RegG8RC1_0__imm_95_275 |
| 3125 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_275, 0, CVT_Done }, |
| 3126 | // Convert__RegGPRC1_0__imm_95_272 |
| 3127 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_272, 0, CVT_Done }, |
| 3128 | // Convert__RegGPRC1_0__imm_95_273 |
| 3129 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_273, 0, CVT_Done }, |
| 3130 | // Convert__RegGPRC1_0__imm_95_274 |
| 3131 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_274, 0, CVT_Done }, |
| 3132 | // Convert__RegGPRC1_0__imm_95_275 |
| 3133 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_275, 0, CVT_Done }, |
| 3134 | // Convert__RegGPRC1_0__imm_95_260 |
| 3135 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_260, 0, CVT_Done }, |
| 3136 | // Convert__RegGPRC1_0__imm_95_261 |
| 3137 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_261, 0, CVT_Done }, |
| 3138 | // Convert__RegGPRC1_0__imm_95_262 |
| 3139 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_262, 0, CVT_Done }, |
| 3140 | // Convert__RegGPRC1_0__imm_95_263 |
| 3141 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_263, 0, CVT_Done }, |
| 3142 | // Convert__RegGPRC1_0__U4Imm1_1 |
| 3143 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3144 | // Convert__RegG8RC1_0__imm_95_26 |
| 3145 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_26, 0, CVT_Done }, |
| 3146 | // Convert__RegGPRC1_0__imm_95_26 |
| 3147 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_26, 0, CVT_Done }, |
| 3148 | // Convert__RegG8RC1_0__imm_95_27 |
| 3149 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_27, 0, CVT_Done }, |
| 3150 | // Convert__RegGPRC1_0__imm_95_27 |
| 3151 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_27, 0, CVT_Done }, |
| 3152 | // Convert__RegGPRC1_0__imm_95_990 |
| 3153 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_990, 0, CVT_Done }, |
| 3154 | // Convert__RegGPRC1_0__imm_95_991 |
| 3155 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_991, 0, CVT_Done }, |
| 3156 | // Convert__RegGPRC1_0__imm_95_268 |
| 3157 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_268, 0, CVT_Done }, |
| 3158 | // Convert__RegGPRC1_0__imm_95_988 |
| 3159 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_988, 0, CVT_Done }, |
| 3160 | // Convert__RegGPRC1_0__imm_95_989 |
| 3161 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_989, 0, CVT_Done }, |
| 3162 | // Convert__RegGPRC1_0__imm_95_269 |
| 3163 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_269, 0, CVT_Done }, |
| 3164 | // Convert__RegGPRC1_0__imm_95_986 |
| 3165 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_986, 0, CVT_Done }, |
| 3166 | // Convert__RegG8RC1_0__imm_95_13 |
| 3167 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_13, 0, CVT_Done }, |
| 3168 | // Convert__RegGPRC1_0__imm_95_13 |
| 3169 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_13, 0, CVT_Done }, |
| 3170 | // Convert__RegG8RC1_0__imm_95_3 |
| 3171 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_3, 0, CVT_Done }, |
| 3172 | // Convert__RegGPRC1_0__imm_95_3 |
| 3173 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_3, 0, CVT_Done }, |
| 3174 | // Convert__RegG8RC1_0__RegVRRC1_1 |
| 3175 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 3176 | // Convert__RegGPRC1_0__RegVRRC1_1 |
| 3177 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 3178 | // Convert__RegVRRC1_0 |
| 3179 | { CVT_95_addRegVRRCOperands, 1, CVT_Done }, |
| 3180 | // Convert__RegG8RC1_0__RegVSFRC1_1 |
| 3181 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
| 3182 | // Convert__RegG8RC1_0__RegVSRC1_1 |
| 3183 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
| 3184 | // Convert__RegGPRC1_0__RegVSFRC1_1 |
| 3185 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
| 3186 | // Convert__RegG8RC1_0__imm_95_1 |
| 3187 | { CVT_95_addRegG8RCOperands, 1, CVT_imm_95_1, 0, CVT_Done }, |
| 3188 | // Convert__RegGPRC1_0__imm_95_1 |
| 3189 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_1, 0, CVT_Done }, |
| 3190 | // Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_1 |
| 3191 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3192 | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_1 |
| 3193 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3194 | // Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_2 |
| 3195 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 3196 | // Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_2 |
| 3197 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 3198 | // Convert__imm_95_29__RegG8RC1_0 |
| 3199 | { CVT_imm_95_29, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3200 | // Convert__imm_95_29__RegGPRC1_0 |
| 3201 | { CVT_imm_95_29, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3202 | // Convert__imm_95_280__RegG8RC1_0 |
| 3203 | { CVT_imm_95_280, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3204 | // Convert__imm_95_280__RegGPRC1_0 |
| 3205 | { CVT_imm_95_280, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3206 | // Convert__imm_95_28__RegG8RC1_0 |
| 3207 | { CVT_imm_95_28, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3208 | // Convert__imm_95_28__RegGPRC1_0 |
| 3209 | { CVT_imm_95_28, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3210 | // Convert__imm_95_255__RegG8RC1_0 |
| 3211 | { CVT_imm_95_255, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3212 | // Convert__imm_95_255__RegGPRC1_0 |
| 3213 | { CVT_imm_95_255, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3214 | // Convert__Imm1_0__RegGPRC1_1 |
| 3215 | { CVT_95_addImmOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3216 | // Convert__imm_95_9__RegG8RC1_0 |
| 3217 | { CVT_imm_95_9, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3218 | // Convert__imm_95_9__RegGPRC1_0 |
| 3219 | { CVT_imm_95_9, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3220 | // Convert__imm_95_19__RegG8RC1_0 |
| 3221 | { CVT_imm_95_19, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3222 | // Convert__imm_95_19__RegGPRC1_0 |
| 3223 | { CVT_imm_95_19, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3224 | // Convert__imm_95_537__RegGPRC1_1 |
| 3225 | { CVT_imm_95_537, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3226 | // Convert__imm_95_539__RegGPRC1_1 |
| 3227 | { CVT_imm_95_539, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3228 | // Convert__imm_95_541__RegGPRC1_1 |
| 3229 | { CVT_imm_95_541, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3230 | // Convert__imm_95_543__RegGPRC1_1 |
| 3231 | { CVT_imm_95_543, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3232 | // Convert__imm_95_536__RegGPRC1_1 |
| 3233 | { CVT_imm_95_536, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3234 | // Convert__imm_95_538__RegGPRC1_1 |
| 3235 | { CVT_imm_95_538, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3236 | // Convert__imm_95_540__RegGPRC1_1 |
| 3237 | { CVT_imm_95_540, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3238 | // Convert__imm_95_542__RegGPRC1_1 |
| 3239 | { CVT_imm_95_542, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3240 | // Convert__imm_95_1018__RegGPRC1_0 |
| 3241 | { CVT_imm_95_1018, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3242 | // Convert__RegGPRC1_1__Imm1_0 |
| 3243 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, |
| 3244 | // Convert__imm_95_981__RegGPRC1_0 |
| 3245 | { CVT_imm_95_981, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3246 | // Convert__imm_95_22__RegG8RC1_0 |
| 3247 | { CVT_imm_95_22, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3248 | // Convert__imm_95_22__RegGPRC1_0 |
| 3249 | { CVT_imm_95_22, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3250 | // Convert__imm_95_17__RegG8RC1_0 |
| 3251 | { CVT_imm_95_17, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3252 | // Convert__imm_95_17__RegGPRC1_0 |
| 3253 | { CVT_imm_95_17, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3254 | // Convert__imm_95_18__RegG8RC1_0 |
| 3255 | { CVT_imm_95_18, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3256 | // Convert__imm_95_18__RegGPRC1_0 |
| 3257 | { CVT_imm_95_18, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3258 | // Convert__imm_95_980__RegGPRC1_0 |
| 3259 | { CVT_imm_95_980, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3260 | // Convert__RegF8RC1_0__RegG8RC1_1 |
| 3261 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3262 | // Convert__RegF8RC1_0__RegGPRC1_1 |
| 3263 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3264 | // Convert__Imm1_0__RegF8RC1_1__imm_95_0__imm_95_0 |
| 3265 | { CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3266 | // Convert__Imm1_1__RegF8RC1_2__imm_95_0__imm_95_0 |
| 3267 | { CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3268 | // Convert__Imm1_0__RegF8RC1_1__U1Imm1_2__Imm1_3 |
| 3269 | { CVT_95_addImmOperands, 1, CVT_95_addRegF8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3270 | // Convert__Imm1_1__RegF8RC1_2__U1Imm1_3__Imm1_4 |
| 3271 | { CVT_95_addImmOperands, 2, CVT_95_addRegF8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3272 | // Convert__U3Imm1_0__U4Imm1_1__imm_95_0 |
| 3273 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
| 3274 | // Convert__U3Imm1_1__U4Imm1_2__imm_95_0 |
| 3275 | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
| 3276 | // Convert__U3Imm1_0__U4Imm1_1__Imm1_2 |
| 3277 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3278 | // Convert__U3Imm1_1__U4Imm1_2__U1Imm1_3 |
| 3279 | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3280 | // Convert__imm_95_529__RegGPRC1_1 |
| 3281 | { CVT_imm_95_529, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3282 | // Convert__imm_95_531__RegGPRC1_1 |
| 3283 | { CVT_imm_95_531, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3284 | // Convert__imm_95_533__RegGPRC1_1 |
| 3285 | { CVT_imm_95_533, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3286 | // Convert__imm_95_535__RegGPRC1_1 |
| 3287 | { CVT_imm_95_535, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3288 | // Convert__imm_95_528__RegGPRC1_1 |
| 3289 | { CVT_imm_95_528, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3290 | // Convert__imm_95_530__RegGPRC1_1 |
| 3291 | { CVT_imm_95_530, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3292 | // Convert__imm_95_532__RegGPRC1_1 |
| 3293 | { CVT_imm_95_532, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3294 | // Convert__imm_95_534__RegGPRC1_1 |
| 3295 | { CVT_imm_95_534, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3296 | // Convert__imm_95_1019__RegGPRC1_0 |
| 3297 | { CVT_imm_95_1019, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3298 | // Convert__imm_95_8__RegG8RC1_0 |
| 3299 | { CVT_imm_95_8, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3300 | // Convert__imm_95_8__RegGPRC1_0 |
| 3301 | { CVT_imm_95_8, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3302 | // Convert__RegGPRC1_0__imm_95_0 |
| 3303 | { CVT_95_addRegGPRCOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 3304 | // Convert__RegGPRC1_0__U1Imm1_1 |
| 3305 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3306 | // Convert__CRBitMask1_0__RegGPRC1_1 |
| 3307 | { CVT_95_addCRBitMaskOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3308 | // Convert__imm_95_48__RegGPRC1_0 |
| 3309 | { CVT_imm_95_48, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3310 | // Convert__imm_95_896__RegGPRC1_0 |
| 3311 | { CVT_imm_95_896, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3312 | // Convert__imm_95_25__RegG8RC1_0 |
| 3313 | { CVT_imm_95_25, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3314 | // Convert__imm_95_25__RegGPRC1_0 |
| 3315 | { CVT_imm_95_25, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3316 | // Convert__imm_95_512__RegG8RC1_0 |
| 3317 | { CVT_imm_95_512, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3318 | // Convert__imm_95_512__RegGPRC1_0 |
| 3319 | { CVT_imm_95_512, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3320 | // Convert__RegGPRC1_1 |
| 3321 | { CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3322 | // Convert__imm_95_272__RegG8RC1_1 |
| 3323 | { CVT_imm_95_272, 0, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3324 | // Convert__imm_95_272__RegGPRC1_1 |
| 3325 | { CVT_imm_95_272, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3326 | // Convert__imm_95_273__RegG8RC1_1 |
| 3327 | { CVT_imm_95_273, 0, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3328 | // Convert__imm_95_273__RegGPRC1_1 |
| 3329 | { CVT_imm_95_273, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3330 | // Convert__imm_95_274__RegG8RC1_1 |
| 3331 | { CVT_imm_95_274, 0, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3332 | // Convert__imm_95_274__RegGPRC1_1 |
| 3333 | { CVT_imm_95_274, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3334 | // Convert__imm_95_275__RegG8RC1_1 |
| 3335 | { CVT_imm_95_275, 0, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3336 | // Convert__imm_95_275__RegGPRC1_1 |
| 3337 | { CVT_imm_95_275, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3338 | // Convert__imm_95_260__RegGPRC1_1 |
| 3339 | { CVT_imm_95_260, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3340 | // Convert__imm_95_261__RegGPRC1_1 |
| 3341 | { CVT_imm_95_261, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3342 | // Convert__imm_95_262__RegGPRC1_1 |
| 3343 | { CVT_imm_95_262, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3344 | // Convert__imm_95_263__RegGPRC1_1 |
| 3345 | { CVT_imm_95_263, 0, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3346 | // Convert__imm_95_272__RegG8RC1_0 |
| 3347 | { CVT_imm_95_272, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3348 | // Convert__imm_95_272__RegGPRC1_0 |
| 3349 | { CVT_imm_95_272, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3350 | // Convert__imm_95_273__RegG8RC1_0 |
| 3351 | { CVT_imm_95_273, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3352 | // Convert__imm_95_273__RegGPRC1_0 |
| 3353 | { CVT_imm_95_273, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3354 | // Convert__imm_95_274__RegG8RC1_0 |
| 3355 | { CVT_imm_95_274, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3356 | // Convert__imm_95_274__RegGPRC1_0 |
| 3357 | { CVT_imm_95_274, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3358 | // Convert__imm_95_275__RegG8RC1_0 |
| 3359 | { CVT_imm_95_275, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3360 | // Convert__imm_95_275__RegGPRC1_0 |
| 3361 | { CVT_imm_95_275, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3362 | // Convert__imm_95_260__RegGPRC1_0 |
| 3363 | { CVT_imm_95_260, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3364 | // Convert__imm_95_261__RegGPRC1_0 |
| 3365 | { CVT_imm_95_261, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3366 | // Convert__imm_95_262__RegGPRC1_0 |
| 3367 | { CVT_imm_95_262, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3368 | // Convert__imm_95_263__RegGPRC1_0 |
| 3369 | { CVT_imm_95_263, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3370 | // Convert__RegGPRC1_1__U4Imm1_0 |
| 3371 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, |
| 3372 | // Convert__imm_95_26__RegG8RC1_0 |
| 3373 | { CVT_imm_95_26, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3374 | // Convert__imm_95_26__RegGPRC1_0 |
| 3375 | { CVT_imm_95_26, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3376 | // Convert__imm_95_27__RegG8RC1_0 |
| 3377 | { CVT_imm_95_27, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3378 | // Convert__imm_95_27__RegGPRC1_0 |
| 3379 | { CVT_imm_95_27, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3380 | // Convert__imm_95_990__RegGPRC1_0 |
| 3381 | { CVT_imm_95_990, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3382 | // Convert__imm_95_991__RegGPRC1_0 |
| 3383 | { CVT_imm_95_991, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3384 | // Convert__imm_95_988__RegGPRC1_0 |
| 3385 | { CVT_imm_95_988, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3386 | // Convert__imm_95_284__RegG8RC1_0 |
| 3387 | { CVT_imm_95_284, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3388 | // Convert__imm_95_284__RegGPRC1_0 |
| 3389 | { CVT_imm_95_284, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3390 | // Convert__imm_95_989__RegGPRC1_0 |
| 3391 | { CVT_imm_95_989, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3392 | // Convert__imm_95_285__RegG8RC1_0 |
| 3393 | { CVT_imm_95_285, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3394 | // Convert__imm_95_285__RegGPRC1_0 |
| 3395 | { CVT_imm_95_285, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3396 | // Convert__imm_95_986__RegGPRC1_0 |
| 3397 | { CVT_imm_95_986, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3398 | // Convert__imm_95_13__RegG8RC1_0 |
| 3399 | { CVT_imm_95_13, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3400 | // Convert__imm_95_13__RegGPRC1_0 |
| 3401 | { CVT_imm_95_13, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3402 | // Convert__imm_95_3__RegG8RC1_0 |
| 3403 | { CVT_imm_95_3, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3404 | // Convert__imm_95_3__RegGPRC1_0 |
| 3405 | { CVT_imm_95_3, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3406 | // Convert__RegVRRC1_0__RegG8RC1_1 |
| 3407 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3408 | // Convert__RegVRRC1_0__RegGPRC1_1 |
| 3409 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3410 | // Convert__RegVRRC1_0__U16Imm1_1 |
| 3411 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addU16ImmOperands, 2, CVT_Done }, |
| 3412 | // Convert__RegVSFRC1_0__RegG8RC1_1 |
| 3413 | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3414 | // Convert__RegVSRC1_0__RegG8RCNoX01_1__RegG8RC1_2 |
| 3415 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 3416 | // Convert__RegVSFRC1_0__RegGPRC1_1 |
| 3417 | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3418 | // Convert__RegVSRC1_0__RegGPRC1_1 |
| 3419 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3420 | // Convert__imm_95_1__RegG8RC1_0 |
| 3421 | { CVT_imm_95_1, 0, CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3422 | // Convert__imm_95_1__RegGPRC1_0 |
| 3423 | { CVT_imm_95_1, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3424 | // Convert__regR0__regR0__imm_95_0 |
| 3425 | { CVT_regR0, 0, CVT_regR0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3426 | // Convert__regX0__regX0__imm_95_0 |
| 3427 | { CVT_regX0, 0, CVT_regX0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3428 | // Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2 |
| 3429 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addU16ImmOperands, 3, CVT_Done }, |
| 3430 | // Convert__RegG8RC1_0__RegG8RCNoX01_1__S34Imm1_2 |
| 3431 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3432 | // Convert__RegGPRC1_0__ImmZero1_1__S34Imm1_2 |
| 3433 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3434 | // Convert__RegGPRC1_0__RegGPRCNoR01_1__S34Imm1_2 |
| 3435 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3436 | // Convert__RegGPRC1_0__ImmZero1_1__S32Imm1_2 |
| 3437 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3438 | // Convert__RegGPRC1_0__RegGPRCNoR01_1__S32Imm1_2 |
| 3439 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3440 | // Convert__RegGPRC1_1__RegGPRC1_2__imm_95_1 |
| 3441 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_imm_95_1, 0, CVT_Done }, |
| 3442 | // Convert__RegGPRC1_1__RegGPRC1_2__U1Imm1_3 |
| 3443 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3444 | // Convert__imm_95_2__imm_95_0 |
| 3445 | { CVT_imm_95_2, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3446 | // Convert__imm_95_4__imm_95_0 |
| 3447 | { CVT_imm_95_4, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3448 | // Convert__RegG8RC1_0__S34Imm1_1 |
| 3449 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3450 | // Convert__RegGPRC1_0__S34Imm1_1 |
| 3451 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3452 | // Convert__RegG8RC1_0__RegG8RCNoX01_2__S34Imm1_1 |
| 3453 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCNoX0Operands, 3, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3454 | // Convert__RegGPRC1_0__RegGPRCNoR01_2__S34Imm1_1 |
| 3455 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCNoR0Operands, 3, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3456 | // Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2 |
| 3457 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3458 | // Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2 |
| 3459 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3460 | // Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2 |
| 3461 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3462 | // Convert__RegG8RC1_0__DispRI341_1__ImmZero1_2 |
| 3463 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3464 | // Convert__RegF8RC1_0__S34Imm1_1 |
| 3465 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3466 | // Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2 |
| 3467 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3468 | // Convert__RegF8RC1_0__DispRI341_1__ImmZero1_2 |
| 3469 | { CVT_95_addRegF8RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3470 | // Convert__RegF4RC1_0__S34Imm1_1 |
| 3471 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3472 | // Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2 |
| 3473 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3474 | // Convert__RegF4RC1_0__DispRI341_1__ImmZero1_2 |
| 3475 | { CVT_95_addRegF4RCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3476 | // Convert__imm_95_5__imm_95_0 |
| 3477 | { CVT_imm_95_5, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3478 | // Convert__RegVFRC1_0__S34Imm1_1 |
| 3479 | { CVT_95_addRegVFRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3480 | // Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2 |
| 3481 | { CVT_95_addRegVFRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3482 | // Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2 |
| 3483 | { CVT_95_addRegVFRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3484 | // Convert__RegVSRC1_0__S34Imm1_1 |
| 3485 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3486 | // Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2 |
| 3487 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3488 | // Convert__RegVSRC1_0__DispRI341_1__ImmZero1_2 |
| 3489 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3490 | // Convert__RegVSRpRC1_0__S34Imm1_1 |
| 3491 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3492 | // Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2 |
| 3493 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3494 | // Convert__RegVSRpRC1_0__DispRI341_1__ImmZero1_2 |
| 3495 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3496 | // Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5 |
| 3497 | { CVT_95_addRegDMRRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3498 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5 |
| 3499 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3500 | // Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U4Imm1_5 |
| 3501 | { CVT_95_addRegDMRRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3502 | // Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U4Imm1_5 |
| 3503 | { CVT_95_addRegDMRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3504 | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5 |
| 3505 | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3506 | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5 |
| 3507 | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3508 | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4 |
| 3509 | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3510 | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4 |
| 3511 | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3512 | // Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4 |
| 3513 | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRpEvenRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3514 | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4 |
| 3515 | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRpEvenRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3516 | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5 |
| 3517 | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3518 | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5 |
| 3519 | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3520 | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5 |
| 3521 | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3522 | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5 |
| 3523 | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3524 | // Convert__imm_95_2 |
| 3525 | { CVT_imm_95_2, 0, CVT_Done }, |
| 3526 | // Convert__RegG8RC1_0 |
| 3527 | { CVT_95_addRegG8RCOperands, 1, CVT_Done }, |
| 3528 | // Convert__U1Imm1_0 |
| 3529 | { CVT_95_addImmOperands, 1, CVT_Done }, |
| 3530 | // Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__U6Imm1_3 |
| 3531 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3532 | // Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__U6Imm1_4 |
| 3533 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3534 | // Convert__RegG8RC1_0__Tie0_1_1__RegG8RC1_1__U6Imm1_2__U6Imm1_3 |
| 3535 | { CVT_95_addRegG8RCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3536 | // Convert__RegG8RC1_1__Tie0_1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4 |
| 3537 | { CVT_95_addRegG8RCOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3538 | // Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3 |
| 3539 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3540 | // Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4 |
| 3541 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3542 | // Convert__RegGPRC1_0__Tie0_1_1__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4 |
| 3543 | { CVT_95_addRegGPRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3544 | // Convert__RegGPRC1_1__Tie0_1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5 |
| 3545 | { CVT_95_addRegGPRCOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3546 | // Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4 |
| 3547 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3548 | // Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5 |
| 3549 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3550 | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4 |
| 3551 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3552 | // Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__U5Imm1_4__U5Imm1_5 |
| 3553 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3554 | // Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__imm_95_0 |
| 3555 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
| 3556 | // Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__imm_95_0 |
| 3557 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_imm_95_0, 0, CVT_Done }, |
| 3558 | // Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__imm_95_0 |
| 3559 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
| 3560 | // Convert__RegG8RC1_0__RegGPRC1_1__U6Imm1_2__imm_95_0 |
| 3561 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
| 3562 | // Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__imm_95_0 |
| 3563 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done }, |
| 3564 | // Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__imm_95_0__imm_95_31 |
| 3565 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
| 3566 | // Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__imm_95_0__imm_95_31 |
| 3567 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
| 3568 | // Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3__imm_95_0__imm_95_31 |
| 3569 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
| 3570 | // Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__imm_95_0__imm_95_31 |
| 3571 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
| 3572 | // Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__imm_95_0__imm_95_31 |
| 3573 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
| 3574 | // Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__imm_95_0__imm_95_31 |
| 3575 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
| 3576 | // Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__imm_95_0__imm_95_31 |
| 3577 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
| 3578 | // Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__imm_95_0__imm_95_31 |
| 3579 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, |
| 3580 | // Convert__Imm1_0 |
| 3581 | { CVT_95_addImmOperands, 1, CVT_Done }, |
| 3582 | // Convert__RegGPRC1_0__RegCRRC1_1 |
| 3583 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegCRRCOperands, 2, CVT_Done }, |
| 3584 | // Convert__RegGPRC1_0__RegCRBITRC1_1 |
| 3585 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegCRBITRCOperands, 2, CVT_Done }, |
| 3586 | // Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2 |
| 3587 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 3588 | // Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3 |
| 3589 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
| 3590 | // Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3 |
| 3591 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_95_addRegGxRCOperands, 4, CVT_Done }, |
| 3592 | // Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2 |
| 3593 | { CVT_imm_95_0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3594 | // Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 3595 | { CVT_imm_95_0, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 3596 | // Convert__imm_95_0__imm_95_2 |
| 3597 | { CVT_imm_95_0, 0, CVT_imm_95_2, 0, CVT_Done }, |
| 3598 | // Convert__RegG8RC1_0__RegGxRCNoR01_1__U5Imm1_2 |
| 3599 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3600 | // Convert__RegG8RC1_1__RegGxRCNoR01_2__RegGxRC1_3 |
| 3601 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_95_addRegGxRCOperands, 4, CVT_Done }, |
| 3602 | // Convert__imm_95_0__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2 |
| 3603 | { CVT_imm_95_0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3604 | // Convert__imm_95_0__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 3605 | { CVT_imm_95_0, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 3606 | // Convert__imm_95_0__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2 |
| 3607 | { CVT_imm_95_0, 0, CVT_95_addRegF8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3608 | // Convert__imm_95_0__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 3609 | { CVT_imm_95_0, 0, CVT_95_addRegF8RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 3610 | // Convert__imm_95_0__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2 |
| 3611 | { CVT_imm_95_0, 0, CVT_95_addRegF4RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3612 | // Convert__imm_95_0__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2 |
| 3613 | { CVT_imm_95_0, 0, CVT_95_addRegF4RCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addRegGxRCOperands, 3, CVT_Done }, |
| 3614 | // Convert__imm_95_1__imm_95_1 |
| 3615 | { CVT_imm_95_1, 0, CVT_imm_95_1, 0, CVT_Done }, |
| 3616 | // Convert__RegG8pRC1_0__DispRIX1_1__RegGxRCNoR01_2 |
| 3617 | { CVT_95_addRegG8pRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_Done }, |
| 3618 | // Convert__RegG8pRC1_1__RegGxRCNoR01_2__RegGxRC1_3 |
| 3619 | { CVT_95_addRegG8pRCOperands, 2, CVT_95_addRegGxRCNoR0Operands, 3, CVT_95_addRegGxRCOperands, 4, CVT_Done }, |
| 3620 | // Convert__imm_95_0__imm_95_3 |
| 3621 | { CVT_imm_95_0, 0, CVT_imm_95_3, 0, CVT_Done }, |
| 3622 | // Convert__RegGPRC1_0__RegGxRCNoR01_1__U5Imm1_2 |
| 3623 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGxRCNoR0Operands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3624 | // Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_1 |
| 3625 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3626 | // Convert__RegGPRC1_0__RegGPRC1_2__RegGPRC1_1 |
| 3627 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3628 | // Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_2 |
| 3629 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 4, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 3630 | // Convert__RegGPRC1_1__RegGPRC1_3__RegGPRC1_2 |
| 3631 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 4, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 3632 | // Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_3__U1Imm1_1 |
| 3633 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 3, CVT_95_addRegG8RCOperands, 4, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3634 | // Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_4__U1Imm1_2 |
| 3635 | { CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 4, CVT_95_addRegG8RCOperands, 5, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3636 | // Convert__RegG8RC1_0__S16Imm1_1 |
| 3637 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3638 | // Convert__U2Imm1_0 |
| 3639 | { CVT_95_addImmOperands, 1, CVT_Done }, |
| 3640 | // Convert__U3Imm1_0__imm_95_0 |
| 3641 | { CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done }, |
| 3642 | // Convert__U3Imm1_0__U2Imm1_1 |
| 3643 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3644 | // Convert__U5Imm1_1__RegGPRC1_2__RegGPRC1_3 |
| 3645 | { CVT_95_addImmOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
| 3646 | // Convert__U5Imm1_1__RegGPRC1_2__U5Imm1_3 |
| 3647 | { CVT_95_addImmOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3648 | // Convert__U1Imm1_1 |
| 3649 | { CVT_95_addImmOperands, 2, CVT_Done }, |
| 3650 | // Convert__U5Imm1_0__RegG8RC1_1__RegG8RC1_2 |
| 3651 | { CVT_95_addImmOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 3652 | // Convert__imm_95_4__RegG8RC1_0__RegG8RC1_1 |
| 3653 | { CVT_imm_95_4, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3654 | // Convert__imm_95_4__RegG8RC1_0__S16Imm1_1 |
| 3655 | { CVT_imm_95_4, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3656 | // Convert__imm_95_12__RegG8RC1_0__RegG8RC1_1 |
| 3657 | { CVT_imm_95_12, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3658 | // Convert__imm_95_12__RegG8RC1_0__S16Imm1_1 |
| 3659 | { CVT_imm_95_12, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3660 | // Convert__imm_95_8__RegG8RC1_0__RegG8RC1_1 |
| 3661 | { CVT_imm_95_8, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3662 | // Convert__imm_95_8__RegG8RC1_0__S16Imm1_1 |
| 3663 | { CVT_imm_95_8, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3664 | // Convert__U5Imm1_0__RegG8RC1_1__S16Imm1_2 |
| 3665 | { CVT_95_addImmOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
| 3666 | // Convert__imm_95_20__RegG8RC1_0__RegG8RC1_1 |
| 3667 | { CVT_imm_95_20, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3668 | // Convert__imm_95_20__RegG8RC1_0__S16Imm1_1 |
| 3669 | { CVT_imm_95_20, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3670 | // Convert__imm_95_5__RegG8RC1_0__RegG8RC1_1 |
| 3671 | { CVT_imm_95_5, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3672 | // Convert__imm_95_5__RegG8RC1_0__S16Imm1_1 |
| 3673 | { CVT_imm_95_5, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3674 | // Convert__imm_95_1__RegG8RC1_0__RegG8RC1_1 |
| 3675 | { CVT_imm_95_1, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3676 | // Convert__imm_95_1__RegG8RC1_0__S16Imm1_1 |
| 3677 | { CVT_imm_95_1, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3678 | // Convert__imm_95_6__RegG8RC1_0__RegG8RC1_1 |
| 3679 | { CVT_imm_95_6, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3680 | // Convert__imm_95_6__RegG8RC1_0__S16Imm1_1 |
| 3681 | { CVT_imm_95_6, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3682 | // Convert__imm_95_2__RegG8RC1_0__RegG8RC1_1 |
| 3683 | { CVT_imm_95_2, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3684 | // Convert__imm_95_2__RegG8RC1_0__S16Imm1_1 |
| 3685 | { CVT_imm_95_2, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3686 | // Convert__imm_95_16__RegG8RC1_0__RegG8RC1_1 |
| 3687 | { CVT_imm_95_16, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3688 | // Convert__imm_95_16__RegG8RC1_0__S16Imm1_1 |
| 3689 | { CVT_imm_95_16, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3690 | // Convert__imm_95_24__RegG8RC1_0__RegG8RC1_1 |
| 3691 | { CVT_imm_95_24, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3692 | // Convert__imm_95_24__RegG8RC1_0__S16Imm1_1 |
| 3693 | { CVT_imm_95_24, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3694 | // Convert__imm_95_31__RegG8RC1_0__RegG8RC1_1 |
| 3695 | { CVT_imm_95_31, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3696 | // Convert__imm_95_31__RegG8RC1_0__S16Imm1_1 |
| 3697 | { CVT_imm_95_31, 0, CVT_95_addRegG8RCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3698 | // Convert__regR0__RegGPRC1_0 |
| 3699 | { CVT_regR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3700 | // Convert__regR0__RegGPRC1_0__imm_95_0__imm_95_0__imm_95_0 |
| 3701 | { CVT_regR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3702 | // Convert__RegGPRC1_1__RegGPRC1_0 |
| 3703 | { CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3704 | // Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0__imm_95_0__imm_95_0 |
| 3705 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3706 | // Convert__RegGPRC1_0__RegGPRC1_1__U2Imm1_2__U1Imm1_3__U1Imm1_4 |
| 3707 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3708 | // Convert__RegG8RC1_0__RegG8RC1_1__U2Imm1_2 |
| 3709 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3710 | // Convert__U2Imm1_0__RegGPRC1_1__RegGPRC1_2 |
| 3711 | { CVT_95_addImmOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 3712 | // Convert__imm_95_0__regR0__regR0 |
| 3713 | { CVT_imm_95_0, 0, CVT_regR0, 0, CVT_regR0, 0, CVT_Done }, |
| 3714 | // Convert__imm_95_1__regR0__regR0 |
| 3715 | { CVT_imm_95_1, 0, CVT_regR0, 0, CVT_regR0, 0, CVT_Done }, |
| 3716 | // Convert__imm_95_3__regR0__RegGPRC1_0 |
| 3717 | { CVT_imm_95_3, 0, CVT_regR0, 0, CVT_95_addRegGPRCOperands, 1, CVT_Done }, |
| 3718 | // Convert__imm_95_3__RegGPRC1_0__RegGPRC1_1 |
| 3719 | { CVT_imm_95_3, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3720 | // Convert__RegGPRC1_0__RegGPRC1_1__Imm1_2 |
| 3721 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3722 | // Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0 |
| 3723 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
| 3724 | // Convert__RegGPRC1_0__RegGPRC1_1__imm_95_1 |
| 3725 | { CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_imm_95_1, 0, CVT_Done }, |
| 3726 | // Convert__imm_95_31__regR0__regR0 |
| 3727 | { CVT_imm_95_31, 0, CVT_regR0, 0, CVT_regR0, 0, CVT_Done }, |
| 3728 | // Convert__U5Imm1_0__RegGPRC1_1__RegGPRC1_2 |
| 3729 | { CVT_95_addImmOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 3730 | // Convert__imm_95_4__RegGPRC1_0__RegGPRC1_1 |
| 3731 | { CVT_imm_95_4, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3732 | // Convert__imm_95_4__RegGPRC1_0__S16Imm1_1 |
| 3733 | { CVT_imm_95_4, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3734 | // Convert__imm_95_12__RegGPRC1_0__RegGPRC1_1 |
| 3735 | { CVT_imm_95_12, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3736 | // Convert__imm_95_12__RegGPRC1_0__S16Imm1_1 |
| 3737 | { CVT_imm_95_12, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3738 | // Convert__imm_95_8__RegGPRC1_0__RegGPRC1_1 |
| 3739 | { CVT_imm_95_8, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3740 | // Convert__imm_95_8__RegGPRC1_0__S16Imm1_1 |
| 3741 | { CVT_imm_95_8, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3742 | // Convert__U5Imm1_0__RegGPRC1_1__S16Imm1_2 |
| 3743 | { CVT_95_addImmOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_95_addS16ImmOperands, 3, CVT_Done }, |
| 3744 | // Convert__imm_95_20__RegGPRC1_0__RegGPRC1_1 |
| 3745 | { CVT_imm_95_20, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3746 | // Convert__imm_95_20__RegGPRC1_0__S16Imm1_1 |
| 3747 | { CVT_imm_95_20, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3748 | // Convert__imm_95_5__RegGPRC1_0__RegGPRC1_1 |
| 3749 | { CVT_imm_95_5, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3750 | // Convert__imm_95_5__RegGPRC1_0__S16Imm1_1 |
| 3751 | { CVT_imm_95_5, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3752 | // Convert__imm_95_1__RegGPRC1_0__RegGPRC1_1 |
| 3753 | { CVT_imm_95_1, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3754 | // Convert__imm_95_1__RegGPRC1_0__S16Imm1_1 |
| 3755 | { CVT_imm_95_1, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3756 | // Convert__imm_95_6__RegGPRC1_0__RegGPRC1_1 |
| 3757 | { CVT_imm_95_6, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3758 | // Convert__imm_95_6__RegGPRC1_0__S16Imm1_1 |
| 3759 | { CVT_imm_95_6, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3760 | // Convert__imm_95_2__RegGPRC1_0__RegGPRC1_1 |
| 3761 | { CVT_imm_95_2, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3762 | // Convert__imm_95_2__RegGPRC1_0__S16Imm1_1 |
| 3763 | { CVT_imm_95_2, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3764 | // Convert__imm_95_16__RegGPRC1_0__RegGPRC1_1 |
| 3765 | { CVT_imm_95_16, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3766 | // Convert__imm_95_16__RegGPRC1_0__S16Imm1_1 |
| 3767 | { CVT_imm_95_16, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3768 | // Convert__imm_95_24__RegGPRC1_0__RegGPRC1_1 |
| 3769 | { CVT_imm_95_24, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3770 | // Convert__imm_95_24__RegGPRC1_0__S16Imm1_1 |
| 3771 | { CVT_imm_95_24, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3772 | // Convert__imm_95_31__RegGPRC1_0__RegGPRC1_1 |
| 3773 | { CVT_imm_95_31, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3774 | // Convert__imm_95_31__RegGPRC1_0__S16Imm1_1 |
| 3775 | { CVT_imm_95_31, 0, CVT_95_addRegGPRCOperands, 1, CVT_95_addS16ImmOperands, 2, CVT_Done }, |
| 3776 | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2 |
| 3777 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
| 3778 | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3 |
| 3779 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addRegVRRCOperands, 4, CVT_Done }, |
| 3780 | // Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1 |
| 3781 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 3782 | // Convert__RegVRRC1_0__RegVRRC1_1__RegGPRC1_2 |
| 3783 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 3784 | // Convert__RegVRRC1_0__RegVRRC1_1 |
| 3785 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 3786 | // Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2 |
| 3787 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
| 3788 | // Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2 |
| 3789 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3790 | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3 |
| 3791 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addRegGPRCOperands, 4, CVT_Done }, |
| 3792 | // Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1 |
| 3793 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 3794 | // Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2 |
| 3795 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
| 3796 | // Convert__RegG8RC1_0__RegVRRC1_1__U3Imm1_2 |
| 3797 | { CVT_95_addRegG8RCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3798 | // Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2 |
| 3799 | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegGPRCOperands, 3, CVT_Done }, |
| 3800 | // Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2 |
| 3801 | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegGPRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
| 3802 | // Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegG8RC1_1 |
| 3803 | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 3, CVT_95_addRegG8RCOperands, 2, CVT_Done }, |
| 3804 | // Convert__RegVRRC1_0__Tie0_1_1__RegG8RC1_1__RegG8RC1_2 |
| 3805 | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 3806 | // Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1 |
| 3807 | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 3, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 3808 | // Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegGPRC1_1 |
| 3809 | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 3, CVT_95_addRegGPRCOperands, 2, CVT_Done }, |
| 3810 | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_1 |
| 3811 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 3812 | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1 |
| 3813 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done }, |
| 3814 | // Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2__U4Imm1_3 |
| 3815 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3816 | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U3Imm1_3 |
| 3817 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3818 | // Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U4Imm1_3 |
| 3819 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3820 | // Convert__RegVRRC1_0__S5Imm1_1 |
| 3821 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3822 | // Convert__RegVRRC1_0__RegVRRC1_1__U2Imm1_2 |
| 3823 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3824 | // Convert__RegVRRC1_0__RegVRRC1_1__U3Imm1_2 |
| 3825 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3826 | // Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2 |
| 3827 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3828 | // Convert__imm_95_1__imm_95_0 |
| 3829 | { CVT_imm_95_1, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 3830 | // Convert__U2Imm1_0__U2Imm1_1 |
| 3831 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3832 | // Convert__RegVSFRC1_0__RegVSFRC1_1 |
| 3833 | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
| 3834 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2 |
| 3835 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 3836 | // Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2 |
| 3837 | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
| 3838 | // Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2 |
| 3839 | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegVSSRCOperands, 2, CVT_95_addRegVSSRCOperands, 3, CVT_Done }, |
| 3840 | // Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2 |
| 3841 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
| 3842 | // Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2 |
| 3843 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
| 3844 | // Convert__RegVRRC1_0__RegVFRC1_1 |
| 3845 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVFRCOperands, 2, CVT_Done }, |
| 3846 | // Convert__RegVSRC1_0__RegVSSRC1_1 |
| 3847 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSSRCOperands, 2, CVT_Done }, |
| 3848 | // Convert__RegVFRC1_0__RegVRRC1_1 |
| 3849 | { CVT_95_addRegVFRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 3850 | // Convert__RegVSSRC1_0__RegVSRC1_1 |
| 3851 | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
| 3852 | // Convert__RegVSSRC1_0__RegVSFRC1_1 |
| 3853 | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
| 3854 | // Convert__RegVSRC1_0__RegG8RC1_1__RegG8RC1_2 |
| 3855 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegG8RCOperands, 2, CVT_95_addRegG8RCOperands, 3, CVT_Done }, |
| 3856 | // Convert__RegVRRC1_0__RegVRRC1_1__RegVSFRC1_2 |
| 3857 | { CVT_95_addRegVRRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
| 3858 | // Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2 |
| 3859 | { CVT_95_addRegVSFRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSFRCOperands, 2, CVT_95_addRegVSFRCOperands, 3, CVT_Done }, |
| 3860 | // Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2 |
| 3861 | { CVT_95_addRegVSSRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSSRCOperands, 2, CVT_95_addRegVSSRCOperands, 3, CVT_Done }, |
| 3862 | // Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2 |
| 3863 | { CVT_95_addRegVRRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVRRCOperands, 2, CVT_95_addRegVRRCOperands, 3, CVT_Done }, |
| 3864 | // Convert__RegVSSRC1_0__RegVSSRC1_1 |
| 3865 | { CVT_95_addRegVSSRCOperands, 1, CVT_95_addRegVSSRCOperands, 2, CVT_Done }, |
| 3866 | // Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3 |
| 3867 | { CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addRegVRRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3868 | // Convert__RegCRRC1_0__RegVSFRC1_1 |
| 3869 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
| 3870 | // Convert__RegCRRC1_0__U7Imm1_2__RegVSFRC1_1 |
| 3871 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVSFRCOperands, 2, CVT_Done }, |
| 3872 | // Convert__RegCRRC1_0__U7Imm1_2__RegVRRC1_1 |
| 3873 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVRRCOperands, 2, CVT_Done }, |
| 3874 | // Convert__RegCRRC1_0__U7Imm1_2__RegVSSRC1_1 |
| 3875 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVSSRCOperands, 2, CVT_Done }, |
| 3876 | // Convert__RegVSRC1_0__RegVSRC1_1 |
| 3877 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
| 3878 | // Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2 |
| 3879 | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 3880 | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2 |
| 3881 | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 3882 | // Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3 |
| 3883 | { CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addRegVSRCOperands, 4, CVT_Done }, |
| 3884 | // Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2 |
| 3885 | { CVT_95_addRegACCRCOperands, 1, CVT_95_addRegVSRpEvenRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 3886 | // Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2 |
| 3887 | { CVT_95_addRegACCRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRpEvenRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 3888 | // Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2 |
| 3889 | { CVT_95_addRegVSRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 3890 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1 |
| 3891 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
| 3892 | // Convert__RegCRRC1_0__RegVSRC1_1__RegVSRC1_2 |
| 3893 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 3894 | // Convert__RegCRRC1_0__RegVSRC1_1 |
| 3895 | { CVT_95_addRegCRRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
| 3896 | // Convert__RegVSRC1_0__U7Imm1_2__RegVSRC1_1 |
| 3897 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 3, CVT_95_addRegVSRCOperands, 2, CVT_Done }, |
| 3898 | // Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_0 |
| 3899 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRpRCOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
| 3900 | // Convert__RegVSRpRC1_0__RegVSRpRC1_1__imm_95_0 |
| 3901 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
| 3902 | // Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_1 |
| 3903 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRpRCOperands, 3, CVT_imm_95_1, 0, CVT_Done }, |
| 3904 | // Convert__RegVSRpRC1_0__RegVSRpRC1_1__imm_95_1 |
| 3905 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_imm_95_1, 0, CVT_Done }, |
| 3906 | // Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_2 |
| 3907 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRpRCOperands, 3, CVT_imm_95_2, 0, CVT_Done }, |
| 3908 | // Convert__RegVSRpRC1_0__RegVSRpRC1_1__imm_95_2 |
| 3909 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_imm_95_2, 0, CVT_Done }, |
| 3910 | // Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__U2Imm1_3 |
| 3911 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addRegVSRpRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3912 | // Convert__RegVSRpRC1_0__RegVSRpRC1_1__U2Imm1_2 |
| 3913 | { CVT_95_addRegVSRpRCOperands, 1, CVT_95_addRegVSRpRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3914 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3 |
| 3915 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addRegVSRCOperands, 4, CVT_Done }, |
| 3916 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U8Imm1_4 |
| 3917 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addRegVSRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3918 | // Convert__RegVSFRC1_0__RegVSRC1_1__U4Imm1_2 |
| 3919 | { CVT_95_addRegVSFRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3920 | // Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2 |
| 3921 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVRRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3922 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3 |
| 3923 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3924 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_0 |
| 3925 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
| 3926 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_1 |
| 3927 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_imm_95_1, 0, CVT_Done }, |
| 3928 | // Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__U4Imm1_2 |
| 3929 | { CVT_95_addRegVSRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3930 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_3 |
| 3931 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_imm_95_3, 0, CVT_Done }, |
| 3932 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U3Imm1_3 |
| 3933 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3934 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3__U1Imm1_4__U1Imm1_5 |
| 3935 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3936 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3__U1Imm1_4 |
| 3937 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3938 | // Convert__RegVSRC1_0__RegVSRC1_1__Tie0_1_1__RegVSRC1_2 |
| 3939 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_addRegVSRCOperands, 3, CVT_Done }, |
| 3940 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U2Imm1_3 |
| 3941 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3942 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U3Imm1_4 |
| 3943 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addRegVSRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3944 | // Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_0 |
| 3945 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
| 3946 | // Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_3 |
| 3947 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_imm_95_3, 0, CVT_Done }, |
| 3948 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_0 |
| 3949 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_0, 0, CVT_Done }, |
| 3950 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_3 |
| 3951 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_3, 0, CVT_Done }, |
| 3952 | // Convert__RegVSRC1_0__Tie0_1_1__U1Imm1_1__Imm1_2 |
| 3953 | { CVT_95_addRegVSRCOperands, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3954 | // Convert__RegVSRC1_0__U8Imm1_1 |
| 3955 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3956 | // Convert__RegVSRC1_0__Imm1_1 |
| 3957 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 3958 | // Convert__RegVSRC1_0__RegVSRC1_1__U2Imm1_2 |
| 3959 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3960 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U1Imm1_4 |
| 3961 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 3, CVT_95_addRegVSRCOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
| 3962 | // Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_2 |
| 3963 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSFRCOperands, 2, CVT_imm_95_2, 0, CVT_Done }, |
| 3964 | // Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_2 |
| 3965 | { CVT_95_addRegVSRCOperands, 1, CVT_95_addRegVSRCOperands, 2, CVT_95_addRegVSRCOperands, 2, CVT_imm_95_2, 0, CVT_Done }, |
| 3966 | }; |
| 3967 | |
| 3968 | void PPCAsmParser:: |
| 3969 | convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
| 3970 | const OperandVector &Operands) { |
| 3971 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
| 3972 | const uint8_t *Converter = ConversionTable[Kind]; |
| 3973 | Inst.setOpcode(Opcode); |
| 3974 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 3975 | unsigned OpIdx = *(p + 1); |
| 3976 | switch (*p) { |
| 3977 | default: llvm_unreachable("invalid conversion entry!" ); |
| 3978 | case CVT_Reg: |
| 3979 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
| 3980 | break; |
| 3981 | case CVT_Tied: { |
| 3982 | assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) - |
| 3983 | std::begin(TiedAsmOperandTable)) && |
| 3984 | "Tied operand not found" ); |
| 3985 | unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0]; |
| 3986 | if (TiedResOpnd != (uint8_t)-1) |
| 3987 | Inst.addOperand(Inst.getOperand(TiedResOpnd)); |
| 3988 | break; |
| 3989 | } |
| 3990 | case CVT_95_addRegG8RCOperands: |
| 3991 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegG8RCOperands(Inst, 1); |
| 3992 | break; |
| 3993 | case CVT_95_addTLSRegOperands: |
| 3994 | static_cast<PPCOperand &>(*Operands[OpIdx]).addTLSRegOperands(Inst, 1); |
| 3995 | break; |
| 3996 | case CVT_95_addRegGPRCOperands: |
| 3997 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegGPRCOperands(Inst, 1); |
| 3998 | break; |
| 3999 | case CVT_95_addImmOperands: |
| 4000 | static_cast<PPCOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1); |
| 4001 | break; |
| 4002 | case CVT_95_addRegGPRCNoR0Operands: |
| 4003 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegGPRCNoR0Operands(Inst, 1); |
| 4004 | break; |
| 4005 | case CVT_95_addS16ImmOperands: |
| 4006 | static_cast<PPCOperand &>(*Operands[OpIdx]).addS16ImmOperands(Inst, 1); |
| 4007 | break; |
| 4008 | case CVT_95_addU16ImmOperands: |
| 4009 | static_cast<PPCOperand &>(*Operands[OpIdx]).addU16ImmOperands(Inst, 1); |
| 4010 | break; |
| 4011 | case CVT_95_addBranchTargetOperands: |
| 4012 | static_cast<PPCOperand &>(*Operands[OpIdx]).addBranchTargetOperands(Inst, 1); |
| 4013 | break; |
| 4014 | case CVT_95_addRegCRBITRCOperands: |
| 4015 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegCRBITRCOperands(Inst, 1); |
| 4016 | break; |
| 4017 | case CVT_imm_95_3: |
| 4018 | Inst.addOperand(MCOperand::createImm(3)); |
| 4019 | break; |
| 4020 | case CVT_imm_95_2: |
| 4021 | Inst.addOperand(MCOperand::createImm(2)); |
| 4022 | break; |
| 4023 | case CVT_imm_95_0: |
| 4024 | Inst.addOperand(MCOperand::createImm(0)); |
| 4025 | break; |
| 4026 | case CVT_95_addRegVRRCOperands: |
| 4027 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVRRCOperands(Inst, 1); |
| 4028 | break; |
| 4029 | case CVT_imm_95_8: |
| 4030 | Inst.addOperand(MCOperand::createImm(8)); |
| 4031 | break; |
| 4032 | case CVT_imm_95_10: |
| 4033 | Inst.addOperand(MCOperand::createImm(10)); |
| 4034 | break; |
| 4035 | case CVT_imm_95_76: |
| 4036 | Inst.addOperand(MCOperand::createImm(76)); |
| 4037 | break; |
| 4038 | case CVT_regCR0: |
| 4039 | Inst.addOperand(MCOperand::createReg(PPC::CR0)); |
| 4040 | break; |
| 4041 | case CVT_95_addRegCRRCOperands: |
| 4042 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegCRRCOperands(Inst, 1); |
| 4043 | break; |
| 4044 | case CVT_imm_95_79: |
| 4045 | Inst.addOperand(MCOperand::createImm(79)); |
| 4046 | break; |
| 4047 | case CVT_imm_95_78: |
| 4048 | Inst.addOperand(MCOperand::createImm(78)); |
| 4049 | break; |
| 4050 | case CVT_imm_95_4: |
| 4051 | Inst.addOperand(MCOperand::createImm(4)); |
| 4052 | break; |
| 4053 | case CVT_imm_95_7: |
| 4054 | Inst.addOperand(MCOperand::createImm(7)); |
| 4055 | break; |
| 4056 | case CVT_imm_95_6: |
| 4057 | Inst.addOperand(MCOperand::createImm(6)); |
| 4058 | break; |
| 4059 | case CVT_imm_95_44: |
| 4060 | Inst.addOperand(MCOperand::createImm(44)); |
| 4061 | break; |
| 4062 | case CVT_imm_95_47: |
| 4063 | Inst.addOperand(MCOperand::createImm(47)); |
| 4064 | break; |
| 4065 | case CVT_imm_95_46: |
| 4066 | Inst.addOperand(MCOperand::createImm(46)); |
| 4067 | break; |
| 4068 | case CVT_imm_95_36: |
| 4069 | Inst.addOperand(MCOperand::createImm(36)); |
| 4070 | break; |
| 4071 | case CVT_imm_95_39: |
| 4072 | Inst.addOperand(MCOperand::createImm(39)); |
| 4073 | break; |
| 4074 | case CVT_imm_95_38: |
| 4075 | Inst.addOperand(MCOperand::createImm(38)); |
| 4076 | break; |
| 4077 | case CVT_imm_95_12: |
| 4078 | Inst.addOperand(MCOperand::createImm(12)); |
| 4079 | break; |
| 4080 | case CVT_imm_95_15: |
| 4081 | Inst.addOperand(MCOperand::createImm(15)); |
| 4082 | break; |
| 4083 | case CVT_imm_95_14: |
| 4084 | Inst.addOperand(MCOperand::createImm(14)); |
| 4085 | break; |
| 4086 | case CVT_imm_95_68: |
| 4087 | Inst.addOperand(MCOperand::createImm(68)); |
| 4088 | break; |
| 4089 | case CVT_imm_95_71: |
| 4090 | Inst.addOperand(MCOperand::createImm(71)); |
| 4091 | break; |
| 4092 | case CVT_imm_95_70: |
| 4093 | Inst.addOperand(MCOperand::createImm(70)); |
| 4094 | break; |
| 4095 | case CVT_imm_95_100: |
| 4096 | Inst.addOperand(MCOperand::createImm(100)); |
| 4097 | break; |
| 4098 | case CVT_imm_95_103: |
| 4099 | Inst.addOperand(MCOperand::createImm(103)); |
| 4100 | break; |
| 4101 | case CVT_imm_95_102: |
| 4102 | Inst.addOperand(MCOperand::createImm(102)); |
| 4103 | break; |
| 4104 | case CVT_imm_95_108: |
| 4105 | Inst.addOperand(MCOperand::createImm(108)); |
| 4106 | break; |
| 4107 | case CVT_imm_95_111: |
| 4108 | Inst.addOperand(MCOperand::createImm(111)); |
| 4109 | break; |
| 4110 | case CVT_imm_95_110: |
| 4111 | Inst.addOperand(MCOperand::createImm(110)); |
| 4112 | break; |
| 4113 | case CVT_imm_95_31: |
| 4114 | Inst.addOperand(MCOperand::createImm(31)); |
| 4115 | break; |
| 4116 | case CVT_95_addRegF8RCOperands: |
| 4117 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegF8RCOperands(Inst, 1); |
| 4118 | break; |
| 4119 | case CVT_95_addRegFpRCOperands: |
| 4120 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegFpRCOperands(Inst, 1); |
| 4121 | break; |
| 4122 | case CVT_95_addRegGxRCNoR0Operands: |
| 4123 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegGxRCNoR0Operands(Inst, 1); |
| 4124 | break; |
| 4125 | case CVT_95_addRegGxRCOperands: |
| 4126 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegGxRCOperands(Inst, 1); |
| 4127 | break; |
| 4128 | case CVT_regR0: |
| 4129 | Inst.addOperand(MCOperand::createReg(PPC::R0)); |
| 4130 | break; |
| 4131 | case CVT_95_addRegDMRpRCOperands: |
| 4132 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegDMRpRCOperands(Inst, 1); |
| 4133 | break; |
| 4134 | case CVT_95_addRegDMRRCOperands: |
| 4135 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegDMRRCOperands(Inst, 1); |
| 4136 | break; |
| 4137 | case CVT_imm_95_1: |
| 4138 | Inst.addOperand(MCOperand::createImm(1)); |
| 4139 | break; |
| 4140 | case CVT_95_addRegVSRpRCOperands: |
| 4141 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSRpRCOperands(Inst, 1); |
| 4142 | break; |
| 4143 | case CVT_95_addRegVSRCOperands: |
| 4144 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSRCOperands(Inst, 1); |
| 4145 | break; |
| 4146 | case CVT_95_addRegDMRROWpRCOperands: |
| 4147 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegDMRROWpRCOperands(Inst, 1); |
| 4148 | break; |
| 4149 | case CVT_95_addRegACCRCOperands: |
| 4150 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegACCRCOperands(Inst, 1); |
| 4151 | break; |
| 4152 | case CVT_95_addRegSPERCOperands: |
| 4153 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegSPERCOperands(Inst, 1); |
| 4154 | break; |
| 4155 | case CVT_95_addRegSPE4RCOperands: |
| 4156 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegSPE4RCOperands(Inst, 1); |
| 4157 | break; |
| 4158 | case CVT_95_addRegF4RCOperands: |
| 4159 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegF4RCOperands(Inst, 1); |
| 4160 | break; |
| 4161 | case CVT_95_addRegG8RCNoX0Operands: |
| 4162 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegG8RCNoX0Operands(Inst, 1); |
| 4163 | break; |
| 4164 | case CVT_regCR0EQ: |
| 4165 | Inst.addOperand(MCOperand::createReg(PPC::CR0EQ)); |
| 4166 | break; |
| 4167 | case CVT_regCR0GT: |
| 4168 | Inst.addOperand(MCOperand::createReg(PPC::CR0GT)); |
| 4169 | break; |
| 4170 | case CVT_regCR0LT: |
| 4171 | Inst.addOperand(MCOperand::createReg(PPC::CR0LT)); |
| 4172 | break; |
| 4173 | case CVT_95_addRegG8pRCOperands: |
| 4174 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegG8pRCOperands(Inst, 1); |
| 4175 | break; |
| 4176 | case CVT_regZERO8: |
| 4177 | Inst.addOperand(MCOperand::createReg(PPC::ZERO8)); |
| 4178 | break; |
| 4179 | case CVT_regZERO: |
| 4180 | Inst.addOperand(MCOperand::createReg(PPC::ZERO)); |
| 4181 | break; |
| 4182 | case CVT_95_addRegVFRCOperands: |
| 4183 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVFRCOperands(Inst, 1); |
| 4184 | break; |
| 4185 | case CVT_95_addRegVSFRCOperands: |
| 4186 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSFRCOperands(Inst, 1); |
| 4187 | break; |
| 4188 | case CVT_95_addRegVSSRCOperands: |
| 4189 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSSRCOperands(Inst, 1); |
| 4190 | break; |
| 4191 | case CVT_imm_95_29: |
| 4192 | Inst.addOperand(MCOperand::createImm(29)); |
| 4193 | break; |
| 4194 | case CVT_imm_95_280: |
| 4195 | Inst.addOperand(MCOperand::createImm(280)); |
| 4196 | break; |
| 4197 | case CVT_imm_95_128: |
| 4198 | Inst.addOperand(MCOperand::createImm(128)); |
| 4199 | break; |
| 4200 | case CVT_imm_95_129: |
| 4201 | Inst.addOperand(MCOperand::createImm(129)); |
| 4202 | break; |
| 4203 | case CVT_imm_95_130: |
| 4204 | Inst.addOperand(MCOperand::createImm(130)); |
| 4205 | break; |
| 4206 | case CVT_imm_95_131: |
| 4207 | Inst.addOperand(MCOperand::createImm(131)); |
| 4208 | break; |
| 4209 | case CVT_imm_95_132: |
| 4210 | Inst.addOperand(MCOperand::createImm(132)); |
| 4211 | break; |
| 4212 | case CVT_imm_95_133: |
| 4213 | Inst.addOperand(MCOperand::createImm(133)); |
| 4214 | break; |
| 4215 | case CVT_imm_95_134: |
| 4216 | Inst.addOperand(MCOperand::createImm(134)); |
| 4217 | break; |
| 4218 | case CVT_imm_95_135: |
| 4219 | Inst.addOperand(MCOperand::createImm(135)); |
| 4220 | break; |
| 4221 | case CVT_imm_95_28: |
| 4222 | Inst.addOperand(MCOperand::createImm(28)); |
| 4223 | break; |
| 4224 | case CVT_imm_95_9: |
| 4225 | Inst.addOperand(MCOperand::createImm(9)); |
| 4226 | break; |
| 4227 | case CVT_imm_95_19: |
| 4228 | Inst.addOperand(MCOperand::createImm(19)); |
| 4229 | break; |
| 4230 | case CVT_imm_95_537: |
| 4231 | Inst.addOperand(MCOperand::createImm(537)); |
| 4232 | break; |
| 4233 | case CVT_imm_95_539: |
| 4234 | Inst.addOperand(MCOperand::createImm(539)); |
| 4235 | break; |
| 4236 | case CVT_imm_95_541: |
| 4237 | Inst.addOperand(MCOperand::createImm(541)); |
| 4238 | break; |
| 4239 | case CVT_imm_95_543: |
| 4240 | Inst.addOperand(MCOperand::createImm(543)); |
| 4241 | break; |
| 4242 | case CVT_imm_95_536: |
| 4243 | Inst.addOperand(MCOperand::createImm(536)); |
| 4244 | break; |
| 4245 | case CVT_imm_95_538: |
| 4246 | Inst.addOperand(MCOperand::createImm(538)); |
| 4247 | break; |
| 4248 | case CVT_imm_95_540: |
| 4249 | Inst.addOperand(MCOperand::createImm(540)); |
| 4250 | break; |
| 4251 | case CVT_imm_95_542: |
| 4252 | Inst.addOperand(MCOperand::createImm(542)); |
| 4253 | break; |
| 4254 | case CVT_imm_95_1018: |
| 4255 | Inst.addOperand(MCOperand::createImm(1018)); |
| 4256 | break; |
| 4257 | case CVT_imm_95_981: |
| 4258 | Inst.addOperand(MCOperand::createImm(981)); |
| 4259 | break; |
| 4260 | case CVT_imm_95_22: |
| 4261 | Inst.addOperand(MCOperand::createImm(22)); |
| 4262 | break; |
| 4263 | case CVT_imm_95_17: |
| 4264 | Inst.addOperand(MCOperand::createImm(17)); |
| 4265 | break; |
| 4266 | case CVT_imm_95_18: |
| 4267 | Inst.addOperand(MCOperand::createImm(18)); |
| 4268 | break; |
| 4269 | case CVT_imm_95_980: |
| 4270 | Inst.addOperand(MCOperand::createImm(980)); |
| 4271 | break; |
| 4272 | case CVT_imm_95_529: |
| 4273 | Inst.addOperand(MCOperand::createImm(529)); |
| 4274 | break; |
| 4275 | case CVT_imm_95_531: |
| 4276 | Inst.addOperand(MCOperand::createImm(531)); |
| 4277 | break; |
| 4278 | case CVT_imm_95_533: |
| 4279 | Inst.addOperand(MCOperand::createImm(533)); |
| 4280 | break; |
| 4281 | case CVT_imm_95_535: |
| 4282 | Inst.addOperand(MCOperand::createImm(535)); |
| 4283 | break; |
| 4284 | case CVT_imm_95_528: |
| 4285 | Inst.addOperand(MCOperand::createImm(528)); |
| 4286 | break; |
| 4287 | case CVT_imm_95_530: |
| 4288 | Inst.addOperand(MCOperand::createImm(530)); |
| 4289 | break; |
| 4290 | case CVT_imm_95_532: |
| 4291 | Inst.addOperand(MCOperand::createImm(532)); |
| 4292 | break; |
| 4293 | case CVT_imm_95_534: |
| 4294 | Inst.addOperand(MCOperand::createImm(534)); |
| 4295 | break; |
| 4296 | case CVT_imm_95_1019: |
| 4297 | Inst.addOperand(MCOperand::createImm(1019)); |
| 4298 | break; |
| 4299 | case CVT_95_addCRBitMaskOperands: |
| 4300 | static_cast<PPCOperand &>(*Operands[OpIdx]).addCRBitMaskOperands(Inst, 1); |
| 4301 | break; |
| 4302 | case CVT_imm_95_48: |
| 4303 | Inst.addOperand(MCOperand::createImm(48)); |
| 4304 | break; |
| 4305 | case CVT_imm_95_896: |
| 4306 | Inst.addOperand(MCOperand::createImm(896)); |
| 4307 | break; |
| 4308 | case CVT_imm_95_287: |
| 4309 | Inst.addOperand(MCOperand::createImm(287)); |
| 4310 | break; |
| 4311 | case CVT_imm_95_5: |
| 4312 | Inst.addOperand(MCOperand::createImm(5)); |
| 4313 | break; |
| 4314 | case CVT_imm_95_25: |
| 4315 | Inst.addOperand(MCOperand::createImm(25)); |
| 4316 | break; |
| 4317 | case CVT_imm_95_512: |
| 4318 | Inst.addOperand(MCOperand::createImm(512)); |
| 4319 | break; |
| 4320 | case CVT_imm_95_272: |
| 4321 | Inst.addOperand(MCOperand::createImm(272)); |
| 4322 | break; |
| 4323 | case CVT_imm_95_273: |
| 4324 | Inst.addOperand(MCOperand::createImm(273)); |
| 4325 | break; |
| 4326 | case CVT_imm_95_274: |
| 4327 | Inst.addOperand(MCOperand::createImm(274)); |
| 4328 | break; |
| 4329 | case CVT_imm_95_275: |
| 4330 | Inst.addOperand(MCOperand::createImm(275)); |
| 4331 | break; |
| 4332 | case CVT_imm_95_260: |
| 4333 | Inst.addOperand(MCOperand::createImm(260)); |
| 4334 | break; |
| 4335 | case CVT_imm_95_261: |
| 4336 | Inst.addOperand(MCOperand::createImm(261)); |
| 4337 | break; |
| 4338 | case CVT_imm_95_262: |
| 4339 | Inst.addOperand(MCOperand::createImm(262)); |
| 4340 | break; |
| 4341 | case CVT_imm_95_263: |
| 4342 | Inst.addOperand(MCOperand::createImm(263)); |
| 4343 | break; |
| 4344 | case CVT_imm_95_26: |
| 4345 | Inst.addOperand(MCOperand::createImm(26)); |
| 4346 | break; |
| 4347 | case CVT_imm_95_27: |
| 4348 | Inst.addOperand(MCOperand::createImm(27)); |
| 4349 | break; |
| 4350 | case CVT_imm_95_990: |
| 4351 | Inst.addOperand(MCOperand::createImm(990)); |
| 4352 | break; |
| 4353 | case CVT_imm_95_991: |
| 4354 | Inst.addOperand(MCOperand::createImm(991)); |
| 4355 | break; |
| 4356 | case CVT_imm_95_268: |
| 4357 | Inst.addOperand(MCOperand::createImm(268)); |
| 4358 | break; |
| 4359 | case CVT_imm_95_988: |
| 4360 | Inst.addOperand(MCOperand::createImm(988)); |
| 4361 | break; |
| 4362 | case CVT_imm_95_989: |
| 4363 | Inst.addOperand(MCOperand::createImm(989)); |
| 4364 | break; |
| 4365 | case CVT_imm_95_269: |
| 4366 | Inst.addOperand(MCOperand::createImm(269)); |
| 4367 | break; |
| 4368 | case CVT_imm_95_986: |
| 4369 | Inst.addOperand(MCOperand::createImm(986)); |
| 4370 | break; |
| 4371 | case CVT_imm_95_13: |
| 4372 | Inst.addOperand(MCOperand::createImm(13)); |
| 4373 | break; |
| 4374 | case CVT_imm_95_255: |
| 4375 | Inst.addOperand(MCOperand::createImm(255)); |
| 4376 | break; |
| 4377 | case CVT_imm_95_284: |
| 4378 | Inst.addOperand(MCOperand::createImm(284)); |
| 4379 | break; |
| 4380 | case CVT_imm_95_285: |
| 4381 | Inst.addOperand(MCOperand::createImm(285)); |
| 4382 | break; |
| 4383 | case CVT_regX0: |
| 4384 | Inst.addOperand(MCOperand::createReg(PPC::X0)); |
| 4385 | break; |
| 4386 | case CVT_95_addRegVSRpEvenRCOperands: |
| 4387 | static_cast<PPCOperand &>(*Operands[OpIdx]).addRegVSRpEvenRCOperands(Inst, 1); |
| 4388 | break; |
| 4389 | case CVT_imm_95_20: |
| 4390 | Inst.addOperand(MCOperand::createImm(20)); |
| 4391 | break; |
| 4392 | case CVT_imm_95_16: |
| 4393 | Inst.addOperand(MCOperand::createImm(16)); |
| 4394 | break; |
| 4395 | case CVT_imm_95_24: |
| 4396 | Inst.addOperand(MCOperand::createImm(24)); |
| 4397 | break; |
| 4398 | } |
| 4399 | } |
| 4400 | } |
| 4401 | |
| 4402 | void PPCAsmParser:: |
| 4403 | convertToMapAndConstraints(unsigned Kind, |
| 4404 | const OperandVector &Operands) { |
| 4405 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
| 4406 | unsigned NumMCOperands = 0; |
| 4407 | const uint8_t *Converter = ConversionTable[Kind]; |
| 4408 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 4409 | switch (*p) { |
| 4410 | default: llvm_unreachable("invalid conversion entry!" ); |
| 4411 | case CVT_Reg: |
| 4412 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4413 | Operands[*(p + 1)]->setConstraint("r" ); |
| 4414 | ++NumMCOperands; |
| 4415 | break; |
| 4416 | case CVT_Tied: |
| 4417 | ++NumMCOperands; |
| 4418 | break; |
| 4419 | case CVT_95_addRegG8RCOperands: |
| 4420 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4421 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4422 | NumMCOperands += 1; |
| 4423 | break; |
| 4424 | case CVT_95_addTLSRegOperands: |
| 4425 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4426 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4427 | NumMCOperands += 1; |
| 4428 | break; |
| 4429 | case CVT_95_addRegGPRCOperands: |
| 4430 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4431 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4432 | NumMCOperands += 1; |
| 4433 | break; |
| 4434 | case CVT_95_addImmOperands: |
| 4435 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4436 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4437 | NumMCOperands += 1; |
| 4438 | break; |
| 4439 | case CVT_95_addRegGPRCNoR0Operands: |
| 4440 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4441 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4442 | NumMCOperands += 1; |
| 4443 | break; |
| 4444 | case CVT_95_addS16ImmOperands: |
| 4445 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4446 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4447 | NumMCOperands += 1; |
| 4448 | break; |
| 4449 | case CVT_95_addU16ImmOperands: |
| 4450 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4451 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4452 | NumMCOperands += 1; |
| 4453 | break; |
| 4454 | case CVT_95_addBranchTargetOperands: |
| 4455 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4456 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4457 | NumMCOperands += 1; |
| 4458 | break; |
| 4459 | case CVT_95_addRegCRBITRCOperands: |
| 4460 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4461 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4462 | NumMCOperands += 1; |
| 4463 | break; |
| 4464 | case CVT_imm_95_3: |
| 4465 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4466 | Operands[*(p + 1)]->setConstraint("" ); |
| 4467 | ++NumMCOperands; |
| 4468 | break; |
| 4469 | case CVT_imm_95_2: |
| 4470 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4471 | Operands[*(p + 1)]->setConstraint("" ); |
| 4472 | ++NumMCOperands; |
| 4473 | break; |
| 4474 | case CVT_imm_95_0: |
| 4475 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4476 | Operands[*(p + 1)]->setConstraint("" ); |
| 4477 | ++NumMCOperands; |
| 4478 | break; |
| 4479 | case CVT_95_addRegVRRCOperands: |
| 4480 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4481 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4482 | NumMCOperands += 1; |
| 4483 | break; |
| 4484 | case CVT_imm_95_8: |
| 4485 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4486 | Operands[*(p + 1)]->setConstraint("" ); |
| 4487 | ++NumMCOperands; |
| 4488 | break; |
| 4489 | case CVT_imm_95_10: |
| 4490 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4491 | Operands[*(p + 1)]->setConstraint("" ); |
| 4492 | ++NumMCOperands; |
| 4493 | break; |
| 4494 | case CVT_imm_95_76: |
| 4495 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4496 | Operands[*(p + 1)]->setConstraint("" ); |
| 4497 | ++NumMCOperands; |
| 4498 | break; |
| 4499 | case CVT_regCR0: |
| 4500 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4501 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4502 | ++NumMCOperands; |
| 4503 | break; |
| 4504 | case CVT_95_addRegCRRCOperands: |
| 4505 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4506 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4507 | NumMCOperands += 1; |
| 4508 | break; |
| 4509 | case CVT_imm_95_79: |
| 4510 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4511 | Operands[*(p + 1)]->setConstraint("" ); |
| 4512 | ++NumMCOperands; |
| 4513 | break; |
| 4514 | case CVT_imm_95_78: |
| 4515 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4516 | Operands[*(p + 1)]->setConstraint("" ); |
| 4517 | ++NumMCOperands; |
| 4518 | break; |
| 4519 | case CVT_imm_95_4: |
| 4520 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4521 | Operands[*(p + 1)]->setConstraint("" ); |
| 4522 | ++NumMCOperands; |
| 4523 | break; |
| 4524 | case CVT_imm_95_7: |
| 4525 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4526 | Operands[*(p + 1)]->setConstraint("" ); |
| 4527 | ++NumMCOperands; |
| 4528 | break; |
| 4529 | case CVT_imm_95_6: |
| 4530 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4531 | Operands[*(p + 1)]->setConstraint("" ); |
| 4532 | ++NumMCOperands; |
| 4533 | break; |
| 4534 | case CVT_imm_95_44: |
| 4535 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4536 | Operands[*(p + 1)]->setConstraint("" ); |
| 4537 | ++NumMCOperands; |
| 4538 | break; |
| 4539 | case CVT_imm_95_47: |
| 4540 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4541 | Operands[*(p + 1)]->setConstraint("" ); |
| 4542 | ++NumMCOperands; |
| 4543 | break; |
| 4544 | case CVT_imm_95_46: |
| 4545 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4546 | Operands[*(p + 1)]->setConstraint("" ); |
| 4547 | ++NumMCOperands; |
| 4548 | break; |
| 4549 | case CVT_imm_95_36: |
| 4550 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4551 | Operands[*(p + 1)]->setConstraint("" ); |
| 4552 | ++NumMCOperands; |
| 4553 | break; |
| 4554 | case CVT_imm_95_39: |
| 4555 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4556 | Operands[*(p + 1)]->setConstraint("" ); |
| 4557 | ++NumMCOperands; |
| 4558 | break; |
| 4559 | case CVT_imm_95_38: |
| 4560 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4561 | Operands[*(p + 1)]->setConstraint("" ); |
| 4562 | ++NumMCOperands; |
| 4563 | break; |
| 4564 | case CVT_imm_95_12: |
| 4565 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4566 | Operands[*(p + 1)]->setConstraint("" ); |
| 4567 | ++NumMCOperands; |
| 4568 | break; |
| 4569 | case CVT_imm_95_15: |
| 4570 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4571 | Operands[*(p + 1)]->setConstraint("" ); |
| 4572 | ++NumMCOperands; |
| 4573 | break; |
| 4574 | case CVT_imm_95_14: |
| 4575 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4576 | Operands[*(p + 1)]->setConstraint("" ); |
| 4577 | ++NumMCOperands; |
| 4578 | break; |
| 4579 | case CVT_imm_95_68: |
| 4580 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4581 | Operands[*(p + 1)]->setConstraint("" ); |
| 4582 | ++NumMCOperands; |
| 4583 | break; |
| 4584 | case CVT_imm_95_71: |
| 4585 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4586 | Operands[*(p + 1)]->setConstraint("" ); |
| 4587 | ++NumMCOperands; |
| 4588 | break; |
| 4589 | case CVT_imm_95_70: |
| 4590 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4591 | Operands[*(p + 1)]->setConstraint("" ); |
| 4592 | ++NumMCOperands; |
| 4593 | break; |
| 4594 | case CVT_imm_95_100: |
| 4595 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4596 | Operands[*(p + 1)]->setConstraint("" ); |
| 4597 | ++NumMCOperands; |
| 4598 | break; |
| 4599 | case CVT_imm_95_103: |
| 4600 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4601 | Operands[*(p + 1)]->setConstraint("" ); |
| 4602 | ++NumMCOperands; |
| 4603 | break; |
| 4604 | case CVT_imm_95_102: |
| 4605 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4606 | Operands[*(p + 1)]->setConstraint("" ); |
| 4607 | ++NumMCOperands; |
| 4608 | break; |
| 4609 | case CVT_imm_95_108: |
| 4610 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4611 | Operands[*(p + 1)]->setConstraint("" ); |
| 4612 | ++NumMCOperands; |
| 4613 | break; |
| 4614 | case CVT_imm_95_111: |
| 4615 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4616 | Operands[*(p + 1)]->setConstraint("" ); |
| 4617 | ++NumMCOperands; |
| 4618 | break; |
| 4619 | case CVT_imm_95_110: |
| 4620 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4621 | Operands[*(p + 1)]->setConstraint("" ); |
| 4622 | ++NumMCOperands; |
| 4623 | break; |
| 4624 | case CVT_imm_95_31: |
| 4625 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4626 | Operands[*(p + 1)]->setConstraint("" ); |
| 4627 | ++NumMCOperands; |
| 4628 | break; |
| 4629 | case CVT_95_addRegF8RCOperands: |
| 4630 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4631 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4632 | NumMCOperands += 1; |
| 4633 | break; |
| 4634 | case CVT_95_addRegFpRCOperands: |
| 4635 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4636 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4637 | NumMCOperands += 1; |
| 4638 | break; |
| 4639 | case CVT_95_addRegGxRCNoR0Operands: |
| 4640 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4641 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4642 | NumMCOperands += 1; |
| 4643 | break; |
| 4644 | case CVT_95_addRegGxRCOperands: |
| 4645 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4646 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4647 | NumMCOperands += 1; |
| 4648 | break; |
| 4649 | case CVT_regR0: |
| 4650 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4651 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4652 | ++NumMCOperands; |
| 4653 | break; |
| 4654 | case CVT_95_addRegDMRpRCOperands: |
| 4655 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4656 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4657 | NumMCOperands += 1; |
| 4658 | break; |
| 4659 | case CVT_95_addRegDMRRCOperands: |
| 4660 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4661 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4662 | NumMCOperands += 1; |
| 4663 | break; |
| 4664 | case CVT_imm_95_1: |
| 4665 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4666 | Operands[*(p + 1)]->setConstraint("" ); |
| 4667 | ++NumMCOperands; |
| 4668 | break; |
| 4669 | case CVT_95_addRegVSRpRCOperands: |
| 4670 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4671 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4672 | NumMCOperands += 1; |
| 4673 | break; |
| 4674 | case CVT_95_addRegVSRCOperands: |
| 4675 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4676 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4677 | NumMCOperands += 1; |
| 4678 | break; |
| 4679 | case CVT_95_addRegDMRROWpRCOperands: |
| 4680 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4681 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4682 | NumMCOperands += 1; |
| 4683 | break; |
| 4684 | case CVT_95_addRegACCRCOperands: |
| 4685 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4686 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4687 | NumMCOperands += 1; |
| 4688 | break; |
| 4689 | case CVT_95_addRegSPERCOperands: |
| 4690 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4691 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4692 | NumMCOperands += 1; |
| 4693 | break; |
| 4694 | case CVT_95_addRegSPE4RCOperands: |
| 4695 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4696 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4697 | NumMCOperands += 1; |
| 4698 | break; |
| 4699 | case CVT_95_addRegF4RCOperands: |
| 4700 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4701 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4702 | NumMCOperands += 1; |
| 4703 | break; |
| 4704 | case CVT_95_addRegG8RCNoX0Operands: |
| 4705 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4706 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4707 | NumMCOperands += 1; |
| 4708 | break; |
| 4709 | case CVT_regCR0EQ: |
| 4710 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4711 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4712 | ++NumMCOperands; |
| 4713 | break; |
| 4714 | case CVT_regCR0GT: |
| 4715 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4716 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4717 | ++NumMCOperands; |
| 4718 | break; |
| 4719 | case CVT_regCR0LT: |
| 4720 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4721 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4722 | ++NumMCOperands; |
| 4723 | break; |
| 4724 | case CVT_95_addRegG8pRCOperands: |
| 4725 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4726 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4727 | NumMCOperands += 1; |
| 4728 | break; |
| 4729 | case CVT_regZERO8: |
| 4730 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4731 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4732 | ++NumMCOperands; |
| 4733 | break; |
| 4734 | case CVT_regZERO: |
| 4735 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4736 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4737 | ++NumMCOperands; |
| 4738 | break; |
| 4739 | case CVT_95_addRegVFRCOperands: |
| 4740 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4741 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4742 | NumMCOperands += 1; |
| 4743 | break; |
| 4744 | case CVT_95_addRegVSFRCOperands: |
| 4745 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4746 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4747 | NumMCOperands += 1; |
| 4748 | break; |
| 4749 | case CVT_95_addRegVSSRCOperands: |
| 4750 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4751 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4752 | NumMCOperands += 1; |
| 4753 | break; |
| 4754 | case CVT_imm_95_29: |
| 4755 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4756 | Operands[*(p + 1)]->setConstraint("" ); |
| 4757 | ++NumMCOperands; |
| 4758 | break; |
| 4759 | case CVT_imm_95_280: |
| 4760 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4761 | Operands[*(p + 1)]->setConstraint("" ); |
| 4762 | ++NumMCOperands; |
| 4763 | break; |
| 4764 | case CVT_imm_95_128: |
| 4765 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4766 | Operands[*(p + 1)]->setConstraint("" ); |
| 4767 | ++NumMCOperands; |
| 4768 | break; |
| 4769 | case CVT_imm_95_129: |
| 4770 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4771 | Operands[*(p + 1)]->setConstraint("" ); |
| 4772 | ++NumMCOperands; |
| 4773 | break; |
| 4774 | case CVT_imm_95_130: |
| 4775 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4776 | Operands[*(p + 1)]->setConstraint("" ); |
| 4777 | ++NumMCOperands; |
| 4778 | break; |
| 4779 | case CVT_imm_95_131: |
| 4780 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4781 | Operands[*(p + 1)]->setConstraint("" ); |
| 4782 | ++NumMCOperands; |
| 4783 | break; |
| 4784 | case CVT_imm_95_132: |
| 4785 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4786 | Operands[*(p + 1)]->setConstraint("" ); |
| 4787 | ++NumMCOperands; |
| 4788 | break; |
| 4789 | case CVT_imm_95_133: |
| 4790 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4791 | Operands[*(p + 1)]->setConstraint("" ); |
| 4792 | ++NumMCOperands; |
| 4793 | break; |
| 4794 | case CVT_imm_95_134: |
| 4795 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4796 | Operands[*(p + 1)]->setConstraint("" ); |
| 4797 | ++NumMCOperands; |
| 4798 | break; |
| 4799 | case CVT_imm_95_135: |
| 4800 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4801 | Operands[*(p + 1)]->setConstraint("" ); |
| 4802 | ++NumMCOperands; |
| 4803 | break; |
| 4804 | case CVT_imm_95_28: |
| 4805 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4806 | Operands[*(p + 1)]->setConstraint("" ); |
| 4807 | ++NumMCOperands; |
| 4808 | break; |
| 4809 | case CVT_imm_95_9: |
| 4810 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4811 | Operands[*(p + 1)]->setConstraint("" ); |
| 4812 | ++NumMCOperands; |
| 4813 | break; |
| 4814 | case CVT_imm_95_19: |
| 4815 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4816 | Operands[*(p + 1)]->setConstraint("" ); |
| 4817 | ++NumMCOperands; |
| 4818 | break; |
| 4819 | case CVT_imm_95_537: |
| 4820 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4821 | Operands[*(p + 1)]->setConstraint("" ); |
| 4822 | ++NumMCOperands; |
| 4823 | break; |
| 4824 | case CVT_imm_95_539: |
| 4825 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4826 | Operands[*(p + 1)]->setConstraint("" ); |
| 4827 | ++NumMCOperands; |
| 4828 | break; |
| 4829 | case CVT_imm_95_541: |
| 4830 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4831 | Operands[*(p + 1)]->setConstraint("" ); |
| 4832 | ++NumMCOperands; |
| 4833 | break; |
| 4834 | case CVT_imm_95_543: |
| 4835 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4836 | Operands[*(p + 1)]->setConstraint("" ); |
| 4837 | ++NumMCOperands; |
| 4838 | break; |
| 4839 | case CVT_imm_95_536: |
| 4840 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4841 | Operands[*(p + 1)]->setConstraint("" ); |
| 4842 | ++NumMCOperands; |
| 4843 | break; |
| 4844 | case CVT_imm_95_538: |
| 4845 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4846 | Operands[*(p + 1)]->setConstraint("" ); |
| 4847 | ++NumMCOperands; |
| 4848 | break; |
| 4849 | case CVT_imm_95_540: |
| 4850 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4851 | Operands[*(p + 1)]->setConstraint("" ); |
| 4852 | ++NumMCOperands; |
| 4853 | break; |
| 4854 | case CVT_imm_95_542: |
| 4855 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4856 | Operands[*(p + 1)]->setConstraint("" ); |
| 4857 | ++NumMCOperands; |
| 4858 | break; |
| 4859 | case CVT_imm_95_1018: |
| 4860 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4861 | Operands[*(p + 1)]->setConstraint("" ); |
| 4862 | ++NumMCOperands; |
| 4863 | break; |
| 4864 | case CVT_imm_95_981: |
| 4865 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4866 | Operands[*(p + 1)]->setConstraint("" ); |
| 4867 | ++NumMCOperands; |
| 4868 | break; |
| 4869 | case CVT_imm_95_22: |
| 4870 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4871 | Operands[*(p + 1)]->setConstraint("" ); |
| 4872 | ++NumMCOperands; |
| 4873 | break; |
| 4874 | case CVT_imm_95_17: |
| 4875 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4876 | Operands[*(p + 1)]->setConstraint("" ); |
| 4877 | ++NumMCOperands; |
| 4878 | break; |
| 4879 | case CVT_imm_95_18: |
| 4880 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4881 | Operands[*(p + 1)]->setConstraint("" ); |
| 4882 | ++NumMCOperands; |
| 4883 | break; |
| 4884 | case CVT_imm_95_980: |
| 4885 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4886 | Operands[*(p + 1)]->setConstraint("" ); |
| 4887 | ++NumMCOperands; |
| 4888 | break; |
| 4889 | case CVT_imm_95_529: |
| 4890 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4891 | Operands[*(p + 1)]->setConstraint("" ); |
| 4892 | ++NumMCOperands; |
| 4893 | break; |
| 4894 | case CVT_imm_95_531: |
| 4895 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4896 | Operands[*(p + 1)]->setConstraint("" ); |
| 4897 | ++NumMCOperands; |
| 4898 | break; |
| 4899 | case CVT_imm_95_533: |
| 4900 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4901 | Operands[*(p + 1)]->setConstraint("" ); |
| 4902 | ++NumMCOperands; |
| 4903 | break; |
| 4904 | case CVT_imm_95_535: |
| 4905 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4906 | Operands[*(p + 1)]->setConstraint("" ); |
| 4907 | ++NumMCOperands; |
| 4908 | break; |
| 4909 | case CVT_imm_95_528: |
| 4910 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4911 | Operands[*(p + 1)]->setConstraint("" ); |
| 4912 | ++NumMCOperands; |
| 4913 | break; |
| 4914 | case CVT_imm_95_530: |
| 4915 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4916 | Operands[*(p + 1)]->setConstraint("" ); |
| 4917 | ++NumMCOperands; |
| 4918 | break; |
| 4919 | case CVT_imm_95_532: |
| 4920 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4921 | Operands[*(p + 1)]->setConstraint("" ); |
| 4922 | ++NumMCOperands; |
| 4923 | break; |
| 4924 | case CVT_imm_95_534: |
| 4925 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4926 | Operands[*(p + 1)]->setConstraint("" ); |
| 4927 | ++NumMCOperands; |
| 4928 | break; |
| 4929 | case CVT_imm_95_1019: |
| 4930 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4931 | Operands[*(p + 1)]->setConstraint("" ); |
| 4932 | ++NumMCOperands; |
| 4933 | break; |
| 4934 | case CVT_95_addCRBitMaskOperands: |
| 4935 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4936 | Operands[*(p + 1)]->setConstraint("m" ); |
| 4937 | NumMCOperands += 1; |
| 4938 | break; |
| 4939 | case CVT_imm_95_48: |
| 4940 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4941 | Operands[*(p + 1)]->setConstraint("" ); |
| 4942 | ++NumMCOperands; |
| 4943 | break; |
| 4944 | case CVT_imm_95_896: |
| 4945 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4946 | Operands[*(p + 1)]->setConstraint("" ); |
| 4947 | ++NumMCOperands; |
| 4948 | break; |
| 4949 | case CVT_imm_95_287: |
| 4950 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4951 | Operands[*(p + 1)]->setConstraint("" ); |
| 4952 | ++NumMCOperands; |
| 4953 | break; |
| 4954 | case CVT_imm_95_5: |
| 4955 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4956 | Operands[*(p + 1)]->setConstraint("" ); |
| 4957 | ++NumMCOperands; |
| 4958 | break; |
| 4959 | case CVT_imm_95_25: |
| 4960 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4961 | Operands[*(p + 1)]->setConstraint("" ); |
| 4962 | ++NumMCOperands; |
| 4963 | break; |
| 4964 | case CVT_imm_95_512: |
| 4965 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4966 | Operands[*(p + 1)]->setConstraint("" ); |
| 4967 | ++NumMCOperands; |
| 4968 | break; |
| 4969 | case CVT_imm_95_272: |
| 4970 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4971 | Operands[*(p + 1)]->setConstraint("" ); |
| 4972 | ++NumMCOperands; |
| 4973 | break; |
| 4974 | case CVT_imm_95_273: |
| 4975 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4976 | Operands[*(p + 1)]->setConstraint("" ); |
| 4977 | ++NumMCOperands; |
| 4978 | break; |
| 4979 | case CVT_imm_95_274: |
| 4980 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4981 | Operands[*(p + 1)]->setConstraint("" ); |
| 4982 | ++NumMCOperands; |
| 4983 | break; |
| 4984 | case CVT_imm_95_275: |
| 4985 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4986 | Operands[*(p + 1)]->setConstraint("" ); |
| 4987 | ++NumMCOperands; |
| 4988 | break; |
| 4989 | case CVT_imm_95_260: |
| 4990 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4991 | Operands[*(p + 1)]->setConstraint("" ); |
| 4992 | ++NumMCOperands; |
| 4993 | break; |
| 4994 | case CVT_imm_95_261: |
| 4995 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 4996 | Operands[*(p + 1)]->setConstraint("" ); |
| 4997 | ++NumMCOperands; |
| 4998 | break; |
| 4999 | case CVT_imm_95_262: |
| 5000 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5001 | Operands[*(p + 1)]->setConstraint("" ); |
| 5002 | ++NumMCOperands; |
| 5003 | break; |
| 5004 | case CVT_imm_95_263: |
| 5005 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5006 | Operands[*(p + 1)]->setConstraint("" ); |
| 5007 | ++NumMCOperands; |
| 5008 | break; |
| 5009 | case CVT_imm_95_26: |
| 5010 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5011 | Operands[*(p + 1)]->setConstraint("" ); |
| 5012 | ++NumMCOperands; |
| 5013 | break; |
| 5014 | case CVT_imm_95_27: |
| 5015 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5016 | Operands[*(p + 1)]->setConstraint("" ); |
| 5017 | ++NumMCOperands; |
| 5018 | break; |
| 5019 | case CVT_imm_95_990: |
| 5020 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5021 | Operands[*(p + 1)]->setConstraint("" ); |
| 5022 | ++NumMCOperands; |
| 5023 | break; |
| 5024 | case CVT_imm_95_991: |
| 5025 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5026 | Operands[*(p + 1)]->setConstraint("" ); |
| 5027 | ++NumMCOperands; |
| 5028 | break; |
| 5029 | case CVT_imm_95_268: |
| 5030 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5031 | Operands[*(p + 1)]->setConstraint("" ); |
| 5032 | ++NumMCOperands; |
| 5033 | break; |
| 5034 | case CVT_imm_95_988: |
| 5035 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5036 | Operands[*(p + 1)]->setConstraint("" ); |
| 5037 | ++NumMCOperands; |
| 5038 | break; |
| 5039 | case CVT_imm_95_989: |
| 5040 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5041 | Operands[*(p + 1)]->setConstraint("" ); |
| 5042 | ++NumMCOperands; |
| 5043 | break; |
| 5044 | case CVT_imm_95_269: |
| 5045 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5046 | Operands[*(p + 1)]->setConstraint("" ); |
| 5047 | ++NumMCOperands; |
| 5048 | break; |
| 5049 | case CVT_imm_95_986: |
| 5050 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5051 | Operands[*(p + 1)]->setConstraint("" ); |
| 5052 | ++NumMCOperands; |
| 5053 | break; |
| 5054 | case CVT_imm_95_13: |
| 5055 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5056 | Operands[*(p + 1)]->setConstraint("" ); |
| 5057 | ++NumMCOperands; |
| 5058 | break; |
| 5059 | case CVT_imm_95_255: |
| 5060 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5061 | Operands[*(p + 1)]->setConstraint("" ); |
| 5062 | ++NumMCOperands; |
| 5063 | break; |
| 5064 | case CVT_imm_95_284: |
| 5065 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5066 | Operands[*(p + 1)]->setConstraint("" ); |
| 5067 | ++NumMCOperands; |
| 5068 | break; |
| 5069 | case CVT_imm_95_285: |
| 5070 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5071 | Operands[*(p + 1)]->setConstraint("" ); |
| 5072 | ++NumMCOperands; |
| 5073 | break; |
| 5074 | case CVT_regX0: |
| 5075 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5076 | Operands[*(p + 1)]->setConstraint("m" ); |
| 5077 | ++NumMCOperands; |
| 5078 | break; |
| 5079 | case CVT_95_addRegVSRpEvenRCOperands: |
| 5080 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5081 | Operands[*(p + 1)]->setConstraint("m" ); |
| 5082 | NumMCOperands += 1; |
| 5083 | break; |
| 5084 | case CVT_imm_95_20: |
| 5085 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5086 | Operands[*(p + 1)]->setConstraint("" ); |
| 5087 | ++NumMCOperands; |
| 5088 | break; |
| 5089 | case CVT_imm_95_16: |
| 5090 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5091 | Operands[*(p + 1)]->setConstraint("" ); |
| 5092 | ++NumMCOperands; |
| 5093 | break; |
| 5094 | case CVT_imm_95_24: |
| 5095 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 5096 | Operands[*(p + 1)]->setConstraint("" ); |
| 5097 | ++NumMCOperands; |
| 5098 | break; |
| 5099 | } |
| 5100 | } |
| 5101 | } |
| 5102 | |
| 5103 | namespace { |
| 5104 | |
| 5105 | /// MatchClassKind - The kinds of classes which participate in |
| 5106 | /// instruction matching. |
| 5107 | enum MatchClassKind { |
| 5108 | InvalidMatchClass = 0, |
| 5109 | OptionalMatchClass = 1, |
| 5110 | MCK__DOT_, // '.' |
| 5111 | MCK_0, // '0' |
| 5112 | MCK_1, // '1' |
| 5113 | MCK_2, // '2' |
| 5114 | MCK_3, // '3' |
| 5115 | MCK_4, // '4' |
| 5116 | MCK_5, // '5' |
| 5117 | MCK_6, // '6' |
| 5118 | MCK_7, // '7' |
| 5119 | MCK_crD, // 'crD' |
| 5120 | MCK_LAST_TOKEN = MCK_crD, |
| 5121 | MCK_CTRRC, // register class 'CTRRC' |
| 5122 | MCK_CTRRC8, // register class 'CTRRC8' |
| 5123 | MCK_LR8RC, // register class 'LR8RC' |
| 5124 | MCK_LRRC, // register class 'LRRC' |
| 5125 | MCK_VRSAVERC, // register class 'VRSAVERC' |
| 5126 | MCK_CARRYRC, // register class 'CARRYRC' |
| 5127 | MCK_Reg45, // derived register class |
| 5128 | MCK_Reg42, // derived register class |
| 5129 | MCK_Reg46, // derived register class |
| 5130 | MCK_Reg43, // derived register class |
| 5131 | MCK_DMRpRC, // register class 'DMRpRC' |
| 5132 | MCK_Reg26, // derived register class |
| 5133 | MCK_Reg16, // derived register class |
| 5134 | MCK_ACCRC, // register class 'ACCRC' |
| 5135 | MCK_CRRC, // register class 'CRRC' |
| 5136 | MCK_DMRRC, // register class 'DMRRC' |
| 5137 | MCK_UACCRC, // register class 'UACCRC' |
| 5138 | MCK_WACCRC, // register class 'WACCRC' |
| 5139 | MCK_WACC_HIRC, // register class 'WACC_HIRC' |
| 5140 | MCK_Reg30, // derived register class |
| 5141 | MCK_Reg24, // derived register class |
| 5142 | MCK_Reg10, // derived register class |
| 5143 | MCK_Reg33, // derived register class |
| 5144 | MCK_Reg31, // derived register class |
| 5145 | MCK_Reg27, // derived register class |
| 5146 | MCK_FpRC, // register class 'FpRC' |
| 5147 | MCK_G8pRC, // register class 'G8pRC' |
| 5148 | MCK_Reg29, // derived register class |
| 5149 | MCK_Reg20, // derived register class |
| 5150 | MCK_Reg18, // derived register class |
| 5151 | MCK_Reg9, // derived register class |
| 5152 | MCK_CRBITRC, // register class 'CRBITRC' |
| 5153 | MCK_DMRROWpRC, // register class 'DMRROWpRC' |
| 5154 | MCK_F4RC, // register class 'F4RC,F8RC' |
| 5155 | MCK_FHRC, // register class 'FHRC' |
| 5156 | MCK_GPRC32, // register class 'GPRC32' |
| 5157 | MCK_SPERC, // register class 'SPERC' |
| 5158 | MCK_VFHRC, // register class 'VFHRC' |
| 5159 | MCK_VFRC, // register class 'VFRC' |
| 5160 | MCK_VRRC, // register class 'VRRC' |
| 5161 | MCK_VSLRC, // register class 'VSLRC' |
| 5162 | MCK_VSRpRC, // register class 'VSRpRC' |
| 5163 | MCK_Reg7, // derived register class |
| 5164 | MCK_Reg2, // derived register class |
| 5165 | MCK_Reg23, // derived register class |
| 5166 | MCK_Reg13, // derived register class |
| 5167 | MCK_G8RC, // register class 'G8RC' |
| 5168 | MCK_G8RC_NOX0, // register class 'G8RC_NOX0' |
| 5169 | MCK_GPRC, // register class 'GPRC' |
| 5170 | MCK_GPRC_NOR0, // register class 'GPRC_NOR0' |
| 5171 | MCK_DMRROWRC, // register class 'DMRROWRC' |
| 5172 | MCK_VSRC, // register class 'VSRC' |
| 5173 | MCK_VSSRC, // register class 'VSSRC,VSFRC' |
| 5174 | MCK_SPILLTOVSRRC, // register class 'SPILLTOVSRRC' |
| 5175 | MCK_LAST_REGISTER = MCK_SPILLTOVSRRC, |
| 5176 | MCK_RegByHwMode_ppc_ptr_rc, // register class by hwmode |
| 5177 | MCK_RegByHwMode_ptr_rc_idx_by_hwmode, // register class by hwmode |
| 5178 | MCK_RegByHwMode_ptr_rc_nor0_by_hwmode, // register class by hwmode |
| 5179 | MCK_LAST_REGCLASS_BY_HWMODE = MCK_RegByHwMode_ptr_rc_nor0_by_hwmode, |
| 5180 | MCK_Imm, // user defined class 'ImmAsmOperand' |
| 5181 | MCK_ATBitsAsHint, // user defined class 'PPCATBitsAsHintAsmOperand' |
| 5182 | MCK_CRBitMask, // user defined class 'PPCCRBitMaskOperand' |
| 5183 | MCK_CondBr, // user defined class 'PPCCondBrAsmOperand' |
| 5184 | MCK_DirectBr, // user defined class 'PPCDirectBrAsmOperand' |
| 5185 | MCK_DispRI34, // user defined class 'PPCDispRI34Operand' |
| 5186 | MCK_DispRIHash, // user defined class 'PPCDispRIHashOperand' |
| 5187 | MCK_DispRI, // user defined class 'PPCDispRIOperand' |
| 5188 | MCK_DispRIX16, // user defined class 'PPCDispRIX16Operand' |
| 5189 | MCK_DispRIX, // user defined class 'PPCDispRIXOperand' |
| 5190 | MCK_DispSPE2, // user defined class 'PPCDispSPE2Operand' |
| 5191 | MCK_DispSPE4, // user defined class 'PPCDispSPE4Operand' |
| 5192 | MCK_DispSPE8, // user defined class 'PPCDispSPE8Operand' |
| 5193 | MCK_ImmZero, // user defined class 'PPCImmZeroAsmOperand' |
| 5194 | MCK_RegACCRC, // user defined class 'PPCRegACCRCAsmOperand' |
| 5195 | MCK_RegCRBITRC, // user defined class 'PPCRegCRBITRCAsmOperand' |
| 5196 | MCK_RegCRRC, // user defined class 'PPCRegCRRCAsmOperand' |
| 5197 | MCK_RegDMRRC, // user defined class 'PPCRegDMRRCAsmOperand' |
| 5198 | MCK_RegDMRROWRC, // user defined class 'PPCRegDMRROWRCAsmOperand' |
| 5199 | MCK_RegDMRROWpRC, // user defined class 'PPCRegDMRROWpRCAsmOperand' |
| 5200 | MCK_RegDMRpRC, // user defined class 'PPCRegDMRpRCAsmOperand' |
| 5201 | MCK_RegF4RC, // user defined class 'PPCRegF4RCAsmOperand' |
| 5202 | MCK_RegF8RC, // user defined class 'PPCRegF8RCAsmOperand' |
| 5203 | MCK_RegFpRC, // user defined class 'PPCRegFpRCAsmOperand' |
| 5204 | MCK_RegG8RC, // user defined class 'PPCRegG8RCAsmOperand' |
| 5205 | MCK_RegG8RCNoX0, // user defined class 'PPCRegG8RCNoX0AsmOperand' |
| 5206 | MCK_RegG8pRC, // user defined class 'PPCRegG8pRCAsmOperand' |
| 5207 | MCK_RegGPRC, // user defined class 'PPCRegGPRCAsmOperand' |
| 5208 | MCK_RegGPRCNoR0, // user defined class 'PPCRegGPRCNoR0AsmOperand' |
| 5209 | MCK_RegGxRCNoR0, // user defined class 'PPCRegGxRCNoR0Operand' |
| 5210 | MCK_RegGxRC, // user defined class 'PPCRegGxRCOperand' |
| 5211 | MCK_RegSPE4RC, // user defined class 'PPCRegSPE4RCAsmOperand' |
| 5212 | MCK_RegSPERC, // user defined class 'PPCRegSPERCAsmOperand' |
| 5213 | MCK_RegSPILLTOVSRRC, // user defined class 'PPCRegSPILLTOVSRRCAsmOperand' |
| 5214 | MCK_RegVFRC, // user defined class 'PPCRegVFRCAsmOperand' |
| 5215 | MCK_RegVRRC, // user defined class 'PPCRegVRRCAsmOperand' |
| 5216 | MCK_RegVSFRC, // user defined class 'PPCRegVSFRCAsmOperand' |
| 5217 | MCK_RegVSRC, // user defined class 'PPCRegVSRCAsmOperand' |
| 5218 | MCK_RegVSRpEvenRC, // user defined class 'PPCRegVSRpEvenRCAsmOperand' |
| 5219 | MCK_RegVSRpRC, // user defined class 'PPCRegVSRpRCAsmOperand' |
| 5220 | MCK_RegVSSRC, // user defined class 'PPCRegVSSRCAsmOperand' |
| 5221 | MCK_S16Imm, // user defined class 'PPCS16ImmAsmOperand' |
| 5222 | MCK_S17Imm, // user defined class 'PPCS17ImmAsmOperand' |
| 5223 | MCK_S32Imm, // user defined class 'PPCS32ImmAsmOperand' |
| 5224 | MCK_S34Imm, // user defined class 'PPCS34ImmAsmOperand' |
| 5225 | MCK_S5Imm, // user defined class 'PPCS5ImmAsmOperand' |
| 5226 | MCK_TLSReg, // user defined class 'PPCTLSRegOperand' |
| 5227 | MCK_U10Imm, // user defined class 'PPCU10ImmAsmOperand' |
| 5228 | MCK_U12Imm, // user defined class 'PPCU12ImmAsmOperand' |
| 5229 | MCK_U16Imm, // user defined class 'PPCU16ImmAsmOperand' |
| 5230 | MCK_U1Imm, // user defined class 'PPCU1ImmAsmOperand' |
| 5231 | MCK_U2Imm, // user defined class 'PPCU2ImmAsmOperand' |
| 5232 | MCK_U3Imm, // user defined class 'PPCU3ImmAsmOperand' |
| 5233 | MCK_U4Imm, // user defined class 'PPCU4ImmAsmOperand' |
| 5234 | MCK_U5Imm, // user defined class 'PPCU5ImmAsmOperand' |
| 5235 | MCK_U6Imm, // user defined class 'PPCU6ImmAsmOperand' |
| 5236 | MCK_U7Imm, // user defined class 'PPCU7ImmAsmOperand' |
| 5237 | MCK_U8Imm, // user defined class 'PPCU8ImmAsmOperand' |
| 5238 | NumMatchClassKinds |
| 5239 | }; |
| 5240 | |
| 5241 | } // end anonymous namespace |
| 5242 | |
| 5243 | static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { |
| 5244 | return MCTargetAsmParser::Match_InvalidOperand; |
| 5245 | } |
| 5246 | |
| 5247 | static MatchClassKind matchTokenString(StringRef Name) { |
| 5248 | switch (Name.size()) { |
| 5249 | default: break; |
| 5250 | case 1: // 9 strings to match. |
| 5251 | switch (Name[0]) { |
| 5252 | default: break; |
| 5253 | case '.': // 1 string to match. |
| 5254 | return MCK__DOT_; // "." |
| 5255 | case '0': // 1 string to match. |
| 5256 | return MCK_0; // "0" |
| 5257 | case '1': // 1 string to match. |
| 5258 | return MCK_1; // "1" |
| 5259 | case '2': // 1 string to match. |
| 5260 | return MCK_2; // "2" |
| 5261 | case '3': // 1 string to match. |
| 5262 | return MCK_3; // "3" |
| 5263 | case '4': // 1 string to match. |
| 5264 | return MCK_4; // "4" |
| 5265 | case '5': // 1 string to match. |
| 5266 | return MCK_5; // "5" |
| 5267 | case '6': // 1 string to match. |
| 5268 | return MCK_6; // "6" |
| 5269 | case '7': // 1 string to match. |
| 5270 | return MCK_7; // "7" |
| 5271 | } |
| 5272 | break; |
| 5273 | case 3: // 1 string to match. |
| 5274 | if (memcmp(Name.data()+0, "crD" , 3) != 0) |
| 5275 | break; |
| 5276 | return MCK_crD; // "crD" |
| 5277 | } |
| 5278 | return InvalidMatchClass; |
| 5279 | } |
| 5280 | |
| 5281 | /// isSubclass - Compute whether \p A is a subclass of \p B. |
| 5282 | static bool isSubclass(MatchClassKind A, MatchClassKind B) { |
| 5283 | if (A == B) |
| 5284 | return true; |
| 5285 | |
| 5286 | [[maybe_unused]] static constexpr struct { |
| 5287 | uint32_t Offset; |
| 5288 | uint16_t Start; |
| 5289 | uint16_t Length; |
| 5290 | } Table[] = { |
| 5291 | {0, 0, 0}, |
| 5292 | {0, 0, 0}, |
| 5293 | {0, 0, 0}, |
| 5294 | {0, 0, 0}, |
| 5295 | {0, 0, 0}, |
| 5296 | {0, 0, 0}, |
| 5297 | {0, 0, 0}, |
| 5298 | {0, 0, 0}, |
| 5299 | {0, 0, 0}, |
| 5300 | {0, 0, 0}, |
| 5301 | {0, 0, 0}, |
| 5302 | {0, 0, 0}, |
| 5303 | {0, 0, 0}, |
| 5304 | {0, 0, 0}, |
| 5305 | {0, 0, 0}, |
| 5306 | {0, 0, 0}, |
| 5307 | {0, 0, 0}, |
| 5308 | {0, 0, 0}, |
| 5309 | {0, 20, 9}, |
| 5310 | {9, 21, 5}, |
| 5311 | {14, 28, 1}, |
| 5312 | {15, 25, 1}, |
| 5313 | {16, 0, 0}, |
| 5314 | {16, 36, 18}, |
| 5315 | {34, 37, 1}, |
| 5316 | {35, 0, 0}, |
| 5317 | {35, 0, 0}, |
| 5318 | {35, 0, 0}, |
| 5319 | {35, 0, 0}, |
| 5320 | {35, 0, 0}, |
| 5321 | {35, 0, 0}, |
| 5322 | {35, 35, 19}, |
| 5323 | {54, 52, 12}, |
| 5324 | {66, 45, 21}, |
| 5325 | {87, 38, 1}, |
| 5326 | {88, 53, 1}, |
| 5327 | {89, 53, 1}, |
| 5328 | {90, 0, 0}, |
| 5329 | {90, 0, 0}, |
| 5330 | {90, 53, 1}, |
| 5331 | {91, 51, 13}, |
| 5332 | {104, 50, 16}, |
| 5333 | {120, 48, 1}, |
| 5334 | {121, 0, 0}, |
| 5335 | {121, 0, 0}, |
| 5336 | {121, 64, 1}, |
| 5337 | {122, 0, 0}, |
| 5338 | {122, 0, 0}, |
| 5339 | {122, 0, 0}, |
| 5340 | {122, 0, 0}, |
| 5341 | {122, 64, 1}, |
| 5342 | {123, 63, 1}, |
| 5343 | {124, 63, 1}, |
| 5344 | {125, 0, 0}, |
| 5345 | {125, 58, 8}, |
| 5346 | {133, 60, 2}, |
| 5347 | {135, 63, 1}, |
| 5348 | {136, 64, 2}, |
| 5349 | {138, 65, 1}, |
| 5350 | {139, 0, 0}, |
| 5351 | {139, 0, 0}, |
| 5352 | {139, 0, 0}, |
| 5353 | {139, 0, 0}, |
| 5354 | {139, 0, 0}, |
| 5355 | {139, 0, 0}, |
| 5356 | {139, 0, 0}, |
| 5357 | {139, 0, 0}, |
| 5358 | {139, 0, 0}, |
| 5359 | {139, 0, 0}, |
| 5360 | {139, 0, 0}, |
| 5361 | {139, 0, 0}, |
| 5362 | {139, 0, 0}, |
| 5363 | {139, 0, 0}, |
| 5364 | {139, 0, 0}, |
| 5365 | {139, 0, 0}, |
| 5366 | {139, 0, 0}, |
| 5367 | {139, 0, 0}, |
| 5368 | {139, 0, 0}, |
| 5369 | {139, 0, 0}, |
| 5370 | {139, 0, 0}, |
| 5371 | {139, 0, 0}, |
| 5372 | {139, 0, 0}, |
| 5373 | {139, 0, 0}, |
| 5374 | {139, 0, 0}, |
| 5375 | {139, 0, 0}, |
| 5376 | {139, 0, 0}, |
| 5377 | {139, 0, 0}, |
| 5378 | {139, 0, 0}, |
| 5379 | {139, 0, 0}, |
| 5380 | {139, 0, 0}, |
| 5381 | {139, 0, 0}, |
| 5382 | {139, 0, 0}, |
| 5383 | {139, 0, 0}, |
| 5384 | {139, 0, 0}, |
| 5385 | {139, 0, 0}, |
| 5386 | {139, 0, 0}, |
| 5387 | {139, 0, 0}, |
| 5388 | {139, 0, 0}, |
| 5389 | {139, 0, 0}, |
| 5390 | {139, 0, 0}, |
| 5391 | {139, 0, 0}, |
| 5392 | {139, 0, 0}, |
| 5393 | {139, 0, 0}, |
| 5394 | {139, 0, 0}, |
| 5395 | {139, 0, 0}, |
| 5396 | {139, 0, 0}, |
| 5397 | {139, 0, 0}, |
| 5398 | {139, 0, 0}, |
| 5399 | {139, 0, 0}, |
| 5400 | {139, 0, 0}, |
| 5401 | {139, 0, 0}, |
| 5402 | {139, 0, 0}, |
| 5403 | {139, 0, 0}, |
| 5404 | {139, 0, 0}, |
| 5405 | {139, 0, 0}, |
| 5406 | {139, 0, 0}, |
| 5407 | {139, 0, 0}, |
| 5408 | {139, 0, 0}, |
| 5409 | {139, 0, 0}, |
| 5410 | {139, 0, 0}, |
| 5411 | {139, 0, 0}, |
| 5412 | {139, 0, 0}, |
| 5413 | {139, 0, 0}, |
| 5414 | {139, 0, 0}, |
| 5415 | {139, 0, 0}, |
| 5416 | {139, 0, 0}, |
| 5417 | {139, 0, 0}, |
| 5418 | }; |
| 5419 | |
| 5420 | static constexpr uint8_t Data[] = { |
| 5421 | 0x01, |
| 5422 | 0xE3, |
| 5423 | 0x09, |
| 5424 | 0x00, |
| 5425 | 0x8E, |
| 5426 | 0x00, |
| 5427 | 0x60, |
| 5428 | 0x04, |
| 5429 | 0x06, |
| 5430 | 0x40, |
| 5431 | 0xE0, |
| 5432 | 0x0F, |
| 5433 | 0x81, |
| 5434 | 0x81, |
| 5435 | 0xC0, |
| 5436 | 0x7F, |
| 5437 | 0xF0, |
| 5438 | 0x07, |
| 5439 | }; |
| 5440 | |
| 5441 | auto &Entry = Table[A]; |
| 5442 | unsigned Idx = B - Entry.Start; |
| 5443 | if (Idx >= Entry.Length) |
| 5444 | return false; |
| 5445 | Idx += Entry.Offset; |
| 5446 | return (Data[Idx / 8] >> (Idx % 8)) & 1; |
| 5447 | } |
| 5448 | |
| 5449 | static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind, const MCSubtargetInfo &STI) { |
| 5450 | PPCOperand &Operand = (PPCOperand &)GOp; |
| 5451 | if (Kind == InvalidMatchClass) |
| 5452 | return MCTargetAsmParser::Match_InvalidOperand; |
| 5453 | |
| 5454 | if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) |
| 5455 | return isSubclass(matchTokenString(Operand.getToken()), Kind) ? |
| 5456 | MCTargetAsmParser::Match_Success : |
| 5457 | MCTargetAsmParser::Match_InvalidOperand; |
| 5458 | |
| 5459 | switch (Kind) { |
| 5460 | default: break; |
| 5461 | case MCK_Imm: { |
| 5462 | DiagnosticPredicate DP(Operand.isImm()); |
| 5463 | if (DP.isMatch()) |
| 5464 | return MCTargetAsmParser::Match_Success; |
| 5465 | break; |
| 5466 | } |
| 5467 | case MCK_ATBitsAsHint: { |
| 5468 | DiagnosticPredicate DP(Operand.isATBitsAsHint()); |
| 5469 | if (DP.isMatch()) |
| 5470 | return MCTargetAsmParser::Match_Success; |
| 5471 | break; |
| 5472 | } |
| 5473 | case MCK_CRBitMask: { |
| 5474 | DiagnosticPredicate DP(Operand.isCRBitMask()); |
| 5475 | if (DP.isMatch()) |
| 5476 | return MCTargetAsmParser::Match_Success; |
| 5477 | break; |
| 5478 | } |
| 5479 | case MCK_CondBr: { |
| 5480 | DiagnosticPredicate DP(Operand.isCondBr()); |
| 5481 | if (DP.isMatch()) |
| 5482 | return MCTargetAsmParser::Match_Success; |
| 5483 | break; |
| 5484 | } |
| 5485 | case MCK_DirectBr: { |
| 5486 | DiagnosticPredicate DP(Operand.isDirectBr()); |
| 5487 | if (DP.isMatch()) |
| 5488 | return MCTargetAsmParser::Match_Success; |
| 5489 | break; |
| 5490 | } |
| 5491 | case MCK_DispRI34: { |
| 5492 | DiagnosticPredicate DP(Operand.isS34Imm()); |
| 5493 | if (DP.isMatch()) |
| 5494 | return MCTargetAsmParser::Match_Success; |
| 5495 | break; |
| 5496 | } |
| 5497 | case MCK_DispRIHash: { |
| 5498 | DiagnosticPredicate DP(Operand.isHashImmX8()); |
| 5499 | if (DP.isMatch()) |
| 5500 | return MCTargetAsmParser::Match_Success; |
| 5501 | break; |
| 5502 | } |
| 5503 | case MCK_DispRI: { |
| 5504 | DiagnosticPredicate DP(Operand.isS16Imm()); |
| 5505 | if (DP.isMatch()) |
| 5506 | return MCTargetAsmParser::Match_Success; |
| 5507 | break; |
| 5508 | } |
| 5509 | case MCK_DispRIX16: { |
| 5510 | DiagnosticPredicate DP(Operand.isS16ImmX16()); |
| 5511 | if (DP.isMatch()) |
| 5512 | return MCTargetAsmParser::Match_Success; |
| 5513 | break; |
| 5514 | } |
| 5515 | case MCK_DispRIX: { |
| 5516 | DiagnosticPredicate DP(Operand.isS16ImmX4()); |
| 5517 | if (DP.isMatch()) |
| 5518 | return MCTargetAsmParser::Match_Success; |
| 5519 | break; |
| 5520 | } |
| 5521 | case MCK_DispSPE2: { |
| 5522 | DiagnosticPredicate DP(Operand.isU6ImmX2()); |
| 5523 | if (DP.isMatch()) |
| 5524 | return MCTargetAsmParser::Match_Success; |
| 5525 | break; |
| 5526 | } |
| 5527 | case MCK_DispSPE4: { |
| 5528 | DiagnosticPredicate DP(Operand.isU7ImmX4()); |
| 5529 | if (DP.isMatch()) |
| 5530 | return MCTargetAsmParser::Match_Success; |
| 5531 | break; |
| 5532 | } |
| 5533 | case MCK_DispSPE8: { |
| 5534 | DiagnosticPredicate DP(Operand.isU8ImmX8()); |
| 5535 | if (DP.isMatch()) |
| 5536 | return MCTargetAsmParser::Match_Success; |
| 5537 | break; |
| 5538 | } |
| 5539 | case MCK_ImmZero: { |
| 5540 | DiagnosticPredicate DP(Operand.isImmZero()); |
| 5541 | if (DP.isMatch()) |
| 5542 | return MCTargetAsmParser::Match_Success; |
| 5543 | break; |
| 5544 | } |
| 5545 | case MCK_RegACCRC: { |
| 5546 | DiagnosticPredicate DP(Operand.isACCRegNumber()); |
| 5547 | if (DP.isMatch()) |
| 5548 | return MCTargetAsmParser::Match_Success; |
| 5549 | break; |
| 5550 | } |
| 5551 | case MCK_RegCRBITRC: { |
| 5552 | DiagnosticPredicate DP(Operand.isCRBitNumber()); |
| 5553 | if (DP.isMatch()) |
| 5554 | return MCTargetAsmParser::Match_Success; |
| 5555 | break; |
| 5556 | } |
| 5557 | case MCK_RegCRRC: { |
| 5558 | DiagnosticPredicate DP(Operand.isCCRegNumber()); |
| 5559 | if (DP.isMatch()) |
| 5560 | return MCTargetAsmParser::Match_Success; |
| 5561 | break; |
| 5562 | } |
| 5563 | case MCK_RegDMRRC: { |
| 5564 | DiagnosticPredicate DP(Operand.isDMRRegNumber()); |
| 5565 | if (DP.isMatch()) |
| 5566 | return MCTargetAsmParser::Match_Success; |
| 5567 | break; |
| 5568 | } |
| 5569 | case MCK_RegDMRROWRC: { |
| 5570 | DiagnosticPredicate DP(Operand.isDMRROWRegNumber()); |
| 5571 | if (DP.isMatch()) |
| 5572 | return MCTargetAsmParser::Match_Success; |
| 5573 | break; |
| 5574 | } |
| 5575 | case MCK_RegDMRROWpRC: { |
| 5576 | DiagnosticPredicate DP(Operand.isDMRROWpRegNumber()); |
| 5577 | if (DP.isMatch()) |
| 5578 | return MCTargetAsmParser::Match_Success; |
| 5579 | break; |
| 5580 | } |
| 5581 | case MCK_RegDMRpRC: { |
| 5582 | DiagnosticPredicate DP(Operand.isDMRpRegNumber()); |
| 5583 | if (DP.isMatch()) |
| 5584 | return MCTargetAsmParser::Match_Success; |
| 5585 | break; |
| 5586 | } |
| 5587 | case MCK_RegF4RC: { |
| 5588 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5589 | if (DP.isMatch()) |
| 5590 | return MCTargetAsmParser::Match_Success; |
| 5591 | break; |
| 5592 | } |
| 5593 | case MCK_RegF8RC: { |
| 5594 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5595 | if (DP.isMatch()) |
| 5596 | return MCTargetAsmParser::Match_Success; |
| 5597 | break; |
| 5598 | } |
| 5599 | case MCK_RegFpRC: { |
| 5600 | DiagnosticPredicate DP(Operand.isEvenRegNumber()); |
| 5601 | if (DP.isMatch()) |
| 5602 | return MCTargetAsmParser::Match_Success; |
| 5603 | break; |
| 5604 | } |
| 5605 | case MCK_RegG8RC: { |
| 5606 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5607 | if (DP.isMatch()) |
| 5608 | return MCTargetAsmParser::Match_Success; |
| 5609 | break; |
| 5610 | } |
| 5611 | case MCK_RegG8RCNoX0: { |
| 5612 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5613 | if (DP.isMatch()) |
| 5614 | return MCTargetAsmParser::Match_Success; |
| 5615 | break; |
| 5616 | } |
| 5617 | case MCK_RegG8pRC: { |
| 5618 | DiagnosticPredicate DP(Operand.isEvenRegNumber()); |
| 5619 | if (DP.isMatch()) |
| 5620 | return MCTargetAsmParser::Match_Success; |
| 5621 | break; |
| 5622 | } |
| 5623 | case MCK_RegGPRC: { |
| 5624 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5625 | if (DP.isMatch()) |
| 5626 | return MCTargetAsmParser::Match_Success; |
| 5627 | break; |
| 5628 | } |
| 5629 | case MCK_RegGPRCNoR0: { |
| 5630 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5631 | if (DP.isMatch()) |
| 5632 | return MCTargetAsmParser::Match_Success; |
| 5633 | break; |
| 5634 | } |
| 5635 | case MCK_RegGxRCNoR0: { |
| 5636 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5637 | if (DP.isMatch()) |
| 5638 | return MCTargetAsmParser::Match_Success; |
| 5639 | break; |
| 5640 | } |
| 5641 | case MCK_RegGxRC: { |
| 5642 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5643 | if (DP.isMatch()) |
| 5644 | return MCTargetAsmParser::Match_Success; |
| 5645 | break; |
| 5646 | } |
| 5647 | case MCK_RegSPE4RC: { |
| 5648 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5649 | if (DP.isMatch()) |
| 5650 | return MCTargetAsmParser::Match_Success; |
| 5651 | break; |
| 5652 | } |
| 5653 | case MCK_RegSPERC: { |
| 5654 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5655 | if (DP.isMatch()) |
| 5656 | return MCTargetAsmParser::Match_Success; |
| 5657 | break; |
| 5658 | } |
| 5659 | case MCK_RegSPILLTOVSRRC: { |
| 5660 | DiagnosticPredicate DP(Operand.isVSRegNumber()); |
| 5661 | if (DP.isMatch()) |
| 5662 | return MCTargetAsmParser::Match_Success; |
| 5663 | break; |
| 5664 | } |
| 5665 | case MCK_RegVFRC: { |
| 5666 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5667 | if (DP.isMatch()) |
| 5668 | return MCTargetAsmParser::Match_Success; |
| 5669 | break; |
| 5670 | } |
| 5671 | case MCK_RegVRRC: { |
| 5672 | DiagnosticPredicate DP(Operand.isRegNumber()); |
| 5673 | if (DP.isMatch()) |
| 5674 | return MCTargetAsmParser::Match_Success; |
| 5675 | break; |
| 5676 | } |
| 5677 | case MCK_RegVSFRC: { |
| 5678 | DiagnosticPredicate DP(Operand.isVSRegNumber()); |
| 5679 | if (DP.isMatch()) |
| 5680 | return MCTargetAsmParser::Match_Success; |
| 5681 | break; |
| 5682 | } |
| 5683 | case MCK_RegVSRC: { |
| 5684 | DiagnosticPredicate DP(Operand.isVSRegNumber()); |
| 5685 | if (DP.isMatch()) |
| 5686 | return MCTargetAsmParser::Match_Success; |
| 5687 | break; |
| 5688 | } |
| 5689 | case MCK_RegVSRpEvenRC: { |
| 5690 | DiagnosticPredicate DP(Operand.isVSRpEvenRegNumber()); |
| 5691 | if (DP.isMatch()) |
| 5692 | return MCTargetAsmParser::Match_Success; |
| 5693 | break; |
| 5694 | } |
| 5695 | case MCK_RegVSRpRC: { |
| 5696 | DiagnosticPredicate DP(Operand.isVSRpEvenRegNumber()); |
| 5697 | if (DP.isMatch()) |
| 5698 | return MCTargetAsmParser::Match_Success; |
| 5699 | break; |
| 5700 | } |
| 5701 | case MCK_RegVSSRC: { |
| 5702 | DiagnosticPredicate DP(Operand.isVSRegNumber()); |
| 5703 | if (DP.isMatch()) |
| 5704 | return MCTargetAsmParser::Match_Success; |
| 5705 | break; |
| 5706 | } |
| 5707 | case MCK_S16Imm: { |
| 5708 | DiagnosticPredicate DP(Operand.isS16Imm()); |
| 5709 | if (DP.isMatch()) |
| 5710 | return MCTargetAsmParser::Match_Success; |
| 5711 | break; |
| 5712 | } |
| 5713 | case MCK_S17Imm: { |
| 5714 | DiagnosticPredicate DP(Operand.isS17Imm()); |
| 5715 | if (DP.isMatch()) |
| 5716 | return MCTargetAsmParser::Match_Success; |
| 5717 | break; |
| 5718 | } |
| 5719 | case MCK_S32Imm: { |
| 5720 | DiagnosticPredicate DP(Operand.isS32Imm()); |
| 5721 | if (DP.isMatch()) |
| 5722 | return MCTargetAsmParser::Match_Success; |
| 5723 | break; |
| 5724 | } |
| 5725 | case MCK_S34Imm: { |
| 5726 | DiagnosticPredicate DP(Operand.isS34Imm()); |
| 5727 | if (DP.isMatch()) |
| 5728 | return MCTargetAsmParser::Match_Success; |
| 5729 | break; |
| 5730 | } |
| 5731 | case MCK_S5Imm: { |
| 5732 | DiagnosticPredicate DP(Operand.isSImm<5>()); |
| 5733 | if (DP.isMatch()) |
| 5734 | return MCTargetAsmParser::Match_Success; |
| 5735 | break; |
| 5736 | } |
| 5737 | case MCK_TLSReg: { |
| 5738 | DiagnosticPredicate DP(Operand.isTLSReg()); |
| 5739 | if (DP.isMatch()) |
| 5740 | return MCTargetAsmParser::Match_Success; |
| 5741 | break; |
| 5742 | } |
| 5743 | case MCK_U10Imm: { |
| 5744 | DiagnosticPredicate DP(Operand.isUImm<10>()); |
| 5745 | if (DP.isMatch()) |
| 5746 | return MCTargetAsmParser::Match_Success; |
| 5747 | break; |
| 5748 | } |
| 5749 | case MCK_U12Imm: { |
| 5750 | DiagnosticPredicate DP(Operand.isUImm<12>()); |
| 5751 | if (DP.isMatch()) |
| 5752 | return MCTargetAsmParser::Match_Success; |
| 5753 | break; |
| 5754 | } |
| 5755 | case MCK_U16Imm: { |
| 5756 | DiagnosticPredicate DP(Operand.isU16Imm()); |
| 5757 | if (DP.isMatch()) |
| 5758 | return MCTargetAsmParser::Match_Success; |
| 5759 | break; |
| 5760 | } |
| 5761 | case MCK_U1Imm: { |
| 5762 | DiagnosticPredicate DP(Operand.isUImm<1>()); |
| 5763 | if (DP.isMatch()) |
| 5764 | return MCTargetAsmParser::Match_Success; |
| 5765 | break; |
| 5766 | } |
| 5767 | case MCK_U2Imm: { |
| 5768 | DiagnosticPredicate DP(Operand.isUImm<2>()); |
| 5769 | if (DP.isMatch()) |
| 5770 | return MCTargetAsmParser::Match_Success; |
| 5771 | break; |
| 5772 | } |
| 5773 | case MCK_U3Imm: { |
| 5774 | DiagnosticPredicate DP(Operand.isUImm<3>()); |
| 5775 | if (DP.isMatch()) |
| 5776 | return MCTargetAsmParser::Match_Success; |
| 5777 | break; |
| 5778 | } |
| 5779 | case MCK_U4Imm: { |
| 5780 | DiagnosticPredicate DP(Operand.isUImm<4>()); |
| 5781 | if (DP.isMatch()) |
| 5782 | return MCTargetAsmParser::Match_Success; |
| 5783 | break; |
| 5784 | } |
| 5785 | case MCK_U5Imm: { |
| 5786 | DiagnosticPredicate DP(Operand.isUImm<5>()); |
| 5787 | if (DP.isMatch()) |
| 5788 | return MCTargetAsmParser::Match_Success; |
| 5789 | break; |
| 5790 | } |
| 5791 | case MCK_U6Imm: { |
| 5792 | DiagnosticPredicate DP(Operand.isUImm<6>()); |
| 5793 | if (DP.isMatch()) |
| 5794 | return MCTargetAsmParser::Match_Success; |
| 5795 | break; |
| 5796 | } |
| 5797 | case MCK_U7Imm: { |
| 5798 | DiagnosticPredicate DP(Operand.isUImm<7>()); |
| 5799 | if (DP.isMatch()) |
| 5800 | return MCTargetAsmParser::Match_Success; |
| 5801 | break; |
| 5802 | } |
| 5803 | case MCK_U8Imm: { |
| 5804 | DiagnosticPredicate DP(Operand.isUImm<8>()); |
| 5805 | if (DP.isMatch()) |
| 5806 | return MCTargetAsmParser::Match_Success; |
| 5807 | break; |
| 5808 | } |
| 5809 | } // end switch (Kind) |
| 5810 | |
| 5811 | if (Operand.isReg() && Kind > MCK_LAST_REGISTER && Kind <= MCK_LAST_REGCLASS_BY_HWMODE) { |
| 5812 | static constexpr MatchClassKind RegClassByHwModeMatchTable[2][3] = { |
| 5813 | { // DefaultMode |
| 5814 | MCK_GPRC, // ppc_ptr_rc |
| 5815 | MCK_GPRC, // ptr_rc_idx_by_hwmode |
| 5816 | MCK_GPRC_NOR0, // ptr_rc_nor0_by_hwmode |
| 5817 | }, |
| 5818 | { // PPC64 |
| 5819 | MCK_G8RC, // ppc_ptr_rc |
| 5820 | MCK_G8RC, // ptr_rc_idx_by_hwmode |
| 5821 | MCK_G8RC_NOX0, // ptr_rc_nor0_by_hwmode |
| 5822 | }, |
| 5823 | }; |
| 5824 | |
| 5825 | static_assert(MCK_LAST_REGCLASS_BY_HWMODE - MCK_LAST_REGISTER == 3); |
| 5826 | const unsigned HwMode = STI.getHwMode(MCSubtargetInfo::HwMode_RegInfo); |
| 5827 | Kind = RegClassByHwModeMatchTable[HwMode][Kind - (MCK_LAST_REGISTER + 1)]; |
| 5828 | } |
| 5829 | |
| 5830 | if (Operand.isReg()) { |
| 5831 | static constexpr uint16_t Table[PPC::NUM_TARGET_REGS] = { |
| 5832 | InvalidMatchClass, |
| 5833 | MCK_Reg2, |
| 5834 | MCK_CARRYRC, |
| 5835 | MCK_CTRRC, |
| 5836 | MCK_Reg2, |
| 5837 | MCK_LRRC, |
| 5838 | InvalidMatchClass, |
| 5839 | InvalidMatchClass, |
| 5840 | MCK_VRSAVERC, |
| 5841 | MCK_CARRYRC, |
| 5842 | MCK_GPRC_NOR0, |
| 5843 | MCK_Reg42, |
| 5844 | MCK_Reg42, |
| 5845 | MCK_Reg42, |
| 5846 | MCK_Reg43, |
| 5847 | MCK_ACCRC, |
| 5848 | MCK_ACCRC, |
| 5849 | MCK_ACCRC, |
| 5850 | MCK_ACCRC, |
| 5851 | MCK_Reg7, |
| 5852 | MCK_CRRC, |
| 5853 | MCK_CRRC, |
| 5854 | MCK_CRRC, |
| 5855 | MCK_CRRC, |
| 5856 | MCK_CRRC, |
| 5857 | MCK_CRRC, |
| 5858 | MCK_CRRC, |
| 5859 | MCK_CRRC, |
| 5860 | MCK_CTRRC8, |
| 5861 | MCK_DMRRC, |
| 5862 | MCK_DMRRC, |
| 5863 | MCK_DMRRC, |
| 5864 | MCK_DMRRC, |
| 5865 | MCK_DMRRC, |
| 5866 | MCK_DMRRC, |
| 5867 | MCK_DMRRC, |
| 5868 | MCK_DMRRC, |
| 5869 | MCK_DMRROWRC, |
| 5870 | MCK_DMRROWRC, |
| 5871 | MCK_DMRROWRC, |
| 5872 | MCK_DMRROWRC, |
| 5873 | MCK_DMRROWRC, |
| 5874 | MCK_DMRROWRC, |
| 5875 | MCK_DMRROWRC, |
| 5876 | MCK_DMRROWRC, |
| 5877 | MCK_DMRROWRC, |
| 5878 | MCK_DMRROWRC, |
| 5879 | MCK_DMRROWRC, |
| 5880 | MCK_DMRROWRC, |
| 5881 | MCK_DMRROWRC, |
| 5882 | MCK_DMRROWRC, |
| 5883 | MCK_DMRROWRC, |
| 5884 | MCK_DMRROWRC, |
| 5885 | MCK_DMRROWRC, |
| 5886 | MCK_DMRROWRC, |
| 5887 | MCK_DMRROWRC, |
| 5888 | MCK_DMRROWRC, |
| 5889 | MCK_DMRROWRC, |
| 5890 | MCK_DMRROWRC, |
| 5891 | MCK_DMRROWRC, |
| 5892 | MCK_DMRROWRC, |
| 5893 | MCK_DMRROWRC, |
| 5894 | MCK_DMRROWRC, |
| 5895 | MCK_DMRROWRC, |
| 5896 | MCK_DMRROWRC, |
| 5897 | MCK_DMRROWRC, |
| 5898 | MCK_DMRROWRC, |
| 5899 | MCK_DMRROWRC, |
| 5900 | MCK_DMRROWRC, |
| 5901 | MCK_DMRROWRC, |
| 5902 | MCK_DMRROWRC, |
| 5903 | MCK_DMRROWRC, |
| 5904 | MCK_DMRROWRC, |
| 5905 | MCK_DMRROWRC, |
| 5906 | MCK_DMRROWRC, |
| 5907 | MCK_DMRROWRC, |
| 5908 | MCK_DMRROWRC, |
| 5909 | MCK_DMRROWRC, |
| 5910 | MCK_DMRROWRC, |
| 5911 | MCK_DMRROWRC, |
| 5912 | MCK_DMRROWRC, |
| 5913 | MCK_DMRROWRC, |
| 5914 | MCK_DMRROWRC, |
| 5915 | MCK_DMRROWRC, |
| 5916 | MCK_DMRROWRC, |
| 5917 | MCK_DMRROWRC, |
| 5918 | MCK_DMRROWRC, |
| 5919 | MCK_DMRROWRC, |
| 5920 | MCK_DMRROWRC, |
| 5921 | MCK_DMRROWRC, |
| 5922 | MCK_DMRROWRC, |
| 5923 | MCK_DMRROWRC, |
| 5924 | MCK_DMRROWRC, |
| 5925 | MCK_DMRROWRC, |
| 5926 | MCK_DMRROWRC, |
| 5927 | MCK_DMRROWRC, |
| 5928 | MCK_DMRROWRC, |
| 5929 | MCK_DMRROWRC, |
| 5930 | MCK_DMRROWRC, |
| 5931 | MCK_DMRROWRC, |
| 5932 | MCK_DMRROWRC, |
| 5933 | MCK_DMRROWpRC, |
| 5934 | MCK_DMRROWpRC, |
| 5935 | MCK_DMRROWpRC, |
| 5936 | MCK_DMRROWpRC, |
| 5937 | MCK_DMRROWpRC, |
| 5938 | MCK_DMRROWpRC, |
| 5939 | MCK_DMRROWpRC, |
| 5940 | MCK_DMRROWpRC, |
| 5941 | MCK_DMRROWpRC, |
| 5942 | MCK_DMRROWpRC, |
| 5943 | MCK_DMRROWpRC, |
| 5944 | MCK_DMRROWpRC, |
| 5945 | MCK_DMRROWpRC, |
| 5946 | MCK_DMRROWpRC, |
| 5947 | MCK_DMRROWpRC, |
| 5948 | MCK_DMRROWpRC, |
| 5949 | MCK_DMRROWpRC, |
| 5950 | MCK_DMRROWpRC, |
| 5951 | MCK_DMRROWpRC, |
| 5952 | MCK_DMRROWpRC, |
| 5953 | MCK_DMRROWpRC, |
| 5954 | MCK_DMRROWpRC, |
| 5955 | MCK_DMRROWpRC, |
| 5956 | MCK_DMRROWpRC, |
| 5957 | MCK_DMRROWpRC, |
| 5958 | MCK_DMRROWpRC, |
| 5959 | MCK_DMRROWpRC, |
| 5960 | MCK_DMRROWpRC, |
| 5961 | MCK_DMRROWpRC, |
| 5962 | MCK_DMRROWpRC, |
| 5963 | MCK_DMRROWpRC, |
| 5964 | MCK_DMRROWpRC, |
| 5965 | MCK_DMRpRC, |
| 5966 | MCK_DMRpRC, |
| 5967 | MCK_DMRpRC, |
| 5968 | MCK_DMRpRC, |
| 5969 | MCK_Reg10, |
| 5970 | MCK_Reg10, |
| 5971 | MCK_Reg10, |
| 5972 | MCK_Reg10, |
| 5973 | MCK_Reg10, |
| 5974 | MCK_Reg10, |
| 5975 | MCK_Reg10, |
| 5976 | MCK_Reg10, |
| 5977 | MCK_Reg10, |
| 5978 | MCK_Reg10, |
| 5979 | MCK_Reg10, |
| 5980 | MCK_Reg10, |
| 5981 | MCK_Reg10, |
| 5982 | MCK_Reg10, |
| 5983 | MCK_F4RC, |
| 5984 | MCK_F4RC, |
| 5985 | MCK_F4RC, |
| 5986 | MCK_F4RC, |
| 5987 | MCK_F4RC, |
| 5988 | MCK_F4RC, |
| 5989 | MCK_F4RC, |
| 5990 | MCK_F4RC, |
| 5991 | MCK_F4RC, |
| 5992 | MCK_F4RC, |
| 5993 | MCK_F4RC, |
| 5994 | MCK_F4RC, |
| 5995 | MCK_F4RC, |
| 5996 | MCK_F4RC, |
| 5997 | MCK_F4RC, |
| 5998 | MCK_F4RC, |
| 5999 | MCK_F4RC, |
| 6000 | MCK_F4RC, |
| 6001 | MCK_FHRC, |
| 6002 | MCK_FHRC, |
| 6003 | MCK_FHRC, |
| 6004 | MCK_FHRC, |
| 6005 | MCK_FHRC, |
| 6006 | MCK_FHRC, |
| 6007 | MCK_FHRC, |
| 6008 | MCK_FHRC, |
| 6009 | MCK_FHRC, |
| 6010 | MCK_FHRC, |
| 6011 | MCK_FHRC, |
| 6012 | MCK_FHRC, |
| 6013 | MCK_FHRC, |
| 6014 | MCK_FHRC, |
| 6015 | MCK_FHRC, |
| 6016 | MCK_FHRC, |
| 6017 | MCK_FHRC, |
| 6018 | MCK_FHRC, |
| 6019 | MCK_FHRC, |
| 6020 | MCK_FHRC, |
| 6021 | MCK_FHRC, |
| 6022 | MCK_FHRC, |
| 6023 | MCK_FHRC, |
| 6024 | MCK_FHRC, |
| 6025 | MCK_FHRC, |
| 6026 | MCK_FHRC, |
| 6027 | MCK_FHRC, |
| 6028 | MCK_FHRC, |
| 6029 | MCK_FHRC, |
| 6030 | MCK_FHRC, |
| 6031 | MCK_FHRC, |
| 6032 | MCK_FHRC, |
| 6033 | MCK_Reg7, |
| 6034 | MCK_Reg16, |
| 6035 | MCK_Reg16, |
| 6036 | MCK_Reg16, |
| 6037 | MCK_Reg16, |
| 6038 | MCK_Reg16, |
| 6039 | MCK_Reg16, |
| 6040 | MCK_Reg16, |
| 6041 | MCK_FpRC, |
| 6042 | MCK_FpRC, |
| 6043 | MCK_FpRC, |
| 6044 | MCK_FpRC, |
| 6045 | MCK_FpRC, |
| 6046 | MCK_FpRC, |
| 6047 | MCK_FpRC, |
| 6048 | MCK_FpRC, |
| 6049 | MCK_FpRC, |
| 6050 | MCK_GPRC32, |
| 6051 | MCK_GPRC32, |
| 6052 | MCK_GPRC32, |
| 6053 | MCK_GPRC32, |
| 6054 | MCK_GPRC32, |
| 6055 | MCK_GPRC32, |
| 6056 | MCK_GPRC32, |
| 6057 | MCK_GPRC32, |
| 6058 | MCK_GPRC32, |
| 6059 | MCK_GPRC32, |
| 6060 | MCK_GPRC32, |
| 6061 | MCK_GPRC32, |
| 6062 | MCK_GPRC32, |
| 6063 | MCK_GPRC32, |
| 6064 | MCK_GPRC32, |
| 6065 | MCK_GPRC32, |
| 6066 | MCK_GPRC32, |
| 6067 | MCK_GPRC32, |
| 6068 | MCK_GPRC32, |
| 6069 | MCK_GPRC32, |
| 6070 | MCK_GPRC32, |
| 6071 | MCK_GPRC32, |
| 6072 | MCK_GPRC32, |
| 6073 | MCK_GPRC32, |
| 6074 | MCK_GPRC32, |
| 6075 | MCK_GPRC32, |
| 6076 | MCK_GPRC32, |
| 6077 | MCK_GPRC32, |
| 6078 | MCK_GPRC32, |
| 6079 | MCK_GPRC32, |
| 6080 | MCK_GPRC32, |
| 6081 | MCK_GPRC32, |
| 6082 | MCK_LR8RC, |
| 6083 | MCK_GPRC, |
| 6084 | MCK_Reg2, |
| 6085 | MCK_Reg2, |
| 6086 | MCK_Reg2, |
| 6087 | MCK_Reg2, |
| 6088 | MCK_Reg2, |
| 6089 | MCK_Reg2, |
| 6090 | MCK_Reg2, |
| 6091 | MCK_Reg2, |
| 6092 | MCK_Reg2, |
| 6093 | MCK_Reg2, |
| 6094 | MCK_Reg2, |
| 6095 | MCK_Reg2, |
| 6096 | MCK_Reg2, |
| 6097 | MCK_Reg2, |
| 6098 | MCK_Reg2, |
| 6099 | MCK_Reg2, |
| 6100 | MCK_Reg2, |
| 6101 | MCK_Reg2, |
| 6102 | MCK_Reg2, |
| 6103 | MCK_Reg2, |
| 6104 | MCK_Reg2, |
| 6105 | MCK_Reg2, |
| 6106 | MCK_Reg2, |
| 6107 | MCK_Reg2, |
| 6108 | MCK_Reg2, |
| 6109 | MCK_Reg2, |
| 6110 | MCK_Reg2, |
| 6111 | MCK_Reg2, |
| 6112 | MCK_Reg2, |
| 6113 | MCK_Reg2, |
| 6114 | MCK_Reg2, |
| 6115 | MCK_SPERC, |
| 6116 | MCK_Reg9, |
| 6117 | MCK_Reg9, |
| 6118 | MCK_Reg9, |
| 6119 | MCK_Reg9, |
| 6120 | MCK_Reg9, |
| 6121 | MCK_Reg9, |
| 6122 | MCK_Reg9, |
| 6123 | MCK_Reg9, |
| 6124 | MCK_Reg9, |
| 6125 | MCK_Reg9, |
| 6126 | MCK_Reg9, |
| 6127 | MCK_Reg9, |
| 6128 | MCK_Reg9, |
| 6129 | MCK_Reg9, |
| 6130 | MCK_Reg9, |
| 6131 | MCK_Reg9, |
| 6132 | MCK_Reg9, |
| 6133 | MCK_Reg9, |
| 6134 | MCK_Reg9, |
| 6135 | MCK_Reg9, |
| 6136 | MCK_Reg9, |
| 6137 | MCK_Reg9, |
| 6138 | MCK_Reg9, |
| 6139 | MCK_Reg9, |
| 6140 | MCK_Reg9, |
| 6141 | MCK_Reg9, |
| 6142 | MCK_Reg9, |
| 6143 | MCK_Reg9, |
| 6144 | MCK_Reg9, |
| 6145 | MCK_Reg9, |
| 6146 | MCK_Reg9, |
| 6147 | MCK_Reg45, |
| 6148 | MCK_Reg45, |
| 6149 | MCK_Reg45, |
| 6150 | MCK_Reg46, |
| 6151 | MCK_UACCRC, |
| 6152 | MCK_UACCRC, |
| 6153 | MCK_UACCRC, |
| 6154 | MCK_UACCRC, |
| 6155 | MCK_Reg20, |
| 6156 | MCK_Reg20, |
| 6157 | MCK_Reg20, |
| 6158 | MCK_Reg20, |
| 6159 | MCK_Reg20, |
| 6160 | MCK_Reg20, |
| 6161 | MCK_Reg20, |
| 6162 | MCK_Reg20, |
| 6163 | MCK_Reg20, |
| 6164 | MCK_Reg20, |
| 6165 | MCK_Reg20, |
| 6166 | MCK_Reg20, |
| 6167 | MCK_Reg20, |
| 6168 | MCK_Reg20, |
| 6169 | MCK_Reg20, |
| 6170 | MCK_Reg20, |
| 6171 | MCK_Reg20, |
| 6172 | MCK_Reg20, |
| 6173 | MCK_Reg20, |
| 6174 | MCK_Reg20, |
| 6175 | MCK_VRRC, |
| 6176 | MCK_VRRC, |
| 6177 | MCK_VRRC, |
| 6178 | MCK_VRRC, |
| 6179 | MCK_VRRC, |
| 6180 | MCK_VRRC, |
| 6181 | MCK_VRRC, |
| 6182 | MCK_VRRC, |
| 6183 | MCK_VRRC, |
| 6184 | MCK_VRRC, |
| 6185 | MCK_VRRC, |
| 6186 | MCK_VRRC, |
| 6187 | MCK_Reg18, |
| 6188 | MCK_Reg18, |
| 6189 | MCK_Reg18, |
| 6190 | MCK_Reg18, |
| 6191 | MCK_Reg18, |
| 6192 | MCK_Reg18, |
| 6193 | MCK_Reg18, |
| 6194 | MCK_Reg18, |
| 6195 | MCK_Reg18, |
| 6196 | MCK_Reg18, |
| 6197 | MCK_Reg18, |
| 6198 | MCK_Reg18, |
| 6199 | MCK_Reg18, |
| 6200 | MCK_Reg18, |
| 6201 | MCK_Reg18, |
| 6202 | MCK_Reg18, |
| 6203 | MCK_Reg18, |
| 6204 | MCK_Reg18, |
| 6205 | MCK_Reg18, |
| 6206 | MCK_Reg18, |
| 6207 | MCK_VFRC, |
| 6208 | MCK_VFRC, |
| 6209 | MCK_VFRC, |
| 6210 | MCK_VFRC, |
| 6211 | MCK_VFRC, |
| 6212 | MCK_VFRC, |
| 6213 | MCK_VFRC, |
| 6214 | MCK_VFRC, |
| 6215 | MCK_VFRC, |
| 6216 | MCK_VFRC, |
| 6217 | MCK_VFRC, |
| 6218 | MCK_VFRC, |
| 6219 | MCK_VFHRC, |
| 6220 | MCK_VFHRC, |
| 6221 | MCK_VFHRC, |
| 6222 | MCK_VFHRC, |
| 6223 | MCK_VFHRC, |
| 6224 | MCK_VFHRC, |
| 6225 | MCK_VFHRC, |
| 6226 | MCK_VFHRC, |
| 6227 | MCK_VFHRC, |
| 6228 | MCK_VFHRC, |
| 6229 | MCK_VFHRC, |
| 6230 | MCK_VFHRC, |
| 6231 | MCK_VFHRC, |
| 6232 | MCK_VFHRC, |
| 6233 | MCK_VFHRC, |
| 6234 | MCK_VFHRC, |
| 6235 | MCK_VFHRC, |
| 6236 | MCK_VFHRC, |
| 6237 | MCK_VFHRC, |
| 6238 | MCK_VFHRC, |
| 6239 | MCK_VFHRC, |
| 6240 | MCK_VFHRC, |
| 6241 | MCK_VFHRC, |
| 6242 | MCK_VFHRC, |
| 6243 | MCK_VFHRC, |
| 6244 | MCK_VFHRC, |
| 6245 | MCK_VFHRC, |
| 6246 | MCK_VFHRC, |
| 6247 | MCK_VFHRC, |
| 6248 | MCK_VFHRC, |
| 6249 | MCK_VFHRC, |
| 6250 | MCK_VFHRC, |
| 6251 | MCK_Reg24, |
| 6252 | MCK_Reg24, |
| 6253 | MCK_Reg24, |
| 6254 | MCK_Reg24, |
| 6255 | MCK_Reg24, |
| 6256 | MCK_Reg24, |
| 6257 | MCK_Reg24, |
| 6258 | MCK_Reg24, |
| 6259 | MCK_Reg24, |
| 6260 | MCK_Reg24, |
| 6261 | MCK_Reg24, |
| 6262 | MCK_Reg24, |
| 6263 | MCK_Reg24, |
| 6264 | MCK_Reg24, |
| 6265 | MCK_VSLRC, |
| 6266 | MCK_VSLRC, |
| 6267 | MCK_VSLRC, |
| 6268 | MCK_VSLRC, |
| 6269 | MCK_VSLRC, |
| 6270 | MCK_VSLRC, |
| 6271 | MCK_VSLRC, |
| 6272 | MCK_VSLRC, |
| 6273 | MCK_VSLRC, |
| 6274 | MCK_VSLRC, |
| 6275 | MCK_VSLRC, |
| 6276 | MCK_VSLRC, |
| 6277 | MCK_VSLRC, |
| 6278 | MCK_VSLRC, |
| 6279 | MCK_VSLRC, |
| 6280 | MCK_VSLRC, |
| 6281 | MCK_VSLRC, |
| 6282 | MCK_VSLRC, |
| 6283 | MCK_Reg26, |
| 6284 | MCK_Reg26, |
| 6285 | MCK_Reg26, |
| 6286 | MCK_Reg26, |
| 6287 | MCK_Reg26, |
| 6288 | MCK_Reg26, |
| 6289 | MCK_Reg26, |
| 6290 | MCK_Reg27, |
| 6291 | MCK_Reg27, |
| 6292 | MCK_Reg27, |
| 6293 | MCK_Reg27, |
| 6294 | MCK_Reg27, |
| 6295 | MCK_Reg27, |
| 6296 | MCK_Reg27, |
| 6297 | MCK_Reg27, |
| 6298 | MCK_Reg27, |
| 6299 | MCK_Reg30, |
| 6300 | MCK_Reg30, |
| 6301 | MCK_Reg30, |
| 6302 | MCK_Reg30, |
| 6303 | MCK_Reg30, |
| 6304 | MCK_Reg30, |
| 6305 | MCK_Reg30, |
| 6306 | MCK_Reg30, |
| 6307 | MCK_Reg30, |
| 6308 | MCK_Reg30, |
| 6309 | MCK_Reg31, |
| 6310 | MCK_Reg31, |
| 6311 | MCK_Reg31, |
| 6312 | MCK_Reg31, |
| 6313 | MCK_Reg31, |
| 6314 | MCK_Reg31, |
| 6315 | InvalidMatchClass, |
| 6316 | InvalidMatchClass, |
| 6317 | InvalidMatchClass, |
| 6318 | InvalidMatchClass, |
| 6319 | InvalidMatchClass, |
| 6320 | InvalidMatchClass, |
| 6321 | InvalidMatchClass, |
| 6322 | InvalidMatchClass, |
| 6323 | InvalidMatchClass, |
| 6324 | InvalidMatchClass, |
| 6325 | InvalidMatchClass, |
| 6326 | InvalidMatchClass, |
| 6327 | InvalidMatchClass, |
| 6328 | InvalidMatchClass, |
| 6329 | InvalidMatchClass, |
| 6330 | InvalidMatchClass, |
| 6331 | InvalidMatchClass, |
| 6332 | InvalidMatchClass, |
| 6333 | InvalidMatchClass, |
| 6334 | InvalidMatchClass, |
| 6335 | InvalidMatchClass, |
| 6336 | InvalidMatchClass, |
| 6337 | InvalidMatchClass, |
| 6338 | InvalidMatchClass, |
| 6339 | InvalidMatchClass, |
| 6340 | InvalidMatchClass, |
| 6341 | InvalidMatchClass, |
| 6342 | InvalidMatchClass, |
| 6343 | InvalidMatchClass, |
| 6344 | InvalidMatchClass, |
| 6345 | InvalidMatchClass, |
| 6346 | InvalidMatchClass, |
| 6347 | MCK_WACCRC, |
| 6348 | MCK_WACCRC, |
| 6349 | MCK_WACCRC, |
| 6350 | MCK_WACCRC, |
| 6351 | MCK_WACCRC, |
| 6352 | MCK_WACCRC, |
| 6353 | MCK_WACCRC, |
| 6354 | MCK_WACCRC, |
| 6355 | MCK_WACC_HIRC, |
| 6356 | MCK_WACC_HIRC, |
| 6357 | MCK_WACC_HIRC, |
| 6358 | MCK_WACC_HIRC, |
| 6359 | MCK_WACC_HIRC, |
| 6360 | MCK_WACC_HIRC, |
| 6361 | MCK_WACC_HIRC, |
| 6362 | MCK_WACC_HIRC, |
| 6363 | MCK_G8RC, |
| 6364 | MCK_Reg7, |
| 6365 | MCK_Reg7, |
| 6366 | MCK_Reg7, |
| 6367 | MCK_Reg7, |
| 6368 | MCK_Reg7, |
| 6369 | MCK_Reg7, |
| 6370 | MCK_Reg7, |
| 6371 | MCK_Reg7, |
| 6372 | MCK_Reg7, |
| 6373 | MCK_Reg7, |
| 6374 | MCK_Reg7, |
| 6375 | MCK_Reg7, |
| 6376 | MCK_Reg7, |
| 6377 | MCK_Reg7, |
| 6378 | MCK_Reg7, |
| 6379 | MCK_Reg7, |
| 6380 | MCK_Reg7, |
| 6381 | MCK_Reg7, |
| 6382 | MCK_Reg7, |
| 6383 | MCK_Reg7, |
| 6384 | MCK_Reg7, |
| 6385 | MCK_Reg7, |
| 6386 | MCK_Reg7, |
| 6387 | MCK_Reg7, |
| 6388 | MCK_Reg7, |
| 6389 | MCK_Reg7, |
| 6390 | MCK_Reg7, |
| 6391 | MCK_Reg7, |
| 6392 | MCK_Reg7, |
| 6393 | MCK_Reg7, |
| 6394 | MCK_Reg7, |
| 6395 | MCK_G8RC_NOX0, |
| 6396 | MCK_CRBITRC, |
| 6397 | MCK_CRBITRC, |
| 6398 | MCK_CRBITRC, |
| 6399 | MCK_CRBITRC, |
| 6400 | MCK_CRBITRC, |
| 6401 | MCK_CRBITRC, |
| 6402 | MCK_CRBITRC, |
| 6403 | MCK_CRBITRC, |
| 6404 | MCK_CRBITRC, |
| 6405 | MCK_CRBITRC, |
| 6406 | MCK_CRBITRC, |
| 6407 | MCK_CRBITRC, |
| 6408 | MCK_CRBITRC, |
| 6409 | MCK_CRBITRC, |
| 6410 | MCK_CRBITRC, |
| 6411 | MCK_CRBITRC, |
| 6412 | MCK_CRBITRC, |
| 6413 | MCK_CRBITRC, |
| 6414 | MCK_CRBITRC, |
| 6415 | MCK_CRBITRC, |
| 6416 | MCK_CRBITRC, |
| 6417 | MCK_CRBITRC, |
| 6418 | MCK_CRBITRC, |
| 6419 | MCK_CRBITRC, |
| 6420 | MCK_CRBITRC, |
| 6421 | MCK_CRBITRC, |
| 6422 | MCK_CRBITRC, |
| 6423 | MCK_CRBITRC, |
| 6424 | MCK_CRBITRC, |
| 6425 | MCK_CRBITRC, |
| 6426 | MCK_CRBITRC, |
| 6427 | MCK_CRBITRC, |
| 6428 | MCK_G8pRC, |
| 6429 | MCK_Reg33, |
| 6430 | MCK_Reg33, |
| 6431 | MCK_Reg33, |
| 6432 | MCK_Reg33, |
| 6433 | MCK_Reg33, |
| 6434 | MCK_Reg33, |
| 6435 | MCK_Reg33, |
| 6436 | MCK_Reg33, |
| 6437 | MCK_Reg33, |
| 6438 | MCK_Reg33, |
| 6439 | MCK_Reg33, |
| 6440 | MCK_Reg33, |
| 6441 | MCK_Reg33, |
| 6442 | MCK_Reg33, |
| 6443 | MCK_Reg33, |
| 6444 | }; |
| 6445 | |
| 6446 | MCRegister Reg = Operand.getReg(); |
| 6447 | MatchClassKind OpKind = Reg.isPhysical() ? (MatchClassKind)Table[Reg.id()] : InvalidMatchClass; |
| 6448 | return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : |
| 6449 | getDiagKindFromRegisterClass(Kind); |
| 6450 | } |
| 6451 | |
| 6452 | if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) |
| 6453 | return getDiagKindFromRegisterClass(Kind); |
| 6454 | |
| 6455 | return MCTargetAsmParser::Match_InvalidOperand; |
| 6456 | } |
| 6457 | |
| 6458 | #ifndef NDEBUG |
| 6459 | const char *getMatchClassName(MatchClassKind Kind) { |
| 6460 | switch (Kind) { |
| 6461 | case InvalidMatchClass: return "InvalidMatchClass" ; |
| 6462 | case OptionalMatchClass: return "OptionalMatchClass" ; |
| 6463 | case MCK__DOT_: return "MCK__DOT_" ; |
| 6464 | case MCK_0: return "MCK_0" ; |
| 6465 | case MCK_1: return "MCK_1" ; |
| 6466 | case MCK_2: return "MCK_2" ; |
| 6467 | case MCK_3: return "MCK_3" ; |
| 6468 | case MCK_4: return "MCK_4" ; |
| 6469 | case MCK_5: return "MCK_5" ; |
| 6470 | case MCK_6: return "MCK_6" ; |
| 6471 | case MCK_7: return "MCK_7" ; |
| 6472 | case MCK_crD: return "MCK_crD" ; |
| 6473 | case MCK_CTRRC: return "MCK_CTRRC" ; |
| 6474 | case MCK_CTRRC8: return "MCK_CTRRC8" ; |
| 6475 | case MCK_LR8RC: return "MCK_LR8RC" ; |
| 6476 | case MCK_LRRC: return "MCK_LRRC" ; |
| 6477 | case MCK_VRSAVERC: return "MCK_VRSAVERC" ; |
| 6478 | case MCK_CARRYRC: return "MCK_CARRYRC" ; |
| 6479 | case MCK_Reg45: return "MCK_Reg45" ; |
| 6480 | case MCK_Reg42: return "MCK_Reg42" ; |
| 6481 | case MCK_Reg46: return "MCK_Reg46" ; |
| 6482 | case MCK_Reg43: return "MCK_Reg43" ; |
| 6483 | case MCK_DMRpRC: return "MCK_DMRpRC" ; |
| 6484 | case MCK_Reg26: return "MCK_Reg26" ; |
| 6485 | case MCK_Reg16: return "MCK_Reg16" ; |
| 6486 | case MCK_ACCRC: return "MCK_ACCRC" ; |
| 6487 | case MCK_CRRC: return "MCK_CRRC" ; |
| 6488 | case MCK_DMRRC: return "MCK_DMRRC" ; |
| 6489 | case MCK_UACCRC: return "MCK_UACCRC" ; |
| 6490 | case MCK_WACCRC: return "MCK_WACCRC" ; |
| 6491 | case MCK_WACC_HIRC: return "MCK_WACC_HIRC" ; |
| 6492 | case MCK_Reg30: return "MCK_Reg30" ; |
| 6493 | case MCK_Reg24: return "MCK_Reg24" ; |
| 6494 | case MCK_Reg10: return "MCK_Reg10" ; |
| 6495 | case MCK_Reg33: return "MCK_Reg33" ; |
| 6496 | case MCK_Reg31: return "MCK_Reg31" ; |
| 6497 | case MCK_Reg27: return "MCK_Reg27" ; |
| 6498 | case MCK_FpRC: return "MCK_FpRC" ; |
| 6499 | case MCK_G8pRC: return "MCK_G8pRC" ; |
| 6500 | case MCK_Reg29: return "MCK_Reg29" ; |
| 6501 | case MCK_Reg20: return "MCK_Reg20" ; |
| 6502 | case MCK_Reg18: return "MCK_Reg18" ; |
| 6503 | case MCK_Reg9: return "MCK_Reg9" ; |
| 6504 | case MCK_CRBITRC: return "MCK_CRBITRC" ; |
| 6505 | case MCK_DMRROWpRC: return "MCK_DMRROWpRC" ; |
| 6506 | case MCK_F4RC: return "MCK_F4RC" ; |
| 6507 | case MCK_FHRC: return "MCK_FHRC" ; |
| 6508 | case MCK_GPRC32: return "MCK_GPRC32" ; |
| 6509 | case MCK_SPERC: return "MCK_SPERC" ; |
| 6510 | case MCK_VFHRC: return "MCK_VFHRC" ; |
| 6511 | case MCK_VFRC: return "MCK_VFRC" ; |
| 6512 | case MCK_VRRC: return "MCK_VRRC" ; |
| 6513 | case MCK_VSLRC: return "MCK_VSLRC" ; |
| 6514 | case MCK_VSRpRC: return "MCK_VSRpRC" ; |
| 6515 | case MCK_Reg7: return "MCK_Reg7" ; |
| 6516 | case MCK_Reg2: return "MCK_Reg2" ; |
| 6517 | case MCK_Reg23: return "MCK_Reg23" ; |
| 6518 | case MCK_Reg13: return "MCK_Reg13" ; |
| 6519 | case MCK_G8RC: return "MCK_G8RC" ; |
| 6520 | case MCK_G8RC_NOX0: return "MCK_G8RC_NOX0" ; |
| 6521 | case MCK_GPRC: return "MCK_GPRC" ; |
| 6522 | case MCK_GPRC_NOR0: return "MCK_GPRC_NOR0" ; |
| 6523 | case MCK_DMRROWRC: return "MCK_DMRROWRC" ; |
| 6524 | case MCK_VSRC: return "MCK_VSRC" ; |
| 6525 | case MCK_VSSRC: return "MCK_VSSRC" ; |
| 6526 | case MCK_SPILLTOVSRRC: return "MCK_SPILLTOVSRRC" ; |
| 6527 | case MCK_RegByHwMode_ppc_ptr_rc: return "MCK_RegByHwMode_ppc_ptr_rc" ; |
| 6528 | case MCK_RegByHwMode_ptr_rc_idx_by_hwmode: return "MCK_RegByHwMode_ptr_rc_idx_by_hwmode" ; |
| 6529 | case MCK_RegByHwMode_ptr_rc_nor0_by_hwmode: return "MCK_RegByHwMode_ptr_rc_nor0_by_hwmode" ; |
| 6530 | case MCK_Imm: return "MCK_Imm" ; |
| 6531 | case MCK_ATBitsAsHint: return "MCK_ATBitsAsHint" ; |
| 6532 | case MCK_CRBitMask: return "MCK_CRBitMask" ; |
| 6533 | case MCK_CondBr: return "MCK_CondBr" ; |
| 6534 | case MCK_DirectBr: return "MCK_DirectBr" ; |
| 6535 | case MCK_DispRI34: return "MCK_DispRI34" ; |
| 6536 | case MCK_DispRIHash: return "MCK_DispRIHash" ; |
| 6537 | case MCK_DispRI: return "MCK_DispRI" ; |
| 6538 | case MCK_DispRIX16: return "MCK_DispRIX16" ; |
| 6539 | case MCK_DispRIX: return "MCK_DispRIX" ; |
| 6540 | case MCK_DispSPE2: return "MCK_DispSPE2" ; |
| 6541 | case MCK_DispSPE4: return "MCK_DispSPE4" ; |
| 6542 | case MCK_DispSPE8: return "MCK_DispSPE8" ; |
| 6543 | case MCK_ImmZero: return "MCK_ImmZero" ; |
| 6544 | case MCK_RegACCRC: return "MCK_RegACCRC" ; |
| 6545 | case MCK_RegCRBITRC: return "MCK_RegCRBITRC" ; |
| 6546 | case MCK_RegCRRC: return "MCK_RegCRRC" ; |
| 6547 | case MCK_RegDMRRC: return "MCK_RegDMRRC" ; |
| 6548 | case MCK_RegDMRROWRC: return "MCK_RegDMRROWRC" ; |
| 6549 | case MCK_RegDMRROWpRC: return "MCK_RegDMRROWpRC" ; |
| 6550 | case MCK_RegDMRpRC: return "MCK_RegDMRpRC" ; |
| 6551 | case MCK_RegF4RC: return "MCK_RegF4RC" ; |
| 6552 | case MCK_RegF8RC: return "MCK_RegF8RC" ; |
| 6553 | case MCK_RegFpRC: return "MCK_RegFpRC" ; |
| 6554 | case MCK_RegG8RC: return "MCK_RegG8RC" ; |
| 6555 | case MCK_RegG8RCNoX0: return "MCK_RegG8RCNoX0" ; |
| 6556 | case MCK_RegG8pRC: return "MCK_RegG8pRC" ; |
| 6557 | case MCK_RegGPRC: return "MCK_RegGPRC" ; |
| 6558 | case MCK_RegGPRCNoR0: return "MCK_RegGPRCNoR0" ; |
| 6559 | case MCK_RegGxRCNoR0: return "MCK_RegGxRCNoR0" ; |
| 6560 | case MCK_RegGxRC: return "MCK_RegGxRC" ; |
| 6561 | case MCK_RegSPE4RC: return "MCK_RegSPE4RC" ; |
| 6562 | case MCK_RegSPERC: return "MCK_RegSPERC" ; |
| 6563 | case MCK_RegSPILLTOVSRRC: return "MCK_RegSPILLTOVSRRC" ; |
| 6564 | case MCK_RegVFRC: return "MCK_RegVFRC" ; |
| 6565 | case MCK_RegVRRC: return "MCK_RegVRRC" ; |
| 6566 | case MCK_RegVSFRC: return "MCK_RegVSFRC" ; |
| 6567 | case MCK_RegVSRC: return "MCK_RegVSRC" ; |
| 6568 | case MCK_RegVSRpEvenRC: return "MCK_RegVSRpEvenRC" ; |
| 6569 | case MCK_RegVSRpRC: return "MCK_RegVSRpRC" ; |
| 6570 | case MCK_RegVSSRC: return "MCK_RegVSSRC" ; |
| 6571 | case MCK_S16Imm: return "MCK_S16Imm" ; |
| 6572 | case MCK_S17Imm: return "MCK_S17Imm" ; |
| 6573 | case MCK_S32Imm: return "MCK_S32Imm" ; |
| 6574 | case MCK_S34Imm: return "MCK_S34Imm" ; |
| 6575 | case MCK_S5Imm: return "MCK_S5Imm" ; |
| 6576 | case MCK_TLSReg: return "MCK_TLSReg" ; |
| 6577 | case MCK_U10Imm: return "MCK_U10Imm" ; |
| 6578 | case MCK_U12Imm: return "MCK_U12Imm" ; |
| 6579 | case MCK_U16Imm: return "MCK_U16Imm" ; |
| 6580 | case MCK_U1Imm: return "MCK_U1Imm" ; |
| 6581 | case MCK_U2Imm: return "MCK_U2Imm" ; |
| 6582 | case MCK_U3Imm: return "MCK_U3Imm" ; |
| 6583 | case MCK_U4Imm: return "MCK_U4Imm" ; |
| 6584 | case MCK_U5Imm: return "MCK_U5Imm" ; |
| 6585 | case MCK_U6Imm: return "MCK_U6Imm" ; |
| 6586 | case MCK_U7Imm: return "MCK_U7Imm" ; |
| 6587 | case MCK_U8Imm: return "MCK_U8Imm" ; |
| 6588 | case NumMatchClassKinds: return "NumMatchClassKinds" ; |
| 6589 | } |
| 6590 | llvm_unreachable("unhandled MatchClassKind!" ); |
| 6591 | } |
| 6592 | |
| 6593 | #endif // NDEBUG |
| 6594 | FeatureBitset PPCAsmParser:: |
| 6595 | ComputeAvailableFeatures(const FeatureBitset &FB) const { |
| 6596 | FeatureBitset Features; |
| 6597 | if (!FB[PPC::AIXOS] || FB[PPC::FeatureModernAIXAs]) |
| 6598 | Features.set(Feature_ModernAsBit); |
| 6599 | return Features; |
| 6600 | } |
| 6601 | |
| 6602 | static bool checkAsmTiedOperandConstraints(const PPCAsmParser&AsmParser, |
| 6603 | unsigned Kind, const OperandVector &Operands, |
| 6604 | uint64_t &ErrorInfo) { |
| 6605 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
| 6606 | const uint8_t *Converter = ConversionTable[Kind]; |
| 6607 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 6608 | switch (*p) { |
| 6609 | case CVT_Tied: { |
| 6610 | unsigned OpIdx = *(p + 1); |
| 6611 | assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - |
| 6612 | std::begin(TiedAsmOperandTable)) && |
| 6613 | "Tied operand not found" ); |
| 6614 | unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; |
| 6615 | unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; |
| 6616 | if (OpndNum1 != OpndNum2) { |
| 6617 | auto &SrcOp1 = Operands[OpndNum1]; |
| 6618 | auto &SrcOp2 = Operands[OpndNum2]; |
| 6619 | if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) { |
| 6620 | ErrorInfo = OpndNum2; |
| 6621 | return false; |
| 6622 | } |
| 6623 | } |
| 6624 | break; |
| 6625 | } |
| 6626 | default: |
| 6627 | break; |
| 6628 | } |
| 6629 | } |
| 6630 | return true; |
| 6631 | } |
| 6632 | |
| 6633 | static const char MnemonicTable[] = |
| 6634 | "\003add\004addc\005addco\004adde\005addeo\005addex\006addg6s\004addi\005" |
| 6635 | "addic\005addis\005addme\006addmeo\004addo\007addpcis\005addze\006addzeo" |
| 6636 | "\003and\004andc\004andi\005andis\004attn\001b\002ba\002bc\003bc+\003bc-" |
| 6637 | "\003bca\004bca+\004bca-\005bcctr\006bcctrl\006bcdadd\006bcdcfn\007bcdcf" |
| 6638 | "sq\006bcdcfz\010bcdcpsgn\006bcdctn\007bcdctsq\006bcdctz\004bcds\tbcdset" |
| 6639 | "sgn\005bcdsr\006bcdsub\010bcdtrunc\005bcdus\tbcdutrunc\003bcl\004bcl+\004" |
| 6640 | "bcl-\004bcla\005bcla+\005bcla-\004bclr\005bclrl\004bctr\005bctrl\004bdn" |
| 6641 | "z\005bdnz+\005bdnz-\005bdnza\006bdnza+\006bdnza-\005bdnzf\006bdnzfa\006" |
| 6642 | "bdnzfl\007bdnzfla\007bdnzflr\010bdnzflrl\005bdnzl\006bdnzl+\006bdnzl-\006" |
| 6643 | "bdnzla\007bdnzla+\007bdnzla-\006bdnzlr\007bdnzlr+\007bdnzlr-\007bdnzlrl" |
| 6644 | "\010bdnzlrl+\010bdnzlrl-\005bdnzt\006bdnzta\006bdnztl\007bdnztla\007bdn" |
| 6645 | "ztlr\010bdnztlrl\003bdz\004bdz+\004bdz-\004bdza\005bdza+\005bdza-\004bd" |
| 6646 | "zf\005bdzfa\005bdzfl\006bdzfla\006bdzflr\007bdzflrl\004bdzl\005bdzl+\005" |
| 6647 | "bdzl-\005bdzla\006bdzla+\006bdzla-\005bdzlr\006bdzlr+\006bdzlr-\006bdzl" |
| 6648 | "rl\007bdzlrl+\007bdzlrl-\004bdzt\005bdzta\005bdztl\006bdztla\006bdztlr\007" |
| 6649 | "bdztlrl\003beq\004beq+\004beq-\004beqa\005beqa+\005beqa-\006beqctr\007b" |
| 6650 | "eqctr+\007beqctr-\007beqctrl\010beqctrl+\010beqctrl-\004beql\005beql+\005" |
| 6651 | "beql-\005beqla\006beqla+\006beqla-\005beqlr\006beqlr+\006beqlr-\006beql" |
| 6652 | "rl\007beqlrl+\007beqlrl-\002bf\003bf+\003bf-\003bfa\004bfa+\004bfa-\005" |
| 6653 | "bfctr\006bfctr+\006bfctr-\006bfctrl\007bfctrl+\007bfctrl-\003bfl\004bfl" |
| 6654 | "+\004bfl-\004bfla\005bfla+\005bfla-\004bflr\005bflr+\005bflr-\005bflrl\006" |
| 6655 | "bflrl+\006bflrl-\003bge\004bge+\004bge-\004bgea\005bgea+\005bgea-\006bg" |
| 6656 | "ectr\007bgectr+\007bgectr-\007bgectrl\010bgectrl+\010bgectrl-\004bgel\005" |
| 6657 | "bgel+\005bgel-\005bgela\006bgela+\006bgela-\005bgelr\006bgelr+\006bgelr" |
| 6658 | "-\006bgelrl\007bgelrl+\007bgelrl-\003bgt\004bgt+\004bgt-\004bgta\005bgt" |
| 6659 | "a+\005bgta-\006bgtctr\007bgtctr+\007bgtctr-\007bgtctrl\010bgtctrl+\010b" |
| 6660 | "gtctrl-\004bgtl\005bgtl+\005bgtl-\005bgtla\006bgtla+\006bgtla-\005bgtlr" |
| 6661 | "\006bgtlr+\006bgtlr-\006bgtlrl\007bgtlrl+\007bgtlrl-\002bl\003bla\003bl" |
| 6662 | "e\004ble+\004ble-\004blea\005blea+\005blea-\006blectr\007blectr+\007ble" |
| 6663 | "ctr-\007blectrl\010blectrl+\010blectrl-\004blel\005blel+\005blel-\005bl" |
| 6664 | "ela\006blela+\006blela-\005blelr\006blelr+\006blelr-\006blelrl\007blelr" |
| 6665 | "l+\007blelrl-\003blr\004blrl\003blt\004blt+\004blt-\004blta\005blta+\005" |
| 6666 | "blta-\006bltctr\007bltctr+\007bltctr-\007bltctrl\010bltctrl+\010bltctrl" |
| 6667 | "-\004bltl\005bltl+\005bltl-\005bltla\006bltla+\006bltla-\005bltlr\006bl" |
| 6668 | "tlr+\006bltlr-\006bltlrl\007bltlrl+\007bltlrl-\003bne\004bne+\004bne-\004" |
| 6669 | "bnea\005bnea+\005bnea-\006bnectr\007bnectr+\007bnectr-\007bnectrl\010bn" |
| 6670 | "ectrl+\010bnectrl-\004bnel\005bnel+\005bnel-\005bnela\006bnela+\006bnel" |
| 6671 | "a-\005bnelr\006bnelr+\006bnelr-\006bnelrl\007bnelrl+\007bnelrl-\003bng\004" |
| 6672 | "bng+\004bng-\004bnga\005bnga+\005bnga-\006bngctr\007bngctr+\007bngctr-\007" |
| 6673 | "bngctrl\010bngctrl+\010bngctrl-\004bngl\005bngl+\005bngl-\005bngla\006b" |
| 6674 | "ngla+\006bngla-\005bnglr\006bnglr+\006bnglr-\006bnglrl\007bnglrl+\007bn" |
| 6675 | "glrl-\003bnl\004bnl+\004bnl-\004bnla\005bnla+\005bnla-\006bnlctr\007bnl" |
| 6676 | "ctr+\007bnlctr-\007bnlctrl\010bnlctrl+\010bnlctrl-\004bnll\005bnll+\005" |
| 6677 | "bnll-\005bnlla\006bnlla+\006bnlla-\005bnllr\006bnllr+\006bnllr-\006bnll" |
| 6678 | "rl\007bnllrl+\007bnllrl-\003bns\004bns+\004bns-\004bnsa\005bnsa+\005bns" |
| 6679 | "a-\006bnsctr\007bnsctr+\007bnsctr-\007bnsctrl\010bnsctrl+\010bnsctrl-\004" |
| 6680 | "bnsl\005bnsl+\005bnsl-\005bnsla\006bnsla+\006bnsla-\005bnslr\006bnslr+\006" |
| 6681 | "bnslr-\006bnslrl\007bnslrl+\007bnslrl-\003bnu\004bnu+\004bnu-\004bnua\005" |
| 6682 | "bnua+\005bnua-\006bnuctr\007bnuctr+\007bnuctr-\007bnuctrl\010bnuctrl+\010" |
| 6683 | "bnuctrl-\004bnul\005bnul+\005bnul-\005bnula\006bnula+\006bnula-\005bnul" |
| 6684 | "r\006bnulr+\006bnulr-\006bnulrl\007bnulrl+\007bnulrl-\006bpermd\003brd\003" |
| 6685 | "brh\005brinc\003brw\003bso\004bso+\004bso-\004bsoa\005bsoa+\005bsoa-\006" |
| 6686 | "bsoctr\007bsoctr+\007bsoctr-\007bsoctrl\010bsoctrl+\010bsoctrl-\004bsol" |
| 6687 | "\005bsol+\005bsol-\005bsola\006bsola+\006bsola-\005bsolr\006bsolr+\006b" |
| 6688 | "solr-\006bsolrl\007bsolrl+\007bsolrl-\002bt\003bt+\003bt-\003bta\004bta" |
| 6689 | "+\004bta-\005btctr\006btctr+\006btctr-\006btctrl\007btctrl+\007btctrl-\003" |
| 6690 | "btl\004btl+\004btl-\004btla\005btla+\005btla-\004btlr\005btlr+\005btlr-" |
| 6691 | "\005btlrl\006btlrl+\006btlrl-\003bun\004bun+\004bun-\004buna\005buna+\005" |
| 6692 | "buna-\006bunctr\007bunctr+\007bunctr-\007bunctrl\010bunctrl+\010bunctrl" |
| 6693 | "-\004bunl\005bunl+\005bunl-\005bunla\006bunla+\006bunla-\005bunlr\006bu" |
| 6694 | "nlr+\006bunlr-\006bunlrl\007bunlrl+\007bunlrl-\006cbcdtd\006cdtbcd\006c" |
| 6695 | "fuged\007clrbhrb\006clrldi\010clrlsldi\010clrlslwi\006clrlwi\006clrrdi\006" |
| 6696 | "clrrwi\003cmp\004cmpb\004cmpd\005cmpdi\006cmpeqb\004cmpi\004cmpl\005cmp" |
| 6697 | "ld\006cmpldi\005cmpli\005cmplw\006cmplwi\005cmprb\004cmpw\005cmpwi\006c" |
| 6698 | "ntlzd\007cntlzdm\006cntlzw\006cnttzd\007cnttzdm\006cnttzw\004copy\007cp" |
| 6699 | "abort\005crand\006crandc\005crclr\005creqv\006crmove\006crnand\005crnor" |
| 6700 | "\005crnot\004cror\005crorc\005crset\005crxor\004dadd\005daddq\004darn\004" |
| 6701 | "dcba\004dcbf\006dcbfep\005dcbfl\006dcbflp\006dcbfps\004dcbi\005dcbst\007" |
| 6702 | "dcbstep\007dcbstps\004dcbt\006dcbtct\006dcbtds\006dcbtep\006dcbtst\010d" |
| 6703 | "cbtstct\010dcbtstds\010dcbtstep\007dcbtstt\005dcbtt\004dcbz\006dcbzep\005" |
| 6704 | "dcbzl\007dcbzlep\005dccci\006dcffix\007dcffixq\010dcffixqq\003dci\005dc" |
| 6705 | "mpo\006dcmpoq\005dcmpu\006dcmpuq\005dctdp\006dctfix\007dctfixq\010dctfi" |
| 6706 | "xqq\006dctqpq\006ddedpd\007ddedpdq\004ddiv\005ddivq\006denbcd\007denbcd" |
| 6707 | "q\004diex\005diexq\004divd\005divde\006divdeo\006divdeu\007divdeuo\005d" |
| 6708 | "ivdo\005divdu\006divduo\004divw\005divwe\006divweo\006divweu\007divweuo" |
| 6709 | "\005divwo\005divwu\006divwuo\ndmcryshash\004dmmr\tdmsetdmrz\014dmsha256" |
| 6710 | "hash\ndmsha2hash\010dmsha3dw\ndmsha3hash\014dmsha512hash\004dmul\005dmu" |
| 6711 | "lq\005dmxor\015dmxvbf16gerx2\017dmxvbf16gerx2nn\017dmxvbf16gerx2np\017d" |
| 6712 | "mxvbf16gerx2pn\017dmxvbf16gerx2pp\014dmxvf16gerx2\016dmxvf16gerx2nn\016" |
| 6713 | "dmxvf16gerx2np\016dmxvf16gerx2pn\016dmxvf16gerx2pp\013dmxvi8gerx4\015dm" |
| 6714 | "xvi8gerx4pp\016dmxvi8gerx4spp\016dmxxextfdmr256\016dmxxextfdmr512\016dm" |
| 6715 | "xxinstdmr256\016dmxxinstdmr512\ndmxxmmfacc\ndmxxmmtacc\013dmxxsetaccz\020" |
| 6716 | "dmxxsha224256pad\016dmxxsha3224pad\016dmxxsha3256pad\016dmxxsha3384pad\016" |
| 6717 | "dmxxsha3512pad\020dmxxsha384512pad\017dmxxshake128pad\017dmxxshake256pa" |
| 6718 | "d\ndmxxshapad\004dqua\005dquai\006dquaiq\005dquaq\005drdpq\006drintn\007" |
| 6719 | "drintnq\006drintx\007drintxq\005drrnd\006drrndq\004drsp\005dscli\006dsc" |
| 6720 | "liq\005dscri\006dscriq\003dss\006dssall\003dst\005dstst\006dststt\004ds" |
| 6721 | "tt\004dsub\005dsubq\006dtstdc\007dtstdcq\006dtstdg\007dtstdgq\006dtstex" |
| 6722 | "\007dtstexq\006dtstsf\007dtstsfi\010dtstsfiq\007dtstsfq\004dxex\005dxex" |
| 6723 | "q\006efdabs\006efdadd\006efdcfs\007efdcfsf\007efdcfsi\010efdcfsid\007ef" |
| 6724 | "dcfuf\007efdcfui\010efdcfuid\010efdcmpeq\010efdcmpgt\010efdcmplt\007efd" |
| 6725 | "ctsf\007efdctsi\tefdctsidz\010efdctsiz\007efdctuf\007efdctui\tefdctuidz" |
| 6726 | "\010efdctuiz\006efddiv\006efdmul\007efdnabs\006efdneg\006efdsub\010efdt" |
| 6727 | "steq\010efdtstgt\010efdtstlt\006efsabs\006efsadd\006efscfd\007efscfsf\007" |
| 6728 | "efscfsi\007efscfuf\007efscfui\010efscmpeq\010efscmpgt\010efscmplt\007ef" |
| 6729 | "sctsf\007efsctsi\010efsctsiz\007efsctuf\007efsctui\010efsctuiz\006efsdi" |
| 6730 | "v\006efsmul\007efsnabs\006efsneg\006efssub\010efststeq\010efststgt\010e" |
| 6731 | "fststlt\005eieio\003eqv\005evabs\007evaddiw\013evaddsmiaaw\013evaddssia" |
| 6732 | "aw\013evaddumiaaw\013evaddusiaaw\006evaddw\005evand\006evandc\007evcmpe" |
| 6733 | "q\010evcmpgts\010evcmpgtu\010evcmplts\010evcmpltu\010evcntlsw\010evcntl" |
| 6734 | "zw\007evdivws\007evdivwu\005eveqv\007evextsb\007evextsh\007evfsabs\007e" |
| 6735 | "vfsadd\010evfscfsf\010evfscfsi\010evfscfuf\010evfscfui\tevfscmpeq\tevfs" |
| 6736 | "cmpgt\tevfscmplt\010evfsctsf\010evfsctsi\tevfsctsiz\010evfsctui\007evfs" |
| 6737 | "div\007evfsmul\010evfsnabs\007evfsneg\007evfssub\tevfststeq\tevfststgt\t" |
| 6738 | "evfststlt\005evldd\006evlddx\005evldh\006evldhx\005evldw\006evldwx\013e" |
| 6739 | "vlhhesplat\014evlhhesplatx\014evlhhossplat\015evlhhossplatx\014evlhhous" |
| 6740 | "plat\015evlhhousplatx\006evlwhe\007evlwhex\007evlwhos\010evlwhosx\007ev" |
| 6741 | "lwhou\010evlwhoux\nevlwhsplat\013evlwhsplatx\nevlwwsplat\013evlwwsplatx" |
| 6742 | "\tevmergehi\013evmergehilo\tevmergelo\013evmergelohi\013evmhegsmfaa\013" |
| 6743 | "evmhegsmfan\013evmhegsmiaa\013evmhegsmian\013evmhegumiaa\013evmhegumian" |
| 6744 | "\010evmhesmf\tevmhesmfa\013evmhesmfaaw\013evmhesmfanw\010evmhesmi\tevmh" |
| 6745 | "esmia\013evmhesmiaaw\013evmhesmianw\010evmhessf\tevmhessfa\013evmhessfa" |
| 6746 | "aw\013evmhessfanw\013evmhessiaaw\013evmhessianw\010evmheumi\tevmheumia\013" |
| 6747 | "evmheumiaaw\013evmheumianw\013evmheusiaaw\013evmheusianw\013evmhogsmfaa" |
| 6748 | "\013evmhogsmfan\013evmhogsmiaa\013evmhogsmian\013evmhogumiaa\013evmhogu" |
| 6749 | "mian\010evmhosmf\tevmhosmfa\013evmhosmfaaw\013evmhosmfanw\010evmhosmi\t" |
| 6750 | "evmhosmia\013evmhosmiaaw\013evmhosmianw\010evmhossf\tevmhossfa\013evmho" |
| 6751 | "ssfaaw\013evmhossfanw\013evmhossiaaw\013evmhossianw\010evmhoumi\tevmhou" |
| 6752 | "mia\013evmhoumiaaw\013evmhoumianw\013evmhousiaaw\013evmhousianw\005evmr" |
| 6753 | "a\010evmwhsmf\tevmwhsmfa\010evmwhsmi\tevmwhsmia\010evmwhssf\tevmwhssfa\010" |
| 6754 | "evmwhumi\tevmwhumia\013evmwlsmiaaw\013evmwlsmianw\013evmwlssiaaw\013evm" |
| 6755 | "wlssianw\010evmwlumi\tevmwlumia\013evmwlumiaaw\013evmwlumianw\013evmwlu" |
| 6756 | "siaaw\013evmwlusianw\007evmwsmf\010evmwsmfa\tevmwsmfaa\tevmwsmfan\007ev" |
| 6757 | "mwsmi\010evmwsmia\tevmwsmiaa\tevmwsmian\007evmwssf\010evmwssfa\tevmwssf" |
| 6758 | "aa\tevmwssfan\007evmwumi\010evmwumia\tevmwumiaa\tevmwumian\006evnand\005" |
| 6759 | "evneg\005evnor\004evor\005evorc\005evrlw\006evrlwi\006evrndw\005evsel\005" |
| 6760 | "evslw\006evslwi\tevsplatfi\010evsplati\007evsrwis\007evsrwiu\006evsrws\006" |
| 6761 | "evsrwu\006evstdd\007evstddx\006evstdh\007evstdhx\006evstdw\007evstdwx\007" |
| 6762 | "evstwhe\010evstwhex\007evstwho\010evstwhox\007evstwwe\010evstwwex\007ev" |
| 6763 | "stwwo\010evstwwox\014evsubfsmiaaw\014evsubfssiaaw\014evsubfumiaaw\014ev" |
| 6764 | "subfusiaaw\007evsubfw\010evsubifw\005evxor\006extldi\006extlwi\006extrd" |
| 6765 | "i\006extrwi\005extsb\005extsh\005extsw\010extswsli\004fabs\004fadd\005f" |
| 6766 | "adds\005fcfid\006fcfids\006fcfidu\007fcfidus\005fcmpo\005fcmpu\006fcpsg" |
| 6767 | "n\005fctid\006fctidu\007fctiduz\006fctidz\005fctiw\006fctiwu\007fctiwuz" |
| 6768 | "\006fctiwz\004fdiv\005fdivs\005fmadd\006fmadds\003fmr\005fmsub\006fmsub" |
| 6769 | "s\004fmul\005fmuls\005fnabs\004fneg\006fnmadd\007fnmadds\006fnmsub\007f" |
| 6770 | "nmsubs\003fre\004fres\004frim\004frin\004frip\004friz\004frsp\007frsqrt" |
| 6771 | "e\010frsqrtes\004fsel\005fsqrt\006fsqrts\004fsub\005fsubs\005ftdiv\006f" |
| 6772 | "tsqrt\007hashchk\010hashchkp\006hashst\007hashstp\005hrfid\006hwsync\004" |
| 6773 | "icbi\006icbiep\005icblc\005icblq\004icbt\006icbtls\005iccci\003ici\006i" |
| 6774 | "nslwi\006insrdi\006insrwi\004isel\006iseleq\006iselgt\006isellt\005isyn" |
| 6775 | "c\002la\005lbarx\005lbepx\003lbz\006lbzcix\004lbzu\005lbzux\004lbzx\002" |
| 6776 | "ld\005ldarx\004ldat\005ldbrx\005ldcix\003ldu\004ldux\003ldx\003lfd\006l" |
| 6777 | "fdepx\004lfdu\005lfdux\004lfdx\006lfiwax\006lfiwzx\003lfs\004lfsu\005lf" |
| 6778 | "sux\004lfsx\003lha\005lharx\004lhau\005lhaux\004lhax\005lhbrx\005lhepx\003" |
| 6779 | "lhz\006lhzcix\004lhzu\005lhzux\004lhzx\002li\003lis\003lmw\004lnia\002l" |
| 6780 | "q\005lqarx\004lswi\005lvebx\005lvehx\005lvewx\004lvsl\004lvsr\003lvx\004" |
| 6781 | "lvxl\003lwa\005lwarx\004lwat\005lwaux\004lwax\005lwbrx\005lwepx\006lwsy" |
| 6782 | "nc\003lwz\006lwzcix\004lwzu\005lwzux\004lwzx\004lxsd\005lxsdx\007lxsibz" |
| 6783 | "x\007lxsihzx\007lxsiwax\007lxsiwzx\005lxssp\006lxsspx\003lxv\007lxvb16x" |
| 6784 | "\006lxvd2x\006lxvdsx\006lxvh8x\005lxvkq\004lxvl\005lxvll\004lxvp\010lxv" |
| 6785 | "pb32x\006lxvprl\007lxvprll\005lxvpx\006lxvrbx\006lxvrdx\006lxvrhx\005lx" |
| 6786 | "vrl\006lxvrll\006lxvrwx\006lxvw4x\006lxvwsx\004lxvx\006maddhd\007maddhd" |
| 6787 | "u\006maddld\004mbar\004mcrf\005mcrfs\006mcrxrx\005mfamr\005mfasr\007mfb" |
| 6788 | "hrbe\005mfbr0\005mfbr1\005mfbr2\005mfbr3\005mfbr4\005mfbr5\005mfbr6\005" |
| 6789 | "mfbr7\006mfcfar\004mfcr\005mfctr\005mfdar\007mfdbatl\007mfdbatu\006mfdc" |
| 6790 | "cr\005mfdcr\006mfdear\005mfdec\006mfdscr\007mfdsisr\005mfesr\006mffprd\007" |
| 6791 | "mffprwz\004mffs\010mffscdrn\tmffscdrni\006mffsce\007mffscrn\010mffscrni" |
| 6792 | "\005mffsl\007mfibatl\007mfibatu\006mficcr\004mflr\005mfmsr\006mfocrf\005" |
| 6793 | "mfpid\006mfpidr\005mfpmr\005mfppr\005mfpvr\006mfrtcl\006mfrtcu\006mfsdr" |
| 6794 | "1\tmfspefscr\005mfspr\006mfsprg\007mfsprg0\007mfsprg1\007mfsprg2\007mfs" |
| 6795 | "prg3\007mfsprg4\007mfsprg5\007mfsprg6\007mfsprg7\004mfsr\006mfsrin\006m" |
| 6796 | "fsrr0\006mfsrr1\006mfsrr2\006mfsrr3\004mftb\006mftbhi\005mftbl\006mftbl" |
| 6797 | "o\005mftbu\005mftcr\006mfuamr\007mfudscr\005mfvrd\010mfvrsave\006mfvrwz" |
| 6798 | "\006mfvscr\006mfvsrd\007mfvsrld\007mfvsrwz\005mfxer\005modsd\005modsw\005" |
| 6799 | "modud\005moduw\002mr\007msgsync\005msync\005mtamr\005mtasr\005mtbr0\005" |
| 6800 | "mtbr1\005mtbr2\005mtbr3\005mtbr4\005mtbr5\005mtbr6\005mtbr7\006mtcfar\004" |
| 6801 | "mtcr\005mtcrf\005mtctr\005mtdar\007mtdbatl\007mtdbatu\006mtdccr\005mtdc" |
| 6802 | "r\006mtdear\005mtdec\006mtdscr\007mtdsisr\005mtesr\006mtfprd\007mtfprwa" |
| 6803 | "\007mtfprwz\006mtfsb0\006mtfsb1\005mtfsf\006mtfsfi\007mtibatl\007mtibat" |
| 6804 | "u\006mticcr\005mtlpl\004mtlr\005mtmsr\006mtmsrd\006mtocrf\005mtpid\006m" |
| 6805 | "tpidr\005mtpmr\005mtppr\006mtsdr1\tmtspefscr\005mtspr\006mtsprg\007mtsp" |
| 6806 | "rg0\007mtsprg1\007mtsprg2\007mtsprg3\007mtsprg4\007mtsprg5\007mtsprg6\007" |
| 6807 | "mtsprg7\004mtsr\006mtsrin\006mtsrr0\006mtsrr1\006mtsrr2\006mtsrr3\006mt" |
| 6808 | "tbhi\005mttbl\006mttblo\005mttbu\005mttcr\006mtuamr\007mtudscr\005mtvrd" |
| 6809 | "\010mtvrsave\006mtvrwa\006mtvrwz\006mtvscr\007mtvsrbm\010mtvsrbmi\006mt" |
| 6810 | "vsrd\007mtvsrdd\007mtvsrdm\007mtvsrhm\007mtvsrqm\007mtvsrwa\007mtvsrwm\007" |
| 6811 | "mtvsrws\007mtvsrwz\005mtxer\005mulhd\006mulhdu\005mulhw\006mulhwu\005mu" |
| 6812 | "lld\006mulldo\005mulli\005mullw\006mullwo\004nand\003nap\003neg\004nego" |
| 6813 | "\003nop\003nor\003not\002or\003orc\003ori\004oris\005paddi\006paddis\005" |
| 6814 | "paste\013pause_short\005pdepd\005pextd\007phwsync\003pla\004plbz\003pld" |
| 6815 | "\004plfd\004plfs\004plha\004plhz\003pli\004plwa\007plwsync\004plwz\005p" |
| 6816 | "lxsd\006plxssp\004plxv\005plxvp\017pmdmxvbf16gerx2\021pmdmxvbf16gerx2nn" |
| 6817 | "\021pmdmxvbf16gerx2np\021pmdmxvbf16gerx2pn\021pmdmxvbf16gerx2pp\016pmdm" |
| 6818 | "xvf16gerx2\020pmdmxvf16gerx2nn\020pmdmxvf16gerx2np\020pmdmxvf16gerx2pn\020" |
| 6819 | "pmdmxvf16gerx2pp\015pmdmxvi8gerx4\017pmdmxvi8gerx4pp\020pmdmxvi8gerx4sp" |
| 6820 | "p\014pmxvbf16ger2\016pmxvbf16ger2nn\016pmxvbf16ger2np\016pmxvbf16ger2pn" |
| 6821 | "\016pmxvbf16ger2pp\013pmxvf16ger2\015pmxvf16ger2nn\015pmxvf16ger2np\015" |
| 6822 | "pmxvf16ger2pn\015pmxvf16ger2pp\npmxvf32ger\014pmxvf32gernn\014pmxvf32ge" |
| 6823 | "rnp\014pmxvf32gerpn\014pmxvf32gerpp\npmxvf64ger\014pmxvf64gernn\014pmxv" |
| 6824 | "f64gernp\014pmxvf64gerpn\014pmxvf64gerpp\013pmxvi16ger2\015pmxvi16ger2p" |
| 6825 | "p\014pmxvi16ger2s\016pmxvi16ger2spp\npmxvi4ger8\014pmxvi4ger8pp\npmxvi8" |
| 6826 | "ger4\014pmxvi8ger4pp\015pmxvi8ger4spp\007popcntb\007popcntd\007popcntw\004" |
| 6827 | "pstb\004pstd\005pstfd\005pstfs\004psth\004pstw\006pstxsd\007pstxssp\005" |
| 6828 | "pstxv\006pstxvp\005psubi\007ptesync\tptesyncio\004rfci\004rfdi\005rfebb" |
| 6829 | "\003rfi\004rfid\005rfmci\005rldcl\005rldcr\005rldic\006rldicl\006rldicr" |
| 6830 | "\006rldimi\006rlwimi\006rlwinm\005rlwnm\005rotld\006rotldi\005rotlw\006" |
| 6831 | "rotlwi\006rotrdi\006rotrwi\002sc\003scv\004setb\005setbc\006setbcr\006s" |
| 6832 | "etnbc\007setnbcr\006slbfee\005slbia\005slbie\006slbieg\007slbmfee\007sl" |
| 6833 | "bmfev\006slbmte\007slbsync\003sld\004sldi\003slw\004slwi\004srad\005sra" |
| 6834 | "di\004sraw\005srawi\003srd\004srdi\003srw\004srwi\003stb\006stbcix\005s" |
| 6835 | "tbcx\006stbepx\004stbu\005stbux\004stbx\010stcisync\003std\005stdat\006" |
| 6836 | "stdbrx\006stdcix\005stdcx\004stdu\005stdux\004stdx\004stfd\007stfdepx\005" |
| 6837 | "stfdu\006stfdux\005stfdx\006stfiwx\004stfs\005stfsu\006stfsux\005stfsx\003" |
| 6838 | "sth\006sthbrx\006sthcix\005sthcx\006sthepx\004sthu\005sthux\004sthx\004" |
| 6839 | "stmw\tstncisync\004stop\003stq\005stqcx\005stswi\006stsync\006stvebx\006" |
| 6840 | "stvehx\006stvewx\004stvx\005stvxl\003stw\005stwat\006stwbrx\006stwcix\005" |
| 6841 | "stwcx\006stwepx\004stwu\005stwux\004stwx\005stxsd\006stxsdx\007stxsibx\007" |
| 6842 | "stxsihx\007stxsiwx\006stxssp\007stxsspx\004stxv\010stxvb16x\007stxvd2x\007" |
| 6843 | "stxvh8x\005stxvl\006stxvll\005stxvp\tstxvpb32x\007stxvprl\010stxvprll\006" |
| 6844 | "stxvpx\007stxvrbx\007stxvrdx\007stxvrhx\006stxvrl\007stxvrll\007stxvrwx" |
| 6845 | "\007stxvw4x\005stxvx\003sub\004subc\004subf\005subfc\006subfco\005subfe" |
| 6846 | "\006subfeo\006subfic\006subfme\007subfmeo\005subfo\006subfus\006subfze\007" |
| 6847 | "subfzeo\004subi\005subic\005subis\007subpcis\004sync\006tabort\010tabor" |
| 6848 | "tdc\ttabortdci\010tabortwc\ttabortwci\006tbegin\006tcheck\002td\004tdeq" |
| 6849 | "\005tdeqi\004tdge\005tdgei\004tdgt\005tdgti\003tdi\004tdle\005tdlei\005" |
| 6850 | "tdlge\006tdlgei\005tdlgt\006tdlgti\005tdlle\006tdllei\005tdllt\006tdllt" |
| 6851 | "i\005tdlng\006tdlngi\005tdlnl\006tdlnli\004tdlt\005tdlti\004tdne\005tdn" |
| 6852 | "ei\004tdng\005tdngi\004tdnl\005tdnli\003tdu\004tdui\004tend\007tendall\005" |
| 6853 | "tlbia\005tlbie\007tlbieio\006tlbiel\006tlbiep\006tlbilx\ntlbilxlpid\ttl" |
| 6854 | "bilxpid\010tlbilxva\007tlbivax\005tlbld\005tlbli\005tlbre\007tlbrehi\007" |
| 6855 | "tlbrelo\005tlbsx\007tlbsync\ttlbsyncio\005tlbwe\007tlbwehi\007tlbwelo\004" |
| 6856 | "trap\010trechkpt\010treclaim\007tresume\003tsr\010tsuspend\002tw\004twe" |
| 6857 | "q\005tweqi\004twge\005twgei\004twgt\005twgti\003twi\004twle\005twlei\005" |
| 6858 | "twlge\006twlgei\005twlgt\006twlgti\005twlle\006twllei\005twllt\006twllt" |
| 6859 | "i\005twlng\006twlngi\005twlnl\006twlnli\004twlt\005twlti\004twne\005twn" |
| 6860 | "ei\004twng\005twngi\004twnl\005twnli\003twu\004twui\007vabsdub\007vabsd" |
| 6861 | "uh\007vabsduw\007vaddcuq\007vaddcuw\010vaddecuq\010vaddeuqm\006vaddfp\007" |
| 6862 | "vaddsbs\007vaddshs\007vaddsws\007vaddubm\007vaddubs\007vaddudm\007vaddu" |
| 6863 | "hm\007vadduhs\007vadduqm\007vadduwm\007vadduws\004vand\005vandc\006vavg" |
| 6864 | "sb\006vavgsh\006vavgsw\006vavgub\006vavguh\006vavguw\007vbpermd\007vbpe" |
| 6865 | "rmq\005vcfsx\007vcfuged\005vcfux\007vcipher\013vcipherlast\006vclrlb\006" |
| 6866 | "vclrrb\005vclzb\005vclzd\006vclzdm\005vclzh\010vclzlsbb\005vclzw\007vcm" |
| 6867 | "pbfp\010vcmpeqfp\010vcmpequb\010vcmpequd\010vcmpequh\010vcmpequq\010vcm" |
| 6868 | "pequw\010vcmpgefp\010vcmpgtfp\010vcmpgtsb\010vcmpgtsd\010vcmpgtsh\010vc" |
| 6869 | "mpgtsq\010vcmpgtsw\010vcmpgtub\010vcmpgtud\010vcmpgtuh\010vcmpgtuq\010v" |
| 6870 | "cmpgtuw\007vcmpneb\007vcmpneh\007vcmpnew\010vcmpnezb\010vcmpnezh\010vcm" |
| 6871 | "pnezw\006vcmpsq\006vcmpuq\007vcntmbb\007vcntmbd\007vcntmbh\007vcntmbw\006" |
| 6872 | "vctsxs\006vctuxs\005vctzb\005vctzd\006vctzdm\005vctzh\010vctzlsbb\005vc" |
| 6873 | "tzw\007vdivesd\007vdivesq\007vdivesw\007vdiveud\007vdiveuq\007vdiveuw\006" |
| 6874 | "vdivsd\006vdivsq\006vdivsw\006vdivud\006vdivuq\006vdivuw\004veqv\tvexpa" |
| 6875 | "ndbm\tvexpanddm\tvexpandhm\tvexpandqm\tvexpandwm\010vexptefp\tvextddvlx" |
| 6876 | "\tvextddvrx\nvextdubvlx\nvextdubvrx\nvextduhvlx\nvextduhvrx\nvextduwvlx" |
| 6877 | "\nvextduwvrx\nvextractbm\tvextractd\nvextractdm\nvextracthm\nvextractqm" |
| 6878 | "\nvextractub\nvextractuh\nvextractuw\nvextractwm\010vextsb2d\010vextsb2" |
| 6879 | "w\010vextsd2q\010vextsh2d\010vextsh2w\010vextsw2d\010vextublx\010vextub" |
| 6880 | "rx\010vextuhlx\010vextuhrx\010vextuwlx\010vextuwrx\005vgbbd\004vgnb\007" |
| 6881 | "vinsblx\007vinsbrx\010vinsbvlx\010vinsbvrx\005vinsd\007vinsdlx\007vinsd" |
| 6882 | "rx\010vinsertb\010vinsertd\010vinserth\010vinsertw\007vinshlx\007vinshr" |
| 6883 | "x\010vinshvlx\010vinshvrx\005vinsw\007vinswlx\007vinswrx\010vinswvlx\010" |
| 6884 | "vinswvrx\007vlogefp\007vmaddfp\006vmaxfp\006vmaxsb\006vmaxsd\006vmaxsh\006" |
| 6885 | "vmaxsw\006vmaxub\006vmaxud\006vmaxuh\006vmaxuw\tvmhaddshs\nvmhraddshs\006" |
| 6886 | "vminfp\006vminsb\006vminsd\006vminsh\006vminsw\006vminub\006vminud\006v" |
| 6887 | "minuh\006vminuw\tvmladduhm\006vmodsd\006vmodsq\006vmodsw\006vmodud\006v" |
| 6888 | "moduq\006vmoduw\003vmr\006vmrgew\006vmrghb\006vmrghh\006vmrghw\006vmrgl" |
| 6889 | "b\006vmrglh\006vmrglw\006vmrgow\010vmsumcud\010vmsummbm\010vmsumshm\010" |
| 6890 | "vmsumshs\010vmsumubm\010vmsumudm\010vmsumuhm\010vmsumuhs\tvmul10cuq\nvm" |
| 6891 | "ul10ecuq\tvmul10euq\010vmul10uq\007vmulesb\007vmulesd\007vmulesh\007vmu" |
| 6892 | "lesw\007vmuleub\007vmuleud\007vmuleuh\007vmuleuw\007vmulhsd\007vmulhsw\007" |
| 6893 | "vmulhud\007vmulhuw\006vmulld\007vmulosb\007vmulosd\007vmulosh\007vmulos" |
| 6894 | "w\007vmuloub\007vmuloud\007vmulouh\007vmulouw\007vmuluwm\005vnand\010vn" |
| 6895 | "cipher\014vncipherlast\005vnegd\005vnegw\010vnmsubfp\004vnor\004vnot\003" |
| 6896 | "vor\004vorc\006vpdepd\005vperm\006vpermr\010vpermxor\006vpextd\005vpkpx" |
| 6897 | "\007vpksdss\007vpksdus\007vpkshss\007vpkshus\007vpkswss\007vpkswus\007v" |
| 6898 | "pkudum\007vpkudus\007vpkuhum\007vpkuhus\007vpkuwum\007vpkuwus\007vpmsum" |
| 6899 | "b\007vpmsumd\007vpmsumh\007vpmsumw\010vpopcntb\010vpopcntd\010vpopcnth\010" |
| 6900 | "vpopcntw\007vprtybd\007vprtybq\007vprtybw\005vrefp\005vrfim\005vrfin\005" |
| 6901 | "vrfip\005vrfiz\004vrlb\004vrld\006vrldmi\006vrldnm\004vrlh\004vrlq\006v" |
| 6902 | "rlqmi\006vrlqnm\004vrlw\006vrlwmi\006vrlwnm\tvrsqrtefp\005vsbox\004vsel" |
| 6903 | "\nvshasigmad\nvshasigmaw\003vsl\004vslb\004vsld\006vsldbi\006vsldoi\004" |
| 6904 | "vslh\004vslo\004vslq\004vslv\004vslw\006vspltb\006vsplth\010vspltisb\010" |
| 6905 | "vspltish\010vspltisw\006vspltw\003vsr\005vsrab\005vsrad\005vsrah\005vsr" |
| 6906 | "aq\005vsraw\004vsrb\004vsrd\006vsrdbi\004vsrh\004vsro\004vsrq\004vsrv\004" |
| 6907 | "vsrw\007vstribl\007vstribr\007vstrihl\007vstrihr\007vsubcuq\007vsubcuw\010" |
| 6908 | "vsubecuq\010vsubeuqm\006vsubfp\007vsubsbs\007vsubshs\007vsubsws\007vsub" |
| 6909 | "ubm\007vsububs\007vsubudm\007vsubuhm\007vsubuhs\007vsubuqm\007vsubuwm\007" |
| 6910 | "vsubuws\010vsum2sws\010vsum4sbs\010vsum4shs\010vsum4ubs\007vsumsws\010v" |
| 6911 | "ucmprhb\010vucmprhh\010vucmprhn\010vucmprlb\010vucmprlh\010vucmprln\007" |
| 6912 | "vupkhpx\007vupkhsb\007vupkhsh\nvupkhsntob\007vupkhsw\016vupkint4tobf16\016" |
| 6913 | "vupkint4tofp32\016vupkint8tobf16\016vupkint8tofp32\007vupklpx\007vupkls" |
| 6914 | "b\007vupklsh\nvupklsntob\007vupklsw\004vxor\004wait\010waitimpl\007wait" |
| 6915 | "rsv\005wrtee\006wrteei\005wsync\004xnop\003xor\004xori\005xoris\007xsab" |
| 6916 | "sdp\007xsabsqp\014xsaddaddsuqm\013xsaddadduqm\007xsadddp\007xsaddqp\010" |
| 6917 | "xsaddqpo\007xsaddsp\014xsaddsubsuqm\013xsaddsubuqm\txscmpeqdp\txscmpeqq" |
| 6918 | "p\nxscmpexpdp\nxscmpexpqp\txscmpgedp\txscmpgeqp\txscmpgtdp\txscmpgtqp\010" |
| 6919 | "xscmpodp\010xscmpoqp\010xscmpudp\010xscmpuqp\txscpsgndp\txscpsgnqp\010x" |
| 6920 | "scvdphp\010xscvdpqp\010xscvdpsp\txscvdpspn\nxscvdpsxds\nxscvdpsxws\nxsc" |
| 6921 | "vdpuxds\nxscvdpuxws\010xscvhpdp\010xscvqpdp\txscvqpdpo\txscvqpsdz\txscv" |
| 6922 | "qpsqz\txscvqpswz\txscvqpudz\txscvqpuqz\txscvqpuwz\010xscvsdqp\010xscvsp" |
| 6923 | "dp\txscvspdpn\010xscvsqqp\txscvsxddp\txscvsxdsp\010xscvudqp\010xscvuqqp" |
| 6924 | "\txscvuxddp\txscvuxdsp\007xsdivdp\007xsdivqp\010xsdivqpo\007xsdivsp\010" |
| 6925 | "xsiexpdp\010xsiexpqp\txsmaddadp\txsmaddasp\txsmaddmdp\txsmaddmsp\010xsm" |
| 6926 | "addqp\txsmaddqpo\010xsmaxcdp\010xsmaxcqp\007xsmaxdp\010xsmaxjdp\015xsme" |
| 6927 | "rge2t1uqm\015xsmerge2t2uqm\015xsmerge2t3uqm\015xsmerge3t1uqm\010xsmincd" |
| 6928 | "p\010xsmincqp\007xsmindp\010xsminjdp\txsmsubadp\txsmsubasp\txsmsubmdp\t" |
| 6929 | "xsmsubmsp\010xsmsubqp\txsmsubqpo\007xsmuldp\007xsmulqp\010xsmulqpo\007x" |
| 6930 | "smulsp\010xsnabsdp\010xsnabsqp\007xsnegdp\007xsnegqp\nxsnmaddadp\nxsnma" |
| 6931 | "ddasp\nxsnmaddmdp\nxsnmaddmsp\txsnmaddqp\nxsnmaddqpo\nxsnmsubadp\nxsnms" |
| 6932 | "ubasp\nxsnmsubmdp\nxsnmsubmsp\txsnmsubqp\nxsnmsubqpo\006xsrdpi\007xsrdp" |
| 6933 | "ic\007xsrdpim\007xsrdpip\007xsrdpiz\016xsrebase2t1uqm\016xsrebase2t2uqm" |
| 6934 | "\016xsrebase2t3uqm\016xsrebase2t4uqm\016xsrebase3t1uqm\016xsrebase3t2uq" |
| 6935 | "m\016xsrebase3t3uqm\006xsredp\006xsresp\006xsrqpi\007xsrqpix\007xsrqpxp" |
| 6936 | "\005xsrsp\nxsrsqrtedp\nxsrsqrtesp\010xssqrtdp\010xssqrtqp\txssqrtqpo\010" |
| 6937 | "xssqrtsp\007xssubdp\007xssubqp\010xssubqpo\007xssubsp\010xstdivdp\txsts" |
| 6938 | "qrtdp\txststdcdp\txststdcqp\txststdcsp\010xsxexpdp\010xsxexpqp\010xsxsi" |
| 6939 | "gdp\010xsxsigqp\007xvabsdp\007xvabssp\007xvadddp\007xvaddsp\010xvadduhm" |
| 6940 | "\010xvadduwm\nxvbf16ger2\014xvbf16ger2nn\014xvbf16ger2np\014xvbf16ger2p" |
| 6941 | "n\014xvbf16ger2pp\txvcmpeqdp\txvcmpeqsp\txvcmpgedp\txvcmpgesp\txvcmpgtd" |
| 6942 | "p\txvcmpgtsp\txvcpsgndp\txvcpsgnsp\013xvcvbf16spn\010xvcvdpsp\nxvcvdpsx" |
| 6943 | "ds\nxvcvdpsxws\nxvcvdpuxds\nxvcvdpuxws\010xvcvhpsp\nxvcvspbf16\010xvcvs" |
| 6944 | "pdp\010xvcvsphp\nxvcvspsxds\nxvcvspsxws\nxvcvspuxds\nxvcvspuxws\txvcvsx" |
| 6945 | "ddp\txvcvsxdsp\txvcvsxwdp\txvcvsxwsp\txvcvuxddp\txvcvuxdsp\txvcvuxwdp\t" |
| 6946 | "xvcvuxwsp\007xvdivdp\007xvdivsp\txvf16ger2\013xvf16ger2nn\013xvf16ger2n" |
| 6947 | "p\013xvf16ger2pn\013xvf16ger2pp\010xvf32ger\nxvf32gernn\nxvf32gernp\nxv" |
| 6948 | "f32gerpn\nxvf32gerpp\010xvf64ger\nxvf64gernn\nxvf64gernp\nxvf64gerpn\nx" |
| 6949 | "vf64gerpp\txvi16ger2\013xvi16ger2pp\nxvi16ger2s\014xvi16ger2spp\010xvi4" |
| 6950 | "ger8\nxvi4ger8pp\010xvi8ger4\nxvi8ger4pp\013xvi8ger4spp\010xviexpdp\010" |
| 6951 | "xviexpsp\txvmaddadp\txvmaddasp\txvmaddmdp\txvmaddmsp\007xvmaxdp\007xvma" |
| 6952 | "xsp\007xvmindp\007xvminsp\007xvmovdp\007xvmovsp\txvmsubadp\txvmsubasp\t" |
| 6953 | "xvmsubmdp\txvmsubmsp\007xvmuldp\010xvmulhsh\010xvmulhsw\010xvmulhuh\010" |
| 6954 | "xvmulhuw\007xvmulsp\010xvmuluhm\010xvmuluwm\010xvnabsdp\010xvnabssp\007" |
| 6955 | "xvnegdp\007xvnegsp\nxvnmaddadp\nxvnmaddasp\nxvnmaddmdp\nxvnmaddmsp\nxvn" |
| 6956 | "msubadp\nxvnmsubasp\nxvnmsubmdp\nxvnmsubmsp\006xvrdpi\007xvrdpic\007xvr" |
| 6957 | "dpim\007xvrdpip\007xvrdpiz\006xvredp\006xvresp\005xvrlw\006xvrspi\007xv" |
| 6958 | "rspic\007xvrspim\007xvrspip\007xvrspiz\nxvrsqrtedp\nxvrsqrtesp\010xvsqr" |
| 6959 | "tdp\010xvsqrtsp\007xvsubdp\007xvsubsp\010xvsubuhm\010xvsubuwm\010xvtdiv" |
| 6960 | "dp\010xvtdivsp\007xvtlsbb\txvtsqrtdp\txvtsqrtsp\txvtstdcdp\txvtstdcsp\010" |
| 6961 | "xvxexpdp\010xvxexpsp\010xvxsigdp\010xvxsigsp\014xxaes128decp\014xxaes12" |
| 6962 | "8encp\016xxaes128genlkp\014xxaes192decp\014xxaes192encp\016xxaes192genl" |
| 6963 | "kp\014xxaes256decp\014xxaes256encp\016xxaes256genlkp\txxaesdecp\txxaese" |
| 6964 | "ncp\013xxaesgenlkp\txxblendvb\txxblendvd\txxblendvh\txxblendvw\005xxbrd" |
| 6965 | "\005xxbrh\005xxbrq\005xxbrw\006xxeval\013xxextractuw\nxxgenpcvbm\nxxgen" |
| 6966 | "pcvdm\nxxgenpcvhm\nxxgenpcvwm\nxxgfmul128\015xxgfmul128gcm\015xxgfmul12" |
| 6967 | "8xts\txxinsertw\006xxland\007xxlandc\006xxleqv\007xxlnand\006xxlnor\005" |
| 6968 | "xxlor\006xxlorc\006xxlxor\007xxmfacc\007xxmrghd\007xxmrghw\007xxmrgld\007" |
| 6969 | "xxmrglw\007xxmtacc\010xxmulmul\015xxmulmulhiadd\015xxmulmulloadd\006xxp" |
| 6970 | "erm\010xxpermdi\007xxpermr\007xxpermx\005xxsel\txxsetaccz\007xxsldwi\007" |
| 6971 | "xxspltd\013xxsplti32dx\010xxspltib\txxspltidp\010xxspltiw\007xxspltw\tx" |
| 6972 | "xssumudm\nxxssumudmc\015xxssumudmcext\007xxswapd" ; |
| 6973 | |
| 6974 | // Feature bitsets. |
| 6975 | enum : uint8_t { |
| 6976 | AMFBS_None, |
| 6977 | AMFBS_ModernAs, |
| 6978 | }; |
| 6979 | |
| 6980 | static constexpr FeatureBitset FeatureBitsets[] = { |
| 6981 | {}, // AMFBS_None |
| 6982 | {Feature_ModernAsBit, }, |
| 6983 | }; |
| 6984 | |
| 6985 | namespace { |
| 6986 | struct MatchEntry { |
| 6987 | uint16_t Mnemonic; |
| 6988 | uint16_t Opcode; |
| 6989 | uint16_t ConvertFn; |
| 6990 | uint8_t RequiredFeaturesIdx; |
| 6991 | uint8_t Classes[6]; |
| 6992 | StringRef getMnemonic() const { |
| 6993 | return StringRef(MnemonicTable + Mnemonic + 1, |
| 6994 | MnemonicTable[Mnemonic]); |
| 6995 | } |
| 6996 | }; |
| 6997 | |
| 6998 | // Predicate for searching for an opcode. |
| 6999 | struct LessOpcode { |
| 7000 | bool operator()(const MatchEntry &LHS, StringRef RHS) { |
| 7001 | return LHS.getMnemonic() < RHS; |
| 7002 | } |
| 7003 | bool operator()(StringRef LHS, const MatchEntry &RHS) { |
| 7004 | return LHS < RHS.getMnemonic(); |
| 7005 | } |
| 7006 | bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { |
| 7007 | return LHS.getMnemonic() < RHS.getMnemonic(); |
| 7008 | } |
| 7009 | }; |
| 7010 | } // end anonymous namespace |
| 7011 | |
| 7012 | static const MatchEntry MatchTable0[] = { |
| 7013 | { 0 /* add */, PPC::ADD8TLS_, Convert__RegG8RC1_0__RegG8RC1_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_TLSReg }, }, |
| 7014 | { 0 /* add */, PPC::ADD4, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7015 | { 0 /* add */, PPC::ADD4_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7016 | { 4 /* addc */, PPC::ADDC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7017 | { 4 /* addc */, PPC::ADDC_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7018 | { 9 /* addco */, PPC::ADDCO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7019 | { 9 /* addco */, PPC::ADDCO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7020 | { 15 /* adde */, PPC::ADDE, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7021 | { 15 /* adde */, PPC::ADDE_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7022 | { 20 /* addeo */, PPC::ADDEO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7023 | { 20 /* addeo */, PPC::ADDEO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7024 | { 26 /* addex */, PPC::ADDEX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC, MCK_U2Imm }, }, |
| 7025 | { 32 /* addg6s */, PPC::ADDG6S, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7026 | { 39 /* addi */, PPC::ADDI, Convert__RegGPRC1_0__RegGPRCNoR01_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_S16Imm }, }, |
| 7027 | { 44 /* addic */, PPC::ADDIC, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
| 7028 | { 44 /* addic */, PPC::ADDIC_rec, Convert__RegGPRC1_1__RegGPRC1_2__S16Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
| 7029 | { 50 /* addis */, PPC::ADDIS, Convert__RegGPRC1_0__RegGPRCNoR01_1__S17Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_S17Imm }, }, |
| 7030 | { 56 /* addme */, PPC::ADDME, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7031 | { 56 /* addme */, PPC::ADDME_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7032 | { 62 /* addmeo */, PPC::ADDMEO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7033 | { 62 /* addmeo */, PPC::ADDMEO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7034 | { 69 /* addo */, PPC::ADD4O, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7035 | { 69 /* addo */, PPC::ADD4O_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7036 | { 74 /* addpcis */, PPC::ADDPCIS, Convert__RegG8RC1_0__Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_Imm }, }, |
| 7037 | { 82 /* addze */, PPC::ADDZE, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7038 | { 82 /* addze */, PPC::ADDZE_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7039 | { 88 /* addzeo */, PPC::ADDZEO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7040 | { 88 /* addzeo */, PPC::ADDZEO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7041 | { 95 /* and */, PPC::AND, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7042 | { 95 /* and */, PPC::AND_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7043 | { 99 /* andc */, PPC::ANDC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7044 | { 99 /* andc */, PPC::ANDC_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7045 | { 104 /* andi */, PPC::ANDI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U16Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
| 7046 | { 109 /* andis */, PPC::ANDIS_rec, Convert__RegGPRC1_1__RegGPRC1_2__U16Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
| 7047 | { 115 /* attn */, PPC::ATTN, Convert_NoOperands, AMFBS_None, { }, }, |
| 7048 | { 120 /* b */, PPC::B, Convert__DirectBr1_0, AMFBS_None, { MCK_DirectBr }, }, |
| 7049 | { 122 /* ba */, PPC::BA, Convert__DirectBr1_0, AMFBS_None, { MCK_DirectBr }, }, |
| 7050 | { 125 /* bc */, PPC::gBC, Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7051 | { 125 /* bc */, PPC::gBCat, Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, AMFBS_None, { MCK_ATBitsAsHint, MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7052 | { 128 /* bc+ */, PPC::gBCat, Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7053 | { 132 /* bc- */, PPC::gBCat, Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7054 | { 136 /* bca */, PPC::gBCA, Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7055 | { 136 /* bca */, PPC::gBCAat, Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, AMFBS_None, { MCK_ATBitsAsHint, MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7056 | { 140 /* bca+ */, PPC::gBCAat, Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7057 | { 145 /* bca- */, PPC::gBCAat, Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7058 | { 150 /* bcctr */, PPC::gBCCTR, Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC }, }, |
| 7059 | { 150 /* bcctr */, PPC::gBCCTR, Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_Imm }, }, |
| 7060 | { 156 /* bcctrl */, PPC::gBCCTRL, Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC }, }, |
| 7061 | { 156 /* bcctrl */, PPC::gBCCTRL, Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_Imm }, }, |
| 7062 | { 163 /* bcdadd */, PPC::BCDADD_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7063 | { 170 /* bcdcfn */, PPC::BCDCFN_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7064 | { 177 /* bcdcfsq */, PPC::BCDCFSQ_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7065 | { 185 /* bcdcfz */, PPC::BCDCFZ_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7066 | { 192 /* bcdcpsgn */, PPC::BCDCPSGN_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 7067 | { 201 /* bcdctn */, PPC::BCDCTN_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 7068 | { 208 /* bcdctsq */, PPC::BCDCTSQ_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 7069 | { 216 /* bcdctz */, PPC::BCDCTZ_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7070 | { 223 /* bcds */, PPC::BCDS_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7071 | { 228 /* bcdsetsgn */, PPC::BCDSETSGN_rec, Convert__RegVRRC1_1__RegVRRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7072 | { 238 /* bcdsr */, PPC::BCDSR_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7073 | { 244 /* bcdsub */, PPC::BCDSUB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7074 | { 251 /* bcdtrunc */, PPC::BCDTRUNC_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3__U1Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 7075 | { 260 /* bcdus */, PPC::BCDUS_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 7076 | { 266 /* bcdutrunc */, PPC::BCDUTRUNC_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 7077 | { 276 /* bcl */, PPC::gBCL, Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7078 | { 276 /* bcl */, PPC::gBCLat, Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, AMFBS_None, { MCK_ATBitsAsHint, MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7079 | { 280 /* bcl+ */, PPC::gBCLat, Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7080 | { 285 /* bcl- */, PPC::gBCLat, Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7081 | { 290 /* bcla */, PPC::gBCLA, Convert__U5Imm1_0__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7082 | { 290 /* bcla */, PPC::gBCLAat, Convert__U5Imm1_1__ATBitsAsHint1_0__RegCRBITRC1_2__CondBr1_3, AMFBS_None, { MCK_ATBitsAsHint, MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7083 | { 295 /* bcla+ */, PPC::gBCLAat, Convert__U5Imm1_0__imm_95_3__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7084 | { 301 /* bcla- */, PPC::gBCLAat, Convert__U5Imm1_0__imm_95_2__RegCRBITRC1_1__CondBr1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7085 | { 307 /* bclr */, PPC::gBCLR, Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC }, }, |
| 7086 | { 307 /* bclr */, PPC::gBCLR, Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_Imm }, }, |
| 7087 | { 312 /* bclrl */, PPC::gBCLRL, Convert__U5Imm1_0__RegCRBITRC1_1__imm_95_0, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC }, }, |
| 7088 | { 312 /* bclrl */, PPC::gBCLRL, Convert__U5Imm1_0__RegCRBITRC1_1__Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegCRBITRC, MCK_Imm }, }, |
| 7089 | { 318 /* bctr */, PPC::BCTR, Convert_NoOperands, AMFBS_None, { }, }, |
| 7090 | { 323 /* bctrl */, PPC::BCTRL, Convert_NoOperands, AMFBS_None, { }, }, |
| 7091 | { 329 /* bdnz */, PPC::BDNZ, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7092 | { 334 /* bdnz+ */, PPC::BDNZp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7093 | { 340 /* bdnz- */, PPC::BDNZm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7094 | { 346 /* bdnza */, PPC::BDNZA, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7095 | { 352 /* bdnza+ */, PPC::BDNZAp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7096 | { 359 /* bdnza- */, PPC::BDNZAm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7097 | { 366 /* bdnzf */, PPC::gBC, Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7098 | { 372 /* bdnzfa */, PPC::gBCA, Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7099 | { 379 /* bdnzfl */, PPC::gBCL, Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7100 | { 386 /* bdnzfla */, PPC::gBCLA, Convert__imm_95_0__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7101 | { 394 /* bdnzflr */, PPC::gBCLR, Convert__imm_95_0__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7102 | { 402 /* bdnzflrl */, PPC::gBCLRL, Convert__imm_95_0__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7103 | { 411 /* bdnzl */, PPC::BDNZL, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7104 | { 417 /* bdnzl+ */, PPC::BDNZLp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7105 | { 424 /* bdnzl- */, PPC::BDNZLm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7106 | { 431 /* bdnzla */, PPC::BDNZLA, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7107 | { 438 /* bdnzla+ */, PPC::BDNZLAp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7108 | { 446 /* bdnzla- */, PPC::BDNZLAm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7109 | { 454 /* bdnzlr */, PPC::BDNZLR, Convert_NoOperands, AMFBS_None, { }, }, |
| 7110 | { 461 /* bdnzlr+ */, PPC::BDNZLRp, Convert_NoOperands, AMFBS_None, { }, }, |
| 7111 | { 469 /* bdnzlr- */, PPC::BDNZLRm, Convert_NoOperands, AMFBS_None, { }, }, |
| 7112 | { 477 /* bdnzlrl */, PPC::BDNZLRL, Convert_NoOperands, AMFBS_None, { }, }, |
| 7113 | { 485 /* bdnzlrl+ */, PPC::BDNZLRLp, Convert_NoOperands, AMFBS_None, { }, }, |
| 7114 | { 494 /* bdnzlrl- */, PPC::BDNZLRLm, Convert_NoOperands, AMFBS_None, { }, }, |
| 7115 | { 503 /* bdnzt */, PPC::gBC, Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7116 | { 509 /* bdnzta */, PPC::gBCA, Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7117 | { 516 /* bdnztl */, PPC::gBCL, Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7118 | { 523 /* bdnztla */, PPC::gBCLA, Convert__imm_95_8__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7119 | { 531 /* bdnztlr */, PPC::gBCLR, Convert__imm_95_8__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7120 | { 539 /* bdnztlrl */, PPC::gBCLRL, Convert__imm_95_8__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7121 | { 548 /* bdz */, PPC::BDZ, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7122 | { 552 /* bdz+ */, PPC::BDZp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7123 | { 557 /* bdz- */, PPC::BDZm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7124 | { 562 /* bdza */, PPC::BDZA, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7125 | { 567 /* bdza+ */, PPC::BDZAp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7126 | { 573 /* bdza- */, PPC::BDZAm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7127 | { 579 /* bdzf */, PPC::gBC, Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7128 | { 584 /* bdzfa */, PPC::gBCA, Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7129 | { 590 /* bdzfl */, PPC::gBCL, Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7130 | { 596 /* bdzfla */, PPC::gBCLA, Convert__imm_95_2__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7131 | { 603 /* bdzflr */, PPC::gBCLR, Convert__imm_95_2__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7132 | { 610 /* bdzflrl */, PPC::gBCLRL, Convert__imm_95_2__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7133 | { 618 /* bdzl */, PPC::BDZL, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7134 | { 623 /* bdzl+ */, PPC::BDZLp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7135 | { 629 /* bdzl- */, PPC::BDZLm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7136 | { 635 /* bdzla */, PPC::BDZLA, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7137 | { 641 /* bdzla+ */, PPC::BDZLAp, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7138 | { 648 /* bdzla- */, PPC::BDZLAm, Convert__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7139 | { 655 /* bdzlr */, PPC::BDZLR, Convert_NoOperands, AMFBS_None, { }, }, |
| 7140 | { 661 /* bdzlr+ */, PPC::BDZLRp, Convert_NoOperands, AMFBS_None, { }, }, |
| 7141 | { 668 /* bdzlr- */, PPC::BDZLRm, Convert_NoOperands, AMFBS_None, { }, }, |
| 7142 | { 675 /* bdzlrl */, PPC::BDZLRL, Convert_NoOperands, AMFBS_None, { }, }, |
| 7143 | { 682 /* bdzlrl+ */, PPC::BDZLRLp, Convert_NoOperands, AMFBS_None, { }, }, |
| 7144 | { 690 /* bdzlrl- */, PPC::BDZLRLm, Convert_NoOperands, AMFBS_None, { }, }, |
| 7145 | { 698 /* bdzt */, PPC::gBC, Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7146 | { 703 /* bdzta */, PPC::gBCA, Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7147 | { 709 /* bdztl */, PPC::gBCL, Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7148 | { 715 /* bdztla */, PPC::gBCLA, Convert__imm_95_10__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7149 | { 722 /* bdztlr */, PPC::gBCLR, Convert__imm_95_10__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7150 | { 729 /* bdztlrl */, PPC::gBCLRL, Convert__imm_95_10__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7151 | { 737 /* beq */, PPC::BCC, Convert__imm_95_76__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7152 | { 737 /* beq */, PPC::BCC, Convert__imm_95_76__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7153 | { 741 /* beq+ */, PPC::BCC, Convert__imm_95_79__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7154 | { 741 /* beq+ */, PPC::BCC, Convert__imm_95_79__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7155 | { 746 /* beq- */, PPC::BCC, Convert__imm_95_78__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7156 | { 746 /* beq- */, PPC::BCC, Convert__imm_95_78__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7157 | { 751 /* beqa */, PPC::BCCA, Convert__imm_95_76__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7158 | { 751 /* beqa */, PPC::BCCA, Convert__imm_95_76__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7159 | { 756 /* beqa+ */, PPC::BCCA, Convert__imm_95_79__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7160 | { 756 /* beqa+ */, PPC::BCCA, Convert__imm_95_79__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7161 | { 762 /* beqa- */, PPC::BCCA, Convert__imm_95_78__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7162 | { 762 /* beqa- */, PPC::BCCA, Convert__imm_95_78__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7163 | { 768 /* beqctr */, PPC::BCCCTR, Convert__imm_95_76__regCR0, AMFBS_None, { }, }, |
| 7164 | { 768 /* beqctr */, PPC::BCCCTR, Convert__imm_95_76__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7165 | { 775 /* beqctr+ */, PPC::BCCCTR, Convert__imm_95_79__regCR0, AMFBS_None, { }, }, |
| 7166 | { 775 /* beqctr+ */, PPC::BCCCTR, Convert__imm_95_79__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7167 | { 783 /* beqctr- */, PPC::BCCCTR, Convert__imm_95_78__regCR0, AMFBS_None, { }, }, |
| 7168 | { 783 /* beqctr- */, PPC::BCCCTR, Convert__imm_95_78__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7169 | { 791 /* beqctrl */, PPC::BCCCTRL, Convert__imm_95_76__regCR0, AMFBS_None, { }, }, |
| 7170 | { 791 /* beqctrl */, PPC::BCCCTRL, Convert__imm_95_76__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7171 | { 799 /* beqctrl+ */, PPC::BCCCTRL, Convert__imm_95_79__regCR0, AMFBS_None, { }, }, |
| 7172 | { 799 /* beqctrl+ */, PPC::BCCCTRL, Convert__imm_95_79__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7173 | { 808 /* beqctrl- */, PPC::BCCCTRL, Convert__imm_95_78__regCR0, AMFBS_None, { }, }, |
| 7174 | { 808 /* beqctrl- */, PPC::BCCCTRL, Convert__imm_95_78__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7175 | { 817 /* beql */, PPC::BCCL, Convert__imm_95_76__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7176 | { 817 /* beql */, PPC::BCCL, Convert__imm_95_76__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7177 | { 822 /* beql+ */, PPC::BCCL, Convert__imm_95_79__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7178 | { 822 /* beql+ */, PPC::BCCL, Convert__imm_95_79__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7179 | { 828 /* beql- */, PPC::BCCL, Convert__imm_95_78__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7180 | { 828 /* beql- */, PPC::BCCL, Convert__imm_95_78__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7181 | { 834 /* beqla */, PPC::BCCLA, Convert__imm_95_76__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7182 | { 834 /* beqla */, PPC::BCCLA, Convert__imm_95_76__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7183 | { 840 /* beqla+ */, PPC::BCCLA, Convert__imm_95_79__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7184 | { 840 /* beqla+ */, PPC::BCCLA, Convert__imm_95_79__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7185 | { 847 /* beqla- */, PPC::BCCLA, Convert__imm_95_78__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7186 | { 847 /* beqla- */, PPC::BCCLA, Convert__imm_95_78__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7187 | { 854 /* beqlr */, PPC::BCCLR, Convert__imm_95_76__regCR0, AMFBS_None, { }, }, |
| 7188 | { 854 /* beqlr */, PPC::BCCLR, Convert__imm_95_76__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7189 | { 860 /* beqlr+ */, PPC::BCCLR, Convert__imm_95_79__regCR0, AMFBS_None, { }, }, |
| 7190 | { 860 /* beqlr+ */, PPC::BCCLR, Convert__imm_95_79__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7191 | { 867 /* beqlr- */, PPC::BCCLR, Convert__imm_95_78__regCR0, AMFBS_None, { }, }, |
| 7192 | { 867 /* beqlr- */, PPC::BCCLR, Convert__imm_95_78__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7193 | { 874 /* beqlrl */, PPC::BCCLRL, Convert__imm_95_76__regCR0, AMFBS_None, { }, }, |
| 7194 | { 874 /* beqlrl */, PPC::BCCLRL, Convert__imm_95_76__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7195 | { 881 /* beqlrl+ */, PPC::BCCLRL, Convert__imm_95_79__regCR0, AMFBS_None, { }, }, |
| 7196 | { 881 /* beqlrl+ */, PPC::BCCLRL, Convert__imm_95_79__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7197 | { 889 /* beqlrl- */, PPC::BCCLRL, Convert__imm_95_78__regCR0, AMFBS_None, { }, }, |
| 7198 | { 889 /* beqlrl- */, PPC::BCCLRL, Convert__imm_95_78__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7199 | { 897 /* bf */, PPC::gBC, Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7200 | { 900 /* bf+ */, PPC::gBC, Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7201 | { 904 /* bf- */, PPC::gBC, Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7202 | { 908 /* bfa */, PPC::gBCA, Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7203 | { 912 /* bfa+ */, PPC::gBCA, Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7204 | { 917 /* bfa- */, PPC::gBCA, Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7205 | { 922 /* bfctr */, PPC::gBCCTR, Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7206 | { 928 /* bfctr+ */, PPC::gBCCTR, Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7207 | { 935 /* bfctr- */, PPC::gBCCTR, Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7208 | { 942 /* bfctrl */, PPC::gBCCTRL, Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7209 | { 949 /* bfctrl+ */, PPC::gBCCTRL, Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7210 | { 957 /* bfctrl- */, PPC::gBCCTRL, Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7211 | { 965 /* bfl */, PPC::gBCL, Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7212 | { 969 /* bfl+ */, PPC::gBCL, Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7213 | { 974 /* bfl- */, PPC::gBCL, Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7214 | { 979 /* bfla */, PPC::gBCLA, Convert__imm_95_4__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7215 | { 984 /* bfla+ */, PPC::gBCLA, Convert__imm_95_7__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7216 | { 990 /* bfla- */, PPC::gBCLA, Convert__imm_95_6__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7217 | { 996 /* bflr */, PPC::gBCLR, Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7218 | { 1001 /* bflr+ */, PPC::gBCLR, Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7219 | { 1007 /* bflr- */, PPC::gBCLR, Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7220 | { 1013 /* bflrl */, PPC::gBCLRL, Convert__imm_95_4__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7221 | { 1019 /* bflrl+ */, PPC::gBCLRL, Convert__imm_95_7__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7222 | { 1026 /* bflrl- */, PPC::gBCLRL, Convert__imm_95_6__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7223 | { 1033 /* bge */, PPC::BCC, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7224 | { 1033 /* bge */, PPC::BCC, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7225 | { 1037 /* bge+ */, PPC::BCC, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7226 | { 1037 /* bge+ */, PPC::BCC, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7227 | { 1042 /* bge- */, PPC::BCC, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7228 | { 1042 /* bge- */, PPC::BCC, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7229 | { 1047 /* bgea */, PPC::BCCA, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7230 | { 1047 /* bgea */, PPC::BCCA, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7231 | { 1052 /* bgea+ */, PPC::BCCA, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7232 | { 1052 /* bgea+ */, PPC::BCCA, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7233 | { 1058 /* bgea- */, PPC::BCCA, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7234 | { 1058 /* bgea- */, PPC::BCCA, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7235 | { 1064 /* bgectr */, PPC::BCCCTR, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
| 7236 | { 1064 /* bgectr */, PPC::BCCCTR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7237 | { 1071 /* bgectr+ */, PPC::BCCCTR, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
| 7238 | { 1071 /* bgectr+ */, PPC::BCCCTR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7239 | { 1079 /* bgectr- */, PPC::BCCCTR, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
| 7240 | { 1079 /* bgectr- */, PPC::BCCCTR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7241 | { 1087 /* bgectrl */, PPC::BCCCTRL, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
| 7242 | { 1087 /* bgectrl */, PPC::BCCCTRL, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7243 | { 1095 /* bgectrl+ */, PPC::BCCCTRL, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
| 7244 | { 1095 /* bgectrl+ */, PPC::BCCCTRL, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7245 | { 1104 /* bgectrl- */, PPC::BCCCTRL, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
| 7246 | { 1104 /* bgectrl- */, PPC::BCCCTRL, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7247 | { 1113 /* bgel */, PPC::BCCL, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7248 | { 1113 /* bgel */, PPC::BCCL, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7249 | { 1118 /* bgel+ */, PPC::BCCL, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7250 | { 1118 /* bgel+ */, PPC::BCCL, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7251 | { 1124 /* bgel- */, PPC::BCCL, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7252 | { 1124 /* bgel- */, PPC::BCCL, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7253 | { 1130 /* bgela */, PPC::BCCLA, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7254 | { 1130 /* bgela */, PPC::BCCLA, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7255 | { 1136 /* bgela+ */, PPC::BCCLA, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7256 | { 1136 /* bgela+ */, PPC::BCCLA, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7257 | { 1143 /* bgela- */, PPC::BCCLA, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7258 | { 1143 /* bgela- */, PPC::BCCLA, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7259 | { 1150 /* bgelr */, PPC::BCCLR, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
| 7260 | { 1150 /* bgelr */, PPC::BCCLR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7261 | { 1156 /* bgelr+ */, PPC::BCCLR, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
| 7262 | { 1156 /* bgelr+ */, PPC::BCCLR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7263 | { 1163 /* bgelr- */, PPC::BCCLR, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
| 7264 | { 1163 /* bgelr- */, PPC::BCCLR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7265 | { 1170 /* bgelrl */, PPC::BCCLRL, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
| 7266 | { 1170 /* bgelrl */, PPC::BCCLRL, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7267 | { 1177 /* bgelrl+ */, PPC::BCCLRL, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
| 7268 | { 1177 /* bgelrl+ */, PPC::BCCLRL, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7269 | { 1185 /* bgelrl- */, PPC::BCCLRL, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
| 7270 | { 1185 /* bgelrl- */, PPC::BCCLRL, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7271 | { 1193 /* bgt */, PPC::BCC, Convert__imm_95_44__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7272 | { 1193 /* bgt */, PPC::BCC, Convert__imm_95_44__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7273 | { 1197 /* bgt+ */, PPC::BCC, Convert__imm_95_47__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7274 | { 1197 /* bgt+ */, PPC::BCC, Convert__imm_95_47__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7275 | { 1202 /* bgt- */, PPC::BCC, Convert__imm_95_46__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7276 | { 1202 /* bgt- */, PPC::BCC, Convert__imm_95_46__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7277 | { 1207 /* bgta */, PPC::BCCA, Convert__imm_95_44__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7278 | { 1207 /* bgta */, PPC::BCCA, Convert__imm_95_44__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7279 | { 1212 /* bgta+ */, PPC::BCCA, Convert__imm_95_47__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7280 | { 1212 /* bgta+ */, PPC::BCCA, Convert__imm_95_47__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7281 | { 1218 /* bgta- */, PPC::BCCA, Convert__imm_95_46__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7282 | { 1218 /* bgta- */, PPC::BCCA, Convert__imm_95_46__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7283 | { 1224 /* bgtctr */, PPC::BCCCTR, Convert__imm_95_44__regCR0, AMFBS_None, { }, }, |
| 7284 | { 1224 /* bgtctr */, PPC::BCCCTR, Convert__imm_95_44__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7285 | { 1231 /* bgtctr+ */, PPC::BCCCTR, Convert__imm_95_47__regCR0, AMFBS_None, { }, }, |
| 7286 | { 1231 /* bgtctr+ */, PPC::BCCCTR, Convert__imm_95_47__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7287 | { 1239 /* bgtctr- */, PPC::BCCCTR, Convert__imm_95_46__regCR0, AMFBS_None, { }, }, |
| 7288 | { 1239 /* bgtctr- */, PPC::BCCCTR, Convert__imm_95_46__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7289 | { 1247 /* bgtctrl */, PPC::BCCCTRL, Convert__imm_95_44__regCR0, AMFBS_None, { }, }, |
| 7290 | { 1247 /* bgtctrl */, PPC::BCCCTRL, Convert__imm_95_44__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7291 | { 1255 /* bgtctrl+ */, PPC::BCCCTRL, Convert__imm_95_47__regCR0, AMFBS_None, { }, }, |
| 7292 | { 1255 /* bgtctrl+ */, PPC::BCCCTRL, Convert__imm_95_47__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7293 | { 1264 /* bgtctrl- */, PPC::BCCCTRL, Convert__imm_95_46__regCR0, AMFBS_None, { }, }, |
| 7294 | { 1264 /* bgtctrl- */, PPC::BCCCTRL, Convert__imm_95_46__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7295 | { 1273 /* bgtl */, PPC::BCCL, Convert__imm_95_44__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7296 | { 1273 /* bgtl */, PPC::BCCL, Convert__imm_95_44__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7297 | { 1278 /* bgtl+ */, PPC::BCCL, Convert__imm_95_47__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7298 | { 1278 /* bgtl+ */, PPC::BCCL, Convert__imm_95_47__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7299 | { 1284 /* bgtl- */, PPC::BCCL, Convert__imm_95_46__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7300 | { 1284 /* bgtl- */, PPC::BCCL, Convert__imm_95_46__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7301 | { 1290 /* bgtla */, PPC::BCCLA, Convert__imm_95_44__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7302 | { 1290 /* bgtla */, PPC::BCCLA, Convert__imm_95_44__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7303 | { 1296 /* bgtla+ */, PPC::BCCLA, Convert__imm_95_47__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7304 | { 1296 /* bgtla+ */, PPC::BCCLA, Convert__imm_95_47__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7305 | { 1303 /* bgtla- */, PPC::BCCLA, Convert__imm_95_46__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7306 | { 1303 /* bgtla- */, PPC::BCCLA, Convert__imm_95_46__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7307 | { 1310 /* bgtlr */, PPC::BCCLR, Convert__imm_95_44__regCR0, AMFBS_None, { }, }, |
| 7308 | { 1310 /* bgtlr */, PPC::BCCLR, Convert__imm_95_44__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7309 | { 1316 /* bgtlr+ */, PPC::BCCLR, Convert__imm_95_47__regCR0, AMFBS_None, { }, }, |
| 7310 | { 1316 /* bgtlr+ */, PPC::BCCLR, Convert__imm_95_47__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7311 | { 1323 /* bgtlr- */, PPC::BCCLR, Convert__imm_95_46__regCR0, AMFBS_None, { }, }, |
| 7312 | { 1323 /* bgtlr- */, PPC::BCCLR, Convert__imm_95_46__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7313 | { 1330 /* bgtlrl */, PPC::BCCLRL, Convert__imm_95_44__regCR0, AMFBS_None, { }, }, |
| 7314 | { 1330 /* bgtlrl */, PPC::BCCLRL, Convert__imm_95_44__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7315 | { 1337 /* bgtlrl+ */, PPC::BCCLRL, Convert__imm_95_47__regCR0, AMFBS_None, { }, }, |
| 7316 | { 1337 /* bgtlrl+ */, PPC::BCCLRL, Convert__imm_95_47__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7317 | { 1345 /* bgtlrl- */, PPC::BCCLRL, Convert__imm_95_46__regCR0, AMFBS_None, { }, }, |
| 7318 | { 1345 /* bgtlrl- */, PPC::BCCLRL, Convert__imm_95_46__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7319 | { 1353 /* bl */, PPC::BL, Convert__DirectBr1_0, AMFBS_None, { MCK_DirectBr }, }, |
| 7320 | { 1353 /* bl */, PPC::BL8_TLS_, Convert__DirectBr1_0__Imm1_1, AMFBS_None, { MCK_DirectBr, MCK_Imm }, }, |
| 7321 | { 1356 /* bla */, PPC::BLA, Convert__DirectBr1_0, AMFBS_None, { MCK_DirectBr }, }, |
| 7322 | { 1360 /* ble */, PPC::BCC, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7323 | { 1360 /* ble */, PPC::BCC, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7324 | { 1364 /* ble+ */, PPC::BCC, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7325 | { 1364 /* ble+ */, PPC::BCC, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7326 | { 1369 /* ble- */, PPC::BCC, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7327 | { 1369 /* ble- */, PPC::BCC, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7328 | { 1374 /* blea */, PPC::BCCA, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7329 | { 1374 /* blea */, PPC::BCCA, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7330 | { 1379 /* blea+ */, PPC::BCCA, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7331 | { 1379 /* blea+ */, PPC::BCCA, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7332 | { 1385 /* blea- */, PPC::BCCA, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7333 | { 1385 /* blea- */, PPC::BCCA, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7334 | { 1391 /* blectr */, PPC::BCCCTR, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
| 7335 | { 1391 /* blectr */, PPC::BCCCTR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7336 | { 1398 /* blectr+ */, PPC::BCCCTR, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
| 7337 | { 1398 /* blectr+ */, PPC::BCCCTR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7338 | { 1406 /* blectr- */, PPC::BCCCTR, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
| 7339 | { 1406 /* blectr- */, PPC::BCCCTR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7340 | { 1414 /* blectrl */, PPC::BCCCTRL, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
| 7341 | { 1414 /* blectrl */, PPC::BCCCTRL, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7342 | { 1422 /* blectrl+ */, PPC::BCCCTRL, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
| 7343 | { 1422 /* blectrl+ */, PPC::BCCCTRL, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7344 | { 1431 /* blectrl- */, PPC::BCCCTRL, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
| 7345 | { 1431 /* blectrl- */, PPC::BCCCTRL, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7346 | { 1440 /* blel */, PPC::BCCL, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7347 | { 1440 /* blel */, PPC::BCCL, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7348 | { 1445 /* blel+ */, PPC::BCCL, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7349 | { 1445 /* blel+ */, PPC::BCCL, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7350 | { 1451 /* blel- */, PPC::BCCL, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7351 | { 1451 /* blel- */, PPC::BCCL, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7352 | { 1457 /* blela */, PPC::BCCLA, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7353 | { 1457 /* blela */, PPC::BCCLA, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7354 | { 1463 /* blela+ */, PPC::BCCLA, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7355 | { 1463 /* blela+ */, PPC::BCCLA, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7356 | { 1470 /* blela- */, PPC::BCCLA, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7357 | { 1470 /* blela- */, PPC::BCCLA, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7358 | { 1477 /* blelr */, PPC::BCCLR, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
| 7359 | { 1477 /* blelr */, PPC::BCCLR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7360 | { 1483 /* blelr+ */, PPC::BCCLR, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
| 7361 | { 1483 /* blelr+ */, PPC::BCCLR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7362 | { 1490 /* blelr- */, PPC::BCCLR, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
| 7363 | { 1490 /* blelr- */, PPC::BCCLR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7364 | { 1497 /* blelrl */, PPC::BCCLRL, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
| 7365 | { 1497 /* blelrl */, PPC::BCCLRL, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7366 | { 1504 /* blelrl+ */, PPC::BCCLRL, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
| 7367 | { 1504 /* blelrl+ */, PPC::BCCLRL, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7368 | { 1512 /* blelrl- */, PPC::BCCLRL, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
| 7369 | { 1512 /* blelrl- */, PPC::BCCLRL, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7370 | { 1520 /* blr */, PPC::BLR, Convert_NoOperands, AMFBS_None, { }, }, |
| 7371 | { 1524 /* blrl */, PPC::BLRL, Convert_NoOperands, AMFBS_None, { }, }, |
| 7372 | { 1529 /* blt */, PPC::BCC, Convert__imm_95_12__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7373 | { 1529 /* blt */, PPC::BCC, Convert__imm_95_12__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7374 | { 1533 /* blt+ */, PPC::BCC, Convert__imm_95_15__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7375 | { 1533 /* blt+ */, PPC::BCC, Convert__imm_95_15__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7376 | { 1538 /* blt- */, PPC::BCC, Convert__imm_95_14__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7377 | { 1538 /* blt- */, PPC::BCC, Convert__imm_95_14__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7378 | { 1543 /* blta */, PPC::BCCA, Convert__imm_95_12__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7379 | { 1543 /* blta */, PPC::BCCA, Convert__imm_95_12__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7380 | { 1548 /* blta+ */, PPC::BCCA, Convert__imm_95_15__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7381 | { 1548 /* blta+ */, PPC::BCCA, Convert__imm_95_15__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7382 | { 1554 /* blta- */, PPC::BCCA, Convert__imm_95_14__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7383 | { 1554 /* blta- */, PPC::BCCA, Convert__imm_95_14__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7384 | { 1560 /* bltctr */, PPC::BCCCTR, Convert__imm_95_12__regCR0, AMFBS_None, { }, }, |
| 7385 | { 1560 /* bltctr */, PPC::BCCCTR, Convert__imm_95_12__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7386 | { 1567 /* bltctr+ */, PPC::BCCCTR, Convert__imm_95_15__regCR0, AMFBS_None, { }, }, |
| 7387 | { 1567 /* bltctr+ */, PPC::BCCCTR, Convert__imm_95_15__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7388 | { 1575 /* bltctr- */, PPC::BCCCTR, Convert__imm_95_14__regCR0, AMFBS_None, { }, }, |
| 7389 | { 1575 /* bltctr- */, PPC::BCCCTR, Convert__imm_95_14__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7390 | { 1583 /* bltctrl */, PPC::BCCCTRL, Convert__imm_95_12__regCR0, AMFBS_None, { }, }, |
| 7391 | { 1583 /* bltctrl */, PPC::BCCCTRL, Convert__imm_95_12__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7392 | { 1591 /* bltctrl+ */, PPC::BCCCTRL, Convert__imm_95_15__regCR0, AMFBS_None, { }, }, |
| 7393 | { 1591 /* bltctrl+ */, PPC::BCCCTRL, Convert__imm_95_15__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7394 | { 1600 /* bltctrl- */, PPC::BCCCTRL, Convert__imm_95_14__regCR0, AMFBS_None, { }, }, |
| 7395 | { 1600 /* bltctrl- */, PPC::BCCCTRL, Convert__imm_95_14__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7396 | { 1609 /* bltl */, PPC::BCCL, Convert__imm_95_12__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7397 | { 1609 /* bltl */, PPC::BCCL, Convert__imm_95_12__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7398 | { 1614 /* bltl+ */, PPC::BCCL, Convert__imm_95_15__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7399 | { 1614 /* bltl+ */, PPC::BCCL, Convert__imm_95_15__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7400 | { 1620 /* bltl- */, PPC::BCCL, Convert__imm_95_14__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7401 | { 1620 /* bltl- */, PPC::BCCL, Convert__imm_95_14__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7402 | { 1626 /* bltla */, PPC::BCCLA, Convert__imm_95_12__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7403 | { 1626 /* bltla */, PPC::BCCLA, Convert__imm_95_12__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7404 | { 1632 /* bltla+ */, PPC::BCCLA, Convert__imm_95_15__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7405 | { 1632 /* bltla+ */, PPC::BCCLA, Convert__imm_95_15__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7406 | { 1639 /* bltla- */, PPC::BCCLA, Convert__imm_95_14__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7407 | { 1639 /* bltla- */, PPC::BCCLA, Convert__imm_95_14__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7408 | { 1646 /* bltlr */, PPC::BCCLR, Convert__imm_95_12__regCR0, AMFBS_None, { }, }, |
| 7409 | { 1646 /* bltlr */, PPC::BCCLR, Convert__imm_95_12__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7410 | { 1652 /* bltlr+ */, PPC::BCCLR, Convert__imm_95_15__regCR0, AMFBS_None, { }, }, |
| 7411 | { 1652 /* bltlr+ */, PPC::BCCLR, Convert__imm_95_15__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7412 | { 1659 /* bltlr- */, PPC::BCCLR, Convert__imm_95_14__regCR0, AMFBS_None, { }, }, |
| 7413 | { 1659 /* bltlr- */, PPC::BCCLR, Convert__imm_95_14__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7414 | { 1666 /* bltlrl */, PPC::BCCLRL, Convert__imm_95_12__regCR0, AMFBS_None, { }, }, |
| 7415 | { 1666 /* bltlrl */, PPC::BCCLRL, Convert__imm_95_12__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7416 | { 1673 /* bltlrl+ */, PPC::BCCLRL, Convert__imm_95_15__regCR0, AMFBS_None, { }, }, |
| 7417 | { 1673 /* bltlrl+ */, PPC::BCCLRL, Convert__imm_95_15__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7418 | { 1681 /* bltlrl- */, PPC::BCCLRL, Convert__imm_95_14__regCR0, AMFBS_None, { }, }, |
| 7419 | { 1681 /* bltlrl- */, PPC::BCCLRL, Convert__imm_95_14__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7420 | { 1689 /* bne */, PPC::BCC, Convert__imm_95_68__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7421 | { 1689 /* bne */, PPC::BCC, Convert__imm_95_68__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7422 | { 1693 /* bne+ */, PPC::BCC, Convert__imm_95_71__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7423 | { 1693 /* bne+ */, PPC::BCC, Convert__imm_95_71__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7424 | { 1698 /* bne- */, PPC::BCC, Convert__imm_95_70__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7425 | { 1698 /* bne- */, PPC::BCC, Convert__imm_95_70__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7426 | { 1703 /* bnea */, PPC::BCCA, Convert__imm_95_68__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7427 | { 1703 /* bnea */, PPC::BCCA, Convert__imm_95_68__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7428 | { 1708 /* bnea+ */, PPC::BCCA, Convert__imm_95_71__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7429 | { 1708 /* bnea+ */, PPC::BCCA, Convert__imm_95_71__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7430 | { 1714 /* bnea- */, PPC::BCCA, Convert__imm_95_70__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7431 | { 1714 /* bnea- */, PPC::BCCA, Convert__imm_95_70__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7432 | { 1720 /* bnectr */, PPC::BCCCTR, Convert__imm_95_68__regCR0, AMFBS_None, { }, }, |
| 7433 | { 1720 /* bnectr */, PPC::BCCCTR, Convert__imm_95_68__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7434 | { 1727 /* bnectr+ */, PPC::BCCCTR, Convert__imm_95_71__regCR0, AMFBS_None, { }, }, |
| 7435 | { 1727 /* bnectr+ */, PPC::BCCCTR, Convert__imm_95_71__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7436 | { 1735 /* bnectr- */, PPC::BCCCTR, Convert__imm_95_70__regCR0, AMFBS_None, { }, }, |
| 7437 | { 1735 /* bnectr- */, PPC::BCCCTR, Convert__imm_95_70__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7438 | { 1743 /* bnectrl */, PPC::BCCCTRL, Convert__imm_95_68__regCR0, AMFBS_None, { }, }, |
| 7439 | { 1743 /* bnectrl */, PPC::BCCCTRL, Convert__imm_95_68__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7440 | { 1751 /* bnectrl+ */, PPC::BCCCTRL, Convert__imm_95_71__regCR0, AMFBS_None, { }, }, |
| 7441 | { 1751 /* bnectrl+ */, PPC::BCCCTRL, Convert__imm_95_71__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7442 | { 1760 /* bnectrl- */, PPC::BCCCTRL, Convert__imm_95_70__regCR0, AMFBS_None, { }, }, |
| 7443 | { 1760 /* bnectrl- */, PPC::BCCCTRL, Convert__imm_95_70__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7444 | { 1769 /* bnel */, PPC::BCCL, Convert__imm_95_68__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7445 | { 1769 /* bnel */, PPC::BCCL, Convert__imm_95_68__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7446 | { 1774 /* bnel+ */, PPC::BCCL, Convert__imm_95_71__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7447 | { 1774 /* bnel+ */, PPC::BCCL, Convert__imm_95_71__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7448 | { 1780 /* bnel- */, PPC::BCCL, Convert__imm_95_70__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7449 | { 1780 /* bnel- */, PPC::BCCL, Convert__imm_95_70__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7450 | { 1786 /* bnela */, PPC::BCCLA, Convert__imm_95_68__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7451 | { 1786 /* bnela */, PPC::BCCLA, Convert__imm_95_68__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7452 | { 1792 /* bnela+ */, PPC::BCCLA, Convert__imm_95_71__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7453 | { 1792 /* bnela+ */, PPC::BCCLA, Convert__imm_95_71__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7454 | { 1799 /* bnela- */, PPC::BCCLA, Convert__imm_95_70__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7455 | { 1799 /* bnela- */, PPC::BCCLA, Convert__imm_95_70__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7456 | { 1806 /* bnelr */, PPC::BCCLR, Convert__imm_95_68__regCR0, AMFBS_None, { }, }, |
| 7457 | { 1806 /* bnelr */, PPC::BCCLR, Convert__imm_95_68__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7458 | { 1812 /* bnelr+ */, PPC::BCCLR, Convert__imm_95_71__regCR0, AMFBS_None, { }, }, |
| 7459 | { 1812 /* bnelr+ */, PPC::BCCLR, Convert__imm_95_71__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7460 | { 1819 /* bnelr- */, PPC::BCCLR, Convert__imm_95_70__regCR0, AMFBS_None, { }, }, |
| 7461 | { 1819 /* bnelr- */, PPC::BCCLR, Convert__imm_95_70__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7462 | { 1826 /* bnelrl */, PPC::BCCLRL, Convert__imm_95_68__regCR0, AMFBS_None, { }, }, |
| 7463 | { 1826 /* bnelrl */, PPC::BCCLRL, Convert__imm_95_68__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7464 | { 1833 /* bnelrl+ */, PPC::BCCLRL, Convert__imm_95_71__regCR0, AMFBS_None, { }, }, |
| 7465 | { 1833 /* bnelrl+ */, PPC::BCCLRL, Convert__imm_95_71__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7466 | { 1841 /* bnelrl- */, PPC::BCCLRL, Convert__imm_95_70__regCR0, AMFBS_None, { }, }, |
| 7467 | { 1841 /* bnelrl- */, PPC::BCCLRL, Convert__imm_95_70__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7468 | { 1849 /* bng */, PPC::BCC, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7469 | { 1849 /* bng */, PPC::BCC, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7470 | { 1853 /* bng+ */, PPC::BCC, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7471 | { 1853 /* bng+ */, PPC::BCC, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7472 | { 1858 /* bng- */, PPC::BCC, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7473 | { 1858 /* bng- */, PPC::BCC, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7474 | { 1863 /* bnga */, PPC::BCCA, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7475 | { 1863 /* bnga */, PPC::BCCA, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7476 | { 1868 /* bnga+ */, PPC::BCCA, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7477 | { 1868 /* bnga+ */, PPC::BCCA, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7478 | { 1874 /* bnga- */, PPC::BCCA, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7479 | { 1874 /* bnga- */, PPC::BCCA, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7480 | { 1880 /* bngctr */, PPC::BCCCTR, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
| 7481 | { 1880 /* bngctr */, PPC::BCCCTR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7482 | { 1887 /* bngctr+ */, PPC::BCCCTR, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
| 7483 | { 1887 /* bngctr+ */, PPC::BCCCTR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7484 | { 1895 /* bngctr- */, PPC::BCCCTR, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
| 7485 | { 1895 /* bngctr- */, PPC::BCCCTR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7486 | { 1903 /* bngctrl */, PPC::BCCCTRL, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
| 7487 | { 1903 /* bngctrl */, PPC::BCCCTRL, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7488 | { 1911 /* bngctrl+ */, PPC::BCCCTRL, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
| 7489 | { 1911 /* bngctrl+ */, PPC::BCCCTRL, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7490 | { 1920 /* bngctrl- */, PPC::BCCCTRL, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
| 7491 | { 1920 /* bngctrl- */, PPC::BCCCTRL, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7492 | { 1929 /* bngl */, PPC::BCCL, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7493 | { 1929 /* bngl */, PPC::BCCL, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7494 | { 1934 /* bngl+ */, PPC::BCCL, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7495 | { 1934 /* bngl+ */, PPC::BCCL, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7496 | { 1940 /* bngl- */, PPC::BCCL, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7497 | { 1940 /* bngl- */, PPC::BCCL, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7498 | { 1946 /* bngla */, PPC::BCCLA, Convert__imm_95_36__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7499 | { 1946 /* bngla */, PPC::BCCLA, Convert__imm_95_36__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7500 | { 1952 /* bngla+ */, PPC::BCCLA, Convert__imm_95_39__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7501 | { 1952 /* bngla+ */, PPC::BCCLA, Convert__imm_95_39__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7502 | { 1959 /* bngla- */, PPC::BCCLA, Convert__imm_95_38__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7503 | { 1959 /* bngla- */, PPC::BCCLA, Convert__imm_95_38__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7504 | { 1966 /* bnglr */, PPC::BCCLR, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
| 7505 | { 1966 /* bnglr */, PPC::BCCLR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7506 | { 1972 /* bnglr+ */, PPC::BCCLR, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
| 7507 | { 1972 /* bnglr+ */, PPC::BCCLR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7508 | { 1979 /* bnglr- */, PPC::BCCLR, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
| 7509 | { 1979 /* bnglr- */, PPC::BCCLR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7510 | { 1986 /* bnglrl */, PPC::BCCLRL, Convert__imm_95_36__regCR0, AMFBS_None, { }, }, |
| 7511 | { 1986 /* bnglrl */, PPC::BCCLRL, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7512 | { 1993 /* bnglrl+ */, PPC::BCCLRL, Convert__imm_95_39__regCR0, AMFBS_None, { }, }, |
| 7513 | { 1993 /* bnglrl+ */, PPC::BCCLRL, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7514 | { 2001 /* bnglrl- */, PPC::BCCLRL, Convert__imm_95_38__regCR0, AMFBS_None, { }, }, |
| 7515 | { 2001 /* bnglrl- */, PPC::BCCLRL, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7516 | { 2009 /* bnl */, PPC::BCC, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7517 | { 2009 /* bnl */, PPC::BCC, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7518 | { 2013 /* bnl+ */, PPC::BCC, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7519 | { 2013 /* bnl+ */, PPC::BCC, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7520 | { 2018 /* bnl- */, PPC::BCC, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7521 | { 2018 /* bnl- */, PPC::BCC, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7522 | { 2023 /* bnla */, PPC::BCCA, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7523 | { 2023 /* bnla */, PPC::BCCA, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7524 | { 2028 /* bnla+ */, PPC::BCCA, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7525 | { 2028 /* bnla+ */, PPC::BCCA, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7526 | { 2034 /* bnla- */, PPC::BCCA, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7527 | { 2034 /* bnla- */, PPC::BCCA, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7528 | { 2040 /* bnlctr */, PPC::BCCCTR, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
| 7529 | { 2040 /* bnlctr */, PPC::BCCCTR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7530 | { 2047 /* bnlctr+ */, PPC::BCCCTR, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
| 7531 | { 2047 /* bnlctr+ */, PPC::BCCCTR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7532 | { 2055 /* bnlctr- */, PPC::BCCCTR, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
| 7533 | { 2055 /* bnlctr- */, PPC::BCCCTR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7534 | { 2063 /* bnlctrl */, PPC::BCCCTRL, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
| 7535 | { 2063 /* bnlctrl */, PPC::BCCCTRL, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7536 | { 2071 /* bnlctrl+ */, PPC::BCCCTRL, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
| 7537 | { 2071 /* bnlctrl+ */, PPC::BCCCTRL, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7538 | { 2080 /* bnlctrl- */, PPC::BCCCTRL, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
| 7539 | { 2080 /* bnlctrl- */, PPC::BCCCTRL, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7540 | { 2089 /* bnll */, PPC::BCCL, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7541 | { 2089 /* bnll */, PPC::BCCL, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7542 | { 2094 /* bnll+ */, PPC::BCCL, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7543 | { 2094 /* bnll+ */, PPC::BCCL, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7544 | { 2100 /* bnll- */, PPC::BCCL, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7545 | { 2100 /* bnll- */, PPC::BCCL, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7546 | { 2106 /* bnlla */, PPC::BCCLA, Convert__imm_95_4__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7547 | { 2106 /* bnlla */, PPC::BCCLA, Convert__imm_95_4__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7548 | { 2112 /* bnlla+ */, PPC::BCCLA, Convert__imm_95_7__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7549 | { 2112 /* bnlla+ */, PPC::BCCLA, Convert__imm_95_7__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7550 | { 2119 /* bnlla- */, PPC::BCCLA, Convert__imm_95_6__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7551 | { 2119 /* bnlla- */, PPC::BCCLA, Convert__imm_95_6__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7552 | { 2126 /* bnllr */, PPC::BCCLR, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
| 7553 | { 2126 /* bnllr */, PPC::BCCLR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7554 | { 2132 /* bnllr+ */, PPC::BCCLR, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
| 7555 | { 2132 /* bnllr+ */, PPC::BCCLR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7556 | { 2139 /* bnllr- */, PPC::BCCLR, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
| 7557 | { 2139 /* bnllr- */, PPC::BCCLR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7558 | { 2146 /* bnllrl */, PPC::BCCLRL, Convert__imm_95_4__regCR0, AMFBS_None, { }, }, |
| 7559 | { 2146 /* bnllrl */, PPC::BCCLRL, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7560 | { 2153 /* bnllrl+ */, PPC::BCCLRL, Convert__imm_95_7__regCR0, AMFBS_None, { }, }, |
| 7561 | { 2153 /* bnllrl+ */, PPC::BCCLRL, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7562 | { 2161 /* bnllrl- */, PPC::BCCLRL, Convert__imm_95_6__regCR0, AMFBS_None, { }, }, |
| 7563 | { 2161 /* bnllrl- */, PPC::BCCLRL, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7564 | { 2169 /* bns */, PPC::BCC, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7565 | { 2169 /* bns */, PPC::BCC, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7566 | { 2173 /* bns+ */, PPC::BCC, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7567 | { 2173 /* bns+ */, PPC::BCC, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7568 | { 2178 /* bns- */, PPC::BCC, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7569 | { 2178 /* bns- */, PPC::BCC, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7570 | { 2183 /* bnsa */, PPC::BCCA, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7571 | { 2183 /* bnsa */, PPC::BCCA, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7572 | { 2188 /* bnsa+ */, PPC::BCCA, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7573 | { 2188 /* bnsa+ */, PPC::BCCA, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7574 | { 2194 /* bnsa- */, PPC::BCCA, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7575 | { 2194 /* bnsa- */, PPC::BCCA, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7576 | { 2200 /* bnsctr */, PPC::BCCCTR, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
| 7577 | { 2200 /* bnsctr */, PPC::BCCCTR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7578 | { 2207 /* bnsctr+ */, PPC::BCCCTR, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
| 7579 | { 2207 /* bnsctr+ */, PPC::BCCCTR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7580 | { 2215 /* bnsctr- */, PPC::BCCCTR, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
| 7581 | { 2215 /* bnsctr- */, PPC::BCCCTR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7582 | { 2223 /* bnsctrl */, PPC::BCCCTRL, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
| 7583 | { 2223 /* bnsctrl */, PPC::BCCCTRL, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7584 | { 2231 /* bnsctrl+ */, PPC::BCCCTRL, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
| 7585 | { 2231 /* bnsctrl+ */, PPC::BCCCTRL, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7586 | { 2240 /* bnsctrl- */, PPC::BCCCTRL, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
| 7587 | { 2240 /* bnsctrl- */, PPC::BCCCTRL, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7588 | { 2249 /* bnsl */, PPC::BCCL, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7589 | { 2249 /* bnsl */, PPC::BCCL, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7590 | { 2254 /* bnsl+ */, PPC::BCCL, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7591 | { 2254 /* bnsl+ */, PPC::BCCL, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7592 | { 2260 /* bnsl- */, PPC::BCCL, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7593 | { 2260 /* bnsl- */, PPC::BCCL, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7594 | { 2266 /* bnsla */, PPC::BCCLA, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7595 | { 2266 /* bnsla */, PPC::BCCLA, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7596 | { 2272 /* bnsla+ */, PPC::BCCLA, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7597 | { 2272 /* bnsla+ */, PPC::BCCLA, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7598 | { 2279 /* bnsla- */, PPC::BCCLA, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7599 | { 2279 /* bnsla- */, PPC::BCCLA, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7600 | { 2286 /* bnslr */, PPC::BCCLR, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
| 7601 | { 2286 /* bnslr */, PPC::BCCLR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7602 | { 2292 /* bnslr+ */, PPC::BCCLR, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
| 7603 | { 2292 /* bnslr+ */, PPC::BCCLR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7604 | { 2299 /* bnslr- */, PPC::BCCLR, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
| 7605 | { 2299 /* bnslr- */, PPC::BCCLR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7606 | { 2306 /* bnslrl */, PPC::BCCLRL, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
| 7607 | { 2306 /* bnslrl */, PPC::BCCLRL, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7608 | { 2313 /* bnslrl+ */, PPC::BCCLRL, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
| 7609 | { 2313 /* bnslrl+ */, PPC::BCCLRL, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7610 | { 2321 /* bnslrl- */, PPC::BCCLRL, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
| 7611 | { 2321 /* bnslrl- */, PPC::BCCLRL, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7612 | { 2329 /* bnu */, PPC::BCC, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7613 | { 2329 /* bnu */, PPC::BCC, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7614 | { 2333 /* bnu+ */, PPC::BCC, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7615 | { 2333 /* bnu+ */, PPC::BCC, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7616 | { 2338 /* bnu- */, PPC::BCC, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7617 | { 2338 /* bnu- */, PPC::BCC, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7618 | { 2343 /* bnua */, PPC::BCCA, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7619 | { 2343 /* bnua */, PPC::BCCA, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7620 | { 2348 /* bnua+ */, PPC::BCCA, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7621 | { 2348 /* bnua+ */, PPC::BCCA, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7622 | { 2354 /* bnua- */, PPC::BCCA, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7623 | { 2354 /* bnua- */, PPC::BCCA, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7624 | { 2360 /* bnuctr */, PPC::BCCCTR, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
| 7625 | { 2360 /* bnuctr */, PPC::BCCCTR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7626 | { 2367 /* bnuctr+ */, PPC::BCCCTR, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
| 7627 | { 2367 /* bnuctr+ */, PPC::BCCCTR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7628 | { 2375 /* bnuctr- */, PPC::BCCCTR, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
| 7629 | { 2375 /* bnuctr- */, PPC::BCCCTR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7630 | { 2383 /* bnuctrl */, PPC::BCCCTRL, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
| 7631 | { 2383 /* bnuctrl */, PPC::BCCCTRL, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7632 | { 2391 /* bnuctrl+ */, PPC::BCCCTRL, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
| 7633 | { 2391 /* bnuctrl+ */, PPC::BCCCTRL, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7634 | { 2400 /* bnuctrl- */, PPC::BCCCTRL, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
| 7635 | { 2400 /* bnuctrl- */, PPC::BCCCTRL, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7636 | { 2409 /* bnul */, PPC::BCCL, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7637 | { 2409 /* bnul */, PPC::BCCL, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7638 | { 2414 /* bnul+ */, PPC::BCCL, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7639 | { 2414 /* bnul+ */, PPC::BCCL, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7640 | { 2420 /* bnul- */, PPC::BCCL, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7641 | { 2420 /* bnul- */, PPC::BCCL, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7642 | { 2426 /* bnula */, PPC::BCCLA, Convert__imm_95_100__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7643 | { 2426 /* bnula */, PPC::BCCLA, Convert__imm_95_100__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7644 | { 2432 /* bnula+ */, PPC::BCCLA, Convert__imm_95_103__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7645 | { 2432 /* bnula+ */, PPC::BCCLA, Convert__imm_95_103__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7646 | { 2439 /* bnula- */, PPC::BCCLA, Convert__imm_95_102__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7647 | { 2439 /* bnula- */, PPC::BCCLA, Convert__imm_95_102__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7648 | { 2446 /* bnulr */, PPC::BCCLR, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
| 7649 | { 2446 /* bnulr */, PPC::BCCLR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7650 | { 2452 /* bnulr+ */, PPC::BCCLR, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
| 7651 | { 2452 /* bnulr+ */, PPC::BCCLR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7652 | { 2459 /* bnulr- */, PPC::BCCLR, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
| 7653 | { 2459 /* bnulr- */, PPC::BCCLR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7654 | { 2466 /* bnulrl */, PPC::BCCLRL, Convert__imm_95_100__regCR0, AMFBS_None, { }, }, |
| 7655 | { 2466 /* bnulrl */, PPC::BCCLRL, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7656 | { 2473 /* bnulrl+ */, PPC::BCCLRL, Convert__imm_95_103__regCR0, AMFBS_None, { }, }, |
| 7657 | { 2473 /* bnulrl+ */, PPC::BCCLRL, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7658 | { 2481 /* bnulrl- */, PPC::BCCLRL, Convert__imm_95_102__regCR0, AMFBS_None, { }, }, |
| 7659 | { 2481 /* bnulrl- */, PPC::BCCLRL, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7660 | { 2489 /* bpermd */, PPC::BPERMD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7661 | { 2496 /* brd */, PPC::BRD, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7662 | { 2500 /* brh */, PPC::BRH, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7663 | { 2504 /* brinc */, PPC::BRINC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7664 | { 2510 /* brw */, PPC::BRW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7665 | { 2514 /* bso */, PPC::BCC, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7666 | { 2514 /* bso */, PPC::BCC, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7667 | { 2518 /* bso+ */, PPC::BCC, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7668 | { 2518 /* bso+ */, PPC::BCC, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7669 | { 2523 /* bso- */, PPC::BCC, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7670 | { 2523 /* bso- */, PPC::BCC, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7671 | { 2528 /* bsoa */, PPC::BCCA, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7672 | { 2528 /* bsoa */, PPC::BCCA, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7673 | { 2533 /* bsoa+ */, PPC::BCCA, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7674 | { 2533 /* bsoa+ */, PPC::BCCA, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7675 | { 2539 /* bsoa- */, PPC::BCCA, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7676 | { 2539 /* bsoa- */, PPC::BCCA, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7677 | { 2545 /* bsoctr */, PPC::BCCCTR, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
| 7678 | { 2545 /* bsoctr */, PPC::BCCCTR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7679 | { 2552 /* bsoctr+ */, PPC::BCCCTR, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
| 7680 | { 2552 /* bsoctr+ */, PPC::BCCCTR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7681 | { 2560 /* bsoctr- */, PPC::BCCCTR, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
| 7682 | { 2560 /* bsoctr- */, PPC::BCCCTR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7683 | { 2568 /* bsoctrl */, PPC::BCCCTRL, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
| 7684 | { 2568 /* bsoctrl */, PPC::BCCCTRL, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7685 | { 2576 /* bsoctrl+ */, PPC::BCCCTRL, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
| 7686 | { 2576 /* bsoctrl+ */, PPC::BCCCTRL, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7687 | { 2585 /* bsoctrl- */, PPC::BCCCTRL, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
| 7688 | { 2585 /* bsoctrl- */, PPC::BCCCTRL, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7689 | { 2594 /* bsol */, PPC::BCCL, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7690 | { 2594 /* bsol */, PPC::BCCL, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7691 | { 2599 /* bsol+ */, PPC::BCCL, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7692 | { 2599 /* bsol+ */, PPC::BCCL, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7693 | { 2605 /* bsol- */, PPC::BCCL, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7694 | { 2605 /* bsol- */, PPC::BCCL, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7695 | { 2611 /* bsola */, PPC::BCCLA, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7696 | { 2611 /* bsola */, PPC::BCCLA, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7697 | { 2617 /* bsola+ */, PPC::BCCLA, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7698 | { 2617 /* bsola+ */, PPC::BCCLA, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7699 | { 2624 /* bsola- */, PPC::BCCLA, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7700 | { 2624 /* bsola- */, PPC::BCCLA, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7701 | { 2631 /* bsolr */, PPC::BCCLR, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
| 7702 | { 2631 /* bsolr */, PPC::BCCLR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7703 | { 2637 /* bsolr+ */, PPC::BCCLR, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
| 7704 | { 2637 /* bsolr+ */, PPC::BCCLR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7705 | { 2644 /* bsolr- */, PPC::BCCLR, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
| 7706 | { 2644 /* bsolr- */, PPC::BCCLR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7707 | { 2651 /* bsolrl */, PPC::BCCLRL, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
| 7708 | { 2651 /* bsolrl */, PPC::BCCLRL, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7709 | { 2658 /* bsolrl+ */, PPC::BCCLRL, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
| 7710 | { 2658 /* bsolrl+ */, PPC::BCCLRL, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7711 | { 2666 /* bsolrl- */, PPC::BCCLRL, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
| 7712 | { 2666 /* bsolrl- */, PPC::BCCLRL, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7713 | { 2674 /* bt */, PPC::gBC, Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7714 | { 2677 /* bt+ */, PPC::gBC, Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7715 | { 2681 /* bt- */, PPC::gBC, Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7716 | { 2685 /* bta */, PPC::gBCA, Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7717 | { 2689 /* bta+ */, PPC::gBCA, Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7718 | { 2694 /* bta- */, PPC::gBCA, Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7719 | { 2699 /* btctr */, PPC::gBCCTR, Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7720 | { 2705 /* btctr+ */, PPC::gBCCTR, Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7721 | { 2712 /* btctr- */, PPC::gBCCTR, Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7722 | { 2719 /* btctrl */, PPC::gBCCTRL, Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7723 | { 2726 /* btctrl+ */, PPC::gBCCTRL, Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7724 | { 2734 /* btctrl- */, PPC::gBCCTRL, Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7725 | { 2742 /* btl */, PPC::gBCL, Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7726 | { 2746 /* btl+ */, PPC::gBCL, Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7727 | { 2751 /* btl- */, PPC::gBCL, Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7728 | { 2756 /* btla */, PPC::gBCLA, Convert__imm_95_12__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7729 | { 2761 /* btla+ */, PPC::gBCLA, Convert__imm_95_15__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7730 | { 2767 /* btla- */, PPC::gBCLA, Convert__imm_95_14__RegCRBITRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_CondBr }, }, |
| 7731 | { 2773 /* btlr */, PPC::gBCLR, Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7732 | { 2778 /* btlr+ */, PPC::gBCLR, Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7733 | { 2784 /* btlr- */, PPC::gBCLR, Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7734 | { 2790 /* btlrl */, PPC::gBCLRL, Convert__imm_95_12__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7735 | { 2796 /* btlrl+ */, PPC::gBCLRL, Convert__imm_95_15__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7736 | { 2803 /* btlrl- */, PPC::gBCLRL, Convert__imm_95_14__RegCRBITRC1_0__imm_95_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7737 | { 2810 /* bun */, PPC::BCC, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7738 | { 2810 /* bun */, PPC::BCC, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7739 | { 2814 /* bun+ */, PPC::BCC, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7740 | { 2814 /* bun+ */, PPC::BCC, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7741 | { 2819 /* bun- */, PPC::BCC, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7742 | { 2819 /* bun- */, PPC::BCC, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7743 | { 2824 /* buna */, PPC::BCCA, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7744 | { 2824 /* buna */, PPC::BCCA, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7745 | { 2829 /* buna+ */, PPC::BCCA, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7746 | { 2829 /* buna+ */, PPC::BCCA, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7747 | { 2835 /* buna- */, PPC::BCCA, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7748 | { 2835 /* buna- */, PPC::BCCA, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7749 | { 2841 /* bunctr */, PPC::BCCCTR, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
| 7750 | { 2841 /* bunctr */, PPC::BCCCTR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7751 | { 2848 /* bunctr+ */, PPC::BCCCTR, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
| 7752 | { 2848 /* bunctr+ */, PPC::BCCCTR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7753 | { 2856 /* bunctr- */, PPC::BCCCTR, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
| 7754 | { 2856 /* bunctr- */, PPC::BCCCTR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7755 | { 2864 /* bunctrl */, PPC::BCCCTRL, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
| 7756 | { 2864 /* bunctrl */, PPC::BCCCTRL, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7757 | { 2872 /* bunctrl+ */, PPC::BCCCTRL, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
| 7758 | { 2872 /* bunctrl+ */, PPC::BCCCTRL, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7759 | { 2881 /* bunctrl- */, PPC::BCCCTRL, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
| 7760 | { 2881 /* bunctrl- */, PPC::BCCCTRL, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7761 | { 2890 /* bunl */, PPC::BCCL, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7762 | { 2890 /* bunl */, PPC::BCCL, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7763 | { 2895 /* bunl+ */, PPC::BCCL, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7764 | { 2895 /* bunl+ */, PPC::BCCL, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7765 | { 2901 /* bunl- */, PPC::BCCL, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7766 | { 2901 /* bunl- */, PPC::BCCL, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7767 | { 2907 /* bunla */, PPC::BCCLA, Convert__imm_95_108__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7768 | { 2907 /* bunla */, PPC::BCCLA, Convert__imm_95_108__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7769 | { 2913 /* bunla+ */, PPC::BCCLA, Convert__imm_95_111__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7770 | { 2913 /* bunla+ */, PPC::BCCLA, Convert__imm_95_111__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7771 | { 2920 /* bunla- */, PPC::BCCLA, Convert__imm_95_110__regCR0__CondBr1_0, AMFBS_None, { MCK_CondBr }, }, |
| 7772 | { 2920 /* bunla- */, PPC::BCCLA, Convert__imm_95_110__RegCRRC1_0__CondBr1_1, AMFBS_None, { MCK_RegCRRC, MCK_CondBr }, }, |
| 7773 | { 2927 /* bunlr */, PPC::BCCLR, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
| 7774 | { 2927 /* bunlr */, PPC::BCCLR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7775 | { 2933 /* bunlr+ */, PPC::BCCLR, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
| 7776 | { 2933 /* bunlr+ */, PPC::BCCLR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7777 | { 2940 /* bunlr- */, PPC::BCCLR, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
| 7778 | { 2940 /* bunlr- */, PPC::BCCLR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7779 | { 2947 /* bunlrl */, PPC::BCCLRL, Convert__imm_95_108__regCR0, AMFBS_None, { }, }, |
| 7780 | { 2947 /* bunlrl */, PPC::BCCLRL, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7781 | { 2954 /* bunlrl+ */, PPC::BCCLRL, Convert__imm_95_111__regCR0, AMFBS_None, { }, }, |
| 7782 | { 2954 /* bunlrl+ */, PPC::BCCLRL, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7783 | { 2962 /* bunlrl- */, PPC::BCCLRL, Convert__imm_95_110__regCR0, AMFBS_None, { }, }, |
| 7784 | { 2962 /* bunlrl- */, PPC::BCCLRL, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 7785 | { 2970 /* cbcdtd */, PPC::CBCDTD, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7786 | { 2977 /* cdtbcd */, PPC::CDTBCD, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7787 | { 2984 /* cfuged */, PPC::CFUGED, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7788 | { 2991 /* clrbhrb */, PPC::CLRBHRB, Convert_NoOperands, AMFBS_None, { }, }, |
| 7789 | { 2999 /* clrldi */, PPC::RLDICL, Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 7790 | { 2999 /* clrldi */, PPC::RLDICL_32_64, Convert__RegG8RC1_0__RegGPRC1_1__imm_95_0__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
| 7791 | { 2999 /* clrldi */, PPC::RLDICL_rec, Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 7792 | { 3006 /* clrlsldi */, PPC::CLRLSLDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 7793 | { 3006 /* clrlsldi */, PPC::CLRLSLDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 7794 | { 3015 /* clrlslwi */, PPC::CLRLSLWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 7795 | { 3015 /* clrlslwi */, PPC::CLRLSLWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 7796 | { 3024 /* clrlwi */, PPC::RLWINM8, Convert__RegG8RC1_0__RegG8RC1_1__imm_95_0__U5Imm1_2__imm_95_31, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
| 7797 | { 3024 /* clrlwi */, PPC::RLWINM, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0__U5Imm1_2__imm_95_31, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 7798 | { 3024 /* clrlwi */, PPC::RLWINM8_rec, Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U5Imm1_3__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
| 7799 | { 3024 /* clrlwi */, PPC::RLWINM_rec, Convert__RegGPRC1_1__RegGPRC1_2__imm_95_0__U5Imm1_3__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 7800 | { 3031 /* clrrdi */, PPC::CLRRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 7801 | { 3031 /* clrrdi */, PPC::CLRRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 7802 | { 3038 /* clrrwi */, PPC::CLRRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 7803 | { 3038 /* clrrwi */, PPC::CLRRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 7804 | { 3045 /* cmp */, PPC::CMPW, Convert__RegCRRC1_0__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegCRRC, MCK_0, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7805 | { 3045 /* cmp */, PPC::CMPD, Convert__RegCRRC1_0__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK_RegCRRC, MCK_1, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7806 | { 3049 /* cmpb */, PPC::CMPB, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7807 | { 3054 /* cmpd */, PPC::CMPD, Convert__regCR0__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7808 | { 3054 /* cmpd */, PPC::CMPD, Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7809 | { 3059 /* cmpdi */, PPC::CMPDI, Convert__regCR0__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 7810 | { 3059 /* cmpdi */, PPC::CMPDI, Convert__RegCRRC1_0__RegG8RC1_1__S16Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_S16Imm }, }, |
| 7811 | { 3065 /* cmpeqb */, PPC::CMPEQB, Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7812 | { 3072 /* cmpi */, PPC::CMPWI, Convert__RegCRRC1_0__RegGPRC1_2__S16Imm1_3, AMFBS_None, { MCK_RegCRRC, MCK_0, MCK_RegGPRC, MCK_S16Imm }, }, |
| 7813 | { 3072 /* cmpi */, PPC::CMPDI, Convert__RegCRRC1_0__RegG8RC1_2__S16Imm1_3, AMFBS_None, { MCK_RegCRRC, MCK_1, MCK_RegG8RC, MCK_S16Imm }, }, |
| 7814 | { 3077 /* cmpl */, PPC::CMPLW, Convert__RegCRRC1_0__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegCRRC, MCK_0, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7815 | { 3077 /* cmpl */, PPC::CMPLD, Convert__RegCRRC1_0__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK_RegCRRC, MCK_1, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7816 | { 3082 /* cmpld */, PPC::CMPLD, Convert__regCR0__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7817 | { 3082 /* cmpld */, PPC::CMPLD, Convert__RegCRRC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7818 | { 3088 /* cmpldi */, PPC::CMPLDI, Convert__regCR0__RegG8RC1_0__U16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_U16Imm }, }, |
| 7819 | { 3088 /* cmpldi */, PPC::CMPLDI, Convert__RegCRRC1_0__RegG8RC1_1__U16Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegG8RC, MCK_U16Imm }, }, |
| 7820 | { 3095 /* cmpli */, PPC::CMPLWI, Convert__RegCRRC1_0__RegGPRC1_2__U16Imm1_3, AMFBS_None, { MCK_RegCRRC, MCK_0, MCK_RegGPRC, MCK_U16Imm }, }, |
| 7821 | { 3095 /* cmpli */, PPC::CMPLDI, Convert__RegCRRC1_0__RegG8RC1_2__U16Imm1_3, AMFBS_None, { MCK_RegCRRC, MCK_1, MCK_RegG8RC, MCK_U16Imm }, }, |
| 7822 | { 3101 /* cmplw */, PPC::CMPLW, Convert__regCR0__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7823 | { 3101 /* cmplw */, PPC::CMPLW, Convert__RegCRRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7824 | { 3107 /* cmplwi */, PPC::CMPLWI, Convert__regCR0__RegGPRC1_0__U16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_U16Imm }, }, |
| 7825 | { 3107 /* cmplwi */, PPC::CMPLWI, Convert__RegCRRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegGPRC, MCK_U16Imm }, }, |
| 7826 | { 3114 /* cmprb */, PPC::CMPRB, Convert__RegCRRC1_0__U1Imm1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegCRRC, MCK_U1Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7827 | { 3120 /* cmpw */, PPC::CMPW, Convert__regCR0__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7828 | { 3120 /* cmpw */, PPC::CMPW, Convert__RegCRRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7829 | { 3125 /* cmpwi */, PPC::CMPWI, Convert__regCR0__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 7830 | { 3125 /* cmpwi */, PPC::CMPWI, Convert__RegCRRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegGPRC, MCK_S16Imm }, }, |
| 7831 | { 3131 /* cntlzd */, PPC::CNTLZD, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7832 | { 3131 /* cntlzd */, PPC::CNTLZD_rec, Convert__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7833 | { 3138 /* cntlzdm */, PPC::CNTLZDM, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7834 | { 3146 /* cntlzw */, PPC::CNTLZW8, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7835 | { 3146 /* cntlzw */, PPC::CNTLZW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7836 | { 3146 /* cntlzw */, PPC::CNTLZW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7837 | { 3146 /* cntlzw */, PPC::CNTLZW8_rec, Convert__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7838 | { 3146 /* cntlzw */, PPC::CNTLZW_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7839 | { 3146 /* cntlzw */, PPC::CNTLZW_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7840 | { 3153 /* cnttzd */, PPC::CNTTZD, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7841 | { 3153 /* cnttzd */, PPC::CNTTZD_rec, Convert__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7842 | { 3160 /* cnttzdm */, PPC::CNTTZDM, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7843 | { 3168 /* cnttzw */, PPC::CNTTZW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7844 | { 3168 /* cnttzw */, PPC::CNTTZW_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7845 | { 3175 /* copy */, PPC::CP_COPY, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7846 | { 3180 /* cpabort */, PPC::CP_ABORT, Convert_NoOperands, AMFBS_None, { }, }, |
| 7847 | { 3188 /* crand */, PPC::CRAND, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7848 | { 3194 /* crandc */, PPC::CRANDC, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7849 | { 3201 /* crclr */, PPC::CRXOR, Convert__RegCRBITRC1_0__RegCRBITRC1_0__RegCRBITRC1_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7850 | { 3207 /* creqv */, PPC::CREQV, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7851 | { 3213 /* crmove */, PPC::CROR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7852 | { 3220 /* crnand */, PPC::CRNAND, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7853 | { 3227 /* crnor */, PPC::CRNOR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7854 | { 3233 /* crnot */, PPC::CRNOR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_1, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7855 | { 3239 /* cror */, PPC::CROR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7856 | { 3244 /* crorc */, PPC::CRORC, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7857 | { 3250 /* crset */, PPC::CREQV, Convert__RegCRBITRC1_0__RegCRBITRC1_0__RegCRBITRC1_0, AMFBS_None, { MCK_RegCRBITRC }, }, |
| 7858 | { 3256 /* crxor */, PPC::CRXOR, Convert__RegCRBITRC1_0__RegCRBITRC1_1__RegCRBITRC1_2, AMFBS_None, { MCK_RegCRBITRC, MCK_RegCRBITRC, MCK_RegCRBITRC }, }, |
| 7859 | { 3262 /* dadd */, PPC::DADD, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7860 | { 3262 /* dadd */, PPC::DADD_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7861 | { 3267 /* daddq */, PPC::DADDQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7862 | { 3267 /* daddq */, PPC::DADDQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7863 | { 3273 /* darn */, PPC::DARN, Convert__RegG8RC1_0__U2Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_U2Imm }, }, |
| 7864 | { 3278 /* dcba */, PPC::DCBA, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7865 | { 3283 /* dcbf */, PPC::DCBFx, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7866 | { 3283 /* dcbf */, PPC::DCBF, Convert__U3Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U3Imm }, }, |
| 7867 | { 3288 /* dcbfep */, PPC::DCBFEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7868 | { 3295 /* dcbfl */, PPC::DCBFL, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7869 | { 3301 /* dcbflp */, PPC::DCBFLP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7870 | { 3308 /* dcbfps */, PPC::DCBFPS, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7871 | { 3315 /* dcbi */, PPC::DCBI, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7872 | { 3320 /* dcbst */, PPC::DCBST, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7873 | { 3326 /* dcbstep */, PPC::DCBSTEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7874 | { 3334 /* dcbstps */, PPC::DCBSTPS, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7875 | { 3342 /* dcbt */, PPC::DCBTx, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7876 | { 3342 /* dcbt */, PPC::DCBT, Convert__U5Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
| 7877 | { 3347 /* dcbtct */, PPC::DCBTCT, Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
| 7878 | { 3354 /* dcbtds */, PPC::DCBTDS, Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
| 7879 | { 3361 /* dcbtep */, PPC::DCBTEP, Convert__RegGxRCNoR01_1__RegGxRC1_2__U5Imm1_0, AMFBS_None, { MCK_U5Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7880 | { 3368 /* dcbtst */, PPC::DCBTSTx, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7881 | { 3368 /* dcbtst */, PPC::DCBTST, Convert__U5Imm1_2__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
| 7882 | { 3375 /* dcbtstct */, PPC::DCBTSTCT, Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
| 7883 | { 3384 /* dcbtstds */, PPC::DCBTSTDS, Convert__RegGxRCNoR01_0__RegGxRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_U5Imm }, }, |
| 7884 | { 3393 /* dcbtstep */, PPC::DCBTSTEP, Convert__RegGxRCNoR01_1__RegGxRC1_2__U5Imm1_0, AMFBS_None, { MCK_U5Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7885 | { 3402 /* dcbtstt */, PPC::DCBTSTT, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7886 | { 3410 /* dcbtt */, PPC::DCBTT, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7887 | { 3416 /* dcbz */, PPC::DCBZ, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7888 | { 3421 /* dcbzep */, PPC::DCBZEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7889 | { 3428 /* dcbzl */, PPC::DCBZL, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7890 | { 3434 /* dcbzlep */, PPC::DCBZLEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 7891 | { 3442 /* dccci */, PPC::DCCCI, Convert__regR0__regR0, AMFBS_None, { }, }, |
| 7892 | { 3442 /* dccci */, PPC::DCCCI, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7893 | { 3448 /* dcffix */, PPC::DCFFIX, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7894 | { 3448 /* dcffix */, PPC::DCFFIX_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7895 | { 3455 /* dcffixq */, PPC::DCFFIXQ, Convert__RegFpRC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegFpRC, MCK_RegF8RC }, }, |
| 7896 | { 3455 /* dcffixq */, PPC::DCFFIXQ_rec, Convert__RegFpRC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegF8RC }, }, |
| 7897 | { 3463 /* dcffixqq */, PPC::DCFFIXQQ, Convert__RegFpRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegFpRC, MCK_RegVRRC }, }, |
| 7898 | { 3472 /* dci */, PPC::DCCCI, Convert__regR0__regR0, AMFBS_None, { MCK_0 }, }, |
| 7899 | { 3476 /* dcmpo */, PPC::DCMPO, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7900 | { 3482 /* dcmpoq */, PPC::DCMPOQ, Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7901 | { 3489 /* dcmpu */, PPC::DCMPU, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7902 | { 3495 /* dcmpuq */, PPC::DCMPUQ, Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7903 | { 3502 /* dctdp */, PPC::DCTDP, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7904 | { 3502 /* dctdp */, PPC::DCTDP_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7905 | { 3508 /* dctfix */, PPC::DCTFIX, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7906 | { 3508 /* dctfix */, PPC::DCTFIX_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7907 | { 3515 /* dctfixq */, PPC::DCTFIXQ, Convert__RegF8RC1_0__RegFpRC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegFpRC }, }, |
| 7908 | { 3515 /* dctfixq */, PPC::DCTFIXQ_rec, Convert__RegF8RC1_1__RegFpRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegFpRC }, }, |
| 7909 | { 3523 /* dctfixqq */, PPC::DCTFIXQQ, Convert__RegVRRC1_0__RegFpRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegFpRC }, }, |
| 7910 | { 3532 /* dctqpq */, PPC::DCTQPQ, Convert__RegFpRC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegFpRC, MCK_RegF8RC }, }, |
| 7911 | { 3532 /* dctqpq */, PPC::DCTQPQ_rec, Convert__RegFpRC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegF8RC }, }, |
| 7912 | { 3539 /* ddedpd */, PPC::DDEDPD, Convert__RegF8RC1_1__U2Imm1_0__RegF8RC1_2, AMFBS_None, { MCK_U2Imm, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7913 | { 3539 /* ddedpd */, PPC::DDEDPD_rec, Convert__RegF8RC1_2__U2Imm1_1__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_U2Imm, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7914 | { 3546 /* ddedpdq */, PPC::DDEDPDQ, Convert__RegFpRC1_1__U2Imm1_0__RegFpRC1_2, AMFBS_None, { MCK_U2Imm, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7915 | { 3546 /* ddedpdq */, PPC::DDEDPDQ_rec, Convert__RegFpRC1_2__U2Imm1_1__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_U2Imm, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7916 | { 3554 /* ddiv */, PPC::DDIV, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7917 | { 3554 /* ddiv */, PPC::DDIV_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7918 | { 3559 /* ddivq */, PPC::DDIVQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7919 | { 3559 /* ddivq */, PPC::DDIVQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7920 | { 3565 /* denbcd */, PPC::DENBCD, Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2, AMFBS_None, { MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7921 | { 3565 /* denbcd */, PPC::DENBCD_rec, Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7922 | { 3572 /* denbcdq */, PPC::DENBCDQ, Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2, AMFBS_None, { MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7923 | { 3572 /* denbcdq */, PPC::DENBCDQ_rec, Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7924 | { 3580 /* diex */, PPC::DIEX, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7925 | { 3580 /* diex */, PPC::DIEX_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7926 | { 3585 /* diexq */, PPC::DIEXQ, Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegF8RC, MCK_RegFpRC }, }, |
| 7927 | { 3585 /* diexq */, PPC::DIEXQ_rec, Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegF8RC, MCK_RegFpRC }, }, |
| 7928 | { 3591 /* divd */, PPC::DIVD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7929 | { 3591 /* divd */, PPC::DIVD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7930 | { 3596 /* divde */, PPC::DIVDE, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7931 | { 3596 /* divde */, PPC::DIVDE_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7932 | { 3602 /* divdeo */, PPC::DIVDEO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7933 | { 3602 /* divdeo */, PPC::DIVDEO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7934 | { 3609 /* divdeu */, PPC::DIVDEU, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7935 | { 3609 /* divdeu */, PPC::DIVDEU_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7936 | { 3616 /* divdeuo */, PPC::DIVDEUO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7937 | { 3616 /* divdeuo */, PPC::DIVDEUO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7938 | { 3624 /* divdo */, PPC::DIVDO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7939 | { 3624 /* divdo */, PPC::DIVDO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7940 | { 3630 /* divdu */, PPC::DIVDU, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7941 | { 3630 /* divdu */, PPC::DIVDU_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7942 | { 3636 /* divduo */, PPC::DIVDUO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7943 | { 3636 /* divduo */, PPC::DIVDUO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 7944 | { 3643 /* divw */, PPC::DIVW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7945 | { 3643 /* divw */, PPC::DIVW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7946 | { 3648 /* divwe */, PPC::DIVWE, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7947 | { 3648 /* divwe */, PPC::DIVWE_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7948 | { 3654 /* divweo */, PPC::DIVWEO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7949 | { 3654 /* divweo */, PPC::DIVWEO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7950 | { 3661 /* divweu */, PPC::DIVWEU, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7951 | { 3661 /* divweu */, PPC::DIVWEU_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7952 | { 3668 /* divweuo */, PPC::DIVWEUO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7953 | { 3668 /* divweuo */, PPC::DIVWEUO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7954 | { 3676 /* divwo */, PPC::DIVWO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7955 | { 3676 /* divwo */, PPC::DIVWO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7956 | { 3682 /* divwu */, PPC::DIVWU, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7957 | { 3682 /* divwu */, PPC::DIVWU_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7958 | { 3688 /* divwuo */, PPC::DIVWUO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7959 | { 3688 /* divwuo */, PPC::DIVWUO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 7960 | { 3695 /* dmcryshash */, PPC::DMSHA3HASH, Convert__RegDMRpRC1_0__Tie0_1_1__imm_95_12, AMFBS_None, { MCK_RegDMRpRC }, }, |
| 7961 | { 3706 /* dmmr */, PPC::DMMR, Convert__RegDMRRC1_0__RegDMRRC1_1, AMFBS_None, { MCK_RegDMRRC, MCK_RegDMRRC }, }, |
| 7962 | { 3711 /* dmsetdmrz */, PPC::DMSETDMRZ, Convert__RegDMRRC1_0, AMFBS_None, { MCK_RegDMRRC }, }, |
| 7963 | { 3721 /* dmsha256hash */, PPC::DMSHA2HASH, Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1__imm_95_0, AMFBS_None, { MCK_RegDMRRC, MCK_RegDMRRC }, }, |
| 7964 | { 3734 /* dmsha2hash */, PPC::DMSHA2HASH, Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegDMRRC, MCK_U1Imm }, }, |
| 7965 | { 3745 /* dmsha3dw */, PPC::DMSHA3HASH, Convert__RegDMRpRC1_0__Tie0_1_1__imm_95_0, AMFBS_None, { MCK_RegDMRpRC }, }, |
| 7966 | { 3754 /* dmsha3hash */, PPC::DMSHA3HASH, Convert__RegDMRpRC1_0__Tie0_1_1__U5Imm1_1, AMFBS_None, { MCK_RegDMRpRC, MCK_U5Imm }, }, |
| 7967 | { 3765 /* dmsha512hash */, PPC::DMSHA2HASH, Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1__imm_95_1, AMFBS_None, { MCK_RegDMRRC, MCK_RegDMRRC }, }, |
| 7968 | { 3778 /* dmul */, PPC::DMUL, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7969 | { 3778 /* dmul */, PPC::DMUL_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 7970 | { 3783 /* dmulq */, PPC::DMULQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7971 | { 3783 /* dmulq */, PPC::DMULQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 7972 | { 3789 /* dmxor */, PPC::DMXOR, Convert__RegDMRRC1_0__Tie0_1_1__RegDMRRC1_1, AMFBS_None, { MCK_RegDMRRC, MCK_RegDMRRC }, }, |
| 7973 | { 3795 /* dmxvbf16gerx2 */, PPC::DMXVBF16GERX2, Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7974 | { 3809 /* dmxvbf16gerx2nn */, PPC::DMXVBF16GERX2NN, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7975 | { 3825 /* dmxvbf16gerx2np */, PPC::DMXVBF16GERX2NP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7976 | { 3841 /* dmxvbf16gerx2pn */, PPC::DMXVBF16GERX2PN, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7977 | { 3857 /* dmxvbf16gerx2pp */, PPC::DMXVBF16GERX2PP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7978 | { 3873 /* dmxvf16gerx2 */, PPC::DMXVF16GERX2, Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7979 | { 3886 /* dmxvf16gerx2nn */, PPC::DMXVF16GERX2NN, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7980 | { 3901 /* dmxvf16gerx2np */, PPC::DMXVF16GERX2NP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7981 | { 3916 /* dmxvf16gerx2pn */, PPC::DMXVF16GERX2PN, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7982 | { 3931 /* dmxvf16gerx2pp */, PPC::DMXVF16GERX2PP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7983 | { 3946 /* dmxvi8gerx4 */, PPC::DMXVI8GERX4, Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7984 | { 3958 /* dmxvi8gerx4pp */, PPC::DMXVI8GERX4PP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7985 | { 3972 /* dmxvi8gerx4spp */, PPC::DMXVI8GERX4SPP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC }, }, |
| 7986 | { 3987 /* dmxxextfdmr256 */, PPC::DMXXEXTFDMR256, Convert__RegVSRpRC1_0__RegDMRROWpRC1_1__U2Imm1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegDMRROWpRC, MCK_U2Imm }, }, |
| 7987 | { 4002 /* dmxxextfdmr512 */, PPC::DMXXEXTFDMR512, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegACCRC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegACCRC, MCK_0 }, }, |
| 7988 | { 4002 /* dmxxextfdmr512 */, PPC::DMXXEXTFDMR512_HI, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegACCRC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegACCRC, MCK_1 }, }, |
| 7989 | { 4017 /* dmxxinstdmr256 */, PPC::DMXXINSTDMR256, Convert__RegDMRROWpRC1_0__RegVSRpRC1_1__U2Imm1_2, AMFBS_None, { MCK_RegDMRROWpRC, MCK_RegVSRpRC, MCK_U2Imm }, }, |
| 7990 | { 4032 /* dmxxinstdmr512 */, PPC::DMXXINSTDMR512, Convert__RegACCRC1_0__RegVSRpRC1_1__RegVSRpRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_0 }, }, |
| 7991 | { 4032 /* dmxxinstdmr512 */, PPC::DMXXINSTDMR512_HI, Convert__RegACCRC1_0__RegVSRpRC1_1__RegVSRpRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_1 }, }, |
| 7992 | { 4047 /* dmxxmmfacc */, PPC::XXMFACC, Convert__RegACCRC1_0__Tie0_1_1, AMFBS_None, { MCK_RegACCRC }, }, |
| 7993 | { 4058 /* dmxxmmtacc */, PPC::XXMTACC, Convert__RegACCRC1_0__Tie0_1_1, AMFBS_None, { MCK_RegACCRC }, }, |
| 7994 | { 4069 /* dmxxsetaccz */, PPC::XXSETACCZ, Convert__RegACCRC1_0, AMFBS_None, { MCK_RegACCRC }, }, |
| 7995 | { 4081 /* dmxxsha224256pad */, PPC::DMXXSHAPAD, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_3__imm_95_0__imm_95_0, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRC }, }, |
| 7996 | { 4098 /* dmxxsha3224pad */, PPC::DMXXSHAPAD, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_3, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 7997 | { 4113 /* dmxxsha3256pad */, PPC::DMXXSHAPAD, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_2, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 7998 | { 4128 /* dmxxsha3384pad */, PPC::DMXXSHAPAD, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_1, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 7999 | { 4143 /* dmxxsha3512pad */, PPC::DMXXSHAPAD, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_0__U1Imm1_2__imm_95_0, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 8000 | { 4158 /* dmxxsha384512pad */, PPC::DMXXSHAPAD, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_2__imm_95_0__imm_95_0, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRC }, }, |
| 8001 | { 4175 /* dmxxshake128pad */, PPC::DMXXSHAPAD, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_1__U1Imm1_2__imm_95_1, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 8002 | { 4191 /* dmxxshake256pad */, PPC::DMXXSHAPAD, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__imm_95_1__U1Imm1_2__imm_95_0, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 8003 | { 4207 /* dmxxshapad */, PPC::DMXXSHAPAD, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRC1_1__U2Imm1_2__U1Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRC, MCK_U2Imm, MCK_U1Imm, MCK_U2Imm }, }, |
| 8004 | { 4218 /* dqua */, PPC::DQUA, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8005 | { 4218 /* dqua */, PPC::DQUA_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8006 | { 4223 /* dquai */, PPC::DQUAI, Convert__RegF8RC1_1__S5Imm1_0__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_S5Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8007 | { 4223 /* dquai */, PPC::DQUAI_rec, Convert__RegF8RC1_2__S5Imm1_1__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_S5Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8008 | { 4229 /* dquaiq */, PPC::DQUAIQ, Convert__RegFpRC1_1__S5Imm1_0__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_S5Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8009 | { 4229 /* dquaiq */, PPC::DQUAIQ_rec, Convert__RegFpRC1_2__S5Imm1_1__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_S5Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8010 | { 4236 /* dquaq */, PPC::DQUAQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8011 | { 4236 /* dquaq */, PPC::DQUAQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8012 | { 4242 /* drdpq */, PPC::DRDPQ, Convert__RegFpRC1_0__RegFpRC1_1, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC }, }, |
| 8013 | { 4242 /* drdpq */, PPC::DRDPQ_rec, Convert__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 8014 | { 4248 /* drintn */, PPC::DRINTN, Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8015 | { 4248 /* drintn */, PPC::DRINTN_rec, Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8016 | { 4255 /* drintnq */, PPC::DRINTNQ, Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8017 | { 4255 /* drintnq */, PPC::DRINTNQ_rec, Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8018 | { 4263 /* drintx */, PPC::DRINTX, Convert__RegF8RC1_1__U1Imm1_0__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8019 | { 4263 /* drintx */, PPC::DRINTX_rec, Convert__RegF8RC1_2__U1Imm1_1__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8020 | { 4270 /* drintxq */, PPC::DRINTXQ, Convert__RegFpRC1_1__U1Imm1_0__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8021 | { 4270 /* drintxq */, PPC::DRINTXQ_rec, Convert__RegFpRC1_2__U1Imm1_1__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_U1Imm, MCK_RegFpRC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8022 | { 4278 /* drrnd */, PPC::DRRND, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__U2Imm1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8023 | { 4278 /* drrnd */, PPC::DRRND_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_U2Imm }, }, |
| 8024 | { 4284 /* drrndq */, PPC::DRRNDQ, Convert__RegFpRC1_0__RegF8RC1_1__RegFpRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegFpRC, MCK_RegF8RC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8025 | { 4284 /* drrndq */, PPC::DRRNDQ_rec, Convert__RegFpRC1_1__RegF8RC1_2__RegFpRC1_3__U2Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegF8RC, MCK_RegFpRC, MCK_U2Imm }, }, |
| 8026 | { 4291 /* drsp */, PPC::DRSP, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8027 | { 4291 /* drsp */, PPC::DRSP_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8028 | { 4296 /* dscli */, PPC::DSCLI, Convert__RegF8RC1_0__RegF8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_U6Imm }, }, |
| 8029 | { 4296 /* dscli */, PPC::DSCLI_rec, Convert__RegF8RC1_1__RegF8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_U6Imm }, }, |
| 8030 | { 4302 /* dscliq */, PPC::DSCLIQ, Convert__RegFpRC1_0__RegFpRC1_1__U6Imm1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_U6Imm }, }, |
| 8031 | { 4302 /* dscliq */, PPC::DSCLIQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_U6Imm }, }, |
| 8032 | { 4309 /* dscri */, PPC::DSCRI, Convert__RegF8RC1_0__RegF8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_U6Imm }, }, |
| 8033 | { 4309 /* dscri */, PPC::DSCRI_rec, Convert__RegF8RC1_1__RegF8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_U6Imm }, }, |
| 8034 | { 4315 /* dscriq */, PPC::DSCRIQ, Convert__RegFpRC1_0__RegFpRC1_1__U6Imm1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_U6Imm }, }, |
| 8035 | { 4315 /* dscriq */, PPC::DSCRIQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_U6Imm }, }, |
| 8036 | { 4322 /* dss */, PPC::DSS, Convert__U5Imm1_0, AMFBS_None, { MCK_U5Imm }, }, |
| 8037 | { 4326 /* dssall */, PPC::DSSALL, Convert_NoOperands, AMFBS_None, { }, }, |
| 8038 | { 4333 /* dst */, PPC::DST, Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 8039 | { 4337 /* dstst */, PPC::DSTST, Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 8040 | { 4343 /* dststt */, PPC::DSTSTT, Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 8041 | { 4350 /* dstt */, PPC::DSTT, Convert__U5Imm1_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 8042 | { 4355 /* dsub */, PPC::DSUB, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8043 | { 4355 /* dsub */, PPC::DSUB_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8044 | { 4360 /* dsubq */, PPC::DSUBQ, Convert__RegFpRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 8045 | { 4360 /* dsubq */, PPC::DSUBQ_rec, Convert__RegFpRC1_1__RegFpRC1_2__RegFpRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegFpRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 8046 | { 4366 /* dtstdc */, PPC::DTSTDC, Convert__RegCRRC1_0__RegF8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_U6Imm }, }, |
| 8047 | { 4373 /* dtstdcq */, PPC::DTSTDCQ, Convert__RegCRRC1_0__RegFpRC1_1__U6Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_U6Imm }, }, |
| 8048 | { 4381 /* dtstdg */, PPC::DTSTDG, Convert__RegCRRC1_0__RegF8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_U6Imm }, }, |
| 8049 | { 4388 /* dtstdgq */, PPC::DTSTDGQ, Convert__RegCRRC1_0__RegFpRC1_1__U6Imm1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_U6Imm }, }, |
| 8050 | { 4396 /* dtstex */, PPC::DTSTEX, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8051 | { 4403 /* dtstexq */, PPC::DTSTEXQ, Convert__RegCRRC1_0__RegFpRC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegFpRC, MCK_RegFpRC }, }, |
| 8052 | { 4411 /* dtstsf */, PPC::DTSTSF, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8053 | { 4418 /* dtstsfi */, PPC::DTSTSFI, Convert__RegCRRC1_0__U6Imm1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_U6Imm, MCK_RegF8RC }, }, |
| 8054 | { 4426 /* dtstsfiq */, PPC::DTSTSFIQ, Convert__RegCRRC1_0__U6Imm1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_U6Imm, MCK_RegFpRC }, }, |
| 8055 | { 4435 /* dtstsfq */, PPC::DTSTSFQ, Convert__RegCRRC1_0__RegF8RC1_1__RegFpRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegFpRC }, }, |
| 8056 | { 4443 /* dxex */, PPC::DXEX, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8057 | { 4443 /* dxex */, PPC::DXEX_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8058 | { 4448 /* dxexq */, PPC::DXEXQ, Convert__RegF8RC1_0__RegFpRC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegFpRC }, }, |
| 8059 | { 4448 /* dxexq */, PPC::DXEXQ_rec, Convert__RegF8RC1_1__RegFpRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegFpRC }, }, |
| 8060 | { 4454 /* efdabs */, PPC::EFDABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8061 | { 4461 /* efdadd */, PPC::EFDADD, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8062 | { 4468 /* efdcfs */, PPC::EFDCFS, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
| 8063 | { 4475 /* efdcfsf */, PPC::EFDCFSF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
| 8064 | { 4483 /* efdcfsi */, PPC::EFDCFSI, Convert__RegSPERC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC }, }, |
| 8065 | { 4491 /* efdcfsid */, PPC::EFDCFSID, Convert__RegSPERC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC }, }, |
| 8066 | { 4500 /* efdcfuf */, PPC::EFDCFUF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
| 8067 | { 4508 /* efdcfui */, PPC::EFDCFUI, Convert__RegSPERC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC }, }, |
| 8068 | { 4516 /* efdcfuid */, PPC::EFDCFUID, Convert__RegSPERC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC }, }, |
| 8069 | { 4525 /* efdcmpeq */, PPC::EFDCMPEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8070 | { 4534 /* efdcmpgt */, PPC::EFDCMPGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8071 | { 4543 /* efdcmplt */, PPC::EFDCMPLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8072 | { 4552 /* efdctsf */, PPC::EFDCTSF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
| 8073 | { 4560 /* efdctsi */, PPC::EFDCTSI, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
| 8074 | { 4568 /* efdctsidz */, PPC::EFDCTSIDZ, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
| 8075 | { 4578 /* efdctsiz */, PPC::EFDCTSIZ, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
| 8076 | { 4587 /* efdctuf */, PPC::EFDCTUF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
| 8077 | { 4595 /* efdctui */, PPC::EFDCTUI, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
| 8078 | { 4603 /* efdctuidz */, PPC::EFDCTUIDZ, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
| 8079 | { 4613 /* efdctuiz */, PPC::EFDCTUIZ, Convert__RegGPRC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPERC }, }, |
| 8080 | { 4622 /* efddiv */, PPC::EFDDIV, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8081 | { 4629 /* efdmul */, PPC::EFDMUL, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8082 | { 4636 /* efdnabs */, PPC::EFDNABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8083 | { 4644 /* efdneg */, PPC::EFDNEG, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8084 | { 4651 /* efdsub */, PPC::EFDSUB, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8085 | { 4658 /* efdtsteq */, PPC::EFDTSTEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8086 | { 4667 /* efdtstgt */, PPC::EFDTSTGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8087 | { 4676 /* efdtstlt */, PPC::EFDTSTLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8088 | { 4685 /* efsabs */, PPC::EFSABS, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8089 | { 4692 /* efsadd */, PPC::EFSADD, Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8090 | { 4699 /* efscfd */, PPC::EFSCFD, Convert__RegSPE4RC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPERC }, }, |
| 8091 | { 4706 /* efscfsf */, PPC::EFSCFSF, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8092 | { 4714 /* efscfsi */, PPC::EFSCFSI, Convert__RegSPE4RC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegGPRC }, }, |
| 8093 | { 4722 /* efscfuf */, PPC::EFSCFUF, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8094 | { 4730 /* efscfui */, PPC::EFSCFUI, Convert__RegSPE4RC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegGPRC }, }, |
| 8095 | { 4738 /* efscmpeq */, PPC::EFSCMPEQ, Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8096 | { 4747 /* efscmpgt */, PPC::EFSCMPGT, Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8097 | { 4756 /* efscmplt */, PPC::EFSCMPLT, Convert__RegCRRC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8098 | { 4765 /* efsctsf */, PPC::EFSCTSF, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8099 | { 4773 /* efsctsi */, PPC::EFSCTSI, Convert__RegGPRC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPE4RC }, }, |
| 8100 | { 4781 /* efsctsiz */, PPC::EFSCTSIZ, Convert__RegGPRC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPE4RC }, }, |
| 8101 | { 4790 /* efsctuf */, PPC::EFSCTUF, Convert__RegSPERC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPE4RC }, }, |
| 8102 | { 4798 /* efsctui */, PPC::EFSCTUI, Convert__RegGPRC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPE4RC }, }, |
| 8103 | { 4806 /* efsctuiz */, PPC::EFSCTUIZ, Convert__RegGPRC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegSPE4RC }, }, |
| 8104 | { 4815 /* efsdiv */, PPC::EFSDIV, Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8105 | { 4822 /* efsmul */, PPC::EFSMUL, Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8106 | { 4829 /* efsnabs */, PPC::EFSNABS, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8107 | { 4837 /* efsneg */, PPC::EFSNEG, Convert__RegSPE4RC1_0__RegSPE4RC1_1, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8108 | { 4844 /* efssub */, PPC::EFSSUB, Convert__RegSPE4RC1_0__RegSPE4RC1_1__RegSPE4RC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegSPE4RC, MCK_RegSPE4RC }, }, |
| 8109 | { 4851 /* efststeq */, PPC::EFSTSTEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8110 | { 4860 /* efststgt */, PPC::EFSTSTGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8111 | { 4869 /* efststlt */, PPC::EFSTSTLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8112 | { 4878 /* eieio */, PPC::EnforceIEIO, Convert_NoOperands, AMFBS_None, { }, }, |
| 8113 | { 4884 /* eqv */, PPC::EQV, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8114 | { 4884 /* eqv */, PPC::EQV_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8115 | { 4888 /* evabs */, PPC::EVABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8116 | { 4894 /* evaddiw */, PPC::EVADDIW, Convert__RegSPERC1_0__RegSPERC1_2__U5Imm1_1, AMFBS_None, { MCK_RegSPERC, MCK_U5Imm, MCK_RegSPERC }, }, |
| 8117 | { 4902 /* evaddsmiaaw */, PPC::EVADDSMIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8118 | { 4914 /* evaddssiaaw */, PPC::EVADDSSIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8119 | { 4926 /* evaddumiaaw */, PPC::EVADDUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8120 | { 4938 /* evaddusiaaw */, PPC::EVADDUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8121 | { 4950 /* evaddw */, PPC::EVADDW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8122 | { 4957 /* evand */, PPC::EVAND, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8123 | { 4963 /* evandc */, PPC::EVANDC, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8124 | { 4970 /* evcmpeq */, PPC::EVCMPEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8125 | { 4978 /* evcmpgts */, PPC::EVCMPGTS, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8126 | { 4987 /* evcmpgtu */, PPC::EVCMPGTU, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8127 | { 4996 /* evcmplts */, PPC::EVCMPLTS, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8128 | { 5005 /* evcmpltu */, PPC::EVCMPLTU, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8129 | { 5014 /* evcntlsw */, PPC::EVCNTLSW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8130 | { 5023 /* evcntlzw */, PPC::EVCNTLZW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8131 | { 5032 /* evdivws */, PPC::EVDIVWS, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8132 | { 5040 /* evdivwu */, PPC::EVDIVWU, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8133 | { 5048 /* eveqv */, PPC::EVEQV, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8134 | { 5054 /* evextsb */, PPC::EVEXTSB, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8135 | { 5062 /* evextsh */, PPC::EVEXTSH, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8136 | { 5070 /* evfsabs */, PPC::EVFSABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8137 | { 5078 /* evfsadd */, PPC::EVFSADD, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8138 | { 5086 /* evfscfsf */, PPC::EVFSCFSF, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8139 | { 5095 /* evfscfsi */, PPC::EVFSCFSI, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8140 | { 5104 /* evfscfuf */, PPC::EVFSCFUF, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8141 | { 5113 /* evfscfui */, PPC::EVFSCFUI, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8142 | { 5122 /* evfscmpeq */, PPC::EVFSCMPEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8143 | { 5132 /* evfscmpgt */, PPC::EVFSCMPGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8144 | { 5142 /* evfscmplt */, PPC::EVFSCMPLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8145 | { 5152 /* evfsctsf */, PPC::EVFSCTSF, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8146 | { 5152 /* evfsctsf */, PPC::EVFSCTUF, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8147 | { 5161 /* evfsctsi */, PPC::EVFSCTSI, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8148 | { 5170 /* evfsctsiz */, PPC::EVFSCTSIZ, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8149 | { 5170 /* evfsctsiz */, PPC::EVFSCTUIZ, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8150 | { 5180 /* evfsctui */, PPC::EVFSCTUI, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8151 | { 5189 /* evfsdiv */, PPC::EVFSDIV, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8152 | { 5197 /* evfsmul */, PPC::EVFSMUL, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8153 | { 5205 /* evfsnabs */, PPC::EVFSNABS, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8154 | { 5214 /* evfsneg */, PPC::EVFSNEG, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8155 | { 5222 /* evfssub */, PPC::EVFSSUB, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8156 | { 5230 /* evfststeq */, PPC::EVFSTSTEQ, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8157 | { 5240 /* evfststgt */, PPC::EVFSTSTGT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8158 | { 5250 /* evfststlt */, PPC::EVFSTSTLT, Convert__RegCRRC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8159 | { 5260 /* evldd */, PPC::EVLDD, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
| 8160 | { 5266 /* evlddx */, PPC::EVLDDX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8161 | { 5273 /* evldh */, PPC::EVLDH, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
| 8162 | { 5279 /* evldhx */, PPC::EVLDHX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8163 | { 5286 /* evldw */, PPC::EVLDW, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
| 8164 | { 5292 /* evldwx */, PPC::EVLDWX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8165 | { 5299 /* evlhhesplat */, PPC::EVLHHESPLAT, Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE2, MCK_RegGxRCNoR0 }, }, |
| 8166 | { 5311 /* evlhhesplatx */, PPC::EVLHHESPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8167 | { 5324 /* evlhhossplat */, PPC::EVLHHOSSPLAT, Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE2, MCK_RegGxRCNoR0 }, }, |
| 8168 | { 5337 /* evlhhossplatx */, PPC::EVLHHOSSPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8169 | { 5351 /* evlhhousplat */, PPC::EVLHHOUSPLAT, Convert__RegSPERC1_0__DispSPE21_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE2, MCK_RegGxRCNoR0 }, }, |
| 8170 | { 5364 /* evlhhousplatx */, PPC::EVLHHOUSPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8171 | { 5378 /* evlwhe */, PPC::EVLWHE, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
| 8172 | { 5385 /* evlwhex */, PPC::EVLWHEX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8173 | { 5393 /* evlwhos */, PPC::EVLWHOS, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
| 8174 | { 5401 /* evlwhosx */, PPC::EVLWHOSX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8175 | { 5410 /* evlwhou */, PPC::EVLWHOU, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
| 8176 | { 5418 /* evlwhoux */, PPC::EVLWHOUX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8177 | { 5427 /* evlwhsplat */, PPC::EVLWHSPLAT, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
| 8178 | { 5438 /* evlwhsplatx */, PPC::EVLWHSPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8179 | { 5450 /* evlwwsplat */, PPC::EVLWWSPLAT, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
| 8180 | { 5461 /* evlwwsplatx */, PPC::EVLWWSPLATX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8181 | { 5473 /* evmergehi */, PPC::EVMERGEHI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8182 | { 5483 /* evmergehilo */, PPC::EVMERGEHILO, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8183 | { 5495 /* evmergelo */, PPC::EVMERGELO, Convert__RegSPERC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8184 | { 5505 /* evmergelohi */, PPC::EVMERGELOHI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8185 | { 5517 /* evmhegsmfaa */, PPC::EVMHEGSMFAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8186 | { 5529 /* evmhegsmfan */, PPC::EVMHEGSMFAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8187 | { 5541 /* evmhegsmiaa */, PPC::EVMHEGSMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8188 | { 5553 /* evmhegsmian */, PPC::EVMHEGSMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8189 | { 5565 /* evmhegumiaa */, PPC::EVMHEGUMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8190 | { 5577 /* evmhegumian */, PPC::EVMHEGUMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8191 | { 5589 /* evmhesmf */, PPC::EVMHESMF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8192 | { 5598 /* evmhesmfa */, PPC::EVMHESMFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8193 | { 5608 /* evmhesmfaaw */, PPC::EVMHESMFAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8194 | { 5620 /* evmhesmfanw */, PPC::EVMHESMFANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8195 | { 5632 /* evmhesmi */, PPC::EVMHESMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8196 | { 5641 /* evmhesmia */, PPC::EVMHESMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8197 | { 5651 /* evmhesmiaaw */, PPC::EVMHESMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8198 | { 5663 /* evmhesmianw */, PPC::EVMHESMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8199 | { 5675 /* evmhessf */, PPC::EVMHESSF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8200 | { 5684 /* evmhessfa */, PPC::EVMHESSFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8201 | { 5694 /* evmhessfaaw */, PPC::EVMHESSFAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8202 | { 5706 /* evmhessfanw */, PPC::EVMHESSFANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8203 | { 5718 /* evmhessiaaw */, PPC::EVMHESSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8204 | { 5730 /* evmhessianw */, PPC::EVMHESSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8205 | { 5742 /* evmheumi */, PPC::EVMHEUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8206 | { 5751 /* evmheumia */, PPC::EVMHEUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8207 | { 5761 /* evmheumiaaw */, PPC::EVMHEUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8208 | { 5773 /* evmheumianw */, PPC::EVMHEUMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8209 | { 5785 /* evmheusiaaw */, PPC::EVMHEUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8210 | { 5797 /* evmheusianw */, PPC::EVMHEUSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8211 | { 5809 /* evmhogsmfaa */, PPC::EVMHOGSMFAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8212 | { 5821 /* evmhogsmfan */, PPC::EVMHOGSMFAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8213 | { 5833 /* evmhogsmiaa */, PPC::EVMHOGSMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8214 | { 5845 /* evmhogsmian */, PPC::EVMHOGSMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8215 | { 5857 /* evmhogumiaa */, PPC::EVMHOGUMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8216 | { 5869 /* evmhogumian */, PPC::EVMHOGUMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8217 | { 5881 /* evmhosmf */, PPC::EVMHOSMF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8218 | { 5890 /* evmhosmfa */, PPC::EVMHOSMFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8219 | { 5900 /* evmhosmfaaw */, PPC::EVMHOSMFAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8220 | { 5912 /* evmhosmfanw */, PPC::EVMHOSMFANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8221 | { 5924 /* evmhosmi */, PPC::EVMHOSMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8222 | { 5933 /* evmhosmia */, PPC::EVMHOSMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8223 | { 5943 /* evmhosmiaaw */, PPC::EVMHOSMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8224 | { 5955 /* evmhosmianw */, PPC::EVMHOSMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8225 | { 5967 /* evmhossf */, PPC::EVMHOSSF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8226 | { 5976 /* evmhossfa */, PPC::EVMHOSSFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8227 | { 5986 /* evmhossfaaw */, PPC::EVMHOSSFAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8228 | { 5998 /* evmhossfanw */, PPC::EVMHOSSFANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8229 | { 6010 /* evmhossiaaw */, PPC::EVMHOSSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8230 | { 6022 /* evmhossianw */, PPC::EVMHOSSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8231 | { 6034 /* evmhoumi */, PPC::EVMHOUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8232 | { 6043 /* evmhoumia */, PPC::EVMHOUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8233 | { 6053 /* evmhoumiaaw */, PPC::EVMHOUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8234 | { 6065 /* evmhoumianw */, PPC::EVMHOUMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8235 | { 6077 /* evmhousiaaw */, PPC::EVMHOUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8236 | { 6089 /* evmhousianw */, PPC::EVMHOUSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8237 | { 6101 /* evmra */, PPC::EVMRA, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8238 | { 6107 /* evmwhsmf */, PPC::EVMWHSMF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8239 | { 6116 /* evmwhsmfa */, PPC::EVMWHSMFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8240 | { 6126 /* evmwhsmi */, PPC::EVMWHSMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8241 | { 6135 /* evmwhsmia */, PPC::EVMWHSMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8242 | { 6145 /* evmwhssf */, PPC::EVMWHSSF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8243 | { 6154 /* evmwhssfa */, PPC::EVMWHSSFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8244 | { 6164 /* evmwhumi */, PPC::EVMWHUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8245 | { 6173 /* evmwhumia */, PPC::EVMWHUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8246 | { 6183 /* evmwlsmiaaw */, PPC::EVMWLSMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8247 | { 6195 /* evmwlsmianw */, PPC::EVMWLSMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8248 | { 6207 /* evmwlssiaaw */, PPC::EVMWLSSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8249 | { 6219 /* evmwlssianw */, PPC::EVMWLSSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8250 | { 6231 /* evmwlumi */, PPC::EVMWLUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8251 | { 6240 /* evmwlumia */, PPC::EVMWLUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8252 | { 6250 /* evmwlumiaaw */, PPC::EVMWLUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8253 | { 6262 /* evmwlumianw */, PPC::EVMWLUMIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8254 | { 6274 /* evmwlusiaaw */, PPC::EVMWLUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8255 | { 6286 /* evmwlusianw */, PPC::EVMWLUSIANW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8256 | { 6298 /* evmwsmf */, PPC::EVMWSMF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8257 | { 6306 /* evmwsmfa */, PPC::EVMWSMFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8258 | { 6315 /* evmwsmfaa */, PPC::EVMWSMFAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8259 | { 6325 /* evmwsmfan */, PPC::EVMWSMFAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8260 | { 6335 /* evmwsmi */, PPC::EVMWSMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8261 | { 6343 /* evmwsmia */, PPC::EVMWSMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8262 | { 6352 /* evmwsmiaa */, PPC::EVMWSMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8263 | { 6362 /* evmwsmian */, PPC::EVMWSMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8264 | { 6372 /* evmwssf */, PPC::EVMWSSF, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8265 | { 6380 /* evmwssfa */, PPC::EVMWSSFA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8266 | { 6389 /* evmwssfaa */, PPC::EVMWSSFAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8267 | { 6399 /* evmwssfan */, PPC::EVMWSSFAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8268 | { 6409 /* evmwumi */, PPC::EVMWUMI, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8269 | { 6417 /* evmwumia */, PPC::EVMWUMIA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8270 | { 6426 /* evmwumiaa */, PPC::EVMWUMIAA, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8271 | { 6436 /* evmwumian */, PPC::EVMWUMIAN, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8272 | { 6446 /* evnand */, PPC::EVNAND, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8273 | { 6453 /* evneg */, PPC::EVNEG, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8274 | { 6459 /* evnor */, PPC::EVNOR, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8275 | { 6465 /* evor */, PPC::EVOR, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8276 | { 6470 /* evorc */, PPC::EVORC, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8277 | { 6476 /* evrlw */, PPC::EVRLW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8278 | { 6482 /* evrlwi */, PPC::EVRLWI, Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_U5Imm }, }, |
| 8279 | { 6489 /* evrndw */, PPC::EVRNDW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8280 | { 6496 /* evsel */, PPC::EVSEL, Convert__RegSPERC1_1__RegSPERC1_2__RegSPERC1_3__imm_95_0, AMFBS_None, { MCK_crD, MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8281 | { 6502 /* evslw */, PPC::EVSLW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8282 | { 6508 /* evslwi */, PPC::EVSLWI, Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_U5Imm }, }, |
| 8283 | { 6515 /* evsplatfi */, PPC::EVSPLATFI, Convert__RegSPERC1_0__S5Imm1_1, AMFBS_None, { MCK_RegSPERC, MCK_S5Imm }, }, |
| 8284 | { 6525 /* evsplati */, PPC::EVSPLATI, Convert__RegSPERC1_0__S5Imm1_1, AMFBS_None, { MCK_RegSPERC, MCK_S5Imm }, }, |
| 8285 | { 6534 /* evsrwis */, PPC::EVSRWIS, Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_U5Imm }, }, |
| 8286 | { 6542 /* evsrwiu */, PPC::EVSRWIU, Convert__RegSPERC1_0__RegSPERC1_1__U5Imm1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_U5Imm }, }, |
| 8287 | { 6550 /* evsrws */, PPC::EVSRWS, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8288 | { 6557 /* evsrwu */, PPC::EVSRWU, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8289 | { 6564 /* evstdd */, PPC::EVSTDD, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
| 8290 | { 6571 /* evstddx */, PPC::EVSTDDX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8291 | { 6579 /* evstdh */, PPC::EVSTDH, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
| 8292 | { 6586 /* evstdhx */, PPC::EVSTDHX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8293 | { 6594 /* evstdw */, PPC::EVSTDW, Convert__RegSPERC1_0__DispSPE81_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE8, MCK_RegGxRCNoR0 }, }, |
| 8294 | { 6601 /* evstdwx */, PPC::EVSTDWX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8295 | { 6609 /* evstwhe */, PPC::EVSTWHE, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
| 8296 | { 6617 /* evstwhex */, PPC::EVSTWHEX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8297 | { 6626 /* evstwho */, PPC::EVSTWHO, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
| 8298 | { 6634 /* evstwhox */, PPC::EVSTWHOX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8299 | { 6643 /* evstwwe */, PPC::EVSTWWE, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
| 8300 | { 6651 /* evstwwex */, PPC::EVSTWWEX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8301 | { 6660 /* evstwwo */, PPC::EVSTWWO, Convert__RegSPERC1_0__DispSPE41_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPERC, MCK_DispSPE4, MCK_RegGxRCNoR0 }, }, |
| 8302 | { 6668 /* evstwwox */, PPC::EVSTWWOX, Convert__RegSPERC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8303 | { 6677 /* evsubfsmiaaw */, PPC::EVSUBFSMIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8304 | { 6690 /* evsubfssiaaw */, PPC::EVSUBFSSIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8305 | { 6703 /* evsubfumiaaw */, PPC::EVSUBFUMIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8306 | { 6716 /* evsubfusiaaw */, PPC::EVSUBFUSIAAW, Convert__RegSPERC1_0__RegSPERC1_1, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8307 | { 6729 /* evsubfw */, PPC::EVSUBFW, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8308 | { 6737 /* evsubifw */, PPC::EVSUBIFW, Convert__RegSPERC1_0__U5Imm1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_U5Imm, MCK_RegSPERC }, }, |
| 8309 | { 6746 /* evxor */, PPC::EVXOR, Convert__RegSPERC1_0__RegSPERC1_1__RegSPERC1_2, AMFBS_None, { MCK_RegSPERC, MCK_RegSPERC, MCK_RegSPERC }, }, |
| 8310 | { 6752 /* extldi */, PPC::EXTLDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 8311 | { 6752 /* extldi */, PPC::EXTLDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 8312 | { 6759 /* extlwi */, PPC::EXTLWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 8313 | { 6759 /* extlwi */, PPC::EXTLWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 8314 | { 6766 /* extrdi */, PPC::EXTRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 8315 | { 6766 /* extrdi */, PPC::EXTRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 8316 | { 6773 /* extrwi */, PPC::EXTRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 8317 | { 6773 /* extrwi */, PPC::EXTRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 8318 | { 6780 /* extsb */, PPC::EXTSB, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8319 | { 6780 /* extsb */, PPC::EXTSB_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8320 | { 6786 /* extsh */, PPC::EXTSH, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8321 | { 6786 /* extsh */, PPC::EXTSH_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8322 | { 6792 /* extsw */, PPC::EXTSW, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8323 | { 6792 /* extsw */, PPC::EXTSW_rec, Convert__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8324 | { 6798 /* extswsli */, PPC::EXTSWSLI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 8325 | { 6798 /* extswsli */, PPC::EXTSWSLI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 8326 | { 6807 /* fabs */, PPC::FABSS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8327 | { 6807 /* fabs */, PPC::FABSS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8328 | { 6812 /* fadd */, PPC::FADD, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8329 | { 6812 /* fadd */, PPC::FADD_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8330 | { 6817 /* fadds */, PPC::FADDS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8331 | { 6817 /* fadds */, PPC::FADDS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8332 | { 6823 /* fcfid */, PPC::FCFID, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8333 | { 6823 /* fcfid */, PPC::FCFID_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8334 | { 6829 /* fcfids */, PPC::FCFIDS, Convert__RegF4RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF8RC }, }, |
| 8335 | { 6829 /* fcfids */, PPC::FCFIDS_rec, Convert__RegF4RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF8RC }, }, |
| 8336 | { 6836 /* fcfidu */, PPC::FCFIDU, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8337 | { 6836 /* fcfidu */, PPC::FCFIDU_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8338 | { 6843 /* fcfidus */, PPC::FCFIDUS, Convert__RegF4RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF8RC }, }, |
| 8339 | { 6843 /* fcfidus */, PPC::FCFIDUS_rec, Convert__RegF4RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF8RC }, }, |
| 8340 | { 6851 /* fcmpo */, PPC::FCMPOS, Convert__RegCRRC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8341 | { 6857 /* fcmpu */, PPC::FCMPUS, Convert__RegCRRC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8342 | { 6863 /* fcpsgn */, PPC::FCPSGNS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8343 | { 6863 /* fcpsgn */, PPC::FCPSGNS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8344 | { 6870 /* fctid */, PPC::FCTID, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8345 | { 6870 /* fctid */, PPC::FCTID_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8346 | { 6876 /* fctidu */, PPC::FCTIDU, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8347 | { 6876 /* fctidu */, PPC::FCTIDU_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8348 | { 6883 /* fctiduz */, PPC::FCTIDUZ, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8349 | { 6883 /* fctiduz */, PPC::FCTIDUZ_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8350 | { 6891 /* fctidz */, PPC::FCTIDZ, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8351 | { 6891 /* fctidz */, PPC::FCTIDZ_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8352 | { 6898 /* fctiw */, PPC::FCTIW, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8353 | { 6898 /* fctiw */, PPC::FCTIW_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8354 | { 6904 /* fctiwu */, PPC::FCTIWU, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8355 | { 6904 /* fctiwu */, PPC::FCTIWU_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8356 | { 6911 /* fctiwuz */, PPC::FCTIWUZ, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8357 | { 6911 /* fctiwuz */, PPC::FCTIWUZ_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8358 | { 6919 /* fctiwz */, PPC::FCTIWZ, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8359 | { 6919 /* fctiwz */, PPC::FCTIWZ_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8360 | { 6926 /* fdiv */, PPC::FDIV, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8361 | { 6926 /* fdiv */, PPC::FDIV_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8362 | { 6931 /* fdivs */, PPC::FDIVS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8363 | { 6931 /* fdivs */, PPC::FDIVS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8364 | { 6937 /* fmadd */, PPC::FMADD, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8365 | { 6937 /* fmadd */, PPC::FMADD_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8366 | { 6943 /* fmadds */, PPC::FMADDS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8367 | { 6943 /* fmadds */, PPC::FMADDS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8368 | { 6950 /* fmr */, PPC::FMR, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8369 | { 6950 /* fmr */, PPC::FMR_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8370 | { 6954 /* fmsub */, PPC::FMSUB, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8371 | { 6954 /* fmsub */, PPC::FMSUB_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8372 | { 6960 /* fmsubs */, PPC::FMSUBS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8373 | { 6960 /* fmsubs */, PPC::FMSUBS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8374 | { 6967 /* fmul */, PPC::FMUL, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8375 | { 6967 /* fmul */, PPC::FMUL_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8376 | { 6972 /* fmuls */, PPC::FMULS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8377 | { 6972 /* fmuls */, PPC::FMULS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8378 | { 6978 /* fnabs */, PPC::FNABSS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8379 | { 6978 /* fnabs */, PPC::FNABSS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8380 | { 6984 /* fneg */, PPC::FNEGS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8381 | { 6984 /* fneg */, PPC::FNEGS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8382 | { 6989 /* fnmadd */, PPC::FNMADD, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8383 | { 6989 /* fnmadd */, PPC::FNMADD_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8384 | { 6996 /* fnmadds */, PPC::FNMADDS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8385 | { 6996 /* fnmadds */, PPC::FNMADDS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8386 | { 7004 /* fnmsub */, PPC::FNMSUB, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8387 | { 7004 /* fnmsub */, PPC::FNMSUB_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3__RegF8RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8388 | { 7011 /* fnmsubs */, PPC::FNMSUBS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8389 | { 7011 /* fnmsubs */, PPC::FNMSUBS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8390 | { 7019 /* fre */, PPC::FRE, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8391 | { 7019 /* fre */, PPC::FRE_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8392 | { 7023 /* fres */, PPC::FRES, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8393 | { 7023 /* fres */, PPC::FRES_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8394 | { 7028 /* frim */, PPC::FRIMS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8395 | { 7028 /* frim */, PPC::FRIMS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8396 | { 7033 /* frin */, PPC::FRINS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8397 | { 7033 /* frin */, PPC::FRINS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8398 | { 7038 /* frip */, PPC::FRIPS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8399 | { 7038 /* frip */, PPC::FRIPS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8400 | { 7043 /* friz */, PPC::FRIZS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8401 | { 7043 /* friz */, PPC::FRIZS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8402 | { 7048 /* frsp */, PPC::FRSP, Convert__RegF4RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF8RC }, }, |
| 8403 | { 7048 /* frsp */, PPC::FRSP_rec, Convert__RegF4RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF8RC }, }, |
| 8404 | { 7053 /* frsqrte */, PPC::FRSQRTE, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8405 | { 7053 /* frsqrte */, PPC::FRSQRTE_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8406 | { 7061 /* frsqrtes */, PPC::FRSQRTES, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8407 | { 7061 /* frsqrtes */, PPC::FRSQRTES_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8408 | { 7070 /* fsel */, PPC::FSELS, Convert__RegF4RC1_0__RegF8RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK_RegF4RC, MCK_RegF8RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8409 | { 7070 /* fsel */, PPC::FSELS_rec, Convert__RegF4RC1_1__RegF8RC1_2__RegF4RC1_3__RegF4RC1_4, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF8RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8410 | { 7075 /* fsqrt */, PPC::FSQRT, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8411 | { 7075 /* fsqrt */, PPC::FSQRT_rec, Convert__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8412 | { 7081 /* fsqrts */, PPC::FSQRTS, Convert__RegF4RC1_0__RegF4RC1_1, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8413 | { 7081 /* fsqrts */, PPC::FSQRTS_rec, Convert__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8414 | { 7088 /* fsub */, PPC::FSUB, Convert__RegF8RC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8415 | { 7088 /* fsub */, PPC::FSUB_rec, Convert__RegF8RC1_1__RegF8RC1_2__RegF8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF8RC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8416 | { 7093 /* fsubs */, PPC::FSUBS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8417 | { 7093 /* fsubs */, PPC::FSUBS_rec, Convert__RegF4RC1_1__RegF4RC1_2__RegF4RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegF4RC, MCK_RegF4RC, MCK_RegF4RC }, }, |
| 8418 | { 7099 /* ftdiv */, PPC::FTDIV, Convert__RegCRRC1_0__RegF8RC1_1__RegF8RC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8419 | { 7105 /* ftsqrt */, PPC::FTSQRT, Convert__RegCRRC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegF8RC }, }, |
| 8420 | { 7112 /* hashchk */, PPC::HASHCHK, Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRIHash, MCK_RegGxRCNoR0 }, }, |
| 8421 | { 7120 /* hashchkp */, PPC::HASHCHKP, Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRIHash, MCK_RegGxRCNoR0 }, }, |
| 8422 | { 7129 /* hashst */, PPC::HASHST, Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRIHash, MCK_RegGxRCNoR0 }, }, |
| 8423 | { 7136 /* hashstp */, PPC::HASHSTP, Convert__RegGPRC1_0__DispRIHash1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRIHash, MCK_RegGxRCNoR0 }, }, |
| 8424 | { 7144 /* hrfid */, PPC::HRFID, Convert_NoOperands, AMFBS_None, { }, }, |
| 8425 | { 7150 /* hwsync */, PPC::SYNCP10, Convert__imm_95_0__imm_95_0, AMFBS_None, { }, }, |
| 8426 | { 7150 /* hwsync */, PPC::SYNC, Convert__imm_95_0, AMFBS_None, { }, }, |
| 8427 | { 7157 /* icbi */, PPC::ICBI, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8428 | { 7162 /* icbiep */, PPC::ICBIEP, Convert__RegGxRCNoR01_0__RegGxRC1_1, AMFBS_None, { MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8429 | { 7169 /* icblc */, PPC::ICBLC, Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_U4Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8430 | { 7175 /* icblq */, PPC::ICBLQ, Convert__U4Imm1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_U4Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8431 | { 7181 /* icbt */, PPC::ICBT, Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_U4Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8432 | { 7186 /* icbtls */, PPC::ICBTLS, Convert__U4Imm1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_U4Imm, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8433 | { 7193 /* iccci */, PPC::ICCCI, Convert__regR0__regR0, AMFBS_None, { }, }, |
| 8434 | { 7193 /* iccci */, PPC::ICCCI, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8435 | { 7199 /* ici */, PPC::ICCCI, Convert__regR0__regR0, AMFBS_None, { MCK_0 }, }, |
| 8436 | { 7203 /* inslwi */, PPC::INSLWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 8437 | { 7203 /* inslwi */, PPC::INSLWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 8438 | { 7210 /* insrdi */, PPC::INSRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 8439 | { 7210 /* insrdi */, PPC::INSRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 8440 | { 7217 /* insrwi */, PPC::INSRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 8441 | { 7217 /* insrwi */, PPC::INSRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 8442 | { 7224 /* isel */, PPC::ISEL, Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__RegCRBITRC1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_RegGPRC, MCK_RegCRBITRC }, }, |
| 8443 | { 7229 /* iseleq */, PPC::ISEL8, Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0EQ, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_RegG8RC }, }, |
| 8444 | { 7229 /* iseleq */, PPC::ISEL, Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0EQ, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_RegGPRC }, }, |
| 8445 | { 7236 /* iselgt */, PPC::ISEL8, Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0GT, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_RegG8RC }, }, |
| 8446 | { 7236 /* iselgt */, PPC::ISEL, Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0GT, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_RegGPRC }, }, |
| 8447 | { 7243 /* isellt */, PPC::ISEL8, Convert__RegG8RC1_0__RegG8RCNoX01_1__RegG8RC1_2__regCR0LT, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_RegG8RC }, }, |
| 8448 | { 7243 /* isellt */, PPC::ISEL, Convert__RegGPRC1_0__RegGPRCNoR01_1__RegGPRC1_2__regCR0LT, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_RegGPRC }, }, |
| 8449 | { 7250 /* isync */, PPC::ISYNC, Convert_NoOperands, AMFBS_None, { }, }, |
| 8450 | { 7256 /* la */, PPC::LAx, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8451 | { 7259 /* lbarx */, PPC::LBARX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8452 | { 7259 /* lbarx */, PPC::LBARXL, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
| 8453 | { 7265 /* lbepx */, PPC::LBEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8454 | { 7271 /* lbz */, PPC::LBZ, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8455 | { 7275 /* lbzcix */, PPC::LBZCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8456 | { 7282 /* lbzu */, PPC::LBZU, Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8457 | { 7287 /* lbzux */, PPC::LBZUX, Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8458 | { 7293 /* lbzx */, PPC::LBZXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 8459 | { 7293 /* lbzx */, PPC::LBZX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8460 | { 7298 /* ld */, PPC::LD, Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 8461 | { 7301 /* ldarx */, PPC::LDARX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8462 | { 7301 /* ldarx */, PPC::LDARXL, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
| 8463 | { 7307 /* ldat */, PPC::LDAT, Convert__RegG8pRC1_0__Tie0_1_1__RegGxRCNoR01_1__U5Imm1_2, AMFBS_None, { MCK_RegG8pRC, MCK_RegGxRCNoR0, MCK_U5Imm }, }, |
| 8464 | { 7312 /* ldbrx */, PPC::LDBRX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8465 | { 7318 /* ldcix */, PPC::LDCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8466 | { 7324 /* ldu */, PPC::LDU, Convert__RegG8RC1_0__imm_95_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 8467 | { 7328 /* ldux */, PPC::LDUX, Convert__RegG8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8468 | { 7333 /* ldx */, PPC::LDX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8469 | { 7333 /* ldx */, PPC::LDXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 8470 | { 7337 /* lfd */, PPC::LFD, Convert__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8471 | { 7341 /* lfdepx */, PPC::LFDEPX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8472 | { 7348 /* lfdu */, PPC::LFDU, Convert__RegF8RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8473 | { 7353 /* lfdux */, PPC::LFDUX, Convert__RegF8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8474 | { 7359 /* lfdx */, PPC::LFDX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8475 | { 7359 /* lfdx */, PPC::LFDXTLS_, Convert__RegF8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 8476 | { 7364 /* lfiwax */, PPC::LFIWAX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8477 | { 7371 /* lfiwzx */, PPC::LFIWZX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8478 | { 7378 /* lfs */, PPC::LFS, Convert__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8479 | { 7382 /* lfsu */, PPC::LFSU, Convert__RegF4RC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8480 | { 7387 /* lfsux */, PPC::LFSUX, Convert__RegF4RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8481 | { 7393 /* lfsx */, PPC::LFSX, Convert__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8482 | { 7393 /* lfsx */, PPC::LFSXTLS_, Convert__RegF4RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 8483 | { 7398 /* lha */, PPC::LHA, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8484 | { 7402 /* lharx */, PPC::LHARX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8485 | { 7402 /* lharx */, PPC::LHARXL, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
| 8486 | { 7408 /* lhau */, PPC::LHAU, Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8487 | { 7413 /* lhaux */, PPC::LHAUX, Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8488 | { 7419 /* lhax */, PPC::LHAXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 8489 | { 7419 /* lhax */, PPC::LHAX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8490 | { 7424 /* lhbrx */, PPC::LHBRX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8491 | { 7430 /* lhepx */, PPC::LHEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8492 | { 7436 /* lhz */, PPC::LHZ, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8493 | { 7440 /* lhzcix */, PPC::LHZCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8494 | { 7447 /* lhzu */, PPC::LHZU, Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8495 | { 7452 /* lhzux */, PPC::LHZUX, Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8496 | { 7458 /* lhzx */, PPC::LHZXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 8497 | { 7458 /* lhzx */, PPC::LHZX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8498 | { 7463 /* li */, PPC::ADDI8, Convert__RegG8RC1_0__regZERO8__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 8499 | { 7463 /* li */, PPC::LI, Convert__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 8500 | { 7463 /* li */, PPC::ADDI, Convert__RegGPRC1_0__regZERO__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 8501 | { 7466 /* lis */, PPC::ADDIS8, Convert__RegG8RC1_0__regZERO8__S17Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S17Imm }, }, |
| 8502 | { 7466 /* lis */, PPC::LIS, Convert__RegGPRC1_0__S17Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S17Imm }, }, |
| 8503 | { 7466 /* lis */, PPC::ADDIS, Convert__RegGPRC1_0__regZERO__S17Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S17Imm }, }, |
| 8504 | { 7470 /* lmw */, PPC::LMW, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8505 | { 7474 /* lnia */, PPC::ADDPCIS, Convert__RegG8RC1_0__imm_95_0, AMFBS_None, { MCK_RegG8RC }, }, |
| 8506 | { 7479 /* lq */, PPC::LQ, Convert__RegG8pRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8pRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
| 8507 | { 7482 /* lqarx */, PPC::LQARX, Convert__RegG8pRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8pRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8508 | { 7482 /* lqarx */, PPC::LQARXL, Convert__RegG8pRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8pRC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
| 8509 | { 7488 /* lswi */, PPC::LSWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 8510 | { 7493 /* lvebx */, PPC::LVEBX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8511 | { 7499 /* lvehx */, PPC::LVEHX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8512 | { 7505 /* lvewx */, PPC::LVEWX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8513 | { 7511 /* lvsl */, PPC::LVSL, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8514 | { 7516 /* lvsr */, PPC::LVSR, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8515 | { 7521 /* lvx */, PPC::LVX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8516 | { 7525 /* lvxl */, PPC::LVXL, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8517 | { 7530 /* lwa */, PPC::LWA, Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 8518 | { 7534 /* lwarx */, PPC::LWARX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8519 | { 7534 /* lwarx */, PPC::LWARXL, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC, MCK_1 }, }, |
| 8520 | { 7540 /* lwat */, PPC::LWAT, Convert__RegG8pRC1_0__Tie0_1_1__RegGxRCNoR01_1__U5Imm1_2, AMFBS_None, { MCK_RegG8pRC, MCK_RegGxRCNoR0, MCK_U5Imm }, }, |
| 8521 | { 7545 /* lwaux */, PPC::LWAUX, Convert__RegG8RC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8522 | { 7551 /* lwax */, PPC::LWAX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8523 | { 7551 /* lwax */, PPC::LWAXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 8524 | { 7556 /* lwbrx */, PPC::LWBRX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8525 | { 7562 /* lwepx */, PPC::LWEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8526 | { 7568 /* lwsync */, PPC::SYNC, Convert__imm_95_1, AMFBS_None, { }, }, |
| 8527 | { 7575 /* lwz */, PPC::LWZ, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8528 | { 7575 /* lwz */, PPC::SPELWZ, Convert__RegSPE4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPE4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8529 | { 7579 /* lwzcix */, PPC::LWZCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8530 | { 7586 /* lwzu */, PPC::LWZU, Convert__RegGPRC1_0__imm_95_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 8531 | { 7591 /* lwzux */, PPC::LWZUX, Convert__RegGPRC1_0__imm_95_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8532 | { 7597 /* lwzx */, PPC::LWZXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 8533 | { 7597 /* lwzx */, PPC::LWZX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8534 | { 7597 /* lwzx */, PPC::SPELWZX, Convert__RegSPE4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8535 | { 7602 /* lxsd */, PPC::LXSD, Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 8536 | { 7607 /* lxsdx */, PPC::LXSDX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8537 | { 7613 /* lxsibzx */, PPC::LXSIBZX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8538 | { 7621 /* lxsihzx */, PPC::LXSIHZX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8539 | { 7629 /* lxsiwax */, PPC::LXSIWAX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8540 | { 7637 /* lxsiwzx */, PPC::LXSIWZX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8541 | { 7645 /* lxssp */, PPC::LXSSP, Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 8542 | { 7651 /* lxsspx */, PPC::LXSSPX, Convert__RegVSSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8543 | { 7658 /* lxv */, PPC::LXV, Convert__RegVSRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
| 8544 | { 7662 /* lxvb16x */, PPC::LXVB16X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8545 | { 7670 /* lxvd2x */, PPC::LXVD2X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8546 | { 7677 /* lxvdsx */, PPC::LXVDSX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8547 | { 7684 /* lxvh8x */, PPC::LXVH8X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8548 | { 7691 /* lxvkq */, PPC::LXVKQ, Convert__RegVSRC1_0__U5Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_U5Imm }, }, |
| 8549 | { 7697 /* lxvl */, PPC::LXVL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
| 8550 | { 7702 /* lxvll */, PPC::LXVLL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
| 8551 | { 7708 /* lxvp */, PPC::LXVP, Convert__RegVSRpRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
| 8552 | { 7713 /* lxvpb32x */, PPC::LXVPB32X, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
| 8553 | { 7722 /* lxvprl */, PPC::LXVPRL, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
| 8554 | { 7729 /* lxvprll */, PPC::LXVPRLL, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
| 8555 | { 7737 /* lxvpx */, PPC::LXVPX, Convert__RegVSRpRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8556 | { 7743 /* lxvrbx */, PPC::LXVRBX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8557 | { 7750 /* lxvrdx */, PPC::LXVRDX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8558 | { 7757 /* lxvrhx */, PPC::LXVRHX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8559 | { 7764 /* lxvrl */, PPC::LXVRL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
| 8560 | { 7770 /* lxvrll */, PPC::LXVRLL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
| 8561 | { 7777 /* lxvrwx */, PPC::LXVRWX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8562 | { 7784 /* lxvw4x */, PPC::LXVW4X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8563 | { 7791 /* lxvwsx */, PPC::LXVWSX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8564 | { 7798 /* lxvx */, PPC::LXVX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 8565 | { 7803 /* maddhd */, PPC::MADDHD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8566 | { 7810 /* maddhdu */, PPC::MADDHDU, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8567 | { 7818 /* maddld */, PPC::MADDLD, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8568 | { 7825 /* mbar */, PPC::MBAR, Convert__imm_95_0, AMFBS_None, { }, }, |
| 8569 | { 7825 /* mbar */, PPC::MBAR, Convert__U5Imm1_0, AMFBS_None, { MCK_U5Imm }, }, |
| 8570 | { 7830 /* mcrf */, PPC::MCRF, Convert__RegCRRC1_0__RegCRRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegCRRC }, }, |
| 8571 | { 7835 /* mcrfs */, PPC::MCRFS, Convert__RegCRRC1_0__RegCRRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegCRRC }, }, |
| 8572 | { 7841 /* mcrxrx */, PPC::MCRXRX, Convert__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 8573 | { 7848 /* mfamr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_29, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8574 | { 7848 /* mfamr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_29, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8575 | { 7854 /* mfasr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_280, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8576 | { 7854 /* mfasr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_280, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8577 | { 7860 /* mfbhrbe */, PPC::MFBHRBE, Convert__RegGPRC1_0__U10Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_U10Imm }, }, |
| 8578 | { 7868 /* mfbr0 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_128, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8579 | { 7874 /* mfbr1 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_129, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8580 | { 7880 /* mfbr2 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_130, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8581 | { 7886 /* mfbr3 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_131, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8582 | { 7892 /* mfbr4 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_132, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8583 | { 7898 /* mfbr5 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_133, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8584 | { 7904 /* mfbr6 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_134, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8585 | { 7910 /* mfbr7 */, PPC::MFDCR, Convert__RegGPRC1_0__imm_95_135, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8586 | { 7916 /* mfcfar */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_28, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8587 | { 7916 /* mfcfar */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_28, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8588 | { 7923 /* mfcr */, PPC::MFCR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8589 | { 7928 /* mfctr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_9, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8590 | { 7928 /* mfctr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_9, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8591 | { 7928 /* mfctr */, PPC::MFCTR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8592 | { 7934 /* mfdar */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_19, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8593 | { 7934 /* mfdar */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_19, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8594 | { 7940 /* mfdbatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_537, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
| 8595 | { 7940 /* mfdbatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_539, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
| 8596 | { 7940 /* mfdbatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_541, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
| 8597 | { 7940 /* mfdbatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_543, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
| 8598 | { 7948 /* mfdbatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_536, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
| 8599 | { 7948 /* mfdbatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_538, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
| 8600 | { 7948 /* mfdbatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_540, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
| 8601 | { 7948 /* mfdbatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_542, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
| 8602 | { 7956 /* mfdccr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_1018, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8603 | { 7963 /* mfdcr */, PPC::MFDCR, Convert__RegGPRC1_0__Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_Imm }, }, |
| 8604 | { 7969 /* mfdear */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_981, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8605 | { 7976 /* mfdec */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_22, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8606 | { 7976 /* mfdec */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_22, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8607 | { 7982 /* mfdscr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_17, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8608 | { 7982 /* mfdscr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_17, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8609 | { 7989 /* mfdsisr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_18, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8610 | { 7989 /* mfdsisr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_18, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8611 | { 7997 /* mfesr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_980, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8612 | { 8003 /* mffprd */, PPC::MFVSRD, Convert__RegG8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegF8RC }, }, |
| 8613 | { 8010 /* mffprwz */, PPC::MFVSRWZ, Convert__RegGPRC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegF8RC }, }, |
| 8614 | { 8018 /* mffs */, PPC::MFFS, Convert__RegF8RC1_0, AMFBS_None, { MCK_RegF8RC }, }, |
| 8615 | { 8018 /* mffs */, PPC::MFFS_rec, Convert__RegF8RC1_1, AMFBS_None, { MCK__DOT_, MCK_RegF8RC }, }, |
| 8616 | { 8023 /* mffscdrn */, PPC::MFFSCDRN, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8617 | { 8032 /* mffscdrni */, PPC::MFFSCDRNI, Convert__RegF8RC1_0__U3Imm1_1, AMFBS_None, { MCK_RegF8RC, MCK_U3Imm }, }, |
| 8618 | { 8042 /* mffsce */, PPC::MFFSCE, Convert__RegF8RC1_0, AMFBS_None, { MCK_RegF8RC }, }, |
| 8619 | { 8049 /* mffscrn */, PPC::MFFSCRN, Convert__RegF8RC1_0__RegF8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegF8RC }, }, |
| 8620 | { 8057 /* mffscrni */, PPC::MFFSCRNI, Convert__RegF8RC1_0__U2Imm1_1, AMFBS_None, { MCK_RegF8RC, MCK_U2Imm }, }, |
| 8621 | { 8066 /* mffsl */, PPC::MFFSL, Convert__RegF8RC1_0, AMFBS_None, { MCK_RegF8RC }, }, |
| 8622 | { 8072 /* mfibatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_529, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
| 8623 | { 8072 /* mfibatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_531, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
| 8624 | { 8072 /* mfibatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_533, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
| 8625 | { 8072 /* mfibatl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_535, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
| 8626 | { 8080 /* mfibatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_528, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
| 8627 | { 8080 /* mfibatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_530, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
| 8628 | { 8080 /* mfibatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_532, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
| 8629 | { 8080 /* mfibatu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_534, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
| 8630 | { 8088 /* mficcr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_1019, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8631 | { 8095 /* mflr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_8, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8632 | { 8095 /* mflr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_8, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8633 | { 8095 /* mflr */, PPC::MFLR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8634 | { 8100 /* mfmsr */, PPC::MFMSR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8635 | { 8106 /* mfocrf */, PPC::MFOCRF, Convert__RegGPRC1_0__CRBitMask1_1, AMFBS_None, { MCK_RegGPRC, MCK_CRBitMask }, }, |
| 8636 | { 8113 /* mfpid */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_48, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8637 | { 8119 /* mfpidr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_48, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8638 | { 8126 /* mfpmr */, PPC::MFPMR, Convert__RegGPRC1_0__Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_Imm }, }, |
| 8639 | { 8132 /* mfppr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_896, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8640 | { 8138 /* mfpvr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_287, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8641 | { 8138 /* mfpvr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_287, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8642 | { 8144 /* mfrtcl */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_5, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8643 | { 8144 /* mfrtcl */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_5, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8644 | { 8151 /* mfrtcu */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_4, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8645 | { 8151 /* mfrtcu */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_4, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8646 | { 8158 /* mfsdr1 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_25, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8647 | { 8158 /* mfsdr1 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_25, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8648 | { 8165 /* mfspefscr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_512, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8649 | { 8165 /* mfspefscr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_512, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8650 | { 8175 /* mfspr */, PPC::MFUDSCR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC, MCK_3 }, }, |
| 8651 | { 8175 /* mfspr */, PPC::MFSPR, Convert__RegGPRC1_0__Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_Imm }, }, |
| 8652 | { 8181 /* mfsprg */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_272, AMFBS_ModernAs, { MCK_RegG8RC, MCK_0 }, }, |
| 8653 | { 8181 /* mfsprg */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_273, AMFBS_ModernAs, { MCK_RegG8RC, MCK_1 }, }, |
| 8654 | { 8181 /* mfsprg */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_274, AMFBS_ModernAs, { MCK_RegG8RC, MCK_2 }, }, |
| 8655 | { 8181 /* mfsprg */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_275, AMFBS_ModernAs, { MCK_RegG8RC, MCK_3 }, }, |
| 8656 | { 8181 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_272, AMFBS_ModernAs, { MCK_RegGPRC, MCK_0 }, }, |
| 8657 | { 8181 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_273, AMFBS_ModernAs, { MCK_RegGPRC, MCK_1 }, }, |
| 8658 | { 8181 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_274, AMFBS_ModernAs, { MCK_RegGPRC, MCK_2 }, }, |
| 8659 | { 8181 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_275, AMFBS_ModernAs, { MCK_RegGPRC, MCK_3 }, }, |
| 8660 | { 8181 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_260, AMFBS_ModernAs, { MCK_RegGPRC, MCK_4 }, }, |
| 8661 | { 8181 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_261, AMFBS_ModernAs, { MCK_RegGPRC, MCK_5 }, }, |
| 8662 | { 8181 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_262, AMFBS_ModernAs, { MCK_RegGPRC, MCK_6 }, }, |
| 8663 | { 8181 /* mfsprg */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_263, AMFBS_ModernAs, { MCK_RegGPRC, MCK_7 }, }, |
| 8664 | { 8188 /* mfsprg0 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_272, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8665 | { 8188 /* mfsprg0 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_272, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8666 | { 8196 /* mfsprg1 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_273, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8667 | { 8196 /* mfsprg1 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_273, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8668 | { 8204 /* mfsprg2 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_274, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8669 | { 8204 /* mfsprg2 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_274, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8670 | { 8212 /* mfsprg3 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_275, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8671 | { 8212 /* mfsprg3 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_275, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8672 | { 8220 /* mfsprg4 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_260, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8673 | { 8228 /* mfsprg5 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_261, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8674 | { 8236 /* mfsprg6 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_262, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8675 | { 8244 /* mfsprg7 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_263, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8676 | { 8252 /* mfsr */, PPC::MFSR, Convert__RegGPRC1_0__U4Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_U4Imm }, }, |
| 8677 | { 8257 /* mfsrin */, PPC::MFSRIN, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8678 | { 8264 /* mfsrr0 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_26, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8679 | { 8264 /* mfsrr0 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_26, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8680 | { 8271 /* mfsrr1 */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_27, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8681 | { 8271 /* mfsrr1 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_27, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8682 | { 8278 /* mfsrr2 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_990, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8683 | { 8285 /* mfsrr3 */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_991, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8684 | { 8292 /* mftb */, PPC::MFTB, Convert__RegGPRC1_0__imm_95_268, AMFBS_None, { MCK_RegGPRC }, }, |
| 8685 | { 8292 /* mftb */, PPC::MFTB, Convert__RegGPRC1_0__Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_Imm }, }, |
| 8686 | { 8297 /* mftbhi */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_988, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8687 | { 8304 /* mftbl */, PPC::MFTB, Convert__RegGPRC1_0__imm_95_268, AMFBS_None, { MCK_RegGPRC }, }, |
| 8688 | { 8310 /* mftblo */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_989, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8689 | { 8317 /* mftbu */, PPC::MFTB, Convert__RegGPRC1_0__imm_95_269, AMFBS_None, { MCK_RegGPRC }, }, |
| 8690 | { 8323 /* mftcr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_986, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8691 | { 8329 /* mfuamr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_13, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8692 | { 8329 /* mfuamr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_13, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8693 | { 8336 /* mfudscr */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_3, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8694 | { 8336 /* mfudscr */, PPC::MFUDSCR, Convert__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8695 | { 8336 /* mfudscr */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_3, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8696 | { 8344 /* mfvrd */, PPC::MFVRD, Convert__RegG8RC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC }, }, |
| 8697 | { 8350 /* mfvrsave */, PPC::MFVRSAVE, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8698 | { 8359 /* mfvrwz */, PPC::MFVRWZ, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
| 8699 | { 8366 /* mfvscr */, PPC::MFVSCR, Convert__RegVRRC1_0, AMFBS_None, { MCK_RegVRRC }, }, |
| 8700 | { 8373 /* mfvsrd */, PPC::MFVSRD, Convert__RegG8RC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVSFRC }, }, |
| 8701 | { 8380 /* mfvsrld */, PPC::MFVSRLD, Convert__RegG8RC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVSRC }, }, |
| 8702 | { 8388 /* mfvsrwz */, PPC::MFVSRWZ, Convert__RegGPRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVSFRC }, }, |
| 8703 | { 8396 /* mfxer */, PPC::MFSPR8, Convert__RegG8RC1_0__imm_95_1, AMFBS_None, { MCK_RegG8RC }, }, |
| 8704 | { 8396 /* mfxer */, PPC::MFSPR, Convert__RegGPRC1_0__imm_95_1, AMFBS_None, { MCK_RegGPRC }, }, |
| 8705 | { 8402 /* modsd */, PPC::MODSD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8706 | { 8408 /* modsw */, PPC::MODSW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8707 | { 8414 /* modud */, PPC::MODUD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8708 | { 8420 /* moduw */, PPC::MODUW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8709 | { 8426 /* mr */, PPC::OR8, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8710 | { 8426 /* mr */, PPC::OR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8711 | { 8426 /* mr */, PPC::OR8_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8712 | { 8426 /* mr */, PPC::OR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8713 | { 8429 /* msgsync */, PPC::MSGSYNC, Convert_NoOperands, AMFBS_None, { }, }, |
| 8714 | { 8437 /* msync */, PPC::SYNC, Convert__imm_95_0, AMFBS_None, { }, }, |
| 8715 | { 8443 /* mtamr */, PPC::MTSPR8, Convert__imm_95_29__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8716 | { 8443 /* mtamr */, PPC::MTSPR, Convert__imm_95_29__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8717 | { 8449 /* mtasr */, PPC::MTSPR8, Convert__imm_95_280__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8718 | { 8449 /* mtasr */, PPC::MTSPR, Convert__imm_95_280__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8719 | { 8455 /* mtbr0 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_128, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8720 | { 8461 /* mtbr1 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_129, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8721 | { 8467 /* mtbr2 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_130, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8722 | { 8473 /* mtbr3 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_131, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8723 | { 8479 /* mtbr4 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_132, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8724 | { 8485 /* mtbr5 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_133, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8725 | { 8491 /* mtbr6 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_134, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8726 | { 8497 /* mtbr7 */, PPC::MTDCR, Convert__RegGPRC1_0__imm_95_135, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8727 | { 8503 /* mtcfar */, PPC::MTSPR8, Convert__imm_95_28__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8728 | { 8503 /* mtcfar */, PPC::MTSPR, Convert__imm_95_28__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8729 | { 8510 /* mtcr */, PPC::MTCRF8, Convert__imm_95_255__RegG8RC1_0, AMFBS_None, { MCK_RegG8RC }, }, |
| 8730 | { 8510 /* mtcr */, PPC::MTCRF, Convert__imm_95_255__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8731 | { 8515 /* mtcrf */, PPC::MTCRF, Convert__Imm1_0__RegGPRC1_1, AMFBS_None, { MCK_Imm, MCK_RegGPRC }, }, |
| 8732 | { 8521 /* mtctr */, PPC::MTSPR8, Convert__imm_95_9__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8733 | { 8521 /* mtctr */, PPC::MTSPR, Convert__imm_95_9__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8734 | { 8521 /* mtctr */, PPC::MTCTR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8735 | { 8527 /* mtdar */, PPC::MTSPR8, Convert__imm_95_19__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8736 | { 8527 /* mtdar */, PPC::MTSPR, Convert__imm_95_19__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8737 | { 8533 /* mtdbatl */, PPC::MTSPR, Convert__imm_95_537__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
| 8738 | { 8533 /* mtdbatl */, PPC::MTSPR, Convert__imm_95_539__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
| 8739 | { 8533 /* mtdbatl */, PPC::MTSPR, Convert__imm_95_541__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
| 8740 | { 8533 /* mtdbatl */, PPC::MTSPR, Convert__imm_95_543__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
| 8741 | { 8541 /* mtdbatu */, PPC::MTSPR, Convert__imm_95_536__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
| 8742 | { 8541 /* mtdbatu */, PPC::MTSPR, Convert__imm_95_538__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
| 8743 | { 8541 /* mtdbatu */, PPC::MTSPR, Convert__imm_95_540__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
| 8744 | { 8541 /* mtdbatu */, PPC::MTSPR, Convert__imm_95_542__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
| 8745 | { 8549 /* mtdccr */, PPC::MTSPR, Convert__imm_95_1018__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8746 | { 8556 /* mtdcr */, PPC::MTDCR, Convert__RegGPRC1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_RegGPRC }, }, |
| 8747 | { 8562 /* mtdear */, PPC::MTSPR, Convert__imm_95_981__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8748 | { 8569 /* mtdec */, PPC::MTSPR8, Convert__imm_95_22__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8749 | { 8569 /* mtdec */, PPC::MTSPR, Convert__imm_95_22__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8750 | { 8575 /* mtdscr */, PPC::MTSPR8, Convert__imm_95_17__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8751 | { 8575 /* mtdscr */, PPC::MTSPR, Convert__imm_95_17__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8752 | { 8582 /* mtdsisr */, PPC::MTSPR8, Convert__imm_95_18__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8753 | { 8582 /* mtdsisr */, PPC::MTSPR, Convert__imm_95_18__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8754 | { 8590 /* mtesr */, PPC::MTSPR, Convert__imm_95_980__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8755 | { 8596 /* mtfprd */, PPC::MTVSRD, Convert__RegF8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegG8RC }, }, |
| 8756 | { 8603 /* mtfprwa */, PPC::MTVSRWA, Convert__RegF8RC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegGPRC }, }, |
| 8757 | { 8611 /* mtfprwz */, PPC::MTVSRWZ, Convert__RegF8RC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegF8RC, MCK_RegGPRC }, }, |
| 8758 | { 8619 /* mtfsb0 */, PPC::MTFSB0, Convert__U5Imm1_0, AMFBS_None, { MCK_U5Imm }, }, |
| 8759 | { 8626 /* mtfsb1 */, PPC::MTFSB1, Convert__U5Imm1_0, AMFBS_None, { MCK_U5Imm }, }, |
| 8760 | { 8633 /* mtfsf */, PPC::MTFSF, Convert__Imm1_0__RegF8RC1_1__imm_95_0__imm_95_0, AMFBS_None, { MCK_Imm, MCK_RegF8RC }, }, |
| 8761 | { 8633 /* mtfsf */, PPC::MTFSF_rec, Convert__Imm1_1__RegF8RC1_2__imm_95_0__imm_95_0, AMFBS_None, { MCK__DOT_, MCK_Imm, MCK_RegF8RC }, }, |
| 8762 | { 8633 /* mtfsf */, PPC::MTFSF, Convert__Imm1_0__RegF8RC1_1__U1Imm1_2__Imm1_3, AMFBS_None, { MCK_Imm, MCK_RegF8RC, MCK_U1Imm, MCK_Imm }, }, |
| 8763 | { 8633 /* mtfsf */, PPC::MTFSF_rec, Convert__Imm1_1__RegF8RC1_2__U1Imm1_3__Imm1_4, AMFBS_None, { MCK__DOT_, MCK_Imm, MCK_RegF8RC, MCK_U1Imm, MCK_Imm }, }, |
| 8764 | { 8639 /* mtfsfi */, PPC::MTFSFI, Convert__U3Imm1_0__U4Imm1_1__imm_95_0, AMFBS_None, { MCK_U3Imm, MCK_U4Imm }, }, |
| 8765 | { 8639 /* mtfsfi */, PPC::MTFSFI_rec, Convert__U3Imm1_1__U4Imm1_2__imm_95_0, AMFBS_None, { MCK__DOT_, MCK_U3Imm, MCK_U4Imm }, }, |
| 8766 | { 8639 /* mtfsfi */, PPC::MTFSFI, Convert__U3Imm1_0__U4Imm1_1__Imm1_2, AMFBS_None, { MCK_U3Imm, MCK_U4Imm, MCK_Imm }, }, |
| 8767 | { 8639 /* mtfsfi */, PPC::MTFSFI_rec, Convert__U3Imm1_1__U4Imm1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_U3Imm, MCK_U4Imm, MCK_U1Imm }, }, |
| 8768 | { 8646 /* mtibatl */, PPC::MTSPR, Convert__imm_95_529__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
| 8769 | { 8646 /* mtibatl */, PPC::MTSPR, Convert__imm_95_531__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
| 8770 | { 8646 /* mtibatl */, PPC::MTSPR, Convert__imm_95_533__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
| 8771 | { 8646 /* mtibatl */, PPC::MTSPR, Convert__imm_95_535__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
| 8772 | { 8654 /* mtibatu */, PPC::MTSPR, Convert__imm_95_528__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
| 8773 | { 8654 /* mtibatu */, PPC::MTSPR, Convert__imm_95_530__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
| 8774 | { 8654 /* mtibatu */, PPC::MTSPR, Convert__imm_95_532__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
| 8775 | { 8654 /* mtibatu */, PPC::MTSPR, Convert__imm_95_534__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
| 8776 | { 8662 /* mticcr */, PPC::MTSPR, Convert__imm_95_1019__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8777 | { 8669 /* mtlpl */, PPC::MTLPL, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8778 | { 8675 /* mtlr */, PPC::MTSPR8, Convert__imm_95_8__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8779 | { 8675 /* mtlr */, PPC::MTSPR, Convert__imm_95_8__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8780 | { 8675 /* mtlr */, PPC::MTLR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8781 | { 8680 /* mtmsr */, PPC::MTMSR, Convert__RegGPRC1_0__imm_95_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8782 | { 8680 /* mtmsr */, PPC::MTMSR, Convert__RegGPRC1_0__U1Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_U1Imm }, }, |
| 8783 | { 8686 /* mtmsrd */, PPC::MTMSRD, Convert__RegGPRC1_0__imm_95_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8784 | { 8686 /* mtmsrd */, PPC::MTMSRD, Convert__RegGPRC1_0__U1Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_U1Imm }, }, |
| 8785 | { 8693 /* mtocrf */, PPC::MTOCRF, Convert__CRBitMask1_0__RegGPRC1_1, AMFBS_None, { MCK_CRBitMask, MCK_RegGPRC }, }, |
| 8786 | { 8700 /* mtpid */, PPC::MTSPR, Convert__imm_95_48__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8787 | { 8706 /* mtpidr */, PPC::MTSPR, Convert__imm_95_48__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8788 | { 8713 /* mtpmr */, PPC::MTPMR, Convert__Imm1_0__RegGPRC1_1, AMFBS_None, { MCK_Imm, MCK_RegGPRC }, }, |
| 8789 | { 8719 /* mtppr */, PPC::MTSPR, Convert__imm_95_896__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8790 | { 8725 /* mtsdr1 */, PPC::MTSPR8, Convert__imm_95_25__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8791 | { 8725 /* mtsdr1 */, PPC::MTSPR, Convert__imm_95_25__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8792 | { 8732 /* mtspefscr */, PPC::MTSPR8, Convert__imm_95_512__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8793 | { 8732 /* mtspefscr */, PPC::MTSPR, Convert__imm_95_512__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8794 | { 8742 /* mtspr */, PPC::MTUDSCR, Convert__RegGPRC1_1, AMFBS_None, { MCK_3, MCK_RegGPRC }, }, |
| 8795 | { 8742 /* mtspr */, PPC::MTSPR, Convert__Imm1_0__RegGPRC1_1, AMFBS_None, { MCK_Imm, MCK_RegGPRC }, }, |
| 8796 | { 8748 /* mtsprg */, PPC::MTSPR8, Convert__imm_95_272__RegG8RC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegG8RC }, }, |
| 8797 | { 8748 /* mtsprg */, PPC::MTSPR, Convert__imm_95_272__RegGPRC1_1, AMFBS_ModernAs, { MCK_0, MCK_RegGPRC }, }, |
| 8798 | { 8748 /* mtsprg */, PPC::MTSPR8, Convert__imm_95_273__RegG8RC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegG8RC }, }, |
| 8799 | { 8748 /* mtsprg */, PPC::MTSPR, Convert__imm_95_273__RegGPRC1_1, AMFBS_ModernAs, { MCK_1, MCK_RegGPRC }, }, |
| 8800 | { 8748 /* mtsprg */, PPC::MTSPR8, Convert__imm_95_274__RegG8RC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegG8RC }, }, |
| 8801 | { 8748 /* mtsprg */, PPC::MTSPR, Convert__imm_95_274__RegGPRC1_1, AMFBS_ModernAs, { MCK_2, MCK_RegGPRC }, }, |
| 8802 | { 8748 /* mtsprg */, PPC::MTSPR8, Convert__imm_95_275__RegG8RC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegG8RC }, }, |
| 8803 | { 8748 /* mtsprg */, PPC::MTSPR, Convert__imm_95_275__RegGPRC1_1, AMFBS_ModernAs, { MCK_3, MCK_RegGPRC }, }, |
| 8804 | { 8748 /* mtsprg */, PPC::MTSPR, Convert__imm_95_260__RegGPRC1_1, AMFBS_ModernAs, { MCK_4, MCK_RegGPRC }, }, |
| 8805 | { 8748 /* mtsprg */, PPC::MTSPR, Convert__imm_95_261__RegGPRC1_1, AMFBS_ModernAs, { MCK_5, MCK_RegGPRC }, }, |
| 8806 | { 8748 /* mtsprg */, PPC::MTSPR, Convert__imm_95_262__RegGPRC1_1, AMFBS_ModernAs, { MCK_6, MCK_RegGPRC }, }, |
| 8807 | { 8748 /* mtsprg */, PPC::MTSPR, Convert__imm_95_263__RegGPRC1_1, AMFBS_ModernAs, { MCK_7, MCK_RegGPRC }, }, |
| 8808 | { 8755 /* mtsprg0 */, PPC::MTSPR8, Convert__imm_95_272__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8809 | { 8755 /* mtsprg0 */, PPC::MTSPR, Convert__imm_95_272__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8810 | { 8763 /* mtsprg1 */, PPC::MTSPR8, Convert__imm_95_273__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8811 | { 8763 /* mtsprg1 */, PPC::MTSPR, Convert__imm_95_273__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8812 | { 8771 /* mtsprg2 */, PPC::MTSPR8, Convert__imm_95_274__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8813 | { 8771 /* mtsprg2 */, PPC::MTSPR, Convert__imm_95_274__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8814 | { 8779 /* mtsprg3 */, PPC::MTSPR8, Convert__imm_95_275__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8815 | { 8779 /* mtsprg3 */, PPC::MTSPR, Convert__imm_95_275__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8816 | { 8787 /* mtsprg4 */, PPC::MTSPR, Convert__imm_95_260__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8817 | { 8795 /* mtsprg5 */, PPC::MTSPR, Convert__imm_95_261__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8818 | { 8803 /* mtsprg6 */, PPC::MTSPR, Convert__imm_95_262__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8819 | { 8811 /* mtsprg7 */, PPC::MTSPR, Convert__imm_95_263__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8820 | { 8819 /* mtsr */, PPC::MTSR, Convert__RegGPRC1_1__U4Imm1_0, AMFBS_None, { MCK_U4Imm, MCK_RegGPRC }, }, |
| 8821 | { 8824 /* mtsrin */, PPC::MTSRIN, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8822 | { 8831 /* mtsrr0 */, PPC::MTSPR8, Convert__imm_95_26__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8823 | { 8831 /* mtsrr0 */, PPC::MTSPR, Convert__imm_95_26__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8824 | { 8838 /* mtsrr1 */, PPC::MTSPR8, Convert__imm_95_27__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8825 | { 8838 /* mtsrr1 */, PPC::MTSPR, Convert__imm_95_27__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8826 | { 8845 /* mtsrr2 */, PPC::MTSPR, Convert__imm_95_990__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8827 | { 8852 /* mtsrr3 */, PPC::MTSPR, Convert__imm_95_991__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8828 | { 8859 /* mttbhi */, PPC::MTSPR, Convert__imm_95_988__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8829 | { 8866 /* mttbl */, PPC::MTSPR8, Convert__imm_95_284__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8830 | { 8866 /* mttbl */, PPC::MTSPR, Convert__imm_95_284__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8831 | { 8872 /* mttblo */, PPC::MTSPR, Convert__imm_95_989__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8832 | { 8879 /* mttbu */, PPC::MTSPR8, Convert__imm_95_285__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8833 | { 8879 /* mttbu */, PPC::MTSPR, Convert__imm_95_285__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8834 | { 8885 /* mttcr */, PPC::MTSPR, Convert__imm_95_986__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8835 | { 8891 /* mtuamr */, PPC::MTSPR8, Convert__imm_95_13__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8836 | { 8891 /* mtuamr */, PPC::MTSPR, Convert__imm_95_13__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8837 | { 8898 /* mtudscr */, PPC::MTSPR8, Convert__imm_95_3__RegG8RC1_0, AMFBS_ModernAs, { MCK_RegG8RC }, }, |
| 8838 | { 8898 /* mtudscr */, PPC::MTUDSCR, Convert__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8839 | { 8898 /* mtudscr */, PPC::MTSPR, Convert__imm_95_3__RegGPRC1_0, AMFBS_ModernAs, { MCK_RegGPRC }, }, |
| 8840 | { 8906 /* mtvrd */, PPC::MTVRD, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
| 8841 | { 8912 /* mtvrsave */, PPC::MTVRSAVE, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8842 | { 8921 /* mtvrwa */, PPC::MTVRWA, Convert__RegVRRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC }, }, |
| 8843 | { 8928 /* mtvrwz */, PPC::MTVRWZ, Convert__RegVRRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC }, }, |
| 8844 | { 8935 /* mtvscr */, PPC::MTVSCR, Convert__RegVRRC1_0, AMFBS_None, { MCK_RegVRRC }, }, |
| 8845 | { 8942 /* mtvsrbm */, PPC::MTVSRBM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
| 8846 | { 8950 /* mtvsrbmi */, PPC::MTVSRBMI, Convert__RegVRRC1_0__U16Imm1_1, AMFBS_None, { MCK_RegVRRC, MCK_U16Imm }, }, |
| 8847 | { 8959 /* mtvsrd */, PPC::MTVSRD, Convert__RegVSFRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegG8RC }, }, |
| 8848 | { 8966 /* mtvsrdd */, PPC::MTVSRDD, Convert__RegVSRC1_0__RegG8RCNoX01_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegG8RCNoX0, MCK_RegG8RC }, }, |
| 8849 | { 8974 /* mtvsrdm */, PPC::MTVSRDM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
| 8850 | { 8982 /* mtvsrhm */, PPC::MTVSRHM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
| 8851 | { 8990 /* mtvsrqm */, PPC::MTVSRQM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
| 8852 | { 8998 /* mtvsrwa */, PPC::MTVSRWA, Convert__RegVSFRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegGPRC }, }, |
| 8853 | { 9006 /* mtvsrwm */, PPC::MTVSRWM, Convert__RegVRRC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC }, }, |
| 8854 | { 9014 /* mtvsrws */, PPC::MTVSRWS, Convert__RegVSRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegGPRC }, }, |
| 8855 | { 9022 /* mtvsrwz */, PPC::MTVSRWZ, Convert__RegVSFRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegGPRC }, }, |
| 8856 | { 9030 /* mtxer */, PPC::MTSPR8, Convert__imm_95_1__RegG8RC1_0, AMFBS_None, { MCK_RegG8RC }, }, |
| 8857 | { 9030 /* mtxer */, PPC::MTSPR, Convert__imm_95_1__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 8858 | { 9036 /* mulhd */, PPC::MULHD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8859 | { 9036 /* mulhd */, PPC::MULHD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8860 | { 9042 /* mulhdu */, PPC::MULHDU, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8861 | { 9042 /* mulhdu */, PPC::MULHDU_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8862 | { 9049 /* mulhw */, PPC::MULHW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8863 | { 9049 /* mulhw */, PPC::MULHW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8864 | { 9055 /* mulhwu */, PPC::MULHWU, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8865 | { 9055 /* mulhwu */, PPC::MULHWU_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8866 | { 9062 /* mulld */, PPC::MULLD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8867 | { 9062 /* mulld */, PPC::MULLD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8868 | { 9068 /* mulldo */, PPC::MULLDO, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8869 | { 9068 /* mulldo */, PPC::MULLDO_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8870 | { 9075 /* mulli */, PPC::MULLI, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
| 8871 | { 9081 /* mullw */, PPC::MULLW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8872 | { 9081 /* mullw */, PPC::MULLW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8873 | { 9087 /* mullwo */, PPC::MULLWO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8874 | { 9087 /* mullwo */, PPC::MULLWO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8875 | { 9094 /* nand */, PPC::NAND, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8876 | { 9094 /* nand */, PPC::NAND_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8877 | { 9099 /* nap */, PPC::NAP, Convert_NoOperands, AMFBS_None, { }, }, |
| 8878 | { 9103 /* neg */, PPC::NEG, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8879 | { 9103 /* neg */, PPC::NEG_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8880 | { 9107 /* nego */, PPC::NEGO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8881 | { 9107 /* nego */, PPC::NEGO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8882 | { 9112 /* nop */, PPC::NOP, Convert_NoOperands, AMFBS_None, { }, }, |
| 8883 | { 9112 /* nop */, PPC::ORI, Convert__regR0__regR0__imm_95_0, AMFBS_None, { }, }, |
| 8884 | { 9112 /* nop */, PPC::ORI8, Convert__regX0__regX0__imm_95_0, AMFBS_None, { }, }, |
| 8885 | { 9116 /* nor */, PPC::NOR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8886 | { 9116 /* nor */, PPC::NOR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8887 | { 9120 /* not */, PPC::NOR8, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8888 | { 9120 /* not */, PPC::NOR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8889 | { 9120 /* not */, PPC::NOR8_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8890 | { 9120 /* not */, PPC::NOR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8891 | { 9124 /* or */, PPC::OR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8892 | { 9124 /* or */, PPC::OR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8893 | { 9127 /* orc */, PPC::ORC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8894 | { 9127 /* orc */, PPC::ORC_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8895 | { 9131 /* ori */, PPC::ORI, Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
| 8896 | { 9135 /* oris */, PPC::ORIS, Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
| 8897 | { 9140 /* paddi */, PPC::PADDI8, Convert__RegG8RC1_0__RegG8RCNoX01_1__S34Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_S34Imm }, }, |
| 8898 | { 9140 /* paddi */, PPC::PADDIpc, Convert__RegGPRC1_0__ImmZero1_1__S34Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_ImmZero, MCK_S34Imm, MCK_1 }, }, |
| 8899 | { 9140 /* paddi */, PPC::PADDI, Convert__RegGPRC1_0__RegGPRCNoR01_1__S34Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_S34Imm, MCK_0 }, }, |
| 8900 | { 9146 /* paddis */, PPC::PADDISpc, Convert__RegGPRC1_0__ImmZero1_1__S32Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_ImmZero, MCK_S32Imm, MCK_1 }, }, |
| 8901 | { 9146 /* paddis */, PPC::PADDIS, Convert__RegGPRC1_0__RegGPRCNoR01_1__S32Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_S32Imm, MCK_0 }, }, |
| 8902 | { 9153 /* paste */, PPC::CP_PASTE_rec, Convert__RegGPRC1_1__RegGPRC1_2__imm_95_1, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 8903 | { 9153 /* paste */, PPC::CP_PASTE_rec, Convert__RegGPRC1_1__RegGPRC1_2__U1Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U1Imm }, }, |
| 8904 | { 9159 /* pause_short */, PPC::WAITP10, Convert__imm_95_2__imm_95_0, AMFBS_None, { }, }, |
| 8905 | { 9171 /* pdepd */, PPC::PDEPD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8906 | { 9177 /* pextd */, PPC::PEXTD, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 8907 | { 9183 /* phwsync */, PPC::SYNCP10, Convert__imm_95_4__imm_95_0, AMFBS_None, { }, }, |
| 8908 | { 9191 /* pla */, PPC::PLA8pc, Convert__RegG8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S34Imm }, }, |
| 8909 | { 9191 /* pla */, PPC::PLApc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 8910 | { 9191 /* pla */, PPC::PLA8, Convert__RegG8RC1_0__RegG8RCNoX01_2__S34Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S34Imm, MCK_RegG8RCNoX0 }, }, |
| 8911 | { 9191 /* pla */, PPC::PLA, Convert__RegGPRC1_0__RegGPRCNoR01_2__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm, MCK_RegGPRCNoR0 }, }, |
| 8912 | { 9195 /* plbz */, PPC::PLBZonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 8913 | { 9195 /* plbz */, PPC::PLBZnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8914 | { 9195 /* plbz */, PPC::PLBZpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8915 | { 9195 /* plbz */, PPC::PLBZ, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8916 | { 9200 /* pld */, PPC::PLDonlypc, Convert__RegG8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S34Imm }, }, |
| 8917 | { 9200 /* pld */, PPC::PLDnopc, Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8918 | { 9200 /* pld */, PPC::PLDpc, Convert__RegG8RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8919 | { 9200 /* pld */, PPC::PLD, Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8920 | { 9204 /* plfd */, PPC::PLFDonlypc, Convert__RegF8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegF8RC, MCK_S34Imm }, }, |
| 8921 | { 9204 /* plfd */, PPC::PLFDnopc, Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8922 | { 9204 /* plfd */, PPC::PLFDpc, Convert__RegF8RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8923 | { 9204 /* plfd */, PPC::PLFD, Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8924 | { 9209 /* plfs */, PPC::PLFSonlypc, Convert__RegF4RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegF4RC, MCK_S34Imm }, }, |
| 8925 | { 9209 /* plfs */, PPC::PLFSnopc, Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8926 | { 9209 /* plfs */, PPC::PLFSpc, Convert__RegF4RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8927 | { 9209 /* plfs */, PPC::PLFS, Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8928 | { 9214 /* plha */, PPC::PLHAonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 8929 | { 9214 /* plha */, PPC::PLHAnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8930 | { 9214 /* plha */, PPC::PLHApc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8931 | { 9214 /* plha */, PPC::PLHA, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8932 | { 9219 /* plhz */, PPC::PLHZonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 8933 | { 9219 /* plhz */, PPC::PLHZnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8934 | { 9219 /* plhz */, PPC::PLHZpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8935 | { 9219 /* plhz */, PPC::PLHZ, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8936 | { 9224 /* pli */, PPC::PLI, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 8937 | { 9228 /* plwa */, PPC::PLWAonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 8938 | { 9228 /* plwa */, PPC::PLWAnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8939 | { 9228 /* plwa */, PPC::PLWApc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8940 | { 9228 /* plwa */, PPC::PLWA, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8941 | { 9233 /* plwsync */, PPC::SYNCP10, Convert__imm_95_5__imm_95_0, AMFBS_None, { }, }, |
| 8942 | { 9241 /* plwz */, PPC::PLWZonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 8943 | { 9241 /* plwz */, PPC::PLWZnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8944 | { 9241 /* plwz */, PPC::PLWZpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8945 | { 9241 /* plwz */, PPC::PLWZ, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8946 | { 9246 /* plxsd */, PPC::PLXSDonlypc, Convert__RegVFRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVFRC, MCK_S34Imm }, }, |
| 8947 | { 9246 /* plxsd */, PPC::PLXSDnopc, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8948 | { 9246 /* plxsd */, PPC::PLXSDpc, Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8949 | { 9246 /* plxsd */, PPC::PLXSD, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8950 | { 9252 /* plxssp */, PPC::PLXSSPonlypc, Convert__RegVFRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVFRC, MCK_S34Imm }, }, |
| 8951 | { 9252 /* plxssp */, PPC::PLXSSPnopc, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8952 | { 9252 /* plxssp */, PPC::PLXSSPpc, Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8953 | { 9252 /* plxssp */, PPC::PLXSSP, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8954 | { 9259 /* plxv */, PPC::PLXVonlypc, Convert__RegVSRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_S34Imm }, }, |
| 8955 | { 9259 /* plxv */, PPC::PLXVnopc, Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8956 | { 9259 /* plxv */, PPC::PLXVpc, Convert__RegVSRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8957 | { 9259 /* plxv */, PPC::PLXV, Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8958 | { 9264 /* plxvp */, PPC::PLXVPonlypc, Convert__RegVSRpRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVSRpRC, MCK_S34Imm }, }, |
| 8959 | { 9264 /* plxvp */, PPC::PLXVPnopc, Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 8960 | { 9264 /* plxvp */, PPC::PLXVPpc, Convert__RegVSRpRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 8961 | { 9264 /* plxvp */, PPC::PLXVP, Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 8962 | { 9270 /* pmdmxvbf16gerx2 */, PPC::PMDMXVBF16GERX2, Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8963 | { 9286 /* pmdmxvbf16gerx2nn */, PPC::PMDMXVBF16GERX2NN, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8964 | { 9304 /* pmdmxvbf16gerx2np */, PPC::PMDMXVBF16GERX2NP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8965 | { 9322 /* pmdmxvbf16gerx2pn */, PPC::PMDMXVBF16GERX2PN, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8966 | { 9340 /* pmdmxvbf16gerx2pp */, PPC::PMDMXVBF16GERX2PP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8967 | { 9358 /* pmdmxvf16gerx2 */, PPC::PMDMXVF16GERX2, Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8968 | { 9373 /* pmdmxvf16gerx2nn */, PPC::PMDMXVF16GERX2NN, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8969 | { 9390 /* pmdmxvf16gerx2np */, PPC::PMDMXVF16GERX2NP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8970 | { 9407 /* pmdmxvf16gerx2pn */, PPC::PMDMXVF16GERX2PN, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8971 | { 9424 /* pmdmxvf16gerx2pp */, PPC::PMDMXVF16GERX2PP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8972 | { 9441 /* pmdmxvi8gerx4 */, PPC::PMDMXVI8GERX4, Convert__RegDMRRC1_0__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U4Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U4Imm }, }, |
| 8973 | { 9455 /* pmdmxvi8gerx4pp */, PPC::PMDMXVI8GERX4PP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U4Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U4Imm }, }, |
| 8974 | { 9471 /* pmdmxvi8gerx4spp */, PPC::PMDMXVI8GERX4SPP, Convert__RegDMRRC1_0__Tie0_1_1__RegVSRpRC1_1__RegVSRC1_2__U8Imm1_3__U4Imm1_4__U4Imm1_5, AMFBS_None, { MCK_RegDMRRC, MCK_RegVSRpRC, MCK_RegVSRC, MCK_U8Imm, MCK_U4Imm, MCK_U4Imm }, }, |
| 8975 | { 9488 /* pmxvbf16ger2 */, PPC::PMXVBF16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8976 | { 9501 /* pmxvbf16ger2nn */, PPC::PMXVBF16GER2NN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8977 | { 9516 /* pmxvbf16ger2np */, PPC::PMXVBF16GER2NP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8978 | { 9531 /* pmxvbf16ger2pn */, PPC::PMXVBF16GER2PN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8979 | { 9546 /* pmxvbf16ger2pp */, PPC::PMXVBF16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8980 | { 9561 /* pmxvf16ger2 */, PPC::PMXVF16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8981 | { 9573 /* pmxvf16ger2nn */, PPC::PMXVF16GER2NN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8982 | { 9587 /* pmxvf16ger2np */, PPC::PMXVF16GER2NP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8983 | { 9601 /* pmxvf16ger2pn */, PPC::PMXVF16GER2PN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8984 | { 9615 /* pmxvf16ger2pp */, PPC::PMXVF16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8985 | { 9629 /* pmxvf32ger */, PPC::PMXVF32GER, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
| 8986 | { 9640 /* pmxvf32gernn */, PPC::PMXVF32GERNN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
| 8987 | { 9653 /* pmxvf32gernp */, PPC::PMXVF32GERNP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
| 8988 | { 9666 /* pmxvf32gerpn */, PPC::PMXVF32GERPN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
| 8989 | { 9679 /* pmxvf32gerpp */, PPC::PMXVF32GERPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm }, }, |
| 8990 | { 9692 /* pmxvf64ger */, PPC::PMXVF64GER, Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
| 8991 | { 9703 /* pmxvf64gernn */, PPC::PMXVF64GERNN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
| 8992 | { 9716 /* pmxvf64gernp */, PPC::PMXVF64GERNP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
| 8993 | { 9729 /* pmxvf64gerpn */, PPC::PMXVF64GERPN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
| 8994 | { 9742 /* pmxvf64gerpp */, PPC::PMXVF64GERPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2__U4Imm1_3__U2Imm1_4, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC, MCK_U4Imm, MCK_U2Imm }, }, |
| 8995 | { 9755 /* pmxvi16ger2 */, PPC::PMXVI16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8996 | { 9767 /* pmxvi16ger2pp */, PPC::PMXVI16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8997 | { 9781 /* pmxvi16ger2s */, PPC::PMXVI16GER2S, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8998 | { 9794 /* pmxvi16ger2spp */, PPC::PMXVI16GER2SPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U2Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U2Imm }, }, |
| 8999 | { 9809 /* pmxvi4ger8 */, PPC::PMXVI4GER8, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U8Imm }, }, |
| 9000 | { 9820 /* pmxvi4ger8pp */, PPC::PMXVI4GER8PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U8Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U8Imm }, }, |
| 9001 | { 9833 /* pmxvi8ger4 */, PPC::PMXVI8GER4, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U4Imm }, }, |
| 9002 | { 9844 /* pmxvi8ger4pp */, PPC::PMXVI8GER4PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U4Imm }, }, |
| 9003 | { 9857 /* pmxvi8ger4spp */, PPC::PMXVI8GER4SPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2__U4Imm1_3__U4Imm1_4__U4Imm1_5, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm, MCK_U4Imm, MCK_U4Imm }, }, |
| 9004 | { 9871 /* popcntb */, PPC::POPCNTB, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9005 | { 9879 /* popcntd */, PPC::POPCNTD, Convert__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9006 | { 9887 /* popcntw */, PPC::POPCNTW, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9007 | { 9895 /* pstb */, PPC::PSTBonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 9008 | { 9895 /* pstb */, PPC::PSTBnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9009 | { 9895 /* pstb */, PPC::PSTBpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9010 | { 9895 /* pstb */, PPC::PSTB, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9011 | { 9900 /* pstd */, PPC::PSTDonlypc, Convert__RegG8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S34Imm }, }, |
| 9012 | { 9900 /* pstd */, PPC::PSTDnopc, Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9013 | { 9900 /* pstd */, PPC::PSTDpc, Convert__RegG8RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9014 | { 9900 /* pstd */, PPC::PSTD, Convert__RegG8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9015 | { 9905 /* pstfd */, PPC::PSTFDonlypc, Convert__RegF8RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegF8RC, MCK_S34Imm }, }, |
| 9016 | { 9905 /* pstfd */, PPC::PSTFDnopc, Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9017 | { 9905 /* pstfd */, PPC::PSTFDpc, Convert__RegF8RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9018 | { 9905 /* pstfd */, PPC::PSTFD, Convert__RegF8RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9019 | { 9911 /* pstfs */, PPC::PSTFSonlypc, Convert__RegF4RC1_0__S34Imm1_1, AMFBS_None, { MCK_RegF4RC, MCK_S34Imm }, }, |
| 9020 | { 9911 /* pstfs */, PPC::PSTFSnopc, Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9021 | { 9911 /* pstfs */, PPC::PSTFSpc, Convert__RegF4RC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9022 | { 9911 /* pstfs */, PPC::PSTFS, Convert__RegF4RC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9023 | { 9917 /* psth */, PPC::PSTHonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 9024 | { 9917 /* psth */, PPC::PSTHnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9025 | { 9917 /* psth */, PPC::PSTHpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9026 | { 9917 /* psth */, PPC::PSTH, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9027 | { 9922 /* pstw */, PPC::PSTWonlypc, Convert__RegGPRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S34Imm }, }, |
| 9028 | { 9922 /* pstw */, PPC::PSTWnopc, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9029 | { 9922 /* pstw */, PPC::PSTWpc, Convert__RegGPRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9030 | { 9922 /* pstw */, PPC::PSTW, Convert__RegGPRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9031 | { 9927 /* pstxsd */, PPC::PSTXSDonlypc, Convert__RegVFRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVFRC, MCK_S34Imm }, }, |
| 9032 | { 9927 /* pstxsd */, PPC::PSTXSDnopc, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9033 | { 9927 /* pstxsd */, PPC::PSTXSDpc, Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9034 | { 9927 /* pstxsd */, PPC::PSTXSD, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9035 | { 9934 /* pstxssp */, PPC::PSTXSSPonlypc, Convert__RegVFRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVFRC, MCK_S34Imm }, }, |
| 9036 | { 9934 /* pstxssp */, PPC::PSTXSSPnopc, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9037 | { 9934 /* pstxssp */, PPC::PSTXSSPpc, Convert__RegVFRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9038 | { 9934 /* pstxssp */, PPC::PSTXSSP, Convert__RegVFRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9039 | { 9942 /* pstxv */, PPC::PSTXVonlypc, Convert__RegVSRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_S34Imm }, }, |
| 9040 | { 9942 /* pstxv */, PPC::PSTXVnopc, Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9041 | { 9942 /* pstxv */, PPC::PSTXVpc, Convert__RegVSRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9042 | { 9942 /* pstxv */, PPC::PSTXV, Convert__RegVSRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9043 | { 9948 /* pstxvp */, PPC::PSTXVPonlypc, Convert__RegVSRpRC1_0__S34Imm1_1, AMFBS_None, { MCK_RegVSRpRC, MCK_S34Imm }, }, |
| 9044 | { 9948 /* pstxvp */, PPC::PSTXVPnopc, Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_RegGxRCNoR0 }, }, |
| 9045 | { 9948 /* pstxvp */, PPC::PSTXVPpc, Convert__RegVSRpRC1_0__DispRI341_1__ImmZero1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_ImmZero, MCK_1 }, }, |
| 9046 | { 9948 /* pstxvp */, PPC::PSTXVP, Convert__RegVSRpRC1_0__DispRI341_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRI34, MCK_RegGxRCNoR0, MCK_0 }, }, |
| 9047 | { 9955 /* psubi */, PPC::PSUBI, Convert__RegG8RC1_0__RegG8RCNoX01_1__S34Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RCNoX0, MCK_S34Imm }, }, |
| 9048 | { 9961 /* ptesync */, PPC::SYNCP10, Convert__imm_95_2__imm_95_0, AMFBS_None, { }, }, |
| 9049 | { 9961 /* ptesync */, PPC::SYNC, Convert__imm_95_2, AMFBS_None, { }, }, |
| 9050 | { 9969 /* ptesyncio */, PPC::PTESYNCIO, Convert__RegG8RC1_0, AMFBS_None, { MCK_RegG8RC }, }, |
| 9051 | { 9979 /* rfci */, PPC::RFCI, Convert_NoOperands, AMFBS_None, { }, }, |
| 9052 | { 9984 /* rfdi */, PPC::RFDI, Convert_NoOperands, AMFBS_None, { }, }, |
| 9053 | { 9989 /* rfebb */, PPC::RFEBB, Convert__imm_95_1, AMFBS_None, { }, }, |
| 9054 | { 9989 /* rfebb */, PPC::RFEBB, Convert__U1Imm1_0, AMFBS_None, { MCK_U1Imm }, }, |
| 9055 | { 9995 /* rfi */, PPC::RFI, Convert_NoOperands, AMFBS_None, { }, }, |
| 9056 | { 9999 /* rfid */, PPC::RFID, Convert_NoOperands, AMFBS_None, { }, }, |
| 9057 | { 10004 /* rfmci */, PPC::RFMCI, Convert_NoOperands, AMFBS_None, { }, }, |
| 9058 | { 10010 /* rldcl */, PPC::RLDCL, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
| 9059 | { 10010 /* rldcl */, PPC::RLDCL_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
| 9060 | { 10016 /* rldcr */, PPC::RLDCR, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
| 9061 | { 10016 /* rldcr */, PPC::RLDCR_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
| 9062 | { 10022 /* rldic */, PPC::RLDIC, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 9063 | { 10022 /* rldic */, PPC::RLDIC_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 9064 | { 10028 /* rldicl */, PPC::RLDICL, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 9065 | { 10028 /* rldicl */, PPC::RLDICL_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 9066 | { 10035 /* rldicr */, PPC::RLDICR, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 9067 | { 10035 /* rldicr */, PPC::RLDICR_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 9068 | { 10042 /* rldimi */, PPC::RLDIMI, Convert__RegG8RC1_0__Tie0_1_1__RegG8RC1_1__U6Imm1_2__U6Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 9069 | { 10042 /* rldimi */, PPC::RLDIMI_rec, Convert__RegG8RC1_1__Tie0_1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, }, |
| 9070 | { 10049 /* rlwimi */, PPC::RLWIMIbm, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
| 9071 | { 10049 /* rlwimi */, PPC::RLWIMIbm_rec, Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
| 9072 | { 10049 /* rlwimi */, PPC::RLWIMI, Convert__RegGPRC1_0__Tie0_1_1__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm, MCK_U5Imm }, }, |
| 9073 | { 10049 /* rlwimi */, PPC::RLWIMI_rec, Convert__RegGPRC1_1__Tie0_1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm, MCK_U5Imm }, }, |
| 9074 | { 10056 /* rlwinm */, PPC::RLWINMbm, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
| 9075 | { 10056 /* rlwinm */, PPC::RLWINMbm_rec, Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
| 9076 | { 10056 /* rlwinm */, PPC::RLWINM, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm, MCK_U5Imm }, }, |
| 9077 | { 10056 /* rlwinm */, PPC::RLWINM_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4__U5Imm1_5, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm, MCK_U5Imm }, }, |
| 9078 | { 10063 /* rlwnm */, PPC::RLWNMbm, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
| 9079 | { 10063 /* rlwnm */, PPC::RLWNMbm_rec, Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm, MCK_Imm }, }, |
| 9080 | { 10063 /* rlwnm */, PPC::RLWNM, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 9081 | { 10063 /* rlwnm */, PPC::RLWNM_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__U5Imm1_4__U5Imm1_5, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm, MCK_U5Imm }, }, |
| 9082 | { 10069 /* rotld */, PPC::RLDCL, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2__imm_95_0, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
| 9083 | { 10069 /* rotld */, PPC::RLDCL_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3__imm_95_0, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
| 9084 | { 10075 /* rotldi */, PPC::RLDICL, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2__imm_95_0, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9085 | { 10075 /* rotldi */, PPC::RLDICL_32_64, Convert__RegG8RC1_0__RegGPRC1_1__U6Imm1_2__imm_95_0, AMFBS_None, { MCK_RegG8RC, MCK_RegGPRC, MCK_U6Imm }, }, |
| 9086 | { 10075 /* rotldi */, PPC::RLDICL_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__imm_95_0, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9087 | { 10082 /* rotlw */, PPC::RLWNM8, Convert__RegG8RC1_0__RegG8RC1_1__RegG8RC1_2__imm_95_0__imm_95_31, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9088 | { 10082 /* rotlw */, PPC::RLWNM, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__imm_95_0__imm_95_31, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9089 | { 10082 /* rotlw */, PPC::RLWNM8_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegG8RC1_3__imm_95_0__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9090 | { 10082 /* rotlw */, PPC::RLWNM_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__imm_95_0__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9091 | { 10088 /* rotlwi */, PPC::RLWINM8, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__imm_95_0__imm_95_31, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
| 9092 | { 10088 /* rotlwi */, PPC::RLWINM, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2__imm_95_0__imm_95_31, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9093 | { 10088 /* rotlwi */, PPC::RLWINM8_rec, Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__imm_95_0__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U5Imm }, }, |
| 9094 | { 10088 /* rotlwi */, PPC::RLWINM_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__imm_95_0__imm_95_31, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9095 | { 10095 /* rotrdi */, PPC::ROTRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9096 | { 10095 /* rotrdi */, PPC::ROTRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9097 | { 10102 /* rotrwi */, PPC::ROTRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9098 | { 10102 /* rotrwi */, PPC::ROTRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9099 | { 10109 /* sc */, PPC::SC, Convert__imm_95_0, AMFBS_None, { }, }, |
| 9100 | { 10109 /* sc */, PPC::SC, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 9101 | { 10112 /* scv */, PPC::SCV, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 9102 | { 10116 /* setb */, PPC::SETB, Convert__RegGPRC1_0__RegCRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRRC }, }, |
| 9103 | { 10121 /* setbc */, PPC::SETBC, Convert__RegGPRC1_0__RegCRBITRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRBITRC }, }, |
| 9104 | { 10127 /* setbcr */, PPC::SETBCR, Convert__RegGPRC1_0__RegCRBITRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRBITRC }, }, |
| 9105 | { 10134 /* setnbc */, PPC::SETNBC, Convert__RegGPRC1_0__RegCRBITRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRBITRC }, }, |
| 9106 | { 10141 /* setnbcr */, PPC::SETNBCR, Convert__RegGPRC1_0__RegCRBITRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegCRBITRC }, }, |
| 9107 | { 10149 /* slbfee */, PPC::SLBFEE_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9108 | { 10156 /* slbia */, PPC::SLBIA, Convert_NoOperands, AMFBS_None, { }, }, |
| 9109 | { 10162 /* slbie */, PPC::SLBIE, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 9110 | { 10168 /* slbieg */, PPC::SLBIEG, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9111 | { 10175 /* slbmfee */, PPC::SLBMFEE, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9112 | { 10183 /* slbmfev */, PPC::SLBMFEV, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9113 | { 10191 /* slbmte */, PPC::SLBMTE, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9114 | { 10198 /* slbsync */, PPC::SLBSYNC, Convert_NoOperands, AMFBS_None, { }, }, |
| 9115 | { 10206 /* sld */, PPC::SLD, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
| 9116 | { 10206 /* sld */, PPC::SLD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
| 9117 | { 10210 /* sldi */, PPC::SLDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9118 | { 10210 /* sldi */, PPC::SLDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9119 | { 10215 /* slw */, PPC::SLW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9120 | { 10215 /* slw */, PPC::SLW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9121 | { 10219 /* slwi */, PPC::SLWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9122 | { 10219 /* slwi */, PPC::SLWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9123 | { 10224 /* srad */, PPC::SRAD, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
| 9124 | { 10224 /* srad */, PPC::SRAD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
| 9125 | { 10229 /* sradi */, PPC::SRADI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9126 | { 10229 /* sradi */, PPC::SRADI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9127 | { 10235 /* sraw */, PPC::SRAW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9128 | { 10235 /* sraw */, PPC::SRAW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9129 | { 10240 /* srawi */, PPC::SRAWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9130 | { 10240 /* srawi */, PPC::SRAWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9131 | { 10246 /* srd */, PPC::SRD, Convert__RegG8RC1_0__RegG8RC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
| 9132 | { 10246 /* srd */, PPC::SRD_rec, Convert__RegG8RC1_1__RegG8RC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegGPRC }, }, |
| 9133 | { 10250 /* srdi */, PPC::SRDI, Convert__RegG8RC1_0__RegG8RC1_1__U6Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9134 | { 10250 /* srdi */, PPC::SRDI_rec, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, }, |
| 9135 | { 10255 /* srw */, PPC::SRW, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9136 | { 10255 /* srw */, PPC::SRW_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9137 | { 10259 /* srwi */, PPC::SRWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9138 | { 10259 /* srwi */, PPC::SRWI_rec, Convert__RegGPRC1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9139 | { 10264 /* stb */, PPC::STB, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9140 | { 10268 /* stbcix */, PPC::STBCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9141 | { 10275 /* stbcx */, PPC::STBCX, Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9142 | { 10281 /* stbepx */, PPC::STBEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9143 | { 10288 /* stbu */, PPC::STBU, Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9144 | { 10293 /* stbux */, PPC::STBUX, Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9145 | { 10299 /* stbx */, PPC::STBXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 9146 | { 10299 /* stbx */, PPC::STBX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9147 | { 10304 /* stcisync */, PPC::SYNCP10, Convert__imm_95_0__imm_95_2, AMFBS_None, { }, }, |
| 9148 | { 10313 /* std */, PPC::STD, Convert__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 9149 | { 10317 /* stdat */, PPC::STDAT, Convert__RegG8RC1_0__RegGxRCNoR01_1__U5Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_U5Imm }, }, |
| 9150 | { 10323 /* stdbrx */, PPC::STDBRX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9151 | { 10330 /* stdcix */, PPC::STDCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9152 | { 10337 /* stdcx */, PPC::STDCX, Convert__RegG8RC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9153 | { 10343 /* stdu */, PPC::STDU, Convert__imm_95_0__RegG8RC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8RC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 9154 | { 10348 /* stdux */, PPC::STDUX, Convert__imm_95_0__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9155 | { 10354 /* stdx */, PPC::STDX, Convert__RegG8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9156 | { 10354 /* stdx */, PPC::STDXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 9157 | { 10359 /* stfd */, PPC::STFD, Convert__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9158 | { 10364 /* stfdepx */, PPC::STFDEPX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9159 | { 10372 /* stfdu */, PPC::STFDU, Convert__imm_95_0__RegF8RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF8RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9160 | { 10378 /* stfdux */, PPC::STFDUX, Convert__imm_95_0__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9161 | { 10385 /* stfdx */, PPC::STFDX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9162 | { 10385 /* stfdx */, PPC::STFDXTLS_, Convert__RegF8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 9163 | { 10391 /* stfiwx */, PPC::STFIWX, Convert__RegF8RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF8RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9164 | { 10398 /* stfs */, PPC::STFS, Convert__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9165 | { 10403 /* stfsu */, PPC::STFSU, Convert__imm_95_0__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegF4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9166 | { 10409 /* stfsux */, PPC::STFSUX, Convert__imm_95_0__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9167 | { 10416 /* stfsx */, PPC::STFSX, Convert__RegF4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9168 | { 10416 /* stfsx */, PPC::STFSXTLS_, Convert__RegF4RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegF4RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 9169 | { 10422 /* sth */, PPC::STH, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9170 | { 10426 /* sthbrx */, PPC::STHBRX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9171 | { 10433 /* sthcix */, PPC::STHCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9172 | { 10440 /* sthcx */, PPC::STHCX, Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9173 | { 10446 /* sthepx */, PPC::STHEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9174 | { 10453 /* sthu */, PPC::STHU, Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9175 | { 10458 /* sthux */, PPC::STHUX, Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9176 | { 10464 /* sthx */, PPC::STHXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 9177 | { 10464 /* sthx */, PPC::STHX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9178 | { 10469 /* stmw */, PPC::STMW, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9179 | { 10474 /* stncisync */, PPC::SYNCP10, Convert__imm_95_1__imm_95_1, AMFBS_None, { }, }, |
| 9180 | { 10484 /* stop */, PPC::STOP, Convert_NoOperands, AMFBS_None, { }, }, |
| 9181 | { 10489 /* stq */, PPC::STQ, Convert__RegG8pRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegG8pRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 9182 | { 10493 /* stqcx */, PPC::STQCX, Convert__RegG8pRC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8pRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9183 | { 10499 /* stswi */, PPC::STSWI, Convert__RegGPRC1_0__RegGPRC1_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9184 | { 10505 /* stsync */, PPC::SYNCP10, Convert__imm_95_0__imm_95_3, AMFBS_None, { }, }, |
| 9185 | { 10512 /* stvebx */, PPC::STVEBX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9186 | { 10519 /* stvehx */, PPC::STVEHX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9187 | { 10526 /* stvewx */, PPC::STVEWX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9188 | { 10533 /* stvx */, PPC::STVX, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9189 | { 10538 /* stvxl */, PPC::STVXL, Convert__RegVRRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9190 | { 10544 /* stw */, PPC::STW, Convert__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9191 | { 10544 /* stw */, PPC::SPESTW, Convert__RegSPE4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegSPE4RC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9192 | { 10548 /* stwat */, PPC::STWAT, Convert__RegGPRC1_0__RegGxRCNoR01_1__U5Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_U5Imm }, }, |
| 9193 | { 10554 /* stwbrx */, PPC::STWBRX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9194 | { 10561 /* stwcix */, PPC::STWCIX, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9195 | { 10568 /* stwcx */, PPC::STWCX, Convert__RegGPRC1_1__RegGxRCNoR01_2__RegGxRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9196 | { 10574 /* stwepx */, PPC::STWEPX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9197 | { 10581 /* stwu */, PPC::STWU, Convert__imm_95_0__RegGPRC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegGPRC, MCK_DispRI, MCK_RegGxRCNoR0 }, }, |
| 9198 | { 10586 /* stwux */, PPC::STWUX, Convert__imm_95_0__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9199 | { 10592 /* stwx */, PPC::STWXTLS_, Convert__RegG8RC1_0__RegGxRCNoR01_1__TLSReg1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegGxRCNoR0, MCK_TLSReg }, }, |
| 9200 | { 10592 /* stwx */, PPC::STWX, Convert__RegGPRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9201 | { 10592 /* stwx */, PPC::SPESTWX, Convert__RegSPE4RC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegSPE4RC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9202 | { 10597 /* stxsd */, PPC::STXSD, Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 9203 | { 10603 /* stxsdx */, PPC::STXSDX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9204 | { 10610 /* stxsibx */, PPC::STXSIBX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9205 | { 10618 /* stxsihx */, PPC::STXSIHX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9206 | { 10626 /* stxsiwx */, PPC::STXSIWX, Convert__RegVSFRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9207 | { 10634 /* stxssp */, PPC::STXSSP, Convert__RegVFRC1_0__DispRIX1_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVFRC, MCK_DispRIX, MCK_RegGxRCNoR0 }, }, |
| 9208 | { 10641 /* stxsspx */, PPC::STXSSPX, Convert__RegVSSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9209 | { 10649 /* stxv */, PPC::STXV, Convert__RegVSRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
| 9210 | { 10654 /* stxvb16x */, PPC::STXVB16X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9211 | { 10663 /* stxvd2x */, PPC::STXVD2X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9212 | { 10671 /* stxvh8x */, PPC::STXVH8X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9213 | { 10679 /* stxvl */, PPC::STXVL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
| 9214 | { 10685 /* stxvll */, PPC::STXVLL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
| 9215 | { 10692 /* stxvp */, PPC::STXVP, Convert__RegVSRpRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK_RegVSRpRC, MCK_DispRIX16, MCK_RegGxRCNoR0 }, }, |
| 9216 | { 10698 /* stxvpb32x */, PPC::STXVPB32X, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
| 9217 | { 10708 /* stxvprl */, PPC::STXVPRL, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
| 9218 | { 10716 /* stxvprll */, PPC::STXVPRLL, Convert__RegVSRpRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_Imm, MCK_RegG8RC }, }, |
| 9219 | { 10725 /* stxvpx */, PPC::STXVPX, Convert__RegVSRpRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9220 | { 10732 /* stxvrbx */, PPC::STXVRBX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9221 | { 10740 /* stxvrdx */, PPC::STXVRDX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9222 | { 10748 /* stxvrhx */, PPC::STXVRHX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9223 | { 10756 /* stxvrl */, PPC::STXVRL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
| 9224 | { 10763 /* stxvrll */, PPC::STXVRLL, Convert__RegVSRC1_0__Imm1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_Imm, MCK_RegG8RC }, }, |
| 9225 | { 10771 /* stxvrwx */, PPC::STXVRWX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9226 | { 10779 /* stxvw4x */, PPC::STXVW4X, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9227 | { 10787 /* stxvx */, PPC::STXVX, Convert__RegVSRC1_0__RegGxRCNoR01_1__RegGxRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegGxRCNoR0, MCK_RegGxRC }, }, |
| 9228 | { 10793 /* sub */, PPC::SUBF8, Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9229 | { 10793 /* sub */, PPC::SUBF, Convert__RegGPRC1_0__RegGPRC1_2__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9230 | { 10793 /* sub */, PPC::SUBF8_rec, Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9231 | { 10793 /* sub */, PPC::SUBF_rec, Convert__RegGPRC1_1__RegGPRC1_3__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9232 | { 10797 /* subc */, PPC::SUBFC8, Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9233 | { 10797 /* subc */, PPC::SUBFC, Convert__RegGPRC1_0__RegGPRC1_2__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9234 | { 10797 /* subc */, PPC::SUBFC8_rec, Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9235 | { 10797 /* subc */, PPC::SUBFC_rec, Convert__RegGPRC1_1__RegGPRC1_3__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9236 | { 10802 /* subf */, PPC::SUBF, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9237 | { 10802 /* subf */, PPC::SUBF_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9238 | { 10807 /* subfc */, PPC::SUBFC, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9239 | { 10807 /* subfc */, PPC::SUBFC_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9240 | { 10813 /* subfco */, PPC::SUBFCO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9241 | { 10813 /* subfco */, PPC::SUBFCO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9242 | { 10820 /* subfe */, PPC::SUBFE, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9243 | { 10820 /* subfe */, PPC::SUBFE_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9244 | { 10826 /* subfeo */, PPC::SUBFEO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9245 | { 10826 /* subfeo */, PPC::SUBFEO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9246 | { 10833 /* subfic */, PPC::SUBFIC, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
| 9247 | { 10840 /* subfme */, PPC::SUBFME, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9248 | { 10840 /* subfme */, PPC::SUBFME_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9249 | { 10847 /* subfmeo */, PPC::SUBFMEO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9250 | { 10847 /* subfmeo */, PPC::SUBFMEO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9251 | { 10855 /* subfo */, PPC::SUBFO, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9252 | { 10855 /* subfo */, PPC::SUBFO_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9253 | { 10861 /* subfus */, PPC::SUBFUS, Convert__RegG8RC1_0__RegG8RC1_2__RegG8RC1_3__U1Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_U1Imm, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9254 | { 10861 /* subfus */, PPC::SUBFUS_rec, Convert__RegG8RC1_1__RegG8RC1_3__RegG8RC1_4__U1Imm1_2, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_U1Imm, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9255 | { 10868 /* subfze */, PPC::SUBFZE, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9256 | { 10868 /* subfze */, PPC::SUBFZE_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9257 | { 10875 /* subfzeo */, PPC::SUBFZEO, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9258 | { 10875 /* subfzeo */, PPC::SUBFZEO_rec, Convert__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9259 | { 10883 /* subi */, PPC::SUBI, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
| 9260 | { 10888 /* subic */, PPC::SUBIC, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
| 9261 | { 10888 /* subic */, PPC::SUBIC_rec, Convert__RegGPRC1_1__RegGPRC1_2__S16Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
| 9262 | { 10894 /* subis */, PPC::SUBIS, Convert__RegGPRC1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_S16Imm }, }, |
| 9263 | { 10900 /* subpcis */, PPC::SUBPCIS, Convert__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9264 | { 10908 /* sync */, PPC::SYNCP10, Convert__imm_95_0__imm_95_0, AMFBS_None, { }, }, |
| 9265 | { 10908 /* sync */, PPC::SYNC, Convert__imm_95_0, AMFBS_None, { }, }, |
| 9266 | { 10908 /* sync */, PPC::SYNC, Convert__U2Imm1_0, AMFBS_None, { MCK_U2Imm }, }, |
| 9267 | { 10908 /* sync */, PPC::SYNCP10, Convert__U3Imm1_0__imm_95_0, AMFBS_None, { MCK_U3Imm }, }, |
| 9268 | { 10908 /* sync */, PPC::SYNCP10, Convert__U3Imm1_0__U2Imm1_1, AMFBS_None, { MCK_U3Imm, MCK_U2Imm }, }, |
| 9269 | { 10913 /* tabort */, PPC::TABORT, Convert__RegGPRC1_1, AMFBS_None, { MCK__DOT_, MCK_RegGPRC }, }, |
| 9270 | { 10920 /* tabortdc */, PPC::TABORTDC, Convert__U5Imm1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_U5Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9271 | { 10929 /* tabortdci */, PPC::TABORTDCI, Convert__U5Imm1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_U5Imm, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9272 | { 10939 /* tabortwc */, PPC::TABORTWC, Convert__U5Imm1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_U5Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9273 | { 10948 /* tabortwci */, PPC::TABORTWCI, Convert__U5Imm1_1__RegGPRC1_2__U5Imm1_3, AMFBS_None, { MCK__DOT_, MCK_U5Imm, MCK_RegGPRC, MCK_U5Imm }, }, |
| 9274 | { 10958 /* tbegin */, PPC::TBEGIN, Convert__U1Imm1_1, AMFBS_None, { MCK__DOT_, MCK_U1Imm }, }, |
| 9275 | { 10965 /* tcheck */, PPC::TCHECK, Convert__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, }, |
| 9276 | { 10972 /* td */, PPC::TD, Convert__U5Imm1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_U5Imm, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9277 | { 10975 /* tdeq */, PPC::TD, Convert__imm_95_4__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9278 | { 10980 /* tdeqi */, PPC::TDI, Convert__imm_95_4__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9279 | { 10986 /* tdge */, PPC::TD, Convert__imm_95_12__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9280 | { 10991 /* tdgei */, PPC::TDI, Convert__imm_95_12__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9281 | { 10997 /* tdgt */, PPC::TD, Convert__imm_95_8__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9282 | { 11002 /* tdgti */, PPC::TDI, Convert__imm_95_8__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9283 | { 11008 /* tdi */, PPC::TDI, Convert__U5Imm1_0__RegG8RC1_1__S16Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegG8RC, MCK_S16Imm }, }, |
| 9284 | { 11012 /* tdle */, PPC::TD, Convert__imm_95_20__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9285 | { 11017 /* tdlei */, PPC::TDI, Convert__imm_95_20__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9286 | { 11023 /* tdlge */, PPC::TD, Convert__imm_95_5__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9287 | { 11029 /* tdlgei */, PPC::TDI, Convert__imm_95_5__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9288 | { 11036 /* tdlgt */, PPC::TD, Convert__imm_95_1__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9289 | { 11042 /* tdlgti */, PPC::TDI, Convert__imm_95_1__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9290 | { 11049 /* tdlle */, PPC::TD, Convert__imm_95_6__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9291 | { 11055 /* tdllei */, PPC::TDI, Convert__imm_95_6__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9292 | { 11062 /* tdllt */, PPC::TD, Convert__imm_95_2__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9293 | { 11068 /* tdllti */, PPC::TDI, Convert__imm_95_2__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9294 | { 11075 /* tdlng */, PPC::TD, Convert__imm_95_6__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9295 | { 11081 /* tdlngi */, PPC::TDI, Convert__imm_95_6__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9296 | { 11088 /* tdlnl */, PPC::TD, Convert__imm_95_5__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9297 | { 11094 /* tdlnli */, PPC::TDI, Convert__imm_95_5__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9298 | { 11101 /* tdlt */, PPC::TD, Convert__imm_95_16__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9299 | { 11106 /* tdlti */, PPC::TDI, Convert__imm_95_16__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9300 | { 11112 /* tdne */, PPC::TD, Convert__imm_95_24__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9301 | { 11117 /* tdnei */, PPC::TDI, Convert__imm_95_24__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9302 | { 11123 /* tdng */, PPC::TD, Convert__imm_95_20__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9303 | { 11128 /* tdngi */, PPC::TDI, Convert__imm_95_20__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9304 | { 11134 /* tdnl */, PPC::TD, Convert__imm_95_12__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9305 | { 11139 /* tdnli */, PPC::TDI, Convert__imm_95_12__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9306 | { 11145 /* tdu */, PPC::TD, Convert__imm_95_31__RegG8RC1_0__RegG8RC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9307 | { 11149 /* tdui */, PPC::TDI, Convert__imm_95_31__RegG8RC1_0__S16Imm1_1, AMFBS_None, { MCK_RegG8RC, MCK_S16Imm }, }, |
| 9308 | { 11154 /* tend */, PPC::TEND, Convert__imm_95_0, AMFBS_None, { MCK__DOT_ }, }, |
| 9309 | { 11154 /* tend */, PPC::TEND, Convert__U1Imm1_1, AMFBS_None, { MCK__DOT_, MCK_U1Imm }, }, |
| 9310 | { 11159 /* tendall */, PPC::TEND, Convert__imm_95_1, AMFBS_None, { MCK__DOT_ }, }, |
| 9311 | { 11167 /* tlbia */, PPC::TLBIA, Convert_NoOperands, AMFBS_None, { }, }, |
| 9312 | { 11173 /* tlbie */, PPC::TLBIE, Convert__regR0__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 9313 | { 11173 /* tlbie */, PPC::TLBIEP9, Convert__regR0__RegGPRC1_0__imm_95_0__imm_95_0__imm_95_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 9314 | { 11173 /* tlbie */, PPC::TLBIE, Convert__RegGPRC1_1__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9315 | { 11173 /* tlbie */, PPC::TLBIEP9, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0__imm_95_0__imm_95_0, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9316 | { 11173 /* tlbie */, PPC::TLBIEP9, Convert__RegGPRC1_0__RegGPRC1_1__U2Imm1_2__U1Imm1_3__U1Imm1_4, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U2Imm, MCK_U1Imm, MCK_U1Imm }, }, |
| 9317 | { 11179 /* tlbieio */, PPC::TLBIEIO, Convert__RegG8RC1_0__RegG8RC1_1__U2Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_U2Imm }, }, |
| 9318 | { 11187 /* tlbiel */, PPC::TLBIEL, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 9319 | { 11194 /* tlbiep */, PPC::TLBIEP, Convert__RegGPRC1_0__RegGPRC1_1__U2Imm1_2__U1Imm1_3__U1Imm1_4, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U2Imm, MCK_U1Imm, MCK_U1Imm }, }, |
| 9320 | { 11201 /* tlbilx */, PPC::TLBILX, Convert__U2Imm1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_U2Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9321 | { 11208 /* tlbilxlpid */, PPC::TLBILX, Convert__imm_95_0__regR0__regR0, AMFBS_None, { }, }, |
| 9322 | { 11219 /* tlbilxpid */, PPC::TLBILX, Convert__imm_95_1__regR0__regR0, AMFBS_None, { }, }, |
| 9323 | { 11229 /* tlbilxva */, PPC::TLBILX, Convert__imm_95_3__regR0__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 9324 | { 11229 /* tlbilxva */, PPC::TLBILX, Convert__imm_95_3__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9325 | { 11238 /* tlbivax */, PPC::TLBIVAX, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9326 | { 11246 /* tlbld */, PPC::TLBLD, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 9327 | { 11252 /* tlbli */, PPC::TLBLI, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 9328 | { 11258 /* tlbre */, PPC::TLBRE, Convert_NoOperands, AMFBS_None, { }, }, |
| 9329 | { 11258 /* tlbre */, PPC::TLBRE2, Convert__RegGPRC1_0__RegGPRC1_1__Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_Imm }, }, |
| 9330 | { 11264 /* tlbrehi */, PPC::TLBRE2, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9331 | { 11272 /* tlbrelo */, PPC::TLBRE2, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9332 | { 11280 /* tlbsx */, PPC::TLBSX, Convert__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9333 | { 11280 /* tlbsx */, PPC::TLBSX2, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9334 | { 11280 /* tlbsx */, PPC::TLBSX2D, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9335 | { 11286 /* tlbsync */, PPC::TLBSYNC, Convert_NoOperands, AMFBS_None, { }, }, |
| 9336 | { 11294 /* tlbsyncio */, PPC::TLBSYNCIO, Convert__RegG8RC1_0, AMFBS_None, { MCK_RegG8RC }, }, |
| 9337 | { 11304 /* tlbwe */, PPC::TLBWE, Convert_NoOperands, AMFBS_None, { }, }, |
| 9338 | { 11304 /* tlbwe */, PPC::TLBWE2, Convert__RegGPRC1_0__RegGPRC1_1__Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_Imm }, }, |
| 9339 | { 11310 /* tlbwehi */, PPC::TLBWE2, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_0, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9340 | { 11318 /* tlbwelo */, PPC::TLBWE2, Convert__RegGPRC1_0__RegGPRC1_1__imm_95_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9341 | { 11326 /* trap */, PPC::TRAP, Convert_NoOperands, AMFBS_None, { }, }, |
| 9342 | { 11326 /* trap */, PPC::TW, Convert__imm_95_31__regR0__regR0, AMFBS_None, { }, }, |
| 9343 | { 11331 /* trechkpt */, PPC::TRECHKPT, Convert_NoOperands, AMFBS_None, { MCK__DOT_ }, }, |
| 9344 | { 11340 /* treclaim */, PPC::TRECLAIM, Convert__RegGPRC1_1, AMFBS_None, { MCK__DOT_, MCK_RegGPRC }, }, |
| 9345 | { 11349 /* tresume */, PPC::TSR, Convert__imm_95_1, AMFBS_None, { MCK__DOT_ }, }, |
| 9346 | { 11357 /* tsr */, PPC::TSR, Convert__U1Imm1_1, AMFBS_None, { MCK__DOT_, MCK_U1Imm }, }, |
| 9347 | { 11361 /* tsuspend */, PPC::TSR, Convert__imm_95_0, AMFBS_None, { MCK__DOT_ }, }, |
| 9348 | { 11370 /* tw */, PPC::TW, Convert__U5Imm1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_U5Imm, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9349 | { 11373 /* tweq */, PPC::TW, Convert__imm_95_4__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9350 | { 11378 /* tweqi */, PPC::TWI, Convert__imm_95_4__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9351 | { 11384 /* twge */, PPC::TW, Convert__imm_95_12__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9352 | { 11389 /* twgei */, PPC::TWI, Convert__imm_95_12__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9353 | { 11395 /* twgt */, PPC::TW, Convert__imm_95_8__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9354 | { 11400 /* twgti */, PPC::TWI, Convert__imm_95_8__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9355 | { 11406 /* twi */, PPC::TWI, Convert__U5Imm1_0__RegGPRC1_1__S16Imm1_2, AMFBS_None, { MCK_U5Imm, MCK_RegGPRC, MCK_S16Imm }, }, |
| 9356 | { 11410 /* twle */, PPC::TW, Convert__imm_95_20__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9357 | { 11415 /* twlei */, PPC::TWI, Convert__imm_95_20__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9358 | { 11421 /* twlge */, PPC::TW, Convert__imm_95_5__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9359 | { 11427 /* twlgei */, PPC::TWI, Convert__imm_95_5__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9360 | { 11434 /* twlgt */, PPC::TW, Convert__imm_95_1__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9361 | { 11440 /* twlgti */, PPC::TWI, Convert__imm_95_1__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9362 | { 11447 /* twlle */, PPC::TW, Convert__imm_95_6__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9363 | { 11453 /* twllei */, PPC::TWI, Convert__imm_95_6__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9364 | { 11460 /* twllt */, PPC::TW, Convert__imm_95_2__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9365 | { 11466 /* twllti */, PPC::TWI, Convert__imm_95_2__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9366 | { 11473 /* twlng */, PPC::TW, Convert__imm_95_6__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9367 | { 11479 /* twlngi */, PPC::TWI, Convert__imm_95_6__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9368 | { 11486 /* twlnl */, PPC::TW, Convert__imm_95_5__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9369 | { 11492 /* twlnli */, PPC::TWI, Convert__imm_95_5__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9370 | { 11499 /* twlt */, PPC::TW, Convert__imm_95_16__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9371 | { 11504 /* twlti */, PPC::TWI, Convert__imm_95_16__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9372 | { 11510 /* twne */, PPC::TW, Convert__imm_95_24__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9373 | { 11515 /* twnei */, PPC::TWI, Convert__imm_95_24__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9374 | { 11521 /* twng */, PPC::TW, Convert__imm_95_20__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9375 | { 11526 /* twngi */, PPC::TWI, Convert__imm_95_20__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9376 | { 11532 /* twnl */, PPC::TW, Convert__imm_95_12__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9377 | { 11537 /* twnli */, PPC::TWI, Convert__imm_95_12__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9378 | { 11543 /* twu */, PPC::TW, Convert__imm_95_31__RegGPRC1_0__RegGPRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9379 | { 11547 /* twui */, PPC::TWI, Convert__imm_95_31__RegGPRC1_0__S16Imm1_1, AMFBS_None, { MCK_RegGPRC, MCK_S16Imm }, }, |
| 9380 | { 11552 /* vabsdub */, PPC::VABSDUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9381 | { 11560 /* vabsduh */, PPC::VABSDUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9382 | { 11568 /* vabsduw */, PPC::VABSDUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9383 | { 11576 /* vaddcuq */, PPC::VADDCUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9384 | { 11584 /* vaddcuw */, PPC::VADDCUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9385 | { 11592 /* vaddecuq */, PPC::VADDECUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9386 | { 11601 /* vaddeuqm */, PPC::VADDEUQM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9387 | { 11610 /* vaddfp */, PPC::VADDFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9388 | { 11617 /* vaddsbs */, PPC::VADDSBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9389 | { 11625 /* vaddshs */, PPC::VADDSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9390 | { 11633 /* vaddsws */, PPC::VADDSWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9391 | { 11641 /* vaddubm */, PPC::VADDUBM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9392 | { 11649 /* vaddubs */, PPC::VADDUBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9393 | { 11657 /* vaddudm */, PPC::VADDUDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9394 | { 11665 /* vadduhm */, PPC::VADDUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9395 | { 11673 /* vadduhs */, PPC::VADDUHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9396 | { 11681 /* vadduqm */, PPC::VADDUQM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9397 | { 11689 /* vadduwm */, PPC::VADDUWM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9398 | { 11697 /* vadduws */, PPC::VADDUWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9399 | { 11705 /* vand */, PPC::VAND, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9400 | { 11710 /* vandc */, PPC::VANDC, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9401 | { 11716 /* vavgsb */, PPC::VAVGSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9402 | { 11723 /* vavgsh */, PPC::VAVGSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9403 | { 11730 /* vavgsw */, PPC::VAVGSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9404 | { 11737 /* vavgub */, PPC::VAVGUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9405 | { 11744 /* vavguh */, PPC::VAVGUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9406 | { 11751 /* vavguw */, PPC::VAVGUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9407 | { 11758 /* vbpermd */, PPC::VBPERMD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9408 | { 11766 /* vbpermq */, PPC::VBPERMQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9409 | { 11774 /* vcfsx */, PPC::VCFSX, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
| 9410 | { 11780 /* vcfuged */, PPC::VCFUGED, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9411 | { 11788 /* vcfux */, PPC::VCFUX, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
| 9412 | { 11794 /* vcipher */, PPC::VCIPHER, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9413 | { 11802 /* vcipherlast */, PPC::VCIPHERLAST, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9414 | { 11814 /* vclrlb */, PPC::VCLRLB, Convert__RegVRRC1_0__RegVRRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9415 | { 11821 /* vclrrb */, PPC::VCLRRB, Convert__RegVRRC1_0__RegVRRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9416 | { 11828 /* vclzb */, PPC::VCLZB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9417 | { 11834 /* vclzd */, PPC::VCLZD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9418 | { 11840 /* vclzdm */, PPC::VCLZDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9419 | { 11847 /* vclzh */, PPC::VCLZH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9420 | { 11853 /* vclzlsbb */, PPC::VCLZLSBB, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9421 | { 11862 /* vclzw */, PPC::VCLZW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9422 | { 11868 /* vcmpbfp */, PPC::VCMPBFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9423 | { 11868 /* vcmpbfp */, PPC::VCMPBFP_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9424 | { 11876 /* vcmpeqfp */, PPC::VCMPEQFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9425 | { 11876 /* vcmpeqfp */, PPC::VCMPEQFP_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9426 | { 11885 /* vcmpequb */, PPC::VCMPEQUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9427 | { 11885 /* vcmpequb */, PPC::VCMPEQUB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9428 | { 11894 /* vcmpequd */, PPC::VCMPEQUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9429 | { 11894 /* vcmpequd */, PPC::VCMPEQUD_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9430 | { 11903 /* vcmpequh */, PPC::VCMPEQUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9431 | { 11903 /* vcmpequh */, PPC::VCMPEQUH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9432 | { 11912 /* vcmpequq */, PPC::VCMPEQUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9433 | { 11912 /* vcmpequq */, PPC::VCMPEQUQ_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9434 | { 11921 /* vcmpequw */, PPC::VCMPEQUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9435 | { 11921 /* vcmpequw */, PPC::VCMPEQUW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9436 | { 11930 /* vcmpgefp */, PPC::VCMPGEFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9437 | { 11930 /* vcmpgefp */, PPC::VCMPGEFP_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9438 | { 11939 /* vcmpgtfp */, PPC::VCMPGTFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9439 | { 11939 /* vcmpgtfp */, PPC::VCMPGTFP_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9440 | { 11948 /* vcmpgtsb */, PPC::VCMPGTSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9441 | { 11948 /* vcmpgtsb */, PPC::VCMPGTSB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9442 | { 11957 /* vcmpgtsd */, PPC::VCMPGTSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9443 | { 11957 /* vcmpgtsd */, PPC::VCMPGTSD_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9444 | { 11966 /* vcmpgtsh */, PPC::VCMPGTSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9445 | { 11966 /* vcmpgtsh */, PPC::VCMPGTSH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9446 | { 11975 /* vcmpgtsq */, PPC::VCMPGTSQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9447 | { 11975 /* vcmpgtsq */, PPC::VCMPGTSQ_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9448 | { 11984 /* vcmpgtsw */, PPC::VCMPGTSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9449 | { 11984 /* vcmpgtsw */, PPC::VCMPGTSW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9450 | { 11993 /* vcmpgtub */, PPC::VCMPGTUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9451 | { 11993 /* vcmpgtub */, PPC::VCMPGTUB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9452 | { 12002 /* vcmpgtud */, PPC::VCMPGTUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9453 | { 12002 /* vcmpgtud */, PPC::VCMPGTUD_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9454 | { 12011 /* vcmpgtuh */, PPC::VCMPGTUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9455 | { 12011 /* vcmpgtuh */, PPC::VCMPGTUH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9456 | { 12020 /* vcmpgtuq */, PPC::VCMPGTUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9457 | { 12020 /* vcmpgtuq */, PPC::VCMPGTUQ_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9458 | { 12029 /* vcmpgtuw */, PPC::VCMPGTUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9459 | { 12029 /* vcmpgtuw */, PPC::VCMPGTUW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9460 | { 12038 /* vcmpneb */, PPC::VCMPNEB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9461 | { 12038 /* vcmpneb */, PPC::VCMPNEB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9462 | { 12046 /* vcmpneh */, PPC::VCMPNEH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9463 | { 12046 /* vcmpneh */, PPC::VCMPNEH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9464 | { 12054 /* vcmpnew */, PPC::VCMPNEW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9465 | { 12054 /* vcmpnew */, PPC::VCMPNEW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9466 | { 12062 /* vcmpnezb */, PPC::VCMPNEZB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9467 | { 12062 /* vcmpnezb */, PPC::VCMPNEZB_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9468 | { 12071 /* vcmpnezh */, PPC::VCMPNEZH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9469 | { 12071 /* vcmpnezh */, PPC::VCMPNEZH_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9470 | { 12080 /* vcmpnezw */, PPC::VCMPNEZW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9471 | { 12080 /* vcmpnezw */, PPC::VCMPNEZW_rec, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9472 | { 12089 /* vcmpsq */, PPC::VCMPSQ, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9473 | { 12096 /* vcmpuq */, PPC::VCMPUQ, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9474 | { 12103 /* vcntmbb */, PPC::VCNTMBB, Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 9475 | { 12111 /* vcntmbd */, PPC::VCNTMBD, Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 9476 | { 12119 /* vcntmbh */, PPC::VCNTMBH, Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 9477 | { 12127 /* vcntmbw */, PPC::VCNTMBW, Convert__RegG8RC1_0__RegVRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 9478 | { 12135 /* vctsxs */, PPC::VCTSXS, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
| 9479 | { 12142 /* vctuxs */, PPC::VCTUXS, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
| 9480 | { 12149 /* vctzb */, PPC::VCTZB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9481 | { 12155 /* vctzd */, PPC::VCTZD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9482 | { 12161 /* vctzdm */, PPC::VCTZDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9483 | { 12168 /* vctzh */, PPC::VCTZH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9484 | { 12174 /* vctzlsbb */, PPC::VCTZLSBB, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9485 | { 12183 /* vctzw */, PPC::VCTZW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9486 | { 12189 /* vdivesd */, PPC::VDIVESD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9487 | { 12197 /* vdivesq */, PPC::VDIVESQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9488 | { 12205 /* vdivesw */, PPC::VDIVESW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9489 | { 12213 /* vdiveud */, PPC::VDIVEUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9490 | { 12221 /* vdiveuq */, PPC::VDIVEUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9491 | { 12229 /* vdiveuw */, PPC::VDIVEUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9492 | { 12237 /* vdivsd */, PPC::VDIVSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9493 | { 12244 /* vdivsq */, PPC::VDIVSQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9494 | { 12251 /* vdivsw */, PPC::VDIVSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9495 | { 12258 /* vdivud */, PPC::VDIVUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9496 | { 12265 /* vdivuq */, PPC::VDIVUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9497 | { 12272 /* vdivuw */, PPC::VDIVUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9498 | { 12279 /* veqv */, PPC::VEQV, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9499 | { 12284 /* vexpandbm */, PPC::VEXPANDBM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9500 | { 12294 /* vexpanddm */, PPC::VEXPANDDM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9501 | { 12304 /* vexpandhm */, PPC::VEXPANDHM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9502 | { 12314 /* vexpandqm */, PPC::VEXPANDQM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9503 | { 12324 /* vexpandwm */, PPC::VEXPANDWM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9504 | { 12334 /* vexptefp */, PPC::VEXPTEFP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9505 | { 12343 /* vextddvlx */, PPC::VEXTDDVLX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9506 | { 12353 /* vextddvrx */, PPC::VEXTDDVRX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9507 | { 12363 /* vextdubvlx */, PPC::VEXTDUBVLX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9508 | { 12374 /* vextdubvrx */, PPC::VEXTDUBVRX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9509 | { 12385 /* vextduhvlx */, PPC::VEXTDUHVLX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9510 | { 12396 /* vextduhvrx */, PPC::VEXTDUHVRX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9511 | { 12407 /* vextduwvlx */, PPC::VEXTDUWVLX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9512 | { 12418 /* vextduwvrx */, PPC::VEXTDUWVRX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegGPRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegGPRC }, }, |
| 9513 | { 12429 /* vextractbm */, PPC::VEXTRACTBM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9514 | { 12440 /* vextractd */, PPC::VEXTRACTD, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
| 9515 | { 12450 /* vextractdm */, PPC::VEXTRACTDM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9516 | { 12461 /* vextracthm */, PPC::VEXTRACTHM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9517 | { 12472 /* vextractqm */, PPC::VEXTRACTQM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9518 | { 12483 /* vextractub */, PPC::VEXTRACTUB, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
| 9519 | { 12494 /* vextractuh */, PPC::VEXTRACTUH, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
| 9520 | { 12505 /* vextractuw */, PPC::VEXTRACTUW, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
| 9521 | { 12516 /* vextractwm */, PPC::VEXTRACTWM, Convert__RegGPRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9522 | { 12527 /* vextsb2d */, PPC::VEXTSB2D, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9523 | { 12536 /* vextsb2w */, PPC::VEXTSB2W, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9524 | { 12545 /* vextsd2q */, PPC::VEXTSD2Q, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9525 | { 12554 /* vextsh2d */, PPC::VEXTSH2D, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9526 | { 12563 /* vextsh2w */, PPC::VEXTSH2W, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9527 | { 12572 /* vextsw2d */, PPC::VEXTSW2D, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9528 | { 12581 /* vextublx */, PPC::VEXTUBLX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
| 9529 | { 12590 /* vextubrx */, PPC::VEXTUBRX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
| 9530 | { 12599 /* vextuhlx */, PPC::VEXTUHLX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
| 9531 | { 12608 /* vextuhrx */, PPC::VEXTUHRX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
| 9532 | { 12617 /* vextuwlx */, PPC::VEXTUWLX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
| 9533 | { 12626 /* vextuwrx */, PPC::VEXTUWRX, Convert__RegG8RC1_0__RegG8RC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegG8RC, MCK_RegVRRC }, }, |
| 9534 | { 12635 /* vgbbd */, PPC::VGBBD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9535 | { 12641 /* vgnb */, PPC::VGNB, Convert__RegG8RC1_0__RegVRRC1_1__U3Imm1_2, AMFBS_None, { MCK_RegG8RC, MCK_RegVRRC, MCK_U3Imm }, }, |
| 9536 | { 12646 /* vinsblx */, PPC::VINSBLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9537 | { 12654 /* vinsbrx */, PPC::VINSBRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9538 | { 12662 /* vinsbvlx */, PPC::VINSBVLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9539 | { 12671 /* vinsbvrx */, PPC::VINSBVRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9540 | { 12680 /* vinsd */, PPC::VINSD, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegG8RC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC, MCK_U4Imm }, }, |
| 9541 | { 12686 /* vinsdlx */, PPC::VINSDLX, Convert__RegVRRC1_0__Tie0_1_1__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9542 | { 12694 /* vinsdrx */, PPC::VINSDRX, Convert__RegVRRC1_0__Tie0_1_1__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9543 | { 12702 /* vinsertb */, PPC::VINSERTB, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
| 9544 | { 12711 /* vinsertd */, PPC::VINSERTD, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
| 9545 | { 12720 /* vinserth */, PPC::VINSERTH, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
| 9546 | { 12729 /* vinsertw */, PPC::VINSERTW, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
| 9547 | { 12738 /* vinshlx */, PPC::VINSHLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9548 | { 12746 /* vinshrx */, PPC::VINSHRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9549 | { 12754 /* vinshvlx */, PPC::VINSHVLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9550 | { 12763 /* vinshvrx */, PPC::VINSHVRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9551 | { 12772 /* vinsw */, PPC::VINSW, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegGPRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_U4Imm }, }, |
| 9552 | { 12778 /* vinswlx */, PPC::VINSWLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9553 | { 12786 /* vinswrx */, PPC::VINSWRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9554 | { 12794 /* vinswvlx */, PPC::VINSWVLX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9555 | { 12803 /* vinswvrx */, PPC::VINSWVRX, Convert__RegVRRC1_0__Tie0_1_1__RegGPRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegGPRC, MCK_RegVRRC }, }, |
| 9556 | { 12812 /* vlogefp */, PPC::VLOGEFP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9557 | { 12820 /* vmaddfp */, PPC::VMADDFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9558 | { 12828 /* vmaxfp */, PPC::VMAXFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9559 | { 12835 /* vmaxsb */, PPC::VMAXSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9560 | { 12842 /* vmaxsd */, PPC::VMAXSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9561 | { 12849 /* vmaxsh */, PPC::VMAXSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9562 | { 12856 /* vmaxsw */, PPC::VMAXSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9563 | { 12863 /* vmaxub */, PPC::VMAXUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9564 | { 12870 /* vmaxud */, PPC::VMAXUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9565 | { 12877 /* vmaxuh */, PPC::VMAXUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9566 | { 12884 /* vmaxuw */, PPC::VMAXUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9567 | { 12891 /* vmhaddshs */, PPC::VMHADDSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9568 | { 12901 /* vmhraddshs */, PPC::VMHRADDSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9569 | { 12912 /* vminfp */, PPC::VMINFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9570 | { 12919 /* vminsb */, PPC::VMINSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9571 | { 12926 /* vminsd */, PPC::VMINSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9572 | { 12933 /* vminsh */, PPC::VMINSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9573 | { 12940 /* vminsw */, PPC::VMINSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9574 | { 12947 /* vminub */, PPC::VMINUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9575 | { 12954 /* vminud */, PPC::VMINUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9576 | { 12961 /* vminuh */, PPC::VMINUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9577 | { 12968 /* vminuw */, PPC::VMINUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9578 | { 12975 /* vmladduhm */, PPC::VMLADDUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9579 | { 12985 /* vmodsd */, PPC::VMODSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9580 | { 12992 /* vmodsq */, PPC::VMODSQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9581 | { 12999 /* vmodsw */, PPC::VMODSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9582 | { 13006 /* vmodud */, PPC::VMODUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9583 | { 13013 /* vmoduq */, PPC::VMODUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9584 | { 13020 /* vmoduw */, PPC::VMODUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9585 | { 13027 /* vmr */, PPC::VOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9586 | { 13031 /* vmrgew */, PPC::VMRGEW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9587 | { 13038 /* vmrghb */, PPC::VMRGHB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9588 | { 13045 /* vmrghh */, PPC::VMRGHH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9589 | { 13052 /* vmrghw */, PPC::VMRGHW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9590 | { 13059 /* vmrglb */, PPC::VMRGLB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9591 | { 13066 /* vmrglh */, PPC::VMRGLH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9592 | { 13073 /* vmrglw */, PPC::VMRGLW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9593 | { 13080 /* vmrgow */, PPC::VMRGOW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9594 | { 13087 /* vmsumcud */, PPC::VMSUMCUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9595 | { 13096 /* vmsummbm */, PPC::VMSUMMBM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9596 | { 13105 /* vmsumshm */, PPC::VMSUMSHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9597 | { 13114 /* vmsumshs */, PPC::VMSUMSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9598 | { 13123 /* vmsumubm */, PPC::VMSUMUBM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9599 | { 13132 /* vmsumudm */, PPC::VMSUMUDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9600 | { 13141 /* vmsumuhm */, PPC::VMSUMUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9601 | { 13150 /* vmsumuhs */, PPC::VMSUMUHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9602 | { 13159 /* vmul10cuq */, PPC::VMUL10CUQ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9603 | { 13169 /* vmul10ecuq */, PPC::VMUL10ECUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9604 | { 13180 /* vmul10euq */, PPC::VMUL10EUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9605 | { 13190 /* vmul10uq */, PPC::VMUL10UQ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9606 | { 13199 /* vmulesb */, PPC::VMULESB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9607 | { 13207 /* vmulesd */, PPC::VMULESD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9608 | { 13215 /* vmulesh */, PPC::VMULESH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9609 | { 13223 /* vmulesw */, PPC::VMULESW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9610 | { 13231 /* vmuleub */, PPC::VMULEUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9611 | { 13239 /* vmuleud */, PPC::VMULEUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9612 | { 13247 /* vmuleuh */, PPC::VMULEUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9613 | { 13255 /* vmuleuw */, PPC::VMULEUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9614 | { 13263 /* vmulhsd */, PPC::VMULHSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9615 | { 13271 /* vmulhsw */, PPC::VMULHSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9616 | { 13279 /* vmulhud */, PPC::VMULHUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9617 | { 13287 /* vmulhuw */, PPC::VMULHUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9618 | { 13295 /* vmulld */, PPC::VMULLD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9619 | { 13302 /* vmulosb */, PPC::VMULOSB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9620 | { 13310 /* vmulosd */, PPC::VMULOSD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9621 | { 13318 /* vmulosh */, PPC::VMULOSH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9622 | { 13326 /* vmulosw */, PPC::VMULOSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9623 | { 13334 /* vmuloub */, PPC::VMULOUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9624 | { 13342 /* vmuloud */, PPC::VMULOUD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9625 | { 13350 /* vmulouh */, PPC::VMULOUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9626 | { 13358 /* vmulouw */, PPC::VMULOUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9627 | { 13366 /* vmuluwm */, PPC::VMULUWM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9628 | { 13374 /* vnand */, PPC::VNAND, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9629 | { 13380 /* vncipher */, PPC::VNCIPHER, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9630 | { 13389 /* vncipherlast */, PPC::VNCIPHERLAST, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9631 | { 13402 /* vnegd */, PPC::VNEGD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9632 | { 13408 /* vnegw */, PPC::VNEGW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9633 | { 13414 /* vnmsubfp */, PPC::VNMSUBFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9634 | { 13423 /* vnor */, PPC::VNOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9635 | { 13428 /* vnot */, PPC::VNOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9636 | { 13433 /* vor */, PPC::VOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9637 | { 13437 /* vorc */, PPC::VORC, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9638 | { 13442 /* vpdepd */, PPC::VPDEPD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9639 | { 13449 /* vperm */, PPC::VPERM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9640 | { 13455 /* vpermr */, PPC::VPERMR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9641 | { 13462 /* vpermxor */, PPC::VPERMXOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9642 | { 13471 /* vpextd */, PPC::VPEXTD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9643 | { 13478 /* vpkpx */, PPC::VPKPX, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9644 | { 13484 /* vpksdss */, PPC::VPKSDSS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9645 | { 13492 /* vpksdus */, PPC::VPKSDUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9646 | { 13500 /* vpkshss */, PPC::VPKSHSS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9647 | { 13508 /* vpkshus */, PPC::VPKSHUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9648 | { 13516 /* vpkswss */, PPC::VPKSWSS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9649 | { 13524 /* vpkswus */, PPC::VPKSWUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9650 | { 13532 /* vpkudum */, PPC::VPKUDUM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9651 | { 13540 /* vpkudus */, PPC::VPKUDUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9652 | { 13548 /* vpkuhum */, PPC::VPKUHUM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9653 | { 13556 /* vpkuhus */, PPC::VPKUHUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9654 | { 13564 /* vpkuwum */, PPC::VPKUWUM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9655 | { 13572 /* vpkuwus */, PPC::VPKUWUS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9656 | { 13580 /* vpmsumb */, PPC::VPMSUMB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9657 | { 13588 /* vpmsumd */, PPC::VPMSUMD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9658 | { 13596 /* vpmsumh */, PPC::VPMSUMH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9659 | { 13604 /* vpmsumw */, PPC::VPMSUMW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9660 | { 13612 /* vpopcntb */, PPC::VPOPCNTB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9661 | { 13621 /* vpopcntd */, PPC::VPOPCNTD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9662 | { 13630 /* vpopcnth */, PPC::VPOPCNTH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9663 | { 13639 /* vpopcntw */, PPC::VPOPCNTW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9664 | { 13648 /* vprtybd */, PPC::VPRTYBD, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9665 | { 13656 /* vprtybq */, PPC::VPRTYBQ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9666 | { 13664 /* vprtybw */, PPC::VPRTYBW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9667 | { 13672 /* vrefp */, PPC::VREFP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9668 | { 13678 /* vrfim */, PPC::VRFIM, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9669 | { 13684 /* vrfin */, PPC::VRFIN, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9670 | { 13690 /* vrfip */, PPC::VRFIP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9671 | { 13696 /* vrfiz */, PPC::VRFIZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9672 | { 13702 /* vrlb */, PPC::VRLB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9673 | { 13707 /* vrld */, PPC::VRLD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9674 | { 13712 /* vrldmi */, PPC::VRLDMI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9675 | { 13719 /* vrldnm */, PPC::VRLDNM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9676 | { 13726 /* vrlh */, PPC::VRLH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9677 | { 13731 /* vrlq */, PPC::VRLQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9678 | { 13736 /* vrlqmi */, PPC::VRLQMI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9679 | { 13743 /* vrlqnm */, PPC::VRLQNM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9680 | { 13750 /* vrlw */, PPC::VRLW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9681 | { 13755 /* vrlwmi */, PPC::VRLWMI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__Tie0_1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9682 | { 13762 /* vrlwnm */, PPC::VRLWNM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9683 | { 13769 /* vrsqrtefp */, PPC::VRSQRTEFP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9684 | { 13779 /* vsbox */, PPC::VSBOX, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9685 | { 13785 /* vsel */, PPC::VSEL, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9686 | { 13790 /* vshasigmad */, PPC::VSHASIGMAD, Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2__U4Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm, MCK_U4Imm }, }, |
| 9687 | { 13801 /* vshasigmaw */, PPC::VSHASIGMAW, Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2__U4Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm, MCK_U4Imm }, }, |
| 9688 | { 13812 /* vsl */, PPC::VSL, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9689 | { 13816 /* vslb */, PPC::VSLB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9690 | { 13821 /* vsld */, PPC::VSLD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9691 | { 13826 /* vsldbi */, PPC::VSLDBI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U3Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U3Imm }, }, |
| 9692 | { 13833 /* vsldoi */, PPC::VSLDOI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U4Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U4Imm }, }, |
| 9693 | { 13840 /* vslh */, PPC::VSLH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9694 | { 13845 /* vslo */, PPC::VSLO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9695 | { 13850 /* vslq */, PPC::VSLQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9696 | { 13855 /* vslv */, PPC::VSLV, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9697 | { 13860 /* vslw */, PPC::VSLW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9698 | { 13865 /* vspltb */, PPC::VSPLTB, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
| 9699 | { 13872 /* vsplth */, PPC::VSPLTH, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
| 9700 | { 13879 /* vspltisb */, PPC::VSPLTISB, Convert__RegVRRC1_0__S5Imm1_1, AMFBS_None, { MCK_RegVRRC, MCK_S5Imm }, }, |
| 9701 | { 13888 /* vspltish */, PPC::VSPLTISH, Convert__RegVRRC1_0__S5Imm1_1, AMFBS_None, { MCK_RegVRRC, MCK_S5Imm }, }, |
| 9702 | { 13897 /* vspltisw */, PPC::VSPLTISW, Convert__RegVRRC1_0__S5Imm1_1, AMFBS_None, { MCK_RegVRRC, MCK_S5Imm }, }, |
| 9703 | { 13906 /* vspltw */, PPC::VSPLTW, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U5Imm }, }, |
| 9704 | { 13913 /* vsr */, PPC::VSR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9705 | { 13917 /* vsrab */, PPC::VSRAB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9706 | { 13923 /* vsrad */, PPC::VSRAD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9707 | { 13929 /* vsrah */, PPC::VSRAH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9708 | { 13935 /* vsraq */, PPC::VSRAQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9709 | { 13941 /* vsraw */, PPC::VSRAW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9710 | { 13947 /* vsrb */, PPC::VSRB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9711 | { 13952 /* vsrd */, PPC::VSRD, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9712 | { 13957 /* vsrdbi */, PPC::VSRDBI, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__U3Imm1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_U3Imm }, }, |
| 9713 | { 13964 /* vsrh */, PPC::VSRH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9714 | { 13969 /* vsro */, PPC::VSRO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9715 | { 13974 /* vsrq */, PPC::VSRQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9716 | { 13979 /* vsrv */, PPC::VSRV, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9717 | { 13984 /* vsrw */, PPC::VSRW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9718 | { 13989 /* vstribl */, PPC::VSTRIBL, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9719 | { 13989 /* vstribl */, PPC::VSTRIBL_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9720 | { 13997 /* vstribr */, PPC::VSTRIBR, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9721 | { 13997 /* vstribr */, PPC::VSTRIBR_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9722 | { 14005 /* vstrihl */, PPC::VSTRIHL, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9723 | { 14005 /* vstrihl */, PPC::VSTRIHL_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9724 | { 14013 /* vstrihr */, PPC::VSTRIHR, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9725 | { 14013 /* vstrihr */, PPC::VSTRIHR_rec, Convert__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK__DOT_, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9726 | { 14021 /* vsubcuq */, PPC::VSUBCUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9727 | { 14029 /* vsubcuw */, PPC::VSUBCUW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9728 | { 14037 /* vsubecuq */, PPC::VSUBECUQ, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9729 | { 14046 /* vsubeuqm */, PPC::VSUBEUQM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9730 | { 14055 /* vsubfp */, PPC::VSUBFP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9731 | { 14062 /* vsubsbs */, PPC::VSUBSBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9732 | { 14070 /* vsubshs */, PPC::VSUBSHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9733 | { 14078 /* vsubsws */, PPC::VSUBSWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9734 | { 14086 /* vsububm */, PPC::VSUBUBM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9735 | { 14094 /* vsububs */, PPC::VSUBUBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9736 | { 14102 /* vsubudm */, PPC::VSUBUDM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9737 | { 14110 /* vsubuhm */, PPC::VSUBUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9738 | { 14118 /* vsubuhs */, PPC::VSUBUHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9739 | { 14126 /* vsubuqm */, PPC::VSUBUQM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9740 | { 14134 /* vsubuwm */, PPC::VSUBUWM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9741 | { 14142 /* vsubuws */, PPC::VSUBUWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9742 | { 14150 /* vsum2sws */, PPC::VSUM2SWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9743 | { 14159 /* vsum4sbs */, PPC::VSUM4SBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9744 | { 14168 /* vsum4shs */, PPC::VSUM4SHS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9745 | { 14177 /* vsum4ubs */, PPC::VSUM4UBS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9746 | { 14186 /* vsumsws */, PPC::VSUMSWS, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9747 | { 14194 /* vucmprhb */, PPC::VUCMPRHB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9748 | { 14203 /* vucmprhh */, PPC::VUCMPRHH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9749 | { 14212 /* vucmprhn */, PPC::VUCMPRHN, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9750 | { 14221 /* vucmprlb */, PPC::VUCMPRLB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9751 | { 14230 /* vucmprlh */, PPC::VUCMPRLH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9752 | { 14239 /* vucmprln */, PPC::VUCMPRLN, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9753 | { 14248 /* vupkhpx */, PPC::VUPKHPX, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9754 | { 14256 /* vupkhsb */, PPC::VUPKHSB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9755 | { 14264 /* vupkhsh */, PPC::VUPKHSH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9756 | { 14272 /* vupkhsntob */, PPC::VUPKHSNTOB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9757 | { 14283 /* vupkhsw */, PPC::VUPKHSW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9758 | { 14291 /* vupkint4tobf16 */, PPC::VUPKINT4TOBF16, Convert__RegVRRC1_0__RegVRRC1_1__U2Imm1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U2Imm }, }, |
| 9759 | { 14306 /* vupkint4tofp32 */, PPC::VUPKINT4TOFP32, Convert__RegVRRC1_0__RegVRRC1_1__U3Imm1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U3Imm }, }, |
| 9760 | { 14321 /* vupkint8tobf16 */, PPC::VUPKINT8TOBF16, Convert__RegVRRC1_0__RegVRRC1_1__U1Imm1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U1Imm }, }, |
| 9761 | { 14336 /* vupkint8tofp32 */, PPC::VUPKINT8TOFP32, Convert__RegVRRC1_0__RegVRRC1_1__U2Imm1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_U2Imm }, }, |
| 9762 | { 14351 /* vupklpx */, PPC::VUPKLPX, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9763 | { 14359 /* vupklsb */, PPC::VUPKLSB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9764 | { 14367 /* vupklsh */, PPC::VUPKLSH, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9765 | { 14375 /* vupklsntob */, PPC::VUPKLSNTOB, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9766 | { 14386 /* vupklsw */, PPC::VUPKLSW, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9767 | { 14394 /* vxor */, PPC::VXOR, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9768 | { 14399 /* wait */, PPC::WAITP10, Convert__imm_95_0__imm_95_0, AMFBS_None, { }, }, |
| 9769 | { 14399 /* wait */, PPC::WAIT, Convert__imm_95_0, AMFBS_None, { }, }, |
| 9770 | { 14399 /* wait */, PPC::WAITP10, Convert__imm_95_0__imm_95_0, AMFBS_None, { MCK_0 }, }, |
| 9771 | { 14399 /* wait */, PPC::WAITP10, Convert__imm_95_1__imm_95_0, AMFBS_None, { MCK_1 }, }, |
| 9772 | { 14399 /* wait */, PPC::WAIT, Convert__U2Imm1_0, AMFBS_None, { MCK_U2Imm }, }, |
| 9773 | { 14399 /* wait */, PPC::WAITP10, Convert__U2Imm1_0__U2Imm1_1, AMFBS_None, { MCK_U2Imm, MCK_U2Imm }, }, |
| 9774 | { 14404 /* waitimpl */, PPC::WAIT, Convert__imm_95_2, AMFBS_None, { }, }, |
| 9775 | { 14413 /* waitrsv */, PPC::WAITP10, Convert__imm_95_1__imm_95_0, AMFBS_None, { }, }, |
| 9776 | { 14413 /* waitrsv */, PPC::WAIT, Convert__imm_95_1, AMFBS_None, { }, }, |
| 9777 | { 14421 /* wrtee */, PPC::WRTEE, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, }, |
| 9778 | { 14427 /* wrteei */, PPC::WRTEEI, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 9779 | { 14434 /* wsync */, PPC::SYNCP10, Convert__imm_95_1__imm_95_0, AMFBS_None, { }, }, |
| 9780 | { 14440 /* xnop */, PPC::XORI8, Convert__regX0__regX0__imm_95_0, AMFBS_None, { }, }, |
| 9781 | { 14440 /* xnop */, PPC::XORI, Convert__regR0__regR0__imm_95_0, AMFBS_None, { }, }, |
| 9782 | { 14445 /* xor */, PPC::XOR, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9783 | { 14445 /* xor */, PPC::XOR_rec, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, }, |
| 9784 | { 14449 /* xori */, PPC::XORI, Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
| 9785 | { 14454 /* xoris */, PPC::XORIS, Convert__RegGPRC1_0__RegGPRC1_1__U16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_U16Imm }, }, |
| 9786 | { 14460 /* xsabsdp */, PPC::XSABSDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9787 | { 14468 /* xsabsqp */, PPC::XSABSQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9788 | { 14476 /* xsaddaddsuqm */, PPC::XSADDADDSUQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9789 | { 14489 /* xsaddadduqm */, PPC::XSADDADDUQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9790 | { 14501 /* xsadddp */, PPC::XSADDDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9791 | { 14509 /* xsaddqp */, PPC::XSADDQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9792 | { 14517 /* xsaddqpo */, PPC::XSADDQPO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9793 | { 14526 /* xsaddsp */, PPC::XSADDSP, Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9794 | { 14534 /* xsaddsubsuqm */, PPC::XSADDSUBSUQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9795 | { 14547 /* xsaddsubuqm */, PPC::XSADDSUBUQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9796 | { 14559 /* xscmpeqdp */, PPC::XSCMPEQDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9797 | { 14569 /* xscmpeqqp */, PPC::XSCMPEQQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9798 | { 14579 /* xscmpexpdp */, PPC::XSCMPEXPDP, Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9799 | { 14590 /* xscmpexpqp */, PPC::XSCMPEXPQP, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9800 | { 14601 /* xscmpgedp */, PPC::XSCMPGEDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9801 | { 14611 /* xscmpgeqp */, PPC::XSCMPGEQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9802 | { 14621 /* xscmpgtdp */, PPC::XSCMPGTDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9803 | { 14631 /* xscmpgtqp */, PPC::XSCMPGTQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9804 | { 14641 /* xscmpodp */, PPC::XSCMPODP, Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9805 | { 14650 /* xscmpoqp */, PPC::XSCMPOQP, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9806 | { 14659 /* xscmpudp */, PPC::XSCMPUDP, Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9807 | { 14668 /* xscmpuqp */, PPC::XSCMPUQP, Convert__RegCRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9808 | { 14677 /* xscpsgndp */, PPC::XSCPSGNDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9809 | { 14687 /* xscpsgnqp */, PPC::XSCPSGNQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9810 | { 14697 /* xscvdphp */, PPC::XSCVDPHP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9811 | { 14706 /* xscvdpqp */, PPC::XSCVDPQP, Convert__RegVRRC1_0__RegVFRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVFRC }, }, |
| 9812 | { 14715 /* xscvdpsp */, PPC::XSCVDPSP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9813 | { 14724 /* xscvdpspn */, PPC::XSCVDPSPN, Convert__RegVSRC1_0__RegVSSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSSRC }, }, |
| 9814 | { 14734 /* xscvdpsxds */, PPC::XSCVDPSXDS, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9815 | { 14745 /* xscvdpsxws */, PPC::XSCVDPSXWS, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9816 | { 14756 /* xscvdpuxds */, PPC::XSCVDPUXDS, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9817 | { 14767 /* xscvdpuxws */, PPC::XSCVDPUXWS, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9818 | { 14778 /* xscvhpdp */, PPC::XSCVHPDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9819 | { 14787 /* xscvqpdp */, PPC::XSCVQPDP, Convert__RegVFRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVFRC, MCK_RegVRRC }, }, |
| 9820 | { 14796 /* xscvqpdpo */, PPC::XSCVQPDPO, Convert__RegVFRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVFRC, MCK_RegVRRC }, }, |
| 9821 | { 14806 /* xscvqpsdz */, PPC::XSCVQPSDZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9822 | { 14816 /* xscvqpsqz */, PPC::XSCVQPSQZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9823 | { 14826 /* xscvqpswz */, PPC::XSCVQPSWZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9824 | { 14836 /* xscvqpudz */, PPC::XSCVQPUDZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9825 | { 14846 /* xscvqpuqz */, PPC::XSCVQPUQZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9826 | { 14856 /* xscvqpuwz */, PPC::XSCVQPUWZ, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9827 | { 14866 /* xscvsdqp */, PPC::XSCVSDQP, Convert__RegVRRC1_0__RegVFRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVFRC }, }, |
| 9828 | { 14875 /* xscvspdp */, PPC::XSCVSPDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9829 | { 14884 /* xscvspdpn */, PPC::XSCVSPDPN, Convert__RegVSSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSRC }, }, |
| 9830 | { 14894 /* xscvsqqp */, PPC::XSCVSQQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9831 | { 14903 /* xscvsxddp */, PPC::XSCVSXDDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9832 | { 14913 /* xscvsxdsp */, PPC::XSCVSXDSP, Convert__RegVSSRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSFRC }, }, |
| 9833 | { 14923 /* xscvudqp */, PPC::XSCVUDQP, Convert__RegVRRC1_0__RegVFRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVFRC }, }, |
| 9834 | { 14932 /* xscvuqqp */, PPC::XSCVUQQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9835 | { 14941 /* xscvuxddp */, PPC::XSCVUXDDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9836 | { 14951 /* xscvuxdsp */, PPC::XSCVUXDSP, Convert__RegVSSRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSFRC }, }, |
| 9837 | { 14961 /* xsdivdp */, PPC::XSDIVDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9838 | { 14969 /* xsdivqp */, PPC::XSDIVQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9839 | { 14977 /* xsdivqpo */, PPC::XSDIVQPO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9840 | { 14986 /* xsdivsp */, PPC::XSDIVSP, Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9841 | { 14994 /* xsiexpdp */, PPC::XSIEXPDP, Convert__RegVSRC1_0__RegG8RC1_1__RegG8RC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegG8RC, MCK_RegG8RC }, }, |
| 9842 | { 15003 /* xsiexpqp */, PPC::XSIEXPQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVSFRC }, }, |
| 9843 | { 15012 /* xsmaddadp */, PPC::XSMADDADP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9844 | { 15022 /* xsmaddasp */, PPC::XSMADDASP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9845 | { 15032 /* xsmaddmdp */, PPC::XSMADDMDP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9846 | { 15042 /* xsmaddmsp */, PPC::XSMADDMSP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9847 | { 15052 /* xsmaddqp */, PPC::XSMADDQP, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9848 | { 15061 /* xsmaddqpo */, PPC::XSMADDQPO, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9849 | { 15071 /* xsmaxcdp */, PPC::XSMAXCDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9850 | { 15080 /* xsmaxcqp */, PPC::XSMAXCQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9851 | { 15089 /* xsmaxdp */, PPC::XSMAXDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9852 | { 15097 /* xsmaxjdp */, PPC::XSMAXJDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9853 | { 15106 /* xsmerge2t1uqm */, PPC::XSMERGE2T1UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9854 | { 15120 /* xsmerge2t2uqm */, PPC::XSMERGE2T2UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9855 | { 15134 /* xsmerge2t3uqm */, PPC::XSMERGE2T3UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9856 | { 15148 /* xsmerge3t1uqm */, PPC::XSMERGE3T1UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9857 | { 15162 /* xsmincdp */, PPC::XSMINCDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9858 | { 15171 /* xsmincqp */, PPC::XSMINCQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9859 | { 15180 /* xsmindp */, PPC::XSMINDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9860 | { 15188 /* xsminjdp */, PPC::XSMINJDP, Convert__RegVSRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9861 | { 15197 /* xsmsubadp */, PPC::XSMSUBADP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9862 | { 15207 /* xsmsubasp */, PPC::XSMSUBASP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9863 | { 15217 /* xsmsubmdp */, PPC::XSMSUBMDP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9864 | { 15227 /* xsmsubmsp */, PPC::XSMSUBMSP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9865 | { 15237 /* xsmsubqp */, PPC::XSMSUBQP, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9866 | { 15246 /* xsmsubqpo */, PPC::XSMSUBQPO, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9867 | { 15256 /* xsmuldp */, PPC::XSMULDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9868 | { 15264 /* xsmulqp */, PPC::XSMULQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9869 | { 15272 /* xsmulqpo */, PPC::XSMULQPO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9870 | { 15281 /* xsmulsp */, PPC::XSMULSP, Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9871 | { 15289 /* xsnabsdp */, PPC::XSNABSDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9872 | { 15298 /* xsnabsqp */, PPC::XSNABSQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9873 | { 15307 /* xsnegdp */, PPC::XSNEGDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9874 | { 15315 /* xsnegqp */, PPC::XSNEGQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9875 | { 15323 /* xsnmaddadp */, PPC::XSNMADDADP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9876 | { 15334 /* xsnmaddasp */, PPC::XSNMADDASP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9877 | { 15345 /* xsnmaddmdp */, PPC::XSNMADDMDP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9878 | { 15356 /* xsnmaddmsp */, PPC::XSNMADDMSP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9879 | { 15367 /* xsnmaddqp */, PPC::XSNMADDQP, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9880 | { 15377 /* xsnmaddqpo */, PPC::XSNMADDQPO, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9881 | { 15388 /* xsnmsubadp */, PPC::XSNMSUBADP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9882 | { 15399 /* xsnmsubasp */, PPC::XSNMSUBASP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9883 | { 15410 /* xsnmsubmdp */, PPC::XSNMSUBMDP, Convert__RegVSFRC1_0__Tie0_1_1__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9884 | { 15421 /* xsnmsubmsp */, PPC::XSNMSUBMSP, Convert__RegVSSRC1_0__Tie0_1_1__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9885 | { 15432 /* xsnmsubqp */, PPC::XSNMSUBQP, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9886 | { 15442 /* xsnmsubqpo */, PPC::XSNMSUBQPO, Convert__RegVRRC1_0__Tie0_1_1__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9887 | { 15453 /* xsrdpi */, PPC::XSRDPI, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9888 | { 15460 /* xsrdpic */, PPC::XSRDPIC, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9889 | { 15468 /* xsrdpim */, PPC::XSRDPIM, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9890 | { 15476 /* xsrdpip */, PPC::XSRDPIP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9891 | { 15484 /* xsrdpiz */, PPC::XSRDPIZ, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9892 | { 15492 /* xsrebase2t1uqm */, PPC::XSREBASE2T1UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9893 | { 15507 /* xsrebase2t2uqm */, PPC::XSREBASE2T2UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9894 | { 15522 /* xsrebase2t3uqm */, PPC::XSREBASE2T3UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9895 | { 15537 /* xsrebase2t4uqm */, PPC::XSREBASE2T4UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9896 | { 15552 /* xsrebase3t1uqm */, PPC::XSREBASE3T1UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9897 | { 15567 /* xsrebase3t2uqm */, PPC::XSREBASE3T2UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9898 | { 15582 /* xsrebase3t3uqm */, PPC::XSREBASE3T3UQM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9899 | { 15597 /* xsredp */, PPC::XSREDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9900 | { 15604 /* xsresp */, PPC::XSRESP, Convert__RegVSSRC1_0__RegVSSRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9901 | { 15611 /* xsrqpi */, PPC::XSRQPI, Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegVRRC, MCK_RegVRRC, MCK_U2Imm }, }, |
| 9902 | { 15618 /* xsrqpix */, PPC::XSRQPIX, Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegVRRC, MCK_RegVRRC, MCK_U2Imm }, }, |
| 9903 | { 15626 /* xsrqpxp */, PPC::XSRQPXP, Convert__RegVRRC1_1__U1Imm1_0__RegVRRC1_2__U2Imm1_3, AMFBS_None, { MCK_U1Imm, MCK_RegVRRC, MCK_RegVRRC, MCK_U2Imm }, }, |
| 9904 | { 15634 /* xsrsp */, PPC::XSRSP, Convert__RegVSSRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSFRC }, }, |
| 9905 | { 15640 /* xsrsqrtedp */, PPC::XSRSQRTEDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9906 | { 15651 /* xsrsqrtesp */, PPC::XSRSQRTESP, Convert__RegVSSRC1_0__RegVSSRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9907 | { 15662 /* xssqrtdp */, PPC::XSSQRTDP, Convert__RegVSFRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9908 | { 15671 /* xssqrtqp */, PPC::XSSQRTQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9909 | { 15680 /* xssqrtqpo */, PPC::XSSQRTQPO, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9910 | { 15690 /* xssqrtsp */, PPC::XSSQRTSP, Convert__RegVSSRC1_0__RegVSSRC1_1, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9911 | { 15699 /* xssubdp */, PPC::XSSUBDP, Convert__RegVSFRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9912 | { 15707 /* xssubqp */, PPC::XSSUBQP, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9913 | { 15715 /* xssubqpo */, PPC::XSSUBQPO, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9914 | { 15724 /* xssubsp */, PPC::XSSUBSP, Convert__RegVSSRC1_0__RegVSSRC1_1__RegVSSRC1_2, AMFBS_None, { MCK_RegVSSRC, MCK_RegVSSRC, MCK_RegVSSRC }, }, |
| 9915 | { 15732 /* xstdivdp */, PPC::XSTDIVDP, Convert__RegCRRC1_0__RegVSFRC1_1__RegVSFRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_RegVSFRC }, }, |
| 9916 | { 15741 /* xstsqrtdp */, PPC::XSTSQRTDP, Convert__RegCRRC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC }, }, |
| 9917 | { 15751 /* xststdcdp */, PPC::XSTSTDCDP, Convert__RegCRRC1_0__U7Imm1_2__RegVSFRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSFRC, MCK_U7Imm }, }, |
| 9918 | { 15761 /* xststdcqp */, PPC::XSTSTDCQP, Convert__RegCRRC1_0__U7Imm1_2__RegVRRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVRRC, MCK_U7Imm }, }, |
| 9919 | { 15771 /* xststdcsp */, PPC::XSTSTDCSP, Convert__RegCRRC1_0__U7Imm1_2__RegVSSRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSSRC, MCK_U7Imm }, }, |
| 9920 | { 15781 /* xsxexpdp */, PPC::XSXEXPDP, Convert__RegG8RC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVSFRC }, }, |
| 9921 | { 15790 /* xsxexpqp */, PPC::XSXEXPQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9922 | { 15799 /* xsxsigdp */, PPC::XSXSIGDP, Convert__RegG8RC1_0__RegVSFRC1_1, AMFBS_None, { MCK_RegG8RC, MCK_RegVSFRC }, }, |
| 9923 | { 15808 /* xsxsigqp */, PPC::XSXSIGQP, Convert__RegVRRC1_0__RegVRRC1_1, AMFBS_None, { MCK_RegVRRC, MCK_RegVRRC }, }, |
| 9924 | { 15817 /* xvabsdp */, PPC::XVABSDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9925 | { 15825 /* xvabssp */, PPC::XVABSSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9926 | { 15833 /* xvadddp */, PPC::XVADDDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9927 | { 15841 /* xvaddsp */, PPC::XVADDSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9928 | { 15849 /* xvadduhm */, PPC::XVADDUHM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9929 | { 15858 /* xvadduwm */, PPC::XVADDUWM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9930 | { 15867 /* xvbf16ger2 */, PPC::XVBF16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9931 | { 15878 /* xvbf16ger2nn */, PPC::XVBF16GER2NN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9932 | { 15891 /* xvbf16ger2np */, PPC::XVBF16GER2NP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9933 | { 15904 /* xvbf16ger2pn */, PPC::XVBF16GER2PN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9934 | { 15917 /* xvbf16ger2pp */, PPC::XVBF16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9935 | { 15930 /* xvcmpeqdp */, PPC::XVCMPEQDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9936 | { 15930 /* xvcmpeqdp */, PPC::XVCMPEQDP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9937 | { 15940 /* xvcmpeqsp */, PPC::XVCMPEQSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9938 | { 15940 /* xvcmpeqsp */, PPC::XVCMPEQSP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9939 | { 15950 /* xvcmpgedp */, PPC::XVCMPGEDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9940 | { 15950 /* xvcmpgedp */, PPC::XVCMPGEDP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9941 | { 15960 /* xvcmpgesp */, PPC::XVCMPGESP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9942 | { 15960 /* xvcmpgesp */, PPC::XVCMPGESP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9943 | { 15970 /* xvcmpgtdp */, PPC::XVCMPGTDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9944 | { 15970 /* xvcmpgtdp */, PPC::XVCMPGTDP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9945 | { 15980 /* xvcmpgtsp */, PPC::XVCMPGTSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9946 | { 15980 /* xvcmpgtsp */, PPC::XVCMPGTSP_rec, Convert__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK__DOT_, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9947 | { 15990 /* xvcpsgndp */, PPC::XVCPSGNDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9948 | { 16000 /* xvcpsgnsp */, PPC::XVCPSGNSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9949 | { 16010 /* xvcvbf16spn */, PPC::XVCVBF16SPN, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9950 | { 16022 /* xvcvdpsp */, PPC::XVCVDPSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9951 | { 16031 /* xvcvdpsxds */, PPC::XVCVDPSXDS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9952 | { 16042 /* xvcvdpsxws */, PPC::XVCVDPSXWS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9953 | { 16053 /* xvcvdpuxds */, PPC::XVCVDPUXDS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9954 | { 16064 /* xvcvdpuxws */, PPC::XVCVDPUXWS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9955 | { 16075 /* xvcvhpsp */, PPC::XVCVHPSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9956 | { 16084 /* xvcvspbf16 */, PPC::XVCVSPBF16, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9957 | { 16095 /* xvcvspdp */, PPC::XVCVSPDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9958 | { 16104 /* xvcvsphp */, PPC::XVCVSPHP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9959 | { 16113 /* xvcvspsxds */, PPC::XVCVSPSXDS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9960 | { 16124 /* xvcvspsxws */, PPC::XVCVSPSXWS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9961 | { 16135 /* xvcvspuxds */, PPC::XVCVSPUXDS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9962 | { 16146 /* xvcvspuxws */, PPC::XVCVSPUXWS, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9963 | { 16157 /* xvcvsxddp */, PPC::XVCVSXDDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9964 | { 16167 /* xvcvsxdsp */, PPC::XVCVSXDSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9965 | { 16177 /* xvcvsxwdp */, PPC::XVCVSXWDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9966 | { 16187 /* xvcvsxwsp */, PPC::XVCVSXWSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9967 | { 16197 /* xvcvuxddp */, PPC::XVCVUXDDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9968 | { 16207 /* xvcvuxdsp */, PPC::XVCVUXDSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9969 | { 16217 /* xvcvuxwdp */, PPC::XVCVUXWDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9970 | { 16227 /* xvcvuxwsp */, PPC::XVCVUXWSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9971 | { 16237 /* xvdivdp */, PPC::XVDIVDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9972 | { 16245 /* xvdivsp */, PPC::XVDIVSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9973 | { 16253 /* xvf16ger2 */, PPC::XVF16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9974 | { 16263 /* xvf16ger2nn */, PPC::XVF16GER2NN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9975 | { 16275 /* xvf16ger2np */, PPC::XVF16GER2NP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9976 | { 16287 /* xvf16ger2pn */, PPC::XVF16GER2PN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9977 | { 16299 /* xvf16ger2pp */, PPC::XVF16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9978 | { 16311 /* xvf32ger */, PPC::XVF32GER, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9979 | { 16320 /* xvf32gernn */, PPC::XVF32GERNN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9980 | { 16331 /* xvf32gernp */, PPC::XVF32GERNP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9981 | { 16342 /* xvf32gerpn */, PPC::XVF32GERPN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9982 | { 16353 /* xvf32gerpp */, PPC::XVF32GERPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9983 | { 16364 /* xvf64ger */, PPC::XVF64GER, Convert__RegACCRC1_0__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
| 9984 | { 16373 /* xvf64gernn */, PPC::XVF64GERNN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
| 9985 | { 16384 /* xvf64gernp */, PPC::XVF64GERNP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
| 9986 | { 16395 /* xvf64gerpn */, PPC::XVF64GERPN, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
| 9987 | { 16406 /* xvf64gerpp */, PPC::XVF64GERPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRpEvenRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRpEvenRC, MCK_RegVSRC }, }, |
| 9988 | { 16417 /* xvi16ger2 */, PPC::XVI16GER2, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9989 | { 16427 /* xvi16ger2pp */, PPC::XVI16GER2PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9990 | { 16439 /* xvi16ger2s */, PPC::XVI16GER2S, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9991 | { 16450 /* xvi16ger2spp */, PPC::XVI16GER2SPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9992 | { 16463 /* xvi4ger8 */, PPC::XVI4GER8, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9993 | { 16472 /* xvi4ger8pp */, PPC::XVI4GER8PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9994 | { 16483 /* xvi8ger4 */, PPC::XVI8GER4, Convert__RegACCRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9995 | { 16492 /* xvi8ger4pp */, PPC::XVI8GER4PP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9996 | { 16503 /* xvi8ger4spp */, PPC::XVI8GER4SPP, Convert__RegACCRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegACCRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9997 | { 16515 /* xviexpdp */, PPC::XVIEXPDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9998 | { 16524 /* xviexpsp */, PPC::XVIEXPSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 9999 | { 16533 /* xvmaddadp */, PPC::XVMADDADP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10000 | { 16543 /* xvmaddasp */, PPC::XVMADDASP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10001 | { 16553 /* xvmaddmdp */, PPC::XVMADDMDP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10002 | { 16563 /* xvmaddmsp */, PPC::XVMADDMSP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10003 | { 16573 /* xvmaxdp */, PPC::XVMAXDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10004 | { 16581 /* xvmaxsp */, PPC::XVMAXSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10005 | { 16589 /* xvmindp */, PPC::XVMINDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10006 | { 16597 /* xvminsp */, PPC::XVMINSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10007 | { 16605 /* xvmovdp */, PPC::XVCPSGNDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10008 | { 16613 /* xvmovsp */, PPC::XVCPSGNSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10009 | { 16621 /* xvmsubadp */, PPC::XVMSUBADP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10010 | { 16631 /* xvmsubasp */, PPC::XVMSUBASP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10011 | { 16641 /* xvmsubmdp */, PPC::XVMSUBMDP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10012 | { 16651 /* xvmsubmsp */, PPC::XVMSUBMSP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10013 | { 16661 /* xvmuldp */, PPC::XVMULDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10014 | { 16669 /* xvmulhsh */, PPC::XVMULHSH, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10015 | { 16678 /* xvmulhsw */, PPC::XVMULHSW, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10016 | { 16687 /* xvmulhuh */, PPC::XVMULHUH, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10017 | { 16696 /* xvmulhuw */, PPC::XVMULHUW, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10018 | { 16705 /* xvmulsp */, PPC::XVMULSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10019 | { 16713 /* xvmuluhm */, PPC::XVMULUHM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10020 | { 16722 /* xvmuluwm */, PPC::XVMULUWM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10021 | { 16731 /* xvnabsdp */, PPC::XVNABSDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10022 | { 16740 /* xvnabssp */, PPC::XVNABSSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10023 | { 16749 /* xvnegdp */, PPC::XVNEGDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10024 | { 16757 /* xvnegsp */, PPC::XVNEGSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10025 | { 16765 /* xvnmaddadp */, PPC::XVNMADDADP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10026 | { 16776 /* xvnmaddasp */, PPC::XVNMADDASP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10027 | { 16787 /* xvnmaddmdp */, PPC::XVNMADDMDP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10028 | { 16798 /* xvnmaddmsp */, PPC::XVNMADDMSP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10029 | { 16809 /* xvnmsubadp */, PPC::XVNMSUBADP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10030 | { 16820 /* xvnmsubasp */, PPC::XVNMSUBASP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10031 | { 16831 /* xvnmsubmdp */, PPC::XVNMSUBMDP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10032 | { 16842 /* xvnmsubmsp */, PPC::XVNMSUBMSP, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10033 | { 16853 /* xvrdpi */, PPC::XVRDPI, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10034 | { 16860 /* xvrdpic */, PPC::XVRDPIC, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10035 | { 16868 /* xvrdpim */, PPC::XVRDPIM, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10036 | { 16876 /* xvrdpip */, PPC::XVRDPIP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10037 | { 16884 /* xvrdpiz */, PPC::XVRDPIZ, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10038 | { 16892 /* xvredp */, PPC::XVREDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10039 | { 16899 /* xvresp */, PPC::XVRESP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10040 | { 16906 /* xvrlw */, PPC::XVRLW, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10041 | { 16912 /* xvrspi */, PPC::XVRSPI, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10042 | { 16919 /* xvrspic */, PPC::XVRSPIC, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10043 | { 16927 /* xvrspim */, PPC::XVRSPIM, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10044 | { 16935 /* xvrspip */, PPC::XVRSPIP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10045 | { 16943 /* xvrspiz */, PPC::XVRSPIZ, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10046 | { 16951 /* xvrsqrtedp */, PPC::XVRSQRTEDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10047 | { 16962 /* xvrsqrtesp */, PPC::XVRSQRTESP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10048 | { 16973 /* xvsqrtdp */, PPC::XVSQRTDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10049 | { 16982 /* xvsqrtsp */, PPC::XVSQRTSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10050 | { 16991 /* xvsubdp */, PPC::XVSUBDP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10051 | { 16999 /* xvsubsp */, PPC::XVSUBSP, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10052 | { 17007 /* xvsubuhm */, PPC::XVSUBUHM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10053 | { 17016 /* xvsubuwm */, PPC::XVSUBUWM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10054 | { 17025 /* xvtdivdp */, PPC::XVTDIVDP, Convert__RegCRRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10055 | { 17034 /* xvtdivsp */, PPC::XVTDIVSP, Convert__RegCRRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10056 | { 17043 /* xvtlsbb */, PPC::XVTLSBB, Convert__RegCRRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC }, }, |
| 10057 | { 17051 /* xvtsqrtdp */, PPC::XVTSQRTDP, Convert__RegCRRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC }, }, |
| 10058 | { 17061 /* xvtsqrtsp */, PPC::XVTSQRTSP, Convert__RegCRRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegCRRC, MCK_RegVSRC }, }, |
| 10059 | { 17071 /* xvtstdcdp */, PPC::XVTSTDCDP, Convert__RegVSRC1_0__U7Imm1_2__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_U7Imm }, }, |
| 10060 | { 17081 /* xvtstdcsp */, PPC::XVTSTDCSP, Convert__RegVSRC1_0__U7Imm1_2__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_U7Imm }, }, |
| 10061 | { 17091 /* xvxexpdp */, PPC::XVXEXPDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10062 | { 17100 /* xvxexpsp */, PPC::XVXEXPSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10063 | { 17109 /* xvxsigdp */, PPC::XVXSIGDP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10064 | { 17118 /* xvxsigsp */, PPC::XVXSIGSP, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10065 | { 17127 /* xxaes128decp */, PPC::XXAESDECP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_0, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegVSRpRC }, }, |
| 10066 | { 17140 /* xxaes128encp */, PPC::XXAESENCP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_0, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegVSRpRC }, }, |
| 10067 | { 17153 /* xxaes128genlkp */, PPC::XXAESGENLKP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__imm_95_0, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC }, }, |
| 10068 | { 17168 /* xxaes192decp */, PPC::XXAESDECP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_1, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegVSRpRC }, }, |
| 10069 | { 17181 /* xxaes192encp */, PPC::XXAESENCP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_1, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegVSRpRC }, }, |
| 10070 | { 17194 /* xxaes192genlkp */, PPC::XXAESGENLKP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__imm_95_1, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC }, }, |
| 10071 | { 17209 /* xxaes256decp */, PPC::XXAESDECP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegVSRpRC }, }, |
| 10072 | { 17222 /* xxaes256encp */, PPC::XXAESENCP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__imm_95_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegVSRpRC }, }, |
| 10073 | { 17235 /* xxaes256genlkp */, PPC::XXAESGENLKP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__imm_95_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC }, }, |
| 10074 | { 17250 /* xxaesdecp */, PPC::XXAESDECP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_U2Imm }, }, |
| 10075 | { 17260 /* xxaesencp */, PPC::XXAESENCP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__RegVSRpRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_U2Imm }, }, |
| 10076 | { 17270 /* xxaesgenlkp */, PPC::XXAESGENLKP, Convert__RegVSRpRC1_0__RegVSRpRC1_1__U2Imm1_2, AMFBS_None, { MCK_RegVSRpRC, MCK_RegVSRpRC, MCK_U2Imm }, }, |
| 10077 | { 17282 /* xxblendvb */, PPC::XXBLENDVB, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10078 | { 17292 /* xxblendvd */, PPC::XXBLENDVD, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10079 | { 17302 /* xxblendvh */, PPC::XXBLENDVH, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10080 | { 17312 /* xxblendvw */, PPC::XXBLENDVW, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10081 | { 17322 /* xxbrd */, PPC::XXBRD, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10082 | { 17328 /* xxbrh */, PPC::XXBRH, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10083 | { 17334 /* xxbrq */, PPC::XXBRQ, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10084 | { 17340 /* xxbrw */, PPC::XXBRW, Convert__RegVSRC1_0__RegVSRC1_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10085 | { 17346 /* xxeval */, PPC::XXEVAL, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U8Imm1_4, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U8Imm }, }, |
| 10086 | { 17353 /* xxextractuw */, PPC::XXEXTRACTUW, Convert__RegVSFRC1_0__RegVSRC1_1__U4Imm1_2, AMFBS_None, { MCK_RegVSFRC, MCK_RegVSRC, MCK_U4Imm }, }, |
| 10087 | { 17365 /* xxgenpcvbm */, PPC::XXGENPCVBM, Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVRRC, MCK_S5Imm }, }, |
| 10088 | { 17376 /* xxgenpcvdm */, PPC::XXGENPCVDM, Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVRRC, MCK_S5Imm }, }, |
| 10089 | { 17387 /* xxgenpcvhm */, PPC::XXGENPCVHM, Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVRRC, MCK_S5Imm }, }, |
| 10090 | { 17398 /* xxgenpcvwm */, PPC::XXGENPCVWM, Convert__RegVSRC1_0__RegVRRC1_1__S5Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVRRC, MCK_S5Imm }, }, |
| 10091 | { 17409 /* xxgfmul128 */, PPC::XXGFMUL128, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 10092 | { 17420 /* xxgfmul128gcm */, PPC::XXGFMUL128, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_0, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10093 | { 17434 /* xxgfmul128xts */, PPC::XXGFMUL128, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_1, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10094 | { 17448 /* xxinsertw */, PPC::XXINSERTW, Convert__RegVSRC1_0__Tie0_1_1__RegVSRC1_1__U4Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_U4Imm }, }, |
| 10095 | { 17458 /* xxland */, PPC::XXLAND, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10096 | { 17465 /* xxlandc */, PPC::XXLANDC, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10097 | { 17473 /* xxleqv */, PPC::XXLEQV, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10098 | { 17480 /* xxlnand */, PPC::XXLNAND, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10099 | { 17488 /* xxlnor */, PPC::XXLNOR, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10100 | { 17495 /* xxlor */, PPC::XXLOR, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10101 | { 17501 /* xxlorc */, PPC::XXLORC, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10102 | { 17508 /* xxlxor */, PPC::XXLXOR, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10103 | { 17515 /* xxmfacc */, PPC::XXMFACC, Convert__RegACCRC1_0__Tie0_1_1, AMFBS_None, { MCK_RegACCRC }, }, |
| 10104 | { 17523 /* xxmrghd */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_0, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10105 | { 17531 /* xxmrghw */, PPC::XXMRGHW, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10106 | { 17539 /* xxmrgld */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__imm_95_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10107 | { 17547 /* xxmrglw */, PPC::XXMRGLW, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10108 | { 17555 /* xxmtacc */, PPC::XXMTACC, Convert__RegACCRC1_0__Tie0_1_1, AMFBS_None, { MCK_RegACCRC }, }, |
| 10109 | { 17563 /* xxmulmul */, PPC::XXMULMUL, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U3Imm1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U3Imm }, }, |
| 10110 | { 17572 /* xxmulmulhiadd */, PPC::XXMULMULHIADD, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3__U1Imm1_4__U1Imm1_5, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U1Imm, MCK_U1Imm, MCK_U1Imm }, }, |
| 10111 | { 17586 /* xxmulmulloadd */, PPC::XXMULMULLOADD, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3__U1Imm1_4, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U1Imm, MCK_U1Imm }, }, |
| 10112 | { 17600 /* xxperm */, PPC::XXPERM, Convert__RegVSRC1_0__RegVSRC1_1__Tie0_1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10113 | { 17607 /* xxpermdi */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U2Imm }, }, |
| 10114 | { 17616 /* xxpermr */, PPC::XXPERMR, Convert__RegVSRC1_0__RegVSRC1_1__Tie0_1_1__RegVSRC1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10115 | { 17624 /* xxpermx */, PPC::XXPERMX, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U3Imm1_4, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U3Imm }, }, |
| 10116 | { 17632 /* xxsel */, PPC::XXSEL, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10117 | { 17638 /* xxsetaccz */, PPC::XXSETACCZ, Convert__RegACCRC1_0, AMFBS_None, { MCK_RegACCRC }, }, |
| 10118 | { 17648 /* xxsldwi */, PPC::XXSLDWI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U2Imm1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U2Imm }, }, |
| 10119 | { 17656 /* xxspltd */, PPC::XXPERMDIs, Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_0, AMFBS_ModernAs, { MCK_RegVSRC, MCK_RegVSFRC, MCK_0 }, }, |
| 10120 | { 17656 /* xxspltd */, PPC::XXPERMDIs, Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_3, AMFBS_ModernAs, { MCK_RegVSRC, MCK_RegVSFRC, MCK_1 }, }, |
| 10121 | { 17656 /* xxspltd */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_0, AMFBS_ModernAs, { MCK_RegVSRC, MCK_RegVSRC, MCK_0 }, }, |
| 10122 | { 17656 /* xxspltd */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_3, AMFBS_ModernAs, { MCK_RegVSRC, MCK_RegVSRC, MCK_1 }, }, |
| 10123 | { 17664 /* xxsplti32dx */, PPC::XXSPLTI32DX, Convert__RegVSRC1_0__Tie0_1_1__U1Imm1_1__Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_U1Imm, MCK_Imm }, }, |
| 10124 | { 17676 /* xxspltib */, PPC::XXSPLTIB, Convert__RegVSRC1_0__U8Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_U8Imm }, }, |
| 10125 | { 17685 /* xxspltidp */, PPC::XXSPLTIDP, Convert__RegVSRC1_0__Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_Imm }, }, |
| 10126 | { 17695 /* xxspltiw */, PPC::XXSPLTIW, Convert__RegVSRC1_0__Imm1_1, AMFBS_None, { MCK_RegVSRC, MCK_Imm }, }, |
| 10127 | { 17704 /* xxspltw */, PPC::XXSPLTW, Convert__RegVSRC1_0__RegVSRC1_1__U2Imm1_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_U2Imm }, }, |
| 10128 | { 17712 /* xxssumudm */, PPC::XXSSUMUDM, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 10129 | { 17722 /* xxssumudmc */, PPC::XXSSUMUDMC, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__U1Imm1_3, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 10130 | { 17733 /* xxssumudmcext */, PPC::XXSSUMUDMCEXT, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_2__RegVSRC1_3__U1Imm1_4, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_RegVSRC, MCK_U1Imm }, }, |
| 10131 | { 17747 /* xxswapd */, PPC::XXPERMDIs, Convert__RegVSRC1_0__RegVSFRC1_1__imm_95_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSFRC }, }, |
| 10132 | { 17747 /* xxswapd */, PPC::XXPERMDI, Convert__RegVSRC1_0__RegVSRC1_1__RegVSRC1_1__imm_95_2, AMFBS_None, { MCK_RegVSRC, MCK_RegVSRC }, }, |
| 10133 | }; |
| 10134 | |
| 10135 | #include "llvm/Support/Debug.h" |
| 10136 | #include "llvm/Support/Format.h" |
| 10137 | |
| 10138 | unsigned PPCAsmParser:: |
| 10139 | MatchInstructionImpl(const OperandVector &Operands, |
| 10140 | MCInst &Inst, |
| 10141 | uint64_t &ErrorInfo, |
| 10142 | FeatureBitset &MissingFeatures, |
| 10143 | bool matchingInlineAsm, unsigned VariantID) { |
| 10144 | // Eliminate obvious mismatches. |
| 10145 | if (Operands.size() > 7) { |
| 10146 | ErrorInfo = 7; |
| 10147 | return Match_InvalidOperand; |
| 10148 | } |
| 10149 | |
| 10150 | // Get the current feature set. |
| 10151 | const FeatureBitset &AvailableFeatures = getAvailableFeatures(); |
| 10152 | |
| 10153 | // Get the instruction mnemonic, which is the first token. |
| 10154 | StringRef Mnemonic = ((PPCOperand &)*Operands[0]).getToken(); |
| 10155 | |
| 10156 | // Process all MnemonicAliases to remap the mnemonic. |
| 10157 | applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID); |
| 10158 | |
| 10159 | // Some state to try to produce better error messages. |
| 10160 | bool HadMatchOtherThanFeatures = false; |
| 10161 | bool HadMatchOtherThanPredicate = false; |
| 10162 | unsigned RetCode = Match_InvalidOperand; |
| 10163 | MissingFeatures.set(); |
| 10164 | // Set ErrorInfo to the operand that mismatches if it is |
| 10165 | // wrong for all instances of the instruction. |
| 10166 | ErrorInfo = ~0ULL; |
| 10167 | // Find the appropriate table for this asm variant. |
| 10168 | const MatchEntry *Start, *End; |
| 10169 | switch (VariantID) { |
| 10170 | default: llvm_unreachable("invalid variant!" ); |
| 10171 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 10172 | } |
| 10173 | // Search the table. |
| 10174 | auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); |
| 10175 | |
| 10176 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "AsmMatcher: found " << |
| 10177 | std::distance(MnemonicRange.first, MnemonicRange.second) << |
| 10178 | " encodings with mnemonic '" << Mnemonic << "'\n" ); |
| 10179 | |
| 10180 | // Return a more specific error code if no mnemonics match. |
| 10181 | if (MnemonicRange.first == MnemonicRange.second) |
| 10182 | return Match_MnemonicFail; |
| 10183 | |
| 10184 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
| 10185 | it != ie; ++it) { |
| 10186 | const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; |
| 10187 | bool HasRequiredFeatures = |
| 10188 | (AvailableFeatures & RequiredFeatures) == RequiredFeatures; |
| 10189 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Trying to match opcode " |
| 10190 | << MII.getName(it->Opcode) << "\n" ); |
| 10191 | // equal_range guarantees that instruction mnemonic matches. |
| 10192 | assert(Mnemonic == it->getMnemonic()); |
| 10193 | bool OperandsValid = true; |
| 10194 | for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 6; ++FormalIdx) { |
| 10195 | auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); |
| 10196 | DEBUG_WITH_TYPE("asm-matcher" , |
| 10197 | dbgs() << " Matching formal operand class " << getMatchClassName(Formal) |
| 10198 | << " against actual operand at index " << ActualIdx); |
| 10199 | if (ActualIdx < Operands.size()) |
| 10200 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << " (" ; |
| 10201 | Operands[ActualIdx]->print(dbgs(), *getContext().getAsmInfo()); dbgs() << "): " ); |
| 10202 | else |
| 10203 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << ": " ); |
| 10204 | if (ActualIdx >= Operands.size()) { |
| 10205 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "actual operand index out of range\n" ); |
| 10206 | if (Formal == InvalidMatchClass) { |
| 10207 | break; |
| 10208 | } |
| 10209 | if (isSubclass(Formal, OptionalMatchClass)) { |
| 10210 | continue; |
| 10211 | } |
| 10212 | OperandsValid = false; |
| 10213 | ErrorInfo = ActualIdx; |
| 10214 | break; |
| 10215 | } |
| 10216 | MCParsedAsmOperand &Actual = *Operands[ActualIdx]; |
| 10217 | unsigned Diag = validateOperandClass(Actual, Formal, *STI); |
| 10218 | if (Diag == Match_Success) { |
| 10219 | DEBUG_WITH_TYPE("asm-matcher" , |
| 10220 | dbgs() << "match success using generic matcher\n" ); |
| 10221 | ++ActualIdx; |
| 10222 | continue; |
| 10223 | } |
| 10224 | // If the generic handler indicates an invalid operand |
| 10225 | // failure, check for a special case. |
| 10226 | if (Diag != Match_Success) { |
| 10227 | unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); |
| 10228 | if (TargetDiag == Match_Success) { |
| 10229 | DEBUG_WITH_TYPE("asm-matcher" , |
| 10230 | dbgs() << "match success using target matcher\n" ); |
| 10231 | ++ActualIdx; |
| 10232 | continue; |
| 10233 | } |
| 10234 | // If the target matcher returned a specific error code use |
| 10235 | // that, else use the one from the generic matcher. |
| 10236 | if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) |
| 10237 | Diag = TargetDiag; |
| 10238 | } |
| 10239 | // If current formal operand wasn't matched and it is optional |
| 10240 | // then try to match next formal operand |
| 10241 | if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { |
| 10242 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "ignoring optional operand\n" ); |
| 10243 | continue; |
| 10244 | } |
| 10245 | // If this operand is broken for all of the instances of this |
| 10246 | // mnemonic, keep track of it so we can report loc info. |
| 10247 | // If we already had a match that only failed due to a |
| 10248 | // target predicate, that diagnostic is preferred. |
| 10249 | if (!HadMatchOtherThanPredicate && |
| 10250 | (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { |
| 10251 | if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) |
| 10252 | RetCode = Diag; |
| 10253 | ErrorInfo = ActualIdx; |
| 10254 | } |
| 10255 | // Otherwise, just reject this instance of the mnemonic. |
| 10256 | OperandsValid = false; |
| 10257 | break; |
| 10258 | } |
| 10259 | |
| 10260 | if (!OperandsValid) { |
| 10261 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Opcode result: multiple " |
| 10262 | "operand mismatches, ignoring " |
| 10263 | "this opcode\n" ); |
| 10264 | continue; |
| 10265 | } |
| 10266 | if (!HasRequiredFeatures) { |
| 10267 | HadMatchOtherThanFeatures = true; |
| 10268 | FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; |
| 10269 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Missing target features:" ; |
| 10270 | for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) |
| 10271 | if (NewMissingFeatures[I]) |
| 10272 | dbgs() << ' ' << I; |
| 10273 | dbgs() << "\n" ); |
| 10274 | if (NewMissingFeatures.count() <= |
| 10275 | MissingFeatures.count()) |
| 10276 | MissingFeatures = NewMissingFeatures; |
| 10277 | continue; |
| 10278 | } |
| 10279 | |
| 10280 | Inst.clear(); |
| 10281 | |
| 10282 | Inst.setOpcode(it->Opcode); |
| 10283 | // We have a potential match but have not rendered the operands. |
| 10284 | // Check the target predicate to handle any context sensitive |
| 10285 | // constraints. |
| 10286 | // For example, Ties that are referenced multiple times must be |
| 10287 | // checked here to ensure the input is the same for each match |
| 10288 | // constraints. If we leave it any later the ties will have been |
| 10289 | // canonicalized |
| 10290 | unsigned MatchResult; |
| 10291 | if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { |
| 10292 | Inst.clear(); |
| 10293 | DEBUG_WITH_TYPE( |
| 10294 | "asm-matcher" , |
| 10295 | dbgs() << "Early target match predicate failed with diag code " |
| 10296 | << MatchResult << "\n" ); |
| 10297 | RetCode = MatchResult; |
| 10298 | HadMatchOtherThanPredicate = true; |
| 10299 | continue; |
| 10300 | } |
| 10301 | |
| 10302 | if (matchingInlineAsm) { |
| 10303 | convertToMapAndConstraints(it->ConvertFn, Operands); |
| 10304 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
| 10305 | ErrorInfo)) |
| 10306 | return Match_InvalidTiedOperand; |
| 10307 | |
| 10308 | return Match_Success; |
| 10309 | } |
| 10310 | |
| 10311 | // We have selected a definite instruction, convert the parsed |
| 10312 | // operands into the appropriate MCInst. |
| 10313 | convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); |
| 10314 | |
| 10315 | // We have a potential match. Check the target predicate to |
| 10316 | // handle any context sensitive constraints. |
| 10317 | if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { |
| 10318 | DEBUG_WITH_TYPE("asm-matcher" , |
| 10319 | dbgs() << "Target match predicate failed with diag code " |
| 10320 | << MatchResult << "\n" ); |
| 10321 | Inst.clear(); |
| 10322 | RetCode = MatchResult; |
| 10323 | HadMatchOtherThanPredicate = true; |
| 10324 | continue; |
| 10325 | } |
| 10326 | |
| 10327 | std::string Info; |
| 10328 | if (!getParser().getTargetParser().getTargetOptions().MCNoDeprecatedWarn && |
| 10329 | MII.getDeprecatedInfo(Inst, getSTI(), Info)) { |
| 10330 | SMLoc Loc = ((PPCOperand &)*Operands[0]).getStartLoc(); |
| 10331 | getParser().Warning(Loc, Info, {}); |
| 10332 | } |
| 10333 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
| 10334 | ErrorInfo)) |
| 10335 | return Match_InvalidTiedOperand; |
| 10336 | |
| 10337 | DEBUG_WITH_TYPE( |
| 10338 | "asm-matcher" , |
| 10339 | dbgs() << "Opcode result: complete match, selecting this opcode\n" ); |
| 10340 | return Match_Success; |
| 10341 | } |
| 10342 | |
| 10343 | // Okay, we had no match. Try to return a useful error code. |
| 10344 | if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) |
| 10345 | return RetCode; |
| 10346 | |
| 10347 | ErrorInfo = 0; |
| 10348 | return Match_MissingFeature; |
| 10349 | } |
| 10350 | |
| 10351 | #endif // GET_MATCHER_IMPLEMENTATION |
| 10352 | |
| 10353 | |
| 10354 | #ifdef GET_MNEMONIC_SPELL_CHECKER |
| 10355 | #undef GET_MNEMONIC_SPELL_CHECKER |
| 10356 | |
| 10357 | static std::string PPCMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { |
| 10358 | const unsigned MaxEditDist = 2; |
| 10359 | std::vector<StringRef> Candidates; |
| 10360 | StringRef Prev = "" ; |
| 10361 | |
| 10362 | // Find the appropriate table for this asm variant. |
| 10363 | const MatchEntry *Start, *End; |
| 10364 | switch (VariantID) { |
| 10365 | default: llvm_unreachable("invalid variant!" ); |
| 10366 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 10367 | } |
| 10368 | |
| 10369 | for (auto I = Start; I < End; I++) { |
| 10370 | // Ignore unsupported instructions. |
| 10371 | const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; |
| 10372 | if ((FBS & RequiredFeatures) != RequiredFeatures) |
| 10373 | continue; |
| 10374 | |
| 10375 | StringRef T = I->getMnemonic(); |
| 10376 | // Avoid recomputing the edit distance for the same string. |
| 10377 | if (T == Prev) |
| 10378 | continue; |
| 10379 | |
| 10380 | Prev = T; |
| 10381 | unsigned Dist = S.edit_distance(T, false, MaxEditDist); |
| 10382 | if (Dist <= MaxEditDist) |
| 10383 | Candidates.push_back(T); |
| 10384 | } |
| 10385 | |
| 10386 | if (Candidates.empty()) |
| 10387 | return "" ; |
| 10388 | |
| 10389 | std::string Res = ", did you mean: " ; |
| 10390 | unsigned i = 0; |
| 10391 | for (; i < Candidates.size() - 1; i++) |
| 10392 | Res += Candidates[i].str() + ", " ; |
| 10393 | return Res + Candidates[i].str() + "?" ; |
| 10394 | } |
| 10395 | |
| 10396 | #endif // GET_MNEMONIC_SPELL_CHECKER |
| 10397 | |
| 10398 | |
| 10399 | #ifdef GET_MNEMONIC_CHECKER |
| 10400 | #undef GET_MNEMONIC_CHECKER |
| 10401 | |
| 10402 | static bool PPCCheckMnemonic(StringRef Mnemonic, |
| 10403 | const FeatureBitset &AvailableFeatures, |
| 10404 | unsigned VariantID) { |
| 10405 | // Process all MnemonicAliases to remap the mnemonic. |
| 10406 | applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID); |
| 10407 | |
| 10408 | // Find the appropriate table for this asm variant. |
| 10409 | const MatchEntry *Start, *End; |
| 10410 | switch (VariantID) { |
| 10411 | default: llvm_unreachable("invalid variant!" ); |
| 10412 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 10413 | } |
| 10414 | |
| 10415 | // Search the table. |
| 10416 | auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); |
| 10417 | |
| 10418 | if (MnemonicRange.first == MnemonicRange.second) |
| 10419 | return false; |
| 10420 | |
| 10421 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
| 10422 | it != ie; ++it) { |
| 10423 | const FeatureBitset &RequiredFeatures = |
| 10424 | FeatureBitsets[it->RequiredFeaturesIdx]; |
| 10425 | if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures) |
| 10426 | return true; |
| 10427 | } |
| 10428 | return false; |
| 10429 | } |
| 10430 | |
| 10431 | #endif // GET_MNEMONIC_CHECKER |
| 10432 | |
| 10433 | |