1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Writer Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: PPC.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10/// getMnemonic - This method is automatically generated by tablegen
11/// from the instruction set description.
12std::pair<const char *, uint64_t>
13PPCInstPrinter::getMnemonic(const MCInst &MI) const {
14
15#ifdef __GNUC__
16#pragma GCC diagnostic push
17#pragma GCC diagnostic ignored "-Woverlength-strings"
18#endif
19 static const char AsmStrs[] = {
20 /* 0 */ "#EH_SjLj_Setup\t\000"
21 /* 16 */ "bdzla+ \000"
22 /* 24 */ "bdnzla+ \000"
23 /* 33 */ "bdza+ \000"
24 /* 40 */ "bdnza+ \000"
25 /* 48 */ "bdzl+ \000"
26 /* 55 */ "bdnzl+ \000"
27 /* 63 */ "bdz+ \000"
28 /* 69 */ "bdnz+ \000"
29 /* 76 */ "bcl 20, 31, \000"
30 /* 89 */ "bctrl\n\tld 2, \000"
31 /* 103 */ "bctrl\n\tlwz 2, \000"
32 /* 118 */ "bc 12, \000"
33 /* 126 */ "bcl 12, \000"
34 /* 135 */ "bclrl 12, \000"
35 /* 146 */ "bcctrl 12, \000"
36 /* 158 */ "bclr 12, \000"
37 /* 168 */ "bcctr 12, \000"
38 /* 179 */ "mtspr 3, \000"
39 /* 189 */ "bc 4, \000"
40 /* 196 */ "bcl 4, \000"
41 /* 204 */ "bclrl 4, \000"
42 /* 214 */ "bcctrl 4, \000"
43 /* 225 */ "bclr 4, \000"
44 /* 234 */ "bcctr 4, \000"
45 /* 244 */ "mtspr 256, \000"
46 /* 256 */ "bdzla- \000"
47 /* 264 */ "bdnzla- \000"
48 /* 273 */ "bdza- \000"
49 /* 280 */ "bdnza- \000"
50 /* 288 */ "bdzl- \000"
51 /* 295 */ "bdnzl- \000"
52 /* 303 */ "bdz- \000"
53 /* 309 */ "bdnz- \000"
54 /* 316 */ "dqua. \000"
55 /* 323 */ "vcmpneb. \000"
56 /* 333 */ "vcmpgtsb. \000"
57 /* 344 */ "extsb. \000"
58 /* 352 */ "vcmpequb. \000"
59 /* 363 */ "bcdsub. \000"
60 /* 372 */ "fsub. \000"
61 /* 379 */ "fmsub. \000"
62 /* 387 */ "fnmsub. \000"
63 /* 396 */ "vcmpgtub. \000"
64 /* 407 */ "vcmpnezb. \000"
65 /* 418 */ "addc. \000"
66 /* 425 */ "andc. \000"
67 /* 432 */ "tabortdc. \000"
68 /* 443 */ "subfc. \000"
69 /* 451 */ "subic. \000"
70 /* 459 */ "addic. \000"
71 /* 467 */ "rldic. \000"
72 /* 475 */ "bcdtrunc. \000"
73 /* 486 */ "bcdutrunc. \000"
74 /* 498 */ "orc. \000"
75 /* 504 */ "tabortwc. \000"
76 /* 515 */ "srad. \000"
77 /* 522 */ "denbcd. \000"
78 /* 531 */ "bcdadd. \000"
79 /* 540 */ "fadd. \000"
80 /* 547 */ "fmadd. \000"
81 /* 555 */ "fnmadd. \000"
82 /* 564 */ "mulhd. \000"
83 /* 572 */ "fcfid. \000"
84 /* 580 */ "fctid. \000"
85 /* 588 */ "mulld. \000"
86 /* 596 */ "sld. \000"
87 /* 602 */ "nand. \000"
88 /* 609 */ "tend. \000"
89 /* 616 */ "drrnd. \000"
90 /* 624 */ "ddedpd. \000"
91 /* 633 */ "srd. \000"
92 /* 639 */ "vcmpgtsd. \000"
93 /* 650 */ "vcmpequd. \000"
94 /* 661 */ "vcmpgtud. \000"
95 /* 672 */ "divd. \000"
96 /* 679 */ "cntlzd. \000"
97 /* 688 */ "cnttzd. \000"
98 /* 697 */ "adde. \000"
99 /* 704 */ "divde. \000"
100 /* 712 */ "slbfee. \000"
101 /* 721 */ "subfe. \000"
102 /* 729 */ "addme. \000"
103 /* 737 */ "subfme. \000"
104 /* 746 */ "fre. \000"
105 /* 752 */ "frsqrte. \000"
106 /* 762 */ "paste. \000"
107 /* 770 */ "divwe. \000"
108 /* 778 */ "addze. \000"
109 /* 786 */ "subfze. \000"
110 /* 795 */ "subf. \000"
111 /* 802 */ "mtfsf. \000"
112 /* 810 */ "fneg. \000"
113 /* 817 */ "vcmpneh. \000"
114 /* 827 */ "vcmpgtsh. \000"
115 /* 838 */ "extsh. \000"
116 /* 846 */ "vcmpequh. \000"
117 /* 857 */ "vcmpgtuh. \000"
118 /* 868 */ "vcmpnezh. \000"
119 /* 879 */ "dquai. \000"
120 /* 887 */ "tabortdci. \000"
121 /* 899 */ "tabortwci. \000"
122 /* 911 */ "sradi. \000"
123 /* 919 */ "clrlsldi. \000"
124 /* 930 */ "extldi. \000"
125 /* 939 */ "andi. \000"
126 /* 946 */ "clrrdi. \000"
127 /* 955 */ "insrdi. \000"
128 /* 964 */ "rotrdi. \000"
129 /* 973 */ "extrdi. \000"
130 /* 982 */ "mtfsfi. \000"
131 /* 991 */ "dscli. \000"
132 /* 999 */ "extswsli. \000"
133 /* 1010 */ "rldimi. \000"
134 /* 1019 */ "rlwimi. \000"
135 /* 1028 */ "dscri. \000"
136 /* 1036 */ "srawi. \000"
137 /* 1044 */ "clrlslwi. \000"
138 /* 1055 */ "inslwi. \000"
139 /* 1064 */ "extlwi. \000"
140 /* 1073 */ "clrrwi. \000"
141 /* 1082 */ "insrwi. \000"
142 /* 1091 */ "rotrwi. \000"
143 /* 1100 */ "extrwi. \000"
144 /* 1109 */ "vstribl. \000"
145 /* 1119 */ "rldcl. \000"
146 /* 1127 */ "rldicl. \000"
147 /* 1136 */ "fsel. \000"
148 /* 1143 */ "vstrihl. \000"
149 /* 1153 */ "dmul. \000"
150 /* 1160 */ "fmul. \000"
151 /* 1167 */ "treclaim. \000"
152 /* 1178 */ "frim. \000"
153 /* 1185 */ "rlwinm. \000"
154 /* 1194 */ "rlwnm. \000"
155 /* 1202 */ "bcdcfn. \000"
156 /* 1211 */ "bcdcpsgn. \000"
157 /* 1222 */ "fcpsgn. \000"
158 /* 1231 */ "bcdsetsgn. \000"
159 /* 1243 */ "tbegin. \000"
160 /* 1252 */ "frin. \000"
161 /* 1259 */ "bcdctn. \000"
162 /* 1268 */ "drintn. \000"
163 /* 1277 */ "addco. \000"
164 /* 1285 */ "subfco. \000"
165 /* 1294 */ "addo. \000"
166 /* 1301 */ "mulldo. \000"
167 /* 1310 */ "divdo. \000"
168 /* 1318 */ "addeo. \000"
169 /* 1326 */ "divdeo. \000"
170 /* 1335 */ "subfeo. \000"
171 /* 1344 */ "addmeo. \000"
172 /* 1353 */ "subfmeo. \000"
173 /* 1363 */ "divweo. \000"
174 /* 1372 */ "addzeo. \000"
175 /* 1381 */ "subfzeo. \000"
176 /* 1391 */ "subfo. \000"
177 /* 1399 */ "nego. \000"
178 /* 1406 */ "divduo. \000"
179 /* 1415 */ "divdeuo. \000"
180 /* 1425 */ "divweuo. \000"
181 /* 1435 */ "divwuo. \000"
182 /* 1444 */ "mullwo. \000"
183 /* 1453 */ "divwo. \000"
184 /* 1461 */ "xvcmpgedp. \000"
185 /* 1473 */ "xvcmpeqdp. \000"
186 /* 1485 */ "dctdp. \000"
187 /* 1493 */ "xvcmpgtdp. \000"
188 /* 1505 */ "vcmpbfp. \000"
189 /* 1515 */ "vcmpgefp. \000"
190 /* 1526 */ "vcmpeqfp. \000"
191 /* 1537 */ "vcmpgtfp. \000"
192 /* 1548 */ "frip. \000"
193 /* 1555 */ "xvcmpgesp. \000"
194 /* 1567 */ "xvcmpeqsp. \000"
195 /* 1579 */ "drsp. \000"
196 /* 1586 */ "frsp. \000"
197 /* 1593 */ "xvcmpgtsp. \000"
198 /* 1605 */ "dquaq. \000"
199 /* 1613 */ "dsubq. \000"
200 /* 1621 */ "denbcdq. \000"
201 /* 1631 */ "daddq. \000"
202 /* 1639 */ "drrndq. \000"
203 /* 1648 */ "ddedpdq. \000"
204 /* 1658 */ "dquaiq. \000"
205 /* 1667 */ "dscliq. \000"
206 /* 1676 */ "dscriq. \000"
207 /* 1685 */ "icblq. \000"
208 /* 1693 */ "dmulq. \000"
209 /* 1701 */ "drintnq. \000"
210 /* 1711 */ "drdpq. \000"
211 /* 1719 */ "dctqpq. \000"
212 /* 1728 */ "bcdcfsq. \000"
213 /* 1738 */ "bcdctsq. \000"
214 /* 1748 */ "vcmpgtsq. \000"
215 /* 1759 */ "vcmpequq. \000"
216 /* 1770 */ "vcmpgtuq. \000"
217 /* 1781 */ "ddivq. \000"
218 /* 1789 */ "diexq. \000"
219 /* 1797 */ "dxexq. \000"
220 /* 1805 */ "dcffixq. \000"
221 /* 1815 */ "dctfixq. \000"
222 /* 1825 */ "drintxq. \000"
223 /* 1835 */ "vstribr. \000"
224 /* 1845 */ "rldcr. \000"
225 /* 1853 */ "rldicr. \000"
226 /* 1862 */ "vstrihr. \000"
227 /* 1872 */ "fmr. \000"
228 /* 1878 */ "nor. \000"
229 /* 1884 */ "xor. \000"
230 /* 1890 */ "bcdsr. \000"
231 /* 1898 */ "tsr. \000"
232 /* 1904 */ "fabs. \000"
233 /* 1911 */ "fnabs. \000"
234 /* 1919 */ "fsubs. \000"
235 /* 1927 */ "fmsubs. \000"
236 /* 1936 */ "fnmsubs. \000"
237 /* 1946 */ "bcds. \000"
238 /* 1953 */ "fadds. \000"
239 /* 1961 */ "fmadds. \000"
240 /* 1970 */ "fnmadds. \000"
241 /* 1980 */ "fcfids. \000"
242 /* 1989 */ "fres. \000"
243 /* 1996 */ "frsqrtes. \000"
244 /* 2007 */ "mffs. \000"
245 /* 2014 */ "andis. \000"
246 /* 2022 */ "fmuls. \000"
247 /* 2030 */ "fsqrts. \000"
248 /* 2039 */ "bcdus. \000"
249 /* 2047 */ "fcfidus. \000"
250 /* 2057 */ "subfus. \000"
251 /* 2066 */ "fdivs. \000"
252 /* 2074 */ "tabort. \000"
253 /* 2083 */ "fsqrt. \000"
254 /* 2091 */ "mulhdu. \000"
255 /* 2100 */ "fcfidu. \000"
256 /* 2109 */ "fctidu. \000"
257 /* 2118 */ "divdu. \000"
258 /* 2126 */ "divdeu. \000"
259 /* 2135 */ "divweu. \000"
260 /* 2144 */ "mulhwu. \000"
261 /* 2153 */ "fctiwu. \000"
262 /* 2162 */ "divwu. \000"
263 /* 2170 */ "ddiv. \000"
264 /* 2177 */ "fdiv. \000"
265 /* 2184 */ "eqv. \000"
266 /* 2190 */ "sraw. \000"
267 /* 2197 */ "vcmpnew. \000"
268 /* 2207 */ "mulhw. \000"
269 /* 2215 */ "fctiw. \000"
270 /* 2223 */ "mullw. \000"
271 /* 2231 */ "slw. \000"
272 /* 2237 */ "srw. \000"
273 /* 2243 */ "vcmpgtsw. \000"
274 /* 2254 */ "extsw. \000"
275 /* 2262 */ "vcmpequw. \000"
276 /* 2273 */ "vcmpgtuw. \000"
277 /* 2284 */ "divw. \000"
278 /* 2291 */ "vcmpnezw. \000"
279 /* 2302 */ "cntlzw. \000"
280 /* 2311 */ "cnttzw. \000"
281 /* 2320 */ "stbcx. \000"
282 /* 2328 */ "stdcx. \000"
283 /* 2336 */ "sthcx. \000"
284 /* 2344 */ "stqcx. \000"
285 /* 2352 */ "stwcx. \000"
286 /* 2360 */ "diex. \000"
287 /* 2367 */ "dxex. \000"
288 /* 2374 */ "dcffix. \000"
289 /* 2383 */ "dctfix. \000"
290 /* 2392 */ "tlbsx. \000"
291 /* 2400 */ "drintx. \000"
292 /* 2409 */ "fctidz. \000"
293 /* 2418 */ "bcdcfz. \000"
294 /* 2427 */ "friz. \000"
295 /* 2434 */ "bcdctz. \000"
296 /* 2443 */ "fctiduz. \000"
297 /* 2453 */ "fctiwuz. \000"
298 /* 2463 */ "fctiwz. \000"
299 /* 2472 */ "mtfsb0 \000"
300 /* 2480 */ "mtfsb1 \000"
301 /* 2488 */ "dmxxextfdmr512 \000"
302 /* 2504 */ "dmxxinstdmr512 \000"
303 /* 2520 */ "vupkint4tofp32 \000"
304 /* 2536 */ "vupkint8tofp32 \000"
305 /* 2552 */ "pmxvbf16ger2 \000"
306 /* 2566 */ "pmxvf16ger2 \000"
307 /* 2579 */ "pmxvi16ger2 \000"
308 /* 2592 */ "pmdmxvbf16gerx2 \000"
309 /* 2609 */ "pmdmxvf16gerx2 \000"
310 /* 2625 */ "pmxvi8ger4 \000"
311 /* 2637 */ "pmdmxvi8gerx4 \000"
312 /* 2652 */ "vupkint4tobf16 \000"
313 /* 2668 */ "vupkint8tobf16 \000"
314 /* 2684 */ "xvcvspbf16 \000"
315 /* 2696 */ "dmxxextfdmr256 \000"
316 /* 2712 */ "dmxxinstdmr256 \000"
317 /* 2728 */ "xxgfmul128 \000"
318 /* 2740 */ "#TC_RETURNa8 \000"
319 /* 2754 */ "#TC_RETURNd8 \000"
320 /* 2768 */ "#TC_RETURNr8 \000"
321 /* 2782 */ "pmxvi4ger8 \000"
322 /* 2794 */ "#BUILD_UACC \000"
323 /* 2807 */ "#ADJCALLSTACKDOWN \000"
324 /* 2826 */ "#ADJCALLSTACKUP \000"
325 /* 2843 */ "#TC_RETURNa \000"
326 /* 2856 */ "evmhegsmfaa \000"
327 /* 2869 */ "evmhogsmfaa \000"
328 /* 2882 */ "evmwsmfaa \000"
329 /* 2893 */ "evmwssfaa \000"
330 /* 2904 */ "evmhegsmiaa \000"
331 /* 2917 */ "evmhogsmiaa \000"
332 /* 2930 */ "evmwsmiaa \000"
333 /* 2941 */ "evmhegumiaa \000"
334 /* 2954 */ "evmhogumiaa \000"
335 /* 2967 */ "evmwumiaa \000"
336 /* 2978 */ "dcba \000"
337 /* 2984 */ "bca \000"
338 /* 2989 */ "evmhesmfa \000"
339 /* 3000 */ "evmwhsmfa \000"
340 /* 3011 */ "evmhosmfa \000"
341 /* 3022 */ "evmwsmfa \000"
342 /* 3032 */ "evmhessfa \000"
343 /* 3043 */ "evmwhssfa \000"
344 /* 3054 */ "evmhossfa \000"
345 /* 3065 */ "evmwssfa \000"
346 /* 3075 */ "plha \000"
347 /* 3081 */ "evmhesmia \000"
348 /* 3092 */ "evmwhsmia \000"
349 /* 3103 */ "evmhosmia \000"
350 /* 3114 */ "evmwsmia \000"
351 /* 3124 */ "evmheumia \000"
352 /* 3135 */ "evmwhumia \000"
353 /* 3146 */ "evmwlumia \000"
354 /* 3157 */ "evmhoumia \000"
355 /* 3168 */ "evmwumia \000"
356 /* 3178 */ "bla \000"
357 /* 3183 */ "bcla \000"
358 /* 3189 */ "pla \000"
359 /* 3194 */ "bdzla \000"
360 /* 3201 */ "bdnzla \000"
361 /* 3209 */ "evmra \000"
362 /* 3216 */ "dqua \000"
363 /* 3222 */ "plwa \000"
364 /* 3228 */ "mtvsrwa \000"
365 /* 3237 */ "bdza \000"
366 /* 3243 */ "bdnza \000"
367 /* 3250 */ "vsrab \000"
368 /* 3257 */ "rfebb \000"
369 /* 3264 */ "vcntmbb \000"
370 /* 3273 */ "xvtlsbb \000"
371 /* 3282 */ "vclzlsbb \000"
372 /* 3292 */ "vctzlsbb \000"
373 /* 3302 */ "vcmpneb \000"
374 /* 3311 */ "vmrghb \000"
375 /* 3319 */ "vucmprhb \000"
376 /* 3329 */ "xxspltib \000"
377 /* 3339 */ "vmrglb \000"
378 /* 3347 */ "vclrlb \000"
379 /* 3355 */ "vucmprlb \000"
380 /* 3365 */ "vrlb \000"
381 /* 3371 */ "vslb \000"
382 /* 3377 */ "vpmsumb \000"
383 /* 3386 */ "vgnb \000"
384 /* 3392 */ "vupkhsntob \000"
385 /* 3404 */ "vupklsntob \000"
386 /* 3416 */ "cmpb \000"
387 /* 3422 */ "cmpeqb \000"
388 /* 3430 */ "cmprb \000"
389 /* 3437 */ "vclrrb \000"
390 /* 3445 */ "vsrb \000"
391 /* 3451 */ "vmulesb \000"
392 /* 3460 */ "vavgsb \000"
393 /* 3468 */ "vupkhsb \000"
394 /* 3477 */ "vspltisb \000"
395 /* 3487 */ "vupklsb \000"
396 /* 3496 */ "vminsb \000"
397 /* 3504 */ "vmulosb \000"
398 /* 3513 */ "vcmpgtsb \000"
399 /* 3523 */ "evextsb \000"
400 /* 3532 */ "vmaxsb \000"
401 /* 3540 */ "setb \000"
402 /* 3546 */ "mftb \000"
403 /* 3552 */ "vspltb \000"
404 /* 3560 */ "vpopcntb \000"
405 /* 3570 */ "vinsertb \000"
406 /* 3580 */ "pstb \000"
407 /* 3586 */ "vabsdub \000"
408 /* 3595 */ "vmuleub \000"
409 /* 3604 */ "vavgub \000"
410 /* 3612 */ "vminub \000"
411 /* 3620 */ "vmuloub \000"
412 /* 3629 */ "vcmpequb \000"
413 /* 3639 */ "efdsub \000"
414 /* 3647 */ "fsub \000"
415 /* 3653 */ "fmsub \000"
416 /* 3660 */ "fnmsub \000"
417 /* 3668 */ "efssub \000"
418 /* 3676 */ "evfssub \000"
419 /* 3685 */ "vextractub \000"
420 /* 3697 */ "vcmpgtub \000"
421 /* 3707 */ "vmaxub \000"
422 /* 3715 */ "xxblendvb \000"
423 /* 3726 */ "vcmpnezb \000"
424 /* 3736 */ "vclzb \000"
425 /* 3743 */ "vctzb \000"
426 /* 3750 */ "setnbc \000"
427 /* 3758 */ "setbc \000"
428 /* 3765 */ "xxmfacc \000"
429 /* 3774 */ "xxmtacc \000"
430 /* 3783 */ "addc \000"
431 /* 3789 */ "xxlandc \000"
432 /* 3798 */ "crandc \000"
433 /* 3806 */ "evandc \000"
434 /* 3814 */ "dtstdc \000"
435 /* 3822 */ "subfc \000"
436 /* 3829 */ "subic \000"
437 /* 3836 */ "addic \000"
438 /* 3843 */ "rldic \000"
439 /* 3850 */ "subfic \000"
440 /* 3858 */ "xsrdpic \000"
441 /* 3867 */ "xvrdpic \000"
442 /* 3876 */ "xvrspic \000"
443 /* 3885 */ "icblc \000"
444 /* 3892 */ "xxssumudmc \000"
445 /* 3904 */ "brinc \000"
446 /* 3911 */ "sync \000"
447 /* 3917 */ "xxlorc \000"
448 /* 3925 */ "crorc \000"
449 /* 3932 */ "evorc \000"
450 /* 3939 */ "sc \000"
451 /* 3943 */ "vextsb2d \000"
452 /* 3953 */ "vextsh2d \000"
453 /* 3963 */ "vextsw2d \000"
454 /* 3973 */ "#TC_RETURNd \000"
455 /* 3986 */ "vshasigmad \000"
456 /* 3998 */ "dmxxshapad \000"
457 /* 4010 */ "vsrad \000"
458 /* 4017 */ "vgbbd \000"
459 /* 4024 */ "vcntmbd \000"
460 /* 4033 */ "vprtybd \000"
461 /* 4042 */ "denbcd \000"
462 /* 4050 */ "cdtbcd \000"
463 /* 4058 */ "efdadd \000"
464 /* 4066 */ "fadd \000"
465 /* 4072 */ "xxmulmulhiadd \000"
466 /* 4087 */ "fmadd \000"
467 /* 4094 */ "fnmadd \000"
468 /* 4102 */ "xxmulmulloadd \000"
469 /* 4117 */ "efsadd \000"
470 /* 4125 */ "evfsadd \000"
471 /* 4134 */ "evldd \000"
472 /* 4141 */ "mtvsrdd \000"
473 /* 4150 */ "evstdd \000"
474 /* 4158 */ "vcfuged \000"
475 /* 4167 */ "efscfd \000"
476 /* 4175 */ "plfd \000"
477 /* 4181 */ "pstfd \000"
478 /* 4188 */ "vnegd \000"
479 /* 4195 */ "maddhd \000"
480 /* 4203 */ "mulhd \000"
481 /* 4210 */ "fcfid \000"
482 /* 4217 */ "efdcfsid \000"
483 /* 4227 */ "fctid \000"
484 /* 4234 */ "efdcfuid \000"
485 /* 4244 */ "tlbld \000"
486 /* 4251 */ "maddld \000"
487 /* 4259 */ "vmulld \000"
488 /* 4267 */ "cmpld \000"
489 /* 4274 */ "mfvsrld \000"
490 /* 4283 */ "vrld \000"
491 /* 4289 */ "vsld \000"
492 /* 4295 */ "vbpermd \000"
493 /* 4304 */ "vpmsumd \000"
494 /* 4313 */ "xxland \000"
495 /* 4321 */ "xxlnand \000"
496 /* 4330 */ "crnand \000"
497 /* 4338 */ "evnand \000"
498 /* 4346 */ "crand \000"
499 /* 4353 */ "evand \000"
500 /* 4360 */ "drrnd \000"
501 /* 4367 */ "ddedpd \000"
502 /* 4375 */ "vpdepd \000"
503 /* 4383 */ "cmpd \000"
504 /* 4389 */ "xxbrd \000"
505 /* 4396 */ "mtmsrd \000"
506 /* 4404 */ "mfvsrd \000"
507 /* 4412 */ "mtvsrd \000"
508 /* 4420 */ "vmodsd \000"
509 /* 4428 */ "vmulesd \000"
510 /* 4437 */ "vdivesd \000"
511 /* 4446 */ "vmulhsd \000"
512 /* 4455 */ "vminsd \000"
513 /* 4463 */ "vinsd \000"
514 /* 4470 */ "vmulosd \000"
515 /* 4479 */ "vcmpgtsd \000"
516 /* 4489 */ "vdivsd \000"
517 /* 4497 */ "vmaxsd \000"
518 /* 4505 */ "plxsd \000"
519 /* 4512 */ "pstxsd \000"
520 /* 4520 */ "vextractd \000"
521 /* 4531 */ "cbcdtd \000"
522 /* 4539 */ "vpopcntd \000"
523 /* 4549 */ "vinsertd \000"
524 /* 4559 */ "pstd \000"
525 /* 4565 */ "vpextd \000"
526 /* 4573 */ "vmsumcud \000"
527 /* 4583 */ "vmodud \000"
528 /* 4591 */ "vmuleud \000"
529 /* 4600 */ "vdiveud \000"
530 /* 4609 */ "vmulhud \000"
531 /* 4618 */ "vminud \000"
532 /* 4626 */ "vmuloud \000"
533 /* 4635 */ "vcmpequd \000"
534 /* 4645 */ "vcmpgtud \000"
535 /* 4655 */ "vdivud \000"
536 /* 4663 */ "vmaxud \000"
537 /* 4671 */ "xxblendvd \000"
538 /* 4682 */ "divd \000"
539 /* 4688 */ "vclzd \000"
540 /* 4695 */ "cntlzd \000"
541 /* 4703 */ "vctzd \000"
542 /* 4710 */ "cnttzd \000"
543 /* 4718 */ "mfbhrbe \000"
544 /* 4727 */ "mffsce \000"
545 /* 4735 */ "adde \000"
546 /* 4741 */ "divde \000"
547 /* 4748 */ "slbmfee \000"
548 /* 4757 */ "wrtee \000"
549 /* 4764 */ "subfe \000"
550 /* 4771 */ "evlwhe \000"
551 /* 4779 */ "evstwhe \000"
552 /* 4788 */ "slbie \000"
553 /* 4795 */ "tlbie \000"
554 /* 4802 */ "addme \000"
555 /* 4809 */ "subfme \000"
556 /* 4817 */ "tlbre \000"
557 /* 4824 */ "fre \000"
558 /* 4829 */ "slbmte \000"
559 /* 4837 */ "frsqrte \000"
560 /* 4846 */ "tlbwe \000"
561 /* 4853 */ "divwe \000"
562 /* 4860 */ "evstwwe \000"
563 /* 4869 */ "addze \000"
564 /* 4876 */ "subfze \000"
565 /* 4884 */ "dcbf \000"
566 /* 4890 */ "subf \000"
567 /* 4896 */ "evmhesmf \000"
568 /* 4906 */ "evmwhsmf \000"
569 /* 4916 */ "evmhosmf \000"
570 /* 4926 */ "evmwsmf \000"
571 /* 4935 */ "mcrf \000"
572 /* 4941 */ "mfocrf \000"
573 /* 4949 */ "mtocrf \000"
574 /* 4957 */ "mtcrf \000"
575 /* 4964 */ "efdcfsf \000"
576 /* 4973 */ "efscfsf \000"
577 /* 4982 */ "evfscfsf \000"
578 /* 4992 */ "mtfsf \000"
579 /* 4999 */ "evmhessf \000"
580 /* 5009 */ "evmwhssf \000"
581 /* 5019 */ "evmhossf \000"
582 /* 5029 */ "evmwssf \000"
583 /* 5038 */ "efdctsf \000"
584 /* 5047 */ "efsctsf \000"
585 /* 5056 */ "evfsctsf \000"
586 /* 5066 */ "dtstsf \000"
587 /* 5074 */ "efdcfuf \000"
588 /* 5083 */ "efscfuf \000"
589 /* 5092 */ "evfscfuf \000"
590 /* 5102 */ "efdctuf \000"
591 /* 5111 */ "efsctuf \000"
592 /* 5120 */ "dtstdg \000"
593 /* 5128 */ "slbieg \000"
594 /* 5136 */ "efdneg \000"
595 /* 5144 */ "fneg \000"
596 /* 5150 */ "efsneg \000"
597 /* 5158 */ "evfsneg \000"
598 /* 5167 */ "evneg \000"
599 /* 5174 */ "vsrah \000"
600 /* 5181 */ "vcntmbh \000"
601 /* 5190 */ "evldh \000"
602 /* 5197 */ "evstdh \000"
603 /* 5205 */ "vcmpneh \000"
604 /* 5214 */ "vmrghh \000"
605 /* 5222 */ "vucmprhh \000"
606 /* 5232 */ "vmrglh \000"
607 /* 5240 */ "vucmprlh \000"
608 /* 5250 */ "vrlh \000"
609 /* 5256 */ "vslh \000"
610 /* 5262 */ "vpmsumh \000"
611 /* 5271 */ "xxbrh \000"
612 /* 5278 */ "vsrh \000"
613 /* 5284 */ "dmsha2hash \000"
614 /* 5296 */ "dmsha3hash \000"
615 /* 5308 */ "vmulesh \000"
616 /* 5317 */ "vavgsh \000"
617 /* 5325 */ "vupkhsh \000"
618 /* 5334 */ "xvmulhsh \000"
619 /* 5344 */ "vspltish \000"
620 /* 5354 */ "vupklsh \000"
621 /* 5363 */ "vminsh \000"
622 /* 5371 */ "vmulosh \000"
623 /* 5380 */ "vcmpgtsh \000"
624 /* 5390 */ "evextsh \000"
625 /* 5399 */ "vmaxsh \000"
626 /* 5407 */ "vsplth \000"
627 /* 5415 */ "vpopcnth \000"
628 /* 5425 */ "vinserth \000"
629 /* 5435 */ "psth \000"
630 /* 5441 */ "vabsduh \000"
631 /* 5450 */ "vmuleuh \000"
632 /* 5459 */ "vavguh \000"
633 /* 5467 */ "xvmulhuh \000"
634 /* 5477 */ "vminuh \000"
635 /* 5485 */ "vmulouh \000"
636 /* 5494 */ "vcmpequh \000"
637 /* 5504 */ "vextractuh \000"
638 /* 5516 */ "vcmpgtuh \000"
639 /* 5526 */ "vmaxuh \000"
640 /* 5534 */ "xxblendvh \000"
641 /* 5545 */ "vcmpnezh \000"
642 /* 5555 */ "vclzh \000"
643 /* 5562 */ "vctzh \000"
644 /* 5569 */ "dquai \000"
645 /* 5576 */ "dcbi \000"
646 /* 5582 */ "icbi \000"
647 /* 5588 */ "vsldbi \000"
648 /* 5596 */ "vsrdbi \000"
649 /* 5604 */ "psubi \000"
650 /* 5611 */ "dccci \000"
651 /* 5618 */ "iccci \000"
652 /* 5625 */ "sradi \000"
653 /* 5632 */ "paddi \000"
654 /* 5639 */ "cmpldi \000"
655 /* 5647 */ "clrlsldi \000"
656 /* 5657 */ "extldi \000"
657 /* 5665 */ "xxpermdi \000"
658 /* 5675 */ "cmpdi \000"
659 /* 5682 */ "clrrdi \000"
660 /* 5690 */ "insrdi \000"
661 /* 5698 */ "rotrdi \000"
662 /* 5706 */ "extrdi \000"
663 /* 5714 */ "tdi \000"
664 /* 5719 */ "wrteei \000"
665 /* 5727 */ "mtfsfi \000"
666 /* 5735 */ "dtstsfi \000"
667 /* 5744 */ "evsplatfi \000"
668 /* 5755 */ "evmergehi \000"
669 /* 5766 */ "evmergelohi \000"
670 /* 5779 */ "tlbli \000"
671 /* 5786 */ "dscli \000"
672 /* 5793 */ "mulli \000"
673 /* 5800 */ "pli \000"
674 /* 5805 */ "extswsli \000"
675 /* 5815 */ "mtvsrbmi \000"
676 /* 5825 */ "vrldmi \000"
677 /* 5833 */ "rldimi \000"
678 /* 5841 */ "rlwimi \000"
679 /* 5849 */ "vrlqmi \000"
680 /* 5857 */ "evmhesmi \000"
681 /* 5867 */ "evmwhsmi \000"
682 /* 5877 */ "evmhosmi \000"
683 /* 5887 */ "evmwsmi \000"
684 /* 5896 */ "evmheumi \000"
685 /* 5906 */ "evmwhumi \000"
686 /* 5916 */ "evmwlumi \000"
687 /* 5926 */ "evmhoumi \000"
688 /* 5936 */ "evmwumi \000"
689 /* 5945 */ "vrlwmi \000"
690 /* 5953 */ "mffscrni \000"
691 /* 5963 */ "mffscdrni \000"
692 /* 5974 */ "vsldoi \000"
693 /* 5982 */ "xsrdpi \000"
694 /* 5990 */ "xvrdpi \000"
695 /* 5998 */ "xsrqpi \000"
696 /* 6006 */ "xvrspi \000"
697 /* 6014 */ "dscri \000"
698 /* 6021 */ "xori \000"
699 /* 6027 */ "efdcfsi \000"
700 /* 6036 */ "efscfsi \000"
701 /* 6045 */ "evfscfsi \000"
702 /* 6055 */ "efdctsi \000"
703 /* 6064 */ "efsctsi \000"
704 /* 6073 */ "evfsctsi \000"
705 /* 6083 */ "evsplati \000"
706 /* 6093 */ "efdcfui \000"
707 /* 6102 */ "efscfui \000"
708 /* 6111 */ "evfscfui \000"
709 /* 6121 */ "efdctui \000"
710 /* 6130 */ "efsctui \000"
711 /* 6139 */ "evfsctui \000"
712 /* 6149 */ "srawi \000"
713 /* 6156 */ "xxsldwi \000"
714 /* 6165 */ "cmplwi \000"
715 /* 6173 */ "evrlwi \000"
716 /* 6181 */ "clrlslwi \000"
717 /* 6191 */ "inslwi \000"
718 /* 6199 */ "evslwi \000"
719 /* 6207 */ "extlwi \000"
720 /* 6215 */ "cmpwi \000"
721 /* 6222 */ "clrrwi \000"
722 /* 6230 */ "insrwi \000"
723 /* 6238 */ "rotrwi \000"
724 /* 6246 */ "extrwi \000"
725 /* 6254 */ "lswi \000"
726 /* 6260 */ "stswi \000"
727 /* 6267 */ "twi \000"
728 /* 6272 */ "tcheck \000"
729 /* 6280 */ "hashchk \000"
730 /* 6289 */ "xxeval \000"
731 /* 6297 */ "vstribl \000"
732 /* 6306 */ "bcl \000"
733 /* 6311 */ "rldcl \000"
734 /* 6318 */ "rldicl \000"
735 /* 6326 */ "tlbiel \000"
736 /* 6334 */ "fsel \000"
737 /* 6340 */ "isel \000"
738 /* 6346 */ "vsel \000"
739 /* 6352 */ "xxsel \000"
740 /* 6359 */ "dcbfl \000"
741 /* 6366 */ "vstrihl \000"
742 /* 6375 */ "lxvprll \000"
743 /* 6384 */ "stxvprll \000"
744 /* 6394 */ "lxvrll \000"
745 /* 6402 */ "stxvrll \000"
746 /* 6411 */ "lxvll \000"
747 /* 6418 */ "stxvll \000"
748 /* 6426 */ "mtlpl \000"
749 /* 6433 */ "bclrl \000"
750 /* 6440 */ "lxvprl \000"
751 /* 6448 */ "stxvprl \000"
752 /* 6457 */ "bcctrl \000"
753 /* 6465 */ "lxvrl \000"
754 /* 6472 */ "stxvrl \000"
755 /* 6480 */ "mffsl \000"
756 /* 6487 */ "lvsl \000"
757 /* 6493 */ "efdmul \000"
758 /* 6501 */ "fmul \000"
759 /* 6507 */ "xxmulmul \000"
760 /* 6517 */ "efsmul \000"
761 /* 6525 */ "evfsmul \000"
762 /* 6534 */ "lxvl \000"
763 /* 6540 */ "stxvl \000"
764 /* 6547 */ "lvxl \000"
765 /* 6553 */ "stvxl \000"
766 /* 6560 */ "dcbzl \000"
767 /* 6567 */ "bdzl \000"
768 /* 6573 */ "bdnzl \000"
769 /* 6580 */ "vexpandbm \000"
770 /* 6591 */ "vmsummbm \000"
771 /* 6601 */ "mtvsrbm \000"
772 /* 6610 */ "vextractbm \000"
773 /* 6622 */ "vsububm \000"
774 /* 6631 */ "vaddubm \000"
775 /* 6640 */ "vmsumubm \000"
776 /* 6650 */ "xxgenpcvbm \000"
777 /* 6662 */ "vexpanddm \000"
778 /* 6673 */ "mtvsrdm \000"
779 /* 6682 */ "vextractdm \000"
780 /* 6694 */ "vsubudm \000"
781 /* 6703 */ "vaddudm \000"
782 /* 6712 */ "vmsumudm \000"
783 /* 6722 */ "xxssumudm \000"
784 /* 6733 */ "xxgenpcvdm \000"
785 /* 6745 */ "vclzdm \000"
786 /* 6753 */ "cntlzdm \000"
787 /* 6762 */ "vctzdm \000"
788 /* 6770 */ "cnttzdm \000"
789 /* 6779 */ "vexpandhm \000"
790 /* 6790 */ "mtvsrhm \000"
791 /* 6799 */ "vmsumshm \000"
792 /* 6809 */ "vextracthm \000"
793 /* 6821 */ "xvsubuhm \000"
794 /* 6831 */ "vmladduhm \000"
795 /* 6842 */ "xvadduhm \000"
796 /* 6852 */ "xvmuluhm \000"
797 /* 6862 */ "vmsumuhm \000"
798 /* 6872 */ "xxgenpcvhm \000"
799 /* 6884 */ "vrfim \000"
800 /* 6891 */ "xsrdpim \000"
801 /* 6900 */ "xvrdpim \000"
802 /* 6909 */ "xvrspim \000"
803 /* 6918 */ "frim \000"
804 /* 6924 */ "vrldnm \000"
805 /* 6932 */ "rlwinm \000"
806 /* 6940 */ "vrlqnm \000"
807 /* 6948 */ "vrlwnm \000"
808 /* 6956 */ "vexpandqm \000"
809 /* 6967 */ "mtvsrqm \000"
810 /* 6976 */ "vextractqm \000"
811 /* 6988 */ "xsmerge2t1uqm \000"
812 /* 7003 */ "xsrebase2t1uqm \000"
813 /* 7019 */ "xsmerge3t1uqm \000"
814 /* 7034 */ "xsrebase3t1uqm \000"
815 /* 7050 */ "xsmerge2t2uqm \000"
816 /* 7065 */ "xsrebase2t2uqm \000"
817 /* 7081 */ "xsrebase3t2uqm \000"
818 /* 7097 */ "xsmerge2t3uqm \000"
819 /* 7112 */ "xsrebase2t3uqm \000"
820 /* 7128 */ "xsrebase3t3uqm \000"
821 /* 7144 */ "xsrebase2t4uqm \000"
822 /* 7160 */ "xsaddsubuqm \000"
823 /* 7173 */ "vsubuqm \000"
824 /* 7182 */ "xsaddadduqm \000"
825 /* 7195 */ "vadduqm \000"
826 /* 7204 */ "vsubeuqm \000"
827 /* 7214 */ "vaddeuqm \000"
828 /* 7224 */ "xsaddsubsuqm \000"
829 /* 7238 */ "xsaddaddsuqm \000"
830 /* 7252 */ "vperm \000"
831 /* 7259 */ "xxperm \000"
832 /* 7267 */ "vpkudum \000"
833 /* 7276 */ "vpkuhum \000"
834 /* 7285 */ "vpkuwum \000"
835 /* 7294 */ "vexpandwm \000"
836 /* 7305 */ "mtvsrwm \000"
837 /* 7314 */ "vextractwm \000"
838 /* 7326 */ "xvsubuwm \000"
839 /* 7336 */ "xvadduwm \000"
840 /* 7346 */ "xvmuluwm \000"
841 /* 7356 */ "xxgenpcvwm \000"
842 /* 7368 */ "evmhegsmfan \000"
843 /* 7381 */ "evmhogsmfan \000"
844 /* 7394 */ "evmwsmfan \000"
845 /* 7405 */ "evmwssfan \000"
846 /* 7416 */ "evmhegsmian \000"
847 /* 7429 */ "evmhogsmian \000"
848 /* 7442 */ "evmwsmian \000"
849 /* 7453 */ "evmhegumian \000"
850 /* 7466 */ "evmhogumian \000"
851 /* 7479 */ "evmwumian \000"
852 /* 7490 */ "fcpsgn \000"
853 /* 7498 */ "vucmprhn \000"
854 /* 7508 */ "vrfin \000"
855 /* 7515 */ "frin \000"
856 /* 7521 */ "mfsrin \000"
857 /* 7529 */ "mtsrin \000"
858 /* 7537 */ "vucmprln \000"
859 /* 7547 */ "pmxvbf16ger2nn \000"
860 /* 7563 */ "pmxvf16ger2nn \000"
861 /* 7578 */ "pmdmxvbf16gerx2nn \000"
862 /* 7597 */ "pmdmxvf16gerx2nn \000"
863 /* 7615 */ "pmxvf32gernn \000"
864 /* 7629 */ "pmxvf64gernn \000"
865 /* 7643 */ "pmxvbf16ger2pn \000"
866 /* 7659 */ "pmxvf16ger2pn \000"
867 /* 7674 */ "pmdmxvbf16gerx2pn \000"
868 /* 7693 */ "pmdmxvf16gerx2pn \000"
869 /* 7711 */ "xscvspdpn \000"
870 /* 7722 */ "pmxvf32gerpn \000"
871 /* 7736 */ "pmxvf64gerpn \000"
872 /* 7750 */ "xvcvbf16spn \000"
873 /* 7763 */ "xscvdpspn \000"
874 /* 7774 */ "darn \000"
875 /* 7780 */ "mffscrn \000"
876 /* 7789 */ "mffscdrn \000"
877 /* 7799 */ "drintn \000"
878 /* 7807 */ "addco \000"
879 /* 7814 */ "subfco \000"
880 /* 7822 */ "addo \000"
881 /* 7828 */ "mulldo \000"
882 /* 7836 */ "divdo \000"
883 /* 7843 */ "addeo \000"
884 /* 7850 */ "divdeo \000"
885 /* 7858 */ "subfeo \000"
886 /* 7866 */ "addmeo \000"
887 /* 7874 */ "subfmeo \000"
888 /* 7883 */ "divweo \000"
889 /* 7891 */ "addzeo \000"
890 /* 7899 */ "subfzeo \000"
891 /* 7908 */ "subfo \000"
892 /* 7915 */ "nego \000"
893 /* 7921 */ "evstwho \000"
894 /* 7930 */ "tlbsyncio \000"
895 /* 7941 */ "ptesyncio \000"
896 /* 7952 */ "tlbieio \000"
897 /* 7961 */ "evmergelo \000"
898 /* 7972 */ "evmergehilo \000"
899 /* 7985 */ "vslo \000"
900 /* 7991 */ "xscvqpdpo \000"
901 /* 8002 */ "dcmpo \000"
902 /* 8009 */ "fcmpo \000"
903 /* 8016 */ "xsnmsubqpo \000"
904 /* 8028 */ "xsmsubqpo \000"
905 /* 8039 */ "xssubqpo \000"
906 /* 8049 */ "xsnmaddqpo \000"
907 /* 8061 */ "xsmaddqpo \000"
908 /* 8072 */ "xsaddqpo \000"
909 /* 8082 */ "xsmulqpo \000"
910 /* 8092 */ "xssqrtqpo \000"
911 /* 8103 */ "xsdivqpo \000"
912 /* 8113 */ "vsro \000"
913 /* 8119 */ "divduo \000"
914 /* 8127 */ "divdeuo \000"
915 /* 8136 */ "divweuo \000"
916 /* 8145 */ "divwuo \000"
917 /* 8153 */ "mullwo \000"
918 /* 8161 */ "divwo \000"
919 /* 8168 */ "evstwwo \000"
920 /* 8177 */ "xxaesdecp \000"
921 /* 8188 */ "xxaesencp \000"
922 /* 8199 */ "xsnmsubadp \000"
923 /* 8211 */ "xvnmsubadp \000"
924 /* 8223 */ "xsmsubadp \000"
925 /* 8234 */ "xvmsubadp \000"
926 /* 8245 */ "xsnmaddadp \000"
927 /* 8257 */ "xvnmaddadp \000"
928 /* 8269 */ "xsmaddadp \000"
929 /* 8280 */ "xvmaddadp \000"
930 /* 8291 */ "xssubdp \000"
931 /* 8300 */ "xvsubdp \000"
932 /* 8309 */ "xststdcdp \000"
933 /* 8320 */ "xvtstdcdp \000"
934 /* 8331 */ "xsmincdp \000"
935 /* 8341 */ "xsmaxcdp \000"
936 /* 8351 */ "xsadddp \000"
937 /* 8360 */ "xvadddp \000"
938 /* 8369 */ "xscvsxddp \000"
939 /* 8380 */ "xvcvsxddp \000"
940 /* 8391 */ "xscvuxddp \000"
941 /* 8402 */ "xvcvuxddp \000"
942 /* 8413 */ "xscmpgedp \000"
943 /* 8424 */ "xvcmpgedp \000"
944 /* 8435 */ "xsredp \000"
945 /* 8443 */ "xvredp \000"
946 /* 8451 */ "xsrsqrtedp \000"
947 /* 8463 */ "xvrsqrtedp \000"
948 /* 8475 */ "xsnegdp \000"
949 /* 8484 */ "xvnegdp \000"
950 /* 8493 */ "xsxsigdp \000"
951 /* 8503 */ "xvxsigdp \000"
952 /* 8513 */ "xxspltidp \000"
953 /* 8524 */ "xsminjdp \000"
954 /* 8534 */ "xsmaxjdp \000"
955 /* 8544 */ "xsmuldp \000"
956 /* 8553 */ "xvmuldp \000"
957 /* 8562 */ "xsnmsubmdp \000"
958 /* 8574 */ "xvnmsubmdp \000"
959 /* 8586 */ "xsmsubmdp \000"
960 /* 8597 */ "xvmsubmdp \000"
961 /* 8608 */ "xsnmaddmdp \000"
962 /* 8620 */ "xvnmaddmdp \000"
963 /* 8632 */ "xsmaddmdp \000"
964 /* 8643 */ "xvmaddmdp \000"
965 /* 8654 */ "xscpsgndp \000"
966 /* 8665 */ "xvcpsgndp \000"
967 /* 8676 */ "xsmindp \000"
968 /* 8685 */ "xvmindp \000"
969 /* 8694 */ "msgsndp \000"
970 /* 8703 */ "xscmpodp \000"
971 /* 8713 */ "xscvhpdp \000"
972 /* 8723 */ "xscvqpdp \000"
973 /* 8733 */ "xscvspdp \000"
974 /* 8743 */ "xvcvspdp \000"
975 /* 8753 */ "xsiexpdp \000"
976 /* 8763 */ "xviexpdp \000"
977 /* 8773 */ "xscmpexpdp \000"
978 /* 8785 */ "xsxexpdp \000"
979 /* 8795 */ "xvxexpdp \000"
980 /* 8805 */ "xscmpeqdp \000"
981 /* 8816 */ "xvcmpeqdp \000"
982 /* 8827 */ "xsnabsdp \000"
983 /* 8837 */ "xvnabsdp \000"
984 /* 8847 */ "xsabsdp \000"
985 /* 8856 */ "xvabsdp \000"
986 /* 8865 */ "dctdp \000"
987 /* 8872 */ "xscmpgtdp \000"
988 /* 8883 */ "xvcmpgtdp \000"
989 /* 8894 */ "xssqrtdp \000"
990 /* 8904 */ "xstsqrtdp \000"
991 /* 8915 */ "xvtsqrtdp \000"
992 /* 8926 */ "xvsqrtdp \000"
993 /* 8936 */ "xscmpudp \000"
994 /* 8946 */ "xsdivdp \000"
995 /* 8955 */ "xstdivdp \000"
996 /* 8965 */ "xvtdivdp \000"
997 /* 8975 */ "xvdivdp \000"
998 /* 8984 */ "xvcvsxwdp \000"
999 /* 8995 */ "xvcvuxwdp \000"
1000 /* 9006 */ "xsmaxdp \000"
1001 /* 9015 */ "xvmaxdp \000"
1002 /* 9024 */ "dcbfep \000"
1003 /* 9032 */ "icbiep \000"
1004 /* 9040 */ "tlbiep \000"
1005 /* 9048 */ "dcbzlep \000"
1006 /* 9057 */ "dcbtep \000"
1007 /* 9065 */ "dcbstep \000"
1008 /* 9074 */ "dcbtstep \000"
1009 /* 9084 */ "dcbzep \000"
1010 /* 9092 */ "vcmpbfp \000"
1011 /* 9101 */ "vnmsubfp \000"
1012 /* 9111 */ "vsubfp \000"
1013 /* 9119 */ "vmaddfp \000"
1014 /* 9128 */ "vaddfp \000"
1015 /* 9136 */ "vlogefp \000"
1016 /* 9145 */ "vcmpgefp \000"
1017 /* 9155 */ "vrefp \000"
1018 /* 9162 */ "vexptefp \000"
1019 /* 9172 */ "vrsqrtefp \000"
1020 /* 9183 */ "vminfp \000"
1021 /* 9191 */ "vcmpeqfp \000"
1022 /* 9201 */ "vcmpgtfp \000"
1023 /* 9211 */ "vmaxfp \000"
1024 /* 9219 */ "xscvdphp \000"
1025 /* 9229 */ "xvcvsphp \000"
1026 /* 9239 */ "vrfip \000"
1027 /* 9246 */ "xsrdpip \000"
1028 /* 9255 */ "xvrdpip \000"
1029 /* 9264 */ "xvrspip \000"
1030 /* 9273 */ "frip \000"
1031 /* 9279 */ "hashchkp \000"
1032 /* 9289 */ "xxaesgenlkp \000"
1033 /* 9302 */ "dcbflp \000"
1034 /* 9310 */ "pmxvbf16ger2np \000"
1035 /* 9326 */ "pmxvf16ger2np \000"
1036 /* 9341 */ "pmdmxvbf16gerx2np \000"
1037 /* 9360 */ "pmdmxvf16gerx2np \000"
1038 /* 9378 */ "pmxvf32gernp \000"
1039 /* 9392 */ "pmxvf64gernp \000"
1040 /* 9406 */ "pmxvbf16ger2pp \000"
1041 /* 9422 */ "pmxvf16ger2pp \000"
1042 /* 9437 */ "pmxvi16ger2pp \000"
1043 /* 9452 */ "pmdmxvbf16gerx2pp \000"
1044 /* 9471 */ "pmdmxvf16gerx2pp \000"
1045 /* 9489 */ "pmxvi8ger4pp \000"
1046 /* 9503 */ "pmdmxvi8gerx4pp \000"
1047 /* 9520 */ "pmxvi4ger8pp \000"
1048 /* 9534 */ "pmxvf32gerpp \000"
1049 /* 9548 */ "pmxvf64gerpp \000"
1050 /* 9562 */ "pmxvi16ger2spp \000"
1051 /* 9578 */ "pmxvi8ger4spp \000"
1052 /* 9593 */ "pmdmxvi8gerx4spp \000"
1053 /* 9611 */ "xsnmsubqp \000"
1054 /* 9622 */ "xsmsubqp \000"
1055 /* 9632 */ "xssubqp \000"
1056 /* 9641 */ "xststdcqp \000"
1057 /* 9652 */ "xsmincqp \000"
1058 /* 9662 */ "xsmaxcqp \000"
1059 /* 9672 */ "xsnmaddqp \000"
1060 /* 9683 */ "xsmaddqp \000"
1061 /* 9693 */ "xsaddqp \000"
1062 /* 9702 */ "xscvsdqp \000"
1063 /* 9712 */ "xscvudqp \000"
1064 /* 9722 */ "xscmpgeqp \000"
1065 /* 9733 */ "xsnegqp \000"
1066 /* 9742 */ "xsxsigqp \000"
1067 /* 9752 */ "xsmulqp \000"
1068 /* 9761 */ "xscpsgnqp \000"
1069 /* 9772 */ "xscmpoqp \000"
1070 /* 9782 */ "xscvdpqp \000"
1071 /* 9792 */ "xsiexpqp \000"
1072 /* 9802 */ "xscmpexpqp \000"
1073 /* 9814 */ "xsxexpqp \000"
1074 /* 9824 */ "xscmpeqqp \000"
1075 /* 9835 */ "xscvsqqp \000"
1076 /* 9845 */ "xscvuqqp \000"
1077 /* 9855 */ "xsnabsqp \000"
1078 /* 9865 */ "xsabsqp \000"
1079 /* 9874 */ "xscmpgtqp \000"
1080 /* 9885 */ "xssqrtqp \000"
1081 /* 9895 */ "xscmpuqp \000"
1082 /* 9905 */ "xsdivqp \000"
1083 /* 9914 */ "xsnmsubasp \000"
1084 /* 9926 */ "xvnmsubasp \000"
1085 /* 9938 */ "xsmsubasp \000"
1086 /* 9949 */ "xvmsubasp \000"
1087 /* 9960 */ "xsnmaddasp \000"
1088 /* 9972 */ "xvnmaddasp \000"
1089 /* 9984 */ "xsmaddasp \000"
1090 /* 9995 */ "xvmaddasp \000"
1091 /* 10006 */ "xssubsp \000"
1092 /* 10015 */ "xvsubsp \000"
1093 /* 10024 */ "xststdcsp \000"
1094 /* 10035 */ "xvtstdcsp \000"
1095 /* 10046 */ "xsaddsp \000"
1096 /* 10055 */ "xvaddsp \000"
1097 /* 10064 */ "xscvsxdsp \000"
1098 /* 10075 */ "xvcvsxdsp \000"
1099 /* 10086 */ "xscvuxdsp \000"
1100 /* 10097 */ "xvcvuxdsp \000"
1101 /* 10108 */ "xvcmpgesp \000"
1102 /* 10119 */ "xsresp \000"
1103 /* 10127 */ "xvresp \000"
1104 /* 10135 */ "xsrsqrtesp \000"
1105 /* 10147 */ "xvrsqrtesp \000"
1106 /* 10159 */ "xvnegsp \000"
1107 /* 10168 */ "xvxsigsp \000"
1108 /* 10178 */ "xsmulsp \000"
1109 /* 10187 */ "xvmulsp \000"
1110 /* 10196 */ "xsnmsubmsp \000"
1111 /* 10208 */ "xvnmsubmsp \000"
1112 /* 10220 */ "xsmsubmsp \000"
1113 /* 10231 */ "xvmsubmsp \000"
1114 /* 10242 */ "xsnmaddmsp \000"
1115 /* 10254 */ "xvnmaddmsp \000"
1116 /* 10266 */ "xsmaddmsp \000"
1117 /* 10277 */ "xvmaddmsp \000"
1118 /* 10288 */ "xvcpsgnsp \000"
1119 /* 10299 */ "xvminsp \000"
1120 /* 10308 */ "xscvdpsp \000"
1121 /* 10318 */ "xvcvdpsp \000"
1122 /* 10328 */ "xvcvhpsp \000"
1123 /* 10338 */ "xviexpsp \000"
1124 /* 10348 */ "xvxexpsp \000"
1125 /* 10358 */ "xvcmpeqsp \000"
1126 /* 10369 */ "drsp \000"
1127 /* 10375 */ "frsp \000"
1128 /* 10381 */ "xsrsp \000"
1129 /* 10388 */ "xvnabssp \000"
1130 /* 10398 */ "xvabssp \000"
1131 /* 10407 */ "plxssp \000"
1132 /* 10415 */ "pstxssp \000"
1133 /* 10424 */ "xvcmpgtsp \000"
1134 /* 10435 */ "xssqrtsp \000"
1135 /* 10445 */ "xvtsqrtsp \000"
1136 /* 10456 */ "xvsqrtsp \000"
1137 /* 10466 */ "xsdivsp \000"
1138 /* 10475 */ "xvtdivsp \000"
1139 /* 10485 */ "xvdivsp \000"
1140 /* 10494 */ "xvcvsxwsp \000"
1141 /* 10505 */ "xvcvuxwsp \000"
1142 /* 10516 */ "xvmaxsp \000"
1143 /* 10525 */ "hashstp \000"
1144 /* 10534 */ "plxvp \000"
1145 /* 10541 */ "pstxvp \000"
1146 /* 10549 */ "xsrqpxp \000"
1147 /* 10558 */ "vextsd2q \000"
1148 /* 10568 */ "vsraq \000"
1149 /* 10575 */ "dquaq \000"
1150 /* 10582 */ "dsubq \000"
1151 /* 10589 */ "vprtybq \000"
1152 /* 10598 */ "dtstdcq \000"
1153 /* 10607 */ "denbcdq \000"
1154 /* 10616 */ "daddq \000"
1155 /* 10623 */ "drrndq \000"
1156 /* 10631 */ "ddedpdq \000"
1157 /* 10640 */ "efdcmpeq \000"
1158 /* 10650 */ "efscmpeq \000"
1159 /* 10660 */ "evfscmpeq \000"
1160 /* 10671 */ "evcmpeq \000"
1161 /* 10680 */ "efdtsteq \000"
1162 /* 10690 */ "efststeq \000"
1163 /* 10700 */ "evfststeq \000"
1164 /* 10711 */ "dtstsfq \000"
1165 /* 10720 */ "dtstdgq \000"
1166 /* 10729 */ "dquaiq \000"
1167 /* 10737 */ "dtstsfiq \000"
1168 /* 10747 */ "dscliq \000"
1169 /* 10755 */ "dscriq \000"
1170 /* 10763 */ "lxvkq \000"
1171 /* 10770 */ "vrlq \000"
1172 /* 10776 */ "vslq \000"
1173 /* 10782 */ "dmulq \000"
1174 /* 10789 */ "vbpermq \000"
1175 /* 10798 */ "drintnq \000"
1176 /* 10807 */ "dcmpoq \000"
1177 /* 10815 */ "drdpq \000"
1178 /* 10822 */ "dctqpq \000"
1179 /* 10830 */ "dcffixqq \000"
1180 /* 10840 */ "dctfixqq \000"
1181 /* 10850 */ "xxbrq \000"
1182 /* 10857 */ "vsrq \000"
1183 /* 10863 */ "vmodsq \000"
1184 /* 10871 */ "vdivesq \000"
1185 /* 10880 */ "vcmpsq \000"
1186 /* 10888 */ "vcmpgtsq \000"
1187 /* 10898 */ "vdivsq \000"
1188 /* 10906 */ "stq \000"
1189 /* 10911 */ "vmul10uq \000"
1190 /* 10921 */ "vmul10cuq \000"
1191 /* 10932 */ "vsubcuq \000"
1192 /* 10941 */ "vaddcuq \000"
1193 /* 10950 */ "vmul10ecuq \000"
1194 /* 10962 */ "vsubecuq \000"
1195 /* 10972 */ "vaddecuq \000"
1196 /* 10982 */ "vmoduq \000"
1197 /* 10990 */ "vmul10euq \000"
1198 /* 11001 */ "vdiveuq \000"
1199 /* 11010 */ "dcmpuq \000"
1200 /* 11018 */ "vcmpuq \000"
1201 /* 11026 */ "vcmpequq \000"
1202 /* 11036 */ "vcmpgtuq \000"
1203 /* 11046 */ "vdivuq \000"
1204 /* 11054 */ "ddivq \000"
1205 /* 11061 */ "diexq \000"
1206 /* 11068 */ "dtstexq \000"
1207 /* 11077 */ "dxexq \000"
1208 /* 11084 */ "dcffixq \000"
1209 /* 11093 */ "dctfixq \000"
1210 /* 11102 */ "drintxq \000"
1211 /* 11111 */ "#TC_RETURNr \000"
1212 /* 11124 */ "mbar \000"
1213 /* 11130 */ "vstribr \000"
1214 /* 11139 */ "setnbcr \000"
1215 /* 11148 */ "setbcr \000"
1216 /* 11156 */ "mfdcr \000"
1217 /* 11163 */ "rldcr \000"
1218 /* 11170 */ "mtdcr \000"
1219 /* 11177 */ "mfcr \000"
1220 /* 11183 */ "rldicr \000"
1221 /* 11191 */ "mfvscr \000"
1222 /* 11199 */ "mtvscr \000"
1223 /* 11207 */ "pmxvf32ger \000"
1224 /* 11219 */ "pmxvf64ger \000"
1225 /* 11231 */ "vncipher \000"
1226 /* 11241 */ "vcipher \000"
1227 /* 11250 */ "vstrihr \000"
1228 /* 11259 */ "bclr \000"
1229 /* 11265 */ "mflr \000"
1230 /* 11271 */ "mtlr \000"
1231 /* 11277 */ "fmr \000"
1232 /* 11282 */ "dmmr \000"
1233 /* 11288 */ "mfpmr \000"
1234 /* 11295 */ "mtpmr \000"
1235 /* 11302 */ "vpermr \000"
1236 /* 11310 */ "xxpermr \000"
1237 /* 11319 */ "xxlor \000"
1238 /* 11326 */ "xxlnor \000"
1239 /* 11334 */ "crnor \000"
1240 /* 11341 */ "evnor \000"
1241 /* 11348 */ "cror \000"
1242 /* 11354 */ "evor \000"
1243 /* 11360 */ "xxlxor \000"
1244 /* 11368 */ "dmxor \000"
1245 /* 11375 */ "vpermxor \000"
1246 /* 11385 */ "crxor \000"
1247 /* 11392 */ "evxor \000"
1248 /* 11399 */ "mfspr \000"
1249 /* 11406 */ "mtspr \000"
1250 /* 11413 */ "mfsr \000"
1251 /* 11419 */ "mfmsr \000"
1252 /* 11426 */ "mtmsr \000"
1253 /* 11433 */ "mtsr \000"
1254 /* 11439 */ "lvsr \000"
1255 /* 11445 */ "bcctr \000"
1256 /* 11452 */ "mfctr \000"
1257 /* 11459 */ "mtctr \000"
1258 /* 11466 */ "pmxvi16ger2s \000"
1259 /* 11480 */ "addg6s \000"
1260 /* 11488 */ "efdabs \000"
1261 /* 11496 */ "fabs \000"
1262 /* 11502 */ "efdnabs \000"
1263 /* 11511 */ "fnabs \000"
1264 /* 11518 */ "efsnabs \000"
1265 /* 11527 */ "evfsnabs \000"
1266 /* 11537 */ "efsabs \000"
1267 /* 11545 */ "evfsabs \000"
1268 /* 11554 */ "evabs \000"
1269 /* 11561 */ "vsum4sbs \000"
1270 /* 11571 */ "vsubsbs \000"
1271 /* 11580 */ "vaddsbs \000"
1272 /* 11589 */ "vsum4ubs \000"
1273 /* 11599 */ "vsububs \000"
1274 /* 11608 */ "vaddubs \000"
1275 /* 11617 */ "fsubs \000"
1276 /* 11624 */ "fmsubs \000"
1277 /* 11632 */ "fnmsubs \000"
1278 /* 11641 */ "fadds \000"
1279 /* 11648 */ "fmadds \000"
1280 /* 11656 */ "fnmadds \000"
1281 /* 11665 */ "fcfids \000"
1282 /* 11673 */ "dcbtds \000"
1283 /* 11681 */ "dcbtstds \000"
1284 /* 11691 */ "xscvdpsxds \000"
1285 /* 11703 */ "xvcvdpsxds \000"
1286 /* 11715 */ "xvcvspsxds \000"
1287 /* 11727 */ "xscvdpuxds \000"
1288 /* 11739 */ "xvcvdpuxds \000"
1289 /* 11751 */ "xvcvspuxds \000"
1290 /* 11763 */ "fres \000"
1291 /* 11769 */ "frsqrtes \000"
1292 /* 11779 */ "efdcfs \000"
1293 /* 11787 */ "mffs \000"
1294 /* 11793 */ "plfs \000"
1295 /* 11799 */ "mcrfs \000"
1296 /* 11806 */ "pstfs \000"
1297 /* 11813 */ "vsum4shs \000"
1298 /* 11823 */ "vsubshs \000"
1299 /* 11832 */ "vmhaddshs \000"
1300 /* 11843 */ "vmhraddshs \000"
1301 /* 11855 */ "vaddshs \000"
1302 /* 11864 */ "vmsumshs \000"
1303 /* 11874 */ "vsubuhs \000"
1304 /* 11883 */ "vadduhs \000"
1305 /* 11892 */ "vmsumuhs \000"
1306 /* 11902 */ "subis \000"
1307 /* 11909 */ "subpcis \000"
1308 /* 11918 */ "addpcis \000"
1309 /* 11927 */ "paddis \000"
1310 /* 11935 */ "lis \000"
1311 /* 11940 */ "xoris \000"
1312 /* 11947 */ "evsrwis \000"
1313 /* 11956 */ "icbtls \000"
1314 /* 11964 */ "fmuls \000"
1315 /* 11971 */ "evlwhos \000"
1316 /* 11980 */ "dcbfps \000"
1317 /* 11988 */ "dcbstps \000"
1318 /* 11997 */ "vpksdss \000"
1319 /* 12006 */ "vpkshss \000"
1320 /* 12015 */ "vpkswss \000"
1321 /* 12024 */ "evcmpgts \000"
1322 /* 12034 */ "evcmplts \000"
1323 /* 12044 */ "fsqrts \000"
1324 /* 12052 */ "fcfidus \000"
1325 /* 12061 */ "vpksdus \000"
1326 /* 12070 */ "vpkudus \000"
1327 /* 12079 */ "subfus \000"
1328 /* 12087 */ "vpkshus \000"
1329 /* 12096 */ "vpkuhus \000"
1330 /* 12105 */ "vpkswus \000"
1331 /* 12114 */ "vpkuwus \000"
1332 /* 12123 */ "fdivs \000"
1333 /* 12130 */ "evsrws \000"
1334 /* 12138 */ "mtvsrws \000"
1335 /* 12147 */ "vsum2sws \000"
1336 /* 12157 */ "vsubsws \000"
1337 /* 12166 */ "vaddsws \000"
1338 /* 12175 */ "vsumsws \000"
1339 /* 12184 */ "vsubuws \000"
1340 /* 12193 */ "vadduws \000"
1341 /* 12202 */ "evdivws \000"
1342 /* 12211 */ "xscvdpsxws \000"
1343 /* 12223 */ "xvcvdpsxws \000"
1344 /* 12235 */ "xvcvspsxws \000"
1345 /* 12247 */ "xscvdpuxws \000"
1346 /* 12259 */ "xvcvdpuxws \000"
1347 /* 12271 */ "xvcvspuxws \000"
1348 /* 12283 */ "vctsxs \000"
1349 /* 12291 */ "vctuxs \000"
1350 /* 12299 */ "ldat \000"
1351 /* 12305 */ "stdat \000"
1352 /* 12312 */ "evlhhesplat \000"
1353 /* 12325 */ "evlwhsplat \000"
1354 /* 12337 */ "evlhhossplat \000"
1355 /* 12351 */ "evlhhousplat \000"
1356 /* 12365 */ "evlwwsplat \000"
1357 /* 12377 */ "lwat \000"
1358 /* 12383 */ "stwat \000"
1359 /* 12390 */ "dcbt \000"
1360 /* 12396 */ "icbt \000"
1361 /* 12402 */ "dcbtct \000"
1362 /* 12410 */ "dcbtstct \000"
1363 /* 12420 */ "efdcmpgt \000"
1364 /* 12430 */ "efscmpgt \000"
1365 /* 12440 */ "evfscmpgt \000"
1366 /* 12451 */ "efdtstgt \000"
1367 /* 12461 */ "efststgt \000"
1368 /* 12471 */ "evfststgt \000"
1369 /* 12482 */ "wait \000"
1370 /* 12488 */ "efdcmplt \000"
1371 /* 12498 */ "efscmplt \000"
1372 /* 12508 */ "evfscmplt \000"
1373 /* 12519 */ "efdtstlt \000"
1374 /* 12529 */ "efststlt \000"
1375 /* 12539 */ "evfststlt \000"
1376 /* 12550 */ "crnot \000"
1377 /* 12557 */ "fsqrt \000"
1378 /* 12564 */ "ftsqrt \000"
1379 /* 12572 */ "vncipherlast \000"
1380 /* 12586 */ "vcipherlast \000"
1381 /* 12599 */ "dcbst \000"
1382 /* 12606 */ "dst \000"
1383 /* 12611 */ "hashst \000"
1384 /* 12619 */ "dcbtst \000"
1385 /* 12627 */ "dstst \000"
1386 /* 12634 */ "dcbtt \000"
1387 /* 12641 */ "dstt \000"
1388 /* 12647 */ "dcbtstt \000"
1389 /* 12656 */ "dststt \000"
1390 /* 12664 */ "xxssumudmcext \000"
1391 /* 12679 */ "lhau \000"
1392 /* 12685 */ "stbu \000"
1393 /* 12691 */ "lfdu \000"
1394 /* 12697 */ "stfdu \000"
1395 /* 12704 */ "maddhdu \000"
1396 /* 12713 */ "mulhdu \000"
1397 /* 12721 */ "fcfidu \000"
1398 /* 12729 */ "fctidu \000"
1399 /* 12737 */ "ldu \000"
1400 /* 12742 */ "stdu \000"
1401 /* 12748 */ "divdu \000"
1402 /* 12755 */ "divdeu \000"
1403 /* 12763 */ "divweu \000"
1404 /* 12771 */ "sthu \000"
1405 /* 12777 */ "evsrwiu \000"
1406 /* 12786 */ "evlwhou \000"
1407 /* 12795 */ "dcmpu \000"
1408 /* 12802 */ "fcmpu \000"
1409 /* 12809 */ "lfsu \000"
1410 /* 12815 */ "stfsu \000"
1411 /* 12822 */ "evcmpgtu \000"
1412 /* 12832 */ "evcmpltu \000"
1413 /* 12842 */ "mulhwu \000"
1414 /* 12850 */ "fctiwu \000"
1415 /* 12858 */ "evsrwu \000"
1416 /* 12866 */ "stwu \000"
1417 /* 12872 */ "evdivwu \000"
1418 /* 12881 */ "lbzu \000"
1419 /* 12887 */ "lhzu \000"
1420 /* 12893 */ "lwzu \000"
1421 /* 12899 */ "scv \000"
1422 /* 12904 */ "slbmfev \000"
1423 /* 12913 */ "efddiv \000"
1424 /* 12921 */ "fdiv \000"
1425 /* 12927 */ "efsdiv \000"
1426 /* 12935 */ "evfsdiv \000"
1427 /* 12944 */ "ftdiv \000"
1428 /* 12951 */ "vslv \000"
1429 /* 12957 */ "xxleqv \000"
1430 /* 12965 */ "creqv \000"
1431 /* 12972 */ "eveqv \000"
1432 /* 12979 */ "vsrv \000"
1433 /* 12985 */ "plxv \000"
1434 /* 12991 */ "pstxv \000"
1435 /* 12998 */ "vextsb2w \000"
1436 /* 13008 */ "vextsh2w \000"
1437 /* 13018 */ "evmhesmfaaw \000"
1438 /* 13031 */ "evmhosmfaaw \000"
1439 /* 13044 */ "evmhessfaaw \000"
1440 /* 13057 */ "evmhossfaaw \000"
1441 /* 13070 */ "evaddsmiaaw \000"
1442 /* 13083 */ "evmhesmiaaw \000"
1443 /* 13096 */ "evsubfsmiaaw \000"
1444 /* 13110 */ "evmwlsmiaaw \000"
1445 /* 13123 */ "evmhosmiaaw \000"
1446 /* 13136 */ "evaddumiaaw \000"
1447 /* 13149 */ "evmheumiaaw \000"
1448 /* 13162 */ "evsubfumiaaw \000"
1449 /* 13176 */ "evmwlumiaaw \000"
1450 /* 13189 */ "evmhoumiaaw \000"
1451 /* 13202 */ "evaddssiaaw \000"
1452 /* 13215 */ "evmhessiaaw \000"
1453 /* 13228 */ "evsubfssiaaw \000"
1454 /* 13242 */ "evmwlssiaaw \000"
1455 /* 13255 */ "evmhossiaaw \000"
1456 /* 13268 */ "evaddusiaaw \000"
1457 /* 13281 */ "evmheusiaaw \000"
1458 /* 13294 */ "evsubfusiaaw \000"
1459 /* 13308 */ "evmwlusiaaw \000"
1460 /* 13321 */ "evmhousiaaw \000"
1461 /* 13334 */ "vshasigmaw \000"
1462 /* 13346 */ "vsraw \000"
1463 /* 13353 */ "vcntmbw \000"
1464 /* 13362 */ "vprtybw \000"
1465 /* 13371 */ "evaddw \000"
1466 /* 13379 */ "evldw \000"
1467 /* 13386 */ "evrndw \000"
1468 /* 13394 */ "evstdw \000"
1469 /* 13402 */ "vmrgew \000"
1470 /* 13410 */ "vcmpnew \000"
1471 /* 13419 */ "evsubfw \000"
1472 /* 13428 */ "evsubifw \000"
1473 /* 13438 */ "vnegw \000"
1474 /* 13445 */ "vmrghw \000"
1475 /* 13453 */ "xxmrghw \000"
1476 /* 13462 */ "mulhw \000"
1477 /* 13469 */ "evaddiw \000"
1478 /* 13478 */ "fctiw \000"
1479 /* 13485 */ "xxspltiw \000"
1480 /* 13495 */ "vmrglw \000"
1481 /* 13503 */ "xxmrglw \000"
1482 /* 13512 */ "mullw \000"
1483 /* 13519 */ "cmplw \000"
1484 /* 13526 */ "evrlw \000"
1485 /* 13533 */ "xvrlw \000"
1486 /* 13540 */ "evslw \000"
1487 /* 13547 */ "lmw \000"
1488 /* 13552 */ "stmw \000"
1489 /* 13558 */ "vpmsumw \000"
1490 /* 13567 */ "evmhesmfanw \000"
1491 /* 13580 */ "evmhosmfanw \000"
1492 /* 13593 */ "evmhessfanw \000"
1493 /* 13606 */ "evmhossfanw \000"
1494 /* 13619 */ "evmhesmianw \000"
1495 /* 13632 */ "evmwlsmianw \000"
1496 /* 13645 */ "evmhosmianw \000"
1497 /* 13658 */ "evmheumianw \000"
1498 /* 13671 */ "evmwlumianw \000"
1499 /* 13684 */ "evmhoumianw \000"
1500 /* 13697 */ "evmhessianw \000"
1501 /* 13710 */ "evmwlssianw \000"
1502 /* 13723 */ "evmhossianw \000"
1503 /* 13736 */ "evmheusianw \000"
1504 /* 13749 */ "evmwlusianw \000"
1505 /* 13762 */ "evmhousianw \000"
1506 /* 13775 */ "vmrgow \000"
1507 /* 13783 */ "cmpw \000"
1508 /* 13789 */ "xxbrw \000"
1509 /* 13796 */ "vsrw \000"
1510 /* 13802 */ "vmodsw \000"
1511 /* 13810 */ "vmulesw \000"
1512 /* 13819 */ "vdivesw \000"
1513 /* 13828 */ "vavgsw \000"
1514 /* 13836 */ "vupkhsw \000"
1515 /* 13845 */ "xvmulhsw \000"
1516 /* 13855 */ "vspltisw \000"
1517 /* 13865 */ "vupklsw \000"
1518 /* 13874 */ "evcntlsw \000"
1519 /* 13884 */ "vminsw \000"
1520 /* 13892 */ "vinsw \000"
1521 /* 13899 */ "vmulosw \000"
1522 /* 13908 */ "vcmpgtsw \000"
1523 /* 13918 */ "extsw \000"
1524 /* 13925 */ "vdivsw \000"
1525 /* 13933 */ "vmaxsw \000"
1526 /* 13941 */ "vspltw \000"
1527 /* 13949 */ "xxspltw \000"
1528 /* 13958 */ "vpopcntw \000"
1529 /* 13968 */ "vinsertw \000"
1530 /* 13978 */ "xxinsertw \000"
1531 /* 13989 */ "pstw \000"
1532 /* 13995 */ "vsubcuw \000"
1533 /* 14004 */ "vaddcuw \000"
1534 /* 14013 */ "vmoduw \000"
1535 /* 14021 */ "vabsduw \000"
1536 /* 14030 */ "vmuleuw \000"
1537 /* 14039 */ "vdiveuw \000"
1538 /* 14048 */ "vavguw \000"
1539 /* 14056 */ "xvmulhuw \000"
1540 /* 14066 */ "vminuw \000"
1541 /* 14074 */ "vmulouw \000"
1542 /* 14083 */ "vcmpequw \000"
1543 /* 14093 */ "vextractuw \000"
1544 /* 14105 */ "xxextractuw \000"
1545 /* 14118 */ "vcmpgtuw \000"
1546 /* 14128 */ "vdivuw \000"
1547 /* 14136 */ "vmaxuw \000"
1548 /* 14144 */ "xxblendvw \000"
1549 /* 14155 */ "divw \000"
1550 /* 14161 */ "vcmpnezw \000"
1551 /* 14171 */ "vclzw \000"
1552 /* 14178 */ "evcntlzw \000"
1553 /* 14188 */ "vctzw \000"
1554 /* 14195 */ "cnttzw \000"
1555 /* 14203 */ "lxvpb32x \000"
1556 /* 14213 */ "stxvpb32x \000"
1557 /* 14224 */ "lxvd2x \000"
1558 /* 14232 */ "stxvd2x \000"
1559 /* 14241 */ "lxvw4x \000"
1560 /* 14249 */ "stxvw4x \000"
1561 /* 14258 */ "lxvb16x \000"
1562 /* 14267 */ "stxvb16x \000"
1563 /* 14277 */ "lxvh8x \000"
1564 /* 14285 */ "stxvh8x \000"
1565 /* 14294 */ "lhax \000"
1566 /* 14300 */ "tlbivax \000"
1567 /* 14309 */ "lfiwax \000"
1568 /* 14317 */ "lxsiwax \000"
1569 /* 14326 */ "lwax \000"
1570 /* 14332 */ "lvebx \000"
1571 /* 14339 */ "stvebx \000"
1572 /* 14347 */ "stxsibx \000"
1573 /* 14356 */ "lxvrbx \000"
1574 /* 14364 */ "stxvrbx \000"
1575 /* 14373 */ "stbx \000"
1576 /* 14379 */ "xxsplti32dx \000"
1577 /* 14392 */ "evlddx \000"
1578 /* 14400 */ "evstddx \000"
1579 /* 14409 */ "lfdx \000"
1580 /* 14415 */ "stfdx \000"
1581 /* 14422 */ "ldx \000"
1582 /* 14427 */ "lxvrdx \000"
1583 /* 14435 */ "stxvrdx \000"
1584 /* 14444 */ "lxsdx \000"
1585 /* 14451 */ "stxsdx \000"
1586 /* 14459 */ "stdx \000"
1587 /* 14465 */ "addex \000"
1588 /* 14472 */ "evlwhex \000"
1589 /* 14481 */ "evstwhex \000"
1590 /* 14491 */ "diex \000"
1591 /* 14497 */ "dtstex \000"
1592 /* 14505 */ "evstwwex \000"
1593 /* 14515 */ "dxex \000"
1594 /* 14521 */ "evldhx \000"
1595 /* 14529 */ "evstdhx \000"
1596 /* 14538 */ "lvehx \000"
1597 /* 14545 */ "stvehx \000"
1598 /* 14553 */ "stxsihx \000"
1599 /* 14562 */ "lxvrhx \000"
1600 /* 14570 */ "stxvrhx \000"
1601 /* 14579 */ "sthx \000"
1602 /* 14585 */ "stbcix \000"
1603 /* 14593 */ "ldcix \000"
1604 /* 14600 */ "stdcix \000"
1605 /* 14608 */ "sthcix \000"
1606 /* 14616 */ "stwcix \000"
1607 /* 14624 */ "lbzcix \000"
1608 /* 14632 */ "lhzcix \000"
1609 /* 14640 */ "lwzcix \000"
1610 /* 14648 */ "dcffix \000"
1611 /* 14656 */ "dctfix \000"
1612 /* 14664 */ "xsrqpix \000"
1613 /* 14673 */ "vinsblx \000"
1614 /* 14682 */ "vextublx \000"
1615 /* 14692 */ "vinsdlx \000"
1616 /* 14701 */ "vinshlx \000"
1617 /* 14710 */ "vextuhlx \000"
1618 /* 14720 */ "tlbilx \000"
1619 /* 14728 */ "vinsbvlx \000"
1620 /* 14738 */ "vextdubvlx \000"
1621 /* 14750 */ "vextddvlx \000"
1622 /* 14761 */ "vinshvlx \000"
1623 /* 14771 */ "vextduhvlx \000"
1624 /* 14783 */ "vinswvlx \000"
1625 /* 14793 */ "vextduwvlx \000"
1626 /* 14805 */ "vinswlx \000"
1627 /* 14814 */ "vextuwlx \000"
1628 /* 14824 */ "xxpermx \000"
1629 /* 14833 */ "vsbox \000"
1630 /* 14840 */ "evstwhox \000"
1631 /* 14850 */ "evstwwox \000"
1632 /* 14860 */ "lbepx \000"
1633 /* 14867 */ "stbepx \000"
1634 /* 14875 */ "lfdepx \000"
1635 /* 14883 */ "stfdepx \000"
1636 /* 14892 */ "lhepx \000"
1637 /* 14899 */ "sthepx \000"
1638 /* 14907 */ "lwepx \000"
1639 /* 14914 */ "stwepx \000"
1640 /* 14922 */ "vupkhpx \000"
1641 /* 14931 */ "vpkpx \000"
1642 /* 14938 */ "vupklpx \000"
1643 /* 14947 */ "lxsspx \000"
1644 /* 14955 */ "stxsspx \000"
1645 /* 14964 */ "lxvpx \000"
1646 /* 14971 */ "stxvpx \000"
1647 /* 14979 */ "lbarx \000"
1648 /* 14986 */ "ldarx \000"
1649 /* 14993 */ "lharx \000"
1650 /* 15000 */ "lqarx \000"
1651 /* 15007 */ "lwarx \000"
1652 /* 15014 */ "ldbrx \000"
1653 /* 15021 */ "stdbrx \000"
1654 /* 15029 */ "lhbrx \000"
1655 /* 15036 */ "sthbrx \000"
1656 /* 15044 */ "vinsbrx \000"
1657 /* 15053 */ "vextubrx \000"
1658 /* 15063 */ "lwbrx \000"
1659 /* 15070 */ "stwbrx \000"
1660 /* 15078 */ "vinsdrx \000"
1661 /* 15087 */ "vinshrx \000"
1662 /* 15096 */ "vextuhrx \000"
1663 /* 15106 */ "vinsbvrx \000"
1664 /* 15116 */ "vextdubvrx \000"
1665 /* 15128 */ "vextddvrx \000"
1666 /* 15139 */ "vinshvrx \000"
1667 /* 15149 */ "vextduhvrx \000"
1668 /* 15161 */ "vinswvrx \000"
1669 /* 15171 */ "vextduwvrx \000"
1670 /* 15183 */ "vinswrx \000"
1671 /* 15192 */ "vextuwrx \000"
1672 /* 15202 */ "mcrxrx \000"
1673 /* 15210 */ "tlbsx \000"
1674 /* 15217 */ "lxvdsx \000"
1675 /* 15225 */ "vcfsx \000"
1676 /* 15232 */ "lfsx \000"
1677 /* 15238 */ "stfsx \000"
1678 /* 15245 */ "evlwhosx \000"
1679 /* 15255 */ "lxvwsx \000"
1680 /* 15263 */ "evlhhesplatx \000"
1681 /* 15277 */ "evlwhsplatx \000"
1682 /* 15290 */ "evlhhossplatx \000"
1683 /* 15305 */ "evlhhousplatx \000"
1684 /* 15320 */ "evlwwsplatx \000"
1685 /* 15333 */ "drintx \000"
1686 /* 15341 */ "lhaux \000"
1687 /* 15348 */ "lwaux \000"
1688 /* 15355 */ "stbux \000"
1689 /* 15362 */ "lfdux \000"
1690 /* 15369 */ "stfdux \000"
1691 /* 15377 */ "ldux \000"
1692 /* 15383 */ "stdux \000"
1693 /* 15390 */ "vcfux \000"
1694 /* 15397 */ "sthux \000"
1695 /* 15404 */ "evlwhoux \000"
1696 /* 15414 */ "lfsux \000"
1697 /* 15421 */ "stfsux \000"
1698 /* 15429 */ "stwux \000"
1699 /* 15436 */ "lbzux \000"
1700 /* 15443 */ "lhzux \000"
1701 /* 15450 */ "lwzux \000"
1702 /* 15457 */ "lvx \000"
1703 /* 15462 */ "stvx \000"
1704 /* 15468 */ "lxvx \000"
1705 /* 15474 */ "stxvx \000"
1706 /* 15481 */ "evldwx \000"
1707 /* 15489 */ "evstdwx \000"
1708 /* 15498 */ "lvewx \000"
1709 /* 15505 */ "stvewx \000"
1710 /* 15513 */ "stfiwx \000"
1711 /* 15521 */ "stxsiwx \000"
1712 /* 15530 */ "lxvrwx \000"
1713 /* 15538 */ "stxvrwx \000"
1714 /* 15547 */ "stwx \000"
1715 /* 15553 */ "lxsibzx \000"
1716 /* 15562 */ "lbzx \000"
1717 /* 15568 */ "lxsihzx \000"
1718 /* 15577 */ "lhzx \000"
1719 /* 15583 */ "lfiwzx \000"
1720 /* 15591 */ "lxsiwzx \000"
1721 /* 15600 */ "lwzx \000"
1722 /* 15606 */ "copy \000"
1723 /* 15612 */ "dcbz \000"
1724 /* 15618 */ "plbz \000"
1725 /* 15624 */ "dmxxsetaccz \000"
1726 /* 15637 */ "bdz \000"
1727 /* 15642 */ "efdctsidz \000"
1728 /* 15653 */ "fctidz \000"
1729 /* 15661 */ "efdctuidz \000"
1730 /* 15672 */ "xscvqpsdz \000"
1731 /* 15683 */ "xscvqpudz \000"
1732 /* 15694 */ "plhz \000"
1733 /* 15700 */ "vrfiz \000"
1734 /* 15707 */ "xsrdpiz \000"
1735 /* 15716 */ "xvrdpiz \000"
1736 /* 15725 */ "xvrspiz \000"
1737 /* 15734 */ "friz \000"
1738 /* 15740 */ "efdctsiz \000"
1739 /* 15750 */ "efsctsiz \000"
1740 /* 15760 */ "evfsctsiz \000"
1741 /* 15771 */ "efdctuiz \000"
1742 /* 15781 */ "efsctuiz \000"
1743 /* 15791 */ "bdnz \000"
1744 /* 15797 */ "xscvqpsqz \000"
1745 /* 15808 */ "xscvqpuqz \000"
1746 /* 15819 */ "dmsetdmrz \000"
1747 /* 15830 */ "fctiduz \000"
1748 /* 15839 */ "fctiwuz \000"
1749 /* 15848 */ "fctiwz \000"
1750 /* 15856 */ "plwz \000"
1751 /* 15862 */ "mfvsrwz \000"
1752 /* 15871 */ "mtvsrwz \000"
1753 /* 15880 */ "xscvqpswz \000"
1754 /* 15891 */ "xscvqpuwz \000"
1755 /* 15902 */ "bdzlrl+\000"
1756 /* 15910 */ "bdnzlrl+\000"
1757 /* 15919 */ "bdzlr+\000"
1758 /* 15926 */ "bdnzlr+\000"
1759 /* 15934 */ "evsel crD,\000"
1760 /* 15945 */ "bdzlrl-\000"
1761 /* 15953 */ "bdnzlrl-\000"
1762 /* 15962 */ "bdzlr-\000"
1763 /* 15969 */ "bdnzlr-\000"
1764 /* 15977 */ "# XRay Function Patchable RET.\000"
1765 /* 16008 */ "# XRay Typed Event Log.\000"
1766 /* 16032 */ "# XRay Custom Event Log.\000"
1767 /* 16057 */ "# XRay Function Enter.\000"
1768 /* 16080 */ "# XRay Tail Call Exit.\000"
1769 /* 16103 */ "# XRay Function Exit.\000"
1770 /* 16125 */ "trechkpt.\000"
1771 /* 16135 */ "ori 1, 1, 0\000"
1772 /* 16147 */ "ori 2, 2, 0\000"
1773 /* 16159 */ "#ADDISdtprelHA32\000"
1774 /* 16176 */ "#ADDItlsgdL32\000"
1775 /* 16190 */ "#ADDItlsldL32\000"
1776 /* 16204 */ "#LDgotTprelL32\000"
1777 /* 16219 */ "#ADDIdtprelL32\000"
1778 /* 16234 */ "#EH_SJLJ_LONGJMP32\000"
1779 /* 16253 */ "#EH_SJLJ_SETJMP32\000"
1780 /* 16271 */ "#ADDItlsgdLADDR32\000"
1781 /* 16289 */ "#ADDItlsldLADDR32\000"
1782 /* 16307 */ "GETtlsldADDR32\000"
1783 /* 16322 */ "GETtlsADDR32\000"
1784 /* 16335 */ "#PROBED_ALLOCA_32\000"
1785 /* 16353 */ "#PREPARE_PROBED_ALLOCA_32\000"
1786 /* 16379 */ "#PROBED_STACKALLOC_32\000"
1787 /* 16401 */ "#PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32\000"
1788 /* 16444 */ "#DFLOADf32\000"
1789 /* 16455 */ "#XFLOADf32\000"
1790 /* 16466 */ "#DFSTOREf32\000"
1791 /* 16478 */ "#XFSTOREf32\000"
1792 /* 16490 */ "#EH_SJLJ_LONGJMP64\000"
1793 /* 16509 */ "#EH_SJLJ_SETJMP64\000"
1794 /* 16527 */ "#PROBED_ALLOCA_64\000"
1795 /* 16545 */ "#PREPARE_PROBED_ALLOCA_64\000"
1796 /* 16571 */ "#PROBED_STACKALLOC_64\000"
1797 /* 16593 */ "#PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64\000"
1798 /* 16636 */ "#DFLOADf64\000"
1799 /* 16647 */ "#XFLOADf64\000"
1800 /* 16658 */ "#DFSTOREf64\000"
1801 /* 16670 */ "#XFSTOREf64\000"
1802 /* 16682 */ "#SELECT_CC_SPE4\000"
1803 /* 16698 */ "#SELECT_SPE4\000"
1804 /* 16711 */ "#SELECT_CC_F4\000"
1805 /* 16725 */ "#SELECT_F4\000"
1806 /* 16736 */ "#SELECT_CC_I4\000"
1807 /* 16750 */ "#SELECT_I4\000"
1808 /* 16761 */ "crxor 6, 6, 6\000"
1809 /* 16775 */ "creqv 6, 6, 6\000"
1810 /* 16789 */ "#SELECT_CC_F16\000"
1811 /* 16804 */ "#SELECT_F16\000"
1812 /* 16816 */ "#ATOMIC_LOAD_SUB_I128\000"
1813 /* 16838 */ "#ATOMIC_LOAD_ADD_I128\000"
1814 /* 16860 */ "#ATOMIC_LOAD_NAND_I128\000"
1815 /* 16883 */ "#ATOMIC_LOAD_AND_I128\000"
1816 /* 16905 */ "#ATOMIC_SWAP_I128\000"
1817 /* 16923 */ "#ATOMIC_CMP_SWAP_I128\000"
1818 /* 16945 */ "#ATOMIC_LOAD_XOR_I128\000"
1819 /* 16967 */ "#ATOMIC_LOAD_OR_I128\000"
1820 /* 16988 */ "#ADDIStocHA8\000"
1821 /* 17001 */ "#DYNALLOC8\000"
1822 /* 17012 */ "#CFENCE8\000"
1823 /* 17021 */ "#SELECT_CC_F8\000"
1824 /* 17035 */ "#SELECT_F8\000"
1825 /* 17046 */ "#SELECT_CC_I8\000"
1826 /* 17060 */ "#SELECT_I8\000"
1827 /* 17071 */ "#ADDItocL8\000"
1828 /* 17082 */ "#MovePCtoLR8\000"
1829 /* 17095 */ "#DYNAREAOFFSET8\000"
1830 /* 17111 */ "#ANDI_rec_1_EQ_BIT8\000"
1831 /* 17131 */ "#ANDI_rec_1_GT_BIT8\000"
1832 /* 17151 */ "#TLSGDAIX8\000"
1833 /* 17162 */ "#TLSLDAIX8\000"
1834 /* 17173 */ "#ADDItoc8\000"
1835 /* 17183 */ "#ADDIStocHA\000"
1836 /* 17195 */ "#ADDIStlsgdHA\000"
1837 /* 17209 */ "#ADDIStlsldHA\000"
1838 /* 17223 */ "#ADDISgotTprelHA\000"
1839 /* 17240 */ "#ADDISdtprelHA\000"
1840 /* 17255 */ "#ReadTB\000"
1841 /* 17263 */ "#RESTORE_UACC\000"
1842 /* 17277 */ "#SPILL_UACC\000"
1843 /* 17289 */ "#RESTORE_WACC\000"
1844 /* 17303 */ "#SPILL_WACC\000"
1845 /* 17315 */ "#RESTORE_ACC\000"
1846 /* 17328 */ "#SPILL_ACC\000"
1847 /* 17339 */ "#DYNALLOC\000"
1848 /* 17349 */ "#SELECT_CC_VSFRC\000"
1849 /* 17366 */ "#SELECT_VSFRC\000"
1850 /* 17380 */ "#SELECT_CC_VRRC\000"
1851 /* 17396 */ "#SELECT_VRRC\000"
1852 /* 17409 */ "#SELECT_CC_VSSRC\000"
1853 /* 17426 */ "#SELECT_VSSRC\000"
1854 /* 17440 */ "#SELECT_CC_VSRC\000"
1855 /* 17456 */ "#SELECT_VSRC\000"
1856 /* 17469 */ "#FA_LOAD\000"
1857 /* 17478 */ "#SPILLTOVSR_LD\000"
1858 /* 17493 */ "LIFETIME_END\000"
1859 /* 17506 */ "#SETRND\000"
1860 /* 17514 */ "#BUILD_QUADWORD\000"
1861 /* 17530 */ "#RESTORE_QUADWORD\000"
1862 /* 17548 */ "#SPILL_QUADWORD\000"
1863 /* 17564 */ "#SPLIT_QUADWORD\000"
1864 /* 17580 */ "PSEUDO_PROBE\000"
1865 /* 17593 */ "#FENCE\000"
1866 /* 17600 */ "#CFENCE\000"
1867 /* 17608 */ "BUNDLE\000"
1868 /* 17615 */ "#NAME\000"
1869 /* 17621 */ "#SELECT_CC_SPE\000"
1870 /* 17636 */ "#SELECT_SPE\000"
1871 /* 17648 */ "FAKE_USE\000"
1872 /* 17657 */ "DBG_VALUE\000"
1873 /* 17667 */ "DBG_INSTR_REF\000"
1874 /* 17681 */ "DBG_PHI\000"
1875 /* 17689 */ "#LDtocJTI\000"
1876 /* 17699 */ "DBG_LABEL\000"
1877 /* 17709 */ "#GETtlsldADDRPCREL\000"
1878 /* 17728 */ "#GETtlsADDRPCREL\000"
1879 /* 17745 */ "#LDtocL\000"
1880 /* 17753 */ "#ADDItocL\000"
1881 /* 17763 */ "#LWZtocL\000"
1882 /* 17772 */ "#ADDItlsgdL\000"
1883 /* 17784 */ "#ADDItlsldL\000"
1884 /* 17796 */ "#LDgotTprelL\000"
1885 /* 17809 */ "#ADDIdtprelL\000"
1886 /* 17822 */ "#SETFLM\000"
1887 /* 17830 */ "#LDAT_CSNE_PSEUDO\000"
1888 /* 17848 */ "#LWAT_CSNE_PSEUDO\000"
1889 /* 17866 */ "#LQX_PSEUDO\000"
1890 /* 17878 */ "#STQX_PSEUDO\000"
1891 /* 17891 */ "#PPCEIEIO\000"
1892 /* 17901 */ "#UNENCODED_NOP\000"
1893 /* 17916 */ "#RESTORE_DMRP\000"
1894 /* 17930 */ "#SPILL_DMRP\000"
1895 /* 17942 */ "#UpdateGBR\000"
1896 /* 17953 */ "#RESTORE_CR\000"
1897 /* 17965 */ "#SPILL_CR\000"
1898 /* 17975 */ "#ADDItlsgdLADDR\000"
1899 /* 17991 */ "#ADDItlsldLADDR\000"
1900 /* 18007 */ "#GETtlsldADDR\000"
1901 /* 18021 */ "#GETtlsADDR\000"
1902 /* 18033 */ "#KILL_PAIR\000"
1903 /* 18044 */ "#MovePCtoLR\000"
1904 /* 18056 */ "#MoveGOTtoLR\000"
1905 /* 18069 */ "#RESTORE_DMR\000"
1906 /* 18082 */ "#SPILL_DMR\000"
1907 /* 18093 */ "#TCHECK_RET\000"
1908 /* 18105 */ "#TBEGIN_RET\000"
1909 /* 18117 */ "#DYNAREAOFFSET\000"
1910 /* 18132 */ "#RESTORE_CRBIT\000"
1911 /* 18147 */ "#SPILL_CRBIT\000"
1912 /* 18160 */ "#ANDI_rec_1_EQ_BIT\000"
1913 /* 18179 */ "#ANDI_rec_1_GT_BIT\000"
1914 /* 18198 */ "#PPC32GOT\000"
1915 /* 18208 */ "#PPC32PICGOT\000"
1916 /* 18221 */ "#LDtocCPT\000"
1917 /* 18231 */ "LIFETIME_START\000"
1918 /* 18246 */ "DBG_VALUE_LIST\000"
1919 /* 18261 */ "#SPILLTOVSR_ST\000"
1920 /* 18276 */ "#LIWAX\000"
1921 /* 18283 */ "#SPILLTOVSR_LDX\000"
1922 /* 18299 */ "GETtlsMOD32AIX\000"
1923 /* 18314 */ "GETtlsADDR32AIX\000"
1924 /* 18330 */ "GETtlsTpointer32AIX\000"
1925 /* 18350 */ "GETtlsMOD64AIX\000"
1926 /* 18365 */ "GETtlsADDR64AIX\000"
1927 /* 18381 */ "#TLSGDAIX\000"
1928 /* 18391 */ "#TLSLDAIX\000"
1929 /* 18401 */ "#SPILLTOVSR_STX\000"
1930 /* 18417 */ "#STIWX\000"
1931 /* 18424 */ "#LIWZX\000"
1932 /* 18431 */ "bca\000"
1933 /* 18435 */ "slbia\000"
1934 /* 18441 */ "tlbia\000"
1935 /* 18447 */ "bcla\000"
1936 /* 18452 */ "clrbhrb\000"
1937 /* 18460 */ "bc\000"
1938 /* 18463 */ "slbsync\000"
1939 /* 18471 */ "tlbsync\000"
1940 /* 18479 */ "msgsync\000"
1941 /* 18487 */ "isync\000"
1942 /* 18493 */ "msync\000"
1943 /* 18499 */ "#LDtoc\000"
1944 /* 18506 */ "#ADDItoc\000"
1945 /* 18515 */ "#LWZtoc\000"
1946 /* 18523 */ "hrfid\000"
1947 /* 18529 */ "tlbre\000"
1948 /* 18535 */ "tlbwe\000"
1949 /* 18541 */ "#SETRNDi\000"
1950 /* 18550 */ "rfci\000"
1951 /* 18555 */ "rfmci\000"
1952 /* 18561 */ "rfdi\000"
1953 /* 18566 */ "rfi\000"
1954 /* 18570 */ "bcl\000"
1955 /* 18574 */ "#PADDIdtprel\000"
1956 /* 18587 */ "# FEntry call\000"
1957 /* 18601 */ "dssall\000"
1958 /* 18608 */ "blrl\000"
1959 /* 18613 */ "bdzlrl\000"
1960 /* 18620 */ "bdnzlrl\000"
1961 /* 18628 */ "bctrl\000"
1962 /* 18634 */ "attn\000"
1963 /* 18639 */ "eieio\000"
1964 /* 18645 */ "nap\000"
1965 /* 18649 */ "trap\000"
1966 /* 18654 */ "nop\000"
1967 /* 18658 */ "#DecreaseCTR8loop\000"
1968 /* 18676 */ "#DecreaseCTRloop\000"
1969 /* 18693 */ "stop\000"
1970 /* 18698 */ "blr\000"
1971 /* 18702 */ "bdzlr\000"
1972 /* 18708 */ "bdnzlr\000"
1973 /* 18715 */ "bctr\000"
1974 /* 18720 */ "cpabort\000"
1975};
1976#ifdef __GNUC__
1977#pragma GCC diagnostic pop
1978#endif
1979
1980 static const uint64_t OpInfo0[] = {
1981 0ULL, // PHI
1982 0ULL, // INLINEASM
1983 0ULL, // INLINEASM_BR
1984 0ULL, // CFI_INSTRUCTION
1985 0ULL, // EH_LABEL
1986 0ULL, // GC_LABEL
1987 0ULL, // ANNOTATION_LABEL
1988 0ULL, // KILL
1989 0ULL, // EXTRACT_SUBREG
1990 0ULL, // INSERT_SUBREG
1991 0ULL, // IMPLICIT_DEF
1992 0ULL, // INIT_UNDEF
1993 0ULL, // SUBREG_TO_REG
1994 0ULL, // COPY_TO_REGCLASS
1995 17658ULL, // DBG_VALUE
1996 18247ULL, // DBG_VALUE_LIST
1997 17668ULL, // DBG_INSTR_REF
1998 17682ULL, // DBG_PHI
1999 17700ULL, // DBG_LABEL
2000 0ULL, // REG_SEQUENCE
2001 0ULL, // COPY
2002 0ULL, // COPY_LANEMASK
2003 17609ULL, // BUNDLE
2004 18232ULL, // LIFETIME_START
2005 17494ULL, // LIFETIME_END
2006 17581ULL, // PSEUDO_PROBE
2007 0ULL, // ARITH_FENCE
2008 0ULL, // STACKMAP
2009 18588ULL, // FENTRY_CALL
2010 0ULL, // PATCHPOINT
2011 0ULL, // LOAD_STACK_GUARD
2012 0ULL, // PREALLOCATED_SETUP
2013 0ULL, // PREALLOCATED_ARG
2014 0ULL, // STATEPOINT
2015 0ULL, // LOCAL_ESCAPE
2016 0ULL, // FAULTING_OP
2017 0ULL, // PATCHABLE_OP
2018 16058ULL, // PATCHABLE_FUNCTION_ENTER
2019 15978ULL, // PATCHABLE_RET
2020 16104ULL, // PATCHABLE_FUNCTION_EXIT
2021 16081ULL, // PATCHABLE_TAIL_CALL
2022 16033ULL, // PATCHABLE_EVENT_CALL
2023 16009ULL, // PATCHABLE_TYPED_EVENT_CALL
2024 0ULL, // ICALL_BRANCH_FUNNEL
2025 17649ULL, // FAKE_USE
2026 0ULL, // MEMBARRIER
2027 0ULL, // JUMP_TABLE_DEBUG_INFO
2028 0ULL, // RELOC_NONE
2029 0ULL, // CONVERGENCECTRL_ENTRY
2030 0ULL, // CONVERGENCECTRL_ANCHOR
2031 0ULL, // CONVERGENCECTRL_LOOP
2032 0ULL, // CONVERGENCECTRL_GLUE
2033 0ULL, // G_ASSERT_SEXT
2034 0ULL, // G_ASSERT_ZEXT
2035 0ULL, // G_ASSERT_ALIGN
2036 0ULL, // G_ADD
2037 0ULL, // G_SUB
2038 0ULL, // G_MUL
2039 0ULL, // G_SDIV
2040 0ULL, // G_UDIV
2041 0ULL, // G_SREM
2042 0ULL, // G_UREM
2043 0ULL, // G_SDIVREM
2044 0ULL, // G_UDIVREM
2045 0ULL, // G_AND
2046 0ULL, // G_OR
2047 0ULL, // G_XOR
2048 0ULL, // G_ABDS
2049 0ULL, // G_ABDU
2050 0ULL, // G_UAVGFLOOR
2051 0ULL, // G_UAVGCEIL
2052 0ULL, // G_SAVGFLOOR
2053 0ULL, // G_SAVGCEIL
2054 0ULL, // G_IMPLICIT_DEF
2055 0ULL, // G_PHI
2056 0ULL, // G_FRAME_INDEX
2057 0ULL, // G_GLOBAL_VALUE
2058 0ULL, // G_PTRAUTH_GLOBAL_VALUE
2059 0ULL, // G_CONSTANT_POOL
2060 0ULL, // G_EXTRACT
2061 0ULL, // G_UNMERGE_VALUES
2062 0ULL, // G_INSERT
2063 0ULL, // G_MERGE_VALUES
2064 0ULL, // G_BUILD_VECTOR
2065 0ULL, // G_BUILD_VECTOR_TRUNC
2066 0ULL, // G_CONCAT_VECTORS
2067 0ULL, // G_PTRTOINT
2068 0ULL, // G_INTTOPTR
2069 0ULL, // G_BITCAST
2070 0ULL, // G_FREEZE
2071 0ULL, // G_CONSTANT_FOLD_BARRIER
2072 0ULL, // G_INTRINSIC_FPTRUNC_ROUND
2073 0ULL, // G_INTRINSIC_TRUNC
2074 0ULL, // G_INTRINSIC_ROUND
2075 0ULL, // G_INTRINSIC_LRINT
2076 0ULL, // G_INTRINSIC_LLRINT
2077 0ULL, // G_INTRINSIC_ROUNDEVEN
2078 0ULL, // G_READCYCLECOUNTER
2079 0ULL, // G_READSTEADYCOUNTER
2080 0ULL, // G_LOAD
2081 0ULL, // G_SEXTLOAD
2082 0ULL, // G_ZEXTLOAD
2083 0ULL, // G_FPEXTLOAD
2084 0ULL, // G_INDEXED_LOAD
2085 0ULL, // G_INDEXED_SEXTLOAD
2086 0ULL, // G_INDEXED_ZEXTLOAD
2087 0ULL, // G_STORE
2088 0ULL, // G_FPTRUNCSTORE
2089 0ULL, // G_INDEXED_STORE
2090 0ULL, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
2091 0ULL, // G_ATOMIC_CMPXCHG
2092 0ULL, // G_ATOMICRMW_XCHG
2093 0ULL, // G_ATOMICRMW_ADD
2094 0ULL, // G_ATOMICRMW_SUB
2095 0ULL, // G_ATOMICRMW_AND
2096 0ULL, // G_ATOMICRMW_NAND
2097 0ULL, // G_ATOMICRMW_OR
2098 0ULL, // G_ATOMICRMW_XOR
2099 0ULL, // G_ATOMICRMW_MAX
2100 0ULL, // G_ATOMICRMW_MIN
2101 0ULL, // G_ATOMICRMW_UMAX
2102 0ULL, // G_ATOMICRMW_UMIN
2103 0ULL, // G_ATOMICRMW_FADD
2104 0ULL, // G_ATOMICRMW_FSUB
2105 0ULL, // G_ATOMICRMW_FMAX
2106 0ULL, // G_ATOMICRMW_FMIN
2107 0ULL, // G_ATOMICRMW_FMAXIMUM
2108 0ULL, // G_ATOMICRMW_FMINIMUM
2109 0ULL, // G_ATOMICRMW_FMAXIMUMNUM
2110 0ULL, // G_ATOMICRMW_FMINIMUMNUM
2111 0ULL, // G_ATOMICRMW_UINC_WRAP
2112 0ULL, // G_ATOMICRMW_UDEC_WRAP
2113 0ULL, // G_ATOMICRMW_USUB_COND
2114 0ULL, // G_ATOMICRMW_USUB_SAT
2115 0ULL, // G_FENCE
2116 0ULL, // G_PREFETCH
2117 0ULL, // G_BRCOND
2118 0ULL, // G_BRINDIRECT
2119 0ULL, // G_INVOKE_REGION_START
2120 0ULL, // G_INTRINSIC
2121 0ULL, // G_INTRINSIC_W_SIDE_EFFECTS
2122 0ULL, // G_INTRINSIC_CONVERGENT
2123 0ULL, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
2124 0ULL, // G_ANYEXT
2125 0ULL, // G_TRUNC
2126 0ULL, // G_TRUNC_SSAT_S
2127 0ULL, // G_TRUNC_SSAT_U
2128 0ULL, // G_TRUNC_USAT_U
2129 0ULL, // G_CONSTANT
2130 0ULL, // G_FCONSTANT
2131 0ULL, // G_VASTART
2132 0ULL, // G_VAARG
2133 0ULL, // G_SEXT
2134 0ULL, // G_SEXT_INREG
2135 0ULL, // G_ZEXT
2136 0ULL, // G_SHL
2137 0ULL, // G_LSHR
2138 0ULL, // G_ASHR
2139 0ULL, // G_FSHL
2140 0ULL, // G_FSHR
2141 0ULL, // G_ROTR
2142 0ULL, // G_ROTL
2143 0ULL, // G_ICMP
2144 0ULL, // G_FCMP
2145 0ULL, // G_SCMP
2146 0ULL, // G_UCMP
2147 0ULL, // G_SELECT
2148 0ULL, // G_UADDO
2149 0ULL, // G_UADDE
2150 0ULL, // G_USUBO
2151 0ULL, // G_USUBE
2152 0ULL, // G_SADDO
2153 0ULL, // G_SADDE
2154 0ULL, // G_SSUBO
2155 0ULL, // G_SSUBE
2156 0ULL, // G_UMULO
2157 0ULL, // G_SMULO
2158 0ULL, // G_UMULH
2159 0ULL, // G_SMULH
2160 0ULL, // G_UADDSAT
2161 0ULL, // G_SADDSAT
2162 0ULL, // G_USUBSAT
2163 0ULL, // G_SSUBSAT
2164 0ULL, // G_USHLSAT
2165 0ULL, // G_SSHLSAT
2166 0ULL, // G_SMULFIX
2167 0ULL, // G_UMULFIX
2168 0ULL, // G_SMULFIXSAT
2169 0ULL, // G_UMULFIXSAT
2170 0ULL, // G_SDIVFIX
2171 0ULL, // G_UDIVFIX
2172 0ULL, // G_SDIVFIXSAT
2173 0ULL, // G_UDIVFIXSAT
2174 0ULL, // G_FADD
2175 0ULL, // G_FSUB
2176 0ULL, // G_FMUL
2177 0ULL, // G_FMA
2178 0ULL, // G_FMAD
2179 0ULL, // G_FDIV
2180 0ULL, // G_FREM
2181 0ULL, // G_FMODF
2182 0ULL, // G_FPOW
2183 0ULL, // G_FPOWI
2184 0ULL, // G_FEXP
2185 0ULL, // G_FEXP2
2186 0ULL, // G_FEXP10
2187 0ULL, // G_FLOG
2188 0ULL, // G_FLOG2
2189 0ULL, // G_FLOG10
2190 0ULL, // G_FLDEXP
2191 0ULL, // G_FFREXP
2192 0ULL, // G_FNEG
2193 0ULL, // G_FPEXT
2194 0ULL, // G_FPTRUNC
2195 0ULL, // G_FPTOSI
2196 0ULL, // G_FPTOUI
2197 0ULL, // G_SITOFP
2198 0ULL, // G_UITOFP
2199 0ULL, // G_FPTOSI_SAT
2200 0ULL, // G_FPTOUI_SAT
2201 0ULL, // G_FABS
2202 0ULL, // G_FCOPYSIGN
2203 0ULL, // G_IS_FPCLASS
2204 0ULL, // G_FCANONICALIZE
2205 0ULL, // G_FMINNUM
2206 0ULL, // G_FMAXNUM
2207 0ULL, // G_FMINNUM_IEEE
2208 0ULL, // G_FMAXNUM_IEEE
2209 0ULL, // G_FMINIMUM
2210 0ULL, // G_FMAXIMUM
2211 0ULL, // G_FMINIMUMNUM
2212 0ULL, // G_FMAXIMUMNUM
2213 0ULL, // G_GET_FPENV
2214 0ULL, // G_SET_FPENV
2215 0ULL, // G_RESET_FPENV
2216 0ULL, // G_GET_FPMODE
2217 0ULL, // G_SET_FPMODE
2218 0ULL, // G_RESET_FPMODE
2219 0ULL, // G_GET_ROUNDING
2220 0ULL, // G_SET_ROUNDING
2221 0ULL, // G_PTR_ADD
2222 0ULL, // G_PTRMASK
2223 0ULL, // G_SMIN
2224 0ULL, // G_SMAX
2225 0ULL, // G_UMIN
2226 0ULL, // G_UMAX
2227 0ULL, // G_ABS
2228 0ULL, // G_LROUND
2229 0ULL, // G_LLROUND
2230 0ULL, // G_BR
2231 0ULL, // G_BRJT
2232 0ULL, // G_VSCALE
2233 0ULL, // G_INSERT_SUBVECTOR
2234 0ULL, // G_EXTRACT_SUBVECTOR
2235 0ULL, // G_INSERT_VECTOR_ELT
2236 0ULL, // G_EXTRACT_VECTOR_ELT
2237 0ULL, // G_SHUFFLE_VECTOR
2238 0ULL, // G_SPLAT_VECTOR
2239 0ULL, // G_STEP_VECTOR
2240 0ULL, // G_VECTOR_COMPRESS
2241 0ULL, // G_CTTZ
2242 0ULL, // G_CTTZ_ZERO_POISON
2243 0ULL, // G_CTLZ
2244 0ULL, // G_CTLZ_ZERO_POISON
2245 0ULL, // G_CTLS
2246 0ULL, // G_CTPOP
2247 0ULL, // G_BSWAP
2248 0ULL, // G_BITREVERSE
2249 0ULL, // G_CLMUL
2250 0ULL, // G_CLMULH
2251 0ULL, // G_CLMULR
2252 0ULL, // G_FCEIL
2253 0ULL, // G_FCOS
2254 0ULL, // G_FSIN
2255 0ULL, // G_FSINCOS
2256 0ULL, // G_FTAN
2257 0ULL, // G_FACOS
2258 0ULL, // G_FASIN
2259 0ULL, // G_FATAN
2260 0ULL, // G_FATAN2
2261 0ULL, // G_FCOSH
2262 0ULL, // G_FSINH
2263 0ULL, // G_FTANH
2264 0ULL, // G_FSQRT
2265 0ULL, // G_FFLOOR
2266 0ULL, // G_FRINT
2267 0ULL, // G_FNEARBYINT
2268 0ULL, // G_ADDRSPACE_CAST
2269 0ULL, // G_BLOCK_ADDR
2270 0ULL, // G_JUMP_TABLE
2271 0ULL, // G_DYN_STACKALLOC
2272 0ULL, // G_STACKSAVE
2273 0ULL, // G_STACKRESTORE
2274 0ULL, // G_STRICT_FADD
2275 0ULL, // G_STRICT_FSUB
2276 0ULL, // G_STRICT_FMUL
2277 0ULL, // G_STRICT_FDIV
2278 0ULL, // G_STRICT_FREM
2279 0ULL, // G_STRICT_FMA
2280 0ULL, // G_STRICT_FSQRT
2281 0ULL, // G_STRICT_FLDEXP
2282 0ULL, // G_STRICT_FCMP
2283 0ULL, // G_STRICT_FCMPS
2284 0ULL, // G_READ_REGISTER
2285 0ULL, // G_WRITE_REGISTER
2286 0ULL, // G_MEMCPY
2287 0ULL, // G_MEMCPY_INLINE
2288 0ULL, // G_MEMMOVE
2289 0ULL, // G_MEMSET
2290 0ULL, // G_BZERO
2291 0ULL, // G_MEMSET_INLINE
2292 0ULL, // G_TRAP
2293 0ULL, // G_DEBUGTRAP
2294 0ULL, // G_UBSANTRAP
2295 0ULL, // G_VECREDUCE_SEQ_FADD
2296 0ULL, // G_VECREDUCE_SEQ_FMUL
2297 0ULL, // G_VECREDUCE_FADD
2298 0ULL, // G_VECREDUCE_FMUL
2299 0ULL, // G_VECREDUCE_FMAX
2300 0ULL, // G_VECREDUCE_FMIN
2301 0ULL, // G_VECREDUCE_FMAXIMUM
2302 0ULL, // G_VECREDUCE_FMINIMUM
2303 0ULL, // G_VECREDUCE_FMAXIMUMNUM
2304 0ULL, // G_VECREDUCE_FMINIMUMNUM
2305 0ULL, // G_VECREDUCE_ADD
2306 0ULL, // G_VECREDUCE_MUL
2307 0ULL, // G_VECREDUCE_AND
2308 0ULL, // G_VECREDUCE_OR
2309 0ULL, // G_VECREDUCE_XOR
2310 0ULL, // G_VECREDUCE_SMAX
2311 0ULL, // G_VECREDUCE_SMIN
2312 0ULL, // G_VECREDUCE_UMAX
2313 0ULL, // G_VECREDUCE_UMIN
2314 0ULL, // G_SBFX
2315 0ULL, // G_UBFX
2316 16924ULL, // ATOMIC_CMP_SWAP_I128
2317 16839ULL, // ATOMIC_LOAD_ADD_I128
2318 16884ULL, // ATOMIC_LOAD_AND_I128
2319 16861ULL, // ATOMIC_LOAD_NAND_I128
2320 16968ULL, // ATOMIC_LOAD_OR_I128
2321 16817ULL, // ATOMIC_LOAD_SUB_I128
2322 16946ULL, // ATOMIC_LOAD_XOR_I128
2323 16906ULL, // ATOMIC_SWAP_I128
2324 17515ULL, // BUILD_QUADWORD
2325 35563ULL, // BUILD_UACC
2326 17601ULL, // CFENCE
2327 17013ULL, // CFENCE8
2328 2147522064ULL, // CLRLSLDI
2329 2147517336ULL, // CLRLSLDI_rec
2330 4434553772070ULL, // CLRLSLWI
2331 4434553766933ULL, // CLRLSLWI_rec
2332 1101659149875ULL, // CLRRDI
2333 1101659145139ULL, // CLRRDI_rec
2334 1136018888783ULL, // CLRRWI
2335 1136018883634ULL, // CLRRWI_rec
2336 1120472ULL, // DCBFL
2337 1123415ULL, // DCBFLP
2338 1126093ULL, // DCBFPS
2339 1118997ULL, // DCBFx
2340 1126101ULL, // DCBSTPS
2341 33632371ULL, // DCBTCT
2342 33631642ULL, // DCBTDS
2343 33632379ULL, // DCBTSTCT
2344 33631650ULL, // DCBTSTDS
2345 1126760ULL, // DCBTSTT
2346 1126732ULL, // DCBTSTx
2347 1126747ULL, // DCBTT
2348 1126503ULL, // DCBTx
2349 16445ULL, // DFLOADf32
2350 16637ULL, // DFLOADf64
2351 16467ULL, // DFSTOREf32
2352 16659ULL, // DFSTOREf64
2353 2147522074ULL, // EXTLDI
2354 2147517347ULL, // EXTLDI_rec
2355 4434553772096ULL, // EXTLWI
2356 4434553766953ULL, // EXTLWI_rec
2357 2147522123ULL, // EXTRDI
2358 2147517390ULL, // EXTRDI_rec
2359 4434553772135ULL, // EXTRWI
2360 4434553766989ULL, // EXTRWI_rec
2361 4434553772080ULL, // INSLWI
2362 4434553766944ULL, // INSLWI_rec
2363 2147522107ULL, // INSRDI
2364 2147517372ULL, // INSRDI_rec
2365 4434553772119ULL, // INSRWI
2366 4434553766971ULL, // INSRWI_rec
2367 18034ULL, // KILL_PAIR
2368 67144812ULL, // LAx
2369 17831ULL, // LDAT_CSNE_PSEUDO
2370 18277ULL, // LIWAX
2371 18425ULL, // LIWZX
2372 17849ULL, // LWAT_CSNE_PSEUDO
2373 17470ULL, // PPCLdFixedAddr
2374 1170378626533ULL, // PSUBI
2375 8832600282834ULL, // RLWIMIbm
2376 8832600278012ULL, // RLWIMIbm_rec
2377 8832600283925ULL, // RLWINMbm
2378 8832600278178ULL, // RLWINMbm_rec
2379 8832600283942ULL, // RLWNMbm
2380 8832600278187ULL, // RLWNMbm_rec
2381 1101659149891ULL, // ROTRDI
2382 1101659145157ULL, // ROTRDI_rec
2383 1136018888799ULL, // ROTRWI
2384 1136018883652ULL, // ROTRWI_rec
2385 1101659149844ULL, // SLDI
2386 1101659145116ULL, // SLDI_rec
2387 1136018888746ULL, // SLWI
2388 1136018883609ULL, // SLWI_rec
2389 17479ULL, // SPILLTOVSR_LD
2390 18284ULL, // SPILLTOVSR_LDX
2391 18262ULL, // SPILLTOVSR_ST
2392 18402ULL, // SPILLTOVSR_STX
2393 1101659149885ULL, // SRDI
2394 1101659145150ULL, // SRDI_rec
2395 1136018888793ULL, // SRWI
2396 1136018883645ULL, // SRWI_rec
2397 18418ULL, // STIWX
2398 105226737126ULL, // SUBI
2399 105226735350ULL, // SUBIC
2400 105226731972ULL, // SUBIC_rec
2401 105226743423ULL, // SUBIS
2402 100707974ULL, // SUBPCIS
2403 16456ULL, // XFLOADf32
2404 16648ULL, // XFLOADf64
2405 16479ULL, // XFSTOREf32
2406 16671ULL, // XFSTOREf64
2407 1239098101726ULL, // ADD4
2408 1239098105487ULL, // ADD4O
2409 1239098098959ULL, // ADD4O_rec
2410 1239098101726ULL, // ADD4TLS
2411 1239098098199ULL, // ADD4_rec
2412 1239098101726ULL, // ADD8
2413 1239098105487ULL, // ADD8O
2414 1239098098959ULL, // ADD8O_rec
2415 1239098101726ULL, // ADD8TLS
2416 1239098101726ULL, // ADD8TLS_
2417 1239098098199ULL, // ADD8_rec
2418 1239098101448ULL, // ADDC
2419 1239098101448ULL, // ADDC8
2420 1239098105472ULL, // ADDC8O
2421 1239098098942ULL, // ADDC8O_rec
2422 1239098098083ULL, // ADDC8_rec
2423 1239098105472ULL, // ADDCO
2424 1239098098942ULL, // ADDCO_rec
2425 1239098098083ULL, // ADDC_rec
2426 1239098102400ULL, // ADDE
2427 1239098102400ULL, // ADDE8
2428 1239098105508ULL, // ADDE8O
2429 1239098098983ULL, // ADDE8O_rec
2430 1239098098362ULL, // ADDE8_rec
2431 1239098105508ULL, // ADDEO
2432 1239098098983ULL, // ADDEO_rec
2433 13333726017666ULL, // ADDEX
2434 13333726017666ULL, // ADDEX8
2435 1239098098362ULL, // ADDE_rec
2436 1239098109145ULL, // ADDG6S
2437 1239098109145ULL, // ADDG6S8
2438 105226737154ULL, // ADDI
2439 105226737154ULL, // ADDI8
2440 105226735357ULL, // ADDIC
2441 105226735357ULL, // ADDIC8
2442 105226731980ULL, // ADDIC_rec
2443 105226743449ULL, // ADDIS
2444 105226743449ULL, // ADDIS8
2445 17241ULL, // ADDISdtprelHA
2446 16160ULL, // ADDISdtprelHA32
2447 17224ULL, // ADDISgotTprelHA
2448 17196ULL, // ADDIStlsgdHA
2449 17210ULL, // ADDIStlsldHA
2450 17184ULL, // ADDIStocHA
2451 16989ULL, // ADDIStocHA8
2452 17810ULL, // ADDIdtprelL
2453 16220ULL, // ADDIdtprelL32
2454 17773ULL, // ADDItlsgdL
2455 16177ULL, // ADDItlsgdL32
2456 17976ULL, // ADDItlsgdLADDR
2457 16272ULL, // ADDItlsgdLADDR32
2458 17785ULL, // ADDItlsldL
2459 16191ULL, // ADDItlsldL32
2460 17992ULL, // ADDItlsldLADDR
2461 16290ULL, // ADDItlsldLADDR32
2462 18507ULL, // ADDItoc
2463 17174ULL, // ADDItoc8
2464 17754ULL, // ADDItocL
2465 17072ULL, // ADDItocL8
2466 37571ULL, // ADDME
2467 37571ULL, // ADDME8
2468 40635ULL, // ADDME8O
2469 34113ULL, // ADDME8O_rec
2470 33498ULL, // ADDME8_rec
2471 40635ULL, // ADDMEO
2472 34113ULL, // ADDMEO_rec
2473 33498ULL, // ADDME_rec
2474 44687ULL, // ADDPCIS
2475 37638ULL, // ADDZE
2476 37638ULL, // ADDZE8
2477 40660ULL, // ADDZE8O
2478 34141ULL, // ADDZE8O_rec
2479 33547ULL, // ADDZE8_rec
2480 40660ULL, // ADDZEO
2481 34141ULL, // ADDZEO_rec
2482 33547ULL, // ADDZE_rec
2483 101112ULL, // ADJCALLSTACKDOWN
2484 101131ULL, // ADJCALLSTACKUP
2485 1239098101981ULL, // AND
2486 1239098101981ULL, // AND8
2487 1239098098268ULL, // AND8_rec
2488 1239098101457ULL, // ANDC
2489 1239098101457ULL, // ANDC8
2490 1239098098090ULL, // ANDC8_rec
2491 1239098098090ULL, // ANDC_rec
2492 173946209196ULL, // ANDI8_rec
2493 173946210271ULL, // ANDIS8_rec
2494 173946210271ULL, // ANDIS_rec
2495 173946209196ULL, // ANDI_rec
2496 18161ULL, // ANDI_rec_1_EQ_BIT
2497 17112ULL, // ANDI_rec_1_EQ_BIT8
2498 18180ULL, // ANDI_rec_1_GT_BIT
2499 17132ULL, // ANDI_rec_1_GT_BIT8
2500 1239098098268ULL, // AND_rec
2501 17616ULL, // ATOMIC_CMP_SWAP_I16
2502 17616ULL, // ATOMIC_CMP_SWAP_I32
2503 17616ULL, // ATOMIC_CMP_SWAP_I64
2504 17616ULL, // ATOMIC_CMP_SWAP_I8
2505 17616ULL, // ATOMIC_LOAD_ADD
2506 17616ULL, // ATOMIC_LOAD_ADD_I64
2507 17616ULL, // ATOMIC_LOAD_ADD_NOWP
2508 17616ULL, // ATOMIC_LOAD_AND
2509 17616ULL, // ATOMIC_LOAD_AND_I64
2510 17616ULL, // ATOMIC_LOAD_AND_NOWP
2511 17616ULL, // ATOMIC_LOAD_MAX
2512 17616ULL, // ATOMIC_LOAD_MAX_I64
2513 17616ULL, // ATOMIC_LOAD_MAX_NOWP
2514 17616ULL, // ATOMIC_LOAD_MIN
2515 17616ULL, // ATOMIC_LOAD_MIN_I64
2516 17616ULL, // ATOMIC_LOAD_MIN_NOWP
2517 17616ULL, // ATOMIC_LOAD_NAND
2518 17616ULL, // ATOMIC_LOAD_NAND_I64
2519 17616ULL, // ATOMIC_LOAD_NAND_NOWP
2520 17616ULL, // ATOMIC_LOAD_OR
2521 17616ULL, // ATOMIC_LOAD_OR_I64
2522 17616ULL, // ATOMIC_LOAD_OR_NOWP
2523 17616ULL, // ATOMIC_LOAD_SUB
2524 17616ULL, // ATOMIC_LOAD_SUB_I64
2525 17616ULL, // ATOMIC_LOAD_SUB_NOWP
2526 17616ULL, // ATOMIC_LOAD_UMAX
2527 17616ULL, // ATOMIC_LOAD_UMAX_I64
2528 17616ULL, // ATOMIC_LOAD_UMAX_NOWP
2529 17616ULL, // ATOMIC_LOAD_UMIN
2530 17616ULL, // ATOMIC_LOAD_UMIN_I64
2531 17616ULL, // ATOMIC_LOAD_UMIN_NOWP
2532 17616ULL, // ATOMIC_LOAD_XOR
2533 17616ULL, // ATOMIC_LOAD_XOR_I64
2534 17616ULL, // ATOMIC_LOAD_XOR_NOWP
2535 17616ULL, // ATOMIC_SWAP
2536 17616ULL, // ATOMIC_SWAP_I64
2537 17616ULL, // ATOMIC_SWAP_NOWP
2538 18635ULL, // ATTN
2539 1182903ULL, // B
2540 1215397ULL, // BA
2541 134250615ULL, // BC
2542 2312219ULL, // BCC
2543 3360795ULL, // BCCA
2544 4409371ULL, // BCCCTR
2545 4409371ULL, // BCCCTR8
2546 5457947ULL, // BCCCTRL
2547 5457947ULL, // BCCCTRL8
2548 6506523ULL, // BCCL
2549 7555099ULL, // BCCLA
2550 8603675ULL, // BCCLR
2551 9652251ULL, // BCCLRL
2552 10518697ULL, // BCCTR
2553 10518697ULL, // BCCTR8
2554 10518763ULL, // BCCTR8n
2555 10518675ULL, // BCCTRL
2556 10518675ULL, // BCCTRL8
2557 10518743ULL, // BCCTRL8n
2558 10518743ULL, // BCCTRLn
2559 10518763ULL, // BCCTRn
2560 17731772514836ULL, // BCDADD_rec
2561 1307817575603ULL, // BCDCFN_rec
2562 1307817576129ULL, // BCDCFSQ_rec
2563 1307817576819ULL, // BCDCFZ_rec
2564 1239098098876ULL, // BCDCPSGN_rec
2565 34028ULL, // BCDCTN_rec
2566 34507ULL, // BCDCTSQ_rec
2567 1307817576835ULL, // BCDCTZ_rec
2568 1307817575632ULL, // BCDSETSGN_rec
2569 17731772516195ULL, // BCDSR_rec
2570 17731772514668ULL, // BCDSUB_rec
2571 17731772516251ULL, // BCDS_rec
2572 17731772514780ULL, // BCDTRUNC_rec
2573 1239098099704ULL, // BCDUS_rec
2574 1239098098151ULL, // BCDUTRUNC_rec
2575 134250623ULL, // BCL
2576 10518687ULL, // BCLR
2577 10518664ULL, // BCLRL
2578 10518733ULL, // BCLRLn
2579 10518754ULL, // BCLRn
2580 1179725ULL, // BCLalways
2581 134250693ULL, // BCLn
2582 18716ULL, // BCTR
2583 18716ULL, // BCTR8
2584 18629ULL, // BCTRL
2585 18629ULL, // BCTRL8
2586 229466ULL, // BCTRL8_LDinto_toc
2587 229466ULL, // BCTRL8_LDinto_toc_RM
2588 18629ULL, // BCTRL8_RM
2589 229480ULL, // BCTRL_LWZinto_toc
2590 229480ULL, // BCTRL_LWZinto_toc_RM
2591 18629ULL, // BCTRL_RM
2592 134250686ULL, // BCn
2593 1195440ULL, // BDNZ
2594 1195440ULL, // BDNZ8
2595 1215660ULL, // BDNZA
2596 1212697ULL, // BDNZAm
2597 1212457ULL, // BDNZAp
2598 1186222ULL, // BDNZL
2599 1215618ULL, // BDNZLA
2600 1212681ULL, // BDNZLAm
2601 1212441ULL, // BDNZLAp
2602 18709ULL, // BDNZLR
2603 18709ULL, // BDNZLR8
2604 18621ULL, // BDNZLRL
2605 15954ULL, // BDNZLRLm
2606 15911ULL, // BDNZLRLp
2607 15970ULL, // BDNZLRm
2608 15927ULL, // BDNZLRp
2609 1179944ULL, // BDNZLm
2610 1179704ULL, // BDNZLp
2611 1179958ULL, // BDNZm
2612 1179718ULL, // BDNZp
2613 1195286ULL, // BDZ
2614 1195286ULL, // BDZ8
2615 1215654ULL, // BDZA
2616 1212690ULL, // BDZAm
2617 1212450ULL, // BDZAp
2618 1186216ULL, // BDZL
2619 1215611ULL, // BDZLA
2620 1212673ULL, // BDZLAm
2621 1212433ULL, // BDZLAp
2622 18703ULL, // BDZLR
2623 18703ULL, // BDZLR8
2624 18614ULL, // BDZLRL
2625 15946ULL, // BDZLRLm
2626 15903ULL, // BDZLRLp
2627 15963ULL, // BDZLRm
2628 15920ULL, // BDZLRp
2629 1179937ULL, // BDZLm
2630 1179697ULL, // BDZLp
2631 1179952ULL, // BDZm
2632 1179712ULL, // BDZp
2633 1185951ULL, // BL
2634 1185951ULL, // BL8
2635 11671711ULL, // BL8_LDinto_toc
2636 11671711ULL, // BL8_LDinto_toc_RM
2637 12720287ULL, // BL8_NOP
2638 12720287ULL, // BL8_NOP_RM
2639 12851359ULL, // BL8_NOP_TLS
2640 1185951ULL, // BL8_NOTOC
2641 1185951ULL, // BL8_NOTOC_RM
2642 1317023ULL, // BL8_NOTOC_TLS
2643 1185951ULL, // BL8_RM
2644 1317023ULL, // BL8_TLS
2645 1317023ULL, // BL8_TLS_
2646 1215595ULL, // BLA
2647 1215595ULL, // BLA8
2648 12749931ULL, // BLA8_NOP
2649 12749931ULL, // BLA8_NOP_RM
2650 1215595ULL, // BLA8_RM
2651 1215595ULL, // BLA_RM
2652 18699ULL, // BLR
2653 18699ULL, // BLR8
2654 18609ULL, // BLRL
2655 13768863ULL, // BL_LWZinto_toc
2656 13768863ULL, // BL_LWZinto_toc_RM
2657 12720287ULL, // BL_NOP
2658 12720287ULL, // BL_NOP_RM
2659 1185951ULL, // BL_RM
2660 1317023ULL, // BL_TLS
2661 1239098101961ULL, // BPERMD
2662 37160ULL, // BRD
2663 38042ULL, // BRH
2664 38042ULL, // BRH8
2665 1239098101569ULL, // BRINC
2666 46560ULL, // BRW
2667 46560ULL, // BRW8
2668 37300ULL, // CBCDTD
2669 37300ULL, // CBCDTD8
2670 36819ULL, // CDTBCD
2671 36819ULL, // CDTBCD8
2672 1239098101824ULL, // CFUGED
2673 18453ULL, // CLRBHRB
2674 1239098101081ULL, // CMPB
2675 1239098101081ULL, // CMPB8
2676 1239098102048ULL, // CMPD
2677 105226737196ULL, // CMPDI
2678 1239098101087ULL, // CMPEQB
2679 1239098101932ULL, // CMPLD
2680 173946213896ULL, // CMPLDI
2681 1239098111184ULL, // CMPLW
2682 173946214422ULL, // CMPLWI
2683 8935847267687ULL, // CMPRB
2684 8935847267687ULL, // CMPRB8
2685 1239098111448ULL, // CMPW
2686 105226737736ULL, // CMPWI
2687 37464ULL, // CNTLZD
2688 1239098104418ULL, // CNTLZDM
2689 33448ULL, // CNTLZD_rec
2690 46949ULL, // CNTLZW
2691 46949ULL, // CNTLZW8
2692 35071ULL, // CNTLZW8_rec
2693 35071ULL, // CNTLZW_rec
2694 37479ULL, // CNTTZD
2695 1239098104435ULL, // CNTTZDM
2696 33457ULL, // CNTTZD_rec
2697 46964ULL, // CNTTZW
2698 46964ULL, // CNTTZW8
2699 35080ULL, // CNTTZW8_rec
2700 35080ULL, // CNTTZW_rec
2701 18721ULL, // CP_ABORT
2702 48375ULL, // CP_COPY
2703 48375ULL, // CP_COPY8
2704 1307817575163ULL, // CP_PASTE8_rec
2705 1307817575163ULL, // CP_PASTE_rec
2706 16776ULL, // CR6SET
2707 16762ULL, // CR6UNSET
2708 1239098102011ULL, // CRAND
2709 1239098101463ULL, // CRANDC
2710 1239098110630ULL, // CREQV
2711 1239098101995ULL, // CRNAND
2712 1239098108999ULL, // CRNOR
2713 45319ULL, // CRNOT
2714 1239098109013ULL, // CROR
2715 1239098101590ULL, // CRORC
2716 242867024550ULL, // CRSET
2717 242867022970ULL, // CRUNSET
2718 1239098109050ULL, // CRXOR
2719 2312219ULL, // CTRL_DEP
2720 1239098101725ULL, // DADD
2721 1239098108281ULL, // DADDQ
2722 1239098099296ULL, // DADDQ_rec
2723 1239098098198ULL, // DADD_rec
2724 234921567ULL, // DARN
2725 1117091ULL, // DCBA
2726 14979861ULL, // DCBF
2727 1123137ULL, // DCBFEP
2728 1119689ULL, // DCBI
2729 1126712ULL, // DCBST
2730 1123178ULL, // DCBSTEP
2731 16035943ULL, // DCBT
2732 336738ULL, // DCBTEP
2733 16036172ULL, // DCBTST
2734 336755ULL, // DCBTSTEP
2735 1129725ULL, // DCBZ
2736 1123197ULL, // DCBZEP
2737 1120673ULL, // DCBZL
2738 1123161ULL, // DCBZLEP
2739 38380ULL, // DCCCI
2740 47417ULL, // DCFFIX
2741 43853ULL, // DCFFIXQ
2742 43599ULL, // DCFFIXQQ
2743 34574ULL, // DCFFIXQ_rec
2744 35143ULL, // DCFFIX_rec
2745 1239098105667ULL, // DCMPO
2746 1239098108472ULL, // DCMPOQ
2747 1239098110460ULL, // DCMPU
2748 1239098108675ULL, // DCMPUQ
2749 41634ULL, // DCTDP
2750 34254ULL, // DCTDP_rec
2751 47425ULL, // DCTFIX
2752 43862ULL, // DCTFIXQ
2753 43609ULL, // DCTFIXQQ
2754 34584ULL, // DCTFIXQ_rec
2755 35152ULL, // DCTFIX_rec
2756 43591ULL, // DCTQPQ
2757 34488ULL, // DCTQPQ_rec
2758 364816ULL, // DDEDPD
2759 371080ULL, // DDEDPDQ
2760 362097ULL, // DDEDPDQ_rec
2761 361073ULL, // DDEDPD_rec
2762 1239098110580ULL, // DDIV
2763 1239098108719ULL, // DDIVQ
2764 1239098099446ULL, // DDIVQ_rec
2765 1239098099835ULL, // DDIV_rec
2766 1445835ULL, // DENBCD
2767 1452400ULL, // DENBCDQ
2768 1443414ULL, // DENBCDQ_rec
2769 1442315ULL, // DENBCD_rec
2770 1239098112156ULL, // DIEX
2771 1239098108726ULL, // DIEXQ
2772 1239098099454ULL, // DIEXQ_rec
2773 1239098100025ULL, // DIEX_rec
2774 1239098102347ULL, // DIVD
2775 1239098102406ULL, // DIVDE
2776 1239098105515ULL, // DIVDEO
2777 1239098098991ULL, // DIVDEO_rec
2778 1239098110420ULL, // DIVDEU
2779 1239098105792ULL, // DIVDEUO
2780 1239098099080ULL, // DIVDEUO_rec
2781 1239098099791ULL, // DIVDEU_rec
2782 1239098098369ULL, // DIVDE_rec
2783 1239098105501ULL, // DIVDO
2784 1239098098975ULL, // DIVDO_rec
2785 1239098110413ULL, // DIVDU
2786 1239098105784ULL, // DIVDUO
2787 1239098099071ULL, // DIVDUO_rec
2788 1239098099783ULL, // DIVDU_rec
2789 1239098098337ULL, // DIVD_rec
2790 1239098111820ULL, // DIVW
2791 1239098102518ULL, // DIVWE
2792 1239098105548ULL, // DIVWEO
2793 1239098099028ULL, // DIVWEO_rec
2794 1239098110428ULL, // DIVWEU
2795 1239098105801ULL, // DIVWEUO
2796 1239098099090ULL, // DIVWEUO_rec
2797 1239098099800ULL, // DIVWEU_rec
2798 1239098098435ULL, // DIVWE_rec
2799 1239098105826ULL, // DIVWO
2800 1239098099118ULL, // DIVWO_rec
2801 1239098110539ULL, // DIVWU
2802 1239098105810ULL, // DIVWUO
2803 1239098099100ULL, // DIVWUO_rec
2804 1239098099827ULL, // DIVWU_rec
2805 1239098099949ULL, // DIVW_rec
2806 44051ULL, // DMMR
2807 1097164ULL, // DMSETDMRZ
2808 277293864101ULL, // DMSHA2HASH
2809 33592497ULL, // DMSHA3HASH
2810 1239098104160ULL, // DMUL
2811 1239098108447ULL, // DMULQ
2812 1239098099358ULL, // DMULQ_rec
2813 1239098098818ULL, // DMUL_rec
2814 268479593ULL, // DMXOR
2815 1239098100259ULL, // DMXVBF16GERX2
2816 1411165232541ULL, // DMXVBF16GERX2NN
2817 1411165234304ULL, // DMXVBF16GERX2NP
2818 1411165232637ULL, // DMXVBF16GERX2PN
2819 1411165234415ULL, // DMXVBF16GERX2PP
2820 1239098100276ULL, // DMXVF16GERX2
2821 1411165232560ULL, // DMXVF16GERX2NN
2822 1411165234323ULL, // DMXVF16GERX2NP
2823 1411165232656ULL, // DMXVF16GERX2PN
2824 1411165234434ULL, // DMXVF16GERX2PP
2825 1239098100304ULL, // DMXVI8GERX4
2826 1411165234466ULL, // DMXVI8GERX4PP
2827 1411165234556ULL, // DMXVI8GERX4SPP
2828 1445256530569ULL, // DMXXEXTFDMR256
2829 2338609727929ULL, // DMXXEXTFDMR512
2830 3438121355705ULL, // DMXXEXTFDMR512_HI
2831 1445256530585ULL, // DMXXINSTDMR256
2832 2338609727945ULL, // DMXXINSTDMR512
2833 3438121355721ULL, // DMXXINSTDMR512_HI
2834 1096969ULL, // DMXXSETACCZ
2835 380373077919ULL, // DMXXSHAPAD
2836 13333726006417ULL, // DQUA
2837 431554ULL, // DQUAI
2838 436714ULL, // DQUAIQ
2839 427643ULL, // DQUAIQ_rec
2840 426864ULL, // DQUAI_rec
2841 13333726013776ULL, // DQUAQ
2842 13333726004806ULL, // DQUAQ_rec
2843 13333726003517ULL, // DQUA_rec
2844 43584ULL, // DRDPQ
2845 34480ULL, // DRDPQ_rec
2846 302390904ULL, // DRINTN
2847 302393903ULL, // DRINTNQ
2848 302384806ULL, // DRINTNQ_rec
2849 302384373ULL, // DRINTN_rec
2850 302398438ULL, // DRINTX
2851 302394207ULL, // DRINTXQ
2852 302384930ULL, // DRINTXQ_rec
2853 302385505ULL, // DRINTX_rec
2854 13333726007561ULL, // DRRND
2855 13333726013824ULL, // DRRNDQ
2856 13333726004840ULL, // DRRNDQ_rec
2857 13333726003817ULL, // DRRND_rec
2858 43138ULL, // DRSP
2859 34348ULL, // DRSP_rec
2860 1101659149979ULL, // DSCLI
2861 1101659154940ULL, // DSCLIQ
2862 1101659145860ULL, // DSCLIQ_rec
2863 1101659145184ULL, // DSCLI_rec
2864 1101659150207ULL, // DSCRI
2865 1101659154948ULL, // DSCRIQ
2866 1101659145869ULL, // DSCRIQ_rec
2867 1101659145221ULL, // DSCRI_rec
2868 1519330ULL, // DSS
2869 18602ULL, // DSSALL
2870 414733283647ULL, // DST
2871 414733283647ULL, // DST64
2872 414733283668ULL, // DSTST
2873 414733283668ULL, // DSTST64
2874 414733283697ULL, // DSTSTT
2875 414733283697ULL, // DSTSTT64
2876 414733283682ULL, // DSTT
2877 414733283682ULL, // DSTT64
2878 1239098101306ULL, // DSUB
2879 1239098108247ULL, // DSUBQ
2880 1239098099278ULL, // DSUBQ_rec
2881 1239098098030ULL, // DSUB_rec
2882 1101659148007ULL, // DTSTDC
2883 1101659154791ULL, // DTSTDCQ
2884 1101659149313ULL, // DTSTDG
2885 1101659154913ULL, // DTSTDGQ
2886 1239098112162ULL, // DTSTEX
2887 1239098108733ULL, // DTSTEXQ
2888 1239098102731ULL, // DTSTSF
2889 335582824ULL, // DTSTSFI
2890 335587826ULL, // DTSTSFIQ
2891 1239098108376ULL, // DTSTSFQ
2892 47284ULL, // DXEX
2893 43846ULL, // DXEXQ
2894 34566ULL, // DXEXQ_rec
2895 35136ULL, // DXEX_rec
2896 17340ULL, // DYNALLOC
2897 17002ULL, // DYNALLOC8
2898 18118ULL, // DYNAREAOFFSET
2899 17096ULL, // DYNAREAOFFSET8
2900 18659ULL, // DecreaseCTR8loop
2901 18677ULL, // DecreaseCTRloop
2902 44257ULL, // EFDABS
2903 1239098101723ULL, // EFDADD
2904 44548ULL, // EFDCFS
2905 37733ULL, // EFDCFSF
2906 38796ULL, // EFDCFSI
2907 36986ULL, // EFDCFSID
2908 37843ULL, // EFDCFUF
2909 38862ULL, // EFDCFUI
2910 37003ULL, // EFDCFUID
2911 1239098108305ULL, // EFDCMPEQ
2912 1239098110085ULL, // EFDCMPGT
2913 1239098110153ULL, // EFDCMPLT
2914 37807ULL, // EFDCTSF
2915 38824ULL, // EFDCTSI
2916 48411ULL, // EFDCTSIDZ
2917 48509ULL, // EFDCTSIZ
2918 37871ULL, // EFDCTUF
2919 38890ULL, // EFDCTUI
2920 48430ULL, // EFDCTUIDZ
2921 48540ULL, // EFDCTUIZ
2922 1239098110578ULL, // EFDDIV
2923 1239098104158ULL, // EFDMUL
2924 44271ULL, // EFDNABS
2925 37905ULL, // EFDNEG
2926 1239098101304ULL, // EFDSUB
2927 1239098108345ULL, // EFDTSTEQ
2928 1239098110116ULL, // EFDTSTGT
2929 1239098110184ULL, // EFDTSTLT
2930 44306ULL, // EFSABS
2931 1239098101782ULL, // EFSADD
2932 36936ULL, // EFSCFD
2933 37742ULL, // EFSCFSF
2934 38805ULL, // EFSCFSI
2935 37852ULL, // EFSCFUF
2936 38871ULL, // EFSCFUI
2937 1239098108315ULL, // EFSCMPEQ
2938 1239098110095ULL, // EFSCMPGT
2939 1239098110163ULL, // EFSCMPLT
2940 37816ULL, // EFSCTSF
2941 38833ULL, // EFSCTSI
2942 48519ULL, // EFSCTSIZ
2943 37880ULL, // EFSCTUF
2944 38899ULL, // EFSCTUI
2945 48550ULL, // EFSCTUIZ
2946 1239098110592ULL, // EFSDIV
2947 1239098104182ULL, // EFSMUL
2948 44287ULL, // EFSNABS
2949 37919ULL, // EFSNEG
2950 1239098101333ULL, // EFSSUB
2951 1239098108355ULL, // EFSTSTEQ
2952 1239098110126ULL, // EFSTSTGT
2953 1239098110194ULL, // EFSTSTLT
2954 16235ULL, // EH_SjLj_LongJmp32
2955 16491ULL, // EH_SjLj_LongJmp64
2956 16254ULL, // EH_SjLj_SetJmp32
2957 16510ULL, // EH_SjLj_SetJmp64
2958 1179649ULL, // EH_SjLj_Setup
2959 1239098110625ULL, // EQV
2960 1239098110625ULL, // EQV8
2961 1239098099849ULL, // EQV8_rec
2962 1239098099849ULL, // EQV_rec
2963 44323ULL, // EVABS
2964 1548369310878ULL, // EVADDIW
2965 45839ULL, // EVADDSMIAAW
2966 45971ULL, // EVADDSSIAAW
2967 45905ULL, // EVADDUMIAAW
2968 46037ULL, // EVADDUSIAAW
2969 1239098111036ULL, // EVADDW
2970 1239098102018ULL, // EVAND
2971 1239098101471ULL, // EVANDC
2972 1239098108336ULL, // EVCMPEQ
2973 1239098109689ULL, // EVCMPGTS
2974 1239098110487ULL, // EVCMPGTU
2975 1239098109699ULL, // EVCMPLTS
2976 1239098110497ULL, // EVCMPLTU
2977 46643ULL, // EVCNTLSW
2978 46947ULL, // EVCNTLZW
2979 1239098109867ULL, // EVDIVWS
2980 1239098110537ULL, // EVDIVWU
2981 1239098110637ULL, // EVEQV
2982 36292ULL, // EVEXTSB
2983 38159ULL, // EVEXTSH
2984 44314ULL, // EVFSABS
2985 1239098101790ULL, // EVFSADD
2986 37751ULL, // EVFSCFSF
2987 38814ULL, // EVFSCFSI
2988 37861ULL, // EVFSCFUF
2989 38880ULL, // EVFSCFUI
2990 1239098108325ULL, // EVFSCMPEQ
2991 1239098110105ULL, // EVFSCMPGT
2992 1239098110173ULL, // EVFSCMPLT
2993 37825ULL, // EVFSCTSF
2994 38842ULL, // EVFSCTSI
2995 48529ULL, // EVFSCTSIZ
2996 37825ULL, // EVFSCTUF
2997 38908ULL, // EVFSCTUI
2998 48529ULL, // EVFSCTUIZ
2999 1239098110600ULL, // EVFSDIV
3000 1239098104190ULL, // EVFSMUL
3001 44296ULL, // EVFSNABS
3002 37927ULL, // EVFSNEG
3003 1239098101341ULL, // EVFSSUB
3004 1239098108365ULL, // EVFSTSTEQ
3005 1239098110136ULL, // EVFSTSTGT
3006 1239098110204ULL, // EVFSTSTLT
3007 67145767ULL, // EVLDD
3008 369145913ULL, // EVLDDX
3009 67146823ULL, // EVLDH
3010 369146042ULL, // EVLDHX
3011 67155012ULL, // EVLDW
3012 369147002ULL, // EVLDWX
3013 67153945ULL, // EVLHHESPLAT
3014 369146784ULL, // EVLHHESPLATX
3015 67153970ULL, // EVLHHOSSPLAT
3016 369146811ULL, // EVLHHOSSPLATX
3017 67153984ULL, // EVLHHOUSPLAT
3018 369146826ULL, // EVLHHOUSPLATX
3019 67146404ULL, // EVLWHE
3020 369145993ULL, // EVLWHEX
3021 67153604ULL, // EVLWHOS
3022 369146766ULL, // EVLWHOSX
3023 67154419ULL, // EVLWHOU
3024 369146925ULL, // EVLWHOUX
3025 67153958ULL, // EVLWHSPLAT
3026 369146798ULL, // EVLWHSPLATX
3027 67153998ULL, // EVLWWSPLAT
3028 369146841ULL, // EVLWWSPLATX
3029 1239098103420ULL, // EVMERGEHI
3030 1239098105637ULL, // EVMERGEHILO
3031 1239098105626ULL, // EVMERGELO
3032 1239098103431ULL, // EVMERGELOHI
3033 1239098100521ULL, // EVMHEGSMFAA
3034 1239098105033ULL, // EVMHEGSMFAN
3035 1239098100569ULL, // EVMHEGSMIAA
3036 1239098105081ULL, // EVMHEGSMIAN
3037 1239098100606ULL, // EVMHEGUMIAA
3038 1239098105118ULL, // EVMHEGUMIAN
3039 1239098102561ULL, // EVMHESMF
3040 1239098100654ULL, // EVMHESMFA
3041 1239098110683ULL, // EVMHESMFAAW
3042 1239098111232ULL, // EVMHESMFANW
3043 1239098103522ULL, // EVMHESMI
3044 1239098100746ULL, // EVMHESMIA
3045 1239098110748ULL, // EVMHESMIAAW
3046 1239098111284ULL, // EVMHESMIANW
3047 1239098102664ULL, // EVMHESSF
3048 1239098100697ULL, // EVMHESSFA
3049 1239098110709ULL, // EVMHESSFAAW
3050 1239098111258ULL, // EVMHESSFANW
3051 1239098110880ULL, // EVMHESSIAAW
3052 1239098111362ULL, // EVMHESSIANW
3053 1239098103561ULL, // EVMHEUMI
3054 1239098100789ULL, // EVMHEUMIA
3055 1239098110814ULL, // EVMHEUMIAAW
3056 1239098111323ULL, // EVMHEUMIANW
3057 1239098110946ULL, // EVMHEUSIAAW
3058 1239098111401ULL, // EVMHEUSIANW
3059 1239098100534ULL, // EVMHOGSMFAA
3060 1239098105046ULL, // EVMHOGSMFAN
3061 1239098100582ULL, // EVMHOGSMIAA
3062 1239098105094ULL, // EVMHOGSMIAN
3063 1239098100619ULL, // EVMHOGUMIAA
3064 1239098105131ULL, // EVMHOGUMIAN
3065 1239098102581ULL, // EVMHOSMF
3066 1239098100676ULL, // EVMHOSMFA
3067 1239098110696ULL, // EVMHOSMFAAW
3068 1239098111245ULL, // EVMHOSMFANW
3069 1239098103542ULL, // EVMHOSMI
3070 1239098100768ULL, // EVMHOSMIA
3071 1239098110788ULL, // EVMHOSMIAAW
3072 1239098111310ULL, // EVMHOSMIANW
3073 1239098102684ULL, // EVMHOSSF
3074 1239098100719ULL, // EVMHOSSFA
3075 1239098110722ULL, // EVMHOSSFAAW
3076 1239098111271ULL, // EVMHOSSFANW
3077 1239098110920ULL, // EVMHOSSIAAW
3078 1239098111388ULL, // EVMHOSSIANW
3079 1239098103591ULL, // EVMHOUMI
3080 1239098100822ULL, // EVMHOUMIA
3081 1239098110854ULL, // EVMHOUMIAAW
3082 1239098111349ULL, // EVMHOUMIANW
3083 1239098110986ULL, // EVMHOUSIAAW
3084 1239098111427ULL, // EVMHOUSIANW
3085 35978ULL, // EVMRA
3086 1239098102571ULL, // EVMWHSMF
3087 1239098100665ULL, // EVMWHSMFA
3088 1239098103532ULL, // EVMWHSMI
3089 1239098100757ULL, // EVMWHSMIA
3090 1239098102674ULL, // EVMWHSSF
3091 1239098100708ULL, // EVMWHSSFA
3092 1239098103571ULL, // EVMWHUMI
3093 1239098100800ULL, // EVMWHUMIA
3094 1239098110775ULL, // EVMWLSMIAAW
3095 1239098111297ULL, // EVMWLSMIANW
3096 1239098110907ULL, // EVMWLSSIAAW
3097 1239098111375ULL, // EVMWLSSIANW
3098 1239098103581ULL, // EVMWLUMI
3099 1239098100811ULL, // EVMWLUMIA
3100 1239098110841ULL, // EVMWLUMIAAW
3101 1239098111336ULL, // EVMWLUMIANW
3102 1239098110973ULL, // EVMWLUSIAAW
3103 1239098111414ULL, // EVMWLUSIANW
3104 1239098102591ULL, // EVMWSMF
3105 1239098100687ULL, // EVMWSMFA
3106 1239098100547ULL, // EVMWSMFAA
3107 1239098105059ULL, // EVMWSMFAN
3108 1239098103552ULL, // EVMWSMI
3109 1239098100779ULL, // EVMWSMIA
3110 1239098100595ULL, // EVMWSMIAA
3111 1239098105107ULL, // EVMWSMIAN
3112 1239098102694ULL, // EVMWSSF
3113 1239098100730ULL, // EVMWSSFA
3114 1239098100558ULL, // EVMWSSFAA
3115 1239098105070ULL, // EVMWSSFAN
3116 1239098103601ULL, // EVMWUMI
3117 1239098100833ULL, // EVMWUMIA
3118 1239098100632ULL, // EVMWUMIAA
3119 1239098105144ULL, // EVMWUMIAN
3120 1239098102003ULL, // EVNAND
3121 37936ULL, // EVNEG
3122 1239098109006ULL, // EVNOR
3123 1239098109019ULL, // EVOR
3124 1239098101597ULL, // EVORC
3125 1239098111191ULL, // EVRLW
3126 1136018888734ULL, // EVRLWI
3127 46155ULL, // EVRNDW
3128 16825919ULL, // EVSEL
3129 1239098111205ULL, // EVSLW
3130 1136018888760ULL, // EVSLWI
3131 402691697ULL, // EVSPLATFI
3132 402692036ULL, // EVSPLATI
3133 1136018894508ULL, // EVSRWIS
3134 1136018895338ULL, // EVSRWIU
3135 1239098109795ULL, // EVSRWS
3136 1239098110523ULL, // EVSRWU
3137 67145783ULL, // EVSTDD
3138 369145921ULL, // EVSTDDX
3139 67146830ULL, // EVSTDH
3140 369146050ULL, // EVSTDHX
3141 67155027ULL, // EVSTDW
3142 369147010ULL, // EVSTDWX
3143 67146412ULL, // EVSTWHE
3144 369146002ULL, // EVSTWHEX
3145 67149554ULL, // EVSTWHO
3146 369146361ULL, // EVSTWHOX
3147 67146493ULL, // EVSTWWE
3148 369146026ULL, // EVSTWWEX
3149 67149801ULL, // EVSTWWO
3150 369146371ULL, // EVSTWWOX
3151 45865ULL, // EVSUBFSMIAAW
3152 45997ULL, // EVSUBFSSIAAW
3153 45931ULL, // EVSUBFUMIAAW
3154 46063ULL, // EVSUBFUSIAAW
3155 1239098111084ULL, // EVSUBFW
3156 1239534318709ULL, // EVSUBIFW
3157 1239098109057ULL, // EVXOR
3158 36294ULL, // EXTSB
3159 36294ULL, // EXTSB8
3160 36294ULL, // EXTSB8_32_64
3161 33113ULL, // EXTSB8_rec
3162 33113ULL, // EXTSB_rec
3163 38161ULL, // EXTSH
3164 38161ULL, // EXTSH8
3165 38161ULL, // EXTSH8_32_64
3166 33607ULL, // EXTSH8_rec
3167 33607ULL, // EXTSH_rec
3168 46687ULL, // EXTSW
3169 1101659149998ULL, // EXTSWSLI
3170 1101659149998ULL, // EXTSWSLI_32_64
3171 1101659145192ULL, // EXTSWSLI_32_64_rec
3172 1101659145192ULL, // EXTSWSLI_rec
3173 46687ULL, // EXTSW_32
3174 46687ULL, // EXTSW_32_64
3175 35023ULL, // EXTSW_32_64_rec
3176 35023ULL, // EXTSW_rec
3177 18640ULL, // EnforceIEIO
3178 44265ULL, // FABSD
3179 34673ULL, // FABSD_rec
3180 44265ULL, // FABSS
3181 34673ULL, // FABSS_rec
3182 1239098101731ULL, // FADD
3183 1239098109306ULL, // FADDS
3184 1239098099618ULL, // FADDS_rec
3185 1239098098205ULL, // FADD_rec
3186 0ULL, // FADDrtz
3187 36979ULL, // FCFID
3188 44434ULL, // FCFIDS
3189 34749ULL, // FCFIDS_rec
3190 45490ULL, // FCFIDU
3191 44821ULL, // FCFIDUS
3192 34816ULL, // FCFIDUS_rec
3193 34869ULL, // FCFIDU_rec
3194 33341ULL, // FCFID_rec
3195 1239098105674ULL, // FCMPOD
3196 1239098105674ULL, // FCMPOS
3197 1239098110467ULL, // FCMPUD
3198 1239098110467ULL, // FCMPUS
3199 1239098105155ULL, // FCPSGND
3200 1239098098887ULL, // FCPSGND_rec
3201 1239098105155ULL, // FCPSGNS
3202 1239098098887ULL, // FCPSGNS_rec
3203 36996ULL, // FCTID
3204 45498ULL, // FCTIDU
3205 48599ULL, // FCTIDUZ
3206 35212ULL, // FCTIDUZ_rec
3207 34878ULL, // FCTIDU_rec
3208 48422ULL, // FCTIDZ
3209 35178ULL, // FCTIDZ_rec
3210 33349ULL, // FCTID_rec
3211 46247ULL, // FCTIW
3212 45619ULL, // FCTIWU
3213 48608ULL, // FCTIWUZ
3214 35222ULL, // FCTIWUZ_rec
3215 34922ULL, // FCTIWU_rec
3216 48617ULL, // FCTIWZ
3217 35232ULL, // FCTIWZ_rec
3218 34984ULL, // FCTIW_rec
3219 1239098110586ULL, // FDIV
3220 1239098109788ULL, // FDIVS
3221 1239098099731ULL, // FDIVS_rec
3222 1239098099842ULL, // FDIV_rec
3223 17594ULL, // FENCE
3224 8935679496184ULL, // FMADD
3225 8935679503745ULL, // FMADDS
3226 8935679494058ULL, // FMADDS_rec
3227 8935679492644ULL, // FMADD_rec
3228 44046ULL, // FMR
3229 34641ULL, // FMR_rec
3230 8935679495750ULL, // FMSUB
3231 8935679503721ULL, // FMSUBS
3232 8935679494024ULL, // FMSUBS_rec
3233 8935679492476ULL, // FMSUB_rec
3234 1239098104166ULL, // FMUL
3235 1239098109629ULL, // FMULS
3236 1239098099687ULL, // FMULS_rec
3237 1239098098825ULL, // FMUL_rec
3238 44280ULL, // FNABSD
3239 34680ULL, // FNABSD_rec
3240 44280ULL, // FNABSS
3241 34680ULL, // FNABSS_rec
3242 37913ULL, // FNEGD
3243 33579ULL, // FNEGD_rec
3244 37913ULL, // FNEGS
3245 33579ULL, // FNEGS_rec
3246 8935679496191ULL, // FNMADD
3247 8935679503753ULL, // FNMADDS
3248 8935679494067ULL, // FNMADDS_rec
3249 8935679492652ULL, // FNMADD_rec
3250 8935679495757ULL, // FNMSUB
3251 8935679503729ULL, // FNMSUBS
3252 8935679494033ULL, // FNMSUBS_rec
3253 8935679492484ULL, // FNMSUB_rec
3254 37593ULL, // FRE
3255 44532ULL, // FRES
3256 34758ULL, // FRES_rec
3257 33515ULL, // FRE_rec
3258 39687ULL, // FRIMD
3259 33947ULL, // FRIMD_rec
3260 39687ULL, // FRIMS
3261 33947ULL, // FRIMS_rec
3262 40284ULL, // FRIND
3263 34021ULL, // FRIND_rec
3264 40284ULL, // FRINS
3265 34021ULL, // FRINS_rec
3266 42042ULL, // FRIPD
3267 34317ULL, // FRIPD_rec
3268 42042ULL, // FRIPS
3269 34317ULL, // FRIPS_rec
3270 48503ULL, // FRIZD
3271 35196ULL, // FRIZD_rec
3272 48503ULL, // FRIZS
3273 35196ULL, // FRIZS_rec
3274 43144ULL, // FRSP
3275 34355ULL, // FRSP_rec
3276 37606ULL, // FRSQRTE
3277 44538ULL, // FRSQRTES
3278 34765ULL, // FRSQRTES_rec
3279 33521ULL, // FRSQRTE_rec
3280 8935679498431ULL, // FSELD
3281 8935679493233ULL, // FSELD_rec
3282 8935679498431ULL, // FSELS
3283 8935679493233ULL, // FSELS_rec
3284 45326ULL, // FSQRT
3285 44813ULL, // FSQRTS
3286 34799ULL, // FSQRTS_rec
3287 34852ULL, // FSQRT_rec
3288 1239098101312ULL, // FSUB
3289 1239098109282ULL, // FSUBS
3290 1239098099584ULL, // FSUBS_rec
3291 1239098098037ULL, // FSUB_rec
3292 1239098110609ULL, // FTDIV
3293 45333ULL, // FTSQRT
3294 18022ULL, // GETtlsADDR
3295 16323ULL, // GETtlsADDR32
3296 18315ULL, // GETtlsADDR32AIX
3297 18366ULL, // GETtlsADDR64AIX
3298 17729ULL, // GETtlsADDRPCREL
3299 18300ULL, // GETtlsMOD32AIX
3300 18351ULL, // GETtlsMOD64AIX
3301 18331ULL, // GETtlsTpointer32AIX
3302 18008ULL, // GETtlsldADDR
3303 16308ULL, // GETtlsldADDR32
3304 17710ULL, // GETtlsldADDRPCREL
3305 469801097ULL, // HASHCHK
3306 469801097ULL, // HASHCHK8
3307 469804096ULL, // HASHCHKP
3308 469804096ULL, // HASHCHKP8
3309 469807428ULL, // HASHST
3310 469807428ULL, // HASHST8
3311 469805342ULL, // HASHSTP
3312 469805342ULL, // HASHSTP8
3313 18524ULL, // HRFID
3314 1119695ULL, // ICBI
3315 1123145ULL, // ICBIEP
3316 528174ULL, // ICBLC
3317 525974ULL, // ICBLQ
3318 536685ULL, // ICBT
3319 536245ULL, // ICBTLS
3320 38387ULL, // ICCCI
3321 8935679498437ULL, // ISEL
3322 8935679498437ULL, // ISEL8
3323 18488ULL, // ISYNC
3324 503352428ULL, // LA
3325 503352428ULL, // LA8
3326 369146500ULL, // LBARX
3327 4664113796ULL, // LBARXL
3328 369146381ULL, // LBEPX
3329 67157252ULL, // LBZ
3330 67157252ULL, // LBZ8
3331 1239098112289ULL, // LBZCIX
3332 536916562ULL, // LBZU
3333 536916562ULL, // LBZU8
3334 570473549ULL, // LBZUX
3335 570473549ULL, // LBZUX8
3336 369147083ULL, // LBZX
3337 369147083ULL, // LBZX8
3338 1239098113227ULL, // LBZXTLS
3339 1239098113227ULL, // LBZXTLS_
3340 1239098113227ULL, // LBZXTLS_32
3341 67145880ULL, // LD
3342 369146507ULL, // LDARX
3343 4664113803ULL, // LDARXL
3344 1582963929100ULL, // LDAT
3345 6442496012ULL, // LDAT_CSNE
3346 369146535ULL, // LDBRX
3347 1239098112258ULL, // LDCIX
3348 536916418ULL, // LDU
3349 570473490ULL, // LDUX
3350 369145943ULL, // LDX
3351 1239098112087ULL, // LDXTLS
3352 1239098112087ULL, // LDXTLS_
3353 17797ULL, // LDgotTprelL
3354 16205ULL, // LDgotTprelL32
3355 18500ULL, // LDtoc
3356 18222ULL, // LDtocBA
3357 18222ULL, // LDtocCPT
3358 17690ULL, // LDtocJTI
3359 17746ULL, // LDtocL
3360 67145809ULL, // LFD
3361 369146396ULL, // LFDEPX
3362 536916372ULL, // LFDU
3363 570473475ULL, // LFDUX
3364 369145930ULL, // LFDX
3365 1239098112074ULL, // LFDXTLS
3366 1239098112074ULL, // LFDXTLS_
3367 369145830ULL, // LFIWAX
3368 369147104ULL, // LFIWZX
3369 67153427ULL, // LFS
3370 536916490ULL, // LFSU
3371 570473527ULL, // LFSUX
3372 369146753ULL, // LFSX
3373 1239098112897ULL, // LFSXTLS
3374 1239098112897ULL, // LFSXTLS_
3375 67144709ULL, // LHA
3376 67144709ULL, // LHA8
3377 369146514ULL, // LHARX
3378 4664113810ULL, // LHARXL
3379 536916360ULL, // LHAU
3380 536916360ULL, // LHAU8
3381 570473454ULL, // LHAUX
3382 570473454ULL, // LHAUX8
3383 369145815ULL, // LHAX
3384 369145815ULL, // LHAX8
3385 1239098111959ULL, // LHAXTLS
3386 1239098111959ULL, // LHAXTLS_
3387 1239098111959ULL, // LHAXTLS_32
3388 369146550ULL, // LHBRX
3389 369146550ULL, // LHBRX8
3390 369146413ULL, // LHEPX
3391 67157328ULL, // LHZ
3392 67157328ULL, // LHZ8
3393 1239098112297ULL, // LHZCIX
3394 536916568ULL, // LHZU
3395 536916568ULL, // LHZU8
3396 570473556ULL, // LHZUX
3397 570473556ULL, // LHZUX8
3398 369147098ULL, // LHZX
3399 369147098ULL, // LHZX8
3400 1239098113242ULL, // LHZXTLS
3401 1239098113242ULL, // LHZXTLS_
3402 1239098113242ULL, // LHZXTLS_32
3403 100701847ULL, // LI
3404 100701847ULL, // LI8
3405 100708000ULL, // LIS
3406 100708000ULL, // LIS8
3407 67155180ULL, // LMW
3408 67152405ULL, // LQ
3409 369146521ULL, // LQARX
3410 4664113817ULL, // LQARXL
3411 17867ULL, // LQX_PSEUDO
3412 1136018888815ULL, // LSWI
3413 369145853ULL, // LVEBX
3414 369146059ULL, // LVEHX
3415 369147019ULL, // LVEWX
3416 369138008ULL, // LVSL
3417 369142960ULL, // LVSR
3418 369146978ULL, // LVX
3419 369138068ULL, // LVXL
3420 67144856ULL, // LWA
3421 369146528ULL, // LWARX
3422 4664113824ULL, // LWARXL
3423 1582963929178ULL, // LWAT
3424 6442496090ULL, // LWAT_CSNE
3425 570473461ULL, // LWAUX
3426 369145847ULL, // LWAX
3427 1239098111991ULL, // LWAXTLS
3428 1239098111991ULL, // LWAXTLS_
3429 1239098111991ULL, // LWAXTLS_32
3430 369145847ULL, // LWAX_32
3431 67144856ULL, // LWA_32
3432 369146584ULL, // LWBRX
3433 369146584ULL, // LWBRX8
3434 369146428ULL, // LWEPX
3435 67157490ULL, // LWZ
3436 67157490ULL, // LWZ8
3437 1239098112305ULL, // LWZCIX
3438 536916574ULL, // LWZU
3439 536916574ULL, // LWZU8
3440 570473563ULL, // LWZUX
3441 570473563ULL, // LWZUX8
3442 369147121ULL, // LWZX
3443 369147121ULL, // LWZX8
3444 1239098113265ULL, // LWZXTLS
3445 1239098113265ULL, // LWZXTLS_
3446 1239098113265ULL, // LWZXTLS_32
3447 18516ULL, // LWZtoc
3448 17764ULL, // LWZtocL
3449 67146139ULL, // LXSD
3450 369145965ULL, // LXSDX
3451 369147074ULL, // LXSIBZX
3452 369147089ULL, // LXSIHZX
3453 369145838ULL, // LXSIWAX
3454 369147112ULL, // LXSIWZX
3455 67152041ULL, // LXSSP
3456 369146468ULL, // LXSSPX
3457 67154619ULL, // LXV
3458 369145779ULL, // LXVB16X
3459 369145745ULL, // LXVD2X
3460 369146738ULL, // LXVDSX
3461 369145798ULL, // LXVH8X
3462 436251148ULL, // LXVKQ
3463 1239098104199ULL, // LXVL
3464 1239098104076ULL, // LXVLL
3465 67152168ULL, // LXVP
3466 1239098111868ULL, // LXVPB32X
3467 1239098104105ULL, // LXVPRL
3468 1239098104040ULL, // LXVPRLL
3469 369146485ULL, // LXVPX
3470 369145877ULL, // LXVRBX
3471 369145948ULL, // LXVRDX
3472 369146083ULL, // LXVRHX
3473 1239098104130ULL, // LXVRL
3474 1239098104059ULL, // LXVRLL
3475 369147051ULL, // LXVRWX
3476 369145762ULL, // LXVW4X
3477 369146776ULL, // LXVWSX
3478 369146989ULL, // LXVX
3479 8935679496292ULL, // MADDHD
3480 8935679504801ULL, // MADDHDU
3481 8935679496348ULL, // MADDLD
3482 8935679496348ULL, // MADDLD8
3483 1518453ULL, // MBAR
3484 37704ULL, // MCRF
3485 44568ULL, // MCRFS
3486 1096547ULL, // MCRXRX
3487 604017263ULL, // MFBHRBE
3488 1092522ULL, // MFCR
3489 1092522ULL, // MFCR8
3490 1092797ULL, // MFCTR
3491 1092797ULL, // MFCTR8
3492 43925ULL, // MFDCR
3493 1093132ULL, // MFFS
3494 40558ULL, // MFFSCDRN
3495 637572940ULL, // MFFSCDRNI
3496 1086072ULL, // MFFSCE
3497 40549ULL, // MFFSCRN
3498 234919746ULL, // MFFSCRNI
3499 1087825ULL, // MFFSL
3500 1083352ULL, // MFFS_rec
3501 1092610ULL, // MFLR
3502 1092610ULL, // MFLR8
3503 1092764ULL, // MFMSR
3504 671126350ULL, // MFOCRF
3505 671126350ULL, // MFOCRF8
3506 44057ULL, // MFPMR
3507 44168ULL, // MFSPR
3508 44168ULL, // MFSPR8
3509 704687254ULL, // MFSR
3510 40290ULL, // MFSRIN
3511 36315ULL, // MFTB
3512 17869960ULL, // MFTB8
3513 18918536ULL, // MFUDSCR
3514 37173ULL, // MFVRD
3515 19967112ULL, // MFVRSAVE
3516 19967112ULL, // MFVRSAVEv
3517 48631ULL, // MFVRWZ
3518 1092536ULL, // MFVSCR
3519 37173ULL, // MFVSRD
3520 37043ULL, // MFVSRLD
3521 48631ULL, // MFVSRWZ
3522 1239098102086ULL, // MODSD
3523 1239098111468ULL, // MODSW
3524 1239098102249ULL, // MODUD
3525 1239098111679ULL, // MODUW
3526 1090039ULL, // MSGSNDP
3527 1090039ULL, // MSGSNDP8
3528 18480ULL, // MSGSYNC
3529 18494ULL, // MSYNC
3530 37726ULL, // MTCRF
3531 37726ULL, // MTCRF8
3532 1092804ULL, // MTCTR
3533 1092804ULL, // MTCTR8
3534 1092804ULL, // MTCTR8loop
3535 1092804ULL, // MTCTRloop
3536 201829283ULL, // MTDCR
3537 1509801ULL, // MTFSB0
3538 1509809ULL, // MTFSB1
3539 9004398973825ULL, // MTFSF
3540 9349666400ULL, // MTFSFI
3541 11497145303ULL, // MTFSFI_rec
3542 793286240ULL, // MTFSFIb
3543 9004398969635ULL, // MTFSF_rec
3544 37761ULL, // MTFSFb
3545 39195ULL, // MTLPL
3546 39195ULL, // MTLPL8
3547 1092616ULL, // MTLR
3548 1092616ULL, // MTLR8
3549 167816355ULL, // MTMSR
3550 167809325ULL, // MTMSRD
3551 594774ULL, // MTOCRF
3552 594774ULL, // MTOCRF8
3553 44064ULL, // MTPMR
3554 44175ULL, // MTSPR
3555 44175ULL, // MTSPR8
3556 634026ULL, // MTSR
3557 40298ULL, // MTSRIN
3558 1081524ULL, // MTUDSCR
3559 37181ULL, // MTVRD
3560 1081589ULL, // MTVRSAVE
3561 1540341ULL, // MTVRSAVEv
3562 35997ULL, // MTVRWA
3563 48640ULL, // MTVRWZ
3564 1092544ULL, // MTVSCR
3565 39370ULL, // MTVSRBM
3566 805344952ULL, // MTVSRBMI
3567 37181ULL, // MTVSRD
3568 1239098101806ULL, // MTVSRDD
3569 39442ULL, // MTVSRDM
3570 39559ULL, // MTVSRHM
3571 39736ULL, // MTVSRQM
3572 35997ULL, // MTVSRWA
3573 40074ULL, // MTVSRWM
3574 44907ULL, // MTVSRWS
3575 48640ULL, // MTVSRWZ
3576 1239098101868ULL, // MULHD
3577 1239098110378ULL, // MULHDU
3578 1239098099756ULL, // MULHDU_rec
3579 1239098098229ULL, // MULHD_rec
3580 1239098111127ULL, // MULHW
3581 1239098110507ULL, // MULHWU
3582 1239098099809ULL, // MULHWU_rec
3583 1239098099872ULL, // MULHW_rec
3584 1239098101925ULL, // MULLD
3585 1239098105493ULL, // MULLDO
3586 1239098098966ULL, // MULLDO_rec
3587 1239098098253ULL, // MULLD_rec
3588 105226737314ULL, // MULLI
3589 105226737314ULL, // MULLI8
3590 1239098111177ULL, // MULLW
3591 1239098105818ULL, // MULLWO
3592 1239098099109ULL, // MULLWO_rec
3593 1239098099888ULL, // MULLW_rec
3594 18057ULL, // MoveGOTtoLR
3595 18045ULL, // MovePCtoLR
3596 17083ULL, // MovePCtoLR8
3597 1239098101989ULL, // NAND
3598 1239098101989ULL, // NAND8
3599 1239098098267ULL, // NAND8_rec
3600 1239098098267ULL, // NAND_rec
3601 18646ULL, // NAP
3602 37908ULL, // NEG
3603 37908ULL, // NEG8
3604 40684ULL, // NEG8O
3605 34168ULL, // NEG8O_rec
3606 33580ULL, // NEG8_rec
3607 40684ULL, // NEGO
3608 34168ULL, // NEGO_rec
3609 33580ULL, // NEG_rec
3610 18655ULL, // NOP
3611 16136ULL, // NOP_GT_PWR6
3612 16148ULL, // NOP_GT_PWR7
3613 1239098108994ULL, // NOR
3614 1239098108994ULL, // NOR8
3615 1239098099543ULL, // NOR8_rec
3616 1239098099543ULL, // NOR_rec
3617 1239098108987ULL, // OR
3618 1239098108987ULL, // OR8
3619 1239098099544ULL, // OR8_rec
3620 1239098101585ULL, // ORC
3621 1239098101585ULL, // ORC8
3622 1239098098163ULL, // ORC8_rec
3623 1239098098163ULL, // ORC_rec
3624 173946214279ULL, // ORI
3625 173946214279ULL, // ORI8
3626 173946220198ULL, // ORIS
3627 173946220198ULL, // ORIS8
3628 1239098099544ULL, // OR_rec
3629 2269890254337ULL, // PADDI
3630 2269890254337ULL, // PADDI8
3631 13723801089ULL, // PADDI8pc
3632 517543603864ULL, // PADDIS
3633 517543603864ULL, // PADDIS8
3634 15871291032ULL, // PADDIS8pc
3635 15871291032ULL, // PADDISpc
3636 18575ULL, // PADDIdtprel
3637 13723801089ULL, // PADDIpc
3638 1239098102041ULL, // PDEPD
3639 1239098102231ULL, // PEXTD
3640 872451190ULL, // PLA
3641 872451190ULL, // PLA8
3642 906005622ULL, // PLA8pc
3643 906005622ULL, // PLApc
3644 18119441667ULL, // PLBZ
3645 18119441667ULL, // PLBZ8
3646 939572483ULL, // PLBZ8nopc
3647 906018051ULL, // PLBZ8onlypc
3648 973126915ULL, // PLBZ8pc
3649 939572483ULL, // PLBZnopc
3650 906018051ULL, // PLBZonlypc
3651 973126915ULL, // PLBZpc
3652 18119430318ULL, // PLD
3653 939561134ULL, // PLDnopc
3654 906006702ULL, // PLDonlypc
3655 973115566ULL, // PLDpc
3656 18119430224ULL, // PLFD
3657 939561040ULL, // PLFDnopc
3658 906006608ULL, // PLFDonlypc
3659 973115472ULL, // PLFDpc
3660 18119437842ULL, // PLFS
3661 939568658ULL, // PLFSnopc
3662 906014226ULL, // PLFSonlypc
3663 973123090ULL, // PLFSpc
3664 18119429124ULL, // PLHA
3665 18119429124ULL, // PLHA8
3666 939559940ULL, // PLHA8nopc
3667 906005508ULL, // PLHA8onlypc
3668 973114372ULL, // PLHA8pc
3669 939559940ULL, // PLHAnopc
3670 906005508ULL, // PLHAonlypc
3671 973114372ULL, // PLHApc
3672 18119441743ULL, // PLHZ
3673 18119441743ULL, // PLHZ8
3674 939572559ULL, // PLHZ8nopc
3675 906018127ULL, // PLHZ8onlypc
3676 973126991ULL, // PLHZ8pc
3677 939572559ULL, // PLHZnopc
3678 906018127ULL, // PLHZonlypc
3679 973126991ULL, // PLHZpc
3680 906008233ULL, // PLI
3681 906008233ULL, // PLI8
3682 18119429271ULL, // PLWA
3683 18119429271ULL, // PLWA8
3684 939560087ULL, // PLWA8nopc
3685 906005655ULL, // PLWA8onlypc
3686 973114519ULL, // PLWA8pc
3687 939560087ULL, // PLWAnopc
3688 906005655ULL, // PLWAonlypc
3689 973114519ULL, // PLWApc
3690 18119441905ULL, // PLWZ
3691 18119441905ULL, // PLWZ8
3692 939572721ULL, // PLWZ8nopc
3693 906018289ULL, // PLWZ8onlypc
3694 973127153ULL, // PLWZ8pc
3695 939572721ULL, // PLWZnopc
3696 906018289ULL, // PLWZonlypc
3697 973127153ULL, // PLWZpc
3698 18119430554ULL, // PLXSD
3699 939561370ULL, // PLXSDnopc
3700 906006938ULL, // PLXSDonlypc
3701 973115802ULL, // PLXSDpc
3702 18119436456ULL, // PLXSSP
3703 939567272ULL, // PLXSSPnopc
3704 906012840ULL, // PLXSSPonlypc
3705 973121704ULL, // PLXSSPpc
3706 18119439034ULL, // PLXV
3707 18119436583ULL, // PLXVP
3708 939567399ULL, // PLXVPnopc
3709 906012967ULL, // PLXVPonlypc
3710 973121831ULL, // PLXVPpc
3711 939569850ULL, // PLXVnopc
3712 906015418ULL, // PLXVonlypc
3713 973124282ULL, // PLXVpc
3714 92498563205665ULL, // PMDMXVBF16GERX2
3715 167437421026715ULL, // PMDMXVBF16GERX2NN
3716 167437421028478ULL, // PMDMXVBF16GERX2NP
3717 167437421026811ULL, // PMDMXVBF16GERX2PN
3718 167437421028589ULL, // PMDMXVBF16GERX2PP
3719 92498563205682ULL, // PMDMXVF16GERX2
3720 167437421026734ULL, // PMDMXVF16GERX2NN
3721 167437421028497ULL, // PMDMXVF16GERX2NP
3722 167437421026830ULL, // PMDMXVF16GERX2PN
3723 167437421028608ULL, // PMDMXVF16GERX2PP
3724 233236051561038ULL, // PMDMXVI8GERX4
3725 308174909383968ULL, // PMDMXVI8GERX4PP
3726 308174909384058ULL, // PMDMXVI8GERX4SPP
3727 945719586359801ULL, // PMXVBF16GER2
3728 5876101792439676ULL, // PMXVBF16GER2NN
3729 5876101792441439ULL, // PMXVBF16GER2NP
3730 5876101792439772ULL, // PMXVBF16GER2PN
3731 5876101792441535ULL, // PMXVBF16GER2PP
3732 945719586359801ULL, // PMXVBF16GER2W
3733 5876101792439676ULL, // PMXVBF16GER2WNN
3734 5876101792441439ULL, // PMXVBF16GER2WNP
3735 5876101792439772ULL, // PMXVBF16GER2WPN
3736 5876101792441535ULL, // PMXVBF16GER2WPP
3737 945719586359815ULL, // PMXVF16GER2
3738 5876101792439692ULL, // PMXVF16GER2NN
3739 5876101792441455ULL, // PMXVF16GER2NP
3740 5876101792439788ULL, // PMXVF16GER2PN
3741 5876101792441551ULL, // PMXVF16GER2PP
3742 945719586359815ULL, // PMXVF16GER2W
3743 5876101792439692ULL, // PMXVF16GER2WNN
3744 5876101792441455ULL, // PMXVF16GER2WNP
3745 5876101792439788ULL, // PMXVF16GER2WPN
3746 5876101792441551ULL, // PMXVF16GER2WPP
3747 9952918841109448ULL, // PMXVF32GER
3748 246602258226624ULL, // PMXVF32GERNN
3749 246602258228387ULL, // PMXVF32GERNP
3750 246602258226731ULL, // PMXVF32GERPN
3751 246602258228543ULL, // PMXVF32GERPP
3752 9952918841109448ULL, // PMXVF32GERW
3753 246602258226624ULL, // PMXVF32GERWNN
3754 246602258228387ULL, // PMXVF32GERWNP
3755 246602258226731ULL, // PMXVF32GERWPN
3756 246602258228543ULL, // PMXVF32GERWPP
3757 2071619493211092ULL, // PMXVF64GER
3758 105864769871310ULL, // PMXVF64GERNN
3759 105864769873073ULL, // PMXVF64GERNP
3760 105864769871417ULL, // PMXVF64GERPN
3761 105864769873229ULL, // PMXVF64GERPP
3762 2071619493211092ULL, // PMXVF64GERW
3763 105864769871310ULL, // PMXVF64GERWNN
3764 105864769873073ULL, // PMXVF64GERWNP
3765 105864769871417ULL, // PMXVF64GERWPN
3766 105864769873229ULL, // PMXVF64GERWPP
3767 945719586359828ULL, // PMXVI16GER2
3768 5876101792441566ULL, // PMXVI16GER2PP
3769 945719586368715ULL, // PMXVI16GER2S
3770 5876101792441691ULL, // PMXVI16GER2SPP
3771 945719586368715ULL, // PMXVI16GER2SW
3772 5876101792441691ULL, // PMXVI16GER2SWPP
3773 945719586359828ULL, // PMXVI16GER2W
3774 5876101792441566ULL, // PMXVI16GER2WPP
3775 36974516605323999ULL, // PMXVI4GER8
3776 14883301047182641ULL, // PMXVI4GER8PP
3777 36974516605323999ULL, // PMXVI4GER8W
3778 14883301047182641ULL, // PMXVI4GER8WPP
3779 73003313624287810ULL, // PMXVI8GER4
3780 19386900674553106ULL, // PMXVI8GER4PP
3781 19386900674553195ULL, // PMXVI8GER4SPP
3782 73003313624287810ULL, // PMXVI8GER4W
3783 19386900674553106ULL, // PMXVI8GER4WPP
3784 19386900674553195ULL, // PMXVI8GER4WSPP
3785 36330ULL, // POPCNTB
3786 36330ULL, // POPCNTB8
3787 37309ULL, // POPCNTD
3788 46728ULL, // POPCNTW
3789 18199ULL, // PPC32GOT
3790 18209ULL, // PPC32PICGOT
3791 16354ULL, // PREPARE_PROBED_ALLOCA_32
3792 16546ULL, // PREPARE_PROBED_ALLOCA_64
3793 16402ULL, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32
3794 16594ULL, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64
3795 16336ULL, // PROBED_ALLOCA_32
3796 16528ULL, // PROBED_ALLOCA_64
3797 16380ULL, // PROBED_STACKALLOC_32
3798 16572ULL, // PROBED_STACKALLOC_64
3799 18119429629ULL, // PSTB
3800 18119429629ULL, // PSTB8
3801 939560445ULL, // PSTB8nopc
3802 906006013ULL, // PSTB8onlypc
3803 973114877ULL, // PSTB8pc
3804 939560445ULL, // PSTBnopc
3805 906006013ULL, // PSTBonlypc
3806 973114877ULL, // PSTBpc
3807 18119430608ULL, // PSTD
3808 939561424ULL, // PSTDnopc
3809 906006992ULL, // PSTDonlypc
3810 973115856ULL, // PSTDpc
3811 18119430230ULL, // PSTFD
3812 939561046ULL, // PSTFDnopc
3813 906006614ULL, // PSTFDonlypc
3814 973115478ULL, // PSTFDpc
3815 18119437855ULL, // PSTFS
3816 939568671ULL, // PSTFSnopc
3817 906014239ULL, // PSTFSonlypc
3818 973123103ULL, // PSTFSpc
3819 18119431484ULL, // PSTH
3820 18119431484ULL, // PSTH8
3821 939562300ULL, // PSTH8nopc
3822 906007868ULL, // PSTH8onlypc
3823 973116732ULL, // PSTH8pc
3824 939562300ULL, // PSTHnopc
3825 906007868ULL, // PSTHonlypc
3826 973116732ULL, // PSTHpc
3827 18119440038ULL, // PSTW
3828 18119440038ULL, // PSTW8
3829 939570854ULL, // PSTW8nopc
3830 906016422ULL, // PSTW8onlypc
3831 973125286ULL, // PSTW8pc
3832 939570854ULL, // PSTWnopc
3833 906016422ULL, // PSTWonlypc
3834 973125286ULL, // PSTWpc
3835 18119430561ULL, // PSTXSD
3836 939561377ULL, // PSTXSDnopc
3837 906006945ULL, // PSTXSDonlypc
3838 973115809ULL, // PSTXSDpc
3839 18119436464ULL, // PSTXSSP
3840 939567280ULL, // PSTXSSPnopc
3841 906012848ULL, // PSTXSSPonlypc
3842 973121712ULL, // PSTXSSPpc
3843 18119439040ULL, // PSTXV
3844 18119436590ULL, // PSTXVP
3845 939567406ULL, // PSTXVPnopc
3846 906012974ULL, // PSTXVPonlypc
3847 973121838ULL, // PSTXVPpc
3848 939569856ULL, // PSTXVnopc
3849 906015424ULL, // PSTXVonlypc
3850 973124288ULL, // PSTXVpc
3851 1089286ULL, // PTESYNCIO
3852 17892ULL, // PseudoEIEIO
3853 17316ULL, // RESTORE_ACC
3854 17954ULL, // RESTORE_CR
3855 18133ULL, // RESTORE_CRBIT
3856 18070ULL, // RESTORE_DMR
3857 17917ULL, // RESTORE_DMRP
3858 17531ULL, // RESTORE_QUADWORD
3859 17264ULL, // RESTORE_UACC
3860 17290ULL, // RESTORE_WACC
3861 18551ULL, // RFCI
3862 18562ULL, // RFDI
3863 658618ULL, // RFEBB
3864 18567ULL, // RFI
3865 18525ULL, // RFID
3866 18556ULL, // RFMCI
3867 139586476200ULL, // RLDCL
3868 139586471008ULL, // RLDCL_rec
3869 139586481052ULL, // RLDCR
3870 139586471734ULL, // RLDCR_rec
3871 2147520260ULL, // RLDIC
3872 2147522735ULL, // RLDICL
3873 2147522735ULL, // RLDICL_32
3874 2147522735ULL, // RLDICL_32_64
3875 2147517544ULL, // RLDICL_32_rec
3876 2147517544ULL, // RLDICL_rec
3877 2147527600ULL, // RLDICR
3878 2147527600ULL, // RLDICR_32
3879 2147518270ULL, // RLDICR_rec
3880 2147516884ULL, // RLDIC_rec
3881 552171771594ULL, // RLDIMI
3882 552171766771ULL, // RLDIMI_rec
3883 40065870894802ULL, // RLWIMI
3884 40065870894802ULL, // RLWIMI8
3885 40065870889980ULL, // RLWIMI8_rec
3886 40065870889980ULL, // RLWIMI_rec
3887 2608078088346389ULL, // RLWINM
3888 2608078088346389ULL, // RLWINM8
3889 2608078088340642ULL, // RLWINM8_rec
3890 2608078088340642ULL, // RLWINM_rec
3891 2608181167561510ULL, // RLWNM
3892 2608181167561510ULL, // RLWNM8
3893 2608181167555755ULL, // RLWNM8_rec
3894 2608181167555755ULL, // RLWNM_rec
3895 17256ULL, // ReadTB
3896 1085284ULL, // SC
3897 1094244ULL, // SCV
3898 16790ULL, // SELECT_CC_F16
3899 16712ULL, // SELECT_CC_F4
3900 17022ULL, // SELECT_CC_F8
3901 16737ULL, // SELECT_CC_I4
3902 17047ULL, // SELECT_CC_I8
3903 17622ULL, // SELECT_CC_SPE
3904 16683ULL, // SELECT_CC_SPE4
3905 17381ULL, // SELECT_CC_VRRC
3906 17350ULL, // SELECT_CC_VSFRC
3907 17441ULL, // SELECT_CC_VSRC
3908 17410ULL, // SELECT_CC_VSSRC
3909 16805ULL, // SELECT_F16
3910 16726ULL, // SELECT_F4
3911 17036ULL, // SELECT_F8
3912 16751ULL, // SELECT_I4
3913 17061ULL, // SELECT_I8
3914 17637ULL, // SELECT_SPE
3915 16699ULL, // SELECT_SPE4
3916 17397ULL, // SELECT_VRRC
3917 17367ULL, // SELECT_VSFRC
3918 17457ULL, // SELECT_VSRC
3919 17427ULL, // SELECT_VSSRC
3920 36309ULL, // SETB
3921 36309ULL, // SETB8
3922 36527ULL, // SETBC
3923 36527ULL, // SETBC8
3924 43917ULL, // SETBCR
3925 43917ULL, // SETBCR8
3926 17823ULL, // SETFLM
3927 36519ULL, // SETNBC
3928 36519ULL, // SETNBC8
3929 43908ULL, // SETNBCR
3930 43908ULL, // SETNBCR8
3931 17507ULL, // SETRND
3932 18542ULL, // SETRNDi
3933 33481ULL, // SLBFEE_rec
3934 18436ULL, // SLBIA
3935 1086133ULL, // SLBIE
3936 37897ULL, // SLBIEG
3937 37517ULL, // SLBMFEE
3938 45673ULL, // SLBMFEV
3939 37598ULL, // SLBMTE
3940 18464ULL, // SLBSYNC
3941 1239098101955ULL, // SLD
3942 1239098098261ULL, // SLD_rec
3943 1239098111207ULL, // SLW
3944 1239098111207ULL, // SLW8
3945 1239098099896ULL, // SLW8_rec
3946 1239098099896ULL, // SLW_rec
3947 67157490ULL, // SPELWZ
3948 369147121ULL, // SPELWZX
3949 67155623ULL, // SPESTW
3950 369147068ULL, // SPESTWX
3951 17329ULL, // SPILL_ACC
3952 17966ULL, // SPILL_CR
3953 18148ULL, // SPILL_CRBIT
3954 18083ULL, // SPILL_DMR
3955 17931ULL, // SPILL_DMRP
3956 17549ULL, // SPILL_QUADWORD
3957 17278ULL, // SPILL_UACC
3958 17304ULL, // SPILL_WACC
3959 17565ULL, // SPLIT_QUADWORD
3960 1239098101676ULL, // SRAD
3961 1101659149818ULL, // SRADI
3962 1101659149818ULL, // SRADI_32
3963 1101659145104ULL, // SRADI_rec
3964 1239098098180ULL, // SRAD_rec
3965 1239098111012ULL, // SRAW
3966 1239098111012ULL, // SRAW8
3967 1239098099855ULL, // SRAW8_rec
3968 1136018888710ULL, // SRAWI
3969 1136018888710ULL, // SRAWI8
3970 1136018883597ULL, // SRAWI8_rec
3971 1136018883597ULL, // SRAWI_rec
3972 1239098099855ULL, // SRAW_rec
3973 1239098102064ULL, // SRD
3974 1239098098298ULL, // SRD_rec
3975 1239098111462ULL, // SRW
3976 1239098111462ULL, // SRW8
3977 1239098099902ULL, // SRW8_rec
3978 1239098099902ULL, // SRW_rec
3979 67145214ULL, // STB
3980 67145214ULL, // STB8
3981 1239098112250ULL, // STBCIX
3982 369133841ULL, // STBCX
3983 369146388ULL, // STBEPX
3984 537375118ULL, // STBU
3985 537375118ULL, // STBU8
3986 570932220ULL, // STBUX
3987 570932220ULL, // STBUX8
3988 369145894ULL, // STBX
3989 369145894ULL, // STBX8
3990 1239098112038ULL, // STBXTLS
3991 1239098112038ULL, // STBXTLS_
3992 1239098112038ULL, // STBXTLS_32
3993 67146193ULL, // STD
3994 1136018894866ULL, // STDAT
3995 369146542ULL, // STDBRX
3996 1239098112265ULL, // STDCIX
3997 369133849ULL, // STDCX
3998 537375175ULL, // STDU
3999 570932248ULL, // STDUX
4000 369145980ULL, // STDX
4001 1239098112124ULL, // STDXTLS
4002 1239098112124ULL, // STDXTLS_
4003 67145815ULL, // STFD
4004 369146404ULL, // STFDEPX
4005 537375130ULL, // STFDU
4006 570932234ULL, // STFDUX
4007 369145936ULL, // STFDX
4008 1239098112080ULL, // STFDXTLS
4009 1239098112080ULL, // STFDXTLS_
4010 369147034ULL, // STFIWX
4011 67153440ULL, // STFS
4012 537375248ULL, // STFSU
4013 570932286ULL, // STFSUX
4014 369146759ULL, // STFSX
4015 1239098112903ULL, // STFSXTLS
4016 1239098112903ULL, // STFSXTLS_
4017 67147069ULL, // STH
4018 67147069ULL, // STH8
4019 369146557ULL, // STHBRX
4020 1239098112273ULL, // STHCIX
4021 369133857ULL, // STHCX
4022 369146420ULL, // STHEPX
4023 537375204ULL, // STHU
4024 537375204ULL, // STHU8
4025 570932262ULL, // STHUX
4026 570932262ULL, // STHUX8
4027 369146100ULL, // STHX
4028 369146100ULL, // STHX8
4029 1239098112244ULL, // STHXTLS
4030 1239098112244ULL, // STHXTLS_
4031 1239098112244ULL, // STHXTLS_32
4032 67155185ULL, // STMW
4033 18694ULL, // STOP
4034 67152539ULL, // STQ
4035 369133865ULL, // STQCX
4036 17879ULL, // STQX_PSEUDO
4037 1136018888821ULL, // STSWI
4038 369145860ULL, // STVEBX
4039 369146066ULL, // STVEHX
4040 369147026ULL, // STVEWX
4041 369146983ULL, // STVX
4042 369138074ULL, // STVXL
4043 67155623ULL, // STW
4044 67155623ULL, // STW8
4045 1136018894944ULL, // STWAT
4046 369146591ULL, // STWBRX
4047 1239098112281ULL, // STWCIX
4048 369133873ULL, // STWCX
4049 369146435ULL, // STWEPX
4050 537375299ULL, // STWU
4051 537375299ULL, // STWU8
4052 570932294ULL, // STWUX
4053 570932294ULL, // STWUX8
4054 369147068ULL, // STWX
4055 369147068ULL, // STWX8
4056 1239098113212ULL, // STWXTLS
4057 1239098113212ULL, // STWXTLS_
4058 1239098113212ULL, // STWXTLS_32
4059 67146146ULL, // STXSD
4060 369145972ULL, // STXSDX
4061 369145868ULL, // STXSIBX
4062 369145868ULL, // STXSIBXv
4063 369146074ULL, // STXSIHX
4064 369146074ULL, // STXSIHXv
4065 369147042ULL, // STXSIWX
4066 67152049ULL, // STXSSP
4067 369146476ULL, // STXSSPX
4068 67154625ULL, // STXV
4069 369145788ULL, // STXVB16X
4070 369145753ULL, // STXVD2X
4071 369145806ULL, // STXVH8X
4072 1239098104205ULL, // STXVL
4073 1239098104083ULL, // STXVLL
4074 67152175ULL, // STXVP
4075 1239098111878ULL, // STXVPB32X
4076 1239098104113ULL, // STXVPRL
4077 1239098104049ULL, // STXVPRLL
4078 369146492ULL, // STXVPX
4079 369145885ULL, // STXVRBX
4080 369145956ULL, // STXVRDX
4081 369146091ULL, // STXVRHX
4082 1239098104137ULL, // STXVRL
4083 1239098104067ULL, // STXVRLL
4084 369147059ULL, // STXVRWX
4085 369145770ULL, // STXVW4X
4086 369146995ULL, // STXVX
4087 1239098102555ULL, // SUBF
4088 1239098102555ULL, // SUBF8
4089 1239098105573ULL, // SUBF8O
4090 1239098099056ULL, // SUBF8O_rec
4091 1239098098460ULL, // SUBF8_rec
4092 1239098101487ULL, // SUBFC
4093 1239098101487ULL, // SUBFC8
4094 1239098105479ULL, // SUBFC8O
4095 1239098098950ULL, // SUBFC8O_rec
4096 1239098098108ULL, // SUBFC8_rec
4097 1239098105479ULL, // SUBFCO
4098 1239098098950ULL, // SUBFCO_rec
4099 1239098098108ULL, // SUBFC_rec
4100 1239098102429ULL, // SUBFE
4101 1239098102429ULL, // SUBFE8
4102 1239098105523ULL, // SUBFE8O
4103 1239098099000ULL, // SUBFE8O_rec
4104 1239098098386ULL, // SUBFE8_rec
4105 1239098105523ULL, // SUBFEO
4106 1239098099000ULL, // SUBFEO_rec
4107 1239098098386ULL, // SUBFE_rec
4108 105226735371ULL, // SUBFIC
4109 105226735371ULL, // SUBFIC8
4110 37578ULL, // SUBFME
4111 37578ULL, // SUBFME8
4112 40643ULL, // SUBFME8O
4113 34122ULL, // SUBFME8O_rec
4114 33506ULL, // SUBFME8_rec
4115 40643ULL, // SUBFMEO
4116 34122ULL, // SUBFMEO_rec
4117 33506ULL, // SUBFME_rec
4118 1239098105573ULL, // SUBFO
4119 1239098099056ULL, // SUBFO_rec
4120 1006677808ULL, // SUBFUS
4121 1006667786ULL, // SUBFUS_rec
4122 37645ULL, // SUBFZE
4123 37645ULL, // SUBFZE8
4124 40668ULL, // SUBFZE8O
4125 34150ULL, // SUBFZE8O_rec
4126 33555ULL, // SUBFZE8_rec
4127 40668ULL, // SUBFZEO
4128 34150ULL, // SUBFZEO_rec
4129 33555ULL, // SUBFZE_rec
4130 1239098098460ULL, // SUBF_rec
4131 1740616ULL, // SYNC
4132 22581064ULL, // SYNCP10
4133 1083419ULL, // TABORT
4134 1239098524081ULL, // TABORTDC
4135 1136019309432ULL, // TABORTDCI
4136 1239098524153ULL, // TABORTWC
4137 1136019309444ULL, // TABORTWCI
4138 1182903ULL, // TAILB
4139 1182903ULL, // TAILB8
4140 1215397ULL, // TAILBA
4141 1215397ULL, // TAILBA8
4142 18716ULL, // TAILBCTR
4143 18716ULL, // TAILBCTR8
4144 656604ULL, // TBEGIN
4145 18106ULL, // TBEGIN_RET
4146 1087617ULL, // TCHECK
4147 18094ULL, // TCHECK_RET
4148 23235356ULL, // TCRETURNai
4149 23235253ULL, // TCRETURNai8
4150 23203718ULL, // TCRETURNdi
4151 23202499ULL, // TCRETURNdi8
4152 23112552ULL, // TCRETURNri
4153 23104209ULL, // TCRETURNri8
4154 1239098528176ULL, // TD
4155 105227163219ULL, // TDI
4156 655970ULL, // TEND
4157 18442ULL, // TLBIA
4158 201822908ULL, // TLBIE
4159 12191730673685180ULL, // TLBIE8P9
4160 1445256535825ULL, // TLBIEIO
4161 1087671ULL, // TLBIEL
4162 12191730673689425ULL, // TLBIEP
4163 12191730673689425ULL, // TLBIEP8
4164 12191730673685180ULL, // TLBIEP9
4165 1239098767745ULL, // TLBILX
4166 47069ULL, // TLBIVAX
4167 1085589ULL, // TLBLD
4168 1087124ULL, // TLBLI
4169 18530ULL, // TLBRE
4170 1239098102482ULL, // TLBRE2
4171 47979ULL, // TLBSX
4172 1239098112875ULL, // TLBSX2
4173 1239098100057ULL, // TLBSX2D
4174 18472ULL, // TLBSYNC
4175 1089275ULL, // TLBSYNCIO
4176 18536ULL, // TLBWE
4177 1239098102511ULL, // TLBWE2
4178 18382ULL, // TLSGDAIX
4179 17152ULL, // TLSGDAIX8
4180 18392ULL, // TLSLDAIX
4181 17163ULL, // TLSLDAIX8
4182 18650ULL, // TRAP
4183 16126ULL, // TRECHKPT
4184 1082512ULL, // TRECLAIM
4185 657259ULL, // TSR
4186 1239098537594ULL, // TW
4187 105227163772ULL, // TWI
4188 17902ULL, // UNENCODED_NOP
4189 17943ULL, // UpdateGBR
4190 1239098101251ULL, // VABSDUB
4191 1239098103106ULL, // VABSDUH
4192 1239098111686ULL, // VABSDUW
4193 1239098108606ULL, // VADDCUQ
4194 1239098111669ULL, // VADDCUW
4195 8935679503069ULL, // VADDECUQ
4196 8935679499311ULL, // VADDEUQM
4197 1239098106793ULL, // VADDFP
4198 1239098109245ULL, // VADDSBS
4199 1239098109520ULL, // VADDSHS
4200 1239098109831ULL, // VADDSWS
4201 1239098104296ULL, // VADDUBM
4202 1239098109273ULL, // VADDUBS
4203 1239098104368ULL, // VADDUDM
4204 1239098104508ULL, // VADDUHM
4205 1239098109548ULL, // VADDUHS
4206 1239098104860ULL, // VADDUQM
4207 1239098105002ULL, // VADDUWM
4208 1239098109858ULL, // VADDUWS
4209 1239098102019ULL, // VAND
4210 1239098101472ULL, // VANDC
4211 1239098101125ULL, // VAVGSB
4212 1239098102982ULL, // VAVGSH
4213 1239098111493ULL, // VAVGSW
4214 1239098101269ULL, // VAVGUB
4215 1239098103124ULL, // VAVGUH
4216 1239098111713ULL, // VAVGUW
4217 1239098101960ULL, // VBPERMD
4218 1239098108454ULL, // VBPERMQ
4219 586531519354ULL, // VCFSX
4220 17179917178ULL, // VCFSX_0
4221 1239098101823ULL, // VCFUGED
4222 586531519519ULL, // VCFUX
4223 17179917343ULL, // VCFUX_0
4224 1239098108906ULL, // VCIPHER
4225 1239098110251ULL, // VCIPHERLAST
4226 1239098101012ULL, // VCLRLB
4227 1239098101102ULL, // VCLRRB
4228 36505ULL, // VCLZB
4229 37457ULL, // VCLZD
4230 1239098104410ULL, // VCLZDM
4231 38324ULL, // VCLZH
4232 36051ULL, // VCLZLSBB
4233 46940ULL, // VCLZW
4234 1239098106757ULL, // VCMPBFP
4235 1239098099170ULL, // VCMPBFP_rec
4236 1239098106856ULL, // VCMPEQFP
4237 1239098099191ULL, // VCMPEQFP_rec
4238 1239098101294ULL, // VCMPEQUB
4239 1239098098017ULL, // VCMPEQUB_rec
4240 1239098102300ULL, // VCMPEQUD
4241 1239098098315ULL, // VCMPEQUD_rec
4242 1239098103159ULL, // VCMPEQUH
4243 1239098098511ULL, // VCMPEQUH_rec
4244 1239098108691ULL, // VCMPEQUQ
4245 1239098099424ULL, // VCMPEQUQ_rec
4246 1239098111748ULL, // VCMPEQUW
4247 1239098099927ULL, // VCMPEQUW_rec
4248 1239098106810ULL, // VCMPGEFP
4249 1239098099180ULL, // VCMPGEFP_rec
4250 1239098106866ULL, // VCMPGTFP
4251 1239098099202ULL, // VCMPGTFP_rec
4252 1239098101178ULL, // VCMPGTSB
4253 1239098097998ULL, // VCMPGTSB_rec
4254 1239098102144ULL, // VCMPGTSD
4255 1239098098304ULL, // VCMPGTSD_rec
4256 1239098103045ULL, // VCMPGTSH
4257 1239098098492ULL, // VCMPGTSH_rec
4258 1239098108553ULL, // VCMPGTSQ
4259 1239098099413ULL, // VCMPGTSQ_rec
4260 1239098111573ULL, // VCMPGTSW
4261 1239098099908ULL, // VCMPGTSW_rec
4262 1239098101362ULL, // VCMPGTUB
4263 1239098098061ULL, // VCMPGTUB_rec
4264 1239098102310ULL, // VCMPGTUD
4265 1239098098326ULL, // VCMPGTUD_rec
4266 1239098103181ULL, // VCMPGTUH
4267 1239098098522ULL, // VCMPGTUH_rec
4268 1239098108701ULL, // VCMPGTUQ
4269 1239098099435ULL, // VCMPGTUQ_rec
4270 1239098111783ULL, // VCMPGTUW
4271 1239098099938ULL, // VCMPGTUW_rec
4272 1239098100967ULL, // VCMPNEB
4273 1239098097988ULL, // VCMPNEB_rec
4274 1239098102870ULL, // VCMPNEH
4275 1239098098482ULL, // VCMPNEH_rec
4276 1239098111075ULL, // VCMPNEW
4277 1239098099862ULL, // VCMPNEW_rec
4278 1239098101391ULL, // VCMPNEZB
4279 1239098098072ULL, // VCMPNEZB_rec
4280 1239098103210ULL, // VCMPNEZH
4281 1239098098533ULL, // VCMPNEZH_rec
4282 1239098111826ULL, // VCMPNEZW
4283 1239098099956ULL, // VCMPNEZW_rec
4284 1239098108545ULL, // VCMPSQ
4285 1239098108683ULL, // VCMPUQ
4286 1307817577665ULL, // VCNTMBB
4287 1307817578425ULL, // VCNTMBD
4288 1307817579582ULL, // VCNTMBH
4289 1307817587754ULL, // VCNTMBW
4290 586531516412ULL, // VCTSXS
4291 17179914236ULL, // VCTSXS_0
4292 586531516420ULL, // VCTUXS
4293 17179914244ULL, // VCTUXS_0
4294 36512ULL, // VCTZB
4295 37472ULL, // VCTZD
4296 1239098104427ULL, // VCTZDM
4297 38331ULL, // VCTZH
4298 36061ULL, // VCTZLSBB
4299 46957ULL, // VCTZW
4300 1239098102102ULL, // VDIVESD
4301 1239098108536ULL, // VDIVESQ
4302 1239098111484ULL, // VDIVESW
4303 1239098102265ULL, // VDIVEUD
4304 1239098108666ULL, // VDIVEUQ
4305 1239098111704ULL, // VDIVEUW
4306 1239098102154ULL, // VDIVSD
4307 1239098108563ULL, // VDIVSQ
4308 1239098111590ULL, // VDIVSW
4309 1239098102320ULL, // VDIVUD
4310 1239098108711ULL, // VDIVUQ
4311 1239098111793ULL, // VDIVUW
4312 1239098110638ULL, // VEQV
4313 39349ULL, // VEXPANDBM
4314 39431ULL, // VEXPANDDM
4315 39548ULL, // VEXPANDHM
4316 39725ULL, // VEXPANDQM
4317 40063ULL, // VEXPANDWM
4318 41931ULL, // VEXPTEFP
4319 8935679506847ULL, // VEXTDDVLX
4320 8935679507225ULL, // VEXTDDVRX
4321 8935679506835ULL, // VEXTDUBVLX
4322 8935679507213ULL, // VEXTDUBVRX
4323 8935679506868ULL, // VEXTDUHVLX
4324 8935679507246ULL, // VEXTDUHVRX
4325 8935679506890ULL, // VEXTDUWVLX
4326 8935679507268ULL, // VEXTDUWVRX
4327 39379ULL, // VEXTRACTBM
4328 620891247017ULL, // VEXTRACTD
4329 39451ULL, // VEXTRACTDM
4330 39578ULL, // VEXTRACTHM
4331 39745ULL, // VEXTRACTQM
4332 620891246182ULL, // VEXTRACTUB
4333 620891248001ULL, // VEXTRACTUH
4334 620891256590ULL, // VEXTRACTUW
4335 40083ULL, // VEXTRACTWM
4336 36712ULL, // VEXTSB2D
4337 36712ULL, // VEXTSB2Ds
4338 45767ULL, // VEXTSB2W
4339 45767ULL, // VEXTSB2Ws
4340 43327ULL, // VEXTSD2Q
4341 36722ULL, // VEXTSH2D
4342 36722ULL, // VEXTSH2Ds
4343 45777ULL, // VEXTSH2W
4344 45777ULL, // VEXTSH2Ws
4345 36732ULL, // VEXTSW2D
4346 36732ULL, // VEXTSW2Ds
4347 1239098112347ULL, // VEXTUBLX
4348 1239098112718ULL, // VEXTUBRX
4349 1239098112375ULL, // VEXTUHLX
4350 1239098112761ULL, // VEXTUHRX
4351 1239098112479ULL, // VEXTUWLX
4352 1239098112857ULL, // VEXTUWRX
4353 36786ULL, // VGBBD
4354 654982548795ULL, // VGNB
4355 1411165239634ULL, // VINSBLX
4356 1411165240005ULL, // VINSBRX
4357 1411165239689ULL, // VINSBVLX
4358 1411165240067ULL, // VINSBVRX
4359 1040224624ULL, // VINSD
4360 1411165239653ULL, // VINSDLX
4361 1411165240039ULL, // VINSDRX
4362 1040223731ULL, // VINSERTB
4363 620891247046ULL, // VINSERTD
4364 1040225586ULL, // VINSERTH
4365 620891256465ULL, // VINSERTW
4366 1411165239662ULL, // VINSHLX
4367 1411165240048ULL, // VINSHRX
4368 1411165239722ULL, // VINSHVLX
4369 1411165240100ULL, // VINSHVRX
4370 1040234053ULL, // VINSW
4371 1411165239766ULL, // VINSWLX
4372 1411165240144ULL, // VINSWRX
4373 1411165239744ULL, // VINSWVLX
4374 1411165240122ULL, // VINSWVRX
4375 41905ULL, // VLOGEFP
4376 8935679501216ULL, // VMADDFP
4377 1239098106876ULL, // VMAXFP
4378 1239098101197ULL, // VMAXSB
4379 1239098102162ULL, // VMAXSD
4380 1239098103064ULL, // VMAXSH
4381 1239098111598ULL, // VMAXSW
4382 1239098101372ULL, // VMAXUB
4383 1239098102328ULL, // VMAXUD
4384 1239098103191ULL, // VMAXUH
4385 1239098111801ULL, // VMAXUW
4386 8935679503929ULL, // VMHADDSHS
4387 8935679503940ULL, // VMHRADDSHS
4388 1239098106848ULL, // VMINFP
4389 1239098101161ULL, // VMINSB
4390 1239098102120ULL, // VMINSD
4391 1239098103028ULL, // VMINSH
4392 1239098111549ULL, // VMINSW
4393 1239098101277ULL, // VMINUB
4394 1239098102283ULL, // VMINUD
4395 1239098103142ULL, // VMINUH
4396 1239098111731ULL, // VMINUW
4397 8935679498928ULL, // VMLADDUHM
4398 1239098102085ULL, // VMODSD
4399 1239098108528ULL, // VMODSQ
4400 1239098111467ULL, // VMODSW
4401 1239098102248ULL, // VMODUD
4402 1239098108647ULL, // VMODUQ
4403 1239098111678ULL, // VMODUW
4404 1239098111067ULL, // VMRGEW
4405 1239098100976ULL, // VMRGHB
4406 1239098102879ULL, // VMRGHH
4407 1239098111110ULL, // VMRGHW
4408 1239098101004ULL, // VMRGLB
4409 1239098102897ULL, // VMRGLH
4410 1239098111160ULL, // VMRGLW
4411 1239098111440ULL, // VMRGOW
4412 8935679496670ULL, // VMSUMCUD
4413 8935679498688ULL, // VMSUMMBM
4414 8935679498896ULL, // VMSUMSHM
4415 8935679503961ULL, // VMSUMSHS
4416 8935679498737ULL, // VMSUMUBM
4417 8935679498809ULL, // VMSUMUDM
4418 8935679498959ULL, // VMSUMUHM
4419 8935679503989ULL, // VMSUMUHS
4420 43690ULL, // VMUL10CUQ
4421 1239098108615ULL, // VMUL10ECUQ
4422 1239098108655ULL, // VMUL10EUQ
4423 43680ULL, // VMUL10UQ
4424 1239098101116ULL, // VMULESB
4425 1239098102093ULL, // VMULESD
4426 1239098102973ULL, // VMULESH
4427 1239098111475ULL, // VMULESW
4428 1239098101260ULL, // VMULEUB
4429 1239098102256ULL, // VMULEUD
4430 1239098103115ULL, // VMULEUH
4431 1239098111695ULL, // VMULEUW
4432 1239098102111ULL, // VMULHSD
4433 1239098111511ULL, // VMULHSW
4434 1239098102274ULL, // VMULHUD
4435 1239098111722ULL, // VMULHUW
4436 1239098101924ULL, // VMULLD
4437 1239098101169ULL, // VMULOSB
4438 1239098102135ULL, // VMULOSD
4439 1239098103036ULL, // VMULOSH
4440 1239098111564ULL, // VMULOSW
4441 1239098101285ULL, // VMULOUB
4442 1239098102291ULL, // VMULOUD
4443 1239098103150ULL, // VMULOUH
4444 1239098111739ULL, // VMULOUW
4445 1239098105012ULL, // VMULUWM
4446 1239098102004ULL, // VNAND
4447 1239098108896ULL, // VNCIPHER
4448 1239098110237ULL, // VNCIPHERLAST
4449 36957ULL, // VNEGD
4450 46207ULL, // VNEGW
4451 8935679501198ULL, // VNMSUBFP
4452 1239098109007ULL, // VNOR
4453 1239098109020ULL, // VOR
4454 1239098101598ULL, // VORC
4455 1239098102040ULL, // VPDEPD
4456 8935679499349ULL, // VPERM
4457 8935679503399ULL, // VPERMR
4458 8935679503472ULL, // VPERMXOR
4459 1239098102230ULL, // VPEXTD
4460 1239098112596ULL, // VPKPX
4461 1239098109662ULL, // VPKSDSS
4462 1239098109726ULL, // VPKSDUS
4463 1239098109671ULL, // VPKSHSS
4464 1239098109752ULL, // VPKSHUS
4465 1239098109680ULL, // VPKSWSS
4466 1239098109770ULL, // VPKSWUS
4467 1239098104932ULL, // VPKUDUM
4468 1239098109735ULL, // VPKUDUS
4469 1239098104941ULL, // VPKUHUM
4470 1239098109761ULL, // VPKUHUS
4471 1239098104950ULL, // VPKUWUM
4472 1239098109779ULL, // VPKUWUS
4473 1239098101042ULL, // VPMSUMB
4474 1239098101969ULL, // VPMSUMD
4475 1239098102927ULL, // VPMSUMH
4476 1239098111223ULL, // VPMSUMW
4477 36329ULL, // VPOPCNTB
4478 37308ULL, // VPOPCNTD
4479 38184ULL, // VPOPCNTH
4480 46727ULL, // VPOPCNTW
4481 36802ULL, // VPRTYBD
4482 43358ULL, // VPRTYBQ
4483 46131ULL, // VPRTYBW
4484 41924ULL, // VREFP
4485 39653ULL, // VRFIM
4486 40277ULL, // VRFIN
4487 42008ULL, // VRFIP
4488 48469ULL, // VRFIZ
4489 1239098101030ULL, // VRLB
4490 1239098101948ULL, // VRLD
4491 1239098103490ULL, // VRLDMI
4492 1239098104589ULL, // VRLDNM
4493 1239098102915ULL, // VRLH
4494 1239098108435ULL, // VRLQ
4495 1239098103514ULL, // VRLQMI
4496 1239098104605ULL, // VRLQNM
4497 1239098111192ULL, // VRLW
4498 1239098103610ULL, // VRLWMI
4499 1239098104613ULL, // VRLWNM
4500 41941ULL, // VRSQRTEFP
4501 47602ULL, // VSBOX
4502 8935679498443ULL, // VSEL
4503 30994631528339ULL, // VSHASIGMAD
4504 30994631537687ULL, // VSHASIGMAW
4505 1239098104153ULL, // VSL
4506 1239098101036ULL, // VSLB
4507 1239098101954ULL, // VSLD
4508 44120051586517ULL, // VSLDBI
4509 30925912053591ULL, // VSLDOI
4510 1239098102921ULL, // VSLH
4511 1239098105650ULL, // VSLO
4512 1239098108441ULL, // VSLQ
4513 1239098110616ULL, // VSLV
4514 1239098111206ULL, // VSLW
4515 586531507681ULL, // VSPLTB
4516 586531507681ULL, // VSPLTBs
4517 586531509536ULL, // VSPLTH
4518 586531509536ULL, // VSPLTHs
4519 402689430ULL, // VSPLTISB
4520 402691297ULL, // VSPLTISH
4521 402699808ULL, // VSPLTISW
4522 586531518070ULL, // VSPLTW
4523 1239098109105ULL, // VSR
4524 1239098100915ULL, // VSRAB
4525 1239098101675ULL, // VSRAD
4526 1239098102839ULL, // VSRAH
4527 1239098108233ULL, // VSRAQ
4528 1239098111011ULL, // VSRAW
4529 1239098101110ULL, // VSRB
4530 1239098102071ULL, // VSRD
4531 44120051586525ULL, // VSRDBI
4532 1239098102943ULL, // VSRH
4533 1239098105778ULL, // VSRO
4534 1239098108522ULL, // VSRQ
4535 1239098110644ULL, // VSRV
4536 1239098111461ULL, // VSRW
4537 39066ULL, // VSTRIBL
4538 33878ULL, // VSTRIBL_rec
4539 43899ULL, // VSTRIBR
4540 34604ULL, // VSTRIBR_rec
4541 39135ULL, // VSTRIHL
4542 33912ULL, // VSTRIHL_rec
4543 44019ULL, // VSTRIHR
4544 34631ULL, // VSTRIHR_rec
4545 1239098108597ULL, // VSUBCUQ
4546 1239098111660ULL, // VSUBCUW
4547 8935679503059ULL, // VSUBECUQ
4548 8935679499301ULL, // VSUBEUQM
4549 1239098106776ULL, // VSUBFP
4550 1239098109236ULL, // VSUBSBS
4551 1239098109488ULL, // VSUBSHS
4552 1239098109822ULL, // VSUBSWS
4553 1239098104287ULL, // VSUBUBM
4554 1239098109264ULL, // VSUBUBS
4555 1239098104359ULL, // VSUBUDM
4556 1239098104487ULL, // VSUBUHM
4557 1239098109539ULL, // VSUBUHS
4558 1239098104838ULL, // VSUBUQM
4559 1239098104992ULL, // VSUBUWM
4560 1239098109849ULL, // VSUBUWS
4561 1239098109812ULL, // VSUM2SWS
4562 1239098109226ULL, // VSUM4SBS
4563 1239098109478ULL, // VSUM4SHS
4564 1239098109254ULL, // VSUM4UBS
4565 1239098109840ULL, // VSUMSWS
4566 1239098100984ULL, // VUCMPRHB
4567 1239098102887ULL, // VUCMPRHH
4568 1239098105163ULL, // VUCMPRHN
4569 1239098101020ULL, // VUCMPRLB
4570 1239098102905ULL, // VUCMPRLH
4571 1239098105202ULL, // VUCMPRLN
4572 47691ULL, // VUPKHPX
4573 36237ULL, // VUPKHSB
4574 38094ULL, // VUPKHSH
4575 36161ULL, // VUPKHSNTOB
4576 46605ULL, // VUPKHSW
4577 1445256530525ULL, // VUPKINT4TOBF16
4578 654982547929ULL, // VUPKINT4TOFP32
4579 1307817577069ULL, // VUPKINT8TOBF16
4580 1445256530409ULL, // VUPKINT8TOFP32
4581 47707ULL, // VUPKLPX
4582 36256ULL, // VUPKLSB
4583 38123ULL, // VUPKLSH
4584 36173ULL, // VUPKLSNTOB
4585 46634ULL, // VUPKLSW
4586 1239098109058ULL, // VXOR
4587 242867022978ULL, // V_SET0
4588 242867022978ULL, // V_SET0B
4589 242867022978ULL, // V_SET0H
4590 24163872ULL, // V_SETALLONES
4591 24163872ULL, // V_SETALLONESB
4592 24163872ULL, // V_SETALLONESH
4593 1749187ULL, // WAIT
4594 258650307ULL, // WAITP10
4595 1086102ULL, // WRTEE
4596 1087064ULL, // WRTEEI
4597 1239098109028ULL, // XOR
4598 1239098109028ULL, // XOR8
4599 1239098099549ULL, // XOR8_rec
4600 173946214278ULL, // XORI
4601 173946214278ULL, // XORI8
4602 173946220197ULL, // XORIS
4603 173946220197ULL, // XORIS8
4604 1239098099549ULL, // XOR_rec
4605 41616ULL, // XSABSDP
4606 42634ULL, // XSABSQP
4607 1239098104903ULL, // XSADDADDSUQM
4608 1239098104847ULL, // XSADDADDUQM
4609 1239098106016ULL, // XSADDDP
4610 1239098107358ULL, // XSADDQP
4611 1239098105737ULL, // XSADDQPO
4612 1239098107711ULL, // XSADDSP
4613 1239098104889ULL, // XSADDSUBSUQM
4614 1239098104825ULL, // XSADDSUBUQM
4615 1239098106470ULL, // XSCMPEQDP
4616 1239098107489ULL, // XSCMPEQQP
4617 1239098106438ULL, // XSCMPEXPDP
4618 1239098107467ULL, // XSCMPEXPQP
4619 1239098106078ULL, // XSCMPGEDP
4620 1239098107387ULL, // XSCMPGEQP
4621 1239098106537ULL, // XSCMPGTDP
4622 1239098107539ULL, // XSCMPGTQP
4623 1239098106368ULL, // XSCMPODP
4624 1239098107437ULL, // XSCMPOQP
4625 1239098106601ULL, // XSCMPUDP
4626 1239098107560ULL, // XSCMPUQP
4627 1239098106319ULL, // XSCPSGNDP
4628 1239098107426ULL, // XSCPSGNQP
4629 41988ULL, // XSCVDPHP
4630 42551ULL, // XSCVDPQP
4631 43077ULL, // XSCVDPSP
4632 40532ULL, // XSCVDPSPN
4633 44460ULL, // XSCVDPSXDS
4634 44460ULL, // XSCVDPSXDSs
4635 44980ULL, // XSCVDPSXWS
4636 44980ULL, // XSCVDPSXWSs
4637 44496ULL, // XSCVDPUXDS
4638 44496ULL, // XSCVDPUXDSs
4639 45016ULL, // XSCVDPUXWS
4640 45016ULL, // XSCVDPUXWSs
4641 41482ULL, // XSCVHPDP
4642 41492ULL, // XSCVQPDP
4643 40760ULL, // XSCVQPDPO
4644 48441ULL, // XSCVQPSDZ
4645 48566ULL, // XSCVQPSQZ
4646 48649ULL, // XSCVQPSWZ
4647 48452ULL, // XSCVQPUDZ
4648 48577ULL, // XSCVQPUQZ
4649 48660ULL, // XSCVQPUWZ
4650 42471ULL, // XSCVSDQP
4651 41502ULL, // XSCVSPDP
4652 40480ULL, // XSCVSPDPN
4653 42604ULL, // XSCVSQQP
4654 41138ULL, // XSCVSXDDP
4655 42833ULL, // XSCVSXDSP
4656 42481ULL, // XSCVUDQP
4657 42614ULL, // XSCVUQQP
4658 41160ULL, // XSCVUXDDP
4659 42855ULL, // XSCVUXDSP
4660 1239098106611ULL, // XSDIVDP
4661 1239098107570ULL, // XSDIVQP
4662 1239098105768ULL, // XSDIVQPO
4663 1239098108131ULL, // XSDIVSP
4664 1239098106418ULL, // XSIEXPDP
4665 1239098107457ULL, // XSIEXPQP
4666 1411165233230ULL, // XSMADDADP
4667 1411165234945ULL, // XSMADDASP
4668 1411165233593ULL, // XSMADDMDP
4669 1411165235227ULL, // XSMADDMSP
4670 1411165234644ULL, // XSMADDQP
4671 1411165233022ULL, // XSMADDQPO
4672 1239098106006ULL, // XSMAXCDP
4673 1239098107327ULL, // XSMAXCQP
4674 1239098106671ULL, // XSMAXDP
4675 1239098106199ULL, // XSMAXJDP
4676 1239098104653ULL, // XSMERGE2T1UQM
4677 1239098104715ULL, // XSMERGE2T2UQM
4678 1239098104762ULL, // XSMERGE2T3UQM
4679 1239098104684ULL, // XSMERGE3T1UQM
4680 1239098105996ULL, // XSMINCDP
4681 1239098107317ULL, // XSMINCQP
4682 1239098106341ULL, // XSMINDP
4683 1239098106189ULL, // XSMINJDP
4684 1411165233184ULL, // XSMSUBADP
4685 1411165234899ULL, // XSMSUBASP
4686 1411165233547ULL, // XSMSUBMDP
4687 1411165235181ULL, // XSMSUBMSP
4688 1411165234583ULL, // XSMSUBQP
4689 1411165232989ULL, // XSMSUBQPO
4690 1239098106209ULL, // XSMULDP
4691 1239098107417ULL, // XSMULQP
4692 1239098105747ULL, // XSMULQPO
4693 1239098107843ULL, // XSMULSP
4694 41596ULL, // XSNABSDP
4695 41596ULL, // XSNABSDPs
4696 42624ULL, // XSNABSQP
4697 41244ULL, // XSNEGDP
4698 42502ULL, // XSNEGQP
4699 1411165233206ULL, // XSNMADDADP
4700 1411165234921ULL, // XSNMADDASP
4701 1411165233569ULL, // XSNMADDMDP
4702 1411165235203ULL, // XSNMADDMSP
4703 1411165234633ULL, // XSNMADDQP
4704 1411165233010ULL, // XSNMADDQPO
4705 1411165233160ULL, // XSNMSUBADP
4706 1411165234875ULL, // XSNMSUBASP
4707 1411165233523ULL, // XSNMSUBMDP
4708 1411165235157ULL, // XSNMSUBMSP
4709 1411165234572ULL, // XSNMSUBQP
4710 1411165232977ULL, // XSNMSUBQPO
4711 38751ULL, // XSRDPI
4712 36627ULL, // XSRDPIC
4713 39660ULL, // XSRDPIM
4714 42015ULL, // XSRDPIP
4715 48476ULL, // XSRDPIZ
4716 1239098104668ULL, // XSREBASE2T1UQM
4717 1239098104730ULL, // XSREBASE2T2UQM
4718 1239098104777ULL, // XSREBASE2T3UQM
4719 1239098104809ULL, // XSREBASE2T4UQM
4720 1239098104699ULL, // XSREBASE3T1UQM
4721 1239098104746ULL, // XSREBASE3T2UQM
4722 1239098104793ULL, // XSREBASE3T3UQM
4723 41204ULL, // XSREDP
4724 42888ULL, // XSRESP
4725 302389103ULL, // XSRQPI
4726 302397769ULL, // XSRQPIX
4727 302393654ULL, // XSRQPXP
4728 43150ULL, // XSRSP
4729 41220ULL, // XSRSQRTEDP
4730 42904ULL, // XSRSQRTESP
4731 41663ULL, // XSSQRTDP
4732 42654ULL, // XSSQRTQP
4733 40861ULL, // XSSQRTQPO
4734 43204ULL, // XSSQRTSP
4735 1239098105956ULL, // XSSUBDP
4736 1239098107297ULL, // XSSUBQP
4737 1239098105704ULL, // XSSUBQPO
4738 1239098107671ULL, // XSSUBSP
4739 1239098106620ULL, // XSTDIVDP
4740 41673ULL, // XSTSQRTDP
4741 689610727542ULL, // XSTSTDCDP
4742 689610728874ULL, // XSTSTDCQP
4743 689610729257ULL, // XSTSTDCSP
4744 41554ULL, // XSXEXPDP
4745 42583ULL, // XSXEXPQP
4746 41262ULL, // XSXSIGDP
4747 42511ULL, // XSXSIGQP
4748 41625ULL, // XVABSDP
4749 43167ULL, // XVABSSP
4750 1239098106025ULL, // XVADDDP
4751 1239098107720ULL, // XVADDSP
4752 1239098104507ULL, // XVADDUHM
4753 1239098105001ULL, // XVADDUWM
4754 1239098100219ULL, // XVBF16GER2
4755 1411165232510ULL, // XVBF16GER2NN
4756 1411165234273ULL, // XVBF16GER2NP
4757 1411165232606ULL, // XVBF16GER2PN
4758 1411165234369ULL, // XVBF16GER2PP
4759 1239098100219ULL, // XVBF16GER2W
4760 1411165232510ULL, // XVBF16GER2WNN
4761 1411165234273ULL, // XVBF16GER2WNP
4762 1411165232606ULL, // XVBF16GER2WPN
4763 1411165234369ULL, // XVBF16GER2WPP
4764 1239098106481ULL, // XVCMPEQDP
4765 1239098099138ULL, // XVCMPEQDP_rec
4766 1239098108023ULL, // XVCMPEQSP
4767 1239098099232ULL, // XVCMPEQSP_rec
4768 1239098106089ULL, // XVCMPGEDP
4769 1239098099126ULL, // XVCMPGEDP_rec
4770 1239098107773ULL, // XVCMPGESP
4771 1239098099220ULL, // XVCMPGESP_rec
4772 1239098106548ULL, // XVCMPGTDP
4773 1239098099158ULL, // XVCMPGTDP_rec
4774 1239098108089ULL, // XVCMPGTSP
4775 1239098099258ULL, // XVCMPGTSP_rec
4776 1239098106330ULL, // XVCPSGNDP
4777 1239098107953ULL, // XVCPSGNSP
4778 40519ULL, // XVCVBF16SPN
4779 43087ULL, // XVCVDPSP
4780 44472ULL, // XVCVDPSXDS
4781 44992ULL, // XVCVDPSXWS
4782 44508ULL, // XVCVDPUXDS
4783 45028ULL, // XVCVDPUXWS
4784 43097ULL, // XVCVHPSP
4785 35453ULL, // XVCVSPBF16
4786 41512ULL, // XVCVSPDP
4787 41998ULL, // XVCVSPHP
4788 44484ULL, // XVCVSPSXDS
4789 45004ULL, // XVCVSPSXWS
4790 44520ULL, // XVCVSPUXDS
4791 45040ULL, // XVCVSPUXWS
4792 41149ULL, // XVCVSXDDP
4793 42844ULL, // XVCVSXDSP
4794 41753ULL, // XVCVSXWDP
4795 43263ULL, // XVCVSXWSP
4796 41171ULL, // XVCVUXDDP
4797 42866ULL, // XVCVUXDSP
4798 41764ULL, // XVCVUXWDP
4799 43274ULL, // XVCVUXWSP
4800 1239098106640ULL, // XVDIVDP
4801 1239098108150ULL, // XVDIVSP
4802 1239098100233ULL, // XVF16GER2
4803 1411165232526ULL, // XVF16GER2NN
4804 1411165234289ULL, // XVF16GER2NP
4805 1411165232622ULL, // XVF16GER2PN
4806 1411165234385ULL, // XVF16GER2PP
4807 1239098100233ULL, // XVF16GER2W
4808 1411165232526ULL, // XVF16GER2WNN
4809 1411165234289ULL, // XVF16GER2WNP
4810 1411165232622ULL, // XVF16GER2WPN
4811 1411165234385ULL, // XVF16GER2WPP
4812 1239098108874ULL, // XVF32GER
4813 1411165232578ULL, // XVF32GERNN
4814 1411165234341ULL, // XVF32GERNP
4815 1411165232685ULL, // XVF32GERPN
4816 1411165234497ULL, // XVF32GERPP
4817 1239098108874ULL, // XVF32GERW
4818 1411165232578ULL, // XVF32GERWNN
4819 1411165234341ULL, // XVF32GERWNP
4820 1411165232685ULL, // XVF32GERWPN
4821 1411165234497ULL, // XVF32GERWPP
4822 1239098108886ULL, // XVF64GER
4823 1411165232592ULL, // XVF64GERNN
4824 1411165234355ULL, // XVF64GERNP
4825 1411165232699ULL, // XVF64GERPN
4826 1411165234511ULL, // XVF64GERPP
4827 1239098108886ULL, // XVF64GERW
4828 1411165232592ULL, // XVF64GERWNN
4829 1411165234355ULL, // XVF64GERWNP
4830 1411165232699ULL, // XVF64GERWPN
4831 1411165234511ULL, // XVF64GERWPP
4832 1239098100246ULL, // XVI16GER2
4833 1411165234400ULL, // XVI16GER2PP
4834 1239098109133ULL, // XVI16GER2S
4835 1411165234525ULL, // XVI16GER2SPP
4836 1239098109133ULL, // XVI16GER2SW
4837 1411165234525ULL, // XVI16GER2SWPP
4838 1239098100246ULL, // XVI16GER2W
4839 1411165234400ULL, // XVI16GER2WPP
4840 1239098100449ULL, // XVI4GER8
4841 1411165234483ULL, // XVI4GER8PP
4842 1239098100449ULL, // XVI4GER8W
4843 1411165234483ULL, // XVI4GER8WPP
4844 1239098100292ULL, // XVI8GER4
4845 1411165234452ULL, // XVI8GER4PP
4846 1411165234541ULL, // XVI8GER4SPP
4847 1239098100292ULL, // XVI8GER4W
4848 1411165234452ULL, // XVI8GER4WPP
4849 1411165234541ULL, // XVI8GER4WSPP
4850 1239098106428ULL, // XVIEXPDP
4851 1239098108003ULL, // XVIEXPSP
4852 1411165233241ULL, // XVMADDADP
4853 1411165234956ULL, // XVMADDASP
4854 1411165233604ULL, // XVMADDMDP
4855 1411165235238ULL, // XVMADDMSP
4856 1239098106680ULL, // XVMAXDP
4857 1239098108181ULL, // XVMAXSP
4858 1239098106350ULL, // XVMINDP
4859 1239098107964ULL, // XVMINSP
4860 1411165233195ULL, // XVMSUBADP
4861 1411165234910ULL, // XVMSUBASP
4862 1411165233558ULL, // XVMSUBMDP
4863 1411165235192ULL, // XVMSUBMSP
4864 1239098106218ULL, // XVMULDP
4865 1239098102999ULL, // XVMULHSH
4866 1239098111510ULL, // XVMULHSW
4867 1239098103132ULL, // XVMULHUH
4868 1239098111721ULL, // XVMULHUW
4869 1239098107852ULL, // XVMULSP
4870 1239098104517ULL, // XVMULUHM
4871 1239098105011ULL, // XVMULUWM
4872 41606ULL, // XVNABSDP
4873 43157ULL, // XVNABSSP
4874 41253ULL, // XVNEGDP
4875 42928ULL, // XVNEGSP
4876 1411165233218ULL, // XVNMADDADP
4877 1411165234933ULL, // XVNMADDASP
4878 1411165233581ULL, // XVNMADDMDP
4879 1411165235215ULL, // XVNMADDMSP
4880 1411165233172ULL, // XVNMSUBADP
4881 1411165234887ULL, // XVNMSUBASP
4882 1411165233535ULL, // XVNMSUBMDP
4883 1411165235169ULL, // XVNMSUBMSP
4884 38759ULL, // XVRDPI
4885 36636ULL, // XVRDPIC
4886 39669ULL, // XVRDPIM
4887 42024ULL, // XVRDPIP
4888 48485ULL, // XVRDPIZ
4889 41212ULL, // XVREDP
4890 42896ULL, // XVRESP
4891 1239098111198ULL, // XVRLW
4892 38775ULL, // XVRSPI
4893 36645ULL, // XVRSPIC
4894 39678ULL, // XVRSPIM
4895 42033ULL, // XVRSPIP
4896 48494ULL, // XVRSPIZ
4897 41232ULL, // XVRSQRTEDP
4898 42916ULL, // XVRSQRTESP
4899 41695ULL, // XVSQRTDP
4900 43225ULL, // XVSQRTSP
4901 1239098105965ULL, // XVSUBDP
4902 1239098107680ULL, // XVSUBSP
4903 1239098104486ULL, // XVSUBUHM
4904 1239098104991ULL, // XVSUBUWM
4905 1239098106630ULL, // XVTDIVDP
4906 1239098108140ULL, // XVTDIVSP
4907 36042ULL, // XVTLSBB
4908 41684ULL, // XVTSQRTDP
4909 43214ULL, // XVTSQRTSP
4910 689610727553ULL, // XVTSTDCDP
4911 689610729268ULL, // XVTSTDCSP
4912 41564ULL, // XVXEXPDP
4913 43117ULL, // XVXEXPSP
4914 41272ULL, // XVXSIGDP
4915 42937ULL, // XVXSIGSP
4916 13333726011378ULL, // XXAESDECP
4917 13333726011389ULL, // XXAESENCP
4918 1445256537162ULL, // XXAESGENLKP
4919 8935679495812ULL, // XXBLENDVB
4920 8935679496768ULL, // XXBLENDVD
4921 8935679497631ULL, // XXBLENDVH
4922 8935679506241ULL, // XXBLENDVW
4923 37158ULL, // XXBRD
4924 38040ULL, // XXBRH
4925 43619ULL, // XXBRQ
4926 46558ULL, // XXBRW
4927 3738479120914578ULL, // XXEVAL
4928 723702036250ULL, // XXEXTRACTUW
4929 758061767163ULL, // XXGENPCVBM
4930 758061767246ULL, // XXGENPCVDM
4931 758061767385ULL, // XXGENPCVHM
4932 758061767869ULL, // XXGENPCVWM
4933 17731772517033ULL, // XXGFMUL128
4934 792689948315ULL, // XXINSERTW
4935 1239098101978ULL, // XXLAND
4936 1239098101454ULL, // XXLANDC
4937 1239098110622ULL, // XXLEQV
4938 242867024542ULL, // XXLEQVOnes
4939 1239098101986ULL, // XXLNAND
4940 1239098108991ULL, // XXLNOR
4941 1239098108984ULL, // XXLOR
4942 1239098101582ULL, // XXLORC
4943 1239098108984ULL, // XXLORf
4944 1239098109025ULL, // XXLXOR
4945 242867022945ULL, // XXLXORdpz
4946 242867022945ULL, // XXLXORspz
4947 242867022945ULL, // XXLXORz
4948 1543862ULL, // XXMFACC
4949 1543862ULL, // XXMFACCW
4950 1239098111118ULL, // XXMRGHW
4951 1239098111168ULL, // XXMRGLW
4952 1085119ULL, // XXMTACC
4953 1085119ULL, // XXMTACCW
4954 44120051587436ULL, // XXMULMUL
4955 111270716317405161ULL, // XXMULMULHIADD
4956 12191524515254279ULL, // XXMULMULLOADD
4957 1410896796764ULL, // XXPERM
4958 13333726008866ULL, // XXPERMDI
4959 48827335743010ULL, // XXPERMDIs
4960 1410896800815ULL, // XXPERMR
4961 4301429074344425ULL, // XXPERMX
4962 8935679498449ULL, // XXSEL
4963 1096971ULL, // XXSETACCZ
4964 13333726009357ULL, // XXSLDWI
4965 48827335743501ULL, // XXSLDWIs
4966 1073788972ULL, // XXSPLTI32DX
4967 1107332354ULL, // XXSPLTIB
4968 41282ULL, // XXSPLTIDP
4969 46254ULL, // XXSPLTIW
4970 1445256541822ULL, // XXSPLTW
4971 1445256541822ULL, // XXSPLTWs
4972 17731772521027ULL, // XXSSUMUDM
4973 17731772518197ULL, // XXSSUMUDMC
4974 12182728422240633ULL, // XXSSUMUDMCEXT
4975 826781666987ULL, // gBC
4976 861141404585ULL, // gBCA
4977 25905152ULL, // gBCAat
4978 1239098535094ULL, // gBCCTR
4979 1239098530106ULL, // gBCCTRL
4980 826781669539ULL, // gBCL
4981 861141404784ULL, // gBCLA
4982 25905168ULL, // gBCLAat
4983 1239098534908ULL, // gBCLR
4984 1239098530082ULL, // gBCLRL
4985 26953867ULL, // gBCLat
4986 26953757ULL, // gBCat
4987 };
4988
4989 // Emit the opcode for the instruction.
4990 uint64_t Bits = 0;
4991 Bits |= (uint64_t)OpInfo0[MI.getOpcode()] << 0;
4992 if (Bits == 0)
4993 return {nullptr, Bits};
4994 return {AsmStrs+(Bits & 32767)-1, Bits};
4995
4996}
4997/// printInstruction - This method is automatically generated by tablegen
4998/// from the instruction set description.
4999LLVM_NO_PROFILE_INSTRUMENT_FUNCTION
5000void PPCInstPrinter::printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O) {
5001 O << "\t";
5002
5003 auto MnemonicInfo = getMnemonic(MI: *MI);
5004
5005 O << MnemonicInfo.first;
5006
5007 uint64_t Bits = MnemonicInfo.second;
5008 assert(Bits != 0 && "Cannot print this instruction.");
5009
5010 // Fragment 0 encoded into 5 bits for 23 unique commands.
5011 switch ((Bits >> 15) & 31) {
5012 default: llvm_unreachable("Invalid command number.");
5013 case 0:
5014 // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...
5015 return;
5016 break;
5017 case 1:
5018 // BUILD_UACC, CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CL...
5019 printOperand(MI, OpNo: 0, STI, O);
5020 break;
5021 case 2:
5022 // DCBFL, DCBFLP, DCBFPS, DCBFx, DCBSTPS, DCBTCT, DCBTDS, DCBTSTCT, DCBTS...
5023 printMemRegReg(MI, OpNo: 0, STI, O);
5024 break;
5025 case 3:
5026 // ADJCALLSTACKDOWN, ADJCALLSTACKUP
5027 printUImmOperand<32>(MI, OpNo: 0, STI, O);
5028 O << ' ';
5029 printUImmOperand<32>(MI, OpNo: 1, STI, O);
5030 return;
5031 break;
5032 case 4:
5033 // B, BCLalways, BDNZ, BDNZ8, BDNZL, BDNZLm, BDNZLp, BDNZm, BDNZp, BDZ, B...
5034 printBranchOperand(MI, Address, OpNo: 0, STI, O);
5035 break;
5036 case 5:
5037 // BA, BDNZA, BDNZAm, BDNZAp, BDNZLA, BDNZLAm, BDNZLAp, BDZA, BDZAm, BDZA...
5038 printAbsBranchOperand(MI, OpNo: 0, STI, O);
5039 break;
5040 case 6:
5041 // BCC, BCCA, BCCCTR, BCCCTR8, BCCCTRL, BCCCTRL8, BCCL, BCCLA, BCCLR, BCC...
5042 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "cc");
5043 break;
5044 case 7:
5045 // BCTRL8_LDinto_toc, BCTRL8_LDinto_toc_RM, BCTRL_LWZinto_toc, BCTRL_LWZi...
5046 printMemRegImm(MI, OpNo: 0, STI, O);
5047 return;
5048 break;
5049 case 8:
5050 // BL8_NOP_TLS, BL8_NOTOC_TLS, BL8_TLS, BL8_TLS_, BL_TLS
5051 printTLSCall(MI, OpNo: 0, STI, O);
5052 break;
5053 case 9:
5054 // DCBF, DCBT, DCBTST
5055 printMemRegReg(MI, OpNo: 1, STI, O);
5056 O << ", ";
5057 break;
5058 case 10:
5059 // DCBTEP, DCBTSTEP
5060 printUImmOperand<5>(MI, OpNo: 2, STI, O);
5061 O << ", ";
5062 printMemRegReg(MI, OpNo: 0, STI, O);
5063 return;
5064 break;
5065 case 11:
5066 // DDEDPD, DDEDPDQ, DDEDPDQ_rec, DDEDPD_rec
5067 printUImmOperand<2>(MI, OpNo: 1, STI, O);
5068 O << ", ";
5069 printOperand(MI, OpNo: 0, STI, O);
5070 O << ", ";
5071 printOperand(MI, OpNo: 2, STI, O);
5072 return;
5073 break;
5074 case 12:
5075 // DENBCD, DENBCDQ, DENBCDQ_rec, DENBCD_rec, DRINTN, DRINTNQ, DRINTNQ_rec...
5076 printUImmOperand<1>(MI, OpNo: 1, STI, O);
5077 O << ", ";
5078 printOperand(MI, OpNo: 0, STI, O);
5079 O << ", ";
5080 printOperand(MI, OpNo: 2, STI, O);
5081 break;
5082 case 13:
5083 // DQUAI, DQUAIQ, DQUAIQ_rec, DQUAI_rec
5084 printSImmOperand<5>(MI, OpNo: 1, STI, O);
5085 O << ", ";
5086 printOperand(MI, OpNo: 0, STI, O);
5087 O << ", ";
5088 printOperand(MI, OpNo: 2, STI, O);
5089 O << ", ";
5090 printUImmOperand<2>(MI, OpNo: 3, STI, O);
5091 return;
5092 break;
5093 case 14:
5094 // DSS, MBAR, MTFSB0, MTFSB1, TABORTDC, TABORTDCI, TABORTWC, TABORTWCI, T...
5095 printUImmOperand<5>(MI, OpNo: 0, STI, O);
5096 break;
5097 case 15:
5098 // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64, MTDCR, MTV...
5099 printOperand(MI, OpNo: 1, STI, O);
5100 break;
5101 case 16:
5102 // ICBLC, ICBLQ, ICBT, ICBTLS
5103 printUImmOperand<4>(MI, OpNo: 0, STI, O);
5104 O << ", ";
5105 printMemRegReg(MI, OpNo: 1, STI, O);
5106 return;
5107 break;
5108 case 17:
5109 // MTFSFI, MTFSFI_rec, MTFSFIb, SYNCP10
5110 printUImmOperand<3>(MI, OpNo: 0, STI, O);
5111 O << ", ";
5112 break;
5113 case 18:
5114 // MTOCRF, MTOCRF8
5115 printcrbitm(MI, OpNo: 0, STI, O);
5116 O << ", ";
5117 printOperand(MI, OpNo: 1, STI, O);
5118 return;
5119 break;
5120 case 19:
5121 // MTSR
5122 printUImmOperand<4>(MI, OpNo: 1, STI, O);
5123 O << ", ";
5124 printOperand(MI, OpNo: 0, STI, O);
5125 return;
5126 break;
5127 case 20:
5128 // RFEBB, TBEGIN, TEND, TSR
5129 printUImmOperand<1>(MI, OpNo: 0, STI, O);
5130 return;
5131 break;
5132 case 21:
5133 // SYNC, TLBILX, WAIT, WAITP10
5134 printUImmOperand<2>(MI, OpNo: 0, STI, O);
5135 break;
5136 case 22:
5137 // gBCAat, gBCLAat, gBCLat, gBCat
5138 printATBitsAsHint(MI, OpNo: 1, STI, O);
5139 O << ' ';
5140 printUImmOperand<5>(MI, OpNo: 0, STI, O);
5141 O << ", ";
5142 printOperand(MI, OpNo: 2, STI, O);
5143 O << ", ";
5144 break;
5145 }
5146
5147
5148 // Fragment 1 encoded into 5 bits for 26 unique commands.
5149 switch ((Bits >> 20) & 31) {
5150 default: llvm_unreachable("Invalid command number.");
5151 case 0:
5152 // BUILD_UACC, CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CL...
5153 O << ", ";
5154 break;
5155 case 1:
5156 // DCBFL, DCBFLP, DCBFPS, DCBFx, DCBSTPS, DCBTSTT, DCBTSTx, DCBTT, DCBTx,...
5157 return;
5158 break;
5159 case 2:
5160 // BCC, CTRL_DEP
5161 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "pm");
5162 O << ' ';
5163 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "reg");
5164 O << ", ";
5165 printBranchOperand(MI, Address, OpNo: 2, STI, O);
5166 return;
5167 break;
5168 case 3:
5169 // BCCA
5170 O << 'a';
5171 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "pm");
5172 O << ' ';
5173 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "reg");
5174 O << ", ";
5175 printAbsBranchOperand(MI, OpNo: 2, STI, O);
5176 return;
5177 break;
5178 case 4:
5179 // BCCCTR, BCCCTR8
5180 O << "ctr";
5181 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "pm");
5182 O << ' ';
5183 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "reg");
5184 return;
5185 break;
5186 case 5:
5187 // BCCCTRL, BCCCTRL8
5188 O << "ctrl";
5189 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "pm");
5190 O << ' ';
5191 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "reg");
5192 return;
5193 break;
5194 case 6:
5195 // BCCL
5196 O << 'l';
5197 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "pm");
5198 O << ' ';
5199 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "reg");
5200 O << ", ";
5201 printBranchOperand(MI, Address, OpNo: 2, STI, O);
5202 return;
5203 break;
5204 case 7:
5205 // BCCLA
5206 O << "la";
5207 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "pm");
5208 O << ' ';
5209 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "reg");
5210 O << ", ";
5211 printAbsBranchOperand(MI, OpNo: 2, STI, O);
5212 return;
5213 break;
5214 case 8:
5215 // BCCLR
5216 O << "lr";
5217 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "pm");
5218 O << ' ';
5219 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "reg");
5220 return;
5221 break;
5222 case 9:
5223 // BCCLRL
5224 O << "lrl";
5225 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "pm");
5226 O << ' ';
5227 printPredicateOperand(MI, OpNo: 0, STI, O, Modifier: "reg");
5228 return;
5229 break;
5230 case 10:
5231 // BCCTR, BCCTR8, BCCTR8n, BCCTRL, BCCTRL8, BCCTRL8n, BCCTRLn, BCCTRn, BC...
5232 O << ", 0";
5233 return;
5234 break;
5235 case 11:
5236 // BL8_LDinto_toc, BL8_LDinto_toc_RM
5237 O << "\n\tld 2, 40(1)";
5238 return;
5239 break;
5240 case 12:
5241 // BL8_NOP, BL8_NOP_RM, BL8_NOP_TLS, BLA8_NOP, BLA8_NOP_RM, BL_NOP, BL_NO...
5242 O << "\n\tnop";
5243 return;
5244 break;
5245 case 13:
5246 // BL_LWZinto_toc, BL_LWZinto_toc_RM
5247 O << "\n\tlwz 2, 20(1)";
5248 return;
5249 break;
5250 case 14:
5251 // DCBF
5252 printUImmOperand<3>(MI, OpNo: 0, STI, O);
5253 return;
5254 break;
5255 case 15:
5256 // DCBT, DCBTST
5257 printUImmOperand<5>(MI, OpNo: 0, STI, O);
5258 return;
5259 break;
5260 case 16:
5261 // EVSEL
5262 O << ',';
5263 printOperand(MI, OpNo: 1, STI, O);
5264 O << ',';
5265 printOperand(MI, OpNo: 2, STI, O);
5266 return;
5267 break;
5268 case 17:
5269 // MFTB8
5270 O << ", 268";
5271 return;
5272 break;
5273 case 18:
5274 // MFUDSCR
5275 O << ", 3";
5276 return;
5277 break;
5278 case 19:
5279 // MFVRSAVE, MFVRSAVEv
5280 O << ", 256";
5281 return;
5282 break;
5283 case 20:
5284 // MTFSFI, MTFSFI_rec, MTFSFIb
5285 printUImmOperand<4>(MI, OpNo: 1, STI, O);
5286 break;
5287 case 21:
5288 // SYNCP10
5289 printUImmOperand<2>(MI, OpNo: 1, STI, O);
5290 return;
5291 break;
5292 case 22:
5293 // TCRETURNai, TCRETURNai8, TCRETURNdi, TCRETURNdi8, TCRETURNri, TCRETURN...
5294 O << ' ';
5295 break;
5296 case 23:
5297 // V_SETALLONES, V_SETALLONESB, V_SETALLONESH
5298 O << ", -1";
5299 return;
5300 break;
5301 case 24:
5302 // gBCAat, gBCLAat
5303 printAbsBranchOperand(MI, OpNo: 3, STI, O);
5304 return;
5305 break;
5306 case 25:
5307 // gBCLat, gBCat
5308 printBranchOperand(MI, Address, OpNo: 3, STI, O);
5309 return;
5310 break;
5311 }
5312
5313
5314 // Fragment 2 encoded into 6 bits for 34 unique commands.
5315 switch ((Bits >> 25) & 63) {
5316 default: llvm_unreachable("Invalid command number.");
5317 case 0:
5318 // BUILD_UACC, CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CL...
5319 printOperand(MI, OpNo: 1, STI, O);
5320 break;
5321 case 1:
5322 // DCBTCT, DCBTDS, DCBTSTCT, DCBTSTDS, DMSHA3HASH, EVADDIW
5323 printUImmOperand<5>(MI, OpNo: 2, STI, O);
5324 break;
5325 case 2:
5326 // LAx, EVLDD, EVLDH, EVLDW, EVLHHESPLAT, EVLHHOSSPLAT, EVLHHOUSPLAT, EVL...
5327 printMemRegImm(MI, OpNo: 1, STI, O);
5328 return;
5329 break;
5330 case 3:
5331 // SUBPCIS, LI, LI8, LIS, LIS8
5332 printS16ImmOperand(MI, OpNo: 1, STI, O);
5333 return;
5334 break;
5335 case 4:
5336 // BC, BCL, BCLn, BCn
5337 printBranchOperand(MI, Address, OpNo: 1, STI, O);
5338 return;
5339 break;
5340 case 5:
5341 // CMPRB, CMPRB8, MTMSR, MTMSRD
5342 printUImmOperand<1>(MI, OpNo: 1, STI, O);
5343 break;
5344 case 6:
5345 // CRSET, CRUNSET, MTDCR, TLBIE, V_SET0, V_SET0B, V_SET0H, XXLEQVOnes, XX...
5346 printOperand(MI, OpNo: 0, STI, O);
5347 break;
5348 case 7:
5349 // DARN, MFFSCRNI, WAITP10
5350 printUImmOperand<2>(MI, OpNo: 1, STI, O);
5351 return;
5352 break;
5353 case 8:
5354 // DMSHA2HASH, DMXOR, DMXVBF16GERX2NN, DMXVBF16GERX2NP, DMXVBF16GERX2PN, ...
5355 printOperand(MI, OpNo: 2, STI, O);
5356 break;
5357 case 9:
5358 // DRINTN, DRINTNQ, DRINTNQ_rec, DRINTN_rec, DRINTX, DRINTXQ, DRINTXQ_rec...
5359 printUImmOperand<2>(MI, OpNo: 3, STI, O);
5360 return;
5361 break;
5362 case 10:
5363 // DTSTSFI, DTSTSFIQ
5364 printUImmOperand<6>(MI, OpNo: 1, STI, O);
5365 O << ", ";
5366 printOperand(MI, OpNo: 2, STI, O);
5367 return;
5368 break;
5369 case 11:
5370 // EVLDDX, EVLDHX, EVLDWX, EVLHHESPLATX, EVLHHOSSPLATX, EVLHHOUSPLATX, EV...
5371 printMemRegReg(MI, OpNo: 1, STI, O);
5372 break;
5373 case 12:
5374 // EVSPLATFI, EVSPLATI, VSPLTISB, VSPLTISH, VSPLTISW
5375 printSImmOperand<5>(MI, OpNo: 1, STI, O);
5376 return;
5377 break;
5378 case 13:
5379 // EVSUBIFW, LXVKQ
5380 printUImmOperand<5>(MI, OpNo: 1, STI, O);
5381 break;
5382 case 14:
5383 // HASHCHK, HASHCHK8, HASHCHKP, HASHCHKP8, HASHST, HASHST8, HASHSTP, HASH...
5384 printMemRegImmHash(MI, OpNo: 1, STI, O);
5385 return;
5386 break;
5387 case 15:
5388 // LA, LA8
5389 printS16ImmOperand(MI, OpNo: 2, STI, O);
5390 O << '(';
5391 printOperand(MI, OpNo: 1, STI, O);
5392 O << ')';
5393 return;
5394 break;
5395 case 16:
5396 // LBZU, LBZU8, LDU, LFDU, LFSU, LHAU, LHAU8, LHZU, LHZU8, LWZU, LWZU8, S...
5397 printMemRegImm(MI, OpNo: 2, STI, O);
5398 return;
5399 break;
5400 case 17:
5401 // LBZUX, LBZUX8, LDUX, LFDUX, LFSUX, LHAUX, LHAUX8, LHZUX, LHZUX8, LWAUX...
5402 printMemRegReg(MI, OpNo: 2, STI, O);
5403 return;
5404 break;
5405 case 18:
5406 // MFBHRBE
5407 printUImmOperand<10>(MI, OpNo: 1, STI, O);
5408 return;
5409 break;
5410 case 19:
5411 // MFFSCDRNI
5412 printUImmOperand<3>(MI, OpNo: 1, STI, O);
5413 return;
5414 break;
5415 case 20:
5416 // MFOCRF, MFOCRF8
5417 printcrbitm(MI, OpNo: 1, STI, O);
5418 return;
5419 break;
5420 case 21:
5421 // MFSR
5422 printUImmOperand<4>(MI, OpNo: 1, STI, O);
5423 return;
5424 break;
5425 case 22:
5426 // MTFSFI, MTFSFI_rec
5427 O << ", ";
5428 break;
5429 case 23:
5430 // MTFSFIb
5431 return;
5432 break;
5433 case 24:
5434 // MTVSRBMI
5435 printU16ImmOperand(MI, OpNo: 1, STI, O);
5436 return;
5437 break;
5438 case 25:
5439 // PADDI8pc, PADDIS8pc, PADDISpc, PADDIpc
5440 printImmZeroOperand(MI, OpNo: 1, STI, O);
5441 O << ", ";
5442 break;
5443 case 26:
5444 // PLA, PLA8
5445 printS34ImmOperand(MI, OpNo: 2, STI, O);
5446 O << ' ';
5447 printOperand(MI, OpNo: 1, STI, O);
5448 return;
5449 break;
5450 case 27:
5451 // PLA8pc, PLApc, PLBZ8onlypc, PLBZonlypc, PLDonlypc, PLFDonlypc, PLFSonl...
5452 printS34ImmOperand(MI, OpNo: 1, STI, O);
5453 return;
5454 break;
5455 case 28:
5456 // PLBZ, PLBZ8, PLBZ8nopc, PLBZnopc, PLD, PLDnopc, PLFD, PLFDnopc, PLFS, ...
5457 printMemRegImm34(MI, OpNo: 1, STI, O);
5458 break;
5459 case 29:
5460 // PLBZ8pc, PLBZpc, PLDpc, PLFDpc, PLFSpc, PLHA8pc, PLHApc, PLHZ8pc, PLHZ...
5461 printMemRegImm34PCRel(MI, OpNo: 1, STI, O);
5462 O << ", 1";
5463 return;
5464 break;
5465 case 30:
5466 // SUBFUS, SUBFUS_rec
5467 printUImmOperand<1>(MI, OpNo: 3, STI, O);
5468 O << ", ";
5469 printOperand(MI, OpNo: 1, STI, O);
5470 O << ", ";
5471 printOperand(MI, OpNo: 2, STI, O);
5472 return;
5473 break;
5474 case 31:
5475 // VINSD, VINSERTB, VINSERTH, VINSW
5476 printOperand(MI, OpNo: 3, STI, O);
5477 O << ", ";
5478 printUImmOperand<4>(MI, OpNo: 2, STI, O);
5479 return;
5480 break;
5481 case 32:
5482 // XXSPLTI32DX
5483 printUImmOperand<1>(MI, OpNo: 2, STI, O);
5484 O << ", ";
5485 printOperand(MI, OpNo: 3, STI, O);
5486 return;
5487 break;
5488 case 33:
5489 // XXSPLTIB
5490 printU8ImmOperandTrunc(MI, OpNo: 1, STI, O);
5491 return;
5492 break;
5493 }
5494
5495
5496 // Fragment 3 encoded into 4 bits for 9 unique commands.
5497 switch ((Bits >> 31) & 15) {
5498 default: llvm_unreachable("Invalid command number.");
5499 case 0:
5500 // BUILD_UACC, DCBTCT, DCBTDS, DCBTSTCT, DCBTSTDS, ADDME, ADDME8, ADDME8O...
5501 return;
5502 break;
5503 case 1:
5504 // CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CLRRDI_rec, CL...
5505 O << ", ";
5506 break;
5507 case 2:
5508 // LBARXL, LDARXL, LHARXL, LQARXL, LWARXL
5509 O << ", 1";
5510 return;
5511 break;
5512 case 3:
5513 // LDAT_CSNE, LWAT_CSNE
5514 O << ", 16";
5515 return;
5516 break;
5517 case 4:
5518 // MTFSFI
5519 printOperand(MI, OpNo: 2, STI, O);
5520 return;
5521 break;
5522 case 5:
5523 // MTFSFI_rec
5524 printUImmOperand<1>(MI, OpNo: 2, STI, O);
5525 return;
5526 break;
5527 case 6:
5528 // PADDI8pc, PADDIpc
5529 printS34ImmOperand(MI, OpNo: 2, STI, O);
5530 O << ", 1";
5531 return;
5532 break;
5533 case 7:
5534 // PADDIS8pc, PADDISpc
5535 printS32ImmOperand(MI, OpNo: 2, STI, O);
5536 O << ", 1";
5537 return;
5538 break;
5539 case 8:
5540 // PLBZ, PLBZ8, PLD, PLFD, PLFS, PLHA, PLHA8, PLHZ, PLHZ8, PLWA, PLWA8, P...
5541 O << ", 0";
5542 return;
5543 break;
5544 }
5545
5546
5547 // Fragment 4 encoded into 5 bits for 26 unique commands.
5548 switch ((Bits >> 35) & 31) {
5549 default: llvm_unreachable("Invalid command number.");
5550 case 0:
5551 // CLRLSLDI, CLRLSLDI_rec, CLRRDI, CLRRDI_rec, EXTLDI, EXTLDI_rec, EXTRDI...
5552 printUImmOperand<6>(MI, OpNo: 2, STI, O);
5553 break;
5554 case 1:
5555 // CLRLSLWI, CLRLSLWI_rec, CLRRWI, CLRRWI_rec, EXTLWI, EXTLWI_rec, EXTRWI...
5556 printUImmOperand<5>(MI, OpNo: 2, STI, O);
5557 break;
5558 case 2:
5559 // PSUBI, PADDI, PADDI8
5560 printS34ImmOperand(MI, OpNo: 2, STI, O);
5561 break;
5562 case 3:
5563 // SUBI, SUBIC, SUBIC_rec, SUBIS, ADDI, ADDI8, ADDIC, ADDIC8, ADDIC_rec, ...
5564 printS16ImmOperand(MI, OpNo: 2, STI, O);
5565 return;
5566 break;
5567 case 4:
5568 // ADD4, ADD4O, ADD4O_rec, ADD4TLS, ADD4_rec, ADD8, ADD8O, ADD8O_rec, ADD...
5569 printOperand(MI, OpNo: 2, STI, O);
5570 break;
5571 case 5:
5572 // ANDI8_rec, ANDIS8_rec, ANDIS_rec, ANDI_rec, CMPLDI, CMPLWI, ORI, ORI8,...
5573 printU16ImmOperand(MI, OpNo: 2, STI, O);
5574 return;
5575 break;
5576 case 6:
5577 // BCDCFN_rec, BCDCFSQ_rec, BCDCFZ_rec, BCDCTZ_rec, BCDSETSGN_rec, CP_PAS...
5578 printUImmOperand<1>(MI, OpNo: 2, STI, O);
5579 break;
5580 case 7:
5581 // CRSET, CRUNSET, V_SET0, V_SET0B, V_SET0H, XXLEQVOnes, XXLXORdpz, XXLXO...
5582 printOperand(MI, OpNo: 0, STI, O);
5583 return;
5584 break;
5585 case 8:
5586 // DMSHA2HASH
5587 printUImmOperand<1>(MI, OpNo: 3, STI, O);
5588 return;
5589 break;
5590 case 9:
5591 // DMXVBF16GERX2NN, DMXVBF16GERX2NP, DMXVBF16GERX2PN, DMXVBF16GERX2PP, DM...
5592 printOperand(MI, OpNo: 3, STI, O);
5593 break;
5594 case 10:
5595 // DMXXEXTFDMR256, DMXXINSTDMR256, TLBIE8P9, TLBIEIO, TLBIEP, TLBIEP8, TL...
5596 printUImmOperand<2>(MI, OpNo: 2, STI, O);
5597 break;
5598 case 11:
5599 // DMXXSHAPAD
5600 printUImmOperand<2>(MI, OpNo: 3, STI, O);
5601 O << ", ";
5602 printUImmOperand<1>(MI, OpNo: 4, STI, O);
5603 O << ", ";
5604 printUImmOperand<2>(MI, OpNo: 5, STI, O);
5605 return;
5606 break;
5607 case 12:
5608 // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64
5609 printUImmOperand<5>(MI, OpNo: 0, STI, O);
5610 return;
5611 break;
5612 case 13:
5613 // EVADDIW, XXPERMDIs, XXSLDWIs
5614 printOperand(MI, OpNo: 1, STI, O);
5615 break;
5616 case 14:
5617 // LDAT, LWAT, RLWIMI, RLWIMI8, RLWIMI8_rec, RLWIMI_rec
5618 printUImmOperand<5>(MI, OpNo: 3, STI, O);
5619 break;
5620 case 15:
5621 // PADDIS, PADDIS8
5622 printS32ImmOperand(MI, OpNo: 2, STI, O);
5623 O << ", 0";
5624 return;
5625 break;
5626 case 16:
5627 // RLDIMI, RLDIMI_rec
5628 printUImmOperand<6>(MI, OpNo: 3, STI, O);
5629 O << ", ";
5630 printUImmOperand<6>(MI, OpNo: 4, STI, O);
5631 return;
5632 break;
5633 case 17:
5634 // VCFSX, VCFUX, VCTSXS, VCTUXS, VSPLTB, VSPLTBs, VSPLTH, VSPLTHs, VSPLTW
5635 printUImmOperand<5>(MI, OpNo: 1, STI, O);
5636 return;
5637 break;
5638 case 18:
5639 // VEXTRACTD, VEXTRACTUB, VEXTRACTUH, VEXTRACTUW, VINSERTD, VINSERTW
5640 printUImmOperand<4>(MI, OpNo: 1, STI, O);
5641 return;
5642 break;
5643 case 19:
5644 // VGNB, VUPKINT4TOFP32
5645 printUImmOperand<3>(MI, OpNo: 2, STI, O);
5646 return;
5647 break;
5648 case 20:
5649 // XSTSTDCDP, XSTSTDCQP, XSTSTDCSP, XVTSTDCDP, XVTSTDCSP
5650 printUImmOperand<7>(MI, OpNo: 1, STI, O);
5651 return;
5652 break;
5653 case 21:
5654 // XXEXTRACTUW
5655 printUImmOperand<4>(MI, OpNo: 2, STI, O);
5656 return;
5657 break;
5658 case 22:
5659 // XXGENPCVBM, XXGENPCVDM, XXGENPCVHM, XXGENPCVWM
5660 printSImmOperand<5>(MI, OpNo: 2, STI, O);
5661 return;
5662 break;
5663 case 23:
5664 // XXINSERTW
5665 printUImmOperand<4>(MI, OpNo: 3, STI, O);
5666 return;
5667 break;
5668 case 24:
5669 // gBC, gBCL
5670 printBranchOperand(MI, Address, OpNo: 2, STI, O);
5671 return;
5672 break;
5673 case 25:
5674 // gBCA, gBCLA
5675 printAbsBranchOperand(MI, OpNo: 2, STI, O);
5676 return;
5677 break;
5678 }
5679
5680
5681 // Fragment 5 encoded into 2 bits for 4 unique commands.
5682 switch ((Bits >> 40) & 3) {
5683 default: llvm_unreachable("Invalid command number.");
5684 case 0:
5685 // CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, EXTLDI, EXTLDI_rec, EX...
5686 O << ", ";
5687 break;
5688 case 1:
5689 // CLRRDI, CLRRDI_rec, CLRRWI, CLRRWI_rec, PSUBI, ROTRDI, ROTRDI_rec, ROT...
5690 return;
5691 break;
5692 case 2:
5693 // DMXXEXTFDMR512, DMXXINSTDMR512, PADDI, PADDI8
5694 O << ", 0";
5695 return;
5696 break;
5697 case 3:
5698 // DMXXEXTFDMR512_HI, DMXXINSTDMR512_HI
5699 O << ", 1";
5700 return;
5701 break;
5702 }
5703
5704
5705 // Fragment 6 encoded into 4 bits for 12 unique commands.
5706 switch ((Bits >> 42) & 15) {
5707 default: llvm_unreachable("Invalid command number.");
5708 case 0:
5709 // CLRLSLDI, CLRLSLDI_rec, EXTLDI, EXTLDI_rec, EXTRDI, EXTRDI_rec, INSRDI...
5710 printUImmOperand<6>(MI, OpNo: 3, STI, O);
5711 return;
5712 break;
5713 case 1:
5714 // CLRLSLWI, CLRLSLWI_rec, EXTLWI, EXTLWI_rec, EXTRWI, EXTRWI_rec, INSLWI...
5715 printUImmOperand<5>(MI, OpNo: 3, STI, O);
5716 break;
5717 case 2:
5718 // RLWIMIbm, RLWIMIbm_rec, RLWINMbm, RLWINMbm_rec, RLWNMbm, RLWNMbm_rec, ...
5719 printOperand(MI, OpNo: 3, STI, O);
5720 break;
5721 case 3:
5722 // ADDEX, ADDEX8, DQUA, DQUAQ, DQUAQ_rec, DQUA_rec, DRRND, DRRNDQ, DRRNDQ...
5723 printUImmOperand<2>(MI, OpNo: 3, STI, O);
5724 return;
5725 break;
5726 case 4:
5727 // BCDADD_rec, BCDSR_rec, BCDSUB_rec, BCDS_rec, BCDTRUNC_rec, TLBIE8P9, T...
5728 printUImmOperand<1>(MI, OpNo: 3, STI, O);
5729 break;
5730 case 5:
5731 // PMDMXVBF16GERX2, PMDMXVF16GERX2, PMDMXVI8GERX4
5732 printUImmOperand<8>(MI, OpNo: 3, STI, O);
5733 O << ", ";
5734 printUImmOperand<4>(MI, OpNo: 4, STI, O);
5735 O << ", ";
5736 break;
5737 case 6:
5738 // PMDMXVBF16GERX2NN, PMDMXVBF16GERX2NP, PMDMXVBF16GERX2PN, PMDMXVBF16GER...
5739 printUImmOperand<8>(MI, OpNo: 4, STI, O);
5740 O << ", ";
5741 printUImmOperand<4>(MI, OpNo: 5, STI, O);
5742 O << ", ";
5743 break;
5744 case 7:
5745 // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVF32GER, PM...
5746 printUImmOperand<4>(MI, OpNo: 3, STI, O);
5747 break;
5748 case 8:
5749 // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF...
5750 printUImmOperand<4>(MI, OpNo: 4, STI, O);
5751 O << ", ";
5752 break;
5753 case 9:
5754 // RLWIMI, RLWIMI8, RLWIMI8_rec, RLWIMI_rec
5755 printUImmOperand<5>(MI, OpNo: 4, STI, O);
5756 O << ", ";
5757 printUImmOperand<5>(MI, OpNo: 5, STI, O);
5758 return;
5759 break;
5760 case 10:
5761 // VSLDBI, VSRDBI, XXMULMUL
5762 printUImmOperand<3>(MI, OpNo: 3, STI, O);
5763 return;
5764 break;
5765 case 11:
5766 // XXPERMDIs, XXSLDWIs
5767 printUImmOperand<2>(MI, OpNo: 2, STI, O);
5768 return;
5769 break;
5770 }
5771
5772
5773 // Fragment 7 encoded into 3 bits for 6 unique commands.
5774 switch ((Bits >> 46) & 7) {
5775 default: llvm_unreachable("Invalid command number.");
5776 case 0:
5777 // CLRLSLWI, CLRLSLWI_rec, EXTLWI, EXTLWI_rec, EXTRWI, EXTRWI_rec, INSLWI...
5778 return;
5779 break;
5780 case 1:
5781 // PMDMXVBF16GERX2, PMDMXVF16GERX2, PMXVF64GERNN, PMXVF64GERNP, PMXVF64GE...
5782 printUImmOperand<2>(MI, OpNo: 5, STI, O);
5783 return;
5784 break;
5785 case 2:
5786 // PMDMXVBF16GERX2NN, PMDMXVBF16GERX2NP, PMDMXVBF16GERX2PN, PMDMXVBF16GER...
5787 printUImmOperand<2>(MI, OpNo: 6, STI, O);
5788 return;
5789 break;
5790 case 3:
5791 // PMDMXVI8GERX4, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF1...
5792 printUImmOperand<4>(MI, OpNo: 5, STI, O);
5793 break;
5794 case 4:
5795 // PMDMXVI8GERX4PP, PMDMXVI8GERX4SPP
5796 printUImmOperand<4>(MI, OpNo: 6, STI, O);
5797 return;
5798 break;
5799 case 5:
5800 // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVF32GER, PM...
5801 O << ", ";
5802 break;
5803 }
5804
5805
5806 // Fragment 8 encoded into 3 bits for 8 unique commands.
5807 switch ((Bits >> 49) & 7) {
5808 default: llvm_unreachable("Invalid command number.");
5809 case 0:
5810 // PMDMXVI8GERX4, PMXVF32GERNN, PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP,...
5811 return;
5812 break;
5813 case 1:
5814 // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVF32GER, PM...
5815 printUImmOperand<4>(MI, OpNo: 4, STI, O);
5816 break;
5817 case 2:
5818 // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF...
5819 O << ", ";
5820 break;
5821 case 3:
5822 // PMXVF64GER, PMXVF64GERW
5823 printUImmOperand<2>(MI, OpNo: 4, STI, O);
5824 return;
5825 break;
5826 case 4:
5827 // RLWINM, RLWINM8, RLWINM8_rec, RLWINM_rec, RLWNM, RLWNM8, RLWNM8_rec, R...
5828 printUImmOperand<5>(MI, OpNo: 4, STI, O);
5829 return;
5830 break;
5831 case 5:
5832 // TLBIE8P9, TLBIEP, TLBIEP8, TLBIEP9, XXMULMULHIADD, XXMULMULLOADD, XXSS...
5833 printUImmOperand<1>(MI, OpNo: 4, STI, O);
5834 break;
5835 case 6:
5836 // XXEVAL
5837 printUImmOperand<8>(MI, OpNo: 4, STI, O);
5838 return;
5839 break;
5840 case 7:
5841 // XXPERMX
5842 printUImmOperand<3>(MI, OpNo: 4, STI, O);
5843 return;
5844 break;
5845 }
5846
5847
5848 // Fragment 9 encoded into 3 bits for 5 unique commands.
5849 switch ((Bits >> 52) & 7) {
5850 default: llvm_unreachable("Invalid command number.");
5851 case 0:
5852 // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVI16GER2, P...
5853 O << ", ";
5854 break;
5855 case 1:
5856 // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF...
5857 printUImmOperand<2>(MI, OpNo: 6, STI, O);
5858 return;
5859 break;
5860 case 2:
5861 // PMXVF32GER, PMXVF32GERW, TLBIE8P9, TLBIEP, TLBIEP8, TLBIEP9, XXMULMULL...
5862 return;
5863 break;
5864 case 3:
5865 // PMXVI4GER8PP, PMXVI4GER8WPP
5866 printUImmOperand<8>(MI, OpNo: 6, STI, O);
5867 return;
5868 break;
5869 case 4:
5870 // PMXVI8GER4PP, PMXVI8GER4SPP, PMXVI8GER4WPP, PMXVI8GER4WSPP
5871 printUImmOperand<4>(MI, OpNo: 6, STI, O);
5872 return;
5873 break;
5874 }
5875
5876
5877 // Fragment 10 encoded into 2 bits for 4 unique commands.
5878 switch ((Bits >> 55) & 3) {
5879 default: llvm_unreachable("Invalid command number.");
5880 case 0:
5881 // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVI16GER2, P...
5882 printUImmOperand<2>(MI, OpNo: 5, STI, O);
5883 return;
5884 break;
5885 case 1:
5886 // PMXVI4GER8, PMXVI4GER8W
5887 printUImmOperand<8>(MI, OpNo: 5, STI, O);
5888 return;
5889 break;
5890 case 2:
5891 // PMXVI8GER4, PMXVI8GER4W
5892 printUImmOperand<4>(MI, OpNo: 5, STI, O);
5893 return;
5894 break;
5895 case 3:
5896 // XXMULMULHIADD
5897 printUImmOperand<1>(MI, OpNo: 5, STI, O);
5898 return;
5899 break;
5900 }
5901
5902}
5903
5904
5905/// getRegisterName - This method is automatically generated by tblgen
5906/// from the register set description. This returns the assembler name
5907/// for the specified register.
5908const char *PPCInstPrinter::getRegisterName(MCRegister Reg) {
5909 unsigned RegNo = Reg.id();
5910 assert(RegNo && RegNo < 612 && "Invalid register number!");
5911
5912
5913#ifdef __GNUC__
5914#pragma GCC diagnostic push
5915#pragma GCC diagnostic ignored "-Woverlength-strings"
5916#endif
5917 static const char AsmStrs[] = {
5918 /* 0 */ "**ROUNDING MODE**\000"
5919 /* 18 */ "**FRAME POINTER**\000"
5920 /* 36 */ "**BASE POINTER**\000"
5921 /* 53 */ "VFH10\000"
5922 /* 59 */ "f10\000"
5923 /* 63 */ "fp10\000"
5924 /* 68 */ "vsp10\000"
5925 /* 74 */ "dmrrowp10\000"
5926 /* 84 */ "r10\000"
5927 /* 88 */ "vs10\000"
5928 /* 93 */ "v10\000"
5929 /* 97 */ "dmrrow10\000"
5930 /* 106 */ "VFH20\000"
5931 /* 112 */ "f20\000"
5932 /* 116 */ "fp20\000"
5933 /* 121 */ "vsp20\000"
5934 /* 127 */ "dmrrowp20\000"
5935 /* 137 */ "r20\000"
5936 /* 141 */ "vs20\000"
5937 /* 146 */ "v20\000"
5938 /* 150 */ "dmrrow20\000"
5939 /* 159 */ "VFH30\000"
5940 /* 165 */ "f30\000"
5941 /* 169 */ "fp30\000"
5942 /* 174 */ "vsp30\000"
5943 /* 180 */ "dmrrowp30\000"
5944 /* 190 */ "r30\000"
5945 /* 194 */ "vs30\000"
5946 /* 199 */ "v30\000"
5947 /* 203 */ "dmrrow30\000"
5948 /* 212 */ "vsp40\000"
5949 /* 218 */ "vs40\000"
5950 /* 223 */ "dmrrow40\000"
5951 /* 232 */ "vsp50\000"
5952 /* 238 */ "vs50\000"
5953 /* 243 */ "dmrrow50\000"
5954 /* 252 */ "vsp60\000"
5955 /* 258 */ "vs60\000"
5956 /* 263 */ "dmrrow60\000"
5957 /* 272 */ "VFH0\000"
5958 /* 277 */ "wacc0\000"
5959 /* 283 */ "f0\000"
5960 /* 286 */ "wacc_hi0\000"
5961 /* 295 */ "fp0\000"
5962 /* 299 */ "dmrp0\000"
5963 /* 305 */ "vsp0\000"
5964 /* 310 */ "dmrrowp0\000"
5965 /* 319 */ "cr0\000"
5966 /* 323 */ "dmr0\000"
5967 /* 328 */ "vs0\000"
5968 /* 332 */ "v0\000"
5969 /* 335 */ "dmrrow0\000"
5970 /* 343 */ "VFH11\000"
5971 /* 349 */ "f11\000"
5972 /* 353 */ "dmrrowp11\000"
5973 /* 363 */ "r11\000"
5974 /* 367 */ "vs11\000"
5975 /* 372 */ "v11\000"
5976 /* 376 */ "dmrrow11\000"
5977 /* 385 */ "VFH21\000"
5978 /* 391 */ "f21\000"
5979 /* 395 */ "dmrrowp21\000"
5980 /* 405 */ "r21\000"
5981 /* 409 */ "vs21\000"
5982 /* 414 */ "v21\000"
5983 /* 418 */ "dmrrow21\000"
5984 /* 427 */ "VFH31\000"
5985 /* 433 */ "f31\000"
5986 /* 437 */ "dmrrowp31\000"
5987 /* 447 */ "r31\000"
5988 /* 451 */ "vs31\000"
5989 /* 456 */ "v31\000"
5990 /* 460 */ "dmrrow31\000"
5991 /* 469 */ "vs41\000"
5992 /* 474 */ "dmrrow41\000"
5993 /* 483 */ "vs51\000"
5994 /* 488 */ "dmrrow51\000"
5995 /* 497 */ "vs61\000"
5996 /* 502 */ "dmrrow61\000"
5997 /* 511 */ "VFH1\000"
5998 /* 516 */ "wacc1\000"
5999 /* 522 */ "f1\000"
6000 /* 525 */ "wacc_hi1\000"
6001 /* 534 */ "dmrp1\000"
6002 /* 540 */ "dmrrowp1\000"
6003 /* 549 */ "cr1\000"
6004 /* 553 */ "dmr1\000"
6005 /* 558 */ "vs1\000"
6006 /* 562 */ "v1\000"
6007 /* 565 */ "dmrrow1\000"
6008 /* 573 */ "VFH12\000"
6009 /* 579 */ "f12\000"
6010 /* 583 */ "fp12\000"
6011 /* 588 */ "vsp12\000"
6012 /* 594 */ "dmrrowp12\000"
6013 /* 604 */ "r12\000"
6014 /* 608 */ "vs12\000"
6015 /* 613 */ "v12\000"
6016 /* 617 */ "dmrrow12\000"
6017 /* 626 */ "VFH22\000"
6018 /* 632 */ "f22\000"
6019 /* 636 */ "fp22\000"
6020 /* 641 */ "vsp22\000"
6021 /* 647 */ "dmrrowp22\000"
6022 /* 657 */ "r22\000"
6023 /* 661 */ "vs22\000"
6024 /* 666 */ "v22\000"
6025 /* 670 */ "dmrrow22\000"
6026 /* 679 */ "vsp32\000"
6027 /* 685 */ "vs32\000"
6028 /* 690 */ "dmrrow32\000"
6029 /* 699 */ "vsp42\000"
6030 /* 705 */ "vs42\000"
6031 /* 710 */ "dmrrow42\000"
6032 /* 719 */ "vsp52\000"
6033 /* 725 */ "vs52\000"
6034 /* 730 */ "dmrrow52\000"
6035 /* 739 */ "vsp62\000"
6036 /* 745 */ "vs62\000"
6037 /* 750 */ "dmrrow62\000"
6038 /* 759 */ "VFH2\000"
6039 /* 764 */ "wacc2\000"
6040 /* 770 */ "f2\000"
6041 /* 773 */ "wacc_hi2\000"
6042 /* 782 */ "fp2\000"
6043 /* 786 */ "dmrp2\000"
6044 /* 792 */ "vsp2\000"
6045 /* 797 */ "dmrrowp2\000"
6046 /* 806 */ "cr2\000"
6047 /* 810 */ "dmr2\000"
6048 /* 815 */ "vs2\000"
6049 /* 819 */ "v2\000"
6050 /* 822 */ "dmrrow2\000"
6051 /* 830 */ "VFH13\000"
6052 /* 836 */ "f13\000"
6053 /* 840 */ "dmrrowp13\000"
6054 /* 850 */ "r13\000"
6055 /* 854 */ "vs13\000"
6056 /* 859 */ "v13\000"
6057 /* 863 */ "dmrrow13\000"
6058 /* 872 */ "VFH23\000"
6059 /* 878 */ "f23\000"
6060 /* 882 */ "dmrrowp23\000"
6061 /* 892 */ "r23\000"
6062 /* 896 */ "vs23\000"
6063 /* 901 */ "v23\000"
6064 /* 905 */ "dmrrow23\000"
6065 /* 914 */ "vs33\000"
6066 /* 919 */ "dmrrow33\000"
6067 /* 928 */ "vs43\000"
6068 /* 933 */ "dmrrow43\000"
6069 /* 942 */ "vs53\000"
6070 /* 947 */ "dmrrow53\000"
6071 /* 956 */ "vs63\000"
6072 /* 961 */ "dmrrow63\000"
6073 /* 970 */ "VFH3\000"
6074 /* 975 */ "wacc3\000"
6075 /* 981 */ "f3\000"
6076 /* 984 */ "wacc_hi3\000"
6077 /* 993 */ "dmrp3\000"
6078 /* 999 */ "dmrrowp3\000"
6079 /* 1008 */ "cr3\000"
6080 /* 1012 */ "dmr3\000"
6081 /* 1017 */ "vs3\000"
6082 /* 1021 */ "v3\000"
6083 /* 1024 */ "dmrrow3\000"
6084 /* 1032 */ "VFH14\000"
6085 /* 1038 */ "f14\000"
6086 /* 1042 */ "fp14\000"
6087 /* 1047 */ "vsp14\000"
6088 /* 1053 */ "dmrrowp14\000"
6089 /* 1063 */ "r14\000"
6090 /* 1067 */ "vs14\000"
6091 /* 1072 */ "v14\000"
6092 /* 1076 */ "dmrrow14\000"
6093 /* 1085 */ "VFH24\000"
6094 /* 1091 */ "f24\000"
6095 /* 1095 */ "fp24\000"
6096 /* 1100 */ "vsp24\000"
6097 /* 1106 */ "dmrrowp24\000"
6098 /* 1116 */ "r24\000"
6099 /* 1120 */ "vs24\000"
6100 /* 1125 */ "v24\000"
6101 /* 1129 */ "dmrrow24\000"
6102 /* 1138 */ "vsp34\000"
6103 /* 1144 */ "vs34\000"
6104 /* 1149 */ "dmrrow34\000"
6105 /* 1158 */ "vsp44\000"
6106 /* 1164 */ "vs44\000"
6107 /* 1169 */ "dmrrow44\000"
6108 /* 1178 */ "vsp54\000"
6109 /* 1184 */ "vs54\000"
6110 /* 1189 */ "dmrrow54\000"
6111 /* 1198 */ "VFH4\000"
6112 /* 1203 */ "wacc4\000"
6113 /* 1209 */ "f4\000"
6114 /* 1212 */ "wacc_hi4\000"
6115 /* 1221 */ "fp4\000"
6116 /* 1225 */ "vsp4\000"
6117 /* 1230 */ "dmrrowp4\000"
6118 /* 1239 */ "cr4\000"
6119 /* 1243 */ "dmr4\000"
6120 /* 1248 */ "vs4\000"
6121 /* 1252 */ "v4\000"
6122 /* 1255 */ "dmrrow4\000"
6123 /* 1263 */ "VFH15\000"
6124 /* 1269 */ "f15\000"
6125 /* 1273 */ "dmrrowp15\000"
6126 /* 1283 */ "r15\000"
6127 /* 1287 */ "vs15\000"
6128 /* 1292 */ "v15\000"
6129 /* 1296 */ "dmrrow15\000"
6130 /* 1305 */ "VFH25\000"
6131 /* 1311 */ "f25\000"
6132 /* 1315 */ "dmrrowp25\000"
6133 /* 1325 */ "r25\000"
6134 /* 1329 */ "vs25\000"
6135 /* 1334 */ "v25\000"
6136 /* 1338 */ "dmrrow25\000"
6137 /* 1347 */ "vs35\000"
6138 /* 1352 */ "dmrrow35\000"
6139 /* 1361 */ "vs45\000"
6140 /* 1366 */ "dmrrow45\000"
6141 /* 1375 */ "vs55\000"
6142 /* 1380 */ "dmrrow55\000"
6143 /* 1389 */ "VFH5\000"
6144 /* 1394 */ "wacc5\000"
6145 /* 1400 */ "f5\000"
6146 /* 1403 */ "wacc_hi5\000"
6147 /* 1412 */ "dmrrowp5\000"
6148 /* 1421 */ "cr5\000"
6149 /* 1425 */ "dmr5\000"
6150 /* 1430 */ "vs5\000"
6151 /* 1434 */ "v5\000"
6152 /* 1437 */ "dmrrow5\000"
6153 /* 1445 */ "VFH16\000"
6154 /* 1451 */ "f16\000"
6155 /* 1455 */ "fp16\000"
6156 /* 1460 */ "vsp16\000"
6157 /* 1466 */ "dmrrowp16\000"
6158 /* 1476 */ "r16\000"
6159 /* 1480 */ "vs16\000"
6160 /* 1485 */ "v16\000"
6161 /* 1489 */ "dmrrow16\000"
6162 /* 1498 */ "VFH26\000"
6163 /* 1504 */ "f26\000"
6164 /* 1508 */ "fp26\000"
6165 /* 1513 */ "vsp26\000"
6166 /* 1519 */ "dmrrowp26\000"
6167 /* 1529 */ "r26\000"
6168 /* 1533 */ "vs26\000"
6169 /* 1538 */ "v26\000"
6170 /* 1542 */ "dmrrow26\000"
6171 /* 1551 */ "vsp36\000"
6172 /* 1557 */ "vs36\000"
6173 /* 1562 */ "dmrrow36\000"
6174 /* 1571 */ "vsp46\000"
6175 /* 1577 */ "vs46\000"
6176 /* 1582 */ "dmrrow46\000"
6177 /* 1591 */ "vsp56\000"
6178 /* 1597 */ "vs56\000"
6179 /* 1602 */ "dmrrow56\000"
6180 /* 1611 */ "VFH6\000"
6181 /* 1616 */ "wacc6\000"
6182 /* 1622 */ "f6\000"
6183 /* 1625 */ "wacc_hi6\000"
6184 /* 1634 */ "fp6\000"
6185 /* 1638 */ "vsp6\000"
6186 /* 1643 */ "dmrrowp6\000"
6187 /* 1652 */ "cr6\000"
6188 /* 1656 */ "dmr6\000"
6189 /* 1661 */ "vs6\000"
6190 /* 1665 */ "v6\000"
6191 /* 1668 */ "dmrrow6\000"
6192 /* 1676 */ "VFH17\000"
6193 /* 1682 */ "f17\000"
6194 /* 1686 */ "dmrrowp17\000"
6195 /* 1696 */ "r17\000"
6196 /* 1700 */ "vs17\000"
6197 /* 1705 */ "v17\000"
6198 /* 1709 */ "dmrrow17\000"
6199 /* 1718 */ "VFH27\000"
6200 /* 1724 */ "f27\000"
6201 /* 1728 */ "dmrrowp27\000"
6202 /* 1738 */ "r27\000"
6203 /* 1742 */ "vs27\000"
6204 /* 1747 */ "v27\000"
6205 /* 1751 */ "dmrrow27\000"
6206 /* 1760 */ "vs37\000"
6207 /* 1765 */ "dmrrow37\000"
6208 /* 1774 */ "vs47\000"
6209 /* 1779 */ "dmrrow47\000"
6210 /* 1788 */ "vs57\000"
6211 /* 1793 */ "dmrrow57\000"
6212 /* 1802 */ "VFH7\000"
6213 /* 1807 */ "wacc7\000"
6214 /* 1813 */ "f7\000"
6215 /* 1816 */ "wacc_hi7\000"
6216 /* 1825 */ "dmrrowp7\000"
6217 /* 1834 */ "cr7\000"
6218 /* 1838 */ "dmr7\000"
6219 /* 1843 */ "vs7\000"
6220 /* 1847 */ "v7\000"
6221 /* 1850 */ "dmrrow7\000"
6222 /* 1858 */ "VFH18\000"
6223 /* 1864 */ "f18\000"
6224 /* 1868 */ "fp18\000"
6225 /* 1873 */ "vsp18\000"
6226 /* 1879 */ "dmrrowp18\000"
6227 /* 1889 */ "r18\000"
6228 /* 1893 */ "vs18\000"
6229 /* 1898 */ "v18\000"
6230 /* 1902 */ "dmrrow18\000"
6231 /* 1911 */ "VFH28\000"
6232 /* 1917 */ "f28\000"
6233 /* 1921 */ "fp28\000"
6234 /* 1926 */ "vsp28\000"
6235 /* 1932 */ "dmrrowp28\000"
6236 /* 1942 */ "r28\000"
6237 /* 1946 */ "vs28\000"
6238 /* 1951 */ "v28\000"
6239 /* 1955 */ "dmrrow28\000"
6240 /* 1964 */ "vsp38\000"
6241 /* 1970 */ "vs38\000"
6242 /* 1975 */ "dmrrow38\000"
6243 /* 1984 */ "vsp48\000"
6244 /* 1990 */ "vs48\000"
6245 /* 1995 */ "dmrrow48\000"
6246 /* 2004 */ "vsp58\000"
6247 /* 2010 */ "vs58\000"
6248 /* 2015 */ "dmrrow58\000"
6249 /* 2024 */ "VFH8\000"
6250 /* 2029 */ "f8\000"
6251 /* 2032 */ "fp8\000"
6252 /* 2036 */ "vsp8\000"
6253 /* 2041 */ "dmrrowp8\000"
6254 /* 2050 */ "r8\000"
6255 /* 2053 */ "vs8\000"
6256 /* 2057 */ "v8\000"
6257 /* 2060 */ "dmrrow8\000"
6258 /* 2068 */ "VFH19\000"
6259 /* 2074 */ "f19\000"
6260 /* 2078 */ "dmrrowp19\000"
6261 /* 2088 */ "r19\000"
6262 /* 2092 */ "vs19\000"
6263 /* 2097 */ "v19\000"
6264 /* 2101 */ "dmrrow19\000"
6265 /* 2110 */ "VFH29\000"
6266 /* 2116 */ "f29\000"
6267 /* 2120 */ "dmrrowp29\000"
6268 /* 2130 */ "r29\000"
6269 /* 2134 */ "vs29\000"
6270 /* 2139 */ "v29\000"
6271 /* 2143 */ "dmrrow29\000"
6272 /* 2152 */ "vs39\000"
6273 /* 2157 */ "dmrrow39\000"
6274 /* 2166 */ "vs49\000"
6275 /* 2171 */ "dmrrow49\000"
6276 /* 2180 */ "vs59\000"
6277 /* 2185 */ "dmrrow59\000"
6278 /* 2194 */ "VFH9\000"
6279 /* 2199 */ "f9\000"
6280 /* 2202 */ "dmrrowp9\000"
6281 /* 2211 */ "r9\000"
6282 /* 2214 */ "vs9\000"
6283 /* 2218 */ "v9\000"
6284 /* 2221 */ "dmrrow9\000"
6285 /* 2229 */ "vrsave\000"
6286 /* 2236 */ "spefscr\000"
6287 /* 2244 */ "xer\000"
6288 /* 2248 */ "lr\000"
6289 /* 2251 */ "ctr\000"
6290};
6291#ifdef __GNUC__
6292#pragma GCC diagnostic pop
6293#endif
6294
6295 static const uint16_t RegAsmOffset[] = {
6296 36, 2244, 2251, 18, 2248, 0, 2236, 2229, 2244, 57, 278, 517, 765, 976,
6297 1204, 1395, 1617, 1808, 36, 319, 549, 806, 1008, 1239, 1421, 1652, 1834, 2251,
6298 323, 553, 810, 1012, 1243, 1425, 1656, 1838, 335, 565, 822, 1024, 1255, 1437,
6299 1668, 1850, 2060, 2221, 97, 376, 617, 863, 1076, 1296, 1489, 1709, 1902, 2101,
6300 150, 418, 670, 905, 1129, 1338, 1542, 1751, 1955, 2143, 203, 460, 690, 919,
6301 1149, 1352, 1562, 1765, 1975, 2157, 223, 474, 710, 933, 1169, 1366, 1582, 1779,
6302 1995, 2171, 243, 488, 730, 947, 1189, 1380, 1602, 1793, 2015, 2185, 263, 502,
6303 750, 961, 310, 540, 797, 999, 1230, 1412, 1643, 1825, 2041, 2202, 74, 353,
6304 594, 840, 1053, 1273, 1466, 1686, 1879, 2078, 127, 395, 647, 882, 1106, 1315,
6305 1519, 1728, 1932, 2120, 180, 437, 299, 534, 786, 993, 283, 522, 770, 981,
6306 1209, 1400, 1622, 1813, 2029, 2199, 59, 349, 579, 836, 1038, 1269, 1451, 1682,
6307 1864, 2074, 112, 391, 632, 878, 1091, 1311, 1504, 1724, 1917, 2116, 165, 433,
6308 273, 512, 760, 971, 1199, 1390, 1612, 1803, 2025, 2195, 54, 344, 574, 831,
6309 1033, 1264, 1446, 1677, 1859, 2069, 107, 386, 627, 873, 1086, 1306, 1499, 1719,
6310 1912, 2111, 160, 428, 18, 295, 782, 1221, 1634, 2032, 63, 583, 1042, 1455,
6311 1868, 116, 636, 1095, 1508, 1921, 169, 274, 513, 761, 972, 1200, 1391, 1613,
6312 1804, 2026, 2196, 55, 345, 575, 832, 1034, 1265, 1447, 1678, 1860, 2070, 108,
6313 387, 628, 874, 1087, 1307, 1500, 1720, 1913, 2112, 161, 429, 2248, 320, 550,
6314 807, 1009, 1240, 1422, 1653, 1835, 2050, 2211, 84, 363, 604, 850, 1063, 1283,
6315 1476, 1696, 1889, 2088, 137, 405, 657, 892, 1116, 1325, 1529, 1738, 1942, 2130,
6316 190, 447, 320, 550, 807, 1009, 1240, 1422, 1653, 1835, 2050, 2211, 84, 363,
6317 604, 850, 1063, 1283, 1476, 1696, 1889, 2088, 137, 405, 657, 892, 1116, 1325,
6318 1529, 1738, 1942, 2130, 190, 447, 278, 517, 765, 976, 1204, 1395, 1617, 1808,
6319 332, 562, 819, 1021, 1252, 1434, 1665, 1847, 2057, 2218, 93, 372, 613, 859,
6320 1072, 1292, 1485, 1705, 1898, 2097, 146, 414, 666, 901, 1125, 1334, 1538, 1747,
6321 1951, 2139, 199, 456, 332, 562, 819, 1021, 1252, 1434, 1665, 1847, 2057, 2218,
6322 93, 372, 613, 859, 1072, 1292, 1485, 1705, 1898, 2097, 146, 414, 666, 901,
6323 1125, 1334, 1538, 1747, 1951, 2139, 199, 456, 272, 511, 759, 970, 1198, 1389,
6324 1611, 1802, 2024, 2194, 53, 343, 573, 830, 1032, 1263, 1445, 1676, 1858, 2068,
6325 106, 385, 626, 872, 1085, 1305, 1498, 1718, 1911, 2110, 159, 427, 328, 558,
6326 815, 1017, 1248, 1430, 1661, 1843, 2053, 2214, 88, 367, 608, 854, 1067, 1287,
6327 1480, 1700, 1893, 2092, 141, 409, 661, 896, 1120, 1329, 1533, 1742, 1946, 2134,
6328 194, 451, 305, 792, 1225, 1638, 2036, 68, 588, 1047, 1460, 1873, 121, 641,
6329 1100, 1513, 1926, 174, 679, 1138, 1551, 1964, 212, 699, 1158, 1571, 1984, 232,
6330 719, 1178, 1591, 2004, 252, 739, 685, 914, 1144, 1347, 1557, 1760, 1970, 2152,
6331 218, 469, 705, 928, 1164, 1361, 1577, 1774, 1990, 2166, 238, 483, 725, 942,
6332 1184, 1375, 1597, 1788, 2010, 2180, 258, 497, 745, 956, 277, 516, 764, 975,
6333 1203, 1394, 1616, 1807, 286, 525, 773, 984, 1212, 1403, 1625, 1816, 320, 550,
6334 807, 1009, 1240, 1422, 1653, 1835, 2050, 2211, 84, 363, 604, 850, 1063, 1283,
6335 1476, 1696, 1889, 2088, 137, 405, 657, 892, 1116, 1325, 1529, 1738, 1942, 2130,
6336 190, 447, 57, 577, 1449, 56, 1035, 1861, 629, 1501, 162, 347, 1267, 2072,
6337 833, 1679, 388, 1308, 2113, 57, 1036, 1862, 576, 1448, 109, 1088, 1914, 834,
6338 1680, 346, 1266, 2071, 875, 1721, 430, 320, 807, 1240, 1653, 2050, 84, 604,
6339 1063, 1476, 1889, 137, 657, 1116, 1529, 1942, 190,
6340 };
6341
6342 assert (*(AsmStrs+RegAsmOffset[RegNo-1]) &&
6343 "Invalid alt name index for register!");
6344 return AsmStrs+RegAsmOffset[RegNo-1];
6345}
6346
6347#ifdef PRINT_ALIAS_INSTR
6348#undef PRINT_ALIAS_INSTR
6349
6350bool PPCInstPrinter::printAliasInstr(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &OS) {
6351 static const PatternsForOpcode OpToPatterns[] = {
6352 {.Opcode: PPC::ADDI, .PatternStart: 0, .NumPatterns: 1 },
6353 {.Opcode: PPC::ADDI8, .PatternStart: 1, .NumPatterns: 1 },
6354 {.Opcode: PPC::ADDIS, .PatternStart: 2, .NumPatterns: 1 },
6355 {.Opcode: PPC::ADDIS8, .PatternStart: 3, .NumPatterns: 1 },
6356 {.Opcode: PPC::ADDPCIS, .PatternStart: 4, .NumPatterns: 1 },
6357 {.Opcode: PPC::BCC, .PatternStart: 5, .NumPatterns: 24 },
6358 {.Opcode: PPC::BCCA, .PatternStart: 29, .NumPatterns: 24 },
6359 {.Opcode: PPC::BCCCTR, .PatternStart: 53, .NumPatterns: 24 },
6360 {.Opcode: PPC::BCCCTRL, .PatternStart: 77, .NumPatterns: 24 },
6361 {.Opcode: PPC::BCCL, .PatternStart: 101, .NumPatterns: 24 },
6362 {.Opcode: PPC::BCCLA, .PatternStart: 125, .NumPatterns: 24 },
6363 {.Opcode: PPC::BCCLR, .PatternStart: 149, .NumPatterns: 24 },
6364 {.Opcode: PPC::BCCLRL, .PatternStart: 173, .NumPatterns: 24 },
6365 {.Opcode: PPC::CMPD, .PatternStart: 197, .NumPatterns: 1 },
6366 {.Opcode: PPC::CMPDI, .PatternStart: 198, .NumPatterns: 1 },
6367 {.Opcode: PPC::CMPLD, .PatternStart: 199, .NumPatterns: 1 },
6368 {.Opcode: PPC::CMPLDI, .PatternStart: 200, .NumPatterns: 1 },
6369 {.Opcode: PPC::CMPLW, .PatternStart: 201, .NumPatterns: 1 },
6370 {.Opcode: PPC::CMPLWI, .PatternStart: 202, .NumPatterns: 1 },
6371 {.Opcode: PPC::CMPW, .PatternStart: 203, .NumPatterns: 1 },
6372 {.Opcode: PPC::CMPWI, .PatternStart: 204, .NumPatterns: 1 },
6373 {.Opcode: PPC::CNTLZW, .PatternStart: 205, .NumPatterns: 1 },
6374 {.Opcode: PPC::CNTLZW8, .PatternStart: 206, .NumPatterns: 1 },
6375 {.Opcode: PPC::CNTLZW8_rec, .PatternStart: 207, .NumPatterns: 1 },
6376 {.Opcode: PPC::CNTLZW_rec, .PatternStart: 208, .NumPatterns: 1 },
6377 {.Opcode: PPC::CP_PASTE_rec, .PatternStart: 209, .NumPatterns: 1 },
6378 {.Opcode: PPC::CREQV, .PatternStart: 210, .NumPatterns: 1 },
6379 {.Opcode: PPC::CRNOR, .PatternStart: 211, .NumPatterns: 1 },
6380 {.Opcode: PPC::CROR, .PatternStart: 212, .NumPatterns: 1 },
6381 {.Opcode: PPC::CRXOR, .PatternStart: 213, .NumPatterns: 1 },
6382 {.Opcode: PPC::DMSHA2HASH, .PatternStart: 214, .NumPatterns: 2 },
6383 {.Opcode: PPC::DMSHA3HASH, .PatternStart: 216, .NumPatterns: 2 },
6384 {.Opcode: PPC::DMXXSHAPAD, .PatternStart: 218, .NumPatterns: 8 },
6385 {.Opcode: PPC::ISEL, .PatternStart: 226, .NumPatterns: 3 },
6386 {.Opcode: PPC::ISEL8, .PatternStart: 229, .NumPatterns: 3 },
6387 {.Opcode: PPC::MBAR, .PatternStart: 232, .NumPatterns: 1 },
6388 {.Opcode: PPC::MFDCR, .PatternStart: 233, .NumPatterns: 8 },
6389 {.Opcode: PPC::MFSPR, .PatternStart: 241, .NumPatterns: 45 },
6390 {.Opcode: PPC::MFSPR8, .PatternStart: 286, .NumPatterns: 19 },
6391 {.Opcode: PPC::MFTB, .PatternStart: 305, .NumPatterns: 1 },
6392 {.Opcode: PPC::MFUDSCR, .PatternStart: 306, .NumPatterns: 1 },
6393 {.Opcode: PPC::MFVRSAVE, .PatternStart: 307, .NumPatterns: 1 },
6394 {.Opcode: PPC::MFVSRD, .PatternStart: 308, .NumPatterns: 1 },
6395 {.Opcode: PPC::MFVSRWZ, .PatternStart: 309, .NumPatterns: 1 },
6396 {.Opcode: PPC::MTCRF, .PatternStart: 310, .NumPatterns: 1 },
6397 {.Opcode: PPC::MTCRF8, .PatternStart: 311, .NumPatterns: 1 },
6398 {.Opcode: PPC::MTDCR, .PatternStart: 312, .NumPatterns: 8 },
6399 {.Opcode: PPC::MTFSF, .PatternStart: 320, .NumPatterns: 1 },
6400 {.Opcode: PPC::MTFSFI, .PatternStart: 321, .NumPatterns: 1 },
6401 {.Opcode: PPC::MTFSFI_rec, .PatternStart: 322, .NumPatterns: 1 },
6402 {.Opcode: PPC::MTFSF_rec, .PatternStart: 323, .NumPatterns: 1 },
6403 {.Opcode: PPC::MTMSR, .PatternStart: 324, .NumPatterns: 1 },
6404 {.Opcode: PPC::MTMSRD, .PatternStart: 325, .NumPatterns: 1 },
6405 {.Opcode: PPC::MTSPR, .PatternStart: 326, .NumPatterns: 44 },
6406 {.Opcode: PPC::MTSPR8, .PatternStart: 370, .NumPatterns: 18 },
6407 {.Opcode: PPC::MTUDSCR, .PatternStart: 388, .NumPatterns: 1 },
6408 {.Opcode: PPC::MTVRSAVE, .PatternStart: 389, .NumPatterns: 1 },
6409 {.Opcode: PPC::MTVSRD, .PatternStart: 390, .NumPatterns: 1 },
6410 {.Opcode: PPC::MTVSRWA, .PatternStart: 391, .NumPatterns: 1 },
6411 {.Opcode: PPC::MTVSRWZ, .PatternStart: 392, .NumPatterns: 1 },
6412 {.Opcode: PPC::NOR, .PatternStart: 393, .NumPatterns: 1 },
6413 {.Opcode: PPC::NOR8, .PatternStart: 394, .NumPatterns: 1 },
6414 {.Opcode: PPC::NOR8_rec, .PatternStart: 395, .NumPatterns: 1 },
6415 {.Opcode: PPC::NOR_rec, .PatternStart: 396, .NumPatterns: 1 },
6416 {.Opcode: PPC::OR, .PatternStart: 397, .NumPatterns: 1 },
6417 {.Opcode: PPC::OR8, .PatternStart: 398, .NumPatterns: 1 },
6418 {.Opcode: PPC::OR8_rec, .PatternStart: 399, .NumPatterns: 1 },
6419 {.Opcode: PPC::ORI, .PatternStart: 400, .NumPatterns: 1 },
6420 {.Opcode: PPC::ORI8, .PatternStart: 401, .NumPatterns: 1 },
6421 {.Opcode: PPC::OR_rec, .PatternStart: 402, .NumPatterns: 1 },
6422 {.Opcode: PPC::PADDI8, .PatternStart: 403, .NumPatterns: 1 },
6423 {.Opcode: PPC::PADDIS, .PatternStart: 404, .NumPatterns: 1 },
6424 {.Opcode: PPC::PADDIS8, .PatternStart: 405, .NumPatterns: 1 },
6425 {.Opcode: PPC::RFEBB, .PatternStart: 406, .NumPatterns: 1 },
6426 {.Opcode: PPC::RLDCL, .PatternStart: 407, .NumPatterns: 1 },
6427 {.Opcode: PPC::RLDCL_rec, .PatternStart: 408, .NumPatterns: 1 },
6428 {.Opcode: PPC::RLDICL, .PatternStart: 409, .NumPatterns: 2 },
6429 {.Opcode: PPC::RLDICL_32_64, .PatternStart: 411, .NumPatterns: 2 },
6430 {.Opcode: PPC::RLDICL_rec, .PatternStart: 413, .NumPatterns: 2 },
6431 {.Opcode: PPC::RLWINM, .PatternStart: 415, .NumPatterns: 2 },
6432 {.Opcode: PPC::RLWINM8, .PatternStart: 417, .NumPatterns: 2 },
6433 {.Opcode: PPC::RLWINM8_rec, .PatternStart: 419, .NumPatterns: 2 },
6434 {.Opcode: PPC::RLWINM_rec, .PatternStart: 421, .NumPatterns: 2 },
6435 {.Opcode: PPC::RLWNM, .PatternStart: 423, .NumPatterns: 1 },
6436 {.Opcode: PPC::RLWNM8, .PatternStart: 424, .NumPatterns: 1 },
6437 {.Opcode: PPC::RLWNM8_rec, .PatternStart: 425, .NumPatterns: 1 },
6438 {.Opcode: PPC::RLWNM_rec, .PatternStart: 426, .NumPatterns: 1 },
6439 {.Opcode: PPC::SC, .PatternStart: 427, .NumPatterns: 1 },
6440 {.Opcode: PPC::SUBF, .PatternStart: 428, .NumPatterns: 1 },
6441 {.Opcode: PPC::SUBF8, .PatternStart: 429, .NumPatterns: 1 },
6442 {.Opcode: PPC::SUBF8_rec, .PatternStart: 430, .NumPatterns: 1 },
6443 {.Opcode: PPC::SUBFC, .PatternStart: 431, .NumPatterns: 1 },
6444 {.Opcode: PPC::SUBFC8, .PatternStart: 432, .NumPatterns: 1 },
6445 {.Opcode: PPC::SUBFC8_rec, .PatternStart: 433, .NumPatterns: 1 },
6446 {.Opcode: PPC::SUBFC_rec, .PatternStart: 434, .NumPatterns: 1 },
6447 {.Opcode: PPC::SUBF_rec, .PatternStart: 435, .NumPatterns: 1 },
6448 {.Opcode: PPC::SYNC, .PatternStart: 436, .NumPatterns: 3 },
6449 {.Opcode: PPC::SYNCP10, .PatternStart: 439, .NumPatterns: 8 },
6450 {.Opcode: PPC::TD, .PatternStart: 447, .NumPatterns: 7 },
6451 {.Opcode: PPC::TDI, .PatternStart: 454, .NumPatterns: 7 },
6452 {.Opcode: PPC::TEND, .PatternStart: 461, .NumPatterns: 2 },
6453 {.Opcode: PPC::TLBIE, .PatternStart: 463, .NumPatterns: 1 },
6454 {.Opcode: PPC::TLBIEP9, .PatternStart: 464, .NumPatterns: 1 },
6455 {.Opcode: PPC::TLBILX, .PatternStart: 465, .NumPatterns: 4 },
6456 {.Opcode: PPC::TLBRE2, .PatternStart: 469, .NumPatterns: 2 },
6457 {.Opcode: PPC::TLBWE2, .PatternStart: 471, .NumPatterns: 2 },
6458 {.Opcode: PPC::TSR, .PatternStart: 473, .NumPatterns: 2 },
6459 {.Opcode: PPC::TW, .PatternStart: 475, .NumPatterns: 8 },
6460 {.Opcode: PPC::TWI, .PatternStart: 483, .NumPatterns: 7 },
6461 {.Opcode: PPC::VNOR, .PatternStart: 490, .NumPatterns: 1 },
6462 {.Opcode: PPC::VOR, .PatternStart: 491, .NumPatterns: 1 },
6463 {.Opcode: PPC::WAIT, .PatternStart: 492, .NumPatterns: 3 },
6464 {.Opcode: PPC::WAITP10, .PatternStart: 495, .NumPatterns: 2 },
6465 {.Opcode: PPC::XORI, .PatternStart: 497, .NumPatterns: 1 },
6466 {.Opcode: PPC::XORI8, .PatternStart: 498, .NumPatterns: 1 },
6467 {.Opcode: PPC::XVCPSGNDP, .PatternStart: 499, .NumPatterns: 1 },
6468 {.Opcode: PPC::XVCPSGNSP, .PatternStart: 500, .NumPatterns: 1 },
6469 {.Opcode: PPC::XXAESDECP, .PatternStart: 501, .NumPatterns: 3 },
6470 {.Opcode: PPC::XXAESENCP, .PatternStart: 504, .NumPatterns: 3 },
6471 {.Opcode: PPC::XXAESGENLKP, .PatternStart: 507, .NumPatterns: 3 },
6472 {.Opcode: PPC::XXGFMUL128, .PatternStart: 510, .NumPatterns: 2 },
6473 {.Opcode: PPC::XXPERMDI, .PatternStart: 512, .NumPatterns: 5 },
6474 {.Opcode: PPC::XXPERMDIs, .PatternStart: 517, .NumPatterns: 3 },
6475 {.Opcode: PPC::gBC, .PatternStart: 520, .NumPatterns: 10 },
6476 {.Opcode: PPC::gBCA, .PatternStart: 530, .NumPatterns: 10 },
6477 {.Opcode: PPC::gBCAat, .PatternStart: 540, .NumPatterns: 2 },
6478 {.Opcode: PPC::gBCCTR, .PatternStart: 542, .NumPatterns: 7 },
6479 {.Opcode: PPC::gBCCTRL, .PatternStart: 549, .NumPatterns: 7 },
6480 {.Opcode: PPC::gBCL, .PatternStart: 556, .NumPatterns: 10 },
6481 {.Opcode: PPC::gBCLA, .PatternStart: 566, .NumPatterns: 10 },
6482 {.Opcode: PPC::gBCLAat, .PatternStart: 576, .NumPatterns: 2 },
6483 {.Opcode: PPC::gBCLR, .PatternStart: 578, .NumPatterns: 11 },
6484 {.Opcode: PPC::gBCLRL, .PatternStart: 589, .NumPatterns: 11 },
6485 {.Opcode: PPC::gBCLat, .PatternStart: 600, .NumPatterns: 2 },
6486 {.Opcode: PPC::gBCat, .PatternStart: 602, .NumPatterns: 2 },
6487 };
6488
6489 static const AliasPattern Patterns[] = {
6490 // PPC::ADDI - 0
6491 {.AsmStrOffset: 0, .AliasCondStart: 0, .NumOperands: 3, .NumConds: 2 },
6492 // PPC::ADDI8 - 1
6493 {.AsmStrOffset: 0, .AliasCondStart: 2, .NumOperands: 3, .NumConds: 2 },
6494 // PPC::ADDIS - 2
6495 {.AsmStrOffset: 12, .AliasCondStart: 4, .NumOperands: 3, .NumConds: 2 },
6496 // PPC::ADDIS8 - 3
6497 {.AsmStrOffset: 12, .AliasCondStart: 6, .NumOperands: 3, .NumConds: 2 },
6498 // PPC::ADDPCIS - 4
6499 {.AsmStrOffset: 25, .AliasCondStart: 8, .NumOperands: 2, .NumConds: 2 },
6500 // PPC::BCC - 5
6501 {.AsmStrOffset: 33, .AliasCondStart: 10, .NumOperands: 3, .NumConds: 2 },
6502 {.AsmStrOffset: 46, .AliasCondStart: 12, .NumOperands: 3, .NumConds: 2 },
6503 {.AsmStrOffset: 55, .AliasCondStart: 14, .NumOperands: 3, .NumConds: 2 },
6504 {.AsmStrOffset: 69, .AliasCondStart: 16, .NumOperands: 3, .NumConds: 2 },
6505 {.AsmStrOffset: 79, .AliasCondStart: 18, .NumOperands: 3, .NumConds: 2 },
6506 {.AsmStrOffset: 93, .AliasCondStart: 20, .NumOperands: 3, .NumConds: 2 },
6507 {.AsmStrOffset: 103, .AliasCondStart: 22, .NumOperands: 3, .NumConds: 2 },
6508 {.AsmStrOffset: 116, .AliasCondStart: 24, .NumOperands: 3, .NumConds: 2 },
6509 {.AsmStrOffset: 125, .AliasCondStart: 26, .NumOperands: 3, .NumConds: 2 },
6510 {.AsmStrOffset: 139, .AliasCondStart: 28, .NumOperands: 3, .NumConds: 2 },
6511 {.AsmStrOffset: 149, .AliasCondStart: 30, .NumOperands: 3, .NumConds: 2 },
6512 {.AsmStrOffset: 163, .AliasCondStart: 32, .NumOperands: 3, .NumConds: 2 },
6513 {.AsmStrOffset: 173, .AliasCondStart: 34, .NumOperands: 3, .NumConds: 2 },
6514 {.AsmStrOffset: 186, .AliasCondStart: 36, .NumOperands: 3, .NumConds: 2 },
6515 {.AsmStrOffset: 195, .AliasCondStart: 38, .NumOperands: 3, .NumConds: 2 },
6516 {.AsmStrOffset: 209, .AliasCondStart: 40, .NumOperands: 3, .NumConds: 2 },
6517 {.AsmStrOffset: 219, .AliasCondStart: 42, .NumOperands: 3, .NumConds: 2 },
6518 {.AsmStrOffset: 233, .AliasCondStart: 44, .NumOperands: 3, .NumConds: 2 },
6519 {.AsmStrOffset: 243, .AliasCondStart: 46, .NumOperands: 3, .NumConds: 2 },
6520 {.AsmStrOffset: 256, .AliasCondStart: 48, .NumOperands: 3, .NumConds: 2 },
6521 {.AsmStrOffset: 265, .AliasCondStart: 50, .NumOperands: 3, .NumConds: 2 },
6522 {.AsmStrOffset: 279, .AliasCondStart: 52, .NumOperands: 3, .NumConds: 2 },
6523 {.AsmStrOffset: 289, .AliasCondStart: 54, .NumOperands: 3, .NumConds: 2 },
6524 {.AsmStrOffset: 303, .AliasCondStart: 56, .NumOperands: 3, .NumConds: 2 },
6525 // PPC::BCCA - 29
6526 {.AsmStrOffset: 313, .AliasCondStart: 58, .NumOperands: 3, .NumConds: 2 },
6527 {.AsmStrOffset: 327, .AliasCondStart: 60, .NumOperands: 3, .NumConds: 2 },
6528 {.AsmStrOffset: 337, .AliasCondStart: 62, .NumOperands: 3, .NumConds: 2 },
6529 {.AsmStrOffset: 352, .AliasCondStart: 64, .NumOperands: 3, .NumConds: 2 },
6530 {.AsmStrOffset: 363, .AliasCondStart: 66, .NumOperands: 3, .NumConds: 2 },
6531 {.AsmStrOffset: 378, .AliasCondStart: 68, .NumOperands: 3, .NumConds: 2 },
6532 {.AsmStrOffset: 389, .AliasCondStart: 70, .NumOperands: 3, .NumConds: 2 },
6533 {.AsmStrOffset: 403, .AliasCondStart: 72, .NumOperands: 3, .NumConds: 2 },
6534 {.AsmStrOffset: 413, .AliasCondStart: 74, .NumOperands: 3, .NumConds: 2 },
6535 {.AsmStrOffset: 428, .AliasCondStart: 76, .NumOperands: 3, .NumConds: 2 },
6536 {.AsmStrOffset: 439, .AliasCondStart: 78, .NumOperands: 3, .NumConds: 2 },
6537 {.AsmStrOffset: 454, .AliasCondStart: 80, .NumOperands: 3, .NumConds: 2 },
6538 {.AsmStrOffset: 465, .AliasCondStart: 82, .NumOperands: 3, .NumConds: 2 },
6539 {.AsmStrOffset: 479, .AliasCondStart: 84, .NumOperands: 3, .NumConds: 2 },
6540 {.AsmStrOffset: 489, .AliasCondStart: 86, .NumOperands: 3, .NumConds: 2 },
6541 {.AsmStrOffset: 504, .AliasCondStart: 88, .NumOperands: 3, .NumConds: 2 },
6542 {.AsmStrOffset: 515, .AliasCondStart: 90, .NumOperands: 3, .NumConds: 2 },
6543 {.AsmStrOffset: 530, .AliasCondStart: 92, .NumOperands: 3, .NumConds: 2 },
6544 {.AsmStrOffset: 541, .AliasCondStart: 94, .NumOperands: 3, .NumConds: 2 },
6545 {.AsmStrOffset: 555, .AliasCondStart: 96, .NumOperands: 3, .NumConds: 2 },
6546 {.AsmStrOffset: 565, .AliasCondStart: 98, .NumOperands: 3, .NumConds: 2 },
6547 {.AsmStrOffset: 580, .AliasCondStart: 100, .NumOperands: 3, .NumConds: 2 },
6548 {.AsmStrOffset: 591, .AliasCondStart: 102, .NumOperands: 3, .NumConds: 2 },
6549 {.AsmStrOffset: 606, .AliasCondStart: 104, .NumOperands: 3, .NumConds: 2 },
6550 // PPC::BCCCTR - 53
6551 {.AsmStrOffset: 617, .AliasCondStart: 106, .NumOperands: 2, .NumConds: 2 },
6552 {.AsmStrOffset: 627, .AliasCondStart: 108, .NumOperands: 2, .NumConds: 2 },
6553 {.AsmStrOffset: 634, .AliasCondStart: 110, .NumOperands: 2, .NumConds: 2 },
6554 {.AsmStrOffset: 645, .AliasCondStart: 112, .NumOperands: 2, .NumConds: 2 },
6555 {.AsmStrOffset: 653, .AliasCondStart: 114, .NumOperands: 2, .NumConds: 2 },
6556 {.AsmStrOffset: 664, .AliasCondStart: 116, .NumOperands: 2, .NumConds: 2 },
6557 {.AsmStrOffset: 672, .AliasCondStart: 118, .NumOperands: 2, .NumConds: 2 },
6558 {.AsmStrOffset: 682, .AliasCondStart: 120, .NumOperands: 2, .NumConds: 2 },
6559 {.AsmStrOffset: 689, .AliasCondStart: 122, .NumOperands: 2, .NumConds: 2 },
6560 {.AsmStrOffset: 700, .AliasCondStart: 124, .NumOperands: 2, .NumConds: 2 },
6561 {.AsmStrOffset: 708, .AliasCondStart: 126, .NumOperands: 2, .NumConds: 2 },
6562 {.AsmStrOffset: 719, .AliasCondStart: 128, .NumOperands: 2, .NumConds: 2 },
6563 {.AsmStrOffset: 727, .AliasCondStart: 130, .NumOperands: 2, .NumConds: 2 },
6564 {.AsmStrOffset: 737, .AliasCondStart: 132, .NumOperands: 2, .NumConds: 2 },
6565 {.AsmStrOffset: 744, .AliasCondStart: 134, .NumOperands: 2, .NumConds: 2 },
6566 {.AsmStrOffset: 755, .AliasCondStart: 136, .NumOperands: 2, .NumConds: 2 },
6567 {.AsmStrOffset: 763, .AliasCondStart: 138, .NumOperands: 2, .NumConds: 2 },
6568 {.AsmStrOffset: 774, .AliasCondStart: 140, .NumOperands: 2, .NumConds: 2 },
6569 {.AsmStrOffset: 782, .AliasCondStart: 142, .NumOperands: 2, .NumConds: 2 },
6570 {.AsmStrOffset: 792, .AliasCondStart: 144, .NumOperands: 2, .NumConds: 2 },
6571 {.AsmStrOffset: 799, .AliasCondStart: 146, .NumOperands: 2, .NumConds: 2 },
6572 {.AsmStrOffset: 810, .AliasCondStart: 148, .NumOperands: 2, .NumConds: 2 },
6573 {.AsmStrOffset: 818, .AliasCondStart: 150, .NumOperands: 2, .NumConds: 2 },
6574 {.AsmStrOffset: 829, .AliasCondStart: 152, .NumOperands: 2, .NumConds: 2 },
6575 // PPC::BCCCTRL - 77
6576 {.AsmStrOffset: 837, .AliasCondStart: 154, .NumOperands: 2, .NumConds: 2 },
6577 {.AsmStrOffset: 848, .AliasCondStart: 156, .NumOperands: 2, .NumConds: 2 },
6578 {.AsmStrOffset: 856, .AliasCondStart: 158, .NumOperands: 2, .NumConds: 2 },
6579 {.AsmStrOffset: 868, .AliasCondStart: 160, .NumOperands: 2, .NumConds: 2 },
6580 {.AsmStrOffset: 877, .AliasCondStart: 162, .NumOperands: 2, .NumConds: 2 },
6581 {.AsmStrOffset: 889, .AliasCondStart: 164, .NumOperands: 2, .NumConds: 2 },
6582 {.AsmStrOffset: 898, .AliasCondStart: 166, .NumOperands: 2, .NumConds: 2 },
6583 {.AsmStrOffset: 909, .AliasCondStart: 168, .NumOperands: 2, .NumConds: 2 },
6584 {.AsmStrOffset: 917, .AliasCondStart: 170, .NumOperands: 2, .NumConds: 2 },
6585 {.AsmStrOffset: 929, .AliasCondStart: 172, .NumOperands: 2, .NumConds: 2 },
6586 {.AsmStrOffset: 938, .AliasCondStart: 174, .NumOperands: 2, .NumConds: 2 },
6587 {.AsmStrOffset: 950, .AliasCondStart: 176, .NumOperands: 2, .NumConds: 2 },
6588 {.AsmStrOffset: 959, .AliasCondStart: 178, .NumOperands: 2, .NumConds: 2 },
6589 {.AsmStrOffset: 970, .AliasCondStart: 180, .NumOperands: 2, .NumConds: 2 },
6590 {.AsmStrOffset: 978, .AliasCondStart: 182, .NumOperands: 2, .NumConds: 2 },
6591 {.AsmStrOffset: 990, .AliasCondStart: 184, .NumOperands: 2, .NumConds: 2 },
6592 {.AsmStrOffset: 999, .AliasCondStart: 186, .NumOperands: 2, .NumConds: 2 },
6593 {.AsmStrOffset: 1011, .AliasCondStart: 188, .NumOperands: 2, .NumConds: 2 },
6594 {.AsmStrOffset: 1020, .AliasCondStart: 190, .NumOperands: 2, .NumConds: 2 },
6595 {.AsmStrOffset: 1031, .AliasCondStart: 192, .NumOperands: 2, .NumConds: 2 },
6596 {.AsmStrOffset: 1039, .AliasCondStart: 194, .NumOperands: 2, .NumConds: 2 },
6597 {.AsmStrOffset: 1051, .AliasCondStart: 196, .NumOperands: 2, .NumConds: 2 },
6598 {.AsmStrOffset: 1060, .AliasCondStart: 198, .NumOperands: 2, .NumConds: 2 },
6599 {.AsmStrOffset: 1072, .AliasCondStart: 200, .NumOperands: 2, .NumConds: 2 },
6600 // PPC::BCCL - 101
6601 {.AsmStrOffset: 1081, .AliasCondStart: 202, .NumOperands: 3, .NumConds: 2 },
6602 {.AsmStrOffset: 1095, .AliasCondStart: 204, .NumOperands: 3, .NumConds: 2 },
6603 {.AsmStrOffset: 1105, .AliasCondStart: 206, .NumOperands: 3, .NumConds: 2 },
6604 {.AsmStrOffset: 1120, .AliasCondStart: 208, .NumOperands: 3, .NumConds: 2 },
6605 {.AsmStrOffset: 1131, .AliasCondStart: 210, .NumOperands: 3, .NumConds: 2 },
6606 {.AsmStrOffset: 1146, .AliasCondStart: 212, .NumOperands: 3, .NumConds: 2 },
6607 {.AsmStrOffset: 1157, .AliasCondStart: 214, .NumOperands: 3, .NumConds: 2 },
6608 {.AsmStrOffset: 1171, .AliasCondStart: 216, .NumOperands: 3, .NumConds: 2 },
6609 {.AsmStrOffset: 1181, .AliasCondStart: 218, .NumOperands: 3, .NumConds: 2 },
6610 {.AsmStrOffset: 1196, .AliasCondStart: 220, .NumOperands: 3, .NumConds: 2 },
6611 {.AsmStrOffset: 1207, .AliasCondStart: 222, .NumOperands: 3, .NumConds: 2 },
6612 {.AsmStrOffset: 1222, .AliasCondStart: 224, .NumOperands: 3, .NumConds: 2 },
6613 {.AsmStrOffset: 1233, .AliasCondStart: 226, .NumOperands: 3, .NumConds: 2 },
6614 {.AsmStrOffset: 1247, .AliasCondStart: 228, .NumOperands: 3, .NumConds: 2 },
6615 {.AsmStrOffset: 1257, .AliasCondStart: 230, .NumOperands: 3, .NumConds: 2 },
6616 {.AsmStrOffset: 1272, .AliasCondStart: 232, .NumOperands: 3, .NumConds: 2 },
6617 {.AsmStrOffset: 1283, .AliasCondStart: 234, .NumOperands: 3, .NumConds: 2 },
6618 {.AsmStrOffset: 1298, .AliasCondStart: 236, .NumOperands: 3, .NumConds: 2 },
6619 {.AsmStrOffset: 1309, .AliasCondStart: 238, .NumOperands: 3, .NumConds: 2 },
6620 {.AsmStrOffset: 1323, .AliasCondStart: 240, .NumOperands: 3, .NumConds: 2 },
6621 {.AsmStrOffset: 1333, .AliasCondStart: 242, .NumOperands: 3, .NumConds: 2 },
6622 {.AsmStrOffset: 1348, .AliasCondStart: 244, .NumOperands: 3, .NumConds: 2 },
6623 {.AsmStrOffset: 1359, .AliasCondStart: 246, .NumOperands: 3, .NumConds: 2 },
6624 {.AsmStrOffset: 1374, .AliasCondStart: 248, .NumOperands: 3, .NumConds: 2 },
6625 // PPC::BCCLA - 125
6626 {.AsmStrOffset: 1385, .AliasCondStart: 250, .NumOperands: 3, .NumConds: 2 },
6627 {.AsmStrOffset: 1400, .AliasCondStart: 252, .NumOperands: 3, .NumConds: 2 },
6628 {.AsmStrOffset: 1411, .AliasCondStart: 254, .NumOperands: 3, .NumConds: 2 },
6629 {.AsmStrOffset: 1427, .AliasCondStart: 256, .NumOperands: 3, .NumConds: 2 },
6630 {.AsmStrOffset: 1439, .AliasCondStart: 258, .NumOperands: 3, .NumConds: 2 },
6631 {.AsmStrOffset: 1455, .AliasCondStart: 260, .NumOperands: 3, .NumConds: 2 },
6632 {.AsmStrOffset: 1467, .AliasCondStart: 262, .NumOperands: 3, .NumConds: 2 },
6633 {.AsmStrOffset: 1482, .AliasCondStart: 264, .NumOperands: 3, .NumConds: 2 },
6634 {.AsmStrOffset: 1493, .AliasCondStart: 266, .NumOperands: 3, .NumConds: 2 },
6635 {.AsmStrOffset: 1509, .AliasCondStart: 268, .NumOperands: 3, .NumConds: 2 },
6636 {.AsmStrOffset: 1521, .AliasCondStart: 270, .NumOperands: 3, .NumConds: 2 },
6637 {.AsmStrOffset: 1537, .AliasCondStart: 272, .NumOperands: 3, .NumConds: 2 },
6638 {.AsmStrOffset: 1549, .AliasCondStart: 274, .NumOperands: 3, .NumConds: 2 },
6639 {.AsmStrOffset: 1564, .AliasCondStart: 276, .NumOperands: 3, .NumConds: 2 },
6640 {.AsmStrOffset: 1575, .AliasCondStart: 278, .NumOperands: 3, .NumConds: 2 },
6641 {.AsmStrOffset: 1591, .AliasCondStart: 280, .NumOperands: 3, .NumConds: 2 },
6642 {.AsmStrOffset: 1603, .AliasCondStart: 282, .NumOperands: 3, .NumConds: 2 },
6643 {.AsmStrOffset: 1619, .AliasCondStart: 284, .NumOperands: 3, .NumConds: 2 },
6644 {.AsmStrOffset: 1631, .AliasCondStart: 286, .NumOperands: 3, .NumConds: 2 },
6645 {.AsmStrOffset: 1646, .AliasCondStart: 288, .NumOperands: 3, .NumConds: 2 },
6646 {.AsmStrOffset: 1657, .AliasCondStart: 290, .NumOperands: 3, .NumConds: 2 },
6647 {.AsmStrOffset: 1673, .AliasCondStart: 292, .NumOperands: 3, .NumConds: 2 },
6648 {.AsmStrOffset: 1685, .AliasCondStart: 294, .NumOperands: 3, .NumConds: 2 },
6649 {.AsmStrOffset: 1701, .AliasCondStart: 296, .NumOperands: 3, .NumConds: 2 },
6650 // PPC::BCCLR - 149
6651 {.AsmStrOffset: 1713, .AliasCondStart: 298, .NumOperands: 2, .NumConds: 2 },
6652 {.AsmStrOffset: 1722, .AliasCondStart: 300, .NumOperands: 2, .NumConds: 2 },
6653 {.AsmStrOffset: 1728, .AliasCondStart: 302, .NumOperands: 2, .NumConds: 2 },
6654 {.AsmStrOffset: 1738, .AliasCondStart: 304, .NumOperands: 2, .NumConds: 2 },
6655 {.AsmStrOffset: 1745, .AliasCondStart: 306, .NumOperands: 2, .NumConds: 2 },
6656 {.AsmStrOffset: 1755, .AliasCondStart: 308, .NumOperands: 2, .NumConds: 2 },
6657 {.AsmStrOffset: 1762, .AliasCondStart: 310, .NumOperands: 2, .NumConds: 2 },
6658 {.AsmStrOffset: 1771, .AliasCondStart: 312, .NumOperands: 2, .NumConds: 2 },
6659 {.AsmStrOffset: 1777, .AliasCondStart: 314, .NumOperands: 2, .NumConds: 2 },
6660 {.AsmStrOffset: 1787, .AliasCondStart: 316, .NumOperands: 2, .NumConds: 2 },
6661 {.AsmStrOffset: 1794, .AliasCondStart: 318, .NumOperands: 2, .NumConds: 2 },
6662 {.AsmStrOffset: 1804, .AliasCondStart: 320, .NumOperands: 2, .NumConds: 2 },
6663 {.AsmStrOffset: 1811, .AliasCondStart: 322, .NumOperands: 2, .NumConds: 2 },
6664 {.AsmStrOffset: 1820, .AliasCondStart: 324, .NumOperands: 2, .NumConds: 2 },
6665 {.AsmStrOffset: 1826, .AliasCondStart: 326, .NumOperands: 2, .NumConds: 2 },
6666 {.AsmStrOffset: 1836, .AliasCondStart: 328, .NumOperands: 2, .NumConds: 2 },
6667 {.AsmStrOffset: 1843, .AliasCondStart: 330, .NumOperands: 2, .NumConds: 2 },
6668 {.AsmStrOffset: 1853, .AliasCondStart: 332, .NumOperands: 2, .NumConds: 2 },
6669 {.AsmStrOffset: 1860, .AliasCondStart: 334, .NumOperands: 2, .NumConds: 2 },
6670 {.AsmStrOffset: 1869, .AliasCondStart: 336, .NumOperands: 2, .NumConds: 2 },
6671 {.AsmStrOffset: 1875, .AliasCondStart: 338, .NumOperands: 2, .NumConds: 2 },
6672 {.AsmStrOffset: 1885, .AliasCondStart: 340, .NumOperands: 2, .NumConds: 2 },
6673 {.AsmStrOffset: 1892, .AliasCondStart: 342, .NumOperands: 2, .NumConds: 2 },
6674 {.AsmStrOffset: 1902, .AliasCondStart: 344, .NumOperands: 2, .NumConds: 2 },
6675 // PPC::BCCLRL - 173
6676 {.AsmStrOffset: 1909, .AliasCondStart: 346, .NumOperands: 2, .NumConds: 2 },
6677 {.AsmStrOffset: 1919, .AliasCondStart: 348, .NumOperands: 2, .NumConds: 2 },
6678 {.AsmStrOffset: 1926, .AliasCondStart: 350, .NumOperands: 2, .NumConds: 2 },
6679 {.AsmStrOffset: 1937, .AliasCondStart: 352, .NumOperands: 2, .NumConds: 2 },
6680 {.AsmStrOffset: 1945, .AliasCondStart: 354, .NumOperands: 2, .NumConds: 2 },
6681 {.AsmStrOffset: 1956, .AliasCondStart: 356, .NumOperands: 2, .NumConds: 2 },
6682 {.AsmStrOffset: 1964, .AliasCondStart: 358, .NumOperands: 2, .NumConds: 2 },
6683 {.AsmStrOffset: 1974, .AliasCondStart: 360, .NumOperands: 2, .NumConds: 2 },
6684 {.AsmStrOffset: 1981, .AliasCondStart: 362, .NumOperands: 2, .NumConds: 2 },
6685 {.AsmStrOffset: 1992, .AliasCondStart: 364, .NumOperands: 2, .NumConds: 2 },
6686 {.AsmStrOffset: 2000, .AliasCondStart: 366, .NumOperands: 2, .NumConds: 2 },
6687 {.AsmStrOffset: 2011, .AliasCondStart: 368, .NumOperands: 2, .NumConds: 2 },
6688 {.AsmStrOffset: 2019, .AliasCondStart: 370, .NumOperands: 2, .NumConds: 2 },
6689 {.AsmStrOffset: 2029, .AliasCondStart: 372, .NumOperands: 2, .NumConds: 2 },
6690 {.AsmStrOffset: 2036, .AliasCondStart: 374, .NumOperands: 2, .NumConds: 2 },
6691 {.AsmStrOffset: 2047, .AliasCondStart: 376, .NumOperands: 2, .NumConds: 2 },
6692 {.AsmStrOffset: 2055, .AliasCondStart: 378, .NumOperands: 2, .NumConds: 2 },
6693 {.AsmStrOffset: 2066, .AliasCondStart: 380, .NumOperands: 2, .NumConds: 2 },
6694 {.AsmStrOffset: 2074, .AliasCondStart: 382, .NumOperands: 2, .NumConds: 2 },
6695 {.AsmStrOffset: 2084, .AliasCondStart: 384, .NumOperands: 2, .NumConds: 2 },
6696 {.AsmStrOffset: 2091, .AliasCondStart: 386, .NumOperands: 2, .NumConds: 2 },
6697 {.AsmStrOffset: 2102, .AliasCondStart: 388, .NumOperands: 2, .NumConds: 2 },
6698 {.AsmStrOffset: 2110, .AliasCondStart: 390, .NumOperands: 2, .NumConds: 2 },
6699 {.AsmStrOffset: 2121, .AliasCondStart: 392, .NumOperands: 2, .NumConds: 2 },
6700 // PPC::CMPD - 197
6701 {.AsmStrOffset: 2129, .AliasCondStart: 394, .NumOperands: 3, .NumConds: 3 },
6702 // PPC::CMPDI - 198
6703 {.AsmStrOffset: 2141, .AliasCondStart: 397, .NumOperands: 3, .NumConds: 2 },
6704 // PPC::CMPLD - 199
6705 {.AsmStrOffset: 2156, .AliasCondStart: 399, .NumOperands: 3, .NumConds: 3 },
6706 // PPC::CMPLDI - 200
6707 {.AsmStrOffset: 2169, .AliasCondStart: 402, .NumOperands: 3, .NumConds: 2 },
6708 // PPC::CMPLW - 201
6709 {.AsmStrOffset: 2185, .AliasCondStart: 404, .NumOperands: 3, .NumConds: 3 },
6710 // PPC::CMPLWI - 202
6711 {.AsmStrOffset: 2198, .AliasCondStart: 407, .NumOperands: 3, .NumConds: 2 },
6712 // PPC::CMPW - 203
6713 {.AsmStrOffset: 2214, .AliasCondStart: 409, .NumOperands: 3, .NumConds: 3 },
6714 // PPC::CMPWI - 204
6715 {.AsmStrOffset: 2226, .AliasCondStart: 412, .NumOperands: 3, .NumConds: 2 },
6716 // PPC::CNTLZW - 205
6717 {.AsmStrOffset: 2241, .AliasCondStart: 414, .NumOperands: 2, .NumConds: 2 },
6718 // PPC::CNTLZW8 - 206
6719 {.AsmStrOffset: 2241, .AliasCondStart: 416, .NumOperands: 2, .NumConds: 2 },
6720 // PPC::CNTLZW8_rec - 207
6721 {.AsmStrOffset: 2255, .AliasCondStart: 418, .NumOperands: 2, .NumConds: 2 },
6722 // PPC::CNTLZW_rec - 208
6723 {.AsmStrOffset: 2255, .AliasCondStart: 420, .NumOperands: 2, .NumConds: 2 },
6724 // PPC::CP_PASTE_rec - 209
6725 {.AsmStrOffset: 2270, .AliasCondStart: 422, .NumOperands: 3, .NumConds: 3 },
6726 // PPC::CREQV - 210
6727 {.AsmStrOffset: 2284, .AliasCondStart: 425, .NumOperands: 3, .NumConds: 3 },
6728 // PPC::CRNOR - 211
6729 {.AsmStrOffset: 2293, .AliasCondStart: 428, .NumOperands: 3, .NumConds: 3 },
6730 // PPC::CROR - 212
6731 {.AsmStrOffset: 2306, .AliasCondStart: 431, .NumOperands: 3, .NumConds: 3 },
6732 // PPC::CRXOR - 213
6733 {.AsmStrOffset: 2320, .AliasCondStart: 434, .NumOperands: 3, .NumConds: 3 },
6734 // PPC::DMSHA2HASH - 214
6735 {.AsmStrOffset: 2329, .AliasCondStart: 437, .NumOperands: 4, .NumConds: 4 },
6736 {.AsmStrOffset: 2349, .AliasCondStart: 441, .NumOperands: 4, .NumConds: 4 },
6737 // PPC::DMSHA3HASH - 216
6738 {.AsmStrOffset: 2369, .AliasCondStart: 445, .NumOperands: 3, .NumConds: 3 },
6739 {.AsmStrOffset: 2381, .AliasCondStart: 448, .NumOperands: 3, .NumConds: 3 },
6740 // PPC::DMXXSHAPAD - 218
6741 {.AsmStrOffset: 2395, .AliasCondStart: 451, .NumOperands: 6, .NumConds: 6 },
6742 {.AsmStrOffset: 2423, .AliasCondStart: 457, .NumOperands: 6, .NumConds: 6 },
6743 {.AsmStrOffset: 2451, .AliasCondStart: 463, .NumOperands: 6, .NumConds: 6 },
6744 {.AsmStrOffset: 2479, .AliasCondStart: 469, .NumOperands: 6, .NumConds: 6 },
6745 {.AsmStrOffset: 2507, .AliasCondStart: 475, .NumOperands: 6, .NumConds: 6 },
6746 {.AsmStrOffset: 2536, .AliasCondStart: 481, .NumOperands: 6, .NumConds: 6 },
6747 {.AsmStrOffset: 2565, .AliasCondStart: 487, .NumOperands: 6, .NumConds: 6 },
6748 {.AsmStrOffset: 2589, .AliasCondStart: 493, .NumOperands: 6, .NumConds: 6 },
6749 // PPC::ISEL - 226
6750 {.AsmStrOffset: 2613, .AliasCondStart: 499, .NumOperands: 4, .NumConds: 4 },
6751 {.AsmStrOffset: 2631, .AliasCondStart: 503, .NumOperands: 4, .NumConds: 4 },
6752 {.AsmStrOffset: 2649, .AliasCondStart: 507, .NumOperands: 4, .NumConds: 4 },
6753 // PPC::ISEL8 - 229
6754 {.AsmStrOffset: 2613, .AliasCondStart: 511, .NumOperands: 4, .NumConds: 4 },
6755 {.AsmStrOffset: 2631, .AliasCondStart: 515, .NumOperands: 4, .NumConds: 4 },
6756 {.AsmStrOffset: 2649, .AliasCondStart: 519, .NumOperands: 4, .NumConds: 4 },
6757 // PPC::MBAR - 232
6758 {.AsmStrOffset: 2667, .AliasCondStart: 523, .NumOperands: 1, .NumConds: 1 },
6759 // PPC::MFDCR - 233
6760 {.AsmStrOffset: 2672, .AliasCondStart: 524, .NumOperands: 2, .NumConds: 5 },
6761 {.AsmStrOffset: 2681, .AliasCondStart: 529, .NumOperands: 2, .NumConds: 5 },
6762 {.AsmStrOffset: 2690, .AliasCondStart: 534, .NumOperands: 2, .NumConds: 5 },
6763 {.AsmStrOffset: 2699, .AliasCondStart: 539, .NumOperands: 2, .NumConds: 5 },
6764 {.AsmStrOffset: 2708, .AliasCondStart: 544, .NumOperands: 2, .NumConds: 5 },
6765 {.AsmStrOffset: 2717, .AliasCondStart: 549, .NumOperands: 2, .NumConds: 5 },
6766 {.AsmStrOffset: 2726, .AliasCondStart: 554, .NumOperands: 2, .NumConds: 5 },
6767 {.AsmStrOffset: 2735, .AliasCondStart: 559, .NumOperands: 2, .NumConds: 5 },
6768 // PPC::MFSPR - 241
6769 {.AsmStrOffset: 2744, .AliasCondStart: 564, .NumOperands: 2, .NumConds: 2 },
6770 {.AsmStrOffset: 2753, .AliasCondStart: 566, .NumOperands: 2, .NumConds: 5 },
6771 {.AsmStrOffset: 2764, .AliasCondStart: 571, .NumOperands: 2, .NumConds: 5 },
6772 {.AsmStrOffset: 2774, .AliasCondStart: 576, .NumOperands: 2, .NumConds: 5 },
6773 {.AsmStrOffset: 2784, .AliasCondStart: 581, .NumOperands: 2, .NumConds: 5 },
6774 {.AsmStrOffset: 2792, .AliasCondStart: 586, .NumOperands: 2, .NumConds: 5 },
6775 {.AsmStrOffset: 2801, .AliasCondStart: 591, .NumOperands: 2, .NumConds: 5 },
6776 {.AsmStrOffset: 2811, .AliasCondStart: 596, .NumOperands: 2, .NumConds: 5 },
6777 {.AsmStrOffset: 2821, .AliasCondStart: 601, .NumOperands: 2, .NumConds: 5 },
6778 {.AsmStrOffset: 2832, .AliasCondStart: 606, .NumOperands: 2, .NumConds: 5 },
6779 {.AsmStrOffset: 2841, .AliasCondStart: 611, .NumOperands: 2, .NumConds: 5 },
6780 {.AsmStrOffset: 2850, .AliasCondStart: 616, .NumOperands: 2, .NumConds: 5 },
6781 {.AsmStrOffset: 2860, .AliasCondStart: 621, .NumOperands: 2, .NumConds: 5 },
6782 {.AsmStrOffset: 2870, .AliasCondStart: 626, .NumOperands: 2, .NumConds: 5 },
6783 {.AsmStrOffset: 2880, .AliasCondStart: 631, .NumOperands: 2, .NumConds: 5 },
6784 {.AsmStrOffset: 2890, .AliasCondStart: 636, .NumOperands: 2, .NumConds: 5 },
6785 {.AsmStrOffset: 2899, .AliasCondStart: 641, .NumOperands: 2, .NumConds: 5 },
6786 {.AsmStrOffset: 2908, .AliasCondStart: 646, .NumOperands: 2, .NumConds: 5 },
6787 {.AsmStrOffset: 2917, .AliasCondStart: 651, .NumOperands: 2, .NumConds: 5 },
6788 {.AsmStrOffset: 2930, .AliasCondStart: 656, .NumOperands: 2, .NumConds: 5 },
6789 {.AsmStrOffset: 2944, .AliasCondStart: 661, .NumOperands: 2, .NumConds: 5 },
6790 {.AsmStrOffset: 2958, .AliasCondStart: 666, .NumOperands: 2, .NumConds: 5 },
6791 {.AsmStrOffset: 2972, .AliasCondStart: 671, .NumOperands: 2, .NumConds: 5 },
6792 {.AsmStrOffset: 2986, .AliasCondStart: 676, .NumOperands: 2, .NumConds: 5 },
6793 {.AsmStrOffset: 3000, .AliasCondStart: 681, .NumOperands: 2, .NumConds: 5 },
6794 {.AsmStrOffset: 3014, .AliasCondStart: 686, .NumOperands: 2, .NumConds: 5 },
6795 {.AsmStrOffset: 3028, .AliasCondStart: 691, .NumOperands: 2, .NumConds: 5 },
6796 {.AsmStrOffset: 3042, .AliasCondStart: 696, .NumOperands: 2, .NumConds: 5 },
6797 {.AsmStrOffset: 3056, .AliasCondStart: 701, .NumOperands: 2, .NumConds: 5 },
6798 {.AsmStrOffset: 3070, .AliasCondStart: 706, .NumOperands: 2, .NumConds: 5 },
6799 {.AsmStrOffset: 3084, .AliasCondStart: 711, .NumOperands: 2, .NumConds: 5 },
6800 {.AsmStrOffset: 3098, .AliasCondStart: 716, .NumOperands: 2, .NumConds: 5 },
6801 {.AsmStrOffset: 3112, .AliasCondStart: 721, .NumOperands: 2, .NumConds: 5 },
6802 {.AsmStrOffset: 3126, .AliasCondStart: 726, .NumOperands: 2, .NumConds: 5 },
6803 {.AsmStrOffset: 3140, .AliasCondStart: 731, .NumOperands: 2, .NumConds: 5 },
6804 {.AsmStrOffset: 3154, .AliasCondStart: 736, .NumOperands: 2, .NumConds: 5 },
6805 {.AsmStrOffset: 3163, .AliasCondStart: 741, .NumOperands: 2, .NumConds: 5 },
6806 {.AsmStrOffset: 3172, .AliasCondStart: 746, .NumOperands: 2, .NumConds: 5 },
6807 {.AsmStrOffset: 3182, .AliasCondStart: 751, .NumOperands: 2, .NumConds: 5 },
6808 {.AsmStrOffset: 3191, .AliasCondStart: 756, .NumOperands: 2, .NumConds: 5 },
6809 {.AsmStrOffset: 3201, .AliasCondStart: 761, .NumOperands: 2, .NumConds: 5 },
6810 {.AsmStrOffset: 3211, .AliasCondStart: 766, .NumOperands: 2, .NumConds: 5 },
6811 {.AsmStrOffset: 3221, .AliasCondStart: 771, .NumOperands: 2, .NumConds: 5 },
6812 {.AsmStrOffset: 3231, .AliasCondStart: 776, .NumOperands: 2, .NumConds: 5 },
6813 {.AsmStrOffset: 3241, .AliasCondStart: 781, .NumOperands: 2, .NumConds: 5 },
6814 // PPC::MFSPR8 - 286
6815 {.AsmStrOffset: 2744, .AliasCondStart: 786, .NumOperands: 2, .NumConds: 2 },
6816 {.AsmStrOffset: 2753, .AliasCondStart: 788, .NumOperands: 2, .NumConds: 5 },
6817 {.AsmStrOffset: 2764, .AliasCondStart: 793, .NumOperands: 2, .NumConds: 5 },
6818 {.AsmStrOffset: 2774, .AliasCondStart: 798, .NumOperands: 2, .NumConds: 5 },
6819 {.AsmStrOffset: 2784, .AliasCondStart: 803, .NumOperands: 2, .NumConds: 5 },
6820 {.AsmStrOffset: 2792, .AliasCondStart: 808, .NumOperands: 2, .NumConds: 5 },
6821 {.AsmStrOffset: 2801, .AliasCondStart: 813, .NumOperands: 2, .NumConds: 5 },
6822 {.AsmStrOffset: 2811, .AliasCondStart: 818, .NumOperands: 2, .NumConds: 5 },
6823 {.AsmStrOffset: 2821, .AliasCondStart: 823, .NumOperands: 2, .NumConds: 5 },
6824 {.AsmStrOffset: 2832, .AliasCondStart: 828, .NumOperands: 2, .NumConds: 5 },
6825 {.AsmStrOffset: 2841, .AliasCondStart: 833, .NumOperands: 2, .NumConds: 5 },
6826 {.AsmStrOffset: 2850, .AliasCondStart: 838, .NumOperands: 2, .NumConds: 5 },
6827 {.AsmStrOffset: 2860, .AliasCondStart: 843, .NumOperands: 2, .NumConds: 5 },
6828 {.AsmStrOffset: 2870, .AliasCondStart: 848, .NumOperands: 2, .NumConds: 5 },
6829 {.AsmStrOffset: 2880, .AliasCondStart: 853, .NumOperands: 2, .NumConds: 5 },
6830 {.AsmStrOffset: 2890, .AliasCondStart: 858, .NumOperands: 2, .NumConds: 5 },
6831 {.AsmStrOffset: 2899, .AliasCondStart: 863, .NumOperands: 2, .NumConds: 5 },
6832 {.AsmStrOffset: 2908, .AliasCondStart: 868, .NumOperands: 2, .NumConds: 5 },
6833 {.AsmStrOffset: 2917, .AliasCondStart: 873, .NumOperands: 2, .NumConds: 5 },
6834 // PPC::MFTB - 305
6835 {.AsmStrOffset: 3251, .AliasCondStart: 878, .NumOperands: 2, .NumConds: 2 },
6836 // PPC::MFUDSCR - 306
6837 {.AsmStrOffset: 2753, .AliasCondStart: 880, .NumOperands: 1, .NumConds: 4 },
6838 // PPC::MFVRSAVE - 307
6839 {.AsmStrOffset: 3260, .AliasCondStart: 884, .NumOperands: 1, .NumConds: 1 },
6840 // PPC::MFVSRD - 308
6841 {.AsmStrOffset: 3272, .AliasCondStart: 885, .NumOperands: 2, .NumConds: 2 },
6842 // PPC::MFVSRWZ - 309
6843 {.AsmStrOffset: 3286, .AliasCondStart: 887, .NumOperands: 2, .NumConds: 2 },
6844 // PPC::MTCRF - 310
6845 {.AsmStrOffset: 3301, .AliasCondStart: 889, .NumOperands: 2, .NumConds: 2 },
6846 // PPC::MTCRF8 - 311
6847 {.AsmStrOffset: 3301, .AliasCondStart: 891, .NumOperands: 2, .NumConds: 2 },
6848 // PPC::MTDCR - 312
6849 {.AsmStrOffset: 3309, .AliasCondStart: 893, .NumOperands: 2, .NumConds: 5 },
6850 {.AsmStrOffset: 3318, .AliasCondStart: 898, .NumOperands: 2, .NumConds: 5 },
6851 {.AsmStrOffset: 3327, .AliasCondStart: 903, .NumOperands: 2, .NumConds: 5 },
6852 {.AsmStrOffset: 3336, .AliasCondStart: 908, .NumOperands: 2, .NumConds: 5 },
6853 {.AsmStrOffset: 3345, .AliasCondStart: 913, .NumOperands: 2, .NumConds: 5 },
6854 {.AsmStrOffset: 3354, .AliasCondStart: 918, .NumOperands: 2, .NumConds: 5 },
6855 {.AsmStrOffset: 3363, .AliasCondStart: 923, .NumOperands: 2, .NumConds: 5 },
6856 {.AsmStrOffset: 3372, .AliasCondStart: 928, .NumOperands: 2, .NumConds: 5 },
6857 // PPC::MTFSF - 320
6858 {.AsmStrOffset: 3381, .AliasCondStart: 933, .NumOperands: 4, .NumConds: 4 },
6859 // PPC::MTFSFI - 321
6860 {.AsmStrOffset: 3394, .AliasCondStart: 937, .NumOperands: 3, .NumConds: 3 },
6861 // PPC::MTFSFI_rec - 322
6862 {.AsmStrOffset: 3412, .AliasCondStart: 940, .NumOperands: 3, .NumConds: 3 },
6863 // PPC::MTFSF_rec - 323
6864 {.AsmStrOffset: 3431, .AliasCondStart: 943, .NumOperands: 4, .NumConds: 4 },
6865 // PPC::MTMSR - 324
6866 {.AsmStrOffset: 3445, .AliasCondStart: 947, .NumOperands: 2, .NumConds: 5 },
6867 // PPC::MTMSRD - 325
6868 {.AsmStrOffset: 3454, .AliasCondStart: 952, .NumOperands: 2, .NumConds: 5 },
6869 // PPC::MTSPR - 326
6870 {.AsmStrOffset: 3464, .AliasCondStart: 957, .NumOperands: 2, .NumConds: 2 },
6871 {.AsmStrOffset: 3473, .AliasCondStart: 959, .NumOperands: 2, .NumConds: 5 },
6872 {.AsmStrOffset: 3484, .AliasCondStart: 964, .NumOperands: 2, .NumConds: 5 },
6873 {.AsmStrOffset: 3492, .AliasCondStart: 969, .NumOperands: 2, .NumConds: 5 },
6874 {.AsmStrOffset: 3501, .AliasCondStart: 974, .NumOperands: 2, .NumConds: 5 },
6875 {.AsmStrOffset: 3511, .AliasCondStart: 979, .NumOperands: 2, .NumConds: 5 },
6876 {.AsmStrOffset: 3521, .AliasCondStart: 984, .NumOperands: 2, .NumConds: 5 },
6877 {.AsmStrOffset: 3532, .AliasCondStart: 989, .NumOperands: 2, .NumConds: 5 },
6878 {.AsmStrOffset: 3541, .AliasCondStart: 994, .NumOperands: 2, .NumConds: 5 },
6879 {.AsmStrOffset: 3550, .AliasCondStart: 999, .NumOperands: 2, .NumConds: 5 },
6880 {.AsmStrOffset: 3560, .AliasCondStart: 1004, .NumOperands: 2, .NumConds: 5 },
6881 {.AsmStrOffset: 3570, .AliasCondStart: 1009, .NumOperands: 2, .NumConds: 5 },
6882 {.AsmStrOffset: 3580, .AliasCondStart: 1014, .NumOperands: 2, .NumConds: 5 },
6883 {.AsmStrOffset: 3590, .AliasCondStart: 1019, .NumOperands: 2, .NumConds: 5 },
6884 {.AsmStrOffset: 3599, .AliasCondStart: 1024, .NumOperands: 2, .NumConds: 5 },
6885 {.AsmStrOffset: 3608, .AliasCondStart: 1029, .NumOperands: 2, .NumConds: 5 },
6886 {.AsmStrOffset: 3617, .AliasCondStart: 1034, .NumOperands: 2, .NumConds: 5 },
6887 {.AsmStrOffset: 3626, .AliasCondStart: 1039, .NumOperands: 2, .NumConds: 5 },
6888 {.AsmStrOffset: 3639, .AliasCondStart: 1044, .NumOperands: 2, .NumConds: 5 },
6889 {.AsmStrOffset: 3653, .AliasCondStart: 1049, .NumOperands: 2, .NumConds: 5 },
6890 {.AsmStrOffset: 3667, .AliasCondStart: 1054, .NumOperands: 2, .NumConds: 5 },
6891 {.AsmStrOffset: 3681, .AliasCondStart: 1059, .NumOperands: 2, .NumConds: 5 },
6892 {.AsmStrOffset: 3695, .AliasCondStart: 1064, .NumOperands: 2, .NumConds: 5 },
6893 {.AsmStrOffset: 3709, .AliasCondStart: 1069, .NumOperands: 2, .NumConds: 5 },
6894 {.AsmStrOffset: 3723, .AliasCondStart: 1074, .NumOperands: 2, .NumConds: 5 },
6895 {.AsmStrOffset: 3737, .AliasCondStart: 1079, .NumOperands: 2, .NumConds: 5 },
6896 {.AsmStrOffset: 3751, .AliasCondStart: 1084, .NumOperands: 2, .NumConds: 5 },
6897 {.AsmStrOffset: 3765, .AliasCondStart: 1089, .NumOperands: 2, .NumConds: 5 },
6898 {.AsmStrOffset: 3779, .AliasCondStart: 1094, .NumOperands: 2, .NumConds: 5 },
6899 {.AsmStrOffset: 3793, .AliasCondStart: 1099, .NumOperands: 2, .NumConds: 5 },
6900 {.AsmStrOffset: 3807, .AliasCondStart: 1104, .NumOperands: 2, .NumConds: 5 },
6901 {.AsmStrOffset: 3821, .AliasCondStart: 1109, .NumOperands: 2, .NumConds: 5 },
6902 {.AsmStrOffset: 3835, .AliasCondStart: 1114, .NumOperands: 2, .NumConds: 5 },
6903 {.AsmStrOffset: 3849, .AliasCondStart: 1119, .NumOperands: 2, .NumConds: 5 },
6904 {.AsmStrOffset: 3863, .AliasCondStart: 1124, .NumOperands: 2, .NumConds: 5 },
6905 {.AsmStrOffset: 3872, .AliasCondStart: 1129, .NumOperands: 2, .NumConds: 5 },
6906 {.AsmStrOffset: 3881, .AliasCondStart: 1134, .NumOperands: 2, .NumConds: 5 },
6907 {.AsmStrOffset: 3891, .AliasCondStart: 1139, .NumOperands: 2, .NumConds: 5 },
6908 {.AsmStrOffset: 3900, .AliasCondStart: 1144, .NumOperands: 2, .NumConds: 5 },
6909 {.AsmStrOffset: 3910, .AliasCondStart: 1149, .NumOperands: 2, .NumConds: 5 },
6910 {.AsmStrOffset: 3920, .AliasCondStart: 1154, .NumOperands: 2, .NumConds: 5 },
6911 {.AsmStrOffset: 3930, .AliasCondStart: 1159, .NumOperands: 2, .NumConds: 5 },
6912 {.AsmStrOffset: 3940, .AliasCondStart: 1164, .NumOperands: 2, .NumConds: 5 },
6913 {.AsmStrOffset: 3950, .AliasCondStart: 1169, .NumOperands: 2, .NumConds: 5 },
6914 // PPC::MTSPR8 - 370
6915 {.AsmStrOffset: 3464, .AliasCondStart: 1174, .NumOperands: 2, .NumConds: 2 },
6916 {.AsmStrOffset: 3473, .AliasCondStart: 1176, .NumOperands: 2, .NumConds: 5 },
6917 {.AsmStrOffset: 3484, .AliasCondStart: 1181, .NumOperands: 2, .NumConds: 5 },
6918 {.AsmStrOffset: 3492, .AliasCondStart: 1186, .NumOperands: 2, .NumConds: 5 },
6919 {.AsmStrOffset: 3501, .AliasCondStart: 1191, .NumOperands: 2, .NumConds: 5 },
6920 {.AsmStrOffset: 3511, .AliasCondStart: 1196, .NumOperands: 2, .NumConds: 5 },
6921 {.AsmStrOffset: 3521, .AliasCondStart: 1201, .NumOperands: 2, .NumConds: 5 },
6922 {.AsmStrOffset: 3532, .AliasCondStart: 1206, .NumOperands: 2, .NumConds: 5 },
6923 {.AsmStrOffset: 3541, .AliasCondStart: 1211, .NumOperands: 2, .NumConds: 5 },
6924 {.AsmStrOffset: 3550, .AliasCondStart: 1216, .NumOperands: 2, .NumConds: 5 },
6925 {.AsmStrOffset: 3560, .AliasCondStart: 1221, .NumOperands: 2, .NumConds: 5 },
6926 {.AsmStrOffset: 3570, .AliasCondStart: 1226, .NumOperands: 2, .NumConds: 5 },
6927 {.AsmStrOffset: 3580, .AliasCondStart: 1231, .NumOperands: 2, .NumConds: 5 },
6928 {.AsmStrOffset: 3590, .AliasCondStart: 1236, .NumOperands: 2, .NumConds: 5 },
6929 {.AsmStrOffset: 3599, .AliasCondStart: 1241, .NumOperands: 2, .NumConds: 5 },
6930 {.AsmStrOffset: 3608, .AliasCondStart: 1246, .NumOperands: 2, .NumConds: 5 },
6931 {.AsmStrOffset: 3617, .AliasCondStart: 1251, .NumOperands: 2, .NumConds: 5 },
6932 {.AsmStrOffset: 3626, .AliasCondStart: 1256, .NumOperands: 2, .NumConds: 5 },
6933 // PPC::MTUDSCR - 388
6934 {.AsmStrOffset: 3960, .AliasCondStart: 1261, .NumOperands: 1, .NumConds: 4 },
6935 // PPC::MTVRSAVE - 389
6936 {.AsmStrOffset: 3971, .AliasCondStart: 1265, .NumOperands: 1, .NumConds: 1 },
6937 // PPC::MTVSRD - 390
6938 {.AsmStrOffset: 3983, .AliasCondStart: 1266, .NumOperands: 2, .NumConds: 2 },
6939 // PPC::MTVSRWA - 391
6940 {.AsmStrOffset: 3997, .AliasCondStart: 1268, .NumOperands: 2, .NumConds: 2 },
6941 // PPC::MTVSRWZ - 392
6942 {.AsmStrOffset: 4012, .AliasCondStart: 1270, .NumOperands: 2, .NumConds: 2 },
6943 // PPC::NOR - 393
6944 {.AsmStrOffset: 4027, .AliasCondStart: 1272, .NumOperands: 3, .NumConds: 3 },
6945 // PPC::NOR8 - 394
6946 {.AsmStrOffset: 4027, .AliasCondStart: 1275, .NumOperands: 3, .NumConds: 3 },
6947 // PPC::NOR8_rec - 395
6948 {.AsmStrOffset: 4038, .AliasCondStart: 1278, .NumOperands: 3, .NumConds: 3 },
6949 // PPC::NOR_rec - 396
6950 {.AsmStrOffset: 4038, .AliasCondStart: 1281, .NumOperands: 3, .NumConds: 3 },
6951 // PPC::OR - 397
6952 {.AsmStrOffset: 4050, .AliasCondStart: 1284, .NumOperands: 3, .NumConds: 3 },
6953 // PPC::OR8 - 398
6954 {.AsmStrOffset: 4050, .AliasCondStart: 1287, .NumOperands: 3, .NumConds: 3 },
6955 // PPC::OR8_rec - 399
6956 {.AsmStrOffset: 4060, .AliasCondStart: 1290, .NumOperands: 3, .NumConds: 3 },
6957 // PPC::ORI - 400
6958 {.AsmStrOffset: 4071, .AliasCondStart: 1293, .NumOperands: 3, .NumConds: 3 },
6959 // PPC::ORI8 - 401
6960 {.AsmStrOffset: 4071, .AliasCondStart: 1296, .NumOperands: 3, .NumConds: 3 },
6961 // PPC::OR_rec - 402
6962 {.AsmStrOffset: 4060, .AliasCondStart: 1299, .NumOperands: 3, .NumConds: 3 },
6963 // PPC::PADDI8 - 403
6964 {.AsmStrOffset: 4075, .AliasCondStart: 1302, .NumOperands: 3, .NumConds: 2 },
6965 // PPC::PADDIS - 404
6966 {.AsmStrOffset: 4094, .AliasCondStart: 1304, .NumOperands: 3, .NumConds: 2 },
6967 // PPC::PADDIS8 - 405
6968 {.AsmStrOffset: 4094, .AliasCondStart: 1306, .NumOperands: 3, .NumConds: 2 },
6969 // PPC::RFEBB - 406
6970 {.AsmStrOffset: 4108, .AliasCondStart: 1308, .NumOperands: 1, .NumConds: 1 },
6971 // PPC::RLDCL - 407
6972 {.AsmStrOffset: 4114, .AliasCondStart: 1309, .NumOperands: 4, .NumConds: 4 },
6973 // PPC::RLDCL_rec - 408
6974 {.AsmStrOffset: 4131, .AliasCondStart: 1313, .NumOperands: 4, .NumConds: 4 },
6975 // PPC::RLDICL - 409
6976 {.AsmStrOffset: 4149, .AliasCondStart: 1317, .NumOperands: 4, .NumConds: 4 },
6977 {.AsmStrOffset: 4169, .AliasCondStart: 1321, .NumOperands: 4, .NumConds: 3 },
6978 // PPC::RLDICL_32_64 - 411
6979 {.AsmStrOffset: 4149, .AliasCondStart: 1324, .NumOperands: 4, .NumConds: 4 },
6980 {.AsmStrOffset: 4169, .AliasCondStart: 1328, .NumOperands: 4, .NumConds: 3 },
6981 // PPC::RLDICL_rec - 413
6982 {.AsmStrOffset: 4189, .AliasCondStart: 1331, .NumOperands: 4, .NumConds: 4 },
6983 {.AsmStrOffset: 4210, .AliasCondStart: 1335, .NumOperands: 4, .NumConds: 3 },
6984 // PPC::RLWINM - 415
6985 {.AsmStrOffset: 4231, .AliasCondStart: 1338, .NumOperands: 5, .NumConds: 5 },
6986 {.AsmStrOffset: 4251, .AliasCondStart: 1343, .NumOperands: 5, .NumConds: 5 },
6987 // PPC::RLWINM8 - 417
6988 {.AsmStrOffset: 4231, .AliasCondStart: 1348, .NumOperands: 5, .NumConds: 5 },
6989 {.AsmStrOffset: 4251, .AliasCondStart: 1353, .NumOperands: 5, .NumConds: 5 },
6990 // PPC::RLWINM8_rec - 419
6991 {.AsmStrOffset: 4271, .AliasCondStart: 1358, .NumOperands: 5, .NumConds: 5 },
6992 {.AsmStrOffset: 4292, .AliasCondStart: 1363, .NumOperands: 5, .NumConds: 5 },
6993 // PPC::RLWINM_rec - 421
6994 {.AsmStrOffset: 4271, .AliasCondStart: 1368, .NumOperands: 5, .NumConds: 5 },
6995 {.AsmStrOffset: 4292, .AliasCondStart: 1373, .NumOperands: 5, .NumConds: 5 },
6996 // PPC::RLWNM - 423
6997 {.AsmStrOffset: 4313, .AliasCondStart: 1378, .NumOperands: 5, .NumConds: 5 },
6998 // PPC::RLWNM8 - 424
6999 {.AsmStrOffset: 4313, .AliasCondStart: 1383, .NumOperands: 5, .NumConds: 5 },
7000 // PPC::RLWNM8_rec - 425
7001 {.AsmStrOffset: 4330, .AliasCondStart: 1388, .NumOperands: 5, .NumConds: 5 },
7002 // PPC::RLWNM_rec - 426
7003 {.AsmStrOffset: 4330, .AliasCondStart: 1393, .NumOperands: 5, .NumConds: 5 },
7004 // PPC::SC - 427
7005 {.AsmStrOffset: 4348, .AliasCondStart: 1398, .NumOperands: 1, .NumConds: 1 },
7006 // PPC::SUBF - 428
7007 {.AsmStrOffset: 4351, .AliasCondStart: 1399, .NumOperands: 3, .NumConds: 3 },
7008 // PPC::SUBF8 - 429
7009 {.AsmStrOffset: 4351, .AliasCondStart: 1402, .NumOperands: 3, .NumConds: 3 },
7010 // PPC::SUBF8_rec - 430
7011 {.AsmStrOffset: 4366, .AliasCondStart: 1405, .NumOperands: 3, .NumConds: 3 },
7012 // PPC::SUBFC - 431
7013 {.AsmStrOffset: 4382, .AliasCondStart: 1408, .NumOperands: 3, .NumConds: 3 },
7014 // PPC::SUBFC8 - 432
7015 {.AsmStrOffset: 4382, .AliasCondStart: 1411, .NumOperands: 3, .NumConds: 3 },
7016 // PPC::SUBFC8_rec - 433
7017 {.AsmStrOffset: 4398, .AliasCondStart: 1414, .NumOperands: 3, .NumConds: 3 },
7018 // PPC::SUBFC_rec - 434
7019 {.AsmStrOffset: 4398, .AliasCondStart: 1417, .NumOperands: 3, .NumConds: 3 },
7020 // PPC::SUBF_rec - 435
7021 {.AsmStrOffset: 4366, .AliasCondStart: 1420, .NumOperands: 3, .NumConds: 3 },
7022 // PPC::SYNC - 436
7023 {.AsmStrOffset: 4415, .AliasCondStart: 1423, .NumOperands: 1, .NumConds: 1 },
7024 {.AsmStrOffset: 4420, .AliasCondStart: 1424, .NumOperands: 1, .NumConds: 1 },
7025 {.AsmStrOffset: 4427, .AliasCondStart: 1425, .NumOperands: 1, .NumConds: 1 },
7026 // PPC::SYNCP10 - 439
7027 {.AsmStrOffset: 4415, .AliasCondStart: 1426, .NumOperands: 2, .NumConds: 2 },
7028 {.AsmStrOffset: 4427, .AliasCondStart: 1428, .NumOperands: 2, .NumConds: 2 },
7029 {.AsmStrOffset: 4435, .AliasCondStart: 1430, .NumOperands: 2, .NumConds: 2 },
7030 {.AsmStrOffset: 4443, .AliasCondStart: 1432, .NumOperands: 2, .NumConds: 2 },
7031 {.AsmStrOffset: 4451, .AliasCondStart: 1434, .NumOperands: 2, .NumConds: 2 },
7032 {.AsmStrOffset: 4461, .AliasCondStart: 1436, .NumOperands: 2, .NumConds: 2 },
7033 {.AsmStrOffset: 4471, .AliasCondStart: 1438, .NumOperands: 2, .NumConds: 2 },
7034 {.AsmStrOffset: 4480, .AliasCondStart: 1440, .NumOperands: 2, .NumConds: 2 },
7035 // PPC::TD - 447
7036 {.AsmStrOffset: 4487, .AliasCondStart: 1442, .NumOperands: 3, .NumConds: 3 },
7037 {.AsmStrOffset: 4499, .AliasCondStart: 1445, .NumOperands: 3, .NumConds: 3 },
7038 {.AsmStrOffset: 4511, .AliasCondStart: 1448, .NumOperands: 3, .NumConds: 3 },
7039 {.AsmStrOffset: 4523, .AliasCondStart: 1451, .NumOperands: 3, .NumConds: 3 },
7040 {.AsmStrOffset: 4535, .AliasCondStart: 1454, .NumOperands: 3, .NumConds: 3 },
7041 {.AsmStrOffset: 4548, .AliasCondStart: 1457, .NumOperands: 3, .NumConds: 3 },
7042 {.AsmStrOffset: 4561, .AliasCondStart: 1460, .NumOperands: 3, .NumConds: 3 },
7043 // PPC::TDI - 454
7044 {.AsmStrOffset: 4572, .AliasCondStart: 1463, .NumOperands: 3, .NumConds: 2 },
7045 {.AsmStrOffset: 4587, .AliasCondStart: 1465, .NumOperands: 3, .NumConds: 2 },
7046 {.AsmStrOffset: 4602, .AliasCondStart: 1467, .NumOperands: 3, .NumConds: 2 },
7047 {.AsmStrOffset: 4617, .AliasCondStart: 1469, .NumOperands: 3, .NumConds: 2 },
7048 {.AsmStrOffset: 4632, .AliasCondStart: 1471, .NumOperands: 3, .NumConds: 2 },
7049 {.AsmStrOffset: 4648, .AliasCondStart: 1473, .NumOperands: 3, .NumConds: 2 },
7050 {.AsmStrOffset: 4664, .AliasCondStart: 1475, .NumOperands: 3, .NumConds: 2 },
7051 // PPC::TEND - 461
7052 {.AsmStrOffset: 4678, .AliasCondStart: 1477, .NumOperands: 1, .NumConds: 1 },
7053 {.AsmStrOffset: 4684, .AliasCondStart: 1478, .NumOperands: 1, .NumConds: 1 },
7054 // PPC::TLBIE - 463
7055 {.AsmStrOffset: 4693, .AliasCondStart: 1479, .NumOperands: 2, .NumConds: 2 },
7056 // PPC::TLBIEP9 - 464
7057 {.AsmStrOffset: 4702, .AliasCondStart: 1481, .NumOperands: 5, .NumConds: 5 },
7058 // PPC::TLBILX - 465
7059 {.AsmStrOffset: 4715, .AliasCondStart: 1486, .NumOperands: 3, .NumConds: 3 },
7060 {.AsmStrOffset: 4726, .AliasCondStart: 1489, .NumOperands: 3, .NumConds: 3 },
7061 {.AsmStrOffset: 4736, .AliasCondStart: 1492, .NumOperands: 3, .NumConds: 3 },
7062 {.AsmStrOffset: 4752, .AliasCondStart: 1495, .NumOperands: 3, .NumConds: 3 },
7063 // PPC::TLBRE2 - 469
7064 {.AsmStrOffset: 4764, .AliasCondStart: 1498, .NumOperands: 3, .NumConds: 3 },
7065 {.AsmStrOffset: 4779, .AliasCondStart: 1501, .NumOperands: 3, .NumConds: 3 },
7066 // PPC::TLBWE2 - 471
7067 {.AsmStrOffset: 4794, .AliasCondStart: 1504, .NumOperands: 3, .NumConds: 3 },
7068 {.AsmStrOffset: 4809, .AliasCondStart: 1507, .NumOperands: 3, .NumConds: 3 },
7069 // PPC::TSR - 473
7070 {.AsmStrOffset: 4824, .AliasCondStart: 1510, .NumOperands: 1, .NumConds: 1 },
7071 {.AsmStrOffset: 4834, .AliasCondStart: 1511, .NumOperands: 1, .NumConds: 1 },
7072 // PPC::TW - 475
7073 {.AsmStrOffset: 4843, .AliasCondStart: 1512, .NumOperands: 3, .NumConds: 3 },
7074 {.AsmStrOffset: 4848, .AliasCondStart: 1515, .NumOperands: 3, .NumConds: 3 },
7075 {.AsmStrOffset: 4860, .AliasCondStart: 1518, .NumOperands: 3, .NumConds: 3 },
7076 {.AsmStrOffset: 4872, .AliasCondStart: 1521, .NumOperands: 3, .NumConds: 3 },
7077 {.AsmStrOffset: 4884, .AliasCondStart: 1524, .NumOperands: 3, .NumConds: 3 },
7078 {.AsmStrOffset: 4896, .AliasCondStart: 1527, .NumOperands: 3, .NumConds: 3 },
7079 {.AsmStrOffset: 4909, .AliasCondStart: 1530, .NumOperands: 3, .NumConds: 3 },
7080 {.AsmStrOffset: 4922, .AliasCondStart: 1533, .NumOperands: 3, .NumConds: 3 },
7081 // PPC::TWI - 483
7082 {.AsmStrOffset: 4933, .AliasCondStart: 1536, .NumOperands: 3, .NumConds: 2 },
7083 {.AsmStrOffset: 4948, .AliasCondStart: 1538, .NumOperands: 3, .NumConds: 2 },
7084 {.AsmStrOffset: 4963, .AliasCondStart: 1540, .NumOperands: 3, .NumConds: 2 },
7085 {.AsmStrOffset: 4978, .AliasCondStart: 1542, .NumOperands: 3, .NumConds: 2 },
7086 {.AsmStrOffset: 4993, .AliasCondStart: 1544, .NumOperands: 3, .NumConds: 2 },
7087 {.AsmStrOffset: 5009, .AliasCondStart: 1546, .NumOperands: 3, .NumConds: 2 },
7088 {.AsmStrOffset: 5025, .AliasCondStart: 1548, .NumOperands: 3, .NumConds: 2 },
7089 // PPC::VNOR - 490
7090 {.AsmStrOffset: 5039, .AliasCondStart: 1550, .NumOperands: 3, .NumConds: 3 },
7091 // PPC::VOR - 491
7092 {.AsmStrOffset: 5051, .AliasCondStart: 1553, .NumOperands: 3, .NumConds: 3 },
7093 // PPC::WAIT - 492
7094 {.AsmStrOffset: 5062, .AliasCondStart: 1556, .NumOperands: 1, .NumConds: 1 },
7095 {.AsmStrOffset: 5067, .AliasCondStart: 1557, .NumOperands: 1, .NumConds: 1 },
7096 {.AsmStrOffset: 5075, .AliasCondStart: 1558, .NumOperands: 1, .NumConds: 1 },
7097 // PPC::WAITP10 - 495
7098 {.AsmStrOffset: 5062, .AliasCondStart: 1559, .NumOperands: 2, .NumConds: 2 },
7099 {.AsmStrOffset: 5067, .AliasCondStart: 1561, .NumOperands: 2, .NumConds: 2 },
7100 // PPC::XORI - 497
7101 {.AsmStrOffset: 5084, .AliasCondStart: 1563, .NumOperands: 3, .NumConds: 3 },
7102 // PPC::XORI8 - 498
7103 {.AsmStrOffset: 5084, .AliasCondStart: 1566, .NumOperands: 3, .NumConds: 3 },
7104 // PPC::XVCPSGNDP - 499
7105 {.AsmStrOffset: 5089, .AliasCondStart: 1569, .NumOperands: 3, .NumConds: 3 },
7106 // PPC::XVCPSGNSP - 500
7107 {.AsmStrOffset: 5104, .AliasCondStart: 1572, .NumOperands: 3, .NumConds: 3 },
7108 // PPC::XXAESDECP - 501
7109 {.AsmStrOffset: 5119, .AliasCondStart: 1575, .NumOperands: 4, .NumConds: 4 },
7110 {.AsmStrOffset: 5143, .AliasCondStart: 1579, .NumOperands: 4, .NumConds: 4 },
7111 {.AsmStrOffset: 5167, .AliasCondStart: 1583, .NumOperands: 4, .NumConds: 4 },
7112 // PPC::XXAESENCP - 504
7113 {.AsmStrOffset: 5191, .AliasCondStart: 1587, .NumOperands: 4, .NumConds: 4 },
7114 {.AsmStrOffset: 5215, .AliasCondStart: 1591, .NumOperands: 4, .NumConds: 4 },
7115 {.AsmStrOffset: 5239, .AliasCondStart: 1595, .NumOperands: 4, .NumConds: 4 },
7116 // PPC::XXAESGENLKP - 507
7117 {.AsmStrOffset: 5263, .AliasCondStart: 1599, .NumOperands: 3, .NumConds: 3 },
7118 {.AsmStrOffset: 5285, .AliasCondStart: 1602, .NumOperands: 3, .NumConds: 3 },
7119 {.AsmStrOffset: 5307, .AliasCondStart: 1605, .NumOperands: 3, .NumConds: 3 },
7120 // PPC::XXGFMUL128 - 510
7121 {.AsmStrOffset: 5329, .AliasCondStart: 1608, .NumOperands: 4, .NumConds: 4 },
7122 {.AsmStrOffset: 5354, .AliasCondStart: 1612, .NumOperands: 4, .NumConds: 4 },
7123 // PPC::XXPERMDI - 512
7124 {.AsmStrOffset: 5379, .AliasCondStart: 1616, .NumOperands: 4, .NumConds: 7 },
7125 {.AsmStrOffset: 5397, .AliasCondStart: 1623, .NumOperands: 4, .NumConds: 7 },
7126 {.AsmStrOffset: 5415, .AliasCondStart: 1630, .NumOperands: 4, .NumConds: 4 },
7127 {.AsmStrOffset: 5434, .AliasCondStart: 1634, .NumOperands: 4, .NumConds: 4 },
7128 {.AsmStrOffset: 5453, .AliasCondStart: 1638, .NumOperands: 4, .NumConds: 4 },
7129 // PPC::XXPERMDIs - 517
7130 {.AsmStrOffset: 5379, .AliasCondStart: 1642, .NumOperands: 3, .NumConds: 6 },
7131 {.AsmStrOffset: 5397, .AliasCondStart: 1648, .NumOperands: 3, .NumConds: 6 },
7132 {.AsmStrOffset: 5453, .AliasCondStart: 1654, .NumOperands: 3, .NumConds: 3 },
7133 // PPC::gBC - 520
7134 {.AsmStrOffset: 5468, .AliasCondStart: 1657, .NumOperands: 3, .NumConds: 2 },
7135 {.AsmStrOffset: 5480, .AliasCondStart: 1659, .NumOperands: 3, .NumConds: 2 },
7136 {.AsmStrOffset: 5492, .AliasCondStart: 1661, .NumOperands: 3, .NumConds: 2 },
7137 {.AsmStrOffset: 5505, .AliasCondStart: 1663, .NumOperands: 3, .NumConds: 2 },
7138 {.AsmStrOffset: 5518, .AliasCondStart: 1665, .NumOperands: 3, .NumConds: 2 },
7139 {.AsmStrOffset: 5531, .AliasCondStart: 1667, .NumOperands: 3, .NumConds: 2 },
7140 {.AsmStrOffset: 5544, .AliasCondStart: 1669, .NumOperands: 3, .NumConds: 2 },
7141 {.AsmStrOffset: 5559, .AliasCondStart: 1671, .NumOperands: 3, .NumConds: 2 },
7142 {.AsmStrOffset: 5574, .AliasCondStart: 1673, .NumOperands: 3, .NumConds: 2 },
7143 {.AsmStrOffset: 5588, .AliasCondStart: 1675, .NumOperands: 3, .NumConds: 2 },
7144 // PPC::gBCA - 530
7145 {.AsmStrOffset: 5602, .AliasCondStart: 1677, .NumOperands: 3, .NumConds: 2 },
7146 {.AsmStrOffset: 5615, .AliasCondStart: 1679, .NumOperands: 3, .NumConds: 2 },
7147 {.AsmStrOffset: 5628, .AliasCondStart: 1681, .NumOperands: 3, .NumConds: 2 },
7148 {.AsmStrOffset: 5642, .AliasCondStart: 1683, .NumOperands: 3, .NumConds: 2 },
7149 {.AsmStrOffset: 5656, .AliasCondStart: 1685, .NumOperands: 3, .NumConds: 2 },
7150 {.AsmStrOffset: 5670, .AliasCondStart: 1687, .NumOperands: 3, .NumConds: 2 },
7151 {.AsmStrOffset: 5684, .AliasCondStart: 1689, .NumOperands: 3, .NumConds: 2 },
7152 {.AsmStrOffset: 5700, .AliasCondStart: 1691, .NumOperands: 3, .NumConds: 2 },
7153 {.AsmStrOffset: 5716, .AliasCondStart: 1693, .NumOperands: 3, .NumConds: 2 },
7154 {.AsmStrOffset: 5731, .AliasCondStart: 1695, .NumOperands: 3, .NumConds: 2 },
7155 // PPC::gBCAat - 540
7156 {.AsmStrOffset: 5746, .AliasCondStart: 1697, .NumOperands: 4, .NumConds: 3 },
7157 {.AsmStrOffset: 5766, .AliasCondStart: 1700, .NumOperands: 4, .NumConds: 3 },
7158 // PPC::gBCCTR - 542
7159 {.AsmStrOffset: 5786, .AliasCondStart: 1703, .NumOperands: 3, .NumConds: 3 },
7160 {.AsmStrOffset: 5801, .AliasCondStart: 1706, .NumOperands: 3, .NumConds: 3 },
7161 {.AsmStrOffset: 5810, .AliasCondStart: 1709, .NumOperands: 3, .NumConds: 3 },
7162 {.AsmStrOffset: 5819, .AliasCondStart: 1712, .NumOperands: 3, .NumConds: 3 },
7163 {.AsmStrOffset: 5829, .AliasCondStart: 1715, .NumOperands: 3, .NumConds: 3 },
7164 {.AsmStrOffset: 5839, .AliasCondStart: 1718, .NumOperands: 3, .NumConds: 3 },
7165 {.AsmStrOffset: 5849, .AliasCondStart: 1721, .NumOperands: 3, .NumConds: 3 },
7166 // PPC::gBCCTRL - 549
7167 {.AsmStrOffset: 5859, .AliasCondStart: 1724, .NumOperands: 3, .NumConds: 3 },
7168 {.AsmStrOffset: 5875, .AliasCondStart: 1727, .NumOperands: 3, .NumConds: 3 },
7169 {.AsmStrOffset: 5885, .AliasCondStart: 1730, .NumOperands: 3, .NumConds: 3 },
7170 {.AsmStrOffset: 5895, .AliasCondStart: 1733, .NumOperands: 3, .NumConds: 3 },
7171 {.AsmStrOffset: 5906, .AliasCondStart: 1736, .NumOperands: 3, .NumConds: 3 },
7172 {.AsmStrOffset: 5917, .AliasCondStart: 1739, .NumOperands: 3, .NumConds: 3 },
7173 {.AsmStrOffset: 5928, .AliasCondStart: 1742, .NumOperands: 3, .NumConds: 3 },
7174 // PPC::gBCL - 556
7175 {.AsmStrOffset: 5939, .AliasCondStart: 1745, .NumOperands: 3, .NumConds: 2 },
7176 {.AsmStrOffset: 5952, .AliasCondStart: 1747, .NumOperands: 3, .NumConds: 2 },
7177 {.AsmStrOffset: 5965, .AliasCondStart: 1749, .NumOperands: 3, .NumConds: 2 },
7178 {.AsmStrOffset: 5979, .AliasCondStart: 1751, .NumOperands: 3, .NumConds: 2 },
7179 {.AsmStrOffset: 5993, .AliasCondStart: 1753, .NumOperands: 3, .NumConds: 2 },
7180 {.AsmStrOffset: 6007, .AliasCondStart: 1755, .NumOperands: 3, .NumConds: 2 },
7181 {.AsmStrOffset: 6021, .AliasCondStart: 1757, .NumOperands: 3, .NumConds: 2 },
7182 {.AsmStrOffset: 6037, .AliasCondStart: 1759, .NumOperands: 3, .NumConds: 2 },
7183 {.AsmStrOffset: 6053, .AliasCondStart: 1761, .NumOperands: 3, .NumConds: 2 },
7184 {.AsmStrOffset: 6068, .AliasCondStart: 1763, .NumOperands: 3, .NumConds: 2 },
7185 // PPC::gBCLA - 566
7186 {.AsmStrOffset: 6083, .AliasCondStart: 1765, .NumOperands: 3, .NumConds: 2 },
7187 {.AsmStrOffset: 6097, .AliasCondStart: 1767, .NumOperands: 3, .NumConds: 2 },
7188 {.AsmStrOffset: 6111, .AliasCondStart: 1769, .NumOperands: 3, .NumConds: 2 },
7189 {.AsmStrOffset: 6126, .AliasCondStart: 1771, .NumOperands: 3, .NumConds: 2 },
7190 {.AsmStrOffset: 6141, .AliasCondStart: 1773, .NumOperands: 3, .NumConds: 2 },
7191 {.AsmStrOffset: 6156, .AliasCondStart: 1775, .NumOperands: 3, .NumConds: 2 },
7192 {.AsmStrOffset: 6171, .AliasCondStart: 1777, .NumOperands: 3, .NumConds: 2 },
7193 {.AsmStrOffset: 6188, .AliasCondStart: 1779, .NumOperands: 3, .NumConds: 2 },
7194 {.AsmStrOffset: 6205, .AliasCondStart: 1781, .NumOperands: 3, .NumConds: 2 },
7195 {.AsmStrOffset: 6221, .AliasCondStart: 1783, .NumOperands: 3, .NumConds: 2 },
7196 // PPC::gBCLAat - 576
7197 {.AsmStrOffset: 6237, .AliasCondStart: 1785, .NumOperands: 4, .NumConds: 3 },
7198 {.AsmStrOffset: 6258, .AliasCondStart: 1788, .NumOperands: 4, .NumConds: 3 },
7199 // PPC::gBCLR - 578
7200 {.AsmStrOffset: 6279, .AliasCondStart: 1791, .NumOperands: 3, .NumConds: 3 },
7201 {.AsmStrOffset: 6293, .AliasCondStart: 1794, .NumOperands: 3, .NumConds: 3 },
7202 {.AsmStrOffset: 6301, .AliasCondStart: 1797, .NumOperands: 3, .NumConds: 3 },
7203 {.AsmStrOffset: 6309, .AliasCondStart: 1800, .NumOperands: 3, .NumConds: 3 },
7204 {.AsmStrOffset: 6318, .AliasCondStart: 1803, .NumOperands: 3, .NumConds: 3 },
7205 {.AsmStrOffset: 6327, .AliasCondStart: 1806, .NumOperands: 3, .NumConds: 3 },
7206 {.AsmStrOffset: 6336, .AliasCondStart: 1809, .NumOperands: 3, .NumConds: 3 },
7207 {.AsmStrOffset: 6345, .AliasCondStart: 1812, .NumOperands: 3, .NumConds: 3 },
7208 {.AsmStrOffset: 6356, .AliasCondStart: 1815, .NumOperands: 3, .NumConds: 3 },
7209 {.AsmStrOffset: 6367, .AliasCondStart: 1818, .NumOperands: 3, .NumConds: 3 },
7210 {.AsmStrOffset: 6377, .AliasCondStart: 1821, .NumOperands: 3, .NumConds: 3 },
7211 // PPC::gBCLRL - 589
7212 {.AsmStrOffset: 6387, .AliasCondStart: 1824, .NumOperands: 3, .NumConds: 3 },
7213 {.AsmStrOffset: 6402, .AliasCondStart: 1827, .NumOperands: 3, .NumConds: 3 },
7214 {.AsmStrOffset: 6411, .AliasCondStart: 1830, .NumOperands: 3, .NumConds: 3 },
7215 {.AsmStrOffset: 6420, .AliasCondStart: 1833, .NumOperands: 3, .NumConds: 3 },
7216 {.AsmStrOffset: 6430, .AliasCondStart: 1836, .NumOperands: 3, .NumConds: 3 },
7217 {.AsmStrOffset: 6440, .AliasCondStart: 1839, .NumOperands: 3, .NumConds: 3 },
7218 {.AsmStrOffset: 6450, .AliasCondStart: 1842, .NumOperands: 3, .NumConds: 3 },
7219 {.AsmStrOffset: 6460, .AliasCondStart: 1845, .NumOperands: 3, .NumConds: 3 },
7220 {.AsmStrOffset: 6472, .AliasCondStart: 1848, .NumOperands: 3, .NumConds: 3 },
7221 {.AsmStrOffset: 6484, .AliasCondStart: 1851, .NumOperands: 3, .NumConds: 3 },
7222 {.AsmStrOffset: 6495, .AliasCondStart: 1854, .NumOperands: 3, .NumConds: 3 },
7223 // PPC::gBCLat - 600
7224 {.AsmStrOffset: 6506, .AliasCondStart: 1857, .NumOperands: 4, .NumConds: 3 },
7225 {.AsmStrOffset: 6526, .AliasCondStart: 1860, .NumOperands: 4, .NumConds: 3 },
7226 // PPC::gBCat - 602
7227 {.AsmStrOffset: 6546, .AliasCondStart: 1863, .NumOperands: 4, .NumConds: 3 },
7228 {.AsmStrOffset: 6565, .AliasCondStart: 1866, .NumOperands: 4, .NumConds: 3 },
7229 };
7230
7231 static const AliasPatternCond Conds[] = {
7232 // (ADDI gprc:$rD, ZERO, s16imm:$imm) - 0
7233 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7234 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::ZERO},
7235 // (ADDI8 g8rc:$rD, ZERO8, s16imm64:$imm) - 2
7236 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7237 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::ZERO8},
7238 // (ADDIS gprc:$rD, ZERO, s17imm:$imm) - 4
7239 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7240 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::ZERO},
7241 // (ADDIS8 g8rc:$rD, ZERO8, s17imm64:$imm) - 6
7242 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7243 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::ZERO8},
7244 // (ADDPCIS g8rc:$RT, 0) - 8
7245 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7246 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7247 // (BCC (pred 12, crrc:$cc), condbrtarget:$dst) - 10
7248 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7249 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7250 // (BCC (pred 12, CR0), condbrtarget:$dst) - 12
7251 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7252 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7253 // (BCC (pred 14, crrc:$cc), condbrtarget:$dst) - 14
7254 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7255 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7256 // (BCC (pred 14, CR0), condbrtarget:$dst) - 16
7257 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7258 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7259 // (BCC (pred 15, crrc:$cc), condbrtarget:$dst) - 18
7260 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7261 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7262 // (BCC (pred 15, CR0), condbrtarget:$dst) - 20
7263 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7264 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7265 // (BCC (pred 44, crrc:$cc), condbrtarget:$dst) - 22
7266 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7267 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7268 // (BCC (pred 44, CR0), condbrtarget:$dst) - 24
7269 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7270 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7271 // (BCC (pred 46, crrc:$cc), condbrtarget:$dst) - 26
7272 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7273 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7274 // (BCC (pred 46, CR0), condbrtarget:$dst) - 28
7275 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7276 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7277 // (BCC (pred 47, crrc:$cc), condbrtarget:$dst) - 30
7278 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7279 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7280 // (BCC (pred 47, CR0), condbrtarget:$dst) - 32
7281 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7282 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7283 // (BCC (pred 76, crrc:$cc), condbrtarget:$dst) - 34
7284 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7285 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7286 // (BCC (pred 76, CR0), condbrtarget:$dst) - 36
7287 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7288 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7289 // (BCC (pred 78, crrc:$cc), condbrtarget:$dst) - 38
7290 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7291 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7292 // (BCC (pred 78, CR0), condbrtarget:$dst) - 40
7293 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7294 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7295 // (BCC (pred 79, crrc:$cc), condbrtarget:$dst) - 42
7296 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7297 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7298 // (BCC (pred 79, CR0), condbrtarget:$dst) - 44
7299 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7300 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7301 // (BCC (pred 68, crrc:$cc), condbrtarget:$dst) - 46
7302 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7303 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7304 // (BCC (pred 68, CR0), condbrtarget:$dst) - 48
7305 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7306 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7307 // (BCC (pred 70, crrc:$cc), condbrtarget:$dst) - 50
7308 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7309 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7310 // (BCC (pred 70, CR0), condbrtarget:$dst) - 52
7311 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7312 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7313 // (BCC (pred 71, crrc:$cc), condbrtarget:$dst) - 54
7314 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7315 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7316 // (BCC (pred 71, CR0), condbrtarget:$dst) - 56
7317 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7318 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7319 // (BCCA (pred 12, crrc:$cc), abscondbrtarget:$dst) - 58
7320 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7321 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7322 // (BCCA (pred 12, CR0), abscondbrtarget:$dst) - 60
7323 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7324 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7325 // (BCCA (pred 14, crrc:$cc), abscondbrtarget:$dst) - 62
7326 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7327 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7328 // (BCCA (pred 14, CR0), abscondbrtarget:$dst) - 64
7329 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7330 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7331 // (BCCA (pred 15, crrc:$cc), abscondbrtarget:$dst) - 66
7332 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7333 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7334 // (BCCA (pred 15, CR0), abscondbrtarget:$dst) - 68
7335 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7336 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7337 // (BCCA (pred 44, crrc:$cc), abscondbrtarget:$dst) - 70
7338 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7339 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7340 // (BCCA (pred 44, CR0), abscondbrtarget:$dst) - 72
7341 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7342 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7343 // (BCCA (pred 46, crrc:$cc), abscondbrtarget:$dst) - 74
7344 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7345 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7346 // (BCCA (pred 46, CR0), abscondbrtarget:$dst) - 76
7347 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7348 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7349 // (BCCA (pred 47, crrc:$cc), abscondbrtarget:$dst) - 78
7350 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7351 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7352 // (BCCA (pred 47, CR0), abscondbrtarget:$dst) - 80
7353 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7354 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7355 // (BCCA (pred 76, crrc:$cc), abscondbrtarget:$dst) - 82
7356 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7357 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7358 // (BCCA (pred 76, CR0), abscondbrtarget:$dst) - 84
7359 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7360 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7361 // (BCCA (pred 78, crrc:$cc), abscondbrtarget:$dst) - 86
7362 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7363 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7364 // (BCCA (pred 78, CR0), abscondbrtarget:$dst) - 88
7365 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7366 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7367 // (BCCA (pred 79, crrc:$cc), abscondbrtarget:$dst) - 90
7368 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7369 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7370 // (BCCA (pred 79, CR0), abscondbrtarget:$dst) - 92
7371 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7372 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7373 // (BCCA (pred 68, crrc:$cc), abscondbrtarget:$dst) - 94
7374 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7375 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7376 // (BCCA (pred 68, CR0), abscondbrtarget:$dst) - 96
7377 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7378 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7379 // (BCCA (pred 70, crrc:$cc), abscondbrtarget:$dst) - 98
7380 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7381 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7382 // (BCCA (pred 70, CR0), abscondbrtarget:$dst) - 100
7383 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7384 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7385 // (BCCA (pred 71, crrc:$cc), abscondbrtarget:$dst) - 102
7386 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7387 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7388 // (BCCA (pred 71, CR0), abscondbrtarget:$dst) - 104
7389 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7390 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7391 // (BCCCTR (pred 12, crrc:$cc)) - 106
7392 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7393 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7394 // (BCCCTR (pred 12, CR0)) - 108
7395 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7396 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7397 // (BCCCTR (pred 14, crrc:$cc)) - 110
7398 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7399 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7400 // (BCCCTR (pred 14, CR0)) - 112
7401 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7402 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7403 // (BCCCTR (pred 15, crrc:$cc)) - 114
7404 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7405 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7406 // (BCCCTR (pred 15, CR0)) - 116
7407 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7408 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7409 // (BCCCTR (pred 44, crrc:$cc)) - 118
7410 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7411 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7412 // (BCCCTR (pred 44, CR0)) - 120
7413 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7414 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7415 // (BCCCTR (pred 46, crrc:$cc)) - 122
7416 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7417 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7418 // (BCCCTR (pred 46, CR0)) - 124
7419 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7420 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7421 // (BCCCTR (pred 47, crrc:$cc)) - 126
7422 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7423 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7424 // (BCCCTR (pred 47, CR0)) - 128
7425 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7426 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7427 // (BCCCTR (pred 76, crrc:$cc)) - 130
7428 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7429 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7430 // (BCCCTR (pred 76, CR0)) - 132
7431 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7432 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7433 // (BCCCTR (pred 78, crrc:$cc)) - 134
7434 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7435 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7436 // (BCCCTR (pred 78, CR0)) - 136
7437 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7438 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7439 // (BCCCTR (pred 79, crrc:$cc)) - 138
7440 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7441 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7442 // (BCCCTR (pred 79, CR0)) - 140
7443 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7444 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7445 // (BCCCTR (pred 68, crrc:$cc)) - 142
7446 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7447 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7448 // (BCCCTR (pred 68, CR0)) - 144
7449 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7450 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7451 // (BCCCTR (pred 70, crrc:$cc)) - 146
7452 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7453 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7454 // (BCCCTR (pred 70, CR0)) - 148
7455 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7456 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7457 // (BCCCTR (pred 71, crrc:$cc)) - 150
7458 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7459 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7460 // (BCCCTR (pred 71, CR0)) - 152
7461 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7462 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7463 // (BCCCTRL (pred 12, crrc:$cc)) - 154
7464 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7465 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7466 // (BCCCTRL (pred 12, CR0)) - 156
7467 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7468 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7469 // (BCCCTRL (pred 14, crrc:$cc)) - 158
7470 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7471 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7472 // (BCCCTRL (pred 14, CR0)) - 160
7473 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7474 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7475 // (BCCCTRL (pred 15, crrc:$cc)) - 162
7476 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7477 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7478 // (BCCCTRL (pred 15, CR0)) - 164
7479 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7480 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7481 // (BCCCTRL (pred 44, crrc:$cc)) - 166
7482 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7483 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7484 // (BCCCTRL (pred 44, CR0)) - 168
7485 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7486 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7487 // (BCCCTRL (pred 46, crrc:$cc)) - 170
7488 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7489 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7490 // (BCCCTRL (pred 46, CR0)) - 172
7491 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7492 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7493 // (BCCCTRL (pred 47, crrc:$cc)) - 174
7494 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7495 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7496 // (BCCCTRL (pred 47, CR0)) - 176
7497 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7498 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7499 // (BCCCTRL (pred 76, crrc:$cc)) - 178
7500 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7501 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7502 // (BCCCTRL (pred 76, CR0)) - 180
7503 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7504 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7505 // (BCCCTRL (pred 78, crrc:$cc)) - 182
7506 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7507 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7508 // (BCCCTRL (pred 78, CR0)) - 184
7509 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7510 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7511 // (BCCCTRL (pred 79, crrc:$cc)) - 186
7512 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7513 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7514 // (BCCCTRL (pred 79, CR0)) - 188
7515 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7516 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7517 // (BCCCTRL (pred 68, crrc:$cc)) - 190
7518 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7519 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7520 // (BCCCTRL (pred 68, CR0)) - 192
7521 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7522 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7523 // (BCCCTRL (pred 70, crrc:$cc)) - 194
7524 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7525 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7526 // (BCCCTRL (pred 70, CR0)) - 196
7527 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7528 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7529 // (BCCCTRL (pred 71, crrc:$cc)) - 198
7530 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7531 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7532 // (BCCCTRL (pred 71, CR0)) - 200
7533 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7534 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7535 // (BCCL (pred 12, crrc:$cc), condbrtarget:$dst) - 202
7536 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7537 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7538 // (BCCL (pred 12, CR0), condbrtarget:$dst) - 204
7539 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7540 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7541 // (BCCL (pred 14, crrc:$cc), condbrtarget:$dst) - 206
7542 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7543 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7544 // (BCCL (pred 14, CR0), condbrtarget:$dst) - 208
7545 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7546 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7547 // (BCCL (pred 15, crrc:$cc), condbrtarget:$dst) - 210
7548 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7549 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7550 // (BCCL (pred 15, CR0), condbrtarget:$dst) - 212
7551 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7552 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7553 // (BCCL (pred 44, crrc:$cc), condbrtarget:$dst) - 214
7554 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7555 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7556 // (BCCL (pred 44, CR0), condbrtarget:$dst) - 216
7557 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7558 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7559 // (BCCL (pred 46, crrc:$cc), condbrtarget:$dst) - 218
7560 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7561 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7562 // (BCCL (pred 46, CR0), condbrtarget:$dst) - 220
7563 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7564 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7565 // (BCCL (pred 47, crrc:$cc), condbrtarget:$dst) - 222
7566 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7567 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7568 // (BCCL (pred 47, CR0), condbrtarget:$dst) - 224
7569 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7570 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7571 // (BCCL (pred 76, crrc:$cc), condbrtarget:$dst) - 226
7572 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7573 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7574 // (BCCL (pred 76, CR0), condbrtarget:$dst) - 228
7575 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7576 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7577 // (BCCL (pred 78, crrc:$cc), condbrtarget:$dst) - 230
7578 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7579 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7580 // (BCCL (pred 78, CR0), condbrtarget:$dst) - 232
7581 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7582 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7583 // (BCCL (pred 79, crrc:$cc), condbrtarget:$dst) - 234
7584 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7585 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7586 // (BCCL (pred 79, CR0), condbrtarget:$dst) - 236
7587 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7588 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7589 // (BCCL (pred 68, crrc:$cc), condbrtarget:$dst) - 238
7590 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7591 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7592 // (BCCL (pred 68, CR0), condbrtarget:$dst) - 240
7593 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7594 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7595 // (BCCL (pred 70, crrc:$cc), condbrtarget:$dst) - 242
7596 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7597 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7598 // (BCCL (pred 70, CR0), condbrtarget:$dst) - 244
7599 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7600 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7601 // (BCCL (pred 71, crrc:$cc), condbrtarget:$dst) - 246
7602 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7603 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7604 // (BCCL (pred 71, CR0), condbrtarget:$dst) - 248
7605 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7606 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7607 // (BCCLA (pred 12, crrc:$cc), abscondbrtarget:$dst) - 250
7608 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7609 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7610 // (BCCLA (pred 12, CR0), abscondbrtarget:$dst) - 252
7611 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7612 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7613 // (BCCLA (pred 14, crrc:$cc), abscondbrtarget:$dst) - 254
7614 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7615 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7616 // (BCCLA (pred 14, CR0), abscondbrtarget:$dst) - 256
7617 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7618 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7619 // (BCCLA (pred 15, crrc:$cc), abscondbrtarget:$dst) - 258
7620 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7621 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7622 // (BCCLA (pred 15, CR0), abscondbrtarget:$dst) - 260
7623 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7624 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7625 // (BCCLA (pred 44, crrc:$cc), abscondbrtarget:$dst) - 262
7626 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7627 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7628 // (BCCLA (pred 44, CR0), abscondbrtarget:$dst) - 264
7629 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7630 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7631 // (BCCLA (pred 46, crrc:$cc), abscondbrtarget:$dst) - 266
7632 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7633 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7634 // (BCCLA (pred 46, CR0), abscondbrtarget:$dst) - 268
7635 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7636 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7637 // (BCCLA (pred 47, crrc:$cc), abscondbrtarget:$dst) - 270
7638 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7639 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7640 // (BCCLA (pred 47, CR0), abscondbrtarget:$dst) - 272
7641 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7642 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7643 // (BCCLA (pred 76, crrc:$cc), abscondbrtarget:$dst) - 274
7644 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7645 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7646 // (BCCLA (pred 76, CR0), abscondbrtarget:$dst) - 276
7647 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7648 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7649 // (BCCLA (pred 78, crrc:$cc), abscondbrtarget:$dst) - 278
7650 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7651 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7652 // (BCCLA (pred 78, CR0), abscondbrtarget:$dst) - 280
7653 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7654 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7655 // (BCCLA (pred 79, crrc:$cc), abscondbrtarget:$dst) - 282
7656 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7657 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7658 // (BCCLA (pred 79, CR0), abscondbrtarget:$dst) - 284
7659 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7660 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7661 // (BCCLA (pred 68, crrc:$cc), abscondbrtarget:$dst) - 286
7662 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7663 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7664 // (BCCLA (pred 68, CR0), abscondbrtarget:$dst) - 288
7665 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7666 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7667 // (BCCLA (pred 70, crrc:$cc), abscondbrtarget:$dst) - 290
7668 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7669 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7670 // (BCCLA (pred 70, CR0), abscondbrtarget:$dst) - 292
7671 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7672 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7673 // (BCCLA (pred 71, crrc:$cc), abscondbrtarget:$dst) - 294
7674 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7675 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7676 // (BCCLA (pred 71, CR0), abscondbrtarget:$dst) - 296
7677 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7678 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7679 // (BCCLR (pred 12, crrc:$cc)) - 298
7680 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7681 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7682 // (BCCLR (pred 12, CR0)) - 300
7683 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7684 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7685 // (BCCLR (pred 14, crrc:$cc)) - 302
7686 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7687 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7688 // (BCCLR (pred 14, CR0)) - 304
7689 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7690 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7691 // (BCCLR (pred 15, crrc:$cc)) - 306
7692 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7693 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7694 // (BCCLR (pred 15, CR0)) - 308
7695 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7696 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7697 // (BCCLR (pred 44, crrc:$cc)) - 310
7698 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7699 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7700 // (BCCLR (pred 44, CR0)) - 312
7701 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7702 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7703 // (BCCLR (pred 46, crrc:$cc)) - 314
7704 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7705 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7706 // (BCCLR (pred 46, CR0)) - 316
7707 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7708 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7709 // (BCCLR (pred 47, crrc:$cc)) - 318
7710 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7711 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7712 // (BCCLR (pred 47, CR0)) - 320
7713 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7714 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7715 // (BCCLR (pred 76, crrc:$cc)) - 322
7716 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7717 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7718 // (BCCLR (pred 76, CR0)) - 324
7719 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7720 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7721 // (BCCLR (pred 78, crrc:$cc)) - 326
7722 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7723 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7724 // (BCCLR (pred 78, CR0)) - 328
7725 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7726 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7727 // (BCCLR (pred 79, crrc:$cc)) - 330
7728 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7729 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7730 // (BCCLR (pred 79, CR0)) - 332
7731 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7732 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7733 // (BCCLR (pred 68, crrc:$cc)) - 334
7734 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7735 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7736 // (BCCLR (pred 68, CR0)) - 336
7737 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7738 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7739 // (BCCLR (pred 70, crrc:$cc)) - 338
7740 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7741 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7742 // (BCCLR (pred 70, CR0)) - 340
7743 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7744 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7745 // (BCCLR (pred 71, crrc:$cc)) - 342
7746 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7747 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7748 // (BCCLR (pred 71, CR0)) - 344
7749 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7750 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7751 // (BCCLRL (pred 12, crrc:$cc)) - 346
7752 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7753 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7754 // (BCCLRL (pred 12, CR0)) - 348
7755 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7756 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7757 // (BCCLRL (pred 14, crrc:$cc)) - 350
7758 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7759 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7760 // (BCCLRL (pred 14, CR0)) - 352
7761 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
7762 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7763 // (BCCLRL (pred 15, crrc:$cc)) - 354
7764 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7765 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7766 // (BCCLRL (pred 15, CR0)) - 356
7767 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
7768 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7769 // (BCCLRL (pred 44, crrc:$cc)) - 358
7770 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7771 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7772 // (BCCLRL (pred 44, CR0)) - 360
7773 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(44)},
7774 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7775 // (BCCLRL (pred 46, crrc:$cc)) - 362
7776 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7777 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7778 // (BCCLRL (pred 46, CR0)) - 364
7779 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(46)},
7780 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7781 // (BCCLRL (pred 47, crrc:$cc)) - 366
7782 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7783 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7784 // (BCCLRL (pred 47, CR0)) - 368
7785 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(47)},
7786 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7787 // (BCCLRL (pred 76, crrc:$cc)) - 370
7788 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7789 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7790 // (BCCLRL (pred 76, CR0)) - 372
7791 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(76)},
7792 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7793 // (BCCLRL (pred 78, crrc:$cc)) - 374
7794 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7795 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7796 // (BCCLRL (pred 78, CR0)) - 376
7797 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(78)},
7798 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7799 // (BCCLRL (pred 79, crrc:$cc)) - 378
7800 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7801 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7802 // (BCCLRL (pred 79, CR0)) - 380
7803 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(79)},
7804 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7805 // (BCCLRL (pred 68, crrc:$cc)) - 382
7806 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7807 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7808 // (BCCLRL (pred 68, CR0)) - 384
7809 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(68)},
7810 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7811 // (BCCLRL (pred 70, crrc:$cc)) - 386
7812 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7813 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7814 // (BCCLRL (pred 70, CR0)) - 388
7815 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(70)},
7816 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7817 // (BCCLRL (pred 71, crrc:$cc)) - 390
7818 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7819 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRRCRegClassID},
7820 // (BCCLRL (pred 71, CR0)) - 392
7821 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(71)},
7822 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7823 // (CMPD CR0, g8rc:$rA, g8rc:$rB) - 394
7824 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7825 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7826 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7827 // (CMPDI CR0, g8rc:$rA, s16imm64:$imm) - 397
7828 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7829 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7830 // (CMPLD CR0, g8rc:$rA, g8rc:$rB) - 399
7831 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7832 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7833 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7834 // (CMPLDI CR0, g8rc:$rA, u16imm64:$imm) - 402
7835 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7836 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7837 // (CMPLW CR0, gprc:$rA, gprc:$rB) - 404
7838 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7839 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7840 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7841 // (CMPLWI CR0, gprc:$rA, u16imm:$imm) - 407
7842 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7843 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7844 // (CMPW CR0, gprc:$rA, gprc:$rB) - 409
7845 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7846 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7847 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7848 // (CMPWI CR0, gprc:$rA, s16imm:$imm) - 412
7849 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0},
7850 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7851 // (CNTLZW gprc:$rA, gprc:$rS) - 414
7852 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7853 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7854 // (CNTLZW8 g8rc:$rA, g8rc:$rS) - 416
7855 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7856 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7857 // (CNTLZW8_rec g8rc:$rA, g8rc:$rS) - 418
7858 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7859 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7860 // (CNTLZW_rec gprc:$rA, gprc:$rS) - 420
7861 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7862 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7863 // (CP_PASTE_rec gprc:$RA, gprc:$RB, 1) - 422
7864 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7865 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7866 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
7867 // (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) - 425
7868 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
7869 {.Kind: AliasPatternCond::K_TiedReg, .Value: 0},
7870 {.Kind: AliasPatternCond::K_TiedReg, .Value: 0},
7871 // (CRNOR crbitrc:$bx, crbitrc:$by, crbitrc:$by) - 428
7872 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
7873 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
7874 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
7875 // (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by) - 431
7876 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
7877 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
7878 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
7879 // (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) - 434
7880 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
7881 {.Kind: AliasPatternCond::K_TiedReg, .Value: 0},
7882 {.Kind: AliasPatternCond::K_TiedReg, .Value: 0},
7883 // (DMSHA2HASH dmr:$AT, dmr:$AB, 0) - 437
7884 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7885 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7886 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7887 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7888 // (DMSHA2HASH dmr:$AT, dmr:$AB, 1) - 441
7889 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7890 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7891 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7892 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
7893 // (DMSHA3HASH dmrp:$ATp, 0) - 445
7894 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRpRCRegClassID},
7895 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7896 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7897 // (DMSHA3HASH dmrp:$ATp, 12) - 448
7898 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRpRCRegClassID},
7899 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7900 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
7901 // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 0, u1imm:$E, 0) - 451
7902 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7903 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7904 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
7905 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7906 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7907 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7908 // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 0, u1imm:$E, 1) - 457
7909 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7910 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7911 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
7912 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7913 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7914 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
7915 // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 0, u1imm:$E, 2) - 463
7916 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7917 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7918 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
7919 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7920 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7921 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
7922 // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 0, u1imm:$E, 3) - 469
7923 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7924 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7925 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
7926 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7927 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7928 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
7929 // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 1, u1imm:$E, 0) - 475
7930 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7931 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7932 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
7933 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
7934 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7935 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7936 // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 1, u1imm:$E, 1) - 481
7937 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7938 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7939 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
7940 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
7941 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7942 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
7943 // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 2, 0, 0) - 487
7944 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7945 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7946 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
7947 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
7948 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7949 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7950 // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 3, 0, 0) - 493
7951 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::DMRRCRegClassID},
7952 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
7953 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
7954 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
7955 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7956 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7957 // (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0LT) - 499
7958 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7959 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRC_NOR0RegClassID},
7960 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7961 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0LT},
7962 // (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0GT) - 503
7963 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7964 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRC_NOR0RegClassID},
7965 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7966 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0GT},
7967 // (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0EQ) - 507
7968 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7969 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRC_NOR0RegClassID},
7970 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7971 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0EQ},
7972 // (ISEL8 g8rc:$rT, g8rc_nox0:$rA, g8rc:$rB, CR0LT) - 511
7973 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7974 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RC_NOX0RegClassID},
7975 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7976 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0LT},
7977 // (ISEL8 g8rc:$rT, g8rc_nox0:$rA, g8rc:$rB, CR0GT) - 515
7978 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7979 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RC_NOX0RegClassID},
7980 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7981 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0GT},
7982 // (ISEL8 g8rc:$rT, g8rc_nox0:$rA, g8rc:$rB, CR0EQ) - 519
7983 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7984 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RC_NOX0RegClassID},
7985 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
7986 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::CR0EQ},
7987 // (MBAR 0) - 523
7988 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
7989 // (MFDCR gprc:$Rx, 128) - 524
7990 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7991 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(128)},
7992 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
7993 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
7994 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
7995 // (MFDCR gprc:$Rx, 129) - 529
7996 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
7997 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(129)},
7998 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
7999 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8000 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8001 // (MFDCR gprc:$Rx, 130) - 534
8002 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8003 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(130)},
8004 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8005 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8006 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8007 // (MFDCR gprc:$Rx, 131) - 539
8008 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8009 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(131)},
8010 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8011 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8012 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8013 // (MFDCR gprc:$Rx, 132) - 544
8014 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8015 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(132)},
8016 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8017 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8018 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8019 // (MFDCR gprc:$Rx, 133) - 549
8020 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8021 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(133)},
8022 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8023 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8024 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8025 // (MFDCR gprc:$Rx, 134) - 554
8026 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8027 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(134)},
8028 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8029 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8030 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8031 // (MFDCR gprc:$Rx, 135) - 559
8032 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8033 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(135)},
8034 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8035 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8036 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8037 // (MFSPR gprc:$Rx, 1) - 564
8038 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8039 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
8040 // (MFSPR gprc:$Rx, 3) - 566
8041 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8042 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
8043 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8044 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8045 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8046 // (MFSPR gprc:$Rx, 4) - 571
8047 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8048 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
8049 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8050 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8051 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8052 // (MFSPR gprc:$Rx, 5) - 576
8053 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8054 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(5)},
8055 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8056 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8057 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8058 // (MFSPR gprc:$Rx, 8) - 581
8059 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8060 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
8061 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8062 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8063 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8064 // (MFSPR gprc:$Rx, 9) - 586
8065 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8066 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(9)},
8067 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8068 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8069 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8070 // (MFSPR gprc:$Rx, 13) - 591
8071 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8072 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(13)},
8073 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8074 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8075 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8076 // (MFSPR gprc:$Rx, 17) - 596
8077 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8078 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(17)},
8079 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8080 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8081 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8082 // (MFSPR gprc:$Rx, 18) - 601
8083 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8084 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(18)},
8085 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8086 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8087 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8088 // (MFSPR gprc:$Rx, 19) - 606
8089 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8090 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(19)},
8091 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8092 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8093 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8094 // (MFSPR gprc:$Rx, 22) - 611
8095 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8096 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(22)},
8097 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8098 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8099 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8100 // (MFSPR gprc:$Rx, 25) - 616
8101 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8102 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(25)},
8103 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8104 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8105 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8106 // (MFSPR gprc:$Rx, 26) - 621
8107 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8108 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(26)},
8109 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8110 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8111 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8112 // (MFSPR gprc:$Rx, 27) - 626
8113 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8114 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(27)},
8115 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8116 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8117 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8118 // (MFSPR gprc:$Rx, 28) - 631
8119 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8120 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(28)},
8121 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8122 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8123 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8124 // (MFSPR gprc:$Rx, 29) - 636
8125 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8126 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(29)},
8127 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8128 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8129 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8130 // (MFSPR gprc:$RT, 280) - 641
8131 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8132 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(280)},
8133 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8134 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8135 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8136 // (MFSPR gprc:$RT, 287) - 646
8137 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8138 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(287)},
8139 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8140 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8141 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8142 // (MFSPR gprc:$Rx, 512) - 651
8143 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8144 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(512)},
8145 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8146 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8147 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8148 // (MFSPR gprc:$Rx, 536) - 656
8149 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8150 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(536)},
8151 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8152 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8153 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8154 // (MFSPR gprc:$Rx, 537) - 661
8155 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8156 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(537)},
8157 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8158 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8159 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8160 // (MFSPR gprc:$Rx, 528) - 666
8161 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8162 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(528)},
8163 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8164 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8165 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8166 // (MFSPR gprc:$Rx, 529) - 671
8167 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8168 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(529)},
8169 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8170 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8171 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8172 // (MFSPR gprc:$Rx, 538) - 676
8173 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8174 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(538)},
8175 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8176 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8177 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8178 // (MFSPR gprc:$Rx, 539) - 681
8179 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8180 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(539)},
8181 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8182 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8183 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8184 // (MFSPR gprc:$Rx, 530) - 686
8185 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8186 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(530)},
8187 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8188 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8189 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8190 // (MFSPR gprc:$Rx, 531) - 691
8191 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8192 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(531)},
8193 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8194 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8195 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8196 // (MFSPR gprc:$Rx, 540) - 696
8197 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8198 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(540)},
8199 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8200 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8201 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8202 // (MFSPR gprc:$Rx, 541) - 701
8203 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8204 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(541)},
8205 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8206 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8207 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8208 // (MFSPR gprc:$Rx, 532) - 706
8209 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8210 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(532)},
8211 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8212 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8213 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8214 // (MFSPR gprc:$Rx, 533) - 711
8215 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8216 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(533)},
8217 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8218 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8219 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8220 // (MFSPR gprc:$Rx, 542) - 716
8221 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8222 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(542)},
8223 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8224 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8225 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8226 // (MFSPR gprc:$Rx, 543) - 721
8227 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8228 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(543)},
8229 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8230 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8231 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8232 // (MFSPR gprc:$Rx, 534) - 726
8233 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8234 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(534)},
8235 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8236 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8237 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8238 // (MFSPR gprc:$Rx, 535) - 731
8239 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8240 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(535)},
8241 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8242 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8243 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8244 // (MFSPR gprc:$RT, 896) - 736
8245 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8246 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(896)},
8247 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8248 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8249 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8250 // (MFSPR gprc:$Rx, 980) - 741
8251 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8252 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(980)},
8253 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8254 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8255 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8256 // (MFSPR gprc:$Rx, 981) - 746
8257 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8258 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(981)},
8259 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8260 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8261 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8262 // (MFSPR gprc:$Rx, 986) - 751
8263 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8264 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(986)},
8265 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8266 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8267 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8268 // (MFSPR gprc:$Rx, 988) - 756
8269 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8270 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(988)},
8271 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8272 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8273 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8274 // (MFSPR gprc:$Rx, 989) - 761
8275 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8276 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(989)},
8277 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8278 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8279 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8280 // (MFSPR gprc:$Rx, 990) - 766
8281 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8282 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(990)},
8283 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8284 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8285 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8286 // (MFSPR gprc:$Rx, 991) - 771
8287 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8288 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(991)},
8289 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8290 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8291 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8292 // (MFSPR gprc:$Rx, 1018) - 776
8293 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8294 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1018)},
8295 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8296 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8297 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8298 // (MFSPR gprc:$Rx, 1019) - 781
8299 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8300 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1019)},
8301 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8302 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8303 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8304 // (MFSPR8 g8rc:$Rx, 1) - 786
8305 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8306 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
8307 // (MFSPR8 g8rc:$Rx, 3) - 788
8308 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8309 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
8310 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8311 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8312 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8313 // (MFSPR8 g8rc:$Rx, 4) - 793
8314 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8315 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
8316 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8317 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8318 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8319 // (MFSPR8 g8rc:$Rx, 5) - 798
8320 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8321 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(5)},
8322 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8323 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8324 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8325 // (MFSPR8 g8rc:$Rx, 8) - 803
8326 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8327 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
8328 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8329 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8330 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8331 // (MFSPR8 g8rc:$Rx, 9) - 808
8332 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8333 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(9)},
8334 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8335 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8336 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8337 // (MFSPR8 g8rc:$Rx, 13) - 813
8338 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8339 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(13)},
8340 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8341 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8342 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8343 // (MFSPR8 g8rc:$Rx, 17) - 818
8344 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8345 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(17)},
8346 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8347 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8348 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8349 // (MFSPR8 g8rc:$Rx, 18) - 823
8350 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8351 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(18)},
8352 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8353 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8354 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8355 // (MFSPR8 g8rc:$Rx, 19) - 828
8356 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8357 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(19)},
8358 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8359 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8360 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8361 // (MFSPR8 g8rc:$Rx, 22) - 833
8362 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8363 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(22)},
8364 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8365 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8366 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8367 // (MFSPR8 g8rc:$Rx, 25) - 838
8368 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8369 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(25)},
8370 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8371 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8372 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8373 // (MFSPR8 g8rc:$Rx, 26) - 843
8374 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8375 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(26)},
8376 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8377 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8378 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8379 // (MFSPR8 g8rc:$Rx, 27) - 848
8380 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8381 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(27)},
8382 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8383 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8384 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8385 // (MFSPR8 g8rc:$Rx, 28) - 853
8386 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8387 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(28)},
8388 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8389 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8390 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8391 // (MFSPR8 g8rc:$Rx, 29) - 858
8392 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8393 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(29)},
8394 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8395 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8396 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8397 // (MFSPR8 g8rc:$RT, 280) - 863
8398 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8399 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(280)},
8400 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8401 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8402 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8403 // (MFSPR8 g8rc:$RT, 287) - 868
8404 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8405 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(287)},
8406 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8407 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8408 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8409 // (MFSPR8 g8rc:$Rx, 512) - 873
8410 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8411 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(512)},
8412 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8413 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8414 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8415 // (MFTB gprc:$Rx, 269) - 878
8416 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8417 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(269)},
8418 // (MFUDSCR gprc:$Rx) - 880
8419 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8420 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8421 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8422 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8423 // (MFVRSAVE gprc:$rS) - 884
8424 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8425 // (MFVSRD g8rc:$rA, f8rc:$src) - 885
8426 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8427 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::F8RCRegClassID},
8428 // (MFVSRWZ gprc:$rA, f8rc:$src) - 887
8429 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8430 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::F8RCRegClassID},
8431 // (MTCRF 255, gprc:$rA) - 889
8432 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(255)},
8433 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8434 // (MTCRF8 255, g8rc:$rA) - 891
8435 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(255)},
8436 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8437 // (MTDCR gprc:$Rx, 128) - 893
8438 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8439 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(128)},
8440 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8441 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8442 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8443 // (MTDCR gprc:$Rx, 129) - 898
8444 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8445 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(129)},
8446 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8447 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8448 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8449 // (MTDCR gprc:$Rx, 130) - 903
8450 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8451 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(130)},
8452 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8453 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8454 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8455 // (MTDCR gprc:$Rx, 131) - 908
8456 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8457 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(131)},
8458 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8459 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8460 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8461 // (MTDCR gprc:$Rx, 132) - 913
8462 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8463 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(132)},
8464 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8465 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8466 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8467 // (MTDCR gprc:$Rx, 133) - 918
8468 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8469 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(133)},
8470 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8471 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8472 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8473 // (MTDCR gprc:$Rx, 134) - 923
8474 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8475 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(134)},
8476 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8477 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8478 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8479 // (MTDCR gprc:$Rx, 135) - 928
8480 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8481 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(135)},
8482 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8483 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8484 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8485 // (MTFSF i32imm:$FLM, f8rc:$FRB, 0, 0) - 933
8486 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8487 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::F8RCRegClassID},
8488 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8489 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8490 // (MTFSFI u3imm:$BF, u4imm:$U, 0) - 937
8491 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8492 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8493 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8494 // (MTFSFI_rec u3imm:$BF, u4imm:$U, 0) - 940
8495 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8496 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8497 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8498 // (MTFSF_rec i32imm:$FLM, f8rc:$FRB, 0, 0) - 943
8499 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8500 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::F8RCRegClassID},
8501 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8502 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8503 // (MTMSR gprc:$RS, 0) - 947
8504 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8505 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8506 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8507 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8508 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8509 // (MTMSRD gprc:$RS, 0) - 952
8510 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8511 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8512 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8513 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8514 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8515 // (MTSPR 1, gprc:$Rx) - 957
8516 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
8517 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8518 // (MTSPR 3, gprc:$Rx) - 959
8519 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
8520 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8521 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8522 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8523 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8524 // (MTSPR 8, gprc:$Rx) - 964
8525 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
8526 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8527 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8528 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8529 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8530 // (MTSPR 9, gprc:$Rx) - 969
8531 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(9)},
8532 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8533 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8534 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8535 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8536 // (MTSPR 13, gprc:$Rx) - 974
8537 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(13)},
8538 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8539 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8540 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8541 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8542 // (MTSPR 17, gprc:$Rx) - 979
8543 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(17)},
8544 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8545 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8546 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8547 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8548 // (MTSPR 18, gprc:$Rx) - 984
8549 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(18)},
8550 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8551 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8552 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8553 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8554 // (MTSPR 19, gprc:$Rx) - 989
8555 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(19)},
8556 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8557 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8558 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8559 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8560 // (MTSPR 22, gprc:$Rx) - 994
8561 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(22)},
8562 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8563 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8564 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8565 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8566 // (MTSPR 25, gprc:$Rx) - 999
8567 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(25)},
8568 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8569 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8570 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8571 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8572 // (MTSPR 26, gprc:$Rx) - 1004
8573 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(26)},
8574 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8575 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8576 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8577 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8578 // (MTSPR 27, gprc:$Rx) - 1009
8579 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(27)},
8580 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8581 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8582 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8583 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8584 // (MTSPR 28, gprc:$Rx) - 1014
8585 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(28)},
8586 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8587 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8588 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8589 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8590 // (MTSPR 29, gprc:$Rx) - 1019
8591 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(29)},
8592 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8593 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8594 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8595 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8596 // (MTSPR 280, gprc:$RT) - 1024
8597 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(280)},
8598 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8599 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8600 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8601 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8602 // (MTSPR 284, gprc:$Rx) - 1029
8603 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(284)},
8604 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8605 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8606 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8607 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8608 // (MTSPR 285, gprc:$Rx) - 1034
8609 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(285)},
8610 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8611 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8612 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8613 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8614 // (MTSPR 512, gprc:$Rx) - 1039
8615 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(512)},
8616 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8617 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8618 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8619 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8620 // (MTSPR 536, gprc:$Rx) - 1044
8621 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(536)},
8622 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8623 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8624 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8625 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8626 // (MTSPR 537, gprc:$Rx) - 1049
8627 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(537)},
8628 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8629 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8630 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8631 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8632 // (MTSPR 528, gprc:$Rx) - 1054
8633 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(528)},
8634 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8635 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8636 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8637 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8638 // (MTSPR 529, gprc:$Rx) - 1059
8639 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(529)},
8640 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8641 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8642 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8643 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8644 // (MTSPR 538, gprc:$Rx) - 1064
8645 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(538)},
8646 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8647 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8648 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8649 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8650 // (MTSPR 539, gprc:$Rx) - 1069
8651 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(539)},
8652 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8653 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8654 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8655 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8656 // (MTSPR 530, gprc:$Rx) - 1074
8657 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(530)},
8658 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8659 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8660 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8661 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8662 // (MTSPR 531, gprc:$Rx) - 1079
8663 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(531)},
8664 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8665 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8666 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8667 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8668 // (MTSPR 540, gprc:$Rx) - 1084
8669 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(540)},
8670 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8671 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8672 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8673 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8674 // (MTSPR 541, gprc:$Rx) - 1089
8675 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(541)},
8676 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8677 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8678 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8679 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8680 // (MTSPR 532, gprc:$Rx) - 1094
8681 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(532)},
8682 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8683 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8684 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8685 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8686 // (MTSPR 533, gprc:$Rx) - 1099
8687 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(533)},
8688 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8689 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8690 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8691 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8692 // (MTSPR 542, gprc:$Rx) - 1104
8693 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(542)},
8694 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8695 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8696 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8697 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8698 // (MTSPR 543, gprc:$Rx) - 1109
8699 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(543)},
8700 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8701 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8702 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8703 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8704 // (MTSPR 534, gprc:$Rx) - 1114
8705 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(534)},
8706 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8707 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8708 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8709 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8710 // (MTSPR 535, gprc:$Rx) - 1119
8711 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(535)},
8712 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8713 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8714 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8715 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8716 // (MTSPR 896, gprc:$RT) - 1124
8717 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(896)},
8718 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8719 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8720 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8721 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8722 // (MTSPR 980, gprc:$Rx) - 1129
8723 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(980)},
8724 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8725 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8726 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8727 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8728 // (MTSPR 981, gprc:$Rx) - 1134
8729 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(981)},
8730 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8731 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8732 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8733 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8734 // (MTSPR 986, gprc:$Rx) - 1139
8735 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(986)},
8736 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8737 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8738 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8739 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8740 // (MTSPR 988, gprc:$Rx) - 1144
8741 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(988)},
8742 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8743 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8744 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8745 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8746 // (MTSPR 989, gprc:$Rx) - 1149
8747 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(989)},
8748 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8749 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8750 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8751 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8752 // (MTSPR 990, gprc:$Rx) - 1154
8753 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(990)},
8754 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8755 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8756 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8757 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8758 // (MTSPR 991, gprc:$Rx) - 1159
8759 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(991)},
8760 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8761 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8762 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8763 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8764 // (MTSPR 1018, gprc:$Rx) - 1164
8765 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1018)},
8766 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8767 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8768 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8769 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8770 // (MTSPR 1019, gprc:$Rx) - 1169
8771 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1019)},
8772 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8773 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8774 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8775 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8776 // (MTSPR8 1, g8rc:$Rx) - 1174
8777 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
8778 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8779 // (MTSPR8 3, g8rc:$Rx) - 1176
8780 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
8781 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8782 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8783 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8784 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8785 // (MTSPR8 8, g8rc:$Rx) - 1181
8786 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
8787 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8788 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8789 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8790 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8791 // (MTSPR8 9, g8rc:$Rx) - 1186
8792 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(9)},
8793 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8794 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8795 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8796 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8797 // (MTSPR8 13, g8rc:$Rx) - 1191
8798 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(13)},
8799 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8800 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8801 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8802 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8803 // (MTSPR8 17, g8rc:$Rx) - 1196
8804 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(17)},
8805 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8806 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8807 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8808 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8809 // (MTSPR8 18, g8rc:$Rx) - 1201
8810 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(18)},
8811 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8812 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8813 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8814 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8815 // (MTSPR8 19, g8rc:$Rx) - 1206
8816 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(19)},
8817 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8818 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8819 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8820 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8821 // (MTSPR8 22, g8rc:$Rx) - 1211
8822 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(22)},
8823 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8824 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8825 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8826 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8827 // (MTSPR8 25, g8rc:$Rx) - 1216
8828 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(25)},
8829 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8830 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8831 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8832 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8833 // (MTSPR8 26, g8rc:$Rx) - 1221
8834 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(26)},
8835 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8836 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8837 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8838 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8839 // (MTSPR8 27, g8rc:$Rx) - 1226
8840 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(27)},
8841 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8842 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8843 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8844 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8845 // (MTSPR8 28, g8rc:$Rx) - 1231
8846 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(28)},
8847 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8848 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8849 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8850 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8851 // (MTSPR8 29, g8rc:$Rx) - 1236
8852 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(29)},
8853 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8854 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8855 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8856 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8857 // (MTSPR8 280, g8rc:$RT) - 1241
8858 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(280)},
8859 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8860 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8861 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8862 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8863 // (MTSPR8 284, g8rc:$Rx) - 1246
8864 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(284)},
8865 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8866 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8867 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8868 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8869 // (MTSPR8 285, g8rc:$Rx) - 1251
8870 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(285)},
8871 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8872 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8873 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8874 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8875 // (MTSPR8 512, g8rc:$Rx) - 1256
8876 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(512)},
8877 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8878 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8879 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8880 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8881 // (MTUDSCR gprc:$Rx) - 1261
8882 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8883 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
8884 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
8885 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
8886 // (MTVRSAVE gprc:$rS) - 1265
8887 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8888 // (MTVSRD f8rc:$dst, g8rc:$rA) - 1266
8889 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::F8RCRegClassID},
8890 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8891 // (MTVSRWA f8rc:$dst, gprc:$rA) - 1268
8892 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::F8RCRegClassID},
8893 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8894 // (MTVSRWZ f8rc:$dst, gprc:$rA) - 1270
8895 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::F8RCRegClassID},
8896 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8897 // (NOR gprc:$rA, gprc:$rS, gprc:$rS) - 1272
8898 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8899 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8900 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
8901 // (NOR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1275
8902 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8903 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8904 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
8905 // (NOR8_rec g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1278
8906 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8907 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8908 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
8909 // (NOR_rec gprc:$rA, gprc:$rS, gprc:$rS) - 1281
8910 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8911 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8912 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
8913 // (OR gprc:$rA, gprc:$rB, gprc:$rB) - 1284
8914 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8915 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8916 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
8917 // (OR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1287
8918 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8919 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8920 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
8921 // (OR8_rec g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1290
8922 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8923 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8924 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
8925 // (ORI R0, R0, 0) - 1293
8926 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
8927 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
8928 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8929 // (ORI8 X0, X0, 0) - 1296
8930 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::X0},
8931 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::X0},
8932 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8933 // (OR_rec gprc:$rA, gprc:$rB, gprc:$rB) - 1299
8934 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8935 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8936 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
8937 // (PADDI8 g8rc:$RT, g8rc_nox0:$RA, s34imm64:$SI) - 1302
8938 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8939 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RC_NOX0RegClassID},
8940 // (PADDIS gprc:$RT, ZERO, s32imm:$SI) - 1304
8941 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8942 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::ZERO},
8943 // (PADDIS8 g8rc:$RT, ZERO8, s32imm64:$SI) - 1306
8944 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8945 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::ZERO8},
8946 // (RFEBB 1) - 1308
8947 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
8948 // (RLDCL g8rc:$rA, g8rc:$rS, gprc:$rB, 0) - 1309
8949 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8950 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8951 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8952 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8953 // (RLDCL_rec g8rc:$rA, g8rc:$rS, gprc:$rB, 0) - 1313
8954 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8955 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8956 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8957 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8958 // (RLDICL g8rc:$rA, g8rc:$rS, u6imm:$n, 0) - 1317
8959 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8960 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8961 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8962 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8963 // (RLDICL g8rc:$rA, g8rc:$rS, 0, u6imm:$n) - 1321
8964 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8965 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8966 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8967 // (RLDICL_32_64 g8rc:$rA, gprc:$rS, u6imm:$n, 0) - 1324
8968 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8969 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8970 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8971 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8972 // (RLDICL_32_64 g8rc:$rA, gprc:$rS, 0, u6imm:$n) - 1328
8973 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8974 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8975 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8976 // (RLDICL_rec g8rc:$rA, g8rc:$rS, u6imm:$n, 0) - 1331
8977 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8978 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8979 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8980 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8981 // (RLDICL_rec g8rc:$rA, g8rc:$rS, 0, u6imm:$n) - 1335
8982 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8983 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8984 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8985 // (RLWINM gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) - 1338
8986 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8987 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8988 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8989 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8990 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
8991 // (RLWINM gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) - 1343
8992 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8993 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
8994 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
8995 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
8996 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
8997 // (RLWINM8 g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31) - 1348
8998 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
8999 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9000 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9001 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9002 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9003 // (RLWINM8 g8rc:$rA, g8rc:$rS, 0, u5imm:$n, 31) - 1353
9004 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9005 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9006 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9007 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9008 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9009 // (RLWINM8_rec g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31) - 1358
9010 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9011 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9012 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9013 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9014 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9015 // (RLWINM8_rec g8rc:$rA, g8rc:$rS, 0, u5imm:$n, 31) - 1363
9016 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9017 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9018 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9019 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9020 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9021 // (RLWINM_rec gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) - 1368
9022 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9023 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9024 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9025 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9026 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9027 // (RLWINM_rec gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) - 1373
9028 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9029 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9030 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9031 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9032 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9033 // (RLWNM gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) - 1378
9034 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9035 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9036 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9037 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9038 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9039 // (RLWNM8 g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31) - 1383
9040 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9041 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9042 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9043 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9044 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9045 // (RLWNM8_rec g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31) - 1388
9046 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9047 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9048 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9049 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9050 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9051 // (RLWNM_rec gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) - 1393
9052 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9053 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9054 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9055 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9056 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9057 // (SC 0) - 1398
9058 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9059 // (SUBF gprc:$rA, gprc:$rC, gprc:$rB) - 1399
9060 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9061 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9062 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9063 // (SUBF8 g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1402
9064 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9065 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9066 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9067 // (SUBF8_rec g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1405
9068 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9069 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9070 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9071 // (SUBFC gprc:$rA, gprc:$rC, gprc:$rB) - 1408
9072 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9073 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9074 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9075 // (SUBFC8 g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1411
9076 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9077 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9078 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9079 // (SUBFC8_rec g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1414
9080 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9081 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9082 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9083 // (SUBFC_rec gprc:$rA, gprc:$rC, gprc:$rB) - 1417
9084 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9085 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9086 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9087 // (SUBF_rec gprc:$rA, gprc:$rC, gprc:$rB) - 1420
9088 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9089 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9090 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9091 // (SYNC 0) - 1423
9092 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9093 // (SYNC 1) - 1424
9094 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9095 // (SYNC 2) - 1425
9096 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9097 // (SYNCP10 0, 0) - 1426
9098 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9099 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9100 // (SYNCP10 2, 0) - 1428
9101 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9102 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9103 // (SYNCP10 4, 0) - 1430
9104 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9105 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9106 // (SYNCP10 5, 0) - 1432
9107 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(5)},
9108 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9109 // (SYNCP10 u3imm:$L, 0) - 1434
9110 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9111 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9112 // (SYNCP10 1, 1) - 1436
9113 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9114 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9115 // (SYNCP10 0, 2) - 1438
9116 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9117 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9118 // (SYNCP10 0, 3) - 1440
9119 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9120 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9121 // (TD 16, g8rc:$rA, g8rc:$rB) - 1442
9122 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(16)},
9123 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9124 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9125 // (TD 4, g8rc:$rA, g8rc:$rB) - 1445
9126 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9127 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9128 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9129 // (TD 8, g8rc:$rA, g8rc:$rB) - 1448
9130 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9131 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9132 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9133 // (TD 24, g8rc:$rA, g8rc:$rB) - 1451
9134 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(24)},
9135 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9136 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9137 // (TD 2, g8rc:$rA, g8rc:$rB) - 1454
9138 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9139 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9140 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9141 // (TD 1, g8rc:$rA, g8rc:$rB) - 1457
9142 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9143 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9144 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9145 // (TD 31, g8rc:$rA, g8rc:$rB) - 1460
9146 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9147 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9148 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9149 // (TDI 16, g8rc:$rA, s16imm:$imm) - 1463
9150 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(16)},
9151 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9152 // (TDI 4, g8rc:$rA, s16imm:$imm) - 1465
9153 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9154 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9155 // (TDI 8, g8rc:$rA, s16imm:$imm) - 1467
9156 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9157 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9158 // (TDI 24, g8rc:$rA, s16imm:$imm) - 1469
9159 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(24)},
9160 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9161 // (TDI 2, g8rc:$rA, s16imm:$imm) - 1471
9162 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9163 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9164 // (TDI 1, g8rc:$rA, s16imm:$imm) - 1473
9165 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9166 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9167 // (TDI 31, g8rc:$rA, s16imm:$imm) - 1475
9168 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9169 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::G8RCRegClassID},
9170 // (TEND 0) - 1477
9171 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9172 // (TEND 1) - 1478
9173 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9174 // (TLBIE R0, gprc:$RB) - 1479
9175 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9176 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9177 // (TLBIEP9 gprc:$RB, gprc:$RS, 0, 0, 0) - 1481
9178 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9179 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9180 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9181 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9182 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9183 // (TLBILX 0, R0, R0) - 1486
9184 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9185 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9186 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9187 // (TLBILX 1, R0, R0) - 1489
9188 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9189 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9190 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9191 // (TLBILX 3, gprc:$RA, gprc:$RB) - 1492
9192 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9193 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9194 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9195 // (TLBILX 3, R0, gprc:$RB) - 1495
9196 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9197 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9198 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9199 // (TLBRE2 gprc:$RS, gprc:$A, 0) - 1498
9200 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9201 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9202 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9203 // (TLBRE2 gprc:$RS, gprc:$A, 1) - 1501
9204 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9205 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9206 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9207 // (TLBWE2 gprc:$RS, gprc:$A, 0) - 1504
9208 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9209 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9210 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9211 // (TLBWE2 gprc:$RS, gprc:$A, 1) - 1507
9212 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9213 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9214 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9215 // (TSR 0) - 1510
9216 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9217 // (TSR 1) - 1511
9218 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9219 // (TW 31, R0, R0) - 1512
9220 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9221 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9222 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9223 // (TW 16, gprc:$rA, gprc:$rB) - 1515
9224 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(16)},
9225 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9226 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9227 // (TW 4, gprc:$rA, gprc:$rB) - 1518
9228 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9229 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9230 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9231 // (TW 8, gprc:$rA, gprc:$rB) - 1521
9232 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9233 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9234 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9235 // (TW 24, gprc:$rA, gprc:$rB) - 1524
9236 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(24)},
9237 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9238 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9239 // (TW 2, gprc:$rA, gprc:$rB) - 1527
9240 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9241 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9242 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9243 // (TW 1, gprc:$rA, gprc:$rB) - 1530
9244 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9245 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9246 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9247 // (TW 31, gprc:$rA, gprc:$rB) - 1533
9248 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9249 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9250 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9251 // (TWI 16, gprc:$rA, s16imm:$imm) - 1536
9252 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(16)},
9253 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9254 // (TWI 4, gprc:$rA, s16imm:$imm) - 1538
9255 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9256 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9257 // (TWI 8, gprc:$rA, s16imm:$imm) - 1540
9258 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9259 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9260 // (TWI 24, gprc:$rA, s16imm:$imm) - 1542
9261 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(24)},
9262 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9263 // (TWI 2, gprc:$rA, s16imm:$imm) - 1544
9264 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9265 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9266 // (TWI 1, gprc:$rA, s16imm:$imm) - 1546
9267 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9268 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9269 // (TWI 31, gprc:$rA, s16imm:$imm) - 1548
9270 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(31)},
9271 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::GPRCRegClassID},
9272 // (VNOR vrrc:$vD, vrrc:$vA, vrrc:$vA) - 1550
9273 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VRRCRegClassID},
9274 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VRRCRegClassID},
9275 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
9276 // (VOR vrrc:$vD, vrrc:$vA, vrrc:$vA) - 1553
9277 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VRRCRegClassID},
9278 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VRRCRegClassID},
9279 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
9280 // (WAIT 0) - 1556
9281 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9282 // (WAIT 1) - 1557
9283 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9284 // (WAIT 2) - 1558
9285 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9286 // (WAITP10 0, 0) - 1559
9287 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9288 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9289 // (WAITP10 1, 0) - 1561
9290 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9291 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9292 // (XORI R0, R0, 0) - 1563
9293 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9294 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::R0},
9295 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9296 // (XORI8 X0, X0, 0) - 1566
9297 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::X0},
9298 {.Kind: AliasPatternCond::K_Reg, .Value: PPC::X0},
9299 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9300 // (XVCPSGNDP vsrc:$XT, vsrc:$XB, vsrc:$XB) - 1569
9301 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9302 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9303 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
9304 // (XVCPSGNSP vsrc:$XT, vsrc:$XB, vsrc:$XB) - 1572
9305 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9306 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9307 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
9308 // (XXAESDECP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 0) - 1575
9309 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9310 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9311 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9312 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9313 // (XXAESDECP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 1) - 1579
9314 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9315 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9316 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9317 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9318 // (XXAESDECP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 2) - 1583
9319 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9320 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9321 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9322 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9323 // (XXAESENCP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 0) - 1587
9324 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9325 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9326 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9327 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9328 // (XXAESENCP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 1) - 1591
9329 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9330 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9331 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9332 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9333 // (XXAESENCP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 2) - 1595
9334 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9335 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9336 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9337 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9338 // (XXAESGENLKP vsrprc:$XTp, vsrprc:$XBp, 0) - 1599
9339 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9340 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9341 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9342 // (XXAESGENLKP vsrprc:$XTp, vsrprc:$XBp, 1) - 1602
9343 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9344 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9345 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9346 // (XXAESGENLKP vsrprc:$XTp, vsrprc:$XBp, 2) - 1605
9347 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9348 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRpRCRegClassID},
9349 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9350 // (XXGFMUL128 vsrc:$XT, vsrc:$XA, vsrc:$XB, 0) - 1608
9351 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9352 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9353 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9354 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9355 // (XXGFMUL128 vsrc:$XT, vsrc:$XA, vsrc:$XB, 1) - 1612
9356 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9357 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9358 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9359 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(1)},
9360 // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 0) - 1616
9361 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9362 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9363 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
9364 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9365 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
9366 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
9367 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
9368 // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 3) - 1623
9369 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9370 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9371 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
9372 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9373 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
9374 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
9375 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
9376 // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 0) - 1630
9377 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9378 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9379 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9380 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9381 // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 3) - 1634
9382 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9383 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9384 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9385 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9386 // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 2) - 1638
9387 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9388 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9389 {.Kind: AliasPatternCond::K_TiedReg, .Value: 1},
9390 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9391 // (XXPERMDIs vsrc:$XT, vsfrc:$XB, 0) - 1642
9392 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9393 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSFRCRegClassID},
9394 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9395 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
9396 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
9397 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
9398 // (XXPERMDIs vsrc:$XT, vsfrc:$XB, 3) - 1648
9399 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9400 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSFRCRegClassID},
9401 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9402 {.Kind: AliasPatternCond::K_OrNegFeature, .Value: PPC::AIXOS},
9403 {.Kind: AliasPatternCond::K_OrFeature, .Value: PPC::FeatureModernAIXAs},
9404 {.Kind: AliasPatternCond::K_EndOrFeatures, .Value: 0},
9405 // (XXPERMDIs vsrc:$XT, vsfrc:$XB, 2) - 1654
9406 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSRCRegClassID},
9407 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::VSFRCRegClassID},
9408 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9409 // (gBC 12, crbitrc:$bi, condbrtarget:$dst) - 1657
9410 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
9411 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9412 // (gBC 4, crbitrc:$bi, condbrtarget:$dst) - 1659
9413 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9414 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9415 // (gBC 14, crbitrc:$bi, condbrtarget:$dst) - 1661
9416 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
9417 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9418 // (gBC 6, crbitrc:$bi, condbrtarget:$dst) - 1663
9419 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(6)},
9420 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9421 // (gBC 15, crbitrc:$bi, condbrtarget:$dst) - 1665
9422 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
9423 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9424 // (gBC 7, crbitrc:$bi, condbrtarget:$dst) - 1667
9425 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(7)},
9426 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9427 // (gBC 8, crbitrc:$bi, condbrtarget:$dst) - 1669
9428 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9429 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9430 // (gBC 0, crbitrc:$bi, condbrtarget:$dst) - 1671
9431 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9432 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9433 // (gBC 10, crbitrc:$bi, condbrtarget:$dst) - 1673
9434 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(10)},
9435 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9436 // (gBC 2, crbitrc:$bi, condbrtarget:$dst) - 1675
9437 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9438 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9439 // (gBCA 12, crbitrc:$bi, abscondbrtarget:$dst) - 1677
9440 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
9441 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9442 // (gBCA 4, crbitrc:$bi, abscondbrtarget:$dst) - 1679
9443 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9444 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9445 // (gBCA 14, crbitrc:$bi, abscondbrtarget:$dst) - 1681
9446 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
9447 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9448 // (gBCA 6, crbitrc:$bi, abscondbrtarget:$dst) - 1683
9449 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(6)},
9450 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9451 // (gBCA 15, crbitrc:$bi, abscondbrtarget:$dst) - 1685
9452 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
9453 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9454 // (gBCA 7, crbitrc:$bi, abscondbrtarget:$dst) - 1687
9455 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(7)},
9456 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9457 // (gBCA 8, crbitrc:$bi, abscondbrtarget:$dst) - 1689
9458 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9459 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9460 // (gBCA 0, crbitrc:$bi, abscondbrtarget:$dst) - 1691
9461 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9462 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9463 // (gBCA 10, crbitrc:$bi, abscondbrtarget:$dst) - 1693
9464 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(10)},
9465 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9466 // (gBCA 2, crbitrc:$bi, abscondbrtarget:$dst) - 1695
9467 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9468 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9469 // (gBCAat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1697
9470 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9471 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9472 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9473 // (gBCAat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1700
9474 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9475 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9476 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9477 // (gBCCTR u5imm:$bo, crbitrc:$bi, 0) - 1703
9478 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9479 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9480 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9481 // (gBCCTR 12, crbitrc:$bi, 0) - 1706
9482 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
9483 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9484 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9485 // (gBCCTR 4, crbitrc:$bi, 0) - 1709
9486 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9487 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9488 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9489 // (gBCCTR 14, crbitrc:$bi, 0) - 1712
9490 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
9491 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9492 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9493 // (gBCCTR 6, crbitrc:$bi, 0) - 1715
9494 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(6)},
9495 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9496 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9497 // (gBCCTR 15, crbitrc:$bi, 0) - 1718
9498 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
9499 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9500 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9501 // (gBCCTR 7, crbitrc:$bi, 0) - 1721
9502 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(7)},
9503 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9504 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9505 // (gBCCTRL u5imm:$bo, crbitrc:$bi, 0) - 1724
9506 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9507 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9508 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9509 // (gBCCTRL 12, crbitrc:$bi, 0) - 1727
9510 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
9511 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9512 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9513 // (gBCCTRL 4, crbitrc:$bi, 0) - 1730
9514 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9515 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9516 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9517 // (gBCCTRL 14, crbitrc:$bi, 0) - 1733
9518 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
9519 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9520 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9521 // (gBCCTRL 6, crbitrc:$bi, 0) - 1736
9522 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(6)},
9523 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9524 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9525 // (gBCCTRL 15, crbitrc:$bi, 0) - 1739
9526 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
9527 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9528 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9529 // (gBCCTRL 7, crbitrc:$bi, 0) - 1742
9530 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(7)},
9531 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9532 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9533 // (gBCL 12, crbitrc:$bi, condbrtarget:$dst) - 1745
9534 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
9535 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9536 // (gBCL 4, crbitrc:$bi, condbrtarget:$dst) - 1747
9537 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9538 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9539 // (gBCL 14, crbitrc:$bi, condbrtarget:$dst) - 1749
9540 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
9541 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9542 // (gBCL 6, crbitrc:$bi, condbrtarget:$dst) - 1751
9543 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(6)},
9544 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9545 // (gBCL 15, crbitrc:$bi, condbrtarget:$dst) - 1753
9546 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
9547 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9548 // (gBCL 7, crbitrc:$bi, condbrtarget:$dst) - 1755
9549 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(7)},
9550 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9551 // (gBCL 8, crbitrc:$bi, condbrtarget:$dst) - 1757
9552 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9553 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9554 // (gBCL 0, crbitrc:$bi, condbrtarget:$dst) - 1759
9555 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9556 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9557 // (gBCL 10, crbitrc:$bi, condbrtarget:$dst) - 1761
9558 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(10)},
9559 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9560 // (gBCL 2, crbitrc:$bi, condbrtarget:$dst) - 1763
9561 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9562 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9563 // (gBCLA 12, crbitrc:$bi, abscondbrtarget:$dst) - 1765
9564 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
9565 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9566 // (gBCLA 4, crbitrc:$bi, abscondbrtarget:$dst) - 1767
9567 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9568 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9569 // (gBCLA 14, crbitrc:$bi, abscondbrtarget:$dst) - 1769
9570 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
9571 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9572 // (gBCLA 6, crbitrc:$bi, abscondbrtarget:$dst) - 1771
9573 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(6)},
9574 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9575 // (gBCLA 15, crbitrc:$bi, abscondbrtarget:$dst) - 1773
9576 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
9577 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9578 // (gBCLA 7, crbitrc:$bi, abscondbrtarget:$dst) - 1775
9579 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(7)},
9580 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9581 // (gBCLA 8, crbitrc:$bi, abscondbrtarget:$dst) - 1777
9582 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9583 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9584 // (gBCLA 0, crbitrc:$bi, abscondbrtarget:$dst) - 1779
9585 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9586 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9587 // (gBCLA 10, crbitrc:$bi, abscondbrtarget:$dst) - 1781
9588 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(10)},
9589 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9590 // (gBCLA 2, crbitrc:$bi, abscondbrtarget:$dst) - 1783
9591 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9592 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9593 // (gBCLAat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1785
9594 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9595 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9596 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9597 // (gBCLAat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1788
9598 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9599 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9600 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9601 // (gBCLR u5imm:$bo, crbitrc:$bi, 0) - 1791
9602 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9603 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9604 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9605 // (gBCLR 12, crbitrc:$bi, 0) - 1794
9606 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
9607 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9608 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9609 // (gBCLR 4, crbitrc:$bi, 0) - 1797
9610 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9611 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9612 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9613 // (gBCLR 14, crbitrc:$bi, 0) - 1800
9614 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
9615 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9616 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9617 // (gBCLR 6, crbitrc:$bi, 0) - 1803
9618 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(6)},
9619 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9620 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9621 // (gBCLR 15, crbitrc:$bi, 0) - 1806
9622 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
9623 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9624 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9625 // (gBCLR 7, crbitrc:$bi, 0) - 1809
9626 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(7)},
9627 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9628 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9629 // (gBCLR 8, crbitrc:$bi, 0) - 1812
9630 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9631 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9632 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9633 // (gBCLR 0, crbitrc:$bi, 0) - 1815
9634 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9635 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9636 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9637 // (gBCLR 10, crbitrc:$bi, 0) - 1818
9638 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(10)},
9639 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9640 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9641 // (gBCLR 2, crbitrc:$bi, 0) - 1821
9642 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9643 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9644 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9645 // (gBCLRL u5imm:$bo, crbitrc:$bi, 0) - 1824
9646 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9647 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9648 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9649 // (gBCLRL 12, crbitrc:$bi, 0) - 1827
9650 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(12)},
9651 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9652 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9653 // (gBCLRL 4, crbitrc:$bi, 0) - 1830
9654 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(4)},
9655 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9656 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9657 // (gBCLRL 14, crbitrc:$bi, 0) - 1833
9658 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(14)},
9659 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9660 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9661 // (gBCLRL 6, crbitrc:$bi, 0) - 1836
9662 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(6)},
9663 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9664 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9665 // (gBCLRL 15, crbitrc:$bi, 0) - 1839
9666 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(15)},
9667 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9668 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9669 // (gBCLRL 7, crbitrc:$bi, 0) - 1842
9670 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(7)},
9671 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9672 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9673 // (gBCLRL 8, crbitrc:$bi, 0) - 1845
9674 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(8)},
9675 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9676 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9677 // (gBCLRL 0, crbitrc:$bi, 0) - 1848
9678 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9679 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9680 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9681 // (gBCLRL 10, crbitrc:$bi, 0) - 1851
9682 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(10)},
9683 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9684 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9685 // (gBCLRL 2, crbitrc:$bi, 0) - 1854
9686 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9687 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9688 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(0)},
9689 // (gBCLat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1857
9690 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9691 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9692 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9693 // (gBCLat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1860
9694 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9695 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9696 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9697 // (gBCat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1863
9698 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9699 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(3)},
9700 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9701 // (gBCat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1866
9702 {.Kind: AliasPatternCond::K_Ignore, .Value: 0},
9703 {.Kind: AliasPatternCond::K_Imm, .Value: uint32_t(2)},
9704 {.Kind: AliasPatternCond::K_RegClass, .Value: PPC::CRBITRCRegClassID},
9705 };
9706
9707 static const char AsmStrings[] =
9708 /* 0 */ "li $\x01, $\xFF\x03\x01\0"
9709 /* 12 */ "lis $\x01, $\xFF\x03\x01\0"
9710 /* 25 */ "lnia $\x01\0"
9711 /* 33 */ "blt $\x02, $\xFF\x03\x02\0"
9712 /* 46 */ "blt $\xFF\x03\x02\0"
9713 /* 55 */ "blt- $\x02, $\xFF\x03\x02\0"
9714 /* 69 */ "blt- $\xFF\x03\x02\0"
9715 /* 79 */ "blt+ $\x02, $\xFF\x03\x02\0"
9716 /* 93 */ "blt+ $\xFF\x03\x02\0"
9717 /* 103 */ "bgt $\x02, $\xFF\x03\x02\0"
9718 /* 116 */ "bgt $\xFF\x03\x02\0"
9719 /* 125 */ "bgt- $\x02, $\xFF\x03\x02\0"
9720 /* 139 */ "bgt- $\xFF\x03\x02\0"
9721 /* 149 */ "bgt+ $\x02, $\xFF\x03\x02\0"
9722 /* 163 */ "bgt+ $\xFF\x03\x02\0"
9723 /* 173 */ "beq $\x02, $\xFF\x03\x02\0"
9724 /* 186 */ "beq $\xFF\x03\x02\0"
9725 /* 195 */ "beq- $\x02, $\xFF\x03\x02\0"
9726 /* 209 */ "beq- $\xFF\x03\x02\0"
9727 /* 219 */ "beq+ $\x02, $\xFF\x03\x02\0"
9728 /* 233 */ "beq+ $\xFF\x03\x02\0"
9729 /* 243 */ "bne $\x02, $\xFF\x03\x02\0"
9730 /* 256 */ "bne $\xFF\x03\x02\0"
9731 /* 265 */ "bne- $\x02, $\xFF\x03\x02\0"
9732 /* 279 */ "bne- $\xFF\x03\x02\0"
9733 /* 289 */ "bne+ $\x02, $\xFF\x03\x02\0"
9734 /* 303 */ "bne+ $\xFF\x03\x02\0"
9735 /* 313 */ "blta $\x02, $\xFF\x03\x03\0"
9736 /* 327 */ "blta $\xFF\x03\x03\0"
9737 /* 337 */ "blta- $\x02, $\xFF\x03\x03\0"
9738 /* 352 */ "blta- $\xFF\x03\x03\0"
9739 /* 363 */ "blta+ $\x02, $\xFF\x03\x03\0"
9740 /* 378 */ "blta+ $\xFF\x03\x03\0"
9741 /* 389 */ "bgta $\x02, $\xFF\x03\x03\0"
9742 /* 403 */ "bgta $\xFF\x03\x03\0"
9743 /* 413 */ "bgta- $\x02, $\xFF\x03\x03\0"
9744 /* 428 */ "bgta- $\xFF\x03\x03\0"
9745 /* 439 */ "bgta+ $\x02, $\xFF\x03\x03\0"
9746 /* 454 */ "bgta+ $\xFF\x03\x03\0"
9747 /* 465 */ "beqa $\x02, $\xFF\x03\x03\0"
9748 /* 479 */ "beqa $\xFF\x03\x03\0"
9749 /* 489 */ "beqa- $\x02, $\xFF\x03\x03\0"
9750 /* 504 */ "beqa- $\xFF\x03\x03\0"
9751 /* 515 */ "beqa+ $\x02, $\xFF\x03\x03\0"
9752 /* 530 */ "beqa+ $\xFF\x03\x03\0"
9753 /* 541 */ "bnea $\x02, $\xFF\x03\x03\0"
9754 /* 555 */ "bnea $\xFF\x03\x03\0"
9755 /* 565 */ "bnea- $\x02, $\xFF\x03\x03\0"
9756 /* 580 */ "bnea- $\xFF\x03\x03\0"
9757 /* 591 */ "bnea+ $\x02, $\xFF\x03\x03\0"
9758 /* 606 */ "bnea+ $\xFF\x03\x03\0"
9759 /* 617 */ "bltctr $\x02\0"
9760 /* 627 */ "bltctr\0"
9761 /* 634 */ "bltctr- $\x02\0"
9762 /* 645 */ "bltctr-\0"
9763 /* 653 */ "bltctr+ $\x02\0"
9764 /* 664 */ "bltctr+\0"
9765 /* 672 */ "bgtctr $\x02\0"
9766 /* 682 */ "bgtctr\0"
9767 /* 689 */ "bgtctr- $\x02\0"
9768 /* 700 */ "bgtctr-\0"
9769 /* 708 */ "bgtctr+ $\x02\0"
9770 /* 719 */ "bgtctr+\0"
9771 /* 727 */ "beqctr $\x02\0"
9772 /* 737 */ "beqctr\0"
9773 /* 744 */ "beqctr- $\x02\0"
9774 /* 755 */ "beqctr-\0"
9775 /* 763 */ "beqctr+ $\x02\0"
9776 /* 774 */ "beqctr+\0"
9777 /* 782 */ "bnectr $\x02\0"
9778 /* 792 */ "bnectr\0"
9779 /* 799 */ "bnectr- $\x02\0"
9780 /* 810 */ "bnectr-\0"
9781 /* 818 */ "bnectr+ $\x02\0"
9782 /* 829 */ "bnectr+\0"
9783 /* 837 */ "bltctrl $\x02\0"
9784 /* 848 */ "bltctrl\0"
9785 /* 856 */ "bltctrl- $\x02\0"
9786 /* 868 */ "bltctrl-\0"
9787 /* 877 */ "bltctrl+ $\x02\0"
9788 /* 889 */ "bltctrl+\0"
9789 /* 898 */ "bgtctrl $\x02\0"
9790 /* 909 */ "bgtctrl\0"
9791 /* 917 */ "bgtctrl- $\x02\0"
9792 /* 929 */ "bgtctrl-\0"
9793 /* 938 */ "bgtctrl+ $\x02\0"
9794 /* 950 */ "bgtctrl+\0"
9795 /* 959 */ "beqctrl $\x02\0"
9796 /* 970 */ "beqctrl\0"
9797 /* 978 */ "beqctrl- $\x02\0"
9798 /* 990 */ "beqctrl-\0"
9799 /* 999 */ "beqctrl+ $\x02\0"
9800 /* 1011 */ "beqctrl+\0"
9801 /* 1020 */ "bnectrl $\x02\0"
9802 /* 1031 */ "bnectrl\0"
9803 /* 1039 */ "bnectrl- $\x02\0"
9804 /* 1051 */ "bnectrl-\0"
9805 /* 1060 */ "bnectrl+ $\x02\0"
9806 /* 1072 */ "bnectrl+\0"
9807 /* 1081 */ "bltl $\x02, $\xFF\x03\x02\0"
9808 /* 1095 */ "bltl $\xFF\x03\x02\0"
9809 /* 1105 */ "bltl- $\x02, $\xFF\x03\x02\0"
9810 /* 1120 */ "bltl- $\xFF\x03\x02\0"
9811 /* 1131 */ "bltl+ $\x02, $\xFF\x03\x02\0"
9812 /* 1146 */ "bltl+ $\xFF\x03\x02\0"
9813 /* 1157 */ "bgtl $\x02, $\xFF\x03\x02\0"
9814 /* 1171 */ "bgtl $\xFF\x03\x02\0"
9815 /* 1181 */ "bgtl- $\x02, $\xFF\x03\x02\0"
9816 /* 1196 */ "bgtl- $\xFF\x03\x02\0"
9817 /* 1207 */ "bgtl+ $\x02, $\xFF\x03\x02\0"
9818 /* 1222 */ "bgtl+ $\xFF\x03\x02\0"
9819 /* 1233 */ "beql $\x02, $\xFF\x03\x02\0"
9820 /* 1247 */ "beql $\xFF\x03\x02\0"
9821 /* 1257 */ "beql- $\x02, $\xFF\x03\x02\0"
9822 /* 1272 */ "beql- $\xFF\x03\x02\0"
9823 /* 1283 */ "beql+ $\x02, $\xFF\x03\x02\0"
9824 /* 1298 */ "beql+ $\xFF\x03\x02\0"
9825 /* 1309 */ "bnel $\x02, $\xFF\x03\x02\0"
9826 /* 1323 */ "bnel $\xFF\x03\x02\0"
9827 /* 1333 */ "bnel- $\x02, $\xFF\x03\x02\0"
9828 /* 1348 */ "bnel- $\xFF\x03\x02\0"
9829 /* 1359 */ "bnel+ $\x02, $\xFF\x03\x02\0"
9830 /* 1374 */ "bnel+ $\xFF\x03\x02\0"
9831 /* 1385 */ "bltla $\x02, $\xFF\x03\x03\0"
9832 /* 1400 */ "bltla $\xFF\x03\x03\0"
9833 /* 1411 */ "bltla- $\x02, $\xFF\x03\x03\0"
9834 /* 1427 */ "bltla- $\xFF\x03\x03\0"
9835 /* 1439 */ "bltla+ $\x02, $\xFF\x03\x03\0"
9836 /* 1455 */ "bltla+ $\xFF\x03\x03\0"
9837 /* 1467 */ "bgtla $\x02, $\xFF\x03\x03\0"
9838 /* 1482 */ "bgtla $\xFF\x03\x03\0"
9839 /* 1493 */ "bgtla- $\x02, $\xFF\x03\x03\0"
9840 /* 1509 */ "bgtla- $\xFF\x03\x03\0"
9841 /* 1521 */ "bgtla+ $\x02, $\xFF\x03\x03\0"
9842 /* 1537 */ "bgtla+ $\xFF\x03\x03\0"
9843 /* 1549 */ "beqla $\x02, $\xFF\x03\x03\0"
9844 /* 1564 */ "beqla $\xFF\x03\x03\0"
9845 /* 1575 */ "beqla- $\x02, $\xFF\x03\x03\0"
9846 /* 1591 */ "beqla- $\xFF\x03\x03\0"
9847 /* 1603 */ "beqla+ $\x02, $\xFF\x03\x03\0"
9848 /* 1619 */ "beqla+ $\xFF\x03\x03\0"
9849 /* 1631 */ "bnela $\x02, $\xFF\x03\x03\0"
9850 /* 1646 */ "bnela $\xFF\x03\x03\0"
9851 /* 1657 */ "bnela- $\x02, $\xFF\x03\x03\0"
9852 /* 1673 */ "bnela- $\xFF\x03\x03\0"
9853 /* 1685 */ "bnela+ $\x02, $\xFF\x03\x03\0"
9854 /* 1701 */ "bnela+ $\xFF\x03\x03\0"
9855 /* 1713 */ "bltlr $\x02\0"
9856 /* 1722 */ "bltlr\0"
9857 /* 1728 */ "bltlr- $\x02\0"
9858 /* 1738 */ "bltlr-\0"
9859 /* 1745 */ "bltlr+ $\x02\0"
9860 /* 1755 */ "bltlr+\0"
9861 /* 1762 */ "bgtlr $\x02\0"
9862 /* 1771 */ "bgtlr\0"
9863 /* 1777 */ "bgtlr- $\x02\0"
9864 /* 1787 */ "bgtlr-\0"
9865 /* 1794 */ "bgtlr+ $\x02\0"
9866 /* 1804 */ "bgtlr+\0"
9867 /* 1811 */ "beqlr $\x02\0"
9868 /* 1820 */ "beqlr\0"
9869 /* 1826 */ "beqlr- $\x02\0"
9870 /* 1836 */ "beqlr-\0"
9871 /* 1843 */ "beqlr+ $\x02\0"
9872 /* 1853 */ "beqlr+\0"
9873 /* 1860 */ "bnelr $\x02\0"
9874 /* 1869 */ "bnelr\0"
9875 /* 1875 */ "bnelr- $\x02\0"
9876 /* 1885 */ "bnelr-\0"
9877 /* 1892 */ "bnelr+ $\x02\0"
9878 /* 1902 */ "bnelr+\0"
9879 /* 1909 */ "bltlrl $\x02\0"
9880 /* 1919 */ "bltlrl\0"
9881 /* 1926 */ "bltlrl- $\x02\0"
9882 /* 1937 */ "bltlrl-\0"
9883 /* 1945 */ "bltlrl+ $\x02\0"
9884 /* 1956 */ "bltlrl+\0"
9885 /* 1964 */ "bgtlrl $\x02\0"
9886 /* 1974 */ "bgtlrl\0"
9887 /* 1981 */ "bgtlrl- $\x02\0"
9888 /* 1992 */ "bgtlrl-\0"
9889 /* 2000 */ "bgtlrl+ $\x02\0"
9890 /* 2011 */ "bgtlrl+\0"
9891 /* 2019 */ "beqlrl $\x02\0"
9892 /* 2029 */ "beqlrl\0"
9893 /* 2036 */ "beqlrl- $\x02\0"
9894 /* 2047 */ "beqlrl-\0"
9895 /* 2055 */ "beqlrl+ $\x02\0"
9896 /* 2066 */ "beqlrl+\0"
9897 /* 2074 */ "bnelrl $\x02\0"
9898 /* 2084 */ "bnelrl\0"
9899 /* 2091 */ "bnelrl- $\x02\0"
9900 /* 2102 */ "bnelrl-\0"
9901 /* 2110 */ "bnelrl+ $\x02\0"
9902 /* 2121 */ "bnelrl+\0"
9903 /* 2129 */ "cmpd $\x02, $\x03\0"
9904 /* 2141 */ "cmpdi $\x02, $\xFF\x03\x01\0"
9905 /* 2156 */ "cmpld $\x02, $\x03\0"
9906 /* 2169 */ "cmpldi $\x02, $\xFF\x03\x04\0"
9907 /* 2185 */ "cmplw $\x02, $\x03\0"
9908 /* 2198 */ "cmplwi $\x02, $\xFF\x03\x04\0"
9909 /* 2214 */ "cmpw $\x02, $\x03\0"
9910 /* 2226 */ "cmpwi $\x02, $\xFF\x03\x01\0"
9911 /* 2241 */ "cntlzw $\x01, $\x02\0"
9912 /* 2255 */ "cntlzw. $\x01, $\x02\0"
9913 /* 2270 */ "paste. $\x01, $\x02\0"
9914 /* 2284 */ "crset $\x01\0"
9915 /* 2293 */ "crnot $\x01, $\x02\0"
9916 /* 2306 */ "crmove $\x01, $\x02\0"
9917 /* 2320 */ "crclr $\x01\0"
9918 /* 2329 */ "dmsha256hash $\x01, $\x03\0"
9919 /* 2349 */ "dmsha512hash $\x01, $\x03\0"
9920 /* 2369 */ "dmsha3dw $\x01\0"
9921 /* 2381 */ "dmcryshash $\x01\0"
9922 /* 2395 */ "dmxxsha3512pad $\x01, $\x03, $\xFF\x05\x05\0"
9923 /* 2423 */ "dmxxsha3384pad $\x01, $\x03, $\xFF\x05\x05\0"
9924 /* 2451 */ "dmxxsha3256pad $\x01, $\x03, $\xFF\x05\x05\0"
9925 /* 2479 */ "dmxxsha3224pad $\x01, $\x03, $\xFF\x05\x05\0"
9926 /* 2507 */ "dmxxshake256pad $\x01, $\x03, $\xFF\x05\x05\0"
9927 /* 2536 */ "dmxxshake128pad $\x01, $\x03, $\xFF\x05\x05\0"
9928 /* 2565 */ "dmxxsha384512pad $\x01, $\x03\0"
9929 /* 2589 */ "dmxxsha224256pad $\x01, $\x03\0"
9930 /* 2613 */ "isellt $\x01, $\x02, $\x03\0"
9931 /* 2631 */ "iselgt $\x01, $\x02, $\x03\0"
9932 /* 2649 */ "iseleq $\x01, $\x02, $\x03\0"
9933 /* 2667 */ "mbar\0"
9934 /* 2672 */ "mfbr0 $\x01\0"
9935 /* 2681 */ "mfbr1 $\x01\0"
9936 /* 2690 */ "mfbr2 $\x01\0"
9937 /* 2699 */ "mfbr3 $\x01\0"
9938 /* 2708 */ "mfbr4 $\x01\0"
9939 /* 2717 */ "mfbr5 $\x01\0"
9940 /* 2726 */ "mfbr6 $\x01\0"
9941 /* 2735 */ "mfbr7 $\x01\0"
9942 /* 2744 */ "mfxer $\x01\0"
9943 /* 2753 */ "mfudscr $\x01\0"
9944 /* 2764 */ "mfrtcu $\x01\0"
9945 /* 2774 */ "mfrtcl $\x01\0"
9946 /* 2784 */ "mflr $\x01\0"
9947 /* 2792 */ "mfctr $\x01\0"
9948 /* 2801 */ "mfuamr $\x01\0"
9949 /* 2811 */ "mfdscr $\x01\0"
9950 /* 2821 */ "mfdsisr $\x01\0"
9951 /* 2832 */ "mfdar $\x01\0"
9952 /* 2841 */ "mfdec $\x01\0"
9953 /* 2850 */ "mfsdr1 $\x01\0"
9954 /* 2860 */ "mfsrr0 $\x01\0"
9955 /* 2870 */ "mfsrr1 $\x01\0"
9956 /* 2880 */ "mfcfar $\x01\0"
9957 /* 2890 */ "mfamr $\x01\0"
9958 /* 2899 */ "mfasr $\x01\0"
9959 /* 2908 */ "mfpvr $\x01\0"
9960 /* 2917 */ "mfspefscr $\x01\0"
9961 /* 2930 */ "mfdbatu $\x01, 0\0"
9962 /* 2944 */ "mfdbatl $\x01, 0\0"
9963 /* 2958 */ "mfibatu $\x01, 0\0"
9964 /* 2972 */ "mfibatl $\x01, 0\0"
9965 /* 2986 */ "mfdbatu $\x01, 1\0"
9966 /* 3000 */ "mfdbatl $\x01, 1\0"
9967 /* 3014 */ "mfibatu $\x01, 1\0"
9968 /* 3028 */ "mfibatl $\x01, 1\0"
9969 /* 3042 */ "mfdbatu $\x01, 2\0"
9970 /* 3056 */ "mfdbatl $\x01, 2\0"
9971 /* 3070 */ "mfibatu $\x01, 2\0"
9972 /* 3084 */ "mfibatl $\x01, 2\0"
9973 /* 3098 */ "mfdbatu $\x01, 3\0"
9974 /* 3112 */ "mfdbatl $\x01, 3\0"
9975 /* 3126 */ "mfibatu $\x01, 3\0"
9976 /* 3140 */ "mfibatl $\x01, 3\0"
9977 /* 3154 */ "mfppr $\x01\0"
9978 /* 3163 */ "mfesr $\x01\0"
9979 /* 3172 */ "mfdear $\x01\0"
9980 /* 3182 */ "mftcr $\x01\0"
9981 /* 3191 */ "mftbhi $\x01\0"
9982 /* 3201 */ "mftblo $\x01\0"
9983 /* 3211 */ "mfsrr2 $\x01\0"
9984 /* 3221 */ "mfsrr3 $\x01\0"
9985 /* 3231 */ "mfdccr $\x01\0"
9986 /* 3241 */ "mficcr $\x01\0"
9987 /* 3251 */ "mftbu $\x01\0"
9988 /* 3260 */ "mfvrsave $\x01\0"
9989 /* 3272 */ "mffprd $\x01, $\x02\0"
9990 /* 3286 */ "mffprwz $\x01, $\x02\0"
9991 /* 3301 */ "mtcr $\x02\0"
9992 /* 3309 */ "mtbr0 $\x01\0"
9993 /* 3318 */ "mtbr1 $\x01\0"
9994 /* 3327 */ "mtbr2 $\x01\0"
9995 /* 3336 */ "mtbr3 $\x01\0"
9996 /* 3345 */ "mtbr4 $\x01\0"
9997 /* 3354 */ "mtbr5 $\x01\0"
9998 /* 3363 */ "mtbr6 $\x01\0"
9999 /* 3372 */ "mtbr7 $\x01\0"
10000 /* 3381 */ "mtfsf $\x01, $\x02\0"
10001 /* 3394 */ "mtfsfi $\xFF\x01\x06, $\xFF\x02\x07\0"
10002 /* 3412 */ "mtfsfi. $\xFF\x01\x06, $\xFF\x02\x07\0"
10003 /* 3431 */ "mtfsf. $\x01, $\x02\0"
10004 /* 3445 */ "mtmsr $\x01\0"
10005 /* 3454 */ "mtmsrd $\x01\0"
10006 /* 3464 */ "mtxer $\x02\0"
10007 /* 3473 */ "mtudscr $\x02\0"
10008 /* 3484 */ "mtlr $\x02\0"
10009 /* 3492 */ "mtctr $\x02\0"
10010 /* 3501 */ "mtuamr $\x02\0"
10011 /* 3511 */ "mtdscr $\x02\0"
10012 /* 3521 */ "mtdsisr $\x02\0"
10013 /* 3532 */ "mtdar $\x02\0"
10014 /* 3541 */ "mtdec $\x02\0"
10015 /* 3550 */ "mtsdr1 $\x02\0"
10016 /* 3560 */ "mtsrr0 $\x02\0"
10017 /* 3570 */ "mtsrr1 $\x02\0"
10018 /* 3580 */ "mtcfar $\x02\0"
10019 /* 3590 */ "mtamr $\x02\0"
10020 /* 3599 */ "mtasr $\x02\0"
10021 /* 3608 */ "mttbl $\x02\0"
10022 /* 3617 */ "mttbu $\x02\0"
10023 /* 3626 */ "mtspefscr $\x02\0"
10024 /* 3639 */ "mtdbatu 0, $\x02\0"
10025 /* 3653 */ "mtdbatl 0, $\x02\0"
10026 /* 3667 */ "mtibatu 0, $\x02\0"
10027 /* 3681 */ "mtibatl 0, $\x02\0"
10028 /* 3695 */ "mtdbatu 1, $\x02\0"
10029 /* 3709 */ "mtdbatl 1, $\x02\0"
10030 /* 3723 */ "mtibatu 1, $\x02\0"
10031 /* 3737 */ "mtibatl 1, $\x02\0"
10032 /* 3751 */ "mtdbatu 2, $\x02\0"
10033 /* 3765 */ "mtdbatl 2, $\x02\0"
10034 /* 3779 */ "mtibatu 2, $\x02\0"
10035 /* 3793 */ "mtibatl 2, $\x02\0"
10036 /* 3807 */ "mtdbatu 3, $\x02\0"
10037 /* 3821 */ "mtdbatl 3, $\x02\0"
10038 /* 3835 */ "mtibatu 3, $\x02\0"
10039 /* 3849 */ "mtibatl 3, $\x02\0"
10040 /* 3863 */ "mtppr $\x02\0"
10041 /* 3872 */ "mtesr $\x02\0"
10042 /* 3881 */ "mtdear $\x02\0"
10043 /* 3891 */ "mttcr $\x02\0"
10044 /* 3900 */ "mttbhi $\x02\0"
10045 /* 3910 */ "mttblo $\x02\0"
10046 /* 3920 */ "mtsrr2 $\x02\0"
10047 /* 3930 */ "mtsrr3 $\x02\0"
10048 /* 3940 */ "mtdccr $\x02\0"
10049 /* 3950 */ "mticcr $\x02\0"
10050 /* 3960 */ "mtudscr $\x01\0"
10051 /* 3971 */ "mtvrsave $\x01\0"
10052 /* 3983 */ "mtfprd $\x01, $\x02\0"
10053 /* 3997 */ "mtfprwa $\x01, $\x02\0"
10054 /* 4012 */ "mtfprwz $\x01, $\x02\0"
10055 /* 4027 */ "not $\x01, $\x02\0"
10056 /* 4038 */ "not. $\x01, $\x02\0"
10057 /* 4050 */ "mr $\x01, $\x02\0"
10058 /* 4060 */ "mr. $\x01, $\x02\0"
10059 /* 4071 */ "nop\0"
10060 /* 4075 */ "paddi $\x01, $\x02, $\xFF\x03\x08\0"
10061 /* 4094 */ "plis $\x01, $\xFF\x03\x09\0"
10062 /* 4108 */ "rfebb\0"
10063 /* 4114 */ "rotld $\x01, $\x02, $\x03\0"
10064 /* 4131 */ "rotld. $\x01, $\x02, $\x03\0"
10065 /* 4149 */ "rotldi $\x01, $\x02, $\xFF\x03\x0B\0"
10066 /* 4169 */ "clrldi $\x01, $\x02, $\xFF\x04\x0B\0"
10067 /* 4189 */ "rotldi. $\x01, $\x02, $\xFF\x03\x0B\0"
10068 /* 4210 */ "clrldi. $\x01, $\x02, $\xFF\x04\x0B\0"
10069 /* 4231 */ "rotlwi $\x01, $\x02, $\xFF\x03\x0C\0"
10070 /* 4251 */ "clrlwi $\x01, $\x02, $\xFF\x04\x0C\0"
10071 /* 4271 */ "rotlwi. $\x01, $\x02, $\xFF\x03\x0C\0"
10072 /* 4292 */ "clrlwi. $\x01, $\x02, $\xFF\x04\x0C\0"
10073 /* 4313 */ "rotlw $\x01, $\x02, $\x03\0"
10074 /* 4330 */ "rotlw. $\x01, $\x02, $\x03\0"
10075 /* 4348 */ "sc\0"
10076 /* 4351 */ "sub $\x01, $\x03, $\x02\0"
10077 /* 4366 */ "sub. $\x01, $\x03, $\x02\0"
10078 /* 4382 */ "subc $\x01, $\x03, $\x02\0"
10079 /* 4398 */ "subc. $\x01, $\x03, $\x02\0"
10080 /* 4415 */ "sync\0"
10081 /* 4420 */ "lwsync\0"
10082 /* 4427 */ "ptesync\0"
10083 /* 4435 */ "phwsync\0"
10084 /* 4443 */ "plwsync\0"
10085 /* 4451 */ "sync $\xFF\x01\x06\0"
10086 /* 4461 */ "stncisync\0"
10087 /* 4471 */ "stcisync\0"
10088 /* 4480 */ "stsync\0"
10089 /* 4487 */ "tdlt $\x02, $\x03\0"
10090 /* 4499 */ "tdeq $\x02, $\x03\0"
10091 /* 4511 */ "tdgt $\x02, $\x03\0"
10092 /* 4523 */ "tdne $\x02, $\x03\0"
10093 /* 4535 */ "tdllt $\x02, $\x03\0"
10094 /* 4548 */ "tdlgt $\x02, $\x03\0"
10095 /* 4561 */ "tdu $\x02, $\x03\0"
10096 /* 4572 */ "tdlti $\x02, $\xFF\x03\x01\0"
10097 /* 4587 */ "tdeqi $\x02, $\xFF\x03\x01\0"
10098 /* 4602 */ "tdgti $\x02, $\xFF\x03\x01\0"
10099 /* 4617 */ "tdnei $\x02, $\xFF\x03\x01\0"
10100 /* 4632 */ "tdllti $\x02, $\xFF\x03\x01\0"
10101 /* 4648 */ "tdlgti $\x02, $\xFF\x03\x01\0"
10102 /* 4664 */ "tdui $\x02, $\xFF\x03\x01\0"
10103 /* 4678 */ "tend.\0"
10104 /* 4684 */ "tendall.\0"
10105 /* 4693 */ "tlbie $\x02\0"
10106 /* 4702 */ "tlbie $\x01, $\x02\0"
10107 /* 4715 */ "tlbilxlpid\0"
10108 /* 4726 */ "tlbilxpid\0"
10109 /* 4736 */ "tlbilxva $\x02, $\x03\0"
10110 /* 4752 */ "tlbilxva $\x03\0"
10111 /* 4764 */ "tlbrehi $\x01, $\x02\0"
10112 /* 4779 */ "tlbrelo $\x01, $\x02\0"
10113 /* 4794 */ "tlbwehi $\x01, $\x02\0"
10114 /* 4809 */ "tlbwelo $\x01, $\x02\0"
10115 /* 4824 */ "tsuspend.\0"
10116 /* 4834 */ "tresume.\0"
10117 /* 4843 */ "trap\0"
10118 /* 4848 */ "twlt $\x02, $\x03\0"
10119 /* 4860 */ "tweq $\x02, $\x03\0"
10120 /* 4872 */ "twgt $\x02, $\x03\0"
10121 /* 4884 */ "twne $\x02, $\x03\0"
10122 /* 4896 */ "twllt $\x02, $\x03\0"
10123 /* 4909 */ "twlgt $\x02, $\x03\0"
10124 /* 4922 */ "twu $\x02, $\x03\0"
10125 /* 4933 */ "twlti $\x02, $\xFF\x03\x01\0"
10126 /* 4948 */ "tweqi $\x02, $\xFF\x03\x01\0"
10127 /* 4963 */ "twgti $\x02, $\xFF\x03\x01\0"
10128 /* 4978 */ "twnei $\x02, $\xFF\x03\x01\0"
10129 /* 4993 */ "twllti $\x02, $\xFF\x03\x01\0"
10130 /* 5009 */ "twlgti $\x02, $\xFF\x03\x01\0"
10131 /* 5025 */ "twui $\x02, $\xFF\x03\x01\0"
10132 /* 5039 */ "vnot $\x01, $\x02\0"
10133 /* 5051 */ "vmr $\x01, $\x02\0"
10134 /* 5062 */ "wait\0"
10135 /* 5067 */ "waitrsv\0"
10136 /* 5075 */ "waitimpl\0"
10137 /* 5084 */ "xnop\0"
10138 /* 5089 */ "xvmovdp $\x01, $\x02\0"
10139 /* 5104 */ "xvmovsp $\x01, $\x02\0"
10140 /* 5119 */ "xxaes128decp $\x01, $\x02, $\x03\0"
10141 /* 5143 */ "xxaes192decp $\x01, $\x02, $\x03\0"
10142 /* 5167 */ "xxaes256decp $\x01, $\x02, $\x03\0"
10143 /* 5191 */ "xxaes128encp $\x01, $\x02, $\x03\0"
10144 /* 5215 */ "xxaes192encp $\x01, $\x02, $\x03\0"
10145 /* 5239 */ "xxaes256encp $\x01, $\x02, $\x03\0"
10146 /* 5263 */ "xxaes128genlkp $\x01, $\x02\0"
10147 /* 5285 */ "xxaes192genlkp $\x01, $\x02\0"
10148 /* 5307 */ "xxaes256genlkp $\x01, $\x02\0"
10149 /* 5329 */ "xxgfmul128gcm $\x01, $\x02, $\x03\0"
10150 /* 5354 */ "xxgfmul128xts $\x01, $\x02, $\x03\0"
10151 /* 5379 */ "xxspltd $\x01, $\x02, 0\0"
10152 /* 5397 */ "xxspltd $\x01, $\x02, 1\0"
10153 /* 5415 */ "xxmrghd $\x01, $\x02, $\x03\0"
10154 /* 5434 */ "xxmrgld $\x01, $\x02, $\x03\0"
10155 /* 5453 */ "xxswapd $\x01, $\x02\0"
10156 /* 5468 */ "bt $\x02, $\xFF\x03\x02\0"
10157 /* 5480 */ "bf $\x02, $\xFF\x03\x02\0"
10158 /* 5492 */ "bt- $\x02, $\xFF\x03\x02\0"
10159 /* 5505 */ "bf- $\x02, $\xFF\x03\x02\0"
10160 /* 5518 */ "bt+ $\x02, $\xFF\x03\x02\0"
10161 /* 5531 */ "bf+ $\x02, $\xFF\x03\x02\0"
10162 /* 5544 */ "bdnzt $\x02, $\xFF\x03\x02\0"
10163 /* 5559 */ "bdnzf $\x02, $\xFF\x03\x02\0"
10164 /* 5574 */ "bdzt $\x02, $\xFF\x03\x02\0"
10165 /* 5588 */ "bdzf $\x02, $\xFF\x03\x02\0"
10166 /* 5602 */ "bta $\x02, $\xFF\x03\x03\0"
10167 /* 5615 */ "bfa $\x02, $\xFF\x03\x03\0"
10168 /* 5628 */ "bta- $\x02, $\xFF\x03\x03\0"
10169 /* 5642 */ "bfa- $\x02, $\xFF\x03\x03\0"
10170 /* 5656 */ "bta+ $\x02, $\xFF\x03\x03\0"
10171 /* 5670 */ "bfa+ $\x02, $\xFF\x03\x03\0"
10172 /* 5684 */ "bdnzta $\x02, $\xFF\x03\x03\0"
10173 /* 5700 */ "bdnzfa $\x02, $\xFF\x03\x03\0"
10174 /* 5716 */ "bdzta $\x02, $\xFF\x03\x03\0"
10175 /* 5731 */ "bdzfa $\x02, $\xFF\x03\x03\0"
10176 /* 5746 */ "bca+ $\xFF\x01\x0C, $\x03, $\xFF\x04\x02\0"
10177 /* 5766 */ "bca- $\xFF\x01\x0C, $\x03, $\xFF\x04\x02\0"
10178 /* 5786 */ "bcctr $\xFF\x01\x0C, $\x02\0"
10179 /* 5801 */ "btctr $\x02\0"
10180 /* 5810 */ "bfctr $\x02\0"
10181 /* 5819 */ "btctr- $\x02\0"
10182 /* 5829 */ "bfctr- $\x02\0"
10183 /* 5839 */ "btctr+ $\x02\0"
10184 /* 5849 */ "bfctr+ $\x02\0"
10185 /* 5859 */ "bcctrl $\xFF\x01\x0C, $\x02\0"
10186 /* 5875 */ "btctrl $\x02\0"
10187 /* 5885 */ "bfctrl $\x02\0"
10188 /* 5895 */ "btctrl- $\x02\0"
10189 /* 5906 */ "bfctrl- $\x02\0"
10190 /* 5917 */ "btctrl+ $\x02\0"
10191 /* 5928 */ "bfctrl+ $\x02\0"
10192 /* 5939 */ "btl $\x02, $\xFF\x03\x02\0"
10193 /* 5952 */ "bfl $\x02, $\xFF\x03\x02\0"
10194 /* 5965 */ "btl- $\x02, $\xFF\x03\x02\0"
10195 /* 5979 */ "bfl- $\x02, $\xFF\x03\x02\0"
10196 /* 5993 */ "btl+ $\x02, $\xFF\x03\x02\0"
10197 /* 6007 */ "bfl+ $\x02, $\xFF\x03\x02\0"
10198 /* 6021 */ "bdnztl $\x02, $\xFF\x03\x02\0"
10199 /* 6037 */ "bdnzfl $\x02, $\xFF\x03\x02\0"
10200 /* 6053 */ "bdztl $\x02, $\xFF\x03\x02\0"
10201 /* 6068 */ "bdzfl $\x02, $\xFF\x03\x02\0"
10202 /* 6083 */ "btla $\x02, $\xFF\x03\x03\0"
10203 /* 6097 */ "bfla $\x02, $\xFF\x03\x03\0"
10204 /* 6111 */ "btla- $\x02, $\xFF\x03\x03\0"
10205 /* 6126 */ "bfla- $\x02, $\xFF\x03\x03\0"
10206 /* 6141 */ "btla+ $\x02, $\xFF\x03\x03\0"
10207 /* 6156 */ "bfla+ $\x02, $\xFF\x03\x03\0"
10208 /* 6171 */ "bdnztla $\x02, $\xFF\x03\x03\0"
10209 /* 6188 */ "bdnzfla $\x02, $\xFF\x03\x03\0"
10210 /* 6205 */ "bdztla $\x02, $\xFF\x03\x03\0"
10211 /* 6221 */ "bdzfla $\x02, $\xFF\x03\x03\0"
10212 /* 6237 */ "bcla+ $\xFF\x01\x0C, $\x03, $\xFF\x04\x02\0"
10213 /* 6258 */ "bcla- $\xFF\x01\x0C, $\x03, $\xFF\x04\x02\0"
10214 /* 6279 */ "bclr $\xFF\x01\x0C, $\x02\0"
10215 /* 6293 */ "btlr $\x02\0"
10216 /* 6301 */ "bflr $\x02\0"
10217 /* 6309 */ "btlr- $\x02\0"
10218 /* 6318 */ "bflr- $\x02\0"
10219 /* 6327 */ "btlr+ $\x02\0"
10220 /* 6336 */ "bflr+ $\x02\0"
10221 /* 6345 */ "bdnztlr $\x02\0"
10222 /* 6356 */ "bdnzflr $\x02\0"
10223 /* 6367 */ "bdztlr $\x02\0"
10224 /* 6377 */ "bdzflr $\x02\0"
10225 /* 6387 */ "bclrl $\xFF\x01\x0C, $\x02\0"
10226 /* 6402 */ "btlrl $\x02\0"
10227 /* 6411 */ "bflrl $\x02\0"
10228 /* 6420 */ "btlrl- $\x02\0"
10229 /* 6430 */ "bflrl- $\x02\0"
10230 /* 6440 */ "btlrl+ $\x02\0"
10231 /* 6450 */ "bflrl+ $\x02\0"
10232 /* 6460 */ "bdnztlrl $\x02\0"
10233 /* 6472 */ "bdnzflrl $\x02\0"
10234 /* 6484 */ "bdztlrl $\x02\0"
10235 /* 6495 */ "bdzflrl $\x02\0"
10236 /* 6506 */ "bcl+ $\xFF\x01\x0C, $\x03, $\xFF\x04\x02\0"
10237 /* 6526 */ "bcl- $\xFF\x01\x0C, $\x03, $\xFF\x04\x02\0"
10238 /* 6546 */ "bc+ $\xFF\x01\x0C, $\x03, $\xFF\x04\x02\0"
10239 /* 6565 */ "bc- $\xFF\x01\x0C, $\x03, $\xFF\x04\x02\0"
10240 ;
10241
10242#ifndef NDEBUG
10243 static struct SortCheck {
10244 SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) {
10245 assert(std::is_sorted(
10246 OpToPatterns.begin(), OpToPatterns.end(),
10247 [](const PatternsForOpcode &L, const PatternsForOpcode &R) {
10248 return L.Opcode < R.Opcode;
10249 }) &&
10250 "tablegen failed to sort opcode patterns");
10251 }
10252 } sortCheckVar(OpToPatterns);
10253#endif
10254
10255 AliasMatchingData M {
10256 .OpToPatterns: ArrayRef(OpToPatterns),
10257 .Patterns: ArrayRef(Patterns),
10258 .PatternConds: ArrayRef(Conds),
10259 .AsmStrings: StringRef(AsmStrings, std::size(AsmStrings)),
10260 .ValidateMCOperand: nullptr,
10261 };
10262 const char *AsmString = matchAliasPatterns(MI, STI: &STI, M);
10263 if (!AsmString) return false;
10264
10265 unsigned I = 0;
10266 while (AsmString[I] != ' ' && AsmString[I] != '\t' &&
10267 AsmString[I] != '$' && AsmString[I] != '\0')
10268 ++I;
10269 OS << '\t' << StringRef(AsmString, I);
10270 if (AsmString[I] != '\0') {
10271 if (AsmString[I] == ' ' || AsmString[I] == '\t') {
10272 OS << '\t';
10273 ++I;
10274 }
10275 do {
10276 if (AsmString[I] == '$') {
10277 ++I;
10278 if (AsmString[I] == (char)0xff) {
10279 ++I;
10280 int OpIdx = AsmString[I++] - 1;
10281 int PrintMethodIdx = AsmString[I++] - 1;
10282 printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, STI, OS);
10283 } else
10284 printOperand(MI, OpNo: unsigned(AsmString[I++]) - 1, STI, O&: OS);
10285 } else {
10286 OS << AsmString[I++];
10287 }
10288 } while (AsmString[I] != '\0');
10289 }
10290
10291 return true;
10292}
10293
10294void PPCInstPrinter::printCustomAliasOperand(
10295 const MCInst *MI, uint64_t Address, unsigned OpIdx,
10296 unsigned PrintMethodIdx,
10297 const MCSubtargetInfo &STI,
10298 raw_ostream &OS) {
10299 switch (PrintMethodIdx) {
10300 default:
10301 llvm_unreachable("Unknown PrintMethod kind");
10302 break;
10303 case 0:
10304 printS16ImmOperand(MI, OpNo: OpIdx, STI, O&: OS);
10305 break;
10306 case 1:
10307 printBranchOperand(MI, Address, OpNo: OpIdx, STI, O&: OS);
10308 break;
10309 case 2:
10310 printAbsBranchOperand(MI, OpNo: OpIdx, STI, O&: OS);
10311 break;
10312 case 3:
10313 printU16ImmOperand(MI, OpNo: OpIdx, STI, O&: OS);
10314 break;
10315 case 4:
10316 printUImmOperand<1>(MI, OpNo: OpIdx, STI, O&: OS);
10317 break;
10318 case 5:
10319 printUImmOperand<3>(MI, OpNo: OpIdx, STI, O&: OS);
10320 break;
10321 case 6:
10322 printUImmOperand<4>(MI, OpNo: OpIdx, STI, O&: OS);
10323 break;
10324 case 7:
10325 printS34ImmOperand(MI, OpNo: OpIdx, STI, O&: OS);
10326 break;
10327 case 8:
10328 printS32ImmOperand(MI, OpNo: OpIdx, STI, O&: OS);
10329 break;
10330 case 9:
10331 printNegS32ImmOperand(MI, OpNo: OpIdx, STI, O&: OS);
10332 break;
10333 case 10:
10334 printUImmOperand<6>(MI, OpNo: OpIdx, STI, O&: OS);
10335 break;
10336 case 11:
10337 printUImmOperand<5>(MI, OpNo: OpIdx, STI, O&: OS);
10338 break;
10339 }
10340}
10341
10342#endif // PRINT_ALIAS_INSTR
10343