1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register Enum Values *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11class MCRegisterClass;
12extern const MCRegisterClass SPIRVMCRegisterClasses[];
13
14namespace SPIRV {
15enum : unsigned {
16 NoRegister,
17 ID0 = 1,
18 TYPE0 = 2,
19 fID0 = 3,
20 pID0 = 4,
21 vID0 = 5,
22 vfID0 = 6,
23 vpID0 = 7,
24 NUM_TARGET_REGS // 8
25};
26} // end namespace SPIRV
27
28// Register classes
29
30namespace SPIRV {
31enum {
32 ANYRegClassID = 0,
33 IDRegClassID = 1,
34 TYPERegClassID = 2,
35 fIDRegClassID = 3,
36 iIDRegClassID = 4,
37 pIDRegClassID = 5,
38 vpIDRegClassID = 6,
39 vIDRegClassID = 7,
40 vfIDRegClassID = 8,
41
42};
43} // end namespace SPIRV
44
45// Register pressure sets enum.
46namespace SPIRV {
47enum RegisterPressureSets {
48 TYPE = 0,
49 fID = 1,
50 iID = 2,
51 pID = 3,
52 vpID = 4,
53 vID = 5,
54 vfID = 6,
55 ID = 7,
56};
57} // end namespace SPIRV
58
59} // end namespace llvm
60
61