1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Instruction Enum Values and Descriptors *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_INSTRINFO_ENUM
10#undef GET_INSTRINFO_ENUM
11
12namespace llvm::SP {
13
14 enum {
15 PHI = 0, // Target.td:1314
16 INLINEASM = 1, // Target.td:1320
17 INLINEASM_BR = 2, // Target.td:1326
18 CFI_INSTRUCTION = 3, // Target.td:1335
19 EH_LABEL = 4, // Target.td:1344
20 GC_LABEL = 5, // Target.td:1353
21 ANNOTATION_LABEL = 6, // Target.td:1362
22 KILL = 7, // Target.td:1370
23 EXTRACT_SUBREG = 8, // Target.td:1377
24 INSERT_SUBREG = 9, // Target.td:1383
25 IMPLICIT_DEF = 10, // Target.td:1390
26 INIT_UNDEF = 11, // Target.td:1399
27 SUBREG_TO_REG = 12, // Target.td:1406
28 COPY_TO_REGCLASS = 13, // Target.td:1412
29 DBG_VALUE = 14, // Target.td:1419
30 DBG_VALUE_LIST = 15, // Target.td:1426
31 DBG_INSTR_REF = 16, // Target.td:1433
32 DBG_PHI = 17, // Target.td:1440
33 DBG_LABEL = 18, // Target.td:1447
34 REG_SEQUENCE = 19, // Target.td:1454
35 COPY = 20, // Target.td:1461
36 COPY_LANEMASK = 21, // Target.td:1469
37 BUNDLE = 22, // Target.td:1476
38 LIFETIME_START = 23, // Target.td:1482
39 LIFETIME_END = 24, // Target.td:1489
40 PSEUDO_PROBE = 25, // Target.td:1496
41 ARITH_FENCE = 26, // Target.td:1503
42 STACKMAP = 27, // Target.td:1512
43 FENTRY_CALL = 28, // Target.td:1647
44 PATCHPOINT = 29, // Target.td:1520
45 LOAD_STACK_GUARD = 30, // Target.td:1538
46 PREALLOCATED_SETUP = 31, // Target.td:1546
47 PREALLOCATED_ARG = 32, // Target.td:1552
48 STATEPOINT = 33, // Target.td:1529
49 LOCAL_ESCAPE = 34, // Target.td:1558
50 FAULTING_OP = 35, // Target.td:1567
51 PATCHABLE_OP = 36, // Target.td:1587
52 PATCHABLE_FUNCTION_ENTER = 37, // Target.td:1595
53 PATCHABLE_RET = 38, // Target.td:1602
54 PATCHABLE_FUNCTION_EXIT = 39, // Target.td:1611
55 PATCHABLE_TAIL_CALL = 40, // Target.td:1619
56 PATCHABLE_EVENT_CALL = 41, // Target.td:1627
57 PATCHABLE_TYPED_EVENT_CALL = 42, // Target.td:1637
58 ICALL_BRANCH_FUNNEL = 43, // Target.td:1657
59 FAKE_USE = 44, // Target.td:1577
60 MEMBARRIER = 45, // Target.td:1663
61 JUMP_TABLE_DEBUG_INFO = 46, // Target.td:1671
62 RELOC_NONE = 47, // Target.td:1679
63 CONVERGENCECTRL_ENTRY = 48, // Target.td:1691
64 CONVERGENCECTRL_ANCHOR = 49, // Target.td:1687
65 CONVERGENCECTRL_LOOP = 50, // Target.td:1695
66 CONVERGENCECTRL_GLUE = 51, // Target.td:1699
67 G_ASSERT_SEXT = 52, // GenericOpcodes.td:1955
68 G_ASSERT_ZEXT = 53, // GenericOpcodes.td:1947
69 G_ASSERT_ALIGN = 54, // GenericOpcodes.td:1962
70 G_ADD = 55, // GenericOpcodes.td:308
71 G_SUB = 56, // GenericOpcodes.td:316
72 G_MUL = 57, // GenericOpcodes.td:324
73 G_SDIV = 58, // GenericOpcodes.td:332
74 G_UDIV = 59, // GenericOpcodes.td:340
75 G_SREM = 60, // GenericOpcodes.td:348
76 G_UREM = 61, // GenericOpcodes.td:356
77 G_SDIVREM = 62, // GenericOpcodes.td:364
78 G_UDIVREM = 63, // GenericOpcodes.td:372
79 G_AND = 64, // GenericOpcodes.td:380
80 G_OR = 65, // GenericOpcodes.td:388
81 G_XOR = 66, // GenericOpcodes.td:396
82 G_ABDS = 67, // GenericOpcodes.td:425
83 G_ABDU = 68, // GenericOpcodes.td:433
84 G_UAVGFLOOR = 69, // GenericOpcodes.td:441
85 G_UAVGCEIL = 70, // GenericOpcodes.td:448
86 G_SAVGFLOOR = 71, // GenericOpcodes.td:455
87 G_SAVGCEIL = 72, // GenericOpcodes.td:462
88 G_IMPLICIT_DEF = 73, // GenericOpcodes.td:111
89 G_PHI = 74, // GenericOpcodes.td:118
90 G_FRAME_INDEX = 75, // GenericOpcodes.td:125
91 G_GLOBAL_VALUE = 76, // GenericOpcodes.td:131
92 G_PTRAUTH_GLOBAL_VALUE = 77, // GenericOpcodes.td:137
93 G_CONSTANT_POOL = 78, // GenericOpcodes.td:143
94 G_EXTRACT = 79, // GenericOpcodes.td:1540
95 G_UNMERGE_VALUES = 80, // GenericOpcodes.td:1553
96 G_INSERT = 81, // GenericOpcodes.td:1562
97 G_MERGE_VALUES = 82, // GenericOpcodes.td:1572
98 G_BUILD_VECTOR = 83, // GenericOpcodes.td:1592
99 G_BUILD_VECTOR_TRUNC = 84, // GenericOpcodes.td:1602
100 G_CONCAT_VECTORS = 85, // GenericOpcodes.td:1609
101 G_PTRTOINT = 86, // GenericOpcodes.td:155
102 G_INTTOPTR = 87, // GenericOpcodes.td:149
103 G_BITCAST = 88, // GenericOpcodes.td:161
104 G_FREEZE = 89, // GenericOpcodes.td:284
105 G_CONSTANT_FOLD_BARRIER = 90, // GenericOpcodes.td:1969
106 G_INTRINSIC_FPTRUNC_ROUND = 91, // GenericOpcodes.td:1298
107 G_INTRINSIC_TRUNC = 92, // GenericOpcodes.td:1304
108 G_INTRINSIC_ROUND = 93, // GenericOpcodes.td:1310
109 G_INTRINSIC_LRINT = 94, // GenericOpcodes.td:1316
110 G_INTRINSIC_LLRINT = 95, // GenericOpcodes.td:1322
111 G_INTRINSIC_ROUNDEVEN = 96, // GenericOpcodes.td:1328
112 G_READCYCLECOUNTER = 97, // GenericOpcodes.td:1334
113 G_READSTEADYCOUNTER = 98, // GenericOpcodes.td:1340
114 G_LOAD = 99, // GenericOpcodes.td:1367
115 G_SEXTLOAD = 100, // GenericOpcodes.td:1376
116 G_ZEXTLOAD = 101, // GenericOpcodes.td:1384
117 G_FPEXTLOAD = 102, // GenericOpcodes.td:1393
118 G_INDEXED_LOAD = 103, // GenericOpcodes.td:1403
119 G_INDEXED_SEXTLOAD = 104, // GenericOpcodes.td:1412
120 G_INDEXED_ZEXTLOAD = 105, // GenericOpcodes.td:1420
121 G_STORE = 106, // GenericOpcodes.td:1428
122 G_FPTRUNCSTORE = 107, // GenericOpcodes.td:1438
123 G_INDEXED_STORE = 108, // GenericOpcodes.td:1446
124 G_ATOMIC_CMPXCHG_WITH_SUCCESS = 109, // GenericOpcodes.td:1457
125 G_ATOMIC_CMPXCHG = 110, // GenericOpcodes.td:1468
126 G_ATOMICRMW_XCHG = 111, // GenericOpcodes.td:1488
127 G_ATOMICRMW_ADD = 112, // GenericOpcodes.td:1489
128 G_ATOMICRMW_SUB = 113, // GenericOpcodes.td:1490
129 G_ATOMICRMW_AND = 114, // GenericOpcodes.td:1491
130 G_ATOMICRMW_NAND = 115, // GenericOpcodes.td:1492
131 G_ATOMICRMW_OR = 116, // GenericOpcodes.td:1493
132 G_ATOMICRMW_XOR = 117, // GenericOpcodes.td:1494
133 G_ATOMICRMW_MAX = 118, // GenericOpcodes.td:1495
134 G_ATOMICRMW_MIN = 119, // GenericOpcodes.td:1496
135 G_ATOMICRMW_UMAX = 120, // GenericOpcodes.td:1497
136 G_ATOMICRMW_UMIN = 121, // GenericOpcodes.td:1498
137 G_ATOMICRMW_FADD = 122, // GenericOpcodes.td:1509
138 G_ATOMICRMW_FSUB = 123, // GenericOpcodes.td:1510
139 G_ATOMICRMW_FMAX = 124, // GenericOpcodes.td:1511
140 G_ATOMICRMW_FMIN = 125, // GenericOpcodes.td:1512
141 G_ATOMICRMW_FMAXIMUM = 126, // GenericOpcodes.td:1513
142 G_ATOMICRMW_FMINIMUM = 127, // GenericOpcodes.td:1514
143 G_ATOMICRMW_FMAXIMUMNUM = 128, // GenericOpcodes.td:1515
144 G_ATOMICRMW_FMINIMUMNUM = 129, // GenericOpcodes.td:1516
145 G_ATOMICRMW_UINC_WRAP = 130, // GenericOpcodes.td:1499
146 G_ATOMICRMW_UDEC_WRAP = 131, // GenericOpcodes.td:1500
147 G_ATOMICRMW_USUB_COND = 132, // GenericOpcodes.td:1501
148 G_ATOMICRMW_USUB_SAT = 133, // GenericOpcodes.td:1502
149 G_FENCE = 134, // GenericOpcodes.td:1518
150 G_PREFETCH = 135, // GenericOpcodes.td:1525
151 G_BRCOND = 136, // GenericOpcodes.td:1665
152 G_BRINDIRECT = 137, // GenericOpcodes.td:1674
153 G_INVOKE_REGION_START = 138, // GenericOpcodes.td:1697
154 G_INTRINSIC = 139, // GenericOpcodes.td:1617
155 G_INTRINSIC_W_SIDE_EFFECTS = 140, // GenericOpcodes.td:1624
156 G_INTRINSIC_CONVERGENT = 141, // GenericOpcodes.td:1633
157 G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 142, // GenericOpcodes.td:1641
158 G_ANYEXT = 143, // GenericOpcodes.td:44
159 G_TRUNC = 144, // GenericOpcodes.td:83
160 G_TRUNC_SSAT_S = 145, // GenericOpcodes.td:91
161 G_TRUNC_SSAT_U = 146, // GenericOpcodes.td:98
162 G_TRUNC_USAT_U = 147, // GenericOpcodes.td:105
163 G_CONSTANT = 148, // GenericOpcodes.td:169
164 G_FCONSTANT = 149, // GenericOpcodes.td:177
165 G_VASTART = 150, // GenericOpcodes.td:184
166 G_VAARG = 151, // GenericOpcodes.td:191
167 G_SEXT = 152, // GenericOpcodes.td:52
168 G_SEXT_INREG = 153, // GenericOpcodes.td:66
169 G_ZEXT = 154, // GenericOpcodes.td:74
170 G_SHL = 155, // GenericOpcodes.td:404
171 G_LSHR = 156, // GenericOpcodes.td:411
172 G_ASHR = 157, // GenericOpcodes.td:418
173 G_FSHL = 158, // GenericOpcodes.td:470
174 G_FSHR = 159, // GenericOpcodes.td:478
175 G_ROTR = 160, // GenericOpcodes.td:485
176 G_ROTL = 161, // GenericOpcodes.td:492
177 G_ICMP = 162, // GenericOpcodes.td:499
178 G_FCMP = 163, // GenericOpcodes.td:506
179 G_SCMP = 164, // GenericOpcodes.td:513
180 G_UCMP = 165, // GenericOpcodes.td:520
181 G_SELECT = 166, // GenericOpcodes.td:527
182 G_UADDO = 167, // GenericOpcodes.td:619
183 G_UADDE = 168, // GenericOpcodes.td:627
184 G_USUBO = 169, // GenericOpcodes.td:649
185 G_USUBE = 170, // GenericOpcodes.td:655
186 G_SADDO = 171, // GenericOpcodes.td:634
187 G_SADDE = 172, // GenericOpcodes.td:642
188 G_SSUBO = 173, // GenericOpcodes.td:662
189 G_SSUBE = 174, // GenericOpcodes.td:669
190 G_UMULO = 175, // GenericOpcodes.td:676
191 G_SMULO = 176, // GenericOpcodes.td:684
192 G_UMULH = 177, // GenericOpcodes.td:693
193 G_SMULH = 178, // GenericOpcodes.td:702
194 G_UADDSAT = 179, // GenericOpcodes.td:714
195 G_SADDSAT = 180, // GenericOpcodes.td:722
196 G_USUBSAT = 181, // GenericOpcodes.td:730
197 G_SSUBSAT = 182, // GenericOpcodes.td:738
198 G_USHLSAT = 183, // GenericOpcodes.td:746
199 G_SSHLSAT = 184, // GenericOpcodes.td:754
200 G_SMULFIX = 185, // GenericOpcodes.td:766
201 G_UMULFIX = 186, // GenericOpcodes.td:773
202 G_SMULFIXSAT = 187, // GenericOpcodes.td:783
203 G_UMULFIXSAT = 188, // GenericOpcodes.td:790
204 G_SDIVFIX = 189, // GenericOpcodes.td:801
205 G_UDIVFIX = 190, // GenericOpcodes.td:808
206 G_SDIVFIXSAT = 191, // GenericOpcodes.td:818
207 G_UDIVFIXSAT = 192, // GenericOpcodes.td:825
208 G_FADD = 193, // GenericOpcodes.td:998
209 G_FSUB = 194, // GenericOpcodes.td:1006
210 G_FMUL = 195, // GenericOpcodes.td:1014
211 G_FMA = 196, // GenericOpcodes.td:1023
212 G_FMAD = 197, // GenericOpcodes.td:1032
213 G_FDIV = 198, // GenericOpcodes.td:1040
214 G_FREM = 199, // GenericOpcodes.td:1047
215 G_FMODF = 200, // GenericOpcodes.td:1054
216 G_FPOW = 201, // GenericOpcodes.td:1061
217 G_FPOWI = 202, // GenericOpcodes.td:1068
218 G_FEXP = 203, // GenericOpcodes.td:1075
219 G_FEXP2 = 204, // GenericOpcodes.td:1082
220 G_FEXP10 = 205, // GenericOpcodes.td:1089
221 G_FLOG = 206, // GenericOpcodes.td:1096
222 G_FLOG2 = 207, // GenericOpcodes.td:1103
223 G_FLOG10 = 208, // GenericOpcodes.td:1110
224 G_FLDEXP = 209, // GenericOpcodes.td:1117
225 G_FFREXP = 210, // GenericOpcodes.td:1124
226 G_FNEG = 211, // GenericOpcodes.td:836
227 G_FPEXT = 212, // GenericOpcodes.td:842
228 G_FPTRUNC = 213, // GenericOpcodes.td:848
229 G_FPTOSI = 214, // GenericOpcodes.td:854
230 G_FPTOUI = 215, // GenericOpcodes.td:860
231 G_SITOFP = 216, // GenericOpcodes.td:866
232 G_UITOFP = 217, // GenericOpcodes.td:872
233 G_FPTOSI_SAT = 218, // GenericOpcodes.td:878
234 G_FPTOUI_SAT = 219, // GenericOpcodes.td:884
235 G_FABS = 220, // GenericOpcodes.td:890
236 G_FCOPYSIGN = 221, // GenericOpcodes.td:896
237 G_IS_FPCLASS = 222, // GenericOpcodes.td:909
238 G_FCANONICALIZE = 223, // GenericOpcodes.td:902
239 G_FMINNUM = 224, // GenericOpcodes.td:922
240 G_FMAXNUM = 225, // GenericOpcodes.td:929
241 G_FMINNUM_IEEE = 226, // GenericOpcodes.td:947
242 G_FMAXNUM_IEEE = 227, // GenericOpcodes.td:954
243 G_FMINIMUM = 228, // GenericOpcodes.td:964
244 G_FMAXIMUM = 229, // GenericOpcodes.td:971
245 G_FMINIMUMNUM = 230, // GenericOpcodes.td:979
246 G_FMAXIMUMNUM = 231, // GenericOpcodes.td:986
247 G_GET_FPENV = 232, // GenericOpcodes.td:1254
248 G_SET_FPENV = 233, // GenericOpcodes.td:1261
249 G_RESET_FPENV = 234, // GenericOpcodes.td:1268
250 G_GET_FPMODE = 235, // GenericOpcodes.td:1275
251 G_SET_FPMODE = 236, // GenericOpcodes.td:1282
252 G_RESET_FPMODE = 237, // GenericOpcodes.td:1289
253 G_GET_ROUNDING = 238, // GenericOpcodes.td:1346
254 G_SET_ROUNDING = 239, // GenericOpcodes.td:1352
255 G_PTR_ADD = 240, // GenericOpcodes.td:534
256 G_PTRMASK = 241, // GenericOpcodes.td:542
257 G_SMIN = 242, // GenericOpcodes.td:549
258 G_SMAX = 243, // GenericOpcodes.td:557
259 G_UMIN = 244, // GenericOpcodes.td:565
260 G_UMAX = 245, // GenericOpcodes.td:573
261 G_ABS = 246, // GenericOpcodes.td:581
262 G_LROUND = 247, // GenericOpcodes.td:291
263 G_LLROUND = 248, // GenericOpcodes.td:297
264 G_BR = 249, // GenericOpcodes.td:1655
265 G_BRJT = 250, // GenericOpcodes.td:1685
266 G_VSCALE = 251, // GenericOpcodes.td:1583
267 G_INSERT_SUBVECTOR = 252, // GenericOpcodes.td:1729
268 G_EXTRACT_SUBVECTOR = 253, // GenericOpcodes.td:1737
269 G_INSERT_VECTOR_ELT = 254, // GenericOpcodes.td:1745
270 G_EXTRACT_VECTOR_ELT = 255, // GenericOpcodes.td:1753
271 G_SHUFFLE_VECTOR = 256, // GenericOpcodes.td:1764
272 G_SPLAT_VECTOR = 257, // GenericOpcodes.td:1772
273 G_STEP_VECTOR = 258, // GenericOpcodes.td:1780
274 G_VECTOR_COMPRESS = 259, // GenericOpcodes.td:1787
275 G_CTTZ = 260, // GenericOpcodes.td:211
276 G_CTTZ_ZERO_POISON = 261, // GenericOpcodes.td:217
277 G_CTLZ = 262, // GenericOpcodes.td:199
278 G_CTLZ_ZERO_POISON = 263, // GenericOpcodes.td:205
279 G_CTLS = 264, // GenericOpcodes.td:223
280 G_CTPOP = 265, // GenericOpcodes.td:229
281 G_BSWAP = 266, // GenericOpcodes.td:235
282 G_BITREVERSE = 267, // GenericOpcodes.td:242
283 G_CLMUL = 268, // GenericOpcodes.td:588
284 G_CLMULH = 269, // GenericOpcodes.td:596
285 G_CLMULR = 270, // GenericOpcodes.td:606
286 G_FCEIL = 271, // GenericOpcodes.td:1131
287 G_FCOS = 272, // GenericOpcodes.td:1138
288 G_FSIN = 273, // GenericOpcodes.td:1145
289 G_FSINCOS = 274, // GenericOpcodes.td:1152
290 G_FTAN = 275, // GenericOpcodes.td:1159
291 G_FACOS = 276, // GenericOpcodes.td:1166
292 G_FASIN = 277, // GenericOpcodes.td:1173
293 G_FATAN = 278, // GenericOpcodes.td:1180
294 G_FATAN2 = 279, // GenericOpcodes.td:1187
295 G_FCOSH = 280, // GenericOpcodes.td:1194
296 G_FSINH = 281, // GenericOpcodes.td:1201
297 G_FTANH = 282, // GenericOpcodes.td:1208
298 G_FSQRT = 283, // GenericOpcodes.td:1218
299 G_FFLOOR = 284, // GenericOpcodes.td:1225
300 G_FRINT = 285, // GenericOpcodes.td:1232
301 G_FNEARBYINT = 286, // GenericOpcodes.td:1239
302 G_ADDRSPACE_CAST = 287, // GenericOpcodes.td:248
303 G_BLOCK_ADDR = 288, // GenericOpcodes.td:254
304 G_JUMP_TABLE = 289, // GenericOpcodes.td:260
305 G_DYN_STACKALLOC = 290, // GenericOpcodes.td:266
306 G_STACKSAVE = 291, // GenericOpcodes.td:272
307 G_STACKRESTORE = 292, // GenericOpcodes.td:278
308 G_STRICT_FADD = 293, // GenericOpcodes.td:1839
309 G_STRICT_FSUB = 294, // GenericOpcodes.td:1840
310 G_STRICT_FMUL = 295, // GenericOpcodes.td:1841
311 G_STRICT_FDIV = 296, // GenericOpcodes.td:1842
312 G_STRICT_FREM = 297, // GenericOpcodes.td:1843
313 G_STRICT_FMA = 298, // GenericOpcodes.td:1844
314 G_STRICT_FSQRT = 299, // GenericOpcodes.td:1845
315 G_STRICT_FLDEXP = 300, // GenericOpcodes.td:1846
316 G_STRICT_FCMP = 301, // GenericOpcodes.td:1847
317 G_STRICT_FCMPS = 302, // GenericOpcodes.td:1848
318 G_READ_REGISTER = 303, // GenericOpcodes.td:1704
319 G_WRITE_REGISTER = 304, // GenericOpcodes.td:1714
320 G_MEMCPY = 305, // GenericOpcodes.td:1854
321 G_MEMCPY_INLINE = 306, // GenericOpcodes.td:1862
322 G_MEMMOVE = 307, // GenericOpcodes.td:1870
323 G_MEMSET = 308, // GenericOpcodes.td:1878
324 G_BZERO = 309, // GenericOpcodes.td:1885
325 G_MEMSET_INLINE = 310, // GenericOpcodes.td:1892
326 G_TRAP = 311, // GenericOpcodes.td:1902
327 G_DEBUGTRAP = 312, // GenericOpcodes.td:1909
328 G_UBSANTRAP = 313, // GenericOpcodes.td:1915
329 G_VECREDUCE_SEQ_FADD = 314, // GenericOpcodes.td:1803
330 G_VECREDUCE_SEQ_FMUL = 315, // GenericOpcodes.td:1809
331 G_VECREDUCE_FADD = 316, // GenericOpcodes.td:1815
332 G_VECREDUCE_FMUL = 317, // GenericOpcodes.td:1816
333 G_VECREDUCE_FMAX = 318, // GenericOpcodes.td:1818
334 G_VECREDUCE_FMIN = 319, // GenericOpcodes.td:1819
335 G_VECREDUCE_FMAXIMUM = 320, // GenericOpcodes.td:1820
336 G_VECREDUCE_FMINIMUM = 321, // GenericOpcodes.td:1821
337 G_VECREDUCE_FMAXIMUMNUM = 322, // GenericOpcodes.td:1822
338 G_VECREDUCE_FMINIMUMNUM = 323, // GenericOpcodes.td:1823
339 G_VECREDUCE_ADD = 324, // GenericOpcodes.td:1825
340 G_VECREDUCE_MUL = 325, // GenericOpcodes.td:1826
341 G_VECREDUCE_AND = 326, // GenericOpcodes.td:1827
342 G_VECREDUCE_OR = 327, // GenericOpcodes.td:1828
343 G_VECREDUCE_XOR = 328, // GenericOpcodes.td:1829
344 G_VECREDUCE_SMAX = 329, // GenericOpcodes.td:1830
345 G_VECREDUCE_SMIN = 330, // GenericOpcodes.td:1831
346 G_VECREDUCE_UMAX = 331, // GenericOpcodes.td:1832
347 G_VECREDUCE_UMIN = 332, // GenericOpcodes.td:1833
348 G_SBFX = 333, // GenericOpcodes.td:1927
349 G_UBFX = 334, // GenericOpcodes.td:1935
350 ADJCALLSTACKDOWN = 335, // SparcInstrInfo.td:613
351 ADJCALLSTACKUP = 336, // SparcInstrInfo.td:616
352 GETPCX = 337, // SparcInstrInfo.td:609
353 SELECT_CC_DFP_FCC = 338, // SparcInstrInfo.td:689
354 SELECT_CC_DFP_ICC = 339, // SparcInstrInfo.td:646
355 SELECT_CC_DFP_XCC = 340, // SparcInstrInfo.td:667
356 SELECT_CC_FP_FCC = 341, // SparcInstrInfo.td:685
357 SELECT_CC_FP_ICC = 342, // SparcInstrInfo.td:641
358 SELECT_CC_FP_XCC = 343, // SparcInstrInfo.td:662
359 SELECT_CC_Int_FCC = 344, // SparcInstrInfo.td:680
360 SELECT_CC_Int_ICC = 345, // SparcInstrInfo.td:637
361 SELECT_CC_Int_XCC = 346, // SparcInstrInfo.td:658
362 SELECT_CC_QFP_FCC = 347, // SparcInstrInfo.td:693
363 SELECT_CC_QFP_ICC = 348, // SparcInstrInfo.td:651
364 SELECT_CC_QFP_XCC = 349, // SparcInstrInfo.td:672
365 SET = 350, // SparcInstrAliases.td:562
366 SETSW = 351, // SparcInstrAliases.td:566
367 SETX = 352, // SparcInstrAliases.td:570
368 V8BAR = 353, // SparcInstrInfo.td:605
369 ADDCCri = 354, // SparcInstrInfo.td:502
370 ADDCCrr = 355, // SparcInstrInfo.td:497
371 ADDCri = 356, // SparcInstrInfo.td:516
372 ADDCrr = 357, // SparcInstrInfo.td:512
373 ADDEri = 358, // SparcInstrInfo.td:502
374 ADDErr = 359, // SparcInstrInfo.td:497
375 ADDXC = 360, // SparcInstrVIS.td:185
376 ADDXCCC = 361, // SparcInstrVIS.td:188
377 ADDri = 362, // SparcInstrInfo.td:502
378 ADDrr = 363, // SparcInstrInfo.td:497
379 AES_DROUND01 = 364, // SparcInstrCrypto.td:23
380 AES_DROUND01_LAST = 365, // SparcInstrCrypto.td:27
381 AES_DROUND23 = 366, // SparcInstrCrypto.td:24
382 AES_DROUND23_LAST = 367, // SparcInstrCrypto.td:28
383 AES_EROUND01 = 368, // SparcInstrCrypto.td:21
384 AES_EROUND01_LAST = 369, // SparcInstrCrypto.td:25
385 AES_EROUND23 = 370, // SparcInstrCrypto.td:22
386 AES_EROUND23_LAST = 371, // SparcInstrCrypto.td:26
387 AES_KEXPAND0 = 372, // SparcInstrCrypto.td:29
388 AES_KEXPAND1 = 373, // SparcInstrCrypto.td:32
389 AES_KEXPAND2 = 374, // SparcInstrCrypto.td:33
390 ALIGNADDR = 375, // SparcInstrVIS.td:96
391 ALIGNADDRL = 376, // SparcInstrVIS.td:97
392 ALLCLEAN = 377, // SparcInstrUAOSA.td:39
393 ANDCCri = 378, // SparcInstrInfo.td:516
394 ANDCCrr = 379, // SparcInstrInfo.td:512
395 ANDNCCri = 380, // SparcInstrInfo.td:516
396 ANDNCCrr = 381, // SparcInstrInfo.td:512
397 ANDNri = 382, // SparcInstrInfo.td:877
398 ANDNrr = 383, // SparcInstrInfo.td:873
399 ANDri = 384, // SparcInstrInfo.td:502
400 ANDrr = 385, // SparcInstrInfo.td:497
401 ARRAY16 = 386, // SparcInstrVIS.td:154
402 ARRAY32 = 387, // SparcInstrVIS.td:155
403 ARRAY8 = 388, // SparcInstrVIS.td:153
404 BA = 389, // SparcInstrInfo.td:990
405 BCOND = 390, // SparcInstrInfo.td:1041
406 BCONDA = 391, // SparcInstrInfo.td:1044
407 BINDri = 392, // SparcInstrInfo.td:1033
408 BINDrr = 393, // SparcInstrInfo.td:1028
409 BMASK = 394, // SparcInstrVIS.td:165
410 BPFCC = 395, // SparcInstrInfo.td:1065
411 BPFCCA = 396, // SparcInstrInfo.td:1068
412 BPFCCANT = 397, // SparcInstrInfo.td:1074
413 BPFCCNT = 398, // SparcInstrInfo.td:1071
414 BPICC = 399, // SparcInstrInfo.td:1004
415 BPICCA = 400, // SparcInstrInfo.td:1008
416 BPICCANT = 401, // SparcInstrInfo.td:1016
417 BPICCNT = 402, // SparcInstrInfo.td:1012
418 BPR = 403, // SparcInstr64Bit.td:334
419 BPRA = 404, // SparcInstr64Bit.td:336
420 BPRANT = 405, // SparcInstr64Bit.td:340
421 BPRNT = 406, // SparcInstr64Bit.td:338
422 BPXCC = 407, // SparcInstrInfo.td:1004
423 BPXCCA = 408, // SparcInstrInfo.td:1008
424 BPXCCANT = 409, // SparcInstrInfo.td:1016
425 BPXCCNT = 410, // SparcInstrInfo.td:1012
426 BSHUFFLE = 411, // SparcInstrVIS.td:166
427 CALL = 412, // SparcInstrInfo.td:1127
428 CALLi = 413, // SparcInstrInfo.td:1139
429 CALLri = 414, // SparcInstrInfo.td:1154
430 CALLrii = 415, // SparcInstrInfo.td:1165
431 CALLrr = 416, // SparcInstrInfo.td:1149
432 CALLrri = 417, // SparcInstrInfo.td:1162
433 CAMELLIA_F = 418, // SparcInstrCrypto.td:37
434 CAMELLIA_FL = 419, // SparcInstrCrypto.td:38
435 CAMELLIA_FLI = 420, // SparcInstrCrypto.td:41
436 CASAri = 421, // SparcInstrInfo.td:1829
437 CASArr = 422, // SparcInstrInfo.td:1821
438 CASXAri = 423, // SparcInstr64Bit.td:452
439 CASXArr = 424, // SparcInstr64Bit.td:445
440 CMASK16 = 425, // SparcInstrVIS.td:193
441 CMASK32 = 426, // SparcInstrVIS.td:195
442 CMASK8 = 427, // SparcInstrVIS.td:191
443 CPBCOND = 428, // SparcInstrInfo.td:1117
444 CPBCONDA = 429, // SparcInstrInfo.td:1120
445 CRC32C = 430, // SparcInstrCrypto.td:45
446 CWBCONDri = 431, // SparcInstrUAOSA.td:31
447 CWBCONDrr = 432, // SparcInstrUAOSA.td:28
448 CXBCONDri = 433, // SparcInstrUAOSA.td:31
449 CXBCONDrr = 434, // SparcInstrUAOSA.td:28
450 DES_IIP = 435, // SparcInstrCrypto.td:54
451 DES_IP = 436, // SparcInstrCrypto.td:51
452 DES_KEXPAND = 437, // SparcInstrCrypto.td:58
453 DES_ROUND = 438, // SparcInstrCrypto.td:49
454 DONE = 439, // SparcInstrInfo.td:1883
455 EDGE16 = 440, // SparcInstrVIS.td:146
456 EDGE16L = 441, // SparcInstrVIS.td:147
457 EDGE16LN = 442, // SparcInstrVIS.td:175
458 EDGE16N = 443, // SparcInstrVIS.td:174
459 EDGE32 = 444, // SparcInstrVIS.td:148
460 EDGE32L = 445, // SparcInstrVIS.td:149
461 EDGE32LN = 446, // SparcInstrVIS.td:177
462 EDGE32N = 447, // SparcInstrVIS.td:176
463 EDGE8 = 448, // SparcInstrVIS.td:144
464 EDGE8L = 449, // SparcInstrVIS.td:145
465 EDGE8LN = 450, // SparcInstrVIS.td:173
466 EDGE8N = 451, // SparcInstrVIS.td:172
467 FABSD = 452, // SparcInstrInfo.td:1737
468 FABSQ = 453, // SparcInstrInfo.td:1742
469 FABSS = 454, // SparcInstrInfo.td:1420
470 FADDD = 455, // SparcInstrInfo.td:1455
471 FADDQ = 456, // SparcInstrInfo.td:1460
472 FADDS = 457, // SparcInstrInfo.td:1450
473 FALIGNADATA = 458, // SparcInstrVIS.td:98
474 FAND = 459, // SparcInstrVIS.td:116
475 FANDNOT1 = 460, // SparcInstrVIS.td:129
476 FANDNOT1S = 461, // SparcInstrVIS.td:130
477 FANDNOT2 = 462, // SparcInstrVIS.td:131
478 FANDNOT2S = 463, // SparcInstrVIS.td:132
479 FANDS = 464, // SparcInstrVIS.td:117
480 FBCOND = 465, // SparcInstrInfo.td:1081
481 FBCONDA = 466, // SparcInstrInfo.td:1084
482 FBCONDA_V9 = 467, // SparcInstrInfo.td:1095
483 FBCOND_V9 = 468, // SparcInstrInfo.td:1091
484 FCHKSM16 = 469, // SparcInstrVIS.td:200
485 FCMPD = 470, // SparcInstrInfo.td:1546
486 FCMPD_V9 = 471, // SparcInstrInfo.td:1571
487 FCMPEQ16 = 472, // SparcInstrVIS.td:140
488 FCMPEQ32 = 473, // SparcInstrVIS.td:141
489 FCMPGT16 = 474, // SparcInstrVIS.td:134
490 FCMPGT32 = 475, // SparcInstrVIS.td:135
491 FCMPLE16 = 476, // SparcInstrVIS.td:136
492 FCMPLE32 = 477, // SparcInstrVIS.td:137
493 FCMPNE16 = 478, // SparcInstrVIS.td:138
494 FCMPNE32 = 479, // SparcInstrVIS.td:139
495 FCMPQ = 480, // SparcInstrInfo.td:1551
496 FCMPQ_V9 = 481, // SparcInstrInfo.td:1576
497 FCMPS = 482, // SparcInstrInfo.td:1541
498 FCMPS_V9 = 483, // SparcInstrInfo.td:1566
499 FDIVD = 484, // SparcInstrInfo.td:1522
500 FDIVQ = 485, // SparcInstrInfo.td:1527
501 FDIVS = 486, // SparcInstrInfo.td:1517
502 FDMULQ = 487, // SparcInstrInfo.td:1508
503 FDTOI = 488, // SparcInstrInfo.td:1368
504 FDTOQ = 489, // SparcInstrInfo.td:1395
505 FDTOS = 490, // SparcInstrInfo.td:1390
506 FDTOX = 491, // SparcInstr64Bit.td:408
507 FEXPAND = 492, // SparcInstrVIS.td:72
508 FHADDD = 493, // SparcInstrVIS.td:205
509 FHADDS = 494, // SparcInstrVIS.td:202
510 FHSUBD = 495, // SparcInstrVIS.td:211
511 FHSUBS = 496, // SparcInstrVIS.td:208
512 FITOD = 497, // SparcInstrInfo.td:1351
513 FITOQ = 498, // SparcInstrInfo.td:1356
514 FITOS = 499, // SparcInstrInfo.td:1346
515 FLCMPD = 500, // SparcInstrVIS.td:217
516 FLCMPS = 501, // SparcInstrVIS.td:214
517 FLUSH = 502, // SparcInstrInfo.td:1340
518 FLUSHW = 503, // SparcInstrInfo.td:623
519 FLUSHri = 504, // SparcInstrInfo.td:1333
520 FLUSHrr = 505, // SparcInstrInfo.td:1331
521 FMADDD = 506, // SparcInstrUAOSA.td:49
522 FMADDS = 507, // SparcInstrUAOSA.td:48
523 FMEAN16 = 508, // SparcInstrVIS.td:221
524 FMOVD = 509, // SparcInstrInfo.td:1721
525 FMOVD_FCC = 510, // SparcInstrInfo.td:1704
526 FMOVD_ICC = 511, // SparcInstrInfo.td:1685
527 FMOVD_XCC = 512, // SparcInstr64Bit.td:315
528 FMOVQ = 513, // SparcInstrInfo.td:1725
529 FMOVQ_FCC = 514, // SparcInstrInfo.td:1710
530 FMOVQ_ICC = 515, // SparcInstrInfo.td:1691
531 FMOVQ_XCC = 516, // SparcInstr64Bit.td:321
532 FMOVRD = 517, // SparcInstr64Bit.td:373
533 FMOVRQ = 518, // SparcInstr64Bit.td:378
534 FMOVRS = 519, // SparcInstr64Bit.td:369
535 FMOVS = 520, // SparcInstrInfo.td:1412
536 FMOVS_FCC = 521, // SparcInstrInfo.td:1699
537 FMOVS_ICC = 522, // SparcInstrInfo.td:1680
538 FMOVS_XCC = 523, // SparcInstr64Bit.td:310
539 FMSUBD = 524, // SparcInstrUAOSA.td:51
540 FMSUBS = 525, // SparcInstrUAOSA.td:50
541 FMUL8SUX16 = 526, // SparcInstrVIS.td:87
542 FMUL8ULX16 = 527, // SparcInstrVIS.td:88
543 FMUL8X16 = 528, // SparcInstrVIS.td:78
544 FMUL8X16AL = 529, // SparcInstrVIS.td:84
545 FMUL8X16AU = 530, // SparcInstrVIS.td:81
546 FMULD = 531, // SparcInstrInfo.td:1490
547 FMULD8SUX16 = 532, // SparcInstrVIS.td:89
548 FMULD8ULX16 = 533, // SparcInstrVIS.td:92
549 FMULQ = 534, // SparcInstrInfo.td:1495
550 FMULS = 535, // SparcInstrInfo.td:1484
551 FNADDD = 536, // SparcInstrVIS.td:226
552 FNADDS = 537, // SparcInstrVIS.td:223
553 FNAND = 538, // SparcInstrVIS.td:118
554 FNANDS = 539, // SparcInstrVIS.td:119
555 FNEGD = 540, // SparcInstrInfo.td:1728
556 FNEGQ = 541, // SparcInstrInfo.td:1733
557 FNEGS = 542, // SparcInstrInfo.td:1415
558 FNHADDD = 543, // SparcInstrVIS.td:232
559 FNHADDS = 544, // SparcInstrVIS.td:229
560 FNMADDD = 545, // SparcInstrUAOSA.td:54
561 FNMADDS = 546, // SparcInstrUAOSA.td:53
562 FNMSUBD = 547, // SparcInstrUAOSA.td:56
563 FNMSUBS = 548, // SparcInstrUAOSA.td:55
564 FNMULD = 549, // SparcInstrVIS.td:239
565 FNMULS = 550, // SparcInstrVIS.td:236
566 FNOR = 551, // SparcInstrVIS.td:114
567 FNORS = 552, // SparcInstrVIS.td:115
568 FNOT1 = 553, // SparcInstrVIS.td:108
569 FNOT1S = 554, // SparcInstrVIS.td:109
570 FNOT2 = 555, // SparcInstrVIS.td:110
571 FNOT2S = 556, // SparcInstrVIS.td:111
572 FNSMULD = 557, // SparcInstrVIS.td:242
573 FONE = 558, // SparcInstrVIS.td:102
574 FONES = 559, // SparcInstrVIS.td:103
575 FOR = 560, // SparcInstrVIS.td:112
576 FORNOT1 = 561, // SparcInstrVIS.td:125
577 FORNOT1S = 562, // SparcInstrVIS.td:126
578 FORNOT2 = 563, // SparcInstrVIS.td:127
579 FORNOT2S = 564, // SparcInstrVIS.td:128
580 FORS = 565, // SparcInstrVIS.td:113
581 FPACK16 = 566, // SparcInstrVIS.td:66
582 FPACK32 = 567, // SparcInstrVIS.td:67
583 FPACKFIX = 568, // SparcInstrVIS.td:69
584 FPADD16 = 569, // SparcInstrVIS.td:57
585 FPADD16S = 570, // SparcInstrVIS.td:58
586 FPADD32 = 571, // SparcInstrVIS.td:59
587 FPADD32S = 572, // SparcInstrVIS.td:60
588 FPADD64 = 573, // SparcInstrVIS.td:246
589 FPMADDX = 574, // SparcInstrUAOSA.td:66
590 FPMADDXHI = 575, // SparcInstrUAOSA.td:67
591 FPMERGE = 576, // SparcInstrVIS.td:74
592 FPSUB16 = 577, // SparcInstrVIS.td:61
593 FPSUB16S = 578, // SparcInstrVIS.td:62
594 FPSUB32 = 579, // SparcInstrVIS.td:63
595 FPSUB32S = 580, // SparcInstrVIS.td:64
596 FQTOD = 581, // SparcInstrInfo.td:1405
597 FQTOI = 582, // SparcInstrInfo.td:1373
598 FQTOS = 583, // SparcInstrInfo.td:1400
599 FQTOX = 584, // SparcInstr64Bit.td:413
600 FSLAS16 = 585, // SparcInstrVIS.td:252
601 FSLAS32 = 586, // SparcInstrVIS.td:254
602 FSLL16 = 587, // SparcInstrVIS.td:248
603 FSLL32 = 588, // SparcInstrVIS.td:250
604 FSMULD = 589, // SparcInstrInfo.td:1501
605 FSQRTD = 590, // SparcInstrInfo.td:1436
606 FSQRTQ = 591, // SparcInstrInfo.td:1441
607 FSQRTS = 592, // SparcInstrInfo.td:1431
608 FSRA16 = 593, // SparcInstrVIS.td:253
609 FSRA32 = 594, // SparcInstrVIS.td:255
610 FSRC1 = 595, // SparcInstrVIS.td:104
611 FSRC1S = 596, // SparcInstrVIS.td:105
612 FSRC2 = 597, // SparcInstrVIS.td:106
613 FSRC2S = 598, // SparcInstrVIS.td:107
614 FSRL16 = 599, // SparcInstrVIS.td:249
615 FSRL32 = 600, // SparcInstrVIS.td:251
616 FSTOD = 601, // SparcInstrInfo.td:1380
617 FSTOI = 602, // SparcInstrInfo.td:1363
618 FSTOQ = 603, // SparcInstrInfo.td:1385
619 FSTOX = 604, // SparcInstr64Bit.td:404
620 FSUBD = 605, // SparcInstrInfo.td:1471
621 FSUBQ = 606, // SparcInstrInfo.td:1476
622 FSUBS = 607, // SparcInstrInfo.td:1466
623 FXNOR = 608, // SparcInstrVIS.td:122
624 FXNORS = 609, // SparcInstrVIS.td:123
625 FXOR = 610, // SparcInstrVIS.td:120
626 FXORS = 611, // SparcInstrVIS.td:121
627 FXTOD = 612, // SparcInstr64Bit.td:394
628 FXTOQ = 613, // SparcInstr64Bit.td:399
629 FXTOS = 614, // SparcInstr64Bit.td:390
630 FZERO = 615, // SparcInstrVIS.td:100
631 FZEROS = 616, // SparcInstrVIS.td:101
632 GDOP_LDXrr = 617, // SparcInstr64Bit.td:219
633 GDOP_LDrr = 618, // SparcInstrInfo.td:749
634 INVALW = 619, // SparcInstrUAOSA.td:40
635 JMPLri = 620, // SparcInstrInfo.td:1180
636 JMPLrr = 621, // SparcInstrInfo.td:1175
637 LDAri = 622, // SparcInstrInfo.td:545
638 LDArr = 623, // SparcInstrInfo.td:540
639 LDCSRri = 624, // SparcInstrInfo.td:728
640 LDCSRrr = 625, // SparcInstrInfo.td:726
641 LDCri = 626, // SparcInstrInfo.td:530
642 LDCrr = 627, // SparcInstrInfo.td:525
643 LDDAri = 628, // SparcInstrInfo.td:545
644 LDDArr = 629, // SparcInstrInfo.td:540
645 LDDCri = 630, // SparcInstrInfo.td:530
646 LDDCrr = 631, // SparcInstrInfo.td:525
647 LDDFAri = 632, // SparcInstrInfo.td:545
648 LDDFArr = 633, // SparcInstrInfo.td:540
649 LDDFri = 634, // SparcInstrInfo.td:530
650 LDDFrr = 635, // SparcInstrInfo.td:525
651 LDDri = 636, // SparcInstrInfo.td:530
652 LDDrr = 637, // SparcInstrInfo.td:525
653 LDFAri = 638, // SparcInstrInfo.td:545
654 LDFArr = 639, // SparcInstrInfo.td:540
655 LDFSRri = 640, // SparcInstrInfo.td:737
656 LDFSRrr = 641, // SparcInstrInfo.td:735
657 LDFri = 642, // SparcInstrInfo.td:530
658 LDFrr = 643, // SparcInstrInfo.td:525
659 LDQFAri = 644, // SparcInstrInfo.td:545
660 LDQFArr = 645, // SparcInstrInfo.td:540
661 LDQFri = 646, // SparcInstrInfo.td:530
662 LDQFrr = 647, // SparcInstrInfo.td:525
663 LDSBAri = 648, // SparcInstrInfo.td:545
664 LDSBArr = 649, // SparcInstrInfo.td:540
665 LDSBri = 650, // SparcInstrInfo.td:530
666 LDSBrr = 651, // SparcInstrInfo.td:525
667 LDSHAri = 652, // SparcInstrInfo.td:545
668 LDSHArr = 653, // SparcInstrInfo.td:540
669 LDSHri = 654, // SparcInstrInfo.td:530
670 LDSHrr = 655, // SparcInstrInfo.td:525
671 LDSTUBAri = 656, // SparcInstrInfo.td:828
672 LDSTUBArr = 657, // SparcInstrInfo.td:824
673 LDSTUBri = 658, // SparcInstrInfo.td:822
674 LDSTUBrr = 659, // SparcInstrInfo.td:820
675 LDSWAri = 660, // SparcInstrInfo.td:545
676 LDSWArr = 661, // SparcInstrInfo.td:540
677 LDSWri = 662, // SparcInstrInfo.td:530
678 LDSWrr = 663, // SparcInstrInfo.td:525
679 LDUBAri = 664, // SparcInstrInfo.td:545
680 LDUBArr = 665, // SparcInstrInfo.td:540
681 LDUBri = 666, // SparcInstrInfo.td:530
682 LDUBrr = 667, // SparcInstrInfo.td:525
683 LDUHAri = 668, // SparcInstrInfo.td:545
684 LDUHArr = 669, // SparcInstrInfo.td:540
685 LDUHri = 670, // SparcInstrInfo.td:530
686 LDUHrr = 671, // SparcInstrInfo.td:525
687 LDXAri = 672, // SparcInstrInfo.td:545
688 LDXArr = 673, // SparcInstrInfo.td:540
689 LDXFSRri = 674, // SparcInstrInfo.td:743
690 LDXFSRrr = 675, // SparcInstrInfo.td:741
691 LDXri = 676, // SparcInstrInfo.td:530
692 LDXrr = 677, // SparcInstrInfo.td:525
693 LDri = 678, // SparcInstrInfo.td:530
694 LDrr = 679, // SparcInstrInfo.td:525
695 LZCNT = 680, // SparcInstrVIS.td:258
696 MD5 = 681, // SparcInstrCrypto.td:65
697 MEMBARi = 682, // SparcInstrInfo.td:1811
698 MONTMUL = 683, // SparcInstrCrypto.td:95
699 MONTSQR = 684, // SparcInstrCrypto.td:96
700 MOVDTOX = 685, // SparcInstrVIS.td:266
701 MOVFCCri = 686, // SparcInstrInfo.td:1671
702 MOVFCCrr = 687, // SparcInstrInfo.td:1666
703 MOVICCri = 688, // SparcInstrInfo.td:1657
704 MOVICCrr = 689, // SparcInstrInfo.td:1651
705 MOVRri = 690, // SparcInstr64Bit.td:361
706 MOVRrr = 691, // SparcInstr64Bit.td:356
707 MOVSTOSW = 692, // SparcInstrVIS.td:262
708 MOVSTOUW = 693, // SparcInstrVIS.td:264
709 MOVWTOS = 694, // SparcInstrVIS.td:268
710 MOVXCCri = 695, // SparcInstr64Bit.td:302
711 MOVXCCrr = 696, // SparcInstr64Bit.td:297
712 MOVXTOD = 697, // SparcInstrVIS.td:270
713 MPMUL = 698, // SparcInstrCrypto.td:94
714 MULSCCri = 699, // SparcInstrInfo.td:516
715 MULSCCrr = 700, // SparcInstrInfo.td:512
716 MULXri = 701, // SparcInstrInfo.td:502
717 MULXrr = 702, // SparcInstrInfo.td:497
718 NOP = 703, // SparcInstrInfo.td:868
719 NORMALW = 704, // SparcInstrUAOSA.td:41
720 ORCCri = 705, // SparcInstrInfo.td:516
721 ORCCrr = 706, // SparcInstrInfo.td:512
722 ORNCCri = 707, // SparcInstrInfo.td:516
723 ORNCCrr = 708, // SparcInstrInfo.td:512
724 ORNri = 709, // SparcInstrInfo.td:887
725 ORNrr = 710, // SparcInstrInfo.td:883
726 ORri = 711, // SparcInstrInfo.td:502
727 ORrr = 712, // SparcInstrInfo.td:497
728 OTHERW = 713, // SparcInstrUAOSA.td:42
729 PDIST = 714, // SparcInstrVIS.td:151
730 PDISTN = 715, // SparcInstrVIS.td:274
731 POPCrr = 716, // SparcInstrInfo.td:1804
732 PREFETCHAi = 717, // SparcInstrInfo.td:1907
733 PREFETCHAr = 718, // SparcInstrInfo.td:1903
734 PREFETCHi = 719, // SparcInstrInfo.td:1900
735 PREFETCHr = 720, // SparcInstrInfo.td:1897
736 PWRPSRri = 721, // SparcInstrInfo.td:1864
737 PWRPSRrr = 722, // SparcInstrInfo.td:1861
738 RDASR = 723, // SparcInstrInfo.td:1259
739 RDFQ = 724, // SparcInstrInfo.td:1926
740 RDPR = 725, // SparcInstrInfo.td:1917
741 RDPSR = 726, // SparcInstrInfo.td:1266
742 RDTBR = 727, // SparcInstrInfo.td:1276
743 RDWIM = 728, // SparcInstrInfo.td:1271
744 RESTORED = 729, // SparcInstrInfo.td:1892
745 RESTOREri = 730, // SparcInstrInfo.td:516
746 RESTORErr = 731, // SparcInstrInfo.td:512
747 RET = 732, // SparcInstrInfo.td:1199
748 RETL = 733, // SparcInstrInfo.td:1192
749 RETRY = 734, // SparcInstrInfo.td:1886
750 RETTri = 735, // SparcInstrInfo.td:1214
751 RETTrr = 736, // SparcInstrInfo.td:1209
752 SAVED = 737, // SparcInstrInfo.td:1889
753 SAVEri = 738, // SparcInstrInfo.td:516
754 SAVErr = 739, // SparcInstrInfo.td:512
755 SDIVCCri = 740, // SparcInstrInfo.td:516
756 SDIVCCrr = 741, // SparcInstrInfo.td:512
757 SDIVXri = 742, // SparcInstrInfo.td:502
758 SDIVXrr = 743, // SparcInstrInfo.td:497
759 SDIVri = 744, // SparcInstrInfo.td:516
760 SDIVrr = 745, // SparcInstrInfo.td:512
761 SETHIi = 746, // SparcInstrInfo.td:859
762 SHA1 = 747, // SparcInstrCrypto.td:68
763 SHA256 = 748, // SparcInstrCrypto.td:71
764 SHA512 = 749, // SparcInstrCrypto.td:75
765 SHUTDOWN = 750, // SparcInstrVIS.td:157
766 SIAM = 751, // SparcInstrVIS.td:169
767 SIR = 752, // SparcInstrInfo.td:1815
768 SLLXri = 753, // SparcInstrFormats.td:299
769 SLLXrr = 754, // SparcInstrFormats.td:295
770 SLLri = 755, // SparcInstrFormats.td:299
771 SLLrr = 756, // SparcInstrFormats.td:295
772 SMACri = 757, // SparcInstrInfo.td:1842
773 SMACrr = 758, // SparcInstrInfo.td:1837
774 SMULCCri = 759, // SparcInstrInfo.td:516
775 SMULCCrr = 760, // SparcInstrInfo.td:512
776 SMULri = 761, // SparcInstrInfo.td:502
777 SMULrr = 762, // SparcInstrInfo.td:497
778 SRAXri = 763, // SparcInstrFormats.td:299
779 SRAXrr = 764, // SparcInstrFormats.td:295
780 SRAri = 765, // SparcInstrFormats.td:299
781 SRArr = 766, // SparcInstrFormats.td:295
782 SRLXri = 767, // SparcInstrFormats.td:299
783 SRLXrr = 768, // SparcInstrFormats.td:295
784 SRLri = 769, // SparcInstrFormats.td:299
785 SRLrr = 770, // SparcInstrFormats.td:295
786 STAri = 771, // SparcInstrInfo.td:581
787 STArr = 772, // SparcInstrInfo.td:575
788 STBAR = 773, // SparcInstrInfo.td:1321
789 STBAri = 774, // SparcInstrInfo.td:581
790 STBArr = 775, // SparcInstrInfo.td:575
791 STBri = 776, // SparcInstrInfo.td:566
792 STBrr = 777, // SparcInstrInfo.td:561
793 STCSRri = 778, // SparcInstrInfo.td:784
794 STCSRrr = 779, // SparcInstrInfo.td:782
795 STCri = 780, // SparcInstrInfo.td:566
796 STCrr = 781, // SparcInstrInfo.td:561
797 STDAri = 782, // SparcInstrInfo.td:581
798 STDArr = 783, // SparcInstrInfo.td:575
799 STDCQri = 784, // SparcInstrInfo.td:790
800 STDCQrr = 785, // SparcInstrInfo.td:788
801 STDCri = 786, // SparcInstrInfo.td:566
802 STDCrr = 787, // SparcInstrInfo.td:561
803 STDFAri = 788, // SparcInstrInfo.td:581
804 STDFArr = 789, // SparcInstrInfo.td:575
805 STDFQri = 790, // SparcInstrInfo.td:805
806 STDFQrr = 791, // SparcInstrInfo.td:803
807 STDFri = 792, // SparcInstrInfo.td:566
808 STDFrr = 793, // SparcInstrInfo.td:561
809 STDri = 794, // SparcInstrInfo.td:566
810 STDrr = 795, // SparcInstrInfo.td:561
811 STFAri = 796, // SparcInstrInfo.td:581
812 STFArr = 797, // SparcInstrInfo.td:575
813 STFSRri = 798, // SparcInstrInfo.td:799
814 STFSRrr = 799, // SparcInstrInfo.td:797
815 STFri = 800, // SparcInstrInfo.td:566
816 STFrr = 801, // SparcInstrInfo.td:561
817 STHAri = 802, // SparcInstrInfo.td:581
818 STHArr = 803, // SparcInstrInfo.td:575
819 STHri = 804, // SparcInstrInfo.td:566
820 STHrr = 805, // SparcInstrInfo.td:561
821 STQFAri = 806, // SparcInstrInfo.td:581
822 STQFArr = 807, // SparcInstrInfo.td:575
823 STQFri = 808, // SparcInstrInfo.td:566
824 STQFrr = 809, // SparcInstrInfo.td:561
825 STXAri = 810, // SparcInstrInfo.td:581
826 STXArr = 811, // SparcInstrInfo.td:575
827 STXFSRri = 812, // SparcInstrInfo.td:812
828 STXFSRrr = 813, // SparcInstrInfo.td:810
829 STXri = 814, // SparcInstrInfo.td:566
830 STXrr = 815, // SparcInstrInfo.td:561
831 STri = 816, // SparcInstrInfo.td:566
832 STrr = 817, // SparcInstrInfo.td:561
833 SUBCCri = 818, // SparcInstrInfo.td:502
834 SUBCCrr = 819, // SparcInstrInfo.td:497
835 SUBCri = 820, // SparcInstrInfo.td:516
836 SUBCrr = 821, // SparcInstrInfo.td:512
837 SUBEri = 822, // SparcInstrInfo.td:502
838 SUBErr = 823, // SparcInstrInfo.td:497
839 SUBri = 824, // SparcInstrInfo.td:502
840 SUBrr = 825, // SparcInstrInfo.td:497
841 SWAPAri = 826, // SparcInstrInfo.td:851
842 SWAPArr = 827, // SparcInstrInfo.td:845
843 SWAPri = 828, // SparcInstrInfo.td:840
844 SWAPrr = 829, // SparcInstrInfo.td:835
845 TA1 = 830, // SparcInstrInfo.td:1255
846 TA3 = 831, // SparcInstrInfo.td:627
847 TA5 = 832, // SparcInstrInfo.td:1252
848 TADDCCTVri = 833, // SparcInstrInfo.td:516
849 TADDCCTVrr = 834, // SparcInstrInfo.td:512
850 TADDCCri = 835, // SparcInstrInfo.td:516
851 TADDCCrr = 836, // SparcInstrInfo.td:512
852 TAIL_CALL = 837, // SparcInstrInfo.td:1621
853 TAIL_CALLri = 838, // SparcInstrInfo.td:1636
854 TICCri = 839, // SparcInstrInfo.td:1241
855 TICCrr = 840, // SparcInstrInfo.td:1237
856 TLS_ADDrr = 841, // SparcInstrInfo.td:1587
857 TLS_CALL = 842, // SparcInstrInfo.td:1604
858 TLS_LDXrr = 843, // SparcInstr64Bit.td:213
859 TLS_LDrr = 844, // SparcInstrInfo.td:1595
860 TRAPri = 845, // SparcInstrInfo.td:1230
861 TRAPrr = 846, // SparcInstrInfo.td:1226
862 TSUBCCTVri = 847, // SparcInstrInfo.td:516
863 TSUBCCTVrr = 848, // SparcInstrInfo.td:512
864 TSUBCCri = 849, // SparcInstrInfo.td:516
865 TSUBCCrr = 850, // SparcInstrInfo.td:512
866 TXCCri = 851, // SparcInstrInfo.td:1241
867 TXCCrr = 852, // SparcInstrInfo.td:1237
868 UDIVCCri = 853, // SparcInstrInfo.td:516
869 UDIVCCrr = 854, // SparcInstrInfo.td:512
870 UDIVXri = 855, // SparcInstrInfo.td:502
871 UDIVXrr = 856, // SparcInstrInfo.td:497
872 UDIVri = 857, // SparcInstrInfo.td:516
873 UDIVrr = 858, // SparcInstrInfo.td:512
874 UMACri = 859, // SparcInstrInfo.td:1852
875 UMACrr = 860, // SparcInstrInfo.td:1847
876 UMULCCri = 861, // SparcInstrInfo.td:516
877 UMULCCrr = 862, // SparcInstrInfo.td:512
878 UMULXHI = 863, // SparcInstrVIS.td:276
879 UMULri = 864, // SparcInstrInfo.td:502
880 UMULrr = 865, // SparcInstrInfo.td:497
881 UNIMP = 866, // SparcInstrInfo.td:1326
882 V9FCMPD = 867, // SparcInstrInfo.td:1752
883 V9FCMPED = 868, // SparcInstrInfo.td:1764
884 V9FCMPEQ = 869, // SparcInstrInfo.td:1767
885 V9FCMPES = 870, // SparcInstrInfo.td:1761
886 V9FCMPQ = 871, // SparcInstrInfo.td:1755
887 V9FCMPS = 872, // SparcInstrInfo.td:1749
888 V9FMOVD_FCC = 873, // SparcInstrInfo.td:1788
889 V9FMOVQ_FCC = 874, // SparcInstrInfo.td:1793
890 V9FMOVS_FCC = 875, // SparcInstrInfo.td:1784
891 V9MOVFCCri = 876, // SparcInstrInfo.td:1780
892 V9MOVFCCrr = 877, // SparcInstrInfo.td:1776
893 WRASRri = 878, // SparcInstrInfo.td:1285
894 WRASRrr = 879, // SparcInstrInfo.td:1282
895 WRPRri = 880, // SparcInstrInfo.td:1936
896 WRPRrr = 881, // SparcInstrInfo.td:1933
897 WRPSRri = 882, // SparcInstrInfo.td:1295
898 WRPSRrr = 883, // SparcInstrInfo.td:1292
899 WRTBRri = 884, // SparcInstrInfo.td:1313
900 WRTBRrr = 885, // SparcInstrInfo.td:1310
901 WRWIMri = 886, // SparcInstrInfo.td:1304
902 WRWIMrr = 887, // SparcInstrInfo.td:1301
903 XMULX = 888, // SparcInstrVIS.td:277
904 XMULXHI = 889, // SparcInstrVIS.td:278
905 XNORCCri = 890, // SparcInstrInfo.td:516
906 XNORCCrr = 891, // SparcInstrInfo.td:512
907 XNORri = 892, // SparcInstrInfo.td:896
908 XNORrr = 893, // SparcInstrInfo.td:892
909 XORCCri = 894, // SparcInstrInfo.td:516
910 XORCCrr = 895, // SparcInstrInfo.td:512
911 XORri = 896, // SparcInstrInfo.td:502
912 XORrr = 897, // SparcInstrInfo.td:497
913 INSTRUCTION_LIST_END = 898
914 };
915 enum RegClassByHwModeUses : uint16_t {
916 sparc_ptr_rc,
917 };
918
919} // namespace llvm::SP
920
921#endif // GET_INSTRINFO_ENUM
922
923#ifdef GET_INSTRINFO_SCHED_ENUM
924#undef GET_INSTRINFO_SCHED_ENUM
925
926namespace llvm::SP::Sched {
927
928 enum {
929 NoInstrModel = 0,
930 IIC_iu_instr = 1,
931 IIC_branch = 2,
932 IIC_jmp = 3,
933 IIC_fpu_normal_instr = 4,
934 IIC_call = 5,
935 IIC_atomic = 6,
936 IIC_fpu_abs = 7,
937 IIC_fpu_fast_instr = 8,
938 IIC_fp_branch = 9,
939 IIC_fpu_cmp = 10,
940 IIC_fpu_divd = 11,
941 IIC_fpu_divs = 12,
942 IIC_fpu_movs = 13,
943 IIC_fpu_muld = 14,
944 IIC_fpu_muls = 15,
945 IIC_fpu_negs = 16,
946 IIC_fpu_sqrtd = 17,
947 IIC_fpu_sqrts = 18,
948 IIC_fpu_stod = 19,
949 IIC_ldd = 20,
950 IIC_fpu_ldd = 21,
951 IIC_fpu_ld = 22,
952 IIC_ld = 23,
953 IIC_iu_div = 24,
954 IIC_smac_umac = 25,
955 IIC_iu_smul = 26,
956 IIC_st = 27,
957 IIC_std = 28,
958 IIC_fpu_std = 29,
959 IIC_fpu_st = 30,
960 IIC_iu_umul = 31,
961 SCHED_LIST_END = 32
962 };
963
964} // namespace llvm::SP::Sched
965
966#endif // GET_INSTRINFO_SCHED_ENUM
967
968#if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
969
970namespace llvm {
971
972struct SparcInstrTable {
973 MCInstrDesc Insts[898];
974 static_assert(alignof(MCInstrDesc) >= alignof(MCPhysReg), "Unwanted padding between Insts and ImplicitOps");
975 MCPhysReg ImplicitOps[218];
976 char Padding[sizeof(MCOperandInfo) - sizeof ImplicitOps % sizeof(MCOperandInfo)];
977 static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo");
978 MCOperandInfo OperandInfo[575];
979};
980} // namespace llvm
981
982#endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
983
984#ifdef GET_INSTRINFO_MC_DESC
985#undef GET_INSTRINFO_MC_DESC
986
987namespace llvm {
988
989static_assert((sizeof SparcInstrTable::ImplicitOps + sizeof SparcInstrTable::Padding) % sizeof(MCOperandInfo) == 0);
990static constexpr unsigned SparcOpInfoBase = (sizeof SparcInstrTable::ImplicitOps + sizeof SparcInstrTable::Padding) / sizeof(MCOperandInfo);
991
992extern const SparcInstrTable SparcDescs = {
993 {
994 { 897, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // XORrr
995 { 896, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // XORri
996 { 895, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XORCCrr
997 { 894, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XORCCri
998 { 893, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // XNORrr
999 { 892, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XNORri
1000 { 891, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XNORCCrr
1001 { 890, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XNORCCri
1002 { 889, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XMULXHI
1003 { 888, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XMULX
1004 { 887, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 141, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRWIMrr
1005 { 886, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 141, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRWIMri
1006 { 885, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRTBRrr
1007 { 884, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRTBRri
1008 { 883, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPSRrr
1009 { 882, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPSRri
1010 { 881, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 572, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPRrr
1011 { 880, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 569, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPRri
1012 { 879, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 566, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRASRrr
1013 { 878, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 563, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRASRri
1014 { 877, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 558, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9MOVFCCrr
1015 { 876, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 553, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9MOVFCCri
1016 { 875, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 548, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FMOVS_FCC
1017 { 874, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 543, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FMOVQ_FCC
1018 { 873, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 538, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FMOVD_FCC
1019 { 872, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 268, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPS
1020 { 871, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 535, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPQ
1021 { 870, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 268, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPES
1022 { 869, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 535, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPEQ
1023 { 868, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 265, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPED
1024 { 867, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 265, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPD
1025 { 866, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UNIMP
1026 { 865, 3, 1, 4, 31, 0, 1, SparcOpInfoBase + 175, 215, 0, 0x0ULL }, // UMULrr
1027 { 864, 3, 1, 4, 31, 0, 1, SparcOpInfoBase + 172, 215, 0, 0x0ULL }, // UMULri
1028 { 863, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0, 0x0ULL }, // UMULXHI
1029 { 862, 3, 1, 4, 31, 0, 2, SparcOpInfoBase + 175, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMULCCrr
1030 { 861, 3, 1, 4, 31, 0, 2, SparcOpInfoBase + 172, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMULCCri
1031 { 860, 3, 1, 4, 25, 2, 2, SparcOpInfoBase + 175, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMACrr
1032 { 859, 3, 1, 4, 25, 2, 2, SparcOpInfoBase + 172, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMACri
1033 { 858, 3, 1, 4, 24, 1, 1, SparcOpInfoBase + 175, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVrr
1034 { 857, 3, 1, 4, 24, 1, 1, SparcOpInfoBase + 172, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVri
1035 { 856, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVXrr
1036 { 855, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 414, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVXri
1037 { 854, 3, 1, 4, 24, 1, 2, SparcOpInfoBase + 175, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVCCrr
1038 { 853, 3, 1, 4, 24, 1, 2, SparcOpInfoBase + 172, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVCCri
1039 { 852, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 440, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TXCCrr
1040 { 851, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 528, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TXCCri
1041 { 850, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCrr
1042 { 849, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCri
1043 { 848, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCTVrr
1044 { 847, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCTVri
1045 { 846, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 440, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TRAPrr
1046 { 845, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 528, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TRAPri
1047 { 844, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // TLS_LDrr
1048 { 843, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // TLS_LDXrr
1049 { 842, 2, 0, 4, 5, 1, 0, SparcOpInfoBase + 189, 217, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // TLS_CALL
1050 { 841, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 531, 0, 0, 0x0ULL }, // TLS_ADDrr
1051 { 840, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 440, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TICCrr
1052 { 839, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 528, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TICCri
1053 { 838, 2, 0, 4, 3, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x0ULL }, // TAIL_CALLri
1054 { 837, 1, 0, 4, 5, 0, 0, SparcOpInfoBase + 188, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x0ULL }, // TAIL_CALL
1055 { 836, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCrr
1056 { 835, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCri
1057 { 834, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCTVrr
1058 { 833, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCTVri
1059 { 832, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TA5
1060 { 831, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TA3
1061 { 830, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TA1
1062 { 829, 4, 1, 4, 6, 0, 0, SparcOpInfoBase + 524, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // SWAPrr
1063 { 828, 4, 1, 4, 6, 0, 0, SparcOpInfoBase + 515, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // SWAPri
1064 { 827, 5, 1, 4, 6, 0, 0, SparcOpInfoBase + 519, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SWAPArr
1065 { 826, 4, 1, 4, 1, 1, 0, SparcOpInfoBase + 515, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SWAPAri
1066 { 825, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SUBrr
1067 { 824, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // SUBri
1068 { 823, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 175, 5, 0, 0x0ULL }, // SUBErr
1069 { 822, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 172, 5, 0, 0x0ULL }, // SUBEri
1070 { 821, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SUBCrr
1071 { 820, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SUBCri
1072 { 819, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::HasPostISelHook), 0x0ULL }, // SUBCCrr
1073 { 818, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::HasPostISelHook), 0x0ULL }, // SUBCCri
1074 { 817, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 450, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STrr
1075 { 816, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 443, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STri
1076 { 815, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 512, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STXrr
1077 { 814, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 505, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STXri
1078 { 813, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STXFSRrr
1079 { 812, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STXFSRri
1080 { 811, 4, 0, 4, 27, 0, 0, SparcOpInfoBase + 508, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STXArr
1081 { 810, 3, 0, 4, 27, 1, 0, SparcOpInfoBase + 505, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STXAri
1082 { 809, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 502, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STQFrr
1083 { 808, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 495, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STQFri
1084 { 807, 4, 0, 4, 27, 0, 0, SparcOpInfoBase + 498, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STQFArr
1085 { 806, 3, 0, 4, 27, 1, 0, SparcOpInfoBase + 495, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STQFAri
1086 { 805, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 450, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STHrr
1087 { 804, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 443, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STHri
1088 { 803, 4, 0, 4, 27, 0, 0, SparcOpInfoBase + 446, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STHArr
1089 { 802, 3, 0, 4, 27, 1, 0, SparcOpInfoBase + 443, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STHAri
1090 { 801, 3, 0, 4, 30, 0, 0, SparcOpInfoBase + 492, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STFrr
1091 { 800, 3, 0, 4, 30, 0, 0, SparcOpInfoBase + 485, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STFri
1092 { 799, 2, 0, 4, 27, 1, 0, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFSRrr
1093 { 798, 2, 0, 4, 27, 1, 0, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFSRri
1094 { 797, 4, 0, 4, 27, 0, 0, SparcOpInfoBase + 488, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFArr
1095 { 796, 3, 0, 4, 27, 1, 0, SparcOpInfoBase + 485, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFAri
1096 { 795, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 482, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDrr
1097 { 794, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 459, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDri
1098 { 793, 3, 0, 4, 29, 0, 0, SparcOpInfoBase + 479, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDFrr
1099 { 792, 3, 0, 4, 29, 0, 0, SparcOpInfoBase + 472, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDFri
1100 { 791, 2, 0, 4, 28, 0, 1, SparcOpInfoBase + 193, 139, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFQrr
1101 { 790, 2, 0, 4, 28, 0, 1, SparcOpInfoBase + 191, 139, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFQri
1102 { 789, 4, 0, 4, 27, 0, 0, SparcOpInfoBase + 475, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFArr
1103 { 788, 3, 0, 4, 27, 1, 0, SparcOpInfoBase + 472, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFAri
1104 { 787, 3, 0, 4, 28, 0, 0, SparcOpInfoBase + 469, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDCrr
1105 { 786, 3, 0, 4, 28, 0, 0, SparcOpInfoBase + 466, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDCri
1106 { 785, 2, 0, 4, 28, 1, 0, SparcOpInfoBase + 193, 216, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDCQrr
1107 { 784, 2, 0, 4, 28, 1, 0, SparcOpInfoBase + 191, 216, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDCQri
1108 { 783, 4, 0, 4, 27, 0, 0, SparcOpInfoBase + 462, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDArr
1109 { 782, 3, 0, 4, 27, 1, 0, SparcOpInfoBase + 459, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDAri
1110 { 781, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 456, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STCrr
1111 { 780, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 453, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STCri
1112 { 779, 2, 0, 4, 27, 1, 0, SparcOpInfoBase + 193, 10, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STCSRrr
1113 { 778, 2, 0, 4, 27, 1, 0, SparcOpInfoBase + 191, 10, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STCSRri
1114 { 777, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 450, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STBrr
1115 { 776, 3, 0, 4, 27, 0, 0, SparcOpInfoBase + 443, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STBri
1116 { 775, 4, 0, 4, 27, 0, 0, SparcOpInfoBase + 446, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STBArr
1117 { 774, 3, 0, 4, 27, 1, 0, SparcOpInfoBase + 443, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STBAri
1118 { 773, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STBAR
1119 { 772, 4, 0, 4, 27, 0, 0, SparcOpInfoBase + 446, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STArr
1120 { 771, 3, 0, 4, 27, 1, 0, SparcOpInfoBase + 443, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STAri
1121 { 770, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SRLrr
1122 { 769, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 440, 0, 0, 0x0ULL }, // SRLri
1123 { 768, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 437, 0, 0, 0x0ULL }, // SRLXrr
1124 { 767, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 434, 0, 0, 0x0ULL }, // SRLXri
1125 { 766, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SRArr
1126 { 765, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 440, 0, 0, 0x0ULL }, // SRAri
1127 { 764, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 437, 0, 0, 0x0ULL }, // SRAXrr
1128 { 763, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 434, 0, 0, 0x0ULL }, // SRAXri
1129 { 762, 3, 1, 4, 26, 0, 1, SparcOpInfoBase + 175, 215, 0, 0x0ULL }, // SMULrr
1130 { 761, 3, 1, 4, 26, 0, 1, SparcOpInfoBase + 172, 215, 0, 0x0ULL }, // SMULri
1131 { 760, 3, 1, 4, 26, 0, 2, SparcOpInfoBase + 175, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMULCCrr
1132 { 759, 3, 1, 4, 26, 0, 2, SparcOpInfoBase + 172, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMULCCri
1133 { 758, 3, 1, 4, 25, 2, 2, SparcOpInfoBase + 175, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMACrr
1134 { 757, 3, 1, 4, 25, 2, 2, SparcOpInfoBase + 172, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMACri
1135 { 756, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SLLrr
1136 { 755, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 440, 0, 0, 0x0ULL }, // SLLri
1137 { 754, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 437, 0, 0, 0x0ULL }, // SLLXrr
1138 { 753, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 434, 0, 0, 0x0ULL }, // SLLXri
1139 { 752, 1, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SIR
1140 { 751, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SIAM
1141 { 750, 0, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHUTDOWN
1142 { 749, 0, 0, 4, 0, 24, 8, SparcOpInfoBase + 1, 177, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHA512
1143 { 748, 0, 0, 4, 0, 12, 4, SparcOpInfoBase + 1, 161, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHA256
1144 { 747, 0, 0, 4, 0, 11, 3, SparcOpInfoBase + 1, 147, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHA1
1145 { 746, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 167, 0, 0, 0x0ULL }, // SETHIi
1146 { 745, 3, 1, 4, 24, 1, 1, SparcOpInfoBase + 175, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVrr
1147 { 744, 3, 1, 4, 24, 1, 1, SparcOpInfoBase + 172, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVri
1148 { 743, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVXrr
1149 { 742, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 414, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVXri
1150 { 741, 3, 1, 4, 24, 1, 2, SparcOpInfoBase + 175, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVCCrr
1151 { 740, 3, 1, 4, 24, 1, 2, SparcOpInfoBase + 172, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVCCri
1152 { 739, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SAVErr
1153 { 738, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SAVEri
1154 { 737, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SAVED
1155 { 736, 2, 0, 4, 3, 0, 0, SparcOpInfoBase + 193, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RETTrr
1156 { 735, 2, 0, 4, 3, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RETTri
1157 { 734, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RETRY
1158 { 733, 1, 0, 4, 3, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // RETL
1159 { 732, 1, 0, 4, 3, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RET
1160 { 731, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RESTORErr
1161 { 730, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RESTOREri
1162 { 729, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RESTORED
1163 { 728, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 141, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDWIM
1164 { 727, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDTBR
1165 { 726, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDPSR
1166 { 725, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 432, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDPR
1167 { 724, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 139, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDFQ
1168 { 723, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 429, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDASR
1169 { 722, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PWRPSRrr
1170 { 721, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PWRPSRri
1171 { 720, 3, 0, 4, 1, 0, 0, SparcOpInfoBase + 426, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHr
1172 { 719, 3, 0, 4, 1, 0, 0, SparcOpInfoBase + 419, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHi
1173 { 718, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 422, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHAr
1174 { 717, 3, 0, 4, 1, 1, 0, SparcOpInfoBase + 419, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHAi
1175 { 716, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 417, 0, 0, 0x0ULL }, // POPCrr
1176 { 715, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PDISTN
1177 { 714, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PDIST
1178 { 713, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // OTHERW
1179 { 712, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ORrr
1180 { 711, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // ORri
1181 { 710, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ORNrr
1182 { 709, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORNri
1183 { 708, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORNCCrr
1184 { 707, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORNCCri
1185 { 706, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORCCrr
1186 { 705, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORCCri
1187 { 704, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // NORMALW
1188 { 703, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // NOP
1189 { 702, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 178, 0, 0, 0x0ULL }, // MULXrr
1190 { 701, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 414, 0, 0, 0x0ULL }, // MULXri
1191 { 700, 3, 1, 4, 1, 2, 2, SparcOpInfoBase + 175, 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MULSCCrr
1192 { 699, 3, 1, 4, 1, 2, 2, SparcOpInfoBase + 172, 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MULSCCri
1193 { 698, 1, 0, 4, 0, 52, 52, SparcOpInfoBase + 1, 30, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MPMUL
1194 { 697, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 412, 0, 0, 0x0ULL }, // MOVXTOD
1195 { 696, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 394, 4, 0, 0x0ULL }, // MOVXCCrr
1196 { 695, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 390, 4, 0, 0x0ULL }, // MOVXCCri
1197 { 694, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 410, 0, 0, 0x0ULL }, // MOVWTOS
1198 { 693, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 408, 0, 0, 0x0ULL }, // MOVSTOUW
1199 { 692, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 408, 0, 0, 0x0ULL }, // MOVSTOSW
1200 { 691, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 403, 0, 0, 0x0ULL }, // MOVRrr
1201 { 690, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 398, 0, 0, 0x0ULL }, // MOVRri
1202 { 689, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 394, 4, 0, 0x0ULL }, // MOVICCrr
1203 { 688, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 390, 4, 0, 0x0ULL }, // MOVICCri
1204 { 687, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 394, 3, 0, 0x0ULL }, // MOVFCCrr
1205 { 686, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 390, 3, 0, 0x0ULL }, // MOVFCCri
1206 { 685, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 388, 0, 0, 0x0ULL }, // MOVDTOX
1207 { 684, 1, 0, 4, 0, 52, 52, SparcOpInfoBase + 1, 30, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MONTSQR
1208 { 683, 1, 0, 4, 0, 52, 52, SparcOpInfoBase + 1, 30, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MONTMUL
1209 { 682, 1, 0, 4, 1, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MEMBARi
1210 { 681, 0, 0, 4, 0, 10, 8, SparcOpInfoBase + 1, 12, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MD5
1211 { 680, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 386, 0, 0, 0x0ULL }, // LZCNT
1212 { 679, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDrr
1213 { 678, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDri
1214 { 677, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 383, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDXrr
1215 { 676, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 380, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDXri
1216 { 675, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDXFSRrr
1217 { 674, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDXFSRri
1218 { 673, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 314, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDXArr
1219 { 672, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 380, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDXAri
1220 { 671, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUHrr
1221 { 670, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUHri
1222 { 669, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUHArr
1223 { 668, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDUHAri
1224 { 667, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUBrr
1225 { 666, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUBri
1226 { 665, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDUBArr
1227 { 664, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDUBAri
1228 { 663, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 383, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSWrr
1229 { 662, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 380, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSWri
1230 { 661, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 314, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSWArr
1231 { 660, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 380, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSWAri
1232 { 659, 3, 1, 4, 6, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBrr
1233 { 658, 3, 1, 4, 6, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBri
1234 { 657, 4, 1, 4, 6, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBArr
1235 { 656, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBAri
1236 { 655, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSHrr
1237 { 654, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSHri
1238 { 653, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSHArr
1239 { 652, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSHAri
1240 { 651, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSBrr
1241 { 650, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSBri
1242 { 649, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSBArr
1243 { 648, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSBAri
1244 { 647, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 377, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDQFrr
1245 { 646, 3, 1, 4, 23, 0, 0, SparcOpInfoBase + 370, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDQFri
1246 { 645, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 373, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDQFArr
1247 { 644, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 370, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDQFAri
1248 { 643, 3, 1, 4, 22, 0, 0, SparcOpInfoBase + 367, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDFrr
1249 { 642, 3, 1, 4, 22, 0, 0, SparcOpInfoBase + 360, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDFri
1250 { 641, 2, 0, 4, 22, 0, 1, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFSRrr
1251 { 640, 2, 0, 4, 22, 0, 1, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFSRri
1252 { 639, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 363, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFArr
1253 { 638, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 360, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFAri
1254 { 637, 3, 1, 4, 20, 0, 0, SparcOpInfoBase + 357, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDrr
1255 { 636, 3, 1, 4, 20, 0, 0, SparcOpInfoBase + 334, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDri
1256 { 635, 3, 1, 4, 21, 0, 0, SparcOpInfoBase + 354, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDFrr
1257 { 634, 3, 1, 4, 21, 0, 0, SparcOpInfoBase + 347, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDFri
1258 { 633, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 350, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDFArr
1259 { 632, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 347, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDFAri
1260 { 631, 3, 1, 4, 20, 0, 0, SparcOpInfoBase + 344, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDCrr
1261 { 630, 3, 1, 4, 20, 0, 0, SparcOpInfoBase + 341, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDCri
1262 { 629, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 337, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDArr
1263 { 628, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 334, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDAri
1264 { 627, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 331, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDCrr
1265 { 626, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 328, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDCri
1266 { 625, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 193, 10, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDCSRrr
1267 { 624, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 191, 10, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDCSRri
1268 { 623, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDArr
1269 { 622, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDAri
1270 { 621, 3, 1, 4, 3, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // JMPLrr
1271 { 620, 3, 1, 4, 3, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // JMPLri
1272 { 619, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INVALW
1273 { 618, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // GDOP_LDrr
1274 { 617, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 314, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // GDOP_LDXrr
1275 { 616, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 309, 0, 0, 0x0ULL }, // FZEROS
1276 { 615, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 308, 0, 0, 0x0ULL }, // FZERO
1277 { 614, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 257, 0, 0, 0x0ULL }, // FXTOS
1278 { 613, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 259, 0, 0, 0x0ULL }, // FXTOQ
1279 { 612, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FXTOD
1280 { 611, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXORS
1281 { 610, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXOR
1282 { 609, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXNORS
1283 { 608, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXNOR
1284 { 607, 3, 1, 4, 8, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FSUBS
1285 { 606, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FSUBQ
1286 { 605, 3, 1, 4, 8, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FSUBD
1287 { 604, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 261, 0, 0, 0x0ULL }, // FSTOX
1288 { 603, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 263, 0, 0, 0x0ULL }, // FSTOQ
1289 { 602, 2, 1, 4, 8, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FSTOI
1290 { 601, 2, 1, 4, 19, 0, 0, SparcOpInfoBase + 261, 0, 0, 0x0ULL }, // FSTOD
1291 { 600, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRL32
1292 { 599, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRL16
1293 { 598, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC2S
1294 { 597, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC2
1295 { 596, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC1S
1296 { 595, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC1
1297 { 594, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRA32
1298 { 593, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRA16
1299 { 592, 2, 1, 4, 18, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FSQRTS
1300 { 591, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0, 0x0ULL }, // FSQRTQ
1301 { 590, 2, 1, 4, 17, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FSQRTD
1302 { 589, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 305, 0, 0, 0x0ULL }, // FSMULD
1303 { 588, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLL32
1304 { 587, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLL16
1305 { 586, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLAS32
1306 { 585, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLAS16
1307 { 584, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 310, 0, 0, 0x0ULL }, // FQTOX
1308 { 583, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 312, 0, 0, 0x0ULL }, // FQTOS
1309 { 582, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 312, 0, 0, 0x0ULL }, // FQTOI
1310 { 581, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 310, 0, 0, 0x0ULL }, // FQTOD
1311 { 580, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB32S
1312 { 579, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB32
1313 { 578, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB16S
1314 { 577, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB16
1315 { 576, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPMERGE
1316 { 575, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPMADDXHI
1317 { 574, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPMADDX
1318 { 573, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD64
1319 { 572, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD32S
1320 { 571, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD32
1321 { 570, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD16S
1322 { 569, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD16
1323 { 568, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 257, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPACKFIX
1324 { 567, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPACK32
1325 { 566, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPACK16
1326 { 565, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORS
1327 { 564, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT2S
1328 { 563, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT2
1329 { 562, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT1S
1330 { 561, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT1
1331 { 560, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FOR
1332 { 559, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 309, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FONES
1333 { 558, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 308, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FONE
1334 { 557, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0, 0x0ULL }, // FNSMULD
1335 { 556, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT2S
1336 { 555, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT2
1337 { 554, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT1S
1338 { 553, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT1
1339 { 552, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNORS
1340 { 551, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOR
1341 { 550, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FNMULS
1342 { 549, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FNMULD
1343 { 548, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FNMSUBS
1344 { 547, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FNMSUBD
1345 { 546, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FNMADDS
1346 { 545, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FNMADDD
1347 { 544, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FNHADDS
1348 { 543, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FNHADDD
1349 { 542, 2, 1, 4, 16, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FNEGS
1350 { 541, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0, 0x0ULL }, // FNEGQ
1351 { 540, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FNEGD
1352 { 539, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNANDS
1353 { 538, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNAND
1354 { 537, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FNADDS
1355 { 536, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FNADDD
1356 { 535, 3, 1, 4, 15, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FMULS
1357 { 534, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FMULQ
1358 { 533, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMULD8ULX16
1359 { 532, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMULD8SUX16
1360 { 531, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FMULD
1361 { 530, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8X16AU
1362 { 529, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8X16AL
1363 { 528, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 302, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8X16
1364 { 527, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8ULX16
1365 { 526, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8SUX16
1366 { 525, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FMSUBS
1367 { 524, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FMSUBD
1368 { 523, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 298, 4, 0, 0x0ULL }, // FMOVS_XCC
1369 { 522, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 298, 4, 0, 0x0ULL }, // FMOVS_ICC
1370 { 521, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 298, 3, 0, 0x0ULL }, // FMOVS_FCC
1371 { 520, 2, 1, 4, 13, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMOVS
1372 { 519, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 293, 0, 0, 0x0ULL }, // FMOVRS
1373 { 518, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 288, 0, 0, 0x0ULL }, // FMOVRQ
1374 { 517, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 283, 0, 0, 0x0ULL }, // FMOVRD
1375 { 516, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 279, 4, 0, 0x0ULL }, // FMOVQ_XCC
1376 { 515, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 279, 4, 0, 0x0ULL }, // FMOVQ_ICC
1377 { 514, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 279, 3, 0, 0x0ULL }, // FMOVQ_FCC
1378 { 513, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMOVQ
1379 { 512, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 275, 4, 0, 0x0ULL }, // FMOVD_XCC
1380 { 511, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 275, 4, 0, 0x0ULL }, // FMOVD_ICC
1381 { 510, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 275, 3, 0, 0x0ULL }, // FMOVD_FCC
1382 { 509, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMOVD
1383 { 508, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMEAN16
1384 { 507, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FMADDS
1385 { 506, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FMADDD
1386 { 505, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 193, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSHrr
1387 { 504, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSHri
1388 { 503, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSHW
1389 { 502, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSH
1390 { 501, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 268, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLCMPS
1391 { 500, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 265, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLCMPD
1392 { 499, 2, 1, 4, 8, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FITOS
1393 { 498, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 263, 0, 0, 0x0ULL }, // FITOQ
1394 { 497, 2, 1, 4, 8, 0, 0, SparcOpInfoBase + 261, 0, 0, 0x0ULL }, // FITOD
1395 { 496, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FHSUBS
1396 { 495, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FHSUBD
1397 { 494, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FHADDS
1398 { 493, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FHADDD
1399 { 492, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 261, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FEXPAND
1400 { 491, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FDTOX
1401 { 490, 2, 1, 4, 8, 0, 0, SparcOpInfoBase + 257, 0, 0, 0x0ULL }, // FDTOS
1402 { 489, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 259, 0, 0, 0x0ULL }, // FDTOQ
1403 { 488, 2, 1, 4, 8, 0, 0, SparcOpInfoBase + 257, 0, 0, 0x0ULL }, // FDTOI
1404 { 487, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 254, 0, 0, 0x0ULL }, // FDMULQ
1405 { 486, 3, 1, 4, 12, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FDIVS
1406 { 485, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FDIVQ
1407 { 484, 3, 1, 4, 11, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FDIVD
1408 { 483, 2, 0, 4, 8, 0, 1, SparcOpInfoBase + 243, 3, 0, 0x0ULL }, // FCMPS_V9
1409 { 482, 2, 0, 4, 10, 0, 1, SparcOpInfoBase + 243, 3, 0, 0x0ULL }, // FCMPS
1410 { 481, 2, 0, 4, 0, 0, 1, SparcOpInfoBase + 241, 3, 0, 0x0ULL }, // FCMPQ_V9
1411 { 480, 2, 0, 4, 0, 0, 1, SparcOpInfoBase + 241, 3, 0, 0x0ULL }, // FCMPQ
1412 { 479, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPNE32
1413 { 478, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPNE16
1414 { 477, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPLE32
1415 { 476, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPLE16
1416 { 475, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPGT32
1417 { 474, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPGT16
1418 { 473, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPEQ32
1419 { 472, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPEQ16
1420 { 471, 2, 0, 4, 8, 0, 1, SparcOpInfoBase + 236, 3, 0, 0x0ULL }, // FCMPD_V9
1421 { 470, 2, 0, 4, 10, 0, 1, SparcOpInfoBase + 236, 3, 0, 0x0ULL }, // FCMPD
1422 { 469, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCHKSM16
1423 { 468, 2, 0, 4, 4, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // FBCOND_V9
1424 { 467, 2, 0, 4, 4, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // FBCONDA_V9
1425 { 466, 2, 0, 4, 9, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FBCONDA
1426 { 465, 2, 0, 4, 9, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // FBCOND
1427 { 464, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDS
1428 { 463, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT2S
1429 { 462, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT2
1430 { 461, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT1S
1431 { 460, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT1
1432 { 459, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FAND
1433 { 458, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FALIGNADATA
1434 { 457, 3, 1, 4, 8, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FADDS
1435 { 456, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FADDQ
1436 { 455, 3, 1, 4, 8, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FADDD
1437 { 454, 2, 1, 4, 7, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FABSS
1438 { 453, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0, 0x0ULL }, // FABSQ
1439 { 452, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FABSD
1440 { 451, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8N
1441 { 450, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8LN
1442 { 449, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8L
1443 { 448, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8
1444 { 447, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32N
1445 { 446, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32LN
1446 { 445, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32L
1447 { 444, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32
1448 { 443, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16N
1449 { 442, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16LN
1450 { 441, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16L
1451 { 440, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16
1452 { 439, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DONE
1453 { 438, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_ROUND
1454 { 437, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 238, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_KEXPAND
1455 { 436, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_IP
1456 { 435, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_IIP
1457 { 434, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 232, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CXBCONDrr
1458 { 433, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 228, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CXBCONDri
1459 { 432, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 232, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CWBCONDrr
1460 { 431, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 228, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CWBCONDri
1461 { 430, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CRC32C
1462 { 429, 2, 0, 4, 0, 0, 0, SparcOpInfoBase + 189, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CPBCONDA
1463 { 428, 2, 0, 4, 0, 0, 0, SparcOpInfoBase + 189, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // CPBCOND
1464 { 427, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 227, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CMASK8
1465 { 426, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 227, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CMASK32
1466 { 425, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 227, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CMASK16
1467 { 424, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 222, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // CASXArr
1468 { 423, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 218, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CASXAri
1469 { 422, 5, 1, 4, 6, 0, 0, SparcOpInfoBase + 213, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // CASArr
1470 { 421, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 209, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CASAri
1471 { 420, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CAMELLIA_FLI
1472 { 419, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CAMELLIA_FL
1473 { 418, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CAMELLIA_F
1474 { 417, 3, 0, 4, 1, 1, 1, SparcOpInfoBase + 206, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CALLrri
1475 { 416, 2, 0, 4, 3, 1, 1, SparcOpInfoBase + 193, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // CALLrr
1476 { 415, 3, 0, 4, 1, 1, 1, SparcOpInfoBase + 203, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CALLrii
1477 { 414, 2, 0, 4, 3, 1, 1, SparcOpInfoBase + 191, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // CALLri
1478 { 413, 2, 0, 4, 5, 1, 1, SparcOpInfoBase + 201, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CALLi
1479 { 412, 1, 0, 4, 5, 1, 1, SparcOpInfoBase + 188, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // CALL
1480 { 411, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BSHUFFLE
1481 { 410, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPXCCNT
1482 { 409, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPXCCANT
1483 { 408, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPXCCA
1484 { 407, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BPXCC
1485 { 406, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPRNT
1486 { 405, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPRANT
1487 { 404, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPRA
1488 { 403, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BPR
1489 { 402, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPICCNT
1490 { 401, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPICCANT
1491 { 400, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPICCA
1492 { 399, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BPICC
1493 { 398, 3, 0, 4, 4, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCCNT
1494 { 397, 3, 0, 4, 4, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCCANT
1495 { 396, 3, 0, 4, 4, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCCA
1496 { 395, 3, 0, 4, 4, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCC
1497 { 394, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BMASK
1498 { 393, 2, 0, 4, 3, 0, 0, SparcOpInfoBase + 193, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BINDrr
1499 { 392, 2, 0, 4, 3, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BINDri
1500 { 391, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BCONDA
1501 { 390, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BCOND
1502 { 389, 1, 0, 4, 2, 0, 0, SparcOpInfoBase + 188, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BA
1503 { 388, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ARRAY8
1504 { 387, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ARRAY32
1505 { 386, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ARRAY16
1506 { 385, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ANDrr
1507 { 384, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // ANDri
1508 { 383, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ANDNrr
1509 { 382, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDNri
1510 { 381, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDNCCrr
1511 { 380, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDNCCri
1512 { 379, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDCCrr
1513 { 378, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDCCri
1514 { 377, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ALLCLEAN
1515 { 376, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ALIGNADDRL
1516 { 375, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ALIGNADDR
1517 { 374, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_KEXPAND2
1518 { 373, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 151, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_KEXPAND1
1519 { 372, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_KEXPAND0
1520 { 371, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND23_LAST
1521 { 370, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND23
1522 { 369, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND01_LAST
1523 { 368, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND01
1524 { 367, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND23_LAST
1525 { 366, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND23
1526 { 365, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND01_LAST
1527 { 364, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND01
1528 { 363, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ADDrr
1529 { 362, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // ADDri
1530 { 361, 3, 1, 4, 0, 1, 1, SparcOpInfoBase + 178, 5, 0, 0x0ULL }, // ADDXCCC
1531 { 360, 3, 1, 4, 0, 1, 0, SparcOpInfoBase + 178, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ADDXC
1532 { 359, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 175, 5, 0, 0x0ULL }, // ADDErr
1533 { 358, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 172, 5, 0, 0x0ULL }, // ADDEri
1534 { 357, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ADDCrr
1535 { 356, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ADDCri
1536 { 355, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0, 0x0ULL }, // ADDCCrr
1537 { 354, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0, 0x0ULL }, // ADDCCri
1538 { 353, 0, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V8BAR
1539 { 352, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 169, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SETX
1540 { 351, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 167, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SETSW
1541 { 350, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 167, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SET
1542 { 349, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 163, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_QFP_XCC
1543 { 348, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 163, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_QFP_ICC
1544 { 347, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 163, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_QFP_FCC
1545 { 346, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 159, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_Int_XCC
1546 { 345, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 159, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_Int_ICC
1547 { 344, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 159, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_Int_FCC
1548 { 343, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 155, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_FP_XCC
1549 { 342, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 155, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_FP_ICC
1550 { 341, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 155, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_FP_FCC
1551 { 340, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 151, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_DFP_XCC
1552 { 339, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 151, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_DFP_ICC
1553 { 338, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 151, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_DFP_FCC
1554 { 337, 1, 1, 4, 0, 0, 1, SparcOpInfoBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GETPCX
1555 { 336, 2, 0, 4, 0, 1, 1, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKUP
1556 { 335, 2, 0, 4, 0, 1, 1, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKDOWN
1557 { 334, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UBFX
1558 { 333, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SBFX
1559 { 332, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMIN
1560 { 331, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMAX
1561 { 330, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMIN
1562 { 329, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMAX
1563 { 328, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_XOR
1564 { 327, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_OR
1565 { 326, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_AND
1566 { 325, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_MUL
1567 { 324, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_ADD
1568 { 323, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMINIMUMNUM
1569 { 322, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAXIMUMNUM
1570 { 321, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMINIMUM
1571 { 320, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAXIMUM
1572 { 319, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMIN
1573 { 318, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAX
1574 { 317, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMUL
1575 { 316, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FADD
1576 { 315, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FMUL
1577 { 314, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FADD
1578 { 313, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_UBSANTRAP
1579 { 312, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DEBUGTRAP
1580 { 311, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_TRAP
1581 { 310, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMSET_INLINE
1582 { 309, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_BZERO
1583 { 308, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMSET
1584 { 307, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMMOVE
1585 { 306, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY_INLINE
1586 { 305, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY
1587 { 304, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 141, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_WRITE_REGISTER
1588 { 303, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_READ_REGISTER
1589 { 302, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FCMPS
1590 { 301, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FCMP
1591 { 300, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FLDEXP
1592 { 299, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSQRT
1593 { 298, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMA
1594 { 297, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FREM
1595 { 296, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FDIV
1596 { 295, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMUL
1597 { 294, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSUB
1598 { 293, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FADD
1599 { 292, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKRESTORE
1600 { 291, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKSAVE
1601 { 290, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DYN_STACKALLOC
1602 { 289, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_JUMP_TABLE
1603 { 288, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BLOCK_ADDR
1604 { 287, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ADDRSPACE_CAST
1605 { 286, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEARBYINT
1606 { 285, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRINT
1607 { 284, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFLOOR
1608 { 283, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSQRT
1609 { 282, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTANH
1610 { 281, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINH
1611 { 280, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOSH
1612 { 279, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN2
1613 { 278, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN
1614 { 277, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FASIN
1615 { 276, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FACOS
1616 { 275, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTAN
1617 { 274, 3, 2, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINCOS
1618 { 273, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSIN
1619 { 272, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOS
1620 { 271, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCEIL
1621 { 270, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_CLMULR
1622 { 269, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_CLMULH
1623 { 268, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_CLMUL
1624 { 267, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITREVERSE
1625 { 266, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BSWAP
1626 { 265, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTPOP
1627 { 264, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLS
1628 { 263, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ_ZERO_POISON
1629 { 262, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ
1630 { 261, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ_ZERO_POISON
1631 { 260, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ
1632 { 259, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 137, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECTOR_COMPRESS
1633 { 258, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_STEP_VECTOR
1634 { 257, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SPLAT_VECTOR
1635 { 256, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 133, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHUFFLE_VECTOR
1636 { 255, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_VECTOR_ELT
1637 { 254, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 126, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_VECTOR_ELT
1638 { 253, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_SUBVECTOR
1639 { 252, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_SUBVECTOR
1640 { 251, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VSCALE
1641 { 250, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 123, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRJT
1642 { 249, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BR
1643 { 248, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LLROUND
1644 { 247, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LROUND
1645 { 246, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ABS
1646 { 245, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMAX
1647 { 244, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMIN
1648 { 243, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMAX
1649 { 242, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMIN
1650 { 241, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRMASK
1651 { 240, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTR_ADD
1652 { 239, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_ROUNDING
1653 { 238, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_ROUNDING
1654 { 237, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPMODE
1655 { 236, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPMODE
1656 { 235, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPMODE
1657 { 234, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPENV
1658 { 233, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPENV
1659 { 232, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPENV
1660 { 231, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUMNUM
1661 { 230, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUMNUM
1662 { 229, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUM
1663 { 228, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUM
1664 { 227, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM_IEEE
1665 { 226, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM_IEEE
1666 { 225, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM
1667 { 224, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM
1668 { 223, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCANONICALIZE
1669 { 222, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IS_FPCLASS
1670 { 221, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOPYSIGN
1671 { 220, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FABS
1672 { 219, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI_SAT
1673 { 218, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI_SAT
1674 { 217, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UITOFP
1675 { 216, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SITOFP
1676 { 215, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI
1677 { 214, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI
1678 { 213, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTRUNC
1679 { 212, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPEXT
1680 { 211, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEG
1681 { 210, 3, 2, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFREXP
1682 { 209, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLDEXP
1683 { 208, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG10
1684 { 207, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG2
1685 { 206, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG
1686 { 205, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP10
1687 { 204, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP2
1688 { 203, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP
1689 { 202, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOWI
1690 { 201, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOW
1691 { 200, 3, 2, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMODF
1692 { 199, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREM
1693 { 198, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FDIV
1694 { 197, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMAD
1695 { 196, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMA
1696 { 195, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMUL
1697 { 194, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSUB
1698 { 193, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FADD
1699 { 192, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIXSAT
1700 { 191, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIXSAT
1701 { 190, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIX
1702 { 189, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIX
1703 { 188, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIXSAT
1704 { 187, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIXSAT
1705 { 186, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIX
1706 { 185, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIX
1707 { 184, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSHLSAT
1708 { 183, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USHLSAT
1709 { 182, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBSAT
1710 { 181, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBSAT
1711 { 180, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDSAT
1712 { 179, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDSAT
1713 { 178, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULH
1714 { 177, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULH
1715 { 176, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULO
1716 { 175, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULO
1717 { 174, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBE
1718 { 173, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBO
1719 { 172, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SADDE
1720 { 171, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDO
1721 { 170, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBE
1722 { 169, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBO
1723 { 168, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UADDE
1724 { 167, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDO
1725 { 166, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SELECT
1726 { 165, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UCMP
1727 { 164, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SCMP
1728 { 163, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCMP
1729 { 162, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ICMP
1730 { 161, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTL
1731 { 160, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTR
1732 { 159, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHR
1733 { 158, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHL
1734 { 157, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASHR
1735 { 156, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LSHR
1736 { 155, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHL
1737 { 154, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ZEXT
1738 { 153, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT_INREG
1739 { 152, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT
1740 { 151, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VAARG
1741 { 150, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VASTART
1742 { 149, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCONSTANT
1743 { 148, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT
1744 { 147, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_USAT_U
1745 { 146, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_U
1746 { 145, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_S
1747 { 144, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC
1748 { 143, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ANYEXT
1749 { 142, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
1750 { 141, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT
1751 { 140, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_INTRINSIC_W_SIDE_EFFECTS
1752 { 139, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_INTRINSIC
1753 { 138, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_INVOKE_REGION_START
1754 { 137, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRINDIRECT
1755 { 136, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRCOND
1756 { 135, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 93, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_PREFETCH
1757 { 134, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_FENCE
1758 { 133, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_SAT
1759 { 132, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_COND
1760 { 131, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UDEC_WRAP
1761 { 130, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UINC_WRAP
1762 { 129, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUMNUM
1763 { 128, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUMNUM
1764 { 127, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUM
1765 { 126, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUM
1766 { 125, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMIN
1767 { 124, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAX
1768 { 123, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FSUB
1769 { 122, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FADD
1770 { 121, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMIN
1771 { 120, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMAX
1772 { 119, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MIN
1773 { 118, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MAX
1774 { 117, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XOR
1775 { 116, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_OR
1776 { 115, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_NAND
1777 { 114, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_AND
1778 { 113, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_SUB
1779 { 112, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_ADD
1780 { 111, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XCHG
1781 { 110, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG
1782 { 109, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 81, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
1783 { 108, 5, 1, 0, 0, 0, 0, SparcOpInfoBase + 76, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_INDEXED_STORE
1784 { 107, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_FPTRUNCSTORE
1785 { 106, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_STORE
1786 { 105, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_ZEXTLOAD
1787 { 104, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_SEXTLOAD
1788 { 103, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_LOAD
1789 { 102, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_FPEXTLOAD
1790 { 101, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_ZEXTLOAD
1791 { 100, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_SEXTLOAD
1792 { 99, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_LOAD
1793 { 98, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READSTEADYCOUNTER
1794 { 97, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READCYCLECOUNTER
1795 { 96, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUNDEVEN
1796 { 95, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LLRINT
1797 { 94, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LRINT
1798 { 93, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUND
1799 { 92, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_TRUNC
1800 { 91, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_FPTRUNC_ROUND
1801 { 90, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_FOLD_BARRIER
1802 { 89, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREEZE
1803 { 88, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITCAST
1804 { 87, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTTOPTR
1805 { 86, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRTOINT
1806 { 85, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_CONCAT_VECTORS
1807 { 84, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR_TRUNC
1808 { 83, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR
1809 { 82, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_MERGE_VALUES
1810 { 81, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT
1811 { 80, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_UNMERGE_VALUES
1812 { 79, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT
1813 { 78, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_POOL
1814 { 77, 5, 1, 0, 0, 0, 0, SparcOpInfoBase + 52, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRAUTH_GLOBAL_VALUE
1815 { 76, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_GLOBAL_VALUE
1816 { 75, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRAME_INDEX
1817 { 74, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_PHI
1818 { 73, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IMPLICIT_DEF
1819 { 72, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGCEIL
1820 { 71, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGFLOOR
1821 { 70, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGCEIL
1822 { 69, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGFLOOR
1823 { 68, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDU
1824 { 67, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDS
1825 { 66, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_XOR
1826 { 65, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_OR
1827 { 64, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_AND
1828 { 63, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVREM
1829 { 62, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVREM
1830 { 61, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UREM
1831 { 60, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SREM
1832 { 59, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIV
1833 { 58, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIV
1834 { 57, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_MUL
1835 { 56, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SUB
1836 { 55, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ADD
1837 { 54, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ALIGN
1838 { 53, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ZEXT
1839 { 52, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_SEXT
1840 { 51, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_GLUE
1841 { 50, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_LOOP
1842 { 49, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ANCHOR
1843 { 48, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ENTRY
1844 { 47, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RELOC_NONE
1845 { 46, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // JUMP_TABLE_DEBUG_INFO
1846 { 45, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MEMBARRIER
1847 { 44, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // FAKE_USE
1848 { 43, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ICALL_BRANCH_FUNNEL
1849 { 42, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 36, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_17300
1850 { 41, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_17299
1851 { 40, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_TAIL_CALL
1852 { 39, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_EXIT
1853 { 38, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_RET
1854 { 37, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_ENTER
1855 { 36, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_OP
1856 { 35, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FAULTING_OP
1857 { 34, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 32, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // LOCAL_ESCAPE
1858 { 33, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STATEPOINT
1859 { 32, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 29, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_17298
1860 { 31, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREALLOCATED_SETUP
1861 { 30, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 28, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // anonymous_14418
1862 { 29, 6, 1, 0, 0, 0, 0, SparcOpInfoBase + 22, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHPOINT
1863 { 28, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FENTRY_CALL
1864 { 27, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STACKMAP
1865 { 26, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 18, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // ARITH_FENCE
1866 { 25, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 14, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PSEUDO_PROBE
1867 { 24, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_END
1868 { 23, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_START
1869 { 22, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // BUNDLE
1870 { 21, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 11, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_LANEMASK
1871 { 20, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY
1872 { 19, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // REG_SEQUENCE
1873 { 18, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // DBG_LABEL
1874 { 17, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_PHI
1875 { 16, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_INSTR_REF
1876 { 15, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE_LIST
1877 { 14, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE
1878 { 13, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_TO_REGCLASS
1879 { 12, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // SUBREG_TO_REG
1880 { 11, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INIT_UNDEF
1881 { 10, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // IMPLICIT_DEF
1882 { 9, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 5, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INSERT_SUBREG
1883 { 8, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // EXTRACT_SUBREG
1884 { 7, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // KILL
1885 { 6, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // ANNOTATION_LABEL
1886 { 5, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // GC_LABEL
1887 { 4, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // EH_LABEL
1888 { 3, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // CFI_INSTRUCTION
1889 { 2, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INLINEASM_BR
1890 { 1, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // INLINEASM
1891 { 0, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // PHI
1892 }, {
1893 /* 0 */
1894 /* 0 */ SP::O6, SP::O6,
1895 /* 2 */ SP::O7,
1896 /* 3 */ SP::FCC0,
1897 /* 4 */ SP::ICC,
1898 /* 5 */ SP::ICC, SP::ICC,
1899 /* 7 */ SP::O6, SP::O7,
1900 /* 9 */ SP::ASR3,
1901 /* 10 */ SP::CPSR,
1902 /* 11 */ SP::FSR,
1903 /* 12 */ SP::D0, SP::D1, SP::D2, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7,
1904 /* 30 */ SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15, SP::D16, SP::D17, SP::D18, SP::D19, SP::D20, SP::D21, SP::D22, SP::D23, SP::D24, SP::D25, SP::D26, SP::D27, SP::D28, SP::D29, SP::D30, SP::D31, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15, SP::D16, SP::D17, SP::D18, SP::D19, SP::D20, SP::D21, SP::D22, SP::D23, SP::D24, SP::D25, SP::D26, SP::D27, SP::D28, SP::D29, SP::D30, SP::D31, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5,
1905 /* 134 */ SP::Y, SP::ICC, SP::Y, SP::ICC,
1906 /* 138 */ SP::PSR,
1907 /* 139 */ SP::FQ,
1908 /* 140 */ SP::TBR,
1909 /* 141 */ SP::WIM,
1910 /* 142 */ SP::Y, SP::Y, SP::ICC,
1911 /* 145 */ SP::Y, SP::Y,
1912 /* 147 */ SP::D0, SP::D1, SP::D2, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D0, SP::D1, SP::D2,
1913 /* 161 */ SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D0, SP::D1, SP::D2, SP::D3,
1914 /* 177 */ SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15, SP::D16, SP::D17, SP::D18, SP::D19, SP::D20, SP::D21, SP::D22, SP::D23, SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7,
1915 /* 209 */ SP::Y, SP::ASR18, SP::Y, SP::ASR18,
1916 /* 213 */ SP::Y, SP::ICC,
1917 /* 215 */ SP::Y,
1918 /* 216 */ SP::CPQ,
1919 /* 217 */ SP::O6,
1920 }, {
1921 0
1922 }, {
1923 /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1924 /* 1 */
1925 /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1926 /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1927 /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1928 /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1929 /* 11 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1930 /* 14 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1931 /* 18 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) },
1932 /* 20 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1933 /* 22 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1934 /* 28 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
1935 /* 29 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1936 /* 32 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1937 /* 34 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1938 /* 36 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1939 /* 39 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1940 /* 42 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1941 /* 45 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1942 /* 49 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1943 /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1944 /* 52 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1945 /* 57 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1946 /* 60 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1947 /* 62 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1948 /* 66 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1949 /* 68 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1950 /* 71 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1951 /* 76 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1952 /* 81 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1953 /* 86 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1954 /* 90 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1955 /* 93 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_2, 0 },
1956 /* 97 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1957 /* 100 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1958 /* 103 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1959 /* 107 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1960 /* 111 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1961 /* 114 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1962 /* 119 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1963 /* 123 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1964 /* 126 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
1965 /* 130 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
1966 /* 133 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1967 /* 137 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1968 /* 141 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1969 /* 143 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1970 /* 147 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1971 /* 151 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1972 /* 155 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1973 /* 159 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1974 /* 163 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1975 /* 167 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1976 /* 169 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1977 /* 172 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1978 /* 175 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1979 /* 178 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1980 /* 181 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1981 /* 185 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1982 /* 188 */ { -1, 0, MCOI::OPERAND_PCREL, 0 },
1983 /* 189 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1984 /* 191 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1985 /* 193 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
1986 /* 195 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1987 /* 198 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1988 /* 201 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1989 /* 203 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1990 /* 206 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1991 /* 209 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
1992 /* 213 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1993 /* 218 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
1994 /* 222 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1995 /* 227 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1996 /* 228 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1997 /* 232 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1998 /* 236 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1999 /* 238 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2000 /* 241 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2001 /* 243 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2002 /* 245 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2003 /* 248 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2004 /* 251 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2005 /* 254 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2006 /* 257 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2007 /* 259 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2008 /* 261 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2009 /* 263 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2010 /* 265 */ { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2011 /* 268 */ { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2012 /* 271 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2013 /* 275 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2014 /* 279 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2015 /* 283 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2016 /* 288 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2017 /* 293 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2018 /* 298 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2019 /* 302 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2020 /* 305 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2021 /* 308 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2022 /* 309 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2023 /* 310 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2024 /* 312 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2025 /* 314 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2026 /* 318 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2027 /* 322 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2028 /* 325 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2029 /* 328 */ { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2030 /* 331 */ { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2031 /* 334 */ { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2032 /* 337 */ { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2033 /* 341 */ { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2034 /* 344 */ { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2035 /* 347 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2036 /* 350 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2037 /* 354 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2038 /* 357 */ { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2039 /* 360 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2040 /* 363 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2041 /* 367 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2042 /* 370 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2043 /* 373 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2044 /* 377 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2045 /* 380 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2046 /* 383 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2047 /* 386 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2048 /* 388 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2049 /* 390 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2050 /* 394 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2051 /* 398 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2052 /* 403 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2053 /* 408 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2054 /* 410 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2055 /* 412 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2056 /* 414 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2057 /* 417 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2058 /* 419 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2059 /* 422 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2060 /* 426 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2061 /* 429 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2062 /* 431 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2063 /* 432 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2064 /* 434 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2065 /* 437 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2066 /* 440 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2067 /* 443 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2068 /* 446 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2069 /* 450 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2070 /* 453 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2071 /* 456 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2072 /* 459 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2073 /* 462 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2074 /* 466 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2075 /* 469 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2076 /* 472 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2077 /* 475 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2078 /* 479 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2079 /* 482 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2080 /* 485 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2081 /* 488 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2082 /* 492 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2083 /* 495 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2084 /* 498 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2085 /* 502 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2086 /* 505 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2087 /* 508 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2088 /* 512 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2089 /* 515 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
2090 /* 519 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
2091 /* 524 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
2092 /* 528 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2093 /* 531 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2094 /* 535 */ { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2095 /* 538 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2096 /* 543 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2097 /* 548 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2098 /* 553 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2099 /* 558 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2100 /* 563 */ { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2101 /* 566 */ { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2102 /* 569 */ { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2103 /* 572 */ { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2104 }
2105};
2106
2107
2108#ifdef __GNUC__
2109#pragma GCC diagnostic push
2110#pragma GCC diagnostic ignored "-Woverlength-strings"
2111#endif
2112extern const char SparcInstrNameData[] = {
2113 /* 0 */ "G_FLOG10\000"
2114 /* 9 */ "G_FEXP10\000"
2115 /* 18 */ "AES_KEXPAND0\000"
2116 /* 31 */ "AES_DROUND01\000"
2117 /* 44 */ "AES_EROUND01\000"
2118 /* 57 */ "SHA1\000"
2119 /* 62 */ "TA1\000"
2120 /* 66 */ "FSRC1\000"
2121 /* 72 */ "AES_KEXPAND1\000"
2122 /* 85 */ "FANDNOT1\000"
2123 /* 94 */ "FNOT1\000"
2124 /* 100 */ "FORNOT1\000"
2125 /* 108 */ "SHA512\000"
2126 /* 115 */ "FSRA32\000"
2127 /* 122 */ "FPSUB32\000"
2128 /* 130 */ "FPADD32\000"
2129 /* 138 */ "EDGE32\000"
2130 /* 145 */ "FCMPLE32\000"
2131 /* 154 */ "FCMPNE32\000"
2132 /* 163 */ "FPACK32\000"
2133 /* 171 */ "CMASK32\000"
2134 /* 179 */ "FSLL32\000"
2135 /* 186 */ "FSRL32\000"
2136 /* 193 */ "FCMPEQ32\000"
2137 /* 202 */ "FSLAS32\000"
2138 /* 210 */ "FCMPGT32\000"
2139 /* 219 */ "ARRAY32\000"
2140 /* 227 */ "FSRC2\000"
2141 /* 233 */ "AES_KEXPAND2\000"
2142 /* 246 */ "G_FLOG2\000"
2143 /* 254 */ "G_FATAN2\000"
2144 /* 263 */ "G_FEXP2\000"
2145 /* 271 */ "FANDNOT2\000"
2146 /* 280 */ "FNOT2\000"
2147 /* 286 */ "FORNOT2\000"
2148 /* 294 */ "AES_DROUND23\000"
2149 /* 307 */ "AES_EROUND23\000"
2150 /* 320 */ "TA3\000"
2151 /* 324 */ "FPADD64\000"
2152 /* 332 */ "TA5\000"
2153 /* 336 */ "MD5\000"
2154 /* 340 */ "FSRA16\000"
2155 /* 347 */ "FPSUB16\000"
2156 /* 355 */ "FPADD16\000"
2157 /* 363 */ "EDGE16\000"
2158 /* 370 */ "FCMPLE16\000"
2159 /* 379 */ "FCMPNE16\000"
2160 /* 388 */ "FPACK16\000"
2161 /* 396 */ "CMASK16\000"
2162 /* 404 */ "FSLL16\000"
2163 /* 411 */ "FSRL16\000"
2164 /* 418 */ "FCHKSM16\000"
2165 /* 427 */ "FMEAN16\000"
2166 /* 435 */ "FCMPEQ16\000"
2167 /* 444 */ "FSLAS16\000"
2168 /* 452 */ "FCMPGT16\000"
2169 /* 461 */ "FMUL8X16\000"
2170 /* 470 */ "FMULD8ULX16\000"
2171 /* 482 */ "FMUL8ULX16\000"
2172 /* 493 */ "FMULD8SUX16\000"
2173 /* 505 */ "FMUL8SUX16\000"
2174 /* 516 */ "ARRAY16\000"
2175 /* 524 */ "SHA256\000"
2176 /* 531 */ "EDGE8\000"
2177 /* 537 */ "CMASK8\000"
2178 /* 544 */ "ARRAY8\000"
2179 /* 551 */ "FBCONDA_V9\000"
2180 /* 562 */ "FBCOND_V9\000"
2181 /* 572 */ "FCMPD_V9\000"
2182 /* 581 */ "FCMPQ_V9\000"
2183 /* 590 */ "FCMPS_V9\000"
2184 /* 599 */ "BA\000"
2185 /* 602 */ "BPFCCA\000"
2186 /* 609 */ "BPICCA\000"
2187 /* 616 */ "BPXCCA\000"
2188 /* 623 */ "FBCONDA\000"
2189 /* 631 */ "CPBCONDA\000"
2190 /* 640 */ "G_FMA\000"
2191 /* 646 */ "G_STRICT_FMA\000"
2192 /* 659 */ "BPRA\000"
2193 /* 664 */ "FALIGNADATA\000"
2194 /* 676 */ "G_FSUB\000"
2195 /* 683 */ "G_STRICT_FSUB\000"
2196 /* 697 */ "G_ATOMICRMW_FSUB\000"
2197 /* 714 */ "G_SUB\000"
2198 /* 720 */ "G_ATOMICRMW_SUB\000"
2199 /* 736 */ "CRC32C\000"
2200 /* 743 */ "ADDXCCC\000"
2201 /* 751 */ "BPFCC\000"
2202 /* 757 */ "V9FMOVD_FCC\000"
2203 /* 769 */ "SELECT_CC_DFP_FCC\000"
2204 /* 787 */ "SELECT_CC_QFP_FCC\000"
2205 /* 805 */ "SELECT_CC_FP_FCC\000"
2206 /* 822 */ "V9FMOVQ_FCC\000"
2207 /* 834 */ "V9FMOVS_FCC\000"
2208 /* 846 */ "SELECT_CC_Int_FCC\000"
2209 /* 864 */ "BPICC\000"
2210 /* 870 */ "FMOVD_ICC\000"
2211 /* 880 */ "SELECT_CC_DFP_ICC\000"
2212 /* 898 */ "SELECT_CC_QFP_ICC\000"
2213 /* 916 */ "SELECT_CC_FP_ICC\000"
2214 /* 933 */ "FMOVQ_ICC\000"
2215 /* 943 */ "FMOVS_ICC\000"
2216 /* 953 */ "SELECT_CC_Int_ICC\000"
2217 /* 971 */ "BPXCC\000"
2218 /* 977 */ "FMOVD_XCC\000"
2219 /* 987 */ "SELECT_CC_DFP_XCC\000"
2220 /* 1005 */ "SELECT_CC_QFP_XCC\000"
2221 /* 1023 */ "SELECT_CC_FP_XCC\000"
2222 /* 1040 */ "FMOVQ_XCC\000"
2223 /* 1050 */ "FMOVS_XCC\000"
2224 /* 1060 */ "SELECT_CC_Int_XCC\000"
2225 /* 1078 */ "G_INTRINSIC\000"
2226 /* 1090 */ "G_FPTRUNC\000"
2227 /* 1100 */ "G_INTRINSIC_TRUNC\000"
2228 /* 1118 */ "G_TRUNC\000"
2229 /* 1126 */ "G_BUILD_VECTOR_TRUNC\000"
2230 /* 1147 */ "G_DYN_STACKALLOC\000"
2231 /* 1164 */ "ADDXC\000"
2232 /* 1170 */ "G_FMAD\000"
2233 /* 1177 */ "G_FPEXTLOAD\000"
2234 /* 1189 */ "G_INDEXED_SEXTLOAD\000"
2235 /* 1208 */ "G_SEXTLOAD\000"
2236 /* 1219 */ "G_INDEXED_ZEXTLOAD\000"
2237 /* 1238 */ "G_ZEXTLOAD\000"
2238 /* 1249 */ "G_INDEXED_LOAD\000"
2239 /* 1264 */ "G_LOAD\000"
2240 /* 1271 */ "FSUBD\000"
2241 /* 1277 */ "FHSUBD\000"
2242 /* 1284 */ "FMSUBD\000"
2243 /* 1291 */ "FNMSUBD\000"
2244 /* 1299 */ "G_VECREDUCE_FADD\000"
2245 /* 1316 */ "G_FADD\000"
2246 /* 1323 */ "G_VECREDUCE_SEQ_FADD\000"
2247 /* 1344 */ "G_STRICT_FADD\000"
2248 /* 1358 */ "G_ATOMICRMW_FADD\000"
2249 /* 1375 */ "G_VECREDUCE_ADD\000"
2250 /* 1391 */ "G_ADD\000"
2251 /* 1397 */ "G_PTR_ADD\000"
2252 /* 1407 */ "G_ATOMICRMW_ADD\000"
2253 /* 1423 */ "FADDD\000"
2254 /* 1429 */ "FHADDD\000"
2255 /* 1436 */ "FNHADDD\000"
2256 /* 1444 */ "FMADDD\000"
2257 /* 1451 */ "FNMADDD\000"
2258 /* 1459 */ "FNADDD\000"
2259 /* 1466 */ "V9FCMPED\000"
2260 /* 1475 */ "RESTORED\000"
2261 /* 1484 */ "SAVED\000"
2262 /* 1490 */ "FNEGD\000"
2263 /* 1496 */ "FMULD\000"
2264 /* 1502 */ "FNMULD\000"
2265 /* 1509 */ "FSMULD\000"
2266 /* 1516 */ "FNSMULD\000"
2267 /* 1524 */ "FAND\000"
2268 /* 1529 */ "FNAND\000"
2269 /* 1535 */ "G_ATOMICRMW_NAND\000"
2270 /* 1552 */ "FEXPAND\000"
2271 /* 1560 */ "DES_KEXPAND\000"
2272 /* 1572 */ "G_VECREDUCE_AND\000"
2273 /* 1588 */ "G_AND\000"
2274 /* 1594 */ "G_ATOMICRMW_AND\000"
2275 /* 1610 */ "LIFETIME_END\000"
2276 /* 1623 */ "FBCOND\000"
2277 /* 1630 */ "CPBCOND\000"
2278 /* 1638 */ "G_BRCOND\000"
2279 /* 1647 */ "G_ATOMICRMW_USUB_COND\000"
2280 /* 1669 */ "G_LLROUND\000"
2281 /* 1679 */ "G_LROUND\000"
2282 /* 1688 */ "G_INTRINSIC_ROUND\000"
2283 /* 1706 */ "G_INTRINSIC_FPTRUNC_ROUND\000"
2284 /* 1732 */ "DES_ROUND\000"
2285 /* 1742 */ "FITOD\000"
2286 /* 1748 */ "FQTOD\000"
2287 /* 1754 */ "FSTOD\000"
2288 /* 1760 */ "FXTOD\000"
2289 /* 1766 */ "MOVXTOD\000"
2290 /* 1774 */ "V9FCMPD\000"
2291 /* 1782 */ "FLCMPD\000"
2292 /* 1789 */ "LOAD_STACK_GUARD\000"
2293 /* 1806 */ "FMOVRD\000"
2294 /* 1813 */ "FABSD\000"
2295 /* 1819 */ "FSQRTD\000"
2296 /* 1826 */ "FDIVD\000"
2297 /* 1832 */ "FMOVD\000"
2298 /* 1838 */ "PSEUDO_PROBE\000"
2299 /* 1851 */ "G_SSUBE\000"
2300 /* 1859 */ "G_USUBE\000"
2301 /* 1867 */ "G_FENCE\000"
2302 /* 1875 */ "ARITH_FENCE\000"
2303 /* 1887 */ "REG_SEQUENCE\000"
2304 /* 1900 */ "G_SADDE\000"
2305 /* 1908 */ "G_UADDE\000"
2306 /* 1916 */ "G_GET_FPMODE\000"
2307 /* 1929 */ "G_RESET_FPMODE\000"
2308 /* 1944 */ "G_SET_FPMODE\000"
2309 /* 1957 */ "G_FMINNUM_IEEE\000"
2310 /* 1972 */ "G_FMAXNUM_IEEE\000"
2311 /* 1987 */ "FPMERGE\000"
2312 /* 1995 */ "G_VSCALE\000"
2313 /* 2004 */ "G_JUMP_TABLE\000"
2314 /* 2017 */ "BUNDLE\000"
2315 /* 2024 */ "BSHUFFLE\000"
2316 /* 2033 */ "G_MEMSET_INLINE\000"
2317 /* 2049 */ "G_MEMCPY_INLINE\000"
2318 /* 2065 */ "DONE\000"
2319 /* 2070 */ "FONE\000"
2320 /* 2075 */ "RELOC_NONE\000"
2321 /* 2086 */ "LOCAL_ESCAPE\000"
2322 /* 2099 */ "G_FPTRUNCSTORE\000"
2323 /* 2114 */ "G_STACKRESTORE\000"
2324 /* 2129 */ "G_INDEXED_STORE\000"
2325 /* 2145 */ "G_STORE\000"
2326 /* 2153 */ "G_BITREVERSE\000"
2327 /* 2166 */ "FAKE_USE\000"
2328 /* 2175 */ "DBG_VALUE\000"
2329 /* 2185 */ "G_GLOBAL_VALUE\000"
2330 /* 2200 */ "G_PTRAUTH_GLOBAL_VALUE\000"
2331 /* 2223 */ "CONVERGENCECTRL_GLUE\000"
2332 /* 2244 */ "G_STACKSAVE\000"
2333 /* 2256 */ "G_MEMMOVE\000"
2334 /* 2266 */ "G_FREEZE\000"
2335 /* 2275 */ "G_FCANONICALIZE\000"
2336 /* 2291 */ "G_FMODF\000"
2337 /* 2299 */ "INIT_UNDEF\000"
2338 /* 2310 */ "G_IMPLICIT_DEF\000"
2339 /* 2325 */ "DBG_INSTR_REF\000"
2340 /* 2339 */ "CAMELLIA_F\000"
2341 /* 2350 */ "G_FNEG\000"
2342 /* 2357 */ "EXTRACT_SUBREG\000"
2343 /* 2372 */ "INSERT_SUBREG\000"
2344 /* 2386 */ "G_SEXT_INREG\000"
2345 /* 2399 */ "SUBREG_TO_REG\000"
2346 /* 2413 */ "G_ATOMIC_CMPXCHG\000"
2347 /* 2430 */ "G_ATOMICRMW_XCHG\000"
2348 /* 2447 */ "G_GET_ROUNDING\000"
2349 /* 2462 */ "G_SET_ROUNDING\000"
2350 /* 2477 */ "G_FLOG\000"
2351 /* 2484 */ "G_VAARG\000"
2352 /* 2492 */ "PREALLOCATED_ARG\000"
2353 /* 2509 */ "G_PREFETCH\000"
2354 /* 2520 */ "G_CLMULH\000"
2355 /* 2529 */ "G_SMULH\000"
2356 /* 2537 */ "G_UMULH\000"
2357 /* 2545 */ "G_FTANH\000"
2358 /* 2553 */ "G_FSINH\000"
2359 /* 2561 */ "G_FCOSH\000"
2360 /* 2569 */ "FLUSH\000"
2361 /* 2575 */ "DBG_PHI\000"
2362 /* 2583 */ "FPMADDXHI\000"
2363 /* 2593 */ "UMULXHI\000"
2364 /* 2601 */ "XMULXHI\000"
2365 /* 2609 */ "CAMELLIA_FLI\000"
2366 /* 2622 */ "FDTOI\000"
2367 /* 2628 */ "FQTOI\000"
2368 /* 2634 */ "FSTOI\000"
2369 /* 2640 */ "G_FPTOSI\000"
2370 /* 2649 */ "G_FPTOUI\000"
2371 /* 2658 */ "G_FPOWI\000"
2372 /* 2666 */ "BMASK\000"
2373 /* 2672 */ "COPY_LANEMASK\000"
2374 /* 2686 */ "G_PTRMASK\000"
2375 /* 2696 */ "EDGE32L\000"
2376 /* 2704 */ "EDGE16L\000"
2377 /* 2712 */ "EDGE8L\000"
2378 /* 2719 */ "FMUL8X16AL\000"
2379 /* 2730 */ "GC_LABEL\000"
2380 /* 2739 */ "DBG_LABEL\000"
2381 /* 2749 */ "EH_LABEL\000"
2382 /* 2758 */ "ANNOTATION_LABEL\000"
2383 /* 2775 */ "ICALL_BRANCH_FUNNEL\000"
2384 /* 2795 */ "CAMELLIA_FL\000"
2385 /* 2807 */ "G_FSHL\000"
2386 /* 2814 */ "G_SHL\000"
2387 /* 2820 */ "G_FCEIL\000"
2388 /* 2828 */ "G_SAVGCEIL\000"
2389 /* 2839 */ "G_UAVGCEIL\000"
2390 /* 2850 */ "PATCHABLE_TAIL_CALL\000"
2391 /* 2870 */ "TLS_CALL\000"
2392 /* 2879 */ "PATCHABLE_TYPED_EVENT_CALL\000"
2393 /* 2906 */ "PATCHABLE_EVENT_CALL\000"
2394 /* 2927 */ "FENTRY_CALL\000"
2395 /* 2939 */ "KILL\000"
2396 /* 2944 */ "G_CONSTANT_POOL\000"
2397 /* 2960 */ "ALIGNADDRL\000"
2398 /* 2971 */ "RETL\000"
2399 /* 2976 */ "G_ROTL\000"
2400 /* 2983 */ "G_VECREDUCE_FMUL\000"
2401 /* 3000 */ "G_FMUL\000"
2402 /* 3007 */ "G_VECREDUCE_SEQ_FMUL\000"
2403 /* 3028 */ "G_STRICT_FMUL\000"
2404 /* 3042 */ "G_CLMUL\000"
2405 /* 3050 */ "MPMUL\000"
2406 /* 3056 */ "MONTMUL\000"
2407 /* 3064 */ "G_VECREDUCE_MUL\000"
2408 /* 3080 */ "G_MUL\000"
2409 /* 3086 */ "SIAM\000"
2410 /* 3091 */ "G_FREM\000"
2411 /* 3098 */ "G_STRICT_FREM\000"
2412 /* 3112 */ "G_SREM\000"
2413 /* 3119 */ "G_UREM\000"
2414 /* 3126 */ "G_SDIVREM\000"
2415 /* 3136 */ "G_UDIVREM\000"
2416 /* 3146 */ "RDWIM\000"
2417 /* 3152 */ "INLINEASM\000"
2418 /* 3162 */ "G_VECREDUCE_FMINIMUM\000"
2419 /* 3183 */ "G_FMINIMUM\000"
2420 /* 3194 */ "G_ATOMICRMW_FMINIMUM\000"
2421 /* 3215 */ "G_VECREDUCE_FMAXIMUM\000"
2422 /* 3236 */ "G_FMAXIMUM\000"
2423 /* 3247 */ "G_ATOMICRMW_FMAXIMUM\000"
2424 /* 3268 */ "G_VECREDUCE_FMINIMUMNUM\000"
2425 /* 3292 */ "G_FMINIMUMNUM\000"
2426 /* 3306 */ "G_ATOMICRMW_FMINIMUMNUM\000"
2427 /* 3330 */ "G_VECREDUCE_FMAXIMUMNUM\000"
2428 /* 3354 */ "G_FMAXIMUMNUM\000"
2429 /* 3368 */ "G_ATOMICRMW_FMAXIMUMNUM\000"
2430 /* 3392 */ "G_FMINNUM\000"
2431 /* 3402 */ "G_FMAXNUM\000"
2432 /* 3412 */ "EDGE32N\000"
2433 /* 3420 */ "EDGE16N\000"
2434 /* 3428 */ "EDGE8N\000"
2435 /* 3435 */ "ALLCLEAN\000"
2436 /* 3444 */ "G_FATAN\000"
2437 /* 3452 */ "G_FTAN\000"
2438 /* 3459 */ "G_INTRINSIC_ROUNDEVEN\000"
2439 /* 3481 */ "G_ASSERT_ALIGN\000"
2440 /* 3496 */ "G_FCOPYSIGN\000"
2441 /* 3508 */ "G_VECREDUCE_FMIN\000"
2442 /* 3525 */ "G_ATOMICRMW_FMIN\000"
2443 /* 3542 */ "G_VECREDUCE_SMIN\000"
2444 /* 3559 */ "G_SMIN\000"
2445 /* 3566 */ "G_VECREDUCE_UMIN\000"
2446 /* 3583 */ "G_UMIN\000"
2447 /* 3590 */ "G_ATOMICRMW_UMIN\000"
2448 /* 3607 */ "G_ATOMICRMW_MIN\000"
2449 /* 3623 */ "G_FASIN\000"
2450 /* 3631 */ "G_FSIN\000"
2451 /* 3638 */ "EDGE32LN\000"
2452 /* 3647 */ "EDGE16LN\000"
2453 /* 3656 */ "EDGE8LN\000"
2454 /* 3664 */ "CFI_INSTRUCTION\000"
2455 /* 3680 */ "G_CTLZ_ZERO_POISON\000"
2456 /* 3699 */ "G_CTTZ_ZERO_POISON\000"
2457 /* 3718 */ "PDISTN\000"
2458 /* 3725 */ "ADJCALLSTACKDOWN\000"
2459 /* 3742 */ "SHUTDOWN\000"
2460 /* 3751 */ "G_SSUBO\000"
2461 /* 3759 */ "G_USUBO\000"
2462 /* 3767 */ "G_SADDO\000"
2463 /* 3775 */ "G_UADDO\000"
2464 /* 3783 */ "JUMP_TABLE_DEBUG_INFO\000"
2465 /* 3805 */ "G_SMULO\000"
2466 /* 3813 */ "G_UMULO\000"
2467 /* 3821 */ "G_BZERO\000"
2468 /* 3829 */ "FZERO\000"
2469 /* 3835 */ "STACKMAP\000"
2470 /* 3844 */ "G_DEBUGTRAP\000"
2471 /* 3856 */ "G_UBSANTRAP\000"
2472 /* 3868 */ "G_TRAP\000"
2473 /* 3875 */ "G_ATOMICRMW_UDEC_WRAP\000"
2474 /* 3897 */ "G_ATOMICRMW_UINC_WRAP\000"
2475 /* 3919 */ "G_BSWAP\000"
2476 /* 3927 */ "G_SITOFP\000"
2477 /* 3936 */ "G_UITOFP\000"
2478 /* 3945 */ "DES_IIP\000"
2479 /* 3953 */ "DES_IP\000"
2480 /* 3960 */ "G_FCMP\000"
2481 /* 3967 */ "G_STRICT_FCMP\000"
2482 /* 3981 */ "G_ICMP\000"
2483 /* 3988 */ "G_SCMP\000"
2484 /* 3995 */ "G_UCMP\000"
2485 /* 4002 */ "UNIMP\000"
2486 /* 4008 */ "NOP\000"
2487 /* 4012 */ "CONVERGENCECTRL_LOOP\000"
2488 /* 4033 */ "G_CTPOP\000"
2489 /* 4041 */ "PATCHABLE_OP\000"
2490 /* 4054 */ "FAULTING_OP\000"
2491 /* 4066 */ "ADJCALLSTACKUP\000"
2492 /* 4081 */ "PREALLOCATED_SETUP\000"
2493 /* 4100 */ "G_FLDEXP\000"
2494 /* 4109 */ "G_STRICT_FLDEXP\000"
2495 /* 4125 */ "G_FEXP\000"
2496 /* 4132 */ "G_FFREXP\000"
2497 /* 4141 */ "FSUBQ\000"
2498 /* 4147 */ "FADDQ\000"
2499 /* 4153 */ "V9FCMPEQ\000"
2500 /* 4162 */ "RDFQ\000"
2501 /* 4167 */ "FNEGQ\000"
2502 /* 4173 */ "FDMULQ\000"
2503 /* 4180 */ "FMULQ\000"
2504 /* 4186 */ "FDTOQ\000"
2505 /* 4192 */ "FITOQ\000"
2506 /* 4198 */ "FSTOQ\000"
2507 /* 4204 */ "FXTOQ\000"
2508 /* 4210 */ "V9FCMPQ\000"
2509 /* 4218 */ "FMOVRQ\000"
2510 /* 4225 */ "FABSQ\000"
2511 /* 4231 */ "FSQRTQ\000"
2512 /* 4238 */ "FDIVQ\000"
2513 /* 4244 */ "FMOVQ\000"
2514 /* 4250 */ "V8BAR\000"
2515 /* 4256 */ "STBAR\000"
2516 /* 4262 */ "RDTBR\000"
2517 /* 4268 */ "G_BR\000"
2518 /* 4273 */ "INLINEASM_BR\000"
2519 /* 4286 */ "ALIGNADDR\000"
2520 /* 4296 */ "G_BLOCK_ADDR\000"
2521 /* 4309 */ "MEMBARRIER\000"
2522 /* 4320 */ "G_CONSTANT_FOLD_BARRIER\000"
2523 /* 4344 */ "PATCHABLE_FUNCTION_ENTER\000"
2524 /* 4369 */ "G_READCYCLECOUNTER\000"
2525 /* 4388 */ "G_READSTEADYCOUNTER\000"
2526 /* 4408 */ "G_READ_REGISTER\000"
2527 /* 4424 */ "G_WRITE_REGISTER\000"
2528 /* 4441 */ "G_ASHR\000"
2529 /* 4448 */ "G_FSHR\000"
2530 /* 4455 */ "G_LSHR\000"
2531 /* 4462 */ "SIR\000"
2532 /* 4466 */ "G_CLMULR\000"
2533 /* 4475 */ "FOR\000"
2534 /* 4479 */ "CONVERGENCECTRL_ANCHOR\000"
2535 /* 4502 */ "FNOR\000"
2536 /* 4507 */ "FXNOR\000"
2537 /* 4513 */ "G_FFLOOR\000"
2538 /* 4522 */ "G_SAVGFLOOR\000"
2539 /* 4534 */ "G_UAVGFLOOR\000"
2540 /* 4546 */ "G_EXTRACT_SUBVECTOR\000"
2541 /* 4566 */ "G_INSERT_SUBVECTOR\000"
2542 /* 4585 */ "G_BUILD_VECTOR\000"
2543 /* 4600 */ "G_SHUFFLE_VECTOR\000"
2544 /* 4617 */ "G_STEP_VECTOR\000"
2545 /* 4631 */ "G_SPLAT_VECTOR\000"
2546 /* 4646 */ "FXOR\000"
2547 /* 4651 */ "G_VECREDUCE_XOR\000"
2548 /* 4667 */ "G_XOR\000"
2549 /* 4673 */ "G_ATOMICRMW_XOR\000"
2550 /* 4689 */ "G_VECREDUCE_OR\000"
2551 /* 4704 */ "G_OR\000"
2552 /* 4709 */ "G_ATOMICRMW_OR\000"
2553 /* 4724 */ "BPR\000"
2554 /* 4728 */ "RDPR\000"
2555 /* 4733 */ "MONTSQR\000"
2556 /* 4741 */ "RDASR\000"
2557 /* 4747 */ "RDPSR\000"
2558 /* 4753 */ "G_ROTR\000"
2559 /* 4760 */ "G_INTTOPTR\000"
2560 /* 4771 */ "FSRC1S\000"
2561 /* 4778 */ "FANDNOT1S\000"
2562 /* 4788 */ "FNOT1S\000"
2563 /* 4795 */ "FORNOT1S\000"
2564 /* 4804 */ "FPSUB32S\000"
2565 /* 4813 */ "FPADD32S\000"
2566 /* 4822 */ "FSRC2S\000"
2567 /* 4829 */ "FANDNOT2S\000"
2568 /* 4839 */ "FNOT2S\000"
2569 /* 4846 */ "FORNOT2S\000"
2570 /* 4855 */ "FPSUB16S\000"
2571 /* 4864 */ "FPADD16S\000"
2572 /* 4873 */ "G_FABS\000"
2573 /* 4880 */ "G_ABS\000"
2574 /* 4886 */ "FSUBS\000"
2575 /* 4892 */ "FHSUBS\000"
2576 /* 4899 */ "FMSUBS\000"
2577 /* 4906 */ "FNMSUBS\000"
2578 /* 4914 */ "G_ABDS\000"
2579 /* 4921 */ "FADDS\000"
2580 /* 4927 */ "FHADDS\000"
2581 /* 4934 */ "FNHADDS\000"
2582 /* 4942 */ "FMADDS\000"
2583 /* 4949 */ "FNMADDS\000"
2584 /* 4957 */ "FNADDS\000"
2585 /* 4964 */ "FANDS\000"
2586 /* 4970 */ "FNANDS\000"
2587 /* 4977 */ "FONES\000"
2588 /* 4983 */ "V9FCMPES\000"
2589 /* 4992 */ "G_UNMERGE_VALUES\000"
2590 /* 5009 */ "G_MERGE_VALUES\000"
2591 /* 5024 */ "FNEGS\000"
2592 /* 5030 */ "G_CTLS\000"
2593 /* 5037 */ "FMULS\000"
2594 /* 5043 */ "FNMULS\000"
2595 /* 5050 */ "G_FACOS\000"
2596 /* 5058 */ "G_FCOS\000"
2597 /* 5065 */ "G_FSINCOS\000"
2598 /* 5075 */ "FZEROS\000"
2599 /* 5082 */ "FDTOS\000"
2600 /* 5088 */ "FITOS\000"
2601 /* 5094 */ "FQTOS\000"
2602 /* 5100 */ "MOVWTOS\000"
2603 /* 5108 */ "FXTOS\000"
2604 /* 5114 */ "V9FCMPS\000"
2605 /* 5122 */ "G_STRICT_FCMPS\000"
2606 /* 5137 */ "FLCMPS\000"
2607 /* 5144 */ "FORS\000"
2608 /* 5149 */ "FNORS\000"
2609 /* 5155 */ "FXNORS\000"
2610 /* 5162 */ "G_CONCAT_VECTORS\000"
2611 /* 5179 */ "FXORS\000"
2612 /* 5185 */ "FMOVRS\000"
2613 /* 5192 */ "COPY_TO_REGCLASS\000"
2614 /* 5209 */ "G_IS_FPCLASS\000"
2615 /* 5222 */ "FABSS\000"
2616 /* 5228 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\000"
2617 /* 5258 */ "G_VECTOR_COMPRESS\000"
2618 /* 5276 */ "G_INTRINSIC_W_SIDE_EFFECTS\000"
2619 /* 5303 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\000"
2620 /* 5341 */ "FSQRTS\000"
2621 /* 5348 */ "FDIVS\000"
2622 /* 5354 */ "FMOVS\000"
2623 /* 5360 */ "G_TRUNC_SSAT_S\000"
2624 /* 5375 */ "G_SSUBSAT\000"
2625 /* 5385 */ "G_USUBSAT\000"
2626 /* 5395 */ "G_SADDSAT\000"
2627 /* 5405 */ "G_UADDSAT\000"
2628 /* 5415 */ "G_SSHLSAT\000"
2629 /* 5425 */ "G_USHLSAT\000"
2630 /* 5435 */ "G_SMULFIXSAT\000"
2631 /* 5448 */ "G_UMULFIXSAT\000"
2632 /* 5461 */ "G_SDIVFIXSAT\000"
2633 /* 5474 */ "G_UDIVFIXSAT\000"
2634 /* 5487 */ "G_ATOMICRMW_USUB_SAT\000"
2635 /* 5508 */ "G_FPTOSI_SAT\000"
2636 /* 5521 */ "G_FPTOUI_SAT\000"
2637 /* 5534 */ "G_EXTRACT\000"
2638 /* 5544 */ "G_SELECT\000"
2639 /* 5553 */ "G_BRINDIRECT\000"
2640 /* 5566 */ "PATCHABLE_RET\000"
2641 /* 5580 */ "G_MEMSET\000"
2642 /* 5589 */ "PATCHABLE_FUNCTION_EXIT\000"
2643 /* 5613 */ "G_BRJT\000"
2644 /* 5620 */ "G_EXTRACT_VECTOR_ELT\000"
2645 /* 5641 */ "G_INSERT_VECTOR_ELT\000"
2646 /* 5661 */ "BPFCCANT\000"
2647 /* 5670 */ "BPICCANT\000"
2648 /* 5679 */ "BPXCCANT\000"
2649 /* 5688 */ "BPRANT\000"
2650 /* 5695 */ "G_FCONSTANT\000"
2651 /* 5707 */ "G_CONSTANT\000"
2652 /* 5718 */ "BPFCCNT\000"
2653 /* 5726 */ "BPICCNT\000"
2654 /* 5734 */ "BPXCCNT\000"
2655 /* 5742 */ "LZCNT\000"
2656 /* 5748 */ "G_INTRINSIC_CONVERGENT\000"
2657 /* 5771 */ "STATEPOINT\000"
2658 /* 5782 */ "PATCHPOINT\000"
2659 /* 5793 */ "G_PTRTOINT\000"
2660 /* 5804 */ "G_FRINT\000"
2661 /* 5812 */ "G_INTRINSIC_LLRINT\000"
2662 /* 5831 */ "G_INTRINSIC_LRINT\000"
2663 /* 5849 */ "G_FNEARBYINT\000"
2664 /* 5862 */ "BPRNT\000"
2665 /* 5868 */ "G_VASTART\000"
2666 /* 5878 */ "LIFETIME_START\000"
2667 /* 5893 */ "G_INVOKE_REGION_START\000"
2668 /* 5915 */ "G_INSERT\000"
2669 /* 5924 */ "G_FSQRT\000"
2670 /* 5932 */ "G_STRICT_FSQRT\000"
2671 /* 5947 */ "G_BITCAST\000"
2672 /* 5957 */ "G_ADDRSPACE_CAST\000"
2673 /* 5974 */ "AES_DROUND01_LAST\000"
2674 /* 5992 */ "AES_EROUND01_LAST\000"
2675 /* 6010 */ "AES_DROUND23_LAST\000"
2676 /* 6028 */ "AES_EROUND23_LAST\000"
2677 /* 6046 */ "PDIST\000"
2678 /* 6052 */ "DBG_VALUE_LIST\000"
2679 /* 6067 */ "G_FPEXT\000"
2680 /* 6075 */ "G_SEXT\000"
2681 /* 6082 */ "G_ASSERT_SEXT\000"
2682 /* 6096 */ "G_ANYEXT\000"
2683 /* 6105 */ "G_ZEXT\000"
2684 /* 6112 */ "G_ASSERT_ZEXT\000"
2685 /* 6126 */ "FMUL8X16AU\000"
2686 /* 6137 */ "G_ABDU\000"
2687 /* 6144 */ "G_TRUNC_SSAT_U\000"
2688 /* 6159 */ "G_TRUNC_USAT_U\000"
2689 /* 6174 */ "G_FDIV\000"
2690 /* 6181 */ "G_STRICT_FDIV\000"
2691 /* 6195 */ "G_SDIV\000"
2692 /* 6202 */ "G_UDIV\000"
2693 /* 6209 */ "G_GET_FPENV\000"
2694 /* 6221 */ "G_RESET_FPENV\000"
2695 /* 6235 */ "G_SET_FPENV\000"
2696 /* 6247 */ "FLUSHW\000"
2697 /* 6254 */ "NORMALW\000"
2698 /* 6262 */ "INVALW\000"
2699 /* 6269 */ "G_FPOW\000"
2700 /* 6276 */ "OTHERW\000"
2701 /* 6283 */ "MOVSTOSW\000"
2702 /* 6292 */ "SETSW\000"
2703 /* 6298 */ "MOVSTOUW\000"
2704 /* 6307 */ "G_VECREDUCE_FMAX\000"
2705 /* 6324 */ "G_ATOMICRMW_FMAX\000"
2706 /* 6341 */ "G_VECREDUCE_SMAX\000"
2707 /* 6358 */ "G_SMAX\000"
2708 /* 6365 */ "G_VECREDUCE_UMAX\000"
2709 /* 6382 */ "G_UMAX\000"
2710 /* 6389 */ "G_ATOMICRMW_UMAX\000"
2711 /* 6406 */ "G_ATOMICRMW_MAX\000"
2712 /* 6422 */ "GETPCX\000"
2713 /* 6429 */ "FPMADDX\000"
2714 /* 6437 */ "G_FRAME_INDEX\000"
2715 /* 6451 */ "G_SBFX\000"
2716 /* 6458 */ "G_UBFX\000"
2717 /* 6465 */ "FPACKFIX\000"
2718 /* 6474 */ "G_SMULFIX\000"
2719 /* 6484 */ "G_UMULFIX\000"
2720 /* 6494 */ "G_SDIVFIX\000"
2721 /* 6504 */ "G_UDIVFIX\000"
2722 /* 6514 */ "XMULX\000"
2723 /* 6520 */ "FDTOX\000"
2724 /* 6526 */ "MOVDTOX\000"
2725 /* 6534 */ "FQTOX\000"
2726 /* 6540 */ "FSTOX\000"
2727 /* 6546 */ "SETX\000"
2728 /* 6551 */ "G_MEMCPY\000"
2729 /* 6560 */ "COPY\000"
2730 /* 6565 */ "RETRY\000"
2731 /* 6571 */ "CONVERGENCECTRL_ENTRY\000"
2732 /* 6593 */ "G_CTLZ\000"
2733 /* 6600 */ "G_CTTZ\000"
2734 /* 6607 */ "PREFETCHAi\000"
2735 /* 6618 */ "PREFETCHi\000"
2736 /* 6628 */ "SETHIi\000"
2737 /* 6635 */ "CALLi\000"
2738 /* 6641 */ "MEMBARi\000"
2739 /* 6649 */ "CALLrii\000"
2740 /* 6657 */ "LDSBAri\000"
2741 /* 6665 */ "STBAri\000"
2742 /* 6672 */ "LDUBAri\000"
2743 /* 6680 */ "LDSTUBAri\000"
2744 /* 6690 */ "LDDAri\000"
2745 /* 6697 */ "LDAri\000"
2746 /* 6703 */ "STDAri\000"
2747 /* 6710 */ "LDDFAri\000"
2748 /* 6718 */ "LDFAri\000"
2749 /* 6725 */ "STDFAri\000"
2750 /* 6733 */ "LDQFAri\000"
2751 /* 6741 */ "STQFAri\000"
2752 /* 6749 */ "STFAri\000"
2753 /* 6756 */ "LDSHAri\000"
2754 /* 6764 */ "STHAri\000"
2755 /* 6771 */ "LDUHAri\000"
2756 /* 6779 */ "SWAPAri\000"
2757 /* 6787 */ "SRAri\000"
2758 /* 6793 */ "CASAri\000"
2759 /* 6800 */ "STAri\000"
2760 /* 6806 */ "LDSWAri\000"
2761 /* 6814 */ "LDXAri\000"
2762 /* 6821 */ "CASXAri\000"
2763 /* 6829 */ "STXAri\000"
2764 /* 6836 */ "LDSBri\000"
2765 /* 6843 */ "STBri\000"
2766 /* 6849 */ "LDUBri\000"
2767 /* 6856 */ "SUBri\000"
2768 /* 6862 */ "LDSTUBri\000"
2769 /* 6871 */ "SMACri\000"
2770 /* 6878 */ "UMACri\000"
2771 /* 6885 */ "SUBCri\000"
2772 /* 6892 */ "TSUBCCri\000"
2773 /* 6901 */ "TADDCCri\000"
2774 /* 6910 */ "ANDCCri\000"
2775 /* 6918 */ "V9MOVFCCri\000"
2776 /* 6929 */ "TICCri\000"
2777 /* 6936 */ "MOVICCri\000"
2778 /* 6945 */ "SMULCCri\000"
2779 /* 6954 */ "UMULCCri\000"
2780 /* 6963 */ "ANDNCCri\000"
2781 /* 6972 */ "ORNCCri\000"
2782 /* 6980 */ "XNORCCri\000"
2783 /* 6989 */ "XORCCri\000"
2784 /* 6997 */ "MULSCCri\000"
2785 /* 7006 */ "SDIVCCri\000"
2786 /* 7015 */ "UDIVCCri\000"
2787 /* 7024 */ "TXCCri\000"
2788 /* 7031 */ "MOVXCCri\000"
2789 /* 7040 */ "ADDCri\000"
2790 /* 7047 */ "LDDCri\000"
2791 /* 7054 */ "LDCri\000"
2792 /* 7060 */ "STDCri\000"
2793 /* 7067 */ "STCri\000"
2794 /* 7073 */ "ADDri\000"
2795 /* 7079 */ "LDDri\000"
2796 /* 7085 */ "LDri\000"
2797 /* 7090 */ "ANDri\000"
2798 /* 7096 */ "BINDri\000"
2799 /* 7103 */ "CWBCONDri\000"
2800 /* 7113 */ "CXBCONDri\000"
2801 /* 7123 */ "STDri\000"
2802 /* 7129 */ "SUBEri\000"
2803 /* 7136 */ "ADDEri\000"
2804 /* 7143 */ "RESTOREri\000"
2805 /* 7153 */ "SAVEri\000"
2806 /* 7160 */ "LDDFri\000"
2807 /* 7167 */ "LDFri\000"
2808 /* 7173 */ "STDFri\000"
2809 /* 7180 */ "LDQFri\000"
2810 /* 7187 */ "STQFri\000"
2811 /* 7194 */ "STFri\000"
2812 /* 7200 */ "LDSHri\000"
2813 /* 7207 */ "FLUSHri\000"
2814 /* 7215 */ "STHri\000"
2815 /* 7221 */ "LDUHri\000"
2816 /* 7228 */ "TAIL_CALLri\000"
2817 /* 7240 */ "SLLri\000"
2818 /* 7246 */ "JMPLri\000"
2819 /* 7253 */ "SRLri\000"
2820 /* 7259 */ "SMULri\000"
2821 /* 7266 */ "UMULri\000"
2822 /* 7273 */ "WRWIMri\000"
2823 /* 7281 */ "ANDNri\000"
2824 /* 7288 */ "ORNri\000"
2825 /* 7294 */ "TRAPri\000"
2826 /* 7301 */ "SWAPri\000"
2827 /* 7308 */ "STDCQri\000"
2828 /* 7316 */ "STDFQri\000"
2829 /* 7324 */ "WRTBRri\000"
2830 /* 7332 */ "XNORri\000"
2831 /* 7339 */ "XORri\000"
2832 /* 7345 */ "WRPRri\000"
2833 /* 7352 */ "WRASRri\000"
2834 /* 7360 */ "LDCSRri\000"
2835 /* 7368 */ "STCSRri\000"
2836 /* 7376 */ "LDFSRri\000"
2837 /* 7384 */ "STFSRri\000"
2838 /* 7392 */ "LDXFSRri\000"
2839 /* 7401 */ "STXFSRri\000"
2840 /* 7410 */ "PWRPSRri\000"
2841 /* 7419 */ "MOVRri\000"
2842 /* 7426 */ "STri\000"
2843 /* 7431 */ "RETTri\000"
2844 /* 7438 */ "SDIVri\000"
2845 /* 7445 */ "UDIVri\000"
2846 /* 7452 */ "TSUBCCTVri\000"
2847 /* 7463 */ "TADDCCTVri\000"
2848 /* 7474 */ "LDSWri\000"
2849 /* 7481 */ "SRAXri\000"
2850 /* 7488 */ "LDXri\000"
2851 /* 7494 */ "SLLXri\000"
2852 /* 7501 */ "SRLXri\000"
2853 /* 7508 */ "MULXri\000"
2854 /* 7515 */ "STXri\000"
2855 /* 7521 */ "SDIVXri\000"
2856 /* 7529 */ "UDIVXri\000"
2857 /* 7537 */ "CALLrri\000"
2858 /* 7545 */ "PREFETCHAr\000"
2859 /* 7556 */ "PREFETCHr\000"
2860 /* 7566 */ "LDSBArr\000"
2861 /* 7574 */ "STBArr\000"
2862 /* 7581 */ "LDUBArr\000"
2863 /* 7589 */ "LDSTUBArr\000"
2864 /* 7599 */ "LDDArr\000"
2865 /* 7606 */ "LDArr\000"
2866 /* 7612 */ "STDArr\000"
2867 /* 7619 */ "LDDFArr\000"
2868 /* 7627 */ "LDFArr\000"
2869 /* 7634 */ "STDFArr\000"
2870 /* 7642 */ "LDQFArr\000"
2871 /* 7650 */ "STQFArr\000"
2872 /* 7658 */ "STFArr\000"
2873 /* 7665 */ "LDSHArr\000"
2874 /* 7673 */ "STHArr\000"
2875 /* 7680 */ "LDUHArr\000"
2876 /* 7688 */ "SWAPArr\000"
2877 /* 7696 */ "SRArr\000"
2878 /* 7702 */ "CASArr\000"
2879 /* 7709 */ "STArr\000"
2880 /* 7715 */ "LDSWArr\000"
2881 /* 7723 */ "LDXArr\000"
2882 /* 7730 */ "CASXArr\000"
2883 /* 7738 */ "STXArr\000"
2884 /* 7745 */ "LDSBrr\000"
2885 /* 7752 */ "STBrr\000"
2886 /* 7758 */ "LDUBrr\000"
2887 /* 7765 */ "SUBrr\000"
2888 /* 7771 */ "LDSTUBrr\000"
2889 /* 7780 */ "SMACrr\000"
2890 /* 7787 */ "UMACrr\000"
2891 /* 7794 */ "SUBCrr\000"
2892 /* 7801 */ "TSUBCCrr\000"
2893 /* 7810 */ "TADDCCrr\000"
2894 /* 7819 */ "ANDCCrr\000"
2895 /* 7827 */ "V9MOVFCCrr\000"
2896 /* 7838 */ "TICCrr\000"
2897 /* 7845 */ "MOVICCrr\000"
2898 /* 7854 */ "SMULCCrr\000"
2899 /* 7863 */ "UMULCCrr\000"
2900 /* 7872 */ "ANDNCCrr\000"
2901 /* 7881 */ "ORNCCrr\000"
2902 /* 7889 */ "XNORCCrr\000"
2903 /* 7898 */ "XORCCrr\000"
2904 /* 7906 */ "MULSCCrr\000"
2905 /* 7915 */ "SDIVCCrr\000"
2906 /* 7924 */ "UDIVCCrr\000"
2907 /* 7933 */ "TXCCrr\000"
2908 /* 7940 */ "MOVXCCrr\000"
2909 /* 7949 */ "ADDCrr\000"
2910 /* 7956 */ "LDDCrr\000"
2911 /* 7963 */ "LDCrr\000"
2912 /* 7969 */ "STDCrr\000"
2913 /* 7976 */ "POPCrr\000"
2914 /* 7983 */ "STCrr\000"
2915 /* 7989 */ "TLS_ADDrr\000"
2916 /* 7999 */ "LDDrr\000"
2917 /* 8005 */ "GDOP_LDrr\000"
2918 /* 8015 */ "TLS_LDrr\000"
2919 /* 8024 */ "ANDrr\000"
2920 /* 8030 */ "BINDrr\000"
2921 /* 8037 */ "CWBCONDrr\000"
2922 /* 8047 */ "CXBCONDrr\000"
2923 /* 8057 */ "STDrr\000"
2924 /* 8063 */ "SUBErr\000"
2925 /* 8070 */ "ADDErr\000"
2926 /* 8077 */ "RESTORErr\000"
2927 /* 8087 */ "SAVErr\000"
2928 /* 8094 */ "LDDFrr\000"
2929 /* 8101 */ "LDFrr\000"
2930 /* 8107 */ "STDFrr\000"
2931 /* 8114 */ "LDQFrr\000"
2932 /* 8121 */ "STQFrr\000"
2933 /* 8128 */ "STFrr\000"
2934 /* 8134 */ "LDSHrr\000"
2935 /* 8141 */ "FLUSHrr\000"
2936 /* 8149 */ "STHrr\000"
2937 /* 8155 */ "LDUHrr\000"
2938 /* 8162 */ "CALLrr\000"
2939 /* 8169 */ "SLLrr\000"
2940 /* 8175 */ "JMPLrr\000"
2941 /* 8182 */ "SRLrr\000"
2942 /* 8188 */ "SMULrr\000"
2943 /* 8195 */ "UMULrr\000"
2944 /* 8202 */ "WRWIMrr\000"
2945 /* 8210 */ "ANDNrr\000"
2946 /* 8217 */ "ORNrr\000"
2947 /* 8223 */ "TRAPrr\000"
2948 /* 8230 */ "SWAPrr\000"
2949 /* 8237 */ "STDCQrr\000"
2950 /* 8245 */ "STDFQrr\000"
2951 /* 8253 */ "WRTBRrr\000"
2952 /* 8261 */ "XNORrr\000"
2953 /* 8268 */ "XORrr\000"
2954 /* 8274 */ "WRPRrr\000"
2955 /* 8281 */ "WRASRrr\000"
2956 /* 8289 */ "LDCSRrr\000"
2957 /* 8297 */ "STCSRrr\000"
2958 /* 8305 */ "LDFSRrr\000"
2959 /* 8313 */ "STFSRrr\000"
2960 /* 8321 */ "LDXFSRrr\000"
2961 /* 8330 */ "STXFSRrr\000"
2962 /* 8339 */ "PWRPSRrr\000"
2963 /* 8348 */ "MOVRrr\000"
2964 /* 8355 */ "STrr\000"
2965 /* 8360 */ "RETTrr\000"
2966 /* 8367 */ "SDIVrr\000"
2967 /* 8374 */ "UDIVrr\000"
2968 /* 8381 */ "TSUBCCTVrr\000"
2969 /* 8392 */ "TADDCCTVrr\000"
2970 /* 8403 */ "LDSWrr\000"
2971 /* 8410 */ "SRAXrr\000"
2972 /* 8417 */ "GDOP_LDXrr\000"
2973 /* 8428 */ "TLS_LDXrr\000"
2974 /* 8438 */ "SLLXrr\000"
2975 /* 8445 */ "SRLXrr\000"
2976 /* 8452 */ "MULXrr\000"
2977 /* 8459 */ "STXrr\000"
2978 /* 8465 */ "SDIVXrr\000"
2979 /* 8473 */ "UDIVXrr\000"
2980};
2981#ifdef __GNUC__
2982#pragma GCC diagnostic pop
2983#endif
2984
2985extern const unsigned SparcInstrNameIndices[] = {
2986 2579U, 3152U, 4273U, 3664U, 2749U, 2730U, 2758U, 2939U,
2987 2357U, 2372U, 2312U, 2299U, 2399U, 5192U, 2175U, 6052U,
2988 2325U, 2575U, 2739U, 1887U, 6560U, 2672U, 2017U, 5878U,
2989 1610U, 1838U, 1875U, 3835U, 2927U, 5782U, 1789U, 4081U,
2990 2492U, 5771U, 2086U, 4054U, 4041U, 4344U, 5566U, 5589U,
2991 2850U, 2906U, 2879U, 2775U, 2166U, 4309U, 3783U, 2075U,
2992 6571U, 4479U, 4012U, 2223U, 6082U, 6112U, 3481U, 1391U,
2993 714U, 3080U, 6195U, 6202U, 3112U, 3119U, 3126U, 3136U,
2994 1588U, 4704U, 4667U, 4914U, 6137U, 4534U, 2839U, 4522U,
2995 2828U, 2310U, 2577U, 6437U, 2185U, 2200U, 2944U, 5534U,
2996 4992U, 5915U, 5009U, 4585U, 1126U, 5162U, 5793U, 4760U,
2997 5947U, 2266U, 4320U, 1706U, 1100U, 1688U, 5831U, 5812U,
2998 3459U, 4369U, 4388U, 1264U, 1208U, 1238U, 1177U, 1249U,
2999 1189U, 1219U, 2145U, 2099U, 2129U, 5228U, 2413U, 2430U,
3000 1407U, 720U, 1594U, 1535U, 4709U, 4673U, 6406U, 3607U,
3001 6389U, 3590U, 1358U, 697U, 6324U, 3525U, 3247U, 3194U,
3002 3368U, 3306U, 3897U, 3875U, 1647U, 5487U, 1867U, 2509U,
3003 1638U, 5553U, 5893U, 1078U, 5276U, 5748U, 5303U, 6096U,
3004 1118U, 5360U, 6144U, 6159U, 5707U, 5695U, 5868U, 2484U,
3005 6075U, 2386U, 6105U, 2814U, 4455U, 4441U, 2807U, 4448U,
3006 4753U, 2976U, 3981U, 3960U, 3988U, 3995U, 5544U, 3775U,
3007 1908U, 3759U, 1859U, 3767U, 1900U, 3751U, 1851U, 3813U,
3008 3805U, 2537U, 2529U, 5405U, 5395U, 5385U, 5375U, 5425U,
3009 5415U, 6474U, 6484U, 5435U, 5448U, 6494U, 6504U, 5461U,
3010 5474U, 1316U, 676U, 3000U, 640U, 1170U, 6174U, 3091U,
3011 2291U, 6269U, 2658U, 4125U, 263U, 9U, 2477U, 246U,
3012 0U, 4100U, 4132U, 2350U, 6067U, 1090U, 2640U, 2649U,
3013 3927U, 3936U, 5508U, 5521U, 4873U, 3496U, 5209U, 2275U,
3014 3392U, 3402U, 1957U, 1972U, 3183U, 3236U, 3292U, 3354U,
3015 6209U, 6235U, 6221U, 1916U, 1944U, 1929U, 2447U, 2462U,
3016 1397U, 2686U, 3559U, 6358U, 3583U, 6382U, 4880U, 1679U,
3017 1669U, 4268U, 5613U, 1995U, 4566U, 4546U, 5641U, 5620U,
3018 4600U, 4631U, 4617U, 5258U, 6600U, 3699U, 6593U, 3680U,
3019 5030U, 4033U, 3919U, 2153U, 3042U, 2520U, 4466U, 2820U,
3020 5058U, 3631U, 5065U, 3452U, 5050U, 3623U, 3444U, 254U,
3021 2561U, 2553U, 2545U, 5924U, 4513U, 5804U, 5849U, 5957U,
3022 4296U, 2004U, 1147U, 2244U, 2114U, 1344U, 683U, 3028U,
3023 6181U, 3098U, 646U, 5932U, 4109U, 3967U, 5122U, 4408U,
3024 4424U, 6551U, 2049U, 2256U, 5580U, 3821U, 2033U, 3868U,
3025 3844U, 3856U, 1323U, 3007U, 1299U, 2983U, 6307U, 3508U,
3026 3215U, 3162U, 3330U, 3268U, 1375U, 3064U, 1572U, 4689U,
3027 4651U, 6341U, 3542U, 6365U, 3566U, 6451U, 6458U, 3725U,
3028 4066U, 6422U, 769U, 880U, 987U, 805U, 916U, 1023U,
3029 846U, 953U, 1060U, 787U, 898U, 1005U, 5585U, 6292U,
3030 6546U, 4250U, 6902U, 7811U, 7040U, 7949U, 7136U, 8070U,
3031 1164U, 743U, 7073U, 7993U, 31U, 5974U, 294U, 6010U,
3032 44U, 5992U, 307U, 6028U, 18U, 72U, 233U, 4286U,
3033 2960U, 3435U, 6910U, 7819U, 6963U, 7872U, 7281U, 8210U,
3034 7090U, 8024U, 516U, 219U, 544U, 599U, 1624U, 624U,
3035 7096U, 8030U, 2666U, 751U, 602U, 5661U, 5718U, 864U,
3036 609U, 5670U, 5726U, 4724U, 659U, 5688U, 5862U, 971U,
3037 616U, 5679U, 5734U, 2024U, 2865U, 6635U, 7233U, 6649U,
3038 8162U, 7537U, 2339U, 2795U, 2609U, 6793U, 7702U, 6821U,
3039 7730U, 396U, 171U, 537U, 1630U, 631U, 736U, 7103U,
3040 8037U, 7113U, 8047U, 3945U, 3953U, 1560U, 1732U, 2065U,
3041 363U, 2704U, 3647U, 3420U, 138U, 2696U, 3638U, 3412U,
3042 531U, 2712U, 3656U, 3428U, 1813U, 4225U, 5222U, 1423U,
3043 4147U, 4921U, 664U, 1524U, 85U, 4778U, 271U, 4829U,
3044 4964U, 1623U, 623U, 551U, 562U, 418U, 1776U, 572U,
3045 435U, 193U, 452U, 210U, 370U, 145U, 379U, 154U,
3046 4212U, 581U, 5116U, 590U, 1826U, 4238U, 5348U, 4173U,
3047 2622U, 4186U, 5082U, 6520U, 1552U, 1429U, 4927U, 1277U,
3048 4892U, 1742U, 4192U, 5088U, 1782U, 5137U, 2569U, 6247U,
3049 7207U, 8141U, 1444U, 4942U, 427U, 1832U, 759U, 870U,
3050 977U, 4244U, 824U, 933U, 1040U, 1806U, 4218U, 5185U,
3051 5354U, 836U, 943U, 1050U, 1284U, 4899U, 505U, 482U,
3052 461U, 2719U, 6126U, 1496U, 493U, 470U, 4180U, 5037U,
3053 1459U, 4957U, 1529U, 4970U, 1490U, 4167U, 5024U, 1436U,
3054 4934U, 1451U, 4949U, 1291U, 4906U, 1502U, 5043U, 4502U,
3055 5149U, 94U, 4788U, 280U, 4839U, 1516U, 2070U, 4977U,
3056 4475U, 100U, 4795U, 286U, 4846U, 5144U, 388U, 163U,
3057 6465U, 355U, 4864U, 130U, 4813U, 324U, 6429U, 2583U,
3058 1987U, 347U, 4855U, 122U, 4804U, 1748U, 2628U, 5094U,
3059 6534U, 444U, 202U, 404U, 179U, 1509U, 1819U, 4231U,
3060 5341U, 340U, 115U, 66U, 4771U, 227U, 4822U, 411U,
3061 186U, 1754U, 2634U, 4198U, 6540U, 1271U, 4141U, 4886U,
3062 4507U, 5155U, 4646U, 5179U, 1760U, 4204U, 5108U, 3829U,
3063 5075U, 8417U, 8005U, 6262U, 7246U, 8175U, 6697U, 7606U,
3064 7360U, 8289U, 7054U, 7963U, 6690U, 7599U, 7047U, 7956U,
3065 6710U, 7619U, 7160U, 8094U, 7079U, 7999U, 6718U, 7627U,
3066 7376U, 8305U, 7167U, 8101U, 6733U, 7642U, 7180U, 8114U,
3067 6657U, 7566U, 6836U, 7745U, 6756U, 7665U, 7200U, 8134U,
3068 6680U, 7589U, 6862U, 7771U, 6806U, 7715U, 7474U, 8403U,
3069 6672U, 7581U, 6849U, 7758U, 6771U, 7680U, 7221U, 8155U,
3070 6814U, 7723U, 7392U, 8321U, 7488U, 8422U, 7085U, 8010U,
3071 5742U, 336U, 6641U, 3056U, 4733U, 6526U, 6920U, 7829U,
3072 6936U, 7845U, 7419U, 8348U, 6283U, 6298U, 5100U, 7031U,
3073 7940U, 1766U, 3050U, 6997U, 7906U, 7508U, 8452U, 4008U,
3074 6254U, 6982U, 7891U, 6972U, 7881U, 7288U, 8217U, 7334U,
3075 8263U, 6276U, 6046U, 3718U, 7976U, 6607U, 7545U, 6618U,
3076 7556U, 7410U, 8339U, 4741U, 4162U, 4728U, 4747U, 4262U,
3077 3146U, 1475U, 7143U, 8077U, 5576U, 2971U, 6565U, 7431U,
3078 8360U, 1484U, 7153U, 8087U, 7006U, 7915U, 7521U, 8465U,
3079 7438U, 8367U, 6628U, 57U, 524U, 108U, 3742U, 3086U,
3080 4462U, 7494U, 8438U, 7240U, 8169U, 6871U, 7780U, 6945U,
3081 7854U, 7259U, 8188U, 7481U, 8410U, 6787U, 7696U, 7501U,
3082 8445U, 7253U, 8182U, 6800U, 7709U, 4256U, 6665U, 7574U,
3083 6843U, 7752U, 7368U, 8297U, 7067U, 7983U, 6703U, 7612U,
3084 7308U, 8237U, 7060U, 7969U, 6725U, 7634U, 7316U, 8245U,
3085 7173U, 8107U, 7123U, 8057U, 6749U, 7658U, 7384U, 8313U,
3086 7194U, 8128U, 6764U, 7673U, 7215U, 8149U, 6741U, 7650U,
3087 7187U, 8121U, 6829U, 7738U, 7401U, 8330U, 7515U, 8459U,
3088 7426U, 8355U, 6893U, 7802U, 6885U, 7794U, 7129U, 8063U,
3089 6856U, 7765U, 6779U, 7688U, 7301U, 8230U, 62U, 320U,
3090 332U, 7463U, 8392U, 6901U, 7810U, 2860U, 7228U, 6929U,
3091 7838U, 7989U, 2870U, 8428U, 8015U, 7294U, 8223U, 7452U,
3092 8381U, 6892U, 7801U, 7024U, 7933U, 7015U, 7924U, 7529U,
3093 8473U, 7445U, 8374U, 6878U, 7787U, 6954U, 7863U, 2593U,
3094 7266U, 8195U, 4002U, 1774U, 1466U, 4153U, 4983U, 4210U,
3095 5114U, 757U, 822U, 834U, 6918U, 7827U, 7352U, 8281U,
3096 7345U, 8274U, 7411U, 8340U, 7324U, 8253U, 7273U, 8202U,
3097 6514U, 2601U, 6980U, 7889U, 7332U, 8261U, 6989U, 7898U,
3098 7339U, 8268U,
3099};
3100
3101extern const int16_t SparcRegClassByHwModeTables[2][1] = {
3102 { // DefaultMode
3103 SP::IntRegsRegClassID, // sparc_ptr_rc
3104 },
3105 { // SPARC64
3106 SP::I64RegsRegClassID, // sparc_ptr_rc
3107 },
3108};
3109
3110static inline void InitSparcMCInstrInfo(MCInstrInfo *II) {
3111 II->InitMCInstrInfo(SparcDescs.Insts, SparcInstrNameIndices, SparcInstrNameData, nullptr, nullptr, 898, &SparcRegClassByHwModeTables[0][0], 1);
3112}
3113
3114
3115} // namespace llvm
3116
3117#endif // GET_INSTRINFO_MC_DESC
3118
3119#ifdef GET_INSTRINFO_HEADER
3120#undef GET_INSTRINFO_HEADER
3121
3122namespace llvm {
3123
3124struct SparcGenInstrInfo : public TargetInstrInfo {
3125 explicit SparcGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u);
3126 ~SparcGenInstrInfo() override = default;
3127};
3128extern const int16_t SparcRegClassByHwModeTables[2][1];
3129
3130} // namespace llvm
3131
3132namespace llvm::SP {
3133
3134
3135} // namespace llvm::SP
3136
3137#endif // GET_INSTRINFO_HEADER
3138
3139#ifdef GET_INSTRINFO_HELPER_DECLS
3140#undef GET_INSTRINFO_HELPER_DECLS
3141
3142
3143#endif // GET_INSTRINFO_HELPER_DECLS
3144
3145#ifdef GET_INSTRINFO_HELPERS
3146#undef GET_INSTRINFO_HELPERS
3147
3148
3149#endif // GET_INSTRINFO_HELPERS
3150
3151#ifdef GET_INSTRINFO_CTOR_DTOR
3152#undef GET_INSTRINFO_CTOR_DTOR
3153
3154namespace llvm {
3155
3156extern const SparcInstrTable SparcDescs;
3157extern const unsigned SparcInstrNameIndices[];
3158extern const char SparcInstrNameData[];
3159SparcGenInstrInfo::SparcGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode)
3160 : TargetInstrInfo(TRI, CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode, SparcRegClassByHwModeTables[STI.getHwMode(MCSubtargetInfo::HwMode_RegInfo)]) {
3161 InitMCInstrInfo(SparcDescs.Insts, SparcInstrNameIndices, SparcInstrNameData, nullptr, nullptr, 898, &SparcRegClassByHwModeTables[0][0], 1);
3162}
3163
3164} // namespace llvm
3165
3166#endif // GET_INSTRINFO_CTOR_DTOR
3167
3168#ifdef GET_INSTRINFO_MC_HELPER_DECLS
3169#undef GET_INSTRINFO_MC_HELPER_DECLS
3170
3171namespace llvm {
3172
3173class MCInst;
3174class FeatureBitset;
3175
3176extern const int16_t SparcRegClassByHwModeTables[2][1];
3177
3178namespace Sparc_MC {
3179
3180void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features);
3181
3182} // namespace Sparc_MC
3183
3184} // namespace llvm
3185
3186#endif // GET_INSTRINFO_MC_HELPER_DECLS
3187
3188#ifdef GET_INSTRINFO_MC_HELPERS
3189#undef GET_INSTRINFO_MC_HELPERS
3190
3191namespace llvm::Sparc_MC {
3192
3193
3194} // namespace llvm::Sparc_MC
3195
3196#endif // GET_INSTRINFO_MC_HELPERS
3197
3198#if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\
3199 defined(GET_AVAILABLE_OPCODE_CHECKER)
3200#define GET_COMPUTE_FEATURES
3201#endif
3202#ifdef GET_COMPUTE_FEATURES
3203#undef GET_COMPUTE_FEATURES
3204
3205namespace llvm::Sparc_MC {
3206
3207// Bits for subtarget features that participate in instruction matching.
3208enum SubtargetFeatureBits : uint8_t {
3209 Feature_Is32BitBit = 10,
3210 Feature_Is64BitBit = 11,
3211 Feature_UseSoftMulDivBit = 12,
3212 Feature_HasV9Bit = 6,
3213 Feature_HasVISBit = 7,
3214 Feature_HasVIS2Bit = 8,
3215 Feature_HasVIS3Bit = 9,
3216 Feature_HasUA2005Bit = 4,
3217 Feature_HasUA2007Bit = 5,
3218 Feature_HasOSA2011Bit = 2,
3219 Feature_HasCryptoBit = 1,
3220 Feature_HasCASABit = 0,
3221 Feature_HasPWRPSRBit = 3,
3222};
3223
3224inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) {
3225 FeatureBitset Features;
3226 if (!(FB[Sparc::Feature64Bit]))
3227 Features.set(Feature_Is32BitBit);
3228 if (FB[Sparc::Feature64Bit])
3229 Features.set(Feature_Is64BitBit);
3230 if (FB[Sparc::FeatureSoftMulDiv])
3231 Features.set(Feature_UseSoftMulDivBit);
3232 if (FB[Sparc::FeatureV9])
3233 Features.set(Feature_HasV9Bit);
3234 if (FB[Sparc::FeatureVIS])
3235 Features.set(Feature_HasVISBit);
3236 if (FB[Sparc::FeatureVIS2])
3237 Features.set(Feature_HasVIS2Bit);
3238 if (FB[Sparc::FeatureVIS3])
3239 Features.set(Feature_HasVIS3Bit);
3240 if (FB[Sparc::FeatureUA2005])
3241 Features.set(Feature_HasUA2005Bit);
3242 if (FB[Sparc::FeatureUA2007])
3243 Features.set(Feature_HasUA2007Bit);
3244 if (FB[Sparc::FeatureOSA2011])
3245 Features.set(Feature_HasOSA2011Bit);
3246 if (FB[Sparc::FeatureCrypto])
3247 Features.set(Feature_HasCryptoBit);
3248 if (FB[Sparc::LeonCASA] || FB[Sparc::FeatureV9])
3249 Features.set(Feature_HasCASABit);
3250 if (FB[Sparc::FeaturePWRPSR])
3251 Features.set(Feature_HasPWRPSRBit);
3252 return Features;
3253}
3254
3255inline FeatureBitset computeRequiredFeatures(unsigned Opcode) {
3256 enum : uint8_t {
3257 CEFBS_None,
3258 CEFBS_HasCASA,
3259 CEFBS_HasCrypto,
3260 CEFBS_HasOSA2011,
3261 CEFBS_HasPWRPSR,
3262 CEFBS_HasUA2005,
3263 CEFBS_HasUA2007,
3264 CEFBS_HasV9,
3265 CEFBS_HasVIS,
3266 CEFBS_HasVIS2,
3267 CEFBS_HasVIS3,
3268 CEFBS_Is64Bit,
3269 CEFBS_Is64Bit_HasV9,
3270 };
3271
3272 static constexpr FeatureBitset FeatureBitsets[] = {
3273 {}, // CEFBS_None
3274 {Feature_HasCASABit, },
3275 {Feature_HasCryptoBit, },
3276 {Feature_HasOSA2011Bit, },
3277 {Feature_HasPWRPSRBit, },
3278 {Feature_HasUA2005Bit, },
3279 {Feature_HasUA2007Bit, },
3280 {Feature_HasV9Bit, },
3281 {Feature_HasVISBit, },
3282 {Feature_HasVIS2Bit, },
3283 {Feature_HasVIS3Bit, },
3284 {Feature_Is64BitBit, },
3285 {Feature_Is64BitBit, Feature_HasV9Bit, },
3286 };
3287 static constexpr uint8_t RequiredFeaturesRefs[] = {
3288 CEFBS_None, // PHI
3289 CEFBS_None, // INLINEASM
3290 CEFBS_None, // INLINEASM_BR
3291 CEFBS_None, // CFI_INSTRUCTION
3292 CEFBS_None, // EH_LABEL
3293 CEFBS_None, // GC_LABEL
3294 CEFBS_None, // ANNOTATION_LABEL
3295 CEFBS_None, // KILL
3296 CEFBS_None, // EXTRACT_SUBREG
3297 CEFBS_None, // INSERT_SUBREG
3298 CEFBS_None, // IMPLICIT_DEF
3299 CEFBS_None, // INIT_UNDEF
3300 CEFBS_None, // SUBREG_TO_REG
3301 CEFBS_None, // COPY_TO_REGCLASS
3302 CEFBS_None, // DBG_VALUE
3303 CEFBS_None, // DBG_VALUE_LIST
3304 CEFBS_None, // DBG_INSTR_REF
3305 CEFBS_None, // DBG_PHI
3306 CEFBS_None, // DBG_LABEL
3307 CEFBS_None, // REG_SEQUENCE
3308 CEFBS_None, // COPY
3309 CEFBS_None, // COPY_LANEMASK
3310 CEFBS_None, // BUNDLE
3311 CEFBS_None, // LIFETIME_START
3312 CEFBS_None, // LIFETIME_END
3313 CEFBS_None, // PSEUDO_PROBE
3314 CEFBS_None, // ARITH_FENCE
3315 CEFBS_None, // STACKMAP
3316 CEFBS_None, // FENTRY_CALL
3317 CEFBS_None, // PATCHPOINT
3318 CEFBS_None, // LOAD_STACK_GUARD
3319 CEFBS_None, // PREALLOCATED_SETUP
3320 CEFBS_None, // PREALLOCATED_ARG
3321 CEFBS_None, // STATEPOINT
3322 CEFBS_None, // LOCAL_ESCAPE
3323 CEFBS_None, // FAULTING_OP
3324 CEFBS_None, // PATCHABLE_OP
3325 CEFBS_None, // PATCHABLE_FUNCTION_ENTER
3326 CEFBS_None, // PATCHABLE_RET
3327 CEFBS_None, // PATCHABLE_FUNCTION_EXIT
3328 CEFBS_None, // PATCHABLE_TAIL_CALL
3329 CEFBS_None, // PATCHABLE_EVENT_CALL
3330 CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL
3331 CEFBS_None, // ICALL_BRANCH_FUNNEL
3332 CEFBS_None, // FAKE_USE
3333 CEFBS_None, // MEMBARRIER
3334 CEFBS_None, // JUMP_TABLE_DEBUG_INFO
3335 CEFBS_None, // RELOC_NONE
3336 CEFBS_None, // CONVERGENCECTRL_ENTRY
3337 CEFBS_None, // CONVERGENCECTRL_ANCHOR
3338 CEFBS_None, // CONVERGENCECTRL_LOOP
3339 CEFBS_None, // CONVERGENCECTRL_GLUE
3340 CEFBS_None, // G_ASSERT_SEXT
3341 CEFBS_None, // G_ASSERT_ZEXT
3342 CEFBS_None, // G_ASSERT_ALIGN
3343 CEFBS_None, // G_ADD
3344 CEFBS_None, // G_SUB
3345 CEFBS_None, // G_MUL
3346 CEFBS_None, // G_SDIV
3347 CEFBS_None, // G_UDIV
3348 CEFBS_None, // G_SREM
3349 CEFBS_None, // G_UREM
3350 CEFBS_None, // G_SDIVREM
3351 CEFBS_None, // G_UDIVREM
3352 CEFBS_None, // G_AND
3353 CEFBS_None, // G_OR
3354 CEFBS_None, // G_XOR
3355 CEFBS_None, // G_ABDS
3356 CEFBS_None, // G_ABDU
3357 CEFBS_None, // G_UAVGFLOOR
3358 CEFBS_None, // G_UAVGCEIL
3359 CEFBS_None, // G_SAVGFLOOR
3360 CEFBS_None, // G_SAVGCEIL
3361 CEFBS_None, // G_IMPLICIT_DEF
3362 CEFBS_None, // G_PHI
3363 CEFBS_None, // G_FRAME_INDEX
3364 CEFBS_None, // G_GLOBAL_VALUE
3365 CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE
3366 CEFBS_None, // G_CONSTANT_POOL
3367 CEFBS_None, // G_EXTRACT
3368 CEFBS_None, // G_UNMERGE_VALUES
3369 CEFBS_None, // G_INSERT
3370 CEFBS_None, // G_MERGE_VALUES
3371 CEFBS_None, // G_BUILD_VECTOR
3372 CEFBS_None, // G_BUILD_VECTOR_TRUNC
3373 CEFBS_None, // G_CONCAT_VECTORS
3374 CEFBS_None, // G_PTRTOINT
3375 CEFBS_None, // G_INTTOPTR
3376 CEFBS_None, // G_BITCAST
3377 CEFBS_None, // G_FREEZE
3378 CEFBS_None, // G_CONSTANT_FOLD_BARRIER
3379 CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND
3380 CEFBS_None, // G_INTRINSIC_TRUNC
3381 CEFBS_None, // G_INTRINSIC_ROUND
3382 CEFBS_None, // G_INTRINSIC_LRINT
3383 CEFBS_None, // G_INTRINSIC_LLRINT
3384 CEFBS_None, // G_INTRINSIC_ROUNDEVEN
3385 CEFBS_None, // G_READCYCLECOUNTER
3386 CEFBS_None, // G_READSTEADYCOUNTER
3387 CEFBS_None, // G_LOAD
3388 CEFBS_None, // G_SEXTLOAD
3389 CEFBS_None, // G_ZEXTLOAD
3390 CEFBS_None, // G_FPEXTLOAD
3391 CEFBS_None, // G_INDEXED_LOAD
3392 CEFBS_None, // G_INDEXED_SEXTLOAD
3393 CEFBS_None, // G_INDEXED_ZEXTLOAD
3394 CEFBS_None, // G_STORE
3395 CEFBS_None, // G_FPTRUNCSTORE
3396 CEFBS_None, // G_INDEXED_STORE
3397 CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
3398 CEFBS_None, // G_ATOMIC_CMPXCHG
3399 CEFBS_None, // G_ATOMICRMW_XCHG
3400 CEFBS_None, // G_ATOMICRMW_ADD
3401 CEFBS_None, // G_ATOMICRMW_SUB
3402 CEFBS_None, // G_ATOMICRMW_AND
3403 CEFBS_None, // G_ATOMICRMW_NAND
3404 CEFBS_None, // G_ATOMICRMW_OR
3405 CEFBS_None, // G_ATOMICRMW_XOR
3406 CEFBS_None, // G_ATOMICRMW_MAX
3407 CEFBS_None, // G_ATOMICRMW_MIN
3408 CEFBS_None, // G_ATOMICRMW_UMAX
3409 CEFBS_None, // G_ATOMICRMW_UMIN
3410 CEFBS_None, // G_ATOMICRMW_FADD
3411 CEFBS_None, // G_ATOMICRMW_FSUB
3412 CEFBS_None, // G_ATOMICRMW_FMAX
3413 CEFBS_None, // G_ATOMICRMW_FMIN
3414 CEFBS_None, // G_ATOMICRMW_FMAXIMUM
3415 CEFBS_None, // G_ATOMICRMW_FMINIMUM
3416 CEFBS_None, // G_ATOMICRMW_FMAXIMUMNUM
3417 CEFBS_None, // G_ATOMICRMW_FMINIMUMNUM
3418 CEFBS_None, // G_ATOMICRMW_UINC_WRAP
3419 CEFBS_None, // G_ATOMICRMW_UDEC_WRAP
3420 CEFBS_None, // G_ATOMICRMW_USUB_COND
3421 CEFBS_None, // G_ATOMICRMW_USUB_SAT
3422 CEFBS_None, // G_FENCE
3423 CEFBS_None, // G_PREFETCH
3424 CEFBS_None, // G_BRCOND
3425 CEFBS_None, // G_BRINDIRECT
3426 CEFBS_None, // G_INVOKE_REGION_START
3427 CEFBS_None, // G_INTRINSIC
3428 CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS
3429 CEFBS_None, // G_INTRINSIC_CONVERGENT
3430 CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
3431 CEFBS_None, // G_ANYEXT
3432 CEFBS_None, // G_TRUNC
3433 CEFBS_None, // G_TRUNC_SSAT_S
3434 CEFBS_None, // G_TRUNC_SSAT_U
3435 CEFBS_None, // G_TRUNC_USAT_U
3436 CEFBS_None, // G_CONSTANT
3437 CEFBS_None, // G_FCONSTANT
3438 CEFBS_None, // G_VASTART
3439 CEFBS_None, // G_VAARG
3440 CEFBS_None, // G_SEXT
3441 CEFBS_None, // G_SEXT_INREG
3442 CEFBS_None, // G_ZEXT
3443 CEFBS_None, // G_SHL
3444 CEFBS_None, // G_LSHR
3445 CEFBS_None, // G_ASHR
3446 CEFBS_None, // G_FSHL
3447 CEFBS_None, // G_FSHR
3448 CEFBS_None, // G_ROTR
3449 CEFBS_None, // G_ROTL
3450 CEFBS_None, // G_ICMP
3451 CEFBS_None, // G_FCMP
3452 CEFBS_None, // G_SCMP
3453 CEFBS_None, // G_UCMP
3454 CEFBS_None, // G_SELECT
3455 CEFBS_None, // G_UADDO
3456 CEFBS_None, // G_UADDE
3457 CEFBS_None, // G_USUBO
3458 CEFBS_None, // G_USUBE
3459 CEFBS_None, // G_SADDO
3460 CEFBS_None, // G_SADDE
3461 CEFBS_None, // G_SSUBO
3462 CEFBS_None, // G_SSUBE
3463 CEFBS_None, // G_UMULO
3464 CEFBS_None, // G_SMULO
3465 CEFBS_None, // G_UMULH
3466 CEFBS_None, // G_SMULH
3467 CEFBS_None, // G_UADDSAT
3468 CEFBS_None, // G_SADDSAT
3469 CEFBS_None, // G_USUBSAT
3470 CEFBS_None, // G_SSUBSAT
3471 CEFBS_None, // G_USHLSAT
3472 CEFBS_None, // G_SSHLSAT
3473 CEFBS_None, // G_SMULFIX
3474 CEFBS_None, // G_UMULFIX
3475 CEFBS_None, // G_SMULFIXSAT
3476 CEFBS_None, // G_UMULFIXSAT
3477 CEFBS_None, // G_SDIVFIX
3478 CEFBS_None, // G_UDIVFIX
3479 CEFBS_None, // G_SDIVFIXSAT
3480 CEFBS_None, // G_UDIVFIXSAT
3481 CEFBS_None, // G_FADD
3482 CEFBS_None, // G_FSUB
3483 CEFBS_None, // G_FMUL
3484 CEFBS_None, // G_FMA
3485 CEFBS_None, // G_FMAD
3486 CEFBS_None, // G_FDIV
3487 CEFBS_None, // G_FREM
3488 CEFBS_None, // G_FMODF
3489 CEFBS_None, // G_FPOW
3490 CEFBS_None, // G_FPOWI
3491 CEFBS_None, // G_FEXP
3492 CEFBS_None, // G_FEXP2
3493 CEFBS_None, // G_FEXP10
3494 CEFBS_None, // G_FLOG
3495 CEFBS_None, // G_FLOG2
3496 CEFBS_None, // G_FLOG10
3497 CEFBS_None, // G_FLDEXP
3498 CEFBS_None, // G_FFREXP
3499 CEFBS_None, // G_FNEG
3500 CEFBS_None, // G_FPEXT
3501 CEFBS_None, // G_FPTRUNC
3502 CEFBS_None, // G_FPTOSI
3503 CEFBS_None, // G_FPTOUI
3504 CEFBS_None, // G_SITOFP
3505 CEFBS_None, // G_UITOFP
3506 CEFBS_None, // G_FPTOSI_SAT
3507 CEFBS_None, // G_FPTOUI_SAT
3508 CEFBS_None, // G_FABS
3509 CEFBS_None, // G_FCOPYSIGN
3510 CEFBS_None, // G_IS_FPCLASS
3511 CEFBS_None, // G_FCANONICALIZE
3512 CEFBS_None, // G_FMINNUM
3513 CEFBS_None, // G_FMAXNUM
3514 CEFBS_None, // G_FMINNUM_IEEE
3515 CEFBS_None, // G_FMAXNUM_IEEE
3516 CEFBS_None, // G_FMINIMUM
3517 CEFBS_None, // G_FMAXIMUM
3518 CEFBS_None, // G_FMINIMUMNUM
3519 CEFBS_None, // G_FMAXIMUMNUM
3520 CEFBS_None, // G_GET_FPENV
3521 CEFBS_None, // G_SET_FPENV
3522 CEFBS_None, // G_RESET_FPENV
3523 CEFBS_None, // G_GET_FPMODE
3524 CEFBS_None, // G_SET_FPMODE
3525 CEFBS_None, // G_RESET_FPMODE
3526 CEFBS_None, // G_GET_ROUNDING
3527 CEFBS_None, // G_SET_ROUNDING
3528 CEFBS_None, // G_PTR_ADD
3529 CEFBS_None, // G_PTRMASK
3530 CEFBS_None, // G_SMIN
3531 CEFBS_None, // G_SMAX
3532 CEFBS_None, // G_UMIN
3533 CEFBS_None, // G_UMAX
3534 CEFBS_None, // G_ABS
3535 CEFBS_None, // G_LROUND
3536 CEFBS_None, // G_LLROUND
3537 CEFBS_None, // G_BR
3538 CEFBS_None, // G_BRJT
3539 CEFBS_None, // G_VSCALE
3540 CEFBS_None, // G_INSERT_SUBVECTOR
3541 CEFBS_None, // G_EXTRACT_SUBVECTOR
3542 CEFBS_None, // G_INSERT_VECTOR_ELT
3543 CEFBS_None, // G_EXTRACT_VECTOR_ELT
3544 CEFBS_None, // G_SHUFFLE_VECTOR
3545 CEFBS_None, // G_SPLAT_VECTOR
3546 CEFBS_None, // G_STEP_VECTOR
3547 CEFBS_None, // G_VECTOR_COMPRESS
3548 CEFBS_None, // G_CTTZ
3549 CEFBS_None, // G_CTTZ_ZERO_POISON
3550 CEFBS_None, // G_CTLZ
3551 CEFBS_None, // G_CTLZ_ZERO_POISON
3552 CEFBS_None, // G_CTLS
3553 CEFBS_None, // G_CTPOP
3554 CEFBS_None, // G_BSWAP
3555 CEFBS_None, // G_BITREVERSE
3556 CEFBS_None, // G_CLMUL
3557 CEFBS_None, // G_CLMULH
3558 CEFBS_None, // G_CLMULR
3559 CEFBS_None, // G_FCEIL
3560 CEFBS_None, // G_FCOS
3561 CEFBS_None, // G_FSIN
3562 CEFBS_None, // G_FSINCOS
3563 CEFBS_None, // G_FTAN
3564 CEFBS_None, // G_FACOS
3565 CEFBS_None, // G_FASIN
3566 CEFBS_None, // G_FATAN
3567 CEFBS_None, // G_FATAN2
3568 CEFBS_None, // G_FCOSH
3569 CEFBS_None, // G_FSINH
3570 CEFBS_None, // G_FTANH
3571 CEFBS_None, // G_FSQRT
3572 CEFBS_None, // G_FFLOOR
3573 CEFBS_None, // G_FRINT
3574 CEFBS_None, // G_FNEARBYINT
3575 CEFBS_None, // G_ADDRSPACE_CAST
3576 CEFBS_None, // G_BLOCK_ADDR
3577 CEFBS_None, // G_JUMP_TABLE
3578 CEFBS_None, // G_DYN_STACKALLOC
3579 CEFBS_None, // G_STACKSAVE
3580 CEFBS_None, // G_STACKRESTORE
3581 CEFBS_None, // G_STRICT_FADD
3582 CEFBS_None, // G_STRICT_FSUB
3583 CEFBS_None, // G_STRICT_FMUL
3584 CEFBS_None, // G_STRICT_FDIV
3585 CEFBS_None, // G_STRICT_FREM
3586 CEFBS_None, // G_STRICT_FMA
3587 CEFBS_None, // G_STRICT_FSQRT
3588 CEFBS_None, // G_STRICT_FLDEXP
3589 CEFBS_None, // G_STRICT_FCMP
3590 CEFBS_None, // G_STRICT_FCMPS
3591 CEFBS_None, // G_READ_REGISTER
3592 CEFBS_None, // G_WRITE_REGISTER
3593 CEFBS_None, // G_MEMCPY
3594 CEFBS_None, // G_MEMCPY_INLINE
3595 CEFBS_None, // G_MEMMOVE
3596 CEFBS_None, // G_MEMSET
3597 CEFBS_None, // G_BZERO
3598 CEFBS_None, // G_MEMSET_INLINE
3599 CEFBS_None, // G_TRAP
3600 CEFBS_None, // G_DEBUGTRAP
3601 CEFBS_None, // G_UBSANTRAP
3602 CEFBS_None, // G_VECREDUCE_SEQ_FADD
3603 CEFBS_None, // G_VECREDUCE_SEQ_FMUL
3604 CEFBS_None, // G_VECREDUCE_FADD
3605 CEFBS_None, // G_VECREDUCE_FMUL
3606 CEFBS_None, // G_VECREDUCE_FMAX
3607 CEFBS_None, // G_VECREDUCE_FMIN
3608 CEFBS_None, // G_VECREDUCE_FMAXIMUM
3609 CEFBS_None, // G_VECREDUCE_FMINIMUM
3610 CEFBS_None, // G_VECREDUCE_FMAXIMUMNUM
3611 CEFBS_None, // G_VECREDUCE_FMINIMUMNUM
3612 CEFBS_None, // G_VECREDUCE_ADD
3613 CEFBS_None, // G_VECREDUCE_MUL
3614 CEFBS_None, // G_VECREDUCE_AND
3615 CEFBS_None, // G_VECREDUCE_OR
3616 CEFBS_None, // G_VECREDUCE_XOR
3617 CEFBS_None, // G_VECREDUCE_SMAX
3618 CEFBS_None, // G_VECREDUCE_SMIN
3619 CEFBS_None, // G_VECREDUCE_UMAX
3620 CEFBS_None, // G_VECREDUCE_UMIN
3621 CEFBS_None, // G_SBFX
3622 CEFBS_None, // G_UBFX
3623 CEFBS_None, // ADJCALLSTACKDOWN
3624 CEFBS_None, // ADJCALLSTACKUP
3625 CEFBS_None, // GETPCX
3626 CEFBS_None, // SELECT_CC_DFP_FCC
3627 CEFBS_None, // SELECT_CC_DFP_ICC
3628 CEFBS_None, // SELECT_CC_DFP_XCC
3629 CEFBS_None, // SELECT_CC_FP_FCC
3630 CEFBS_None, // SELECT_CC_FP_ICC
3631 CEFBS_None, // SELECT_CC_FP_XCC
3632 CEFBS_None, // SELECT_CC_Int_FCC
3633 CEFBS_None, // SELECT_CC_Int_ICC
3634 CEFBS_None, // SELECT_CC_Int_XCC
3635 CEFBS_None, // SELECT_CC_QFP_FCC
3636 CEFBS_None, // SELECT_CC_QFP_ICC
3637 CEFBS_None, // SELECT_CC_QFP_XCC
3638 CEFBS_None, // SET
3639 CEFBS_HasV9, // SETSW
3640 CEFBS_Is64Bit_HasV9, // SETX
3641 CEFBS_None, // V8BAR
3642 CEFBS_None, // ADDCCri
3643 CEFBS_None, // ADDCCrr
3644 CEFBS_None, // ADDCri
3645 CEFBS_None, // ADDCrr
3646 CEFBS_None, // ADDEri
3647 CEFBS_None, // ADDErr
3648 CEFBS_HasVIS3, // ADDXC
3649 CEFBS_HasVIS3, // ADDXCCC
3650 CEFBS_None, // ADDri
3651 CEFBS_None, // ADDrr
3652 CEFBS_HasCrypto, // AES_DROUND01
3653 CEFBS_HasCrypto, // AES_DROUND01_LAST
3654 CEFBS_HasCrypto, // AES_DROUND23
3655 CEFBS_HasCrypto, // AES_DROUND23_LAST
3656 CEFBS_HasCrypto, // AES_EROUND01
3657 CEFBS_HasCrypto, // AES_EROUND01_LAST
3658 CEFBS_HasCrypto, // AES_EROUND23
3659 CEFBS_HasCrypto, // AES_EROUND23_LAST
3660 CEFBS_HasCrypto, // AES_KEXPAND0
3661 CEFBS_HasCrypto, // AES_KEXPAND1
3662 CEFBS_HasCrypto, // AES_KEXPAND2
3663 CEFBS_HasVIS, // ALIGNADDR
3664 CEFBS_HasVIS, // ALIGNADDRL
3665 CEFBS_HasUA2005, // ALLCLEAN
3666 CEFBS_None, // ANDCCri
3667 CEFBS_None, // ANDCCrr
3668 CEFBS_None, // ANDNCCri
3669 CEFBS_None, // ANDNCCrr
3670 CEFBS_None, // ANDNri
3671 CEFBS_None, // ANDNrr
3672 CEFBS_None, // ANDri
3673 CEFBS_None, // ANDrr
3674 CEFBS_HasVIS, // ARRAY16
3675 CEFBS_HasVIS, // ARRAY32
3676 CEFBS_HasVIS, // ARRAY8
3677 CEFBS_None, // BA
3678 CEFBS_None, // BCOND
3679 CEFBS_None, // BCONDA
3680 CEFBS_None, // BINDri
3681 CEFBS_None, // BINDrr
3682 CEFBS_HasVIS2, // BMASK
3683 CEFBS_HasV9, // BPFCC
3684 CEFBS_HasV9, // BPFCCA
3685 CEFBS_HasV9, // BPFCCANT
3686 CEFBS_HasV9, // BPFCCNT
3687 CEFBS_HasV9, // BPICC
3688 CEFBS_HasV9, // BPICCA
3689 CEFBS_HasV9, // BPICCANT
3690 CEFBS_HasV9, // BPICCNT
3691 CEFBS_HasV9, // BPR
3692 CEFBS_HasV9, // BPRA
3693 CEFBS_HasV9, // BPRANT
3694 CEFBS_HasV9, // BPRNT
3695 CEFBS_Is64Bit, // BPXCC
3696 CEFBS_Is64Bit, // BPXCCA
3697 CEFBS_Is64Bit, // BPXCCANT
3698 CEFBS_Is64Bit, // BPXCCNT
3699 CEFBS_HasVIS2, // BSHUFFLE
3700 CEFBS_None, // CALL
3701 CEFBS_None, // CALLi
3702 CEFBS_None, // CALLri
3703 CEFBS_None, // CALLrii
3704 CEFBS_None, // CALLrr
3705 CEFBS_None, // CALLrri
3706 CEFBS_HasCrypto, // CAMELLIA_F
3707 CEFBS_HasCrypto, // CAMELLIA_FL
3708 CEFBS_HasCrypto, // CAMELLIA_FLI
3709 CEFBS_HasV9, // CASAri
3710 CEFBS_HasCASA, // CASArr
3711 CEFBS_HasV9, // CASXAri
3712 CEFBS_HasV9, // CASXArr
3713 CEFBS_HasVIS3, // CMASK16
3714 CEFBS_HasVIS3, // CMASK32
3715 CEFBS_HasVIS3, // CMASK8
3716 CEFBS_None, // CPBCOND
3717 CEFBS_None, // CPBCONDA
3718 CEFBS_HasCrypto, // CRC32C
3719 CEFBS_HasOSA2011, // CWBCONDri
3720 CEFBS_HasOSA2011, // CWBCONDrr
3721 CEFBS_HasOSA2011, // CXBCONDri
3722 CEFBS_HasOSA2011, // CXBCONDrr
3723 CEFBS_HasCrypto, // DES_IIP
3724 CEFBS_HasCrypto, // DES_IP
3725 CEFBS_HasCrypto, // DES_KEXPAND
3726 CEFBS_HasCrypto, // DES_ROUND
3727 CEFBS_HasV9, // DONE
3728 CEFBS_HasVIS, // EDGE16
3729 CEFBS_HasVIS, // EDGE16L
3730 CEFBS_HasVIS2, // EDGE16LN
3731 CEFBS_HasVIS2, // EDGE16N
3732 CEFBS_HasVIS, // EDGE32
3733 CEFBS_HasVIS, // EDGE32L
3734 CEFBS_HasVIS2, // EDGE32LN
3735 CEFBS_HasVIS2, // EDGE32N
3736 CEFBS_HasVIS, // EDGE8
3737 CEFBS_HasVIS, // EDGE8L
3738 CEFBS_HasVIS2, // EDGE8LN
3739 CEFBS_HasVIS2, // EDGE8N
3740 CEFBS_HasV9, // FABSD
3741 CEFBS_HasV9, // FABSQ
3742 CEFBS_None, // FABSS
3743 CEFBS_None, // FADDD
3744 CEFBS_None, // FADDQ
3745 CEFBS_None, // FADDS
3746 CEFBS_HasVIS, // FALIGNADATA
3747 CEFBS_HasVIS, // FAND
3748 CEFBS_HasVIS, // FANDNOT1
3749 CEFBS_HasVIS, // FANDNOT1S
3750 CEFBS_HasVIS, // FANDNOT2
3751 CEFBS_HasVIS, // FANDNOT2S
3752 CEFBS_HasVIS, // FANDS
3753 CEFBS_None, // FBCOND
3754 CEFBS_None, // FBCONDA
3755 CEFBS_HasV9, // FBCONDA_V9
3756 CEFBS_HasV9, // FBCOND_V9
3757 CEFBS_HasVIS3, // FCHKSM16
3758 CEFBS_None, // FCMPD
3759 CEFBS_HasV9, // FCMPD_V9
3760 CEFBS_HasVIS, // FCMPEQ16
3761 CEFBS_HasVIS, // FCMPEQ32
3762 CEFBS_HasVIS, // FCMPGT16
3763 CEFBS_HasVIS, // FCMPGT32
3764 CEFBS_HasVIS, // FCMPLE16
3765 CEFBS_HasVIS, // FCMPLE32
3766 CEFBS_HasVIS, // FCMPNE16
3767 CEFBS_HasVIS, // FCMPNE32
3768 CEFBS_None, // FCMPQ
3769 CEFBS_HasV9, // FCMPQ_V9
3770 CEFBS_None, // FCMPS
3771 CEFBS_HasV9, // FCMPS_V9
3772 CEFBS_None, // FDIVD
3773 CEFBS_None, // FDIVQ
3774 CEFBS_None, // FDIVS
3775 CEFBS_None, // FDMULQ
3776 CEFBS_None, // FDTOI
3777 CEFBS_None, // FDTOQ
3778 CEFBS_None, // FDTOS
3779 CEFBS_HasV9, // FDTOX
3780 CEFBS_HasVIS, // FEXPAND
3781 CEFBS_HasVIS3, // FHADDD
3782 CEFBS_HasVIS3, // FHADDS
3783 CEFBS_HasVIS3, // FHSUBD
3784 CEFBS_HasVIS3, // FHSUBS
3785 CEFBS_None, // FITOD
3786 CEFBS_None, // FITOQ
3787 CEFBS_None, // FITOS
3788 CEFBS_HasVIS3, // FLCMPD
3789 CEFBS_HasVIS3, // FLCMPS
3790 CEFBS_None, // FLUSH
3791 CEFBS_HasV9, // FLUSHW
3792 CEFBS_None, // FLUSHri
3793 CEFBS_None, // FLUSHrr
3794 CEFBS_HasUA2007, // FMADDD
3795 CEFBS_HasUA2007, // FMADDS
3796 CEFBS_HasVIS3, // FMEAN16
3797 CEFBS_HasV9, // FMOVD
3798 CEFBS_HasV9, // FMOVD_FCC
3799 CEFBS_HasV9, // FMOVD_ICC
3800 CEFBS_Is64Bit, // FMOVD_XCC
3801 CEFBS_HasV9, // FMOVQ
3802 CEFBS_HasV9, // FMOVQ_FCC
3803 CEFBS_HasV9, // FMOVQ_ICC
3804 CEFBS_Is64Bit, // FMOVQ_XCC
3805 CEFBS_HasV9, // FMOVRD
3806 CEFBS_HasV9, // FMOVRQ
3807 CEFBS_HasV9, // FMOVRS
3808 CEFBS_None, // FMOVS
3809 CEFBS_HasV9, // FMOVS_FCC
3810 CEFBS_HasV9, // FMOVS_ICC
3811 CEFBS_Is64Bit, // FMOVS_XCC
3812 CEFBS_HasUA2007, // FMSUBD
3813 CEFBS_HasUA2007, // FMSUBS
3814 CEFBS_HasVIS, // FMUL8SUX16
3815 CEFBS_HasVIS, // FMUL8ULX16
3816 CEFBS_HasVIS, // FMUL8X16
3817 CEFBS_HasVIS, // FMUL8X16AL
3818 CEFBS_HasVIS, // FMUL8X16AU
3819 CEFBS_None, // FMULD
3820 CEFBS_HasVIS, // FMULD8SUX16
3821 CEFBS_HasVIS, // FMULD8ULX16
3822 CEFBS_None, // FMULQ
3823 CEFBS_None, // FMULS
3824 CEFBS_HasVIS3, // FNADDD
3825 CEFBS_HasVIS3, // FNADDS
3826 CEFBS_HasVIS, // FNAND
3827 CEFBS_HasVIS, // FNANDS
3828 CEFBS_HasV9, // FNEGD
3829 CEFBS_HasV9, // FNEGQ
3830 CEFBS_None, // FNEGS
3831 CEFBS_HasVIS3, // FNHADDD
3832 CEFBS_HasVIS3, // FNHADDS
3833 CEFBS_HasUA2007, // FNMADDD
3834 CEFBS_HasUA2007, // FNMADDS
3835 CEFBS_HasUA2007, // FNMSUBD
3836 CEFBS_HasUA2007, // FNMSUBS
3837 CEFBS_HasVIS3, // FNMULD
3838 CEFBS_HasVIS3, // FNMULS
3839 CEFBS_HasVIS, // FNOR
3840 CEFBS_HasVIS, // FNORS
3841 CEFBS_HasVIS, // FNOT1
3842 CEFBS_HasVIS, // FNOT1S
3843 CEFBS_HasVIS, // FNOT2
3844 CEFBS_HasVIS, // FNOT2S
3845 CEFBS_HasVIS3, // FNSMULD
3846 CEFBS_HasVIS, // FONE
3847 CEFBS_HasVIS, // FONES
3848 CEFBS_HasVIS, // FOR
3849 CEFBS_HasVIS, // FORNOT1
3850 CEFBS_HasVIS, // FORNOT1S
3851 CEFBS_HasVIS, // FORNOT2
3852 CEFBS_HasVIS, // FORNOT2S
3853 CEFBS_HasVIS, // FORS
3854 CEFBS_HasVIS, // FPACK16
3855 CEFBS_HasVIS, // FPACK32
3856 CEFBS_HasVIS, // FPACKFIX
3857 CEFBS_HasVIS, // FPADD16
3858 CEFBS_HasVIS, // FPADD16S
3859 CEFBS_HasVIS, // FPADD32
3860 CEFBS_HasVIS, // FPADD32S
3861 CEFBS_HasVIS3, // FPADD64
3862 CEFBS_HasOSA2011, // FPMADDX
3863 CEFBS_HasOSA2011, // FPMADDXHI
3864 CEFBS_HasVIS, // FPMERGE
3865 CEFBS_HasVIS, // FPSUB16
3866 CEFBS_HasVIS, // FPSUB16S
3867 CEFBS_HasVIS, // FPSUB32
3868 CEFBS_HasVIS, // FPSUB32S
3869 CEFBS_None, // FQTOD
3870 CEFBS_None, // FQTOI
3871 CEFBS_None, // FQTOS
3872 CEFBS_HasV9, // FQTOX
3873 CEFBS_HasVIS3, // FSLAS16
3874 CEFBS_HasVIS3, // FSLAS32
3875 CEFBS_HasVIS3, // FSLL16
3876 CEFBS_HasVIS3, // FSLL32
3877 CEFBS_None, // FSMULD
3878 CEFBS_None, // FSQRTD
3879 CEFBS_None, // FSQRTQ
3880 CEFBS_None, // FSQRTS
3881 CEFBS_HasVIS3, // FSRA16
3882 CEFBS_HasVIS3, // FSRA32
3883 CEFBS_HasVIS, // FSRC1
3884 CEFBS_HasVIS, // FSRC1S
3885 CEFBS_HasVIS, // FSRC2
3886 CEFBS_HasVIS, // FSRC2S
3887 CEFBS_HasVIS3, // FSRL16
3888 CEFBS_HasVIS3, // FSRL32
3889 CEFBS_None, // FSTOD
3890 CEFBS_None, // FSTOI
3891 CEFBS_None, // FSTOQ
3892 CEFBS_HasV9, // FSTOX
3893 CEFBS_None, // FSUBD
3894 CEFBS_None, // FSUBQ
3895 CEFBS_None, // FSUBS
3896 CEFBS_HasVIS, // FXNOR
3897 CEFBS_HasVIS, // FXNORS
3898 CEFBS_HasVIS, // FXOR
3899 CEFBS_HasVIS, // FXORS
3900 CEFBS_HasV9, // FXTOD
3901 CEFBS_HasV9, // FXTOQ
3902 CEFBS_HasV9, // FXTOS
3903 CEFBS_HasVIS, // FZERO
3904 CEFBS_HasVIS, // FZEROS
3905 CEFBS_HasV9, // GDOP_LDXrr
3906 CEFBS_None, // GDOP_LDrr
3907 CEFBS_HasUA2005, // INVALW
3908 CEFBS_None, // JMPLri
3909 CEFBS_None, // JMPLrr
3910 CEFBS_HasV9, // LDAri
3911 CEFBS_None, // LDArr
3912 CEFBS_None, // LDCSRri
3913 CEFBS_None, // LDCSRrr
3914 CEFBS_None, // LDCri
3915 CEFBS_None, // LDCrr
3916 CEFBS_HasV9, // LDDAri
3917 CEFBS_None, // LDDArr
3918 CEFBS_None, // LDDCri
3919 CEFBS_None, // LDDCrr
3920 CEFBS_HasV9, // LDDFAri
3921 CEFBS_HasV9, // LDDFArr
3922 CEFBS_None, // LDDFri
3923 CEFBS_None, // LDDFrr
3924 CEFBS_None, // LDDri
3925 CEFBS_None, // LDDrr
3926 CEFBS_HasV9, // LDFAri
3927 CEFBS_HasV9, // LDFArr
3928 CEFBS_None, // LDFSRri
3929 CEFBS_None, // LDFSRrr
3930 CEFBS_None, // LDFri
3931 CEFBS_None, // LDFrr
3932 CEFBS_HasV9, // LDQFAri
3933 CEFBS_HasV9, // LDQFArr
3934 CEFBS_HasV9, // LDQFri
3935 CEFBS_HasV9, // LDQFrr
3936 CEFBS_HasV9, // LDSBAri
3937 CEFBS_None, // LDSBArr
3938 CEFBS_None, // LDSBri
3939 CEFBS_None, // LDSBrr
3940 CEFBS_HasV9, // LDSHAri
3941 CEFBS_None, // LDSHArr
3942 CEFBS_None, // LDSHri
3943 CEFBS_None, // LDSHrr
3944 CEFBS_HasV9, // LDSTUBAri
3945 CEFBS_None, // LDSTUBArr
3946 CEFBS_None, // LDSTUBri
3947 CEFBS_None, // LDSTUBrr
3948 CEFBS_HasV9, // LDSWAri
3949 CEFBS_HasV9, // LDSWArr
3950 CEFBS_HasV9, // LDSWri
3951 CEFBS_HasV9, // LDSWrr
3952 CEFBS_HasV9, // LDUBAri
3953 CEFBS_None, // LDUBArr
3954 CEFBS_None, // LDUBri
3955 CEFBS_None, // LDUBrr
3956 CEFBS_HasV9, // LDUHAri
3957 CEFBS_None, // LDUHArr
3958 CEFBS_None, // LDUHri
3959 CEFBS_None, // LDUHrr
3960 CEFBS_HasV9, // LDXAri
3961 CEFBS_HasV9, // LDXArr
3962 CEFBS_HasV9, // LDXFSRri
3963 CEFBS_HasV9, // LDXFSRrr
3964 CEFBS_HasV9, // LDXri
3965 CEFBS_HasV9, // LDXrr
3966 CEFBS_None, // LDri
3967 CEFBS_None, // LDrr
3968 CEFBS_HasVIS3, // LZCNT
3969 CEFBS_HasCrypto, // MD5
3970 CEFBS_HasV9, // MEMBARi
3971 CEFBS_HasCrypto, // MONTMUL
3972 CEFBS_HasCrypto, // MONTSQR
3973 CEFBS_HasVIS3, // MOVDTOX
3974 CEFBS_HasV9, // MOVFCCri
3975 CEFBS_HasV9, // MOVFCCrr
3976 CEFBS_HasV9, // MOVICCri
3977 CEFBS_HasV9, // MOVICCrr
3978 CEFBS_HasV9, // MOVRri
3979 CEFBS_HasV9, // MOVRrr
3980 CEFBS_HasVIS3, // MOVSTOSW
3981 CEFBS_HasVIS3, // MOVSTOUW
3982 CEFBS_HasVIS3, // MOVWTOS
3983 CEFBS_Is64Bit, // MOVXCCri
3984 CEFBS_Is64Bit, // MOVXCCrr
3985 CEFBS_HasVIS3, // MOVXTOD
3986 CEFBS_HasCrypto, // MPMUL
3987 CEFBS_None, // MULSCCri
3988 CEFBS_None, // MULSCCrr
3989 CEFBS_HasV9, // MULXri
3990 CEFBS_HasV9, // MULXrr
3991 CEFBS_None, // NOP
3992 CEFBS_HasUA2005, // NORMALW
3993 CEFBS_None, // ORCCri
3994 CEFBS_None, // ORCCrr
3995 CEFBS_None, // ORNCCri
3996 CEFBS_None, // ORNCCrr
3997 CEFBS_None, // ORNri
3998 CEFBS_None, // ORNrr
3999 CEFBS_None, // ORri
4000 CEFBS_None, // ORrr
4001 CEFBS_HasUA2005, // OTHERW
4002 CEFBS_HasVIS, // PDIST
4003 CEFBS_HasVIS3, // PDISTN
4004 CEFBS_HasV9, // POPCrr
4005 CEFBS_HasV9, // PREFETCHAi
4006 CEFBS_HasV9, // PREFETCHAr
4007 CEFBS_HasV9, // PREFETCHi
4008 CEFBS_HasV9, // PREFETCHr
4009 CEFBS_HasPWRPSR, // PWRPSRri
4010 CEFBS_HasPWRPSR, // PWRPSRrr
4011 CEFBS_None, // RDASR
4012 CEFBS_HasV9, // RDFQ
4013 CEFBS_HasV9, // RDPR
4014 CEFBS_None, // RDPSR
4015 CEFBS_None, // RDTBR
4016 CEFBS_None, // RDWIM
4017 CEFBS_HasV9, // RESTORED
4018 CEFBS_None, // RESTOREri
4019 CEFBS_None, // RESTORErr
4020 CEFBS_None, // RET
4021 CEFBS_None, // RETL
4022 CEFBS_HasV9, // RETRY
4023 CEFBS_None, // RETTri
4024 CEFBS_None, // RETTrr
4025 CEFBS_HasV9, // SAVED
4026 CEFBS_None, // SAVEri
4027 CEFBS_None, // SAVErr
4028 CEFBS_None, // SDIVCCri
4029 CEFBS_None, // SDIVCCrr
4030 CEFBS_HasV9, // SDIVXri
4031 CEFBS_HasV9, // SDIVXrr
4032 CEFBS_None, // SDIVri
4033 CEFBS_None, // SDIVrr
4034 CEFBS_None, // SETHIi
4035 CEFBS_HasCrypto, // SHA1
4036 CEFBS_HasCrypto, // SHA256
4037 CEFBS_HasCrypto, // SHA512
4038 CEFBS_HasVIS, // SHUTDOWN
4039 CEFBS_HasVIS2, // SIAM
4040 CEFBS_HasV9, // SIR
4041 CEFBS_HasV9, // SLLXri
4042 CEFBS_HasV9, // SLLXrr
4043 CEFBS_None, // SLLri
4044 CEFBS_None, // SLLrr
4045 CEFBS_None, // SMACri
4046 CEFBS_None, // SMACrr
4047 CEFBS_None, // SMULCCri
4048 CEFBS_None, // SMULCCrr
4049 CEFBS_None, // SMULri
4050 CEFBS_None, // SMULrr
4051 CEFBS_HasV9, // SRAXri
4052 CEFBS_HasV9, // SRAXrr
4053 CEFBS_None, // SRAri
4054 CEFBS_None, // SRArr
4055 CEFBS_HasV9, // SRLXri
4056 CEFBS_HasV9, // SRLXrr
4057 CEFBS_None, // SRLri
4058 CEFBS_None, // SRLrr
4059 CEFBS_HasV9, // STAri
4060 CEFBS_None, // STArr
4061 CEFBS_None, // STBAR
4062 CEFBS_HasV9, // STBAri
4063 CEFBS_None, // STBArr
4064 CEFBS_None, // STBri
4065 CEFBS_None, // STBrr
4066 CEFBS_None, // STCSRri
4067 CEFBS_None, // STCSRrr
4068 CEFBS_None, // STCri
4069 CEFBS_None, // STCrr
4070 CEFBS_HasV9, // STDAri
4071 CEFBS_None, // STDArr
4072 CEFBS_None, // STDCQri
4073 CEFBS_None, // STDCQrr
4074 CEFBS_None, // STDCri
4075 CEFBS_None, // STDCrr
4076 CEFBS_HasV9, // STDFAri
4077 CEFBS_HasV9, // STDFArr
4078 CEFBS_None, // STDFQri
4079 CEFBS_None, // STDFQrr
4080 CEFBS_None, // STDFri
4081 CEFBS_None, // STDFrr
4082 CEFBS_None, // STDri
4083 CEFBS_None, // STDrr
4084 CEFBS_HasV9, // STFAri
4085 CEFBS_HasV9, // STFArr
4086 CEFBS_None, // STFSRri
4087 CEFBS_None, // STFSRrr
4088 CEFBS_None, // STFri
4089 CEFBS_None, // STFrr
4090 CEFBS_HasV9, // STHAri
4091 CEFBS_None, // STHArr
4092 CEFBS_None, // STHri
4093 CEFBS_None, // STHrr
4094 CEFBS_HasV9, // STQFAri
4095 CEFBS_HasV9, // STQFArr
4096 CEFBS_HasV9, // STQFri
4097 CEFBS_HasV9, // STQFrr
4098 CEFBS_HasV9, // STXAri
4099 CEFBS_HasV9, // STXArr
4100 CEFBS_HasV9, // STXFSRri
4101 CEFBS_HasV9, // STXFSRrr
4102 CEFBS_HasV9, // STXri
4103 CEFBS_HasV9, // STXrr
4104 CEFBS_None, // STri
4105 CEFBS_None, // STrr
4106 CEFBS_None, // SUBCCri
4107 CEFBS_None, // SUBCCrr
4108 CEFBS_None, // SUBCri
4109 CEFBS_None, // SUBCrr
4110 CEFBS_None, // SUBEri
4111 CEFBS_None, // SUBErr
4112 CEFBS_None, // SUBri
4113 CEFBS_None, // SUBrr
4114 CEFBS_HasV9, // SWAPAri
4115 CEFBS_None, // SWAPArr
4116 CEFBS_None, // SWAPri
4117 CEFBS_None, // SWAPrr
4118 CEFBS_None, // TA1
4119 CEFBS_None, // TA3
4120 CEFBS_None, // TA5
4121 CEFBS_None, // TADDCCTVri
4122 CEFBS_None, // TADDCCTVrr
4123 CEFBS_None, // TADDCCri
4124 CEFBS_None, // TADDCCrr
4125 CEFBS_None, // TAIL_CALL
4126 CEFBS_None, // TAIL_CALLri
4127 CEFBS_HasV9, // TICCri
4128 CEFBS_HasV9, // TICCrr
4129 CEFBS_None, // TLS_ADDrr
4130 CEFBS_None, // TLS_CALL
4131 CEFBS_HasV9, // TLS_LDXrr
4132 CEFBS_None, // TLS_LDrr
4133 CEFBS_None, // TRAPri
4134 CEFBS_None, // TRAPrr
4135 CEFBS_None, // TSUBCCTVri
4136 CEFBS_None, // TSUBCCTVrr
4137 CEFBS_None, // TSUBCCri
4138 CEFBS_None, // TSUBCCrr
4139 CEFBS_Is64Bit, // TXCCri
4140 CEFBS_Is64Bit, // TXCCrr
4141 CEFBS_None, // UDIVCCri
4142 CEFBS_None, // UDIVCCrr
4143 CEFBS_HasV9, // UDIVXri
4144 CEFBS_HasV9, // UDIVXrr
4145 CEFBS_None, // UDIVri
4146 CEFBS_None, // UDIVrr
4147 CEFBS_None, // UMACri
4148 CEFBS_None, // UMACrr
4149 CEFBS_None, // UMULCCri
4150 CEFBS_None, // UMULCCrr
4151 CEFBS_HasVIS3, // UMULXHI
4152 CEFBS_None, // UMULri
4153 CEFBS_None, // UMULrr
4154 CEFBS_None, // UNIMP
4155 CEFBS_None, // V9FCMPD
4156 CEFBS_None, // V9FCMPED
4157 CEFBS_None, // V9FCMPEQ
4158 CEFBS_None, // V9FCMPES
4159 CEFBS_None, // V9FCMPQ
4160 CEFBS_None, // V9FCMPS
4161 CEFBS_HasV9, // V9FMOVD_FCC
4162 CEFBS_HasV9, // V9FMOVQ_FCC
4163 CEFBS_HasV9, // V9FMOVS_FCC
4164 CEFBS_HasV9, // V9MOVFCCri
4165 CEFBS_HasV9, // V9MOVFCCrr
4166 CEFBS_None, // WRASRri
4167 CEFBS_None, // WRASRrr
4168 CEFBS_HasV9, // WRPRri
4169 CEFBS_HasV9, // WRPRrr
4170 CEFBS_None, // WRPSRri
4171 CEFBS_None, // WRPSRrr
4172 CEFBS_None, // WRTBRri
4173 CEFBS_None, // WRTBRrr
4174 CEFBS_None, // WRWIMri
4175 CEFBS_None, // WRWIMrr
4176 CEFBS_HasVIS3, // XMULX
4177 CEFBS_HasVIS3, // XMULXHI
4178 CEFBS_None, // XNORCCri
4179 CEFBS_None, // XNORCCrr
4180 CEFBS_None, // XNORri
4181 CEFBS_None, // XNORrr
4182 CEFBS_None, // XORCCri
4183 CEFBS_None, // XORCCrr
4184 CEFBS_None, // XORri
4185 CEFBS_None, // XORrr
4186 };
4187
4188 assert(Opcode < 898);
4189 return FeatureBitsets[RequiredFeaturesRefs[Opcode]];
4190}
4191
4192
4193} // namespace llvm::Sparc_MC
4194
4195#endif // GET_COMPUTE_FEATURES
4196
4197#ifdef GET_AVAILABLE_OPCODE_CHECKER
4198#undef GET_AVAILABLE_OPCODE_CHECKER
4199
4200namespace llvm::Sparc_MC {
4201
4202bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) {
4203 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
4204 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
4205 FeatureBitset MissingFeatures =
4206 (AvailableFeatures & RequiredFeatures) ^
4207 RequiredFeatures;
4208 return !MissingFeatures.any();
4209}
4210
4211} // namespace llvm::Sparc_MC
4212
4213#endif // GET_AVAILABLE_OPCODE_CHECKER
4214
4215#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
4216#undef ENABLE_INSTR_PREDICATE_VERIFIER
4217
4218#include <sstream>
4219
4220namespace llvm::Sparc_MC {
4221
4222#ifndef NDEBUG
4223static const char *SubtargetFeatureNames[] = {
4224 "Feature_HasCASA",
4225 "Feature_HasCrypto",
4226 "Feature_HasOSA2011",
4227 "Feature_HasPWRPSR",
4228 "Feature_HasUA2005",
4229 "Feature_HasUA2007",
4230 "Feature_HasV9",
4231 "Feature_HasVIS",
4232 "Feature_HasVIS2",
4233 "Feature_HasVIS3",
4234 "Feature_Is32Bit",
4235 "Feature_Is64Bit",
4236 "Feature_UseSoftMulDiv",
4237 nullptr
4238};
4239
4240#endif // NDEBUG
4241
4242void verifyInstructionPredicates(
4243 unsigned Opcode, const FeatureBitset &Features) {
4244#ifndef NDEBUG
4245 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
4246 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
4247 FeatureBitset MissingFeatures =
4248 (AvailableFeatures & RequiredFeatures) ^
4249 RequiredFeatures;
4250 if (MissingFeatures.any()) {
4251 std::ostringstream Msg;
4252 Msg << "Attempting to emit " << &SparcInstrNameData[SparcInstrNameIndices[Opcode]]
4253 << " instruction but the ";
4254 for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
4255 if (MissingFeatures.test(i))
4256 Msg << SubtargetFeatureNames[i] << " ";
4257 Msg << "predicate(s) are not met";
4258 report_fatal_error(Msg.str().c_str());
4259 }
4260#endif // NDEBUG
4261}
4262
4263} // namespace llvm::Sparc_MC
4264
4265#endif // ENABLE_INSTR_PREDICATE_VERIFIER
4266
4267