1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Instruction Enum Values and Descriptors *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_INSTRINFO_ENUM
10#undef GET_INSTRINFO_ENUM
11
12namespace llvm::SP {
13
14 enum {
15 PHI = 0, // Target.td:1329
16 INLINEASM = 1, // Target.td:1335
17 INLINEASM_BR = 2, // Target.td:1341
18 CFI_INSTRUCTION = 3, // Target.td:1350
19 EH_LABEL = 4, // Target.td:1359
20 GC_LABEL = 5, // Target.td:1368
21 ANNOTATION_LABEL = 6, // Target.td:1377
22 KILL = 7, // Target.td:1385
23 EXTRACT_SUBREG = 8, // Target.td:1392
24 INSERT_SUBREG = 9, // Target.td:1398
25 IMPLICIT_DEF = 10, // Target.td:1405
26 INIT_UNDEF = 11, // Target.td:1414
27 SUBREG_TO_REG = 12, // Target.td:1421
28 COPY_TO_REGCLASS = 13, // Target.td:1427
29 DBG_VALUE = 14, // Target.td:1434
30 DBG_VALUE_LIST = 15, // Target.td:1441
31 DBG_INSTR_REF = 16, // Target.td:1448
32 DBG_PHI = 17, // Target.td:1455
33 DBG_LABEL = 18, // Target.td:1462
34 REG_SEQUENCE = 19, // Target.td:1469
35 COPY = 20, // Target.td:1476
36 COPY_LANEMASK = 21, // Target.td:1484
37 BUNDLE = 22, // Target.td:1491
38 LIFETIME_START = 23, // Target.td:1497
39 LIFETIME_END = 24, // Target.td:1504
40 PSEUDO_PROBE = 25, // Target.td:1511
41 ARITH_FENCE = 26, // Target.td:1518
42 STACKMAP = 27, // Target.td:1527
43 FENTRY_CALL = 28, // Target.td:1662
44 PATCHPOINT = 29, // Target.td:1535
45 LOAD_STACK_GUARD = 30, // Target.td:1553
46 PREALLOCATED_SETUP = 31, // Target.td:1561
47 PREALLOCATED_ARG = 32, // Target.td:1567
48 STATEPOINT = 33, // Target.td:1544
49 LOCAL_ESCAPE = 34, // Target.td:1573
50 FAULTING_OP = 35, // Target.td:1582
51 PATCHABLE_OP = 36, // Target.td:1602
52 PATCHABLE_FUNCTION_ENTER = 37, // Target.td:1610
53 PATCHABLE_RET = 38, // Target.td:1617
54 PATCHABLE_FUNCTION_EXIT = 39, // Target.td:1626
55 PATCHABLE_TAIL_CALL = 40, // Target.td:1634
56 PATCHABLE_EVENT_CALL = 41, // Target.td:1642
57 PATCHABLE_TYPED_EVENT_CALL = 42, // Target.td:1652
58 ICALL_BRANCH_FUNNEL = 43, // Target.td:1672
59 FAKE_USE = 44, // Target.td:1592
60 MEMBARRIER = 45, // Target.td:1678
61 JUMP_TABLE_DEBUG_INFO = 46, // Target.td:1686
62 RELOC_NONE = 47, // Target.td:1694
63 CONVERGENCECTRL_ENTRY = 48, // Target.td:1706
64 CONVERGENCECTRL_ANCHOR = 49, // Target.td:1702
65 CONVERGENCECTRL_LOOP = 50, // Target.td:1710
66 CONVERGENCECTRL_GLUE = 51, // Target.td:1714
67 G_ASSERT_SEXT = 52, // GenericOpcodes.td:1937
68 G_ASSERT_ZEXT = 53, // GenericOpcodes.td:1929
69 G_ASSERT_ALIGN = 54, // GenericOpcodes.td:1944
70 G_ADD = 55, // GenericOpcodes.td:308
71 G_SUB = 56, // GenericOpcodes.td:316
72 G_MUL = 57, // GenericOpcodes.td:324
73 G_SDIV = 58, // GenericOpcodes.td:332
74 G_UDIV = 59, // GenericOpcodes.td:340
75 G_SREM = 60, // GenericOpcodes.td:348
76 G_UREM = 61, // GenericOpcodes.td:356
77 G_SDIVREM = 62, // GenericOpcodes.td:364
78 G_UDIVREM = 63, // GenericOpcodes.td:372
79 G_AND = 64, // GenericOpcodes.td:380
80 G_OR = 65, // GenericOpcodes.td:388
81 G_XOR = 66, // GenericOpcodes.td:396
82 G_ABDS = 67, // GenericOpcodes.td:425
83 G_ABDU = 68, // GenericOpcodes.td:433
84 G_UAVGFLOOR = 69, // GenericOpcodes.td:441
85 G_UAVGCEIL = 70, // GenericOpcodes.td:448
86 G_SAVGFLOOR = 71, // GenericOpcodes.td:455
87 G_SAVGCEIL = 72, // GenericOpcodes.td:462
88 G_IMPLICIT_DEF = 73, // GenericOpcodes.td:111
89 G_PHI = 74, // GenericOpcodes.td:118
90 G_FRAME_INDEX = 75, // GenericOpcodes.td:125
91 G_GLOBAL_VALUE = 76, // GenericOpcodes.td:131
92 G_PTRAUTH_GLOBAL_VALUE = 77, // GenericOpcodes.td:137
93 G_CONSTANT_POOL = 78, // GenericOpcodes.td:143
94 G_EXTRACT = 79, // GenericOpcodes.td:1522
95 G_UNMERGE_VALUES = 80, // GenericOpcodes.td:1535
96 G_INSERT = 81, // GenericOpcodes.td:1544
97 G_MERGE_VALUES = 82, // GenericOpcodes.td:1554
98 G_BUILD_VECTOR = 83, // GenericOpcodes.td:1574
99 G_BUILD_VECTOR_TRUNC = 84, // GenericOpcodes.td:1584
100 G_CONCAT_VECTORS = 85, // GenericOpcodes.td:1591
101 G_PTRTOINT = 86, // GenericOpcodes.td:155
102 G_INTTOPTR = 87, // GenericOpcodes.td:149
103 G_BITCAST = 88, // GenericOpcodes.td:161
104 G_FREEZE = 89, // GenericOpcodes.td:284
105 G_CONSTANT_FOLD_BARRIER = 90, // GenericOpcodes.td:1951
106 G_INTRINSIC_FPTRUNC_ROUND = 91, // GenericOpcodes.td:1280
107 G_INTRINSIC_TRUNC = 92, // GenericOpcodes.td:1286
108 G_INTRINSIC_ROUND = 93, // GenericOpcodes.td:1292
109 G_INTRINSIC_LRINT = 94, // GenericOpcodes.td:1298
110 G_INTRINSIC_LLRINT = 95, // GenericOpcodes.td:1304
111 G_INTRINSIC_ROUNDEVEN = 96, // GenericOpcodes.td:1310
112 G_READCYCLECOUNTER = 97, // GenericOpcodes.td:1316
113 G_READSTEADYCOUNTER = 98, // GenericOpcodes.td:1322
114 G_LOAD = 99, // GenericOpcodes.td:1349
115 G_SEXTLOAD = 100, // GenericOpcodes.td:1358
116 G_ZEXTLOAD = 101, // GenericOpcodes.td:1366
117 G_FPEXTLOAD = 102, // GenericOpcodes.td:1375
118 G_INDEXED_LOAD = 103, // GenericOpcodes.td:1385
119 G_INDEXED_SEXTLOAD = 104, // GenericOpcodes.td:1394
120 G_INDEXED_ZEXTLOAD = 105, // GenericOpcodes.td:1402
121 G_STORE = 106, // GenericOpcodes.td:1410
122 G_FPTRUNCSTORE = 107, // GenericOpcodes.td:1420
123 G_INDEXED_STORE = 108, // GenericOpcodes.td:1428
124 G_ATOMIC_CMPXCHG_WITH_SUCCESS = 109, // GenericOpcodes.td:1439
125 G_ATOMIC_CMPXCHG = 110, // GenericOpcodes.td:1450
126 G_ATOMICRMW_XCHG = 111, // GenericOpcodes.td:1470
127 G_ATOMICRMW_ADD = 112, // GenericOpcodes.td:1471
128 G_ATOMICRMW_SUB = 113, // GenericOpcodes.td:1472
129 G_ATOMICRMW_AND = 114, // GenericOpcodes.td:1473
130 G_ATOMICRMW_NAND = 115, // GenericOpcodes.td:1474
131 G_ATOMICRMW_OR = 116, // GenericOpcodes.td:1475
132 G_ATOMICRMW_XOR = 117, // GenericOpcodes.td:1476
133 G_ATOMICRMW_MAX = 118, // GenericOpcodes.td:1477
134 G_ATOMICRMW_MIN = 119, // GenericOpcodes.td:1478
135 G_ATOMICRMW_UMAX = 120, // GenericOpcodes.td:1479
136 G_ATOMICRMW_UMIN = 121, // GenericOpcodes.td:1480
137 G_ATOMICRMW_FADD = 122, // GenericOpcodes.td:1491
138 G_ATOMICRMW_FSUB = 123, // GenericOpcodes.td:1492
139 G_ATOMICRMW_FMAX = 124, // GenericOpcodes.td:1493
140 G_ATOMICRMW_FMIN = 125, // GenericOpcodes.td:1494
141 G_ATOMICRMW_FMAXIMUM = 126, // GenericOpcodes.td:1495
142 G_ATOMICRMW_FMINIMUM = 127, // GenericOpcodes.td:1496
143 G_ATOMICRMW_FMAXIMUMNUM = 128, // GenericOpcodes.td:1497
144 G_ATOMICRMW_FMINIMUMNUM = 129, // GenericOpcodes.td:1498
145 G_ATOMICRMW_UINC_WRAP = 130, // GenericOpcodes.td:1481
146 G_ATOMICRMW_UDEC_WRAP = 131, // GenericOpcodes.td:1482
147 G_ATOMICRMW_USUB_COND = 132, // GenericOpcodes.td:1483
148 G_ATOMICRMW_USUB_SAT = 133, // GenericOpcodes.td:1484
149 G_FENCE = 134, // GenericOpcodes.td:1500
150 G_PREFETCH = 135, // GenericOpcodes.td:1507
151 G_BRCOND = 136, // GenericOpcodes.td:1647
152 G_BRINDIRECT = 137, // GenericOpcodes.td:1656
153 G_INVOKE_REGION_START = 138, // GenericOpcodes.td:1679
154 G_INTRINSIC = 139, // GenericOpcodes.td:1599
155 G_INTRINSIC_W_SIDE_EFFECTS = 140, // GenericOpcodes.td:1606
156 G_INTRINSIC_CONVERGENT = 141, // GenericOpcodes.td:1615
157 G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 142, // GenericOpcodes.td:1623
158 G_ANYEXT = 143, // GenericOpcodes.td:44
159 G_TRUNC = 144, // GenericOpcodes.td:83
160 G_TRUNC_SSAT_S = 145, // GenericOpcodes.td:91
161 G_TRUNC_SSAT_U = 146, // GenericOpcodes.td:98
162 G_TRUNC_USAT_U = 147, // GenericOpcodes.td:105
163 G_CONSTANT = 148, // GenericOpcodes.td:169
164 G_FCONSTANT = 149, // GenericOpcodes.td:177
165 G_VASTART = 150, // GenericOpcodes.td:184
166 G_VAARG = 151, // GenericOpcodes.td:191
167 G_SEXT = 152, // GenericOpcodes.td:52
168 G_SEXT_INREG = 153, // GenericOpcodes.td:66
169 G_ZEXT = 154, // GenericOpcodes.td:74
170 G_SHL = 155, // GenericOpcodes.td:404
171 G_LSHR = 156, // GenericOpcodes.td:411
172 G_ASHR = 157, // GenericOpcodes.td:418
173 G_FSHL = 158, // GenericOpcodes.td:470
174 G_FSHR = 159, // GenericOpcodes.td:478
175 G_ROTR = 160, // GenericOpcodes.td:485
176 G_ROTL = 161, // GenericOpcodes.td:492
177 G_ICMP = 162, // GenericOpcodes.td:499
178 G_FCMP = 163, // GenericOpcodes.td:506
179 G_SCMP = 164, // GenericOpcodes.td:513
180 G_UCMP = 165, // GenericOpcodes.td:520
181 G_SELECT = 166, // GenericOpcodes.td:527
182 G_UADDO = 167, // GenericOpcodes.td:601
183 G_UADDE = 168, // GenericOpcodes.td:609
184 G_USUBO = 169, // GenericOpcodes.td:631
185 G_USUBE = 170, // GenericOpcodes.td:637
186 G_SADDO = 171, // GenericOpcodes.td:616
187 G_SADDE = 172, // GenericOpcodes.td:624
188 G_SSUBO = 173, // GenericOpcodes.td:644
189 G_SSUBE = 174, // GenericOpcodes.td:651
190 G_UMULO = 175, // GenericOpcodes.td:658
191 G_SMULO = 176, // GenericOpcodes.td:666
192 G_UMULH = 177, // GenericOpcodes.td:675
193 G_SMULH = 178, // GenericOpcodes.td:684
194 G_UADDSAT = 179, // GenericOpcodes.td:696
195 G_SADDSAT = 180, // GenericOpcodes.td:704
196 G_USUBSAT = 181, // GenericOpcodes.td:712
197 G_SSUBSAT = 182, // GenericOpcodes.td:720
198 G_USHLSAT = 183, // GenericOpcodes.td:728
199 G_SSHLSAT = 184, // GenericOpcodes.td:736
200 G_SMULFIX = 185, // GenericOpcodes.td:748
201 G_UMULFIX = 186, // GenericOpcodes.td:755
202 G_SMULFIXSAT = 187, // GenericOpcodes.td:765
203 G_UMULFIXSAT = 188, // GenericOpcodes.td:772
204 G_SDIVFIX = 189, // GenericOpcodes.td:783
205 G_UDIVFIX = 190, // GenericOpcodes.td:790
206 G_SDIVFIXSAT = 191, // GenericOpcodes.td:800
207 G_UDIVFIXSAT = 192, // GenericOpcodes.td:807
208 G_FADD = 193, // GenericOpcodes.td:980
209 G_FSUB = 194, // GenericOpcodes.td:988
210 G_FMUL = 195, // GenericOpcodes.td:996
211 G_FMA = 196, // GenericOpcodes.td:1005
212 G_FMAD = 197, // GenericOpcodes.td:1014
213 G_FDIV = 198, // GenericOpcodes.td:1022
214 G_FREM = 199, // GenericOpcodes.td:1029
215 G_FMODF = 200, // GenericOpcodes.td:1036
216 G_FPOW = 201, // GenericOpcodes.td:1043
217 G_FPOWI = 202, // GenericOpcodes.td:1050
218 G_FEXP = 203, // GenericOpcodes.td:1057
219 G_FEXP2 = 204, // GenericOpcodes.td:1064
220 G_FEXP10 = 205, // GenericOpcodes.td:1071
221 G_FLOG = 206, // GenericOpcodes.td:1078
222 G_FLOG2 = 207, // GenericOpcodes.td:1085
223 G_FLOG10 = 208, // GenericOpcodes.td:1092
224 G_FLDEXP = 209, // GenericOpcodes.td:1099
225 G_FFREXP = 210, // GenericOpcodes.td:1106
226 G_FNEG = 211, // GenericOpcodes.td:818
227 G_FPEXT = 212, // GenericOpcodes.td:824
228 G_FPTRUNC = 213, // GenericOpcodes.td:830
229 G_FPTOSI = 214, // GenericOpcodes.td:836
230 G_FPTOUI = 215, // GenericOpcodes.td:842
231 G_SITOFP = 216, // GenericOpcodes.td:848
232 G_UITOFP = 217, // GenericOpcodes.td:854
233 G_FPTOSI_SAT = 218, // GenericOpcodes.td:860
234 G_FPTOUI_SAT = 219, // GenericOpcodes.td:866
235 G_FABS = 220, // GenericOpcodes.td:872
236 G_FCOPYSIGN = 221, // GenericOpcodes.td:878
237 G_IS_FPCLASS = 222, // GenericOpcodes.td:891
238 G_FCANONICALIZE = 223, // GenericOpcodes.td:884
239 G_FMINNUM = 224, // GenericOpcodes.td:904
240 G_FMAXNUM = 225, // GenericOpcodes.td:911
241 G_FMINNUM_IEEE = 226, // GenericOpcodes.td:929
242 G_FMAXNUM_IEEE = 227, // GenericOpcodes.td:936
243 G_FMINIMUM = 228, // GenericOpcodes.td:946
244 G_FMAXIMUM = 229, // GenericOpcodes.td:953
245 G_FMINIMUMNUM = 230, // GenericOpcodes.td:961
246 G_FMAXIMUMNUM = 231, // GenericOpcodes.td:968
247 G_GET_FPENV = 232, // GenericOpcodes.td:1236
248 G_SET_FPENV = 233, // GenericOpcodes.td:1243
249 G_RESET_FPENV = 234, // GenericOpcodes.td:1250
250 G_GET_FPMODE = 235, // GenericOpcodes.td:1257
251 G_SET_FPMODE = 236, // GenericOpcodes.td:1264
252 G_RESET_FPMODE = 237, // GenericOpcodes.td:1271
253 G_GET_ROUNDING = 238, // GenericOpcodes.td:1328
254 G_SET_ROUNDING = 239, // GenericOpcodes.td:1334
255 G_PTR_ADD = 240, // GenericOpcodes.td:534
256 G_PTRMASK = 241, // GenericOpcodes.td:542
257 G_SMIN = 242, // GenericOpcodes.td:549
258 G_SMAX = 243, // GenericOpcodes.td:557
259 G_UMIN = 244, // GenericOpcodes.td:565
260 G_UMAX = 245, // GenericOpcodes.td:573
261 G_ABS = 246, // GenericOpcodes.td:581
262 G_LROUND = 247, // GenericOpcodes.td:291
263 G_LLROUND = 248, // GenericOpcodes.td:297
264 G_BR = 249, // GenericOpcodes.td:1637
265 G_BRJT = 250, // GenericOpcodes.td:1667
266 G_VSCALE = 251, // GenericOpcodes.td:1565
267 G_INSERT_SUBVECTOR = 252, // GenericOpcodes.td:1711
268 G_EXTRACT_SUBVECTOR = 253, // GenericOpcodes.td:1719
269 G_INSERT_VECTOR_ELT = 254, // GenericOpcodes.td:1727
270 G_EXTRACT_VECTOR_ELT = 255, // GenericOpcodes.td:1735
271 G_SHUFFLE_VECTOR = 256, // GenericOpcodes.td:1746
272 G_SPLAT_VECTOR = 257, // GenericOpcodes.td:1754
273 G_STEP_VECTOR = 258, // GenericOpcodes.td:1762
274 G_VECTOR_COMPRESS = 259, // GenericOpcodes.td:1769
275 G_CTTZ = 260, // GenericOpcodes.td:211
276 G_CTTZ_ZERO_POISON = 261, // GenericOpcodes.td:217
277 G_CTLZ = 262, // GenericOpcodes.td:199
278 G_CTLZ_ZERO_POISON = 263, // GenericOpcodes.td:205
279 G_CTLS = 264, // GenericOpcodes.td:223
280 G_CTPOP = 265, // GenericOpcodes.td:229
281 G_BSWAP = 266, // GenericOpcodes.td:235
282 G_BITREVERSE = 267, // GenericOpcodes.td:242
283 G_CLMUL = 268, // GenericOpcodes.td:588
284 G_FCEIL = 269, // GenericOpcodes.td:1113
285 G_FCOS = 270, // GenericOpcodes.td:1120
286 G_FSIN = 271, // GenericOpcodes.td:1127
287 G_FSINCOS = 272, // GenericOpcodes.td:1134
288 G_FTAN = 273, // GenericOpcodes.td:1141
289 G_FACOS = 274, // GenericOpcodes.td:1148
290 G_FASIN = 275, // GenericOpcodes.td:1155
291 G_FATAN = 276, // GenericOpcodes.td:1162
292 G_FATAN2 = 277, // GenericOpcodes.td:1169
293 G_FCOSH = 278, // GenericOpcodes.td:1176
294 G_FSINH = 279, // GenericOpcodes.td:1183
295 G_FTANH = 280, // GenericOpcodes.td:1190
296 G_FSQRT = 281, // GenericOpcodes.td:1200
297 G_FFLOOR = 282, // GenericOpcodes.td:1207
298 G_FRINT = 283, // GenericOpcodes.td:1214
299 G_FNEARBYINT = 284, // GenericOpcodes.td:1221
300 G_ADDRSPACE_CAST = 285, // GenericOpcodes.td:248
301 G_BLOCK_ADDR = 286, // GenericOpcodes.td:254
302 G_JUMP_TABLE = 287, // GenericOpcodes.td:260
303 G_DYN_STACKALLOC = 288, // GenericOpcodes.td:266
304 G_STACKSAVE = 289, // GenericOpcodes.td:272
305 G_STACKRESTORE = 290, // GenericOpcodes.td:278
306 G_STRICT_FADD = 291, // GenericOpcodes.td:1821
307 G_STRICT_FSUB = 292, // GenericOpcodes.td:1822
308 G_STRICT_FMUL = 293, // GenericOpcodes.td:1823
309 G_STRICT_FDIV = 294, // GenericOpcodes.td:1824
310 G_STRICT_FREM = 295, // GenericOpcodes.td:1825
311 G_STRICT_FMA = 296, // GenericOpcodes.td:1826
312 G_STRICT_FSQRT = 297, // GenericOpcodes.td:1827
313 G_STRICT_FLDEXP = 298, // GenericOpcodes.td:1828
314 G_STRICT_FCMP = 299, // GenericOpcodes.td:1829
315 G_STRICT_FCMPS = 300, // GenericOpcodes.td:1830
316 G_READ_REGISTER = 301, // GenericOpcodes.td:1686
317 G_WRITE_REGISTER = 302, // GenericOpcodes.td:1696
318 G_MEMCPY = 303, // GenericOpcodes.td:1836
319 G_MEMCPY_INLINE = 304, // GenericOpcodes.td:1844
320 G_MEMMOVE = 305, // GenericOpcodes.td:1852
321 G_MEMSET = 306, // GenericOpcodes.td:1860
322 G_BZERO = 307, // GenericOpcodes.td:1867
323 G_MEMSET_INLINE = 308, // GenericOpcodes.td:1874
324 G_TRAP = 309, // GenericOpcodes.td:1884
325 G_DEBUGTRAP = 310, // GenericOpcodes.td:1891
326 G_UBSANTRAP = 311, // GenericOpcodes.td:1897
327 G_VECREDUCE_SEQ_FADD = 312, // GenericOpcodes.td:1785
328 G_VECREDUCE_SEQ_FMUL = 313, // GenericOpcodes.td:1791
329 G_VECREDUCE_FADD = 314, // GenericOpcodes.td:1797
330 G_VECREDUCE_FMUL = 315, // GenericOpcodes.td:1798
331 G_VECREDUCE_FMAX = 316, // GenericOpcodes.td:1800
332 G_VECREDUCE_FMIN = 317, // GenericOpcodes.td:1801
333 G_VECREDUCE_FMAXIMUM = 318, // GenericOpcodes.td:1802
334 G_VECREDUCE_FMINIMUM = 319, // GenericOpcodes.td:1803
335 G_VECREDUCE_FMAXIMUMNUM = 320, // GenericOpcodes.td:1804
336 G_VECREDUCE_FMINIMUMNUM = 321, // GenericOpcodes.td:1805
337 G_VECREDUCE_ADD = 322, // GenericOpcodes.td:1807
338 G_VECREDUCE_MUL = 323, // GenericOpcodes.td:1808
339 G_VECREDUCE_AND = 324, // GenericOpcodes.td:1809
340 G_VECREDUCE_OR = 325, // GenericOpcodes.td:1810
341 G_VECREDUCE_XOR = 326, // GenericOpcodes.td:1811
342 G_VECREDUCE_SMAX = 327, // GenericOpcodes.td:1812
343 G_VECREDUCE_SMIN = 328, // GenericOpcodes.td:1813
344 G_VECREDUCE_UMAX = 329, // GenericOpcodes.td:1814
345 G_VECREDUCE_UMIN = 330, // GenericOpcodes.td:1815
346 G_SBFX = 331, // GenericOpcodes.td:1909
347 G_UBFX = 332, // GenericOpcodes.td:1917
348 ADJCALLSTACKDOWN = 333, // SparcInstrInfo.td:613
349 ADJCALLSTACKUP = 334, // SparcInstrInfo.td:616
350 GETPCX = 335, // SparcInstrInfo.td:609
351 SELECT_CC_DFP_FCC = 336, // SparcInstrInfo.td:689
352 SELECT_CC_DFP_ICC = 337, // SparcInstrInfo.td:646
353 SELECT_CC_DFP_XCC = 338, // SparcInstrInfo.td:667
354 SELECT_CC_FP_FCC = 339, // SparcInstrInfo.td:685
355 SELECT_CC_FP_ICC = 340, // SparcInstrInfo.td:641
356 SELECT_CC_FP_XCC = 341, // SparcInstrInfo.td:662
357 SELECT_CC_Int_FCC = 342, // SparcInstrInfo.td:680
358 SELECT_CC_Int_ICC = 343, // SparcInstrInfo.td:637
359 SELECT_CC_Int_XCC = 344, // SparcInstrInfo.td:658
360 SELECT_CC_QFP_FCC = 345, // SparcInstrInfo.td:693
361 SELECT_CC_QFP_ICC = 346, // SparcInstrInfo.td:651
362 SELECT_CC_QFP_XCC = 347, // SparcInstrInfo.td:672
363 SET = 348, // SparcInstrAliases.td:562
364 SETSW = 349, // SparcInstrAliases.td:566
365 SETX = 350, // SparcInstrAliases.td:570
366 V8BAR = 351, // SparcInstrInfo.td:605
367 ADDCCri = 352, // SparcInstrInfo.td:502
368 ADDCCrr = 353, // SparcInstrInfo.td:497
369 ADDCri = 354, // SparcInstrInfo.td:516
370 ADDCrr = 355, // SparcInstrInfo.td:512
371 ADDEri = 356, // SparcInstrInfo.td:502
372 ADDErr = 357, // SparcInstrInfo.td:497
373 ADDXC = 358, // SparcInstrVIS.td:185
374 ADDXCCC = 359, // SparcInstrVIS.td:188
375 ADDri = 360, // SparcInstrInfo.td:502
376 ADDrr = 361, // SparcInstrInfo.td:497
377 AES_DROUND01 = 362, // SparcInstrCrypto.td:23
378 AES_DROUND01_LAST = 363, // SparcInstrCrypto.td:27
379 AES_DROUND23 = 364, // SparcInstrCrypto.td:24
380 AES_DROUND23_LAST = 365, // SparcInstrCrypto.td:28
381 AES_EROUND01 = 366, // SparcInstrCrypto.td:21
382 AES_EROUND01_LAST = 367, // SparcInstrCrypto.td:25
383 AES_EROUND23 = 368, // SparcInstrCrypto.td:22
384 AES_EROUND23_LAST = 369, // SparcInstrCrypto.td:26
385 AES_KEXPAND0 = 370, // SparcInstrCrypto.td:29
386 AES_KEXPAND1 = 371, // SparcInstrCrypto.td:32
387 AES_KEXPAND2 = 372, // SparcInstrCrypto.td:33
388 ALIGNADDR = 373, // SparcInstrVIS.td:96
389 ALIGNADDRL = 374, // SparcInstrVIS.td:97
390 ALLCLEAN = 375, // SparcInstrUAOSA.td:39
391 ANDCCri = 376, // SparcInstrInfo.td:516
392 ANDCCrr = 377, // SparcInstrInfo.td:512
393 ANDNCCri = 378, // SparcInstrInfo.td:516
394 ANDNCCrr = 379, // SparcInstrInfo.td:512
395 ANDNri = 380, // SparcInstrInfo.td:874
396 ANDNrr = 381, // SparcInstrInfo.td:870
397 ANDri = 382, // SparcInstrInfo.td:502
398 ANDrr = 383, // SparcInstrInfo.td:497
399 ARRAY16 = 384, // SparcInstrVIS.td:154
400 ARRAY32 = 385, // SparcInstrVIS.td:155
401 ARRAY8 = 386, // SparcInstrVIS.td:153
402 BA = 387, // SparcInstrInfo.td:987
403 BCOND = 388, // SparcInstrInfo.td:1036
404 BCONDA = 389, // SparcInstrInfo.td:1039
405 BINDri = 390, // SparcInstrInfo.td:1029
406 BINDrr = 391, // SparcInstrInfo.td:1025
407 BMASK = 392, // SparcInstrVIS.td:165
408 BPFCC = 393, // SparcInstrInfo.td:1060
409 BPFCCA = 394, // SparcInstrInfo.td:1063
410 BPFCCANT = 395, // SparcInstrInfo.td:1069
411 BPFCCNT = 396, // SparcInstrInfo.td:1066
412 BPICC = 397, // SparcInstrInfo.td:1001
413 BPICCA = 398, // SparcInstrInfo.td:1005
414 BPICCANT = 399, // SparcInstrInfo.td:1013
415 BPICCNT = 400, // SparcInstrInfo.td:1009
416 BPR = 401, // SparcInstr64Bit.td:334
417 BPRA = 402, // SparcInstr64Bit.td:336
418 BPRANT = 403, // SparcInstr64Bit.td:340
419 BPRNT = 404, // SparcInstr64Bit.td:338
420 BPXCC = 405, // SparcInstrInfo.td:1001
421 BPXCCA = 406, // SparcInstrInfo.td:1005
422 BPXCCANT = 407, // SparcInstrInfo.td:1013
423 BPXCCNT = 408, // SparcInstrInfo.td:1009
424 BSHUFFLE = 409, // SparcInstrVIS.td:166
425 CALL = 410, // SparcInstrInfo.td:1122
426 CALLi = 411, // SparcInstrInfo.td:1134
427 CALLri = 412, // SparcInstrInfo.td:1149
428 CALLrii = 413, // SparcInstrInfo.td:1160
429 CALLrr = 414, // SparcInstrInfo.td:1144
430 CALLrri = 415, // SparcInstrInfo.td:1157
431 CAMELLIA_F = 416, // SparcInstrCrypto.td:37
432 CAMELLIA_FL = 417, // SparcInstrCrypto.td:38
433 CAMELLIA_FLI = 418, // SparcInstrCrypto.td:41
434 CASAri = 419, // SparcInstrInfo.td:1822
435 CASArr = 420, // SparcInstrInfo.td:1814
436 CASXAri = 421, // SparcInstr64Bit.td:452
437 CASXArr = 422, // SparcInstr64Bit.td:445
438 CMASK16 = 423, // SparcInstrVIS.td:193
439 CMASK32 = 424, // SparcInstrVIS.td:195
440 CMASK8 = 425, // SparcInstrVIS.td:191
441 CPBCOND = 426, // SparcInstrInfo.td:1112
442 CPBCONDA = 427, // SparcInstrInfo.td:1115
443 CRC32C = 428, // SparcInstrCrypto.td:45
444 CWBCONDri = 429, // SparcInstrUAOSA.td:31
445 CWBCONDrr = 430, // SparcInstrUAOSA.td:28
446 CXBCONDri = 431, // SparcInstrUAOSA.td:31
447 CXBCONDrr = 432, // SparcInstrUAOSA.td:28
448 DES_IIP = 433, // SparcInstrCrypto.td:54
449 DES_IP = 434, // SparcInstrCrypto.td:51
450 DES_KEXPAND = 435, // SparcInstrCrypto.td:58
451 DES_ROUND = 436, // SparcInstrCrypto.td:49
452 DONE = 437, // SparcInstrInfo.td:1876
453 EDGE16 = 438, // SparcInstrVIS.td:146
454 EDGE16L = 439, // SparcInstrVIS.td:147
455 EDGE16LN = 440, // SparcInstrVIS.td:175
456 EDGE16N = 441, // SparcInstrVIS.td:174
457 EDGE32 = 442, // SparcInstrVIS.td:148
458 EDGE32L = 443, // SparcInstrVIS.td:149
459 EDGE32LN = 444, // SparcInstrVIS.td:177
460 EDGE32N = 445, // SparcInstrVIS.td:176
461 EDGE8 = 446, // SparcInstrVIS.td:144
462 EDGE8L = 447, // SparcInstrVIS.td:145
463 EDGE8LN = 448, // SparcInstrVIS.td:173
464 EDGE8N = 449, // SparcInstrVIS.td:172
465 FABSD = 450, // SparcInstrInfo.td:1730
466 FABSQ = 451, // SparcInstrInfo.td:1735
467 FABSS = 452, // SparcInstrInfo.td:1415
468 FADDD = 453, // SparcInstrInfo.td:1450
469 FADDQ = 454, // SparcInstrInfo.td:1455
470 FADDS = 455, // SparcInstrInfo.td:1445
471 FALIGNADATA = 456, // SparcInstrVIS.td:98
472 FAND = 457, // SparcInstrVIS.td:116
473 FANDNOT1 = 458, // SparcInstrVIS.td:129
474 FANDNOT1S = 459, // SparcInstrVIS.td:130
475 FANDNOT2 = 460, // SparcInstrVIS.td:131
476 FANDNOT2S = 461, // SparcInstrVIS.td:132
477 FANDS = 462, // SparcInstrVIS.td:117
478 FBCOND = 463, // SparcInstrInfo.td:1076
479 FBCONDA = 464, // SparcInstrInfo.td:1079
480 FBCONDA_V9 = 465, // SparcInstrInfo.td:1090
481 FBCOND_V9 = 466, // SparcInstrInfo.td:1086
482 FCHKSM16 = 467, // SparcInstrVIS.td:200
483 FCMPD = 468, // SparcInstrInfo.td:1541
484 FCMPD_V9 = 469, // SparcInstrInfo.td:1566
485 FCMPEQ16 = 470, // SparcInstrVIS.td:140
486 FCMPEQ32 = 471, // SparcInstrVIS.td:141
487 FCMPGT16 = 472, // SparcInstrVIS.td:134
488 FCMPGT32 = 473, // SparcInstrVIS.td:135
489 FCMPLE16 = 474, // SparcInstrVIS.td:136
490 FCMPLE32 = 475, // SparcInstrVIS.td:137
491 FCMPNE16 = 476, // SparcInstrVIS.td:138
492 FCMPNE32 = 477, // SparcInstrVIS.td:139
493 FCMPQ = 478, // SparcInstrInfo.td:1546
494 FCMPQ_V9 = 479, // SparcInstrInfo.td:1571
495 FCMPS = 480, // SparcInstrInfo.td:1536
496 FCMPS_V9 = 481, // SparcInstrInfo.td:1561
497 FDIVD = 482, // SparcInstrInfo.td:1517
498 FDIVQ = 483, // SparcInstrInfo.td:1522
499 FDIVS = 484, // SparcInstrInfo.td:1512
500 FDMULQ = 485, // SparcInstrInfo.td:1503
501 FDTOI = 486, // SparcInstrInfo.td:1363
502 FDTOQ = 487, // SparcInstrInfo.td:1390
503 FDTOS = 488, // SparcInstrInfo.td:1385
504 FDTOX = 489, // SparcInstr64Bit.td:408
505 FEXPAND = 490, // SparcInstrVIS.td:72
506 FHADDD = 491, // SparcInstrVIS.td:205
507 FHADDS = 492, // SparcInstrVIS.td:202
508 FHSUBD = 493, // SparcInstrVIS.td:211
509 FHSUBS = 494, // SparcInstrVIS.td:208
510 FITOD = 495, // SparcInstrInfo.td:1346
511 FITOQ = 496, // SparcInstrInfo.td:1351
512 FITOS = 497, // SparcInstrInfo.td:1341
513 FLCMPD = 498, // SparcInstrVIS.td:217
514 FLCMPS = 499, // SparcInstrVIS.td:214
515 FLUSH = 500, // SparcInstrInfo.td:1335
516 FLUSHW = 501, // SparcInstrInfo.td:623
517 FLUSHri = 502, // SparcInstrInfo.td:1328
518 FLUSHrr = 503, // SparcInstrInfo.td:1326
519 FMADDD = 504, // SparcInstrUAOSA.td:49
520 FMADDS = 505, // SparcInstrUAOSA.td:48
521 FMEAN16 = 506, // SparcInstrVIS.td:221
522 FMOVD = 507, // SparcInstrInfo.td:1714
523 FMOVD_FCC = 508, // SparcInstrInfo.td:1697
524 FMOVD_ICC = 509, // SparcInstrInfo.td:1678
525 FMOVD_XCC = 510, // SparcInstr64Bit.td:315
526 FMOVQ = 511, // SparcInstrInfo.td:1718
527 FMOVQ_FCC = 512, // SparcInstrInfo.td:1703
528 FMOVQ_ICC = 513, // SparcInstrInfo.td:1684
529 FMOVQ_XCC = 514, // SparcInstr64Bit.td:321
530 FMOVRD = 515, // SparcInstr64Bit.td:373
531 FMOVRQ = 516, // SparcInstr64Bit.td:378
532 FMOVRS = 517, // SparcInstr64Bit.td:369
533 FMOVS = 518, // SparcInstrInfo.td:1407
534 FMOVS_FCC = 519, // SparcInstrInfo.td:1692
535 FMOVS_ICC = 520, // SparcInstrInfo.td:1673
536 FMOVS_XCC = 521, // SparcInstr64Bit.td:310
537 FMSUBD = 522, // SparcInstrUAOSA.td:51
538 FMSUBS = 523, // SparcInstrUAOSA.td:50
539 FMUL8SUX16 = 524, // SparcInstrVIS.td:87
540 FMUL8ULX16 = 525, // SparcInstrVIS.td:88
541 FMUL8X16 = 526, // SparcInstrVIS.td:78
542 FMUL8X16AL = 527, // SparcInstrVIS.td:84
543 FMUL8X16AU = 528, // SparcInstrVIS.td:81
544 FMULD = 529, // SparcInstrInfo.td:1485
545 FMULD8SUX16 = 530, // SparcInstrVIS.td:89
546 FMULD8ULX16 = 531, // SparcInstrVIS.td:92
547 FMULQ = 532, // SparcInstrInfo.td:1490
548 FMULS = 533, // SparcInstrInfo.td:1479
549 FNADDD = 534, // SparcInstrVIS.td:226
550 FNADDS = 535, // SparcInstrVIS.td:223
551 FNAND = 536, // SparcInstrVIS.td:118
552 FNANDS = 537, // SparcInstrVIS.td:119
553 FNEGD = 538, // SparcInstrInfo.td:1721
554 FNEGQ = 539, // SparcInstrInfo.td:1726
555 FNEGS = 540, // SparcInstrInfo.td:1410
556 FNHADDD = 541, // SparcInstrVIS.td:232
557 FNHADDS = 542, // SparcInstrVIS.td:229
558 FNMADDD = 543, // SparcInstrUAOSA.td:54
559 FNMADDS = 544, // SparcInstrUAOSA.td:53
560 FNMSUBD = 545, // SparcInstrUAOSA.td:56
561 FNMSUBS = 546, // SparcInstrUAOSA.td:55
562 FNMULD = 547, // SparcInstrVIS.td:239
563 FNMULS = 548, // SparcInstrVIS.td:236
564 FNOR = 549, // SparcInstrVIS.td:114
565 FNORS = 550, // SparcInstrVIS.td:115
566 FNOT1 = 551, // SparcInstrVIS.td:108
567 FNOT1S = 552, // SparcInstrVIS.td:109
568 FNOT2 = 553, // SparcInstrVIS.td:110
569 FNOT2S = 554, // SparcInstrVIS.td:111
570 FNSMULD = 555, // SparcInstrVIS.td:242
571 FONE = 556, // SparcInstrVIS.td:102
572 FONES = 557, // SparcInstrVIS.td:103
573 FOR = 558, // SparcInstrVIS.td:112
574 FORNOT1 = 559, // SparcInstrVIS.td:125
575 FORNOT1S = 560, // SparcInstrVIS.td:126
576 FORNOT2 = 561, // SparcInstrVIS.td:127
577 FORNOT2S = 562, // SparcInstrVIS.td:128
578 FORS = 563, // SparcInstrVIS.td:113
579 FPACK16 = 564, // SparcInstrVIS.td:66
580 FPACK32 = 565, // SparcInstrVIS.td:67
581 FPACKFIX = 566, // SparcInstrVIS.td:69
582 FPADD16 = 567, // SparcInstrVIS.td:57
583 FPADD16S = 568, // SparcInstrVIS.td:58
584 FPADD32 = 569, // SparcInstrVIS.td:59
585 FPADD32S = 570, // SparcInstrVIS.td:60
586 FPADD64 = 571, // SparcInstrVIS.td:246
587 FPMADDX = 572, // SparcInstrUAOSA.td:66
588 FPMADDXHI = 573, // SparcInstrUAOSA.td:67
589 FPMERGE = 574, // SparcInstrVIS.td:74
590 FPSUB16 = 575, // SparcInstrVIS.td:61
591 FPSUB16S = 576, // SparcInstrVIS.td:62
592 FPSUB32 = 577, // SparcInstrVIS.td:63
593 FPSUB32S = 578, // SparcInstrVIS.td:64
594 FQTOD = 579, // SparcInstrInfo.td:1400
595 FQTOI = 580, // SparcInstrInfo.td:1368
596 FQTOS = 581, // SparcInstrInfo.td:1395
597 FQTOX = 582, // SparcInstr64Bit.td:413
598 FSLAS16 = 583, // SparcInstrVIS.td:252
599 FSLAS32 = 584, // SparcInstrVIS.td:254
600 FSLL16 = 585, // SparcInstrVIS.td:248
601 FSLL32 = 586, // SparcInstrVIS.td:250
602 FSMULD = 587, // SparcInstrInfo.td:1496
603 FSQRTD = 588, // SparcInstrInfo.td:1431
604 FSQRTQ = 589, // SparcInstrInfo.td:1436
605 FSQRTS = 590, // SparcInstrInfo.td:1426
606 FSRA16 = 591, // SparcInstrVIS.td:253
607 FSRA32 = 592, // SparcInstrVIS.td:255
608 FSRC1 = 593, // SparcInstrVIS.td:104
609 FSRC1S = 594, // SparcInstrVIS.td:105
610 FSRC2 = 595, // SparcInstrVIS.td:106
611 FSRC2S = 596, // SparcInstrVIS.td:107
612 FSRL16 = 597, // SparcInstrVIS.td:249
613 FSRL32 = 598, // SparcInstrVIS.td:251
614 FSTOD = 599, // SparcInstrInfo.td:1375
615 FSTOI = 600, // SparcInstrInfo.td:1358
616 FSTOQ = 601, // SparcInstrInfo.td:1380
617 FSTOX = 602, // SparcInstr64Bit.td:404
618 FSUBD = 603, // SparcInstrInfo.td:1466
619 FSUBQ = 604, // SparcInstrInfo.td:1471
620 FSUBS = 605, // SparcInstrInfo.td:1461
621 FXNOR = 606, // SparcInstrVIS.td:122
622 FXNORS = 607, // SparcInstrVIS.td:123
623 FXOR = 608, // SparcInstrVIS.td:120
624 FXORS = 609, // SparcInstrVIS.td:121
625 FXTOD = 610, // SparcInstr64Bit.td:394
626 FXTOQ = 611, // SparcInstr64Bit.td:399
627 FXTOS = 612, // SparcInstr64Bit.td:390
628 FZERO = 613, // SparcInstrVIS.td:100
629 FZEROS = 614, // SparcInstrVIS.td:101
630 GDOP_LDXrr = 615, // SparcInstr64Bit.td:219
631 GDOP_LDrr = 616, // SparcInstrInfo.td:749
632 INVALW = 617, // SparcInstrUAOSA.td:40
633 JMPLri = 618, // SparcInstrInfo.td:1175
634 JMPLrr = 619, // SparcInstrInfo.td:1170
635 LDAri = 620, // SparcInstrInfo.td:545
636 LDArr = 621, // SparcInstrInfo.td:540
637 LDCSRri = 622, // SparcInstrInfo.td:728
638 LDCSRrr = 623, // SparcInstrInfo.td:726
639 LDCri = 624, // SparcInstrInfo.td:530
640 LDCrr = 625, // SparcInstrInfo.td:525
641 LDDAri = 626, // SparcInstrInfo.td:545
642 LDDArr = 627, // SparcInstrInfo.td:540
643 LDDCri = 628, // SparcInstrInfo.td:530
644 LDDCrr = 629, // SparcInstrInfo.td:525
645 LDDFAri = 630, // SparcInstrInfo.td:545
646 LDDFArr = 631, // SparcInstrInfo.td:540
647 LDDFri = 632, // SparcInstrInfo.td:530
648 LDDFrr = 633, // SparcInstrInfo.td:525
649 LDDri = 634, // SparcInstrInfo.td:530
650 LDDrr = 635, // SparcInstrInfo.td:525
651 LDFAri = 636, // SparcInstrInfo.td:545
652 LDFArr = 637, // SparcInstrInfo.td:540
653 LDFSRri = 638, // SparcInstrInfo.td:737
654 LDFSRrr = 639, // SparcInstrInfo.td:735
655 LDFri = 640, // SparcInstrInfo.td:530
656 LDFrr = 641, // SparcInstrInfo.td:525
657 LDQFAri = 642, // SparcInstrInfo.td:545
658 LDQFArr = 643, // SparcInstrInfo.td:540
659 LDQFri = 644, // SparcInstrInfo.td:530
660 LDQFrr = 645, // SparcInstrInfo.td:525
661 LDSBAri = 646, // SparcInstrInfo.td:545
662 LDSBArr = 647, // SparcInstrInfo.td:540
663 LDSBri = 648, // SparcInstrInfo.td:530
664 LDSBrr = 649, // SparcInstrInfo.td:525
665 LDSHAri = 650, // SparcInstrInfo.td:545
666 LDSHArr = 651, // SparcInstrInfo.td:540
667 LDSHri = 652, // SparcInstrInfo.td:530
668 LDSHrr = 653, // SparcInstrInfo.td:525
669 LDSTUBAri = 654, // SparcInstrInfo.td:828
670 LDSTUBArr = 655, // SparcInstrInfo.td:824
671 LDSTUBri = 656, // SparcInstrInfo.td:822
672 LDSTUBrr = 657, // SparcInstrInfo.td:820
673 LDSWAri = 658, // SparcInstrInfo.td:545
674 LDSWArr = 659, // SparcInstrInfo.td:540
675 LDSWri = 660, // SparcInstrInfo.td:530
676 LDSWrr = 661, // SparcInstrInfo.td:525
677 LDUBAri = 662, // SparcInstrInfo.td:545
678 LDUBArr = 663, // SparcInstrInfo.td:540
679 LDUBri = 664, // SparcInstrInfo.td:530
680 LDUBrr = 665, // SparcInstrInfo.td:525
681 LDUHAri = 666, // SparcInstrInfo.td:545
682 LDUHArr = 667, // SparcInstrInfo.td:540
683 LDUHri = 668, // SparcInstrInfo.td:530
684 LDUHrr = 669, // SparcInstrInfo.td:525
685 LDXAri = 670, // SparcInstrInfo.td:545
686 LDXArr = 671, // SparcInstrInfo.td:540
687 LDXFSRri = 672, // SparcInstrInfo.td:743
688 LDXFSRrr = 673, // SparcInstrInfo.td:741
689 LDXri = 674, // SparcInstrInfo.td:530
690 LDXrr = 675, // SparcInstrInfo.td:525
691 LDri = 676, // SparcInstrInfo.td:530
692 LDrr = 677, // SparcInstrInfo.td:525
693 LZCNT = 678, // SparcInstrVIS.td:258
694 MD5 = 679, // SparcInstrCrypto.td:65
695 MEMBARi = 680, // SparcInstrInfo.td:1804
696 MONTMUL = 681, // SparcInstrCrypto.td:95
697 MONTSQR = 682, // SparcInstrCrypto.td:96
698 MOVDTOX = 683, // SparcInstrVIS.td:266
699 MOVFCCri = 684, // SparcInstrInfo.td:1664
700 MOVFCCrr = 685, // SparcInstrInfo.td:1659
701 MOVICCri = 686, // SparcInstrInfo.td:1650
702 MOVICCrr = 687, // SparcInstrInfo.td:1644
703 MOVRri = 688, // SparcInstr64Bit.td:361
704 MOVRrr = 689, // SparcInstr64Bit.td:356
705 MOVSTOSW = 690, // SparcInstrVIS.td:262
706 MOVSTOUW = 691, // SparcInstrVIS.td:264
707 MOVWTOS = 692, // SparcInstrVIS.td:268
708 MOVXCCri = 693, // SparcInstr64Bit.td:302
709 MOVXCCrr = 694, // SparcInstr64Bit.td:297
710 MOVXTOD = 695, // SparcInstrVIS.td:270
711 MPMUL = 696, // SparcInstrCrypto.td:94
712 MULSCCri = 697, // SparcInstrInfo.td:516
713 MULSCCrr = 698, // SparcInstrInfo.td:512
714 MULXri = 699, // SparcInstrInfo.td:502
715 MULXrr = 700, // SparcInstrInfo.td:497
716 NOP = 701, // SparcInstrInfo.td:865
717 NORMALW = 702, // SparcInstrUAOSA.td:41
718 ORCCri = 703, // SparcInstrInfo.td:516
719 ORCCrr = 704, // SparcInstrInfo.td:512
720 ORNCCri = 705, // SparcInstrInfo.td:516
721 ORNCCrr = 706, // SparcInstrInfo.td:512
722 ORNri = 707, // SparcInstrInfo.td:884
723 ORNrr = 708, // SparcInstrInfo.td:880
724 ORri = 709, // SparcInstrInfo.td:502
725 ORrr = 710, // SparcInstrInfo.td:497
726 OTHERW = 711, // SparcInstrUAOSA.td:42
727 PDIST = 712, // SparcInstrVIS.td:151
728 PDISTN = 713, // SparcInstrVIS.td:274
729 POPCrr = 714, // SparcInstrInfo.td:1797
730 PREFETCHAi = 715, // SparcInstrInfo.td:1900
731 PREFETCHAr = 716, // SparcInstrInfo.td:1896
732 PREFETCHi = 717, // SparcInstrInfo.td:1893
733 PREFETCHr = 718, // SparcInstrInfo.td:1890
734 PWRPSRri = 719, // SparcInstrInfo.td:1857
735 PWRPSRrr = 720, // SparcInstrInfo.td:1854
736 RDASR = 721, // SparcInstrInfo.td:1254
737 RDFQ = 722, // SparcInstrInfo.td:1919
738 RDPR = 723, // SparcInstrInfo.td:1910
739 RDPSR = 724, // SparcInstrInfo.td:1261
740 RDTBR = 725, // SparcInstrInfo.td:1271
741 RDWIM = 726, // SparcInstrInfo.td:1266
742 RESTORED = 727, // SparcInstrInfo.td:1885
743 RESTOREri = 728, // SparcInstrInfo.td:516
744 RESTORErr = 729, // SparcInstrInfo.td:512
745 RET = 730, // SparcInstrInfo.td:1194
746 RETL = 731, // SparcInstrInfo.td:1187
747 RETRY = 732, // SparcInstrInfo.td:1879
748 RETTri = 733, // SparcInstrInfo.td:1209
749 RETTrr = 734, // SparcInstrInfo.td:1204
750 SAVED = 735, // SparcInstrInfo.td:1882
751 SAVEri = 736, // SparcInstrInfo.td:516
752 SAVErr = 737, // SparcInstrInfo.td:512
753 SDIVCCri = 738, // SparcInstrInfo.td:516
754 SDIVCCrr = 739, // SparcInstrInfo.td:512
755 SDIVXri = 740, // SparcInstrInfo.td:502
756 SDIVXrr = 741, // SparcInstrInfo.td:497
757 SDIVri = 742, // SparcInstrInfo.td:516
758 SDIVrr = 743, // SparcInstrInfo.td:512
759 SETHIi = 744, // SparcInstrInfo.td:856
760 SHA1 = 745, // SparcInstrCrypto.td:68
761 SHA256 = 746, // SparcInstrCrypto.td:71
762 SHA512 = 747, // SparcInstrCrypto.td:75
763 SHUTDOWN = 748, // SparcInstrVIS.td:157
764 SIAM = 749, // SparcInstrVIS.td:169
765 SIR = 750, // SparcInstrInfo.td:1808
766 SLLXri = 751, // SparcInstrFormats.td:299
767 SLLXrr = 752, // SparcInstrFormats.td:295
768 SLLri = 753, // SparcInstrFormats.td:299
769 SLLrr = 754, // SparcInstrFormats.td:295
770 SMACri = 755, // SparcInstrInfo.td:1835
771 SMACrr = 756, // SparcInstrInfo.td:1830
772 SMULCCri = 757, // SparcInstrInfo.td:516
773 SMULCCrr = 758, // SparcInstrInfo.td:512
774 SMULri = 759, // SparcInstrInfo.td:502
775 SMULrr = 760, // SparcInstrInfo.td:497
776 SRAXri = 761, // SparcInstrFormats.td:299
777 SRAXrr = 762, // SparcInstrFormats.td:295
778 SRAri = 763, // SparcInstrFormats.td:299
779 SRArr = 764, // SparcInstrFormats.td:295
780 SRLXri = 765, // SparcInstrFormats.td:299
781 SRLXrr = 766, // SparcInstrFormats.td:295
782 SRLri = 767, // SparcInstrFormats.td:299
783 SRLrr = 768, // SparcInstrFormats.td:295
784 STAri = 769, // SparcInstrInfo.td:581
785 STArr = 770, // SparcInstrInfo.td:575
786 STBAR = 771, // SparcInstrInfo.td:1316
787 STBAri = 772, // SparcInstrInfo.td:581
788 STBArr = 773, // SparcInstrInfo.td:575
789 STBri = 774, // SparcInstrInfo.td:566
790 STBrr = 775, // SparcInstrInfo.td:561
791 STCSRri = 776, // SparcInstrInfo.td:784
792 STCSRrr = 777, // SparcInstrInfo.td:782
793 STCri = 778, // SparcInstrInfo.td:566
794 STCrr = 779, // SparcInstrInfo.td:561
795 STDAri = 780, // SparcInstrInfo.td:581
796 STDArr = 781, // SparcInstrInfo.td:575
797 STDCQri = 782, // SparcInstrInfo.td:790
798 STDCQrr = 783, // SparcInstrInfo.td:788
799 STDCri = 784, // SparcInstrInfo.td:566
800 STDCrr = 785, // SparcInstrInfo.td:561
801 STDFAri = 786, // SparcInstrInfo.td:581
802 STDFArr = 787, // SparcInstrInfo.td:575
803 STDFQri = 788, // SparcInstrInfo.td:805
804 STDFQrr = 789, // SparcInstrInfo.td:803
805 STDFri = 790, // SparcInstrInfo.td:566
806 STDFrr = 791, // SparcInstrInfo.td:561
807 STDri = 792, // SparcInstrInfo.td:566
808 STDrr = 793, // SparcInstrInfo.td:561
809 STFAri = 794, // SparcInstrInfo.td:581
810 STFArr = 795, // SparcInstrInfo.td:575
811 STFSRri = 796, // SparcInstrInfo.td:799
812 STFSRrr = 797, // SparcInstrInfo.td:797
813 STFri = 798, // SparcInstrInfo.td:566
814 STFrr = 799, // SparcInstrInfo.td:561
815 STHAri = 800, // SparcInstrInfo.td:581
816 STHArr = 801, // SparcInstrInfo.td:575
817 STHri = 802, // SparcInstrInfo.td:566
818 STHrr = 803, // SparcInstrInfo.td:561
819 STQFAri = 804, // SparcInstrInfo.td:581
820 STQFArr = 805, // SparcInstrInfo.td:575
821 STQFri = 806, // SparcInstrInfo.td:566
822 STQFrr = 807, // SparcInstrInfo.td:561
823 STXAri = 808, // SparcInstrInfo.td:581
824 STXArr = 809, // SparcInstrInfo.td:575
825 STXFSRri = 810, // SparcInstrInfo.td:812
826 STXFSRrr = 811, // SparcInstrInfo.td:810
827 STXri = 812, // SparcInstrInfo.td:566
828 STXrr = 813, // SparcInstrInfo.td:561
829 STri = 814, // SparcInstrInfo.td:566
830 STrr = 815, // SparcInstrInfo.td:561
831 SUBCCri = 816, // SparcInstrInfo.td:502
832 SUBCCrr = 817, // SparcInstrInfo.td:497
833 SUBCri = 818, // SparcInstrInfo.td:516
834 SUBCrr = 819, // SparcInstrInfo.td:512
835 SUBEri = 820, // SparcInstrInfo.td:502
836 SUBErr = 821, // SparcInstrInfo.td:497
837 SUBri = 822, // SparcInstrInfo.td:502
838 SUBrr = 823, // SparcInstrInfo.td:497
839 SWAPAri = 824, // SparcInstrInfo.td:848
840 SWAPArr = 825, // SparcInstrInfo.td:843
841 SWAPri = 826, // SparcInstrInfo.td:839
842 SWAPrr = 827, // SparcInstrInfo.td:835
843 TA1 = 828, // SparcInstrInfo.td:1250
844 TA3 = 829, // SparcInstrInfo.td:627
845 TA5 = 830, // SparcInstrInfo.td:1247
846 TADDCCTVri = 831, // SparcInstrInfo.td:516
847 TADDCCTVrr = 832, // SparcInstrInfo.td:512
848 TADDCCri = 833, // SparcInstrInfo.td:516
849 TADDCCrr = 834, // SparcInstrInfo.td:512
850 TAIL_CALL = 835, // SparcInstrInfo.td:1616
851 TAIL_CALLri = 836, // SparcInstrInfo.td:1630
852 TICCri = 837, // SparcInstrInfo.td:1236
853 TICCrr = 838, // SparcInstrInfo.td:1232
854 TLS_ADDrr = 839, // SparcInstrInfo.td:1582
855 TLS_CALL = 840, // SparcInstrInfo.td:1599
856 TLS_LDXrr = 841, // SparcInstr64Bit.td:213
857 TLS_LDrr = 842, // SparcInstrInfo.td:1590
858 TRAPri = 843, // SparcInstrInfo.td:1225
859 TRAPrr = 844, // SparcInstrInfo.td:1221
860 TSUBCCTVri = 845, // SparcInstrInfo.td:516
861 TSUBCCTVrr = 846, // SparcInstrInfo.td:512
862 TSUBCCri = 847, // SparcInstrInfo.td:516
863 TSUBCCrr = 848, // SparcInstrInfo.td:512
864 TXCCri = 849, // SparcInstrInfo.td:1236
865 TXCCrr = 850, // SparcInstrInfo.td:1232
866 UDIVCCri = 851, // SparcInstrInfo.td:516
867 UDIVCCrr = 852, // SparcInstrInfo.td:512
868 UDIVXri = 853, // SparcInstrInfo.td:502
869 UDIVXrr = 854, // SparcInstrInfo.td:497
870 UDIVri = 855, // SparcInstrInfo.td:516
871 UDIVrr = 856, // SparcInstrInfo.td:512
872 UMACri = 857, // SparcInstrInfo.td:1845
873 UMACrr = 858, // SparcInstrInfo.td:1840
874 UMULCCri = 859, // SparcInstrInfo.td:516
875 UMULCCrr = 860, // SparcInstrInfo.td:512
876 UMULXHI = 861, // SparcInstrVIS.td:276
877 UMULri = 862, // SparcInstrInfo.td:502
878 UMULrr = 863, // SparcInstrInfo.td:497
879 UNIMP = 864, // SparcInstrInfo.td:1321
880 V9FCMPD = 865, // SparcInstrInfo.td:1745
881 V9FCMPED = 866, // SparcInstrInfo.td:1757
882 V9FCMPEQ = 867, // SparcInstrInfo.td:1760
883 V9FCMPES = 868, // SparcInstrInfo.td:1754
884 V9FCMPQ = 869, // SparcInstrInfo.td:1748
885 V9FCMPS = 870, // SparcInstrInfo.td:1742
886 V9FMOVD_FCC = 871, // SparcInstrInfo.td:1781
887 V9FMOVQ_FCC = 872, // SparcInstrInfo.td:1786
888 V9FMOVS_FCC = 873, // SparcInstrInfo.td:1777
889 V9MOVFCCri = 874, // SparcInstrInfo.td:1773
890 V9MOVFCCrr = 875, // SparcInstrInfo.td:1769
891 WRASRri = 876, // SparcInstrInfo.td:1280
892 WRASRrr = 877, // SparcInstrInfo.td:1277
893 WRPRri = 878, // SparcInstrInfo.td:1929
894 WRPRrr = 879, // SparcInstrInfo.td:1926
895 WRPSRri = 880, // SparcInstrInfo.td:1290
896 WRPSRrr = 881, // SparcInstrInfo.td:1287
897 WRTBRri = 882, // SparcInstrInfo.td:1308
898 WRTBRrr = 883, // SparcInstrInfo.td:1305
899 WRWIMri = 884, // SparcInstrInfo.td:1299
900 WRWIMrr = 885, // SparcInstrInfo.td:1296
901 XMULX = 886, // SparcInstrVIS.td:277
902 XMULXHI = 887, // SparcInstrVIS.td:278
903 XNORCCri = 888, // SparcInstrInfo.td:516
904 XNORCCrr = 889, // SparcInstrInfo.td:512
905 XNORri = 890, // SparcInstrInfo.td:893
906 XNORrr = 891, // SparcInstrInfo.td:889
907 XORCCri = 892, // SparcInstrInfo.td:516
908 XORCCrr = 893, // SparcInstrInfo.td:512
909 XORri = 894, // SparcInstrInfo.td:502
910 XORrr = 895, // SparcInstrInfo.td:497
911 INSTRUCTION_LIST_END = 896
912 };
913 enum RegClassByHwModeUses : uint16_t {
914 sparc_ptr_rc,
915 };
916
917} // namespace llvm::SP
918
919#endif // GET_INSTRINFO_ENUM
920
921#ifdef GET_INSTRINFO_SCHED_ENUM
922#undef GET_INSTRINFO_SCHED_ENUM
923
924namespace llvm::SP::Sched {
925
926 enum {
927 NoInstrModel = 0,
928 IIC_iu_instr = 1,
929 IIC_fpu_normal_instr = 2,
930 IIC_jmp_or_call = 3,
931 IIC_fpu_abs = 4,
932 IIC_fpu_fast_instr = 5,
933 IIC_fpu_divd = 6,
934 IIC_fpu_divs = 7,
935 IIC_fpu_muld = 8,
936 IIC_fpu_muls = 9,
937 IIC_fpu_negs = 10,
938 IIC_fpu_sqrtd = 11,
939 IIC_fpu_sqrts = 12,
940 IIC_fpu_stod = 13,
941 IIC_ldd = 14,
942 IIC_iu_or_fpu_instr = 15,
943 IIC_iu_div = 16,
944 IIC_smac_umac = 17,
945 IIC_iu_smul = 18,
946 IIC_st = 19,
947 IIC_std = 20,
948 IIC_iu_umul = 21,
949 SCHED_LIST_END = 22
950 };
951
952} // namespace llvm::SP::Sched
953
954#endif // GET_INSTRINFO_SCHED_ENUM
955
956#if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
957
958namespace llvm {
959
960struct SparcInstrTable {
961 MCInstrDesc Insts[896];
962 static_assert(alignof(MCInstrDesc) >= alignof(MCPhysReg), "Unwanted padding between Insts and ImplicitOps");
963 MCPhysReg ImplicitOps[218];
964 char Padding[sizeof(MCOperandInfo) - sizeof ImplicitOps % sizeof(MCOperandInfo)];
965 static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo");
966 MCOperandInfo OperandInfo[575];
967};
968} // namespace llvm
969
970#endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
971
972#ifdef GET_INSTRINFO_MC_DESC
973#undef GET_INSTRINFO_MC_DESC
974
975namespace llvm {
976
977static_assert((sizeof SparcInstrTable::ImplicitOps + sizeof SparcInstrTable::Padding) % sizeof(MCOperandInfo) == 0);
978static constexpr unsigned SparcOpInfoBase = (sizeof SparcInstrTable::ImplicitOps + sizeof SparcInstrTable::Padding) / sizeof(MCOperandInfo);
979
980extern const SparcInstrTable SparcDescs = {
981 {
982 { 895, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // XORrr
983 { 894, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // XORri
984 { 893, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XORCCrr
985 { 892, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XORCCri
986 { 891, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // XNORrr
987 { 890, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XNORri
988 { 889, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XNORCCrr
989 { 888, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XNORCCri
990 { 887, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XMULXHI
991 { 886, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XMULX
992 { 885, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 141, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRWIMrr
993 { 884, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 141, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRWIMri
994 { 883, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRTBRrr
995 { 882, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRTBRri
996 { 881, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPSRrr
997 { 880, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPSRri
998 { 879, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 572, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPRrr
999 { 878, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 569, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPRri
1000 { 877, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 566, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRASRrr
1001 { 876, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 563, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRASRri
1002 { 875, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 558, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9MOVFCCrr
1003 { 874, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 553, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9MOVFCCri
1004 { 873, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 548, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FMOVS_FCC
1005 { 872, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 543, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FMOVQ_FCC
1006 { 871, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 538, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FMOVD_FCC
1007 { 870, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 268, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPS
1008 { 869, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 535, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPQ
1009 { 868, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 268, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPES
1010 { 867, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 535, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPEQ
1011 { 866, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 265, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPED
1012 { 865, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 265, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPD
1013 { 864, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UNIMP
1014 { 863, 3, 1, 4, 21, 0, 1, SparcOpInfoBase + 175, 215, 0, 0x0ULL }, // UMULrr
1015 { 862, 3, 1, 4, 21, 0, 1, SparcOpInfoBase + 172, 215, 0, 0x0ULL }, // UMULri
1016 { 861, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0, 0x0ULL }, // UMULXHI
1017 { 860, 3, 1, 4, 21, 0, 2, SparcOpInfoBase + 175, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMULCCrr
1018 { 859, 3, 1, 4, 21, 0, 2, SparcOpInfoBase + 172, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMULCCri
1019 { 858, 3, 1, 4, 17, 2, 2, SparcOpInfoBase + 175, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMACrr
1020 { 857, 3, 1, 4, 17, 2, 2, SparcOpInfoBase + 172, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMACri
1021 { 856, 3, 1, 4, 16, 1, 1, SparcOpInfoBase + 175, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVrr
1022 { 855, 3, 1, 4, 16, 1, 1, SparcOpInfoBase + 172, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVri
1023 { 854, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVXrr
1024 { 853, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 414, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVXri
1025 { 852, 3, 1, 4, 16, 1, 2, SparcOpInfoBase + 175, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVCCrr
1026 { 851, 3, 1, 4, 16, 1, 2, SparcOpInfoBase + 172, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVCCri
1027 { 850, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 440, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TXCCrr
1028 { 849, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 528, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TXCCri
1029 { 848, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCrr
1030 { 847, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCri
1031 { 846, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCTVrr
1032 { 845, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCTVri
1033 { 844, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 440, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TRAPrr
1034 { 843, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 528, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TRAPri
1035 { 842, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // TLS_LDrr
1036 { 841, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // TLS_LDXrr
1037 { 840, 2, 0, 4, 3, 1, 0, SparcOpInfoBase + 189, 217, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // TLS_CALL
1038 { 839, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 531, 0, 0, 0x0ULL }, // TLS_ADDrr
1039 { 838, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 440, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TICCrr
1040 { 837, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 528, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TICCri
1041 { 836, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x0ULL }, // TAIL_CALLri
1042 { 835, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 188, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x0ULL }, // TAIL_CALL
1043 { 834, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCrr
1044 { 833, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCri
1045 { 832, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCTVrr
1046 { 831, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCTVri
1047 { 830, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TA5
1048 { 829, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TA3
1049 { 828, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TA1
1050 { 827, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 524, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // SWAPrr
1051 { 826, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 515, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // SWAPri
1052 { 825, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 519, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SWAPArr
1053 { 824, 4, 1, 4, 1, 1, 0, SparcOpInfoBase + 515, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SWAPAri
1054 { 823, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SUBrr
1055 { 822, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // SUBri
1056 { 821, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 175, 5, 0, 0x0ULL }, // SUBErr
1057 { 820, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 172, 5, 0, 0x0ULL }, // SUBEri
1058 { 819, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SUBCrr
1059 { 818, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SUBCri
1060 { 817, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::HasPostISelHook), 0x0ULL }, // SUBCCrr
1061 { 816, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::HasPostISelHook), 0x0ULL }, // SUBCCri
1062 { 815, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 450, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STrr
1063 { 814, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 443, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STri
1064 { 813, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 512, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STXrr
1065 { 812, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 505, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STXri
1066 { 811, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STXFSRrr
1067 { 810, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STXFSRri
1068 { 809, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 508, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STXArr
1069 { 808, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 505, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STXAri
1070 { 807, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 502, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STQFrr
1071 { 806, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 495, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STQFri
1072 { 805, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 498, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STQFArr
1073 { 804, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 495, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STQFAri
1074 { 803, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 450, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STHrr
1075 { 802, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 443, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STHri
1076 { 801, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 446, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STHArr
1077 { 800, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 443, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STHAri
1078 { 799, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 492, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STFrr
1079 { 798, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 485, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STFri
1080 { 797, 2, 0, 4, 19, 1, 0, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFSRrr
1081 { 796, 2, 0, 4, 19, 1, 0, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFSRri
1082 { 795, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 488, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFArr
1083 { 794, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 485, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFAri
1084 { 793, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 482, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDrr
1085 { 792, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 459, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDri
1086 { 791, 3, 0, 4, 20, 0, 0, SparcOpInfoBase + 479, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDFrr
1087 { 790, 3, 0, 4, 20, 0, 0, SparcOpInfoBase + 472, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDFri
1088 { 789, 2, 0, 4, 20, 0, 1, SparcOpInfoBase + 193, 139, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFQrr
1089 { 788, 2, 0, 4, 20, 0, 1, SparcOpInfoBase + 191, 139, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFQri
1090 { 787, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 475, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFArr
1091 { 786, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 472, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFAri
1092 { 785, 3, 0, 4, 20, 0, 0, SparcOpInfoBase + 469, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDCrr
1093 { 784, 3, 0, 4, 20, 0, 0, SparcOpInfoBase + 466, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDCri
1094 { 783, 2, 0, 4, 20, 1, 0, SparcOpInfoBase + 193, 216, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDCQrr
1095 { 782, 2, 0, 4, 20, 1, 0, SparcOpInfoBase + 191, 216, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDCQri
1096 { 781, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 462, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDArr
1097 { 780, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 459, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDAri
1098 { 779, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 456, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STCrr
1099 { 778, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 453, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STCri
1100 { 777, 2, 0, 4, 19, 1, 0, SparcOpInfoBase + 193, 10, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STCSRrr
1101 { 776, 2, 0, 4, 19, 1, 0, SparcOpInfoBase + 191, 10, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STCSRri
1102 { 775, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 450, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STBrr
1103 { 774, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 443, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STBri
1104 { 773, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 446, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STBArr
1105 { 772, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 443, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STBAri
1106 { 771, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STBAR
1107 { 770, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 446, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STArr
1108 { 769, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 443, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STAri
1109 { 768, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SRLrr
1110 { 767, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 440, 0, 0, 0x0ULL }, // SRLri
1111 { 766, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 437, 0, 0, 0x0ULL }, // SRLXrr
1112 { 765, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 434, 0, 0, 0x0ULL }, // SRLXri
1113 { 764, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SRArr
1114 { 763, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 440, 0, 0, 0x0ULL }, // SRAri
1115 { 762, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 437, 0, 0, 0x0ULL }, // SRAXrr
1116 { 761, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 434, 0, 0, 0x0ULL }, // SRAXri
1117 { 760, 3, 1, 4, 18, 0, 1, SparcOpInfoBase + 175, 215, 0, 0x0ULL }, // SMULrr
1118 { 759, 3, 1, 4, 18, 0, 1, SparcOpInfoBase + 172, 215, 0, 0x0ULL }, // SMULri
1119 { 758, 3, 1, 4, 18, 0, 2, SparcOpInfoBase + 175, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMULCCrr
1120 { 757, 3, 1, 4, 18, 0, 2, SparcOpInfoBase + 172, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMULCCri
1121 { 756, 3, 1, 4, 17, 2, 2, SparcOpInfoBase + 175, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMACrr
1122 { 755, 3, 1, 4, 17, 2, 2, SparcOpInfoBase + 172, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMACri
1123 { 754, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SLLrr
1124 { 753, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 440, 0, 0, 0x0ULL }, // SLLri
1125 { 752, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 437, 0, 0, 0x0ULL }, // SLLXrr
1126 { 751, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 434, 0, 0, 0x0ULL }, // SLLXri
1127 { 750, 1, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SIR
1128 { 749, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SIAM
1129 { 748, 0, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHUTDOWN
1130 { 747, 0, 0, 4, 0, 24, 8, SparcOpInfoBase + 1, 177, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHA512
1131 { 746, 0, 0, 4, 0, 12, 4, SparcOpInfoBase + 1, 161, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHA256
1132 { 745, 0, 0, 4, 0, 11, 3, SparcOpInfoBase + 1, 147, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHA1
1133 { 744, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 167, 0, 0, 0x0ULL }, // SETHIi
1134 { 743, 3, 1, 4, 16, 1, 1, SparcOpInfoBase + 175, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVrr
1135 { 742, 3, 1, 4, 16, 1, 1, SparcOpInfoBase + 172, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVri
1136 { 741, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVXrr
1137 { 740, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 414, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVXri
1138 { 739, 3, 1, 4, 16, 1, 2, SparcOpInfoBase + 175, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVCCrr
1139 { 738, 3, 1, 4, 16, 1, 2, SparcOpInfoBase + 172, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVCCri
1140 { 737, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SAVErr
1141 { 736, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SAVEri
1142 { 735, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SAVED
1143 { 734, 2, 0, 4, 3, 0, 0, SparcOpInfoBase + 193, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RETTrr
1144 { 733, 2, 0, 4, 3, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RETTri
1145 { 732, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RETRY
1146 { 731, 1, 0, 4, 3, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // RETL
1147 { 730, 1, 0, 4, 3, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RET
1148 { 729, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RESTORErr
1149 { 728, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RESTOREri
1150 { 727, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RESTORED
1151 { 726, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 141, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDWIM
1152 { 725, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDTBR
1153 { 724, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDPSR
1154 { 723, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 432, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDPR
1155 { 722, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 139, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDFQ
1156 { 721, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 429, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDASR
1157 { 720, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PWRPSRrr
1158 { 719, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PWRPSRri
1159 { 718, 3, 0, 4, 1, 0, 0, SparcOpInfoBase + 426, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHr
1160 { 717, 3, 0, 4, 1, 0, 0, SparcOpInfoBase + 419, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHi
1161 { 716, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 422, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHAr
1162 { 715, 3, 0, 4, 1, 1, 0, SparcOpInfoBase + 419, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHAi
1163 { 714, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 417, 0, 0, 0x0ULL }, // POPCrr
1164 { 713, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PDISTN
1165 { 712, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PDIST
1166 { 711, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // OTHERW
1167 { 710, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ORrr
1168 { 709, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // ORri
1169 { 708, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ORNrr
1170 { 707, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORNri
1171 { 706, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORNCCrr
1172 { 705, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORNCCri
1173 { 704, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORCCrr
1174 { 703, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORCCri
1175 { 702, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // NORMALW
1176 { 701, 0, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // NOP
1177 { 700, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 178, 0, 0, 0x0ULL }, // MULXrr
1178 { 699, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 414, 0, 0, 0x0ULL }, // MULXri
1179 { 698, 3, 1, 4, 1, 2, 2, SparcOpInfoBase + 175, 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MULSCCrr
1180 { 697, 3, 1, 4, 1, 2, 2, SparcOpInfoBase + 172, 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MULSCCri
1181 { 696, 1, 0, 4, 0, 52, 52, SparcOpInfoBase + 1, 30, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MPMUL
1182 { 695, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 412, 0, 0, 0x0ULL }, // MOVXTOD
1183 { 694, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 394, 4, 0, 0x0ULL }, // MOVXCCrr
1184 { 693, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 390, 4, 0, 0x0ULL }, // MOVXCCri
1185 { 692, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 410, 0, 0, 0x0ULL }, // MOVWTOS
1186 { 691, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 408, 0, 0, 0x0ULL }, // MOVSTOUW
1187 { 690, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 408, 0, 0, 0x0ULL }, // MOVSTOSW
1188 { 689, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 403, 0, 0, 0x0ULL }, // MOVRrr
1189 { 688, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 398, 0, 0, 0x0ULL }, // MOVRri
1190 { 687, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 394, 4, 0, 0x0ULL }, // MOVICCrr
1191 { 686, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 390, 4, 0, 0x0ULL }, // MOVICCri
1192 { 685, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 394, 3, 0, 0x0ULL }, // MOVFCCrr
1193 { 684, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 390, 3, 0, 0x0ULL }, // MOVFCCri
1194 { 683, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 388, 0, 0, 0x0ULL }, // MOVDTOX
1195 { 682, 1, 0, 4, 0, 52, 52, SparcOpInfoBase + 1, 30, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MONTSQR
1196 { 681, 1, 0, 4, 0, 52, 52, SparcOpInfoBase + 1, 30, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MONTMUL
1197 { 680, 1, 0, 4, 1, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MEMBARi
1198 { 679, 0, 0, 4, 0, 10, 8, SparcOpInfoBase + 1, 12, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MD5
1199 { 678, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 386, 0, 0, 0x0ULL }, // LZCNT
1200 { 677, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDrr
1201 { 676, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDri
1202 { 675, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 383, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDXrr
1203 { 674, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 380, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDXri
1204 { 673, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDXFSRrr
1205 { 672, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDXFSRri
1206 { 671, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 314, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDXArr
1207 { 670, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 380, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDXAri
1208 { 669, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUHrr
1209 { 668, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUHri
1210 { 667, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUHArr
1211 { 666, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDUHAri
1212 { 665, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUBrr
1213 { 664, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUBri
1214 { 663, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDUBArr
1215 { 662, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDUBAri
1216 { 661, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 383, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSWrr
1217 { 660, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 380, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSWri
1218 { 659, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 314, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSWArr
1219 { 658, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 380, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSWAri
1220 { 657, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBrr
1221 { 656, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBri
1222 { 655, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBArr
1223 { 654, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBAri
1224 { 653, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSHrr
1225 { 652, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSHri
1226 { 651, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSHArr
1227 { 650, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSHAri
1228 { 649, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSBrr
1229 { 648, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSBri
1230 { 647, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSBArr
1231 { 646, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSBAri
1232 { 645, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 377, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDQFrr
1233 { 644, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 370, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDQFri
1234 { 643, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 373, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDQFArr
1235 { 642, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 370, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDQFAri
1236 { 641, 3, 1, 4, 15, 0, 0, SparcOpInfoBase + 367, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDFrr
1237 { 640, 3, 1, 4, 15, 0, 0, SparcOpInfoBase + 360, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDFri
1238 { 639, 2, 0, 4, 15, 0, 1, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFSRrr
1239 { 638, 2, 0, 4, 15, 0, 1, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFSRri
1240 { 637, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 363, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFArr
1241 { 636, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 360, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFAri
1242 { 635, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 357, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDrr
1243 { 634, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 334, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDri
1244 { 633, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 354, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDFrr
1245 { 632, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 347, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDFri
1246 { 631, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 350, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDFArr
1247 { 630, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 347, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDFAri
1248 { 629, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 344, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDCrr
1249 { 628, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 341, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDCri
1250 { 627, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 337, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDArr
1251 { 626, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 334, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDAri
1252 { 625, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 331, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDCrr
1253 { 624, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 328, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDCri
1254 { 623, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 193, 10, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDCSRrr
1255 { 622, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 191, 10, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDCSRri
1256 { 621, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDArr
1257 { 620, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDAri
1258 { 619, 3, 1, 4, 3, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // JMPLrr
1259 { 618, 3, 1, 4, 3, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // JMPLri
1260 { 617, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INVALW
1261 { 616, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // GDOP_LDrr
1262 { 615, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 314, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // GDOP_LDXrr
1263 { 614, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 309, 0, 0, 0x0ULL }, // FZEROS
1264 { 613, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 308, 0, 0, 0x0ULL }, // FZERO
1265 { 612, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 257, 0, 0, 0x0ULL }, // FXTOS
1266 { 611, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 259, 0, 0, 0x0ULL }, // FXTOQ
1267 { 610, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FXTOD
1268 { 609, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXORS
1269 { 608, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXOR
1270 { 607, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXNORS
1271 { 606, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXNOR
1272 { 605, 3, 1, 4, 5, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FSUBS
1273 { 604, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FSUBQ
1274 { 603, 3, 1, 4, 5, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FSUBD
1275 { 602, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 261, 0, 0, 0x0ULL }, // FSTOX
1276 { 601, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 263, 0, 0, 0x0ULL }, // FSTOQ
1277 { 600, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FSTOI
1278 { 599, 2, 1, 4, 13, 0, 0, SparcOpInfoBase + 261, 0, 0, 0x0ULL }, // FSTOD
1279 { 598, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRL32
1280 { 597, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRL16
1281 { 596, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC2S
1282 { 595, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC2
1283 { 594, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC1S
1284 { 593, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC1
1285 { 592, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRA32
1286 { 591, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRA16
1287 { 590, 2, 1, 4, 12, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FSQRTS
1288 { 589, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0, 0x0ULL }, // FSQRTQ
1289 { 588, 2, 1, 4, 11, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FSQRTD
1290 { 587, 3, 1, 4, 8, 0, 0, SparcOpInfoBase + 305, 0, 0, 0x0ULL }, // FSMULD
1291 { 586, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLL32
1292 { 585, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLL16
1293 { 584, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLAS32
1294 { 583, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLAS16
1295 { 582, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 310, 0, 0, 0x0ULL }, // FQTOX
1296 { 581, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 312, 0, 0, 0x0ULL }, // FQTOS
1297 { 580, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 312, 0, 0, 0x0ULL }, // FQTOI
1298 { 579, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 310, 0, 0, 0x0ULL }, // FQTOD
1299 { 578, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB32S
1300 { 577, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB32
1301 { 576, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB16S
1302 { 575, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB16
1303 { 574, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPMERGE
1304 { 573, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPMADDXHI
1305 { 572, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPMADDX
1306 { 571, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD64
1307 { 570, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD32S
1308 { 569, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD32
1309 { 568, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD16S
1310 { 567, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD16
1311 { 566, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 257, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPACKFIX
1312 { 565, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPACK32
1313 { 564, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPACK16
1314 { 563, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORS
1315 { 562, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT2S
1316 { 561, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT2
1317 { 560, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT1S
1318 { 559, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT1
1319 { 558, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FOR
1320 { 557, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 309, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FONES
1321 { 556, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 308, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FONE
1322 { 555, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0, 0x0ULL }, // FNSMULD
1323 { 554, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT2S
1324 { 553, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT2
1325 { 552, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT1S
1326 { 551, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT1
1327 { 550, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNORS
1328 { 549, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOR
1329 { 548, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FNMULS
1330 { 547, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FNMULD
1331 { 546, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FNMSUBS
1332 { 545, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FNMSUBD
1333 { 544, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FNMADDS
1334 { 543, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FNMADDD
1335 { 542, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FNHADDS
1336 { 541, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FNHADDD
1337 { 540, 2, 1, 4, 10, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FNEGS
1338 { 539, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0, 0x0ULL }, // FNEGQ
1339 { 538, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FNEGD
1340 { 537, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNANDS
1341 { 536, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNAND
1342 { 535, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FNADDS
1343 { 534, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FNADDD
1344 { 533, 3, 1, 4, 9, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FMULS
1345 { 532, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FMULQ
1346 { 531, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMULD8ULX16
1347 { 530, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMULD8SUX16
1348 { 529, 3, 1, 4, 8, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FMULD
1349 { 528, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8X16AU
1350 { 527, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8X16AL
1351 { 526, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 302, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8X16
1352 { 525, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8ULX16
1353 { 524, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8SUX16
1354 { 523, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FMSUBS
1355 { 522, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FMSUBD
1356 { 521, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 298, 4, 0, 0x0ULL }, // FMOVS_XCC
1357 { 520, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 298, 4, 0, 0x0ULL }, // FMOVS_ICC
1358 { 519, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 298, 3, 0, 0x0ULL }, // FMOVS_FCC
1359 { 518, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMOVS
1360 { 517, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 293, 0, 0, 0x0ULL }, // FMOVRS
1361 { 516, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 288, 0, 0, 0x0ULL }, // FMOVRQ
1362 { 515, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 283, 0, 0, 0x0ULL }, // FMOVRD
1363 { 514, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 279, 4, 0, 0x0ULL }, // FMOVQ_XCC
1364 { 513, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 279, 4, 0, 0x0ULL }, // FMOVQ_ICC
1365 { 512, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 279, 3, 0, 0x0ULL }, // FMOVQ_FCC
1366 { 511, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMOVQ
1367 { 510, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 275, 4, 0, 0x0ULL }, // FMOVD_XCC
1368 { 509, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 275, 4, 0, 0x0ULL }, // FMOVD_ICC
1369 { 508, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 275, 3, 0, 0x0ULL }, // FMOVD_FCC
1370 { 507, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMOVD
1371 { 506, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMEAN16
1372 { 505, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FMADDS
1373 { 504, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FMADDD
1374 { 503, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 193, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSHrr
1375 { 502, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSHri
1376 { 501, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSHW
1377 { 500, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSH
1378 { 499, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 268, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLCMPS
1379 { 498, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 265, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLCMPD
1380 { 497, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FITOS
1381 { 496, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 263, 0, 0, 0x0ULL }, // FITOQ
1382 { 495, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 261, 0, 0, 0x0ULL }, // FITOD
1383 { 494, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FHSUBS
1384 { 493, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FHSUBD
1385 { 492, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FHADDS
1386 { 491, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FHADDD
1387 { 490, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 261, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FEXPAND
1388 { 489, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FDTOX
1389 { 488, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 257, 0, 0, 0x0ULL }, // FDTOS
1390 { 487, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 259, 0, 0, 0x0ULL }, // FDTOQ
1391 { 486, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 257, 0, 0, 0x0ULL }, // FDTOI
1392 { 485, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 254, 0, 0, 0x0ULL }, // FDMULQ
1393 { 484, 3, 1, 4, 7, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FDIVS
1394 { 483, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FDIVQ
1395 { 482, 3, 1, 4, 6, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FDIVD
1396 { 481, 2, 0, 4, 5, 0, 1, SparcOpInfoBase + 243, 3, 0, 0x0ULL }, // FCMPS_V9
1397 { 480, 2, 0, 4, 5, 0, 1, SparcOpInfoBase + 243, 3, 0, 0x0ULL }, // FCMPS
1398 { 479, 2, 0, 4, 0, 0, 1, SparcOpInfoBase + 241, 3, 0, 0x0ULL }, // FCMPQ_V9
1399 { 478, 2, 0, 4, 0, 0, 1, SparcOpInfoBase + 241, 3, 0, 0x0ULL }, // FCMPQ
1400 { 477, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPNE32
1401 { 476, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPNE16
1402 { 475, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPLE32
1403 { 474, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPLE16
1404 { 473, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPGT32
1405 { 472, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPGT16
1406 { 471, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPEQ32
1407 { 470, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPEQ16
1408 { 469, 2, 0, 4, 5, 0, 1, SparcOpInfoBase + 236, 3, 0, 0x0ULL }, // FCMPD_V9
1409 { 468, 2, 0, 4, 5, 0, 1, SparcOpInfoBase + 236, 3, 0, 0x0ULL }, // FCMPD
1410 { 467, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCHKSM16
1411 { 466, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // FBCOND_V9
1412 { 465, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // FBCONDA_V9
1413 { 464, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FBCONDA
1414 { 463, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // FBCOND
1415 { 462, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDS
1416 { 461, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT2S
1417 { 460, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT2
1418 { 459, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT1S
1419 { 458, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT1
1420 { 457, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FAND
1421 { 456, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FALIGNADATA
1422 { 455, 3, 1, 4, 5, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FADDS
1423 { 454, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FADDQ
1424 { 453, 3, 1, 4, 5, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FADDD
1425 { 452, 2, 1, 4, 4, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FABSS
1426 { 451, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0, 0x0ULL }, // FABSQ
1427 { 450, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FABSD
1428 { 449, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8N
1429 { 448, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8LN
1430 { 447, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8L
1431 { 446, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8
1432 { 445, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32N
1433 { 444, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32LN
1434 { 443, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32L
1435 { 442, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32
1436 { 441, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16N
1437 { 440, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16LN
1438 { 439, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16L
1439 { 438, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16
1440 { 437, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DONE
1441 { 436, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_ROUND
1442 { 435, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 238, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_KEXPAND
1443 { 434, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_IP
1444 { 433, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_IIP
1445 { 432, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 232, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CXBCONDrr
1446 { 431, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 228, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CXBCONDri
1447 { 430, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 232, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CWBCONDrr
1448 { 429, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 228, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CWBCONDri
1449 { 428, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CRC32C
1450 { 427, 2, 0, 4, 0, 0, 0, SparcOpInfoBase + 189, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CPBCONDA
1451 { 426, 2, 0, 4, 0, 0, 0, SparcOpInfoBase + 189, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // CPBCOND
1452 { 425, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 227, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CMASK8
1453 { 424, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 227, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CMASK32
1454 { 423, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 227, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CMASK16
1455 { 422, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 222, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // CASXArr
1456 { 421, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 218, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CASXAri
1457 { 420, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 213, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // CASArr
1458 { 419, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 209, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CASAri
1459 { 418, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CAMELLIA_FLI
1460 { 417, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CAMELLIA_FL
1461 { 416, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CAMELLIA_F
1462 { 415, 3, 0, 4, 1, 1, 1, SparcOpInfoBase + 206, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CALLrri
1463 { 414, 2, 0, 4, 3, 1, 1, SparcOpInfoBase + 193, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // CALLrr
1464 { 413, 3, 0, 4, 1, 1, 1, SparcOpInfoBase + 203, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CALLrii
1465 { 412, 2, 0, 4, 3, 1, 1, SparcOpInfoBase + 191, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // CALLri
1466 { 411, 2, 0, 4, 0, 1, 1, SparcOpInfoBase + 201, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CALLi
1467 { 410, 1, 0, 4, 3, 1, 1, SparcOpInfoBase + 188, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // CALL
1468 { 409, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BSHUFFLE
1469 { 408, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPXCCNT
1470 { 407, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPXCCANT
1471 { 406, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPXCCA
1472 { 405, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BPXCC
1473 { 404, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPRNT
1474 { 403, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPRANT
1475 { 402, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPRA
1476 { 401, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BPR
1477 { 400, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPICCNT
1478 { 399, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPICCANT
1479 { 398, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPICCA
1480 { 397, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BPICC
1481 { 396, 3, 0, 4, 2, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCCNT
1482 { 395, 3, 0, 4, 2, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCCANT
1483 { 394, 3, 0, 4, 2, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCCA
1484 { 393, 3, 0, 4, 2, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCC
1485 { 392, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BMASK
1486 { 391, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 193, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BINDrr
1487 { 390, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BINDri
1488 { 389, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BCONDA
1489 { 388, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BCOND
1490 { 387, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 188, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BA
1491 { 386, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ARRAY8
1492 { 385, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ARRAY32
1493 { 384, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ARRAY16
1494 { 383, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ANDrr
1495 { 382, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // ANDri
1496 { 381, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ANDNrr
1497 { 380, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDNri
1498 { 379, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDNCCrr
1499 { 378, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDNCCri
1500 { 377, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDCCrr
1501 { 376, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDCCri
1502 { 375, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ALLCLEAN
1503 { 374, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ALIGNADDRL
1504 { 373, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ALIGNADDR
1505 { 372, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_KEXPAND2
1506 { 371, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 151, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_KEXPAND1
1507 { 370, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_KEXPAND0
1508 { 369, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND23_LAST
1509 { 368, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND23
1510 { 367, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND01_LAST
1511 { 366, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND01
1512 { 365, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND23_LAST
1513 { 364, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND23
1514 { 363, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND01_LAST
1515 { 362, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND01
1516 { 361, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ADDrr
1517 { 360, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // ADDri
1518 { 359, 3, 1, 4, 0, 1, 1, SparcOpInfoBase + 178, 5, 0, 0x0ULL }, // ADDXCCC
1519 { 358, 3, 1, 4, 0, 1, 0, SparcOpInfoBase + 178, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ADDXC
1520 { 357, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 175, 5, 0, 0x0ULL }, // ADDErr
1521 { 356, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 172, 5, 0, 0x0ULL }, // ADDEri
1522 { 355, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ADDCrr
1523 { 354, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ADDCri
1524 { 353, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0, 0x0ULL }, // ADDCCrr
1525 { 352, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0, 0x0ULL }, // ADDCCri
1526 { 351, 0, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V8BAR
1527 { 350, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 169, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SETX
1528 { 349, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 167, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SETSW
1529 { 348, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 167, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SET
1530 { 347, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 163, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_QFP_XCC
1531 { 346, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 163, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_QFP_ICC
1532 { 345, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 163, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_QFP_FCC
1533 { 344, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 159, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_Int_XCC
1534 { 343, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 159, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_Int_ICC
1535 { 342, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 159, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_Int_FCC
1536 { 341, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 155, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_FP_XCC
1537 { 340, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 155, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_FP_ICC
1538 { 339, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 155, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_FP_FCC
1539 { 338, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 151, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_DFP_XCC
1540 { 337, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 151, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_DFP_ICC
1541 { 336, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 151, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_DFP_FCC
1542 { 335, 1, 1, 4, 0, 0, 1, SparcOpInfoBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GETPCX
1543 { 334, 2, 0, 4, 0, 1, 1, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKUP
1544 { 333, 2, 0, 4, 0, 1, 1, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKDOWN
1545 { 332, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UBFX
1546 { 331, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SBFX
1547 { 330, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMIN
1548 { 329, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMAX
1549 { 328, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMIN
1550 { 327, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMAX
1551 { 326, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_XOR
1552 { 325, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_OR
1553 { 324, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_AND
1554 { 323, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_MUL
1555 { 322, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_ADD
1556 { 321, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMINIMUMNUM
1557 { 320, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAXIMUMNUM
1558 { 319, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMINIMUM
1559 { 318, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAXIMUM
1560 { 317, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMIN
1561 { 316, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAX
1562 { 315, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMUL
1563 { 314, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FADD
1564 { 313, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FMUL
1565 { 312, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FADD
1566 { 311, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_UBSANTRAP
1567 { 310, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DEBUGTRAP
1568 { 309, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_TRAP
1569 { 308, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMSET_INLINE
1570 { 307, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_BZERO
1571 { 306, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMSET
1572 { 305, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMMOVE
1573 { 304, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY_INLINE
1574 { 303, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY
1575 { 302, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 141, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_WRITE_REGISTER
1576 { 301, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_READ_REGISTER
1577 { 300, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FCMPS
1578 { 299, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FCMP
1579 { 298, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FLDEXP
1580 { 297, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSQRT
1581 { 296, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMA
1582 { 295, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FREM
1583 { 294, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FDIV
1584 { 293, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMUL
1585 { 292, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSUB
1586 { 291, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FADD
1587 { 290, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKRESTORE
1588 { 289, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKSAVE
1589 { 288, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DYN_STACKALLOC
1590 { 287, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_JUMP_TABLE
1591 { 286, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BLOCK_ADDR
1592 { 285, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ADDRSPACE_CAST
1593 { 284, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEARBYINT
1594 { 283, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRINT
1595 { 282, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFLOOR
1596 { 281, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSQRT
1597 { 280, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTANH
1598 { 279, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINH
1599 { 278, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOSH
1600 { 277, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN2
1601 { 276, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN
1602 { 275, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FASIN
1603 { 274, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FACOS
1604 { 273, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTAN
1605 { 272, 3, 2, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINCOS
1606 { 271, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSIN
1607 { 270, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOS
1608 { 269, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCEIL
1609 { 268, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_CLMUL
1610 { 267, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITREVERSE
1611 { 266, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BSWAP
1612 { 265, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTPOP
1613 { 264, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLS
1614 { 263, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ_ZERO_POISON
1615 { 262, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ
1616 { 261, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ_ZERO_POISON
1617 { 260, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ
1618 { 259, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 137, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECTOR_COMPRESS
1619 { 258, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_STEP_VECTOR
1620 { 257, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SPLAT_VECTOR
1621 { 256, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 133, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHUFFLE_VECTOR
1622 { 255, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_VECTOR_ELT
1623 { 254, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 126, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_VECTOR_ELT
1624 { 253, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_SUBVECTOR
1625 { 252, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_SUBVECTOR
1626 { 251, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VSCALE
1627 { 250, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 123, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRJT
1628 { 249, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BR
1629 { 248, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LLROUND
1630 { 247, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LROUND
1631 { 246, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ABS
1632 { 245, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMAX
1633 { 244, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMIN
1634 { 243, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMAX
1635 { 242, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMIN
1636 { 241, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRMASK
1637 { 240, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTR_ADD
1638 { 239, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_ROUNDING
1639 { 238, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_ROUNDING
1640 { 237, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPMODE
1641 { 236, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPMODE
1642 { 235, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPMODE
1643 { 234, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPENV
1644 { 233, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPENV
1645 { 232, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPENV
1646 { 231, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUMNUM
1647 { 230, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUMNUM
1648 { 229, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUM
1649 { 228, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUM
1650 { 227, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM_IEEE
1651 { 226, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM_IEEE
1652 { 225, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM
1653 { 224, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM
1654 { 223, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCANONICALIZE
1655 { 222, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IS_FPCLASS
1656 { 221, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOPYSIGN
1657 { 220, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FABS
1658 { 219, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI_SAT
1659 { 218, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI_SAT
1660 { 217, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UITOFP
1661 { 216, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SITOFP
1662 { 215, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI
1663 { 214, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI
1664 { 213, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTRUNC
1665 { 212, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPEXT
1666 { 211, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEG
1667 { 210, 3, 2, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFREXP
1668 { 209, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLDEXP
1669 { 208, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG10
1670 { 207, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG2
1671 { 206, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG
1672 { 205, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP10
1673 { 204, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP2
1674 { 203, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP
1675 { 202, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOWI
1676 { 201, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOW
1677 { 200, 3, 2, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMODF
1678 { 199, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREM
1679 { 198, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FDIV
1680 { 197, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMAD
1681 { 196, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMA
1682 { 195, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMUL
1683 { 194, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSUB
1684 { 193, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FADD
1685 { 192, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIXSAT
1686 { 191, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIXSAT
1687 { 190, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIX
1688 { 189, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIX
1689 { 188, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIXSAT
1690 { 187, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIXSAT
1691 { 186, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIX
1692 { 185, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIX
1693 { 184, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSHLSAT
1694 { 183, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USHLSAT
1695 { 182, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBSAT
1696 { 181, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBSAT
1697 { 180, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDSAT
1698 { 179, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDSAT
1699 { 178, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULH
1700 { 177, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULH
1701 { 176, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULO
1702 { 175, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULO
1703 { 174, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBE
1704 { 173, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBO
1705 { 172, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SADDE
1706 { 171, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDO
1707 { 170, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBE
1708 { 169, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBO
1709 { 168, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UADDE
1710 { 167, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDO
1711 { 166, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SELECT
1712 { 165, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UCMP
1713 { 164, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SCMP
1714 { 163, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCMP
1715 { 162, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ICMP
1716 { 161, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTL
1717 { 160, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTR
1718 { 159, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHR
1719 { 158, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHL
1720 { 157, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASHR
1721 { 156, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LSHR
1722 { 155, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHL
1723 { 154, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ZEXT
1724 { 153, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT_INREG
1725 { 152, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT
1726 { 151, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VAARG
1727 { 150, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VASTART
1728 { 149, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCONSTANT
1729 { 148, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT
1730 { 147, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_USAT_U
1731 { 146, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_U
1732 { 145, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_S
1733 { 144, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC
1734 { 143, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ANYEXT
1735 { 142, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
1736 { 141, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT
1737 { 140, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_INTRINSIC_W_SIDE_EFFECTS
1738 { 139, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_INTRINSIC
1739 { 138, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_INVOKE_REGION_START
1740 { 137, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRINDIRECT
1741 { 136, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRCOND
1742 { 135, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 93, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_PREFETCH
1743 { 134, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_FENCE
1744 { 133, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_SAT
1745 { 132, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_COND
1746 { 131, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UDEC_WRAP
1747 { 130, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UINC_WRAP
1748 { 129, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUMNUM
1749 { 128, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUMNUM
1750 { 127, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUM
1751 { 126, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUM
1752 { 125, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMIN
1753 { 124, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAX
1754 { 123, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FSUB
1755 { 122, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FADD
1756 { 121, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMIN
1757 { 120, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMAX
1758 { 119, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MIN
1759 { 118, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MAX
1760 { 117, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XOR
1761 { 116, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_OR
1762 { 115, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_NAND
1763 { 114, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_AND
1764 { 113, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_SUB
1765 { 112, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_ADD
1766 { 111, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XCHG
1767 { 110, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG
1768 { 109, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 81, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
1769 { 108, 5, 1, 0, 0, 0, 0, SparcOpInfoBase + 76, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_INDEXED_STORE
1770 { 107, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_FPTRUNCSTORE
1771 { 106, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_STORE
1772 { 105, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_ZEXTLOAD
1773 { 104, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_SEXTLOAD
1774 { 103, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_LOAD
1775 { 102, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_FPEXTLOAD
1776 { 101, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_ZEXTLOAD
1777 { 100, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_SEXTLOAD
1778 { 99, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_LOAD
1779 { 98, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READSTEADYCOUNTER
1780 { 97, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READCYCLECOUNTER
1781 { 96, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUNDEVEN
1782 { 95, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LLRINT
1783 { 94, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LRINT
1784 { 93, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUND
1785 { 92, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_TRUNC
1786 { 91, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_FPTRUNC_ROUND
1787 { 90, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_FOLD_BARRIER
1788 { 89, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREEZE
1789 { 88, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITCAST
1790 { 87, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTTOPTR
1791 { 86, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRTOINT
1792 { 85, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_CONCAT_VECTORS
1793 { 84, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR_TRUNC
1794 { 83, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR
1795 { 82, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_MERGE_VALUES
1796 { 81, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT
1797 { 80, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_UNMERGE_VALUES
1798 { 79, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT
1799 { 78, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_POOL
1800 { 77, 5, 1, 0, 0, 0, 0, SparcOpInfoBase + 52, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRAUTH_GLOBAL_VALUE
1801 { 76, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_GLOBAL_VALUE
1802 { 75, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRAME_INDEX
1803 { 74, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_PHI
1804 { 73, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IMPLICIT_DEF
1805 { 72, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGCEIL
1806 { 71, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGFLOOR
1807 { 70, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGCEIL
1808 { 69, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGFLOOR
1809 { 68, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDU
1810 { 67, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDS
1811 { 66, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_XOR
1812 { 65, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_OR
1813 { 64, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_AND
1814 { 63, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVREM
1815 { 62, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVREM
1816 { 61, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UREM
1817 { 60, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SREM
1818 { 59, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIV
1819 { 58, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIV
1820 { 57, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_MUL
1821 { 56, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SUB
1822 { 55, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ADD
1823 { 54, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ALIGN
1824 { 53, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ZEXT
1825 { 52, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_SEXT
1826 { 51, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_GLUE
1827 { 50, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_LOOP
1828 { 49, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ANCHOR
1829 { 48, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ENTRY
1830 { 47, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RELOC_NONE
1831 { 46, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // JUMP_TABLE_DEBUG_INFO
1832 { 45, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MEMBARRIER
1833 { 44, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // FAKE_USE
1834 { 43, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ICALL_BRANCH_FUNNEL
1835 { 42, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 36, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_16840
1836 { 41, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_16839
1837 { 40, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_TAIL_CALL
1838 { 39, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_EXIT
1839 { 38, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_RET
1840 { 37, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_ENTER
1841 { 36, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_OP
1842 { 35, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FAULTING_OP
1843 { 34, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 32, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // LOCAL_ESCAPE
1844 { 33, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STATEPOINT
1845 { 32, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 29, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_16838
1846 { 31, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREALLOCATED_SETUP
1847 { 30, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 28, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // anonymous_13978
1848 { 29, 6, 1, 0, 0, 0, 0, SparcOpInfoBase + 22, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHPOINT
1849 { 28, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FENTRY_CALL
1850 { 27, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STACKMAP
1851 { 26, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 18, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // ARITH_FENCE
1852 { 25, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 14, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PSEUDO_PROBE
1853 { 24, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_END
1854 { 23, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_START
1855 { 22, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // BUNDLE
1856 { 21, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 11, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_LANEMASK
1857 { 20, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY
1858 { 19, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // REG_SEQUENCE
1859 { 18, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // DBG_LABEL
1860 { 17, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_PHI
1861 { 16, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_INSTR_REF
1862 { 15, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE_LIST
1863 { 14, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE
1864 { 13, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_TO_REGCLASS
1865 { 12, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // SUBREG_TO_REG
1866 { 11, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INIT_UNDEF
1867 { 10, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // IMPLICIT_DEF
1868 { 9, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 5, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INSERT_SUBREG
1869 { 8, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // EXTRACT_SUBREG
1870 { 7, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // KILL
1871 { 6, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // ANNOTATION_LABEL
1872 { 5, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // GC_LABEL
1873 { 4, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // EH_LABEL
1874 { 3, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // CFI_INSTRUCTION
1875 { 2, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INLINEASM_BR
1876 { 1, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // INLINEASM
1877 { 0, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // PHI
1878 }, {
1879 /* 0 */
1880 /* 0 */ SP::O6, SP::O6,
1881 /* 2 */ SP::O7,
1882 /* 3 */ SP::FCC0,
1883 /* 4 */ SP::ICC,
1884 /* 5 */ SP::ICC, SP::ICC,
1885 /* 7 */ SP::O6, SP::O7,
1886 /* 9 */ SP::ASR3,
1887 /* 10 */ SP::CPSR,
1888 /* 11 */ SP::FSR,
1889 /* 12 */ SP::D0, SP::D1, SP::D2, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7,
1890 /* 30 */ SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15, SP::D16, SP::D17, SP::D18, SP::D19, SP::D20, SP::D21, SP::D22, SP::D23, SP::D24, SP::D25, SP::D26, SP::D27, SP::D28, SP::D29, SP::D30, SP::D31, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15, SP::D16, SP::D17, SP::D18, SP::D19, SP::D20, SP::D21, SP::D22, SP::D23, SP::D24, SP::D25, SP::D26, SP::D27, SP::D28, SP::D29, SP::D30, SP::D31, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5,
1891 /* 134 */ SP::Y, SP::ICC, SP::Y, SP::ICC,
1892 /* 138 */ SP::PSR,
1893 /* 139 */ SP::FQ,
1894 /* 140 */ SP::TBR,
1895 /* 141 */ SP::WIM,
1896 /* 142 */ SP::Y, SP::Y, SP::ICC,
1897 /* 145 */ SP::Y, SP::Y,
1898 /* 147 */ SP::D0, SP::D1, SP::D2, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D0, SP::D1, SP::D2,
1899 /* 161 */ SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D0, SP::D1, SP::D2, SP::D3,
1900 /* 177 */ SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15, SP::D16, SP::D17, SP::D18, SP::D19, SP::D20, SP::D21, SP::D22, SP::D23, SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7,
1901 /* 209 */ SP::Y, SP::ASR18, SP::Y, SP::ASR18,
1902 /* 213 */ SP::Y, SP::ICC,
1903 /* 215 */ SP::Y,
1904 /* 216 */ SP::CPQ,
1905 /* 217 */ SP::O6,
1906 }, {
1907 0
1908 }, {
1909 /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1910 /* 1 */
1911 /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1912 /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1913 /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1914 /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1915 /* 11 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1916 /* 14 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1917 /* 18 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) },
1918 /* 20 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1919 /* 22 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1920 /* 28 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
1921 /* 29 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1922 /* 32 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1923 /* 34 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1924 /* 36 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1925 /* 39 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1926 /* 42 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1927 /* 45 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1928 /* 49 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1929 /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1930 /* 52 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1931 /* 57 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1932 /* 60 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1933 /* 62 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1934 /* 66 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1935 /* 68 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1936 /* 71 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1937 /* 76 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1938 /* 81 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1939 /* 86 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1940 /* 90 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1941 /* 93 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_2, 0 },
1942 /* 97 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1943 /* 100 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1944 /* 103 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1945 /* 107 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1946 /* 111 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1947 /* 114 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1948 /* 119 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1949 /* 123 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1950 /* 126 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
1951 /* 130 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
1952 /* 133 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1953 /* 137 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1954 /* 141 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1955 /* 143 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1956 /* 147 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1957 /* 151 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1958 /* 155 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1959 /* 159 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1960 /* 163 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1961 /* 167 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1962 /* 169 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1963 /* 172 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1964 /* 175 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1965 /* 178 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1966 /* 181 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1967 /* 185 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1968 /* 188 */ { -1, 0, MCOI::OPERAND_PCREL, 0 },
1969 /* 189 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1970 /* 191 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1971 /* 193 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
1972 /* 195 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1973 /* 198 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1974 /* 201 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1975 /* 203 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1976 /* 206 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1977 /* 209 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
1978 /* 213 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1979 /* 218 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
1980 /* 222 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1981 /* 227 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1982 /* 228 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1983 /* 232 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1984 /* 236 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1985 /* 238 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1986 /* 241 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1987 /* 243 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1988 /* 245 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1989 /* 248 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1990 /* 251 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1991 /* 254 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1992 /* 257 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1993 /* 259 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1994 /* 261 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1995 /* 263 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1996 /* 265 */ { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1997 /* 268 */ { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1998 /* 271 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1999 /* 275 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2000 /* 279 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2001 /* 283 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2002 /* 288 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2003 /* 293 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2004 /* 298 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2005 /* 302 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2006 /* 305 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2007 /* 308 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2008 /* 309 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2009 /* 310 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2010 /* 312 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2011 /* 314 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2012 /* 318 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2013 /* 322 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2014 /* 325 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2015 /* 328 */ { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2016 /* 331 */ { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2017 /* 334 */ { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2018 /* 337 */ { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2019 /* 341 */ { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2020 /* 344 */ { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2021 /* 347 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2022 /* 350 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2023 /* 354 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2024 /* 357 */ { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2025 /* 360 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2026 /* 363 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2027 /* 367 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2028 /* 370 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2029 /* 373 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2030 /* 377 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2031 /* 380 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2032 /* 383 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2033 /* 386 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2034 /* 388 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2035 /* 390 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2036 /* 394 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2037 /* 398 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2038 /* 403 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2039 /* 408 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2040 /* 410 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2041 /* 412 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2042 /* 414 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2043 /* 417 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2044 /* 419 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2045 /* 422 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2046 /* 426 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2047 /* 429 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2048 /* 431 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2049 /* 432 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2050 /* 434 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2051 /* 437 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2052 /* 440 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2053 /* 443 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2054 /* 446 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2055 /* 450 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2056 /* 453 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2057 /* 456 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2058 /* 459 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2059 /* 462 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2060 /* 466 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2061 /* 469 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2062 /* 472 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2063 /* 475 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2064 /* 479 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2065 /* 482 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2066 /* 485 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2067 /* 488 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2068 /* 492 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2069 /* 495 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2070 /* 498 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2071 /* 502 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2072 /* 505 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2073 /* 508 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2074 /* 512 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2075 /* 515 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
2076 /* 519 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
2077 /* 524 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
2078 /* 528 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2079 /* 531 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2080 /* 535 */ { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2081 /* 538 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2082 /* 543 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2083 /* 548 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2084 /* 553 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2085 /* 558 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2086 /* 563 */ { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2087 /* 566 */ { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2088 /* 569 */ { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2089 /* 572 */ { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2090 }
2091};
2092
2093
2094#ifdef __GNUC__
2095#pragma GCC diagnostic push
2096#pragma GCC diagnostic ignored "-Woverlength-strings"
2097#endif
2098extern const char SparcInstrNameData[] = {
2099 /* 0 */ "G_FLOG10\000"
2100 /* 9 */ "G_FEXP10\000"
2101 /* 18 */ "AES_KEXPAND0\000"
2102 /* 31 */ "AES_DROUND01\000"
2103 /* 44 */ "AES_EROUND01\000"
2104 /* 57 */ "SHA1\000"
2105 /* 62 */ "TA1\000"
2106 /* 66 */ "FSRC1\000"
2107 /* 72 */ "AES_KEXPAND1\000"
2108 /* 85 */ "FANDNOT1\000"
2109 /* 94 */ "FNOT1\000"
2110 /* 100 */ "FORNOT1\000"
2111 /* 108 */ "SHA512\000"
2112 /* 115 */ "FSRA32\000"
2113 /* 122 */ "FPSUB32\000"
2114 /* 130 */ "FPADD32\000"
2115 /* 138 */ "EDGE32\000"
2116 /* 145 */ "FCMPLE32\000"
2117 /* 154 */ "FCMPNE32\000"
2118 /* 163 */ "FPACK32\000"
2119 /* 171 */ "CMASK32\000"
2120 /* 179 */ "FSLL32\000"
2121 /* 186 */ "FSRL32\000"
2122 /* 193 */ "FCMPEQ32\000"
2123 /* 202 */ "FSLAS32\000"
2124 /* 210 */ "FCMPGT32\000"
2125 /* 219 */ "ARRAY32\000"
2126 /* 227 */ "FSRC2\000"
2127 /* 233 */ "AES_KEXPAND2\000"
2128 /* 246 */ "G_FLOG2\000"
2129 /* 254 */ "G_FATAN2\000"
2130 /* 263 */ "G_FEXP2\000"
2131 /* 271 */ "FANDNOT2\000"
2132 /* 280 */ "FNOT2\000"
2133 /* 286 */ "FORNOT2\000"
2134 /* 294 */ "AES_DROUND23\000"
2135 /* 307 */ "AES_EROUND23\000"
2136 /* 320 */ "TA3\000"
2137 /* 324 */ "FPADD64\000"
2138 /* 332 */ "TA5\000"
2139 /* 336 */ "MD5\000"
2140 /* 340 */ "FSRA16\000"
2141 /* 347 */ "FPSUB16\000"
2142 /* 355 */ "FPADD16\000"
2143 /* 363 */ "EDGE16\000"
2144 /* 370 */ "FCMPLE16\000"
2145 /* 379 */ "FCMPNE16\000"
2146 /* 388 */ "FPACK16\000"
2147 /* 396 */ "CMASK16\000"
2148 /* 404 */ "FSLL16\000"
2149 /* 411 */ "FSRL16\000"
2150 /* 418 */ "FCHKSM16\000"
2151 /* 427 */ "FMEAN16\000"
2152 /* 435 */ "FCMPEQ16\000"
2153 /* 444 */ "FSLAS16\000"
2154 /* 452 */ "FCMPGT16\000"
2155 /* 461 */ "FMUL8X16\000"
2156 /* 470 */ "FMULD8ULX16\000"
2157 /* 482 */ "FMUL8ULX16\000"
2158 /* 493 */ "FMULD8SUX16\000"
2159 /* 505 */ "FMUL8SUX16\000"
2160 /* 516 */ "ARRAY16\000"
2161 /* 524 */ "SHA256\000"
2162 /* 531 */ "EDGE8\000"
2163 /* 537 */ "CMASK8\000"
2164 /* 544 */ "ARRAY8\000"
2165 /* 551 */ "FBCONDA_V9\000"
2166 /* 562 */ "FBCOND_V9\000"
2167 /* 572 */ "FCMPD_V9\000"
2168 /* 581 */ "FCMPQ_V9\000"
2169 /* 590 */ "FCMPS_V9\000"
2170 /* 599 */ "BA\000"
2171 /* 602 */ "BPFCCA\000"
2172 /* 609 */ "BPICCA\000"
2173 /* 616 */ "BPXCCA\000"
2174 /* 623 */ "FBCONDA\000"
2175 /* 631 */ "CPBCONDA\000"
2176 /* 640 */ "G_FMA\000"
2177 /* 646 */ "G_STRICT_FMA\000"
2178 /* 659 */ "BPRA\000"
2179 /* 664 */ "FALIGNADATA\000"
2180 /* 676 */ "G_FSUB\000"
2181 /* 683 */ "G_STRICT_FSUB\000"
2182 /* 697 */ "G_ATOMICRMW_FSUB\000"
2183 /* 714 */ "G_SUB\000"
2184 /* 720 */ "G_ATOMICRMW_SUB\000"
2185 /* 736 */ "CRC32C\000"
2186 /* 743 */ "ADDXCCC\000"
2187 /* 751 */ "BPFCC\000"
2188 /* 757 */ "V9FMOVD_FCC\000"
2189 /* 769 */ "SELECT_CC_DFP_FCC\000"
2190 /* 787 */ "SELECT_CC_QFP_FCC\000"
2191 /* 805 */ "SELECT_CC_FP_FCC\000"
2192 /* 822 */ "V9FMOVQ_FCC\000"
2193 /* 834 */ "V9FMOVS_FCC\000"
2194 /* 846 */ "SELECT_CC_Int_FCC\000"
2195 /* 864 */ "BPICC\000"
2196 /* 870 */ "FMOVD_ICC\000"
2197 /* 880 */ "SELECT_CC_DFP_ICC\000"
2198 /* 898 */ "SELECT_CC_QFP_ICC\000"
2199 /* 916 */ "SELECT_CC_FP_ICC\000"
2200 /* 933 */ "FMOVQ_ICC\000"
2201 /* 943 */ "FMOVS_ICC\000"
2202 /* 953 */ "SELECT_CC_Int_ICC\000"
2203 /* 971 */ "BPXCC\000"
2204 /* 977 */ "FMOVD_XCC\000"
2205 /* 987 */ "SELECT_CC_DFP_XCC\000"
2206 /* 1005 */ "SELECT_CC_QFP_XCC\000"
2207 /* 1023 */ "SELECT_CC_FP_XCC\000"
2208 /* 1040 */ "FMOVQ_XCC\000"
2209 /* 1050 */ "FMOVS_XCC\000"
2210 /* 1060 */ "SELECT_CC_Int_XCC\000"
2211 /* 1078 */ "G_INTRINSIC\000"
2212 /* 1090 */ "G_FPTRUNC\000"
2213 /* 1100 */ "G_INTRINSIC_TRUNC\000"
2214 /* 1118 */ "G_TRUNC\000"
2215 /* 1126 */ "G_BUILD_VECTOR_TRUNC\000"
2216 /* 1147 */ "G_DYN_STACKALLOC\000"
2217 /* 1164 */ "ADDXC\000"
2218 /* 1170 */ "G_FMAD\000"
2219 /* 1177 */ "G_FPEXTLOAD\000"
2220 /* 1189 */ "G_INDEXED_SEXTLOAD\000"
2221 /* 1208 */ "G_SEXTLOAD\000"
2222 /* 1219 */ "G_INDEXED_ZEXTLOAD\000"
2223 /* 1238 */ "G_ZEXTLOAD\000"
2224 /* 1249 */ "G_INDEXED_LOAD\000"
2225 /* 1264 */ "G_LOAD\000"
2226 /* 1271 */ "FSUBD\000"
2227 /* 1277 */ "FHSUBD\000"
2228 /* 1284 */ "FMSUBD\000"
2229 /* 1291 */ "FNMSUBD\000"
2230 /* 1299 */ "G_VECREDUCE_FADD\000"
2231 /* 1316 */ "G_FADD\000"
2232 /* 1323 */ "G_VECREDUCE_SEQ_FADD\000"
2233 /* 1344 */ "G_STRICT_FADD\000"
2234 /* 1358 */ "G_ATOMICRMW_FADD\000"
2235 /* 1375 */ "G_VECREDUCE_ADD\000"
2236 /* 1391 */ "G_ADD\000"
2237 /* 1397 */ "G_PTR_ADD\000"
2238 /* 1407 */ "G_ATOMICRMW_ADD\000"
2239 /* 1423 */ "FADDD\000"
2240 /* 1429 */ "FHADDD\000"
2241 /* 1436 */ "FNHADDD\000"
2242 /* 1444 */ "FMADDD\000"
2243 /* 1451 */ "FNMADDD\000"
2244 /* 1459 */ "FNADDD\000"
2245 /* 1466 */ "V9FCMPED\000"
2246 /* 1475 */ "RESTORED\000"
2247 /* 1484 */ "SAVED\000"
2248 /* 1490 */ "FNEGD\000"
2249 /* 1496 */ "FMULD\000"
2250 /* 1502 */ "FNMULD\000"
2251 /* 1509 */ "FSMULD\000"
2252 /* 1516 */ "FNSMULD\000"
2253 /* 1524 */ "FAND\000"
2254 /* 1529 */ "FNAND\000"
2255 /* 1535 */ "G_ATOMICRMW_NAND\000"
2256 /* 1552 */ "FEXPAND\000"
2257 /* 1560 */ "DES_KEXPAND\000"
2258 /* 1572 */ "G_VECREDUCE_AND\000"
2259 /* 1588 */ "G_AND\000"
2260 /* 1594 */ "G_ATOMICRMW_AND\000"
2261 /* 1610 */ "LIFETIME_END\000"
2262 /* 1623 */ "FBCOND\000"
2263 /* 1630 */ "CPBCOND\000"
2264 /* 1638 */ "G_BRCOND\000"
2265 /* 1647 */ "G_ATOMICRMW_USUB_COND\000"
2266 /* 1669 */ "G_LLROUND\000"
2267 /* 1679 */ "G_LROUND\000"
2268 /* 1688 */ "G_INTRINSIC_ROUND\000"
2269 /* 1706 */ "G_INTRINSIC_FPTRUNC_ROUND\000"
2270 /* 1732 */ "DES_ROUND\000"
2271 /* 1742 */ "FITOD\000"
2272 /* 1748 */ "FQTOD\000"
2273 /* 1754 */ "FSTOD\000"
2274 /* 1760 */ "FXTOD\000"
2275 /* 1766 */ "MOVXTOD\000"
2276 /* 1774 */ "V9FCMPD\000"
2277 /* 1782 */ "FLCMPD\000"
2278 /* 1789 */ "LOAD_STACK_GUARD\000"
2279 /* 1806 */ "FMOVRD\000"
2280 /* 1813 */ "FABSD\000"
2281 /* 1819 */ "FSQRTD\000"
2282 /* 1826 */ "FDIVD\000"
2283 /* 1832 */ "FMOVD\000"
2284 /* 1838 */ "PSEUDO_PROBE\000"
2285 /* 1851 */ "G_SSUBE\000"
2286 /* 1859 */ "G_USUBE\000"
2287 /* 1867 */ "G_FENCE\000"
2288 /* 1875 */ "ARITH_FENCE\000"
2289 /* 1887 */ "REG_SEQUENCE\000"
2290 /* 1900 */ "G_SADDE\000"
2291 /* 1908 */ "G_UADDE\000"
2292 /* 1916 */ "G_GET_FPMODE\000"
2293 /* 1929 */ "G_RESET_FPMODE\000"
2294 /* 1944 */ "G_SET_FPMODE\000"
2295 /* 1957 */ "G_FMINNUM_IEEE\000"
2296 /* 1972 */ "G_FMAXNUM_IEEE\000"
2297 /* 1987 */ "FPMERGE\000"
2298 /* 1995 */ "G_VSCALE\000"
2299 /* 2004 */ "G_JUMP_TABLE\000"
2300 /* 2017 */ "BUNDLE\000"
2301 /* 2024 */ "BSHUFFLE\000"
2302 /* 2033 */ "G_MEMSET_INLINE\000"
2303 /* 2049 */ "G_MEMCPY_INLINE\000"
2304 /* 2065 */ "DONE\000"
2305 /* 2070 */ "FONE\000"
2306 /* 2075 */ "RELOC_NONE\000"
2307 /* 2086 */ "LOCAL_ESCAPE\000"
2308 /* 2099 */ "G_FPTRUNCSTORE\000"
2309 /* 2114 */ "G_STACKRESTORE\000"
2310 /* 2129 */ "G_INDEXED_STORE\000"
2311 /* 2145 */ "G_STORE\000"
2312 /* 2153 */ "G_BITREVERSE\000"
2313 /* 2166 */ "FAKE_USE\000"
2314 /* 2175 */ "DBG_VALUE\000"
2315 /* 2185 */ "G_GLOBAL_VALUE\000"
2316 /* 2200 */ "G_PTRAUTH_GLOBAL_VALUE\000"
2317 /* 2223 */ "CONVERGENCECTRL_GLUE\000"
2318 /* 2244 */ "G_STACKSAVE\000"
2319 /* 2256 */ "G_MEMMOVE\000"
2320 /* 2266 */ "G_FREEZE\000"
2321 /* 2275 */ "G_FCANONICALIZE\000"
2322 /* 2291 */ "G_FMODF\000"
2323 /* 2299 */ "INIT_UNDEF\000"
2324 /* 2310 */ "G_IMPLICIT_DEF\000"
2325 /* 2325 */ "DBG_INSTR_REF\000"
2326 /* 2339 */ "CAMELLIA_F\000"
2327 /* 2350 */ "G_FNEG\000"
2328 /* 2357 */ "EXTRACT_SUBREG\000"
2329 /* 2372 */ "INSERT_SUBREG\000"
2330 /* 2386 */ "G_SEXT_INREG\000"
2331 /* 2399 */ "SUBREG_TO_REG\000"
2332 /* 2413 */ "G_ATOMIC_CMPXCHG\000"
2333 /* 2430 */ "G_ATOMICRMW_XCHG\000"
2334 /* 2447 */ "G_GET_ROUNDING\000"
2335 /* 2462 */ "G_SET_ROUNDING\000"
2336 /* 2477 */ "G_FLOG\000"
2337 /* 2484 */ "G_VAARG\000"
2338 /* 2492 */ "PREALLOCATED_ARG\000"
2339 /* 2509 */ "G_PREFETCH\000"
2340 /* 2520 */ "G_SMULH\000"
2341 /* 2528 */ "G_UMULH\000"
2342 /* 2536 */ "G_FTANH\000"
2343 /* 2544 */ "G_FSINH\000"
2344 /* 2552 */ "G_FCOSH\000"
2345 /* 2560 */ "FLUSH\000"
2346 /* 2566 */ "DBG_PHI\000"
2347 /* 2574 */ "FPMADDXHI\000"
2348 /* 2584 */ "UMULXHI\000"
2349 /* 2592 */ "XMULXHI\000"
2350 /* 2600 */ "CAMELLIA_FLI\000"
2351 /* 2613 */ "FDTOI\000"
2352 /* 2619 */ "FQTOI\000"
2353 /* 2625 */ "FSTOI\000"
2354 /* 2631 */ "G_FPTOSI\000"
2355 /* 2640 */ "G_FPTOUI\000"
2356 /* 2649 */ "G_FPOWI\000"
2357 /* 2657 */ "BMASK\000"
2358 /* 2663 */ "COPY_LANEMASK\000"
2359 /* 2677 */ "G_PTRMASK\000"
2360 /* 2687 */ "EDGE32L\000"
2361 /* 2695 */ "EDGE16L\000"
2362 /* 2703 */ "EDGE8L\000"
2363 /* 2710 */ "FMUL8X16AL\000"
2364 /* 2721 */ "GC_LABEL\000"
2365 /* 2730 */ "DBG_LABEL\000"
2366 /* 2740 */ "EH_LABEL\000"
2367 /* 2749 */ "ANNOTATION_LABEL\000"
2368 /* 2766 */ "ICALL_BRANCH_FUNNEL\000"
2369 /* 2786 */ "CAMELLIA_FL\000"
2370 /* 2798 */ "G_FSHL\000"
2371 /* 2805 */ "G_SHL\000"
2372 /* 2811 */ "G_FCEIL\000"
2373 /* 2819 */ "G_SAVGCEIL\000"
2374 /* 2830 */ "G_UAVGCEIL\000"
2375 /* 2841 */ "PATCHABLE_TAIL_CALL\000"
2376 /* 2861 */ "TLS_CALL\000"
2377 /* 2870 */ "PATCHABLE_TYPED_EVENT_CALL\000"
2378 /* 2897 */ "PATCHABLE_EVENT_CALL\000"
2379 /* 2918 */ "FENTRY_CALL\000"
2380 /* 2930 */ "KILL\000"
2381 /* 2935 */ "G_CONSTANT_POOL\000"
2382 /* 2951 */ "ALIGNADDRL\000"
2383 /* 2962 */ "RETL\000"
2384 /* 2967 */ "G_ROTL\000"
2385 /* 2974 */ "G_VECREDUCE_FMUL\000"
2386 /* 2991 */ "G_FMUL\000"
2387 /* 2998 */ "G_VECREDUCE_SEQ_FMUL\000"
2388 /* 3019 */ "G_STRICT_FMUL\000"
2389 /* 3033 */ "G_CLMUL\000"
2390 /* 3041 */ "MPMUL\000"
2391 /* 3047 */ "MONTMUL\000"
2392 /* 3055 */ "G_VECREDUCE_MUL\000"
2393 /* 3071 */ "G_MUL\000"
2394 /* 3077 */ "SIAM\000"
2395 /* 3082 */ "G_FREM\000"
2396 /* 3089 */ "G_STRICT_FREM\000"
2397 /* 3103 */ "G_SREM\000"
2398 /* 3110 */ "G_UREM\000"
2399 /* 3117 */ "G_SDIVREM\000"
2400 /* 3127 */ "G_UDIVREM\000"
2401 /* 3137 */ "RDWIM\000"
2402 /* 3143 */ "INLINEASM\000"
2403 /* 3153 */ "G_VECREDUCE_FMINIMUM\000"
2404 /* 3174 */ "G_FMINIMUM\000"
2405 /* 3185 */ "G_ATOMICRMW_FMINIMUM\000"
2406 /* 3206 */ "G_VECREDUCE_FMAXIMUM\000"
2407 /* 3227 */ "G_FMAXIMUM\000"
2408 /* 3238 */ "G_ATOMICRMW_FMAXIMUM\000"
2409 /* 3259 */ "G_VECREDUCE_FMINIMUMNUM\000"
2410 /* 3283 */ "G_FMINIMUMNUM\000"
2411 /* 3297 */ "G_ATOMICRMW_FMINIMUMNUM\000"
2412 /* 3321 */ "G_VECREDUCE_FMAXIMUMNUM\000"
2413 /* 3345 */ "G_FMAXIMUMNUM\000"
2414 /* 3359 */ "G_ATOMICRMW_FMAXIMUMNUM\000"
2415 /* 3383 */ "G_FMINNUM\000"
2416 /* 3393 */ "G_FMAXNUM\000"
2417 /* 3403 */ "EDGE32N\000"
2418 /* 3411 */ "EDGE16N\000"
2419 /* 3419 */ "EDGE8N\000"
2420 /* 3426 */ "ALLCLEAN\000"
2421 /* 3435 */ "G_FATAN\000"
2422 /* 3443 */ "G_FTAN\000"
2423 /* 3450 */ "G_INTRINSIC_ROUNDEVEN\000"
2424 /* 3472 */ "G_ASSERT_ALIGN\000"
2425 /* 3487 */ "G_FCOPYSIGN\000"
2426 /* 3499 */ "G_VECREDUCE_FMIN\000"
2427 /* 3516 */ "G_ATOMICRMW_FMIN\000"
2428 /* 3533 */ "G_VECREDUCE_SMIN\000"
2429 /* 3550 */ "G_SMIN\000"
2430 /* 3557 */ "G_VECREDUCE_UMIN\000"
2431 /* 3574 */ "G_UMIN\000"
2432 /* 3581 */ "G_ATOMICRMW_UMIN\000"
2433 /* 3598 */ "G_ATOMICRMW_MIN\000"
2434 /* 3614 */ "G_FASIN\000"
2435 /* 3622 */ "G_FSIN\000"
2436 /* 3629 */ "EDGE32LN\000"
2437 /* 3638 */ "EDGE16LN\000"
2438 /* 3647 */ "EDGE8LN\000"
2439 /* 3655 */ "CFI_INSTRUCTION\000"
2440 /* 3671 */ "G_CTLZ_ZERO_POISON\000"
2441 /* 3690 */ "G_CTTZ_ZERO_POISON\000"
2442 /* 3709 */ "PDISTN\000"
2443 /* 3716 */ "ADJCALLSTACKDOWN\000"
2444 /* 3733 */ "SHUTDOWN\000"
2445 /* 3742 */ "G_SSUBO\000"
2446 /* 3750 */ "G_USUBO\000"
2447 /* 3758 */ "G_SADDO\000"
2448 /* 3766 */ "G_UADDO\000"
2449 /* 3774 */ "JUMP_TABLE_DEBUG_INFO\000"
2450 /* 3796 */ "G_SMULO\000"
2451 /* 3804 */ "G_UMULO\000"
2452 /* 3812 */ "G_BZERO\000"
2453 /* 3820 */ "FZERO\000"
2454 /* 3826 */ "STACKMAP\000"
2455 /* 3835 */ "G_DEBUGTRAP\000"
2456 /* 3847 */ "G_UBSANTRAP\000"
2457 /* 3859 */ "G_TRAP\000"
2458 /* 3866 */ "G_ATOMICRMW_UDEC_WRAP\000"
2459 /* 3888 */ "G_ATOMICRMW_UINC_WRAP\000"
2460 /* 3910 */ "G_BSWAP\000"
2461 /* 3918 */ "G_SITOFP\000"
2462 /* 3927 */ "G_UITOFP\000"
2463 /* 3936 */ "DES_IIP\000"
2464 /* 3944 */ "DES_IP\000"
2465 /* 3951 */ "G_FCMP\000"
2466 /* 3958 */ "G_STRICT_FCMP\000"
2467 /* 3972 */ "G_ICMP\000"
2468 /* 3979 */ "G_SCMP\000"
2469 /* 3986 */ "G_UCMP\000"
2470 /* 3993 */ "UNIMP\000"
2471 /* 3999 */ "NOP\000"
2472 /* 4003 */ "CONVERGENCECTRL_LOOP\000"
2473 /* 4024 */ "G_CTPOP\000"
2474 /* 4032 */ "PATCHABLE_OP\000"
2475 /* 4045 */ "FAULTING_OP\000"
2476 /* 4057 */ "ADJCALLSTACKUP\000"
2477 /* 4072 */ "PREALLOCATED_SETUP\000"
2478 /* 4091 */ "G_FLDEXP\000"
2479 /* 4100 */ "G_STRICT_FLDEXP\000"
2480 /* 4116 */ "G_FEXP\000"
2481 /* 4123 */ "G_FFREXP\000"
2482 /* 4132 */ "FSUBQ\000"
2483 /* 4138 */ "FADDQ\000"
2484 /* 4144 */ "V9FCMPEQ\000"
2485 /* 4153 */ "RDFQ\000"
2486 /* 4158 */ "FNEGQ\000"
2487 /* 4164 */ "FDMULQ\000"
2488 /* 4171 */ "FMULQ\000"
2489 /* 4177 */ "FDTOQ\000"
2490 /* 4183 */ "FITOQ\000"
2491 /* 4189 */ "FSTOQ\000"
2492 /* 4195 */ "FXTOQ\000"
2493 /* 4201 */ "V9FCMPQ\000"
2494 /* 4209 */ "FMOVRQ\000"
2495 /* 4216 */ "FABSQ\000"
2496 /* 4222 */ "FSQRTQ\000"
2497 /* 4229 */ "FDIVQ\000"
2498 /* 4235 */ "FMOVQ\000"
2499 /* 4241 */ "V8BAR\000"
2500 /* 4247 */ "STBAR\000"
2501 /* 4253 */ "RDTBR\000"
2502 /* 4259 */ "G_BR\000"
2503 /* 4264 */ "INLINEASM_BR\000"
2504 /* 4277 */ "ALIGNADDR\000"
2505 /* 4287 */ "G_BLOCK_ADDR\000"
2506 /* 4300 */ "MEMBARRIER\000"
2507 /* 4311 */ "G_CONSTANT_FOLD_BARRIER\000"
2508 /* 4335 */ "PATCHABLE_FUNCTION_ENTER\000"
2509 /* 4360 */ "G_READCYCLECOUNTER\000"
2510 /* 4379 */ "G_READSTEADYCOUNTER\000"
2511 /* 4399 */ "G_READ_REGISTER\000"
2512 /* 4415 */ "G_WRITE_REGISTER\000"
2513 /* 4432 */ "G_ASHR\000"
2514 /* 4439 */ "G_FSHR\000"
2515 /* 4446 */ "G_LSHR\000"
2516 /* 4453 */ "SIR\000"
2517 /* 4457 */ "FOR\000"
2518 /* 4461 */ "CONVERGENCECTRL_ANCHOR\000"
2519 /* 4484 */ "FNOR\000"
2520 /* 4489 */ "FXNOR\000"
2521 /* 4495 */ "G_FFLOOR\000"
2522 /* 4504 */ "G_SAVGFLOOR\000"
2523 /* 4516 */ "G_UAVGFLOOR\000"
2524 /* 4528 */ "G_EXTRACT_SUBVECTOR\000"
2525 /* 4548 */ "G_INSERT_SUBVECTOR\000"
2526 /* 4567 */ "G_BUILD_VECTOR\000"
2527 /* 4582 */ "G_SHUFFLE_VECTOR\000"
2528 /* 4599 */ "G_STEP_VECTOR\000"
2529 /* 4613 */ "G_SPLAT_VECTOR\000"
2530 /* 4628 */ "FXOR\000"
2531 /* 4633 */ "G_VECREDUCE_XOR\000"
2532 /* 4649 */ "G_XOR\000"
2533 /* 4655 */ "G_ATOMICRMW_XOR\000"
2534 /* 4671 */ "G_VECREDUCE_OR\000"
2535 /* 4686 */ "G_OR\000"
2536 /* 4691 */ "G_ATOMICRMW_OR\000"
2537 /* 4706 */ "BPR\000"
2538 /* 4710 */ "RDPR\000"
2539 /* 4715 */ "MONTSQR\000"
2540 /* 4723 */ "RDASR\000"
2541 /* 4729 */ "RDPSR\000"
2542 /* 4735 */ "G_ROTR\000"
2543 /* 4742 */ "G_INTTOPTR\000"
2544 /* 4753 */ "FSRC1S\000"
2545 /* 4760 */ "FANDNOT1S\000"
2546 /* 4770 */ "FNOT1S\000"
2547 /* 4777 */ "FORNOT1S\000"
2548 /* 4786 */ "FPSUB32S\000"
2549 /* 4795 */ "FPADD32S\000"
2550 /* 4804 */ "FSRC2S\000"
2551 /* 4811 */ "FANDNOT2S\000"
2552 /* 4821 */ "FNOT2S\000"
2553 /* 4828 */ "FORNOT2S\000"
2554 /* 4837 */ "FPSUB16S\000"
2555 /* 4846 */ "FPADD16S\000"
2556 /* 4855 */ "G_FABS\000"
2557 /* 4862 */ "G_ABS\000"
2558 /* 4868 */ "FSUBS\000"
2559 /* 4874 */ "FHSUBS\000"
2560 /* 4881 */ "FMSUBS\000"
2561 /* 4888 */ "FNMSUBS\000"
2562 /* 4896 */ "G_ABDS\000"
2563 /* 4903 */ "FADDS\000"
2564 /* 4909 */ "FHADDS\000"
2565 /* 4916 */ "FNHADDS\000"
2566 /* 4924 */ "FMADDS\000"
2567 /* 4931 */ "FNMADDS\000"
2568 /* 4939 */ "FNADDS\000"
2569 /* 4946 */ "FANDS\000"
2570 /* 4952 */ "FNANDS\000"
2571 /* 4959 */ "FONES\000"
2572 /* 4965 */ "V9FCMPES\000"
2573 /* 4974 */ "G_UNMERGE_VALUES\000"
2574 /* 4991 */ "G_MERGE_VALUES\000"
2575 /* 5006 */ "FNEGS\000"
2576 /* 5012 */ "G_CTLS\000"
2577 /* 5019 */ "FMULS\000"
2578 /* 5025 */ "FNMULS\000"
2579 /* 5032 */ "G_FACOS\000"
2580 /* 5040 */ "G_FCOS\000"
2581 /* 5047 */ "G_FSINCOS\000"
2582 /* 5057 */ "FZEROS\000"
2583 /* 5064 */ "FDTOS\000"
2584 /* 5070 */ "FITOS\000"
2585 /* 5076 */ "FQTOS\000"
2586 /* 5082 */ "MOVWTOS\000"
2587 /* 5090 */ "FXTOS\000"
2588 /* 5096 */ "V9FCMPS\000"
2589 /* 5104 */ "G_STRICT_FCMPS\000"
2590 /* 5119 */ "FLCMPS\000"
2591 /* 5126 */ "FORS\000"
2592 /* 5131 */ "FNORS\000"
2593 /* 5137 */ "FXNORS\000"
2594 /* 5144 */ "G_CONCAT_VECTORS\000"
2595 /* 5161 */ "FXORS\000"
2596 /* 5167 */ "FMOVRS\000"
2597 /* 5174 */ "COPY_TO_REGCLASS\000"
2598 /* 5191 */ "G_IS_FPCLASS\000"
2599 /* 5204 */ "FABSS\000"
2600 /* 5210 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\000"
2601 /* 5240 */ "G_VECTOR_COMPRESS\000"
2602 /* 5258 */ "G_INTRINSIC_W_SIDE_EFFECTS\000"
2603 /* 5285 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\000"
2604 /* 5323 */ "FSQRTS\000"
2605 /* 5330 */ "FDIVS\000"
2606 /* 5336 */ "FMOVS\000"
2607 /* 5342 */ "G_TRUNC_SSAT_S\000"
2608 /* 5357 */ "G_SSUBSAT\000"
2609 /* 5367 */ "G_USUBSAT\000"
2610 /* 5377 */ "G_SADDSAT\000"
2611 /* 5387 */ "G_UADDSAT\000"
2612 /* 5397 */ "G_SSHLSAT\000"
2613 /* 5407 */ "G_USHLSAT\000"
2614 /* 5417 */ "G_SMULFIXSAT\000"
2615 /* 5430 */ "G_UMULFIXSAT\000"
2616 /* 5443 */ "G_SDIVFIXSAT\000"
2617 /* 5456 */ "G_UDIVFIXSAT\000"
2618 /* 5469 */ "G_ATOMICRMW_USUB_SAT\000"
2619 /* 5490 */ "G_FPTOSI_SAT\000"
2620 /* 5503 */ "G_FPTOUI_SAT\000"
2621 /* 5516 */ "G_EXTRACT\000"
2622 /* 5526 */ "G_SELECT\000"
2623 /* 5535 */ "G_BRINDIRECT\000"
2624 /* 5548 */ "PATCHABLE_RET\000"
2625 /* 5562 */ "G_MEMSET\000"
2626 /* 5571 */ "PATCHABLE_FUNCTION_EXIT\000"
2627 /* 5595 */ "G_BRJT\000"
2628 /* 5602 */ "G_EXTRACT_VECTOR_ELT\000"
2629 /* 5623 */ "G_INSERT_VECTOR_ELT\000"
2630 /* 5643 */ "BPFCCANT\000"
2631 /* 5652 */ "BPICCANT\000"
2632 /* 5661 */ "BPXCCANT\000"
2633 /* 5670 */ "BPRANT\000"
2634 /* 5677 */ "G_FCONSTANT\000"
2635 /* 5689 */ "G_CONSTANT\000"
2636 /* 5700 */ "BPFCCNT\000"
2637 /* 5708 */ "BPICCNT\000"
2638 /* 5716 */ "BPXCCNT\000"
2639 /* 5724 */ "LZCNT\000"
2640 /* 5730 */ "G_INTRINSIC_CONVERGENT\000"
2641 /* 5753 */ "STATEPOINT\000"
2642 /* 5764 */ "PATCHPOINT\000"
2643 /* 5775 */ "G_PTRTOINT\000"
2644 /* 5786 */ "G_FRINT\000"
2645 /* 5794 */ "G_INTRINSIC_LLRINT\000"
2646 /* 5813 */ "G_INTRINSIC_LRINT\000"
2647 /* 5831 */ "G_FNEARBYINT\000"
2648 /* 5844 */ "BPRNT\000"
2649 /* 5850 */ "G_VASTART\000"
2650 /* 5860 */ "LIFETIME_START\000"
2651 /* 5875 */ "G_INVOKE_REGION_START\000"
2652 /* 5897 */ "G_INSERT\000"
2653 /* 5906 */ "G_FSQRT\000"
2654 /* 5914 */ "G_STRICT_FSQRT\000"
2655 /* 5929 */ "G_BITCAST\000"
2656 /* 5939 */ "G_ADDRSPACE_CAST\000"
2657 /* 5956 */ "AES_DROUND01_LAST\000"
2658 /* 5974 */ "AES_EROUND01_LAST\000"
2659 /* 5992 */ "AES_DROUND23_LAST\000"
2660 /* 6010 */ "AES_EROUND23_LAST\000"
2661 /* 6028 */ "PDIST\000"
2662 /* 6034 */ "DBG_VALUE_LIST\000"
2663 /* 6049 */ "G_FPEXT\000"
2664 /* 6057 */ "G_SEXT\000"
2665 /* 6064 */ "G_ASSERT_SEXT\000"
2666 /* 6078 */ "G_ANYEXT\000"
2667 /* 6087 */ "G_ZEXT\000"
2668 /* 6094 */ "G_ASSERT_ZEXT\000"
2669 /* 6108 */ "FMUL8X16AU\000"
2670 /* 6119 */ "G_ABDU\000"
2671 /* 6126 */ "G_TRUNC_SSAT_U\000"
2672 /* 6141 */ "G_TRUNC_USAT_U\000"
2673 /* 6156 */ "G_FDIV\000"
2674 /* 6163 */ "G_STRICT_FDIV\000"
2675 /* 6177 */ "G_SDIV\000"
2676 /* 6184 */ "G_UDIV\000"
2677 /* 6191 */ "G_GET_FPENV\000"
2678 /* 6203 */ "G_RESET_FPENV\000"
2679 /* 6217 */ "G_SET_FPENV\000"
2680 /* 6229 */ "FLUSHW\000"
2681 /* 6236 */ "NORMALW\000"
2682 /* 6244 */ "INVALW\000"
2683 /* 6251 */ "G_FPOW\000"
2684 /* 6258 */ "OTHERW\000"
2685 /* 6265 */ "MOVSTOSW\000"
2686 /* 6274 */ "SETSW\000"
2687 /* 6280 */ "MOVSTOUW\000"
2688 /* 6289 */ "G_VECREDUCE_FMAX\000"
2689 /* 6306 */ "G_ATOMICRMW_FMAX\000"
2690 /* 6323 */ "G_VECREDUCE_SMAX\000"
2691 /* 6340 */ "G_SMAX\000"
2692 /* 6347 */ "G_VECREDUCE_UMAX\000"
2693 /* 6364 */ "G_UMAX\000"
2694 /* 6371 */ "G_ATOMICRMW_UMAX\000"
2695 /* 6388 */ "G_ATOMICRMW_MAX\000"
2696 /* 6404 */ "GETPCX\000"
2697 /* 6411 */ "FPMADDX\000"
2698 /* 6419 */ "G_FRAME_INDEX\000"
2699 /* 6433 */ "G_SBFX\000"
2700 /* 6440 */ "G_UBFX\000"
2701 /* 6447 */ "FPACKFIX\000"
2702 /* 6456 */ "G_SMULFIX\000"
2703 /* 6466 */ "G_UMULFIX\000"
2704 /* 6476 */ "G_SDIVFIX\000"
2705 /* 6486 */ "G_UDIVFIX\000"
2706 /* 6496 */ "XMULX\000"
2707 /* 6502 */ "FDTOX\000"
2708 /* 6508 */ "MOVDTOX\000"
2709 /* 6516 */ "FQTOX\000"
2710 /* 6522 */ "FSTOX\000"
2711 /* 6528 */ "SETX\000"
2712 /* 6533 */ "G_MEMCPY\000"
2713 /* 6542 */ "COPY\000"
2714 /* 6547 */ "RETRY\000"
2715 /* 6553 */ "CONVERGENCECTRL_ENTRY\000"
2716 /* 6575 */ "G_CTLZ\000"
2717 /* 6582 */ "G_CTTZ\000"
2718 /* 6589 */ "PREFETCHAi\000"
2719 /* 6600 */ "PREFETCHi\000"
2720 /* 6610 */ "SETHIi\000"
2721 /* 6617 */ "CALLi\000"
2722 /* 6623 */ "MEMBARi\000"
2723 /* 6631 */ "CALLrii\000"
2724 /* 6639 */ "LDSBAri\000"
2725 /* 6647 */ "STBAri\000"
2726 /* 6654 */ "LDUBAri\000"
2727 /* 6662 */ "LDSTUBAri\000"
2728 /* 6672 */ "LDDAri\000"
2729 /* 6679 */ "LDAri\000"
2730 /* 6685 */ "STDAri\000"
2731 /* 6692 */ "LDDFAri\000"
2732 /* 6700 */ "LDFAri\000"
2733 /* 6707 */ "STDFAri\000"
2734 /* 6715 */ "LDQFAri\000"
2735 /* 6723 */ "STQFAri\000"
2736 /* 6731 */ "STFAri\000"
2737 /* 6738 */ "LDSHAri\000"
2738 /* 6746 */ "STHAri\000"
2739 /* 6753 */ "LDUHAri\000"
2740 /* 6761 */ "SWAPAri\000"
2741 /* 6769 */ "SRAri\000"
2742 /* 6775 */ "CASAri\000"
2743 /* 6782 */ "STAri\000"
2744 /* 6788 */ "LDSWAri\000"
2745 /* 6796 */ "LDXAri\000"
2746 /* 6803 */ "CASXAri\000"
2747 /* 6811 */ "STXAri\000"
2748 /* 6818 */ "LDSBri\000"
2749 /* 6825 */ "STBri\000"
2750 /* 6831 */ "LDUBri\000"
2751 /* 6838 */ "SUBri\000"
2752 /* 6844 */ "LDSTUBri\000"
2753 /* 6853 */ "SMACri\000"
2754 /* 6860 */ "UMACri\000"
2755 /* 6867 */ "SUBCri\000"
2756 /* 6874 */ "TSUBCCri\000"
2757 /* 6883 */ "TADDCCri\000"
2758 /* 6892 */ "ANDCCri\000"
2759 /* 6900 */ "V9MOVFCCri\000"
2760 /* 6911 */ "TICCri\000"
2761 /* 6918 */ "MOVICCri\000"
2762 /* 6927 */ "SMULCCri\000"
2763 /* 6936 */ "UMULCCri\000"
2764 /* 6945 */ "ANDNCCri\000"
2765 /* 6954 */ "ORNCCri\000"
2766 /* 6962 */ "XNORCCri\000"
2767 /* 6971 */ "XORCCri\000"
2768 /* 6979 */ "MULSCCri\000"
2769 /* 6988 */ "SDIVCCri\000"
2770 /* 6997 */ "UDIVCCri\000"
2771 /* 7006 */ "TXCCri\000"
2772 /* 7013 */ "MOVXCCri\000"
2773 /* 7022 */ "ADDCri\000"
2774 /* 7029 */ "LDDCri\000"
2775 /* 7036 */ "LDCri\000"
2776 /* 7042 */ "STDCri\000"
2777 /* 7049 */ "STCri\000"
2778 /* 7055 */ "ADDri\000"
2779 /* 7061 */ "LDDri\000"
2780 /* 7067 */ "LDri\000"
2781 /* 7072 */ "ANDri\000"
2782 /* 7078 */ "BINDri\000"
2783 /* 7085 */ "CWBCONDri\000"
2784 /* 7095 */ "CXBCONDri\000"
2785 /* 7105 */ "STDri\000"
2786 /* 7111 */ "SUBEri\000"
2787 /* 7118 */ "ADDEri\000"
2788 /* 7125 */ "RESTOREri\000"
2789 /* 7135 */ "SAVEri\000"
2790 /* 7142 */ "LDDFri\000"
2791 /* 7149 */ "LDFri\000"
2792 /* 7155 */ "STDFri\000"
2793 /* 7162 */ "LDQFri\000"
2794 /* 7169 */ "STQFri\000"
2795 /* 7176 */ "STFri\000"
2796 /* 7182 */ "LDSHri\000"
2797 /* 7189 */ "FLUSHri\000"
2798 /* 7197 */ "STHri\000"
2799 /* 7203 */ "LDUHri\000"
2800 /* 7210 */ "TAIL_CALLri\000"
2801 /* 7222 */ "SLLri\000"
2802 /* 7228 */ "JMPLri\000"
2803 /* 7235 */ "SRLri\000"
2804 /* 7241 */ "SMULri\000"
2805 /* 7248 */ "UMULri\000"
2806 /* 7255 */ "WRWIMri\000"
2807 /* 7263 */ "ANDNri\000"
2808 /* 7270 */ "ORNri\000"
2809 /* 7276 */ "TRAPri\000"
2810 /* 7283 */ "SWAPri\000"
2811 /* 7290 */ "STDCQri\000"
2812 /* 7298 */ "STDFQri\000"
2813 /* 7306 */ "WRTBRri\000"
2814 /* 7314 */ "XNORri\000"
2815 /* 7321 */ "XORri\000"
2816 /* 7327 */ "WRPRri\000"
2817 /* 7334 */ "WRASRri\000"
2818 /* 7342 */ "LDCSRri\000"
2819 /* 7350 */ "STCSRri\000"
2820 /* 7358 */ "LDFSRri\000"
2821 /* 7366 */ "STFSRri\000"
2822 /* 7374 */ "LDXFSRri\000"
2823 /* 7383 */ "STXFSRri\000"
2824 /* 7392 */ "PWRPSRri\000"
2825 /* 7401 */ "MOVRri\000"
2826 /* 7408 */ "STri\000"
2827 /* 7413 */ "RETTri\000"
2828 /* 7420 */ "SDIVri\000"
2829 /* 7427 */ "UDIVri\000"
2830 /* 7434 */ "TSUBCCTVri\000"
2831 /* 7445 */ "TADDCCTVri\000"
2832 /* 7456 */ "LDSWri\000"
2833 /* 7463 */ "SRAXri\000"
2834 /* 7470 */ "LDXri\000"
2835 /* 7476 */ "SLLXri\000"
2836 /* 7483 */ "SRLXri\000"
2837 /* 7490 */ "MULXri\000"
2838 /* 7497 */ "STXri\000"
2839 /* 7503 */ "SDIVXri\000"
2840 /* 7511 */ "UDIVXri\000"
2841 /* 7519 */ "CALLrri\000"
2842 /* 7527 */ "PREFETCHAr\000"
2843 /* 7538 */ "PREFETCHr\000"
2844 /* 7548 */ "LDSBArr\000"
2845 /* 7556 */ "STBArr\000"
2846 /* 7563 */ "LDUBArr\000"
2847 /* 7571 */ "LDSTUBArr\000"
2848 /* 7581 */ "LDDArr\000"
2849 /* 7588 */ "LDArr\000"
2850 /* 7594 */ "STDArr\000"
2851 /* 7601 */ "LDDFArr\000"
2852 /* 7609 */ "LDFArr\000"
2853 /* 7616 */ "STDFArr\000"
2854 /* 7624 */ "LDQFArr\000"
2855 /* 7632 */ "STQFArr\000"
2856 /* 7640 */ "STFArr\000"
2857 /* 7647 */ "LDSHArr\000"
2858 /* 7655 */ "STHArr\000"
2859 /* 7662 */ "LDUHArr\000"
2860 /* 7670 */ "SWAPArr\000"
2861 /* 7678 */ "SRArr\000"
2862 /* 7684 */ "CASArr\000"
2863 /* 7691 */ "STArr\000"
2864 /* 7697 */ "LDSWArr\000"
2865 /* 7705 */ "LDXArr\000"
2866 /* 7712 */ "CASXArr\000"
2867 /* 7720 */ "STXArr\000"
2868 /* 7727 */ "LDSBrr\000"
2869 /* 7734 */ "STBrr\000"
2870 /* 7740 */ "LDUBrr\000"
2871 /* 7747 */ "SUBrr\000"
2872 /* 7753 */ "LDSTUBrr\000"
2873 /* 7762 */ "SMACrr\000"
2874 /* 7769 */ "UMACrr\000"
2875 /* 7776 */ "SUBCrr\000"
2876 /* 7783 */ "TSUBCCrr\000"
2877 /* 7792 */ "TADDCCrr\000"
2878 /* 7801 */ "ANDCCrr\000"
2879 /* 7809 */ "V9MOVFCCrr\000"
2880 /* 7820 */ "TICCrr\000"
2881 /* 7827 */ "MOVICCrr\000"
2882 /* 7836 */ "SMULCCrr\000"
2883 /* 7845 */ "UMULCCrr\000"
2884 /* 7854 */ "ANDNCCrr\000"
2885 /* 7863 */ "ORNCCrr\000"
2886 /* 7871 */ "XNORCCrr\000"
2887 /* 7880 */ "XORCCrr\000"
2888 /* 7888 */ "MULSCCrr\000"
2889 /* 7897 */ "SDIVCCrr\000"
2890 /* 7906 */ "UDIVCCrr\000"
2891 /* 7915 */ "TXCCrr\000"
2892 /* 7922 */ "MOVXCCrr\000"
2893 /* 7931 */ "ADDCrr\000"
2894 /* 7938 */ "LDDCrr\000"
2895 /* 7945 */ "LDCrr\000"
2896 /* 7951 */ "STDCrr\000"
2897 /* 7958 */ "POPCrr\000"
2898 /* 7965 */ "STCrr\000"
2899 /* 7971 */ "TLS_ADDrr\000"
2900 /* 7981 */ "LDDrr\000"
2901 /* 7987 */ "GDOP_LDrr\000"
2902 /* 7997 */ "TLS_LDrr\000"
2903 /* 8006 */ "ANDrr\000"
2904 /* 8012 */ "BINDrr\000"
2905 /* 8019 */ "CWBCONDrr\000"
2906 /* 8029 */ "CXBCONDrr\000"
2907 /* 8039 */ "STDrr\000"
2908 /* 8045 */ "SUBErr\000"
2909 /* 8052 */ "ADDErr\000"
2910 /* 8059 */ "RESTORErr\000"
2911 /* 8069 */ "SAVErr\000"
2912 /* 8076 */ "LDDFrr\000"
2913 /* 8083 */ "LDFrr\000"
2914 /* 8089 */ "STDFrr\000"
2915 /* 8096 */ "LDQFrr\000"
2916 /* 8103 */ "STQFrr\000"
2917 /* 8110 */ "STFrr\000"
2918 /* 8116 */ "LDSHrr\000"
2919 /* 8123 */ "FLUSHrr\000"
2920 /* 8131 */ "STHrr\000"
2921 /* 8137 */ "LDUHrr\000"
2922 /* 8144 */ "CALLrr\000"
2923 /* 8151 */ "SLLrr\000"
2924 /* 8157 */ "JMPLrr\000"
2925 /* 8164 */ "SRLrr\000"
2926 /* 8170 */ "SMULrr\000"
2927 /* 8177 */ "UMULrr\000"
2928 /* 8184 */ "WRWIMrr\000"
2929 /* 8192 */ "ANDNrr\000"
2930 /* 8199 */ "ORNrr\000"
2931 /* 8205 */ "TRAPrr\000"
2932 /* 8212 */ "SWAPrr\000"
2933 /* 8219 */ "STDCQrr\000"
2934 /* 8227 */ "STDFQrr\000"
2935 /* 8235 */ "WRTBRrr\000"
2936 /* 8243 */ "XNORrr\000"
2937 /* 8250 */ "XORrr\000"
2938 /* 8256 */ "WRPRrr\000"
2939 /* 8263 */ "WRASRrr\000"
2940 /* 8271 */ "LDCSRrr\000"
2941 /* 8279 */ "STCSRrr\000"
2942 /* 8287 */ "LDFSRrr\000"
2943 /* 8295 */ "STFSRrr\000"
2944 /* 8303 */ "LDXFSRrr\000"
2945 /* 8312 */ "STXFSRrr\000"
2946 /* 8321 */ "PWRPSRrr\000"
2947 /* 8330 */ "MOVRrr\000"
2948 /* 8337 */ "STrr\000"
2949 /* 8342 */ "RETTrr\000"
2950 /* 8349 */ "SDIVrr\000"
2951 /* 8356 */ "UDIVrr\000"
2952 /* 8363 */ "TSUBCCTVrr\000"
2953 /* 8374 */ "TADDCCTVrr\000"
2954 /* 8385 */ "LDSWrr\000"
2955 /* 8392 */ "SRAXrr\000"
2956 /* 8399 */ "GDOP_LDXrr\000"
2957 /* 8410 */ "TLS_LDXrr\000"
2958 /* 8420 */ "SLLXrr\000"
2959 /* 8427 */ "SRLXrr\000"
2960 /* 8434 */ "MULXrr\000"
2961 /* 8441 */ "STXrr\000"
2962 /* 8447 */ "SDIVXrr\000"
2963 /* 8455 */ "UDIVXrr\000"
2964};
2965#ifdef __GNUC__
2966#pragma GCC diagnostic pop
2967#endif
2968
2969extern const unsigned SparcInstrNameIndices[] = {
2970 2570U, 3143U, 4264U, 3655U, 2740U, 2721U, 2749U, 2930U,
2971 2357U, 2372U, 2312U, 2299U, 2399U, 5174U, 2175U, 6034U,
2972 2325U, 2566U, 2730U, 1887U, 6542U, 2663U, 2017U, 5860U,
2973 1610U, 1838U, 1875U, 3826U, 2918U, 5764U, 1789U, 4072U,
2974 2492U, 5753U, 2086U, 4045U, 4032U, 4335U, 5548U, 5571U,
2975 2841U, 2897U, 2870U, 2766U, 2166U, 4300U, 3774U, 2075U,
2976 6553U, 4461U, 4003U, 2223U, 6064U, 6094U, 3472U, 1391U,
2977 714U, 3071U, 6177U, 6184U, 3103U, 3110U, 3117U, 3127U,
2978 1588U, 4686U, 4649U, 4896U, 6119U, 4516U, 2830U, 4504U,
2979 2819U, 2310U, 2568U, 6419U, 2185U, 2200U, 2935U, 5516U,
2980 4974U, 5897U, 4991U, 4567U, 1126U, 5144U, 5775U, 4742U,
2981 5929U, 2266U, 4311U, 1706U, 1100U, 1688U, 5813U, 5794U,
2982 3450U, 4360U, 4379U, 1264U, 1208U, 1238U, 1177U, 1249U,
2983 1189U, 1219U, 2145U, 2099U, 2129U, 5210U, 2413U, 2430U,
2984 1407U, 720U, 1594U, 1535U, 4691U, 4655U, 6388U, 3598U,
2985 6371U, 3581U, 1358U, 697U, 6306U, 3516U, 3238U, 3185U,
2986 3359U, 3297U, 3888U, 3866U, 1647U, 5469U, 1867U, 2509U,
2987 1638U, 5535U, 5875U, 1078U, 5258U, 5730U, 5285U, 6078U,
2988 1118U, 5342U, 6126U, 6141U, 5689U, 5677U, 5850U, 2484U,
2989 6057U, 2386U, 6087U, 2805U, 4446U, 4432U, 2798U, 4439U,
2990 4735U, 2967U, 3972U, 3951U, 3979U, 3986U, 5526U, 3766U,
2991 1908U, 3750U, 1859U, 3758U, 1900U, 3742U, 1851U, 3804U,
2992 3796U, 2528U, 2520U, 5387U, 5377U, 5367U, 5357U, 5407U,
2993 5397U, 6456U, 6466U, 5417U, 5430U, 6476U, 6486U, 5443U,
2994 5456U, 1316U, 676U, 2991U, 640U, 1170U, 6156U, 3082U,
2995 2291U, 6251U, 2649U, 4116U, 263U, 9U, 2477U, 246U,
2996 0U, 4091U, 4123U, 2350U, 6049U, 1090U, 2631U, 2640U,
2997 3918U, 3927U, 5490U, 5503U, 4855U, 3487U, 5191U, 2275U,
2998 3383U, 3393U, 1957U, 1972U, 3174U, 3227U, 3283U, 3345U,
2999 6191U, 6217U, 6203U, 1916U, 1944U, 1929U, 2447U, 2462U,
3000 1397U, 2677U, 3550U, 6340U, 3574U, 6364U, 4862U, 1679U,
3001 1669U, 4259U, 5595U, 1995U, 4548U, 4528U, 5623U, 5602U,
3002 4582U, 4613U, 4599U, 5240U, 6582U, 3690U, 6575U, 3671U,
3003 5012U, 4024U, 3910U, 2153U, 3033U, 2811U, 5040U, 3622U,
3004 5047U, 3443U, 5032U, 3614U, 3435U, 254U, 2552U, 2544U,
3005 2536U, 5906U, 4495U, 5786U, 5831U, 5939U, 4287U, 2004U,
3006 1147U, 2244U, 2114U, 1344U, 683U, 3019U, 6163U, 3089U,
3007 646U, 5914U, 4100U, 3958U, 5104U, 4399U, 4415U, 6533U,
3008 2049U, 2256U, 5562U, 3812U, 2033U, 3859U, 3835U, 3847U,
3009 1323U, 2998U, 1299U, 2974U, 6289U, 3499U, 3206U, 3153U,
3010 3321U, 3259U, 1375U, 3055U, 1572U, 4671U, 4633U, 6323U,
3011 3533U, 6347U, 3557U, 6433U, 6440U, 3716U, 4057U, 6404U,
3012 769U, 880U, 987U, 805U, 916U, 1023U, 846U, 953U,
3013 1060U, 787U, 898U, 1005U, 5567U, 6274U, 6528U, 4241U,
3014 6884U, 7793U, 7022U, 7931U, 7118U, 8052U, 1164U, 743U,
3015 7055U, 7975U, 31U, 5956U, 294U, 5992U, 44U, 5974U,
3016 307U, 6010U, 18U, 72U, 233U, 4277U, 2951U, 3426U,
3017 6892U, 7801U, 6945U, 7854U, 7263U, 8192U, 7072U, 8006U,
3018 516U, 219U, 544U, 599U, 1624U, 624U, 7078U, 8012U,
3019 2657U, 751U, 602U, 5643U, 5700U, 864U, 609U, 5652U,
3020 5708U, 4706U, 659U, 5670U, 5844U, 971U, 616U, 5661U,
3021 5716U, 2024U, 2856U, 6617U, 7215U, 6631U, 8144U, 7519U,
3022 2339U, 2786U, 2600U, 6775U, 7684U, 6803U, 7712U, 396U,
3023 171U, 537U, 1630U, 631U, 736U, 7085U, 8019U, 7095U,
3024 8029U, 3936U, 3944U, 1560U, 1732U, 2065U, 363U, 2695U,
3025 3638U, 3411U, 138U, 2687U, 3629U, 3403U, 531U, 2703U,
3026 3647U, 3419U, 1813U, 4216U, 5204U, 1423U, 4138U, 4903U,
3027 664U, 1524U, 85U, 4760U, 271U, 4811U, 4946U, 1623U,
3028 623U, 551U, 562U, 418U, 1776U, 572U, 435U, 193U,
3029 452U, 210U, 370U, 145U, 379U, 154U, 4203U, 581U,
3030 5098U, 590U, 1826U, 4229U, 5330U, 4164U, 2613U, 4177U,
3031 5064U, 6502U, 1552U, 1429U, 4909U, 1277U, 4874U, 1742U,
3032 4183U, 5070U, 1782U, 5119U, 2560U, 6229U, 7189U, 8123U,
3033 1444U, 4924U, 427U, 1832U, 759U, 870U, 977U, 4235U,
3034 824U, 933U, 1040U, 1806U, 4209U, 5167U, 5336U, 836U,
3035 943U, 1050U, 1284U, 4881U, 505U, 482U, 461U, 2710U,
3036 6108U, 1496U, 493U, 470U, 4171U, 5019U, 1459U, 4939U,
3037 1529U, 4952U, 1490U, 4158U, 5006U, 1436U, 4916U, 1451U,
3038 4931U, 1291U, 4888U, 1502U, 5025U, 4484U, 5131U, 94U,
3039 4770U, 280U, 4821U, 1516U, 2070U, 4959U, 4457U, 100U,
3040 4777U, 286U, 4828U, 5126U, 388U, 163U, 6447U, 355U,
3041 4846U, 130U, 4795U, 324U, 6411U, 2574U, 1987U, 347U,
3042 4837U, 122U, 4786U, 1748U, 2619U, 5076U, 6516U, 444U,
3043 202U, 404U, 179U, 1509U, 1819U, 4222U, 5323U, 340U,
3044 115U, 66U, 4753U, 227U, 4804U, 411U, 186U, 1754U,
3045 2625U, 4189U, 6522U, 1271U, 4132U, 4868U, 4489U, 5137U,
3046 4628U, 5161U, 1760U, 4195U, 5090U, 3820U, 5057U, 8399U,
3047 7987U, 6244U, 7228U, 8157U, 6679U, 7588U, 7342U, 8271U,
3048 7036U, 7945U, 6672U, 7581U, 7029U, 7938U, 6692U, 7601U,
3049 7142U, 8076U, 7061U, 7981U, 6700U, 7609U, 7358U, 8287U,
3050 7149U, 8083U, 6715U, 7624U, 7162U, 8096U, 6639U, 7548U,
3051 6818U, 7727U, 6738U, 7647U, 7182U, 8116U, 6662U, 7571U,
3052 6844U, 7753U, 6788U, 7697U, 7456U, 8385U, 6654U, 7563U,
3053 6831U, 7740U, 6753U, 7662U, 7203U, 8137U, 6796U, 7705U,
3054 7374U, 8303U, 7470U, 8404U, 7067U, 7992U, 5724U, 336U,
3055 6623U, 3047U, 4715U, 6508U, 6902U, 7811U, 6918U, 7827U,
3056 7401U, 8330U, 6265U, 6280U, 5082U, 7013U, 7922U, 1766U,
3057 3041U, 6979U, 7888U, 7490U, 8434U, 3999U, 6236U, 6964U,
3058 7873U, 6954U, 7863U, 7270U, 8199U, 7316U, 8245U, 6258U,
3059 6028U, 3709U, 7958U, 6589U, 7527U, 6600U, 7538U, 7392U,
3060 8321U, 4723U, 4153U, 4710U, 4729U, 4253U, 3137U, 1475U,
3061 7125U, 8059U, 5558U, 2962U, 6547U, 7413U, 8342U, 1484U,
3062 7135U, 8069U, 6988U, 7897U, 7503U, 8447U, 7420U, 8349U,
3063 6610U, 57U, 524U, 108U, 3733U, 3077U, 4453U, 7476U,
3064 8420U, 7222U, 8151U, 6853U, 7762U, 6927U, 7836U, 7241U,
3065 8170U, 7463U, 8392U, 6769U, 7678U, 7483U, 8427U, 7235U,
3066 8164U, 6782U, 7691U, 4247U, 6647U, 7556U, 6825U, 7734U,
3067 7350U, 8279U, 7049U, 7965U, 6685U, 7594U, 7290U, 8219U,
3068 7042U, 7951U, 6707U, 7616U, 7298U, 8227U, 7155U, 8089U,
3069 7105U, 8039U, 6731U, 7640U, 7366U, 8295U, 7176U, 8110U,
3070 6746U, 7655U, 7197U, 8131U, 6723U, 7632U, 7169U, 8103U,
3071 6811U, 7720U, 7383U, 8312U, 7497U, 8441U, 7408U, 8337U,
3072 6875U, 7784U, 6867U, 7776U, 7111U, 8045U, 6838U, 7747U,
3073 6761U, 7670U, 7283U, 8212U, 62U, 320U, 332U, 7445U,
3074 8374U, 6883U, 7792U, 2851U, 7210U, 6911U, 7820U, 7971U,
3075 2861U, 8410U, 7997U, 7276U, 8205U, 7434U, 8363U, 6874U,
3076 7783U, 7006U, 7915U, 6997U, 7906U, 7511U, 8455U, 7427U,
3077 8356U, 6860U, 7769U, 6936U, 7845U, 2584U, 7248U, 8177U,
3078 3993U, 1774U, 1466U, 4144U, 4965U, 4201U, 5096U, 757U,
3079 822U, 834U, 6900U, 7809U, 7334U, 8263U, 7327U, 8256U,
3080 7393U, 8322U, 7306U, 8235U, 7255U, 8184U, 6496U, 2592U,
3081 6962U, 7871U, 7314U, 8243U, 6971U, 7880U, 7321U, 8250U,
3082};
3083
3084extern const int16_t SparcRegClassByHwModeTables[2][1] = {
3085 { // DefaultMode
3086 SP::IntRegsRegClassID, // sparc_ptr_rc
3087 },
3088 { // SPARC64
3089 SP::I64RegsRegClassID, // sparc_ptr_rc
3090 },
3091};
3092
3093static inline void InitSparcMCInstrInfo(MCInstrInfo *II) {
3094 II->InitMCInstrInfo(SparcDescs.Insts, SparcInstrNameIndices, SparcInstrNameData, nullptr, nullptr, 896, &SparcRegClassByHwModeTables[0][0], 1);
3095}
3096
3097
3098} // namespace llvm
3099
3100#endif // GET_INSTRINFO_MC_DESC
3101
3102#ifdef GET_INSTRINFO_HEADER
3103#undef GET_INSTRINFO_HEADER
3104
3105namespace llvm {
3106
3107struct SparcGenInstrInfo : public TargetInstrInfo {
3108 explicit SparcGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u);
3109 ~SparcGenInstrInfo() override = default;
3110};
3111extern const int16_t SparcRegClassByHwModeTables[2][1];
3112
3113} // namespace llvm
3114
3115namespace llvm::SP {
3116
3117
3118} // namespace llvm::SP
3119
3120#endif // GET_INSTRINFO_HEADER
3121
3122#ifdef GET_INSTRINFO_HELPER_DECLS
3123#undef GET_INSTRINFO_HELPER_DECLS
3124
3125
3126#endif // GET_INSTRINFO_HELPER_DECLS
3127
3128#ifdef GET_INSTRINFO_HELPERS
3129#undef GET_INSTRINFO_HELPERS
3130
3131
3132#endif // GET_INSTRINFO_HELPERS
3133
3134#ifdef GET_INSTRINFO_CTOR_DTOR
3135#undef GET_INSTRINFO_CTOR_DTOR
3136
3137namespace llvm {
3138
3139extern const SparcInstrTable SparcDescs;
3140extern const unsigned SparcInstrNameIndices[];
3141extern const char SparcInstrNameData[];
3142SparcGenInstrInfo::SparcGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode)
3143 : TargetInstrInfo(TRI, CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode, SparcRegClassByHwModeTables[STI.getHwMode(MCSubtargetInfo::HwMode_RegInfo)]) {
3144 InitMCInstrInfo(SparcDescs.Insts, SparcInstrNameIndices, SparcInstrNameData, nullptr, nullptr, 896, &SparcRegClassByHwModeTables[0][0], 1);
3145}
3146
3147} // namespace llvm
3148
3149#endif // GET_INSTRINFO_CTOR_DTOR
3150
3151#ifdef GET_INSTRINFO_MC_HELPER_DECLS
3152#undef GET_INSTRINFO_MC_HELPER_DECLS
3153
3154namespace llvm {
3155
3156class MCInst;
3157class FeatureBitset;
3158
3159namespace Sparc_MC {
3160
3161void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features);
3162
3163} // namespace Sparc_MC
3164
3165} // namespace llvm
3166
3167#endif // GET_INSTRINFO_MC_HELPER_DECLS
3168
3169#ifdef GET_INSTRINFO_MC_HELPERS
3170#undef GET_INSTRINFO_MC_HELPERS
3171
3172namespace llvm::Sparc_MC {
3173
3174
3175} // namespace llvm::Sparc_MC
3176
3177#endif // GET_INSTRINFO_MC_HELPERS
3178
3179#if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\
3180 defined(GET_AVAILABLE_OPCODE_CHECKER)
3181#define GET_COMPUTE_FEATURES
3182#endif
3183#ifdef GET_COMPUTE_FEATURES
3184#undef GET_COMPUTE_FEATURES
3185
3186namespace llvm::Sparc_MC {
3187
3188// Bits for subtarget features that participate in instruction matching.
3189enum SubtargetFeatureBits : uint8_t {
3190 Feature_Is32BitBit = 10,
3191 Feature_Is64BitBit = 11,
3192 Feature_UseSoftMulDivBit = 12,
3193 Feature_HasV9Bit = 6,
3194 Feature_HasVISBit = 7,
3195 Feature_HasVIS2Bit = 8,
3196 Feature_HasVIS3Bit = 9,
3197 Feature_HasUA2005Bit = 4,
3198 Feature_HasUA2007Bit = 5,
3199 Feature_HasOSA2011Bit = 2,
3200 Feature_HasCryptoBit = 1,
3201 Feature_HasCASABit = 0,
3202 Feature_HasPWRPSRBit = 3,
3203};
3204
3205inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) {
3206 FeatureBitset Features;
3207 if (!(FB[Sparc::Feature64Bit]))
3208 Features.set(Feature_Is32BitBit);
3209 if (FB[Sparc::Feature64Bit])
3210 Features.set(Feature_Is64BitBit);
3211 if (FB[Sparc::FeatureSoftMulDiv])
3212 Features.set(Feature_UseSoftMulDivBit);
3213 if (FB[Sparc::FeatureV9])
3214 Features.set(Feature_HasV9Bit);
3215 if (FB[Sparc::FeatureVIS])
3216 Features.set(Feature_HasVISBit);
3217 if (FB[Sparc::FeatureVIS2])
3218 Features.set(Feature_HasVIS2Bit);
3219 if (FB[Sparc::FeatureVIS3])
3220 Features.set(Feature_HasVIS3Bit);
3221 if (FB[Sparc::FeatureUA2005])
3222 Features.set(Feature_HasUA2005Bit);
3223 if (FB[Sparc::FeatureUA2007])
3224 Features.set(Feature_HasUA2007Bit);
3225 if (FB[Sparc::FeatureOSA2011])
3226 Features.set(Feature_HasOSA2011Bit);
3227 if (FB[Sparc::FeatureCrypto])
3228 Features.set(Feature_HasCryptoBit);
3229 if (FB[Sparc::LeonCASA] || FB[Sparc::FeatureV9])
3230 Features.set(Feature_HasCASABit);
3231 if (FB[Sparc::FeaturePWRPSR])
3232 Features.set(Feature_HasPWRPSRBit);
3233 return Features;
3234}
3235
3236inline FeatureBitset computeRequiredFeatures(unsigned Opcode) {
3237 enum : uint8_t {
3238 CEFBS_None,
3239 CEFBS_HasCASA,
3240 CEFBS_HasCrypto,
3241 CEFBS_HasOSA2011,
3242 CEFBS_HasPWRPSR,
3243 CEFBS_HasUA2005,
3244 CEFBS_HasUA2007,
3245 CEFBS_HasV9,
3246 CEFBS_HasVIS,
3247 CEFBS_HasVIS2,
3248 CEFBS_HasVIS3,
3249 CEFBS_Is64Bit,
3250 CEFBS_Is64Bit_HasV9,
3251 };
3252
3253 static constexpr FeatureBitset FeatureBitsets[] = {
3254 {}, // CEFBS_None
3255 {Feature_HasCASABit, },
3256 {Feature_HasCryptoBit, },
3257 {Feature_HasOSA2011Bit, },
3258 {Feature_HasPWRPSRBit, },
3259 {Feature_HasUA2005Bit, },
3260 {Feature_HasUA2007Bit, },
3261 {Feature_HasV9Bit, },
3262 {Feature_HasVISBit, },
3263 {Feature_HasVIS2Bit, },
3264 {Feature_HasVIS3Bit, },
3265 {Feature_Is64BitBit, },
3266 {Feature_Is64BitBit, Feature_HasV9Bit, },
3267 };
3268 static constexpr uint8_t RequiredFeaturesRefs[] = {
3269 CEFBS_None, // PHI
3270 CEFBS_None, // INLINEASM
3271 CEFBS_None, // INLINEASM_BR
3272 CEFBS_None, // CFI_INSTRUCTION
3273 CEFBS_None, // EH_LABEL
3274 CEFBS_None, // GC_LABEL
3275 CEFBS_None, // ANNOTATION_LABEL
3276 CEFBS_None, // KILL
3277 CEFBS_None, // EXTRACT_SUBREG
3278 CEFBS_None, // INSERT_SUBREG
3279 CEFBS_None, // IMPLICIT_DEF
3280 CEFBS_None, // INIT_UNDEF
3281 CEFBS_None, // SUBREG_TO_REG
3282 CEFBS_None, // COPY_TO_REGCLASS
3283 CEFBS_None, // DBG_VALUE
3284 CEFBS_None, // DBG_VALUE_LIST
3285 CEFBS_None, // DBG_INSTR_REF
3286 CEFBS_None, // DBG_PHI
3287 CEFBS_None, // DBG_LABEL
3288 CEFBS_None, // REG_SEQUENCE
3289 CEFBS_None, // COPY
3290 CEFBS_None, // COPY_LANEMASK
3291 CEFBS_None, // BUNDLE
3292 CEFBS_None, // LIFETIME_START
3293 CEFBS_None, // LIFETIME_END
3294 CEFBS_None, // PSEUDO_PROBE
3295 CEFBS_None, // ARITH_FENCE
3296 CEFBS_None, // STACKMAP
3297 CEFBS_None, // FENTRY_CALL
3298 CEFBS_None, // PATCHPOINT
3299 CEFBS_None, // LOAD_STACK_GUARD
3300 CEFBS_None, // PREALLOCATED_SETUP
3301 CEFBS_None, // PREALLOCATED_ARG
3302 CEFBS_None, // STATEPOINT
3303 CEFBS_None, // LOCAL_ESCAPE
3304 CEFBS_None, // FAULTING_OP
3305 CEFBS_None, // PATCHABLE_OP
3306 CEFBS_None, // PATCHABLE_FUNCTION_ENTER
3307 CEFBS_None, // PATCHABLE_RET
3308 CEFBS_None, // PATCHABLE_FUNCTION_EXIT
3309 CEFBS_None, // PATCHABLE_TAIL_CALL
3310 CEFBS_None, // PATCHABLE_EVENT_CALL
3311 CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL
3312 CEFBS_None, // ICALL_BRANCH_FUNNEL
3313 CEFBS_None, // FAKE_USE
3314 CEFBS_None, // MEMBARRIER
3315 CEFBS_None, // JUMP_TABLE_DEBUG_INFO
3316 CEFBS_None, // RELOC_NONE
3317 CEFBS_None, // CONVERGENCECTRL_ENTRY
3318 CEFBS_None, // CONVERGENCECTRL_ANCHOR
3319 CEFBS_None, // CONVERGENCECTRL_LOOP
3320 CEFBS_None, // CONVERGENCECTRL_GLUE
3321 CEFBS_None, // G_ASSERT_SEXT
3322 CEFBS_None, // G_ASSERT_ZEXT
3323 CEFBS_None, // G_ASSERT_ALIGN
3324 CEFBS_None, // G_ADD
3325 CEFBS_None, // G_SUB
3326 CEFBS_None, // G_MUL
3327 CEFBS_None, // G_SDIV
3328 CEFBS_None, // G_UDIV
3329 CEFBS_None, // G_SREM
3330 CEFBS_None, // G_UREM
3331 CEFBS_None, // G_SDIVREM
3332 CEFBS_None, // G_UDIVREM
3333 CEFBS_None, // G_AND
3334 CEFBS_None, // G_OR
3335 CEFBS_None, // G_XOR
3336 CEFBS_None, // G_ABDS
3337 CEFBS_None, // G_ABDU
3338 CEFBS_None, // G_UAVGFLOOR
3339 CEFBS_None, // G_UAVGCEIL
3340 CEFBS_None, // G_SAVGFLOOR
3341 CEFBS_None, // G_SAVGCEIL
3342 CEFBS_None, // G_IMPLICIT_DEF
3343 CEFBS_None, // G_PHI
3344 CEFBS_None, // G_FRAME_INDEX
3345 CEFBS_None, // G_GLOBAL_VALUE
3346 CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE
3347 CEFBS_None, // G_CONSTANT_POOL
3348 CEFBS_None, // G_EXTRACT
3349 CEFBS_None, // G_UNMERGE_VALUES
3350 CEFBS_None, // G_INSERT
3351 CEFBS_None, // G_MERGE_VALUES
3352 CEFBS_None, // G_BUILD_VECTOR
3353 CEFBS_None, // G_BUILD_VECTOR_TRUNC
3354 CEFBS_None, // G_CONCAT_VECTORS
3355 CEFBS_None, // G_PTRTOINT
3356 CEFBS_None, // G_INTTOPTR
3357 CEFBS_None, // G_BITCAST
3358 CEFBS_None, // G_FREEZE
3359 CEFBS_None, // G_CONSTANT_FOLD_BARRIER
3360 CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND
3361 CEFBS_None, // G_INTRINSIC_TRUNC
3362 CEFBS_None, // G_INTRINSIC_ROUND
3363 CEFBS_None, // G_INTRINSIC_LRINT
3364 CEFBS_None, // G_INTRINSIC_LLRINT
3365 CEFBS_None, // G_INTRINSIC_ROUNDEVEN
3366 CEFBS_None, // G_READCYCLECOUNTER
3367 CEFBS_None, // G_READSTEADYCOUNTER
3368 CEFBS_None, // G_LOAD
3369 CEFBS_None, // G_SEXTLOAD
3370 CEFBS_None, // G_ZEXTLOAD
3371 CEFBS_None, // G_FPEXTLOAD
3372 CEFBS_None, // G_INDEXED_LOAD
3373 CEFBS_None, // G_INDEXED_SEXTLOAD
3374 CEFBS_None, // G_INDEXED_ZEXTLOAD
3375 CEFBS_None, // G_STORE
3376 CEFBS_None, // G_FPTRUNCSTORE
3377 CEFBS_None, // G_INDEXED_STORE
3378 CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
3379 CEFBS_None, // G_ATOMIC_CMPXCHG
3380 CEFBS_None, // G_ATOMICRMW_XCHG
3381 CEFBS_None, // G_ATOMICRMW_ADD
3382 CEFBS_None, // G_ATOMICRMW_SUB
3383 CEFBS_None, // G_ATOMICRMW_AND
3384 CEFBS_None, // G_ATOMICRMW_NAND
3385 CEFBS_None, // G_ATOMICRMW_OR
3386 CEFBS_None, // G_ATOMICRMW_XOR
3387 CEFBS_None, // G_ATOMICRMW_MAX
3388 CEFBS_None, // G_ATOMICRMW_MIN
3389 CEFBS_None, // G_ATOMICRMW_UMAX
3390 CEFBS_None, // G_ATOMICRMW_UMIN
3391 CEFBS_None, // G_ATOMICRMW_FADD
3392 CEFBS_None, // G_ATOMICRMW_FSUB
3393 CEFBS_None, // G_ATOMICRMW_FMAX
3394 CEFBS_None, // G_ATOMICRMW_FMIN
3395 CEFBS_None, // G_ATOMICRMW_FMAXIMUM
3396 CEFBS_None, // G_ATOMICRMW_FMINIMUM
3397 CEFBS_None, // G_ATOMICRMW_FMAXIMUMNUM
3398 CEFBS_None, // G_ATOMICRMW_FMINIMUMNUM
3399 CEFBS_None, // G_ATOMICRMW_UINC_WRAP
3400 CEFBS_None, // G_ATOMICRMW_UDEC_WRAP
3401 CEFBS_None, // G_ATOMICRMW_USUB_COND
3402 CEFBS_None, // G_ATOMICRMW_USUB_SAT
3403 CEFBS_None, // G_FENCE
3404 CEFBS_None, // G_PREFETCH
3405 CEFBS_None, // G_BRCOND
3406 CEFBS_None, // G_BRINDIRECT
3407 CEFBS_None, // G_INVOKE_REGION_START
3408 CEFBS_None, // G_INTRINSIC
3409 CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS
3410 CEFBS_None, // G_INTRINSIC_CONVERGENT
3411 CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
3412 CEFBS_None, // G_ANYEXT
3413 CEFBS_None, // G_TRUNC
3414 CEFBS_None, // G_TRUNC_SSAT_S
3415 CEFBS_None, // G_TRUNC_SSAT_U
3416 CEFBS_None, // G_TRUNC_USAT_U
3417 CEFBS_None, // G_CONSTANT
3418 CEFBS_None, // G_FCONSTANT
3419 CEFBS_None, // G_VASTART
3420 CEFBS_None, // G_VAARG
3421 CEFBS_None, // G_SEXT
3422 CEFBS_None, // G_SEXT_INREG
3423 CEFBS_None, // G_ZEXT
3424 CEFBS_None, // G_SHL
3425 CEFBS_None, // G_LSHR
3426 CEFBS_None, // G_ASHR
3427 CEFBS_None, // G_FSHL
3428 CEFBS_None, // G_FSHR
3429 CEFBS_None, // G_ROTR
3430 CEFBS_None, // G_ROTL
3431 CEFBS_None, // G_ICMP
3432 CEFBS_None, // G_FCMP
3433 CEFBS_None, // G_SCMP
3434 CEFBS_None, // G_UCMP
3435 CEFBS_None, // G_SELECT
3436 CEFBS_None, // G_UADDO
3437 CEFBS_None, // G_UADDE
3438 CEFBS_None, // G_USUBO
3439 CEFBS_None, // G_USUBE
3440 CEFBS_None, // G_SADDO
3441 CEFBS_None, // G_SADDE
3442 CEFBS_None, // G_SSUBO
3443 CEFBS_None, // G_SSUBE
3444 CEFBS_None, // G_UMULO
3445 CEFBS_None, // G_SMULO
3446 CEFBS_None, // G_UMULH
3447 CEFBS_None, // G_SMULH
3448 CEFBS_None, // G_UADDSAT
3449 CEFBS_None, // G_SADDSAT
3450 CEFBS_None, // G_USUBSAT
3451 CEFBS_None, // G_SSUBSAT
3452 CEFBS_None, // G_USHLSAT
3453 CEFBS_None, // G_SSHLSAT
3454 CEFBS_None, // G_SMULFIX
3455 CEFBS_None, // G_UMULFIX
3456 CEFBS_None, // G_SMULFIXSAT
3457 CEFBS_None, // G_UMULFIXSAT
3458 CEFBS_None, // G_SDIVFIX
3459 CEFBS_None, // G_UDIVFIX
3460 CEFBS_None, // G_SDIVFIXSAT
3461 CEFBS_None, // G_UDIVFIXSAT
3462 CEFBS_None, // G_FADD
3463 CEFBS_None, // G_FSUB
3464 CEFBS_None, // G_FMUL
3465 CEFBS_None, // G_FMA
3466 CEFBS_None, // G_FMAD
3467 CEFBS_None, // G_FDIV
3468 CEFBS_None, // G_FREM
3469 CEFBS_None, // G_FMODF
3470 CEFBS_None, // G_FPOW
3471 CEFBS_None, // G_FPOWI
3472 CEFBS_None, // G_FEXP
3473 CEFBS_None, // G_FEXP2
3474 CEFBS_None, // G_FEXP10
3475 CEFBS_None, // G_FLOG
3476 CEFBS_None, // G_FLOG2
3477 CEFBS_None, // G_FLOG10
3478 CEFBS_None, // G_FLDEXP
3479 CEFBS_None, // G_FFREXP
3480 CEFBS_None, // G_FNEG
3481 CEFBS_None, // G_FPEXT
3482 CEFBS_None, // G_FPTRUNC
3483 CEFBS_None, // G_FPTOSI
3484 CEFBS_None, // G_FPTOUI
3485 CEFBS_None, // G_SITOFP
3486 CEFBS_None, // G_UITOFP
3487 CEFBS_None, // G_FPTOSI_SAT
3488 CEFBS_None, // G_FPTOUI_SAT
3489 CEFBS_None, // G_FABS
3490 CEFBS_None, // G_FCOPYSIGN
3491 CEFBS_None, // G_IS_FPCLASS
3492 CEFBS_None, // G_FCANONICALIZE
3493 CEFBS_None, // G_FMINNUM
3494 CEFBS_None, // G_FMAXNUM
3495 CEFBS_None, // G_FMINNUM_IEEE
3496 CEFBS_None, // G_FMAXNUM_IEEE
3497 CEFBS_None, // G_FMINIMUM
3498 CEFBS_None, // G_FMAXIMUM
3499 CEFBS_None, // G_FMINIMUMNUM
3500 CEFBS_None, // G_FMAXIMUMNUM
3501 CEFBS_None, // G_GET_FPENV
3502 CEFBS_None, // G_SET_FPENV
3503 CEFBS_None, // G_RESET_FPENV
3504 CEFBS_None, // G_GET_FPMODE
3505 CEFBS_None, // G_SET_FPMODE
3506 CEFBS_None, // G_RESET_FPMODE
3507 CEFBS_None, // G_GET_ROUNDING
3508 CEFBS_None, // G_SET_ROUNDING
3509 CEFBS_None, // G_PTR_ADD
3510 CEFBS_None, // G_PTRMASK
3511 CEFBS_None, // G_SMIN
3512 CEFBS_None, // G_SMAX
3513 CEFBS_None, // G_UMIN
3514 CEFBS_None, // G_UMAX
3515 CEFBS_None, // G_ABS
3516 CEFBS_None, // G_LROUND
3517 CEFBS_None, // G_LLROUND
3518 CEFBS_None, // G_BR
3519 CEFBS_None, // G_BRJT
3520 CEFBS_None, // G_VSCALE
3521 CEFBS_None, // G_INSERT_SUBVECTOR
3522 CEFBS_None, // G_EXTRACT_SUBVECTOR
3523 CEFBS_None, // G_INSERT_VECTOR_ELT
3524 CEFBS_None, // G_EXTRACT_VECTOR_ELT
3525 CEFBS_None, // G_SHUFFLE_VECTOR
3526 CEFBS_None, // G_SPLAT_VECTOR
3527 CEFBS_None, // G_STEP_VECTOR
3528 CEFBS_None, // G_VECTOR_COMPRESS
3529 CEFBS_None, // G_CTTZ
3530 CEFBS_None, // G_CTTZ_ZERO_POISON
3531 CEFBS_None, // G_CTLZ
3532 CEFBS_None, // G_CTLZ_ZERO_POISON
3533 CEFBS_None, // G_CTLS
3534 CEFBS_None, // G_CTPOP
3535 CEFBS_None, // G_BSWAP
3536 CEFBS_None, // G_BITREVERSE
3537 CEFBS_None, // G_CLMUL
3538 CEFBS_None, // G_FCEIL
3539 CEFBS_None, // G_FCOS
3540 CEFBS_None, // G_FSIN
3541 CEFBS_None, // G_FSINCOS
3542 CEFBS_None, // G_FTAN
3543 CEFBS_None, // G_FACOS
3544 CEFBS_None, // G_FASIN
3545 CEFBS_None, // G_FATAN
3546 CEFBS_None, // G_FATAN2
3547 CEFBS_None, // G_FCOSH
3548 CEFBS_None, // G_FSINH
3549 CEFBS_None, // G_FTANH
3550 CEFBS_None, // G_FSQRT
3551 CEFBS_None, // G_FFLOOR
3552 CEFBS_None, // G_FRINT
3553 CEFBS_None, // G_FNEARBYINT
3554 CEFBS_None, // G_ADDRSPACE_CAST
3555 CEFBS_None, // G_BLOCK_ADDR
3556 CEFBS_None, // G_JUMP_TABLE
3557 CEFBS_None, // G_DYN_STACKALLOC
3558 CEFBS_None, // G_STACKSAVE
3559 CEFBS_None, // G_STACKRESTORE
3560 CEFBS_None, // G_STRICT_FADD
3561 CEFBS_None, // G_STRICT_FSUB
3562 CEFBS_None, // G_STRICT_FMUL
3563 CEFBS_None, // G_STRICT_FDIV
3564 CEFBS_None, // G_STRICT_FREM
3565 CEFBS_None, // G_STRICT_FMA
3566 CEFBS_None, // G_STRICT_FSQRT
3567 CEFBS_None, // G_STRICT_FLDEXP
3568 CEFBS_None, // G_STRICT_FCMP
3569 CEFBS_None, // G_STRICT_FCMPS
3570 CEFBS_None, // G_READ_REGISTER
3571 CEFBS_None, // G_WRITE_REGISTER
3572 CEFBS_None, // G_MEMCPY
3573 CEFBS_None, // G_MEMCPY_INLINE
3574 CEFBS_None, // G_MEMMOVE
3575 CEFBS_None, // G_MEMSET
3576 CEFBS_None, // G_BZERO
3577 CEFBS_None, // G_MEMSET_INLINE
3578 CEFBS_None, // G_TRAP
3579 CEFBS_None, // G_DEBUGTRAP
3580 CEFBS_None, // G_UBSANTRAP
3581 CEFBS_None, // G_VECREDUCE_SEQ_FADD
3582 CEFBS_None, // G_VECREDUCE_SEQ_FMUL
3583 CEFBS_None, // G_VECREDUCE_FADD
3584 CEFBS_None, // G_VECREDUCE_FMUL
3585 CEFBS_None, // G_VECREDUCE_FMAX
3586 CEFBS_None, // G_VECREDUCE_FMIN
3587 CEFBS_None, // G_VECREDUCE_FMAXIMUM
3588 CEFBS_None, // G_VECREDUCE_FMINIMUM
3589 CEFBS_None, // G_VECREDUCE_FMAXIMUMNUM
3590 CEFBS_None, // G_VECREDUCE_FMINIMUMNUM
3591 CEFBS_None, // G_VECREDUCE_ADD
3592 CEFBS_None, // G_VECREDUCE_MUL
3593 CEFBS_None, // G_VECREDUCE_AND
3594 CEFBS_None, // G_VECREDUCE_OR
3595 CEFBS_None, // G_VECREDUCE_XOR
3596 CEFBS_None, // G_VECREDUCE_SMAX
3597 CEFBS_None, // G_VECREDUCE_SMIN
3598 CEFBS_None, // G_VECREDUCE_UMAX
3599 CEFBS_None, // G_VECREDUCE_UMIN
3600 CEFBS_None, // G_SBFX
3601 CEFBS_None, // G_UBFX
3602 CEFBS_None, // ADJCALLSTACKDOWN
3603 CEFBS_None, // ADJCALLSTACKUP
3604 CEFBS_None, // GETPCX
3605 CEFBS_None, // SELECT_CC_DFP_FCC
3606 CEFBS_None, // SELECT_CC_DFP_ICC
3607 CEFBS_None, // SELECT_CC_DFP_XCC
3608 CEFBS_None, // SELECT_CC_FP_FCC
3609 CEFBS_None, // SELECT_CC_FP_ICC
3610 CEFBS_None, // SELECT_CC_FP_XCC
3611 CEFBS_None, // SELECT_CC_Int_FCC
3612 CEFBS_None, // SELECT_CC_Int_ICC
3613 CEFBS_None, // SELECT_CC_Int_XCC
3614 CEFBS_None, // SELECT_CC_QFP_FCC
3615 CEFBS_None, // SELECT_CC_QFP_ICC
3616 CEFBS_None, // SELECT_CC_QFP_XCC
3617 CEFBS_None, // SET
3618 CEFBS_HasV9, // SETSW
3619 CEFBS_Is64Bit_HasV9, // SETX
3620 CEFBS_None, // V8BAR
3621 CEFBS_None, // ADDCCri
3622 CEFBS_None, // ADDCCrr
3623 CEFBS_None, // ADDCri
3624 CEFBS_None, // ADDCrr
3625 CEFBS_None, // ADDEri
3626 CEFBS_None, // ADDErr
3627 CEFBS_HasVIS3, // ADDXC
3628 CEFBS_HasVIS3, // ADDXCCC
3629 CEFBS_None, // ADDri
3630 CEFBS_None, // ADDrr
3631 CEFBS_HasCrypto, // AES_DROUND01
3632 CEFBS_HasCrypto, // AES_DROUND01_LAST
3633 CEFBS_HasCrypto, // AES_DROUND23
3634 CEFBS_HasCrypto, // AES_DROUND23_LAST
3635 CEFBS_HasCrypto, // AES_EROUND01
3636 CEFBS_HasCrypto, // AES_EROUND01_LAST
3637 CEFBS_HasCrypto, // AES_EROUND23
3638 CEFBS_HasCrypto, // AES_EROUND23_LAST
3639 CEFBS_HasCrypto, // AES_KEXPAND0
3640 CEFBS_HasCrypto, // AES_KEXPAND1
3641 CEFBS_HasCrypto, // AES_KEXPAND2
3642 CEFBS_HasVIS, // ALIGNADDR
3643 CEFBS_HasVIS, // ALIGNADDRL
3644 CEFBS_HasUA2005, // ALLCLEAN
3645 CEFBS_None, // ANDCCri
3646 CEFBS_None, // ANDCCrr
3647 CEFBS_None, // ANDNCCri
3648 CEFBS_None, // ANDNCCrr
3649 CEFBS_None, // ANDNri
3650 CEFBS_None, // ANDNrr
3651 CEFBS_None, // ANDri
3652 CEFBS_None, // ANDrr
3653 CEFBS_HasVIS, // ARRAY16
3654 CEFBS_HasVIS, // ARRAY32
3655 CEFBS_HasVIS, // ARRAY8
3656 CEFBS_None, // BA
3657 CEFBS_None, // BCOND
3658 CEFBS_None, // BCONDA
3659 CEFBS_None, // BINDri
3660 CEFBS_None, // BINDrr
3661 CEFBS_HasVIS2, // BMASK
3662 CEFBS_HasV9, // BPFCC
3663 CEFBS_HasV9, // BPFCCA
3664 CEFBS_HasV9, // BPFCCANT
3665 CEFBS_HasV9, // BPFCCNT
3666 CEFBS_HasV9, // BPICC
3667 CEFBS_HasV9, // BPICCA
3668 CEFBS_HasV9, // BPICCANT
3669 CEFBS_HasV9, // BPICCNT
3670 CEFBS_HasV9, // BPR
3671 CEFBS_HasV9, // BPRA
3672 CEFBS_HasV9, // BPRANT
3673 CEFBS_HasV9, // BPRNT
3674 CEFBS_Is64Bit, // BPXCC
3675 CEFBS_Is64Bit, // BPXCCA
3676 CEFBS_Is64Bit, // BPXCCANT
3677 CEFBS_Is64Bit, // BPXCCNT
3678 CEFBS_HasVIS2, // BSHUFFLE
3679 CEFBS_None, // CALL
3680 CEFBS_None, // CALLi
3681 CEFBS_None, // CALLri
3682 CEFBS_None, // CALLrii
3683 CEFBS_None, // CALLrr
3684 CEFBS_None, // CALLrri
3685 CEFBS_HasCrypto, // CAMELLIA_F
3686 CEFBS_HasCrypto, // CAMELLIA_FL
3687 CEFBS_HasCrypto, // CAMELLIA_FLI
3688 CEFBS_HasV9, // CASAri
3689 CEFBS_HasCASA, // CASArr
3690 CEFBS_HasV9, // CASXAri
3691 CEFBS_HasV9, // CASXArr
3692 CEFBS_HasVIS3, // CMASK16
3693 CEFBS_HasVIS3, // CMASK32
3694 CEFBS_HasVIS3, // CMASK8
3695 CEFBS_None, // CPBCOND
3696 CEFBS_None, // CPBCONDA
3697 CEFBS_HasCrypto, // CRC32C
3698 CEFBS_HasOSA2011, // CWBCONDri
3699 CEFBS_HasOSA2011, // CWBCONDrr
3700 CEFBS_HasOSA2011, // CXBCONDri
3701 CEFBS_HasOSA2011, // CXBCONDrr
3702 CEFBS_HasCrypto, // DES_IIP
3703 CEFBS_HasCrypto, // DES_IP
3704 CEFBS_HasCrypto, // DES_KEXPAND
3705 CEFBS_HasCrypto, // DES_ROUND
3706 CEFBS_HasV9, // DONE
3707 CEFBS_HasVIS, // EDGE16
3708 CEFBS_HasVIS, // EDGE16L
3709 CEFBS_HasVIS2, // EDGE16LN
3710 CEFBS_HasVIS2, // EDGE16N
3711 CEFBS_HasVIS, // EDGE32
3712 CEFBS_HasVIS, // EDGE32L
3713 CEFBS_HasVIS2, // EDGE32LN
3714 CEFBS_HasVIS2, // EDGE32N
3715 CEFBS_HasVIS, // EDGE8
3716 CEFBS_HasVIS, // EDGE8L
3717 CEFBS_HasVIS2, // EDGE8LN
3718 CEFBS_HasVIS2, // EDGE8N
3719 CEFBS_HasV9, // FABSD
3720 CEFBS_HasV9, // FABSQ
3721 CEFBS_None, // FABSS
3722 CEFBS_None, // FADDD
3723 CEFBS_None, // FADDQ
3724 CEFBS_None, // FADDS
3725 CEFBS_HasVIS, // FALIGNADATA
3726 CEFBS_HasVIS, // FAND
3727 CEFBS_HasVIS, // FANDNOT1
3728 CEFBS_HasVIS, // FANDNOT1S
3729 CEFBS_HasVIS, // FANDNOT2
3730 CEFBS_HasVIS, // FANDNOT2S
3731 CEFBS_HasVIS, // FANDS
3732 CEFBS_None, // FBCOND
3733 CEFBS_None, // FBCONDA
3734 CEFBS_HasV9, // FBCONDA_V9
3735 CEFBS_HasV9, // FBCOND_V9
3736 CEFBS_HasVIS3, // FCHKSM16
3737 CEFBS_None, // FCMPD
3738 CEFBS_HasV9, // FCMPD_V9
3739 CEFBS_HasVIS, // FCMPEQ16
3740 CEFBS_HasVIS, // FCMPEQ32
3741 CEFBS_HasVIS, // FCMPGT16
3742 CEFBS_HasVIS, // FCMPGT32
3743 CEFBS_HasVIS, // FCMPLE16
3744 CEFBS_HasVIS, // FCMPLE32
3745 CEFBS_HasVIS, // FCMPNE16
3746 CEFBS_HasVIS, // FCMPNE32
3747 CEFBS_None, // FCMPQ
3748 CEFBS_HasV9, // FCMPQ_V9
3749 CEFBS_None, // FCMPS
3750 CEFBS_HasV9, // FCMPS_V9
3751 CEFBS_None, // FDIVD
3752 CEFBS_None, // FDIVQ
3753 CEFBS_None, // FDIVS
3754 CEFBS_None, // FDMULQ
3755 CEFBS_None, // FDTOI
3756 CEFBS_None, // FDTOQ
3757 CEFBS_None, // FDTOS
3758 CEFBS_HasV9, // FDTOX
3759 CEFBS_HasVIS, // FEXPAND
3760 CEFBS_HasVIS3, // FHADDD
3761 CEFBS_HasVIS3, // FHADDS
3762 CEFBS_HasVIS3, // FHSUBD
3763 CEFBS_HasVIS3, // FHSUBS
3764 CEFBS_None, // FITOD
3765 CEFBS_None, // FITOQ
3766 CEFBS_None, // FITOS
3767 CEFBS_HasVIS3, // FLCMPD
3768 CEFBS_HasVIS3, // FLCMPS
3769 CEFBS_None, // FLUSH
3770 CEFBS_HasV9, // FLUSHW
3771 CEFBS_None, // FLUSHri
3772 CEFBS_None, // FLUSHrr
3773 CEFBS_HasUA2007, // FMADDD
3774 CEFBS_HasUA2007, // FMADDS
3775 CEFBS_HasVIS3, // FMEAN16
3776 CEFBS_HasV9, // FMOVD
3777 CEFBS_HasV9, // FMOVD_FCC
3778 CEFBS_HasV9, // FMOVD_ICC
3779 CEFBS_Is64Bit, // FMOVD_XCC
3780 CEFBS_HasV9, // FMOVQ
3781 CEFBS_HasV9, // FMOVQ_FCC
3782 CEFBS_HasV9, // FMOVQ_ICC
3783 CEFBS_Is64Bit, // FMOVQ_XCC
3784 CEFBS_HasV9, // FMOVRD
3785 CEFBS_HasV9, // FMOVRQ
3786 CEFBS_HasV9, // FMOVRS
3787 CEFBS_None, // FMOVS
3788 CEFBS_HasV9, // FMOVS_FCC
3789 CEFBS_HasV9, // FMOVS_ICC
3790 CEFBS_Is64Bit, // FMOVS_XCC
3791 CEFBS_HasUA2007, // FMSUBD
3792 CEFBS_HasUA2007, // FMSUBS
3793 CEFBS_HasVIS, // FMUL8SUX16
3794 CEFBS_HasVIS, // FMUL8ULX16
3795 CEFBS_HasVIS, // FMUL8X16
3796 CEFBS_HasVIS, // FMUL8X16AL
3797 CEFBS_HasVIS, // FMUL8X16AU
3798 CEFBS_None, // FMULD
3799 CEFBS_HasVIS, // FMULD8SUX16
3800 CEFBS_HasVIS, // FMULD8ULX16
3801 CEFBS_None, // FMULQ
3802 CEFBS_None, // FMULS
3803 CEFBS_HasVIS3, // FNADDD
3804 CEFBS_HasVIS3, // FNADDS
3805 CEFBS_HasVIS, // FNAND
3806 CEFBS_HasVIS, // FNANDS
3807 CEFBS_HasV9, // FNEGD
3808 CEFBS_HasV9, // FNEGQ
3809 CEFBS_None, // FNEGS
3810 CEFBS_HasVIS3, // FNHADDD
3811 CEFBS_HasVIS3, // FNHADDS
3812 CEFBS_HasUA2007, // FNMADDD
3813 CEFBS_HasUA2007, // FNMADDS
3814 CEFBS_HasUA2007, // FNMSUBD
3815 CEFBS_HasUA2007, // FNMSUBS
3816 CEFBS_HasVIS3, // FNMULD
3817 CEFBS_HasVIS3, // FNMULS
3818 CEFBS_HasVIS, // FNOR
3819 CEFBS_HasVIS, // FNORS
3820 CEFBS_HasVIS, // FNOT1
3821 CEFBS_HasVIS, // FNOT1S
3822 CEFBS_HasVIS, // FNOT2
3823 CEFBS_HasVIS, // FNOT2S
3824 CEFBS_HasVIS3, // FNSMULD
3825 CEFBS_HasVIS, // FONE
3826 CEFBS_HasVIS, // FONES
3827 CEFBS_HasVIS, // FOR
3828 CEFBS_HasVIS, // FORNOT1
3829 CEFBS_HasVIS, // FORNOT1S
3830 CEFBS_HasVIS, // FORNOT2
3831 CEFBS_HasVIS, // FORNOT2S
3832 CEFBS_HasVIS, // FORS
3833 CEFBS_HasVIS, // FPACK16
3834 CEFBS_HasVIS, // FPACK32
3835 CEFBS_HasVIS, // FPACKFIX
3836 CEFBS_HasVIS, // FPADD16
3837 CEFBS_HasVIS, // FPADD16S
3838 CEFBS_HasVIS, // FPADD32
3839 CEFBS_HasVIS, // FPADD32S
3840 CEFBS_HasVIS3, // FPADD64
3841 CEFBS_HasOSA2011, // FPMADDX
3842 CEFBS_HasOSA2011, // FPMADDXHI
3843 CEFBS_HasVIS, // FPMERGE
3844 CEFBS_HasVIS, // FPSUB16
3845 CEFBS_HasVIS, // FPSUB16S
3846 CEFBS_HasVIS, // FPSUB32
3847 CEFBS_HasVIS, // FPSUB32S
3848 CEFBS_None, // FQTOD
3849 CEFBS_None, // FQTOI
3850 CEFBS_None, // FQTOS
3851 CEFBS_HasV9, // FQTOX
3852 CEFBS_HasVIS3, // FSLAS16
3853 CEFBS_HasVIS3, // FSLAS32
3854 CEFBS_HasVIS3, // FSLL16
3855 CEFBS_HasVIS3, // FSLL32
3856 CEFBS_None, // FSMULD
3857 CEFBS_None, // FSQRTD
3858 CEFBS_None, // FSQRTQ
3859 CEFBS_None, // FSQRTS
3860 CEFBS_HasVIS3, // FSRA16
3861 CEFBS_HasVIS3, // FSRA32
3862 CEFBS_HasVIS, // FSRC1
3863 CEFBS_HasVIS, // FSRC1S
3864 CEFBS_HasVIS, // FSRC2
3865 CEFBS_HasVIS, // FSRC2S
3866 CEFBS_HasVIS3, // FSRL16
3867 CEFBS_HasVIS3, // FSRL32
3868 CEFBS_None, // FSTOD
3869 CEFBS_None, // FSTOI
3870 CEFBS_None, // FSTOQ
3871 CEFBS_HasV9, // FSTOX
3872 CEFBS_None, // FSUBD
3873 CEFBS_None, // FSUBQ
3874 CEFBS_None, // FSUBS
3875 CEFBS_HasVIS, // FXNOR
3876 CEFBS_HasVIS, // FXNORS
3877 CEFBS_HasVIS, // FXOR
3878 CEFBS_HasVIS, // FXORS
3879 CEFBS_HasV9, // FXTOD
3880 CEFBS_HasV9, // FXTOQ
3881 CEFBS_HasV9, // FXTOS
3882 CEFBS_HasVIS, // FZERO
3883 CEFBS_HasVIS, // FZEROS
3884 CEFBS_HasV9, // GDOP_LDXrr
3885 CEFBS_None, // GDOP_LDrr
3886 CEFBS_HasUA2005, // INVALW
3887 CEFBS_None, // JMPLri
3888 CEFBS_None, // JMPLrr
3889 CEFBS_HasV9, // LDAri
3890 CEFBS_None, // LDArr
3891 CEFBS_None, // LDCSRri
3892 CEFBS_None, // LDCSRrr
3893 CEFBS_None, // LDCri
3894 CEFBS_None, // LDCrr
3895 CEFBS_HasV9, // LDDAri
3896 CEFBS_None, // LDDArr
3897 CEFBS_None, // LDDCri
3898 CEFBS_None, // LDDCrr
3899 CEFBS_HasV9, // LDDFAri
3900 CEFBS_HasV9, // LDDFArr
3901 CEFBS_None, // LDDFri
3902 CEFBS_None, // LDDFrr
3903 CEFBS_None, // LDDri
3904 CEFBS_None, // LDDrr
3905 CEFBS_HasV9, // LDFAri
3906 CEFBS_HasV9, // LDFArr
3907 CEFBS_None, // LDFSRri
3908 CEFBS_None, // LDFSRrr
3909 CEFBS_None, // LDFri
3910 CEFBS_None, // LDFrr
3911 CEFBS_HasV9, // LDQFAri
3912 CEFBS_HasV9, // LDQFArr
3913 CEFBS_HasV9, // LDQFri
3914 CEFBS_HasV9, // LDQFrr
3915 CEFBS_HasV9, // LDSBAri
3916 CEFBS_None, // LDSBArr
3917 CEFBS_None, // LDSBri
3918 CEFBS_None, // LDSBrr
3919 CEFBS_HasV9, // LDSHAri
3920 CEFBS_None, // LDSHArr
3921 CEFBS_None, // LDSHri
3922 CEFBS_None, // LDSHrr
3923 CEFBS_HasV9, // LDSTUBAri
3924 CEFBS_None, // LDSTUBArr
3925 CEFBS_None, // LDSTUBri
3926 CEFBS_None, // LDSTUBrr
3927 CEFBS_HasV9, // LDSWAri
3928 CEFBS_HasV9, // LDSWArr
3929 CEFBS_HasV9, // LDSWri
3930 CEFBS_HasV9, // LDSWrr
3931 CEFBS_HasV9, // LDUBAri
3932 CEFBS_None, // LDUBArr
3933 CEFBS_None, // LDUBri
3934 CEFBS_None, // LDUBrr
3935 CEFBS_HasV9, // LDUHAri
3936 CEFBS_None, // LDUHArr
3937 CEFBS_None, // LDUHri
3938 CEFBS_None, // LDUHrr
3939 CEFBS_HasV9, // LDXAri
3940 CEFBS_HasV9, // LDXArr
3941 CEFBS_HasV9, // LDXFSRri
3942 CEFBS_HasV9, // LDXFSRrr
3943 CEFBS_HasV9, // LDXri
3944 CEFBS_HasV9, // LDXrr
3945 CEFBS_None, // LDri
3946 CEFBS_None, // LDrr
3947 CEFBS_HasVIS3, // LZCNT
3948 CEFBS_HasCrypto, // MD5
3949 CEFBS_HasV9, // MEMBARi
3950 CEFBS_HasCrypto, // MONTMUL
3951 CEFBS_HasCrypto, // MONTSQR
3952 CEFBS_HasVIS3, // MOVDTOX
3953 CEFBS_HasV9, // MOVFCCri
3954 CEFBS_HasV9, // MOVFCCrr
3955 CEFBS_HasV9, // MOVICCri
3956 CEFBS_HasV9, // MOVICCrr
3957 CEFBS_HasV9, // MOVRri
3958 CEFBS_HasV9, // MOVRrr
3959 CEFBS_HasVIS3, // MOVSTOSW
3960 CEFBS_HasVIS3, // MOVSTOUW
3961 CEFBS_HasVIS3, // MOVWTOS
3962 CEFBS_Is64Bit, // MOVXCCri
3963 CEFBS_Is64Bit, // MOVXCCrr
3964 CEFBS_HasVIS3, // MOVXTOD
3965 CEFBS_HasCrypto, // MPMUL
3966 CEFBS_None, // MULSCCri
3967 CEFBS_None, // MULSCCrr
3968 CEFBS_HasV9, // MULXri
3969 CEFBS_HasV9, // MULXrr
3970 CEFBS_None, // NOP
3971 CEFBS_HasUA2005, // NORMALW
3972 CEFBS_None, // ORCCri
3973 CEFBS_None, // ORCCrr
3974 CEFBS_None, // ORNCCri
3975 CEFBS_None, // ORNCCrr
3976 CEFBS_None, // ORNri
3977 CEFBS_None, // ORNrr
3978 CEFBS_None, // ORri
3979 CEFBS_None, // ORrr
3980 CEFBS_HasUA2005, // OTHERW
3981 CEFBS_HasVIS, // PDIST
3982 CEFBS_HasVIS3, // PDISTN
3983 CEFBS_HasV9, // POPCrr
3984 CEFBS_HasV9, // PREFETCHAi
3985 CEFBS_HasV9, // PREFETCHAr
3986 CEFBS_HasV9, // PREFETCHi
3987 CEFBS_HasV9, // PREFETCHr
3988 CEFBS_HasPWRPSR, // PWRPSRri
3989 CEFBS_HasPWRPSR, // PWRPSRrr
3990 CEFBS_None, // RDASR
3991 CEFBS_HasV9, // RDFQ
3992 CEFBS_HasV9, // RDPR
3993 CEFBS_None, // RDPSR
3994 CEFBS_None, // RDTBR
3995 CEFBS_None, // RDWIM
3996 CEFBS_HasV9, // RESTORED
3997 CEFBS_None, // RESTOREri
3998 CEFBS_None, // RESTORErr
3999 CEFBS_None, // RET
4000 CEFBS_None, // RETL
4001 CEFBS_HasV9, // RETRY
4002 CEFBS_None, // RETTri
4003 CEFBS_None, // RETTrr
4004 CEFBS_HasV9, // SAVED
4005 CEFBS_None, // SAVEri
4006 CEFBS_None, // SAVErr
4007 CEFBS_None, // SDIVCCri
4008 CEFBS_None, // SDIVCCrr
4009 CEFBS_HasV9, // SDIVXri
4010 CEFBS_HasV9, // SDIVXrr
4011 CEFBS_None, // SDIVri
4012 CEFBS_None, // SDIVrr
4013 CEFBS_None, // SETHIi
4014 CEFBS_HasCrypto, // SHA1
4015 CEFBS_HasCrypto, // SHA256
4016 CEFBS_HasCrypto, // SHA512
4017 CEFBS_HasVIS, // SHUTDOWN
4018 CEFBS_HasVIS2, // SIAM
4019 CEFBS_HasV9, // SIR
4020 CEFBS_HasV9, // SLLXri
4021 CEFBS_HasV9, // SLLXrr
4022 CEFBS_None, // SLLri
4023 CEFBS_None, // SLLrr
4024 CEFBS_None, // SMACri
4025 CEFBS_None, // SMACrr
4026 CEFBS_None, // SMULCCri
4027 CEFBS_None, // SMULCCrr
4028 CEFBS_None, // SMULri
4029 CEFBS_None, // SMULrr
4030 CEFBS_HasV9, // SRAXri
4031 CEFBS_HasV9, // SRAXrr
4032 CEFBS_None, // SRAri
4033 CEFBS_None, // SRArr
4034 CEFBS_HasV9, // SRLXri
4035 CEFBS_HasV9, // SRLXrr
4036 CEFBS_None, // SRLri
4037 CEFBS_None, // SRLrr
4038 CEFBS_HasV9, // STAri
4039 CEFBS_None, // STArr
4040 CEFBS_None, // STBAR
4041 CEFBS_HasV9, // STBAri
4042 CEFBS_None, // STBArr
4043 CEFBS_None, // STBri
4044 CEFBS_None, // STBrr
4045 CEFBS_None, // STCSRri
4046 CEFBS_None, // STCSRrr
4047 CEFBS_None, // STCri
4048 CEFBS_None, // STCrr
4049 CEFBS_HasV9, // STDAri
4050 CEFBS_None, // STDArr
4051 CEFBS_None, // STDCQri
4052 CEFBS_None, // STDCQrr
4053 CEFBS_None, // STDCri
4054 CEFBS_None, // STDCrr
4055 CEFBS_HasV9, // STDFAri
4056 CEFBS_HasV9, // STDFArr
4057 CEFBS_None, // STDFQri
4058 CEFBS_None, // STDFQrr
4059 CEFBS_None, // STDFri
4060 CEFBS_None, // STDFrr
4061 CEFBS_None, // STDri
4062 CEFBS_None, // STDrr
4063 CEFBS_HasV9, // STFAri
4064 CEFBS_HasV9, // STFArr
4065 CEFBS_None, // STFSRri
4066 CEFBS_None, // STFSRrr
4067 CEFBS_None, // STFri
4068 CEFBS_None, // STFrr
4069 CEFBS_HasV9, // STHAri
4070 CEFBS_None, // STHArr
4071 CEFBS_None, // STHri
4072 CEFBS_None, // STHrr
4073 CEFBS_HasV9, // STQFAri
4074 CEFBS_HasV9, // STQFArr
4075 CEFBS_HasV9, // STQFri
4076 CEFBS_HasV9, // STQFrr
4077 CEFBS_HasV9, // STXAri
4078 CEFBS_HasV9, // STXArr
4079 CEFBS_HasV9, // STXFSRri
4080 CEFBS_HasV9, // STXFSRrr
4081 CEFBS_HasV9, // STXri
4082 CEFBS_HasV9, // STXrr
4083 CEFBS_None, // STri
4084 CEFBS_None, // STrr
4085 CEFBS_None, // SUBCCri
4086 CEFBS_None, // SUBCCrr
4087 CEFBS_None, // SUBCri
4088 CEFBS_None, // SUBCrr
4089 CEFBS_None, // SUBEri
4090 CEFBS_None, // SUBErr
4091 CEFBS_None, // SUBri
4092 CEFBS_None, // SUBrr
4093 CEFBS_HasV9, // SWAPAri
4094 CEFBS_None, // SWAPArr
4095 CEFBS_None, // SWAPri
4096 CEFBS_None, // SWAPrr
4097 CEFBS_None, // TA1
4098 CEFBS_None, // TA3
4099 CEFBS_None, // TA5
4100 CEFBS_None, // TADDCCTVri
4101 CEFBS_None, // TADDCCTVrr
4102 CEFBS_None, // TADDCCri
4103 CEFBS_None, // TADDCCrr
4104 CEFBS_None, // TAIL_CALL
4105 CEFBS_None, // TAIL_CALLri
4106 CEFBS_HasV9, // TICCri
4107 CEFBS_HasV9, // TICCrr
4108 CEFBS_None, // TLS_ADDrr
4109 CEFBS_None, // TLS_CALL
4110 CEFBS_HasV9, // TLS_LDXrr
4111 CEFBS_None, // TLS_LDrr
4112 CEFBS_None, // TRAPri
4113 CEFBS_None, // TRAPrr
4114 CEFBS_None, // TSUBCCTVri
4115 CEFBS_None, // TSUBCCTVrr
4116 CEFBS_None, // TSUBCCri
4117 CEFBS_None, // TSUBCCrr
4118 CEFBS_Is64Bit, // TXCCri
4119 CEFBS_Is64Bit, // TXCCrr
4120 CEFBS_None, // UDIVCCri
4121 CEFBS_None, // UDIVCCrr
4122 CEFBS_HasV9, // UDIVXri
4123 CEFBS_HasV9, // UDIVXrr
4124 CEFBS_None, // UDIVri
4125 CEFBS_None, // UDIVrr
4126 CEFBS_None, // UMACri
4127 CEFBS_None, // UMACrr
4128 CEFBS_None, // UMULCCri
4129 CEFBS_None, // UMULCCrr
4130 CEFBS_HasVIS3, // UMULXHI
4131 CEFBS_None, // UMULri
4132 CEFBS_None, // UMULrr
4133 CEFBS_None, // UNIMP
4134 CEFBS_None, // V9FCMPD
4135 CEFBS_None, // V9FCMPED
4136 CEFBS_None, // V9FCMPEQ
4137 CEFBS_None, // V9FCMPES
4138 CEFBS_None, // V9FCMPQ
4139 CEFBS_None, // V9FCMPS
4140 CEFBS_HasV9, // V9FMOVD_FCC
4141 CEFBS_HasV9, // V9FMOVQ_FCC
4142 CEFBS_HasV9, // V9FMOVS_FCC
4143 CEFBS_HasV9, // V9MOVFCCri
4144 CEFBS_HasV9, // V9MOVFCCrr
4145 CEFBS_None, // WRASRri
4146 CEFBS_None, // WRASRrr
4147 CEFBS_HasV9, // WRPRri
4148 CEFBS_HasV9, // WRPRrr
4149 CEFBS_None, // WRPSRri
4150 CEFBS_None, // WRPSRrr
4151 CEFBS_None, // WRTBRri
4152 CEFBS_None, // WRTBRrr
4153 CEFBS_None, // WRWIMri
4154 CEFBS_None, // WRWIMrr
4155 CEFBS_HasVIS3, // XMULX
4156 CEFBS_HasVIS3, // XMULXHI
4157 CEFBS_None, // XNORCCri
4158 CEFBS_None, // XNORCCrr
4159 CEFBS_None, // XNORri
4160 CEFBS_None, // XNORrr
4161 CEFBS_None, // XORCCri
4162 CEFBS_None, // XORCCrr
4163 CEFBS_None, // XORri
4164 CEFBS_None, // XORrr
4165 };
4166
4167 assert(Opcode < 896);
4168 return FeatureBitsets[RequiredFeaturesRefs[Opcode]];
4169}
4170
4171
4172} // namespace llvm::Sparc_MC
4173
4174#endif // GET_COMPUTE_FEATURES
4175
4176#ifdef GET_AVAILABLE_OPCODE_CHECKER
4177#undef GET_AVAILABLE_OPCODE_CHECKER
4178
4179namespace llvm::Sparc_MC {
4180
4181bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) {
4182 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
4183 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
4184 FeatureBitset MissingFeatures =
4185 (AvailableFeatures & RequiredFeatures) ^
4186 RequiredFeatures;
4187 return !MissingFeatures.any();
4188}
4189
4190} // namespace llvm::Sparc_MC
4191
4192#endif // GET_AVAILABLE_OPCODE_CHECKER
4193
4194#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
4195#undef ENABLE_INSTR_PREDICATE_VERIFIER
4196
4197#include <sstream>
4198
4199namespace llvm::Sparc_MC {
4200
4201#ifndef NDEBUG
4202static const char *SubtargetFeatureNames[] = {
4203 "Feature_HasCASA",
4204 "Feature_HasCrypto",
4205 "Feature_HasOSA2011",
4206 "Feature_HasPWRPSR",
4207 "Feature_HasUA2005",
4208 "Feature_HasUA2007",
4209 "Feature_HasV9",
4210 "Feature_HasVIS",
4211 "Feature_HasVIS2",
4212 "Feature_HasVIS3",
4213 "Feature_Is32Bit",
4214 "Feature_Is64Bit",
4215 "Feature_UseSoftMulDiv",
4216 nullptr
4217};
4218
4219#endif // NDEBUG
4220
4221void verifyInstructionPredicates(
4222 unsigned Opcode, const FeatureBitset &Features) {
4223#ifndef NDEBUG
4224 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
4225 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
4226 FeatureBitset MissingFeatures =
4227 (AvailableFeatures & RequiredFeatures) ^
4228 RequiredFeatures;
4229 if (MissingFeatures.any()) {
4230 std::ostringstream Msg;
4231 Msg << "Attempting to emit " << &SparcInstrNameData[SparcInstrNameIndices[Opcode]]
4232 << " instruction but the ";
4233 for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
4234 if (MissingFeatures.test(i))
4235 Msg << SubtargetFeatureNames[i] << " ";
4236 Msg << "predicate(s) are not met";
4237 report_fatal_error(Msg.str().c_str());
4238 }
4239#endif // NDEBUG
4240}
4241
4242} // namespace llvm::Sparc_MC
4243
4244#endif // ENABLE_INSTR_PREDICATE_VERIFIER
4245
4246