1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Instruction Enum Values and Descriptors *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_INSTRINFO_ENUM
10#undef GET_INSTRINFO_ENUM
11
12namespace llvm::SP {
13
14 enum {
15 PHI = 0, // Target.td:1324
16 INLINEASM = 1, // Target.td:1330
17 INLINEASM_BR = 2, // Target.td:1336
18 CFI_INSTRUCTION = 3, // Target.td:1345
19 EH_LABEL = 4, // Target.td:1354
20 GC_LABEL = 5, // Target.td:1363
21 ANNOTATION_LABEL = 6, // Target.td:1372
22 KILL = 7, // Target.td:1380
23 EXTRACT_SUBREG = 8, // Target.td:1387
24 INSERT_SUBREG = 9, // Target.td:1393
25 IMPLICIT_DEF = 10, // Target.td:1400
26 INIT_UNDEF = 11, // Target.td:1409
27 SUBREG_TO_REG = 12, // Target.td:1416
28 COPY_TO_REGCLASS = 13, // Target.td:1422
29 DBG_VALUE = 14, // Target.td:1429
30 DBG_VALUE_LIST = 15, // Target.td:1436
31 DBG_INSTR_REF = 16, // Target.td:1443
32 DBG_PHI = 17, // Target.td:1450
33 DBG_LABEL = 18, // Target.td:1457
34 REG_SEQUENCE = 19, // Target.td:1464
35 COPY = 20, // Target.td:1471
36 COPY_LANEMASK = 21, // Target.td:1479
37 BUNDLE = 22, // Target.td:1486
38 LIFETIME_START = 23, // Target.td:1492
39 LIFETIME_END = 24, // Target.td:1499
40 PSEUDO_PROBE = 25, // Target.td:1506
41 ARITH_FENCE = 26, // Target.td:1513
42 STACKMAP = 27, // Target.td:1522
43 FENTRY_CALL = 28, // Target.td:1657
44 PATCHPOINT = 29, // Target.td:1530
45 LOAD_STACK_GUARD = 30, // Target.td:1548
46 PREALLOCATED_SETUP = 31, // Target.td:1556
47 PREALLOCATED_ARG = 32, // Target.td:1562
48 STATEPOINT = 33, // Target.td:1539
49 LOCAL_ESCAPE = 34, // Target.td:1568
50 FAULTING_OP = 35, // Target.td:1577
51 PATCHABLE_OP = 36, // Target.td:1597
52 PATCHABLE_FUNCTION_ENTER = 37, // Target.td:1605
53 PATCHABLE_RET = 38, // Target.td:1612
54 PATCHABLE_FUNCTION_EXIT = 39, // Target.td:1621
55 PATCHABLE_TAIL_CALL = 40, // Target.td:1629
56 PATCHABLE_EVENT_CALL = 41, // Target.td:1637
57 PATCHABLE_TYPED_EVENT_CALL = 42, // Target.td:1647
58 ICALL_BRANCH_FUNNEL = 43, // Target.td:1667
59 FAKE_USE = 44, // Target.td:1587
60 MEMBARRIER = 45, // Target.td:1673
61 JUMP_TABLE_DEBUG_INFO = 46, // Target.td:1681
62 RELOC_NONE = 47, // Target.td:1689
63 CONVERGENCECTRL_ENTRY = 48, // Target.td:1701
64 CONVERGENCECTRL_ANCHOR = 49, // Target.td:1697
65 CONVERGENCECTRL_LOOP = 50, // Target.td:1705
66 CONVERGENCECTRL_GLUE = 51, // Target.td:1709
67 G_ASSERT_SEXT = 52, // GenericOpcodes.td:1929
68 G_ASSERT_ZEXT = 53, // GenericOpcodes.td:1921
69 G_ASSERT_ALIGN = 54, // GenericOpcodes.td:1936
70 G_ADD = 55, // GenericOpcodes.td:308
71 G_SUB = 56, // GenericOpcodes.td:316
72 G_MUL = 57, // GenericOpcodes.td:324
73 G_SDIV = 58, // GenericOpcodes.td:332
74 G_UDIV = 59, // GenericOpcodes.td:340
75 G_SREM = 60, // GenericOpcodes.td:348
76 G_UREM = 61, // GenericOpcodes.td:356
77 G_SDIVREM = 62, // GenericOpcodes.td:364
78 G_UDIVREM = 63, // GenericOpcodes.td:372
79 G_AND = 64, // GenericOpcodes.td:380
80 G_OR = 65, // GenericOpcodes.td:388
81 G_XOR = 66, // GenericOpcodes.td:396
82 G_ABDS = 67, // GenericOpcodes.td:425
83 G_ABDU = 68, // GenericOpcodes.td:433
84 G_UAVGFLOOR = 69, // GenericOpcodes.td:441
85 G_UAVGCEIL = 70, // GenericOpcodes.td:448
86 G_SAVGFLOOR = 71, // GenericOpcodes.td:455
87 G_SAVGCEIL = 72, // GenericOpcodes.td:462
88 G_IMPLICIT_DEF = 73, // GenericOpcodes.td:111
89 G_PHI = 74, // GenericOpcodes.td:118
90 G_FRAME_INDEX = 75, // GenericOpcodes.td:125
91 G_GLOBAL_VALUE = 76, // GenericOpcodes.td:131
92 G_PTRAUTH_GLOBAL_VALUE = 77, // GenericOpcodes.td:137
93 G_CONSTANT_POOL = 78, // GenericOpcodes.td:143
94 G_EXTRACT = 79, // GenericOpcodes.td:1516
95 G_UNMERGE_VALUES = 80, // GenericOpcodes.td:1529
96 G_INSERT = 81, // GenericOpcodes.td:1538
97 G_MERGE_VALUES = 82, // GenericOpcodes.td:1548
98 G_BUILD_VECTOR = 83, // GenericOpcodes.td:1568
99 G_BUILD_VECTOR_TRUNC = 84, // GenericOpcodes.td:1578
100 G_CONCAT_VECTORS = 85, // GenericOpcodes.td:1585
101 G_PTRTOINT = 86, // GenericOpcodes.td:155
102 G_INTTOPTR = 87, // GenericOpcodes.td:149
103 G_BITCAST = 88, // GenericOpcodes.td:161
104 G_FREEZE = 89, // GenericOpcodes.td:284
105 G_CONSTANT_FOLD_BARRIER = 90, // GenericOpcodes.td:1943
106 G_INTRINSIC_FPTRUNC_ROUND = 91, // GenericOpcodes.td:1280
107 G_INTRINSIC_TRUNC = 92, // GenericOpcodes.td:1286
108 G_INTRINSIC_ROUND = 93, // GenericOpcodes.td:1292
109 G_INTRINSIC_LRINT = 94, // GenericOpcodes.td:1298
110 G_INTRINSIC_LLRINT = 95, // GenericOpcodes.td:1304
111 G_INTRINSIC_ROUNDEVEN = 96, // GenericOpcodes.td:1310
112 G_READCYCLECOUNTER = 97, // GenericOpcodes.td:1316
113 G_READSTEADYCOUNTER = 98, // GenericOpcodes.td:1322
114 G_LOAD = 99, // GenericOpcodes.td:1349
115 G_SEXTLOAD = 100, // GenericOpcodes.td:1358
116 G_ZEXTLOAD = 101, // GenericOpcodes.td:1366
117 G_FPEXTLOAD = 102, // GenericOpcodes.td:1375
118 G_INDEXED_LOAD = 103, // GenericOpcodes.td:1385
119 G_INDEXED_SEXTLOAD = 104, // GenericOpcodes.td:1394
120 G_INDEXED_ZEXTLOAD = 105, // GenericOpcodes.td:1402
121 G_STORE = 106, // GenericOpcodes.td:1410
122 G_FPTRUNCSTORE = 107, // GenericOpcodes.td:1420
123 G_INDEXED_STORE = 108, // GenericOpcodes.td:1428
124 G_ATOMIC_CMPXCHG_WITH_SUCCESS = 109, // GenericOpcodes.td:1439
125 G_ATOMIC_CMPXCHG = 110, // GenericOpcodes.td:1450
126 G_ATOMICRMW_XCHG = 111, // GenericOpcodes.td:1470
127 G_ATOMICRMW_ADD = 112, // GenericOpcodes.td:1471
128 G_ATOMICRMW_SUB = 113, // GenericOpcodes.td:1472
129 G_ATOMICRMW_AND = 114, // GenericOpcodes.td:1473
130 G_ATOMICRMW_NAND = 115, // GenericOpcodes.td:1474
131 G_ATOMICRMW_OR = 116, // GenericOpcodes.td:1475
132 G_ATOMICRMW_XOR = 117, // GenericOpcodes.td:1476
133 G_ATOMICRMW_MAX = 118, // GenericOpcodes.td:1477
134 G_ATOMICRMW_MIN = 119, // GenericOpcodes.td:1478
135 G_ATOMICRMW_UMAX = 120, // GenericOpcodes.td:1479
136 G_ATOMICRMW_UMIN = 121, // GenericOpcodes.td:1480
137 G_ATOMICRMW_FADD = 122, // GenericOpcodes.td:1481
138 G_ATOMICRMW_FSUB = 123, // GenericOpcodes.td:1482
139 G_ATOMICRMW_FMAX = 124, // GenericOpcodes.td:1483
140 G_ATOMICRMW_FMIN = 125, // GenericOpcodes.td:1484
141 G_ATOMICRMW_FMAXIMUM = 126, // GenericOpcodes.td:1485
142 G_ATOMICRMW_FMINIMUM = 127, // GenericOpcodes.td:1486
143 G_ATOMICRMW_FMAXIMUMNUM = 128, // GenericOpcodes.td:1487
144 G_ATOMICRMW_FMINIMUMNUM = 129, // GenericOpcodes.td:1488
145 G_ATOMICRMW_UINC_WRAP = 130, // GenericOpcodes.td:1489
146 G_ATOMICRMW_UDEC_WRAP = 131, // GenericOpcodes.td:1490
147 G_ATOMICRMW_USUB_COND = 132, // GenericOpcodes.td:1491
148 G_ATOMICRMW_USUB_SAT = 133, // GenericOpcodes.td:1492
149 G_FENCE = 134, // GenericOpcodes.td:1494
150 G_PREFETCH = 135, // GenericOpcodes.td:1501
151 G_BRCOND = 136, // GenericOpcodes.td:1641
152 G_BRINDIRECT = 137, // GenericOpcodes.td:1650
153 G_INVOKE_REGION_START = 138, // GenericOpcodes.td:1673
154 G_INTRINSIC = 139, // GenericOpcodes.td:1593
155 G_INTRINSIC_W_SIDE_EFFECTS = 140, // GenericOpcodes.td:1600
156 G_INTRINSIC_CONVERGENT = 141, // GenericOpcodes.td:1609
157 G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 142, // GenericOpcodes.td:1617
158 G_ANYEXT = 143, // GenericOpcodes.td:44
159 G_TRUNC = 144, // GenericOpcodes.td:83
160 G_TRUNC_SSAT_S = 145, // GenericOpcodes.td:91
161 G_TRUNC_SSAT_U = 146, // GenericOpcodes.td:98
162 G_TRUNC_USAT_U = 147, // GenericOpcodes.td:105
163 G_CONSTANT = 148, // GenericOpcodes.td:169
164 G_FCONSTANT = 149, // GenericOpcodes.td:177
165 G_VASTART = 150, // GenericOpcodes.td:184
166 G_VAARG = 151, // GenericOpcodes.td:191
167 G_SEXT = 152, // GenericOpcodes.td:52
168 G_SEXT_INREG = 153, // GenericOpcodes.td:66
169 G_ZEXT = 154, // GenericOpcodes.td:74
170 G_SHL = 155, // GenericOpcodes.td:404
171 G_LSHR = 156, // GenericOpcodes.td:411
172 G_ASHR = 157, // GenericOpcodes.td:418
173 G_FSHL = 158, // GenericOpcodes.td:470
174 G_FSHR = 159, // GenericOpcodes.td:478
175 G_ROTR = 160, // GenericOpcodes.td:485
176 G_ROTL = 161, // GenericOpcodes.td:492
177 G_ICMP = 162, // GenericOpcodes.td:499
178 G_FCMP = 163, // GenericOpcodes.td:506
179 G_SCMP = 164, // GenericOpcodes.td:513
180 G_UCMP = 165, // GenericOpcodes.td:520
181 G_SELECT = 166, // GenericOpcodes.td:527
182 G_UADDO = 167, // GenericOpcodes.td:601
183 G_UADDE = 168, // GenericOpcodes.td:609
184 G_USUBO = 169, // GenericOpcodes.td:631
185 G_USUBE = 170, // GenericOpcodes.td:637
186 G_SADDO = 171, // GenericOpcodes.td:616
187 G_SADDE = 172, // GenericOpcodes.td:624
188 G_SSUBO = 173, // GenericOpcodes.td:644
189 G_SSUBE = 174, // GenericOpcodes.td:651
190 G_UMULO = 175, // GenericOpcodes.td:658
191 G_SMULO = 176, // GenericOpcodes.td:666
192 G_UMULH = 177, // GenericOpcodes.td:675
193 G_SMULH = 178, // GenericOpcodes.td:684
194 G_UADDSAT = 179, // GenericOpcodes.td:696
195 G_SADDSAT = 180, // GenericOpcodes.td:704
196 G_USUBSAT = 181, // GenericOpcodes.td:712
197 G_SSUBSAT = 182, // GenericOpcodes.td:720
198 G_USHLSAT = 183, // GenericOpcodes.td:728
199 G_SSHLSAT = 184, // GenericOpcodes.td:736
200 G_SMULFIX = 185, // GenericOpcodes.td:748
201 G_UMULFIX = 186, // GenericOpcodes.td:755
202 G_SMULFIXSAT = 187, // GenericOpcodes.td:765
203 G_UMULFIXSAT = 188, // GenericOpcodes.td:772
204 G_SDIVFIX = 189, // GenericOpcodes.td:783
205 G_UDIVFIX = 190, // GenericOpcodes.td:790
206 G_SDIVFIXSAT = 191, // GenericOpcodes.td:800
207 G_UDIVFIXSAT = 192, // GenericOpcodes.td:807
208 G_FADD = 193, // GenericOpcodes.td:980
209 G_FSUB = 194, // GenericOpcodes.td:988
210 G_FMUL = 195, // GenericOpcodes.td:996
211 G_FMA = 196, // GenericOpcodes.td:1005
212 G_FMAD = 197, // GenericOpcodes.td:1014
213 G_FDIV = 198, // GenericOpcodes.td:1022
214 G_FREM = 199, // GenericOpcodes.td:1029
215 G_FMODF = 200, // GenericOpcodes.td:1036
216 G_FPOW = 201, // GenericOpcodes.td:1043
217 G_FPOWI = 202, // GenericOpcodes.td:1050
218 G_FEXP = 203, // GenericOpcodes.td:1057
219 G_FEXP2 = 204, // GenericOpcodes.td:1064
220 G_FEXP10 = 205, // GenericOpcodes.td:1071
221 G_FLOG = 206, // GenericOpcodes.td:1078
222 G_FLOG2 = 207, // GenericOpcodes.td:1085
223 G_FLOG10 = 208, // GenericOpcodes.td:1092
224 G_FLDEXP = 209, // GenericOpcodes.td:1099
225 G_FFREXP = 210, // GenericOpcodes.td:1106
226 G_FNEG = 211, // GenericOpcodes.td:818
227 G_FPEXT = 212, // GenericOpcodes.td:824
228 G_FPTRUNC = 213, // GenericOpcodes.td:830
229 G_FPTOSI = 214, // GenericOpcodes.td:836
230 G_FPTOUI = 215, // GenericOpcodes.td:842
231 G_SITOFP = 216, // GenericOpcodes.td:848
232 G_UITOFP = 217, // GenericOpcodes.td:854
233 G_FPTOSI_SAT = 218, // GenericOpcodes.td:860
234 G_FPTOUI_SAT = 219, // GenericOpcodes.td:866
235 G_FABS = 220, // GenericOpcodes.td:872
236 G_FCOPYSIGN = 221, // GenericOpcodes.td:878
237 G_IS_FPCLASS = 222, // GenericOpcodes.td:891
238 G_FCANONICALIZE = 223, // GenericOpcodes.td:884
239 G_FMINNUM = 224, // GenericOpcodes.td:904
240 G_FMAXNUM = 225, // GenericOpcodes.td:911
241 G_FMINNUM_IEEE = 226, // GenericOpcodes.td:929
242 G_FMAXNUM_IEEE = 227, // GenericOpcodes.td:936
243 G_FMINIMUM = 228, // GenericOpcodes.td:946
244 G_FMAXIMUM = 229, // GenericOpcodes.td:953
245 G_FMINIMUMNUM = 230, // GenericOpcodes.td:961
246 G_FMAXIMUMNUM = 231, // GenericOpcodes.td:968
247 G_GET_FPENV = 232, // GenericOpcodes.td:1236
248 G_SET_FPENV = 233, // GenericOpcodes.td:1243
249 G_RESET_FPENV = 234, // GenericOpcodes.td:1250
250 G_GET_FPMODE = 235, // GenericOpcodes.td:1257
251 G_SET_FPMODE = 236, // GenericOpcodes.td:1264
252 G_RESET_FPMODE = 237, // GenericOpcodes.td:1271
253 G_GET_ROUNDING = 238, // GenericOpcodes.td:1328
254 G_SET_ROUNDING = 239, // GenericOpcodes.td:1334
255 G_PTR_ADD = 240, // GenericOpcodes.td:534
256 G_PTRMASK = 241, // GenericOpcodes.td:542
257 G_SMIN = 242, // GenericOpcodes.td:549
258 G_SMAX = 243, // GenericOpcodes.td:557
259 G_UMIN = 244, // GenericOpcodes.td:565
260 G_UMAX = 245, // GenericOpcodes.td:573
261 G_ABS = 246, // GenericOpcodes.td:581
262 G_LROUND = 247, // GenericOpcodes.td:291
263 G_LLROUND = 248, // GenericOpcodes.td:297
264 G_BR = 249, // GenericOpcodes.td:1631
265 G_BRJT = 250, // GenericOpcodes.td:1661
266 G_VSCALE = 251, // GenericOpcodes.td:1559
267 G_INSERT_SUBVECTOR = 252, // GenericOpcodes.td:1705
268 G_EXTRACT_SUBVECTOR = 253, // GenericOpcodes.td:1713
269 G_INSERT_VECTOR_ELT = 254, // GenericOpcodes.td:1721
270 G_EXTRACT_VECTOR_ELT = 255, // GenericOpcodes.td:1729
271 G_SHUFFLE_VECTOR = 256, // GenericOpcodes.td:1740
272 G_SPLAT_VECTOR = 257, // GenericOpcodes.td:1748
273 G_STEP_VECTOR = 258, // GenericOpcodes.td:1756
274 G_VECTOR_COMPRESS = 259, // GenericOpcodes.td:1763
275 G_CTTZ = 260, // GenericOpcodes.td:211
276 G_CTTZ_ZERO_POISON = 261, // GenericOpcodes.td:217
277 G_CTLZ = 262, // GenericOpcodes.td:199
278 G_CTLZ_ZERO_POISON = 263, // GenericOpcodes.td:205
279 G_CTLS = 264, // GenericOpcodes.td:223
280 G_CTPOP = 265, // GenericOpcodes.td:229
281 G_BSWAP = 266, // GenericOpcodes.td:235
282 G_BITREVERSE = 267, // GenericOpcodes.td:242
283 G_CLMUL = 268, // GenericOpcodes.td:588
284 G_FCEIL = 269, // GenericOpcodes.td:1113
285 G_FCOS = 270, // GenericOpcodes.td:1120
286 G_FSIN = 271, // GenericOpcodes.td:1127
287 G_FSINCOS = 272, // GenericOpcodes.td:1134
288 G_FTAN = 273, // GenericOpcodes.td:1141
289 G_FACOS = 274, // GenericOpcodes.td:1148
290 G_FASIN = 275, // GenericOpcodes.td:1155
291 G_FATAN = 276, // GenericOpcodes.td:1162
292 G_FATAN2 = 277, // GenericOpcodes.td:1169
293 G_FCOSH = 278, // GenericOpcodes.td:1176
294 G_FSINH = 279, // GenericOpcodes.td:1183
295 G_FTANH = 280, // GenericOpcodes.td:1190
296 G_FSQRT = 281, // GenericOpcodes.td:1200
297 G_FFLOOR = 282, // GenericOpcodes.td:1207
298 G_FRINT = 283, // GenericOpcodes.td:1214
299 G_FNEARBYINT = 284, // GenericOpcodes.td:1221
300 G_ADDRSPACE_CAST = 285, // GenericOpcodes.td:248
301 G_BLOCK_ADDR = 286, // GenericOpcodes.td:254
302 G_JUMP_TABLE = 287, // GenericOpcodes.td:260
303 G_DYN_STACKALLOC = 288, // GenericOpcodes.td:266
304 G_STACKSAVE = 289, // GenericOpcodes.td:272
305 G_STACKRESTORE = 290, // GenericOpcodes.td:278
306 G_STRICT_FADD = 291, // GenericOpcodes.td:1813
307 G_STRICT_FSUB = 292, // GenericOpcodes.td:1814
308 G_STRICT_FMUL = 293, // GenericOpcodes.td:1815
309 G_STRICT_FDIV = 294, // GenericOpcodes.td:1816
310 G_STRICT_FREM = 295, // GenericOpcodes.td:1817
311 G_STRICT_FMA = 296, // GenericOpcodes.td:1818
312 G_STRICT_FSQRT = 297, // GenericOpcodes.td:1819
313 G_STRICT_FLDEXP = 298, // GenericOpcodes.td:1820
314 G_STRICT_FCMP = 299, // GenericOpcodes.td:1821
315 G_STRICT_FCMPS = 300, // GenericOpcodes.td:1822
316 G_READ_REGISTER = 301, // GenericOpcodes.td:1680
317 G_WRITE_REGISTER = 302, // GenericOpcodes.td:1690
318 G_MEMCPY = 303, // GenericOpcodes.td:1828
319 G_MEMCPY_INLINE = 304, // GenericOpcodes.td:1836
320 G_MEMMOVE = 305, // GenericOpcodes.td:1844
321 G_MEMSET = 306, // GenericOpcodes.td:1852
322 G_BZERO = 307, // GenericOpcodes.td:1859
323 G_MEMSET_INLINE = 308, // GenericOpcodes.td:1866
324 G_TRAP = 309, // GenericOpcodes.td:1876
325 G_DEBUGTRAP = 310, // GenericOpcodes.td:1883
326 G_UBSANTRAP = 311, // GenericOpcodes.td:1889
327 G_VECREDUCE_SEQ_FADD = 312, // GenericOpcodes.td:1779
328 G_VECREDUCE_SEQ_FMUL = 313, // GenericOpcodes.td:1785
329 G_VECREDUCE_FADD = 314, // GenericOpcodes.td:1791
330 G_VECREDUCE_FMUL = 315, // GenericOpcodes.td:1792
331 G_VECREDUCE_FMAX = 316, // GenericOpcodes.td:1794
332 G_VECREDUCE_FMIN = 317, // GenericOpcodes.td:1795
333 G_VECREDUCE_FMAXIMUM = 318, // GenericOpcodes.td:1796
334 G_VECREDUCE_FMINIMUM = 319, // GenericOpcodes.td:1797
335 G_VECREDUCE_ADD = 320, // GenericOpcodes.td:1799
336 G_VECREDUCE_MUL = 321, // GenericOpcodes.td:1800
337 G_VECREDUCE_AND = 322, // GenericOpcodes.td:1801
338 G_VECREDUCE_OR = 323, // GenericOpcodes.td:1802
339 G_VECREDUCE_XOR = 324, // GenericOpcodes.td:1803
340 G_VECREDUCE_SMAX = 325, // GenericOpcodes.td:1804
341 G_VECREDUCE_SMIN = 326, // GenericOpcodes.td:1805
342 G_VECREDUCE_UMAX = 327, // GenericOpcodes.td:1806
343 G_VECREDUCE_UMIN = 328, // GenericOpcodes.td:1807
344 G_SBFX = 329, // GenericOpcodes.td:1901
345 G_UBFX = 330, // GenericOpcodes.td:1909
346 ADJCALLSTACKDOWN = 331, // SparcInstrInfo.td:613
347 ADJCALLSTACKUP = 332, // SparcInstrInfo.td:616
348 GETPCX = 333, // SparcInstrInfo.td:609
349 SELECT_CC_DFP_FCC = 334, // SparcInstrInfo.td:689
350 SELECT_CC_DFP_ICC = 335, // SparcInstrInfo.td:646
351 SELECT_CC_DFP_XCC = 336, // SparcInstrInfo.td:667
352 SELECT_CC_FP_FCC = 337, // SparcInstrInfo.td:685
353 SELECT_CC_FP_ICC = 338, // SparcInstrInfo.td:641
354 SELECT_CC_FP_XCC = 339, // SparcInstrInfo.td:662
355 SELECT_CC_Int_FCC = 340, // SparcInstrInfo.td:680
356 SELECT_CC_Int_ICC = 341, // SparcInstrInfo.td:637
357 SELECT_CC_Int_XCC = 342, // SparcInstrInfo.td:658
358 SELECT_CC_QFP_FCC = 343, // SparcInstrInfo.td:693
359 SELECT_CC_QFP_ICC = 344, // SparcInstrInfo.td:651
360 SELECT_CC_QFP_XCC = 345, // SparcInstrInfo.td:672
361 SET = 346, // SparcInstrAliases.td:562
362 SETSW = 347, // SparcInstrAliases.td:566
363 SETX = 348, // SparcInstrAliases.td:570
364 V8BAR = 349, // SparcInstrInfo.td:605
365 ADDCCri = 350, // SparcInstrInfo.td:502
366 ADDCCrr = 351, // SparcInstrInfo.td:497
367 ADDCri = 352, // SparcInstrInfo.td:516
368 ADDCrr = 353, // SparcInstrInfo.td:512
369 ADDEri = 354, // SparcInstrInfo.td:502
370 ADDErr = 355, // SparcInstrInfo.td:497
371 ADDXC = 356, // SparcInstrVIS.td:185
372 ADDXCCC = 357, // SparcInstrVIS.td:188
373 ADDri = 358, // SparcInstrInfo.td:502
374 ADDrr = 359, // SparcInstrInfo.td:497
375 AES_DROUND01 = 360, // SparcInstrCrypto.td:23
376 AES_DROUND01_LAST = 361, // SparcInstrCrypto.td:27
377 AES_DROUND23 = 362, // SparcInstrCrypto.td:24
378 AES_DROUND23_LAST = 363, // SparcInstrCrypto.td:28
379 AES_EROUND01 = 364, // SparcInstrCrypto.td:21
380 AES_EROUND01_LAST = 365, // SparcInstrCrypto.td:25
381 AES_EROUND23 = 366, // SparcInstrCrypto.td:22
382 AES_EROUND23_LAST = 367, // SparcInstrCrypto.td:26
383 AES_KEXPAND0 = 368, // SparcInstrCrypto.td:29
384 AES_KEXPAND1 = 369, // SparcInstrCrypto.td:32
385 AES_KEXPAND2 = 370, // SparcInstrCrypto.td:33
386 ALIGNADDR = 371, // SparcInstrVIS.td:96
387 ALIGNADDRL = 372, // SparcInstrVIS.td:97
388 ALLCLEAN = 373, // SparcInstrUAOSA.td:39
389 ANDCCri = 374, // SparcInstrInfo.td:516
390 ANDCCrr = 375, // SparcInstrInfo.td:512
391 ANDNCCri = 376, // SparcInstrInfo.td:516
392 ANDNCCrr = 377, // SparcInstrInfo.td:512
393 ANDNri = 378, // SparcInstrInfo.td:874
394 ANDNrr = 379, // SparcInstrInfo.td:870
395 ANDri = 380, // SparcInstrInfo.td:502
396 ANDrr = 381, // SparcInstrInfo.td:497
397 ARRAY16 = 382, // SparcInstrVIS.td:154
398 ARRAY32 = 383, // SparcInstrVIS.td:155
399 ARRAY8 = 384, // SparcInstrVIS.td:153
400 BA = 385, // SparcInstrInfo.td:987
401 BCOND = 386, // SparcInstrInfo.td:1036
402 BCONDA = 387, // SparcInstrInfo.td:1039
403 BINDri = 388, // SparcInstrInfo.td:1029
404 BINDrr = 389, // SparcInstrInfo.td:1025
405 BMASK = 390, // SparcInstrVIS.td:165
406 BPFCC = 391, // SparcInstrInfo.td:1060
407 BPFCCA = 392, // SparcInstrInfo.td:1063
408 BPFCCANT = 393, // SparcInstrInfo.td:1069
409 BPFCCNT = 394, // SparcInstrInfo.td:1066
410 BPICC = 395, // SparcInstrInfo.td:1001
411 BPICCA = 396, // SparcInstrInfo.td:1005
412 BPICCANT = 397, // SparcInstrInfo.td:1013
413 BPICCNT = 398, // SparcInstrInfo.td:1009
414 BPR = 399, // SparcInstr64Bit.td:334
415 BPRA = 400, // SparcInstr64Bit.td:336
416 BPRANT = 401, // SparcInstr64Bit.td:340
417 BPRNT = 402, // SparcInstr64Bit.td:338
418 BPXCC = 403, // SparcInstrInfo.td:1001
419 BPXCCA = 404, // SparcInstrInfo.td:1005
420 BPXCCANT = 405, // SparcInstrInfo.td:1013
421 BPXCCNT = 406, // SparcInstrInfo.td:1009
422 BSHUFFLE = 407, // SparcInstrVIS.td:166
423 CALL = 408, // SparcInstrInfo.td:1122
424 CALLi = 409, // SparcInstrInfo.td:1134
425 CALLri = 410, // SparcInstrInfo.td:1149
426 CALLrii = 411, // SparcInstrInfo.td:1160
427 CALLrr = 412, // SparcInstrInfo.td:1144
428 CALLrri = 413, // SparcInstrInfo.td:1157
429 CAMELLIA_F = 414, // SparcInstrCrypto.td:37
430 CAMELLIA_FL = 415, // SparcInstrCrypto.td:38
431 CAMELLIA_FLI = 416, // SparcInstrCrypto.td:41
432 CASAri = 417, // SparcInstrInfo.td:1822
433 CASArr = 418, // SparcInstrInfo.td:1814
434 CASXAri = 419, // SparcInstr64Bit.td:452
435 CASXArr = 420, // SparcInstr64Bit.td:445
436 CMASK16 = 421, // SparcInstrVIS.td:193
437 CMASK32 = 422, // SparcInstrVIS.td:195
438 CMASK8 = 423, // SparcInstrVIS.td:191
439 CPBCOND = 424, // SparcInstrInfo.td:1112
440 CPBCONDA = 425, // SparcInstrInfo.td:1115
441 CRC32C = 426, // SparcInstrCrypto.td:45
442 CWBCONDri = 427, // SparcInstrUAOSA.td:31
443 CWBCONDrr = 428, // SparcInstrUAOSA.td:28
444 CXBCONDri = 429, // SparcInstrUAOSA.td:31
445 CXBCONDrr = 430, // SparcInstrUAOSA.td:28
446 DES_IIP = 431, // SparcInstrCrypto.td:54
447 DES_IP = 432, // SparcInstrCrypto.td:51
448 DES_KEXPAND = 433, // SparcInstrCrypto.td:58
449 DES_ROUND = 434, // SparcInstrCrypto.td:49
450 DONE = 435, // SparcInstrInfo.td:1876
451 EDGE16 = 436, // SparcInstrVIS.td:146
452 EDGE16L = 437, // SparcInstrVIS.td:147
453 EDGE16LN = 438, // SparcInstrVIS.td:175
454 EDGE16N = 439, // SparcInstrVIS.td:174
455 EDGE32 = 440, // SparcInstrVIS.td:148
456 EDGE32L = 441, // SparcInstrVIS.td:149
457 EDGE32LN = 442, // SparcInstrVIS.td:177
458 EDGE32N = 443, // SparcInstrVIS.td:176
459 EDGE8 = 444, // SparcInstrVIS.td:144
460 EDGE8L = 445, // SparcInstrVIS.td:145
461 EDGE8LN = 446, // SparcInstrVIS.td:173
462 EDGE8N = 447, // SparcInstrVIS.td:172
463 FABSD = 448, // SparcInstrInfo.td:1730
464 FABSQ = 449, // SparcInstrInfo.td:1735
465 FABSS = 450, // SparcInstrInfo.td:1415
466 FADDD = 451, // SparcInstrInfo.td:1450
467 FADDQ = 452, // SparcInstrInfo.td:1455
468 FADDS = 453, // SparcInstrInfo.td:1445
469 FALIGNADATA = 454, // SparcInstrVIS.td:98
470 FAND = 455, // SparcInstrVIS.td:116
471 FANDNOT1 = 456, // SparcInstrVIS.td:129
472 FANDNOT1S = 457, // SparcInstrVIS.td:130
473 FANDNOT2 = 458, // SparcInstrVIS.td:131
474 FANDNOT2S = 459, // SparcInstrVIS.td:132
475 FANDS = 460, // SparcInstrVIS.td:117
476 FBCOND = 461, // SparcInstrInfo.td:1076
477 FBCONDA = 462, // SparcInstrInfo.td:1079
478 FBCONDA_V9 = 463, // SparcInstrInfo.td:1090
479 FBCOND_V9 = 464, // SparcInstrInfo.td:1086
480 FCHKSM16 = 465, // SparcInstrVIS.td:200
481 FCMPD = 466, // SparcInstrInfo.td:1541
482 FCMPD_V9 = 467, // SparcInstrInfo.td:1566
483 FCMPEQ16 = 468, // SparcInstrVIS.td:140
484 FCMPEQ32 = 469, // SparcInstrVIS.td:141
485 FCMPGT16 = 470, // SparcInstrVIS.td:134
486 FCMPGT32 = 471, // SparcInstrVIS.td:135
487 FCMPLE16 = 472, // SparcInstrVIS.td:136
488 FCMPLE32 = 473, // SparcInstrVIS.td:137
489 FCMPNE16 = 474, // SparcInstrVIS.td:138
490 FCMPNE32 = 475, // SparcInstrVIS.td:139
491 FCMPQ = 476, // SparcInstrInfo.td:1546
492 FCMPQ_V9 = 477, // SparcInstrInfo.td:1571
493 FCMPS = 478, // SparcInstrInfo.td:1536
494 FCMPS_V9 = 479, // SparcInstrInfo.td:1561
495 FDIVD = 480, // SparcInstrInfo.td:1517
496 FDIVQ = 481, // SparcInstrInfo.td:1522
497 FDIVS = 482, // SparcInstrInfo.td:1512
498 FDMULQ = 483, // SparcInstrInfo.td:1503
499 FDTOI = 484, // SparcInstrInfo.td:1363
500 FDTOQ = 485, // SparcInstrInfo.td:1390
501 FDTOS = 486, // SparcInstrInfo.td:1385
502 FDTOX = 487, // SparcInstr64Bit.td:408
503 FEXPAND = 488, // SparcInstrVIS.td:72
504 FHADDD = 489, // SparcInstrVIS.td:205
505 FHADDS = 490, // SparcInstrVIS.td:202
506 FHSUBD = 491, // SparcInstrVIS.td:211
507 FHSUBS = 492, // SparcInstrVIS.td:208
508 FITOD = 493, // SparcInstrInfo.td:1346
509 FITOQ = 494, // SparcInstrInfo.td:1351
510 FITOS = 495, // SparcInstrInfo.td:1341
511 FLCMPD = 496, // SparcInstrVIS.td:217
512 FLCMPS = 497, // SparcInstrVIS.td:214
513 FLUSH = 498, // SparcInstrInfo.td:1335
514 FLUSHW = 499, // SparcInstrInfo.td:623
515 FLUSHri = 500, // SparcInstrInfo.td:1328
516 FLUSHrr = 501, // SparcInstrInfo.td:1326
517 FMADDD = 502, // SparcInstrUAOSA.td:49
518 FMADDS = 503, // SparcInstrUAOSA.td:48
519 FMEAN16 = 504, // SparcInstrVIS.td:221
520 FMOVD = 505, // SparcInstrInfo.td:1714
521 FMOVD_FCC = 506, // SparcInstrInfo.td:1697
522 FMOVD_ICC = 507, // SparcInstrInfo.td:1678
523 FMOVD_XCC = 508, // SparcInstr64Bit.td:315
524 FMOVQ = 509, // SparcInstrInfo.td:1718
525 FMOVQ_FCC = 510, // SparcInstrInfo.td:1703
526 FMOVQ_ICC = 511, // SparcInstrInfo.td:1684
527 FMOVQ_XCC = 512, // SparcInstr64Bit.td:321
528 FMOVRD = 513, // SparcInstr64Bit.td:373
529 FMOVRQ = 514, // SparcInstr64Bit.td:378
530 FMOVRS = 515, // SparcInstr64Bit.td:369
531 FMOVS = 516, // SparcInstrInfo.td:1407
532 FMOVS_FCC = 517, // SparcInstrInfo.td:1692
533 FMOVS_ICC = 518, // SparcInstrInfo.td:1673
534 FMOVS_XCC = 519, // SparcInstr64Bit.td:310
535 FMSUBD = 520, // SparcInstrUAOSA.td:51
536 FMSUBS = 521, // SparcInstrUAOSA.td:50
537 FMUL8SUX16 = 522, // SparcInstrVIS.td:87
538 FMUL8ULX16 = 523, // SparcInstrVIS.td:88
539 FMUL8X16 = 524, // SparcInstrVIS.td:78
540 FMUL8X16AL = 525, // SparcInstrVIS.td:84
541 FMUL8X16AU = 526, // SparcInstrVIS.td:81
542 FMULD = 527, // SparcInstrInfo.td:1485
543 FMULD8SUX16 = 528, // SparcInstrVIS.td:89
544 FMULD8ULX16 = 529, // SparcInstrVIS.td:92
545 FMULQ = 530, // SparcInstrInfo.td:1490
546 FMULS = 531, // SparcInstrInfo.td:1479
547 FNADDD = 532, // SparcInstrVIS.td:226
548 FNADDS = 533, // SparcInstrVIS.td:223
549 FNAND = 534, // SparcInstrVIS.td:118
550 FNANDS = 535, // SparcInstrVIS.td:119
551 FNEGD = 536, // SparcInstrInfo.td:1721
552 FNEGQ = 537, // SparcInstrInfo.td:1726
553 FNEGS = 538, // SparcInstrInfo.td:1410
554 FNHADDD = 539, // SparcInstrVIS.td:232
555 FNHADDS = 540, // SparcInstrVIS.td:229
556 FNMADDD = 541, // SparcInstrUAOSA.td:54
557 FNMADDS = 542, // SparcInstrUAOSA.td:53
558 FNMSUBD = 543, // SparcInstrUAOSA.td:56
559 FNMSUBS = 544, // SparcInstrUAOSA.td:55
560 FNMULD = 545, // SparcInstrVIS.td:239
561 FNMULS = 546, // SparcInstrVIS.td:236
562 FNOR = 547, // SparcInstrVIS.td:114
563 FNORS = 548, // SparcInstrVIS.td:115
564 FNOT1 = 549, // SparcInstrVIS.td:108
565 FNOT1S = 550, // SparcInstrVIS.td:109
566 FNOT2 = 551, // SparcInstrVIS.td:110
567 FNOT2S = 552, // SparcInstrVIS.td:111
568 FNSMULD = 553, // SparcInstrVIS.td:242
569 FONE = 554, // SparcInstrVIS.td:102
570 FONES = 555, // SparcInstrVIS.td:103
571 FOR = 556, // SparcInstrVIS.td:112
572 FORNOT1 = 557, // SparcInstrVIS.td:125
573 FORNOT1S = 558, // SparcInstrVIS.td:126
574 FORNOT2 = 559, // SparcInstrVIS.td:127
575 FORNOT2S = 560, // SparcInstrVIS.td:128
576 FORS = 561, // SparcInstrVIS.td:113
577 FPACK16 = 562, // SparcInstrVIS.td:66
578 FPACK32 = 563, // SparcInstrVIS.td:67
579 FPACKFIX = 564, // SparcInstrVIS.td:69
580 FPADD16 = 565, // SparcInstrVIS.td:57
581 FPADD16S = 566, // SparcInstrVIS.td:58
582 FPADD32 = 567, // SparcInstrVIS.td:59
583 FPADD32S = 568, // SparcInstrVIS.td:60
584 FPADD64 = 569, // SparcInstrVIS.td:246
585 FPMADDX = 570, // SparcInstrUAOSA.td:66
586 FPMADDXHI = 571, // SparcInstrUAOSA.td:67
587 FPMERGE = 572, // SparcInstrVIS.td:74
588 FPSUB16 = 573, // SparcInstrVIS.td:61
589 FPSUB16S = 574, // SparcInstrVIS.td:62
590 FPSUB32 = 575, // SparcInstrVIS.td:63
591 FPSUB32S = 576, // SparcInstrVIS.td:64
592 FQTOD = 577, // SparcInstrInfo.td:1400
593 FQTOI = 578, // SparcInstrInfo.td:1368
594 FQTOS = 579, // SparcInstrInfo.td:1395
595 FQTOX = 580, // SparcInstr64Bit.td:413
596 FSLAS16 = 581, // SparcInstrVIS.td:252
597 FSLAS32 = 582, // SparcInstrVIS.td:254
598 FSLL16 = 583, // SparcInstrVIS.td:248
599 FSLL32 = 584, // SparcInstrVIS.td:250
600 FSMULD = 585, // SparcInstrInfo.td:1496
601 FSQRTD = 586, // SparcInstrInfo.td:1431
602 FSQRTQ = 587, // SparcInstrInfo.td:1436
603 FSQRTS = 588, // SparcInstrInfo.td:1426
604 FSRA16 = 589, // SparcInstrVIS.td:253
605 FSRA32 = 590, // SparcInstrVIS.td:255
606 FSRC1 = 591, // SparcInstrVIS.td:104
607 FSRC1S = 592, // SparcInstrVIS.td:105
608 FSRC2 = 593, // SparcInstrVIS.td:106
609 FSRC2S = 594, // SparcInstrVIS.td:107
610 FSRL16 = 595, // SparcInstrVIS.td:249
611 FSRL32 = 596, // SparcInstrVIS.td:251
612 FSTOD = 597, // SparcInstrInfo.td:1375
613 FSTOI = 598, // SparcInstrInfo.td:1358
614 FSTOQ = 599, // SparcInstrInfo.td:1380
615 FSTOX = 600, // SparcInstr64Bit.td:404
616 FSUBD = 601, // SparcInstrInfo.td:1466
617 FSUBQ = 602, // SparcInstrInfo.td:1471
618 FSUBS = 603, // SparcInstrInfo.td:1461
619 FXNOR = 604, // SparcInstrVIS.td:122
620 FXNORS = 605, // SparcInstrVIS.td:123
621 FXOR = 606, // SparcInstrVIS.td:120
622 FXORS = 607, // SparcInstrVIS.td:121
623 FXTOD = 608, // SparcInstr64Bit.td:394
624 FXTOQ = 609, // SparcInstr64Bit.td:399
625 FXTOS = 610, // SparcInstr64Bit.td:390
626 FZERO = 611, // SparcInstrVIS.td:100
627 FZEROS = 612, // SparcInstrVIS.td:101
628 GDOP_LDXrr = 613, // SparcInstr64Bit.td:219
629 GDOP_LDrr = 614, // SparcInstrInfo.td:749
630 INVALW = 615, // SparcInstrUAOSA.td:40
631 JMPLri = 616, // SparcInstrInfo.td:1175
632 JMPLrr = 617, // SparcInstrInfo.td:1170
633 LDAri = 618, // SparcInstrInfo.td:545
634 LDArr = 619, // SparcInstrInfo.td:540
635 LDCSRri = 620, // SparcInstrInfo.td:728
636 LDCSRrr = 621, // SparcInstrInfo.td:726
637 LDCri = 622, // SparcInstrInfo.td:530
638 LDCrr = 623, // SparcInstrInfo.td:525
639 LDDAri = 624, // SparcInstrInfo.td:545
640 LDDArr = 625, // SparcInstrInfo.td:540
641 LDDCri = 626, // SparcInstrInfo.td:530
642 LDDCrr = 627, // SparcInstrInfo.td:525
643 LDDFAri = 628, // SparcInstrInfo.td:545
644 LDDFArr = 629, // SparcInstrInfo.td:540
645 LDDFri = 630, // SparcInstrInfo.td:530
646 LDDFrr = 631, // SparcInstrInfo.td:525
647 LDDri = 632, // SparcInstrInfo.td:530
648 LDDrr = 633, // SparcInstrInfo.td:525
649 LDFAri = 634, // SparcInstrInfo.td:545
650 LDFArr = 635, // SparcInstrInfo.td:540
651 LDFSRri = 636, // SparcInstrInfo.td:737
652 LDFSRrr = 637, // SparcInstrInfo.td:735
653 LDFri = 638, // SparcInstrInfo.td:530
654 LDFrr = 639, // SparcInstrInfo.td:525
655 LDQFAri = 640, // SparcInstrInfo.td:545
656 LDQFArr = 641, // SparcInstrInfo.td:540
657 LDQFri = 642, // SparcInstrInfo.td:530
658 LDQFrr = 643, // SparcInstrInfo.td:525
659 LDSBAri = 644, // SparcInstrInfo.td:545
660 LDSBArr = 645, // SparcInstrInfo.td:540
661 LDSBri = 646, // SparcInstrInfo.td:530
662 LDSBrr = 647, // SparcInstrInfo.td:525
663 LDSHAri = 648, // SparcInstrInfo.td:545
664 LDSHArr = 649, // SparcInstrInfo.td:540
665 LDSHri = 650, // SparcInstrInfo.td:530
666 LDSHrr = 651, // SparcInstrInfo.td:525
667 LDSTUBAri = 652, // SparcInstrInfo.td:828
668 LDSTUBArr = 653, // SparcInstrInfo.td:824
669 LDSTUBri = 654, // SparcInstrInfo.td:822
670 LDSTUBrr = 655, // SparcInstrInfo.td:820
671 LDSWAri = 656, // SparcInstrInfo.td:545
672 LDSWArr = 657, // SparcInstrInfo.td:540
673 LDSWri = 658, // SparcInstrInfo.td:530
674 LDSWrr = 659, // SparcInstrInfo.td:525
675 LDUBAri = 660, // SparcInstrInfo.td:545
676 LDUBArr = 661, // SparcInstrInfo.td:540
677 LDUBri = 662, // SparcInstrInfo.td:530
678 LDUBrr = 663, // SparcInstrInfo.td:525
679 LDUHAri = 664, // SparcInstrInfo.td:545
680 LDUHArr = 665, // SparcInstrInfo.td:540
681 LDUHri = 666, // SparcInstrInfo.td:530
682 LDUHrr = 667, // SparcInstrInfo.td:525
683 LDXAri = 668, // SparcInstrInfo.td:545
684 LDXArr = 669, // SparcInstrInfo.td:540
685 LDXFSRri = 670, // SparcInstrInfo.td:743
686 LDXFSRrr = 671, // SparcInstrInfo.td:741
687 LDXri = 672, // SparcInstrInfo.td:530
688 LDXrr = 673, // SparcInstrInfo.td:525
689 LDri = 674, // SparcInstrInfo.td:530
690 LDrr = 675, // SparcInstrInfo.td:525
691 LZCNT = 676, // SparcInstrVIS.td:258
692 MD5 = 677, // SparcInstrCrypto.td:65
693 MEMBARi = 678, // SparcInstrInfo.td:1804
694 MONTMUL = 679, // SparcInstrCrypto.td:95
695 MONTSQR = 680, // SparcInstrCrypto.td:96
696 MOVDTOX = 681, // SparcInstrVIS.td:266
697 MOVFCCri = 682, // SparcInstrInfo.td:1664
698 MOVFCCrr = 683, // SparcInstrInfo.td:1659
699 MOVICCri = 684, // SparcInstrInfo.td:1650
700 MOVICCrr = 685, // SparcInstrInfo.td:1644
701 MOVRri = 686, // SparcInstr64Bit.td:361
702 MOVRrr = 687, // SparcInstr64Bit.td:356
703 MOVSTOSW = 688, // SparcInstrVIS.td:262
704 MOVSTOUW = 689, // SparcInstrVIS.td:264
705 MOVWTOS = 690, // SparcInstrVIS.td:268
706 MOVXCCri = 691, // SparcInstr64Bit.td:302
707 MOVXCCrr = 692, // SparcInstr64Bit.td:297
708 MOVXTOD = 693, // SparcInstrVIS.td:270
709 MPMUL = 694, // SparcInstrCrypto.td:94
710 MULSCCri = 695, // SparcInstrInfo.td:516
711 MULSCCrr = 696, // SparcInstrInfo.td:512
712 MULXri = 697, // SparcInstrInfo.td:502
713 MULXrr = 698, // SparcInstrInfo.td:497
714 NOP = 699, // SparcInstrInfo.td:865
715 NORMALW = 700, // SparcInstrUAOSA.td:41
716 ORCCri = 701, // SparcInstrInfo.td:516
717 ORCCrr = 702, // SparcInstrInfo.td:512
718 ORNCCri = 703, // SparcInstrInfo.td:516
719 ORNCCrr = 704, // SparcInstrInfo.td:512
720 ORNri = 705, // SparcInstrInfo.td:884
721 ORNrr = 706, // SparcInstrInfo.td:880
722 ORri = 707, // SparcInstrInfo.td:502
723 ORrr = 708, // SparcInstrInfo.td:497
724 OTHERW = 709, // SparcInstrUAOSA.td:42
725 PDIST = 710, // SparcInstrVIS.td:151
726 PDISTN = 711, // SparcInstrVIS.td:274
727 POPCrr = 712, // SparcInstrInfo.td:1797
728 PREFETCHAi = 713, // SparcInstrInfo.td:1900
729 PREFETCHAr = 714, // SparcInstrInfo.td:1896
730 PREFETCHi = 715, // SparcInstrInfo.td:1893
731 PREFETCHr = 716, // SparcInstrInfo.td:1890
732 PWRPSRri = 717, // SparcInstrInfo.td:1857
733 PWRPSRrr = 718, // SparcInstrInfo.td:1854
734 RDASR = 719, // SparcInstrInfo.td:1254
735 RDFQ = 720, // SparcInstrInfo.td:1919
736 RDPR = 721, // SparcInstrInfo.td:1910
737 RDPSR = 722, // SparcInstrInfo.td:1261
738 RDTBR = 723, // SparcInstrInfo.td:1271
739 RDWIM = 724, // SparcInstrInfo.td:1266
740 RESTORED = 725, // SparcInstrInfo.td:1885
741 RESTOREri = 726, // SparcInstrInfo.td:516
742 RESTORErr = 727, // SparcInstrInfo.td:512
743 RET = 728, // SparcInstrInfo.td:1194
744 RETL = 729, // SparcInstrInfo.td:1187
745 RETRY = 730, // SparcInstrInfo.td:1879
746 RETTri = 731, // SparcInstrInfo.td:1209
747 RETTrr = 732, // SparcInstrInfo.td:1204
748 SAVED = 733, // SparcInstrInfo.td:1882
749 SAVEri = 734, // SparcInstrInfo.td:516
750 SAVErr = 735, // SparcInstrInfo.td:512
751 SDIVCCri = 736, // SparcInstrInfo.td:516
752 SDIVCCrr = 737, // SparcInstrInfo.td:512
753 SDIVXri = 738, // SparcInstrInfo.td:502
754 SDIVXrr = 739, // SparcInstrInfo.td:497
755 SDIVri = 740, // SparcInstrInfo.td:516
756 SDIVrr = 741, // SparcInstrInfo.td:512
757 SETHIi = 742, // SparcInstrInfo.td:856
758 SHA1 = 743, // SparcInstrCrypto.td:68
759 SHA256 = 744, // SparcInstrCrypto.td:71
760 SHA512 = 745, // SparcInstrCrypto.td:75
761 SHUTDOWN = 746, // SparcInstrVIS.td:157
762 SIAM = 747, // SparcInstrVIS.td:169
763 SIR = 748, // SparcInstrInfo.td:1808
764 SLLXri = 749, // SparcInstrFormats.td:299
765 SLLXrr = 750, // SparcInstrFormats.td:295
766 SLLri = 751, // SparcInstrFormats.td:299
767 SLLrr = 752, // SparcInstrFormats.td:295
768 SMACri = 753, // SparcInstrInfo.td:1835
769 SMACrr = 754, // SparcInstrInfo.td:1830
770 SMULCCri = 755, // SparcInstrInfo.td:516
771 SMULCCrr = 756, // SparcInstrInfo.td:512
772 SMULri = 757, // SparcInstrInfo.td:502
773 SMULrr = 758, // SparcInstrInfo.td:497
774 SRAXri = 759, // SparcInstrFormats.td:299
775 SRAXrr = 760, // SparcInstrFormats.td:295
776 SRAri = 761, // SparcInstrFormats.td:299
777 SRArr = 762, // SparcInstrFormats.td:295
778 SRLXri = 763, // SparcInstrFormats.td:299
779 SRLXrr = 764, // SparcInstrFormats.td:295
780 SRLri = 765, // SparcInstrFormats.td:299
781 SRLrr = 766, // SparcInstrFormats.td:295
782 STAri = 767, // SparcInstrInfo.td:581
783 STArr = 768, // SparcInstrInfo.td:575
784 STBAR = 769, // SparcInstrInfo.td:1316
785 STBAri = 770, // SparcInstrInfo.td:581
786 STBArr = 771, // SparcInstrInfo.td:575
787 STBri = 772, // SparcInstrInfo.td:566
788 STBrr = 773, // SparcInstrInfo.td:561
789 STCSRri = 774, // SparcInstrInfo.td:784
790 STCSRrr = 775, // SparcInstrInfo.td:782
791 STCri = 776, // SparcInstrInfo.td:566
792 STCrr = 777, // SparcInstrInfo.td:561
793 STDAri = 778, // SparcInstrInfo.td:581
794 STDArr = 779, // SparcInstrInfo.td:575
795 STDCQri = 780, // SparcInstrInfo.td:790
796 STDCQrr = 781, // SparcInstrInfo.td:788
797 STDCri = 782, // SparcInstrInfo.td:566
798 STDCrr = 783, // SparcInstrInfo.td:561
799 STDFAri = 784, // SparcInstrInfo.td:581
800 STDFArr = 785, // SparcInstrInfo.td:575
801 STDFQri = 786, // SparcInstrInfo.td:805
802 STDFQrr = 787, // SparcInstrInfo.td:803
803 STDFri = 788, // SparcInstrInfo.td:566
804 STDFrr = 789, // SparcInstrInfo.td:561
805 STDri = 790, // SparcInstrInfo.td:566
806 STDrr = 791, // SparcInstrInfo.td:561
807 STFAri = 792, // SparcInstrInfo.td:581
808 STFArr = 793, // SparcInstrInfo.td:575
809 STFSRri = 794, // SparcInstrInfo.td:799
810 STFSRrr = 795, // SparcInstrInfo.td:797
811 STFri = 796, // SparcInstrInfo.td:566
812 STFrr = 797, // SparcInstrInfo.td:561
813 STHAri = 798, // SparcInstrInfo.td:581
814 STHArr = 799, // SparcInstrInfo.td:575
815 STHri = 800, // SparcInstrInfo.td:566
816 STHrr = 801, // SparcInstrInfo.td:561
817 STQFAri = 802, // SparcInstrInfo.td:581
818 STQFArr = 803, // SparcInstrInfo.td:575
819 STQFri = 804, // SparcInstrInfo.td:566
820 STQFrr = 805, // SparcInstrInfo.td:561
821 STXAri = 806, // SparcInstrInfo.td:581
822 STXArr = 807, // SparcInstrInfo.td:575
823 STXFSRri = 808, // SparcInstrInfo.td:812
824 STXFSRrr = 809, // SparcInstrInfo.td:810
825 STXri = 810, // SparcInstrInfo.td:566
826 STXrr = 811, // SparcInstrInfo.td:561
827 STri = 812, // SparcInstrInfo.td:566
828 STrr = 813, // SparcInstrInfo.td:561
829 SUBCCri = 814, // SparcInstrInfo.td:502
830 SUBCCrr = 815, // SparcInstrInfo.td:497
831 SUBCri = 816, // SparcInstrInfo.td:516
832 SUBCrr = 817, // SparcInstrInfo.td:512
833 SUBEri = 818, // SparcInstrInfo.td:502
834 SUBErr = 819, // SparcInstrInfo.td:497
835 SUBri = 820, // SparcInstrInfo.td:502
836 SUBrr = 821, // SparcInstrInfo.td:497
837 SWAPAri = 822, // SparcInstrInfo.td:848
838 SWAPArr = 823, // SparcInstrInfo.td:843
839 SWAPri = 824, // SparcInstrInfo.td:839
840 SWAPrr = 825, // SparcInstrInfo.td:835
841 TA1 = 826, // SparcInstrInfo.td:1250
842 TA3 = 827, // SparcInstrInfo.td:627
843 TA5 = 828, // SparcInstrInfo.td:1247
844 TADDCCTVri = 829, // SparcInstrInfo.td:516
845 TADDCCTVrr = 830, // SparcInstrInfo.td:512
846 TADDCCri = 831, // SparcInstrInfo.td:516
847 TADDCCrr = 832, // SparcInstrInfo.td:512
848 TAIL_CALL = 833, // SparcInstrInfo.td:1616
849 TAIL_CALLri = 834, // SparcInstrInfo.td:1630
850 TICCri = 835, // SparcInstrInfo.td:1236
851 TICCrr = 836, // SparcInstrInfo.td:1232
852 TLS_ADDrr = 837, // SparcInstrInfo.td:1582
853 TLS_CALL = 838, // SparcInstrInfo.td:1599
854 TLS_LDXrr = 839, // SparcInstr64Bit.td:213
855 TLS_LDrr = 840, // SparcInstrInfo.td:1590
856 TRAPri = 841, // SparcInstrInfo.td:1225
857 TRAPrr = 842, // SparcInstrInfo.td:1221
858 TSUBCCTVri = 843, // SparcInstrInfo.td:516
859 TSUBCCTVrr = 844, // SparcInstrInfo.td:512
860 TSUBCCri = 845, // SparcInstrInfo.td:516
861 TSUBCCrr = 846, // SparcInstrInfo.td:512
862 TXCCri = 847, // SparcInstrInfo.td:1236
863 TXCCrr = 848, // SparcInstrInfo.td:1232
864 UDIVCCri = 849, // SparcInstrInfo.td:516
865 UDIVCCrr = 850, // SparcInstrInfo.td:512
866 UDIVXri = 851, // SparcInstrInfo.td:502
867 UDIVXrr = 852, // SparcInstrInfo.td:497
868 UDIVri = 853, // SparcInstrInfo.td:516
869 UDIVrr = 854, // SparcInstrInfo.td:512
870 UMACri = 855, // SparcInstrInfo.td:1845
871 UMACrr = 856, // SparcInstrInfo.td:1840
872 UMULCCri = 857, // SparcInstrInfo.td:516
873 UMULCCrr = 858, // SparcInstrInfo.td:512
874 UMULXHI = 859, // SparcInstrVIS.td:276
875 UMULri = 860, // SparcInstrInfo.td:502
876 UMULrr = 861, // SparcInstrInfo.td:497
877 UNIMP = 862, // SparcInstrInfo.td:1321
878 V9FCMPD = 863, // SparcInstrInfo.td:1745
879 V9FCMPED = 864, // SparcInstrInfo.td:1757
880 V9FCMPEQ = 865, // SparcInstrInfo.td:1760
881 V9FCMPES = 866, // SparcInstrInfo.td:1754
882 V9FCMPQ = 867, // SparcInstrInfo.td:1748
883 V9FCMPS = 868, // SparcInstrInfo.td:1742
884 V9FMOVD_FCC = 869, // SparcInstrInfo.td:1781
885 V9FMOVQ_FCC = 870, // SparcInstrInfo.td:1786
886 V9FMOVS_FCC = 871, // SparcInstrInfo.td:1777
887 V9MOVFCCri = 872, // SparcInstrInfo.td:1773
888 V9MOVFCCrr = 873, // SparcInstrInfo.td:1769
889 WRASRri = 874, // SparcInstrInfo.td:1280
890 WRASRrr = 875, // SparcInstrInfo.td:1277
891 WRPRri = 876, // SparcInstrInfo.td:1929
892 WRPRrr = 877, // SparcInstrInfo.td:1926
893 WRPSRri = 878, // SparcInstrInfo.td:1290
894 WRPSRrr = 879, // SparcInstrInfo.td:1287
895 WRTBRri = 880, // SparcInstrInfo.td:1308
896 WRTBRrr = 881, // SparcInstrInfo.td:1305
897 WRWIMri = 882, // SparcInstrInfo.td:1299
898 WRWIMrr = 883, // SparcInstrInfo.td:1296
899 XMULX = 884, // SparcInstrVIS.td:277
900 XMULXHI = 885, // SparcInstrVIS.td:278
901 XNORCCri = 886, // SparcInstrInfo.td:516
902 XNORCCrr = 887, // SparcInstrInfo.td:512
903 XNORri = 888, // SparcInstrInfo.td:893
904 XNORrr = 889, // SparcInstrInfo.td:889
905 XORCCri = 890, // SparcInstrInfo.td:516
906 XORCCrr = 891, // SparcInstrInfo.td:512
907 XORri = 892, // SparcInstrInfo.td:502
908 XORrr = 893, // SparcInstrInfo.td:497
909 INSTRUCTION_LIST_END = 894
910 };
911 enum RegClassByHwModeUses : uint16_t {
912 sparc_ptr_rc,
913 };
914
915} // namespace llvm::SP
916
917#endif // GET_INSTRINFO_ENUM
918
919#ifdef GET_INSTRINFO_SCHED_ENUM
920#undef GET_INSTRINFO_SCHED_ENUM
921
922namespace llvm::SP::Sched {
923
924 enum {
925 NoInstrModel = 0,
926 IIC_iu_instr = 1,
927 IIC_fpu_normal_instr = 2,
928 IIC_jmp_or_call = 3,
929 IIC_fpu_abs = 4,
930 IIC_fpu_fast_instr = 5,
931 IIC_fpu_divd = 6,
932 IIC_fpu_divs = 7,
933 IIC_fpu_muld = 8,
934 IIC_fpu_muls = 9,
935 IIC_fpu_negs = 10,
936 IIC_fpu_sqrtd = 11,
937 IIC_fpu_sqrts = 12,
938 IIC_fpu_stod = 13,
939 IIC_ldd = 14,
940 IIC_iu_or_fpu_instr = 15,
941 IIC_iu_div = 16,
942 IIC_smac_umac = 17,
943 IIC_iu_smul = 18,
944 IIC_st = 19,
945 IIC_std = 20,
946 IIC_iu_umul = 21,
947 SCHED_LIST_END = 22
948 };
949
950} // namespace llvm::SP::Sched
951
952#endif // GET_INSTRINFO_SCHED_ENUM
953
954#if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
955
956namespace llvm {
957
958struct SparcInstrTable {
959 MCInstrDesc Insts[894];
960 static_assert(alignof(MCInstrDesc) >= alignof(MCPhysReg), "Unwanted padding between Insts and ImplicitOps");
961 MCPhysReg ImplicitOps[218];
962 char Padding[sizeof(MCOperandInfo) - sizeof ImplicitOps % sizeof(MCOperandInfo)];
963 static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo");
964 MCOperandInfo OperandInfo[575];
965};
966} // namespace llvm
967
968#endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
969
970#ifdef GET_INSTRINFO_MC_DESC
971#undef GET_INSTRINFO_MC_DESC
972
973namespace llvm {
974
975static_assert((sizeof SparcInstrTable::ImplicitOps + sizeof SparcInstrTable::Padding) % sizeof(MCOperandInfo) == 0);
976static constexpr unsigned SparcOpInfoBase = (sizeof SparcInstrTable::ImplicitOps + sizeof SparcInstrTable::Padding) / sizeof(MCOperandInfo);
977
978extern const SparcInstrTable SparcDescs = {
979 {
980 { 893, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // XORrr
981 { 892, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // XORri
982 { 891, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XORCCrr
983 { 890, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XORCCri
984 { 889, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // XNORrr
985 { 888, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XNORri
986 { 887, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XNORCCrr
987 { 886, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XNORCCri
988 { 885, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XMULXHI
989 { 884, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // XMULX
990 { 883, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 141, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRWIMrr
991 { 882, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 141, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRWIMri
992 { 881, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRTBRrr
993 { 880, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRTBRri
994 { 879, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPSRrr
995 { 878, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPSRri
996 { 877, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 572, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPRrr
997 { 876, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 569, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRPRri
998 { 875, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 566, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRASRrr
999 { 874, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 563, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // WRASRri
1000 { 873, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 558, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9MOVFCCrr
1001 { 872, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 553, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9MOVFCCri
1002 { 871, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 548, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FMOVS_FCC
1003 { 870, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 543, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FMOVQ_FCC
1004 { 869, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 538, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FMOVD_FCC
1005 { 868, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 268, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPS
1006 { 867, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 535, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPQ
1007 { 866, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 268, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPES
1008 { 865, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 535, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPEQ
1009 { 864, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 265, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPED
1010 { 863, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 265, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V9FCMPD
1011 { 862, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UNIMP
1012 { 861, 3, 1, 4, 21, 0, 1, SparcOpInfoBase + 175, 215, 0, 0x0ULL }, // UMULrr
1013 { 860, 3, 1, 4, 21, 0, 1, SparcOpInfoBase + 172, 215, 0, 0x0ULL }, // UMULri
1014 { 859, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0, 0x0ULL }, // UMULXHI
1015 { 858, 3, 1, 4, 21, 0, 2, SparcOpInfoBase + 175, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMULCCrr
1016 { 857, 3, 1, 4, 21, 0, 2, SparcOpInfoBase + 172, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMULCCri
1017 { 856, 3, 1, 4, 17, 2, 2, SparcOpInfoBase + 175, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMACrr
1018 { 855, 3, 1, 4, 17, 2, 2, SparcOpInfoBase + 172, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UMACri
1019 { 854, 3, 1, 4, 16, 1, 1, SparcOpInfoBase + 175, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVrr
1020 { 853, 3, 1, 4, 16, 1, 1, SparcOpInfoBase + 172, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVri
1021 { 852, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVXrr
1022 { 851, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 414, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVXri
1023 { 850, 3, 1, 4, 16, 1, 2, SparcOpInfoBase + 175, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVCCrr
1024 { 849, 3, 1, 4, 16, 1, 2, SparcOpInfoBase + 172, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // UDIVCCri
1025 { 848, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 440, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TXCCrr
1026 { 847, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 528, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TXCCri
1027 { 846, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCrr
1028 { 845, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCri
1029 { 844, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCTVrr
1030 { 843, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TSUBCCTVri
1031 { 842, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 440, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TRAPrr
1032 { 841, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 528, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TRAPri
1033 { 840, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // TLS_LDrr
1034 { 839, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // TLS_LDXrr
1035 { 838, 2, 0, 4, 3, 1, 0, SparcOpInfoBase + 189, 217, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // TLS_CALL
1036 { 837, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 531, 0, 0, 0x0ULL }, // TLS_ADDrr
1037 { 836, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 440, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TICCrr
1038 { 835, 3, 0, 4, 0, 1, 0, SparcOpInfoBase + 528, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TICCri
1039 { 834, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x0ULL }, // TAIL_CALLri
1040 { 833, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 188, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x0ULL }, // TAIL_CALL
1041 { 832, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCrr
1042 { 831, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCri
1043 { 830, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCTVrr
1044 { 829, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TADDCCTVri
1045 { 828, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TA5
1046 { 827, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TA3
1047 { 826, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // TA1
1048 { 825, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 524, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // SWAPrr
1049 { 824, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 515, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // SWAPri
1050 { 823, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 519, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SWAPArr
1051 { 822, 4, 1, 4, 1, 1, 0, SparcOpInfoBase + 515, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SWAPAri
1052 { 821, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SUBrr
1053 { 820, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // SUBri
1054 { 819, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 175, 5, 0, 0x0ULL }, // SUBErr
1055 { 818, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 172, 5, 0, 0x0ULL }, // SUBEri
1056 { 817, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SUBCrr
1057 { 816, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SUBCri
1058 { 815, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::HasPostISelHook), 0x0ULL }, // SUBCCrr
1059 { 814, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::HasPostISelHook), 0x0ULL }, // SUBCCri
1060 { 813, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 450, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STrr
1061 { 812, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 443, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STri
1062 { 811, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 512, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STXrr
1063 { 810, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 505, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STXri
1064 { 809, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STXFSRrr
1065 { 808, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STXFSRri
1066 { 807, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 508, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STXArr
1067 { 806, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 505, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STXAri
1068 { 805, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 502, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STQFrr
1069 { 804, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 495, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STQFri
1070 { 803, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 498, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STQFArr
1071 { 802, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 495, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STQFAri
1072 { 801, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 450, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STHrr
1073 { 800, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 443, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STHri
1074 { 799, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 446, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STHArr
1075 { 798, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 443, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STHAri
1076 { 797, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 492, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STFrr
1077 { 796, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 485, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STFri
1078 { 795, 2, 0, 4, 19, 1, 0, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFSRrr
1079 { 794, 2, 0, 4, 19, 1, 0, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFSRri
1080 { 793, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 488, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFArr
1081 { 792, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 485, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STFAri
1082 { 791, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 482, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDrr
1083 { 790, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 459, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDri
1084 { 789, 3, 0, 4, 20, 0, 0, SparcOpInfoBase + 479, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDFrr
1085 { 788, 3, 0, 4, 20, 0, 0, SparcOpInfoBase + 472, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDFri
1086 { 787, 2, 0, 4, 20, 0, 1, SparcOpInfoBase + 193, 139, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFQrr
1087 { 786, 2, 0, 4, 20, 0, 1, SparcOpInfoBase + 191, 139, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFQri
1088 { 785, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 475, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFArr
1089 { 784, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 472, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDFAri
1090 { 783, 3, 0, 4, 20, 0, 0, SparcOpInfoBase + 469, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDCrr
1091 { 782, 3, 0, 4, 20, 0, 0, SparcOpInfoBase + 466, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STDCri
1092 { 781, 2, 0, 4, 20, 1, 0, SparcOpInfoBase + 193, 216, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDCQrr
1093 { 780, 2, 0, 4, 20, 1, 0, SparcOpInfoBase + 191, 216, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDCQri
1094 { 779, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 462, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDArr
1095 { 778, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 459, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STDAri
1096 { 777, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 456, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STCrr
1097 { 776, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 453, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STCri
1098 { 775, 2, 0, 4, 19, 1, 0, SparcOpInfoBase + 193, 10, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STCSRrr
1099 { 774, 2, 0, 4, 19, 1, 0, SparcOpInfoBase + 191, 10, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STCSRri
1100 { 773, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 450, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STBrr
1101 { 772, 3, 0, 4, 19, 0, 0, SparcOpInfoBase + 443, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STBri
1102 { 771, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 446, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STBArr
1103 { 770, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 443, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STBAri
1104 { 769, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STBAR
1105 { 768, 4, 0, 4, 19, 0, 0, SparcOpInfoBase + 446, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // STArr
1106 { 767, 3, 0, 4, 19, 1, 0, SparcOpInfoBase + 443, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STAri
1107 { 766, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SRLrr
1108 { 765, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 440, 0, 0, 0x0ULL }, // SRLri
1109 { 764, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 437, 0, 0, 0x0ULL }, // SRLXrr
1110 { 763, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 434, 0, 0, 0x0ULL }, // SRLXri
1111 { 762, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SRArr
1112 { 761, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 440, 0, 0, 0x0ULL }, // SRAri
1113 { 760, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 437, 0, 0, 0x0ULL }, // SRAXrr
1114 { 759, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 434, 0, 0, 0x0ULL }, // SRAXri
1115 { 758, 3, 1, 4, 18, 0, 1, SparcOpInfoBase + 175, 215, 0, 0x0ULL }, // SMULrr
1116 { 757, 3, 1, 4, 18, 0, 1, SparcOpInfoBase + 172, 215, 0, 0x0ULL }, // SMULri
1117 { 756, 3, 1, 4, 18, 0, 2, SparcOpInfoBase + 175, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMULCCrr
1118 { 755, 3, 1, 4, 18, 0, 2, SparcOpInfoBase + 172, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMULCCri
1119 { 754, 3, 1, 4, 17, 2, 2, SparcOpInfoBase + 175, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMACrr
1120 { 753, 3, 1, 4, 17, 2, 2, SparcOpInfoBase + 172, 209, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SMACri
1121 { 752, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // SLLrr
1122 { 751, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 440, 0, 0, 0x0ULL }, // SLLri
1123 { 750, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 437, 0, 0, 0x0ULL }, // SLLXrr
1124 { 749, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 434, 0, 0, 0x0ULL }, // SLLXri
1125 { 748, 1, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SIR
1126 { 747, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SIAM
1127 { 746, 0, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHUTDOWN
1128 { 745, 0, 0, 4, 0, 24, 8, SparcOpInfoBase + 1, 177, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHA512
1129 { 744, 0, 0, 4, 0, 12, 4, SparcOpInfoBase + 1, 161, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHA256
1130 { 743, 0, 0, 4, 0, 11, 3, SparcOpInfoBase + 1, 147, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SHA1
1131 { 742, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 167, 0, 0, 0x0ULL }, // SETHIi
1132 { 741, 3, 1, 4, 16, 1, 1, SparcOpInfoBase + 175, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVrr
1133 { 740, 3, 1, 4, 16, 1, 1, SparcOpInfoBase + 172, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVri
1134 { 739, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVXrr
1135 { 738, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 414, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVXri
1136 { 737, 3, 1, 4, 16, 1, 2, SparcOpInfoBase + 175, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVCCrr
1137 { 736, 3, 1, 4, 16, 1, 2, SparcOpInfoBase + 172, 142, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SDIVCCri
1138 { 735, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SAVErr
1139 { 734, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SAVEri
1140 { 733, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SAVED
1141 { 732, 2, 0, 4, 3, 0, 0, SparcOpInfoBase + 193, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RETTrr
1142 { 731, 2, 0, 4, 3, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RETTri
1143 { 730, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RETRY
1144 { 729, 1, 0, 4, 3, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // RETL
1145 { 728, 1, 0, 4, 3, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RET
1146 { 727, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RESTORErr
1147 { 726, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RESTOREri
1148 { 725, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RESTORED
1149 { 724, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 141, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDWIM
1150 { 723, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDTBR
1151 { 722, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDPSR
1152 { 721, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 432, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDPR
1153 { 720, 1, 1, 4, 1, 1, 0, SparcOpInfoBase + 431, 139, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDFQ
1154 { 719, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 429, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RDASR
1155 { 718, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 417, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PWRPSRrr
1156 { 717, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 167, 138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PWRPSRri
1157 { 716, 3, 0, 4, 1, 0, 0, SparcOpInfoBase + 426, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHr
1158 { 715, 3, 0, 4, 1, 0, 0, SparcOpInfoBase + 419, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHi
1159 { 714, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 422, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHAr
1160 { 713, 3, 0, 4, 1, 1, 0, SparcOpInfoBase + 419, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREFETCHAi
1161 { 712, 2, 1, 4, 1, 0, 0, SparcOpInfoBase + 417, 0, 0, 0x0ULL }, // POPCrr
1162 { 711, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PDISTN
1163 { 710, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PDIST
1164 { 709, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // OTHERW
1165 { 708, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ORrr
1166 { 707, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // ORri
1167 { 706, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ORNrr
1168 { 705, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORNri
1169 { 704, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORNCCrr
1170 { 703, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORNCCri
1171 { 702, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORCCrr
1172 { 701, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ORCCri
1173 { 700, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // NORMALW
1174 { 699, 0, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // NOP
1175 { 698, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 178, 0, 0, 0x0ULL }, // MULXrr
1176 { 697, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 414, 0, 0, 0x0ULL }, // MULXri
1177 { 696, 3, 1, 4, 1, 2, 2, SparcOpInfoBase + 175, 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MULSCCrr
1178 { 695, 3, 1, 4, 1, 2, 2, SparcOpInfoBase + 172, 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MULSCCri
1179 { 694, 1, 0, 4, 0, 52, 52, SparcOpInfoBase + 1, 30, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MPMUL
1180 { 693, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 412, 0, 0, 0x0ULL }, // MOVXTOD
1181 { 692, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 394, 4, 0, 0x0ULL }, // MOVXCCrr
1182 { 691, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 390, 4, 0, 0x0ULL }, // MOVXCCri
1183 { 690, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 410, 0, 0, 0x0ULL }, // MOVWTOS
1184 { 689, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 408, 0, 0, 0x0ULL }, // MOVSTOUW
1185 { 688, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 408, 0, 0, 0x0ULL }, // MOVSTOSW
1186 { 687, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 403, 0, 0, 0x0ULL }, // MOVRrr
1187 { 686, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 398, 0, 0, 0x0ULL }, // MOVRri
1188 { 685, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 394, 4, 0, 0x0ULL }, // MOVICCrr
1189 { 684, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 390, 4, 0, 0x0ULL }, // MOVICCri
1190 { 683, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 394, 3, 0, 0x0ULL }, // MOVFCCrr
1191 { 682, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 390, 3, 0, 0x0ULL }, // MOVFCCri
1192 { 681, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 388, 0, 0, 0x0ULL }, // MOVDTOX
1193 { 680, 1, 0, 4, 0, 52, 52, SparcOpInfoBase + 1, 30, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MONTSQR
1194 { 679, 1, 0, 4, 0, 52, 52, SparcOpInfoBase + 1, 30, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MONTMUL
1195 { 678, 1, 0, 4, 1, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MEMBARi
1196 { 677, 0, 0, 4, 0, 10, 8, SparcOpInfoBase + 1, 12, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MD5
1197 { 676, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 386, 0, 0, 0x0ULL }, // LZCNT
1198 { 675, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDrr
1199 { 674, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDri
1200 { 673, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 383, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDXrr
1201 { 672, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 380, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDXri
1202 { 671, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDXFSRrr
1203 { 670, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDXFSRri
1204 { 669, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 314, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // LDXArr
1205 { 668, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 380, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDXAri
1206 { 667, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUHrr
1207 { 666, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUHri
1208 { 665, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // LDUHArr
1209 { 664, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDUHAri
1210 { 663, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUBrr
1211 { 662, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDUBri
1212 { 661, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDUBArr
1213 { 660, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDUBAri
1214 { 659, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 383, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSWrr
1215 { 658, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 380, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSWri
1216 { 657, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 314, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // LDSWArr
1217 { 656, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 380, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSWAri
1218 { 655, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBrr
1219 { 654, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBri
1220 { 653, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBArr
1221 { 652, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSTUBAri
1222 { 651, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSHrr
1223 { 650, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSHri
1224 { 649, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // LDSHArr
1225 { 648, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSHAri
1226 { 647, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSBrr
1227 { 646, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDSBri
1228 { 645, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSBArr
1229 { 644, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDSBAri
1230 { 643, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 377, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDQFrr
1231 { 642, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 370, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDQFri
1232 { 641, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 373, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDQFArr
1233 { 640, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 370, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDQFAri
1234 { 639, 3, 1, 4, 15, 0, 0, SparcOpInfoBase + 367, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDFrr
1235 { 638, 3, 1, 4, 15, 0, 0, SparcOpInfoBase + 360, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDFri
1236 { 637, 2, 0, 4, 15, 0, 1, SparcOpInfoBase + 193, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFSRrr
1237 { 636, 2, 0, 4, 15, 0, 1, SparcOpInfoBase + 191, 11, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFSRri
1238 { 635, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 363, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFArr
1239 { 634, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 360, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDFAri
1240 { 633, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 357, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDrr
1241 { 632, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 334, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDri
1242 { 631, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 354, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDFrr
1243 { 630, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 347, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDFri
1244 { 629, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 350, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDFArr
1245 { 628, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 347, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDFAri
1246 { 627, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 344, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDCrr
1247 { 626, 3, 1, 4, 14, 0, 0, SparcOpInfoBase + 341, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDDCri
1248 { 625, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 337, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDArr
1249 { 624, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 334, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDDAri
1250 { 623, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 331, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDCrr
1251 { 622, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 328, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // LDCri
1252 { 621, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 193, 10, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDCSRrr
1253 { 620, 2, 0, 4, 1, 0, 1, SparcOpInfoBase + 191, 10, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDCSRri
1254 { 619, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // LDArr
1255 { 618, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 322, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // LDAri
1256 { 617, 3, 1, 4, 3, 0, 0, SparcOpInfoBase + 325, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // JMPLrr
1257 { 616, 3, 1, 4, 3, 0, 0, SparcOpInfoBase + 322, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // JMPLri
1258 { 615, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INVALW
1259 { 614, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 318, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // GDOP_LDrr
1260 { 613, 4, 1, 4, 1, 0, 0, SparcOpInfoBase + 314, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // GDOP_LDXrr
1261 { 612, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 309, 0, 0, 0x0ULL }, // FZEROS
1262 { 611, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 308, 0, 0, 0x0ULL }, // FZERO
1263 { 610, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 257, 0, 0, 0x0ULL }, // FXTOS
1264 { 609, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 259, 0, 0, 0x0ULL }, // FXTOQ
1265 { 608, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FXTOD
1266 { 607, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXORS
1267 { 606, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXOR
1268 { 605, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXNORS
1269 { 604, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FXNOR
1270 { 603, 3, 1, 4, 5, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FSUBS
1271 { 602, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FSUBQ
1272 { 601, 3, 1, 4, 5, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FSUBD
1273 { 600, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 261, 0, 0, 0x0ULL }, // FSTOX
1274 { 599, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 263, 0, 0, 0x0ULL }, // FSTOQ
1275 { 598, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FSTOI
1276 { 597, 2, 1, 4, 13, 0, 0, SparcOpInfoBase + 261, 0, 0, 0x0ULL }, // FSTOD
1277 { 596, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRL32
1278 { 595, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRL16
1279 { 594, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC2S
1280 { 593, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC2
1281 { 592, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC1S
1282 { 591, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRC1
1283 { 590, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRA32
1284 { 589, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSRA16
1285 { 588, 2, 1, 4, 12, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FSQRTS
1286 { 587, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0, 0x0ULL }, // FSQRTQ
1287 { 586, 2, 1, 4, 11, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FSQRTD
1288 { 585, 3, 1, 4, 8, 0, 0, SparcOpInfoBase + 305, 0, 0, 0x0ULL }, // FSMULD
1289 { 584, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLL32
1290 { 583, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLL16
1291 { 582, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLAS32
1292 { 581, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FSLAS16
1293 { 580, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 310, 0, 0, 0x0ULL }, // FQTOX
1294 { 579, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 312, 0, 0, 0x0ULL }, // FQTOS
1295 { 578, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 312, 0, 0, 0x0ULL }, // FQTOI
1296 { 577, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 310, 0, 0, 0x0ULL }, // FQTOD
1297 { 576, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB32S
1298 { 575, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB32
1299 { 574, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB16S
1300 { 573, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPSUB16
1301 { 572, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPMERGE
1302 { 571, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPMADDXHI
1303 { 570, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPMADDX
1304 { 569, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD64
1305 { 568, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD32S
1306 { 567, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD32
1307 { 566, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD16S
1308 { 565, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPADD16
1309 { 564, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 257, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPACKFIX
1310 { 563, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPACK32
1311 { 562, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FPACK16
1312 { 561, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORS
1313 { 560, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT2S
1314 { 559, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT2
1315 { 558, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT1S
1316 { 557, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FORNOT1
1317 { 556, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FOR
1318 { 555, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 309, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FONES
1319 { 554, 1, 1, 4, 0, 0, 0, SparcOpInfoBase + 308, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FONE
1320 { 553, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0, 0x0ULL }, // FNSMULD
1321 { 552, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT2S
1322 { 551, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT2
1323 { 550, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT1S
1324 { 549, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOT1
1325 { 548, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNORS
1326 { 547, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNOR
1327 { 546, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FNMULS
1328 { 545, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FNMULD
1329 { 544, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FNMSUBS
1330 { 543, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FNMSUBD
1331 { 542, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FNMADDS
1332 { 541, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FNMADDD
1333 { 540, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FNHADDS
1334 { 539, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FNHADDD
1335 { 538, 2, 1, 4, 10, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FNEGS
1336 { 537, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0, 0x0ULL }, // FNEGQ
1337 { 536, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FNEGD
1338 { 535, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNANDS
1339 { 534, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FNAND
1340 { 533, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FNADDS
1341 { 532, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FNADDD
1342 { 531, 3, 1, 4, 9, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FMULS
1343 { 530, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FMULQ
1344 { 529, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMULD8ULX16
1345 { 528, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMULD8SUX16
1346 { 527, 3, 1, 4, 8, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FMULD
1347 { 526, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8X16AU
1348 { 525, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 305, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8X16AL
1349 { 524, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 302, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8X16
1350 { 523, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8ULX16
1351 { 522, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMUL8SUX16
1352 { 521, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FMSUBS
1353 { 520, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FMSUBD
1354 { 519, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 298, 4, 0, 0x0ULL }, // FMOVS_XCC
1355 { 518, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 298, 4, 0, 0x0ULL }, // FMOVS_ICC
1356 { 517, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 298, 3, 0, 0x0ULL }, // FMOVS_FCC
1357 { 516, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 243, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMOVS
1358 { 515, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 293, 0, 0, 0x0ULL }, // FMOVRS
1359 { 514, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 288, 0, 0, 0x0ULL }, // FMOVRQ
1360 { 513, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 283, 0, 0, 0x0ULL }, // FMOVRD
1361 { 512, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 279, 4, 0, 0x0ULL }, // FMOVQ_XCC
1362 { 511, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 279, 4, 0, 0x0ULL }, // FMOVQ_ICC
1363 { 510, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 279, 3, 0, 0x0ULL }, // FMOVQ_FCC
1364 { 509, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMOVQ
1365 { 508, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 275, 4, 0, 0x0ULL }, // FMOVD_XCC
1366 { 507, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 275, 4, 0, 0x0ULL }, // FMOVD_ICC
1367 { 506, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 275, 3, 0, 0x0ULL }, // FMOVD_FCC
1368 { 505, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMOVD
1369 { 504, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FMEAN16
1370 { 503, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 271, 0, 0, 0x0ULL }, // FMADDS
1371 { 502, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0, 0x0ULL }, // FMADDD
1372 { 501, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 193, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSHrr
1373 { 500, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSHri
1374 { 499, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSHW
1375 { 498, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLUSH
1376 { 497, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 268, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLCMPS
1377 { 496, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 265, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FLCMPD
1378 { 495, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FITOS
1379 { 494, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 263, 0, 0, 0x0ULL }, // FITOQ
1380 { 493, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 261, 0, 0, 0x0ULL }, // FITOD
1381 { 492, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FHSUBS
1382 { 491, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FHSUBD
1383 { 490, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FHADDS
1384 { 489, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FHADDD
1385 { 488, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 261, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FEXPAND
1386 { 487, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FDTOX
1387 { 486, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 257, 0, 0, 0x0ULL }, // FDTOS
1388 { 485, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 259, 0, 0, 0x0ULL }, // FDTOQ
1389 { 484, 2, 1, 4, 5, 0, 0, SparcOpInfoBase + 257, 0, 0, 0x0ULL }, // FDTOI
1390 { 483, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 254, 0, 0, 0x0ULL }, // FDMULQ
1391 { 482, 3, 1, 4, 7, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FDIVS
1392 { 481, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FDIVQ
1393 { 480, 3, 1, 4, 6, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FDIVD
1394 { 479, 2, 0, 4, 5, 0, 1, SparcOpInfoBase + 243, 3, 0, 0x0ULL }, // FCMPS_V9
1395 { 478, 2, 0, 4, 5, 0, 1, SparcOpInfoBase + 243, 3, 0, 0x0ULL }, // FCMPS
1396 { 477, 2, 0, 4, 0, 0, 1, SparcOpInfoBase + 241, 3, 0, 0x0ULL }, // FCMPQ_V9
1397 { 476, 2, 0, 4, 0, 0, 1, SparcOpInfoBase + 241, 3, 0, 0x0ULL }, // FCMPQ
1398 { 475, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPNE32
1399 { 474, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPNE16
1400 { 473, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPLE32
1401 { 472, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPLE16
1402 { 471, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPGT32
1403 { 470, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPGT16
1404 { 469, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPEQ32
1405 { 468, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 251, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCMPEQ16
1406 { 467, 2, 0, 4, 5, 0, 1, SparcOpInfoBase + 236, 3, 0, 0x0ULL }, // FCMPD_V9
1407 { 466, 2, 0, 4, 5, 0, 1, SparcOpInfoBase + 236, 3, 0, 0x0ULL }, // FCMPD
1408 { 465, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FCHKSM16
1409 { 464, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // FBCOND_V9
1410 { 463, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // FBCONDA_V9
1411 { 462, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FBCONDA
1412 { 461, 2, 0, 4, 2, 1, 0, SparcOpInfoBase + 189, 3, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // FBCOND
1413 { 460, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDS
1414 { 459, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT2S
1415 { 458, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT2
1416 { 457, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 248, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT1S
1417 { 456, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FANDNOT1
1418 { 455, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FAND
1419 { 454, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FALIGNADATA
1420 { 453, 3, 1, 4, 5, 0, 0, SparcOpInfoBase + 248, 0, 0, 0x0ULL }, // FADDS
1421 { 452, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 245, 0, 0, 0x0ULL }, // FADDQ
1422 { 451, 3, 1, 4, 5, 0, 0, SparcOpInfoBase + 185, 0, 0, 0x0ULL }, // FADDD
1423 { 450, 2, 1, 4, 4, 0, 0, SparcOpInfoBase + 243, 0, 0, 0x0ULL }, // FABSS
1424 { 449, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 241, 0, 0, 0x0ULL }, // FABSQ
1425 { 448, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0, 0x0ULL }, // FABSD
1426 { 447, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8N
1427 { 446, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8LN
1428 { 445, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8L
1429 { 444, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE8
1430 { 443, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32N
1431 { 442, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32LN
1432 { 441, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32L
1433 { 440, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE32
1434 { 439, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16N
1435 { 438, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16LN
1436 { 437, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16L
1437 { 436, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // EDGE16
1438 { 435, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DONE
1439 { 434, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_ROUND
1440 { 433, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 238, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_KEXPAND
1441 { 432, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_IP
1442 { 431, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 236, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // DES_IIP
1443 { 430, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 232, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CXBCONDrr
1444 { 429, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 228, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CXBCONDri
1445 { 428, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 232, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CWBCONDrr
1446 { 427, 4, 0, 4, 0, 0, 0, SparcOpInfoBase + 228, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CWBCONDri
1447 { 426, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CRC32C
1448 { 425, 2, 0, 4, 0, 0, 0, SparcOpInfoBase + 189, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CPBCONDA
1449 { 424, 2, 0, 4, 0, 0, 0, SparcOpInfoBase + 189, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // CPBCOND
1450 { 423, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 227, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CMASK8
1451 { 422, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 227, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CMASK32
1452 { 421, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 227, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CMASK16
1453 { 420, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 222, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // CASXArr
1454 { 419, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 218, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CASXAri
1455 { 418, 5, 1, 4, 0, 0, 0, SparcOpInfoBase + 213, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // CASArr
1456 { 417, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 209, 9, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CASAri
1457 { 416, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CAMELLIA_FLI
1458 { 415, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CAMELLIA_FL
1459 { 414, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CAMELLIA_F
1460 { 413, 3, 0, 4, 1, 1, 1, SparcOpInfoBase + 206, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CALLrri
1461 { 412, 2, 0, 4, 3, 1, 1, SparcOpInfoBase + 193, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // CALLrr
1462 { 411, 3, 0, 4, 1, 1, 1, SparcOpInfoBase + 203, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CALLrii
1463 { 410, 2, 0, 4, 3, 1, 1, SparcOpInfoBase + 191, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // CALLri
1464 { 409, 2, 0, 4, 0, 1, 1, SparcOpInfoBase + 201, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // CALLi
1465 { 408, 1, 0, 4, 3, 1, 1, SparcOpInfoBase + 188, 7, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // CALL
1466 { 407, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BSHUFFLE
1467 { 406, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPXCCNT
1468 { 405, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPXCCANT
1469 { 404, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPXCCA
1470 { 403, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BPXCC
1471 { 402, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPRNT
1472 { 401, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPRANT
1473 { 400, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPRA
1474 { 399, 3, 0, 4, 0, 0, 0, SparcOpInfoBase + 198, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BPR
1475 { 398, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPICCNT
1476 { 397, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPICCANT
1477 { 396, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPICCA
1478 { 395, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BPICC
1479 { 394, 3, 0, 4, 2, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCCNT
1480 { 393, 3, 0, 4, 2, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCCANT
1481 { 392, 3, 0, 4, 2, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCCA
1482 { 391, 3, 0, 4, 2, 0, 0, SparcOpInfoBase + 195, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BPFCC
1483 { 390, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BMASK
1484 { 389, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 193, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BINDrr
1485 { 388, 2, 0, 4, 1, 0, 0, SparcOpInfoBase + 191, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BINDri
1486 { 387, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // BCONDA
1487 { 386, 2, 0, 4, 1, 1, 0, SparcOpInfoBase + 189, 4, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BCOND
1488 { 385, 1, 0, 4, 0, 0, 0, SparcOpInfoBase + 188, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL }, // BA
1489 { 384, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ARRAY8
1490 { 383, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ARRAY32
1491 { 382, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ARRAY16
1492 { 381, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ANDrr
1493 { 380, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // ANDri
1494 { 379, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ANDNrr
1495 { 378, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDNri
1496 { 377, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDNCCrr
1497 { 376, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDNCCri
1498 { 375, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDCCrr
1499 { 374, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ANDCCri
1500 { 373, 0, 0, 4, 1, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ALLCLEAN
1501 { 372, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ALIGNADDRL
1502 { 371, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 178, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ALIGNADDR
1503 { 370, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_KEXPAND2
1504 { 369, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 151, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_KEXPAND1
1505 { 368, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 185, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_KEXPAND0
1506 { 367, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND23_LAST
1507 { 366, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND23
1508 { 365, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND01_LAST
1509 { 364, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_EROUND01
1510 { 363, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND23_LAST
1511 { 362, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND23
1512 { 361, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND01_LAST
1513 { 360, 4, 1, 4, 0, 0, 0, SparcOpInfoBase + 181, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // AES_DROUND01
1514 { 359, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 175, 0, 0, 0x0ULL }, // ADDrr
1515 { 358, 3, 1, 4, 1, 0, 0, SparcOpInfoBase + 172, 0, 0, 0x0ULL }, // ADDri
1516 { 357, 3, 1, 4, 0, 1, 1, SparcOpInfoBase + 178, 5, 0, 0x0ULL }, // ADDXCCC
1517 { 356, 3, 1, 4, 0, 1, 0, SparcOpInfoBase + 178, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ADDXC
1518 { 355, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 175, 5, 0, 0x0ULL }, // ADDErr
1519 { 354, 3, 1, 4, 1, 1, 1, SparcOpInfoBase + 172, 5, 0, 0x0ULL }, // ADDEri
1520 { 353, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 175, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ADDCrr
1521 { 352, 3, 1, 4, 1, 1, 0, SparcOpInfoBase + 172, 4, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ADDCri
1522 { 351, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 175, 4, 0, 0x0ULL }, // ADDCCrr
1523 { 350, 3, 1, 4, 1, 0, 1, SparcOpInfoBase + 172, 4, 0, 0x0ULL }, // ADDCCri
1524 { 349, 0, 0, 4, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // V8BAR
1525 { 348, 3, 1, 4, 0, 0, 0, SparcOpInfoBase + 169, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SETX
1526 { 347, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 167, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SETSW
1527 { 346, 2, 1, 4, 0, 0, 0, SparcOpInfoBase + 167, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // SET
1528 { 345, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 163, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_QFP_XCC
1529 { 344, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 163, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_QFP_ICC
1530 { 343, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 163, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_QFP_FCC
1531 { 342, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 159, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_Int_XCC
1532 { 341, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 159, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_Int_ICC
1533 { 340, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 159, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_Int_FCC
1534 { 339, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 155, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_FP_XCC
1535 { 338, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 155, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_FP_ICC
1536 { 337, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 155, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_FP_FCC
1537 { 336, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 151, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_DFP_XCC
1538 { 335, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 151, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_DFP_ICC
1539 { 334, 4, 1, 4, 0, 1, 0, SparcOpInfoBase + 151, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // SELECT_CC_DFP_FCC
1540 { 333, 1, 1, 4, 0, 0, 1, SparcOpInfoBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // GETPCX
1541 { 332, 2, 0, 4, 0, 1, 1, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKUP
1542 { 331, 2, 0, 4, 0, 1, 1, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // ADJCALLSTACKDOWN
1543 { 330, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UBFX
1544 { 329, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 147, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SBFX
1545 { 328, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMIN
1546 { 327, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_UMAX
1547 { 326, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMIN
1548 { 325, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SMAX
1549 { 324, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_XOR
1550 { 323, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_OR
1551 { 322, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_AND
1552 { 321, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_MUL
1553 { 320, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_ADD
1554 { 319, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMINIMUM
1555 { 318, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAXIMUM
1556 { 317, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMIN
1557 { 316, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMAX
1558 { 315, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FMUL
1559 { 314, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_FADD
1560 { 313, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FMUL
1561 { 312, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECREDUCE_SEQ_FADD
1562 { 311, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_UBSANTRAP
1563 { 310, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DEBUGTRAP
1564 { 309, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_TRAP
1565 { 308, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMSET_INLINE
1566 { 307, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_BZERO
1567 { 306, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMSET
1568 { 305, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMMOVE
1569 { 304, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY_INLINE
1570 { 303, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 143, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_MEMCPY
1571 { 302, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 141, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_WRITE_REGISTER
1572 { 301, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_READ_REGISTER
1573 { 300, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FCMPS
1574 { 299, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FCMP
1575 { 298, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FLDEXP
1576 { 297, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSQRT
1577 { 296, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMA
1578 { 295, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FREM
1579 { 294, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FDIV
1580 { 293, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FMUL
1581 { 292, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FSUB
1582 { 291, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STRICT_FADD
1583 { 290, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKRESTORE
1584 { 289, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_STACKSAVE
1585 { 288, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_DYN_STACKALLOC
1586 { 287, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_JUMP_TABLE
1587 { 286, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BLOCK_ADDR
1588 { 285, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ADDRSPACE_CAST
1589 { 284, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEARBYINT
1590 { 283, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRINT
1591 { 282, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFLOOR
1592 { 281, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSQRT
1593 { 280, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTANH
1594 { 279, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINH
1595 { 278, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOSH
1596 { 277, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN2
1597 { 276, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FATAN
1598 { 275, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FASIN
1599 { 274, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FACOS
1600 { 273, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FTAN
1601 { 272, 3, 2, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSINCOS
1602 { 271, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSIN
1603 { 270, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOS
1604 { 269, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCEIL
1605 { 268, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_CLMUL
1606 { 267, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITREVERSE
1607 { 266, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BSWAP
1608 { 265, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTPOP
1609 { 264, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLS
1610 { 263, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ_ZERO_POISON
1611 { 262, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTLZ
1612 { 261, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ_ZERO_POISON
1613 { 260, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CTTZ
1614 { 259, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 137, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VECTOR_COMPRESS
1615 { 258, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_STEP_VECTOR
1616 { 257, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SPLAT_VECTOR
1617 { 256, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 133, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHUFFLE_VECTOR
1618 { 255, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 130, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_VECTOR_ELT
1619 { 254, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 126, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_VECTOR_ELT
1620 { 253, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT_SUBVECTOR
1621 { 252, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT_SUBVECTOR
1622 { 251, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_VSCALE
1623 { 250, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 123, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRJT
1624 { 249, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BR
1625 { 248, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LLROUND
1626 { 247, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LROUND
1627 { 246, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ABS
1628 { 245, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMAX
1629 { 244, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMIN
1630 { 243, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMAX
1631 { 242, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMIN
1632 { 241, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRMASK
1633 { 240, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTR_ADD
1634 { 239, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_ROUNDING
1635 { 238, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_ROUNDING
1636 { 237, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPMODE
1637 { 236, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPMODE
1638 { 235, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPMODE
1639 { 234, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_RESET_FPENV
1640 { 233, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_SET_FPENV
1641 { 232, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_GET_FPENV
1642 { 231, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUMNUM
1643 { 230, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUMNUM
1644 { 229, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXIMUM
1645 { 228, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINIMUM
1646 { 227, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM_IEEE
1647 { 226, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM_IEEE
1648 { 225, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMAXNUM
1649 { 224, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMINNUM
1650 { 223, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCANONICALIZE
1651 { 222, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IS_FPCLASS
1652 { 221, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCOPYSIGN
1653 { 220, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FABS
1654 { 219, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI_SAT
1655 { 218, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI_SAT
1656 { 217, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UITOFP
1657 { 216, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SITOFP
1658 { 215, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOUI
1659 { 214, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTOSI
1660 { 213, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPTRUNC
1661 { 212, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPEXT
1662 { 211, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FNEG
1663 { 210, 3, 2, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FFREXP
1664 { 209, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLDEXP
1665 { 208, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG10
1666 { 207, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG2
1667 { 206, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FLOG
1668 { 205, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP10
1669 { 204, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP2
1670 { 203, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FEXP
1671 { 202, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOWI
1672 { 201, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FPOW
1673 { 200, 3, 2, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMODF
1674 { 199, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREM
1675 { 198, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FDIV
1676 { 197, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMAD
1677 { 196, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FMA
1678 { 195, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FMUL
1679 { 194, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSUB
1680 { 193, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_FADD
1681 { 192, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIXSAT
1682 { 191, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIXSAT
1683 { 190, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVFIX
1684 { 189, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVFIX
1685 { 188, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIXSAT
1686 { 187, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIXSAT
1687 { 186, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULFIX
1688 { 185, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 119, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULFIX
1689 { 184, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSHLSAT
1690 { 183, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USHLSAT
1691 { 182, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBSAT
1692 { 181, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBSAT
1693 { 180, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDSAT
1694 { 179, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDSAT
1695 { 178, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULH
1696 { 177, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULH
1697 { 176, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SMULO
1698 { 175, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UMULO
1699 { 174, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBE
1700 { 173, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SSUBO
1701 { 172, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SADDE
1702 { 171, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_SADDO
1703 { 170, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBE
1704 { 169, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_USUBO
1705 { 168, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 114, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UADDE
1706 { 167, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_UADDO
1707 { 166, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SELECT
1708 { 165, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UCMP
1709 { 164, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 111, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SCMP
1710 { 163, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCMP
1711 { 162, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 107, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ICMP
1712 { 161, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTL
1713 { 160, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ROTR
1714 { 159, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHR
1715 { 158, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 103, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FSHL
1716 { 157, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASHR
1717 { 156, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_LSHR
1718 { 155, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 100, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SHL
1719 { 154, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ZEXT
1720 { 153, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT_INREG
1721 { 152, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SEXT
1722 { 151, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 97, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VAARG
1723 { 150, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_VASTART
1724 { 149, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FCONSTANT
1725 { 148, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT
1726 { 147, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_USAT_U
1727 { 146, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_U
1728 { 145, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC_SSAT_S
1729 { 144, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_TRUNC
1730 { 143, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ANYEXT
1731 { 142, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
1732 { 141, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // G_INTRINSIC_CONVERGENT
1733 { 140, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_INTRINSIC_W_SIDE_EFFECTS
1734 { 139, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_INTRINSIC
1735 { 138, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_INVOKE_REGION_START
1736 { 137, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRINDIRECT
1737 { 136, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // G_BRCOND
1738 { 135, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 93, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_PREFETCH
1739 { 134, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_FENCE
1740 { 133, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_SAT
1741 { 132, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_USUB_COND
1742 { 131, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UDEC_WRAP
1743 { 130, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UINC_WRAP
1744 { 129, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUMNUM
1745 { 128, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUMNUM
1746 { 127, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMINIMUM
1747 { 126, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAXIMUM
1748 { 125, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMIN
1749 { 124, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FMAX
1750 { 123, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FSUB
1751 { 122, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_FADD
1752 { 121, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMIN
1753 { 120, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_UMAX
1754 { 119, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MIN
1755 { 118, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_MAX
1756 { 117, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XOR
1757 { 116, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_OR
1758 { 115, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_NAND
1759 { 114, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_AND
1760 { 113, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_SUB
1761 { 112, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_ADD
1762 { 111, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 90, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMICRMW_XCHG
1763 { 110, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 86, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG
1764 { 109, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 81, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
1765 { 108, 5, 1, 0, 0, 0, 0, SparcOpInfoBase + 76, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_INDEXED_STORE
1766 { 107, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_FPTRUNCSTORE
1767 { 106, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // G_STORE
1768 { 105, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_ZEXTLOAD
1769 { 104, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_SEXTLOAD
1770 { 103, 5, 2, 0, 0, 0, 0, SparcOpInfoBase + 71, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_INDEXED_LOAD
1771 { 102, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_FPEXTLOAD
1772 { 101, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_ZEXTLOAD
1773 { 100, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_SEXTLOAD
1774 { 99, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // G_LOAD
1775 { 98, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READSTEADYCOUNTER
1776 { 97, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // G_READCYCLECOUNTER
1777 { 96, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUNDEVEN
1778 { 95, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LLRINT
1779 { 94, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_LRINT
1780 { 93, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_ROUND
1781 { 92, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_TRUNC
1782 { 91, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 68, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTRINSIC_FPTRUNC_ROUND
1783 { 90, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_FOLD_BARRIER
1784 { 89, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 66, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FREEZE
1785 { 88, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_BITCAST
1786 { 87, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INTTOPTR
1787 { 86, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRTOINT
1788 { 85, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_CONCAT_VECTORS
1789 { 84, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR_TRUNC
1790 { 83, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_BUILD_VECTOR
1791 { 82, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_MERGE_VALUES
1792 { 81, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 62, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_INSERT
1793 { 80, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 60, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_UNMERGE_VALUES
1794 { 79, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 57, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_EXTRACT
1795 { 78, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_CONSTANT_POOL
1796 { 77, 5, 1, 0, 0, 0, 0, SparcOpInfoBase + 52, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_PTRAUTH_GLOBAL_VALUE
1797 { 76, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_GLOBAL_VALUE
1798 { 75, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 50, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_FRAME_INDEX
1799 { 74, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // G_PHI
1800 { 73, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 49, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_IMPLICIT_DEF
1801 { 72, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGCEIL
1802 { 71, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SAVGFLOOR
1803 { 70, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGCEIL
1804 { 69, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UAVGFLOOR
1805 { 68, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDU
1806 { 67, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ABDS
1807 { 66, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_XOR
1808 { 65, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_OR
1809 { 64, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_AND
1810 { 63, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIVREM
1811 { 62, 4, 2, 0, 0, 0, 0, SparcOpInfoBase + 45, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIVREM
1812 { 61, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UREM
1813 { 60, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SREM
1814 { 59, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_UDIV
1815 { 58, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SDIV
1816 { 57, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_MUL
1817 { 56, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_SUB
1818 { 55, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 42, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // G_ADD
1819 { 54, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ALIGN
1820 { 53, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_ZEXT
1821 { 52, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 39, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // G_ASSERT_SEXT
1822 { 51, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_GLUE
1823 { 50, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_LOOP
1824 { 49, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ANCHOR
1825 { 48, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // CONVERGENCECTRL_ENTRY
1826 { 47, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // RELOC_NONE
1827 { 46, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // JUMP_TABLE_DEBUG_INFO
1828 { 45, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // MEMBARRIER
1829 { 44, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // FAKE_USE
1830 { 43, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // ICALL_BRANCH_FUNNEL
1831 { 42, 3, 0, 0, 0, 0, 0, SparcOpInfoBase + 36, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_16409
1832 { 41, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 34, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_16408
1833 { 40, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_TAIL_CALL
1834 { 39, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_EXIT
1835 { 38, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_RET
1836 { 37, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_FUNCTION_ENTER
1837 { 36, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHABLE_OP
1838 { 35, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FAULTING_OP
1839 { 34, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 32, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // LOCAL_ESCAPE
1840 { 33, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STATEPOINT
1841 { 32, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 29, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // anonymous_16407
1842 { 31, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PREALLOCATED_SETUP
1843 { 30, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 28, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // anonymous_13555
1844 { 29, 6, 1, 0, 0, 0, 0, SparcOpInfoBase + 22, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PATCHPOINT
1845 { 28, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // FENTRY_CALL
1846 { 27, 2, 0, 0, 0, 0, 0, SparcOpInfoBase + 20, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // STACKMAP
1847 { 26, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 18, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // ARITH_FENCE
1848 { 25, 4, 0, 0, 0, 0, 0, SparcOpInfoBase + 14, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // PSEUDO_PROBE
1849 { 24, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_END
1850 { 23, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // LIFETIME_START
1851 { 22, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // BUNDLE
1852 { 21, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 11, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_LANEMASK
1853 { 20, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY
1854 { 19, 2, 1, 0, 0, 0, 0, SparcOpInfoBase + 9, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // REG_SEQUENCE
1855 { 18, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // DBG_LABEL
1856 { 17, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_PHI
1857 { 16, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_INSTR_REF
1858 { 15, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE_LIST
1859 { 14, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // DBG_VALUE
1860 { 13, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // COPY_TO_REGCLASS
1861 { 12, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // SUBREG_TO_REG
1862 { 11, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INIT_UNDEF
1863 { 10, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // IMPLICIT_DEF
1864 { 9, 4, 1, 0, 0, 0, 0, SparcOpInfoBase + 5, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // INSERT_SUBREG
1865 { 8, 3, 1, 0, 0, 0, 0, SparcOpInfoBase + 2, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // EXTRACT_SUBREG
1866 { 7, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // KILL
1867 { 6, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // ANNOTATION_LABEL
1868 { 5, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // GC_LABEL
1869 { 4, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // EH_LABEL
1870 { 3, 1, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // CFI_INSTRUCTION
1871 { 2, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // INLINEASM_BR
1872 { 1, 0, 0, 0, 0, 0, 0, SparcOpInfoBase + 1, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // INLINEASM
1873 { 0, 1, 1, 0, 0, 0, 0, SparcOpInfoBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // PHI
1874 }, {
1875 /* 0 */
1876 /* 0 */ SP::O6, SP::O6,
1877 /* 2 */ SP::O7,
1878 /* 3 */ SP::FCC0,
1879 /* 4 */ SP::ICC,
1880 /* 5 */ SP::ICC, SP::ICC,
1881 /* 7 */ SP::O6, SP::O7,
1882 /* 9 */ SP::ASR3,
1883 /* 10 */ SP::CPSR,
1884 /* 11 */ SP::FSR,
1885 /* 12 */ SP::D0, SP::D1, SP::D2, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7,
1886 /* 30 */ SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15, SP::D16, SP::D17, SP::D18, SP::D19, SP::D20, SP::D21, SP::D22, SP::D23, SP::D24, SP::D25, SP::D26, SP::D27, SP::D28, SP::D29, SP::D30, SP::D31, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15, SP::D16, SP::D17, SP::D18, SP::D19, SP::D20, SP::D21, SP::D22, SP::D23, SP::D24, SP::D25, SP::D26, SP::D27, SP::D28, SP::D29, SP::D30, SP::D31, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5,
1887 /* 134 */ SP::Y, SP::ICC, SP::Y, SP::ICC,
1888 /* 138 */ SP::PSR,
1889 /* 139 */ SP::FQ,
1890 /* 140 */ SP::TBR,
1891 /* 141 */ SP::WIM,
1892 /* 142 */ SP::Y, SP::Y, SP::ICC,
1893 /* 145 */ SP::Y, SP::Y,
1894 /* 147 */ SP::D0, SP::D1, SP::D2, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D0, SP::D1, SP::D2,
1895 /* 161 */ SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D0, SP::D1, SP::D2, SP::D3,
1896 /* 177 */ SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8, SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15, SP::D16, SP::D17, SP::D18, SP::D19, SP::D20, SP::D21, SP::D22, SP::D23, SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7,
1897 /* 209 */ SP::Y, SP::ASR18, SP::Y, SP::ASR18,
1898 /* 213 */ SP::Y, SP::ICC,
1899 /* 215 */ SP::Y,
1900 /* 216 */ SP::CPQ,
1901 /* 217 */ SP::O6,
1902 }, {
1903 0
1904 }, {
1905 /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1906 /* 1 */
1907 /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1908 /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1909 /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1910 /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1911 /* 11 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1912 /* 14 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1913 /* 18 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) },
1914 /* 20 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1915 /* 22 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1916 /* 28 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
1917 /* 29 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1918 /* 32 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1919 /* 34 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1920 /* 36 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1921 /* 39 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1922 /* 42 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1923 /* 45 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1924 /* 49 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1925 /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1926 /* 52 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1927 /* 57 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1928 /* 60 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1929 /* 62 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1930 /* 66 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1931 /* 68 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1932 /* 71 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1933 /* 76 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1934 /* 81 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1935 /* 86 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1936 /* 90 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1937 /* 93 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1938 /* 97 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1939 /* 100 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1940 /* 103 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1941 /* 107 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1942 /* 111 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1943 /* 114 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1944 /* 119 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1945 /* 123 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1946 /* 126 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
1947 /* 130 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
1948 /* 133 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1949 /* 137 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1950 /* 141 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
1951 /* 143 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
1952 /* 147 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
1953 /* 151 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1954 /* 155 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1955 /* 159 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1956 /* 163 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1957 /* 167 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1958 /* 169 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1959 /* 172 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1960 /* 175 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1961 /* 178 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1962 /* 181 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1963 /* 185 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1964 /* 188 */ { -1, 0, MCOI::OPERAND_PCREL, 0 },
1965 /* 189 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1966 /* 191 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1967 /* 193 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
1968 /* 195 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1969 /* 198 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1970 /* 201 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1971 /* 203 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1972 /* 206 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1973 /* 209 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
1974 /* 213 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1975 /* 218 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
1976 /* 222 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1977 /* 227 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1978 /* 228 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1979 /* 232 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1980 /* 236 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1981 /* 238 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
1982 /* 241 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1983 /* 243 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1984 /* 245 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1985 /* 248 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1986 /* 251 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1987 /* 254 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1988 /* 257 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1989 /* 259 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1990 /* 261 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1991 /* 263 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1992 /* 265 */ { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1993 /* 268 */ { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1994 /* 271 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
1995 /* 275 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1996 /* 279 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1997 /* 283 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1998 /* 288 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
1999 /* 293 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2000 /* 298 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2001 /* 302 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2002 /* 305 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2003 /* 308 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2004 /* 309 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2005 /* 310 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2006 /* 312 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2007 /* 314 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2008 /* 318 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2009 /* 322 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2010 /* 325 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2011 /* 328 */ { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2012 /* 331 */ { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2013 /* 334 */ { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2014 /* 337 */ { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2015 /* 341 */ { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2016 /* 344 */ { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2017 /* 347 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2018 /* 350 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2019 /* 354 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2020 /* 357 */ { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2021 /* 360 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2022 /* 363 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2023 /* 367 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2024 /* 370 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2025 /* 373 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2026 /* 377 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2027 /* 380 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2028 /* 383 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 },
2029 /* 386 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2030 /* 388 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2031 /* 390 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2032 /* 394 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2033 /* 398 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2034 /* 403 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2035 /* 408 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2036 /* 410 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2037 /* 412 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2038 /* 414 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2039 /* 417 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2040 /* 419 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2041 /* 422 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2042 /* 426 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2043 /* 429 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2044 /* 431 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2045 /* 432 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2046 /* 434 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2047 /* 437 */ { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2048 /* 440 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2049 /* 443 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2050 /* 446 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2051 /* 450 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2052 /* 453 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2053 /* 456 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2054 /* 459 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2055 /* 462 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2056 /* 466 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2057 /* 469 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::CoprocPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2058 /* 472 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2059 /* 475 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2060 /* 479 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2061 /* 482 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntPairRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2062 /* 485 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2063 /* 488 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2064 /* 492 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2065 /* 495 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2066 /* 498 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2067 /* 502 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2068 /* 505 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2069 /* 508 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2070 /* 512 */ { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::I64RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2071 /* 515 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
2072 /* 519 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
2073 /* 524 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::sparc_ptr_rc, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_UNKNOWN, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
2074 /* 528 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2075 /* 531 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2076 /* 535 */ { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2077 /* 538 */ { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::DFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2078 /* 543 */ { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::QFPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2079 /* 548 */ { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FPRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2080 /* 553 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2081 /* 558 */ { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::FCCRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
2082 /* 563 */ { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2083 /* 566 */ { SP::ASRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2084 /* 569 */ { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
2085 /* 572 */ { SP::PRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SP::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2086 }
2087};
2088
2089
2090#ifdef __GNUC__
2091#pragma GCC diagnostic push
2092#pragma GCC diagnostic ignored "-Woverlength-strings"
2093#endif
2094extern const char SparcInstrNameData[] = {
2095 /* 0 */ "G_FLOG10\000"
2096 /* 9 */ "G_FEXP10\000"
2097 /* 18 */ "AES_KEXPAND0\000"
2098 /* 31 */ "AES_DROUND01\000"
2099 /* 44 */ "AES_EROUND01\000"
2100 /* 57 */ "SHA1\000"
2101 /* 62 */ "TA1\000"
2102 /* 66 */ "FSRC1\000"
2103 /* 72 */ "AES_KEXPAND1\000"
2104 /* 85 */ "FANDNOT1\000"
2105 /* 94 */ "FNOT1\000"
2106 /* 100 */ "FORNOT1\000"
2107 /* 108 */ "SHA512\000"
2108 /* 115 */ "FSRA32\000"
2109 /* 122 */ "FPSUB32\000"
2110 /* 130 */ "FPADD32\000"
2111 /* 138 */ "EDGE32\000"
2112 /* 145 */ "FCMPLE32\000"
2113 /* 154 */ "FCMPNE32\000"
2114 /* 163 */ "FPACK32\000"
2115 /* 171 */ "CMASK32\000"
2116 /* 179 */ "FSLL32\000"
2117 /* 186 */ "FSRL32\000"
2118 /* 193 */ "FCMPEQ32\000"
2119 /* 202 */ "FSLAS32\000"
2120 /* 210 */ "FCMPGT32\000"
2121 /* 219 */ "ARRAY32\000"
2122 /* 227 */ "FSRC2\000"
2123 /* 233 */ "AES_KEXPAND2\000"
2124 /* 246 */ "G_FLOG2\000"
2125 /* 254 */ "G_FATAN2\000"
2126 /* 263 */ "G_FEXP2\000"
2127 /* 271 */ "FANDNOT2\000"
2128 /* 280 */ "FNOT2\000"
2129 /* 286 */ "FORNOT2\000"
2130 /* 294 */ "AES_DROUND23\000"
2131 /* 307 */ "AES_EROUND23\000"
2132 /* 320 */ "TA3\000"
2133 /* 324 */ "FPADD64\000"
2134 /* 332 */ "TA5\000"
2135 /* 336 */ "MD5\000"
2136 /* 340 */ "FSRA16\000"
2137 /* 347 */ "FPSUB16\000"
2138 /* 355 */ "FPADD16\000"
2139 /* 363 */ "EDGE16\000"
2140 /* 370 */ "FCMPLE16\000"
2141 /* 379 */ "FCMPNE16\000"
2142 /* 388 */ "FPACK16\000"
2143 /* 396 */ "CMASK16\000"
2144 /* 404 */ "FSLL16\000"
2145 /* 411 */ "FSRL16\000"
2146 /* 418 */ "FCHKSM16\000"
2147 /* 427 */ "FMEAN16\000"
2148 /* 435 */ "FCMPEQ16\000"
2149 /* 444 */ "FSLAS16\000"
2150 /* 452 */ "FCMPGT16\000"
2151 /* 461 */ "FMUL8X16\000"
2152 /* 470 */ "FMULD8ULX16\000"
2153 /* 482 */ "FMUL8ULX16\000"
2154 /* 493 */ "FMULD8SUX16\000"
2155 /* 505 */ "FMUL8SUX16\000"
2156 /* 516 */ "ARRAY16\000"
2157 /* 524 */ "SHA256\000"
2158 /* 531 */ "EDGE8\000"
2159 /* 537 */ "CMASK8\000"
2160 /* 544 */ "ARRAY8\000"
2161 /* 551 */ "FBCONDA_V9\000"
2162 /* 562 */ "FBCOND_V9\000"
2163 /* 572 */ "FCMPD_V9\000"
2164 /* 581 */ "FCMPQ_V9\000"
2165 /* 590 */ "FCMPS_V9\000"
2166 /* 599 */ "BA\000"
2167 /* 602 */ "BPFCCA\000"
2168 /* 609 */ "BPICCA\000"
2169 /* 616 */ "BPXCCA\000"
2170 /* 623 */ "FBCONDA\000"
2171 /* 631 */ "CPBCONDA\000"
2172 /* 640 */ "G_FMA\000"
2173 /* 646 */ "G_STRICT_FMA\000"
2174 /* 659 */ "BPRA\000"
2175 /* 664 */ "FALIGNADATA\000"
2176 /* 676 */ "G_FSUB\000"
2177 /* 683 */ "G_STRICT_FSUB\000"
2178 /* 697 */ "G_ATOMICRMW_FSUB\000"
2179 /* 714 */ "G_SUB\000"
2180 /* 720 */ "G_ATOMICRMW_SUB\000"
2181 /* 736 */ "CRC32C\000"
2182 /* 743 */ "ADDXCCC\000"
2183 /* 751 */ "BPFCC\000"
2184 /* 757 */ "V9FMOVD_FCC\000"
2185 /* 769 */ "SELECT_CC_DFP_FCC\000"
2186 /* 787 */ "SELECT_CC_QFP_FCC\000"
2187 /* 805 */ "SELECT_CC_FP_FCC\000"
2188 /* 822 */ "V9FMOVQ_FCC\000"
2189 /* 834 */ "V9FMOVS_FCC\000"
2190 /* 846 */ "SELECT_CC_Int_FCC\000"
2191 /* 864 */ "BPICC\000"
2192 /* 870 */ "FMOVD_ICC\000"
2193 /* 880 */ "SELECT_CC_DFP_ICC\000"
2194 /* 898 */ "SELECT_CC_QFP_ICC\000"
2195 /* 916 */ "SELECT_CC_FP_ICC\000"
2196 /* 933 */ "FMOVQ_ICC\000"
2197 /* 943 */ "FMOVS_ICC\000"
2198 /* 953 */ "SELECT_CC_Int_ICC\000"
2199 /* 971 */ "BPXCC\000"
2200 /* 977 */ "FMOVD_XCC\000"
2201 /* 987 */ "SELECT_CC_DFP_XCC\000"
2202 /* 1005 */ "SELECT_CC_QFP_XCC\000"
2203 /* 1023 */ "SELECT_CC_FP_XCC\000"
2204 /* 1040 */ "FMOVQ_XCC\000"
2205 /* 1050 */ "FMOVS_XCC\000"
2206 /* 1060 */ "SELECT_CC_Int_XCC\000"
2207 /* 1078 */ "G_INTRINSIC\000"
2208 /* 1090 */ "G_FPTRUNC\000"
2209 /* 1100 */ "G_INTRINSIC_TRUNC\000"
2210 /* 1118 */ "G_TRUNC\000"
2211 /* 1126 */ "G_BUILD_VECTOR_TRUNC\000"
2212 /* 1147 */ "G_DYN_STACKALLOC\000"
2213 /* 1164 */ "ADDXC\000"
2214 /* 1170 */ "G_FMAD\000"
2215 /* 1177 */ "G_FPEXTLOAD\000"
2216 /* 1189 */ "G_INDEXED_SEXTLOAD\000"
2217 /* 1208 */ "G_SEXTLOAD\000"
2218 /* 1219 */ "G_INDEXED_ZEXTLOAD\000"
2219 /* 1238 */ "G_ZEXTLOAD\000"
2220 /* 1249 */ "G_INDEXED_LOAD\000"
2221 /* 1264 */ "G_LOAD\000"
2222 /* 1271 */ "FSUBD\000"
2223 /* 1277 */ "FHSUBD\000"
2224 /* 1284 */ "FMSUBD\000"
2225 /* 1291 */ "FNMSUBD\000"
2226 /* 1299 */ "G_VECREDUCE_FADD\000"
2227 /* 1316 */ "G_FADD\000"
2228 /* 1323 */ "G_VECREDUCE_SEQ_FADD\000"
2229 /* 1344 */ "G_STRICT_FADD\000"
2230 /* 1358 */ "G_ATOMICRMW_FADD\000"
2231 /* 1375 */ "G_VECREDUCE_ADD\000"
2232 /* 1391 */ "G_ADD\000"
2233 /* 1397 */ "G_PTR_ADD\000"
2234 /* 1407 */ "G_ATOMICRMW_ADD\000"
2235 /* 1423 */ "FADDD\000"
2236 /* 1429 */ "FHADDD\000"
2237 /* 1436 */ "FNHADDD\000"
2238 /* 1444 */ "FMADDD\000"
2239 /* 1451 */ "FNMADDD\000"
2240 /* 1459 */ "FNADDD\000"
2241 /* 1466 */ "V9FCMPED\000"
2242 /* 1475 */ "RESTORED\000"
2243 /* 1484 */ "SAVED\000"
2244 /* 1490 */ "FNEGD\000"
2245 /* 1496 */ "FMULD\000"
2246 /* 1502 */ "FNMULD\000"
2247 /* 1509 */ "FSMULD\000"
2248 /* 1516 */ "FNSMULD\000"
2249 /* 1524 */ "FAND\000"
2250 /* 1529 */ "FNAND\000"
2251 /* 1535 */ "G_ATOMICRMW_NAND\000"
2252 /* 1552 */ "FEXPAND\000"
2253 /* 1560 */ "DES_KEXPAND\000"
2254 /* 1572 */ "G_VECREDUCE_AND\000"
2255 /* 1588 */ "G_AND\000"
2256 /* 1594 */ "G_ATOMICRMW_AND\000"
2257 /* 1610 */ "LIFETIME_END\000"
2258 /* 1623 */ "FBCOND\000"
2259 /* 1630 */ "CPBCOND\000"
2260 /* 1638 */ "G_BRCOND\000"
2261 /* 1647 */ "G_ATOMICRMW_USUB_COND\000"
2262 /* 1669 */ "G_LLROUND\000"
2263 /* 1679 */ "G_LROUND\000"
2264 /* 1688 */ "G_INTRINSIC_ROUND\000"
2265 /* 1706 */ "G_INTRINSIC_FPTRUNC_ROUND\000"
2266 /* 1732 */ "DES_ROUND\000"
2267 /* 1742 */ "FITOD\000"
2268 /* 1748 */ "FQTOD\000"
2269 /* 1754 */ "FSTOD\000"
2270 /* 1760 */ "FXTOD\000"
2271 /* 1766 */ "MOVXTOD\000"
2272 /* 1774 */ "V9FCMPD\000"
2273 /* 1782 */ "FLCMPD\000"
2274 /* 1789 */ "LOAD_STACK_GUARD\000"
2275 /* 1806 */ "FMOVRD\000"
2276 /* 1813 */ "FABSD\000"
2277 /* 1819 */ "FSQRTD\000"
2278 /* 1826 */ "FDIVD\000"
2279 /* 1832 */ "FMOVD\000"
2280 /* 1838 */ "PSEUDO_PROBE\000"
2281 /* 1851 */ "G_SSUBE\000"
2282 /* 1859 */ "G_USUBE\000"
2283 /* 1867 */ "G_FENCE\000"
2284 /* 1875 */ "ARITH_FENCE\000"
2285 /* 1887 */ "REG_SEQUENCE\000"
2286 /* 1900 */ "G_SADDE\000"
2287 /* 1908 */ "G_UADDE\000"
2288 /* 1916 */ "G_GET_FPMODE\000"
2289 /* 1929 */ "G_RESET_FPMODE\000"
2290 /* 1944 */ "G_SET_FPMODE\000"
2291 /* 1957 */ "G_FMINNUM_IEEE\000"
2292 /* 1972 */ "G_FMAXNUM_IEEE\000"
2293 /* 1987 */ "FPMERGE\000"
2294 /* 1995 */ "G_VSCALE\000"
2295 /* 2004 */ "G_JUMP_TABLE\000"
2296 /* 2017 */ "BUNDLE\000"
2297 /* 2024 */ "BSHUFFLE\000"
2298 /* 2033 */ "G_MEMSET_INLINE\000"
2299 /* 2049 */ "G_MEMCPY_INLINE\000"
2300 /* 2065 */ "DONE\000"
2301 /* 2070 */ "FONE\000"
2302 /* 2075 */ "RELOC_NONE\000"
2303 /* 2086 */ "LOCAL_ESCAPE\000"
2304 /* 2099 */ "G_FPTRUNCSTORE\000"
2305 /* 2114 */ "G_STACKRESTORE\000"
2306 /* 2129 */ "G_INDEXED_STORE\000"
2307 /* 2145 */ "G_STORE\000"
2308 /* 2153 */ "G_BITREVERSE\000"
2309 /* 2166 */ "FAKE_USE\000"
2310 /* 2175 */ "DBG_VALUE\000"
2311 /* 2185 */ "G_GLOBAL_VALUE\000"
2312 /* 2200 */ "G_PTRAUTH_GLOBAL_VALUE\000"
2313 /* 2223 */ "CONVERGENCECTRL_GLUE\000"
2314 /* 2244 */ "G_STACKSAVE\000"
2315 /* 2256 */ "G_MEMMOVE\000"
2316 /* 2266 */ "G_FREEZE\000"
2317 /* 2275 */ "G_FCANONICALIZE\000"
2318 /* 2291 */ "G_FMODF\000"
2319 /* 2299 */ "INIT_UNDEF\000"
2320 /* 2310 */ "G_IMPLICIT_DEF\000"
2321 /* 2325 */ "DBG_INSTR_REF\000"
2322 /* 2339 */ "CAMELLIA_F\000"
2323 /* 2350 */ "G_FNEG\000"
2324 /* 2357 */ "EXTRACT_SUBREG\000"
2325 /* 2372 */ "INSERT_SUBREG\000"
2326 /* 2386 */ "G_SEXT_INREG\000"
2327 /* 2399 */ "SUBREG_TO_REG\000"
2328 /* 2413 */ "G_ATOMIC_CMPXCHG\000"
2329 /* 2430 */ "G_ATOMICRMW_XCHG\000"
2330 /* 2447 */ "G_GET_ROUNDING\000"
2331 /* 2462 */ "G_SET_ROUNDING\000"
2332 /* 2477 */ "G_FLOG\000"
2333 /* 2484 */ "G_VAARG\000"
2334 /* 2492 */ "PREALLOCATED_ARG\000"
2335 /* 2509 */ "G_PREFETCH\000"
2336 /* 2520 */ "G_SMULH\000"
2337 /* 2528 */ "G_UMULH\000"
2338 /* 2536 */ "G_FTANH\000"
2339 /* 2544 */ "G_FSINH\000"
2340 /* 2552 */ "G_FCOSH\000"
2341 /* 2560 */ "FLUSH\000"
2342 /* 2566 */ "DBG_PHI\000"
2343 /* 2574 */ "FPMADDXHI\000"
2344 /* 2584 */ "UMULXHI\000"
2345 /* 2592 */ "XMULXHI\000"
2346 /* 2600 */ "CAMELLIA_FLI\000"
2347 /* 2613 */ "FDTOI\000"
2348 /* 2619 */ "FQTOI\000"
2349 /* 2625 */ "FSTOI\000"
2350 /* 2631 */ "G_FPTOSI\000"
2351 /* 2640 */ "G_FPTOUI\000"
2352 /* 2649 */ "G_FPOWI\000"
2353 /* 2657 */ "BMASK\000"
2354 /* 2663 */ "COPY_LANEMASK\000"
2355 /* 2677 */ "G_PTRMASK\000"
2356 /* 2687 */ "EDGE32L\000"
2357 /* 2695 */ "EDGE16L\000"
2358 /* 2703 */ "EDGE8L\000"
2359 /* 2710 */ "FMUL8X16AL\000"
2360 /* 2721 */ "GC_LABEL\000"
2361 /* 2730 */ "DBG_LABEL\000"
2362 /* 2740 */ "EH_LABEL\000"
2363 /* 2749 */ "ANNOTATION_LABEL\000"
2364 /* 2766 */ "ICALL_BRANCH_FUNNEL\000"
2365 /* 2786 */ "CAMELLIA_FL\000"
2366 /* 2798 */ "G_FSHL\000"
2367 /* 2805 */ "G_SHL\000"
2368 /* 2811 */ "G_FCEIL\000"
2369 /* 2819 */ "G_SAVGCEIL\000"
2370 /* 2830 */ "G_UAVGCEIL\000"
2371 /* 2841 */ "PATCHABLE_TAIL_CALL\000"
2372 /* 2861 */ "TLS_CALL\000"
2373 /* 2870 */ "PATCHABLE_TYPED_EVENT_CALL\000"
2374 /* 2897 */ "PATCHABLE_EVENT_CALL\000"
2375 /* 2918 */ "FENTRY_CALL\000"
2376 /* 2930 */ "KILL\000"
2377 /* 2935 */ "G_CONSTANT_POOL\000"
2378 /* 2951 */ "ALIGNADDRL\000"
2379 /* 2962 */ "RETL\000"
2380 /* 2967 */ "G_ROTL\000"
2381 /* 2974 */ "G_VECREDUCE_FMUL\000"
2382 /* 2991 */ "G_FMUL\000"
2383 /* 2998 */ "G_VECREDUCE_SEQ_FMUL\000"
2384 /* 3019 */ "G_STRICT_FMUL\000"
2385 /* 3033 */ "G_CLMUL\000"
2386 /* 3041 */ "MPMUL\000"
2387 /* 3047 */ "MONTMUL\000"
2388 /* 3055 */ "G_VECREDUCE_MUL\000"
2389 /* 3071 */ "G_MUL\000"
2390 /* 3077 */ "SIAM\000"
2391 /* 3082 */ "G_FREM\000"
2392 /* 3089 */ "G_STRICT_FREM\000"
2393 /* 3103 */ "G_SREM\000"
2394 /* 3110 */ "G_UREM\000"
2395 /* 3117 */ "G_SDIVREM\000"
2396 /* 3127 */ "G_UDIVREM\000"
2397 /* 3137 */ "RDWIM\000"
2398 /* 3143 */ "INLINEASM\000"
2399 /* 3153 */ "G_VECREDUCE_FMINIMUM\000"
2400 /* 3174 */ "G_FMINIMUM\000"
2401 /* 3185 */ "G_ATOMICRMW_FMINIMUM\000"
2402 /* 3206 */ "G_VECREDUCE_FMAXIMUM\000"
2403 /* 3227 */ "G_FMAXIMUM\000"
2404 /* 3238 */ "G_ATOMICRMW_FMAXIMUM\000"
2405 /* 3259 */ "G_FMINIMUMNUM\000"
2406 /* 3273 */ "G_ATOMICRMW_FMINIMUMNUM\000"
2407 /* 3297 */ "G_FMAXIMUMNUM\000"
2408 /* 3311 */ "G_ATOMICRMW_FMAXIMUMNUM\000"
2409 /* 3335 */ "G_FMINNUM\000"
2410 /* 3345 */ "G_FMAXNUM\000"
2411 /* 3355 */ "EDGE32N\000"
2412 /* 3363 */ "EDGE16N\000"
2413 /* 3371 */ "EDGE8N\000"
2414 /* 3378 */ "ALLCLEAN\000"
2415 /* 3387 */ "G_FATAN\000"
2416 /* 3395 */ "G_FTAN\000"
2417 /* 3402 */ "G_INTRINSIC_ROUNDEVEN\000"
2418 /* 3424 */ "G_ASSERT_ALIGN\000"
2419 /* 3439 */ "G_FCOPYSIGN\000"
2420 /* 3451 */ "G_VECREDUCE_FMIN\000"
2421 /* 3468 */ "G_ATOMICRMW_FMIN\000"
2422 /* 3485 */ "G_VECREDUCE_SMIN\000"
2423 /* 3502 */ "G_SMIN\000"
2424 /* 3509 */ "G_VECREDUCE_UMIN\000"
2425 /* 3526 */ "G_UMIN\000"
2426 /* 3533 */ "G_ATOMICRMW_UMIN\000"
2427 /* 3550 */ "G_ATOMICRMW_MIN\000"
2428 /* 3566 */ "G_FASIN\000"
2429 /* 3574 */ "G_FSIN\000"
2430 /* 3581 */ "EDGE32LN\000"
2431 /* 3590 */ "EDGE16LN\000"
2432 /* 3599 */ "EDGE8LN\000"
2433 /* 3607 */ "CFI_INSTRUCTION\000"
2434 /* 3623 */ "G_CTLZ_ZERO_POISON\000"
2435 /* 3642 */ "G_CTTZ_ZERO_POISON\000"
2436 /* 3661 */ "PDISTN\000"
2437 /* 3668 */ "ADJCALLSTACKDOWN\000"
2438 /* 3685 */ "SHUTDOWN\000"
2439 /* 3694 */ "G_SSUBO\000"
2440 /* 3702 */ "G_USUBO\000"
2441 /* 3710 */ "G_SADDO\000"
2442 /* 3718 */ "G_UADDO\000"
2443 /* 3726 */ "JUMP_TABLE_DEBUG_INFO\000"
2444 /* 3748 */ "G_SMULO\000"
2445 /* 3756 */ "G_UMULO\000"
2446 /* 3764 */ "G_BZERO\000"
2447 /* 3772 */ "FZERO\000"
2448 /* 3778 */ "STACKMAP\000"
2449 /* 3787 */ "G_DEBUGTRAP\000"
2450 /* 3799 */ "G_UBSANTRAP\000"
2451 /* 3811 */ "G_TRAP\000"
2452 /* 3818 */ "G_ATOMICRMW_UDEC_WRAP\000"
2453 /* 3840 */ "G_ATOMICRMW_UINC_WRAP\000"
2454 /* 3862 */ "G_BSWAP\000"
2455 /* 3870 */ "G_SITOFP\000"
2456 /* 3879 */ "G_UITOFP\000"
2457 /* 3888 */ "DES_IIP\000"
2458 /* 3896 */ "DES_IP\000"
2459 /* 3903 */ "G_FCMP\000"
2460 /* 3910 */ "G_STRICT_FCMP\000"
2461 /* 3924 */ "G_ICMP\000"
2462 /* 3931 */ "G_SCMP\000"
2463 /* 3938 */ "G_UCMP\000"
2464 /* 3945 */ "UNIMP\000"
2465 /* 3951 */ "NOP\000"
2466 /* 3955 */ "CONVERGENCECTRL_LOOP\000"
2467 /* 3976 */ "G_CTPOP\000"
2468 /* 3984 */ "PATCHABLE_OP\000"
2469 /* 3997 */ "FAULTING_OP\000"
2470 /* 4009 */ "ADJCALLSTACKUP\000"
2471 /* 4024 */ "PREALLOCATED_SETUP\000"
2472 /* 4043 */ "G_FLDEXP\000"
2473 /* 4052 */ "G_STRICT_FLDEXP\000"
2474 /* 4068 */ "G_FEXP\000"
2475 /* 4075 */ "G_FFREXP\000"
2476 /* 4084 */ "FSUBQ\000"
2477 /* 4090 */ "FADDQ\000"
2478 /* 4096 */ "V9FCMPEQ\000"
2479 /* 4105 */ "RDFQ\000"
2480 /* 4110 */ "FNEGQ\000"
2481 /* 4116 */ "FDMULQ\000"
2482 /* 4123 */ "FMULQ\000"
2483 /* 4129 */ "FDTOQ\000"
2484 /* 4135 */ "FITOQ\000"
2485 /* 4141 */ "FSTOQ\000"
2486 /* 4147 */ "FXTOQ\000"
2487 /* 4153 */ "V9FCMPQ\000"
2488 /* 4161 */ "FMOVRQ\000"
2489 /* 4168 */ "FABSQ\000"
2490 /* 4174 */ "FSQRTQ\000"
2491 /* 4181 */ "FDIVQ\000"
2492 /* 4187 */ "FMOVQ\000"
2493 /* 4193 */ "V8BAR\000"
2494 /* 4199 */ "STBAR\000"
2495 /* 4205 */ "RDTBR\000"
2496 /* 4211 */ "G_BR\000"
2497 /* 4216 */ "INLINEASM_BR\000"
2498 /* 4229 */ "ALIGNADDR\000"
2499 /* 4239 */ "G_BLOCK_ADDR\000"
2500 /* 4252 */ "MEMBARRIER\000"
2501 /* 4263 */ "G_CONSTANT_FOLD_BARRIER\000"
2502 /* 4287 */ "PATCHABLE_FUNCTION_ENTER\000"
2503 /* 4312 */ "G_READCYCLECOUNTER\000"
2504 /* 4331 */ "G_READSTEADYCOUNTER\000"
2505 /* 4351 */ "G_READ_REGISTER\000"
2506 /* 4367 */ "G_WRITE_REGISTER\000"
2507 /* 4384 */ "G_ASHR\000"
2508 /* 4391 */ "G_FSHR\000"
2509 /* 4398 */ "G_LSHR\000"
2510 /* 4405 */ "SIR\000"
2511 /* 4409 */ "FOR\000"
2512 /* 4413 */ "CONVERGENCECTRL_ANCHOR\000"
2513 /* 4436 */ "FNOR\000"
2514 /* 4441 */ "FXNOR\000"
2515 /* 4447 */ "G_FFLOOR\000"
2516 /* 4456 */ "G_SAVGFLOOR\000"
2517 /* 4468 */ "G_UAVGFLOOR\000"
2518 /* 4480 */ "G_EXTRACT_SUBVECTOR\000"
2519 /* 4500 */ "G_INSERT_SUBVECTOR\000"
2520 /* 4519 */ "G_BUILD_VECTOR\000"
2521 /* 4534 */ "G_SHUFFLE_VECTOR\000"
2522 /* 4551 */ "G_STEP_VECTOR\000"
2523 /* 4565 */ "G_SPLAT_VECTOR\000"
2524 /* 4580 */ "FXOR\000"
2525 /* 4585 */ "G_VECREDUCE_XOR\000"
2526 /* 4601 */ "G_XOR\000"
2527 /* 4607 */ "G_ATOMICRMW_XOR\000"
2528 /* 4623 */ "G_VECREDUCE_OR\000"
2529 /* 4638 */ "G_OR\000"
2530 /* 4643 */ "G_ATOMICRMW_OR\000"
2531 /* 4658 */ "BPR\000"
2532 /* 4662 */ "RDPR\000"
2533 /* 4667 */ "MONTSQR\000"
2534 /* 4675 */ "RDASR\000"
2535 /* 4681 */ "RDPSR\000"
2536 /* 4687 */ "G_ROTR\000"
2537 /* 4694 */ "G_INTTOPTR\000"
2538 /* 4705 */ "FSRC1S\000"
2539 /* 4712 */ "FANDNOT1S\000"
2540 /* 4722 */ "FNOT1S\000"
2541 /* 4729 */ "FORNOT1S\000"
2542 /* 4738 */ "FPSUB32S\000"
2543 /* 4747 */ "FPADD32S\000"
2544 /* 4756 */ "FSRC2S\000"
2545 /* 4763 */ "FANDNOT2S\000"
2546 /* 4773 */ "FNOT2S\000"
2547 /* 4780 */ "FORNOT2S\000"
2548 /* 4789 */ "FPSUB16S\000"
2549 /* 4798 */ "FPADD16S\000"
2550 /* 4807 */ "G_FABS\000"
2551 /* 4814 */ "G_ABS\000"
2552 /* 4820 */ "FSUBS\000"
2553 /* 4826 */ "FHSUBS\000"
2554 /* 4833 */ "FMSUBS\000"
2555 /* 4840 */ "FNMSUBS\000"
2556 /* 4848 */ "G_ABDS\000"
2557 /* 4855 */ "FADDS\000"
2558 /* 4861 */ "FHADDS\000"
2559 /* 4868 */ "FNHADDS\000"
2560 /* 4876 */ "FMADDS\000"
2561 /* 4883 */ "FNMADDS\000"
2562 /* 4891 */ "FNADDS\000"
2563 /* 4898 */ "FANDS\000"
2564 /* 4904 */ "FNANDS\000"
2565 /* 4911 */ "FONES\000"
2566 /* 4917 */ "V9FCMPES\000"
2567 /* 4926 */ "G_UNMERGE_VALUES\000"
2568 /* 4943 */ "G_MERGE_VALUES\000"
2569 /* 4958 */ "FNEGS\000"
2570 /* 4964 */ "G_CTLS\000"
2571 /* 4971 */ "FMULS\000"
2572 /* 4977 */ "FNMULS\000"
2573 /* 4984 */ "G_FACOS\000"
2574 /* 4992 */ "G_FCOS\000"
2575 /* 4999 */ "G_FSINCOS\000"
2576 /* 5009 */ "FZEROS\000"
2577 /* 5016 */ "FDTOS\000"
2578 /* 5022 */ "FITOS\000"
2579 /* 5028 */ "FQTOS\000"
2580 /* 5034 */ "MOVWTOS\000"
2581 /* 5042 */ "FXTOS\000"
2582 /* 5048 */ "V9FCMPS\000"
2583 /* 5056 */ "G_STRICT_FCMPS\000"
2584 /* 5071 */ "FLCMPS\000"
2585 /* 5078 */ "FORS\000"
2586 /* 5083 */ "FNORS\000"
2587 /* 5089 */ "FXNORS\000"
2588 /* 5096 */ "G_CONCAT_VECTORS\000"
2589 /* 5113 */ "FXORS\000"
2590 /* 5119 */ "FMOVRS\000"
2591 /* 5126 */ "COPY_TO_REGCLASS\000"
2592 /* 5143 */ "G_IS_FPCLASS\000"
2593 /* 5156 */ "FABSS\000"
2594 /* 5162 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\000"
2595 /* 5192 */ "G_VECTOR_COMPRESS\000"
2596 /* 5210 */ "G_INTRINSIC_W_SIDE_EFFECTS\000"
2597 /* 5237 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\000"
2598 /* 5275 */ "FSQRTS\000"
2599 /* 5282 */ "FDIVS\000"
2600 /* 5288 */ "FMOVS\000"
2601 /* 5294 */ "G_TRUNC_SSAT_S\000"
2602 /* 5309 */ "G_SSUBSAT\000"
2603 /* 5319 */ "G_USUBSAT\000"
2604 /* 5329 */ "G_SADDSAT\000"
2605 /* 5339 */ "G_UADDSAT\000"
2606 /* 5349 */ "G_SSHLSAT\000"
2607 /* 5359 */ "G_USHLSAT\000"
2608 /* 5369 */ "G_SMULFIXSAT\000"
2609 /* 5382 */ "G_UMULFIXSAT\000"
2610 /* 5395 */ "G_SDIVFIXSAT\000"
2611 /* 5408 */ "G_UDIVFIXSAT\000"
2612 /* 5421 */ "G_ATOMICRMW_USUB_SAT\000"
2613 /* 5442 */ "G_FPTOSI_SAT\000"
2614 /* 5455 */ "G_FPTOUI_SAT\000"
2615 /* 5468 */ "G_EXTRACT\000"
2616 /* 5478 */ "G_SELECT\000"
2617 /* 5487 */ "G_BRINDIRECT\000"
2618 /* 5500 */ "PATCHABLE_RET\000"
2619 /* 5514 */ "G_MEMSET\000"
2620 /* 5523 */ "PATCHABLE_FUNCTION_EXIT\000"
2621 /* 5547 */ "G_BRJT\000"
2622 /* 5554 */ "G_EXTRACT_VECTOR_ELT\000"
2623 /* 5575 */ "G_INSERT_VECTOR_ELT\000"
2624 /* 5595 */ "BPFCCANT\000"
2625 /* 5604 */ "BPICCANT\000"
2626 /* 5613 */ "BPXCCANT\000"
2627 /* 5622 */ "BPRANT\000"
2628 /* 5629 */ "G_FCONSTANT\000"
2629 /* 5641 */ "G_CONSTANT\000"
2630 /* 5652 */ "BPFCCNT\000"
2631 /* 5660 */ "BPICCNT\000"
2632 /* 5668 */ "BPXCCNT\000"
2633 /* 5676 */ "LZCNT\000"
2634 /* 5682 */ "G_INTRINSIC_CONVERGENT\000"
2635 /* 5705 */ "STATEPOINT\000"
2636 /* 5716 */ "PATCHPOINT\000"
2637 /* 5727 */ "G_PTRTOINT\000"
2638 /* 5738 */ "G_FRINT\000"
2639 /* 5746 */ "G_INTRINSIC_LLRINT\000"
2640 /* 5765 */ "G_INTRINSIC_LRINT\000"
2641 /* 5783 */ "G_FNEARBYINT\000"
2642 /* 5796 */ "BPRNT\000"
2643 /* 5802 */ "G_VASTART\000"
2644 /* 5812 */ "LIFETIME_START\000"
2645 /* 5827 */ "G_INVOKE_REGION_START\000"
2646 /* 5849 */ "G_INSERT\000"
2647 /* 5858 */ "G_FSQRT\000"
2648 /* 5866 */ "G_STRICT_FSQRT\000"
2649 /* 5881 */ "G_BITCAST\000"
2650 /* 5891 */ "G_ADDRSPACE_CAST\000"
2651 /* 5908 */ "AES_DROUND01_LAST\000"
2652 /* 5926 */ "AES_EROUND01_LAST\000"
2653 /* 5944 */ "AES_DROUND23_LAST\000"
2654 /* 5962 */ "AES_EROUND23_LAST\000"
2655 /* 5980 */ "PDIST\000"
2656 /* 5986 */ "DBG_VALUE_LIST\000"
2657 /* 6001 */ "G_FPEXT\000"
2658 /* 6009 */ "G_SEXT\000"
2659 /* 6016 */ "G_ASSERT_SEXT\000"
2660 /* 6030 */ "G_ANYEXT\000"
2661 /* 6039 */ "G_ZEXT\000"
2662 /* 6046 */ "G_ASSERT_ZEXT\000"
2663 /* 6060 */ "FMUL8X16AU\000"
2664 /* 6071 */ "G_ABDU\000"
2665 /* 6078 */ "G_TRUNC_SSAT_U\000"
2666 /* 6093 */ "G_TRUNC_USAT_U\000"
2667 /* 6108 */ "G_FDIV\000"
2668 /* 6115 */ "G_STRICT_FDIV\000"
2669 /* 6129 */ "G_SDIV\000"
2670 /* 6136 */ "G_UDIV\000"
2671 /* 6143 */ "G_GET_FPENV\000"
2672 /* 6155 */ "G_RESET_FPENV\000"
2673 /* 6169 */ "G_SET_FPENV\000"
2674 /* 6181 */ "FLUSHW\000"
2675 /* 6188 */ "NORMALW\000"
2676 /* 6196 */ "INVALW\000"
2677 /* 6203 */ "G_FPOW\000"
2678 /* 6210 */ "OTHERW\000"
2679 /* 6217 */ "MOVSTOSW\000"
2680 /* 6226 */ "SETSW\000"
2681 /* 6232 */ "MOVSTOUW\000"
2682 /* 6241 */ "G_VECREDUCE_FMAX\000"
2683 /* 6258 */ "G_ATOMICRMW_FMAX\000"
2684 /* 6275 */ "G_VECREDUCE_SMAX\000"
2685 /* 6292 */ "G_SMAX\000"
2686 /* 6299 */ "G_VECREDUCE_UMAX\000"
2687 /* 6316 */ "G_UMAX\000"
2688 /* 6323 */ "G_ATOMICRMW_UMAX\000"
2689 /* 6340 */ "G_ATOMICRMW_MAX\000"
2690 /* 6356 */ "GETPCX\000"
2691 /* 6363 */ "FPMADDX\000"
2692 /* 6371 */ "G_FRAME_INDEX\000"
2693 /* 6385 */ "G_SBFX\000"
2694 /* 6392 */ "G_UBFX\000"
2695 /* 6399 */ "FPACKFIX\000"
2696 /* 6408 */ "G_SMULFIX\000"
2697 /* 6418 */ "G_UMULFIX\000"
2698 /* 6428 */ "G_SDIVFIX\000"
2699 /* 6438 */ "G_UDIVFIX\000"
2700 /* 6448 */ "XMULX\000"
2701 /* 6454 */ "FDTOX\000"
2702 /* 6460 */ "MOVDTOX\000"
2703 /* 6468 */ "FQTOX\000"
2704 /* 6474 */ "FSTOX\000"
2705 /* 6480 */ "SETX\000"
2706 /* 6485 */ "G_MEMCPY\000"
2707 /* 6494 */ "COPY\000"
2708 /* 6499 */ "RETRY\000"
2709 /* 6505 */ "CONVERGENCECTRL_ENTRY\000"
2710 /* 6527 */ "G_CTLZ\000"
2711 /* 6534 */ "G_CTTZ\000"
2712 /* 6541 */ "PREFETCHAi\000"
2713 /* 6552 */ "PREFETCHi\000"
2714 /* 6562 */ "SETHIi\000"
2715 /* 6569 */ "CALLi\000"
2716 /* 6575 */ "MEMBARi\000"
2717 /* 6583 */ "CALLrii\000"
2718 /* 6591 */ "LDSBAri\000"
2719 /* 6599 */ "STBAri\000"
2720 /* 6606 */ "LDUBAri\000"
2721 /* 6614 */ "LDSTUBAri\000"
2722 /* 6624 */ "LDDAri\000"
2723 /* 6631 */ "LDAri\000"
2724 /* 6637 */ "STDAri\000"
2725 /* 6644 */ "LDDFAri\000"
2726 /* 6652 */ "LDFAri\000"
2727 /* 6659 */ "STDFAri\000"
2728 /* 6667 */ "LDQFAri\000"
2729 /* 6675 */ "STQFAri\000"
2730 /* 6683 */ "STFAri\000"
2731 /* 6690 */ "LDSHAri\000"
2732 /* 6698 */ "STHAri\000"
2733 /* 6705 */ "LDUHAri\000"
2734 /* 6713 */ "SWAPAri\000"
2735 /* 6721 */ "SRAri\000"
2736 /* 6727 */ "CASAri\000"
2737 /* 6734 */ "STAri\000"
2738 /* 6740 */ "LDSWAri\000"
2739 /* 6748 */ "LDXAri\000"
2740 /* 6755 */ "CASXAri\000"
2741 /* 6763 */ "STXAri\000"
2742 /* 6770 */ "LDSBri\000"
2743 /* 6777 */ "STBri\000"
2744 /* 6783 */ "LDUBri\000"
2745 /* 6790 */ "SUBri\000"
2746 /* 6796 */ "LDSTUBri\000"
2747 /* 6805 */ "SMACri\000"
2748 /* 6812 */ "UMACri\000"
2749 /* 6819 */ "SUBCri\000"
2750 /* 6826 */ "TSUBCCri\000"
2751 /* 6835 */ "TADDCCri\000"
2752 /* 6844 */ "ANDCCri\000"
2753 /* 6852 */ "V9MOVFCCri\000"
2754 /* 6863 */ "TICCri\000"
2755 /* 6870 */ "MOVICCri\000"
2756 /* 6879 */ "SMULCCri\000"
2757 /* 6888 */ "UMULCCri\000"
2758 /* 6897 */ "ANDNCCri\000"
2759 /* 6906 */ "ORNCCri\000"
2760 /* 6914 */ "XNORCCri\000"
2761 /* 6923 */ "XORCCri\000"
2762 /* 6931 */ "MULSCCri\000"
2763 /* 6940 */ "SDIVCCri\000"
2764 /* 6949 */ "UDIVCCri\000"
2765 /* 6958 */ "TXCCri\000"
2766 /* 6965 */ "MOVXCCri\000"
2767 /* 6974 */ "ADDCri\000"
2768 /* 6981 */ "LDDCri\000"
2769 /* 6988 */ "LDCri\000"
2770 /* 6994 */ "STDCri\000"
2771 /* 7001 */ "STCri\000"
2772 /* 7007 */ "ADDri\000"
2773 /* 7013 */ "LDDri\000"
2774 /* 7019 */ "LDri\000"
2775 /* 7024 */ "ANDri\000"
2776 /* 7030 */ "BINDri\000"
2777 /* 7037 */ "CWBCONDri\000"
2778 /* 7047 */ "CXBCONDri\000"
2779 /* 7057 */ "STDri\000"
2780 /* 7063 */ "SUBEri\000"
2781 /* 7070 */ "ADDEri\000"
2782 /* 7077 */ "RESTOREri\000"
2783 /* 7087 */ "SAVEri\000"
2784 /* 7094 */ "LDDFri\000"
2785 /* 7101 */ "LDFri\000"
2786 /* 7107 */ "STDFri\000"
2787 /* 7114 */ "LDQFri\000"
2788 /* 7121 */ "STQFri\000"
2789 /* 7128 */ "STFri\000"
2790 /* 7134 */ "LDSHri\000"
2791 /* 7141 */ "FLUSHri\000"
2792 /* 7149 */ "STHri\000"
2793 /* 7155 */ "LDUHri\000"
2794 /* 7162 */ "TAIL_CALLri\000"
2795 /* 7174 */ "SLLri\000"
2796 /* 7180 */ "JMPLri\000"
2797 /* 7187 */ "SRLri\000"
2798 /* 7193 */ "SMULri\000"
2799 /* 7200 */ "UMULri\000"
2800 /* 7207 */ "WRWIMri\000"
2801 /* 7215 */ "ANDNri\000"
2802 /* 7222 */ "ORNri\000"
2803 /* 7228 */ "TRAPri\000"
2804 /* 7235 */ "SWAPri\000"
2805 /* 7242 */ "STDCQri\000"
2806 /* 7250 */ "STDFQri\000"
2807 /* 7258 */ "WRTBRri\000"
2808 /* 7266 */ "XNORri\000"
2809 /* 7273 */ "XORri\000"
2810 /* 7279 */ "WRPRri\000"
2811 /* 7286 */ "WRASRri\000"
2812 /* 7294 */ "LDCSRri\000"
2813 /* 7302 */ "STCSRri\000"
2814 /* 7310 */ "LDFSRri\000"
2815 /* 7318 */ "STFSRri\000"
2816 /* 7326 */ "LDXFSRri\000"
2817 /* 7335 */ "STXFSRri\000"
2818 /* 7344 */ "PWRPSRri\000"
2819 /* 7353 */ "MOVRri\000"
2820 /* 7360 */ "STri\000"
2821 /* 7365 */ "RETTri\000"
2822 /* 7372 */ "SDIVri\000"
2823 /* 7379 */ "UDIVri\000"
2824 /* 7386 */ "TSUBCCTVri\000"
2825 /* 7397 */ "TADDCCTVri\000"
2826 /* 7408 */ "LDSWri\000"
2827 /* 7415 */ "SRAXri\000"
2828 /* 7422 */ "LDXri\000"
2829 /* 7428 */ "SLLXri\000"
2830 /* 7435 */ "SRLXri\000"
2831 /* 7442 */ "MULXri\000"
2832 /* 7449 */ "STXri\000"
2833 /* 7455 */ "SDIVXri\000"
2834 /* 7463 */ "UDIVXri\000"
2835 /* 7471 */ "CALLrri\000"
2836 /* 7479 */ "PREFETCHAr\000"
2837 /* 7490 */ "PREFETCHr\000"
2838 /* 7500 */ "LDSBArr\000"
2839 /* 7508 */ "STBArr\000"
2840 /* 7515 */ "LDUBArr\000"
2841 /* 7523 */ "LDSTUBArr\000"
2842 /* 7533 */ "LDDArr\000"
2843 /* 7540 */ "LDArr\000"
2844 /* 7546 */ "STDArr\000"
2845 /* 7553 */ "LDDFArr\000"
2846 /* 7561 */ "LDFArr\000"
2847 /* 7568 */ "STDFArr\000"
2848 /* 7576 */ "LDQFArr\000"
2849 /* 7584 */ "STQFArr\000"
2850 /* 7592 */ "STFArr\000"
2851 /* 7599 */ "LDSHArr\000"
2852 /* 7607 */ "STHArr\000"
2853 /* 7614 */ "LDUHArr\000"
2854 /* 7622 */ "SWAPArr\000"
2855 /* 7630 */ "SRArr\000"
2856 /* 7636 */ "CASArr\000"
2857 /* 7643 */ "STArr\000"
2858 /* 7649 */ "LDSWArr\000"
2859 /* 7657 */ "LDXArr\000"
2860 /* 7664 */ "CASXArr\000"
2861 /* 7672 */ "STXArr\000"
2862 /* 7679 */ "LDSBrr\000"
2863 /* 7686 */ "STBrr\000"
2864 /* 7692 */ "LDUBrr\000"
2865 /* 7699 */ "SUBrr\000"
2866 /* 7705 */ "LDSTUBrr\000"
2867 /* 7714 */ "SMACrr\000"
2868 /* 7721 */ "UMACrr\000"
2869 /* 7728 */ "SUBCrr\000"
2870 /* 7735 */ "TSUBCCrr\000"
2871 /* 7744 */ "TADDCCrr\000"
2872 /* 7753 */ "ANDCCrr\000"
2873 /* 7761 */ "V9MOVFCCrr\000"
2874 /* 7772 */ "TICCrr\000"
2875 /* 7779 */ "MOVICCrr\000"
2876 /* 7788 */ "SMULCCrr\000"
2877 /* 7797 */ "UMULCCrr\000"
2878 /* 7806 */ "ANDNCCrr\000"
2879 /* 7815 */ "ORNCCrr\000"
2880 /* 7823 */ "XNORCCrr\000"
2881 /* 7832 */ "XORCCrr\000"
2882 /* 7840 */ "MULSCCrr\000"
2883 /* 7849 */ "SDIVCCrr\000"
2884 /* 7858 */ "UDIVCCrr\000"
2885 /* 7867 */ "TXCCrr\000"
2886 /* 7874 */ "MOVXCCrr\000"
2887 /* 7883 */ "ADDCrr\000"
2888 /* 7890 */ "LDDCrr\000"
2889 /* 7897 */ "LDCrr\000"
2890 /* 7903 */ "STDCrr\000"
2891 /* 7910 */ "POPCrr\000"
2892 /* 7917 */ "STCrr\000"
2893 /* 7923 */ "TLS_ADDrr\000"
2894 /* 7933 */ "LDDrr\000"
2895 /* 7939 */ "GDOP_LDrr\000"
2896 /* 7949 */ "TLS_LDrr\000"
2897 /* 7958 */ "ANDrr\000"
2898 /* 7964 */ "BINDrr\000"
2899 /* 7971 */ "CWBCONDrr\000"
2900 /* 7981 */ "CXBCONDrr\000"
2901 /* 7991 */ "STDrr\000"
2902 /* 7997 */ "SUBErr\000"
2903 /* 8004 */ "ADDErr\000"
2904 /* 8011 */ "RESTORErr\000"
2905 /* 8021 */ "SAVErr\000"
2906 /* 8028 */ "LDDFrr\000"
2907 /* 8035 */ "LDFrr\000"
2908 /* 8041 */ "STDFrr\000"
2909 /* 8048 */ "LDQFrr\000"
2910 /* 8055 */ "STQFrr\000"
2911 /* 8062 */ "STFrr\000"
2912 /* 8068 */ "LDSHrr\000"
2913 /* 8075 */ "FLUSHrr\000"
2914 /* 8083 */ "STHrr\000"
2915 /* 8089 */ "LDUHrr\000"
2916 /* 8096 */ "CALLrr\000"
2917 /* 8103 */ "SLLrr\000"
2918 /* 8109 */ "JMPLrr\000"
2919 /* 8116 */ "SRLrr\000"
2920 /* 8122 */ "SMULrr\000"
2921 /* 8129 */ "UMULrr\000"
2922 /* 8136 */ "WRWIMrr\000"
2923 /* 8144 */ "ANDNrr\000"
2924 /* 8151 */ "ORNrr\000"
2925 /* 8157 */ "TRAPrr\000"
2926 /* 8164 */ "SWAPrr\000"
2927 /* 8171 */ "STDCQrr\000"
2928 /* 8179 */ "STDFQrr\000"
2929 /* 8187 */ "WRTBRrr\000"
2930 /* 8195 */ "XNORrr\000"
2931 /* 8202 */ "XORrr\000"
2932 /* 8208 */ "WRPRrr\000"
2933 /* 8215 */ "WRASRrr\000"
2934 /* 8223 */ "LDCSRrr\000"
2935 /* 8231 */ "STCSRrr\000"
2936 /* 8239 */ "LDFSRrr\000"
2937 /* 8247 */ "STFSRrr\000"
2938 /* 8255 */ "LDXFSRrr\000"
2939 /* 8264 */ "STXFSRrr\000"
2940 /* 8273 */ "PWRPSRrr\000"
2941 /* 8282 */ "MOVRrr\000"
2942 /* 8289 */ "STrr\000"
2943 /* 8294 */ "RETTrr\000"
2944 /* 8301 */ "SDIVrr\000"
2945 /* 8308 */ "UDIVrr\000"
2946 /* 8315 */ "TSUBCCTVrr\000"
2947 /* 8326 */ "TADDCCTVrr\000"
2948 /* 8337 */ "LDSWrr\000"
2949 /* 8344 */ "SRAXrr\000"
2950 /* 8351 */ "GDOP_LDXrr\000"
2951 /* 8362 */ "TLS_LDXrr\000"
2952 /* 8372 */ "SLLXrr\000"
2953 /* 8379 */ "SRLXrr\000"
2954 /* 8386 */ "MULXrr\000"
2955 /* 8393 */ "STXrr\000"
2956 /* 8399 */ "SDIVXrr\000"
2957 /* 8407 */ "UDIVXrr\000"
2958};
2959#ifdef __GNUC__
2960#pragma GCC diagnostic pop
2961#endif
2962
2963extern const unsigned SparcInstrNameIndices[] = {
2964 2570U, 3143U, 4216U, 3607U, 2740U, 2721U, 2749U, 2930U,
2965 2357U, 2372U, 2312U, 2299U, 2399U, 5126U, 2175U, 5986U,
2966 2325U, 2566U, 2730U, 1887U, 6494U, 2663U, 2017U, 5812U,
2967 1610U, 1838U, 1875U, 3778U, 2918U, 5716U, 1789U, 4024U,
2968 2492U, 5705U, 2086U, 3997U, 3984U, 4287U, 5500U, 5523U,
2969 2841U, 2897U, 2870U, 2766U, 2166U, 4252U, 3726U, 2075U,
2970 6505U, 4413U, 3955U, 2223U, 6016U, 6046U, 3424U, 1391U,
2971 714U, 3071U, 6129U, 6136U, 3103U, 3110U, 3117U, 3127U,
2972 1588U, 4638U, 4601U, 4848U, 6071U, 4468U, 2830U, 4456U,
2973 2819U, 2310U, 2568U, 6371U, 2185U, 2200U, 2935U, 5468U,
2974 4926U, 5849U, 4943U, 4519U, 1126U, 5096U, 5727U, 4694U,
2975 5881U, 2266U, 4263U, 1706U, 1100U, 1688U, 5765U, 5746U,
2976 3402U, 4312U, 4331U, 1264U, 1208U, 1238U, 1177U, 1249U,
2977 1189U, 1219U, 2145U, 2099U, 2129U, 5162U, 2413U, 2430U,
2978 1407U, 720U, 1594U, 1535U, 4643U, 4607U, 6340U, 3550U,
2979 6323U, 3533U, 1358U, 697U, 6258U, 3468U, 3238U, 3185U,
2980 3311U, 3273U, 3840U, 3818U, 1647U, 5421U, 1867U, 2509U,
2981 1638U, 5487U, 5827U, 1078U, 5210U, 5682U, 5237U, 6030U,
2982 1118U, 5294U, 6078U, 6093U, 5641U, 5629U, 5802U, 2484U,
2983 6009U, 2386U, 6039U, 2805U, 4398U, 4384U, 2798U, 4391U,
2984 4687U, 2967U, 3924U, 3903U, 3931U, 3938U, 5478U, 3718U,
2985 1908U, 3702U, 1859U, 3710U, 1900U, 3694U, 1851U, 3756U,
2986 3748U, 2528U, 2520U, 5339U, 5329U, 5319U, 5309U, 5359U,
2987 5349U, 6408U, 6418U, 5369U, 5382U, 6428U, 6438U, 5395U,
2988 5408U, 1316U, 676U, 2991U, 640U, 1170U, 6108U, 3082U,
2989 2291U, 6203U, 2649U, 4068U, 263U, 9U, 2477U, 246U,
2990 0U, 4043U, 4075U, 2350U, 6001U, 1090U, 2631U, 2640U,
2991 3870U, 3879U, 5442U, 5455U, 4807U, 3439U, 5143U, 2275U,
2992 3335U, 3345U, 1957U, 1972U, 3174U, 3227U, 3259U, 3297U,
2993 6143U, 6169U, 6155U, 1916U, 1944U, 1929U, 2447U, 2462U,
2994 1397U, 2677U, 3502U, 6292U, 3526U, 6316U, 4814U, 1679U,
2995 1669U, 4211U, 5547U, 1995U, 4500U, 4480U, 5575U, 5554U,
2996 4534U, 4565U, 4551U, 5192U, 6534U, 3642U, 6527U, 3623U,
2997 4964U, 3976U, 3862U, 2153U, 3033U, 2811U, 4992U, 3574U,
2998 4999U, 3395U, 4984U, 3566U, 3387U, 254U, 2552U, 2544U,
2999 2536U, 5858U, 4447U, 5738U, 5783U, 5891U, 4239U, 2004U,
3000 1147U, 2244U, 2114U, 1344U, 683U, 3019U, 6115U, 3089U,
3001 646U, 5866U, 4052U, 3910U, 5056U, 4351U, 4367U, 6485U,
3002 2049U, 2256U, 5514U, 3764U, 2033U, 3811U, 3787U, 3799U,
3003 1323U, 2998U, 1299U, 2974U, 6241U, 3451U, 3206U, 3153U,
3004 1375U, 3055U, 1572U, 4623U, 4585U, 6275U, 3485U, 6299U,
3005 3509U, 6385U, 6392U, 3668U, 4009U, 6356U, 769U, 880U,
3006 987U, 805U, 916U, 1023U, 846U, 953U, 1060U, 787U,
3007 898U, 1005U, 5519U, 6226U, 6480U, 4193U, 6836U, 7745U,
3008 6974U, 7883U, 7070U, 8004U, 1164U, 743U, 7007U, 7927U,
3009 31U, 5908U, 294U, 5944U, 44U, 5926U, 307U, 5962U,
3010 18U, 72U, 233U, 4229U, 2951U, 3378U, 6844U, 7753U,
3011 6897U, 7806U, 7215U, 8144U, 7024U, 7958U, 516U, 219U,
3012 544U, 599U, 1624U, 624U, 7030U, 7964U, 2657U, 751U,
3013 602U, 5595U, 5652U, 864U, 609U, 5604U, 5660U, 4658U,
3014 659U, 5622U, 5796U, 971U, 616U, 5613U, 5668U, 2024U,
3015 2856U, 6569U, 7167U, 6583U, 8096U, 7471U, 2339U, 2786U,
3016 2600U, 6727U, 7636U, 6755U, 7664U, 396U, 171U, 537U,
3017 1630U, 631U, 736U, 7037U, 7971U, 7047U, 7981U, 3888U,
3018 3896U, 1560U, 1732U, 2065U, 363U, 2695U, 3590U, 3363U,
3019 138U, 2687U, 3581U, 3355U, 531U, 2703U, 3599U, 3371U,
3020 1813U, 4168U, 5156U, 1423U, 4090U, 4855U, 664U, 1524U,
3021 85U, 4712U, 271U, 4763U, 4898U, 1623U, 623U, 551U,
3022 562U, 418U, 1776U, 572U, 435U, 193U, 452U, 210U,
3023 370U, 145U, 379U, 154U, 4155U, 581U, 5050U, 590U,
3024 1826U, 4181U, 5282U, 4116U, 2613U, 4129U, 5016U, 6454U,
3025 1552U, 1429U, 4861U, 1277U, 4826U, 1742U, 4135U, 5022U,
3026 1782U, 5071U, 2560U, 6181U, 7141U, 8075U, 1444U, 4876U,
3027 427U, 1832U, 759U, 870U, 977U, 4187U, 824U, 933U,
3028 1040U, 1806U, 4161U, 5119U, 5288U, 836U, 943U, 1050U,
3029 1284U, 4833U, 505U, 482U, 461U, 2710U, 6060U, 1496U,
3030 493U, 470U, 4123U, 4971U, 1459U, 4891U, 1529U, 4904U,
3031 1490U, 4110U, 4958U, 1436U, 4868U, 1451U, 4883U, 1291U,
3032 4840U, 1502U, 4977U, 4436U, 5083U, 94U, 4722U, 280U,
3033 4773U, 1516U, 2070U, 4911U, 4409U, 100U, 4729U, 286U,
3034 4780U, 5078U, 388U, 163U, 6399U, 355U, 4798U, 130U,
3035 4747U, 324U, 6363U, 2574U, 1987U, 347U, 4789U, 122U,
3036 4738U, 1748U, 2619U, 5028U, 6468U, 444U, 202U, 404U,
3037 179U, 1509U, 1819U, 4174U, 5275U, 340U, 115U, 66U,
3038 4705U, 227U, 4756U, 411U, 186U, 1754U, 2625U, 4141U,
3039 6474U, 1271U, 4084U, 4820U, 4441U, 5089U, 4580U, 5113U,
3040 1760U, 4147U, 5042U, 3772U, 5009U, 8351U, 7939U, 6196U,
3041 7180U, 8109U, 6631U, 7540U, 7294U, 8223U, 6988U, 7897U,
3042 6624U, 7533U, 6981U, 7890U, 6644U, 7553U, 7094U, 8028U,
3043 7013U, 7933U, 6652U, 7561U, 7310U, 8239U, 7101U, 8035U,
3044 6667U, 7576U, 7114U, 8048U, 6591U, 7500U, 6770U, 7679U,
3045 6690U, 7599U, 7134U, 8068U, 6614U, 7523U, 6796U, 7705U,
3046 6740U, 7649U, 7408U, 8337U, 6606U, 7515U, 6783U, 7692U,
3047 6705U, 7614U, 7155U, 8089U, 6748U, 7657U, 7326U, 8255U,
3048 7422U, 8356U, 7019U, 7944U, 5676U, 336U, 6575U, 3047U,
3049 4667U, 6460U, 6854U, 7763U, 6870U, 7779U, 7353U, 8282U,
3050 6217U, 6232U, 5034U, 6965U, 7874U, 1766U, 3041U, 6931U,
3051 7840U, 7442U, 8386U, 3951U, 6188U, 6916U, 7825U, 6906U,
3052 7815U, 7222U, 8151U, 7268U, 8197U, 6210U, 5980U, 3661U,
3053 7910U, 6541U, 7479U, 6552U, 7490U, 7344U, 8273U, 4675U,
3054 4105U, 4662U, 4681U, 4205U, 3137U, 1475U, 7077U, 8011U,
3055 5510U, 2962U, 6499U, 7365U, 8294U, 1484U, 7087U, 8021U,
3056 6940U, 7849U, 7455U, 8399U, 7372U, 8301U, 6562U, 57U,
3057 524U, 108U, 3685U, 3077U, 4405U, 7428U, 8372U, 7174U,
3058 8103U, 6805U, 7714U, 6879U, 7788U, 7193U, 8122U, 7415U,
3059 8344U, 6721U, 7630U, 7435U, 8379U, 7187U, 8116U, 6734U,
3060 7643U, 4199U, 6599U, 7508U, 6777U, 7686U, 7302U, 8231U,
3061 7001U, 7917U, 6637U, 7546U, 7242U, 8171U, 6994U, 7903U,
3062 6659U, 7568U, 7250U, 8179U, 7107U, 8041U, 7057U, 7991U,
3063 6683U, 7592U, 7318U, 8247U, 7128U, 8062U, 6698U, 7607U,
3064 7149U, 8083U, 6675U, 7584U, 7121U, 8055U, 6763U, 7672U,
3065 7335U, 8264U, 7449U, 8393U, 7360U, 8289U, 6827U, 7736U,
3066 6819U, 7728U, 7063U, 7997U, 6790U, 7699U, 6713U, 7622U,
3067 7235U, 8164U, 62U, 320U, 332U, 7397U, 8326U, 6835U,
3068 7744U, 2851U, 7162U, 6863U, 7772U, 7923U, 2861U, 8362U,
3069 7949U, 7228U, 8157U, 7386U, 8315U, 6826U, 7735U, 6958U,
3070 7867U, 6949U, 7858U, 7463U, 8407U, 7379U, 8308U, 6812U,
3071 7721U, 6888U, 7797U, 2584U, 7200U, 8129U, 3945U, 1774U,
3072 1466U, 4096U, 4917U, 4153U, 5048U, 757U, 822U, 834U,
3073 6852U, 7761U, 7286U, 8215U, 7279U, 8208U, 7345U, 8274U,
3074 7258U, 8187U, 7207U, 8136U, 6448U, 2592U, 6914U, 7823U,
3075 7266U, 8195U, 6923U, 7832U, 7273U, 8202U,
3076};
3077
3078extern const int16_t SparcRegClassByHwModeTables[2][1] = {
3079 { // DefaultMode
3080 SP::IntRegsRegClassID, // sparc_ptr_rc
3081 },
3082 { // SPARC64
3083 SP::I64RegsRegClassID, // sparc_ptr_rc
3084 },
3085};
3086
3087static inline void InitSparcMCInstrInfo(MCInstrInfo *II) {
3088 II->InitMCInstrInfo(SparcDescs.Insts, SparcInstrNameIndices, SparcInstrNameData, nullptr, nullptr, 894, &SparcRegClassByHwModeTables[0][0], 1);
3089}
3090
3091
3092} // namespace llvm
3093
3094#endif // GET_INSTRINFO_MC_DESC
3095
3096#ifdef GET_INSTRINFO_HEADER
3097#undef GET_INSTRINFO_HEADER
3098
3099namespace llvm {
3100
3101struct SparcGenInstrInfo : public TargetInstrInfo {
3102 explicit SparcGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u);
3103 ~SparcGenInstrInfo() override = default;
3104};
3105extern const int16_t SparcRegClassByHwModeTables[2][1];
3106
3107} // namespace llvm
3108
3109namespace llvm::SP {
3110
3111
3112} // namespace llvm::SP
3113
3114#endif // GET_INSTRINFO_HEADER
3115
3116#ifdef GET_INSTRINFO_HELPER_DECLS
3117#undef GET_INSTRINFO_HELPER_DECLS
3118
3119
3120#endif // GET_INSTRINFO_HELPER_DECLS
3121
3122#ifdef GET_INSTRINFO_HELPERS
3123#undef GET_INSTRINFO_HELPERS
3124
3125
3126#endif // GET_INSTRINFO_HELPERS
3127
3128#ifdef GET_INSTRINFO_CTOR_DTOR
3129#undef GET_INSTRINFO_CTOR_DTOR
3130
3131namespace llvm {
3132
3133extern const SparcInstrTable SparcDescs;
3134extern const unsigned SparcInstrNameIndices[];
3135extern const char SparcInstrNameData[];
3136SparcGenInstrInfo::SparcGenInstrInfo(const TargetSubtargetInfo &STI, const TargetRegisterInfo &TRI, unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode)
3137 : TargetInstrInfo(TRI, CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode, SparcRegClassByHwModeTables[STI.getHwMode(MCSubtargetInfo::HwMode_RegInfo)]) {
3138 InitMCInstrInfo(SparcDescs.Insts, SparcInstrNameIndices, SparcInstrNameData, nullptr, nullptr, 894, &SparcRegClassByHwModeTables[0][0], 1);
3139}
3140
3141} // namespace llvm
3142
3143#endif // GET_INSTRINFO_CTOR_DTOR
3144
3145#ifdef GET_INSTRINFO_MC_HELPER_DECLS
3146#undef GET_INSTRINFO_MC_HELPER_DECLS
3147
3148namespace llvm {
3149
3150class MCInst;
3151class FeatureBitset;
3152
3153namespace Sparc_MC {
3154
3155void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features);
3156
3157} // namespace Sparc_MC
3158
3159} // namespace llvm
3160
3161#endif // GET_INSTRINFO_MC_HELPER_DECLS
3162
3163#ifdef GET_INSTRINFO_MC_HELPERS
3164#undef GET_INSTRINFO_MC_HELPERS
3165
3166namespace llvm::Sparc_MC {
3167
3168
3169} // namespace llvm::Sparc_MC
3170
3171#endif // GET_INSTRINFO_MC_HELPERS
3172
3173#if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\
3174 defined(GET_AVAILABLE_OPCODE_CHECKER)
3175#define GET_COMPUTE_FEATURES
3176#endif
3177#ifdef GET_COMPUTE_FEATURES
3178#undef GET_COMPUTE_FEATURES
3179
3180namespace llvm::Sparc_MC {
3181
3182// Bits for subtarget features that participate in instruction matching.
3183enum SubtargetFeatureBits : uint8_t {
3184 Feature_Is32BitBit = 10,
3185 Feature_Is64BitBit = 11,
3186 Feature_UseSoftMulDivBit = 12,
3187 Feature_HasV9Bit = 6,
3188 Feature_HasVISBit = 7,
3189 Feature_HasVIS2Bit = 8,
3190 Feature_HasVIS3Bit = 9,
3191 Feature_HasUA2005Bit = 4,
3192 Feature_HasUA2007Bit = 5,
3193 Feature_HasOSA2011Bit = 2,
3194 Feature_HasCryptoBit = 1,
3195 Feature_HasCASABit = 0,
3196 Feature_HasPWRPSRBit = 3,
3197};
3198
3199inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) {
3200 FeatureBitset Features;
3201 if (!FB[Sparc::Feature64Bit])
3202 Features.set(Feature_Is32BitBit);
3203 if (FB[Sparc::Feature64Bit])
3204 Features.set(Feature_Is64BitBit);
3205 if (FB[Sparc::FeatureSoftMulDiv])
3206 Features.set(Feature_UseSoftMulDivBit);
3207 if (FB[Sparc::FeatureV9])
3208 Features.set(Feature_HasV9Bit);
3209 if (FB[Sparc::FeatureVIS])
3210 Features.set(Feature_HasVISBit);
3211 if (FB[Sparc::FeatureVIS2])
3212 Features.set(Feature_HasVIS2Bit);
3213 if (FB[Sparc::FeatureVIS3])
3214 Features.set(Feature_HasVIS3Bit);
3215 if (FB[Sparc::FeatureUA2005])
3216 Features.set(Feature_HasUA2005Bit);
3217 if (FB[Sparc::FeatureUA2007])
3218 Features.set(Feature_HasUA2007Bit);
3219 if (FB[Sparc::FeatureOSA2011])
3220 Features.set(Feature_HasOSA2011Bit);
3221 if (FB[Sparc::FeatureCrypto])
3222 Features.set(Feature_HasCryptoBit);
3223 if (FB[Sparc::LeonCASA] || FB[Sparc::FeatureV9])
3224 Features.set(Feature_HasCASABit);
3225 if (FB[Sparc::FeaturePWRPSR])
3226 Features.set(Feature_HasPWRPSRBit);
3227 return Features;
3228}
3229
3230inline FeatureBitset computeRequiredFeatures(unsigned Opcode) {
3231 enum : uint8_t {
3232 CEFBS_None,
3233 CEFBS_HasCASA,
3234 CEFBS_HasCrypto,
3235 CEFBS_HasOSA2011,
3236 CEFBS_HasPWRPSR,
3237 CEFBS_HasUA2005,
3238 CEFBS_HasUA2007,
3239 CEFBS_HasV9,
3240 CEFBS_HasVIS,
3241 CEFBS_HasVIS2,
3242 CEFBS_HasVIS3,
3243 CEFBS_Is64Bit,
3244 CEFBS_Is64Bit_HasV9,
3245 };
3246
3247 static constexpr FeatureBitset FeatureBitsets[] = {
3248 {}, // CEFBS_None
3249 {Feature_HasCASABit, },
3250 {Feature_HasCryptoBit, },
3251 {Feature_HasOSA2011Bit, },
3252 {Feature_HasPWRPSRBit, },
3253 {Feature_HasUA2005Bit, },
3254 {Feature_HasUA2007Bit, },
3255 {Feature_HasV9Bit, },
3256 {Feature_HasVISBit, },
3257 {Feature_HasVIS2Bit, },
3258 {Feature_HasVIS3Bit, },
3259 {Feature_Is64BitBit, },
3260 {Feature_Is64BitBit, Feature_HasV9Bit, },
3261 };
3262 static constexpr uint8_t RequiredFeaturesRefs[] = {
3263 CEFBS_None, // PHI
3264 CEFBS_None, // INLINEASM
3265 CEFBS_None, // INLINEASM_BR
3266 CEFBS_None, // CFI_INSTRUCTION
3267 CEFBS_None, // EH_LABEL
3268 CEFBS_None, // GC_LABEL
3269 CEFBS_None, // ANNOTATION_LABEL
3270 CEFBS_None, // KILL
3271 CEFBS_None, // EXTRACT_SUBREG
3272 CEFBS_None, // INSERT_SUBREG
3273 CEFBS_None, // IMPLICIT_DEF
3274 CEFBS_None, // INIT_UNDEF
3275 CEFBS_None, // SUBREG_TO_REG
3276 CEFBS_None, // COPY_TO_REGCLASS
3277 CEFBS_None, // DBG_VALUE
3278 CEFBS_None, // DBG_VALUE_LIST
3279 CEFBS_None, // DBG_INSTR_REF
3280 CEFBS_None, // DBG_PHI
3281 CEFBS_None, // DBG_LABEL
3282 CEFBS_None, // REG_SEQUENCE
3283 CEFBS_None, // COPY
3284 CEFBS_None, // COPY_LANEMASK
3285 CEFBS_None, // BUNDLE
3286 CEFBS_None, // LIFETIME_START
3287 CEFBS_None, // LIFETIME_END
3288 CEFBS_None, // PSEUDO_PROBE
3289 CEFBS_None, // ARITH_FENCE
3290 CEFBS_None, // STACKMAP
3291 CEFBS_None, // FENTRY_CALL
3292 CEFBS_None, // PATCHPOINT
3293 CEFBS_None, // LOAD_STACK_GUARD
3294 CEFBS_None, // PREALLOCATED_SETUP
3295 CEFBS_None, // PREALLOCATED_ARG
3296 CEFBS_None, // STATEPOINT
3297 CEFBS_None, // LOCAL_ESCAPE
3298 CEFBS_None, // FAULTING_OP
3299 CEFBS_None, // PATCHABLE_OP
3300 CEFBS_None, // PATCHABLE_FUNCTION_ENTER
3301 CEFBS_None, // PATCHABLE_RET
3302 CEFBS_None, // PATCHABLE_FUNCTION_EXIT
3303 CEFBS_None, // PATCHABLE_TAIL_CALL
3304 CEFBS_None, // PATCHABLE_EVENT_CALL
3305 CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL
3306 CEFBS_None, // ICALL_BRANCH_FUNNEL
3307 CEFBS_None, // FAKE_USE
3308 CEFBS_None, // MEMBARRIER
3309 CEFBS_None, // JUMP_TABLE_DEBUG_INFO
3310 CEFBS_None, // RELOC_NONE
3311 CEFBS_None, // CONVERGENCECTRL_ENTRY
3312 CEFBS_None, // CONVERGENCECTRL_ANCHOR
3313 CEFBS_None, // CONVERGENCECTRL_LOOP
3314 CEFBS_None, // CONVERGENCECTRL_GLUE
3315 CEFBS_None, // G_ASSERT_SEXT
3316 CEFBS_None, // G_ASSERT_ZEXT
3317 CEFBS_None, // G_ASSERT_ALIGN
3318 CEFBS_None, // G_ADD
3319 CEFBS_None, // G_SUB
3320 CEFBS_None, // G_MUL
3321 CEFBS_None, // G_SDIV
3322 CEFBS_None, // G_UDIV
3323 CEFBS_None, // G_SREM
3324 CEFBS_None, // G_UREM
3325 CEFBS_None, // G_SDIVREM
3326 CEFBS_None, // G_UDIVREM
3327 CEFBS_None, // G_AND
3328 CEFBS_None, // G_OR
3329 CEFBS_None, // G_XOR
3330 CEFBS_None, // G_ABDS
3331 CEFBS_None, // G_ABDU
3332 CEFBS_None, // G_UAVGFLOOR
3333 CEFBS_None, // G_UAVGCEIL
3334 CEFBS_None, // G_SAVGFLOOR
3335 CEFBS_None, // G_SAVGCEIL
3336 CEFBS_None, // G_IMPLICIT_DEF
3337 CEFBS_None, // G_PHI
3338 CEFBS_None, // G_FRAME_INDEX
3339 CEFBS_None, // G_GLOBAL_VALUE
3340 CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE
3341 CEFBS_None, // G_CONSTANT_POOL
3342 CEFBS_None, // G_EXTRACT
3343 CEFBS_None, // G_UNMERGE_VALUES
3344 CEFBS_None, // G_INSERT
3345 CEFBS_None, // G_MERGE_VALUES
3346 CEFBS_None, // G_BUILD_VECTOR
3347 CEFBS_None, // G_BUILD_VECTOR_TRUNC
3348 CEFBS_None, // G_CONCAT_VECTORS
3349 CEFBS_None, // G_PTRTOINT
3350 CEFBS_None, // G_INTTOPTR
3351 CEFBS_None, // G_BITCAST
3352 CEFBS_None, // G_FREEZE
3353 CEFBS_None, // G_CONSTANT_FOLD_BARRIER
3354 CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND
3355 CEFBS_None, // G_INTRINSIC_TRUNC
3356 CEFBS_None, // G_INTRINSIC_ROUND
3357 CEFBS_None, // G_INTRINSIC_LRINT
3358 CEFBS_None, // G_INTRINSIC_LLRINT
3359 CEFBS_None, // G_INTRINSIC_ROUNDEVEN
3360 CEFBS_None, // G_READCYCLECOUNTER
3361 CEFBS_None, // G_READSTEADYCOUNTER
3362 CEFBS_None, // G_LOAD
3363 CEFBS_None, // G_SEXTLOAD
3364 CEFBS_None, // G_ZEXTLOAD
3365 CEFBS_None, // G_FPEXTLOAD
3366 CEFBS_None, // G_INDEXED_LOAD
3367 CEFBS_None, // G_INDEXED_SEXTLOAD
3368 CEFBS_None, // G_INDEXED_ZEXTLOAD
3369 CEFBS_None, // G_STORE
3370 CEFBS_None, // G_FPTRUNCSTORE
3371 CEFBS_None, // G_INDEXED_STORE
3372 CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
3373 CEFBS_None, // G_ATOMIC_CMPXCHG
3374 CEFBS_None, // G_ATOMICRMW_XCHG
3375 CEFBS_None, // G_ATOMICRMW_ADD
3376 CEFBS_None, // G_ATOMICRMW_SUB
3377 CEFBS_None, // G_ATOMICRMW_AND
3378 CEFBS_None, // G_ATOMICRMW_NAND
3379 CEFBS_None, // G_ATOMICRMW_OR
3380 CEFBS_None, // G_ATOMICRMW_XOR
3381 CEFBS_None, // G_ATOMICRMW_MAX
3382 CEFBS_None, // G_ATOMICRMW_MIN
3383 CEFBS_None, // G_ATOMICRMW_UMAX
3384 CEFBS_None, // G_ATOMICRMW_UMIN
3385 CEFBS_None, // G_ATOMICRMW_FADD
3386 CEFBS_None, // G_ATOMICRMW_FSUB
3387 CEFBS_None, // G_ATOMICRMW_FMAX
3388 CEFBS_None, // G_ATOMICRMW_FMIN
3389 CEFBS_None, // G_ATOMICRMW_FMAXIMUM
3390 CEFBS_None, // G_ATOMICRMW_FMINIMUM
3391 CEFBS_None, // G_ATOMICRMW_FMAXIMUMNUM
3392 CEFBS_None, // G_ATOMICRMW_FMINIMUMNUM
3393 CEFBS_None, // G_ATOMICRMW_UINC_WRAP
3394 CEFBS_None, // G_ATOMICRMW_UDEC_WRAP
3395 CEFBS_None, // G_ATOMICRMW_USUB_COND
3396 CEFBS_None, // G_ATOMICRMW_USUB_SAT
3397 CEFBS_None, // G_FENCE
3398 CEFBS_None, // G_PREFETCH
3399 CEFBS_None, // G_BRCOND
3400 CEFBS_None, // G_BRINDIRECT
3401 CEFBS_None, // G_INVOKE_REGION_START
3402 CEFBS_None, // G_INTRINSIC
3403 CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS
3404 CEFBS_None, // G_INTRINSIC_CONVERGENT
3405 CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
3406 CEFBS_None, // G_ANYEXT
3407 CEFBS_None, // G_TRUNC
3408 CEFBS_None, // G_TRUNC_SSAT_S
3409 CEFBS_None, // G_TRUNC_SSAT_U
3410 CEFBS_None, // G_TRUNC_USAT_U
3411 CEFBS_None, // G_CONSTANT
3412 CEFBS_None, // G_FCONSTANT
3413 CEFBS_None, // G_VASTART
3414 CEFBS_None, // G_VAARG
3415 CEFBS_None, // G_SEXT
3416 CEFBS_None, // G_SEXT_INREG
3417 CEFBS_None, // G_ZEXT
3418 CEFBS_None, // G_SHL
3419 CEFBS_None, // G_LSHR
3420 CEFBS_None, // G_ASHR
3421 CEFBS_None, // G_FSHL
3422 CEFBS_None, // G_FSHR
3423 CEFBS_None, // G_ROTR
3424 CEFBS_None, // G_ROTL
3425 CEFBS_None, // G_ICMP
3426 CEFBS_None, // G_FCMP
3427 CEFBS_None, // G_SCMP
3428 CEFBS_None, // G_UCMP
3429 CEFBS_None, // G_SELECT
3430 CEFBS_None, // G_UADDO
3431 CEFBS_None, // G_UADDE
3432 CEFBS_None, // G_USUBO
3433 CEFBS_None, // G_USUBE
3434 CEFBS_None, // G_SADDO
3435 CEFBS_None, // G_SADDE
3436 CEFBS_None, // G_SSUBO
3437 CEFBS_None, // G_SSUBE
3438 CEFBS_None, // G_UMULO
3439 CEFBS_None, // G_SMULO
3440 CEFBS_None, // G_UMULH
3441 CEFBS_None, // G_SMULH
3442 CEFBS_None, // G_UADDSAT
3443 CEFBS_None, // G_SADDSAT
3444 CEFBS_None, // G_USUBSAT
3445 CEFBS_None, // G_SSUBSAT
3446 CEFBS_None, // G_USHLSAT
3447 CEFBS_None, // G_SSHLSAT
3448 CEFBS_None, // G_SMULFIX
3449 CEFBS_None, // G_UMULFIX
3450 CEFBS_None, // G_SMULFIXSAT
3451 CEFBS_None, // G_UMULFIXSAT
3452 CEFBS_None, // G_SDIVFIX
3453 CEFBS_None, // G_UDIVFIX
3454 CEFBS_None, // G_SDIVFIXSAT
3455 CEFBS_None, // G_UDIVFIXSAT
3456 CEFBS_None, // G_FADD
3457 CEFBS_None, // G_FSUB
3458 CEFBS_None, // G_FMUL
3459 CEFBS_None, // G_FMA
3460 CEFBS_None, // G_FMAD
3461 CEFBS_None, // G_FDIV
3462 CEFBS_None, // G_FREM
3463 CEFBS_None, // G_FMODF
3464 CEFBS_None, // G_FPOW
3465 CEFBS_None, // G_FPOWI
3466 CEFBS_None, // G_FEXP
3467 CEFBS_None, // G_FEXP2
3468 CEFBS_None, // G_FEXP10
3469 CEFBS_None, // G_FLOG
3470 CEFBS_None, // G_FLOG2
3471 CEFBS_None, // G_FLOG10
3472 CEFBS_None, // G_FLDEXP
3473 CEFBS_None, // G_FFREXP
3474 CEFBS_None, // G_FNEG
3475 CEFBS_None, // G_FPEXT
3476 CEFBS_None, // G_FPTRUNC
3477 CEFBS_None, // G_FPTOSI
3478 CEFBS_None, // G_FPTOUI
3479 CEFBS_None, // G_SITOFP
3480 CEFBS_None, // G_UITOFP
3481 CEFBS_None, // G_FPTOSI_SAT
3482 CEFBS_None, // G_FPTOUI_SAT
3483 CEFBS_None, // G_FABS
3484 CEFBS_None, // G_FCOPYSIGN
3485 CEFBS_None, // G_IS_FPCLASS
3486 CEFBS_None, // G_FCANONICALIZE
3487 CEFBS_None, // G_FMINNUM
3488 CEFBS_None, // G_FMAXNUM
3489 CEFBS_None, // G_FMINNUM_IEEE
3490 CEFBS_None, // G_FMAXNUM_IEEE
3491 CEFBS_None, // G_FMINIMUM
3492 CEFBS_None, // G_FMAXIMUM
3493 CEFBS_None, // G_FMINIMUMNUM
3494 CEFBS_None, // G_FMAXIMUMNUM
3495 CEFBS_None, // G_GET_FPENV
3496 CEFBS_None, // G_SET_FPENV
3497 CEFBS_None, // G_RESET_FPENV
3498 CEFBS_None, // G_GET_FPMODE
3499 CEFBS_None, // G_SET_FPMODE
3500 CEFBS_None, // G_RESET_FPMODE
3501 CEFBS_None, // G_GET_ROUNDING
3502 CEFBS_None, // G_SET_ROUNDING
3503 CEFBS_None, // G_PTR_ADD
3504 CEFBS_None, // G_PTRMASK
3505 CEFBS_None, // G_SMIN
3506 CEFBS_None, // G_SMAX
3507 CEFBS_None, // G_UMIN
3508 CEFBS_None, // G_UMAX
3509 CEFBS_None, // G_ABS
3510 CEFBS_None, // G_LROUND
3511 CEFBS_None, // G_LLROUND
3512 CEFBS_None, // G_BR
3513 CEFBS_None, // G_BRJT
3514 CEFBS_None, // G_VSCALE
3515 CEFBS_None, // G_INSERT_SUBVECTOR
3516 CEFBS_None, // G_EXTRACT_SUBVECTOR
3517 CEFBS_None, // G_INSERT_VECTOR_ELT
3518 CEFBS_None, // G_EXTRACT_VECTOR_ELT
3519 CEFBS_None, // G_SHUFFLE_VECTOR
3520 CEFBS_None, // G_SPLAT_VECTOR
3521 CEFBS_None, // G_STEP_VECTOR
3522 CEFBS_None, // G_VECTOR_COMPRESS
3523 CEFBS_None, // G_CTTZ
3524 CEFBS_None, // G_CTTZ_ZERO_POISON
3525 CEFBS_None, // G_CTLZ
3526 CEFBS_None, // G_CTLZ_ZERO_POISON
3527 CEFBS_None, // G_CTLS
3528 CEFBS_None, // G_CTPOP
3529 CEFBS_None, // G_BSWAP
3530 CEFBS_None, // G_BITREVERSE
3531 CEFBS_None, // G_CLMUL
3532 CEFBS_None, // G_FCEIL
3533 CEFBS_None, // G_FCOS
3534 CEFBS_None, // G_FSIN
3535 CEFBS_None, // G_FSINCOS
3536 CEFBS_None, // G_FTAN
3537 CEFBS_None, // G_FACOS
3538 CEFBS_None, // G_FASIN
3539 CEFBS_None, // G_FATAN
3540 CEFBS_None, // G_FATAN2
3541 CEFBS_None, // G_FCOSH
3542 CEFBS_None, // G_FSINH
3543 CEFBS_None, // G_FTANH
3544 CEFBS_None, // G_FSQRT
3545 CEFBS_None, // G_FFLOOR
3546 CEFBS_None, // G_FRINT
3547 CEFBS_None, // G_FNEARBYINT
3548 CEFBS_None, // G_ADDRSPACE_CAST
3549 CEFBS_None, // G_BLOCK_ADDR
3550 CEFBS_None, // G_JUMP_TABLE
3551 CEFBS_None, // G_DYN_STACKALLOC
3552 CEFBS_None, // G_STACKSAVE
3553 CEFBS_None, // G_STACKRESTORE
3554 CEFBS_None, // G_STRICT_FADD
3555 CEFBS_None, // G_STRICT_FSUB
3556 CEFBS_None, // G_STRICT_FMUL
3557 CEFBS_None, // G_STRICT_FDIV
3558 CEFBS_None, // G_STRICT_FREM
3559 CEFBS_None, // G_STRICT_FMA
3560 CEFBS_None, // G_STRICT_FSQRT
3561 CEFBS_None, // G_STRICT_FLDEXP
3562 CEFBS_None, // G_STRICT_FCMP
3563 CEFBS_None, // G_STRICT_FCMPS
3564 CEFBS_None, // G_READ_REGISTER
3565 CEFBS_None, // G_WRITE_REGISTER
3566 CEFBS_None, // G_MEMCPY
3567 CEFBS_None, // G_MEMCPY_INLINE
3568 CEFBS_None, // G_MEMMOVE
3569 CEFBS_None, // G_MEMSET
3570 CEFBS_None, // G_BZERO
3571 CEFBS_None, // G_MEMSET_INLINE
3572 CEFBS_None, // G_TRAP
3573 CEFBS_None, // G_DEBUGTRAP
3574 CEFBS_None, // G_UBSANTRAP
3575 CEFBS_None, // G_VECREDUCE_SEQ_FADD
3576 CEFBS_None, // G_VECREDUCE_SEQ_FMUL
3577 CEFBS_None, // G_VECREDUCE_FADD
3578 CEFBS_None, // G_VECREDUCE_FMUL
3579 CEFBS_None, // G_VECREDUCE_FMAX
3580 CEFBS_None, // G_VECREDUCE_FMIN
3581 CEFBS_None, // G_VECREDUCE_FMAXIMUM
3582 CEFBS_None, // G_VECREDUCE_FMINIMUM
3583 CEFBS_None, // G_VECREDUCE_ADD
3584 CEFBS_None, // G_VECREDUCE_MUL
3585 CEFBS_None, // G_VECREDUCE_AND
3586 CEFBS_None, // G_VECREDUCE_OR
3587 CEFBS_None, // G_VECREDUCE_XOR
3588 CEFBS_None, // G_VECREDUCE_SMAX
3589 CEFBS_None, // G_VECREDUCE_SMIN
3590 CEFBS_None, // G_VECREDUCE_UMAX
3591 CEFBS_None, // G_VECREDUCE_UMIN
3592 CEFBS_None, // G_SBFX
3593 CEFBS_None, // G_UBFX
3594 CEFBS_None, // ADJCALLSTACKDOWN
3595 CEFBS_None, // ADJCALLSTACKUP
3596 CEFBS_None, // GETPCX
3597 CEFBS_None, // SELECT_CC_DFP_FCC
3598 CEFBS_None, // SELECT_CC_DFP_ICC
3599 CEFBS_None, // SELECT_CC_DFP_XCC
3600 CEFBS_None, // SELECT_CC_FP_FCC
3601 CEFBS_None, // SELECT_CC_FP_ICC
3602 CEFBS_None, // SELECT_CC_FP_XCC
3603 CEFBS_None, // SELECT_CC_Int_FCC
3604 CEFBS_None, // SELECT_CC_Int_ICC
3605 CEFBS_None, // SELECT_CC_Int_XCC
3606 CEFBS_None, // SELECT_CC_QFP_FCC
3607 CEFBS_None, // SELECT_CC_QFP_ICC
3608 CEFBS_None, // SELECT_CC_QFP_XCC
3609 CEFBS_None, // SET
3610 CEFBS_HasV9, // SETSW
3611 CEFBS_Is64Bit_HasV9, // SETX
3612 CEFBS_None, // V8BAR
3613 CEFBS_None, // ADDCCri
3614 CEFBS_None, // ADDCCrr
3615 CEFBS_None, // ADDCri
3616 CEFBS_None, // ADDCrr
3617 CEFBS_None, // ADDEri
3618 CEFBS_None, // ADDErr
3619 CEFBS_HasVIS3, // ADDXC
3620 CEFBS_HasVIS3, // ADDXCCC
3621 CEFBS_None, // ADDri
3622 CEFBS_None, // ADDrr
3623 CEFBS_HasCrypto, // AES_DROUND01
3624 CEFBS_HasCrypto, // AES_DROUND01_LAST
3625 CEFBS_HasCrypto, // AES_DROUND23
3626 CEFBS_HasCrypto, // AES_DROUND23_LAST
3627 CEFBS_HasCrypto, // AES_EROUND01
3628 CEFBS_HasCrypto, // AES_EROUND01_LAST
3629 CEFBS_HasCrypto, // AES_EROUND23
3630 CEFBS_HasCrypto, // AES_EROUND23_LAST
3631 CEFBS_HasCrypto, // AES_KEXPAND0
3632 CEFBS_HasCrypto, // AES_KEXPAND1
3633 CEFBS_HasCrypto, // AES_KEXPAND2
3634 CEFBS_HasVIS, // ALIGNADDR
3635 CEFBS_HasVIS, // ALIGNADDRL
3636 CEFBS_HasUA2005, // ALLCLEAN
3637 CEFBS_None, // ANDCCri
3638 CEFBS_None, // ANDCCrr
3639 CEFBS_None, // ANDNCCri
3640 CEFBS_None, // ANDNCCrr
3641 CEFBS_None, // ANDNri
3642 CEFBS_None, // ANDNrr
3643 CEFBS_None, // ANDri
3644 CEFBS_None, // ANDrr
3645 CEFBS_HasVIS, // ARRAY16
3646 CEFBS_HasVIS, // ARRAY32
3647 CEFBS_HasVIS, // ARRAY8
3648 CEFBS_None, // BA
3649 CEFBS_None, // BCOND
3650 CEFBS_None, // BCONDA
3651 CEFBS_None, // BINDri
3652 CEFBS_None, // BINDrr
3653 CEFBS_HasVIS2, // BMASK
3654 CEFBS_HasV9, // BPFCC
3655 CEFBS_HasV9, // BPFCCA
3656 CEFBS_HasV9, // BPFCCANT
3657 CEFBS_HasV9, // BPFCCNT
3658 CEFBS_HasV9, // BPICC
3659 CEFBS_HasV9, // BPICCA
3660 CEFBS_HasV9, // BPICCANT
3661 CEFBS_HasV9, // BPICCNT
3662 CEFBS_HasV9, // BPR
3663 CEFBS_HasV9, // BPRA
3664 CEFBS_HasV9, // BPRANT
3665 CEFBS_HasV9, // BPRNT
3666 CEFBS_Is64Bit, // BPXCC
3667 CEFBS_Is64Bit, // BPXCCA
3668 CEFBS_Is64Bit, // BPXCCANT
3669 CEFBS_Is64Bit, // BPXCCNT
3670 CEFBS_HasVIS2, // BSHUFFLE
3671 CEFBS_None, // CALL
3672 CEFBS_None, // CALLi
3673 CEFBS_None, // CALLri
3674 CEFBS_None, // CALLrii
3675 CEFBS_None, // CALLrr
3676 CEFBS_None, // CALLrri
3677 CEFBS_HasCrypto, // CAMELLIA_F
3678 CEFBS_HasCrypto, // CAMELLIA_FL
3679 CEFBS_HasCrypto, // CAMELLIA_FLI
3680 CEFBS_HasV9, // CASAri
3681 CEFBS_HasCASA, // CASArr
3682 CEFBS_HasV9, // CASXAri
3683 CEFBS_HasV9, // CASXArr
3684 CEFBS_HasVIS3, // CMASK16
3685 CEFBS_HasVIS3, // CMASK32
3686 CEFBS_HasVIS3, // CMASK8
3687 CEFBS_None, // CPBCOND
3688 CEFBS_None, // CPBCONDA
3689 CEFBS_HasCrypto, // CRC32C
3690 CEFBS_HasOSA2011, // CWBCONDri
3691 CEFBS_HasOSA2011, // CWBCONDrr
3692 CEFBS_HasOSA2011, // CXBCONDri
3693 CEFBS_HasOSA2011, // CXBCONDrr
3694 CEFBS_HasCrypto, // DES_IIP
3695 CEFBS_HasCrypto, // DES_IP
3696 CEFBS_HasCrypto, // DES_KEXPAND
3697 CEFBS_HasCrypto, // DES_ROUND
3698 CEFBS_HasV9, // DONE
3699 CEFBS_HasVIS, // EDGE16
3700 CEFBS_HasVIS, // EDGE16L
3701 CEFBS_HasVIS2, // EDGE16LN
3702 CEFBS_HasVIS2, // EDGE16N
3703 CEFBS_HasVIS, // EDGE32
3704 CEFBS_HasVIS, // EDGE32L
3705 CEFBS_HasVIS2, // EDGE32LN
3706 CEFBS_HasVIS2, // EDGE32N
3707 CEFBS_HasVIS, // EDGE8
3708 CEFBS_HasVIS, // EDGE8L
3709 CEFBS_HasVIS2, // EDGE8LN
3710 CEFBS_HasVIS2, // EDGE8N
3711 CEFBS_HasV9, // FABSD
3712 CEFBS_HasV9, // FABSQ
3713 CEFBS_None, // FABSS
3714 CEFBS_None, // FADDD
3715 CEFBS_None, // FADDQ
3716 CEFBS_None, // FADDS
3717 CEFBS_HasVIS, // FALIGNADATA
3718 CEFBS_HasVIS, // FAND
3719 CEFBS_HasVIS, // FANDNOT1
3720 CEFBS_HasVIS, // FANDNOT1S
3721 CEFBS_HasVIS, // FANDNOT2
3722 CEFBS_HasVIS, // FANDNOT2S
3723 CEFBS_HasVIS, // FANDS
3724 CEFBS_None, // FBCOND
3725 CEFBS_None, // FBCONDA
3726 CEFBS_HasV9, // FBCONDA_V9
3727 CEFBS_HasV9, // FBCOND_V9
3728 CEFBS_HasVIS3, // FCHKSM16
3729 CEFBS_None, // FCMPD
3730 CEFBS_HasV9, // FCMPD_V9
3731 CEFBS_HasVIS, // FCMPEQ16
3732 CEFBS_HasVIS, // FCMPEQ32
3733 CEFBS_HasVIS, // FCMPGT16
3734 CEFBS_HasVIS, // FCMPGT32
3735 CEFBS_HasVIS, // FCMPLE16
3736 CEFBS_HasVIS, // FCMPLE32
3737 CEFBS_HasVIS, // FCMPNE16
3738 CEFBS_HasVIS, // FCMPNE32
3739 CEFBS_None, // FCMPQ
3740 CEFBS_HasV9, // FCMPQ_V9
3741 CEFBS_None, // FCMPS
3742 CEFBS_HasV9, // FCMPS_V9
3743 CEFBS_None, // FDIVD
3744 CEFBS_None, // FDIVQ
3745 CEFBS_None, // FDIVS
3746 CEFBS_None, // FDMULQ
3747 CEFBS_None, // FDTOI
3748 CEFBS_None, // FDTOQ
3749 CEFBS_None, // FDTOS
3750 CEFBS_HasV9, // FDTOX
3751 CEFBS_HasVIS, // FEXPAND
3752 CEFBS_HasVIS3, // FHADDD
3753 CEFBS_HasVIS3, // FHADDS
3754 CEFBS_HasVIS3, // FHSUBD
3755 CEFBS_HasVIS3, // FHSUBS
3756 CEFBS_None, // FITOD
3757 CEFBS_None, // FITOQ
3758 CEFBS_None, // FITOS
3759 CEFBS_HasVIS3, // FLCMPD
3760 CEFBS_HasVIS3, // FLCMPS
3761 CEFBS_None, // FLUSH
3762 CEFBS_HasV9, // FLUSHW
3763 CEFBS_None, // FLUSHri
3764 CEFBS_None, // FLUSHrr
3765 CEFBS_HasUA2007, // FMADDD
3766 CEFBS_HasUA2007, // FMADDS
3767 CEFBS_HasVIS3, // FMEAN16
3768 CEFBS_HasV9, // FMOVD
3769 CEFBS_HasV9, // FMOVD_FCC
3770 CEFBS_HasV9, // FMOVD_ICC
3771 CEFBS_Is64Bit, // FMOVD_XCC
3772 CEFBS_HasV9, // FMOVQ
3773 CEFBS_HasV9, // FMOVQ_FCC
3774 CEFBS_HasV9, // FMOVQ_ICC
3775 CEFBS_Is64Bit, // FMOVQ_XCC
3776 CEFBS_HasV9, // FMOVRD
3777 CEFBS_HasV9, // FMOVRQ
3778 CEFBS_HasV9, // FMOVRS
3779 CEFBS_None, // FMOVS
3780 CEFBS_HasV9, // FMOVS_FCC
3781 CEFBS_HasV9, // FMOVS_ICC
3782 CEFBS_Is64Bit, // FMOVS_XCC
3783 CEFBS_HasUA2007, // FMSUBD
3784 CEFBS_HasUA2007, // FMSUBS
3785 CEFBS_HasVIS, // FMUL8SUX16
3786 CEFBS_HasVIS, // FMUL8ULX16
3787 CEFBS_HasVIS, // FMUL8X16
3788 CEFBS_HasVIS, // FMUL8X16AL
3789 CEFBS_HasVIS, // FMUL8X16AU
3790 CEFBS_None, // FMULD
3791 CEFBS_HasVIS, // FMULD8SUX16
3792 CEFBS_HasVIS, // FMULD8ULX16
3793 CEFBS_None, // FMULQ
3794 CEFBS_None, // FMULS
3795 CEFBS_HasVIS3, // FNADDD
3796 CEFBS_HasVIS3, // FNADDS
3797 CEFBS_HasVIS, // FNAND
3798 CEFBS_HasVIS, // FNANDS
3799 CEFBS_HasV9, // FNEGD
3800 CEFBS_HasV9, // FNEGQ
3801 CEFBS_None, // FNEGS
3802 CEFBS_HasVIS3, // FNHADDD
3803 CEFBS_HasVIS3, // FNHADDS
3804 CEFBS_HasUA2007, // FNMADDD
3805 CEFBS_HasUA2007, // FNMADDS
3806 CEFBS_HasUA2007, // FNMSUBD
3807 CEFBS_HasUA2007, // FNMSUBS
3808 CEFBS_HasVIS3, // FNMULD
3809 CEFBS_HasVIS3, // FNMULS
3810 CEFBS_HasVIS, // FNOR
3811 CEFBS_HasVIS, // FNORS
3812 CEFBS_HasVIS, // FNOT1
3813 CEFBS_HasVIS, // FNOT1S
3814 CEFBS_HasVIS, // FNOT2
3815 CEFBS_HasVIS, // FNOT2S
3816 CEFBS_HasVIS3, // FNSMULD
3817 CEFBS_HasVIS, // FONE
3818 CEFBS_HasVIS, // FONES
3819 CEFBS_HasVIS, // FOR
3820 CEFBS_HasVIS, // FORNOT1
3821 CEFBS_HasVIS, // FORNOT1S
3822 CEFBS_HasVIS, // FORNOT2
3823 CEFBS_HasVIS, // FORNOT2S
3824 CEFBS_HasVIS, // FORS
3825 CEFBS_HasVIS, // FPACK16
3826 CEFBS_HasVIS, // FPACK32
3827 CEFBS_HasVIS, // FPACKFIX
3828 CEFBS_HasVIS, // FPADD16
3829 CEFBS_HasVIS, // FPADD16S
3830 CEFBS_HasVIS, // FPADD32
3831 CEFBS_HasVIS, // FPADD32S
3832 CEFBS_HasVIS3, // FPADD64
3833 CEFBS_HasOSA2011, // FPMADDX
3834 CEFBS_HasOSA2011, // FPMADDXHI
3835 CEFBS_HasVIS, // FPMERGE
3836 CEFBS_HasVIS, // FPSUB16
3837 CEFBS_HasVIS, // FPSUB16S
3838 CEFBS_HasVIS, // FPSUB32
3839 CEFBS_HasVIS, // FPSUB32S
3840 CEFBS_None, // FQTOD
3841 CEFBS_None, // FQTOI
3842 CEFBS_None, // FQTOS
3843 CEFBS_HasV9, // FQTOX
3844 CEFBS_HasVIS3, // FSLAS16
3845 CEFBS_HasVIS3, // FSLAS32
3846 CEFBS_HasVIS3, // FSLL16
3847 CEFBS_HasVIS3, // FSLL32
3848 CEFBS_None, // FSMULD
3849 CEFBS_None, // FSQRTD
3850 CEFBS_None, // FSQRTQ
3851 CEFBS_None, // FSQRTS
3852 CEFBS_HasVIS3, // FSRA16
3853 CEFBS_HasVIS3, // FSRA32
3854 CEFBS_HasVIS, // FSRC1
3855 CEFBS_HasVIS, // FSRC1S
3856 CEFBS_HasVIS, // FSRC2
3857 CEFBS_HasVIS, // FSRC2S
3858 CEFBS_HasVIS3, // FSRL16
3859 CEFBS_HasVIS3, // FSRL32
3860 CEFBS_None, // FSTOD
3861 CEFBS_None, // FSTOI
3862 CEFBS_None, // FSTOQ
3863 CEFBS_HasV9, // FSTOX
3864 CEFBS_None, // FSUBD
3865 CEFBS_None, // FSUBQ
3866 CEFBS_None, // FSUBS
3867 CEFBS_HasVIS, // FXNOR
3868 CEFBS_HasVIS, // FXNORS
3869 CEFBS_HasVIS, // FXOR
3870 CEFBS_HasVIS, // FXORS
3871 CEFBS_HasV9, // FXTOD
3872 CEFBS_HasV9, // FXTOQ
3873 CEFBS_HasV9, // FXTOS
3874 CEFBS_HasVIS, // FZERO
3875 CEFBS_HasVIS, // FZEROS
3876 CEFBS_HasV9, // GDOP_LDXrr
3877 CEFBS_None, // GDOP_LDrr
3878 CEFBS_HasUA2005, // INVALW
3879 CEFBS_None, // JMPLri
3880 CEFBS_None, // JMPLrr
3881 CEFBS_HasV9, // LDAri
3882 CEFBS_None, // LDArr
3883 CEFBS_None, // LDCSRri
3884 CEFBS_None, // LDCSRrr
3885 CEFBS_None, // LDCri
3886 CEFBS_None, // LDCrr
3887 CEFBS_HasV9, // LDDAri
3888 CEFBS_None, // LDDArr
3889 CEFBS_None, // LDDCri
3890 CEFBS_None, // LDDCrr
3891 CEFBS_HasV9, // LDDFAri
3892 CEFBS_HasV9, // LDDFArr
3893 CEFBS_None, // LDDFri
3894 CEFBS_None, // LDDFrr
3895 CEFBS_None, // LDDri
3896 CEFBS_None, // LDDrr
3897 CEFBS_HasV9, // LDFAri
3898 CEFBS_HasV9, // LDFArr
3899 CEFBS_None, // LDFSRri
3900 CEFBS_None, // LDFSRrr
3901 CEFBS_None, // LDFri
3902 CEFBS_None, // LDFrr
3903 CEFBS_HasV9, // LDQFAri
3904 CEFBS_HasV9, // LDQFArr
3905 CEFBS_HasV9, // LDQFri
3906 CEFBS_HasV9, // LDQFrr
3907 CEFBS_HasV9, // LDSBAri
3908 CEFBS_None, // LDSBArr
3909 CEFBS_None, // LDSBri
3910 CEFBS_None, // LDSBrr
3911 CEFBS_HasV9, // LDSHAri
3912 CEFBS_None, // LDSHArr
3913 CEFBS_None, // LDSHri
3914 CEFBS_None, // LDSHrr
3915 CEFBS_HasV9, // LDSTUBAri
3916 CEFBS_None, // LDSTUBArr
3917 CEFBS_None, // LDSTUBri
3918 CEFBS_None, // LDSTUBrr
3919 CEFBS_HasV9, // LDSWAri
3920 CEFBS_HasV9, // LDSWArr
3921 CEFBS_HasV9, // LDSWri
3922 CEFBS_HasV9, // LDSWrr
3923 CEFBS_HasV9, // LDUBAri
3924 CEFBS_None, // LDUBArr
3925 CEFBS_None, // LDUBri
3926 CEFBS_None, // LDUBrr
3927 CEFBS_HasV9, // LDUHAri
3928 CEFBS_None, // LDUHArr
3929 CEFBS_None, // LDUHri
3930 CEFBS_None, // LDUHrr
3931 CEFBS_HasV9, // LDXAri
3932 CEFBS_HasV9, // LDXArr
3933 CEFBS_HasV9, // LDXFSRri
3934 CEFBS_HasV9, // LDXFSRrr
3935 CEFBS_HasV9, // LDXri
3936 CEFBS_HasV9, // LDXrr
3937 CEFBS_None, // LDri
3938 CEFBS_None, // LDrr
3939 CEFBS_HasVIS3, // LZCNT
3940 CEFBS_HasCrypto, // MD5
3941 CEFBS_HasV9, // MEMBARi
3942 CEFBS_HasCrypto, // MONTMUL
3943 CEFBS_HasCrypto, // MONTSQR
3944 CEFBS_HasVIS3, // MOVDTOX
3945 CEFBS_HasV9, // MOVFCCri
3946 CEFBS_HasV9, // MOVFCCrr
3947 CEFBS_HasV9, // MOVICCri
3948 CEFBS_HasV9, // MOVICCrr
3949 CEFBS_HasV9, // MOVRri
3950 CEFBS_HasV9, // MOVRrr
3951 CEFBS_HasVIS3, // MOVSTOSW
3952 CEFBS_HasVIS3, // MOVSTOUW
3953 CEFBS_HasVIS3, // MOVWTOS
3954 CEFBS_Is64Bit, // MOVXCCri
3955 CEFBS_Is64Bit, // MOVXCCrr
3956 CEFBS_HasVIS3, // MOVXTOD
3957 CEFBS_HasCrypto, // MPMUL
3958 CEFBS_None, // MULSCCri
3959 CEFBS_None, // MULSCCrr
3960 CEFBS_HasV9, // MULXri
3961 CEFBS_HasV9, // MULXrr
3962 CEFBS_None, // NOP
3963 CEFBS_HasUA2005, // NORMALW
3964 CEFBS_None, // ORCCri
3965 CEFBS_None, // ORCCrr
3966 CEFBS_None, // ORNCCri
3967 CEFBS_None, // ORNCCrr
3968 CEFBS_None, // ORNri
3969 CEFBS_None, // ORNrr
3970 CEFBS_None, // ORri
3971 CEFBS_None, // ORrr
3972 CEFBS_HasUA2005, // OTHERW
3973 CEFBS_HasVIS, // PDIST
3974 CEFBS_HasVIS3, // PDISTN
3975 CEFBS_HasV9, // POPCrr
3976 CEFBS_HasV9, // PREFETCHAi
3977 CEFBS_HasV9, // PREFETCHAr
3978 CEFBS_HasV9, // PREFETCHi
3979 CEFBS_HasV9, // PREFETCHr
3980 CEFBS_HasPWRPSR, // PWRPSRri
3981 CEFBS_HasPWRPSR, // PWRPSRrr
3982 CEFBS_None, // RDASR
3983 CEFBS_HasV9, // RDFQ
3984 CEFBS_HasV9, // RDPR
3985 CEFBS_None, // RDPSR
3986 CEFBS_None, // RDTBR
3987 CEFBS_None, // RDWIM
3988 CEFBS_HasV9, // RESTORED
3989 CEFBS_None, // RESTOREri
3990 CEFBS_None, // RESTORErr
3991 CEFBS_None, // RET
3992 CEFBS_None, // RETL
3993 CEFBS_HasV9, // RETRY
3994 CEFBS_None, // RETTri
3995 CEFBS_None, // RETTrr
3996 CEFBS_HasV9, // SAVED
3997 CEFBS_None, // SAVEri
3998 CEFBS_None, // SAVErr
3999 CEFBS_None, // SDIVCCri
4000 CEFBS_None, // SDIVCCrr
4001 CEFBS_HasV9, // SDIVXri
4002 CEFBS_HasV9, // SDIVXrr
4003 CEFBS_None, // SDIVri
4004 CEFBS_None, // SDIVrr
4005 CEFBS_None, // SETHIi
4006 CEFBS_HasCrypto, // SHA1
4007 CEFBS_HasCrypto, // SHA256
4008 CEFBS_HasCrypto, // SHA512
4009 CEFBS_HasVIS, // SHUTDOWN
4010 CEFBS_HasVIS2, // SIAM
4011 CEFBS_HasV9, // SIR
4012 CEFBS_HasV9, // SLLXri
4013 CEFBS_HasV9, // SLLXrr
4014 CEFBS_None, // SLLri
4015 CEFBS_None, // SLLrr
4016 CEFBS_None, // SMACri
4017 CEFBS_None, // SMACrr
4018 CEFBS_None, // SMULCCri
4019 CEFBS_None, // SMULCCrr
4020 CEFBS_None, // SMULri
4021 CEFBS_None, // SMULrr
4022 CEFBS_HasV9, // SRAXri
4023 CEFBS_HasV9, // SRAXrr
4024 CEFBS_None, // SRAri
4025 CEFBS_None, // SRArr
4026 CEFBS_HasV9, // SRLXri
4027 CEFBS_HasV9, // SRLXrr
4028 CEFBS_None, // SRLri
4029 CEFBS_None, // SRLrr
4030 CEFBS_HasV9, // STAri
4031 CEFBS_None, // STArr
4032 CEFBS_None, // STBAR
4033 CEFBS_HasV9, // STBAri
4034 CEFBS_None, // STBArr
4035 CEFBS_None, // STBri
4036 CEFBS_None, // STBrr
4037 CEFBS_None, // STCSRri
4038 CEFBS_None, // STCSRrr
4039 CEFBS_None, // STCri
4040 CEFBS_None, // STCrr
4041 CEFBS_HasV9, // STDAri
4042 CEFBS_None, // STDArr
4043 CEFBS_None, // STDCQri
4044 CEFBS_None, // STDCQrr
4045 CEFBS_None, // STDCri
4046 CEFBS_None, // STDCrr
4047 CEFBS_HasV9, // STDFAri
4048 CEFBS_HasV9, // STDFArr
4049 CEFBS_None, // STDFQri
4050 CEFBS_None, // STDFQrr
4051 CEFBS_None, // STDFri
4052 CEFBS_None, // STDFrr
4053 CEFBS_None, // STDri
4054 CEFBS_None, // STDrr
4055 CEFBS_HasV9, // STFAri
4056 CEFBS_HasV9, // STFArr
4057 CEFBS_None, // STFSRri
4058 CEFBS_None, // STFSRrr
4059 CEFBS_None, // STFri
4060 CEFBS_None, // STFrr
4061 CEFBS_HasV9, // STHAri
4062 CEFBS_None, // STHArr
4063 CEFBS_None, // STHri
4064 CEFBS_None, // STHrr
4065 CEFBS_HasV9, // STQFAri
4066 CEFBS_HasV9, // STQFArr
4067 CEFBS_HasV9, // STQFri
4068 CEFBS_HasV9, // STQFrr
4069 CEFBS_HasV9, // STXAri
4070 CEFBS_HasV9, // STXArr
4071 CEFBS_HasV9, // STXFSRri
4072 CEFBS_HasV9, // STXFSRrr
4073 CEFBS_HasV9, // STXri
4074 CEFBS_HasV9, // STXrr
4075 CEFBS_None, // STri
4076 CEFBS_None, // STrr
4077 CEFBS_None, // SUBCCri
4078 CEFBS_None, // SUBCCrr
4079 CEFBS_None, // SUBCri
4080 CEFBS_None, // SUBCrr
4081 CEFBS_None, // SUBEri
4082 CEFBS_None, // SUBErr
4083 CEFBS_None, // SUBri
4084 CEFBS_None, // SUBrr
4085 CEFBS_HasV9, // SWAPAri
4086 CEFBS_None, // SWAPArr
4087 CEFBS_None, // SWAPri
4088 CEFBS_None, // SWAPrr
4089 CEFBS_None, // TA1
4090 CEFBS_None, // TA3
4091 CEFBS_None, // TA5
4092 CEFBS_None, // TADDCCTVri
4093 CEFBS_None, // TADDCCTVrr
4094 CEFBS_None, // TADDCCri
4095 CEFBS_None, // TADDCCrr
4096 CEFBS_None, // TAIL_CALL
4097 CEFBS_None, // TAIL_CALLri
4098 CEFBS_HasV9, // TICCri
4099 CEFBS_HasV9, // TICCrr
4100 CEFBS_None, // TLS_ADDrr
4101 CEFBS_None, // TLS_CALL
4102 CEFBS_HasV9, // TLS_LDXrr
4103 CEFBS_None, // TLS_LDrr
4104 CEFBS_None, // TRAPri
4105 CEFBS_None, // TRAPrr
4106 CEFBS_None, // TSUBCCTVri
4107 CEFBS_None, // TSUBCCTVrr
4108 CEFBS_None, // TSUBCCri
4109 CEFBS_None, // TSUBCCrr
4110 CEFBS_Is64Bit, // TXCCri
4111 CEFBS_Is64Bit, // TXCCrr
4112 CEFBS_None, // UDIVCCri
4113 CEFBS_None, // UDIVCCrr
4114 CEFBS_HasV9, // UDIVXri
4115 CEFBS_HasV9, // UDIVXrr
4116 CEFBS_None, // UDIVri
4117 CEFBS_None, // UDIVrr
4118 CEFBS_None, // UMACri
4119 CEFBS_None, // UMACrr
4120 CEFBS_None, // UMULCCri
4121 CEFBS_None, // UMULCCrr
4122 CEFBS_HasVIS3, // UMULXHI
4123 CEFBS_None, // UMULri
4124 CEFBS_None, // UMULrr
4125 CEFBS_None, // UNIMP
4126 CEFBS_None, // V9FCMPD
4127 CEFBS_None, // V9FCMPED
4128 CEFBS_None, // V9FCMPEQ
4129 CEFBS_None, // V9FCMPES
4130 CEFBS_None, // V9FCMPQ
4131 CEFBS_None, // V9FCMPS
4132 CEFBS_HasV9, // V9FMOVD_FCC
4133 CEFBS_HasV9, // V9FMOVQ_FCC
4134 CEFBS_HasV9, // V9FMOVS_FCC
4135 CEFBS_HasV9, // V9MOVFCCri
4136 CEFBS_HasV9, // V9MOVFCCrr
4137 CEFBS_None, // WRASRri
4138 CEFBS_None, // WRASRrr
4139 CEFBS_HasV9, // WRPRri
4140 CEFBS_HasV9, // WRPRrr
4141 CEFBS_None, // WRPSRri
4142 CEFBS_None, // WRPSRrr
4143 CEFBS_None, // WRTBRri
4144 CEFBS_None, // WRTBRrr
4145 CEFBS_None, // WRWIMri
4146 CEFBS_None, // WRWIMrr
4147 CEFBS_HasVIS3, // XMULX
4148 CEFBS_HasVIS3, // XMULXHI
4149 CEFBS_None, // XNORCCri
4150 CEFBS_None, // XNORCCrr
4151 CEFBS_None, // XNORri
4152 CEFBS_None, // XNORrr
4153 CEFBS_None, // XORCCri
4154 CEFBS_None, // XORCCrr
4155 CEFBS_None, // XORri
4156 CEFBS_None, // XORrr
4157 };
4158
4159 assert(Opcode < 894);
4160 return FeatureBitsets[RequiredFeaturesRefs[Opcode]];
4161}
4162
4163
4164} // namespace llvm::Sparc_MC
4165
4166#endif // GET_COMPUTE_FEATURES
4167
4168#ifdef GET_AVAILABLE_OPCODE_CHECKER
4169#undef GET_AVAILABLE_OPCODE_CHECKER
4170
4171namespace llvm::Sparc_MC {
4172
4173bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) {
4174 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
4175 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
4176 FeatureBitset MissingFeatures =
4177 (AvailableFeatures & RequiredFeatures) ^
4178 RequiredFeatures;
4179 return !MissingFeatures.any();
4180}
4181
4182} // namespace llvm::Sparc_MC
4183
4184#endif // GET_AVAILABLE_OPCODE_CHECKER
4185
4186#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
4187#undef ENABLE_INSTR_PREDICATE_VERIFIER
4188
4189#include <sstream>
4190
4191namespace llvm::Sparc_MC {
4192
4193#ifndef NDEBUG
4194static const char *SubtargetFeatureNames[] = {
4195 "Feature_HasCASA",
4196 "Feature_HasCrypto",
4197 "Feature_HasOSA2011",
4198 "Feature_HasPWRPSR",
4199 "Feature_HasUA2005",
4200 "Feature_HasUA2007",
4201 "Feature_HasV9",
4202 "Feature_HasVIS",
4203 "Feature_HasVIS2",
4204 "Feature_HasVIS3",
4205 "Feature_Is32Bit",
4206 "Feature_Is64Bit",
4207 "Feature_UseSoftMulDiv",
4208 nullptr
4209};
4210
4211#endif // NDEBUG
4212
4213void verifyInstructionPredicates(
4214 unsigned Opcode, const FeatureBitset &Features) {
4215#ifndef NDEBUG
4216 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
4217 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
4218 FeatureBitset MissingFeatures =
4219 (AvailableFeatures & RequiredFeatures) ^
4220 RequiredFeatures;
4221 if (MissingFeatures.any()) {
4222 std::ostringstream Msg;
4223 Msg << "Attempting to emit " << &SparcInstrNameData[SparcInstrNameIndices[Opcode]]
4224 << " instruction but the ";
4225 for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
4226 if (MissingFeatures.test(i))
4227 Msg << SubtargetFeatureNames[i] << " ";
4228 Msg << "predicate(s) are not met";
4229 report_fatal_error(Msg.str().c_str());
4230 }
4231#endif // NDEBUG
4232}
4233
4234} // namespace llvm::Sparc_MC
4235
4236#endif // ENABLE_INSTR_PREDICATE_VERIFIER
4237
4238