| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Register Information Header Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 10 | |
| 11 | namespace llvm { |
| 12 | |
| 13 | class SparcFrameLowering; |
| 14 | |
| 15 | extern const MCRegisterClassStorage<20, 317, 405, 42, 11, 15> SparcMCRegisterClassStorage; |
| 16 | |
| 17 | struct SparcGenRegisterInfo : public TargetRegisterInfo { |
| 18 | explicit SparcGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0, |
| 19 | unsigned PC = 0, unsigned HwMode = 0); |
| 20 | unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 21 | unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 22 | LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 23 | LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 24 | const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override; |
| 25 | const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override; |
| 26 | const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override; |
| 27 | unsigned getRegUnitWeight(MCRegUnit RegUnit) const override; |
| 28 | unsigned getNumRegPressureSets() const override; |
| 29 | const char *getRegPressureSetName(unsigned Idx) const override; |
| 30 | unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override; |
| 31 | const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override; |
| 32 | const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override; |
| 33 | ArrayRef<const char *> getRegMaskNames() const override; |
| 34 | ArrayRef<const uint32_t *> getRegMasks() const override; |
| 35 | bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override; |
| 36 | bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override; |
| 37 | bool isFixedRegister(const MachineFunction &, MCRegister) const override; |
| 38 | bool isArgumentRegister(const MachineFunction &, MCRegister) const override; |
| 39 | bool isConstantPhysReg(MCRegister PhysReg) const override final; |
| 40 | /// Devirtualized TargetFrameLowering. |
| 41 | static const SparcFrameLowering *getFrameLowering( |
| 42 | const MachineFunction &MF); |
| 43 | const TargetRegisterClass *getMinimalPhysRegClass(MCRegister Reg) const override; |
| 44 | }; |
| 45 | |
| 46 | namespace SP { |
| 47 | |
| 48 | // Register classes |
| 49 | static constexpr const TargetRegisterClass &FCCRegsRegClass = SparcMCRegisterClassStorage.Classes[0]; |
| 50 | static constexpr const TargetRegisterClass &ASRRegsRegClass = SparcMCRegisterClassStorage.Classes[1]; |
| 51 | static constexpr const TargetRegisterClass &CoprocRegsRegClass = SparcMCRegisterClassStorage.Classes[2]; |
| 52 | static constexpr const TargetRegisterClass &FPRegsRegClass = SparcMCRegisterClassStorage.Classes[3]; |
| 53 | static constexpr const TargetRegisterClass &IntRegsRegClass = SparcMCRegisterClassStorage.Classes[4]; |
| 54 | static constexpr const TargetRegisterClass &GPRIncomingArgRegClass = SparcMCRegisterClassStorage.Classes[5]; |
| 55 | static constexpr const TargetRegisterClass &GPROutgoingArgRegClass = SparcMCRegisterClassStorage.Classes[6]; |
| 56 | static constexpr const TargetRegisterClass &DFPRegsRegClass = SparcMCRegisterClassStorage.Classes[7]; |
| 57 | static constexpr const TargetRegisterClass &I64RegsRegClass = SparcMCRegisterClassStorage.Classes[8]; |
| 58 | static constexpr const TargetRegisterClass &PRRegsRegClass = SparcMCRegisterClassStorage.Classes[9]; |
| 59 | static constexpr const TargetRegisterClass &CoprocPairRegClass = SparcMCRegisterClassStorage.Classes[10]; |
| 60 | static constexpr const TargetRegisterClass &IntPairRegClass = SparcMCRegisterClassStorage.Classes[11]; |
| 61 | static constexpr const TargetRegisterClass &LowDFPRegsRegClass = SparcMCRegisterClassStorage.Classes[12]; |
| 62 | static constexpr const TargetRegisterClass &I64Regs_and_GPRIncomingArgRegClass = SparcMCRegisterClassStorage.Classes[13]; |
| 63 | static constexpr const TargetRegisterClass &I64Regs_and_GPROutgoingArgRegClass = SparcMCRegisterClassStorage.Classes[14]; |
| 64 | static constexpr const TargetRegisterClass &IntPair_with_sub_even_in_GPRIncomingArgRegClass = SparcMCRegisterClassStorage.Classes[15]; |
| 65 | static constexpr const TargetRegisterClass &IntPair_with_sub_even_in_GPROutgoingArgRegClass = SparcMCRegisterClassStorage.Classes[16]; |
| 66 | static constexpr const TargetRegisterClass &PRRegs_and_ASRRegsRegClass = SparcMCRegisterClassStorage.Classes[17]; |
| 67 | static constexpr const TargetRegisterClass &QFPRegsRegClass = SparcMCRegisterClassStorage.Classes[18]; |
| 68 | static constexpr const TargetRegisterClass &LowQFPRegsRegClass = SparcMCRegisterClassStorage.Classes[19]; |
| 69 | |
| 70 | } // namespace SP |
| 71 | |
| 72 | } // namespace llvm |
| 73 | |