| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
|---|---|
| 2 | |* *| |
| 3 | |* * SystemZ Disassembler *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | |
| 10 | #include "llvm/MC/MCInst.h" |
| 11 | #include "llvm/MC/MCSubtargetInfo.h" |
| 12 | #include "llvm/Support/DataTypes.h" |
| 13 | #include "llvm/Support/Debug.h" |
| 14 | #include "llvm/Support/LEB128.h" |
| 15 | #include "llvm/Support/raw_ostream.h" |
| 16 | #include "llvm/TargetParser/SubtargetFeature.h" |
| 17 | #include <assert.h> |
| 18 | |
| 19 | namespace { |
| 20 | |
| 21 | // InsnBitWidth is essentially a type trait used by the decoder emitter to query |
| 22 | // the supported bitwidth for a given type. But default, the value is 0, making |
| 23 | // it an invalid type for use as `InsnType` when instantiating the decoder. |
| 24 | // Individual targets are expected to provide specializations for these based |
| 25 | // on their usage. |
| 26 | template <typename T> constexpr uint32_t InsnBitWidth = 0; |
| 27 | |
| 28 | static const uint8_t DecoderTable16[532] = { |
| 29 | OPC_SwitchField, 8, 8, // 0: switch Inst[15:8] { |
| 30 | 1, 64, // 3: case 0x1: { |
| 31 | OPC_SwitchField, 0, 8, // 5: switch Inst[7:0] { |
| 32 | 1, 4, // 8: case 0x1: { |
| 33 | OPC_Decode, 155, 16, 0, // 10: decode to PR using decoder 0 |
| 34 | // 10: } |
| 35 | 2, 4, // 14: case 0x2: { |
| 36 | OPC_Decode, 173, 19, 0, // 16: decode to UPT using decoder 0 |
| 37 | // 16: } |
| 38 | 4, 4, // 20: case 0x4: { |
| 39 | OPC_Decode, 159, 16, 0, // 22: decode to PTFF using decoder 0 |
| 40 | // 22: } |
| 41 | 7, 4, // 26: case 0x7: { |
| 42 | OPC_Decode, 210, 16, 0, // 28: decode to SCKPF using decoder 0 |
| 43 | // 28: } |
| 44 | 10, 4, // 32: case 0xa: { |
| 45 | OPC_Decode, 145, 16, 0, // 34: decode to PFPO using decoder 0 |
| 46 | // 34: } |
| 47 | 11, 4, // 38: case 0xb: { |
| 48 | OPC_Decode, 247, 18, 0, // 40: decode to TAM using decoder 0 |
| 49 | // 40: } |
| 50 | 12, 4, // 44: case 0xc: { |
| 51 | OPC_Decode, 202, 16, 0, // 46: decode to SAM24 using decoder 0 |
| 52 | // 46: } |
| 53 | 13, 4, // 50: case 0xd: { |
| 54 | OPC_Decode, 203, 16, 0, // 52: decode to SAM31 using decoder 0 |
| 55 | // 52: } |
| 56 | 14, 4, // 56: case 0xe: { |
| 57 | OPC_Decode, 204, 16, 0, // 58: decode to SAM64 using decoder 0 |
| 58 | // 58: } |
| 59 | 255, 1, 0, // 62: case 0xff: { |
| 60 | OPC_Decode, 151, 19, 0, // 65: decode to TRAP2 using decoder 0 |
| 61 | // 65: } |
| 62 | // 65: } // switch Inst[7:0] |
| 63 | // 65: } |
| 64 | 4, 8, // 69: case 0x4: { |
| 65 | OPC_CheckField, 0, 4, 0, // 71: check Inst[3:0] == 0x0 |
| 66 | OPC_Decode, 205, 17, 1, // 75: decode to SPM using decoder 1 |
| 67 | // 75: } |
| 68 | 5, 4, // 79: case 0x5: { |
| 69 | OPC_Decode, 241, 4, 2, // 81: decode to BALR using decoder 2 |
| 70 | // 81: } |
| 71 | 6, 4, // 85: case 0x6: { |
| 72 | OPC_Decode, 144, 5, 3, // 87: decode to BCTR using decoder 3 |
| 73 | // 87: } |
| 74 | 7, 115, // 91: case 0x7: { |
| 75 | OPC_Scope, 8, // 93: try { |
| 76 | OPC_CheckField, 0, 8, 0, // 95: check Inst[7:0] == 0x0 |
| 77 | OPC_Decode, 236, 15, 0, // 99: decode to NOPROpt using decoder 0 |
| 78 | OPC_Scope, 99, // 103: } else try { |
| 79 | OPC_SwitchField, 4, 4, // 105: switch Inst[7:4] { |
| 80 | 0, 4, // 108: case 0x0: { |
| 81 | OPC_Decode, 235, 15, 4, // 110: decode to NOPR using decoder 4 |
| 82 | // 110: } |
| 83 | 1, 4, // 114: case 0x1: { |
| 84 | OPC_Decode, 192, 5, 5, // 116: decode to BRAsmO using decoder 5 |
| 85 | // 116: } |
| 86 | 2, 4, // 120: case 0x2: { |
| 87 | OPC_Decode, 176, 5, 5, // 122: decode to BRAsmH using decoder 5 |
| 88 | // 122: } |
| 89 | 3, 4, // 126: case 0x3: { |
| 90 | OPC_Decode, 186, 5, 5, // 128: decode to BRAsmNLE using decoder 5 |
| 91 | // 128: } |
| 92 | 4, 4, // 132: case 0x4: { |
| 93 | OPC_Decode, 178, 5, 5, // 134: decode to BRAsmL using decoder 5 |
| 94 | // 134: } |
| 95 | 5, 4, // 138: case 0x5: { |
| 96 | OPC_Decode, 184, 5, 5, // 140: decode to BRAsmNHE using decoder 5 |
| 97 | // 140: } |
| 98 | 6, 4, // 144: case 0x6: { |
| 99 | OPC_Decode, 180, 5, 5, // 146: decode to BRAsmLH using decoder 5 |
| 100 | // 146: } |
| 101 | 7, 4, // 150: case 0x7: { |
| 102 | OPC_Decode, 182, 5, 5, // 152: decode to BRAsmNE using decoder 5 |
| 103 | // 152: } |
| 104 | 8, 4, // 156: case 0x8: { |
| 105 | OPC_Decode, 175, 5, 5, // 158: decode to BRAsmE using decoder 5 |
| 106 | // 158: } |
| 107 | 9, 4, // 162: case 0x9: { |
| 108 | OPC_Decode, 187, 5, 5, // 164: decode to BRAsmNLH using decoder 5 |
| 109 | // 164: } |
| 110 | 10, 4, // 168: case 0xa: { |
| 111 | OPC_Decode, 177, 5, 5, // 170: decode to BRAsmHE using decoder 5 |
| 112 | // 170: } |
| 113 | 11, 4, // 174: case 0xb: { |
| 114 | OPC_Decode, 185, 5, 5, // 176: decode to BRAsmNL using decoder 5 |
| 115 | // 176: } |
| 116 | 12, 4, // 180: case 0xc: { |
| 117 | OPC_Decode, 179, 5, 5, // 182: decode to BRAsmLE using decoder 5 |
| 118 | // 182: } |
| 119 | 13, 4, // 186: case 0xd: { |
| 120 | OPC_Decode, 183, 5, 5, // 188: decode to BRAsmNH using decoder 5 |
| 121 | // 188: } |
| 122 | 14, 4, // 192: case 0xe: { |
| 123 | OPC_Decode, 189, 5, 5, // 194: decode to BRAsmNO using decoder 5 |
| 124 | // 194: } |
| 125 | 15, 0, // 198: case 0xf: { |
| 126 | OPC_Decode, 172, 5, 5, // 200: decode to BR using decoder 5 |
| 127 | // 200: } |
| 128 | // 200: } // switch Inst[7:4] |
| 129 | // 200: } else try { |
| 130 | OPC_Decode, 140, 5, 6, // 204: decode to BCRAsm using decoder 6 |
| 131 | // 204: } |
| 132 | // 204: } |
| 133 | 10, 4, // 208: case 0xa: { |
| 134 | OPC_Decode, 238, 18, 7, // 210: decode to SVC using decoder 7 |
| 135 | // 210: } |
| 136 | 11, 4, // 214: case 0xb: { |
| 137 | OPC_Decode, 208, 5, 2, // 216: decode to BSM using decoder 2 |
| 138 | // 216: } |
| 139 | 12, 4, // 220: case 0xc: { |
| 140 | OPC_Decode, 244, 4, 2, // 222: decode to BASSM using decoder 2 |
| 141 | // 222: } |
| 142 | 13, 4, // 226: case 0xd: { |
| 143 | OPC_Decode, 243, 4, 2, // 228: decode to BASR using decoder 2 |
| 144 | // 228: } |
| 145 | 14, 4, // 232: case 0xe: { |
| 146 | OPC_Decode, 181, 15, 8, // 234: decode to MVCL using decoder 8 |
| 147 | // 234: } |
| 148 | 15, 4, // 238: case 0xf: { |
| 149 | OPC_Decode, 176, 7, 8, // 240: decode to CLCL using decoder 8 |
| 150 | // 240: } |
| 151 | 16, 4, // 244: case 0x10: { |
| 152 | OPC_Decode, 178, 14, 9, // 246: decode to LPR using decoder 9 |
| 153 | // 246: } |
| 154 | 17, 4, // 250: case 0x11: { |
| 155 | OPC_Decode, 219, 12, 9, // 252: decode to LNR using decoder 9 |
| 156 | // 252: } |
| 157 | 18, 4, // 256: case 0x12: { |
| 158 | OPC_Decode, 208, 14, 9, // 258: decode to LTR using decoder 9 |
| 159 | // 258: } |
| 160 | 19, 4, // 262: case 0x13: { |
| 161 | OPC_Decode, 240, 11, 9, // 264: decode to LCR using decoder 9 |
| 162 | // 264: } |
| 163 | 20, 4, // 268: case 0x14: { |
| 164 | OPC_Decode, 240, 15, 10, // 270: decode to NR using decoder 10 |
| 165 | // 270: } |
| 166 | 21, 4, // 274: case 0x15: { |
| 167 | OPC_Decode, 223, 8, 9, // 276: decode to CLR using decoder 9 |
| 168 | // 276: } |
| 169 | 22, 4, // 280: case 0x16: { |
| 170 | OPC_Decode, 133, 16, 10, // 282: decode to OR using decoder 10 |
| 171 | // 282: } |
| 172 | 23, 4, // 286: case 0x17: { |
| 173 | OPC_Decode, 222, 25, 10, // 288: decode to XR using decoder 10 |
| 174 | // 288: } |
| 175 | 24, 4, // 292: case 0x18: { |
| 176 | OPC_Decode, 185, 14, 9, // 294: decode to LR using decoder 9 |
| 177 | // 294: } |
| 178 | 25, 4, // 298: case 0x19: { |
| 179 | OPC_Decode, 170, 9, 9, // 300: decode to CR using decoder 9 |
| 180 | // 300: } |
| 181 | 26, 4, // 304: case 0x1a: { |
| 182 | OPC_Decode, 226, 4, 10, // 306: decode to AR using decoder 10 |
| 183 | // 306: } |
| 184 | 27, 4, // 310: case 0x1b: { |
| 185 | OPC_Decode, 218, 17, 10, // 312: decode to SR using decoder 10 |
| 186 | // 312: } |
| 187 | 28, 4, // 316: case 0x1c: { |
| 188 | OPC_Decode, 153, 15, 11, // 318: decode to MR using decoder 11 |
| 189 | // 318: } |
| 190 | 29, 4, // 322: case 0x1d: { |
| 191 | OPC_Decode, 164, 10, 11, // 324: decode to DR using decoder 11 |
| 192 | // 324: } |
| 193 | 30, 4, // 328: case 0x1e: { |
| 194 | OPC_Decode, 219, 4, 10, // 330: decode to ALR using decoder 10 |
| 195 | // 330: } |
| 196 | 31, 4, // 334: case 0x1f: { |
| 197 | OPC_Decode, 197, 17, 10, // 336: decode to SLR using decoder 10 |
| 198 | // 336: } |
| 199 | 32, 4, // 340: case 0x20: { |
| 200 | OPC_Decode, 171, 14, 12, // 342: decode to LPDR using decoder 12 |
| 201 | // 342: } |
| 202 | 33, 4, // 346: case 0x21: { |
| 203 | OPC_Decode, 214, 12, 12, // 348: decode to LNDR using decoder 12 |
| 204 | // 348: } |
| 205 | 34, 4, // 352: case 0x22: { |
| 206 | OPC_Decode, 200, 14, 12, // 354: decode to LTDR using decoder 12 |
| 207 | // 354: } |
| 208 | 35, 4, // 358: case 0x23: { |
| 209 | OPC_Decode, 235, 11, 12, // 360: decode to LCDR using decoder 12 |
| 210 | // 360: } |
| 211 | 36, 4, // 364: case 0x24: { |
| 212 | OPC_Decode, 210, 10, 12, // 366: decode to HDR using decoder 12 |
| 213 | // 366: } |
| 214 | 37, 4, // 370: case 0x25: { |
| 215 | OPC_Decode, 130, 12, 13, // 372: decode to LDXR using decoder 13 |
| 216 | // 372: } |
| 217 | 38, 4, // 376: case 0x26: { |
| 218 | OPC_Decode, 204, 15, 14, // 378: decode to MXR using decoder 14 |
| 219 | // 378: } |
| 220 | 39, 4, // 382: case 0x27: { |
| 221 | OPC_Decode, 203, 15, 15, // 384: decode to MXDR using decoder 15 |
| 222 | // 384: } |
| 223 | 40, 4, // 388: case 0x28: { |
| 224 | OPC_Decode, 253, 11, 12, // 390: decode to LDR using decoder 12 |
| 225 | // 390: } |
| 226 | 41, 4, // 394: case 0x29: { |
| 227 | OPC_Decode, 234, 5, 12, // 396: decode to CDR using decoder 12 |
| 228 | // 396: } |
| 229 | 42, 4, // 400: case 0x2a: { |
| 230 | OPC_Decode, 177, 4, 16, // 402: decode to ADR using decoder 16 |
| 231 | // 402: } |
| 232 | 43, 4, // 406: case 0x2b: { |
| 233 | OPC_Decode, 214, 16, 16, // 408: decode to SDR using decoder 16 |
| 234 | // 408: } |
| 235 | 44, 4, // 412: case 0x2c: { |
| 236 | OPC_Decode, 131, 15, 16, // 414: decode to MDR using decoder 16 |
| 237 | // 414: } |
| 238 | 45, 4, // 418: case 0x2d: { |
| 239 | OPC_Decode, 148, 10, 16, // 420: decode to DDR using decoder 16 |
| 240 | // 420: } |
| 241 | 46, 4, // 424: case 0x2e: { |
| 242 | OPC_Decode, 232, 4, 16, // 426: decode to AWR using decoder 16 |
| 243 | // 426: } |
| 244 | 47, 4, // 430: case 0x2f: { |
| 245 | OPC_Decode, 240, 18, 16, // 432: decode to SWR using decoder 16 |
| 246 | // 432: } |
| 247 | 48, 4, // 436: case 0x30: { |
| 248 | OPC_Decode, 173, 14, 17, // 438: decode to LPER using decoder 17 |
| 249 | // 438: } |
| 250 | 49, 4, // 442: case 0x31: { |
| 251 | OPC_Decode, 216, 12, 17, // 444: decode to LNER using decoder 17 |
| 252 | // 444: } |
| 253 | 50, 4, // 448: case 0x32: { |
| 254 | OPC_Decode, 203, 14, 17, // 450: decode to LTER using decoder 17 |
| 255 | // 450: } |
| 256 | 51, 4, // 454: case 0x33: { |
| 257 | OPC_Decode, 237, 11, 17, // 456: decode to LCER using decoder 17 |
| 258 | // 456: } |
| 259 | 52, 4, // 460: case 0x34: { |
| 260 | OPC_Decode, 211, 10, 17, // 462: decode to HER using decoder 17 |
| 261 | // 462: } |
| 262 | 53, 4, // 466: case 0x35: { |
| 263 | OPC_Decode, 138, 12, 18, // 468: decode to LEDR using decoder 18 |
| 264 | // 468: } |
| 265 | 54, 4, // 472: case 0x36: { |
| 266 | OPC_Decode, 234, 4, 14, // 474: decode to AXR using decoder 14 |
| 267 | // 474: } |
| 268 | 55, 4, // 478: case 0x37: { |
| 269 | OPC_Decode, 242, 18, 14, // 480: decode to SXR using decoder 14 |
| 270 | // 480: } |
| 271 | 56, 4, // 484: case 0x38: { |
| 272 | OPC_Decode, 140, 12, 17, // 486: decode to LER using decoder 17 |
| 273 | // 486: } |
| 274 | 57, 4, // 490: case 0x39: { |
| 275 | OPC_Decode, 254, 5, 17, // 492: decode to CER using decoder 17 |
| 276 | // 492: } |
| 277 | 58, 4, // 496: case 0x3a: { |
| 278 | OPC_Decode, 183, 4, 19, // 498: decode to AER using decoder 19 |
| 279 | // 498: } |
| 280 | 59, 4, // 502: case 0x3b: { |
| 281 | OPC_Decode, 158, 17, 19, // 504: decode to SER using decoder 19 |
| 282 | // 504: } |
| 283 | 60, 4, // 508: case 0x3c: { |
| 284 | OPC_Decode, 130, 15, 20, // 510: decode to MDER using decoder 20 |
| 285 | // 510: } |
| 286 | 61, 4, // 514: case 0x3d: { |
| 287 | OPC_Decode, 154, 10, 19, // 516: decode to DER using decoder 19 |
| 288 | // 516: } |
| 289 | 62, 4, // 520: case 0x3e: { |
| 290 | OPC_Decode, 230, 4, 19, // 522: decode to AUR using decoder 19 |
| 291 | // 522: } |
| 292 | 63, 0, // 526: case 0x3f: { |
| 293 | OPC_Decode, 237, 18, 19, // 528: decode to SUR using decoder 19 |
| 294 | // 528: } |
| 295 | // 528: } // switch Inst[15:8] |
| 296 | }; |
| 297 | static const uint8_t DecoderTable32[7104] = { |
| 298 | OPC_SwitchField, 24, 8, // 0: switch Inst[31:24] { |
| 299 | 64, 4, // 3: case 0x40: { |
| 300 | OPC_Decode, 146, 18, 21, // 5: decode to STH using decoder 21 |
| 301 | // 5: } |
| 302 | 65, 4, // 9: case 0x41: { |
| 303 | OPC_Decode, 206, 11, 22, // 11: decode to LA using decoder 22 |
| 304 | // 11: } |
| 305 | 66, 4, // 15: case 0x42: { |
| 306 | OPC_Decode, 247, 17, 21, // 17: decode to STC using decoder 21 |
| 307 | // 17: } |
| 308 | 67, 4, // 21: case 0x43: { |
| 309 | OPC_Decode, 214, 10, 23, // 23: decode to IC using decoder 23 |
| 310 | // 23: } |
| 311 | 68, 4, // 27: case 0x44: { |
| 312 | OPC_Decode, 196, 10, 24, // 29: decode to EX using decoder 24 |
| 313 | // 29: } |
| 314 | 69, 4, // 33: case 0x45: { |
| 315 | OPC_Decode, 240, 4, 22, // 35: decode to BAL using decoder 22 |
| 316 | // 35: } |
| 317 | 70, 4, // 39: case 0x46: { |
| 318 | OPC_Decode, 141, 5, 25, // 41: decode to BCT using decoder 25 |
| 319 | // 41: } |
| 320 | 71, 115, // 45: case 0x47: { |
| 321 | OPC_Scope, 8, // 47: try { |
| 322 | OPC_CheckField, 0, 24, 0, // 49: check Inst[23:0] == 0x0 |
| 323 | OPC_Decode, 234, 15, 0, // 53: decode to NOPOpt using decoder 0 |
| 324 | OPC_Scope, 99, // 57: } else try { |
| 325 | OPC_SwitchField, 20, 4, // 59: switch Inst[23:20] { |
| 326 | 0, 4, // 62: case 0x0: { |
| 327 | OPC_Decode, 233, 15, 26, // 64: decode to NOP using decoder 26 |
| 328 | // 64: } |
| 329 | 1, 4, // 68: case 0x1: { |
| 330 | OPC_Decode, 134, 5, 26, // 70: decode to BAsmO using decoder 26 |
| 331 | // 70: } |
| 332 | 2, 4, // 74: case 0x2: { |
| 333 | OPC_Decode, 246, 4, 26, // 76: decode to BAsmH using decoder 26 |
| 334 | // 76: } |
| 335 | 3, 4, // 80: case 0x3: { |
| 336 | OPC_Decode, 128, 5, 26, // 82: decode to BAsmNLE using decoder 26 |
| 337 | // 82: } |
| 338 | 4, 4, // 86: case 0x4: { |
| 339 | OPC_Decode, 248, 4, 26, // 88: decode to BAsmL using decoder 26 |
| 340 | // 88: } |
| 341 | 5, 4, // 92: case 0x5: { |
| 342 | OPC_Decode, 254, 4, 26, // 94: decode to BAsmNHE using decoder 26 |
| 343 | // 94: } |
| 344 | 6, 4, // 98: case 0x6: { |
| 345 | OPC_Decode, 250, 4, 26, // 100: decode to BAsmLH using decoder 26 |
| 346 | // 100: } |
| 347 | 7, 4, // 104: case 0x7: { |
| 348 | OPC_Decode, 252, 4, 26, // 106: decode to BAsmNE using decoder 26 |
| 349 | // 106: } |
| 350 | 8, 4, // 110: case 0x8: { |
| 351 | OPC_Decode, 245, 4, 26, // 112: decode to BAsmE using decoder 26 |
| 352 | // 112: } |
| 353 | 9, 4, // 116: case 0x9: { |
| 354 | OPC_Decode, 129, 5, 26, // 118: decode to BAsmNLH using decoder 26 |
| 355 | // 118: } |
| 356 | 10, 4, // 122: case 0xa: { |
| 357 | OPC_Decode, 247, 4, 26, // 124: decode to BAsmHE using decoder 26 |
| 358 | // 124: } |
| 359 | 11, 4, // 128: case 0xb: { |
| 360 | OPC_Decode, 255, 4, 26, // 130: decode to BAsmNL using decoder 26 |
| 361 | // 130: } |
| 362 | 12, 4, // 134: case 0xc: { |
| 363 | OPC_Decode, 249, 4, 26, // 136: decode to BAsmLE using decoder 26 |
| 364 | // 136: } |
| 365 | 13, 4, // 140: case 0xd: { |
| 366 | OPC_Decode, 253, 4, 26, // 142: decode to BAsmNH using decoder 26 |
| 367 | // 142: } |
| 368 | 14, 4, // 146: case 0xe: { |
| 369 | OPC_Decode, 131, 5, 26, // 148: decode to BAsmNO using decoder 26 |
| 370 | // 148: } |
| 371 | 15, 0, // 152: case 0xf: { |
| 372 | OPC_Decode, 238, 4, 26, // 154: decode to B using decoder 26 |
| 373 | // 154: } |
| 374 | // 154: } // switch Inst[23:20] |
| 375 | // 154: } else try { |
| 376 | OPC_Decode, 138, 5, 27, // 158: decode to BCAsm using decoder 27 |
| 377 | // 158: } |
| 378 | // 158: } |
| 379 | 72, 4, // 162: case 0x48: { |
| 380 | OPC_Decode, 167, 12, 21, // 164: decode to LH using decoder 21 |
| 381 | // 164: } |
| 382 | 73, 4, // 168: case 0x49: { |
| 383 | OPC_Decode, 249, 6, 21, // 170: decode to CH using decoder 21 |
| 384 | // 170: } |
| 385 | 74, 4, // 174: case 0x4a: { |
| 386 | OPC_Decode, 195, 4, 25, // 176: decode to AH using decoder 25 |
| 387 | // 176: } |
| 388 | 75, 4, // 180: case 0x4b: { |
| 389 | OPC_Decode, 167, 17, 25, // 182: decode to SH using decoder 25 |
| 390 | // 182: } |
| 391 | 76, 4, // 186: case 0x4c: { |
| 392 | OPC_Decode, 145, 15, 25, // 188: decode to MH using decoder 25 |
| 393 | // 188: } |
| 394 | 77, 4, // 192: case 0x4d: { |
| 395 | OPC_Decode, 242, 4, 22, // 194: decode to BAS using decoder 22 |
| 396 | // 194: } |
| 397 | 78, 4, // 198: case 0x4e: { |
| 398 | OPC_Decode, 246, 9, 21, // 200: decode to CVD using decoder 21 |
| 399 | // 200: } |
| 400 | 79, 4, // 204: case 0x4f: { |
| 401 | OPC_Decode, 243, 9, 25, // 206: decode to CVB using decoder 25 |
| 402 | // 206: } |
| 403 | 80, 4, // 210: case 0x50: { |
| 404 | OPC_Decode, 242, 17, 21, // 212: decode to ST using decoder 21 |
| 405 | // 212: } |
| 406 | 81, 4, // 216: case 0x51: { |
| 407 | OPC_Decode, 211, 11, 22, // 218: decode to LAE using decoder 22 |
| 408 | // 218: } |
| 409 | 84, 4, // 222: case 0x54: { |
| 410 | OPC_Decode, 213, 15, 25, // 224: decode to N using decoder 25 |
| 411 | // 224: } |
| 412 | 85, 4, // 228: case 0x55: { |
| 413 | OPC_Decode, 174, 7, 21, // 230: decode to CL using decoder 21 |
| 414 | // 230: } |
| 415 | 86, 4, // 234: case 0x56: { |
| 416 | OPC_Decode, 246, 15, 25, // 236: decode to O using decoder 25 |
| 417 | // 236: } |
| 418 | 87, 4, // 240: case 0x57: { |
| 419 | OPC_Decode, 213, 25, 25, // 242: decode to X using decoder 25 |
| 420 | // 242: } |
| 421 | 88, 4, // 246: case 0x58: { |
| 422 | OPC_Decode, 205, 11, 21, // 248: decode to L using decoder 21 |
| 423 | // 248: } |
| 424 | 89, 4, // 252: case 0x59: { |
| 425 | OPC_Decode, 213, 5, 21, // 254: decode to C using decoder 21 |
| 426 | // 254: } |
| 427 | 90, 4, // 258: case 0x5a: { |
| 428 | OPC_Decode, 173, 4, 25, // 260: decode to A using decoder 25 |
| 429 | // 260: } |
| 430 | 91, 4, // 264: case 0x5b: { |
| 431 | OPC_Decode, 198, 16, 25, // 266: decode to S using decoder 25 |
| 432 | // 266: } |
| 433 | 92, 4, // 270: case 0x5c: { |
| 434 | OPC_Decode, 236, 14, 28, // 272: decode to M using decoder 28 |
| 435 | // 272: } |
| 436 | 93, 4, // 276: case 0x5d: { |
| 437 | OPC_Decode, 144, 10, 28, // 278: decode to D using decoder 28 |
| 438 | // 278: } |
| 439 | 94, 4, // 282: case 0x5e: { |
| 440 | OPC_Decode, 202, 4, 25, // 284: decode to AL using decoder 25 |
| 441 | // 284: } |
| 442 | 95, 4, // 288: case 0x5f: { |
| 443 | OPC_Decode, 174, 17, 25, // 290: decode to SL using decoder 25 |
| 444 | // 290: } |
| 445 | 96, 4, // 294: case 0x60: { |
| 446 | OPC_Decode, 133, 18, 29, // 296: decode to STD using decoder 29 |
| 447 | // 296: } |
| 448 | 103, 4, // 300: case 0x67: { |
| 449 | OPC_Decode, 200, 15, 30, // 302: decode to MXD using decoder 30 |
| 450 | // 302: } |
| 451 | 104, 4, // 306: case 0x68: { |
| 452 | OPC_Decode, 245, 11, 29, // 308: decode to LD using decoder 29 |
| 453 | // 308: } |
| 454 | 105, 4, // 312: case 0x69: { |
| 455 | OPC_Decode, 217, 5, 29, // 314: decode to CD using decoder 29 |
| 456 | // 314: } |
| 457 | 106, 4, // 318: case 0x6a: { |
| 458 | OPC_Decode, 174, 4, 31, // 320: decode to AD using decoder 31 |
| 459 | // 320: } |
| 460 | 107, 4, // 324: case 0x6b: { |
| 461 | OPC_Decode, 211, 16, 31, // 326: decode to SD using decoder 31 |
| 462 | // 326: } |
| 463 | 108, 4, // 330: case 0x6c: { |
| 464 | OPC_Decode, 252, 14, 31, // 332: decode to MD using decoder 31 |
| 465 | // 332: } |
| 466 | 109, 4, // 336: case 0x6d: { |
| 467 | OPC_Decode, 145, 10, 31, // 338: decode to DD using decoder 31 |
| 468 | // 338: } |
| 469 | 110, 4, // 342: case 0x6e: { |
| 470 | OPC_Decode, 231, 4, 31, // 344: decode to AW using decoder 31 |
| 471 | // 344: } |
| 472 | 111, 4, // 348: case 0x6f: { |
| 473 | OPC_Decode, 239, 18, 31, // 350: decode to SW using decoder 31 |
| 474 | // 350: } |
| 475 | 112, 4, // 354: case 0x70: { |
| 476 | OPC_Decode, 135, 18, 32, // 356: decode to STE using decoder 32 |
| 477 | // 356: } |
| 478 | 113, 4, // 360: case 0x71: { |
| 479 | OPC_Decode, 154, 15, 25, // 362: decode to MS using decoder 25 |
| 480 | // 362: } |
| 481 | 120, 4, // 366: case 0x78: { |
| 482 | OPC_Decode, 133, 12, 32, // 368: decode to LE using decoder 32 |
| 483 | // 368: } |
| 484 | 121, 4, // 372: case 0x79: { |
| 485 | OPC_Decode, 242, 5, 32, // 374: decode to CE using decoder 32 |
| 486 | // 374: } |
| 487 | 122, 4, // 378: case 0x7a: { |
| 488 | OPC_Decode, 180, 4, 33, // 380: decode to AE using decoder 33 |
| 489 | // 380: } |
| 490 | 123, 4, // 384: case 0x7b: { |
| 491 | OPC_Decode, 217, 16, 33, // 386: decode to SE using decoder 33 |
| 492 | // 386: } |
| 493 | 124, 4, // 390: case 0x7c: { |
| 494 | OPC_Decode, 255, 14, 31, // 392: decode to MDE using decoder 31 |
| 495 | // 392: } |
| 496 | 125, 4, // 396: case 0x7d: { |
| 497 | OPC_Decode, 151, 10, 33, // 398: decode to DE using decoder 33 |
| 498 | // 398: } |
| 499 | 126, 4, // 402: case 0x7e: { |
| 500 | OPC_Decode, 229, 4, 33, // 404: decode to AU using decoder 33 |
| 501 | // 404: } |
| 502 | 127, 4, // 408: case 0x7f: { |
| 503 | OPC_Decode, 236, 18, 33, // 410: decode to SU using decoder 33 |
| 504 | // 410: } |
| 505 | 128, 1, 8, // 414: case 0x80: { |
| 506 | OPC_CheckField, 16, 8, 0, // 417: check Inst[23:16] == 0x0 |
| 507 | OPC_Decode, 241, 17, 34, // 421: decode to SSM using decoder 34 |
| 508 | // 421: } |
| 509 | 130, 1, 8, // 425: case 0x82: { |
| 510 | OPC_CheckField, 16, 8, 0, // 428: check Inst[23:16] == 0x0 |
| 511 | OPC_Decode, 179, 14, 34, // 432: decode to LPSW using decoder 34 |
| 512 | // 432: } |
| 513 | 131, 1, 4, // 436: case 0x83: { |
| 514 | OPC_Decode, 156, 10, 35, // 439: decode to DIAG using decoder 35 |
| 515 | // 439: } |
| 516 | 132, 1, 4, // 443: case 0x84: { |
| 517 | OPC_Decode, 202, 5, 36, // 446: decode to BRXH using decoder 36 |
| 518 | // 446: } |
| 519 | 133, 1, 4, // 450: case 0x85: { |
| 520 | OPC_Decode, 204, 5, 36, // 453: decode to BRXLE using decoder 36 |
| 521 | // 453: } |
| 522 | 134, 1, 4, // 457: case 0x86: { |
| 523 | OPC_Decode, 209, 5, 37, // 460: decode to BXH using decoder 37 |
| 524 | // 460: } |
| 525 | 135, 1, 4, // 464: case 0x87: { |
| 526 | OPC_Decode, 211, 5, 37, // 467: decode to BXLE using decoder 37 |
| 527 | // 467: } |
| 528 | 136, 1, 8, // 471: case 0x88: { |
| 529 | OPC_CheckField, 16, 4, 0, // 474: check Inst[19:16] == 0x0 |
| 530 | OPC_Decode, 226, 17, 38, // 478: decode to SRL using decoder 38 |
| 531 | // 478: } |
| 532 | 137, 1, 8, // 482: case 0x89: { |
| 533 | OPC_CheckField, 16, 4, 0, // 485: check Inst[19:16] == 0x0 |
| 534 | OPC_Decode, 194, 17, 38, // 489: decode to SLL using decoder 38 |
| 535 | // 489: } |
| 536 | 138, 1, 8, // 493: case 0x8a: { |
| 537 | OPC_CheckField, 16, 4, 0, // 496: check Inst[19:16] == 0x0 |
| 538 | OPC_Decode, 219, 17, 38, // 500: decode to SRA using decoder 38 |
| 539 | // 500: } |
| 540 | 139, 1, 8, // 504: case 0x8b: { |
| 541 | OPC_CheckField, 16, 4, 0, // 507: check Inst[19:16] == 0x0 |
| 542 | OPC_Decode, 175, 17, 38, // 511: decode to SLA using decoder 38 |
| 543 | // 511: } |
| 544 | 140, 1, 8, // 515: case 0x8c: { |
| 545 | OPC_CheckField, 16, 4, 0, // 518: check Inst[19:16] == 0x0 |
| 546 | OPC_Decode, 223, 17, 39, // 522: decode to SRDL using decoder 39 |
| 547 | // 522: } |
| 548 | 141, 1, 8, // 526: case 0x8d: { |
| 549 | OPC_CheckField, 16, 4, 0, // 529: check Inst[19:16] == 0x0 |
| 550 | OPC_Decode, 183, 17, 39, // 533: decode to SLDL using decoder 39 |
| 551 | // 533: } |
| 552 | 142, 1, 8, // 537: case 0x8e: { |
| 553 | OPC_CheckField, 16, 4, 0, // 540: check Inst[19:16] == 0x0 |
| 554 | OPC_Decode, 222, 17, 39, // 544: decode to SRDA using decoder 39 |
| 555 | // 544: } |
| 556 | 143, 1, 8, // 548: case 0x8f: { |
| 557 | OPC_CheckField, 16, 4, 0, // 551: check Inst[19:16] == 0x0 |
| 558 | OPC_Decode, 182, 17, 39, // 555: decode to SLDA using decoder 39 |
| 559 | // 555: } |
| 560 | 144, 1, 4, // 559: case 0x90: { |
| 561 | OPC_Decode, 151, 18, 35, // 562: decode to STM using decoder 35 |
| 562 | // 562: } |
| 563 | 145, 1, 4, // 566: case 0x91: { |
| 564 | OPC_Decode, 138, 19, 40, // 569: decode to TM using decoder 40 |
| 565 | // 569: } |
| 566 | 146, 1, 4, // 573: case 0x92: { |
| 567 | OPC_Decode, 192, 15, 40, // 576: decode to MVI using decoder 40 |
| 568 | // 576: } |
| 569 | 147, 1, 8, // 580: case 0x93: { |
| 570 | OPC_CheckField, 16, 8, 0, // 583: check Inst[23:16] == 0x0 |
| 571 | OPC_Decode, 168, 19, 34, // 587: decode to TS using decoder 34 |
| 572 | // 587: } |
| 573 | 148, 1, 4, // 591: case 0x94: { |
| 574 | OPC_Decode, 220, 15, 40, // 594: decode to NI using decoder 40 |
| 575 | // 594: } |
| 576 | 149, 1, 4, // 598: case 0x95: { |
| 577 | OPC_Decode, 189, 8, 40, // 601: decode to CLI using decoder 40 |
| 578 | // 601: } |
| 579 | 150, 1, 4, // 605: case 0x96: { |
| 580 | OPC_Decode, 253, 15, 40, // 608: decode to OI using decoder 40 |
| 581 | // 608: } |
| 582 | 151, 1, 4, // 612: case 0x97: { |
| 583 | OPC_Decode, 218, 25, 40, // 615: decode to XI using decoder 40 |
| 584 | // 615: } |
| 585 | 152, 1, 4, // 619: case 0x98: { |
| 586 | OPC_Decode, 205, 12, 35, // 622: decode to LM using decoder 35 |
| 587 | // 622: } |
| 588 | 153, 1, 4, // 626: case 0x99: { |
| 589 | OPC_Decode, 149, 19, 35, // 629: decode to TRACE using decoder 35 |
| 590 | // 629: } |
| 591 | 154, 1, 4, // 633: case 0x9a: { |
| 592 | OPC_Decode, 213, 11, 41, // 636: decode to LAM using decoder 41 |
| 593 | // 636: } |
| 594 | 155, 1, 4, // 640: case 0x9b: { |
| 595 | OPC_Decode, 243, 17, 41, // 643: decode to STAM using decoder 41 |
| 596 | // 643: } |
| 597 | 165, 1, 99, // 647: case 0xa5: { |
| 598 | OPC_SwitchField, 16, 4, // 650: switch Inst[19:16] { |
| 599 | 0, 4, // 653: case 0x0: { |
| 600 | OPC_Decode, 226, 10, 42, // 655: decode to IIHH using decoder 42 |
| 601 | // 655: } |
| 602 | 1, 4, // 659: case 0x1: { |
| 603 | OPC_Decode, 227, 10, 42, // 661: decode to IIHL using decoder 42 |
| 604 | // 661: } |
| 605 | 2, 4, // 665: case 0x2: { |
| 606 | OPC_Decode, 229, 10, 43, // 667: decode to IILH using decoder 43 |
| 607 | // 667: } |
| 608 | 3, 4, // 671: case 0x3: { |
| 609 | OPC_Decode, 230, 10, 43, // 673: decode to IILL using decoder 43 |
| 610 | // 673: } |
| 611 | 4, 4, // 677: case 0x4: { |
| 612 | OPC_Decode, 223, 15, 42, // 679: decode to NIHH using decoder 42 |
| 613 | // 679: } |
| 614 | 5, 4, // 683: case 0x5: { |
| 615 | OPC_Decode, 224, 15, 42, // 685: decode to NIHL using decoder 42 |
| 616 | // 685: } |
| 617 | 6, 4, // 689: case 0x6: { |
| 618 | OPC_Decode, 226, 15, 43, // 691: decode to NILH using decoder 43 |
| 619 | // 691: } |
| 620 | 7, 4, // 695: case 0x7: { |
| 621 | OPC_Decode, 227, 15, 43, // 697: decode to NILL using decoder 43 |
| 622 | // 697: } |
| 623 | 8, 4, // 701: case 0x8: { |
| 624 | OPC_Decode, 255, 15, 42, // 703: decode to OIHH using decoder 42 |
| 625 | // 703: } |
| 626 | 9, 4, // 707: case 0x9: { |
| 627 | OPC_Decode, 128, 16, 42, // 709: decode to OIHL using decoder 42 |
| 628 | // 709: } |
| 629 | 10, 4, // 713: case 0xa: { |
| 630 | OPC_Decode, 130, 16, 43, // 715: decode to OILH using decoder 43 |
| 631 | // 715: } |
| 632 | 11, 4, // 719: case 0xb: { |
| 633 | OPC_Decode, 131, 16, 43, // 721: decode to OILL using decoder 43 |
| 634 | // 721: } |
| 635 | 12, 4, // 725: case 0xc: { |
| 636 | OPC_Decode, 194, 12, 44, // 727: decode to LLIHH using decoder 44 |
| 637 | // 727: } |
| 638 | 13, 4, // 731: case 0xd: { |
| 639 | OPC_Decode, 195, 12, 44, // 733: decode to LLIHL using decoder 44 |
| 640 | // 733: } |
| 641 | 14, 4, // 737: case 0xe: { |
| 642 | OPC_Decode, 197, 12, 44, // 739: decode to LLILH using decoder 44 |
| 643 | // 739: } |
| 644 | 15, 0, // 743: case 0xf: { |
| 645 | OPC_Decode, 198, 12, 44, // 745: decode to LLILL using decoder 44 |
| 646 | // 745: } |
| 647 | // 745: } // switch Inst[19:16] |
| 648 | // 745: } |
| 649 | 167, 1, 200, 1, // 749: case 0xa7: { |
| 650 | OPC_SwitchField, 16, 4, // 753: switch Inst[19:16] { |
| 651 | 0, 4, // 756: case 0x0: { |
| 652 | OPC_Decode, 141, 19, 45, // 758: decode to TMLH using decoder 45 |
| 653 | // 758: } |
| 654 | 1, 4, // 762: case 0x1: { |
| 655 | OPC_Decode, 142, 19, 45, // 764: decode to TMLL using decoder 45 |
| 656 | // 764: } |
| 657 | 2, 4, // 768: case 0x2: { |
| 658 | OPC_Decode, 139, 19, 46, // 770: decode to TMHH using decoder 46 |
| 659 | // 770: } |
| 660 | 3, 4, // 774: case 0x3: { |
| 661 | OPC_Decode, 140, 19, 46, // 776: decode to TMHL using decoder 46 |
| 662 | // 776: } |
| 663 | 4, 105, // 780: case 0x4: { |
| 664 | OPC_Scope, 99, // 782: try { |
| 665 | OPC_SwitchField, 20, 4, // 784: switch Inst[23:20] { |
| 666 | 0, 4, // 787: case 0x0: { |
| 667 | OPC_Decode, 185, 11, 47, // 789: decode to JNOP using decoder 47 |
| 668 | // 789: } |
| 669 | 1, 4, // 793: case 0x1: { |
| 670 | OPC_Decode, 160, 11, 47, // 795: decode to JAsmO using decoder 47 |
| 671 | // 795: } |
| 672 | 2, 4, // 799: case 0x2: { |
| 673 | OPC_Decode, 144, 11, 47, // 801: decode to JAsmH using decoder 47 |
| 674 | // 801: } |
| 675 | 3, 4, // 805: case 0x3: { |
| 676 | OPC_Decode, 154, 11, 47, // 807: decode to JAsmNLE using decoder 47 |
| 677 | // 807: } |
| 678 | 4, 4, // 811: case 0x4: { |
| 679 | OPC_Decode, 146, 11, 47, // 813: decode to JAsmL using decoder 47 |
| 680 | // 813: } |
| 681 | 5, 4, // 817: case 0x5: { |
| 682 | OPC_Decode, 152, 11, 47, // 819: decode to JAsmNHE using decoder 47 |
| 683 | // 819: } |
| 684 | 6, 4, // 823: case 0x6: { |
| 685 | OPC_Decode, 148, 11, 47, // 825: decode to JAsmLH using decoder 47 |
| 686 | // 825: } |
| 687 | 7, 4, // 829: case 0x7: { |
| 688 | OPC_Decode, 150, 11, 47, // 831: decode to JAsmNE using decoder 47 |
| 689 | // 831: } |
| 690 | 8, 4, // 835: case 0x8: { |
| 691 | OPC_Decode, 143, 11, 47, // 837: decode to JAsmE using decoder 47 |
| 692 | // 837: } |
| 693 | 9, 4, // 841: case 0x9: { |
| 694 | OPC_Decode, 155, 11, 47, // 843: decode to JAsmNLH using decoder 47 |
| 695 | // 843: } |
| 696 | 10, 4, // 847: case 0xa: { |
| 697 | OPC_Decode, 145, 11, 47, // 849: decode to JAsmHE using decoder 47 |
| 698 | // 849: } |
| 699 | 11, 4, // 853: case 0xb: { |
| 700 | OPC_Decode, 153, 11, 47, // 855: decode to JAsmNL using decoder 47 |
| 701 | // 855: } |
| 702 | 12, 4, // 859: case 0xc: { |
| 703 | OPC_Decode, 147, 11, 47, // 861: decode to JAsmLE using decoder 47 |
| 704 | // 861: } |
| 705 | 13, 4, // 865: case 0xd: { |
| 706 | OPC_Decode, 151, 11, 47, // 867: decode to JAsmNH using decoder 47 |
| 707 | // 867: } |
| 708 | 14, 4, // 871: case 0xe: { |
| 709 | OPC_Decode, 157, 11, 47, // 873: decode to JAsmNO using decoder 47 |
| 710 | // 873: } |
| 711 | 15, 0, // 877: case 0xf: { |
| 712 | OPC_Decode, 142, 11, 47, // 879: decode to J using decoder 47 |
| 713 | // 879: } |
| 714 | // 879: } // switch Inst[23:20] |
| 715 | // 879: } else try { |
| 716 | OPC_Decode, 196, 5, 48, // 883: decode to BRCAsm using decoder 48 |
| 717 | // 883: } |
| 718 | // 883: } |
| 719 | 5, 4, // 887: case 0x5: { |
| 720 | OPC_Decode, 173, 5, 49, // 889: decode to BRAS using decoder 49 |
| 721 | // 889: } |
| 722 | 6, 4, // 893: case 0x6: { |
| 723 | OPC_Decode, 199, 5, 50, // 895: decode to BRCT using decoder 50 |
| 724 | // 895: } |
| 725 | 7, 4, // 899: case 0x7: { |
| 726 | OPC_Decode, 200, 5, 51, // 901: decode to BRCTG using decoder 51 |
| 727 | // 901: } |
| 728 | 8, 4, // 905: case 0x8: { |
| 729 | OPC_Decode, 169, 12, 52, // 907: decode to LHI using decoder 52 |
| 730 | // 907: } |
| 731 | 9, 4, // 911: case 0x9: { |
| 732 | OPC_Decode, 161, 12, 53, // 913: decode to LGHI using decoder 53 |
| 733 | // 913: } |
| 734 | 10, 4, // 917: case 0xa: { |
| 735 | OPC_Decode, 198, 4, 54, // 919: decode to AHI using decoder 54 |
| 736 | // 919: } |
| 737 | 11, 4, // 923: case 0xb: { |
| 738 | OPC_Decode, 190, 4, 55, // 925: decode to AGHI using decoder 55 |
| 739 | // 925: } |
| 740 | 12, 4, // 929: case 0xc: { |
| 741 | OPC_Decode, 146, 15, 54, // 931: decode to MHI using decoder 54 |
| 742 | // 931: } |
| 743 | 13, 4, // 935: case 0xd: { |
| 744 | OPC_Decode, 143, 15, 55, // 937: decode to MGHI using decoder 55 |
| 745 | // 937: } |
| 746 | 14, 4, // 941: case 0xe: { |
| 747 | OPC_Decode, 253, 6, 52, // 943: decode to CHI using decoder 52 |
| 748 | // 943: } |
| 749 | 15, 0, // 947: case 0xf: { |
| 750 | OPC_Decode, 155, 6, 53, // 949: decode to CGHI using decoder 53 |
| 751 | // 949: } |
| 752 | // 949: } // switch Inst[19:16] |
| 753 | // 949: } |
| 754 | 168, 1, 4, // 953: case 0xa8: { |
| 755 | OPC_Decode, 182, 15, 56, // 956: decode to MVCLE using decoder 56 |
| 756 | // 956: } |
| 757 | 169, 1, 4, // 960: case 0xa9: { |
| 758 | OPC_Decode, 177, 7, 56, // 963: decode to CLCLE using decoder 56 |
| 759 | // 963: } |
| 760 | 172, 1, 4, // 967: case 0xac: { |
| 761 | OPC_Decode, 155, 18, 40, // 970: decode to STNSM using decoder 40 |
| 762 | // 970: } |
| 763 | 173, 1, 4, // 974: case 0xad: { |
| 764 | OPC_Decode, 222, 18, 40, // 977: decode to STOSM using decoder 40 |
| 765 | // 977: } |
| 766 | 174, 1, 4, // 981: case 0xae: { |
| 767 | OPC_Decode, 173, 17, 57, // 984: decode to SIGP using decoder 57 |
| 768 | // 984: } |
| 769 | 175, 1, 4, // 988: case 0xaf: { |
| 770 | OPC_Decode, 251, 14, 40, // 991: decode to MC using decoder 40 |
| 771 | // 991: } |
| 772 | 177, 1, 4, // 995: case 0xb1: { |
| 773 | OPC_Decode, 186, 14, 22, // 998: decode to LRA using decoder 22 |
| 774 | // 998: } |
| 775 | 178, 1, 245, 7, // 1002: case 0xb2: { |
| 776 | OPC_SwitchField, 16, 8, // 1006: switch Inst[23:16] { |
| 777 | 0, 6, // 1009: case 0x0: { |
| 778 | OPC_CheckPredicate, 0, // 1011: check predicate 0 |
| 779 | OPC_Decode, 226, 11, 34, // 1013: decode to LBEAR using decoder 34 |
| 780 | // 1013: } |
| 781 | 1, 6, // 1017: case 0x1: { |
| 782 | OPC_CheckPredicate, 0, // 1019: check predicate 0 |
| 783 | OPC_Decode, 246, 17, 34, // 1021: decode to STBEAR using decoder 34 |
| 784 | // 1021: } |
| 785 | 2, 4, // 1025: case 0x2: { |
| 786 | OPC_Decode, 150, 18, 34, // 1027: decode to STIDP using decoder 34 |
| 787 | // 1027: } |
| 788 | 4, 4, // 1031: case 0x4: { |
| 789 | OPC_Decode, 208, 16, 34, // 1033: decode to SCK using decoder 34 |
| 790 | // 1033: } |
| 791 | 5, 4, // 1037: case 0x5: { |
| 792 | OPC_Decode, 249, 17, 34, // 1039: decode to STCK using decoder 34 |
| 793 | // 1039: } |
| 794 | 6, 4, // 1043: case 0x6: { |
| 795 | OPC_Decode, 209, 16, 34, // 1045: decode to SCKC using decoder 34 |
| 796 | // 1045: } |
| 797 | 7, 4, // 1049: case 0x7: { |
| 798 | OPC_Decode, 250, 17, 34, // 1051: decode to STCKC using decoder 34 |
| 799 | // 1051: } |
| 800 | 8, 4, // 1055: case 0x8: { |
| 801 | OPC_Decode, 206, 17, 34, // 1057: decode to SPT using decoder 34 |
| 802 | // 1057: } |
| 803 | 9, 4, // 1061: case 0x9: { |
| 804 | OPC_Decode, 224, 18, 34, // 1063: decode to STPT using decoder 34 |
| 805 | // 1063: } |
| 806 | 10, 4, // 1067: case 0xa: { |
| 807 | OPC_Decode, 204, 17, 34, // 1069: decode to SPKA using decoder 34 |
| 808 | // 1069: } |
| 809 | 11, 8, // 1073: case 0xb: { |
| 810 | OPC_CheckField, 0, 16, 0, // 1075: check Inst[15:0] == 0x0 |
| 811 | OPC_Decode, 231, 10, 0, // 1079: decode to IPK using decoder 0 |
| 812 | // 1079: } |
| 813 | 13, 8, // 1083: case 0xd: { |
| 814 | OPC_CheckField, 0, 16, 0, // 1085: check Inst[15:0] == 0x0 |
| 815 | OPC_Decode, 161, 16, 0, // 1089: decode to PTLB using decoder 0 |
| 816 | // 1089: } |
| 817 | 16, 4, // 1093: case 0x10: { |
| 818 | OPC_Decode, 207, 17, 34, // 1095: decode to SPX using decoder 34 |
| 819 | // 1095: } |
| 820 | 17, 4, // 1099: case 0x11: { |
| 821 | OPC_Decode, 225, 18, 34, // 1101: decode to STPX using decoder 34 |
| 822 | // 1101: } |
| 823 | 18, 4, // 1105: case 0x12: { |
| 824 | OPC_Decode, 245, 17, 34, // 1107: decode to STAP using decoder 34 |
| 825 | // 1107: } |
| 826 | 20, 4, // 1111: case 0x14: { |
| 827 | OPC_Decode, 171, 17, 34, // 1113: decode to SIE using decoder 34 |
| 828 | // 1113: } |
| 829 | 24, 4, // 1117: case 0x18: { |
| 830 | OPC_Decode, 138, 16, 34, // 1119: decode to PC using decoder 34 |
| 831 | // 1119: } |
| 832 | 25, 4, // 1123: case 0x19: { |
| 833 | OPC_Decode, 199, 16, 34, // 1125: decode to SAC using decoder 34 |
| 834 | // 1125: } |
| 835 | 26, 4, // 1129: case 0x1a: { |
| 836 | OPC_Decode, 128, 6, 34, // 1131: decode to CFC using decoder 34 |
| 837 | // 1131: } |
| 838 | 33, 24, // 1135: case 0x21: { |
| 839 | OPC_Scope, 8, // 1137: try { |
| 840 | OPC_CheckField, 8, 8, 0, // 1139: check Inst[15:8] == 0x0 |
| 841 | OPC_Decode, 235, 10, 58, // 1143: decode to IPTEOptOpt using decoder 58 |
| 842 | OPC_Scope, 8, // 1147: } else try { |
| 843 | OPC_CheckField, 8, 4, 0, // 1149: check Inst[11:8] == 0x0 |
| 844 | OPC_Decode, 234, 10, 59, // 1153: decode to IPTEOpt using decoder 59 |
| 845 | // 1153: } else try { |
| 846 | OPC_Decode, 233, 10, 60, // 1157: decode to IPTE using decoder 60 |
| 847 | // 1157: } |
| 848 | // 1157: } |
| 849 | 34, 12, // 1161: case 0x22: { |
| 850 | OPC_CheckField, 8, 8, 0, // 1163: check Inst[15:8] == 0x0 |
| 851 | OPC_CheckField, 0, 4, 0, // 1167: check Inst[3:0] == 0x0 |
| 852 | OPC_Decode, 232, 10, 1, // 1171: decode to IPM using decoder 1 |
| 853 | // 1171: } |
| 854 | 35, 8, // 1175: case 0x23: { |
| 855 | OPC_CheckField, 8, 8, 0, // 1177: check Inst[15:8] == 0x0 |
| 856 | OPC_Decode, 238, 10, 3, // 1181: decode to IVSK using decoder 3 |
| 857 | // 1181: } |
| 858 | 36, 12, // 1185: case 0x24: { |
| 859 | OPC_CheckField, 8, 8, 0, // 1187: check Inst[15:8] == 0x0 |
| 860 | OPC_CheckField, 0, 4, 0, // 1191: check Inst[3:0] == 0x0 |
| 861 | OPC_Decode, 213, 10, 1, // 1195: decode to IAC using decoder 1 |
| 862 | // 1195: } |
| 863 | 37, 12, // 1199: case 0x25: { |
| 864 | OPC_CheckField, 8, 8, 0, // 1201: check Inst[15:8] == 0x0 |
| 865 | OPC_CheckField, 0, 4, 0, // 1205: check Inst[3:0] == 0x0 |
| 866 | OPC_Decode, 237, 17, 1, // 1209: decode to SSAR using decoder 1 |
| 867 | // 1209: } |
| 868 | 38, 12, // 1213: case 0x26: { |
| 869 | OPC_CheckField, 8, 8, 0, // 1215: check Inst[15:8] == 0x0 |
| 870 | OPC_CheckField, 0, 4, 0, // 1219: check Inst[3:0] == 0x0 |
| 871 | OPC_Decode, 184, 10, 1, // 1223: decode to EPAR using decoder 1 |
| 872 | // 1223: } |
| 873 | 39, 12, // 1227: case 0x27: { |
| 874 | OPC_CheckField, 8, 8, 0, // 1229: check Inst[15:8] == 0x0 |
| 875 | OPC_CheckField, 0, 4, 0, // 1233: check Inst[3:0] == 0x0 |
| 876 | OPC_Decode, 190, 10, 1, // 1237: decode to ESAR using decoder 1 |
| 877 | // 1237: } |
| 878 | 40, 8, // 1241: case 0x28: { |
| 879 | OPC_CheckField, 8, 8, 0, // 1243: check Inst[15:8] == 0x0 |
| 880 | OPC_Decode, 157, 16, 61, // 1247: decode to PT using decoder 61 |
| 881 | // 1247: } |
| 882 | 41, 8, // 1251: case 0x29: { |
| 883 | OPC_CheckField, 8, 8, 0, // 1253: check Inst[15:8] == 0x0 |
| 884 | OPC_Decode, 237, 10, 3, // 1257: decode to ISKE using decoder 3 |
| 885 | // 1257: } |
| 886 | 42, 8, // 1261: case 0x2a: { |
| 887 | OPC_CheckField, 8, 8, 0, // 1263: check Inst[15:8] == 0x0 |
| 888 | OPC_Decode, 191, 16, 61, // 1267: decode to RRBE using decoder 61 |
| 889 | // 1267: } |
| 890 | 43, 18, // 1271: case 0x2b: { |
| 891 | OPC_CheckField, 8, 4, 0, // 1273: check Inst[11:8] == 0x0 |
| 892 | OPC_Scope, 8, // 1277: try { |
| 893 | OPC_CheckField, 12, 4, 0, // 1279: check Inst[15:12] == 0x0 |
| 894 | OPC_Decode, 240, 17, 61, // 1283: decode to SSKEOpt using decoder 61 |
| 895 | // 1283: } else try { |
| 896 | OPC_Decode, 239, 17, 62, // 1287: decode to SSKE using decoder 62 |
| 897 | // 1287: } |
| 898 | // 1287: } |
| 899 | 44, 8, // 1291: case 0x2c: { |
| 900 | OPC_CheckField, 8, 8, 0, // 1293: check Inst[15:8] == 0x0 |
| 901 | OPC_Decode, 249, 18, 63, // 1297: decode to TB using decoder 63 |
| 902 | // 1297: } |
| 903 | 45, 8, // 1301: case 0x2d: { |
| 904 | OPC_CheckField, 8, 8, 0, // 1303: check Inst[15:8] == 0x0 |
| 905 | OPC_Decode, 170, 10, 14, // 1307: decode to DXR using decoder 14 |
| 906 | // 1307: } |
| 907 | 46, 8, // 1311: case 0x2e: { |
| 908 | OPC_CheckField, 8, 8, 0, // 1313: check Inst[15:8] == 0x0 |
| 909 | OPC_Decode, 146, 16, 63, // 1317: decode to PGIN using decoder 63 |
| 910 | // 1317: } |
| 911 | 47, 8, // 1321: case 0x2f: { |
| 912 | OPC_CheckField, 8, 8, 0, // 1323: check Inst[15:8] == 0x0 |
| 913 | OPC_Decode, 147, 16, 63, // 1327: decode to PGOUT using decoder 63 |
| 914 | // 1327: } |
| 915 | 48, 8, // 1331: case 0x30: { |
| 916 | OPC_CheckField, 0, 16, 0, // 1333: check Inst[15:0] == 0x0 |
| 917 | OPC_Decode, 217, 9, 0, // 1337: decode to CSCH using decoder 0 |
| 918 | // 1337: } |
| 919 | 49, 8, // 1341: case 0x31: { |
| 920 | OPC_CheckField, 0, 16, 0, // 1343: check Inst[15:0] == 0x0 |
| 921 | OPC_Decode, 212, 10, 0, // 1347: decode to HSCH using decoder 0 |
| 922 | // 1347: } |
| 923 | 50, 4, // 1351: case 0x32: { |
| 924 | OPC_Decode, 156, 15, 34, // 1353: decode to MSCH using decoder 34 |
| 925 | // 1353: } |
| 926 | 51, 4, // 1357: case 0x33: { |
| 927 | OPC_Decode, 238, 17, 34, // 1359: decode to SSCH using decoder 34 |
| 928 | // 1359: } |
| 929 | 52, 4, // 1363: case 0x34: { |
| 930 | OPC_Decode, 231, 18, 34, // 1365: decode to STSCH using decoder 34 |
| 931 | // 1365: } |
| 932 | 53, 4, // 1369: case 0x35: { |
| 933 | OPC_Decode, 169, 19, 34, // 1371: decode to TSCH using decoder 34 |
| 934 | // 1371: } |
| 935 | 54, 4, // 1375: case 0x36: { |
| 936 | OPC_Decode, 146, 19, 34, // 1377: decode to TPI using decoder 34 |
| 937 | // 1377: } |
| 938 | 55, 8, // 1381: case 0x37: { |
| 939 | OPC_CheckField, 0, 16, 0, // 1383: check Inst[15:0] == 0x0 |
| 940 | OPC_Decode, 201, 16, 0, // 1387: decode to SAL using decoder 0 |
| 941 | // 1387: } |
| 942 | 56, 8, // 1391: case 0x38: { |
| 943 | OPC_CheckField, 0, 16, 0, // 1393: check Inst[15:0] == 0x0 |
| 944 | OPC_Decode, 195, 16, 0, // 1397: decode to RSCH using decoder 0 |
| 945 | // 1397: } |
| 946 | 57, 4, // 1401: case 0x39: { |
| 947 | OPC_Decode, 129, 18, 34, // 1403: decode to STCRW using decoder 34 |
| 948 | // 1403: } |
| 949 | 58, 4, // 1407: case 0x3a: { |
| 950 | OPC_Decode, 128, 18, 34, // 1409: decode to STCPS using decoder 34 |
| 951 | // 1409: } |
| 952 | 59, 8, // 1413: case 0x3b: { |
| 953 | OPC_CheckField, 0, 16, 0, // 1415: check Inst[15:0] == 0x0 |
| 954 | OPC_Decode, 167, 16, 0, // 1419: decode to RCHP using decoder 0 |
| 955 | // 1419: } |
| 956 | 60, 8, // 1423: case 0x3c: { |
| 957 | OPC_CheckField, 0, 16, 0, // 1425: check Inst[15:0] == 0x0 |
| 958 | OPC_Decode, 207, 16, 0, // 1429: decode to SCHM using decoder 0 |
| 959 | // 1429: } |
| 960 | 64, 8, // 1433: case 0x40: { |
| 961 | OPC_CheckField, 8, 8, 0, // 1435: check Inst[15:8] == 0x0 |
| 962 | OPC_Decode, 239, 4, 63, // 1439: decode to BAKR using decoder 63 |
| 963 | // 1439: } |
| 964 | 65, 8, // 1443: case 0x41: { |
| 965 | OPC_CheckField, 8, 8, 0, // 1445: check Inst[15:8] == 0x0 |
| 966 | OPC_Decode, 173, 7, 64, // 1449: decode to CKSM using decoder 64 |
| 967 | // 1449: } |
| 968 | 68, 8, // 1453: case 0x44: { |
| 969 | OPC_CheckField, 8, 8, 0, // 1455: check Inst[15:8] == 0x0 |
| 970 | OPC_Decode, 211, 17, 12, // 1459: decode to SQDR using decoder 12 |
| 971 | // 1459: } |
| 972 | 69, 8, // 1463: case 0x45: { |
| 973 | OPC_CheckField, 8, 8, 0, // 1465: check Inst[15:8] == 0x0 |
| 974 | OPC_Decode, 215, 17, 17, // 1469: decode to SQER using decoder 17 |
| 975 | // 1469: } |
| 976 | 70, 8, // 1473: case 0x46: { |
| 977 | OPC_CheckField, 8, 8, 0, // 1475: check Inst[15:8] == 0x0 |
| 978 | OPC_Decode, 233, 18, 61, // 1479: decode to STURA using decoder 61 |
| 979 | // 1479: } |
| 980 | 71, 12, // 1483: case 0x47: { |
| 981 | OPC_CheckField, 8, 8, 0, // 1485: check Inst[15:8] == 0x0 |
| 982 | OPC_CheckField, 0, 4, 0, // 1489: check Inst[3:0] == 0x0 |
| 983 | OPC_Decode, 175, 15, 65, // 1493: decode to MSTA using decoder 65 |
| 984 | // 1493: } |
| 985 | 72, 8, // 1497: case 0x48: { |
| 986 | OPC_CheckField, 0, 16, 0, // 1499: check Inst[15:0] == 0x0 |
| 987 | OPC_Decode, 137, 16, 0, // 1503: decode to PALB using decoder 0 |
| 988 | // 1503: } |
| 989 | 73, 8, // 1507: case 0x49: { |
| 990 | OPC_CheckField, 8, 8, 0, // 1509: check Inst[15:8] == 0x0 |
| 991 | OPC_Decode, 187, 10, 9, // 1513: decode to EREG using decoder 9 |
| 992 | // 1513: } |
| 993 | 74, 8, // 1517: case 0x4a: { |
| 994 | OPC_CheckField, 8, 8, 0, // 1519: check Inst[15:8] == 0x0 |
| 995 | OPC_Decode, 193, 10, 66, // 1523: decode to ESTA using decoder 66 |
| 996 | // 1523: } |
| 997 | 75, 8, // 1527: case 0x4b: { |
| 998 | OPC_CheckField, 8, 8, 0, // 1529: check Inst[15:8] == 0x0 |
| 999 | OPC_Decode, 212, 14, 61, // 1533: decode to LURA using decoder 61 |
| 1000 | // 1533: } |
| 1001 | 76, 8, // 1537: case 0x4c: { |
| 1002 | OPC_CheckField, 8, 8, 0, // 1539: check Inst[15:8] == 0x0 |
| 1003 | OPC_Decode, 248, 18, 67, // 1543: decode to TAR using decoder 67 |
| 1004 | // 1543: } |
| 1005 | 77, 8, // 1547: case 0x4d: { |
| 1006 | OPC_CheckField, 8, 8, 0, // 1549: check Inst[15:8] == 0x0 |
| 1007 | OPC_Decode, 169, 9, 68, // 1553: decode to CPYA using decoder 68 |
| 1008 | // 1553: } |
| 1009 | 78, 8, // 1557: case 0x4e: { |
| 1010 | OPC_CheckField, 8, 8, 0, // 1559: check Inst[15:8] == 0x0 |
| 1011 | OPC_Decode, 205, 16, 67, // 1563: decode to SAR using decoder 67 |
| 1012 | // 1563: } |
| 1013 | 79, 8, // 1567: case 0x4f: { |
| 1014 | OPC_CheckField, 8, 8, 0, // 1569: check Inst[15:8] == 0x0 |
| 1015 | OPC_Decode, 173, 10, 69, // 1573: decode to EAR using decoder 69 |
| 1016 | // 1573: } |
| 1017 | 80, 8, // 1577: case 0x50: { |
| 1018 | OPC_CheckField, 8, 8, 0, // 1579: check Inst[15:8] == 0x0 |
| 1019 | OPC_Decode, 220, 9, 70, // 1583: decode to CSP using decoder 70 |
| 1020 | // 1583: } |
| 1021 | 82, 8, // 1587: case 0x52: { |
| 1022 | OPC_CheckField, 8, 8, 0, // 1589: check Inst[15:8] == 0x0 |
| 1023 | OPC_Decode, 173, 15, 10, // 1593: decode to MSR using decoder 10 |
| 1024 | // 1593: } |
| 1025 | 84, 8, // 1597: case 0x54: { |
| 1026 | OPC_CheckField, 8, 8, 0, // 1599: check Inst[15:8] == 0x0 |
| 1027 | OPC_Decode, 196, 15, 63, // 1603: decode to MVPG using decoder 63 |
| 1028 | // 1603: } |
| 1029 | 85, 8, // 1607: case 0x55: { |
| 1030 | OPC_CheckField, 8, 8, 0, // 1609: check Inst[15:8] == 0x0 |
| 1031 | OPC_Decode, 197, 15, 71, // 1613: decode to MVST using decoder 71 |
| 1032 | // 1613: } |
| 1033 | 87, 8, // 1617: case 0x57: { |
| 1034 | OPC_CheckField, 8, 8, 0, // 1619: check Inst[15:8] == 0x0 |
| 1035 | OPC_Decode, 237, 9, 8, // 1623: decode to CUSE using decoder 8 |
| 1036 | // 1623: } |
| 1037 | 88, 8, // 1627: case 0x58: { |
| 1038 | OPC_CheckField, 8, 8, 0, // 1629: check Inst[15:8] == 0x0 |
| 1039 | OPC_Decode, 207, 5, 63, // 1633: decode to BSG using decoder 63 |
| 1040 | // 1633: } |
| 1041 | 90, 8, // 1637: case 0x5a: { |
| 1042 | OPC_CheckField, 8, 8, 0, // 1639: check Inst[15:8] == 0x0 |
| 1043 | OPC_Decode, 206, 5, 63, // 1643: decode to BSA using decoder 63 |
| 1044 | // 1643: } |
| 1045 | 93, 8, // 1647: case 0x5d: { |
| 1046 | OPC_CheckField, 8, 8, 0, // 1649: check Inst[15:8] == 0x0 |
| 1047 | OPC_Decode, 139, 9, 71, // 1653: decode to CLST using decoder 71 |
| 1048 | // 1653: } |
| 1049 | 94, 8, // 1657: case 0x5e: { |
| 1050 | OPC_CheckField, 8, 8, 0, // 1659: check Inst[15:8] == 0x0 |
| 1051 | OPC_Decode, 233, 17, 71, // 1663: decode to SRST using decoder 71 |
| 1052 | // 1663: } |
| 1053 | 99, 8, // 1667: case 0x63: { |
| 1054 | OPC_CheckField, 8, 8, 0, // 1669: check Inst[15:8] == 0x0 |
| 1055 | OPC_Decode, 156, 9, 8, // 1673: decode to CMPSC using decoder 8 |
| 1056 | // 1673: } |
| 1057 | 116, 4, // 1677: case 0x74: { |
| 1058 | OPC_Decode, 172, 17, 34, // 1679: decode to SIGA using decoder 34 |
| 1059 | // 1679: } |
| 1060 | 118, 8, // 1683: case 0x76: { |
| 1061 | OPC_CheckField, 0, 16, 0, // 1685: check Inst[15:0] == 0x0 |
| 1062 | OPC_Decode, 224, 25, 0, // 1689: decode to XSCH using decoder 0 |
| 1063 | // 1689: } |
| 1064 | 119, 4, // 1693: case 0x77: { |
| 1065 | OPC_Decode, 190, 16, 34, // 1695: decode to RP using decoder 34 |
| 1066 | // 1695: } |
| 1067 | 120, 4, // 1699: case 0x78: { |
| 1068 | OPC_Decode, 251, 17, 34, // 1701: decode to STCKE using decoder 34 |
| 1069 | // 1701: } |
| 1070 | 121, 4, // 1705: case 0x79: { |
| 1071 | OPC_Decode, 200, 16, 34, // 1707: decode to SACF using decoder 34 |
| 1072 | // 1707: } |
| 1073 | 124, 4, // 1711: case 0x7c: { |
| 1074 | OPC_Decode, 252, 17, 34, // 1713: decode to STCKF using decoder 34 |
| 1075 | // 1713: } |
| 1076 | 125, 4, // 1717: case 0x7d: { |
| 1077 | OPC_Decode, 232, 18, 34, // 1719: decode to STSI using decoder 34 |
| 1078 | // 1719: } |
| 1079 | 128, 1, 4, // 1723: case 0x80: { |
| 1080 | OPC_Decode, 176, 14, 34, // 1726: decode to LPP using decoder 34 |
| 1081 | // 1726: } |
| 1082 | 132, 1, 4, // 1730: case 0x84: { |
| 1083 | OPC_Decode, 230, 11, 34, // 1733: decode to LCCTL using decoder 34 |
| 1084 | // 1733: } |
| 1085 | 133, 1, 4, // 1737: case 0x85: { |
| 1086 | OPC_Decode, 164, 14, 34, // 1740: decode to LPCTL using decoder 34 |
| 1087 | // 1740: } |
| 1088 | 134, 1, 4, // 1744: case 0x86: { |
| 1089 | OPC_Decode, 166, 16, 34, // 1747: decode to QSI using decoder 34 |
| 1090 | // 1747: } |
| 1091 | 135, 1, 4, // 1751: case 0x87: { |
| 1092 | OPC_Decode, 197, 14, 34, // 1754: decode to LSCTL using decoder 34 |
| 1093 | // 1754: } |
| 1094 | 142, 1, 4, // 1758: case 0x8e: { |
| 1095 | OPC_Decode, 164, 16, 34, // 1761: decode to QCTRI using decoder 34 |
| 1096 | // 1761: } |
| 1097 | 143, 1, 6, // 1765: case 0x8f: { |
| 1098 | OPC_CheckPredicate, 1, // 1768: check predicate 1 |
| 1099 | OPC_Decode, 165, 16, 34, // 1770: decode to QPACI using decoder 34 |
| 1100 | // 1770: } |
| 1101 | 153, 1, 4, // 1774: case 0x99: { |
| 1102 | OPC_Decode, 229, 17, 72, // 1777: decode to SRNM using decoder 72 |
| 1103 | // 1777: } |
| 1104 | 156, 1, 4, // 1781: case 0x9c: { |
| 1105 | OPC_Decode, 142, 18, 34, // 1784: decode to STFPC using decoder 34 |
| 1106 | // 1784: } |
| 1107 | 157, 1, 4, // 1788: case 0x9d: { |
| 1108 | OPC_Decode, 149, 12, 34, // 1791: decode to LFPC using decoder 34 |
| 1109 | // 1791: } |
| 1110 | 165, 1, 8, // 1795: case 0xa5: { |
| 1111 | OPC_CheckField, 8, 8, 0, // 1798: check Inst[15:8] == 0x0 |
| 1112 | OPC_Decode, 153, 19, 73, // 1802: decode to TRE using decoder 73 |
| 1113 | // 1802: } |
| 1114 | 166, 1, 18, // 1806: case 0xa6: { |
| 1115 | OPC_CheckField, 8, 4, 0, // 1809: check Inst[11:8] == 0x0 |
| 1116 | OPC_Scope, 8, // 1813: try { |
| 1117 | OPC_CheckField, 12, 4, 0, // 1815: check Inst[15:12] == 0x0 |
| 1118 | OPC_Decode, 231, 9, 8, // 1819: decode to CU21Opt using decoder 8 |
| 1119 | // 1819: } else try { |
| 1120 | OPC_Decode, 230, 9, 74, // 1823: decode to CU21 using decoder 74 |
| 1121 | // 1823: } |
| 1122 | // 1823: } |
| 1123 | 167, 1, 18, // 1827: case 0xa7: { |
| 1124 | OPC_CheckField, 8, 4, 0, // 1830: check Inst[11:8] == 0x0 |
| 1125 | OPC_Scope, 8, // 1834: try { |
| 1126 | OPC_CheckField, 12, 4, 0, // 1836: check Inst[15:12] == 0x0 |
| 1127 | OPC_Decode, 227, 9, 8, // 1840: decode to CU12Opt using decoder 8 |
| 1128 | // 1840: } else try { |
| 1129 | OPC_Decode, 226, 9, 74, // 1844: decode to CU12 using decoder 74 |
| 1130 | // 1844: } |
| 1131 | // 1844: } |
| 1132 | 176, 1, 4, // 1848: case 0xb0: { |
| 1133 | OPC_Decode, 141, 18, 34, // 1851: decode to STFLE using decoder 34 |
| 1134 | // 1851: } |
| 1135 | 177, 1, 4, // 1855: case 0xb1: { |
| 1136 | OPC_Decode, 140, 18, 34, // 1858: decode to STFL using decoder 34 |
| 1137 | // 1858: } |
| 1138 | 178, 1, 4, // 1862: case 0xb2: { |
| 1139 | OPC_Decode, 180, 14, 34, // 1865: decode to LPSWE using decoder 34 |
| 1140 | // 1865: } |
| 1141 | 184, 1, 6, // 1869: case 0xb8: { |
| 1142 | OPC_CheckPredicate, 2, // 1872: check predicate 2 |
| 1143 | OPC_Decode, 230, 17, 72, // 1874: decode to SRNMB using decoder 72 |
| 1144 | // 1874: } |
| 1145 | 185, 1, 4, // 1878: case 0xb9: { |
| 1146 | OPC_Decode, 231, 17, 72, // 1881: decode to SRNMT using decoder 72 |
| 1147 | // 1881: } |
| 1148 | 189, 1, 4, // 1885: case 0xbd: { |
| 1149 | OPC_Decode, 146, 12, 34, // 1888: decode to LFAS using decoder 34 |
| 1150 | // 1888: } |
| 1151 | 224, 1, 8, // 1892: case 0xe0: { |
| 1152 | OPC_CheckField, 8, 8, 0, // 1895: check Inst[15:8] == 0x0 |
| 1153 | OPC_Decode, 206, 16, 63, // 1899: decode to SCCTR using decoder 63 |
| 1154 | // 1899: } |
| 1155 | 225, 1, 8, // 1903: case 0xe1: { |
| 1156 | OPC_CheckField, 8, 8, 0, // 1906: check Inst[15:8] == 0x0 |
| 1157 | OPC_Decode, 203, 17, 63, // 1910: decode to SPCTR using decoder 63 |
| 1158 | // 1910: } |
| 1159 | 228, 1, 8, // 1914: case 0xe4: { |
| 1160 | OPC_CheckField, 8, 8, 0, // 1917: check Inst[15:8] == 0x0 |
| 1161 | OPC_Decode, 175, 10, 63, // 1921: decode to ECCTR using decoder 63 |
| 1162 | // 1921: } |
| 1163 | 229, 1, 8, // 1925: case 0xe5: { |
| 1164 | OPC_CheckField, 8, 8, 0, // 1928: check Inst[15:8] == 0x0 |
| 1165 | OPC_Decode, 185, 10, 63, // 1932: decode to EPCTR using decoder 63 |
| 1166 | // 1932: } |
| 1167 | 232, 1, 10, // 1936: case 0xe8: { |
| 1168 | OPC_CheckPredicate, 3, // 1939: check predicate 3 |
| 1169 | OPC_CheckField, 8, 4, 0, // 1941: check Inst[11:8] == 0x0 |
| 1170 | OPC_Decode, 153, 16, 75, // 1945: decode to PPA using decoder 75 |
| 1171 | // 1945: } |
| 1172 | 236, 1, 14, // 1949: case 0xec: { |
| 1173 | OPC_CheckPredicate, 4, // 1952: check predicate 4 |
| 1174 | OPC_CheckField, 8, 8, 0, // 1954: check Inst[15:8] == 0x0 |
| 1175 | OPC_CheckField, 0, 4, 0, // 1958: check Inst[3:0] == 0x0 |
| 1176 | OPC_Decode, 195, 10, 1, // 1962: decode to ETND using decoder 1 |
| 1177 | // 1962: } |
| 1178 | 237, 1, 8, // 1966: case 0xed: { |
| 1179 | OPC_CheckField, 8, 8, 0, // 1969: check Inst[15:8] == 0x0 |
| 1180 | OPC_Decode, 176, 10, 61, // 1973: decode to ECPGA using decoder 61 |
| 1181 | // 1973: } |
| 1182 | 248, 1, 10, // 1977: case 0xf8: { |
| 1183 | OPC_CheckPredicate, 4, // 1980: check predicate 4 |
| 1184 | OPC_CheckField, 0, 16, 0, // 1982: check Inst[15:0] == 0x0 |
| 1185 | OPC_Decode, 135, 19, 0, // 1986: decode to TEND using decoder 0 |
| 1186 | // 1986: } |
| 1187 | 250, 1, 10, // 1990: case 0xfa: { |
| 1188 | OPC_CheckPredicate, 5, // 1993: check predicate 5 |
| 1189 | OPC_CheckField, 8, 8, 0, // 1995: check Inst[15:8] == 0x0 |
| 1190 | OPC_Decode, 221, 15, 76, // 1999: decode to NIAI using decoder 76 |
| 1191 | // 1999: } |
| 1192 | 252, 1, 6, // 2003: case 0xfc: { |
| 1193 | OPC_CheckPredicate, 4, // 2006: check predicate 4 |
| 1194 | OPC_Decode, 246, 18, 34, // 2008: decode to TABORT using decoder 34 |
| 1195 | // 2008: } |
| 1196 | 255, 1, 0, // 2012: case 0xff: { |
| 1197 | OPC_Decode, 152, 19, 34, // 2015: decode to TRAP4 using decoder 34 |
| 1198 | // 2015: } |
| 1199 | // 2015: } // switch Inst[23:16] |
| 1200 | // 2015: } |
| 1201 | 179, 1, 223, 15, // 2019: case 0xb3: { |
| 1202 | OPC_SwitchField, 16, 8, // 2023: switch Inst[23:16] { |
| 1203 | 0, 8, // 2026: case 0x0: { |
| 1204 | OPC_CheckField, 8, 8, 0, // 2028: check Inst[15:8] == 0x0 |
| 1205 | OPC_Decode, 172, 14, 17, // 2032: decode to LPEBR using decoder 17 |
| 1206 | // 2032: } |
| 1207 | 1, 8, // 2036: case 0x1: { |
| 1208 | OPC_CheckField, 8, 8, 0, // 2038: check Inst[15:8] == 0x0 |
| 1209 | OPC_Decode, 215, 12, 17, // 2042: decode to LNEBR using decoder 17 |
| 1210 | // 2042: } |
| 1211 | 2, 8, // 2046: case 0x2: { |
| 1212 | OPC_CheckField, 8, 8, 0, // 2048: check Inst[15:8] == 0x0 |
| 1213 | OPC_Decode, 202, 14, 17, // 2052: decode to LTEBR using decoder 17 |
| 1214 | // 2052: } |
| 1215 | 3, 8, // 2056: case 0x3: { |
| 1216 | OPC_CheckField, 8, 8, 0, // 2058: check Inst[15:8] == 0x0 |
| 1217 | OPC_Decode, 236, 11, 17, // 2062: decode to LCEBR using decoder 17 |
| 1218 | // 2062: } |
| 1219 | 4, 8, // 2066: case 0x4: { |
| 1220 | OPC_CheckField, 8, 8, 0, // 2068: check Inst[15:8] == 0x0 |
| 1221 | OPC_Decode, 249, 11, 77, // 2072: decode to LDEBR using decoder 77 |
| 1222 | // 2072: } |
| 1223 | 5, 8, // 2076: case 0x5: { |
| 1224 | OPC_CheckField, 8, 8, 0, // 2078: check Inst[15:8] == 0x0 |
| 1225 | OPC_Decode, 221, 14, 78, // 2082: decode to LXDBR using decoder 78 |
| 1226 | // 2082: } |
| 1227 | 6, 8, // 2086: case 0x6: { |
| 1228 | OPC_CheckField, 8, 8, 0, // 2088: check Inst[15:8] == 0x0 |
| 1229 | OPC_Decode, 226, 14, 79, // 2092: decode to LXEBR using decoder 79 |
| 1230 | // 2092: } |
| 1231 | 7, 8, // 2096: case 0x7: { |
| 1232 | OPC_CheckField, 8, 8, 0, // 2098: check Inst[15:8] == 0x0 |
| 1233 | OPC_Decode, 202, 15, 15, // 2102: decode to MXDBR using decoder 15 |
| 1234 | // 2102: } |
| 1235 | 8, 8, // 2106: case 0x8: { |
| 1236 | OPC_CheckField, 8, 8, 0, // 2108: check Inst[15:8] == 0x0 |
| 1237 | OPC_Decode, 191, 11, 17, // 2112: decode to KEBR using decoder 17 |
| 1238 | // 2112: } |
| 1239 | 9, 8, // 2116: case 0x9: { |
| 1240 | OPC_CheckField, 8, 8, 0, // 2118: check Inst[15:8] == 0x0 |
| 1241 | OPC_Decode, 244, 5, 17, // 2122: decode to CEBR using decoder 17 |
| 1242 | // 2122: } |
| 1243 | 10, 8, // 2126: case 0xa: { |
| 1244 | OPC_CheckField, 8, 8, 0, // 2128: check Inst[15:8] == 0x0 |
| 1245 | OPC_Decode, 182, 4, 19, // 2132: decode to AEBR using decoder 19 |
| 1246 | // 2132: } |
| 1247 | 11, 8, // 2136: case 0xb: { |
| 1248 | OPC_CheckField, 8, 8, 0, // 2138: check Inst[15:8] == 0x0 |
| 1249 | OPC_Decode, 219, 16, 19, // 2142: decode to SEBR using decoder 19 |
| 1250 | // 2142: } |
| 1251 | 12, 8, // 2146: case 0xc: { |
| 1252 | OPC_CheckField, 8, 8, 0, // 2148: check Inst[15:8] == 0x0 |
| 1253 | OPC_Decode, 129, 15, 20, // 2152: decode to MDEBR using decoder 20 |
| 1254 | // 2152: } |
| 1255 | 13, 8, // 2156: case 0xd: { |
| 1256 | OPC_CheckField, 8, 8, 0, // 2158: check Inst[15:8] == 0x0 |
| 1257 | OPC_Decode, 153, 10, 19, // 2162: decode to DEBR using decoder 19 |
| 1258 | // 2162: } |
| 1259 | 14, 8, // 2166: case 0xe: { |
| 1260 | OPC_CheckField, 8, 4, 0, // 2168: check Inst[11:8] == 0x0 |
| 1261 | OPC_Decode, 243, 14, 80, // 2172: decode to MAEBR using decoder 80 |
| 1262 | // 2172: } |
| 1263 | 15, 8, // 2176: case 0xf: { |
| 1264 | OPC_CheckField, 8, 4, 0, // 2178: check Inst[11:8] == 0x0 |
| 1265 | OPC_Decode, 163, 15, 80, // 2182: decode to MSEBR using decoder 80 |
| 1266 | // 2182: } |
| 1267 | 16, 8, // 2186: case 0x10: { |
| 1268 | OPC_CheckField, 8, 8, 0, // 2188: check Inst[15:8] == 0x0 |
| 1269 | OPC_Decode, 166, 14, 12, // 2192: decode to LPDBR using decoder 12 |
| 1270 | // 2192: } |
| 1271 | 17, 8, // 2196: case 0x11: { |
| 1272 | OPC_CheckField, 8, 8, 0, // 2198: check Inst[15:8] == 0x0 |
| 1273 | OPC_Decode, 210, 12, 12, // 2202: decode to LNDBR using decoder 12 |
| 1274 | // 2202: } |
| 1275 | 18, 8, // 2206: case 0x12: { |
| 1276 | OPC_CheckField, 8, 8, 0, // 2208: check Inst[15:8] == 0x0 |
| 1277 | OPC_Decode, 199, 14, 12, // 2212: decode to LTDBR using decoder 12 |
| 1278 | // 2212: } |
| 1279 | 19, 8, // 2216: case 0x13: { |
| 1280 | OPC_CheckField, 8, 8, 0, // 2218: check Inst[15:8] == 0x0 |
| 1281 | OPC_Decode, 231, 11, 12, // 2222: decode to LCDBR using decoder 12 |
| 1282 | // 2222: } |
| 1283 | 20, 8, // 2226: case 0x14: { |
| 1284 | OPC_CheckField, 8, 8, 0, // 2228: check Inst[15:8] == 0x0 |
| 1285 | OPC_Decode, 214, 17, 17, // 2232: decode to SQEBR using decoder 17 |
| 1286 | // 2232: } |
| 1287 | 21, 8, // 2236: case 0x15: { |
| 1288 | OPC_CheckField, 8, 8, 0, // 2238: check Inst[15:8] == 0x0 |
| 1289 | OPC_Decode, 210, 17, 12, // 2242: decode to SQDBR using decoder 12 |
| 1290 | // 2242: } |
| 1291 | 22, 8, // 2246: case 0x16: { |
| 1292 | OPC_CheckField, 8, 8, 0, // 2248: check Inst[15:8] == 0x0 |
| 1293 | OPC_Decode, 216, 17, 81, // 2252: decode to SQXBR using decoder 81 |
| 1294 | // 2252: } |
| 1295 | 23, 8, // 2256: case 0x17: { |
| 1296 | OPC_CheckField, 8, 8, 0, // 2258: check Inst[15:8] == 0x0 |
| 1297 | OPC_Decode, 137, 15, 19, // 2262: decode to MEEBR using decoder 19 |
| 1298 | // 2262: } |
| 1299 | 24, 8, // 2266: case 0x18: { |
| 1300 | OPC_CheckField, 8, 8, 0, // 2268: check Inst[15:8] == 0x0 |
| 1301 | OPC_Decode, 187, 11, 12, // 2272: decode to KDBR using decoder 12 |
| 1302 | // 2272: } |
| 1303 | 25, 8, // 2276: case 0x19: { |
| 1304 | OPC_CheckField, 8, 8, 0, // 2278: check Inst[15:8] == 0x0 |
| 1305 | OPC_Decode, 219, 5, 12, // 2282: decode to CDBR using decoder 12 |
| 1306 | // 2282: } |
| 1307 | 26, 8, // 2286: case 0x1a: { |
| 1308 | OPC_CheckField, 8, 8, 0, // 2288: check Inst[15:8] == 0x0 |
| 1309 | OPC_Decode, 176, 4, 16, // 2292: decode to ADBR using decoder 16 |
| 1310 | // 2292: } |
| 1311 | 27, 8, // 2296: case 0x1b: { |
| 1312 | OPC_CheckField, 8, 8, 0, // 2298: check Inst[15:8] == 0x0 |
| 1313 | OPC_Decode, 213, 16, 16, // 2302: decode to SDBR using decoder 16 |
| 1314 | // 2302: } |
| 1315 | 28, 8, // 2306: case 0x1c: { |
| 1316 | OPC_CheckField, 8, 8, 0, // 2308: check Inst[15:8] == 0x0 |
| 1317 | OPC_Decode, 254, 14, 16, // 2312: decode to MDBR using decoder 16 |
| 1318 | // 2312: } |
| 1319 | 29, 8, // 2316: case 0x1d: { |
| 1320 | OPC_CheckField, 8, 8, 0, // 2318: check Inst[15:8] == 0x0 |
| 1321 | OPC_Decode, 147, 10, 16, // 2322: decode to DDBR using decoder 16 |
| 1322 | // 2322: } |
| 1323 | 30, 8, // 2326: case 0x1e: { |
| 1324 | OPC_CheckField, 8, 4, 0, // 2328: check Inst[11:8] == 0x0 |
| 1325 | OPC_Decode, 239, 14, 82, // 2332: decode to MADBR using decoder 82 |
| 1326 | // 2332: } |
| 1327 | 31, 8, // 2336: case 0x1f: { |
| 1328 | OPC_CheckField, 8, 4, 0, // 2338: check Inst[11:8] == 0x0 |
| 1329 | OPC_Decode, 159, 15, 82, // 2342: decode to MSDBR using decoder 82 |
| 1330 | // 2342: } |
| 1331 | 36, 8, // 2346: case 0x24: { |
| 1332 | OPC_CheckField, 8, 8, 0, // 2348: check Inst[15:8] == 0x0 |
| 1333 | OPC_Decode, 250, 11, 77, // 2352: decode to LDER using decoder 77 |
| 1334 | // 2352: } |
| 1335 | 37, 8, // 2356: case 0x25: { |
| 1336 | OPC_CheckField, 8, 8, 0, // 2358: check Inst[15:8] == 0x0 |
| 1337 | OPC_Decode, 222, 14, 78, // 2362: decode to LXDR using decoder 78 |
| 1338 | // 2362: } |
| 1339 | 38, 8, // 2366: case 0x26: { |
| 1340 | OPC_CheckField, 8, 8, 0, // 2368: check Inst[15:8] == 0x0 |
| 1341 | OPC_Decode, 227, 14, 79, // 2372: decode to LXER using decoder 79 |
| 1342 | // 2372: } |
| 1343 | 46, 8, // 2376: case 0x2e: { |
| 1344 | OPC_CheckField, 8, 4, 0, // 2378: check Inst[11:8] == 0x0 |
| 1345 | OPC_Decode, 244, 14, 80, // 2382: decode to MAER using decoder 80 |
| 1346 | // 2382: } |
| 1347 | 47, 8, // 2386: case 0x2f: { |
| 1348 | OPC_CheckField, 8, 4, 0, // 2388: check Inst[11:8] == 0x0 |
| 1349 | OPC_Decode, 164, 15, 80, // 2392: decode to MSER using decoder 80 |
| 1350 | // 2392: } |
| 1351 | 54, 8, // 2396: case 0x36: { |
| 1352 | OPC_CheckField, 8, 8, 0, // 2398: check Inst[15:8] == 0x0 |
| 1353 | OPC_Decode, 217, 17, 81, // 2402: decode to SQXR using decoder 81 |
| 1354 | // 2402: } |
| 1355 | 55, 8, // 2406: case 0x37: { |
| 1356 | OPC_CheckField, 8, 8, 0, // 2408: check Inst[15:8] == 0x0 |
| 1357 | OPC_Decode, 138, 15, 19, // 2412: decode to MEER using decoder 19 |
| 1358 | // 2412: } |
| 1359 | 56, 8, // 2416: case 0x38: { |
| 1360 | OPC_CheckField, 8, 4, 0, // 2418: check Inst[11:8] == 0x0 |
| 1361 | OPC_Decode, 249, 14, 82, // 2422: decode to MAYLR using decoder 82 |
| 1362 | // 2422: } |
| 1363 | 57, 8, // 2426: case 0x39: { |
| 1364 | OPC_CheckField, 8, 4, 0, // 2428: check Inst[11:8] == 0x0 |
| 1365 | OPC_Decode, 211, 15, 83, // 2432: decode to MYLR using decoder 83 |
| 1366 | // 2432: } |
| 1367 | 58, 8, // 2436: case 0x3a: { |
| 1368 | OPC_CheckField, 8, 4, 0, // 2438: check Inst[11:8] == 0x0 |
| 1369 | OPC_Decode, 250, 14, 82, // 2442: decode to MAYR using decoder 82 |
| 1370 | // 2442: } |
| 1371 | 59, 8, // 2446: case 0x3b: { |
| 1372 | OPC_CheckField, 8, 4, 0, // 2448: check Inst[11:8] == 0x0 |
| 1373 | OPC_Decode, 212, 15, 84, // 2452: decode to MYR using decoder 84 |
| 1374 | // 2452: } |
| 1375 | 60, 8, // 2456: case 0x3c: { |
| 1376 | OPC_CheckField, 8, 4, 0, // 2458: check Inst[11:8] == 0x0 |
| 1377 | OPC_Decode, 247, 14, 82, // 2462: decode to MAYHR using decoder 82 |
| 1378 | // 2462: } |
| 1379 | 61, 8, // 2466: case 0x3d: { |
| 1380 | OPC_CheckField, 8, 4, 0, // 2468: check Inst[11:8] == 0x0 |
| 1381 | OPC_Decode, 209, 15, 83, // 2472: decode to MYHR using decoder 83 |
| 1382 | // 2472: } |
| 1383 | 62, 8, // 2476: case 0x3e: { |
| 1384 | OPC_CheckField, 8, 4, 0, // 2478: check Inst[11:8] == 0x0 |
| 1385 | OPC_Decode, 240, 14, 82, // 2482: decode to MADR using decoder 82 |
| 1386 | // 2482: } |
| 1387 | 63, 8, // 2486: case 0x3f: { |
| 1388 | OPC_CheckField, 8, 4, 0, // 2488: check Inst[11:8] == 0x0 |
| 1389 | OPC_Decode, 160, 15, 82, // 2492: decode to MSDR using decoder 82 |
| 1390 | // 2492: } |
| 1391 | 64, 8, // 2496: case 0x40: { |
| 1392 | OPC_CheckField, 8, 8, 0, // 2498: check Inst[15:8] == 0x0 |
| 1393 | OPC_Decode, 183, 14, 81, // 2502: decode to LPXBR using decoder 81 |
| 1394 | // 2502: } |
| 1395 | 65, 8, // 2506: case 0x41: { |
| 1396 | OPC_CheckField, 8, 8, 0, // 2508: check Inst[15:8] == 0x0 |
| 1397 | OPC_Decode, 220, 12, 81, // 2512: decode to LNXBR using decoder 81 |
| 1398 | // 2512: } |
| 1399 | 66, 8, // 2516: case 0x42: { |
| 1400 | OPC_CheckField, 8, 8, 0, // 2518: check Inst[15:8] == 0x0 |
| 1401 | OPC_Decode, 209, 14, 81, // 2522: decode to LTXBR using decoder 81 |
| 1402 | // 2522: } |
| 1403 | 67, 8, // 2526: case 0x43: { |
| 1404 | OPC_CheckField, 8, 8, 0, // 2528: check Inst[15:8] == 0x0 |
| 1405 | OPC_Decode, 243, 11, 81, // 2532: decode to LCXBR using decoder 81 |
| 1406 | // 2532: } |
| 1407 | 68, 16, // 2536: case 0x44: { |
| 1408 | OPC_Scope, 8, // 2538: try { |
| 1409 | OPC_CheckField, 8, 8, 0, // 2540: check Inst[15:8] == 0x0 |
| 1410 | OPC_Decode, 136, 12, 18, // 2544: decode to LEDBR using decoder 18 |
| 1411 | // 2544: } else try { |
| 1412 | OPC_CheckPredicate, 2, // 2548: check predicate 2 |
| 1413 | OPC_Decode, 137, 12, 85, // 2550: decode to LEDBRA using decoder 85 |
| 1414 | // 2550: } |
| 1415 | // 2550: } |
| 1416 | 69, 16, // 2554: case 0x45: { |
| 1417 | OPC_Scope, 8, // 2556: try { |
| 1418 | OPC_CheckField, 8, 8, 0, // 2558: check Inst[15:8] == 0x0 |
| 1419 | OPC_Decode, 128, 12, 81, // 2562: decode to LDXBR using decoder 81 |
| 1420 | // 2562: } else try { |
| 1421 | OPC_CheckPredicate, 2, // 2566: check predicate 2 |
| 1422 | OPC_Decode, 129, 12, 86, // 2568: decode to LDXBRA using decoder 86 |
| 1423 | // 2568: } |
| 1424 | // 2568: } |
| 1425 | 70, 16, // 2572: case 0x46: { |
| 1426 | OPC_Scope, 8, // 2574: try { |
| 1427 | OPC_CheckField, 8, 8, 0, // 2576: check Inst[15:8] == 0x0 |
| 1428 | OPC_Decode, 142, 12, 81, // 2580: decode to LEXBR using decoder 81 |
| 1429 | // 2580: } else try { |
| 1430 | OPC_CheckPredicate, 2, // 2584: check predicate 2 |
| 1431 | OPC_Decode, 143, 12, 86, // 2586: decode to LEXBRA using decoder 86 |
| 1432 | // 2586: } |
| 1433 | // 2586: } |
| 1434 | 71, 16, // 2590: case 0x47: { |
| 1435 | OPC_Scope, 8, // 2592: try { |
| 1436 | OPC_CheckField, 8, 4, 0, // 2594: check Inst[11:8] == 0x0 |
| 1437 | OPC_Decode, 205, 10, 87, // 2598: decode to FIXBR using decoder 87 |
| 1438 | // 2598: } else try { |
| 1439 | OPC_CheckPredicate, 2, // 2602: check predicate 2 |
| 1440 | OPC_Decode, 206, 10, 86, // 2604: decode to FIXBRA using decoder 86 |
| 1441 | // 2604: } |
| 1442 | // 2604: } |
| 1443 | 72, 8, // 2608: case 0x48: { |
| 1444 | OPC_CheckField, 8, 8, 0, // 2610: check Inst[15:8] == 0x0 |
| 1445 | OPC_Decode, 203, 11, 81, // 2614: decode to KXBR using decoder 81 |
| 1446 | // 2614: } |
| 1447 | 73, 8, // 2618: case 0x49: { |
| 1448 | OPC_CheckField, 8, 8, 0, // 2620: check Inst[15:8] == 0x0 |
| 1449 | OPC_Decode, 249, 9, 81, // 2624: decode to CXBR using decoder 81 |
| 1450 | // 2624: } |
| 1451 | 74, 8, // 2628: case 0x4a: { |
| 1452 | OPC_CheckField, 8, 8, 0, // 2630: check Inst[15:8] == 0x0 |
| 1453 | OPC_Decode, 233, 4, 14, // 2634: decode to AXBR using decoder 14 |
| 1454 | // 2634: } |
| 1455 | 75, 8, // 2638: case 0x4b: { |
| 1456 | OPC_CheckField, 8, 8, 0, // 2640: check Inst[15:8] == 0x0 |
| 1457 | OPC_Decode, 241, 18, 14, // 2644: decode to SXBR using decoder 14 |
| 1458 | // 2644: } |
| 1459 | 76, 8, // 2648: case 0x4c: { |
| 1460 | OPC_CheckField, 8, 8, 0, // 2650: check Inst[15:8] == 0x0 |
| 1461 | OPC_Decode, 199, 15, 14, // 2654: decode to MXBR using decoder 14 |
| 1462 | // 2654: } |
| 1463 | 77, 8, // 2658: case 0x4d: { |
| 1464 | OPC_CheckField, 8, 8, 0, // 2660: check Inst[15:8] == 0x0 |
| 1465 | OPC_Decode, 169, 10, 14, // 2664: decode to DXBR using decoder 14 |
| 1466 | // 2664: } |
| 1467 | 80, 8, // 2668: case 0x50: { |
| 1468 | OPC_CheckField, 8, 4, 0, // 2670: check Inst[11:8] == 0x0 |
| 1469 | OPC_Decode, 251, 18, 88, // 2674: decode to TBEDR using decoder 88 |
| 1470 | // 2674: } |
| 1471 | 81, 8, // 2678: case 0x51: { |
| 1472 | OPC_CheckField, 8, 4, 0, // 2680: check Inst[11:8] == 0x0 |
| 1473 | OPC_Decode, 250, 18, 89, // 2684: decode to TBDR using decoder 89 |
| 1474 | // 2684: } |
| 1475 | 83, 4, // 2688: case 0x53: { |
| 1476 | OPC_Decode, 158, 10, 90, // 2690: decode to DIEBR using decoder 90 |
| 1477 | // 2690: } |
| 1478 | 87, 16, // 2694: case 0x57: { |
| 1479 | OPC_Scope, 8, // 2696: try { |
| 1480 | OPC_CheckField, 8, 4, 0, // 2698: check Inst[11:8] == 0x0 |
| 1481 | OPC_Decode, 202, 10, 91, // 2702: decode to FIEBR using decoder 91 |
| 1482 | // 2702: } else try { |
| 1483 | OPC_CheckPredicate, 2, // 2706: check predicate 2 |
| 1484 | OPC_Decode, 203, 10, 92, // 2708: decode to FIEBRA using decoder 92 |
| 1485 | // 2708: } |
| 1486 | // 2708: } |
| 1487 | 88, 8, // 2712: case 0x58: { |
| 1488 | OPC_CheckField, 8, 8, 0, // 2714: check Inst[15:8] == 0x0 |
| 1489 | OPC_Decode, 136, 19, 77, // 2718: decode to THDER using decoder 77 |
| 1490 | // 2718: } |
| 1491 | 89, 8, // 2722: case 0x59: { |
| 1492 | OPC_CheckField, 8, 8, 0, // 2724: check Inst[15:8] == 0x0 |
| 1493 | OPC_Decode, 137, 19, 12, // 2728: decode to THDR using decoder 12 |
| 1494 | // 2728: } |
| 1495 | 91, 4, // 2732: case 0x5b: { |
| 1496 | OPC_Decode, 157, 10, 93, // 2734: decode to DIDBR using decoder 93 |
| 1497 | // 2734: } |
| 1498 | 95, 16, // 2738: case 0x5f: { |
| 1499 | OPC_Scope, 8, // 2740: try { |
| 1500 | OPC_CheckField, 8, 4, 0, // 2742: check Inst[11:8] == 0x0 |
| 1501 | OPC_Decode, 198, 10, 89, // 2746: decode to FIDBR using decoder 89 |
| 1502 | // 2746: } else try { |
| 1503 | OPC_CheckPredicate, 2, // 2750: check predicate 2 |
| 1504 | OPC_Decode, 199, 10, 94, // 2752: decode to FIDBRA using decoder 94 |
| 1505 | // 2752: } |
| 1506 | // 2752: } |
| 1507 | 96, 8, // 2756: case 0x60: { |
| 1508 | OPC_CheckField, 8, 8, 0, // 2758: check Inst[15:8] == 0x0 |
| 1509 | OPC_Decode, 184, 14, 81, // 2762: decode to LPXR using decoder 81 |
| 1510 | // 2762: } |
| 1511 | 97, 8, // 2766: case 0x61: { |
| 1512 | OPC_CheckField, 8, 8, 0, // 2768: check Inst[15:8] == 0x0 |
| 1513 | OPC_Decode, 221, 12, 81, // 2772: decode to LNXR using decoder 81 |
| 1514 | // 2772: } |
| 1515 | 98, 8, // 2776: case 0x62: { |
| 1516 | OPC_CheckField, 8, 8, 0, // 2778: check Inst[15:8] == 0x0 |
| 1517 | OPC_Decode, 210, 14, 81, // 2782: decode to LTXR using decoder 81 |
| 1518 | // 2782: } |
| 1519 | 99, 8, // 2786: case 0x63: { |
| 1520 | OPC_CheckField, 8, 8, 0, // 2788: check Inst[15:8] == 0x0 |
| 1521 | OPC_Decode, 244, 11, 81, // 2792: decode to LCXR using decoder 81 |
| 1522 | // 2792: } |
| 1523 | 101, 8, // 2796: case 0x65: { |
| 1524 | OPC_CheckField, 8, 8, 0, // 2798: check Inst[15:8] == 0x0 |
| 1525 | OPC_Decode, 228, 14, 81, // 2802: decode to LXR using decoder 81 |
| 1526 | // 2802: } |
| 1527 | 102, 8, // 2806: case 0x66: { |
| 1528 | OPC_CheckField, 8, 8, 0, // 2808: check Inst[15:8] == 0x0 |
| 1529 | OPC_Decode, 144, 12, 95, // 2812: decode to LEXR using decoder 95 |
| 1530 | // 2812: } |
| 1531 | 103, 8, // 2816: case 0x67: { |
| 1532 | OPC_CheckField, 8, 8, 0, // 2818: check Inst[15:8] == 0x0 |
| 1533 | OPC_Decode, 207, 10, 81, // 2822: decode to FIXR using decoder 81 |
| 1534 | // 2822: } |
| 1535 | 105, 8, // 2826: case 0x69: { |
| 1536 | OPC_CheckField, 8, 8, 0, // 2828: check Inst[15:8] == 0x0 |
| 1537 | OPC_Decode, 136, 10, 81, // 2832: decode to CXR using decoder 81 |
| 1538 | // 2832: } |
| 1539 | 112, 8, // 2836: case 0x70: { |
| 1540 | OPC_CheckField, 8, 8, 0, // 2838: check Inst[15:8] == 0x0 |
| 1541 | OPC_Decode, 167, 14, 12, // 2842: decode to LPDFR using decoder 12 |
| 1542 | // 2842: } |
| 1543 | 113, 8, // 2846: case 0x71: { |
| 1544 | OPC_CheckField, 8, 8, 0, // 2848: check Inst[15:8] == 0x0 |
| 1545 | OPC_Decode, 211, 12, 12, // 2852: decode to LNDFR using decoder 12 |
| 1546 | // 2852: } |
| 1547 | 114, 8, // 2856: case 0x72: { |
| 1548 | OPC_CheckField, 8, 4, 0, // 2858: check Inst[11:8] == 0x0 |
| 1549 | OPC_Decode, 159, 9, 96, // 2862: decode to CPSDRdd using decoder 96 |
| 1550 | // 2862: } |
| 1551 | 115, 8, // 2866: case 0x73: { |
| 1552 | OPC_CheckField, 8, 8, 0, // 2868: check Inst[15:8] == 0x0 |
| 1553 | OPC_Decode, 232, 11, 12, // 2872: decode to LCDFR using decoder 12 |
| 1554 | // 2872: } |
| 1555 | 116, 12, // 2876: case 0x74: { |
| 1556 | OPC_CheckField, 8, 8, 0, // 2878: check Inst[15:8] == 0x0 |
| 1557 | OPC_CheckField, 0, 4, 0, // 2882: check Inst[3:0] == 0x0 |
| 1558 | OPC_Decode, 231, 14, 97, // 2886: decode to LZER using decoder 97 |
| 1559 | // 2886: } |
| 1560 | 117, 12, // 2890: case 0x75: { |
| 1561 | OPC_CheckField, 8, 8, 0, // 2892: check Inst[15:8] == 0x0 |
| 1562 | OPC_CheckField, 0, 4, 0, // 2896: check Inst[3:0] == 0x0 |
| 1563 | OPC_Decode, 230, 14, 98, // 2900: decode to LZDR using decoder 98 |
| 1564 | // 2900: } |
| 1565 | 118, 12, // 2904: case 0x76: { |
| 1566 | OPC_CheckField, 8, 8, 0, // 2906: check Inst[15:8] == 0x0 |
| 1567 | OPC_CheckField, 0, 4, 0, // 2910: check Inst[3:0] == 0x0 |
| 1568 | OPC_Decode, 235, 14, 99, // 2914: decode to LZXR using decoder 99 |
| 1569 | // 2914: } |
| 1570 | 119, 8, // 2918: case 0x77: { |
| 1571 | OPC_CheckField, 8, 8, 0, // 2920: check Inst[15:8] == 0x0 |
| 1572 | OPC_Decode, 204, 10, 17, // 2924: decode to FIER using decoder 17 |
| 1573 | // 2924: } |
| 1574 | 127, 8, // 2928: case 0x7f: { |
| 1575 | OPC_CheckField, 8, 8, 0, // 2930: check Inst[15:8] == 0x0 |
| 1576 | OPC_Decode, 200, 10, 12, // 2934: decode to FIDR using decoder 12 |
| 1577 | // 2934: } |
| 1578 | 132, 1, 12, // 2938: case 0x84: { |
| 1579 | OPC_CheckField, 8, 8, 0, // 2941: check Inst[15:8] == 0x0 |
| 1580 | OPC_CheckField, 0, 4, 0, // 2945: check Inst[3:0] == 0x0 |
| 1581 | OPC_Decode, 160, 17, 1, // 2949: decode to SFPC using decoder 1 |
| 1582 | // 2949: } |
| 1583 | 133, 1, 12, // 2953: case 0x85: { |
| 1584 | OPC_CheckField, 8, 8, 0, // 2956: check Inst[15:8] == 0x0 |
| 1585 | OPC_CheckField, 0, 4, 0, // 2960: check Inst[3:0] == 0x0 |
| 1586 | OPC_Decode, 159, 17, 1, // 2964: decode to SFASR using decoder 1 |
| 1587 | // 2964: } |
| 1588 | 140, 1, 12, // 2968: case 0x8c: { |
| 1589 | OPC_CheckField, 8, 8, 0, // 2971: check Inst[15:8] == 0x0 |
| 1590 | OPC_CheckField, 0, 4, 0, // 2975: check Inst[3:0] == 0x0 |
| 1591 | OPC_Decode, 182, 10, 1, // 2979: decode to EFPC using decoder 1 |
| 1592 | // 2979: } |
| 1593 | 144, 1, 6, // 2983: case 0x90: { |
| 1594 | OPC_CheckPredicate, 2, // 2986: check predicate 2 |
| 1595 | OPC_Decode, 252, 5, 100, // 2988: decode to CELFBR using decoder 100 |
| 1596 | // 2988: } |
| 1597 | 145, 1, 6, // 2992: case 0x91: { |
| 1598 | OPC_CheckPredicate, 2, // 2995: check predicate 2 |
| 1599 | OPC_Decode, 229, 5, 101, // 2997: decode to CDLFBR using decoder 101 |
| 1600 | // 2997: } |
| 1601 | 146, 1, 6, // 3001: case 0x92: { |
| 1602 | OPC_CheckPredicate, 2, // 3004: check predicate 2 |
| 1603 | OPC_Decode, 131, 10, 102, // 3006: decode to CXLFBR using decoder 102 |
| 1604 | // 3006: } |
| 1605 | 148, 1, 16, // 3010: case 0x94: { |
| 1606 | OPC_Scope, 8, // 3013: try { |
| 1607 | OPC_CheckField, 8, 8, 0, // 3015: check Inst[15:8] == 0x0 |
| 1608 | OPC_Decode, 246, 5, 103, // 3019: decode to CEFBR using decoder 103 |
| 1609 | // 3019: } else try { |
| 1610 | OPC_CheckPredicate, 2, // 3023: check predicate 2 |
| 1611 | OPC_Decode, 247, 5, 100, // 3025: decode to CEFBRA using decoder 100 |
| 1612 | // 3025: } |
| 1613 | // 3025: } |
| 1614 | 149, 1, 16, // 3029: case 0x95: { |
| 1615 | OPC_Scope, 8, // 3032: try { |
| 1616 | OPC_CheckField, 8, 8, 0, // 3034: check Inst[15:8] == 0x0 |
| 1617 | OPC_Decode, 220, 5, 104, // 3038: decode to CDFBR using decoder 104 |
| 1618 | // 3038: } else try { |
| 1619 | OPC_CheckPredicate, 2, // 3042: check predicate 2 |
| 1620 | OPC_Decode, 221, 5, 101, // 3044: decode to CDFBRA using decoder 101 |
| 1621 | // 3044: } |
| 1622 | // 3044: } |
| 1623 | 150, 1, 16, // 3048: case 0x96: { |
| 1624 | OPC_Scope, 8, // 3051: try { |
| 1625 | OPC_CheckField, 8, 8, 0, // 3053: check Inst[15:8] == 0x0 |
| 1626 | OPC_Decode, 250, 9, 105, // 3057: decode to CXFBR using decoder 105 |
| 1627 | // 3057: } else try { |
| 1628 | OPC_CheckPredicate, 2, // 3061: check predicate 2 |
| 1629 | OPC_Decode, 251, 9, 102, // 3063: decode to CXFBRA using decoder 102 |
| 1630 | // 3063: } |
| 1631 | // 3063: } |
| 1632 | 152, 1, 16, // 3067: case 0x98: { |
| 1633 | OPC_Scope, 8, // 3070: try { |
| 1634 | OPC_CheckField, 8, 4, 0, // 3072: check Inst[11:8] == 0x0 |
| 1635 | OPC_Decode, 133, 6, 106, // 3076: decode to CFEBR using decoder 106 |
| 1636 | // 3076: } else try { |
| 1637 | OPC_CheckPredicate, 2, // 3080: check predicate 2 |
| 1638 | OPC_Decode, 134, 6, 107, // 3082: decode to CFEBRA using decoder 107 |
| 1639 | // 3082: } |
| 1640 | // 3082: } |
| 1641 | 153, 1, 16, // 3086: case 0x99: { |
| 1642 | OPC_Scope, 8, // 3089: try { |
| 1643 | OPC_CheckField, 8, 4, 0, // 3091: check Inst[11:8] == 0x0 |
| 1644 | OPC_Decode, 129, 6, 108, // 3095: decode to CFDBR using decoder 108 |
| 1645 | // 3095: } else try { |
| 1646 | OPC_CheckPredicate, 2, // 3099: check predicate 2 |
| 1647 | OPC_Decode, 130, 6, 109, // 3101: decode to CFDBRA using decoder 109 |
| 1648 | // 3101: } |
| 1649 | // 3101: } |
| 1650 | 154, 1, 16, // 3105: case 0x9a: { |
| 1651 | OPC_Scope, 8, // 3108: try { |
| 1652 | OPC_CheckField, 8, 4, 0, // 3110: check Inst[11:8] == 0x0 |
| 1653 | OPC_Decode, 137, 6, 110, // 3114: decode to CFXBR using decoder 110 |
| 1654 | // 3114: } else try { |
| 1655 | OPC_CheckPredicate, 2, // 3118: check predicate 2 |
| 1656 | OPC_Decode, 138, 6, 111, // 3120: decode to CFXBRA using decoder 111 |
| 1657 | // 3120: } |
| 1658 | // 3120: } |
| 1659 | 156, 1, 6, // 3124: case 0x9c: { |
| 1660 | OPC_CheckPredicate, 2, // 3127: check predicate 2 |
| 1661 | OPC_Decode, 181, 7, 107, // 3129: decode to CLFEBR using decoder 107 |
| 1662 | // 3129: } |
| 1663 | 157, 1, 6, // 3133: case 0x9d: { |
| 1664 | OPC_CheckPredicate, 2, // 3136: check predicate 2 |
| 1665 | OPC_Decode, 179, 7, 109, // 3138: decode to CLFDBR using decoder 109 |
| 1666 | // 3138: } |
| 1667 | 158, 1, 6, // 3142: case 0x9e: { |
| 1668 | OPC_CheckPredicate, 2, // 3145: check predicate 2 |
| 1669 | OPC_Decode, 198, 7, 111, // 3147: decode to CLFXBR using decoder 111 |
| 1670 | // 3147: } |
| 1671 | 160, 1, 6, // 3151: case 0xa0: { |
| 1672 | OPC_CheckPredicate, 2, // 3154: check predicate 2 |
| 1673 | OPC_Decode, 253, 5, 112, // 3156: decode to CELGBR using decoder 112 |
| 1674 | // 3156: } |
| 1675 | 161, 1, 6, // 3160: case 0xa1: { |
| 1676 | OPC_CheckPredicate, 2, // 3163: check predicate 2 |
| 1677 | OPC_Decode, 231, 5, 113, // 3165: decode to CDLGBR using decoder 113 |
| 1678 | // 3165: } |
| 1679 | 162, 1, 6, // 3169: case 0xa2: { |
| 1680 | OPC_CheckPredicate, 2, // 3172: check predicate 2 |
| 1681 | OPC_Decode, 133, 10, 114, // 3174: decode to CXLGBR using decoder 114 |
| 1682 | // 3174: } |
| 1683 | 164, 1, 16, // 3178: case 0xa4: { |
| 1684 | OPC_Scope, 8, // 3181: try { |
| 1685 | OPC_CheckField, 8, 8, 0, // 3183: check Inst[15:8] == 0x0 |
| 1686 | OPC_Decode, 249, 5, 115, // 3187: decode to CEGBR using decoder 115 |
| 1687 | // 3187: } else try { |
| 1688 | OPC_CheckPredicate, 2, // 3191: check predicate 2 |
| 1689 | OPC_Decode, 250, 5, 112, // 3193: decode to CEGBRA using decoder 112 |
| 1690 | // 3193: } |
| 1691 | // 3193: } |
| 1692 | 165, 1, 16, // 3197: case 0xa5: { |
| 1693 | OPC_Scope, 8, // 3200: try { |
| 1694 | OPC_CheckField, 8, 8, 0, // 3202: check Inst[15:8] == 0x0 |
| 1695 | OPC_Decode, 224, 5, 116, // 3206: decode to CDGBR using decoder 116 |
| 1696 | // 3206: } else try { |
| 1697 | OPC_CheckPredicate, 2, // 3210: check predicate 2 |
| 1698 | OPC_Decode, 225, 5, 113, // 3212: decode to CDGBRA using decoder 113 |
| 1699 | // 3212: } |
| 1700 | // 3212: } |
| 1701 | 166, 1, 16, // 3216: case 0xa6: { |
| 1702 | OPC_Scope, 8, // 3219: try { |
| 1703 | OPC_CheckField, 8, 8, 0, // 3221: check Inst[15:8] == 0x0 |
| 1704 | OPC_Decode, 254, 9, 117, // 3225: decode to CXGBR using decoder 117 |
| 1705 | // 3225: } else try { |
| 1706 | OPC_CheckPredicate, 2, // 3229: check predicate 2 |
| 1707 | OPC_Decode, 255, 9, 114, // 3231: decode to CXGBRA using decoder 114 |
| 1708 | // 3231: } |
| 1709 | // 3231: } |
| 1710 | 168, 1, 16, // 3235: case 0xa8: { |
| 1711 | OPC_Scope, 8, // 3238: try { |
| 1712 | OPC_CheckField, 8, 4, 0, // 3240: check Inst[11:8] == 0x0 |
| 1713 | OPC_Decode, 147, 6, 118, // 3244: decode to CGEBR using decoder 118 |
| 1714 | // 3244: } else try { |
| 1715 | OPC_CheckPredicate, 2, // 3248: check predicate 2 |
| 1716 | OPC_Decode, 148, 6, 119, // 3250: decode to CGEBRA using decoder 119 |
| 1717 | // 3250: } |
| 1718 | // 3250: } |
| 1719 | 169, 1, 16, // 3254: case 0xa9: { |
| 1720 | OPC_Scope, 8, // 3257: try { |
| 1721 | OPC_CheckField, 8, 4, 0, // 3259: check Inst[11:8] == 0x0 |
| 1722 | OPC_Decode, 142, 6, 120, // 3263: decode to CGDBR using decoder 120 |
| 1723 | // 3263: } else try { |
| 1724 | OPC_CheckPredicate, 2, // 3267: check predicate 2 |
| 1725 | OPC_Decode, 143, 6, 121, // 3269: decode to CGDBRA using decoder 121 |
| 1726 | // 3269: } |
| 1727 | // 3269: } |
| 1728 | 170, 1, 16, // 3273: case 0xaa: { |
| 1729 | OPC_Scope, 8, // 3276: try { |
| 1730 | OPC_CheckField, 8, 4, 0, // 3278: check Inst[11:8] == 0x0 |
| 1731 | OPC_Decode, 244, 6, 122, // 3282: decode to CGXBR using decoder 122 |
| 1732 | // 3282: } else try { |
| 1733 | OPC_CheckPredicate, 2, // 3286: check predicate 2 |
| 1734 | OPC_Decode, 245, 6, 123, // 3288: decode to CGXBRA using decoder 123 |
| 1735 | // 3288: } |
| 1736 | // 3288: } |
| 1737 | 172, 1, 6, // 3292: case 0xac: { |
| 1738 | OPC_CheckPredicate, 2, // 3295: check predicate 2 |
| 1739 | OPC_Decode, 203, 7, 119, // 3297: decode to CLGEBR using decoder 119 |
| 1740 | // 3297: } |
| 1741 | 173, 1, 6, // 3301: case 0xad: { |
| 1742 | OPC_CheckPredicate, 2, // 3304: check predicate 2 |
| 1743 | OPC_Decode, 201, 7, 121, // 3306: decode to CLGDBR using decoder 121 |
| 1744 | // 3306: } |
| 1745 | 174, 1, 6, // 3310: case 0xae: { |
| 1746 | OPC_CheckPredicate, 2, // 3313: check predicate 2 |
| 1747 | OPC_Decode, 182, 8, 123, // 3315: decode to CLGXBR using decoder 123 |
| 1748 | // 3315: } |
| 1749 | 180, 1, 8, // 3319: case 0xb4: { |
| 1750 | OPC_CheckField, 8, 8, 0, // 3322: check Inst[15:8] == 0x0 |
| 1751 | OPC_Decode, 248, 5, 103, // 3326: decode to CEFR using decoder 103 |
| 1752 | // 3326: } |
| 1753 | 181, 1, 8, // 3330: case 0xb5: { |
| 1754 | OPC_CheckField, 8, 8, 0, // 3333: check Inst[15:8] == 0x0 |
| 1755 | OPC_Decode, 222, 5, 104, // 3337: decode to CDFR using decoder 104 |
| 1756 | // 3337: } |
| 1757 | 182, 1, 8, // 3341: case 0xb6: { |
| 1758 | OPC_CheckField, 8, 8, 0, // 3344: check Inst[15:8] == 0x0 |
| 1759 | OPC_Decode, 252, 9, 105, // 3348: decode to CXFR using decoder 105 |
| 1760 | // 3348: } |
| 1761 | 184, 1, 8, // 3352: case 0xb8: { |
| 1762 | OPC_CheckField, 8, 4, 0, // 3355: check Inst[11:8] == 0x0 |
| 1763 | OPC_Decode, 135, 6, 106, // 3359: decode to CFER using decoder 106 |
| 1764 | // 3359: } |
| 1765 | 185, 1, 8, // 3363: case 0xb9: { |
| 1766 | OPC_CheckField, 8, 4, 0, // 3366: check Inst[11:8] == 0x0 |
| 1767 | OPC_Decode, 131, 6, 108, // 3370: decode to CFDR using decoder 108 |
| 1768 | // 3370: } |
| 1769 | 186, 1, 8, // 3374: case 0xba: { |
| 1770 | OPC_CheckField, 8, 4, 0, // 3377: check Inst[11:8] == 0x0 |
| 1771 | OPC_Decode, 139, 6, 110, // 3381: decode to CFXR using decoder 110 |
| 1772 | // 3381: } |
| 1773 | 193, 1, 8, // 3385: case 0xc1: { |
| 1774 | OPC_CheckField, 8, 8, 0, // 3388: check Inst[15:8] == 0x0 |
| 1775 | OPC_Decode, 252, 11, 116, // 3392: decode to LDGR using decoder 116 |
| 1776 | // 3392: } |
| 1777 | 196, 1, 8, // 3396: case 0xc4: { |
| 1778 | OPC_CheckField, 8, 8, 0, // 3399: check Inst[15:8] == 0x0 |
| 1779 | OPC_Decode, 251, 5, 115, // 3403: decode to CEGR using decoder 115 |
| 1780 | // 3403: } |
| 1781 | 197, 1, 8, // 3407: case 0xc5: { |
| 1782 | OPC_CheckField, 8, 8, 0, // 3410: check Inst[15:8] == 0x0 |
| 1783 | OPC_Decode, 226, 5, 116, // 3414: decode to CDGR using decoder 116 |
| 1784 | // 3414: } |
| 1785 | 198, 1, 8, // 3418: case 0xc6: { |
| 1786 | OPC_CheckField, 8, 8, 0, // 3421: check Inst[15:8] == 0x0 |
| 1787 | OPC_Decode, 128, 10, 117, // 3425: decode to CXGR using decoder 117 |
| 1788 | // 3425: } |
| 1789 | 200, 1, 8, // 3429: case 0xc8: { |
| 1790 | OPC_CheckField, 8, 4, 0, // 3432: check Inst[11:8] == 0x0 |
| 1791 | OPC_Decode, 149, 6, 118, // 3436: decode to CGER using decoder 118 |
| 1792 | // 3436: } |
| 1793 | 201, 1, 8, // 3440: case 0xc9: { |
| 1794 | OPC_CheckField, 8, 4, 0, // 3443: check Inst[11:8] == 0x0 |
| 1795 | OPC_Decode, 144, 6, 120, // 3447: decode to CGDR using decoder 120 |
| 1796 | // 3447: } |
| 1797 | 202, 1, 8, // 3451: case 0xca: { |
| 1798 | OPC_CheckField, 8, 4, 0, // 3454: check Inst[11:8] == 0x0 |
| 1799 | OPC_Decode, 246, 6, 122, // 3458: decode to CGXR using decoder 122 |
| 1800 | // 3458: } |
| 1801 | 205, 1, 8, // 3462: case 0xcd: { |
| 1802 | OPC_CheckField, 8, 8, 0, // 3465: check Inst[15:8] == 0x0 |
| 1803 | OPC_Decode, 154, 12, 124, // 3469: decode to LGDR using decoder 124 |
| 1804 | // 3469: } |
| 1805 | 208, 1, 16, // 3473: case 0xd0: { |
| 1806 | OPC_Scope, 8, // 3476: try { |
| 1807 | OPC_CheckField, 8, 4, 0, // 3478: check Inst[11:8] == 0x0 |
| 1808 | OPC_Decode, 132, 15, 96, // 3482: decode to MDTR using decoder 96 |
| 1809 | // 3482: } else try { |
| 1810 | OPC_CheckPredicate, 2, // 3486: check predicate 2 |
| 1811 | OPC_Decode, 133, 15, 125, // 3488: decode to MDTRA using decoder 125 |
| 1812 | // 3488: } |
| 1813 | // 3488: } |
| 1814 | 209, 1, 16, // 3492: case 0xd1: { |
| 1815 | OPC_Scope, 8, // 3495: try { |
| 1816 | OPC_CheckField, 8, 4, 0, // 3497: check Inst[11:8] == 0x0 |
| 1817 | OPC_Decode, 149, 10, 96, // 3501: decode to DDTR using decoder 96 |
| 1818 | // 3501: } else try { |
| 1819 | OPC_CheckPredicate, 2, // 3505: check predicate 2 |
| 1820 | OPC_Decode, 150, 10, 125, // 3507: decode to DDTRA using decoder 125 |
| 1821 | // 3507: } |
| 1822 | // 3507: } |
| 1823 | 210, 1, 16, // 3511: case 0xd2: { |
| 1824 | OPC_Scope, 8, // 3514: try { |
| 1825 | OPC_CheckField, 8, 4, 0, // 3516: check Inst[11:8] == 0x0 |
| 1826 | OPC_Decode, 178, 4, 96, // 3520: decode to ADTR using decoder 96 |
| 1827 | // 3520: } else try { |
| 1828 | OPC_CheckPredicate, 2, // 3524: check predicate 2 |
| 1829 | OPC_Decode, 179, 4, 125, // 3526: decode to ADTRA using decoder 125 |
| 1830 | // 3526: } |
| 1831 | // 3526: } |
| 1832 | 211, 1, 16, // 3530: case 0xd3: { |
| 1833 | OPC_Scope, 8, // 3533: try { |
| 1834 | OPC_CheckField, 8, 4, 0, // 3535: check Inst[11:8] == 0x0 |
| 1835 | OPC_Decode, 215, 16, 96, // 3539: decode to SDTR using decoder 96 |
| 1836 | // 3539: } else try { |
| 1837 | OPC_CheckPredicate, 2, // 3543: check predicate 2 |
| 1838 | OPC_Decode, 216, 16, 125, // 3545: decode to SDTRA using decoder 125 |
| 1839 | // 3545: } |
| 1840 | // 3545: } |
| 1841 | 212, 1, 8, // 3549: case 0xd4: { |
| 1842 | OPC_CheckField, 12, 4, 0, // 3552: check Inst[15:12] == 0x0 |
| 1843 | OPC_Decode, 251, 11, 126, // 3556: decode to LDETR using decoder 126 |
| 1844 | // 3556: } |
| 1845 | 213, 1, 4, // 3560: case 0xd5: { |
| 1846 | OPC_Decode, 139, 12, 85, // 3563: decode to LEDTR using decoder 85 |
| 1847 | // 3563: } |
| 1848 | 214, 1, 8, // 3567: case 0xd6: { |
| 1849 | OPC_CheckField, 8, 8, 0, // 3570: check Inst[15:8] == 0x0 |
| 1850 | OPC_Decode, 201, 14, 12, // 3574: decode to LTDTR using decoder 12 |
| 1851 | // 3574: } |
| 1852 | 215, 1, 4, // 3578: case 0xd7: { |
| 1853 | OPC_Decode, 201, 10, 94, // 3581: decode to FIDTR using decoder 94 |
| 1854 | // 3581: } |
| 1855 | 216, 1, 17, // 3585: case 0xd8: { |
| 1856 | OPC_Scope, 8, // 3588: try { |
| 1857 | OPC_CheckField, 8, 4, 0, // 3590: check Inst[11:8] == 0x0 |
| 1858 | OPC_Decode, 205, 15, 127, // 3594: decode to MXTR using decoder 127 |
| 1859 | // 3594: } else try { |
| 1860 | OPC_CheckPredicate, 2, // 3598: check predicate 2 |
| 1861 | OPC_Decode, 206, 15, 128, 1, // 3600: decode to MXTRA using decoder 128 |
| 1862 | // 3600: } |
| 1863 | // 3600: } |
| 1864 | 217, 1, 17, // 3605: case 0xd9: { |
| 1865 | OPC_Scope, 8, // 3608: try { |
| 1866 | OPC_CheckField, 8, 4, 0, // 3610: check Inst[11:8] == 0x0 |
| 1867 | OPC_Decode, 171, 10, 127, // 3614: decode to DXTR using decoder 127 |
| 1868 | // 3614: } else try { |
| 1869 | OPC_CheckPredicate, 2, // 3618: check predicate 2 |
| 1870 | OPC_Decode, 172, 10, 128, 1, // 3620: decode to DXTRA using decoder 128 |
| 1871 | // 3620: } |
| 1872 | // 3620: } |
| 1873 | 218, 1, 17, // 3625: case 0xda: { |
| 1874 | OPC_Scope, 8, // 3628: try { |
| 1875 | OPC_CheckField, 8, 4, 0, // 3630: check Inst[11:8] == 0x0 |
| 1876 | OPC_Decode, 235, 4, 127, // 3634: decode to AXTR using decoder 127 |
| 1877 | // 3634: } else try { |
| 1878 | OPC_CheckPredicate, 2, // 3638: check predicate 2 |
| 1879 | OPC_Decode, 236, 4, 128, 1, // 3640: decode to AXTRA using decoder 128 |
| 1880 | // 3640: } |
| 1881 | // 3640: } |
| 1882 | 219, 1, 17, // 3645: case 0xdb: { |
| 1883 | OPC_Scope, 8, // 3648: try { |
| 1884 | OPC_CheckField, 8, 4, 0, // 3650: check Inst[11:8] == 0x0 |
| 1885 | OPC_Decode, 243, 18, 127, // 3654: decode to SXTR using decoder 127 |
| 1886 | // 3654: } else try { |
| 1887 | OPC_CheckPredicate, 2, // 3658: check predicate 2 |
| 1888 | OPC_Decode, 244, 18, 128, 1, // 3660: decode to SXTRA using decoder 128 |
| 1889 | // 3660: } |
| 1890 | // 3660: } |
| 1891 | 220, 1, 9, // 3665: case 0xdc: { |
| 1892 | OPC_CheckField, 12, 4, 0, // 3668: check Inst[15:12] == 0x0 |
| 1893 | OPC_Decode, 223, 14, 129, 1, // 3672: decode to LXDTR using decoder 129 |
| 1894 | // 3672: } |
| 1895 | 221, 1, 4, // 3677: case 0xdd: { |
| 1896 | OPC_Decode, 131, 12, 86, // 3680: decode to LDXTR using decoder 86 |
| 1897 | // 3680: } |
| 1898 | 222, 1, 8, // 3684: case 0xde: { |
| 1899 | OPC_CheckField, 8, 8, 0, // 3687: check Inst[15:8] == 0x0 |
| 1900 | OPC_Decode, 211, 14, 81, // 3691: decode to LTXTR using decoder 81 |
| 1901 | // 3691: } |
| 1902 | 223, 1, 4, // 3695: case 0xdf: { |
| 1903 | OPC_Decode, 208, 10, 86, // 3698: decode to FIXTR using decoder 86 |
| 1904 | // 3698: } |
| 1905 | 224, 1, 8, // 3702: case 0xe0: { |
| 1906 | OPC_CheckField, 8, 8, 0, // 3705: check Inst[15:8] == 0x0 |
| 1907 | OPC_Decode, 189, 11, 12, // 3709: decode to KDTR using decoder 12 |
| 1908 | // 3709: } |
| 1909 | 225, 1, 16, // 3713: case 0xe1: { |
| 1910 | OPC_Scope, 8, // 3716: try { |
| 1911 | OPC_CheckField, 8, 4, 0, // 3718: check Inst[11:8] == 0x0 |
| 1912 | OPC_Decode, 145, 6, 120, // 3722: decode to CGDTR using decoder 120 |
| 1913 | // 3722: } else try { |
| 1914 | OPC_CheckPredicate, 2, // 3726: check predicate 2 |
| 1915 | OPC_Decode, 146, 6, 121, // 3728: decode to CGDTRA using decoder 121 |
| 1916 | // 3728: } |
| 1917 | // 3728: } |
| 1918 | 226, 1, 8, // 3732: case 0xe2: { |
| 1919 | OPC_CheckField, 8, 8, 0, // 3735: check Inst[15:8] == 0x0 |
| 1920 | OPC_Decode, 236, 9, 124, // 3739: decode to CUDTR using decoder 124 |
| 1921 | // 3739: } |
| 1922 | 227, 1, 9, // 3743: case 0xe3: { |
| 1923 | OPC_CheckField, 12, 4, 0, // 3746: check Inst[15:12] == 0x0 |
| 1924 | OPC_Decode, 218, 9, 130, 1, // 3750: decode to CSDTR using decoder 130 |
| 1925 | // 3750: } |
| 1926 | 228, 1, 8, // 3755: case 0xe4: { |
| 1927 | OPC_CheckField, 8, 8, 0, // 3758: check Inst[15:8] == 0x0 |
| 1928 | OPC_Decode, 239, 5, 12, // 3762: decode to CDTR using decoder 12 |
| 1929 | // 3762: } |
| 1930 | 229, 1, 8, // 3766: case 0xe5: { |
| 1931 | OPC_CheckField, 8, 8, 0, // 3769: check Inst[15:8] == 0x0 |
| 1932 | OPC_Decode, 180, 10, 124, // 3773: decode to EEDTR using decoder 124 |
| 1933 | // 3773: } |
| 1934 | 231, 1, 8, // 3777: case 0xe7: { |
| 1935 | OPC_CheckField, 8, 8, 0, // 3780: check Inst[15:8] == 0x0 |
| 1936 | OPC_Decode, 191, 10, 124, // 3784: decode to ESDTR using decoder 124 |
| 1937 | // 3784: } |
| 1938 | 232, 1, 8, // 3788: case 0xe8: { |
| 1939 | OPC_CheckField, 8, 8, 0, // 3791: check Inst[15:8] == 0x0 |
| 1940 | OPC_Decode, 204, 11, 81, // 3795: decode to KXTR using decoder 81 |
| 1941 | // 3795: } |
| 1942 | 233, 1, 16, // 3799: case 0xe9: { |
| 1943 | OPC_Scope, 8, // 3802: try { |
| 1944 | OPC_CheckField, 8, 4, 0, // 3804: check Inst[11:8] == 0x0 |
| 1945 | OPC_Decode, 247, 6, 122, // 3808: decode to CGXTR using decoder 122 |
| 1946 | // 3808: } else try { |
| 1947 | OPC_CheckPredicate, 2, // 3812: check predicate 2 |
| 1948 | OPC_Decode, 248, 6, 123, // 3814: decode to CGXTRA using decoder 123 |
| 1949 | // 3814: } |
| 1950 | // 3814: } |
| 1951 | 234, 1, 9, // 3818: case 0xea: { |
| 1952 | OPC_CheckField, 8, 8, 0, // 3821: check Inst[15:8] == 0x0 |
| 1953 | OPC_Decode, 242, 9, 131, 1, // 3825: decode to CUXTR using decoder 131 |
| 1954 | // 3825: } |
| 1955 | 235, 1, 9, // 3830: case 0xeb: { |
| 1956 | OPC_CheckField, 12, 4, 0, // 3833: check Inst[15:12] == 0x0 |
| 1957 | OPC_Decode, 223, 9, 132, 1, // 3837: decode to CSXTR using decoder 132 |
| 1958 | // 3837: } |
| 1959 | 236, 1, 8, // 3842: case 0xec: { |
| 1960 | OPC_CheckField, 8, 8, 0, // 3845: check Inst[15:8] == 0x0 |
| 1961 | OPC_Decode, 138, 10, 81, // 3849: decode to CXTR using decoder 81 |
| 1962 | // 3849: } |
| 1963 | 237, 1, 9, // 3853: case 0xed: { |
| 1964 | OPC_CheckField, 8, 8, 0, // 3856: check Inst[15:8] == 0x0 |
| 1965 | OPC_Decode, 181, 10, 133, 1, // 3860: decode to EEXTR using decoder 133 |
| 1966 | // 3860: } |
| 1967 | 239, 1, 9, // 3865: case 0xef: { |
| 1968 | OPC_CheckField, 8, 8, 0, // 3868: check Inst[15:8] == 0x0 |
| 1969 | OPC_Decode, 194, 10, 133, 1, // 3872: decode to ESXTR using decoder 133 |
| 1970 | // 3872: } |
| 1971 | 241, 1, 16, // 3877: case 0xf1: { |
| 1972 | OPC_Scope, 8, // 3880: try { |
| 1973 | OPC_CheckField, 8, 8, 0, // 3882: check Inst[15:8] == 0x0 |
| 1974 | OPC_Decode, 227, 5, 116, // 3886: decode to CDGTR using decoder 116 |
| 1975 | // 3886: } else try { |
| 1976 | OPC_CheckPredicate, 2, // 3890: check predicate 2 |
| 1977 | OPC_Decode, 228, 5, 113, // 3892: decode to CDGTRA using decoder 113 |
| 1978 | // 3892: } |
| 1979 | // 3892: } |
| 1980 | 242, 1, 8, // 3896: case 0xf2: { |
| 1981 | OPC_CheckField, 8, 8, 0, // 3899: check Inst[15:8] == 0x0 |
| 1982 | OPC_Decode, 240, 5, 116, // 3903: decode to CDUTR using decoder 116 |
| 1983 | // 3903: } |
| 1984 | 243, 1, 8, // 3907: case 0xf3: { |
| 1985 | OPC_CheckField, 8, 8, 0, // 3910: check Inst[15:8] == 0x0 |
| 1986 | OPC_Decode, 237, 5, 116, // 3914: decode to CDSTR using decoder 116 |
| 1987 | // 3914: } |
| 1988 | 244, 1, 8, // 3918: case 0xf4: { |
| 1989 | OPC_CheckField, 8, 8, 0, // 3921: check Inst[15:8] == 0x0 |
| 1990 | OPC_Decode, 245, 5, 12, // 3925: decode to CEDTR using decoder 12 |
| 1991 | // 3925: } |
| 1992 | 245, 1, 4, // 3929: case 0xf5: { |
| 1993 | OPC_Decode, 162, 16, 93, // 3932: decode to QADTR using decoder 93 |
| 1994 | // 3932: } |
| 1995 | 246, 1, 9, // 3936: case 0xf6: { |
| 1996 | OPC_CheckField, 8, 4, 0, // 3939: check Inst[11:8] == 0x0 |
| 1997 | OPC_Decode, 223, 10, 134, 1, // 3943: decode to IEDTR using decoder 134 |
| 1998 | // 3943: } |
| 1999 | 247, 1, 5, // 3948: case 0xf7: { |
| 2000 | OPC_Decode, 193, 16, 135, 1, // 3951: decode to RRDTR using decoder 135 |
| 2001 | // 3951: } |
| 2002 | 249, 1, 16, // 3956: case 0xf9: { |
| 2003 | OPC_Scope, 8, // 3959: try { |
| 2004 | OPC_CheckField, 8, 8, 0, // 3961: check Inst[15:8] == 0x0 |
| 2005 | OPC_Decode, 129, 10, 117, // 3965: decode to CXGTR using decoder 117 |
| 2006 | // 3965: } else try { |
| 2007 | OPC_CheckPredicate, 2, // 3969: check predicate 2 |
| 2008 | OPC_Decode, 130, 10, 114, // 3971: decode to CXGTRA using decoder 114 |
| 2009 | // 3971: } |
| 2010 | // 3971: } |
| 2011 | 250, 1, 9, // 3975: case 0xfa: { |
| 2012 | OPC_CheckField, 8, 8, 0, // 3978: check Inst[15:8] == 0x0 |
| 2013 | OPC_Decode, 139, 10, 136, 1, // 3982: decode to CXUTR using decoder 136 |
| 2014 | // 3982: } |
| 2015 | 251, 1, 9, // 3987: case 0xfb: { |
| 2016 | OPC_CheckField, 8, 8, 0, // 3990: check Inst[15:8] == 0x0 |
| 2017 | OPC_Decode, 137, 10, 136, 1, // 3994: decode to CXSTR using decoder 136 |
| 2018 | // 3994: } |
| 2019 | 252, 1, 8, // 3999: case 0xfc: { |
| 2020 | OPC_CheckField, 8, 8, 0, // 4002: check Inst[15:8] == 0x0 |
| 2021 | OPC_Decode, 255, 5, 81, // 4006: decode to CEXTR using decoder 81 |
| 2022 | // 4006: } |
| 2023 | 253, 1, 5, // 4010: case 0xfd: { |
| 2024 | OPC_Decode, 163, 16, 137, 1, // 4013: decode to QAXTR using decoder 137 |
| 2025 | // 4013: } |
| 2026 | 254, 1, 9, // 4018: case 0xfe: { |
| 2027 | OPC_CheckField, 8, 4, 0, // 4021: check Inst[11:8] == 0x0 |
| 2028 | OPC_Decode, 224, 10, 138, 1, // 4025: decode to IEXTR using decoder 138 |
| 2029 | // 4025: } |
| 2030 | 255, 1, 0, // 4030: case 0xff: { |
| 2031 | OPC_Decode, 194, 16, 139, 1, // 4033: decode to RRXTR using decoder 139 |
| 2032 | // 4033: } |
| 2033 | // 4033: } // switch Inst[23:16] |
| 2034 | // 4033: } |
| 2035 | 182, 1, 5, // 4038: case 0xb6: { |
| 2036 | OPC_Decode, 131, 18, 140, 1, // 4041: decode to STCTL using decoder 140 |
| 2037 | // 4041: } |
| 2038 | 183, 1, 5, // 4046: case 0xb7: { |
| 2039 | OPC_Decode, 241, 11, 140, 1, // 4049: decode to LCTL using decoder 140 |
| 2040 | // 4049: } |
| 2041 | 185, 1, 191, 23, // 4054: case 0xb9: { |
| 2042 | OPC_SwitchField, 16, 8, // 4058: switch Inst[23:16] { |
| 2043 | 0, 8, // 4061: case 0x0: { |
| 2044 | OPC_CheckField, 8, 8, 0, // 4063: check Inst[15:8] == 0x0 |
| 2045 | OPC_Decode, 175, 14, 63, // 4067: decode to LPGR using decoder 63 |
| 2046 | // 4067: } |
| 2047 | 1, 8, // 4071: case 0x1: { |
| 2048 | OPC_CheckField, 8, 8, 0, // 4073: check Inst[15:8] == 0x0 |
| 2049 | OPC_Decode, 218, 12, 63, // 4077: decode to LNGR using decoder 63 |
| 2050 | // 4077: } |
| 2051 | 2, 8, // 4081: case 0x2: { |
| 2052 | OPC_CheckField, 8, 8, 0, // 4083: check Inst[15:8] == 0x0 |
| 2053 | OPC_Decode, 207, 14, 63, // 4087: decode to LTGR using decoder 63 |
| 2054 | // 4087: } |
| 2055 | 3, 8, // 4091: case 0x3: { |
| 2056 | OPC_CheckField, 8, 8, 0, // 4093: check Inst[15:8] == 0x0 |
| 2057 | OPC_Decode, 239, 11, 63, // 4097: decode to LCGR using decoder 63 |
| 2058 | // 4097: } |
| 2059 | 4, 8, // 4101: case 0x4: { |
| 2060 | OPC_CheckField, 8, 8, 0, // 4103: check Inst[15:8] == 0x0 |
| 2061 | OPC_Decode, 164, 12, 63, // 4107: decode to LGR using decoder 63 |
| 2062 | // 4107: } |
| 2063 | 5, 8, // 4111: case 0x5: { |
| 2064 | OPC_CheckField, 8, 8, 0, // 4113: check Inst[15:8] == 0x0 |
| 2065 | OPC_Decode, 213, 14, 63, // 4117: decode to LURAG using decoder 63 |
| 2066 | // 4117: } |
| 2067 | 6, 8, // 4121: case 0x6: { |
| 2068 | OPC_CheckField, 8, 8, 0, // 4123: check Inst[15:8] == 0x0 |
| 2069 | OPC_Decode, 153, 12, 63, // 4127: decode to LGBR using decoder 63 |
| 2070 | // 4127: } |
| 2071 | 7, 8, // 4131: case 0x7: { |
| 2072 | OPC_CheckField, 8, 8, 0, // 4133: check Inst[15:8] == 0x0 |
| 2073 | OPC_Decode, 162, 12, 63, // 4137: decode to LGHR using decoder 63 |
| 2074 | // 4137: } |
| 2075 | 8, 9, // 4141: case 0x8: { |
| 2076 | OPC_CheckField, 8, 8, 0, // 4143: check Inst[15:8] == 0x0 |
| 2077 | OPC_Decode, 192, 4, 141, 1, // 4147: decode to AGR using decoder 141 |
| 2078 | // 4147: } |
| 2079 | 9, 9, // 4152: case 0x9: { |
| 2080 | OPC_CheckField, 8, 8, 0, // 4154: check Inst[15:8] == 0x0 |
| 2081 | OPC_Decode, 165, 17, 141, 1, // 4158: decode to SGR using decoder 141 |
| 2082 | // 4158: } |
| 2083 | 10, 9, // 4163: case 0xa: { |
| 2084 | OPC_CheckField, 8, 8, 0, // 4165: check Inst[15:8] == 0x0 |
| 2085 | OPC_Decode, 213, 4, 141, 1, // 4169: decode to ALGR using decoder 141 |
| 2086 | // 4169: } |
| 2087 | 11, 9, // 4174: case 0xb: { |
| 2088 | OPC_CheckField, 8, 8, 0, // 4176: check Inst[15:8] == 0x0 |
| 2089 | OPC_Decode, 190, 17, 141, 1, // 4180: decode to SLGR using decoder 141 |
| 2090 | // 4180: } |
| 2091 | 12, 9, // 4185: case 0xc: { |
| 2092 | OPC_CheckField, 8, 8, 0, // 4187: check Inst[15:8] == 0x0 |
| 2093 | OPC_Decode, 171, 15, 141, 1, // 4191: decode to MSGR using decoder 141 |
| 2094 | // 4191: } |
| 2095 | 13, 8, // 4196: case 0xd: { |
| 2096 | OPC_CheckField, 8, 8, 0, // 4198: check Inst[15:8] == 0x0 |
| 2097 | OPC_Decode, 168, 10, 70, // 4202: decode to DSGR using decoder 70 |
| 2098 | // 4202: } |
| 2099 | 14, 8, // 4206: case 0xe: { |
| 2100 | OPC_CheckField, 8, 8, 0, // 4208: check Inst[15:8] == 0x0 |
| 2101 | OPC_Decode, 188, 10, 63, // 4212: decode to EREGG using decoder 63 |
| 2102 | // 4212: } |
| 2103 | 15, 8, // 4216: case 0xf: { |
| 2104 | OPC_CheckField, 8, 8, 0, // 4218: check Inst[15:8] == 0x0 |
| 2105 | OPC_Decode, 194, 14, 63, // 4222: decode to LRVGR using decoder 63 |
| 2106 | // 4222: } |
| 2107 | 16, 8, // 4226: case 0x10: { |
| 2108 | OPC_CheckField, 8, 8, 0, // 4228: check Inst[15:8] == 0x0 |
| 2109 | OPC_Decode, 174, 14, 58, // 4232: decode to LPGFR using decoder 58 |
| 2110 | // 4232: } |
| 2111 | 17, 8, // 4236: case 0x11: { |
| 2112 | OPC_CheckField, 8, 8, 0, // 4238: check Inst[15:8] == 0x0 |
| 2113 | OPC_Decode, 217, 12, 58, // 4242: decode to LNGFR using decoder 58 |
| 2114 | // 4242: } |
| 2115 | 18, 8, // 4246: case 0x12: { |
| 2116 | OPC_CheckField, 8, 8, 0, // 4248: check Inst[15:8] == 0x0 |
| 2117 | OPC_Decode, 206, 14, 58, // 4252: decode to LTGFR using decoder 58 |
| 2118 | // 4252: } |
| 2119 | 19, 8, // 4256: case 0x13: { |
| 2120 | OPC_CheckField, 8, 8, 0, // 4258: check Inst[15:8] == 0x0 |
| 2121 | OPC_Decode, 238, 11, 58, // 4262: decode to LCGFR using decoder 58 |
| 2122 | // 4262: } |
| 2123 | 20, 8, // 4266: case 0x14: { |
| 2124 | OPC_CheckField, 8, 8, 0, // 4268: check Inst[15:8] == 0x0 |
| 2125 | OPC_Decode, 157, 12, 58, // 4272: decode to LGFR using decoder 58 |
| 2126 | // 4272: } |
| 2127 | 22, 8, // 4276: case 0x16: { |
| 2128 | OPC_CheckField, 8, 8, 0, // 4278: check Inst[15:8] == 0x0 |
| 2129 | OPC_Decode, 180, 12, 58, // 4282: decode to LLGFR using decoder 58 |
| 2130 | // 4282: } |
| 2131 | 23, 8, // 4286: case 0x17: { |
| 2132 | OPC_CheckField, 8, 8, 0, // 4288: check Inst[15:8] == 0x0 |
| 2133 | OPC_Decode, 188, 12, 63, // 4292: decode to LLGTR using decoder 63 |
| 2134 | // 4292: } |
| 2135 | 24, 9, // 4296: case 0x18: { |
| 2136 | OPC_CheckField, 8, 8, 0, // 4298: check Inst[15:8] == 0x0 |
| 2137 | OPC_Decode, 188, 4, 142, 1, // 4302: decode to AGFR using decoder 142 |
| 2138 | // 4302: } |
| 2139 | 25, 9, // 4307: case 0x19: { |
| 2140 | OPC_CheckField, 8, 8, 0, // 4309: check Inst[15:8] == 0x0 |
| 2141 | OPC_Decode, 163, 17, 142, 1, // 4313: decode to SGFR using decoder 142 |
| 2142 | // 4313: } |
| 2143 | 26, 9, // 4318: case 0x1a: { |
| 2144 | OPC_CheckField, 8, 8, 0, // 4320: check Inst[15:8] == 0x0 |
| 2145 | OPC_Decode, 211, 4, 142, 1, // 4324: decode to ALGFR using decoder 142 |
| 2146 | // 4324: } |
| 2147 | 27, 9, // 4329: case 0x1b: { |
| 2148 | OPC_CheckField, 8, 8, 0, // 4331: check Inst[15:8] == 0x0 |
| 2149 | OPC_Decode, 189, 17, 142, 1, // 4335: decode to SLGFR using decoder 142 |
| 2150 | // 4335: } |
| 2151 | 28, 9, // 4340: case 0x1c: { |
| 2152 | OPC_CheckField, 8, 8, 0, // 4342: check Inst[15:8] == 0x0 |
| 2153 | OPC_Decode, 170, 15, 142, 1, // 4346: decode to MSGFR using decoder 142 |
| 2154 | // 4346: } |
| 2155 | 29, 8, // 4351: case 0x1d: { |
| 2156 | OPC_CheckField, 8, 8, 0, // 4353: check Inst[15:8] == 0x0 |
| 2157 | OPC_Decode, 167, 10, 11, // 4357: decode to DSGFR using decoder 11 |
| 2158 | // 4357: } |
| 2159 | 30, 9, // 4361: case 0x1e: { |
| 2160 | OPC_CheckField, 8, 8, 0, // 4363: check Inst[15:8] == 0x0 |
| 2161 | OPC_Decode, 198, 11, 143, 1, // 4367: decode to KMAC using decoder 143 |
| 2162 | // 4367: } |
| 2163 | 31, 8, // 4372: case 0x1f: { |
| 2164 | OPC_CheckField, 8, 8, 0, // 4374: check Inst[15:8] == 0x0 |
| 2165 | OPC_Decode, 196, 14, 9, // 4378: decode to LRVR using decoder 9 |
| 2166 | // 4378: } |
| 2167 | 32, 8, // 4382: case 0x20: { |
| 2168 | OPC_CheckField, 8, 8, 0, // 4384: check Inst[15:8] == 0x0 |
| 2169 | OPC_Decode, 200, 6, 63, // 4388: decode to CGR using decoder 63 |
| 2170 | // 4388: } |
| 2171 | 33, 8, // 4392: case 0x21: { |
| 2172 | OPC_CheckField, 8, 8, 0, // 4394: check Inst[15:8] == 0x0 |
| 2173 | OPC_Decode, 252, 7, 63, // 4398: decode to CLGR using decoder 63 |
| 2174 | // 4398: } |
| 2175 | 37, 8, // 4402: case 0x25: { |
| 2176 | OPC_CheckField, 8, 8, 0, // 4404: check Inst[15:8] == 0x0 |
| 2177 | OPC_Decode, 234, 18, 63, // 4408: decode to STURG using decoder 63 |
| 2178 | // 4408: } |
| 2179 | 38, 8, // 4412: case 0x26: { |
| 2180 | OPC_CheckField, 8, 8, 0, // 4414: check Inst[15:8] == 0x0 |
| 2181 | OPC_Decode, 228, 11, 9, // 4418: decode to LBR using decoder 9 |
| 2182 | // 4418: } |
| 2183 | 39, 8, // 4422: case 0x27: { |
| 2184 | OPC_CheckField, 8, 8, 0, // 4424: check Inst[15:8] == 0x0 |
| 2185 | OPC_Decode, 170, 12, 9, // 4428: decode to LHR using decoder 9 |
| 2186 | // 4428: } |
| 2187 | 40, 10, // 4432: case 0x28: { |
| 2188 | OPC_CheckPredicate, 6, // 4434: check predicate 6 |
| 2189 | OPC_CheckField, 0, 16, 0, // 4436: check Inst[15:0] == 0x0 |
| 2190 | OPC_Decode, 140, 16, 0, // 4440: decode to PCKMO using decoder 0 |
| 2191 | // 4440: } |
| 2192 | 41, 11, // 4444: case 0x29: { |
| 2193 | OPC_CheckPredicate, 7, // 4446: check predicate 7 |
| 2194 | OPC_CheckField, 8, 4, 0, // 4448: check Inst[11:8] == 0x0 |
| 2195 | OPC_Decode, 197, 11, 144, 1, // 4452: decode to KMA using decoder 144 |
| 2196 | // 4452: } |
| 2197 | 42, 10, // 4457: case 0x2a: { |
| 2198 | OPC_CheckPredicate, 8, // 4459: check predicate 8 |
| 2199 | OPC_CheckField, 8, 8, 0, // 4461: check Inst[15:8] == 0x0 |
| 2200 | OPC_Decode, 201, 11, 8, // 4465: decode to KMF using decoder 8 |
| 2201 | // 4465: } |
| 2202 | 43, 10, // 4469: case 0x2b: { |
| 2203 | OPC_CheckPredicate, 8, // 4471: check predicate 8 |
| 2204 | OPC_CheckField, 8, 8, 0, // 4473: check Inst[15:8] == 0x0 |
| 2205 | OPC_Decode, 202, 11, 8, // 4477: decode to KMO using decoder 8 |
| 2206 | // 4477: } |
| 2207 | 44, 10, // 4481: case 0x2c: { |
| 2208 | OPC_CheckPredicate, 8, // 4483: check predicate 8 |
| 2209 | OPC_CheckField, 0, 16, 0, // 4485: check Inst[15:0] == 0x0 |
| 2210 | OPC_Decode, 139, 16, 0, // 4489: decode to PCC using decoder 0 |
| 2211 | // 4489: } |
| 2212 | 45, 11, // 4493: case 0x2d: { |
| 2213 | OPC_CheckPredicate, 8, // 4495: check predicate 8 |
| 2214 | OPC_CheckField, 8, 4, 0, // 4497: check Inst[11:8] == 0x0 |
| 2215 | OPC_Decode, 200, 11, 144, 1, // 4501: decode to KMCTR using decoder 144 |
| 2216 | // 4501: } |
| 2217 | 46, 8, // 4506: case 0x2e: { |
| 2218 | OPC_CheckField, 8, 8, 0, // 4508: check Inst[15:8] == 0x0 |
| 2219 | OPC_Decode, 196, 11, 8, // 4512: decode to KM using decoder 8 |
| 2220 | // 4512: } |
| 2221 | 47, 8, // 4516: case 0x2f: { |
| 2222 | OPC_CheckField, 8, 8, 0, // 4518: check Inst[15:8] == 0x0 |
| 2223 | OPC_Decode, 199, 11, 8, // 4522: decode to KMC using decoder 8 |
| 2224 | // 4522: } |
| 2225 | 48, 8, // 4526: case 0x30: { |
| 2226 | OPC_CheckField, 8, 8, 0, // 4528: check Inst[15:8] == 0x0 |
| 2227 | OPC_Decode, 152, 6, 58, // 4532: decode to CGFR using decoder 58 |
| 2228 | // 4532: } |
| 2229 | 49, 8, // 4536: case 0x31: { |
| 2230 | OPC_CheckField, 8, 8, 0, // 4538: check Inst[15:8] == 0x0 |
| 2231 | OPC_Decode, 206, 7, 58, // 4542: decode to CLGFR using decoder 58 |
| 2232 | // 4542: } |
| 2233 | 56, 10, // 4546: case 0x38: { |
| 2234 | OPC_CheckPredicate, 9, // 4548: check predicate 9 |
| 2235 | OPC_CheckField, 8, 8, 0, // 4550: check Inst[15:8] == 0x0 |
| 2236 | OPC_Decode, 201, 17, 8, // 4554: decode to SORTL using decoder 8 |
| 2237 | // 4554: } |
| 2238 | 57, 11, // 4558: case 0x39: { |
| 2239 | OPC_CheckPredicate, 10, // 4560: check predicate 10 |
| 2240 | OPC_CheckField, 8, 4, 0, // 4562: check Inst[11:8] == 0x0 |
| 2241 | OPC_Decode, 155, 10, 145, 1, // 4566: decode to DFLTCC using decoder 145 |
| 2242 | // 4566: } |
| 2243 | 58, 11, // 4571: case 0x3a: { |
| 2244 | OPC_CheckPredicate, 11, // 4573: check predicate 11 |
| 2245 | OPC_CheckField, 8, 8, 0, // 4575: check Inst[15:8] == 0x0 |
| 2246 | OPC_Decode, 188, 11, 143, 1, // 4579: decode to KDSA using decoder 143 |
| 2247 | // 4579: } |
| 2248 | 59, 10, // 4584: case 0x3b: { |
| 2249 | OPC_CheckPredicate, 12, // 4586: check predicate 12 |
| 2250 | OPC_CheckField, 0, 16, 0, // 4588: check Inst[15:0] == 0x0 |
| 2251 | OPC_Decode, 230, 15, 0, // 4592: decode to NNPA using decoder 0 |
| 2252 | // 4592: } |
| 2253 | 60, 10, // 4596: case 0x3c: { |
| 2254 | OPC_CheckPredicate, 13, // 4598: check predicate 13 |
| 2255 | OPC_CheckField, 8, 8, 0, // 4600: check Inst[15:8] == 0x0 |
| 2256 | OPC_Decode, 154, 16, 8, // 4604: decode to PPNO using decoder 8 |
| 2257 | // 4604: } |
| 2258 | 62, 22, // 4608: case 0x3e: { |
| 2259 | OPC_CheckField, 8, 4, 0, // 4610: check Inst[11:8] == 0x0 |
| 2260 | OPC_Scope, 9, // 4614: try { |
| 2261 | OPC_CheckField, 12, 4, 0, // 4616: check Inst[15:12] == 0x0 |
| 2262 | OPC_Decode, 192, 11, 143, 1, // 4620: decode to KIMD using decoder 143 |
| 2263 | // 4620: } else try { |
| 2264 | OPC_CheckPredicate, 14, // 4625: check predicate 14 |
| 2265 | OPC_Decode, 193, 11, 146, 1, // 4627: decode to KIMDOpt using decoder 146 |
| 2266 | // 4627: } |
| 2267 | // 4627: } |
| 2268 | 63, 22, // 4632: case 0x3f: { |
| 2269 | OPC_CheckField, 8, 4, 0, // 4634: check Inst[11:8] == 0x0 |
| 2270 | OPC_Scope, 9, // 4638: try { |
| 2271 | OPC_CheckField, 12, 4, 0, // 4640: check Inst[15:12] == 0x0 |
| 2272 | OPC_Decode, 194, 11, 143, 1, // 4644: decode to KLMD using decoder 143 |
| 2273 | // 4644: } else try { |
| 2274 | OPC_CheckPredicate, 14, // 4649: check predicate 14 |
| 2275 | OPC_Decode, 195, 11, 146, 1, // 4651: decode to KLMDOpt using decoder 146 |
| 2276 | // 4651: } |
| 2277 | // 4651: } |
| 2278 | 65, 6, // 4656: case 0x41: { |
| 2279 | OPC_CheckPredicate, 2, // 4658: check predicate 2 |
| 2280 | OPC_Decode, 132, 6, 109, // 4660: decode to CFDTR using decoder 109 |
| 2281 | // 4660: } |
| 2282 | 66, 6, // 4664: case 0x42: { |
| 2283 | OPC_CheckPredicate, 2, // 4666: check predicate 2 |
| 2284 | OPC_Decode, 202, 7, 121, // 4668: decode to CLGDTR using decoder 121 |
| 2285 | // 4668: } |
| 2286 | 67, 6, // 4672: case 0x43: { |
| 2287 | OPC_CheckPredicate, 2, // 4674: check predicate 2 |
| 2288 | OPC_Decode, 180, 7, 109, // 4676: decode to CLFDTR using decoder 109 |
| 2289 | // 4676: } |
| 2290 | 70, 9, // 4680: case 0x46: { |
| 2291 | OPC_CheckField, 8, 8, 0, // 4682: check Inst[15:8] == 0x0 |
| 2292 | OPC_Decode, 143, 5, 141, 1, // 4686: decode to BCTGR using decoder 141 |
| 2293 | // 4686: } |
| 2294 | 73, 6, // 4691: case 0x49: { |
| 2295 | OPC_CheckPredicate, 2, // 4693: check predicate 2 |
| 2296 | OPC_Decode, 140, 6, 111, // 4695: decode to CFXTR using decoder 111 |
| 2297 | // 4695: } |
| 2298 | 74, 6, // 4699: case 0x4a: { |
| 2299 | OPC_CheckPredicate, 2, // 4701: check predicate 2 |
| 2300 | OPC_Decode, 183, 8, 123, // 4703: decode to CLGXTR using decoder 123 |
| 2301 | // 4703: } |
| 2302 | 75, 6, // 4707: case 0x4b: { |
| 2303 | OPC_CheckPredicate, 2, // 4709: check predicate 2 |
| 2304 | OPC_Decode, 199, 7, 111, // 4711: decode to CLFXTR using decoder 111 |
| 2305 | // 4711: } |
| 2306 | 81, 6, // 4715: case 0x51: { |
| 2307 | OPC_CheckPredicate, 2, // 4717: check predicate 2 |
| 2308 | OPC_Decode, 223, 5, 101, // 4719: decode to CDFTR using decoder 101 |
| 2309 | // 4719: } |
| 2310 | 82, 6, // 4723: case 0x52: { |
| 2311 | OPC_CheckPredicate, 2, // 4725: check predicate 2 |
| 2312 | OPC_Decode, 232, 5, 113, // 4727: decode to CDLGTR using decoder 113 |
| 2313 | // 4727: } |
| 2314 | 83, 6, // 4731: case 0x53: { |
| 2315 | OPC_CheckPredicate, 2, // 4733: check predicate 2 |
| 2316 | OPC_Decode, 230, 5, 101, // 4735: decode to CDLFTR using decoder 101 |
| 2317 | // 4735: } |
| 2318 | 89, 6, // 4739: case 0x59: { |
| 2319 | OPC_CheckPredicate, 2, // 4741: check predicate 2 |
| 2320 | OPC_Decode, 253, 9, 102, // 4743: decode to CXFTR using decoder 102 |
| 2321 | // 4743: } |
| 2322 | 90, 6, // 4747: case 0x5a: { |
| 2323 | OPC_CheckPredicate, 2, // 4749: check predicate 2 |
| 2324 | OPC_Decode, 134, 10, 114, // 4751: decode to CXLGTR using decoder 114 |
| 2325 | // 4751: } |
| 2326 | 91, 6, // 4755: case 0x5b: { |
| 2327 | OPC_CheckPredicate, 2, // 4757: check predicate 2 |
| 2328 | OPC_Decode, 132, 10, 102, // 4759: decode to CXLFTR using decoder 102 |
| 2329 | // 4759: } |
| 2330 | 96, 49, // 4763: case 0x60: { |
| 2331 | OPC_CheckField, 8, 4, 0, // 4765: check Inst[11:8] == 0x0 |
| 2332 | OPC_Scope, 39, // 4769: try { |
| 2333 | OPC_SwitchField, 12, 4, // 4771: switch Inst[15:12] { |
| 2334 | 2, 4, // 4774: case 0x2: { |
| 2335 | OPC_Decode, 233, 6, 63, // 4776: decode to CGRTAsmH using decoder 63 |
| 2336 | // 4776: } |
| 2337 | 4, 4, // 4780: case 0x4: { |
| 2338 | OPC_Decode, 235, 6, 63, // 4782: decode to CGRTAsmL using decoder 63 |
| 2339 | // 4782: } |
| 2340 | 6, 4, // 4786: case 0x6: { |
| 2341 | OPC_Decode, 237, 6, 63, // 4788: decode to CGRTAsmLH using decoder 63 |
| 2342 | // 4788: } |
| 2343 | 8, 4, // 4792: case 0x8: { |
| 2344 | OPC_Decode, 232, 6, 63, // 4794: decode to CGRTAsmE using decoder 63 |
| 2345 | // 4794: } |
| 2346 | 10, 4, // 4798: case 0xa: { |
| 2347 | OPC_Decode, 234, 6, 63, // 4800: decode to CGRTAsmHE using decoder 63 |
| 2348 | // 4800: } |
| 2349 | 12, 0, // 4804: case 0xc: { |
| 2350 | OPC_Decode, 236, 6, 63, // 4806: decode to CGRTAsmLE using decoder 63 |
| 2351 | // 4806: } |
| 2352 | // 4806: } // switch Inst[15:12] |
| 2353 | // 4806: } else try { |
| 2354 | OPC_Decode, 231, 6, 75, // 4810: decode to CGRTAsm using decoder 75 |
| 2355 | // 4810: } |
| 2356 | // 4810: } |
| 2357 | 97, 49, // 4814: case 0x61: { |
| 2358 | OPC_CheckField, 8, 4, 0, // 4816: check Inst[11:8] == 0x0 |
| 2359 | OPC_Scope, 39, // 4820: try { |
| 2360 | OPC_SwitchField, 12, 4, // 4822: switch Inst[15:12] { |
| 2361 | 2, 4, // 4825: case 0x2: { |
| 2362 | OPC_Decode, 157, 8, 63, // 4827: decode to CLGRTAsmH using decoder 63 |
| 2363 | // 4827: } |
| 2364 | 4, 4, // 4831: case 0x4: { |
| 2365 | OPC_Decode, 159, 8, 63, // 4833: decode to CLGRTAsmL using decoder 63 |
| 2366 | // 4833: } |
| 2367 | 6, 4, // 4837: case 0x6: { |
| 2368 | OPC_Decode, 161, 8, 63, // 4839: decode to CLGRTAsmLH using decoder 63 |
| 2369 | // 4839: } |
| 2370 | 8, 4, // 4843: case 0x8: { |
| 2371 | OPC_Decode, 156, 8, 63, // 4845: decode to CLGRTAsmE using decoder 63 |
| 2372 | // 4845: } |
| 2373 | 10, 4, // 4849: case 0xa: { |
| 2374 | OPC_Decode, 158, 8, 63, // 4851: decode to CLGRTAsmHE using decoder 63 |
| 2375 | // 4851: } |
| 2376 | 12, 0, // 4855: case 0xc: { |
| 2377 | OPC_Decode, 160, 8, 63, // 4857: decode to CLGRTAsmLE using decoder 63 |
| 2378 | // 4857: } |
| 2379 | // 4857: } // switch Inst[15:12] |
| 2380 | // 4857: } else try { |
| 2381 | OPC_Decode, 155, 8, 75, // 4861: decode to CLGRTAsm using decoder 75 |
| 2382 | // 4861: } |
| 2383 | // 4861: } |
| 2384 | 100, 11, // 4865: case 0x64: { |
| 2385 | OPC_CheckPredicate, 15, // 4867: check predicate 15 |
| 2386 | OPC_CheckField, 8, 4, 0, // 4869: check Inst[11:8] == 0x0 |
| 2387 | OPC_Decode, 229, 15, 147, 1, // 4873: decode to NNGRK using decoder 147 |
| 2388 | // 4873: } |
| 2389 | 101, 11, // 4878: case 0x65: { |
| 2390 | OPC_CheckPredicate, 15, // 4880: check predicate 15 |
| 2391 | OPC_CheckField, 8, 4, 0, // 4882: check Inst[11:8] == 0x0 |
| 2392 | OPC_Decode, 248, 15, 147, 1, // 4886: decode to OCGRK using decoder 147 |
| 2393 | // 4886: } |
| 2394 | 102, 11, // 4891: case 0x66: { |
| 2395 | OPC_CheckPredicate, 15, // 4893: check predicate 15 |
| 2396 | OPC_CheckField, 8, 4, 0, // 4895: check Inst[11:8] == 0x0 |
| 2397 | OPC_Decode, 232, 15, 147, 1, // 4899: decode to NOGRK using decoder 147 |
| 2398 | // 4899: } |
| 2399 | 103, 11, // 4904: case 0x67: { |
| 2400 | OPC_CheckPredicate, 15, // 4906: check predicate 15 |
| 2401 | OPC_CheckField, 8, 4, 0, // 4908: check Inst[11:8] == 0x0 |
| 2402 | OPC_Decode, 243, 15, 147, 1, // 4912: decode to NXGRK using decoder 147 |
| 2403 | // 4912: } |
| 2404 | 104, 10, // 4917: case 0x68: { |
| 2405 | OPC_CheckPredicate, 16, // 4919: check predicate 16 |
| 2406 | OPC_CheckField, 8, 8, 0, // 4921: check Inst[15:8] == 0x0 |
| 2407 | OPC_Decode, 155, 9, 63, // 4925: decode to CLZG using decoder 63 |
| 2408 | // 4925: } |
| 2409 | 105, 10, // 4929: case 0x69: { |
| 2410 | OPC_CheckPredicate, 16, // 4931: check predicate 16 |
| 2411 | OPC_CheckField, 8, 8, 0, // 4933: check Inst[15:8] == 0x0 |
| 2412 | OPC_Decode, 225, 9, 63, // 4937: decode to CTZG using decoder 63 |
| 2413 | // 4937: } |
| 2414 | 108, 11, // 4941: case 0x6c: { |
| 2415 | OPC_CheckPredicate, 16, // 4943: check predicate 16 |
| 2416 | OPC_CheckField, 8, 4, 0, // 4945: check Inst[11:8] == 0x0 |
| 2417 | OPC_Decode, 146, 5, 147, 1, // 4949: decode to BEXTG using decoder 147 |
| 2418 | // 4949: } |
| 2419 | 109, 11, // 4954: case 0x6d: { |
| 2420 | OPC_CheckPredicate, 16, // 4956: check predicate 16 |
| 2421 | OPC_CheckField, 8, 4, 0, // 4958: check Inst[11:8] == 0x0 |
| 2422 | OPC_Decode, 145, 5, 147, 1, // 4962: decode to BDEPG using decoder 147 |
| 2423 | // 4962: } |
| 2424 | 114, 50, // 4967: case 0x72: { |
| 2425 | OPC_CheckField, 8, 4, 0, // 4969: check Inst[11:8] == 0x0 |
| 2426 | OPC_Scope, 39, // 4973: try { |
| 2427 | OPC_SwitchField, 12, 4, // 4975: switch Inst[15:12] { |
| 2428 | 2, 4, // 4978: case 0x2: { |
| 2429 | OPC_Decode, 205, 9, 9, // 4980: decode to CRTAsmH using decoder 9 |
| 2430 | // 4980: } |
| 2431 | 4, 4, // 4984: case 0x4: { |
| 2432 | OPC_Decode, 207, 9, 9, // 4986: decode to CRTAsmL using decoder 9 |
| 2433 | // 4986: } |
| 2434 | 6, 4, // 4990: case 0x6: { |
| 2435 | OPC_Decode, 209, 9, 9, // 4992: decode to CRTAsmLH using decoder 9 |
| 2436 | // 4992: } |
| 2437 | 8, 4, // 4996: case 0x8: { |
| 2438 | OPC_Decode, 204, 9, 9, // 4998: decode to CRTAsmE using decoder 9 |
| 2439 | // 4998: } |
| 2440 | 10, 4, // 5002: case 0xa: { |
| 2441 | OPC_Decode, 206, 9, 9, // 5004: decode to CRTAsmHE using decoder 9 |
| 2442 | // 5004: } |
| 2443 | 12, 0, // 5008: case 0xc: { |
| 2444 | OPC_Decode, 208, 9, 9, // 5010: decode to CRTAsmLE using decoder 9 |
| 2445 | // 5010: } |
| 2446 | // 5010: } // switch Inst[15:12] |
| 2447 | // 5010: } else try { |
| 2448 | OPC_Decode, 203, 9, 148, 1, // 5014: decode to CRTAsm using decoder 148 |
| 2449 | // 5014: } |
| 2450 | // 5014: } |
| 2451 | 115, 50, // 5019: case 0x73: { |
| 2452 | OPC_CheckField, 8, 4, 0, // 5021: check Inst[11:8] == 0x0 |
| 2453 | OPC_Scope, 39, // 5025: try { |
| 2454 | OPC_SwitchField, 12, 4, // 5027: switch Inst[15:12] { |
| 2455 | 2, 4, // 5030: case 0x2: { |
| 2456 | OPC_Decode, 128, 9, 9, // 5032: decode to CLRTAsmH using decoder 9 |
| 2457 | // 5032: } |
| 2458 | 4, 4, // 5036: case 0x4: { |
| 2459 | OPC_Decode, 130, 9, 9, // 5038: decode to CLRTAsmL using decoder 9 |
| 2460 | // 5038: } |
| 2461 | 6, 4, // 5042: case 0x6: { |
| 2462 | OPC_Decode, 132, 9, 9, // 5044: decode to CLRTAsmLH using decoder 9 |
| 2463 | // 5044: } |
| 2464 | 8, 4, // 5048: case 0x8: { |
| 2465 | OPC_Decode, 255, 8, 9, // 5050: decode to CLRTAsmE using decoder 9 |
| 2466 | // 5050: } |
| 2467 | 10, 4, // 5054: case 0xa: { |
| 2468 | OPC_Decode, 129, 9, 9, // 5056: decode to CLRTAsmHE using decoder 9 |
| 2469 | // 5056: } |
| 2470 | 12, 0, // 5060: case 0xc: { |
| 2471 | OPC_Decode, 131, 9, 9, // 5062: decode to CLRTAsmLE using decoder 9 |
| 2472 | // 5062: } |
| 2473 | // 5062: } // switch Inst[15:12] |
| 2474 | // 5062: } else try { |
| 2475 | OPC_Decode, 254, 8, 148, 1, // 5066: decode to CLRTAsm using decoder 148 |
| 2476 | // 5066: } |
| 2477 | // 5066: } |
| 2478 | 116, 11, // 5071: case 0x74: { |
| 2479 | OPC_CheckPredicate, 15, // 5073: check predicate 15 |
| 2480 | OPC_CheckField, 8, 4, 0, // 5075: check Inst[11:8] == 0x0 |
| 2481 | OPC_Decode, 231, 15, 149, 1, // 5079: decode to NNRK using decoder 149 |
| 2482 | // 5079: } |
| 2483 | 117, 11, // 5084: case 0x75: { |
| 2484 | OPC_CheckPredicate, 15, // 5086: check predicate 15 |
| 2485 | OPC_CheckField, 8, 4, 0, // 5088: check Inst[11:8] == 0x0 |
| 2486 | OPC_Decode, 249, 15, 149, 1, // 5092: decode to OCRK using decoder 149 |
| 2487 | // 5092: } |
| 2488 | 118, 11, // 5097: case 0x76: { |
| 2489 | OPC_CheckPredicate, 15, // 5099: check predicate 15 |
| 2490 | OPC_CheckField, 8, 4, 0, // 5101: check Inst[11:8] == 0x0 |
| 2491 | OPC_Decode, 237, 15, 149, 1, // 5105: decode to NORK using decoder 149 |
| 2492 | // 5105: } |
| 2493 | 119, 11, // 5110: case 0x77: { |
| 2494 | OPC_CheckPredicate, 15, // 5112: check predicate 15 |
| 2495 | OPC_CheckField, 8, 4, 0, // 5114: check Inst[11:8] == 0x0 |
| 2496 | OPC_Decode, 244, 15, 149, 1, // 5118: decode to NXRK using decoder 149 |
| 2497 | // 5118: } |
| 2498 | 128, 1, 9, // 5123: case 0x80: { |
| 2499 | OPC_CheckField, 8, 8, 0, // 5126: check Inst[15:8] == 0x0 |
| 2500 | OPC_Decode, 218, 15, 141, 1, // 5130: decode to NGR using decoder 141 |
| 2501 | // 5130: } |
| 2502 | 129, 1, 9, // 5135: case 0x81: { |
| 2503 | OPC_CheckField, 8, 8, 0, // 5138: check Inst[15:8] == 0x0 |
| 2504 | OPC_Decode, 251, 15, 141, 1, // 5142: decode to OGR using decoder 141 |
| 2505 | // 5142: } |
| 2506 | 130, 1, 9, // 5147: case 0x82: { |
| 2507 | OPC_CheckField, 8, 8, 0, // 5150: check Inst[15:8] == 0x0 |
| 2508 | OPC_Decode, 216, 25, 141, 1, // 5154: decode to XGR using decoder 141 |
| 2509 | // 5154: } |
| 2510 | 131, 1, 9, // 5159: case 0x83: { |
| 2511 | OPC_CheckField, 8, 8, 0, // 5162: check Inst[15:8] == 0x0 |
| 2512 | OPC_Decode, 209, 10, 150, 1, // 5166: decode to FLOGR using decoder 150 |
| 2513 | // 5166: } |
| 2514 | 132, 1, 8, // 5171: case 0x84: { |
| 2515 | OPC_CheckField, 8, 8, 0, // 5174: check Inst[15:8] == 0x0 |
| 2516 | OPC_Decode, 177, 12, 63, // 5178: decode to LLGCR using decoder 63 |
| 2517 | // 5178: } |
| 2518 | 133, 1, 8, // 5182: case 0x85: { |
| 2519 | OPC_CheckField, 8, 8, 0, // 5185: check Inst[15:8] == 0x0 |
| 2520 | OPC_Decode, 184, 12, 63, // 5189: decode to LLGHR using decoder 63 |
| 2521 | // 5189: } |
| 2522 | 134, 1, 8, // 5193: case 0x86: { |
| 2523 | OPC_CheckField, 8, 8, 0, // 5196: check Inst[15:8] == 0x0 |
| 2524 | OPC_Decode, 150, 15, 70, // 5200: decode to MLGR using decoder 70 |
| 2525 | // 5200: } |
| 2526 | 135, 1, 8, // 5204: case 0x87: { |
| 2527 | OPC_CheckField, 8, 8, 0, // 5207: check Inst[15:8] == 0x0 |
| 2528 | OPC_Decode, 161, 10, 70, // 5211: decode to DLGR using decoder 70 |
| 2529 | // 5211: } |
| 2530 | 136, 1, 9, // 5215: case 0x88: { |
| 2531 | OPC_CheckField, 8, 8, 0, // 5218: check Inst[15:8] == 0x0 |
| 2532 | OPC_Decode, 205, 4, 141, 1, // 5222: decode to ALCGR using decoder 141 |
| 2533 | // 5222: } |
| 2534 | 137, 1, 9, // 5227: case 0x89: { |
| 2535 | OPC_CheckField, 8, 8, 0, // 5230: check Inst[15:8] == 0x0 |
| 2536 | OPC_Decode, 180, 17, 141, 1, // 5234: decode to SLBGR using decoder 141 |
| 2537 | // 5234: } |
| 2538 | 138, 1, 8, // 5239: case 0x8a: { |
| 2539 | OPC_CheckField, 8, 8, 0, // 5242: check Inst[15:8] == 0x0 |
| 2540 | OPC_Decode, 221, 9, 70, // 5246: decode to CSPG using decoder 70 |
| 2541 | // 5246: } |
| 2542 | 139, 1, 20, // 5250: case 0x8b: { |
| 2543 | OPC_Scope, 11, // 5253: try { |
| 2544 | OPC_CheckField, 8, 4, 0, // 5255: check Inst[11:8] == 0x0 |
| 2545 | OPC_CheckPredicate, 17, // 5259: check predicate 17 |
| 2546 | OPC_Decode, 169, 16, 147, 1, // 5261: decode to RDPOpt using decoder 147 |
| 2547 | // 5261: } else try { |
| 2548 | OPC_CheckPredicate, 17, // 5266: check predicate 17 |
| 2549 | OPC_Decode, 168, 16, 151, 1, // 5268: decode to RDP using decoder 151 |
| 2550 | // 5268: } |
| 2551 | // 5268: } |
| 2552 | 141, 1, 8, // 5273: case 0x8d: { |
| 2553 | OPC_CheckField, 8, 8, 0, // 5276: check Inst[15:8] == 0x0 |
| 2554 | OPC_Decode, 186, 10, 9, // 5280: decode to EPSW using decoder 9 |
| 2555 | // 5280: } |
| 2556 | 142, 1, 16, // 5284: case 0x8e: { |
| 2557 | OPC_Scope, 9, // 5287: try { |
| 2558 | OPC_CheckField, 8, 4, 0, // 5289: check Inst[11:8] == 0x0 |
| 2559 | OPC_Decode, 222, 10, 147, 1, // 5293: decode to IDTEOpt using decoder 147 |
| 2560 | // 5293: } else try { |
| 2561 | OPC_Decode, 221, 10, 151, 1, // 5298: decode to IDTE using decoder 151 |
| 2562 | // 5298: } |
| 2563 | // 5298: } |
| 2564 | 143, 1, 20, // 5303: case 0x8f: { |
| 2565 | OPC_Scope, 11, // 5306: try { |
| 2566 | OPC_CheckField, 8, 4, 0, // 5308: check Inst[11:8] == 0x0 |
| 2567 | OPC_CheckPredicate, 18, // 5312: check predicate 18 |
| 2568 | OPC_Decode, 186, 9, 152, 1, // 5314: decode to CRDTEOpt using decoder 152 |
| 2569 | // 5314: } else try { |
| 2570 | OPC_CheckPredicate, 18, // 5319: check predicate 18 |
| 2571 | OPC_Decode, 185, 9, 153, 1, // 5321: decode to CRDTE using decoder 153 |
| 2572 | // 5321: } |
| 2573 | // 5321: } |
| 2574 | 144, 1, 19, // 5326: case 0x90: { |
| 2575 | OPC_CheckField, 8, 4, 0, // 5329: check Inst[11:8] == 0x0 |
| 2576 | OPC_Scope, 8, // 5333: try { |
| 2577 | OPC_CheckField, 12, 4, 0, // 5335: check Inst[15:12] == 0x0 |
| 2578 | OPC_Decode, 167, 19, 73, // 5339: decode to TRTTOpt using decoder 73 |
| 2579 | // 5339: } else try { |
| 2580 | OPC_Decode, 166, 19, 154, 1, // 5343: decode to TRTT using decoder 154 |
| 2581 | // 5343: } |
| 2582 | // 5343: } |
| 2583 | 145, 1, 19, // 5348: case 0x91: { |
| 2584 | OPC_CheckField, 8, 4, 0, // 5351: check Inst[11:8] == 0x0 |
| 2585 | OPC_Scope, 8, // 5355: try { |
| 2586 | OPC_CheckField, 12, 4, 0, // 5357: check Inst[15:12] == 0x0 |
| 2587 | OPC_Decode, 162, 19, 73, // 5361: decode to TRTOOpt using decoder 73 |
| 2588 | // 5361: } else try { |
| 2589 | OPC_Decode, 161, 19, 154, 1, // 5365: decode to TRTO using decoder 154 |
| 2590 | // 5365: } |
| 2591 | // 5365: } |
| 2592 | 146, 1, 19, // 5370: case 0x92: { |
| 2593 | OPC_CheckField, 8, 4, 0, // 5373: check Inst[11:8] == 0x0 |
| 2594 | OPC_Scope, 8, // 5377: try { |
| 2595 | OPC_CheckField, 12, 4, 0, // 5379: check Inst[15:12] == 0x0 |
| 2596 | OPC_Decode, 157, 19, 73, // 5383: decode to TROTOpt using decoder 73 |
| 2597 | // 5383: } else try { |
| 2598 | OPC_Decode, 156, 19, 154, 1, // 5387: decode to TROT using decoder 154 |
| 2599 | // 5387: } |
| 2600 | // 5387: } |
| 2601 | 147, 1, 19, // 5392: case 0x93: { |
| 2602 | OPC_CheckField, 8, 4, 0, // 5395: check Inst[11:8] == 0x0 |
| 2603 | OPC_Scope, 8, // 5399: try { |
| 2604 | OPC_CheckField, 12, 4, 0, // 5401: check Inst[15:12] == 0x0 |
| 2605 | OPC_Decode, 155, 19, 73, // 5405: decode to TROOOpt using decoder 73 |
| 2606 | // 5405: } else try { |
| 2607 | OPC_Decode, 154, 19, 154, 1, // 5409: decode to TROO using decoder 154 |
| 2608 | // 5409: } |
| 2609 | // 5409: } |
| 2610 | 148, 1, 8, // 5414: case 0x94: { |
| 2611 | OPC_CheckField, 8, 8, 0, // 5417: check Inst[15:8] == 0x0 |
| 2612 | OPC_Decode, 175, 12, 9, // 5421: decode to LLCR using decoder 9 |
| 2613 | // 5421: } |
| 2614 | 149, 1, 8, // 5425: case 0x95: { |
| 2615 | OPC_CheckField, 8, 8, 0, // 5428: check Inst[15:8] == 0x0 |
| 2616 | OPC_Decode, 191, 12, 9, // 5432: decode to LLHR using decoder 9 |
| 2617 | // 5432: } |
| 2618 | 150, 1, 8, // 5436: case 0x96: { |
| 2619 | OPC_CheckField, 8, 8, 0, // 5439: check Inst[15:8] == 0x0 |
| 2620 | OPC_Decode, 151, 15, 11, // 5443: decode to MLR using decoder 11 |
| 2621 | // 5443: } |
| 2622 | 151, 1, 8, // 5447: case 0x97: { |
| 2623 | OPC_CheckField, 8, 8, 0, // 5450: check Inst[15:8] == 0x0 |
| 2624 | OPC_Decode, 162, 10, 11, // 5454: decode to DLR using decoder 11 |
| 2625 | // 5454: } |
| 2626 | 152, 1, 8, // 5458: case 0x98: { |
| 2627 | OPC_CheckField, 8, 8, 0, // 5461: check Inst[15:8] == 0x0 |
| 2628 | OPC_Decode, 206, 4, 10, // 5465: decode to ALCR using decoder 10 |
| 2629 | // 5465: } |
| 2630 | 153, 1, 8, // 5469: case 0x99: { |
| 2631 | OPC_CheckField, 8, 8, 0, // 5472: check Inst[15:8] == 0x0 |
| 2632 | OPC_Decode, 181, 17, 10, // 5476: decode to SLBR using decoder 10 |
| 2633 | // 5476: } |
| 2634 | 154, 1, 13, // 5480: case 0x9a: { |
| 2635 | OPC_CheckField, 8, 8, 0, // 5483: check Inst[15:8] == 0x0 |
| 2636 | OPC_CheckField, 0, 4, 0, // 5487: check Inst[3:0] == 0x0 |
| 2637 | OPC_Decode, 183, 10, 155, 1, // 5491: decode to EPAIR using decoder 155 |
| 2638 | // 5491: } |
| 2639 | 155, 1, 13, // 5496: case 0x9b: { |
| 2640 | OPC_CheckField, 8, 8, 0, // 5499: check Inst[15:8] == 0x0 |
| 2641 | OPC_CheckField, 0, 4, 0, // 5503: check Inst[3:0] == 0x0 |
| 2642 | OPC_Decode, 189, 10, 155, 1, // 5507: decode to ESAIR using decoder 155 |
| 2643 | // 5507: } |
| 2644 | 157, 1, 13, // 5512: case 0x9d: { |
| 2645 | OPC_CheckField, 8, 8, 0, // 5515: check Inst[15:8] == 0x0 |
| 2646 | OPC_CheckField, 0, 4, 0, // 5519: check Inst[3:0] == 0x0 |
| 2647 | OPC_Decode, 192, 10, 156, 1, // 5523: decode to ESEA using decoder 156 |
| 2648 | // 5523: } |
| 2649 | 158, 1, 8, // 5528: case 0x9e: { |
| 2650 | OPC_CheckField, 8, 8, 0, // 5531: check Inst[15:8] == 0x0 |
| 2651 | OPC_Decode, 160, 16, 63, // 5535: decode to PTI using decoder 63 |
| 2652 | // 5535: } |
| 2653 | 159, 1, 13, // 5539: case 0x9f: { |
| 2654 | OPC_CheckField, 8, 8, 0, // 5542: check Inst[15:8] == 0x0 |
| 2655 | OPC_CheckField, 0, 4, 0, // 5546: check Inst[3:0] == 0x0 |
| 2656 | OPC_Decode, 236, 17, 155, 1, // 5550: decode to SSAIR using decoder 155 |
| 2657 | // 5550: } |
| 2658 | 161, 1, 10, // 5555: case 0xa1: { |
| 2659 | OPC_CheckPredicate, 19, // 5558: check predicate 19 |
| 2660 | OPC_CheckField, 8, 8, 0, // 5560: check Inst[15:8] == 0x0 |
| 2661 | OPC_Decode, 145, 19, 63, // 5564: decode to TPEI using decoder 63 |
| 2662 | // 5564: } |
| 2663 | 162, 1, 13, // 5568: case 0xa2: { |
| 2664 | OPC_CheckField, 8, 8, 0, // 5571: check Inst[15:8] == 0x0 |
| 2665 | OPC_CheckField, 0, 4, 0, // 5575: check Inst[3:0] == 0x0 |
| 2666 | OPC_Decode, 158, 16, 157, 1, // 5579: decode to PTF using decoder 157 |
| 2667 | // 5579: } |
| 2668 | 170, 1, 5, // 5584: case 0xaa: { |
| 2669 | OPC_Decode, 182, 14, 158, 1, // 5587: decode to LPTEA using decoder 158 |
| 2670 | // 5587: } |
| 2671 | 172, 1, 10, // 5592: case 0xac: { |
| 2672 | OPC_CheckPredicate, 20, // 5595: check predicate 20 |
| 2673 | OPC_CheckField, 8, 8, 0, // 5597: check Inst[15:8] == 0x0 |
| 2674 | OPC_Decode, 236, 10, 63, // 5601: decode to IRBM using decoder 63 |
| 2675 | // 5601: } |
| 2676 | 174, 1, 10, // 5605: case 0xae: { |
| 2677 | OPC_CheckPredicate, 21, // 5608: check predicate 21 |
| 2678 | OPC_CheckField, 8, 8, 0, // 5610: check Inst[15:8] == 0x0 |
| 2679 | OPC_Decode, 192, 16, 63, // 5614: decode to RRBM using decoder 63 |
| 2680 | // 5614: } |
| 2681 | 175, 1, 9, // 5618: case 0xaf: { |
| 2682 | OPC_CheckField, 8, 8, 0, // 5621: check Inst[15:8] == 0x0 |
| 2683 | OPC_Decode, 144, 16, 159, 1, // 5625: decode to PFMF using decoder 159 |
| 2684 | // 5625: } |
| 2685 | 176, 1, 18, // 5630: case 0xb0: { |
| 2686 | OPC_CheckField, 8, 4, 0, // 5633: check Inst[11:8] == 0x0 |
| 2687 | OPC_Scope, 8, // 5637: try { |
| 2688 | OPC_CheckField, 12, 4, 0, // 5639: check Inst[15:12] == 0x0 |
| 2689 | OPC_Decode, 229, 9, 8, // 5643: decode to CU14Opt using decoder 8 |
| 2690 | // 5643: } else try { |
| 2691 | OPC_Decode, 228, 9, 74, // 5647: decode to CU14 using decoder 74 |
| 2692 | // 5647: } |
| 2693 | // 5647: } |
| 2694 | 177, 1, 18, // 5651: case 0xb1: { |
| 2695 | OPC_CheckField, 8, 4, 0, // 5654: check Inst[11:8] == 0x0 |
| 2696 | OPC_Scope, 8, // 5658: try { |
| 2697 | OPC_CheckField, 12, 4, 0, // 5660: check Inst[15:12] == 0x0 |
| 2698 | OPC_Decode, 233, 9, 8, // 5664: decode to CU24Opt using decoder 8 |
| 2699 | // 5664: } else try { |
| 2700 | OPC_Decode, 232, 9, 74, // 5668: decode to CU24 using decoder 74 |
| 2701 | // 5668: } |
| 2702 | // 5668: } |
| 2703 | 178, 1, 8, // 5672: case 0xb2: { |
| 2704 | OPC_CheckField, 8, 8, 0, // 5675: check Inst[15:8] == 0x0 |
| 2705 | OPC_Decode, 234, 9, 8, // 5679: decode to CU41 using decoder 8 |
| 2706 | // 5679: } |
| 2707 | 179, 1, 8, // 5683: case 0xb3: { |
| 2708 | OPC_CheckField, 8, 8, 0, // 5686: check Inst[15:8] == 0x0 |
| 2709 | OPC_Decode, 235, 9, 8, // 5690: decode to CU42 using decoder 8 |
| 2710 | // 5690: } |
| 2711 | 189, 1, 20, // 5694: case 0xbd: { |
| 2712 | OPC_CheckField, 8, 4, 0, // 5697: check Inst[11:8] == 0x0 |
| 2713 | OPC_Scope, 9, // 5701: try { |
| 2714 | OPC_CheckField, 12, 4, 0, // 5703: check Inst[15:12] == 0x0 |
| 2715 | OPC_Decode, 165, 19, 160, 1, // 5707: decode to TRTREOpt using decoder 160 |
| 2716 | // 5707: } else try { |
| 2717 | OPC_Decode, 164, 19, 161, 1, // 5712: decode to TRTRE using decoder 161 |
| 2718 | // 5712: } |
| 2719 | // 5712: } |
| 2720 | 190, 1, 8, // 5717: case 0xbe: { |
| 2721 | OPC_CheckField, 8, 8, 0, // 5720: check Inst[15:8] == 0x0 |
| 2722 | OPC_Decode, 234, 17, 71, // 5724: decode to SRSTU using decoder 71 |
| 2723 | // 5724: } |
| 2724 | 191, 1, 20, // 5728: case 0xbf: { |
| 2725 | OPC_CheckField, 8, 4, 0, // 5731: check Inst[11:8] == 0x0 |
| 2726 | OPC_Scope, 9, // 5735: try { |
| 2727 | OPC_CheckField, 12, 4, 0, // 5737: check Inst[15:12] == 0x0 |
| 2728 | OPC_Decode, 160, 19, 160, 1, // 5741: decode to TRTEOpt using decoder 160 |
| 2729 | // 5741: } else try { |
| 2730 | OPC_Decode, 159, 19, 161, 1, // 5746: decode to TRTE using decoder 161 |
| 2731 | // 5746: } |
| 2732 | // 5746: } |
| 2733 | 192, 1, 139, 1, // 5751: case 0xc0: { |
| 2734 | OPC_Scope, 129, 1, // 5755: try { |
| 2735 | OPC_SwitchField, 8, 4, // 5758: switch Inst[11:8] { |
| 2736 | 1, 7, // 5761: case 0x1: { |
| 2737 | OPC_CheckPredicate, 15, // 5763: check predicate 15 |
| 2738 | OPC_Decode, 239, 16, 162, 1, // 5765: decode to SELFHRAsmO using decoder 162 |
| 2739 | // 5765: } |
| 2740 | 2, 7, // 5770: case 0x2: { |
| 2741 | OPC_CheckPredicate, 15, // 5772: check predicate 15 |
| 2742 | OPC_Decode, 223, 16, 162, 1, // 5774: decode to SELFHRAsmH using decoder 162 |
| 2743 | // 5774: } |
| 2744 | 3, 7, // 5779: case 0x3: { |
| 2745 | OPC_CheckPredicate, 15, // 5781: check predicate 15 |
| 2746 | OPC_Decode, 233, 16, 162, 1, // 5783: decode to SELFHRAsmNLE using decoder 162 |
| 2747 | // 5783: } |
| 2748 | 4, 7, // 5788: case 0x4: { |
| 2749 | OPC_CheckPredicate, 15, // 5790: check predicate 15 |
| 2750 | OPC_Decode, 225, 16, 162, 1, // 5792: decode to SELFHRAsmL using decoder 162 |
| 2751 | // 5792: } |
| 2752 | 5, 7, // 5797: case 0x5: { |
| 2753 | OPC_CheckPredicate, 15, // 5799: check predicate 15 |
| 2754 | OPC_Decode, 231, 16, 162, 1, // 5801: decode to SELFHRAsmNHE using decoder 162 |
| 2755 | // 5801: } |
| 2756 | 6, 7, // 5806: case 0x6: { |
| 2757 | OPC_CheckPredicate, 15, // 5808: check predicate 15 |
| 2758 | OPC_Decode, 227, 16, 162, 1, // 5810: decode to SELFHRAsmLH using decoder 162 |
| 2759 | // 5810: } |
| 2760 | 7, 7, // 5815: case 0x7: { |
| 2761 | OPC_CheckPredicate, 15, // 5817: check predicate 15 |
| 2762 | OPC_Decode, 229, 16, 162, 1, // 5819: decode to SELFHRAsmNE using decoder 162 |
| 2763 | // 5819: } |
| 2764 | 8, 7, // 5824: case 0x8: { |
| 2765 | OPC_CheckPredicate, 15, // 5826: check predicate 15 |
| 2766 | OPC_Decode, 222, 16, 162, 1, // 5828: decode to SELFHRAsmE using decoder 162 |
| 2767 | // 5828: } |
| 2768 | 9, 7, // 5833: case 0x9: { |
| 2769 | OPC_CheckPredicate, 15, // 5835: check predicate 15 |
| 2770 | OPC_Decode, 234, 16, 162, 1, // 5837: decode to SELFHRAsmNLH using decoder 162 |
| 2771 | // 5837: } |
| 2772 | 10, 7, // 5842: case 0xa: { |
| 2773 | OPC_CheckPredicate, 15, // 5844: check predicate 15 |
| 2774 | OPC_Decode, 224, 16, 162, 1, // 5846: decode to SELFHRAsmHE using decoder 162 |
| 2775 | // 5846: } |
| 2776 | 11, 7, // 5851: case 0xb: { |
| 2777 | OPC_CheckPredicate, 15, // 5853: check predicate 15 |
| 2778 | OPC_Decode, 232, 16, 162, 1, // 5855: decode to SELFHRAsmNL using decoder 162 |
| 2779 | // 5855: } |
| 2780 | 12, 7, // 5860: case 0xc: { |
| 2781 | OPC_CheckPredicate, 15, // 5862: check predicate 15 |
| 2782 | OPC_Decode, 226, 16, 162, 1, // 5864: decode to SELFHRAsmLE using decoder 162 |
| 2783 | // 5864: } |
| 2784 | 13, 7, // 5869: case 0xd: { |
| 2785 | OPC_CheckPredicate, 15, // 5871: check predicate 15 |
| 2786 | OPC_Decode, 230, 16, 162, 1, // 5873: decode to SELFHRAsmNH using decoder 162 |
| 2787 | // 5873: } |
| 2788 | 14, 0, // 5878: case 0xe: { |
| 2789 | OPC_CheckPredicate, 15, // 5880: check predicate 15 |
| 2790 | OPC_Decode, 236, 16, 162, 1, // 5882: decode to SELFHRAsmNO using decoder 162 |
| 2791 | // 5882: } |
| 2792 | // 5882: } // switch Inst[11:8] |
| 2793 | // 5882: } else try { |
| 2794 | OPC_CheckPredicate, 15, // 5887: check predicate 15 |
| 2795 | OPC_Decode, 221, 16, 163, 1, // 5889: decode to SELFHRAsm using decoder 163 |
| 2796 | // 5889: } |
| 2797 | // 5889: } |
| 2798 | 200, 1, 11, // 5894: case 0xc8: { |
| 2799 | OPC_CheckPredicate, 22, // 5897: check predicate 22 |
| 2800 | OPC_CheckField, 8, 4, 0, // 5899: check Inst[11:8] == 0x0 |
| 2801 | OPC_Decode, 196, 4, 164, 1, // 5903: decode to AHHHR using decoder 164 |
| 2802 | // 5903: } |
| 2803 | 201, 1, 11, // 5908: case 0xc9: { |
| 2804 | OPC_CheckPredicate, 22, // 5911: check predicate 22 |
| 2805 | OPC_CheckField, 8, 4, 0, // 5913: check Inst[11:8] == 0x0 |
| 2806 | OPC_Decode, 168, 17, 164, 1, // 5917: decode to SHHHR using decoder 164 |
| 2807 | // 5917: } |
| 2808 | 202, 1, 11, // 5922: case 0xca: { |
| 2809 | OPC_CheckPredicate, 22, // 5925: check predicate 22 |
| 2810 | OPC_CheckField, 8, 4, 0, // 5927: check Inst[11:8] == 0x0 |
| 2811 | OPC_Decode, 216, 4, 164, 1, // 5931: decode to ALHHHR using decoder 164 |
| 2812 | // 5931: } |
| 2813 | 203, 1, 11, // 5936: case 0xcb: { |
| 2814 | OPC_CheckPredicate, 22, // 5939: check predicate 22 |
| 2815 | OPC_CheckField, 8, 4, 0, // 5941: check Inst[11:8] == 0x0 |
| 2816 | OPC_Decode, 192, 17, 164, 1, // 5945: decode to SLHHHR using decoder 164 |
| 2817 | // 5945: } |
| 2818 | 205, 1, 11, // 5950: case 0xcd: { |
| 2819 | OPC_CheckPredicate, 22, // 5953: check predicate 22 |
| 2820 | OPC_CheckField, 8, 8, 0, // 5955: check Inst[15:8] == 0x0 |
| 2821 | OPC_Decode, 251, 6, 165, 1, // 5959: decode to CHHR using decoder 165 |
| 2822 | // 5959: } |
| 2823 | 207, 1, 11, // 5964: case 0xcf: { |
| 2824 | OPC_CheckPredicate, 22, // 5967: check predicate 22 |
| 2825 | OPC_CheckField, 8, 8, 0, // 5969: check Inst[15:8] == 0x0 |
| 2826 | OPC_Decode, 185, 8, 165, 1, // 5973: decode to CLHHR using decoder 165 |
| 2827 | // 5973: } |
| 2828 | 216, 1, 11, // 5978: case 0xd8: { |
| 2829 | OPC_CheckPredicate, 22, // 5981: check predicate 22 |
| 2830 | OPC_CheckField, 8, 4, 0, // 5983: check Inst[11:8] == 0x0 |
| 2831 | OPC_Decode, 197, 4, 166, 1, // 5987: decode to AHHLR using decoder 166 |
| 2832 | // 5987: } |
| 2833 | 217, 1, 11, // 5992: case 0xd9: { |
| 2834 | OPC_CheckPredicate, 22, // 5995: check predicate 22 |
| 2835 | OPC_CheckField, 8, 4, 0, // 5997: check Inst[11:8] == 0x0 |
| 2836 | OPC_Decode, 169, 17, 166, 1, // 6001: decode to SHHLR using decoder 166 |
| 2837 | // 6001: } |
| 2838 | 218, 1, 11, // 6006: case 0xda: { |
| 2839 | OPC_CheckPredicate, 22, // 6009: check predicate 22 |
| 2840 | OPC_CheckField, 8, 4, 0, // 6011: check Inst[11:8] == 0x0 |
| 2841 | OPC_Decode, 217, 4, 166, 1, // 6015: decode to ALHHLR using decoder 166 |
| 2842 | // 6015: } |
| 2843 | 219, 1, 11, // 6020: case 0xdb: { |
| 2844 | OPC_CheckPredicate, 22, // 6023: check predicate 22 |
| 2845 | OPC_CheckField, 8, 4, 0, // 6025: check Inst[11:8] == 0x0 |
| 2846 | OPC_Decode, 193, 17, 166, 1, // 6029: decode to SLHHLR using decoder 166 |
| 2847 | // 6029: } |
| 2848 | 221, 1, 11, // 6034: case 0xdd: { |
| 2849 | OPC_CheckPredicate, 22, // 6037: check predicate 22 |
| 2850 | OPC_CheckField, 8, 8, 0, // 6039: check Inst[15:8] == 0x0 |
| 2851 | OPC_Decode, 254, 6, 167, 1, // 6043: decode to CHLR using decoder 167 |
| 2852 | // 6043: } |
| 2853 | 223, 1, 11, // 6048: case 0xdf: { |
| 2854 | OPC_CheckPredicate, 22, // 6051: check predicate 22 |
| 2855 | OPC_CheckField, 8, 8, 0, // 6053: check Inst[15:8] == 0x0 |
| 2856 | OPC_Decode, 187, 8, 167, 1, // 6057: decode to CLHLR using decoder 167 |
| 2857 | // 6057: } |
| 2858 | 224, 1, 143, 1, // 6062: case 0xe0: { |
| 2859 | OPC_CheckField, 8, 4, 0, // 6066: check Inst[11:8] == 0x0 |
| 2860 | OPC_Scope, 129, 1, // 6070: try { |
| 2861 | OPC_SwitchField, 12, 4, // 6073: switch Inst[15:12] { |
| 2862 | 1, 7, // 6076: case 0x1: { |
| 2863 | OPC_CheckPredicate, 23, // 6078: check predicate 23 |
| 2864 | OPC_Decode, 157, 13, 168, 1, // 6080: decode to LOCFHRAsmO using decoder 168 |
| 2865 | // 6080: } |
| 2866 | 2, 7, // 6085: case 0x2: { |
| 2867 | OPC_CheckPredicate, 23, // 6087: check predicate 23 |
| 2868 | OPC_Decode, 141, 13, 168, 1, // 6089: decode to LOCFHRAsmH using decoder 168 |
| 2869 | // 6089: } |
| 2870 | 3, 7, // 6094: case 0x3: { |
| 2871 | OPC_CheckPredicate, 23, // 6096: check predicate 23 |
| 2872 | OPC_Decode, 151, 13, 168, 1, // 6098: decode to LOCFHRAsmNLE using decoder 168 |
| 2873 | // 6098: } |
| 2874 | 4, 7, // 6103: case 0x4: { |
| 2875 | OPC_CheckPredicate, 23, // 6105: check predicate 23 |
| 2876 | OPC_Decode, 143, 13, 168, 1, // 6107: decode to LOCFHRAsmL using decoder 168 |
| 2877 | // 6107: } |
| 2878 | 5, 7, // 6112: case 0x5: { |
| 2879 | OPC_CheckPredicate, 23, // 6114: check predicate 23 |
| 2880 | OPC_Decode, 149, 13, 168, 1, // 6116: decode to LOCFHRAsmNHE using decoder 168 |
| 2881 | // 6116: } |
| 2882 | 6, 7, // 6121: case 0x6: { |
| 2883 | OPC_CheckPredicate, 23, // 6123: check predicate 23 |
| 2884 | OPC_Decode, 145, 13, 168, 1, // 6125: decode to LOCFHRAsmLH using decoder 168 |
| 2885 | // 6125: } |
| 2886 | 7, 7, // 6130: case 0x7: { |
| 2887 | OPC_CheckPredicate, 23, // 6132: check predicate 23 |
| 2888 | OPC_Decode, 147, 13, 168, 1, // 6134: decode to LOCFHRAsmNE using decoder 168 |
| 2889 | // 6134: } |
| 2890 | 8, 7, // 6139: case 0x8: { |
| 2891 | OPC_CheckPredicate, 23, // 6141: check predicate 23 |
| 2892 | OPC_Decode, 140, 13, 168, 1, // 6143: decode to LOCFHRAsmE using decoder 168 |
| 2893 | // 6143: } |
| 2894 | 9, 7, // 6148: case 0x9: { |
| 2895 | OPC_CheckPredicate, 23, // 6150: check predicate 23 |
| 2896 | OPC_Decode, 152, 13, 168, 1, // 6152: decode to LOCFHRAsmNLH using decoder 168 |
| 2897 | // 6152: } |
| 2898 | 10, 7, // 6157: case 0xa: { |
| 2899 | OPC_CheckPredicate, 23, // 6159: check predicate 23 |
| 2900 | OPC_Decode, 142, 13, 168, 1, // 6161: decode to LOCFHRAsmHE using decoder 168 |
| 2901 | // 6161: } |
| 2902 | 11, 7, // 6166: case 0xb: { |
| 2903 | OPC_CheckPredicate, 23, // 6168: check predicate 23 |
| 2904 | OPC_Decode, 150, 13, 168, 1, // 6170: decode to LOCFHRAsmNL using decoder 168 |
| 2905 | // 6170: } |
| 2906 | 12, 7, // 6175: case 0xc: { |
| 2907 | OPC_CheckPredicate, 23, // 6177: check predicate 23 |
| 2908 | OPC_Decode, 144, 13, 168, 1, // 6179: decode to LOCFHRAsmLE using decoder 168 |
| 2909 | // 6179: } |
| 2910 | 13, 7, // 6184: case 0xd: { |
| 2911 | OPC_CheckPredicate, 23, // 6186: check predicate 23 |
| 2912 | OPC_Decode, 148, 13, 168, 1, // 6188: decode to LOCFHRAsmNH using decoder 168 |
| 2913 | // 6188: } |
| 2914 | 14, 0, // 6193: case 0xe: { |
| 2915 | OPC_CheckPredicate, 23, // 6195: check predicate 23 |
| 2916 | OPC_Decode, 154, 13, 168, 1, // 6197: decode to LOCFHRAsmNO using decoder 168 |
| 2917 | // 6197: } |
| 2918 | // 6197: } // switch Inst[15:12] |
| 2919 | // 6197: } else try { |
| 2920 | OPC_CheckPredicate, 23, // 6202: check predicate 23 |
| 2921 | OPC_Decode, 139, 13, 169, 1, // 6204: decode to LOCFHRAsm using decoder 169 |
| 2922 | // 6204: } |
| 2923 | // 6204: } |
| 2924 | 225, 1, 22, // 6209: case 0xe1: { |
| 2925 | OPC_CheckField, 8, 4, 0, // 6212: check Inst[11:8] == 0x0 |
| 2926 | OPC_Scope, 10, // 6216: try { |
| 2927 | OPC_CheckField, 12, 4, 0, // 6218: check Inst[15:12] == 0x0 |
| 2928 | OPC_CheckPredicate, 24, // 6222: check predicate 24 |
| 2929 | OPC_Decode, 151, 16, 63, // 6224: decode to POPCNT using decoder 63 |
| 2930 | // 6224: } else try { |
| 2931 | OPC_CheckPredicate, 15, // 6228: check predicate 15 |
| 2932 | OPC_Decode, 152, 16, 75, // 6230: decode to POPCNTOpt using decoder 75 |
| 2933 | // 6230: } |
| 2934 | // 6230: } |
| 2935 | 226, 1, 143, 1, // 6234: case 0xe2: { |
| 2936 | OPC_CheckField, 8, 4, 0, // 6238: check Inst[11:8] == 0x0 |
| 2937 | OPC_Scope, 129, 1, // 6242: try { |
| 2938 | OPC_SwitchField, 12, 4, // 6245: switch Inst[15:12] { |
| 2939 | 1, 7, // 6248: case 0x1: { |
| 2940 | OPC_CheckPredicate, 25, // 6250: check predicate 25 |
| 2941 | OPC_Decode, 223, 13, 141, 1, // 6252: decode to LOCGRAsmO using decoder 141 |
| 2942 | // 6252: } |
| 2943 | 2, 7, // 6257: case 0x2: { |
| 2944 | OPC_CheckPredicate, 25, // 6259: check predicate 25 |
| 2945 | OPC_Decode, 207, 13, 141, 1, // 6261: decode to LOCGRAsmH using decoder 141 |
| 2946 | // 6261: } |
| 2947 | 3, 7, // 6266: case 0x3: { |
| 2948 | OPC_CheckPredicate, 25, // 6268: check predicate 25 |
| 2949 | OPC_Decode, 217, 13, 141, 1, // 6270: decode to LOCGRAsmNLE using decoder 141 |
| 2950 | // 6270: } |
| 2951 | 4, 7, // 6275: case 0x4: { |
| 2952 | OPC_CheckPredicate, 25, // 6277: check predicate 25 |
| 2953 | OPC_Decode, 209, 13, 141, 1, // 6279: decode to LOCGRAsmL using decoder 141 |
| 2954 | // 6279: } |
| 2955 | 5, 7, // 6284: case 0x5: { |
| 2956 | OPC_CheckPredicate, 25, // 6286: check predicate 25 |
| 2957 | OPC_Decode, 215, 13, 141, 1, // 6288: decode to LOCGRAsmNHE using decoder 141 |
| 2958 | // 6288: } |
| 2959 | 6, 7, // 6293: case 0x6: { |
| 2960 | OPC_CheckPredicate, 25, // 6295: check predicate 25 |
| 2961 | OPC_Decode, 211, 13, 141, 1, // 6297: decode to LOCGRAsmLH using decoder 141 |
| 2962 | // 6297: } |
| 2963 | 7, 7, // 6302: case 0x7: { |
| 2964 | OPC_CheckPredicate, 25, // 6304: check predicate 25 |
| 2965 | OPC_Decode, 213, 13, 141, 1, // 6306: decode to LOCGRAsmNE using decoder 141 |
| 2966 | // 6306: } |
| 2967 | 8, 7, // 6311: case 0x8: { |
| 2968 | OPC_CheckPredicate, 25, // 6313: check predicate 25 |
| 2969 | OPC_Decode, 206, 13, 141, 1, // 6315: decode to LOCGRAsmE using decoder 141 |
| 2970 | // 6315: } |
| 2971 | 9, 7, // 6320: case 0x9: { |
| 2972 | OPC_CheckPredicate, 25, // 6322: check predicate 25 |
| 2973 | OPC_Decode, 218, 13, 141, 1, // 6324: decode to LOCGRAsmNLH using decoder 141 |
| 2974 | // 6324: } |
| 2975 | 10, 7, // 6329: case 0xa: { |
| 2976 | OPC_CheckPredicate, 25, // 6331: check predicate 25 |
| 2977 | OPC_Decode, 208, 13, 141, 1, // 6333: decode to LOCGRAsmHE using decoder 141 |
| 2978 | // 6333: } |
| 2979 | 11, 7, // 6338: case 0xb: { |
| 2980 | OPC_CheckPredicate, 25, // 6340: check predicate 25 |
| 2981 | OPC_Decode, 216, 13, 141, 1, // 6342: decode to LOCGRAsmNL using decoder 141 |
| 2982 | // 6342: } |
| 2983 | 12, 7, // 6347: case 0xc: { |
| 2984 | OPC_CheckPredicate, 25, // 6349: check predicate 25 |
| 2985 | OPC_Decode, 210, 13, 141, 1, // 6351: decode to LOCGRAsmLE using decoder 141 |
| 2986 | // 6351: } |
| 2987 | 13, 7, // 6356: case 0xd: { |
| 2988 | OPC_CheckPredicate, 25, // 6358: check predicate 25 |
| 2989 | OPC_Decode, 214, 13, 141, 1, // 6360: decode to LOCGRAsmNH using decoder 141 |
| 2990 | // 6360: } |
| 2991 | 14, 0, // 6365: case 0xe: { |
| 2992 | OPC_CheckPredicate, 25, // 6367: check predicate 25 |
| 2993 | OPC_Decode, 220, 13, 141, 1, // 6369: decode to LOCGRAsmNO using decoder 141 |
| 2994 | // 6369: } |
| 2995 | // 6369: } // switch Inst[15:12] |
| 2996 | // 6369: } else try { |
| 2997 | OPC_CheckPredicate, 25, // 6374: check predicate 25 |
| 2998 | OPC_Decode, 205, 13, 170, 1, // 6376: decode to LOCGRAsm using decoder 170 |
| 2999 | // 6376: } |
| 3000 | // 6376: } |
| 3001 | 227, 1, 139, 1, // 6381: case 0xe3: { |
| 3002 | OPC_Scope, 129, 1, // 6385: try { |
| 3003 | OPC_SwitchField, 8, 4, // 6388: switch Inst[11:8] { |
| 3004 | 1, 7, // 6391: case 0x1: { |
| 3005 | OPC_CheckPredicate, 15, // 6393: check predicate 15 |
| 3006 | OPC_Decode, 133, 17, 171, 1, // 6395: decode to SELGRAsmO using decoder 171 |
| 3007 | // 6395: } |
| 3008 | 2, 7, // 6400: case 0x2: { |
| 3009 | OPC_CheckPredicate, 15, // 6402: check predicate 15 |
| 3010 | OPC_Decode, 245, 16, 171, 1, // 6404: decode to SELGRAsmH using decoder 171 |
| 3011 | // 6404: } |
| 3012 | 3, 7, // 6409: case 0x3: { |
| 3013 | OPC_CheckPredicate, 15, // 6411: check predicate 15 |
| 3014 | OPC_Decode, 255, 16, 171, 1, // 6413: decode to SELGRAsmNLE using decoder 171 |
| 3015 | // 6413: } |
| 3016 | 4, 7, // 6418: case 0x4: { |
| 3017 | OPC_CheckPredicate, 15, // 6420: check predicate 15 |
| 3018 | OPC_Decode, 247, 16, 171, 1, // 6422: decode to SELGRAsmL using decoder 171 |
| 3019 | // 6422: } |
| 3020 | 5, 7, // 6427: case 0x5: { |
| 3021 | OPC_CheckPredicate, 15, // 6429: check predicate 15 |
| 3022 | OPC_Decode, 253, 16, 171, 1, // 6431: decode to SELGRAsmNHE using decoder 171 |
| 3023 | // 6431: } |
| 3024 | 6, 7, // 6436: case 0x6: { |
| 3025 | OPC_CheckPredicate, 15, // 6438: check predicate 15 |
| 3026 | OPC_Decode, 249, 16, 171, 1, // 6440: decode to SELGRAsmLH using decoder 171 |
| 3027 | // 6440: } |
| 3028 | 7, 7, // 6445: case 0x7: { |
| 3029 | OPC_CheckPredicate, 15, // 6447: check predicate 15 |
| 3030 | OPC_Decode, 251, 16, 171, 1, // 6449: decode to SELGRAsmNE using decoder 171 |
| 3031 | // 6449: } |
| 3032 | 8, 7, // 6454: case 0x8: { |
| 3033 | OPC_CheckPredicate, 15, // 6456: check predicate 15 |
| 3034 | OPC_Decode, 244, 16, 171, 1, // 6458: decode to SELGRAsmE using decoder 171 |
| 3035 | // 6458: } |
| 3036 | 9, 7, // 6463: case 0x9: { |
| 3037 | OPC_CheckPredicate, 15, // 6465: check predicate 15 |
| 3038 | OPC_Decode, 128, 17, 171, 1, // 6467: decode to SELGRAsmNLH using decoder 171 |
| 3039 | // 6467: } |
| 3040 | 10, 7, // 6472: case 0xa: { |
| 3041 | OPC_CheckPredicate, 15, // 6474: check predicate 15 |
| 3042 | OPC_Decode, 246, 16, 171, 1, // 6476: decode to SELGRAsmHE using decoder 171 |
| 3043 | // 6476: } |
| 3044 | 11, 7, // 6481: case 0xb: { |
| 3045 | OPC_CheckPredicate, 15, // 6483: check predicate 15 |
| 3046 | OPC_Decode, 254, 16, 171, 1, // 6485: decode to SELGRAsmNL using decoder 171 |
| 3047 | // 6485: } |
| 3048 | 12, 7, // 6490: case 0xc: { |
| 3049 | OPC_CheckPredicate, 15, // 6492: check predicate 15 |
| 3050 | OPC_Decode, 248, 16, 171, 1, // 6494: decode to SELGRAsmLE using decoder 171 |
| 3051 | // 6494: } |
| 3052 | 13, 7, // 6499: case 0xd: { |
| 3053 | OPC_CheckPredicate, 15, // 6501: check predicate 15 |
| 3054 | OPC_Decode, 252, 16, 171, 1, // 6503: decode to SELGRAsmNH using decoder 171 |
| 3055 | // 6503: } |
| 3056 | 14, 0, // 6508: case 0xe: { |
| 3057 | OPC_CheckPredicate, 15, // 6510: check predicate 15 |
| 3058 | OPC_Decode, 130, 17, 171, 1, // 6512: decode to SELGRAsmNO using decoder 171 |
| 3059 | // 6512: } |
| 3060 | // 6512: } // switch Inst[11:8] |
| 3061 | // 6512: } else try { |
| 3062 | OPC_CheckPredicate, 15, // 6517: check predicate 15 |
| 3063 | OPC_Decode, 243, 16, 172, 1, // 6519: decode to SELGRAsm using decoder 172 |
| 3064 | // 6519: } |
| 3065 | // 6519: } |
| 3066 | 228, 1, 11, // 6524: case 0xe4: { |
| 3067 | OPC_CheckPredicate, 26, // 6527: check predicate 26 |
| 3068 | OPC_CheckField, 8, 4, 0, // 6529: check Inst[11:8] == 0x0 |
| 3069 | OPC_Decode, 219, 15, 147, 1, // 6533: decode to NGRK using decoder 147 |
| 3070 | // 6533: } |
| 3071 | 229, 1, 11, // 6538: case 0xe5: { |
| 3072 | OPC_CheckPredicate, 15, // 6541: check predicate 15 |
| 3073 | OPC_CheckField, 8, 4, 0, // 6543: check Inst[11:8] == 0x0 |
| 3074 | OPC_Decode, 215, 15, 147, 1, // 6547: decode to NCGRK using decoder 147 |
| 3075 | // 6547: } |
| 3076 | 230, 1, 11, // 6552: case 0xe6: { |
| 3077 | OPC_CheckPredicate, 26, // 6555: check predicate 26 |
| 3078 | OPC_CheckField, 8, 4, 0, // 6557: check Inst[11:8] == 0x0 |
| 3079 | OPC_Decode, 252, 15, 147, 1, // 6561: decode to OGRK using decoder 147 |
| 3080 | // 6561: } |
| 3081 | 231, 1, 11, // 6566: case 0xe7: { |
| 3082 | OPC_CheckPredicate, 26, // 6569: check predicate 26 |
| 3083 | OPC_CheckField, 8, 4, 0, // 6571: check Inst[11:8] == 0x0 |
| 3084 | OPC_Decode, 217, 25, 147, 1, // 6575: decode to XGRK using decoder 147 |
| 3085 | // 6575: } |
| 3086 | 232, 1, 11, // 6580: case 0xe8: { |
| 3087 | OPC_CheckPredicate, 26, // 6583: check predicate 26 |
| 3088 | OPC_CheckField, 8, 4, 0, // 6585: check Inst[11:8] == 0x0 |
| 3089 | OPC_Decode, 193, 4, 147, 1, // 6589: decode to AGRK using decoder 147 |
| 3090 | // 6589: } |
| 3091 | 233, 1, 11, // 6594: case 0xe9: { |
| 3092 | OPC_CheckPredicate, 26, // 6597: check predicate 26 |
| 3093 | OPC_CheckField, 8, 4, 0, // 6599: check Inst[11:8] == 0x0 |
| 3094 | OPC_Decode, 166, 17, 147, 1, // 6603: decode to SGRK using decoder 147 |
| 3095 | // 6603: } |
| 3096 | 234, 1, 11, // 6608: case 0xea: { |
| 3097 | OPC_CheckPredicate, 26, // 6611: check predicate 26 |
| 3098 | OPC_CheckField, 8, 4, 0, // 6613: check Inst[11:8] == 0x0 |
| 3099 | OPC_Decode, 214, 4, 147, 1, // 6617: decode to ALGRK using decoder 147 |
| 3100 | // 6617: } |
| 3101 | 235, 1, 11, // 6622: case 0xeb: { |
| 3102 | OPC_CheckPredicate, 26, // 6625: check predicate 26 |
| 3103 | OPC_CheckField, 8, 4, 0, // 6627: check Inst[11:8] == 0x0 |
| 3104 | OPC_Decode, 191, 17, 147, 1, // 6631: decode to SLGRK using decoder 147 |
| 3105 | // 6631: } |
| 3106 | 236, 1, 11, // 6636: case 0xec: { |
| 3107 | OPC_CheckPredicate, 27, // 6639: check predicate 27 |
| 3108 | OPC_CheckField, 8, 4, 0, // 6641: check Inst[11:8] == 0x0 |
| 3109 | OPC_Decode, 144, 15, 173, 1, // 6645: decode to MGRK using decoder 173 |
| 3110 | // 6645: } |
| 3111 | 237, 1, 11, // 6650: case 0xed: { |
| 3112 | OPC_CheckPredicate, 27, // 6653: check predicate 27 |
| 3113 | OPC_CheckField, 8, 4, 0, // 6655: check Inst[11:8] == 0x0 |
| 3114 | OPC_Decode, 172, 15, 147, 1, // 6659: decode to MSGRKC using decoder 147 |
| 3115 | // 6659: } |
| 3116 | 240, 1, 139, 1, // 6664: case 0xf0: { |
| 3117 | OPC_Scope, 129, 1, // 6668: try { |
| 3118 | OPC_SwitchField, 8, 4, // 6671: switch Inst[11:8] { |
| 3119 | 1, 7, // 6674: case 0x1: { |
| 3120 | OPC_CheckPredicate, 15, // 6676: check predicate 15 |
| 3121 | OPC_Decode, 155, 17, 174, 1, // 6678: decode to SELRAsmO using decoder 174 |
| 3122 | // 6678: } |
| 3123 | 2, 7, // 6683: case 0x2: { |
| 3124 | OPC_CheckPredicate, 15, // 6685: check predicate 15 |
| 3125 | OPC_Decode, 139, 17, 174, 1, // 6687: decode to SELRAsmH using decoder 174 |
| 3126 | // 6687: } |
| 3127 | 3, 7, // 6692: case 0x3: { |
| 3128 | OPC_CheckPredicate, 15, // 6694: check predicate 15 |
| 3129 | OPC_Decode, 149, 17, 174, 1, // 6696: decode to SELRAsmNLE using decoder 174 |
| 3130 | // 6696: } |
| 3131 | 4, 7, // 6701: case 0x4: { |
| 3132 | OPC_CheckPredicate, 15, // 6703: check predicate 15 |
| 3133 | OPC_Decode, 141, 17, 174, 1, // 6705: decode to SELRAsmL using decoder 174 |
| 3134 | // 6705: } |
| 3135 | 5, 7, // 6710: case 0x5: { |
| 3136 | OPC_CheckPredicate, 15, // 6712: check predicate 15 |
| 3137 | OPC_Decode, 147, 17, 174, 1, // 6714: decode to SELRAsmNHE using decoder 174 |
| 3138 | // 6714: } |
| 3139 | 6, 7, // 6719: case 0x6: { |
| 3140 | OPC_CheckPredicate, 15, // 6721: check predicate 15 |
| 3141 | OPC_Decode, 143, 17, 174, 1, // 6723: decode to SELRAsmLH using decoder 174 |
| 3142 | // 6723: } |
| 3143 | 7, 7, // 6728: case 0x7: { |
| 3144 | OPC_CheckPredicate, 15, // 6730: check predicate 15 |
| 3145 | OPC_Decode, 145, 17, 174, 1, // 6732: decode to SELRAsmNE using decoder 174 |
| 3146 | // 6732: } |
| 3147 | 8, 7, // 6737: case 0x8: { |
| 3148 | OPC_CheckPredicate, 15, // 6739: check predicate 15 |
| 3149 | OPC_Decode, 138, 17, 174, 1, // 6741: decode to SELRAsmE using decoder 174 |
| 3150 | // 6741: } |
| 3151 | 9, 7, // 6746: case 0x9: { |
| 3152 | OPC_CheckPredicate, 15, // 6748: check predicate 15 |
| 3153 | OPC_Decode, 150, 17, 174, 1, // 6750: decode to SELRAsmNLH using decoder 174 |
| 3154 | // 6750: } |
| 3155 | 10, 7, // 6755: case 0xa: { |
| 3156 | OPC_CheckPredicate, 15, // 6757: check predicate 15 |
| 3157 | OPC_Decode, 140, 17, 174, 1, // 6759: decode to SELRAsmHE using decoder 174 |
| 3158 | // 6759: } |
| 3159 | 11, 7, // 6764: case 0xb: { |
| 3160 | OPC_CheckPredicate, 15, // 6766: check predicate 15 |
| 3161 | OPC_Decode, 148, 17, 174, 1, // 6768: decode to SELRAsmNL using decoder 174 |
| 3162 | // 6768: } |
| 3163 | 12, 7, // 6773: case 0xc: { |
| 3164 | OPC_CheckPredicate, 15, // 6775: check predicate 15 |
| 3165 | OPC_Decode, 142, 17, 174, 1, // 6777: decode to SELRAsmLE using decoder 174 |
| 3166 | // 6777: } |
| 3167 | 13, 7, // 6782: case 0xd: { |
| 3168 | OPC_CheckPredicate, 15, // 6784: check predicate 15 |
| 3169 | OPC_Decode, 146, 17, 174, 1, // 6786: decode to SELRAsmNH using decoder 174 |
| 3170 | // 6786: } |
| 3171 | 14, 0, // 6791: case 0xe: { |
| 3172 | OPC_CheckPredicate, 15, // 6793: check predicate 15 |
| 3173 | OPC_Decode, 152, 17, 174, 1, // 6795: decode to SELRAsmNO using decoder 174 |
| 3174 | // 6795: } |
| 3175 | // 6795: } // switch Inst[11:8] |
| 3176 | // 6795: } else try { |
| 3177 | OPC_CheckPredicate, 15, // 6800: check predicate 15 |
| 3178 | OPC_Decode, 137, 17, 175, 1, // 6802: decode to SELRAsm using decoder 175 |
| 3179 | // 6802: } |
| 3180 | // 6802: } |
| 3181 | 242, 1, 128, 1, // 6807: case 0xf2: { |
| 3182 | OPC_CheckField, 8, 4, 0, // 6811: check Inst[11:8] == 0x0 |
| 3183 | OPC_Scope, 115, // 6815: try { |
| 3184 | OPC_SwitchField, 12, 4, // 6817: switch Inst[15:12] { |
| 3185 | 1, 6, // 6820: case 0x1: { |
| 3186 | OPC_CheckPredicate, 25, // 6822: check predicate 25 |
| 3187 | OPC_Decode, 161, 14, 10, // 6824: decode to LOCRAsmO using decoder 10 |
| 3188 | // 6824: } |
| 3189 | 2, 6, // 6828: case 0x2: { |
| 3190 | OPC_CheckPredicate, 25, // 6830: check predicate 25 |
| 3191 | OPC_Decode, 145, 14, 10, // 6832: decode to LOCRAsmH using decoder 10 |
| 3192 | // 6832: } |
| 3193 | 3, 6, // 6836: case 0x3: { |
| 3194 | OPC_CheckPredicate, 25, // 6838: check predicate 25 |
| 3195 | OPC_Decode, 155, 14, 10, // 6840: decode to LOCRAsmNLE using decoder 10 |
| 3196 | // 6840: } |
| 3197 | 4, 6, // 6844: case 0x4: { |
| 3198 | OPC_CheckPredicate, 25, // 6846: check predicate 25 |
| 3199 | OPC_Decode, 147, 14, 10, // 6848: decode to LOCRAsmL using decoder 10 |
| 3200 | // 6848: } |
| 3201 | 5, 6, // 6852: case 0x5: { |
| 3202 | OPC_CheckPredicate, 25, // 6854: check predicate 25 |
| 3203 | OPC_Decode, 153, 14, 10, // 6856: decode to LOCRAsmNHE using decoder 10 |
| 3204 | // 6856: } |
| 3205 | 6, 6, // 6860: case 0x6: { |
| 3206 | OPC_CheckPredicate, 25, // 6862: check predicate 25 |
| 3207 | OPC_Decode, 149, 14, 10, // 6864: decode to LOCRAsmLH using decoder 10 |
| 3208 | // 6864: } |
| 3209 | 7, 6, // 6868: case 0x7: { |
| 3210 | OPC_CheckPredicate, 25, // 6870: check predicate 25 |
| 3211 | OPC_Decode, 151, 14, 10, // 6872: decode to LOCRAsmNE using decoder 10 |
| 3212 | // 6872: } |
| 3213 | 8, 6, // 6876: case 0x8: { |
| 3214 | OPC_CheckPredicate, 25, // 6878: check predicate 25 |
| 3215 | OPC_Decode, 144, 14, 10, // 6880: decode to LOCRAsmE using decoder 10 |
| 3216 | // 6880: } |
| 3217 | 9, 6, // 6884: case 0x9: { |
| 3218 | OPC_CheckPredicate, 25, // 6886: check predicate 25 |
| 3219 | OPC_Decode, 156, 14, 10, // 6888: decode to LOCRAsmNLH using decoder 10 |
| 3220 | // 6888: } |
| 3221 | 10, 6, // 6892: case 0xa: { |
| 3222 | OPC_CheckPredicate, 25, // 6894: check predicate 25 |
| 3223 | OPC_Decode, 146, 14, 10, // 6896: decode to LOCRAsmHE using decoder 10 |
| 3224 | // 6896: } |
| 3225 | 11, 6, // 6900: case 0xb: { |
| 3226 | OPC_CheckPredicate, 25, // 6902: check predicate 25 |
| 3227 | OPC_Decode, 154, 14, 10, // 6904: decode to LOCRAsmNL using decoder 10 |
| 3228 | // 6904: } |
| 3229 | 12, 6, // 6908: case 0xc: { |
| 3230 | OPC_CheckPredicate, 25, // 6910: check predicate 25 |
| 3231 | OPC_Decode, 148, 14, 10, // 6912: decode to LOCRAsmLE using decoder 10 |
| 3232 | // 6912: } |
| 3233 | 13, 6, // 6916: case 0xd: { |
| 3234 | OPC_CheckPredicate, 25, // 6918: check predicate 25 |
| 3235 | OPC_Decode, 152, 14, 10, // 6920: decode to LOCRAsmNH using decoder 10 |
| 3236 | // 6920: } |
| 3237 | 14, 0, // 6924: case 0xe: { |
| 3238 | OPC_CheckPredicate, 25, // 6926: check predicate 25 |
| 3239 | OPC_Decode, 158, 14, 10, // 6928: decode to LOCRAsmNO using decoder 10 |
| 3240 | // 6928: } |
| 3241 | // 6928: } // switch Inst[15:12] |
| 3242 | // 6928: } else try { |
| 3243 | OPC_CheckPredicate, 25, // 6932: check predicate 25 |
| 3244 | OPC_Decode, 143, 14, 176, 1, // 6934: decode to LOCRAsm using decoder 176 |
| 3245 | // 6934: } |
| 3246 | // 6934: } |
| 3247 | 244, 1, 11, // 6939: case 0xf4: { |
| 3248 | OPC_CheckPredicate, 26, // 6942: check predicate 26 |
| 3249 | OPC_CheckField, 8, 4, 0, // 6944: check Inst[11:8] == 0x0 |
| 3250 | OPC_Decode, 241, 15, 149, 1, // 6948: decode to NRK using decoder 149 |
| 3251 | // 6948: } |
| 3252 | 245, 1, 11, // 6953: case 0xf5: { |
| 3253 | OPC_CheckPredicate, 15, // 6956: check predicate 15 |
| 3254 | OPC_CheckField, 8, 4, 0, // 6958: check Inst[11:8] == 0x0 |
| 3255 | OPC_Decode, 216, 15, 149, 1, // 6962: decode to NCRK using decoder 149 |
| 3256 | // 6962: } |
| 3257 | 246, 1, 11, // 6967: case 0xf6: { |
| 3258 | OPC_CheckPredicate, 26, // 6970: check predicate 26 |
| 3259 | OPC_CheckField, 8, 4, 0, // 6972: check Inst[11:8] == 0x0 |
| 3260 | OPC_Decode, 134, 16, 149, 1, // 6976: decode to ORK using decoder 149 |
| 3261 | // 6976: } |
| 3262 | 247, 1, 11, // 6981: case 0xf7: { |
| 3263 | OPC_CheckPredicate, 26, // 6984: check predicate 26 |
| 3264 | OPC_CheckField, 8, 4, 0, // 6986: check Inst[11:8] == 0x0 |
| 3265 | OPC_Decode, 223, 25, 149, 1, // 6990: decode to XRK using decoder 149 |
| 3266 | // 6990: } |
| 3267 | 248, 1, 11, // 6995: case 0xf8: { |
| 3268 | OPC_CheckPredicate, 26, // 6998: check predicate 26 |
| 3269 | OPC_CheckField, 8, 4, 0, // 7000: check Inst[11:8] == 0x0 |
| 3270 | OPC_Decode, 227, 4, 149, 1, // 7004: decode to ARK using decoder 149 |
| 3271 | // 7004: } |
| 3272 | 249, 1, 11, // 7009: case 0xf9: { |
| 3273 | OPC_CheckPredicate, 26, // 7012: check predicate 26 |
| 3274 | OPC_CheckField, 8, 4, 0, // 7014: check Inst[11:8] == 0x0 |
| 3275 | OPC_Decode, 225, 17, 149, 1, // 7018: decode to SRK using decoder 149 |
| 3276 | // 7018: } |
| 3277 | 250, 1, 11, // 7023: case 0xfa: { |
| 3278 | OPC_CheckPredicate, 26, // 7026: check predicate 26 |
| 3279 | OPC_CheckField, 8, 4, 0, // 7028: check Inst[11:8] == 0x0 |
| 3280 | OPC_Decode, 220, 4, 149, 1, // 7032: decode to ALRK using decoder 149 |
| 3281 | // 7032: } |
| 3282 | 251, 1, 11, // 7037: case 0xfb: { |
| 3283 | OPC_CheckPredicate, 26, // 7040: check predicate 26 |
| 3284 | OPC_CheckField, 8, 4, 0, // 7042: check Inst[11:8] == 0x0 |
| 3285 | OPC_Decode, 198, 17, 149, 1, // 7046: decode to SLRK using decoder 149 |
| 3286 | // 7046: } |
| 3287 | 253, 1, 0, // 7051: case 0xfd: { |
| 3288 | OPC_CheckPredicate, 27, // 7054: check predicate 27 |
| 3289 | OPC_CheckField, 8, 4, 0, // 7056: check Inst[11:8] == 0x0 |
| 3290 | OPC_Decode, 174, 15, 149, 1, // 7060: decode to MSRKC using decoder 149 |
| 3291 | // 7060: } |
| 3292 | // 7060: } // switch Inst[23:16] |
| 3293 | // 7060: } |
| 3294 | 186, 1, 4, // 7065: case 0xba: { |
| 3295 | OPC_Decode, 216, 9, 37, // 7068: decode to CS using decoder 37 |
| 3296 | // 7068: } |
| 3297 | 187, 1, 5, // 7072: case 0xbb: { |
| 3298 | OPC_Decode, 235, 5, 177, 1, // 7075: decode to CDS using decoder 177 |
| 3299 | // 7075: } |
| 3300 | 189, 1, 5, // 7080: case 0xbd: { |
| 3301 | OPC_Decode, 220, 8, 178, 1, // 7083: decode to CLM using decoder 178 |
| 3302 | // 7083: } |
| 3303 | 190, 1, 5, // 7088: case 0xbe: { |
| 3304 | OPC_Decode, 253, 17, 178, 1, // 7091: decode to STCM using decoder 178 |
| 3305 | // 7091: } |
| 3306 | 191, 1, 0, // 7096: case 0xbf: { |
| 3307 | OPC_Decode, 217, 10, 179, 1, // 7099: decode to ICM using decoder 179 |
| 3308 | // 7099: } |
| 3309 | // 7099: } // switch Inst[31:24] |
| 3310 | }; |
| 3311 | static const uint8_t DecoderTable48[16002] = { |
| 3312 | OPC_SwitchField, 40, 8, // 0: switch Inst[47:40] { |
| 3313 | 192, 1, 218, 1, // 3: case 0xc0: { |
| 3314 | OPC_SwitchField, 32, 4, // 7: switch Inst[35:32] { |
| 3315 | 0, 5, // 10: case 0x0: { |
| 3316 | OPC_Decode, 219, 11, 180, 1, // 12: decode to LARL using decoder 180 |
| 3317 | // 12: } |
| 3318 | 1, 5, // 17: case 0x1: { |
| 3319 | OPC_Decode, 156, 12, 181, 1, // 19: decode to LGFI using decoder 181 |
| 3320 | // 19: } |
| 3321 | 4, 122, // 24: case 0x4: { |
| 3322 | OPC_Scope, 115, // 26: try { |
| 3323 | OPC_SwitchField, 36, 4, // 28: switch Inst[39:36] { |
| 3324 | 0, 5, // 31: case 0x0: { |
| 3325 | OPC_Decode, 184, 11, 182, 1, // 33: decode to JGNOP using decoder 182 |
| 3326 | // 33: } |
| 3327 | 1, 5, // 38: case 0x1: { |
| 3328 | OPC_Decode, 181, 11, 182, 1, // 40: decode to JGAsmO using decoder 182 |
| 3329 | // 40: } |
| 3330 | 2, 5, // 45: case 0x2: { |
| 3331 | OPC_Decode, 165, 11, 182, 1, // 47: decode to JGAsmH using decoder 182 |
| 3332 | // 47: } |
| 3333 | 3, 5, // 52: case 0x3: { |
| 3334 | OPC_Decode, 175, 11, 182, 1, // 54: decode to JGAsmNLE using decoder 182 |
| 3335 | // 54: } |
| 3336 | 4, 5, // 59: case 0x4: { |
| 3337 | OPC_Decode, 167, 11, 182, 1, // 61: decode to JGAsmL using decoder 182 |
| 3338 | // 61: } |
| 3339 | 5, 5, // 66: case 0x5: { |
| 3340 | OPC_Decode, 173, 11, 182, 1, // 68: decode to JGAsmNHE using decoder 182 |
| 3341 | // 68: } |
| 3342 | 6, 5, // 73: case 0x6: { |
| 3343 | OPC_Decode, 169, 11, 182, 1, // 75: decode to JGAsmLH using decoder 182 |
| 3344 | // 75: } |
| 3345 | 7, 5, // 80: case 0x7: { |
| 3346 | OPC_Decode, 171, 11, 182, 1, // 82: decode to JGAsmNE using decoder 182 |
| 3347 | // 82: } |
| 3348 | 8, 5, // 87: case 0x8: { |
| 3349 | OPC_Decode, 164, 11, 182, 1, // 89: decode to JGAsmE using decoder 182 |
| 3350 | // 89: } |
| 3351 | 9, 5, // 94: case 0x9: { |
| 3352 | OPC_Decode, 176, 11, 182, 1, // 96: decode to JGAsmNLH using decoder 182 |
| 3353 | // 96: } |
| 3354 | 10, 5, // 101: case 0xa: { |
| 3355 | OPC_Decode, 166, 11, 182, 1, // 103: decode to JGAsmHE using decoder 182 |
| 3356 | // 103: } |
| 3357 | 11, 5, // 108: case 0xb: { |
| 3358 | OPC_Decode, 174, 11, 182, 1, // 110: decode to JGAsmNL using decoder 182 |
| 3359 | // 110: } |
| 3360 | 12, 5, // 115: case 0xc: { |
| 3361 | OPC_Decode, 168, 11, 182, 1, // 117: decode to JGAsmLE using decoder 182 |
| 3362 | // 117: } |
| 3363 | 13, 5, // 122: case 0xd: { |
| 3364 | OPC_Decode, 172, 11, 182, 1, // 124: decode to JGAsmNH using decoder 182 |
| 3365 | // 124: } |
| 3366 | 14, 5, // 129: case 0xe: { |
| 3367 | OPC_Decode, 178, 11, 182, 1, // 131: decode to JGAsmNO using decoder 182 |
| 3368 | // 131: } |
| 3369 | 15, 0, // 136: case 0xf: { |
| 3370 | OPC_Decode, 163, 11, 182, 1, // 138: decode to JG using decoder 182 |
| 3371 | // 138: } |
| 3372 | // 138: } // switch Inst[39:36] |
| 3373 | // 138: } else try { |
| 3374 | OPC_Decode, 198, 5, 183, 1, // 143: decode to BRCLAsm using decoder 183 |
| 3375 | // 143: } |
| 3376 | // 143: } |
| 3377 | 5, 5, // 148: case 0x5: { |
| 3378 | OPC_Decode, 174, 5, 184, 1, // 150: decode to BRASL using decoder 184 |
| 3379 | // 150: } |
| 3380 | 6, 5, // 155: case 0x6: { |
| 3381 | OPC_Decode, 219, 25, 185, 1, // 157: decode to XIHF using decoder 185 |
| 3382 | // 157: } |
| 3383 | 7, 5, // 162: case 0x7: { |
| 3384 | OPC_Decode, 220, 25, 186, 1, // 164: decode to XILF using decoder 186 |
| 3385 | // 164: } |
| 3386 | 8, 5, // 169: case 0x8: { |
| 3387 | OPC_Decode, 225, 10, 187, 1, // 171: decode to IIHF using decoder 187 |
| 3388 | // 171: } |
| 3389 | 9, 5, // 176: case 0x9: { |
| 3390 | OPC_Decode, 228, 10, 188, 1, // 178: decode to IILF using decoder 188 |
| 3391 | // 178: } |
| 3392 | 10, 5, // 183: case 0xa: { |
| 3393 | OPC_Decode, 222, 15, 185, 1, // 185: decode to NIHF using decoder 185 |
| 3394 | // 185: } |
| 3395 | 11, 5, // 190: case 0xb: { |
| 3396 | OPC_Decode, 225, 15, 186, 1, // 192: decode to NILF using decoder 186 |
| 3397 | // 192: } |
| 3398 | 12, 5, // 197: case 0xc: { |
| 3399 | OPC_Decode, 254, 15, 185, 1, // 199: decode to OIHF using decoder 185 |
| 3400 | // 199: } |
| 3401 | 13, 5, // 204: case 0xd: { |
| 3402 | OPC_Decode, 129, 16, 186, 1, // 206: decode to OILF using decoder 186 |
| 3403 | // 206: } |
| 3404 | 14, 5, // 211: case 0xe: { |
| 3405 | OPC_Decode, 193, 12, 189, 1, // 213: decode to LLIHF using decoder 189 |
| 3406 | // 213: } |
| 3407 | 15, 0, // 218: case 0xf: { |
| 3408 | OPC_Decode, 196, 12, 189, 1, // 220: decode to LLILF using decoder 189 |
| 3409 | // 220: } |
| 3410 | // 220: } // switch Inst[35:32] |
| 3411 | // 220: } |
| 3412 | 194, 1, 87, // 225: case 0xc2: { |
| 3413 | OPC_SwitchField, 32, 4, // 228: switch Inst[35:32] { |
| 3414 | 0, 5, // 231: case 0x0: { |
| 3415 | OPC_Decode, 169, 15, 190, 1, // 233: decode to MSGFI using decoder 190 |
| 3416 | // 233: } |
| 3417 | 1, 5, // 238: case 0x1: { |
| 3418 | OPC_Decode, 165, 15, 191, 1, // 240: decode to MSFI using decoder 191 |
| 3419 | // 240: } |
| 3420 | 4, 5, // 245: case 0x4: { |
| 3421 | OPC_Decode, 188, 17, 192, 1, // 247: decode to SLGFI using decoder 192 |
| 3422 | // 247: } |
| 3423 | 5, 5, // 252: case 0x5: { |
| 3424 | OPC_Decode, 185, 17, 186, 1, // 254: decode to SLFI using decoder 186 |
| 3425 | // 254: } |
| 3426 | 8, 5, // 259: case 0x8: { |
| 3427 | OPC_Decode, 187, 4, 190, 1, // 261: decode to AGFI using decoder 190 |
| 3428 | // 261: } |
| 3429 | 9, 5, // 266: case 0x9: { |
| 3430 | OPC_Decode, 184, 4, 191, 1, // 268: decode to AFI using decoder 191 |
| 3431 | // 268: } |
| 3432 | 10, 5, // 273: case 0xa: { |
| 3433 | OPC_Decode, 210, 4, 192, 1, // 275: decode to ALGFI using decoder 192 |
| 3434 | // 275: } |
| 3435 | 11, 5, // 280: case 0xb: { |
| 3436 | OPC_Decode, 207, 4, 186, 1, // 282: decode to ALFI using decoder 186 |
| 3437 | // 282: } |
| 3438 | 12, 5, // 287: case 0xc: { |
| 3439 | OPC_Decode, 151, 6, 181, 1, // 289: decode to CGFI using decoder 181 |
| 3440 | // 289: } |
| 3441 | 13, 5, // 294: case 0xd: { |
| 3442 | OPC_Decode, 136, 6, 193, 1, // 296: decode to CFI using decoder 193 |
| 3443 | // 296: } |
| 3444 | 14, 5, // 301: case 0xe: { |
| 3445 | OPC_Decode, 205, 7, 189, 1, // 303: decode to CLGFI using decoder 189 |
| 3446 | // 303: } |
| 3447 | 15, 0, // 308: case 0xf: { |
| 3448 | OPC_Decode, 183, 7, 188, 1, // 310: decode to CLFI using decoder 188 |
| 3449 | // 310: } |
| 3450 | // 310: } // switch Inst[35:32] |
| 3451 | // 310: } |
| 3452 | 196, 1, 80, // 315: case 0xc4: { |
| 3453 | OPC_SwitchField, 32, 4, // 318: switch Inst[35:32] { |
| 3454 | 2, 5, // 321: case 0x2: { |
| 3455 | OPC_Decode, 192, 12, 194, 1, // 323: decode to LLHRL using decoder 194 |
| 3456 | // 323: } |
| 3457 | 4, 5, // 328: case 0x4: { |
| 3458 | OPC_Decode, 163, 12, 180, 1, // 330: decode to LGHRL using decoder 180 |
| 3459 | // 330: } |
| 3460 | 5, 5, // 335: case 0x5: { |
| 3461 | OPC_Decode, 171, 12, 194, 1, // 337: decode to LHRL using decoder 194 |
| 3462 | // 337: } |
| 3463 | 6, 5, // 342: case 0x6: { |
| 3464 | OPC_Decode, 185, 12, 180, 1, // 344: decode to LLGHRL using decoder 180 |
| 3465 | // 344: } |
| 3466 | 7, 5, // 349: case 0x7: { |
| 3467 | OPC_Decode, 148, 18, 194, 1, // 351: decode to STHRL using decoder 194 |
| 3468 | // 351: } |
| 3469 | 8, 5, // 356: case 0x8: { |
| 3470 | OPC_Decode, 165, 12, 180, 1, // 358: decode to LGRL using decoder 180 |
| 3471 | // 358: } |
| 3472 | 11, 5, // 363: case 0xb: { |
| 3473 | OPC_Decode, 144, 18, 180, 1, // 365: decode to STGRL using decoder 180 |
| 3474 | // 365: } |
| 3475 | 12, 5, // 370: case 0xc: { |
| 3476 | OPC_Decode, 158, 12, 180, 1, // 372: decode to LGFRL using decoder 180 |
| 3477 | // 372: } |
| 3478 | 13, 5, // 377: case 0xd: { |
| 3479 | OPC_Decode, 191, 14, 194, 1, // 379: decode to LRL using decoder 194 |
| 3480 | // 379: } |
| 3481 | 14, 5, // 384: case 0xe: { |
| 3482 | OPC_Decode, 181, 12, 180, 1, // 386: decode to LLGFRL using decoder 180 |
| 3483 | // 386: } |
| 3484 | 15, 0, // 391: case 0xf: { |
| 3485 | OPC_Decode, 227, 18, 194, 1, // 393: decode to STRL using decoder 194 |
| 3486 | // 393: } |
| 3487 | // 393: } // switch Inst[35:32] |
| 3488 | // 393: } |
| 3489 | 197, 1, 7, // 398: case 0xc5: { |
| 3490 | OPC_CheckPredicate, 5, // 401: check predicate 5 |
| 3491 | OPC_Decode, 171, 5, 195, 1, // 403: decode to BPRP using decoder 195 |
| 3492 | // 403: } |
| 3493 | 198, 1, 87, // 408: case 0xc6: { |
| 3494 | OPC_SwitchField, 32, 4, // 411: switch Inst[35:32] { |
| 3495 | 0, 5, // 414: case 0x0: { |
| 3496 | OPC_Decode, 197, 10, 196, 1, // 416: decode to EXRL using decoder 196 |
| 3497 | // 416: } |
| 3498 | 2, 5, // 421: case 0x2: { |
| 3499 | OPC_Decode, 143, 16, 197, 1, // 423: decode to PFDRL using decoder 197 |
| 3500 | // 423: } |
| 3501 | 4, 5, // 428: case 0x4: { |
| 3502 | OPC_Decode, 156, 6, 180, 1, // 430: decode to CGHRL using decoder 180 |
| 3503 | // 430: } |
| 3504 | 5, 5, // 435: case 0x5: { |
| 3505 | OPC_Decode, 255, 6, 194, 1, // 437: decode to CHRL using decoder 194 |
| 3506 | // 437: } |
| 3507 | 6, 5, // 442: case 0x6: { |
| 3508 | OPC_Decode, 208, 7, 180, 1, // 444: decode to CLGHRL using decoder 180 |
| 3509 | // 444: } |
| 3510 | 7, 5, // 449: case 0x7: { |
| 3511 | OPC_Decode, 188, 8, 194, 1, // 451: decode to CLHRL using decoder 194 |
| 3512 | // 451: } |
| 3513 | 8, 5, // 456: case 0x8: { |
| 3514 | OPC_Decode, 229, 6, 180, 1, // 458: decode to CGRL using decoder 180 |
| 3515 | // 458: } |
| 3516 | 10, 5, // 463: case 0xa: { |
| 3517 | OPC_Decode, 153, 8, 180, 1, // 465: decode to CLGRL using decoder 180 |
| 3518 | // 465: } |
| 3519 | 12, 5, // 470: case 0xc: { |
| 3520 | OPC_Decode, 153, 6, 180, 1, // 472: decode to CGFRL using decoder 180 |
| 3521 | // 472: } |
| 3522 | 13, 5, // 477: case 0xd: { |
| 3523 | OPC_Decode, 201, 9, 194, 1, // 479: decode to CRL using decoder 194 |
| 3524 | // 479: } |
| 3525 | 14, 5, // 484: case 0xe: { |
| 3526 | OPC_Decode, 207, 7, 180, 1, // 486: decode to CLGFRL using decoder 180 |
| 3527 | // 486: } |
| 3528 | 15, 0, // 491: case 0xf: { |
| 3529 | OPC_Decode, 252, 8, 194, 1, // 493: decode to CLRL using decoder 194 |
| 3530 | // 493: } |
| 3531 | // 493: } // switch Inst[35:32] |
| 3532 | // 493: } |
| 3533 | 199, 1, 11, // 498: case 0xc7: { |
| 3534 | OPC_CheckPredicate, 5, // 501: check predicate 5 |
| 3535 | OPC_CheckField, 32, 4, 0, // 503: check Inst[35:32] == 0x0 |
| 3536 | OPC_Decode, 170, 5, 198, 1, // 507: decode to BPP using decoder 198 |
| 3537 | // 507: } |
| 3538 | 200, 1, 69, // 512: case 0xc8: { |
| 3539 | OPC_SwitchField, 32, 4, // 515: switch Inst[35:32] { |
| 3540 | 0, 5, // 518: case 0x0: { |
| 3541 | OPC_Decode, 184, 15, 199, 1, // 520: decode to MVCOS using decoder 199 |
| 3542 | // 520: } |
| 3543 | 1, 5, // 525: case 0x1: { |
| 3544 | OPC_Decode, 177, 10, 199, 1, // 527: decode to ECTG using decoder 199 |
| 3545 | // 527: } |
| 3546 | 2, 5, // 532: case 0x2: { |
| 3547 | OPC_Decode, 222, 9, 199, 1, // 534: decode to CSST using decoder 199 |
| 3548 | // 534: } |
| 3549 | 4, 7, // 539: case 0x4: { |
| 3550 | OPC_CheckPredicate, 28, // 541: check predicate 28 |
| 3551 | OPC_Decode, 165, 14, 200, 1, // 543: decode to LPD using decoder 200 |
| 3552 | // 543: } |
| 3553 | 5, 7, // 548: case 0x5: { |
| 3554 | OPC_CheckPredicate, 28, // 550: check predicate 28 |
| 3555 | OPC_Decode, 170, 14, 200, 1, // 552: decode to LPDG using decoder 200 |
| 3556 | // 552: } |
| 3557 | 6, 7, // 557: case 0x6: { |
| 3558 | OPC_CheckPredicate, 29, // 559: check predicate 29 |
| 3559 | OPC_Decode, 214, 5, 201, 1, // 561: decode to CAL using decoder 201 |
| 3560 | // 561: } |
| 3561 | 7, 7, // 566: case 0x7: { |
| 3562 | OPC_CheckPredicate, 29, // 568: check predicate 29 |
| 3563 | OPC_Decode, 215, 5, 202, 1, // 570: decode to CALG using decoder 202 |
| 3564 | // 570: } |
| 3565 | 15, 0, // 575: case 0xf: { |
| 3566 | OPC_CheckPredicate, 29, // 577: check predicate 29 |
| 3567 | OPC_Decode, 216, 5, 202, 1, // 579: decode to CALGF using decoder 202 |
| 3568 | // 579: } |
| 3569 | // 579: } // switch Inst[35:32] |
| 3570 | // 579: } |
| 3571 | 204, 1, 57, // 584: case 0xcc: { |
| 3572 | OPC_SwitchField, 32, 4, // 587: switch Inst[35:32] { |
| 3573 | 6, 7, // 590: case 0x6: { |
| 3574 | OPC_CheckPredicate, 22, // 592: check predicate 22 |
| 3575 | OPC_Decode, 201, 5, 203, 1, // 594: decode to BRCTH using decoder 203 |
| 3576 | // 594: } |
| 3577 | 8, 7, // 599: case 0x8: { |
| 3578 | OPC_CheckPredicate, 22, // 601: check predicate 22 |
| 3579 | OPC_Decode, 201, 4, 204, 1, // 603: decode to AIH using decoder 204 |
| 3580 | // 603: } |
| 3581 | 10, 7, // 608: case 0xa: { |
| 3582 | OPC_CheckPredicate, 22, // 610: check predicate 22 |
| 3583 | OPC_Decode, 222, 4, 204, 1, // 612: decode to ALSIH using decoder 204 |
| 3584 | // 612: } |
| 3585 | 11, 7, // 617: case 0xb: { |
| 3586 | OPC_CheckPredicate, 22, // 619: check predicate 22 |
| 3587 | OPC_Decode, 223, 4, 204, 1, // 621: decode to ALSIHN using decoder 204 |
| 3588 | // 621: } |
| 3589 | 13, 7, // 626: case 0xd: { |
| 3590 | OPC_CheckPredicate, 22, // 628: check predicate 22 |
| 3591 | OPC_Decode, 144, 7, 205, 1, // 630: decode to CIH using decoder 205 |
| 3592 | // 630: } |
| 3593 | 15, 0, // 635: case 0xf: { |
| 3594 | OPC_CheckPredicate, 22, // 637: check predicate 22 |
| 3595 | OPC_Decode, 204, 8, 187, 1, // 639: decode to CLIH using decoder 187 |
| 3596 | // 639: } |
| 3597 | // 639: } // switch Inst[35:32] |
| 3598 | // 639: } |
| 3599 | 208, 1, 5, // 644: case 0xd0: { |
| 3600 | OPC_Decode, 163, 19, 206, 1, // 647: decode to TRTR using decoder 206 |
| 3601 | // 647: } |
| 3602 | 209, 1, 5, // 652: case 0xd1: { |
| 3603 | OPC_Decode, 194, 15, 206, 1, // 655: decode to MVN using decoder 206 |
| 3604 | // 655: } |
| 3605 | 210, 1, 5, // 660: case 0xd2: { |
| 3606 | OPC_Decode, 177, 15, 206, 1, // 663: decode to MVC using decoder 206 |
| 3607 | // 663: } |
| 3608 | 211, 1, 5, // 668: case 0xd3: { |
| 3609 | OPC_Decode, 198, 15, 206, 1, // 671: decode to MVZ using decoder 206 |
| 3610 | // 671: } |
| 3611 | 212, 1, 5, // 676: case 0xd4: { |
| 3612 | OPC_Decode, 214, 15, 206, 1, // 679: decode to NC using decoder 206 |
| 3613 | // 679: } |
| 3614 | 213, 1, 5, // 684: case 0xd5: { |
| 3615 | OPC_Decode, 175, 7, 206, 1, // 687: decode to CLC using decoder 206 |
| 3616 | // 687: } |
| 3617 | 214, 1, 5, // 692: case 0xd6: { |
| 3618 | OPC_Decode, 247, 15, 206, 1, // 695: decode to OC using decoder 206 |
| 3619 | // 695: } |
| 3620 | 215, 1, 5, // 700: case 0xd7: { |
| 3621 | OPC_Decode, 214, 25, 206, 1, // 703: decode to XC using decoder 206 |
| 3622 | // 703: } |
| 3623 | 217, 1, 5, // 708: case 0xd9: { |
| 3624 | OPC_Decode, 180, 15, 207, 1, // 711: decode to MVCK using decoder 207 |
| 3625 | // 711: } |
| 3626 | 218, 1, 5, // 716: case 0xda: { |
| 3627 | OPC_Decode, 185, 15, 207, 1, // 719: decode to MVCP using decoder 207 |
| 3628 | // 719: } |
| 3629 | 219, 1, 5, // 724: case 0xdb: { |
| 3630 | OPC_Decode, 187, 15, 207, 1, // 727: decode to MVCS using decoder 207 |
| 3631 | // 727: } |
| 3632 | 220, 1, 5, // 732: case 0xdc: { |
| 3633 | OPC_Decode, 148, 19, 206, 1, // 735: decode to TR using decoder 206 |
| 3634 | // 735: } |
| 3635 | 221, 1, 5, // 740: case 0xdd: { |
| 3636 | OPC_Decode, 158, 19, 206, 1, // 743: decode to TRT using decoder 206 |
| 3637 | // 743: } |
| 3638 | 222, 1, 5, // 748: case 0xde: { |
| 3639 | OPC_Decode, 178, 10, 206, 1, // 751: decode to ED using decoder 206 |
| 3640 | // 751: } |
| 3641 | 223, 1, 5, // 756: case 0xdf: { |
| 3642 | OPC_Decode, 179, 10, 206, 1, // 759: decode to EDMK using decoder 206 |
| 3643 | // 759: } |
| 3644 | 225, 1, 5, // 764: case 0xe1: { |
| 3645 | OPC_Decode, 149, 16, 208, 1, // 767: decode to PKU using decoder 208 |
| 3646 | // 767: } |
| 3647 | 226, 1, 5, // 772: case 0xe2: { |
| 3648 | OPC_Decode, 172, 19, 206, 1, // 775: decode to UNPKU using decoder 206 |
| 3649 | // 775: } |
| 3650 | 227, 1, 217, 8, // 780: case 0xe3: { |
| 3651 | OPC_SwitchField, 0, 8, // 784: switch Inst[7:0] { |
| 3652 | 2, 5, // 787: case 0x2: { |
| 3653 | OPC_Decode, 204, 14, 209, 1, // 789: decode to LTG using decoder 209 |
| 3654 | // 789: } |
| 3655 | 3, 5, // 794: case 0x3: { |
| 3656 | OPC_Decode, 187, 14, 209, 1, // 796: decode to LRAG using decoder 209 |
| 3657 | // 796: } |
| 3658 | 4, 5, // 801: case 0x4: { |
| 3659 | OPC_Decode, 150, 12, 209, 1, // 803: decode to LG using decoder 209 |
| 3660 | // 803: } |
| 3661 | 6, 5, // 808: case 0x6: { |
| 3662 | OPC_Decode, 245, 9, 210, 1, // 810: decode to CVBY using decoder 210 |
| 3663 | // 810: } |
| 3664 | 8, 5, // 815: case 0x8: { |
| 3665 | OPC_Decode, 185, 4, 211, 1, // 817: decode to AG using decoder 211 |
| 3666 | // 817: } |
| 3667 | 9, 5, // 822: case 0x9: { |
| 3668 | OPC_Decode, 161, 17, 211, 1, // 824: decode to SG using decoder 211 |
| 3669 | // 824: } |
| 3670 | 10, 5, // 829: case 0xa: { |
| 3671 | OPC_Decode, 208, 4, 211, 1, // 831: decode to ALG using decoder 211 |
| 3672 | // 831: } |
| 3673 | 11, 5, // 836: case 0xb: { |
| 3674 | OPC_Decode, 186, 17, 211, 1, // 838: decode to SLG using decoder 211 |
| 3675 | // 838: } |
| 3676 | 12, 5, // 843: case 0xc: { |
| 3677 | OPC_Decode, 166, 15, 211, 1, // 845: decode to MSG using decoder 211 |
| 3678 | // 845: } |
| 3679 | 13, 5, // 850: case 0xd: { |
| 3680 | OPC_Decode, 165, 10, 212, 1, // 852: decode to DSG using decoder 212 |
| 3681 | // 852: } |
| 3682 | 14, 5, // 857: case 0xe: { |
| 3683 | OPC_Decode, 244, 9, 211, 1, // 859: decode to CVBG using decoder 211 |
| 3684 | // 859: } |
| 3685 | 15, 5, // 864: case 0xf: { |
| 3686 | OPC_Decode, 193, 14, 209, 1, // 866: decode to LRVG using decoder 209 |
| 3687 | // 866: } |
| 3688 | 18, 5, // 871: case 0x12: { |
| 3689 | OPC_Decode, 198, 14, 213, 1, // 873: decode to LT using decoder 213 |
| 3690 | // 873: } |
| 3691 | 19, 5, // 878: case 0x13: { |
| 3692 | OPC_Decode, 188, 14, 209, 1, // 880: decode to LRAY using decoder 209 |
| 3693 | // 880: } |
| 3694 | 20, 5, // 885: case 0x14: { |
| 3695 | OPC_Decode, 155, 12, 209, 1, // 887: decode to LGF using decoder 209 |
| 3696 | // 887: } |
| 3697 | 21, 5, // 892: case 0x15: { |
| 3698 | OPC_Decode, 160, 12, 209, 1, // 894: decode to LGH using decoder 209 |
| 3699 | // 894: } |
| 3700 | 22, 5, // 899: case 0x16: { |
| 3701 | OPC_Decode, 178, 12, 209, 1, // 901: decode to LLGF using decoder 209 |
| 3702 | // 901: } |
| 3703 | 23, 5, // 906: case 0x17: { |
| 3704 | OPC_Decode, 186, 12, 209, 1, // 908: decode to LLGT using decoder 209 |
| 3705 | // 908: } |
| 3706 | 24, 5, // 913: case 0x18: { |
| 3707 | OPC_Decode, 186, 4, 211, 1, // 915: decode to AGF using decoder 211 |
| 3708 | // 915: } |
| 3709 | 25, 5, // 920: case 0x19: { |
| 3710 | OPC_Decode, 162, 17, 211, 1, // 922: decode to SGF using decoder 211 |
| 3711 | // 922: } |
| 3712 | 26, 5, // 927: case 0x1a: { |
| 3713 | OPC_Decode, 209, 4, 211, 1, // 929: decode to ALGF using decoder 211 |
| 3714 | // 929: } |
| 3715 | 27, 5, // 934: case 0x1b: { |
| 3716 | OPC_Decode, 187, 17, 211, 1, // 936: decode to SLGF using decoder 211 |
| 3717 | // 936: } |
| 3718 | 28, 5, // 941: case 0x1c: { |
| 3719 | OPC_Decode, 168, 15, 211, 1, // 943: decode to MSGF using decoder 211 |
| 3720 | // 943: } |
| 3721 | 29, 5, // 948: case 0x1d: { |
| 3722 | OPC_Decode, 166, 10, 212, 1, // 950: decode to DSGF using decoder 212 |
| 3723 | // 950: } |
| 3724 | 30, 5, // 955: case 0x1e: { |
| 3725 | OPC_Decode, 192, 14, 213, 1, // 957: decode to LRV using decoder 213 |
| 3726 | // 957: } |
| 3727 | 31, 5, // 962: case 0x1f: { |
| 3728 | OPC_Decode, 195, 14, 213, 1, // 964: decode to LRVH using decoder 213 |
| 3729 | // 964: } |
| 3730 | 32, 5, // 969: case 0x20: { |
| 3731 | OPC_Decode, 141, 6, 209, 1, // 971: decode to CG using decoder 209 |
| 3732 | // 971: } |
| 3733 | 33, 5, // 976: case 0x21: { |
| 3734 | OPC_Decode, 200, 7, 209, 1, // 978: decode to CLG using decoder 209 |
| 3735 | // 978: } |
| 3736 | 36, 5, // 983: case 0x24: { |
| 3737 | OPC_Decode, 143, 18, 209, 1, // 985: decode to STG using decoder 209 |
| 3738 | // 985: } |
| 3739 | 37, 7, // 990: case 0x25: { |
| 3740 | OPC_CheckPredicate, 4, // 992: check predicate 4 |
| 3741 | OPC_Decode, 242, 15, 209, 1, // 994: decode to NTSTG using decoder 209 |
| 3742 | // 994: } |
| 3743 | 38, 5, // 999: case 0x26: { |
| 3744 | OPC_Decode, 248, 9, 213, 1, // 1001: decode to CVDY using decoder 213 |
| 3745 | // 1001: } |
| 3746 | 42, 7, // 1006: case 0x2a: { |
| 3747 | OPC_CheckPredicate, 30, // 1008: check predicate 30 |
| 3748 | OPC_Decode, 234, 14, 209, 1, // 1010: decode to LZRG using decoder 209 |
| 3749 | // 1010: } |
| 3750 | 46, 5, // 1015: case 0x2e: { |
| 3751 | OPC_Decode, 247, 9, 209, 1, // 1017: decode to CVDG using decoder 209 |
| 3752 | // 1017: } |
| 3753 | 47, 5, // 1022: case 0x2f: { |
| 3754 | OPC_Decode, 229, 18, 209, 1, // 1024: decode to STRVG using decoder 209 |
| 3755 | // 1024: } |
| 3756 | 48, 5, // 1029: case 0x30: { |
| 3757 | OPC_Decode, 150, 6, 209, 1, // 1031: decode to CGF using decoder 209 |
| 3758 | // 1031: } |
| 3759 | 49, 5, // 1036: case 0x31: { |
| 3760 | OPC_Decode, 204, 7, 209, 1, // 1038: decode to CLGF using decoder 209 |
| 3761 | // 1038: } |
| 3762 | 50, 5, // 1043: case 0x32: { |
| 3763 | OPC_Decode, 205, 14, 209, 1, // 1045: decode to LTGF using decoder 209 |
| 3764 | // 1045: } |
| 3765 | 52, 5, // 1050: case 0x34: { |
| 3766 | OPC_Decode, 154, 6, 209, 1, // 1052: decode to CGH using decoder 209 |
| 3767 | // 1052: } |
| 3768 | 54, 5, // 1057: case 0x36: { |
| 3769 | OPC_Decode, 142, 16, 214, 1, // 1059: decode to PFD using decoder 214 |
| 3770 | // 1059: } |
| 3771 | 56, 7, // 1064: case 0x38: { |
| 3772 | OPC_CheckPredicate, 27, // 1066: check predicate 27 |
| 3773 | OPC_Decode, 189, 4, 211, 1, // 1068: decode to AGH using decoder 211 |
| 3774 | // 1068: } |
| 3775 | 57, 7, // 1073: case 0x39: { |
| 3776 | OPC_CheckPredicate, 27, // 1075: check predicate 27 |
| 3777 | OPC_Decode, 164, 17, 211, 1, // 1077: decode to SGH using decoder 211 |
| 3778 | // 1077: } |
| 3779 | 58, 7, // 1082: case 0x3a: { |
| 3780 | OPC_CheckPredicate, 30, // 1084: check predicate 30 |
| 3781 | OPC_Decode, 204, 12, 209, 1, // 1086: decode to LLZRGF using decoder 209 |
| 3782 | // 1086: } |
| 3783 | 59, 7, // 1091: case 0x3b: { |
| 3784 | OPC_CheckPredicate, 30, // 1093: check predicate 30 |
| 3785 | OPC_Decode, 233, 14, 213, 1, // 1095: decode to LZRF using decoder 213 |
| 3786 | // 1095: } |
| 3787 | 60, 7, // 1100: case 0x3c: { |
| 3788 | OPC_CheckPredicate, 27, // 1102: check predicate 27 |
| 3789 | OPC_Decode, 142, 15, 211, 1, // 1104: decode to MGH using decoder 211 |
| 3790 | // 1104: } |
| 3791 | 62, 5, // 1109: case 0x3e: { |
| 3792 | OPC_Decode, 228, 18, 213, 1, // 1111: decode to STRV using decoder 213 |
| 3793 | // 1111: } |
| 3794 | 63, 5, // 1116: case 0x3f: { |
| 3795 | OPC_Decode, 230, 18, 213, 1, // 1118: decode to STRVH using decoder 213 |
| 3796 | // 1118: } |
| 3797 | 70, 5, // 1123: case 0x46: { |
| 3798 | OPC_Decode, 142, 5, 211, 1, // 1125: decode to BCTG using decoder 211 |
| 3799 | // 1125: } |
| 3800 | 71, 148, 1, // 1130: case 0x47: { |
| 3801 | OPC_Scope, 138, 1, // 1133: try { |
| 3802 | OPC_SwitchField, 36, 4, // 1136: switch Inst[39:36] { |
| 3803 | 1, 7, // 1139: case 0x1: { |
| 3804 | OPC_CheckPredicate, 27, // 1141: check predicate 27 |
| 3805 | OPC_Decode, 165, 5, 215, 1, // 1143: decode to BIAsmO using decoder 215 |
| 3806 | // 1143: } |
| 3807 | 2, 7, // 1148: case 0x2: { |
| 3808 | OPC_CheckPredicate, 27, // 1150: check predicate 27 |
| 3809 | OPC_Decode, 149, 5, 215, 1, // 1152: decode to BIAsmH using decoder 215 |
| 3810 | // 1152: } |
| 3811 | 3, 7, // 1157: case 0x3: { |
| 3812 | OPC_CheckPredicate, 27, // 1159: check predicate 27 |
| 3813 | OPC_Decode, 159, 5, 215, 1, // 1161: decode to BIAsmNLE using decoder 215 |
| 3814 | // 1161: } |
| 3815 | 4, 7, // 1166: case 0x4: { |
| 3816 | OPC_CheckPredicate, 27, // 1168: check predicate 27 |
| 3817 | OPC_Decode, 151, 5, 215, 1, // 1170: decode to BIAsmL using decoder 215 |
| 3818 | // 1170: } |
| 3819 | 5, 7, // 1175: case 0x5: { |
| 3820 | OPC_CheckPredicate, 27, // 1177: check predicate 27 |
| 3821 | OPC_Decode, 157, 5, 215, 1, // 1179: decode to BIAsmNHE using decoder 215 |
| 3822 | // 1179: } |
| 3823 | 6, 7, // 1184: case 0x6: { |
| 3824 | OPC_CheckPredicate, 27, // 1186: check predicate 27 |
| 3825 | OPC_Decode, 153, 5, 215, 1, // 1188: decode to BIAsmLH using decoder 215 |
| 3826 | // 1188: } |
| 3827 | 7, 7, // 1193: case 0x7: { |
| 3828 | OPC_CheckPredicate, 27, // 1195: check predicate 27 |
| 3829 | OPC_Decode, 155, 5, 215, 1, // 1197: decode to BIAsmNE using decoder 215 |
| 3830 | // 1197: } |
| 3831 | 8, 7, // 1202: case 0x8: { |
| 3832 | OPC_CheckPredicate, 27, // 1204: check predicate 27 |
| 3833 | OPC_Decode, 148, 5, 215, 1, // 1206: decode to BIAsmE using decoder 215 |
| 3834 | // 1206: } |
| 3835 | 9, 7, // 1211: case 0x9: { |
| 3836 | OPC_CheckPredicate, 27, // 1213: check predicate 27 |
| 3837 | OPC_Decode, 160, 5, 215, 1, // 1215: decode to BIAsmNLH using decoder 215 |
| 3838 | // 1215: } |
| 3839 | 10, 7, // 1220: case 0xa: { |
| 3840 | OPC_CheckPredicate, 27, // 1222: check predicate 27 |
| 3841 | OPC_Decode, 150, 5, 215, 1, // 1224: decode to BIAsmHE using decoder 215 |
| 3842 | // 1224: } |
| 3843 | 11, 7, // 1229: case 0xb: { |
| 3844 | OPC_CheckPredicate, 27, // 1231: check predicate 27 |
| 3845 | OPC_Decode, 158, 5, 215, 1, // 1233: decode to BIAsmNL using decoder 215 |
| 3846 | // 1233: } |
| 3847 | 12, 7, // 1238: case 0xc: { |
| 3848 | OPC_CheckPredicate, 27, // 1240: check predicate 27 |
| 3849 | OPC_Decode, 152, 5, 215, 1, // 1242: decode to BIAsmLE using decoder 215 |
| 3850 | // 1242: } |
| 3851 | 13, 7, // 1247: case 0xd: { |
| 3852 | OPC_CheckPredicate, 27, // 1249: check predicate 27 |
| 3853 | OPC_Decode, 156, 5, 215, 1, // 1251: decode to BIAsmNH using decoder 215 |
| 3854 | // 1251: } |
| 3855 | 14, 7, // 1256: case 0xe: { |
| 3856 | OPC_CheckPredicate, 27, // 1258: check predicate 27 |
| 3857 | OPC_Decode, 162, 5, 215, 1, // 1260: decode to BIAsmNO using decoder 215 |
| 3858 | // 1260: } |
| 3859 | 15, 0, // 1265: case 0xf: { |
| 3860 | OPC_CheckPredicate, 27, // 1267: check predicate 27 |
| 3861 | OPC_Decode, 147, 5, 215, 1, // 1269: decode to BI using decoder 215 |
| 3862 | // 1269: } |
| 3863 | // 1269: } // switch Inst[39:36] |
| 3864 | // 1269: } else try { |
| 3865 | OPC_CheckPredicate, 27, // 1274: check predicate 27 |
| 3866 | OPC_Decode, 169, 5, 214, 1, // 1276: decode to BICAsm using decoder 214 |
| 3867 | // 1276: } |
| 3868 | // 1276: } |
| 3869 | 72, 7, // 1281: case 0x48: { |
| 3870 | OPC_CheckPredicate, 31, // 1283: check predicate 31 |
| 3871 | OPC_Decode, 182, 12, 209, 1, // 1285: decode to LLGFSG using decoder 209 |
| 3872 | // 1285: } |
| 3873 | 73, 7, // 1290: case 0x49: { |
| 3874 | OPC_CheckPredicate, 31, // 1292: check predicate 31 |
| 3875 | OPC_Decode, 145, 18, 209, 1, // 1294: decode to STGSC using decoder 209 |
| 3876 | // 1294: } |
| 3877 | 76, 7, // 1299: case 0x4c: { |
| 3878 | OPC_CheckPredicate, 31, // 1301: check predicate 31 |
| 3879 | OPC_Decode, 159, 12, 209, 1, // 1303: decode to LGG using decoder 209 |
| 3880 | // 1303: } |
| 3881 | 77, 7, // 1308: case 0x4d: { |
| 3882 | OPC_CheckPredicate, 31, // 1310: check predicate 31 |
| 3883 | OPC_Decode, 166, 12, 209, 1, // 1312: decode to LGSC using decoder 209 |
| 3884 | // 1312: } |
| 3885 | 80, 5, // 1317: case 0x50: { |
| 3886 | OPC_Decode, 235, 18, 213, 1, // 1319: decode to STY using decoder 213 |
| 3887 | // 1319: } |
| 3888 | 81, 5, // 1324: case 0x51: { |
| 3889 | OPC_Decode, 176, 15, 210, 1, // 1326: decode to MSY using decoder 210 |
| 3890 | // 1326: } |
| 3891 | 83, 7, // 1331: case 0x53: { |
| 3892 | OPC_CheckPredicate, 27, // 1333: check predicate 27 |
| 3893 | OPC_Decode, 155, 15, 210, 1, // 1335: decode to MSC using decoder 210 |
| 3894 | // 1335: } |
| 3895 | 84, 5, // 1340: case 0x54: { |
| 3896 | OPC_Decode, 245, 15, 210, 1, // 1342: decode to NY using decoder 210 |
| 3897 | // 1342: } |
| 3898 | 85, 5, // 1347: case 0x55: { |
| 3899 | OPC_Decode, 154, 9, 213, 1, // 1349: decode to CLY using decoder 213 |
| 3900 | // 1349: } |
| 3901 | 86, 5, // 1354: case 0x56: { |
| 3902 | OPC_Decode, 135, 16, 210, 1, // 1356: decode to OY using decoder 210 |
| 3903 | // 1356: } |
| 3904 | 87, 5, // 1361: case 0x57: { |
| 3905 | OPC_Decode, 225, 25, 210, 1, // 1363: decode to XY using decoder 210 |
| 3906 | // 1363: } |
| 3907 | 88, 5, // 1368: case 0x58: { |
| 3908 | OPC_Decode, 229, 14, 213, 1, // 1370: decode to LY using decoder 213 |
| 3909 | // 1370: } |
| 3910 | 89, 5, // 1375: case 0x59: { |
| 3911 | OPC_Decode, 141, 10, 213, 1, // 1377: decode to CY using decoder 213 |
| 3912 | // 1377: } |
| 3913 | 90, 5, // 1382: case 0x5a: { |
| 3914 | OPC_Decode, 237, 4, 210, 1, // 1384: decode to AY using decoder 210 |
| 3915 | // 1384: } |
| 3916 | 91, 5, // 1389: case 0x5b: { |
| 3917 | OPC_Decode, 245, 18, 210, 1, // 1391: decode to SY using decoder 210 |
| 3918 | // 1391: } |
| 3919 | 92, 5, // 1396: case 0x5c: { |
| 3920 | OPC_Decode, 140, 15, 212, 1, // 1398: decode to MFY using decoder 212 |
| 3921 | // 1398: } |
| 3922 | 94, 5, // 1403: case 0x5e: { |
| 3923 | OPC_Decode, 224, 4, 210, 1, // 1405: decode to ALY using decoder 210 |
| 3924 | // 1405: } |
| 3925 | 95, 5, // 1410: case 0x5f: { |
| 3926 | OPC_Decode, 200, 17, 210, 1, // 1412: decode to SLY using decoder 210 |
| 3927 | // 1412: } |
| 3928 | 96, 7, // 1417: case 0x60: { |
| 3929 | OPC_CheckPredicate, 16, // 1419: check predicate 16 |
| 3930 | OPC_Decode, 214, 14, 216, 1, // 1421: decode to LXAB using decoder 216 |
| 3931 | // 1421: } |
| 3932 | 97, 7, // 1426: case 0x61: { |
| 3933 | OPC_CheckPredicate, 16, // 1428: check predicate 16 |
| 3934 | OPC_Decode, 199, 12, 216, 1, // 1430: decode to LLXAB using decoder 216 |
| 3935 | // 1430: } |
| 3936 | 98, 7, // 1435: case 0x62: { |
| 3937 | OPC_CheckPredicate, 16, // 1437: check predicate 16 |
| 3938 | OPC_Decode, 217, 14, 216, 1, // 1439: decode to LXAH using decoder 216 |
| 3939 | // 1439: } |
| 3940 | 99, 7, // 1444: case 0x63: { |
| 3941 | OPC_CheckPredicate, 16, // 1446: check predicate 16 |
| 3942 | OPC_Decode, 202, 12, 216, 1, // 1448: decode to LLXAH using decoder 216 |
| 3943 | // 1448: } |
| 3944 | 100, 7, // 1453: case 0x64: { |
| 3945 | OPC_CheckPredicate, 16, // 1455: check predicate 16 |
| 3946 | OPC_Decode, 215, 14, 216, 1, // 1457: decode to LXAF using decoder 216 |
| 3947 | // 1457: } |
| 3948 | 101, 7, // 1462: case 0x65: { |
| 3949 | OPC_CheckPredicate, 16, // 1464: check predicate 16 |
| 3950 | OPC_Decode, 200, 12, 216, 1, // 1466: decode to LLXAF using decoder 216 |
| 3951 | // 1466: } |
| 3952 | 102, 7, // 1471: case 0x66: { |
| 3953 | OPC_CheckPredicate, 16, // 1473: check predicate 16 |
| 3954 | OPC_Decode, 216, 14, 216, 1, // 1475: decode to LXAG using decoder 216 |
| 3955 | // 1475: } |
| 3956 | 103, 7, // 1480: case 0x67: { |
| 3957 | OPC_CheckPredicate, 16, // 1482: check predicate 16 |
| 3958 | OPC_Decode, 201, 12, 216, 1, // 1484: decode to LLXAG using decoder 216 |
| 3959 | // 1484: } |
| 3960 | 104, 7, // 1489: case 0x68: { |
| 3961 | OPC_CheckPredicate, 16, // 1491: check predicate 16 |
| 3962 | OPC_Decode, 218, 14, 216, 1, // 1493: decode to LXAQ using decoder 216 |
| 3963 | // 1493: } |
| 3964 | 105, 7, // 1498: case 0x69: { |
| 3965 | OPC_CheckPredicate, 16, // 1500: check predicate 16 |
| 3966 | OPC_Decode, 203, 12, 216, 1, // 1502: decode to LLXAQ using decoder 216 |
| 3967 | // 1502: } |
| 3968 | 112, 5, // 1507: case 0x70: { |
| 3969 | OPC_Decode, 149, 18, 213, 1, // 1509: decode to STHY using decoder 213 |
| 3970 | // 1509: } |
| 3971 | 113, 5, // 1514: case 0x71: { |
| 3972 | OPC_Decode, 224, 11, 209, 1, // 1516: decode to LAY using decoder 209 |
| 3973 | // 1516: } |
| 3974 | 114, 5, // 1521: case 0x72: { |
| 3975 | OPC_Decode, 132, 18, 213, 1, // 1523: decode to STCY using decoder 213 |
| 3976 | // 1523: } |
| 3977 | 115, 5, // 1528: case 0x73: { |
| 3978 | OPC_Decode, 220, 10, 211, 1, // 1530: decode to ICY using decoder 211 |
| 3979 | // 1530: } |
| 3980 | 117, 5, // 1535: case 0x75: { |
| 3981 | OPC_Decode, 212, 11, 209, 1, // 1537: decode to LAEY using decoder 209 |
| 3982 | // 1537: } |
| 3983 | 118, 5, // 1542: case 0x76: { |
| 3984 | OPC_Decode, 225, 11, 213, 1, // 1544: decode to LB using decoder 213 |
| 3985 | // 1544: } |
| 3986 | 119, 5, // 1549: case 0x77: { |
| 3987 | OPC_Decode, 152, 12, 209, 1, // 1551: decode to LGB using decoder 209 |
| 3988 | // 1551: } |
| 3989 | 120, 5, // 1556: case 0x78: { |
| 3990 | OPC_Decode, 172, 12, 213, 1, // 1558: decode to LHY using decoder 213 |
| 3991 | // 1558: } |
| 3992 | 121, 5, // 1563: case 0x79: { |
| 3993 | OPC_Decode, 129, 7, 213, 1, // 1565: decode to CHY using decoder 213 |
| 3994 | // 1565: } |
| 3995 | 122, 5, // 1570: case 0x7a: { |
| 3996 | OPC_Decode, 200, 4, 210, 1, // 1572: decode to AHY using decoder 210 |
| 3997 | // 1572: } |
| 3998 | 123, 5, // 1577: case 0x7b: { |
| 3999 | OPC_Decode, 170, 17, 210, 1, // 1579: decode to SHY using decoder 210 |
| 4000 | // 1579: } |
| 4001 | 124, 5, // 1584: case 0x7c: { |
| 4002 | OPC_Decode, 147, 15, 210, 1, // 1586: decode to MHY using decoder 210 |
| 4003 | // 1586: } |
| 4004 | 128, 1, 5, // 1591: case 0x80: { |
| 4005 | OPC_Decode, 217, 15, 211, 1, // 1594: decode to NG using decoder 211 |
| 4006 | // 1594: } |
| 4007 | 129, 1, 5, // 1599: case 0x81: { |
| 4008 | OPC_Decode, 250, 15, 211, 1, // 1602: decode to OG using decoder 211 |
| 4009 | // 1602: } |
| 4010 | 130, 1, 5, // 1607: case 0x82: { |
| 4011 | OPC_Decode, 215, 25, 211, 1, // 1610: decode to XG using decoder 211 |
| 4012 | // 1610: } |
| 4013 | 131, 1, 7, // 1615: case 0x83: { |
| 4014 | OPC_CheckPredicate, 27, // 1618: check predicate 27 |
| 4015 | OPC_Decode, 167, 15, 211, 1, // 1620: decode to MSGC using decoder 211 |
| 4016 | // 1620: } |
| 4017 | 132, 1, 7, // 1625: case 0x84: { |
| 4018 | OPC_CheckPredicate, 27, // 1628: check predicate 27 |
| 4019 | OPC_Decode, 141, 15, 212, 1, // 1630: decode to MG using decoder 212 |
| 4020 | // 1630: } |
| 4021 | 133, 1, 7, // 1635: case 0x85: { |
| 4022 | OPC_CheckPredicate, 32, // 1638: check predicate 32 |
| 4023 | OPC_Decode, 151, 12, 209, 1, // 1640: decode to LGAT using decoder 209 |
| 4024 | // 1640: } |
| 4025 | 134, 1, 5, // 1645: case 0x86: { |
| 4026 | OPC_Decode, 149, 15, 212, 1, // 1648: decode to MLG using decoder 212 |
| 4027 | // 1648: } |
| 4028 | 135, 1, 5, // 1653: case 0x87: { |
| 4029 | OPC_Decode, 160, 10, 212, 1, // 1656: decode to DLG using decoder 212 |
| 4030 | // 1656: } |
| 4031 | 136, 1, 5, // 1661: case 0x88: { |
| 4032 | OPC_Decode, 204, 4, 211, 1, // 1664: decode to ALCG using decoder 211 |
| 4033 | // 1664: } |
| 4034 | 137, 1, 5, // 1669: case 0x89: { |
| 4035 | OPC_Decode, 179, 17, 211, 1, // 1672: decode to SLBG using decoder 211 |
| 4036 | // 1672: } |
| 4037 | 142, 1, 5, // 1677: case 0x8e: { |
| 4038 | OPC_Decode, 223, 18, 217, 1, // 1680: decode to STPQ using decoder 217 |
| 4039 | // 1680: } |
| 4040 | 143, 1, 5, // 1685: case 0x8f: { |
| 4041 | OPC_Decode, 177, 14, 217, 1, // 1688: decode to LPQ using decoder 217 |
| 4042 | // 1688: } |
| 4043 | 144, 1, 5, // 1693: case 0x90: { |
| 4044 | OPC_Decode, 176, 12, 209, 1, // 1696: decode to LLGC using decoder 209 |
| 4045 | // 1696: } |
| 4046 | 145, 1, 5, // 1701: case 0x91: { |
| 4047 | OPC_Decode, 183, 12, 209, 1, // 1704: decode to LLGH using decoder 209 |
| 4048 | // 1704: } |
| 4049 | 148, 1, 5, // 1709: case 0x94: { |
| 4050 | OPC_Decode, 173, 12, 213, 1, // 1712: decode to LLC using decoder 213 |
| 4051 | // 1712: } |
| 4052 | 149, 1, 5, // 1717: case 0x95: { |
| 4053 | OPC_Decode, 189, 12, 213, 1, // 1720: decode to LLH using decoder 213 |
| 4054 | // 1720: } |
| 4055 | 150, 1, 5, // 1725: case 0x96: { |
| 4056 | OPC_Decode, 148, 15, 212, 1, // 1728: decode to ML using decoder 212 |
| 4057 | // 1728: } |
| 4058 | 151, 1, 5, // 1733: case 0x97: { |
| 4059 | OPC_Decode, 159, 10, 212, 1, // 1736: decode to DL using decoder 212 |
| 4060 | // 1736: } |
| 4061 | 152, 1, 5, // 1741: case 0x98: { |
| 4062 | OPC_Decode, 203, 4, 210, 1, // 1744: decode to ALC using decoder 210 |
| 4063 | // 1744: } |
| 4064 | 153, 1, 5, // 1749: case 0x99: { |
| 4065 | OPC_Decode, 178, 17, 210, 1, // 1752: decode to SLB using decoder 210 |
| 4066 | // 1752: } |
| 4067 | 156, 1, 7, // 1757: case 0x9c: { |
| 4068 | OPC_CheckPredicate, 32, // 1760: check predicate 32 |
| 4069 | OPC_Decode, 187, 12, 209, 1, // 1762: decode to LLGTAT using decoder 209 |
| 4070 | // 1762: } |
| 4071 | 157, 1, 7, // 1767: case 0x9d: { |
| 4072 | OPC_CheckPredicate, 32, // 1770: check predicate 32 |
| 4073 | OPC_Decode, 179, 12, 209, 1, // 1772: decode to LLGFAT using decoder 209 |
| 4074 | // 1772: } |
| 4075 | 159, 1, 7, // 1777: case 0x9f: { |
| 4076 | OPC_CheckPredicate, 32, // 1780: check predicate 32 |
| 4077 | OPC_Decode, 221, 11, 213, 1, // 1782: decode to LAT using decoder 213 |
| 4078 | // 1782: } |
| 4079 | 192, 1, 7, // 1787: case 0xc0: { |
| 4080 | OPC_CheckPredicate, 22, // 1790: check predicate 22 |
| 4081 | OPC_Decode, 227, 11, 218, 1, // 1792: decode to LBH using decoder 218 |
| 4082 | // 1792: } |
| 4083 | 194, 1, 7, // 1797: case 0xc2: { |
| 4084 | OPC_CheckPredicate, 22, // 1800: check predicate 22 |
| 4085 | OPC_Decode, 174, 12, 218, 1, // 1802: decode to LLCH using decoder 218 |
| 4086 | // 1802: } |
| 4087 | 195, 1, 7, // 1807: case 0xc3: { |
| 4088 | OPC_CheckPredicate, 22, // 1810: check predicate 22 |
| 4089 | OPC_Decode, 248, 17, 218, 1, // 1812: decode to STCH using decoder 218 |
| 4090 | // 1812: } |
| 4091 | 196, 1, 7, // 1817: case 0xc4: { |
| 4092 | OPC_CheckPredicate, 22, // 1820: check predicate 22 |
| 4093 | OPC_Decode, 168, 12, 218, 1, // 1822: decode to LHH using decoder 218 |
| 4094 | // 1822: } |
| 4095 | 198, 1, 7, // 1827: case 0xc6: { |
| 4096 | OPC_CheckPredicate, 22, // 1830: check predicate 22 |
| 4097 | OPC_Decode, 190, 12, 218, 1, // 1832: decode to LLHH using decoder 218 |
| 4098 | // 1832: } |
| 4099 | 199, 1, 7, // 1837: case 0xc7: { |
| 4100 | OPC_CheckPredicate, 22, // 1840: check predicate 22 |
| 4101 | OPC_Decode, 147, 18, 218, 1, // 1842: decode to STHH using decoder 218 |
| 4102 | // 1842: } |
| 4103 | 200, 1, 7, // 1847: case 0xc8: { |
| 4104 | OPC_CheckPredicate, 32, // 1850: check predicate 32 |
| 4105 | OPC_Decode, 148, 12, 218, 1, // 1852: decode to LFHAT using decoder 218 |
| 4106 | // 1852: } |
| 4107 | 202, 1, 7, // 1857: case 0xca: { |
| 4108 | OPC_CheckPredicate, 22, // 1860: check predicate 22 |
| 4109 | OPC_Decode, 147, 12, 218, 1, // 1862: decode to LFH using decoder 218 |
| 4110 | // 1862: } |
| 4111 | 203, 1, 7, // 1867: case 0xcb: { |
| 4112 | OPC_CheckPredicate, 22, // 1870: check predicate 22 |
| 4113 | OPC_Decode, 139, 18, 218, 1, // 1872: decode to STFH using decoder 218 |
| 4114 | // 1872: } |
| 4115 | 205, 1, 7, // 1877: case 0xcd: { |
| 4116 | OPC_CheckPredicate, 22, // 1880: check predicate 22 |
| 4117 | OPC_Decode, 250, 6, 218, 1, // 1882: decode to CHF using decoder 218 |
| 4118 | // 1882: } |
| 4119 | 207, 1, 0, // 1887: case 0xcf: { |
| 4120 | OPC_CheckPredicate, 22, // 1890: check predicate 22 |
| 4121 | OPC_Decode, 184, 8, 218, 1, // 1892: decode to CLHF using decoder 218 |
| 4122 | // 1892: } |
| 4123 | // 1892: } // switch Inst[7:0] |
| 4124 | // 1892: } |
| 4125 | 229, 1, 128, 1, // 1897: case 0xe5: { |
| 4126 | OPC_SwitchField, 32, 8, // 1901: switch Inst[39:32] { |
| 4127 | 0, 5, // 1904: case 0x0: { |
| 4128 | OPC_Decode, 220, 11, 219, 1, // 1906: decode to LASP using decoder 219 |
| 4129 | // 1906: } |
| 4130 | 1, 5, // 1911: case 0x1: { |
| 4131 | OPC_Decode, 147, 19, 219, 1, // 1913: decode to TPROT using decoder 219 |
| 4132 | // 1913: } |
| 4133 | 2, 5, // 1918: case 0x2: { |
| 4134 | OPC_Decode, 226, 18, 219, 1, // 1920: decode to STRAG using decoder 219 |
| 4135 | // 1920: } |
| 4136 | 10, 7, // 1925: case 0xa: { |
| 4137 | OPC_CheckPredicate, 15, // 1927: check predicate 15 |
| 4138 | OPC_Decode, 186, 15, 219, 1, // 1929: decode to MVCRL using decoder 219 |
| 4139 | // 1929: } |
| 4140 | 14, 5, // 1934: case 0xe: { |
| 4141 | OPC_Decode, 188, 15, 219, 1, // 1936: decode to MVCSK using decoder 219 |
| 4142 | // 1936: } |
| 4143 | 15, 5, // 1941: case 0xf: { |
| 4144 | OPC_Decode, 178, 15, 219, 1, // 1943: decode to MVCDK using decoder 219 |
| 4145 | // 1943: } |
| 4146 | 68, 5, // 1948: case 0x44: { |
| 4147 | OPC_Decode, 190, 15, 220, 1, // 1950: decode to MVHHI using decoder 220 |
| 4148 | // 1950: } |
| 4149 | 72, 5, // 1955: case 0x48: { |
| 4150 | OPC_Decode, 189, 15, 220, 1, // 1957: decode to MVGHI using decoder 220 |
| 4151 | // 1957: } |
| 4152 | 76, 5, // 1962: case 0x4c: { |
| 4153 | OPC_Decode, 191, 15, 220, 1, // 1964: decode to MVHI using decoder 220 |
| 4154 | // 1964: } |
| 4155 | 84, 5, // 1969: case 0x54: { |
| 4156 | OPC_Decode, 252, 6, 220, 1, // 1971: decode to CHHSI using decoder 220 |
| 4157 | // 1971: } |
| 4158 | 85, 5, // 1976: case 0x55: { |
| 4159 | OPC_Decode, 186, 8, 221, 1, // 1978: decode to CLHHSI using decoder 221 |
| 4160 | // 1978: } |
| 4161 | 88, 5, // 1983: case 0x58: { |
| 4162 | OPC_Decode, 157, 6, 220, 1, // 1985: decode to CGHSI using decoder 220 |
| 4163 | // 1985: } |
| 4164 | 89, 5, // 1990: case 0x59: { |
| 4165 | OPC_Decode, 209, 7, 221, 1, // 1992: decode to CLGHSI using decoder 221 |
| 4166 | // 1992: } |
| 4167 | 92, 5, // 1997: case 0x5c: { |
| 4168 | OPC_Decode, 128, 7, 220, 1, // 1999: decode to CHSI using decoder 220 |
| 4169 | // 1999: } |
| 4170 | 93, 5, // 2004: case 0x5d: { |
| 4171 | OPC_Decode, 182, 7, 221, 1, // 2006: decode to CLFHSI using decoder 221 |
| 4172 | // 2006: } |
| 4173 | 96, 7, // 2011: case 0x60: { |
| 4174 | OPC_CheckPredicate, 4, // 2013: check predicate 4 |
| 4175 | OPC_Decode, 252, 18, 221, 1, // 2015: decode to TBEGIN using decoder 221 |
| 4176 | // 2015: } |
| 4177 | 97, 0, // 2020: case 0x61: { |
| 4178 | OPC_CheckPredicate, 4, // 2022: check predicate 4 |
| 4179 | OPC_Decode, 253, 18, 221, 1, // 2024: decode to TBEGINC using decoder 221 |
| 4180 | // 2024: } |
| 4181 | // 2024: } // switch Inst[39:32] |
| 4182 | // 2024: } |
| 4183 | 230, 1, 227, 8, // 2029: case 0xe6: { |
| 4184 | OPC_SwitchField, 0, 8, // 2033: switch Inst[7:0] { |
| 4185 | 1, 11, // 2036: case 0x1: { |
| 4186 | OPC_CheckPredicate, 33, // 2038: check predicate 33 |
| 4187 | OPC_CheckField, 8, 3, 0, // 2040: check Inst[10:8] == 0x0 |
| 4188 | OPC_Decode, 143, 22, 222, 1, // 2044: decode to VLEBRH using decoder 222 |
| 4189 | // 2044: } |
| 4190 | 2, 11, // 2049: case 0x2: { |
| 4191 | OPC_CheckPredicate, 33, // 2051: check predicate 33 |
| 4192 | OPC_CheckField, 8, 3, 0, // 2053: check Inst[10:8] == 0x0 |
| 4193 | OPC_Decode, 142, 22, 223, 1, // 2057: decode to VLEBRG using decoder 223 |
| 4194 | // 2057: } |
| 4195 | 3, 11, // 2062: case 0x3: { |
| 4196 | OPC_CheckPredicate, 33, // 2064: check predicate 33 |
| 4197 | OPC_CheckField, 8, 3, 0, // 2066: check Inst[10:8] == 0x0 |
| 4198 | OPC_Decode, 141, 22, 224, 1, // 2070: decode to VLEBRF using decoder 224 |
| 4199 | // 2070: } |
| 4200 | 4, 52, // 2075: case 0x4: { |
| 4201 | OPC_CheckField, 8, 3, 0, // 2077: check Inst[10:8] == 0x0 |
| 4202 | OPC_Scope, 39, // 2081: try { |
| 4203 | OPC_SwitchField, 12, 4, // 2083: switch Inst[15:12] { |
| 4204 | 1, 7, // 2086: case 0x1: { |
| 4205 | OPC_CheckPredicate, 33, // 2088: check predicate 33 |
| 4206 | OPC_Decode, 168, 22, 225, 1, // 2090: decode to VLLEBRZH using decoder 225 |
| 4207 | // 2090: } |
| 4208 | 2, 7, // 2095: case 0x2: { |
| 4209 | OPC_CheckPredicate, 33, // 2097: check predicate 33 |
| 4210 | OPC_Decode, 166, 22, 225, 1, // 2099: decode to VLLEBRZF using decoder 225 |
| 4211 | // 2099: } |
| 4212 | 3, 7, // 2104: case 0x3: { |
| 4213 | OPC_CheckPredicate, 33, // 2106: check predicate 33 |
| 4214 | OPC_Decode, 167, 22, 225, 1, // 2108: decode to VLLEBRZG using decoder 225 |
| 4215 | // 2108: } |
| 4216 | 6, 0, // 2113: case 0x6: { |
| 4217 | OPC_CheckPredicate, 33, // 2115: check predicate 33 |
| 4218 | OPC_Decode, 165, 22, 225, 1, // 2117: decode to VLLEBRZE using decoder 225 |
| 4219 | // 2117: } |
| 4220 | // 2117: } // switch Inst[15:12] |
| 4221 | // 2117: } else try { |
| 4222 | OPC_CheckPredicate, 33, // 2122: check predicate 33 |
| 4223 | OPC_Decode, 164, 22, 226, 1, // 2124: decode to VLLEBRZ using decoder 226 |
| 4224 | // 2124: } |
| 4225 | // 2124: } |
| 4226 | 5, 43, // 2129: case 0x5: { |
| 4227 | OPC_CheckField, 8, 3, 0, // 2131: check Inst[10:8] == 0x0 |
| 4228 | OPC_Scope, 30, // 2135: try { |
| 4229 | OPC_SwitchField, 12, 4, // 2137: switch Inst[15:12] { |
| 4230 | 1, 7, // 2140: case 0x1: { |
| 4231 | OPC_CheckPredicate, 33, // 2142: check predicate 33 |
| 4232 | OPC_Decode, 131, 22, 225, 1, // 2144: decode to VLBRREPH using decoder 225 |
| 4233 | // 2144: } |
| 4234 | 2, 7, // 2149: case 0x2: { |
| 4235 | OPC_CheckPredicate, 33, // 2151: check predicate 33 |
| 4236 | OPC_Decode, 129, 22, 225, 1, // 2153: decode to VLBRREPF using decoder 225 |
| 4237 | // 2153: } |
| 4238 | 3, 0, // 2158: case 0x3: { |
| 4239 | OPC_CheckPredicate, 33, // 2160: check predicate 33 |
| 4240 | OPC_Decode, 130, 22, 225, 1, // 2162: decode to VLBRREPG using decoder 225 |
| 4241 | // 2162: } |
| 4242 | // 2162: } // switch Inst[15:12] |
| 4243 | // 2162: } else try { |
| 4244 | OPC_CheckPredicate, 33, // 2167: check predicate 33 |
| 4245 | OPC_Decode, 128, 22, 226, 1, // 2169: decode to VLBRREP using decoder 226 |
| 4246 | // 2169: } |
| 4247 | // 2169: } |
| 4248 | 6, 52, // 2174: case 0x6: { |
| 4249 | OPC_CheckField, 8, 3, 0, // 2176: check Inst[10:8] == 0x0 |
| 4250 | OPC_Scope, 39, // 2180: try { |
| 4251 | OPC_SwitchField, 12, 4, // 2182: switch Inst[15:12] { |
| 4252 | 1, 7, // 2185: case 0x1: { |
| 4253 | OPC_CheckPredicate, 33, // 2187: check predicate 33 |
| 4254 | OPC_Decode, 254, 21, 225, 1, // 2189: decode to VLBRH using decoder 225 |
| 4255 | // 2189: } |
| 4256 | 2, 7, // 2194: case 0x2: { |
| 4257 | OPC_CheckPredicate, 33, // 2196: check predicate 33 |
| 4258 | OPC_Decode, 252, 21, 225, 1, // 2198: decode to VLBRF using decoder 225 |
| 4259 | // 2198: } |
| 4260 | 3, 7, // 2203: case 0x3: { |
| 4261 | OPC_CheckPredicate, 33, // 2205: check predicate 33 |
| 4262 | OPC_Decode, 253, 21, 225, 1, // 2207: decode to VLBRG using decoder 225 |
| 4263 | // 2207: } |
| 4264 | 4, 0, // 2212: case 0x4: { |
| 4265 | OPC_CheckPredicate, 33, // 2214: check predicate 33 |
| 4266 | OPC_Decode, 255, 21, 225, 1, // 2216: decode to VLBRQ using decoder 225 |
| 4267 | // 2216: } |
| 4268 | // 2216: } // switch Inst[15:12] |
| 4269 | // 2216: } else try { |
| 4270 | OPC_CheckPredicate, 33, // 2221: check predicate 33 |
| 4271 | OPC_Decode, 251, 21, 226, 1, // 2223: decode to VLBR using decoder 226 |
| 4272 | // 2223: } |
| 4273 | // 2223: } |
| 4274 | 7, 43, // 2228: case 0x7: { |
| 4275 | OPC_CheckField, 8, 3, 0, // 2230: check Inst[10:8] == 0x0 |
| 4276 | OPC_Scope, 30, // 2234: try { |
| 4277 | OPC_SwitchField, 12, 4, // 2236: switch Inst[15:12] { |
| 4278 | 1, 7, // 2239: case 0x1: { |
| 4279 | OPC_CheckPredicate, 33, // 2241: check predicate 33 |
| 4280 | OPC_Decode, 156, 22, 225, 1, // 2243: decode to VLERH using decoder 225 |
| 4281 | // 2243: } |
| 4282 | 2, 7, // 2248: case 0x2: { |
| 4283 | OPC_CheckPredicate, 33, // 2250: check predicate 33 |
| 4284 | OPC_Decode, 154, 22, 225, 1, // 2252: decode to VLERF using decoder 225 |
| 4285 | // 2252: } |
| 4286 | 3, 0, // 2257: case 0x3: { |
| 4287 | OPC_CheckPredicate, 33, // 2259: check predicate 33 |
| 4288 | OPC_Decode, 155, 22, 225, 1, // 2261: decode to VLERG using decoder 225 |
| 4289 | // 2261: } |
| 4290 | // 2261: } // switch Inst[15:12] |
| 4291 | // 2261: } else try { |
| 4292 | OPC_CheckPredicate, 33, // 2266: check predicate 33 |
| 4293 | OPC_Decode, 153, 22, 226, 1, // 2268: decode to VLER using decoder 226 |
| 4294 | // 2268: } |
| 4295 | // 2268: } |
| 4296 | 9, 11, // 2273: case 0x9: { |
| 4297 | OPC_CheckPredicate, 33, // 2275: check predicate 33 |
| 4298 | OPC_CheckField, 8, 3, 0, // 2277: check Inst[10:8] == 0x0 |
| 4299 | OPC_Decode, 161, 24, 227, 1, // 2281: decode to VSTEBRH using decoder 227 |
| 4300 | // 2281: } |
| 4301 | 10, 11, // 2286: case 0xa: { |
| 4302 | OPC_CheckPredicate, 33, // 2288: check predicate 33 |
| 4303 | OPC_CheckField, 8, 3, 0, // 2290: check Inst[10:8] == 0x0 |
| 4304 | OPC_Decode, 160, 24, 228, 1, // 2294: decode to VSTEBRG using decoder 228 |
| 4305 | // 2294: } |
| 4306 | 11, 11, // 2299: case 0xb: { |
| 4307 | OPC_CheckPredicate, 33, // 2301: check predicate 33 |
| 4308 | OPC_CheckField, 8, 3, 0, // 2303: check Inst[10:8] == 0x0 |
| 4309 | OPC_Decode, 159, 24, 229, 1, // 2307: decode to VSTEBRF using decoder 229 |
| 4310 | // 2307: } |
| 4311 | 14, 52, // 2312: case 0xe: { |
| 4312 | OPC_CheckField, 8, 3, 0, // 2314: check Inst[10:8] == 0x0 |
| 4313 | OPC_Scope, 39, // 2318: try { |
| 4314 | OPC_SwitchField, 12, 4, // 2320: switch Inst[15:12] { |
| 4315 | 1, 7, // 2323: case 0x1: { |
| 4316 | OPC_CheckPredicate, 33, // 2325: check predicate 33 |
| 4317 | OPC_Decode, 156, 24, 225, 1, // 2327: decode to VSTBRH using decoder 225 |
| 4318 | // 2327: } |
| 4319 | 2, 7, // 2332: case 0x2: { |
| 4320 | OPC_CheckPredicate, 33, // 2334: check predicate 33 |
| 4321 | OPC_Decode, 154, 24, 225, 1, // 2336: decode to VSTBRF using decoder 225 |
| 4322 | // 2336: } |
| 4323 | 3, 7, // 2341: case 0x3: { |
| 4324 | OPC_CheckPredicate, 33, // 2343: check predicate 33 |
| 4325 | OPC_Decode, 155, 24, 225, 1, // 2345: decode to VSTBRG using decoder 225 |
| 4326 | // 2345: } |
| 4327 | 4, 0, // 2350: case 0x4: { |
| 4328 | OPC_CheckPredicate, 33, // 2352: check predicate 33 |
| 4329 | OPC_Decode, 157, 24, 225, 1, // 2354: decode to VSTBRQ using decoder 225 |
| 4330 | // 2354: } |
| 4331 | // 2354: } // switch Inst[15:12] |
| 4332 | // 2354: } else try { |
| 4333 | OPC_CheckPredicate, 33, // 2359: check predicate 33 |
| 4334 | OPC_Decode, 153, 24, 226, 1, // 2361: decode to VSTBR using decoder 226 |
| 4335 | // 2361: } |
| 4336 | // 2361: } |
| 4337 | 15, 43, // 2366: case 0xf: { |
| 4338 | OPC_CheckField, 8, 3, 0, // 2368: check Inst[10:8] == 0x0 |
| 4339 | OPC_Scope, 30, // 2372: try { |
| 4340 | OPC_SwitchField, 12, 4, // 2374: switch Inst[15:12] { |
| 4341 | 1, 7, // 2377: case 0x1: { |
| 4342 | OPC_CheckPredicate, 33, // 2379: check predicate 33 |
| 4343 | OPC_Decode, 168, 24, 225, 1, // 2381: decode to VSTERH using decoder 225 |
| 4344 | // 2381: } |
| 4345 | 2, 7, // 2386: case 0x2: { |
| 4346 | OPC_CheckPredicate, 33, // 2388: check predicate 33 |
| 4347 | OPC_Decode, 166, 24, 225, 1, // 2390: decode to VSTERF using decoder 225 |
| 4348 | // 2390: } |
| 4349 | 3, 0, // 2395: case 0x3: { |
| 4350 | OPC_CheckPredicate, 33, // 2397: check predicate 33 |
| 4351 | OPC_Decode, 167, 24, 225, 1, // 2399: decode to VSTERG using decoder 225 |
| 4352 | // 2399: } |
| 4353 | // 2399: } // switch Inst[15:12] |
| 4354 | // 2399: } else try { |
| 4355 | OPC_CheckPredicate, 33, // 2404: check predicate 33 |
| 4356 | OPC_Decode, 165, 24, 226, 1, // 2406: decode to VSTER using decoder 226 |
| 4357 | // 2406: } |
| 4358 | // 2406: } |
| 4359 | 52, 11, // 2411: case 0x34: { |
| 4360 | OPC_CheckPredicate, 34, // 2413: check predicate 34 |
| 4361 | OPC_CheckField, 9, 3, 0, // 2415: check Inst[11:9] == 0x0 |
| 4362 | OPC_Decode, 211, 23, 230, 1, // 2419: decode to VPKZ using decoder 230 |
| 4363 | // 2419: } |
| 4364 | 53, 11, // 2424: case 0x35: { |
| 4365 | OPC_CheckPredicate, 34, // 2426: check predicate 34 |
| 4366 | OPC_CheckField, 9, 3, 0, // 2428: check Inst[11:9] == 0x0 |
| 4367 | OPC_Decode, 189, 22, 230, 1, // 2432: decode to VLRL using decoder 230 |
| 4368 | // 2432: } |
| 4369 | 55, 15, // 2437: case 0x37: { |
| 4370 | OPC_CheckPredicate, 34, // 2439: check predicate 34 |
| 4371 | OPC_CheckField, 36, 4, 0, // 2441: check Inst[39:36] == 0x0 |
| 4372 | OPC_CheckField, 9, 3, 0, // 2445: check Inst[11:9] == 0x0 |
| 4373 | OPC_Decode, 190, 22, 231, 1, // 2449: decode to VLRLR using decoder 231 |
| 4374 | // 2449: } |
| 4375 | 60, 11, // 2454: case 0x3c: { |
| 4376 | OPC_CheckPredicate, 34, // 2456: check predicate 34 |
| 4377 | OPC_CheckField, 9, 3, 0, // 2458: check Inst[11:9] == 0x0 |
| 4378 | OPC_Decode, 212, 24, 230, 1, // 2462: decode to VUPKZ using decoder 230 |
| 4379 | // 2462: } |
| 4380 | 61, 11, // 2467: case 0x3d: { |
| 4381 | OPC_CheckPredicate, 34, // 2469: check predicate 34 |
| 4382 | OPC_CheckField, 9, 3, 0, // 2471: check Inst[11:9] == 0x0 |
| 4383 | OPC_Decode, 185, 24, 230, 1, // 2475: decode to VSTRL using decoder 230 |
| 4384 | // 2475: } |
| 4385 | 63, 15, // 2480: case 0x3f: { |
| 4386 | OPC_CheckPredicate, 34, // 2482: check predicate 34 |
| 4387 | OPC_CheckField, 36, 4, 0, // 2484: check Inst[39:36] == 0x0 |
| 4388 | OPC_CheckField, 9, 3, 0, // 2488: check Inst[11:9] == 0x0 |
| 4389 | OPC_Decode, 186, 24, 231, 1, // 2492: decode to VSTRLR using decoder 231 |
| 4390 | // 2492: } |
| 4391 | 73, 15, // 2497: case 0x49: { |
| 4392 | OPC_CheckPredicate, 34, // 2499: check predicate 34 |
| 4393 | OPC_CheckField, 32, 4, 0, // 2501: check Inst[35:32] == 0x0 |
| 4394 | OPC_CheckField, 8, 3, 0, // 2505: check Inst[10:8] == 0x0 |
| 4395 | OPC_Decode, 162, 22, 232, 1, // 2509: decode to VLIP using decoder 232 |
| 4396 | // 2509: } |
| 4397 | 74, 15, // 2514: case 0x4a: { |
| 4398 | OPC_CheckPredicate, 35, // 2516: check predicate 35 |
| 4399 | OPC_CheckField, 24, 8, 0, // 2518: check Inst[31:24] == 0x0 |
| 4400 | OPC_CheckField, 8, 2, 0, // 2522: check Inst[9:8] == 0x0 |
| 4401 | OPC_Decode, 159, 20, 233, 1, // 2526: decode to VCVDQ using decoder 233 |
| 4402 | // 2526: } |
| 4403 | 78, 19, // 2531: case 0x4e: { |
| 4404 | OPC_CheckPredicate, 35, // 2533: check predicate 35 |
| 4405 | OPC_CheckField, 24, 8, 0, // 2535: check Inst[31:24] == 0x0 |
| 4406 | OPC_CheckField, 12, 8, 0, // 2539: check Inst[19:12] == 0x0 |
| 4407 | OPC_CheckField, 8, 2, 0, // 2543: check Inst[9:8] == 0x0 |
| 4408 | OPC_Decode, 156, 20, 234, 1, // 2547: decode to VCVBQ using decoder 234 |
| 4409 | // 2547: } |
| 4410 | 80, 32, // 2552: case 0x50: { |
| 4411 | OPC_CheckField, 8, 2, 0, // 2554: check Inst[9:8] == 0x0 |
| 4412 | OPC_CheckField, 11, 5, 0, // 2558: check Inst[15:11] == 0x0 |
| 4413 | OPC_CheckField, 24, 8, 0, // 2562: check Inst[31:24] == 0x0 |
| 4414 | OPC_Scope, 11, // 2566: try { |
| 4415 | OPC_CheckField, 16, 4, 0, // 2568: check Inst[19:16] == 0x0 |
| 4416 | OPC_CheckPredicate, 34, // 2572: check predicate 34 |
| 4417 | OPC_Decode, 152, 20, 235, 1, // 2574: decode to VCVB using decoder 235 |
| 4418 | // 2574: } else try { |
| 4419 | OPC_CheckPredicate, 36, // 2579: check predicate 36 |
| 4420 | OPC_Decode, 155, 20, 236, 1, // 2581: decode to VCVBOpt using decoder 236 |
| 4421 | // 2581: } |
| 4422 | // 2581: } |
| 4423 | 81, 19, // 2586: case 0x51: { |
| 4424 | OPC_CheckPredicate, 37, // 2588: check predicate 37 |
| 4425 | OPC_CheckField, 24, 8, 0, // 2590: check Inst[31:24] == 0x0 |
| 4426 | OPC_CheckField, 12, 8, 0, // 2594: check Inst[19:12] == 0x0 |
| 4427 | OPC_CheckField, 8, 2, 0, // 2598: check Inst[9:8] == 0x0 |
| 4428 | OPC_Decode, 136, 20, 234, 1, // 2602: decode to VCLZDP using decoder 234 |
| 4429 | // 2602: } |
| 4430 | 82, 32, // 2607: case 0x52: { |
| 4431 | OPC_CheckField, 8, 2, 0, // 2609: check Inst[9:8] == 0x0 |
| 4432 | OPC_CheckField, 11, 5, 0, // 2613: check Inst[15:11] == 0x0 |
| 4433 | OPC_CheckField, 24, 8, 0, // 2617: check Inst[31:24] == 0x0 |
| 4434 | OPC_Scope, 11, // 2621: try { |
| 4435 | OPC_CheckField, 16, 4, 0, // 2623: check Inst[19:16] == 0x0 |
| 4436 | OPC_CheckPredicate, 34, // 2627: check predicate 34 |
| 4437 | OPC_Decode, 153, 20, 237, 1, // 2629: decode to VCVBG using decoder 237 |
| 4438 | // 2629: } else try { |
| 4439 | OPC_CheckPredicate, 36, // 2634: check predicate 36 |
| 4440 | OPC_Decode, 154, 20, 238, 1, // 2636: decode to VCVBGOpt using decoder 238 |
| 4441 | // 2636: } |
| 4442 | // 2636: } |
| 4443 | 84, 19, // 2641: case 0x54: { |
| 4444 | OPC_CheckPredicate, 37, // 2643: check predicate 37 |
| 4445 | OPC_CheckField, 24, 8, 0, // 2645: check Inst[31:24] == 0x0 |
| 4446 | OPC_CheckField, 12, 8, 0, // 2649: check Inst[19:12] == 0x0 |
| 4447 | OPC_CheckField, 8, 2, 0, // 2653: check Inst[9:8] == 0x0 |
| 4448 | OPC_Decode, 213, 24, 234, 1, // 2657: decode to VUPKZH using decoder 234 |
| 4449 | // 2657: } |
| 4450 | 85, 15, // 2662: case 0x55: { |
| 4451 | OPC_CheckPredicate, 38, // 2664: check predicate 38 |
| 4452 | OPC_CheckField, 20, 12, 0, // 2666: check Inst[31:20] == 0x0 |
| 4453 | OPC_CheckField, 8, 2, 0, // 2670: check Inst[9:8] == 0x0 |
| 4454 | OPC_Decode, 141, 20, 239, 1, // 2674: decode to VCNF using decoder 239 |
| 4455 | // 2674: } |
| 4456 | 86, 15, // 2679: case 0x56: { |
| 4457 | OPC_CheckPredicate, 38, // 2681: check predicate 38 |
| 4458 | OPC_CheckField, 20, 12, 0, // 2683: check Inst[31:20] == 0x0 |
| 4459 | OPC_CheckField, 8, 2, 0, // 2687: check Inst[9:8] == 0x0 |
| 4460 | OPC_Decode, 129, 20, 239, 1, // 2691: decode to VCLFNH using decoder 239 |
| 4461 | // 2691: } |
| 4462 | 88, 15, // 2696: case 0x58: { |
| 4463 | OPC_CheckPredicate, 34, // 2698: check predicate 34 |
| 4464 | OPC_CheckField, 24, 8, 0, // 2700: check Inst[31:24] == 0x0 |
| 4465 | OPC_CheckField, 8, 3, 0, // 2704: check Inst[10:8] == 0x0 |
| 4466 | OPC_Decode, 157, 20, 240, 1, // 2708: decode to VCVD using decoder 240 |
| 4467 | // 2708: } |
| 4468 | 89, 11, // 2713: case 0x59: { |
| 4469 | OPC_CheckPredicate, 34, // 2715: check predicate 34 |
| 4470 | OPC_CheckField, 8, 2, 0, // 2717: check Inst[9:8] == 0x0 |
| 4471 | OPC_Decode, 149, 24, 241, 1, // 2721: decode to VSRP using decoder 241 |
| 4472 | // 2721: } |
| 4473 | 90, 15, // 2726: case 0x5a: { |
| 4474 | OPC_CheckPredicate, 34, // 2728: check predicate 34 |
| 4475 | OPC_CheckField, 24, 8, 0, // 2730: check Inst[31:24] == 0x0 |
| 4476 | OPC_CheckField, 8, 3, 0, // 2734: check Inst[10:8] == 0x0 |
| 4477 | OPC_Decode, 158, 20, 242, 1, // 2738: decode to VCVDG using decoder 242 |
| 4478 | // 2738: } |
| 4479 | 91, 11, // 2743: case 0x5b: { |
| 4480 | OPC_CheckPredicate, 34, // 2745: check predicate 34 |
| 4481 | OPC_CheckField, 8, 2, 0, // 2747: check Inst[9:8] == 0x0 |
| 4482 | OPC_Decode, 218, 23, 241, 1, // 2751: decode to VPSOP using decoder 241 |
| 4483 | // 2751: } |
| 4484 | 92, 19, // 2756: case 0x5c: { |
| 4485 | OPC_CheckPredicate, 37, // 2758: check predicate 37 |
| 4486 | OPC_CheckField, 24, 8, 0, // 2760: check Inst[31:24] == 0x0 |
| 4487 | OPC_CheckField, 12, 8, 0, // 2764: check Inst[19:12] == 0x0 |
| 4488 | OPC_CheckField, 8, 2, 0, // 2768: check Inst[9:8] == 0x0 |
| 4489 | OPC_Decode, 214, 24, 234, 1, // 2772: decode to VUPKZL using decoder 234 |
| 4490 | // 2772: } |
| 4491 | 93, 15, // 2777: case 0x5d: { |
| 4492 | OPC_CheckPredicate, 38, // 2779: check predicate 38 |
| 4493 | OPC_CheckField, 20, 12, 0, // 2781: check Inst[31:20] == 0x0 |
| 4494 | OPC_CheckField, 8, 2, 0, // 2785: check Inst[9:8] == 0x0 |
| 4495 | OPC_Decode, 228, 19, 239, 1, // 2789: decode to VCFN using decoder 239 |
| 4496 | // 2789: } |
| 4497 | 94, 15, // 2794: case 0x5e: { |
| 4498 | OPC_CheckPredicate, 38, // 2796: check predicate 38 |
| 4499 | OPC_CheckField, 20, 12, 0, // 2798: check Inst[31:20] == 0x0 |
| 4500 | OPC_CheckField, 8, 2, 0, // 2802: check Inst[9:8] == 0x0 |
| 4501 | OPC_Decode, 130, 20, 239, 1, // 2806: decode to VCLFNL using decoder 239 |
| 4502 | // 2806: } |
| 4503 | 95, 36, // 2811: case 0x5f: { |
| 4504 | OPC_CheckField, 8, 2, 0, // 2813: check Inst[9:8] == 0x0 |
| 4505 | OPC_CheckField, 11, 1, 0, // 2817: check Inst[11] == 0x0 |
| 4506 | OPC_CheckField, 28, 4, 0, // 2821: check Inst[31:28] == 0x0 |
| 4507 | OPC_CheckField, 36, 4, 0, // 2825: check Inst[39:36] == 0x0 |
| 4508 | OPC_Scope, 11, // 2829: try { |
| 4509 | OPC_CheckField, 12, 16, 0, // 2831: check Inst[27:12] == 0x0 |
| 4510 | OPC_CheckPredicate, 34, // 2835: check predicate 34 |
| 4511 | OPC_Decode, 204, 24, 243, 1, // 2837: decode to VTP using decoder 243 |
| 4512 | // 2837: } else try { |
| 4513 | OPC_CheckPredicate, 35, // 2842: check predicate 35 |
| 4514 | OPC_Decode, 205, 24, 244, 1, // 2844: decode to VTPOpt using decoder 244 |
| 4515 | // 2844: } |
| 4516 | // 2844: } |
| 4517 | 112, 15, // 2849: case 0x70: { |
| 4518 | OPC_CheckPredicate, 37, // 2851: check predicate 37 |
| 4519 | OPC_CheckField, 24, 4, 0, // 2853: check Inst[27:24] == 0x0 |
| 4520 | OPC_CheckField, 8, 1, 0, // 2857: check Inst[8] == 0x0 |
| 4521 | OPC_Decode, 212, 23, 245, 1, // 2861: decode to VPKZR using decoder 245 |
| 4522 | // 2861: } |
| 4523 | 113, 15, // 2866: case 0x71: { |
| 4524 | OPC_CheckPredicate, 34, // 2868: check predicate 34 |
| 4525 | OPC_CheckField, 24, 4, 0, // 2870: check Inst[27:24] == 0x0 |
| 4526 | OPC_CheckField, 8, 1, 0, // 2874: check Inst[8] == 0x0 |
| 4527 | OPC_Decode, 189, 19, 245, 1, // 2878: decode to VAP using decoder 245 |
| 4528 | // 2878: } |
| 4529 | 114, 15, // 2883: case 0x72: { |
| 4530 | OPC_CheckPredicate, 37, // 2885: check predicate 37 |
| 4531 | OPC_CheckField, 24, 4, 0, // 2887: check Inst[27:24] == 0x0 |
| 4532 | OPC_CheckField, 8, 1, 0, // 2891: check Inst[8] == 0x0 |
| 4533 | OPC_Decode, 150, 24, 245, 1, // 2895: decode to VSRPR using decoder 245 |
| 4534 | // 2895: } |
| 4535 | 115, 15, // 2900: case 0x73: { |
| 4536 | OPC_CheckPredicate, 34, // 2902: check predicate 34 |
| 4537 | OPC_CheckField, 24, 4, 0, // 2904: check Inst[27:24] == 0x0 |
| 4538 | OPC_CheckField, 8, 1, 0, // 2908: check Inst[8] == 0x0 |
| 4539 | OPC_Decode, 142, 24, 245, 1, // 2912: decode to VSP using decoder 245 |
| 4540 | // 2912: } |
| 4541 | 116, 51, // 2917: case 0x74: { |
| 4542 | OPC_CheckField, 8, 1, 0, // 2919: check Inst[8] == 0x0 |
| 4543 | OPC_CheckField, 16, 4, 0, // 2923: check Inst[19:16] == 0x0 |
| 4544 | OPC_CheckField, 24, 4, 0, // 2927: check Inst[27:24] == 0x0 |
| 4545 | OPC_Scope, 30, // 2931: try { |
| 4546 | OPC_SwitchField, 12, 4, // 2933: switch Inst[15:12] { |
| 4547 | 2, 7, // 2936: case 0x2: { |
| 4548 | OPC_CheckPredicate, 37, // 2938: check predicate 37 |
| 4549 | OPC_Decode, 254, 23, 246, 1, // 2940: decode to VSCHSP using decoder 246 |
| 4550 | // 2940: } |
| 4551 | 3, 7, // 2945: case 0x3: { |
| 4552 | OPC_CheckPredicate, 37, // 2947: check predicate 37 |
| 4553 | OPC_Decode, 252, 23, 246, 1, // 2949: decode to VSCHDP using decoder 246 |
| 4554 | // 2949: } |
| 4555 | 4, 0, // 2954: case 0x4: { |
| 4556 | OPC_CheckPredicate, 37, // 2956: check predicate 37 |
| 4557 | OPC_Decode, 255, 23, 246, 1, // 2958: decode to VSCHXP using decoder 246 |
| 4558 | // 2958: } |
| 4559 | // 2958: } // switch Inst[15:12] |
| 4560 | // 2958: } else try { |
| 4561 | OPC_CheckPredicate, 37, // 2963: check predicate 37 |
| 4562 | OPC_Decode, 253, 23, 247, 1, // 2965: decode to VSCHP using decoder 247 |
| 4563 | // 2965: } |
| 4564 | // 2965: } |
| 4565 | 117, 15, // 2970: case 0x75: { |
| 4566 | OPC_CheckPredicate, 38, // 2972: check predicate 38 |
| 4567 | OPC_CheckField, 20, 8, 0, // 2974: check Inst[27:20] == 0x0 |
| 4568 | OPC_CheckField, 8, 1, 0, // 2978: check Inst[8] == 0x0 |
| 4569 | OPC_Decode, 143, 20, 248, 1, // 2982: decode to VCRNF using decoder 248 |
| 4570 | // 2982: } |
| 4571 | 119, 23, // 2987: case 0x77: { |
| 4572 | OPC_CheckPredicate, 34, // 2989: check predicate 34 |
| 4573 | OPC_CheckField, 36, 4, 0, // 2991: check Inst[39:36] == 0x0 |
| 4574 | OPC_CheckField, 24, 4, 0, // 2995: check Inst[27:24] == 0x0 |
| 4575 | OPC_CheckField, 11, 9, 0, // 2999: check Inst[19:11] == 0x0 |
| 4576 | OPC_CheckField, 8, 1, 0, // 3003: check Inst[8] == 0x0 |
| 4577 | OPC_Decode, 142, 20, 249, 1, // 3007: decode to VCP using decoder 249 |
| 4578 | // 3007: } |
| 4579 | 120, 15, // 3012: case 0x78: { |
| 4580 | OPC_CheckPredicate, 34, // 3014: check predicate 34 |
| 4581 | OPC_CheckField, 24, 4, 0, // 3016: check Inst[27:24] == 0x0 |
| 4582 | OPC_CheckField, 8, 1, 0, // 3020: check Inst[8] == 0x0 |
| 4583 | OPC_Decode, 157, 23, 245, 1, // 3024: decode to VMP using decoder 245 |
| 4584 | // 3024: } |
| 4585 | 121, 15, // 3029: case 0x79: { |
| 4586 | OPC_CheckPredicate, 34, // 3031: check predicate 34 |
| 4587 | OPC_CheckField, 24, 4, 0, // 3033: check Inst[27:24] == 0x0 |
| 4588 | OPC_CheckField, 8, 1, 0, // 3037: check Inst[8] == 0x0 |
| 4589 | OPC_Decode, 170, 23, 245, 1, // 3041: decode to VMSP using decoder 245 |
| 4590 | // 3041: } |
| 4591 | 122, 15, // 3046: case 0x7a: { |
| 4592 | OPC_CheckPredicate, 34, // 3048: check predicate 34 |
| 4593 | OPC_CheckField, 24, 4, 0, // 3050: check Inst[27:24] == 0x0 |
| 4594 | OPC_CheckField, 8, 1, 0, // 3054: check Inst[8] == 0x0 |
| 4595 | OPC_Decode, 167, 20, 245, 1, // 3058: decode to VDP using decoder 245 |
| 4596 | // 3058: } |
| 4597 | 123, 15, // 3063: case 0x7b: { |
| 4598 | OPC_CheckPredicate, 34, // 3065: check predicate 34 |
| 4599 | OPC_CheckField, 24, 4, 0, // 3067: check Inst[27:24] == 0x0 |
| 4600 | OPC_CheckField, 8, 1, 0, // 3071: check Inst[8] == 0x0 |
| 4601 | OPC_Decode, 236, 23, 245, 1, // 3075: decode to VRP using decoder 245 |
| 4602 | // 3075: } |
| 4603 | 124, 15, // 3080: case 0x7c: { |
| 4604 | OPC_CheckPredicate, 37, // 3082: check predicate 37 |
| 4605 | OPC_CheckField, 12, 16, 0, // 3084: check Inst[27:12] == 0x0 |
| 4606 | OPC_CheckField, 8, 1, 0, // 3088: check Inst[8] == 0x0 |
| 4607 | OPC_Decode, 128, 24, 250, 1, // 3092: decode to VSCSHP using decoder 250 |
| 4608 | // 3092: } |
| 4609 | 125, 19, // 3097: case 0x7d: { |
| 4610 | OPC_CheckPredicate, 37, // 3099: check predicate 37 |
| 4611 | OPC_CheckField, 24, 4, 0, // 3101: check Inst[27:24] == 0x0 |
| 4612 | OPC_CheckField, 12, 8, 0, // 3105: check Inst[19:12] == 0x0 |
| 4613 | OPC_CheckField, 8, 1, 0, // 3109: check Inst[8] == 0x0 |
| 4614 | OPC_Decode, 145, 20, 246, 1, // 3113: decode to VCSPH using decoder 246 |
| 4615 | // 3113: } |
| 4616 | 126, 15, // 3118: case 0x7e: { |
| 4617 | OPC_CheckPredicate, 34, // 3120: check predicate 34 |
| 4618 | OPC_CheckField, 24, 4, 0, // 3122: check Inst[27:24] == 0x0 |
| 4619 | OPC_CheckField, 8, 1, 0, // 3126: check Inst[8] == 0x0 |
| 4620 | OPC_Decode, 129, 24, 245, 1, // 3130: decode to VSDP using decoder 245 |
| 4621 | // 3130: } |
| 4622 | 127, 0, // 3135: case 0x7f: { |
| 4623 | OPC_CheckPredicate, 35, // 3137: check predicate 35 |
| 4624 | OPC_CheckField, 36, 4, 0, // 3139: check Inst[39:36] == 0x0 |
| 4625 | OPC_CheckField, 11, 1, 0, // 3143: check Inst[11] == 0x0 |
| 4626 | OPC_CheckField, 8, 1, 0, // 3147: check Inst[8] == 0x0 |
| 4627 | OPC_Decode, 206, 24, 251, 1, // 3151: decode to VTZ using decoder 251 |
| 4628 | // 3151: } |
| 4629 | // 3151: } // switch Inst[7:0] |
| 4630 | // 3151: } |
| 4631 | 231, 1, 244, 67, // 3156: case 0xe7: { |
| 4632 | OPC_SwitchField, 0, 8, // 3160: switch Inst[7:0] { |
| 4633 | 0, 11, // 3163: case 0x0: { |
| 4634 | OPC_CheckPredicate, 39, // 3165: check predicate 39 |
| 4635 | OPC_CheckField, 8, 3, 0, // 3167: check Inst[10:8] == 0x0 |
| 4636 | OPC_Decode, 140, 22, 252, 1, // 3171: decode to VLEB using decoder 252 |
| 4637 | // 3171: } |
| 4638 | 1, 11, // 3176: case 0x1: { |
| 4639 | OPC_CheckPredicate, 39, // 3178: check predicate 39 |
| 4640 | OPC_CheckField, 8, 3, 0, // 3180: check Inst[10:8] == 0x0 |
| 4641 | OPC_Decode, 148, 22, 222, 1, // 3184: decode to VLEH using decoder 222 |
| 4642 | // 3184: } |
| 4643 | 2, 11, // 3189: case 0x2: { |
| 4644 | OPC_CheckPredicate, 39, // 3191: check predicate 39 |
| 4645 | OPC_CheckField, 8, 3, 0, // 3193: check Inst[10:8] == 0x0 |
| 4646 | OPC_Decode, 147, 22, 223, 1, // 3197: decode to VLEG using decoder 223 |
| 4647 | // 3197: } |
| 4648 | 3, 11, // 3202: case 0x3: { |
| 4649 | OPC_CheckPredicate, 39, // 3204: check predicate 39 |
| 4650 | OPC_CheckField, 8, 3, 0, // 3206: check Inst[10:8] == 0x0 |
| 4651 | OPC_Decode, 146, 22, 224, 1, // 3210: decode to VLEF using decoder 224 |
| 4652 | // 3210: } |
| 4653 | 4, 61, // 3215: case 0x4: { |
| 4654 | OPC_CheckField, 8, 3, 0, // 3217: check Inst[10:8] == 0x0 |
| 4655 | OPC_Scope, 48, // 3221: try { |
| 4656 | OPC_SwitchField, 12, 4, // 3223: switch Inst[15:12] { |
| 4657 | 0, 7, // 3226: case 0x0: { |
| 4658 | OPC_CheckPredicate, 39, // 3228: check predicate 39 |
| 4659 | OPC_Decode, 170, 22, 225, 1, // 3230: decode to VLLEZB using decoder 225 |
| 4660 | // 3230: } |
| 4661 | 1, 7, // 3235: case 0x1: { |
| 4662 | OPC_CheckPredicate, 39, // 3237: check predicate 39 |
| 4663 | OPC_Decode, 173, 22, 225, 1, // 3239: decode to VLLEZH using decoder 225 |
| 4664 | // 3239: } |
| 4665 | 2, 7, // 3244: case 0x2: { |
| 4666 | OPC_CheckPredicate, 39, // 3246: check predicate 39 |
| 4667 | OPC_Decode, 171, 22, 225, 1, // 3248: decode to VLLEZF using decoder 225 |
| 4668 | // 3248: } |
| 4669 | 3, 7, // 3253: case 0x3: { |
| 4670 | OPC_CheckPredicate, 39, // 3255: check predicate 39 |
| 4671 | OPC_Decode, 172, 22, 225, 1, // 3257: decode to VLLEZG using decoder 225 |
| 4672 | // 3257: } |
| 4673 | 6, 0, // 3262: case 0x6: { |
| 4674 | OPC_CheckPredicate, 40, // 3264: check predicate 40 |
| 4675 | OPC_Decode, 174, 22, 225, 1, // 3266: decode to VLLEZLF using decoder 225 |
| 4676 | // 3266: } |
| 4677 | // 3266: } // switch Inst[15:12] |
| 4678 | // 3266: } else try { |
| 4679 | OPC_CheckPredicate, 39, // 3271: check predicate 39 |
| 4680 | OPC_Decode, 169, 22, 226, 1, // 3273: decode to VLLEZ using decoder 226 |
| 4681 | // 3273: } |
| 4682 | // 3273: } |
| 4683 | 5, 52, // 3278: case 0x5: { |
| 4684 | OPC_CheckField, 8, 3, 0, // 3280: check Inst[10:8] == 0x0 |
| 4685 | OPC_Scope, 39, // 3284: try { |
| 4686 | OPC_SwitchField, 12, 4, // 3286: switch Inst[15:12] { |
| 4687 | 0, 7, // 3289: case 0x0: { |
| 4688 | OPC_CheckPredicate, 39, // 3291: check predicate 39 |
| 4689 | OPC_Decode, 185, 22, 225, 1, // 3293: decode to VLREPB using decoder 225 |
| 4690 | // 3293: } |
| 4691 | 1, 7, // 3298: case 0x1: { |
| 4692 | OPC_CheckPredicate, 39, // 3300: check predicate 39 |
| 4693 | OPC_Decode, 188, 22, 225, 1, // 3302: decode to VLREPH using decoder 225 |
| 4694 | // 3302: } |
| 4695 | 2, 7, // 3307: case 0x2: { |
| 4696 | OPC_CheckPredicate, 39, // 3309: check predicate 39 |
| 4697 | OPC_Decode, 186, 22, 225, 1, // 3311: decode to VLREPF using decoder 225 |
| 4698 | // 3311: } |
| 4699 | 3, 0, // 3316: case 0x3: { |
| 4700 | OPC_CheckPredicate, 39, // 3318: check predicate 39 |
| 4701 | OPC_Decode, 187, 22, 225, 1, // 3320: decode to VLREPG using decoder 225 |
| 4702 | // 3320: } |
| 4703 | // 3320: } // switch Inst[15:12] |
| 4704 | // 3320: } else try { |
| 4705 | OPC_CheckPredicate, 39, // 3325: check predicate 39 |
| 4706 | OPC_Decode, 184, 22, 226, 1, // 3327: decode to VLREP using decoder 226 |
| 4707 | // 3327: } |
| 4708 | // 3327: } |
| 4709 | 6, 24, // 3332: case 0x6: { |
| 4710 | OPC_CheckField, 8, 3, 0, // 3334: check Inst[10:8] == 0x0 |
| 4711 | OPC_Scope, 11, // 3338: try { |
| 4712 | OPC_CheckField, 12, 4, 0, // 3340: check Inst[15:12] == 0x0 |
| 4713 | OPC_CheckPredicate, 39, // 3344: check predicate 39 |
| 4714 | OPC_Decode, 248, 21, 225, 1, // 3346: decode to VL using decoder 225 |
| 4715 | // 3346: } else try { |
| 4716 | OPC_CheckPredicate, 39, // 3351: check predicate 39 |
| 4717 | OPC_Decode, 249, 21, 226, 1, // 3353: decode to VLAlign using decoder 226 |
| 4718 | // 3353: } |
| 4719 | // 3353: } |
| 4720 | 7, 11, // 3358: case 0x7: { |
| 4721 | OPC_CheckPredicate, 39, // 3360: check predicate 39 |
| 4722 | OPC_CheckField, 8, 3, 0, // 3362: check Inst[10:8] == 0x0 |
| 4723 | OPC_Decode, 250, 21, 226, 1, // 3366: decode to VLBB using decoder 226 |
| 4724 | // 3366: } |
| 4725 | 8, 11, // 3371: case 0x8: { |
| 4726 | OPC_CheckPredicate, 39, // 3373: check predicate 39 |
| 4727 | OPC_CheckField, 8, 3, 0, // 3375: check Inst[10:8] == 0x0 |
| 4728 | OPC_Decode, 158, 24, 226, 1, // 3379: decode to VSTEB using decoder 226 |
| 4729 | // 3379: } |
| 4730 | 9, 11, // 3384: case 0x9: { |
| 4731 | OPC_CheckPredicate, 39, // 3386: check predicate 39 |
| 4732 | OPC_CheckField, 8, 3, 0, // 3388: check Inst[10:8] == 0x0 |
| 4733 | OPC_Decode, 164, 24, 227, 1, // 3392: decode to VSTEH using decoder 227 |
| 4734 | // 3392: } |
| 4735 | 10, 11, // 3397: case 0xa: { |
| 4736 | OPC_CheckPredicate, 39, // 3399: check predicate 39 |
| 4737 | OPC_CheckField, 8, 3, 0, // 3401: check Inst[10:8] == 0x0 |
| 4738 | OPC_Decode, 163, 24, 228, 1, // 3405: decode to VSTEG using decoder 228 |
| 4739 | // 3405: } |
| 4740 | 11, 11, // 3410: case 0xb: { |
| 4741 | OPC_CheckPredicate, 39, // 3412: check predicate 39 |
| 4742 | OPC_CheckField, 8, 3, 0, // 3414: check Inst[10:8] == 0x0 |
| 4743 | OPC_Decode, 162, 24, 229, 1, // 3418: decode to VSTEF using decoder 229 |
| 4744 | // 3418: } |
| 4745 | 14, 24, // 3423: case 0xe: { |
| 4746 | OPC_CheckField, 8, 3, 0, // 3425: check Inst[10:8] == 0x0 |
| 4747 | OPC_Scope, 11, // 3429: try { |
| 4748 | OPC_CheckField, 12, 4, 0, // 3431: check Inst[15:12] == 0x0 |
| 4749 | OPC_CheckPredicate, 39, // 3435: check predicate 39 |
| 4750 | OPC_Decode, 151, 24, 225, 1, // 3437: decode to VST using decoder 225 |
| 4751 | // 3437: } else try { |
| 4752 | OPC_CheckPredicate, 39, // 3442: check predicate 39 |
| 4753 | OPC_Decode, 152, 24, 226, 1, // 3444: decode to VSTAlign using decoder 226 |
| 4754 | // 3444: } |
| 4755 | // 3444: } |
| 4756 | 18, 11, // 3449: case 0x12: { |
| 4757 | OPC_CheckPredicate, 39, // 3451: check predicate 39 |
| 4758 | OPC_CheckField, 8, 2, 0, // 3453: check Inst[9:8] == 0x0 |
| 4759 | OPC_Decode, 219, 21, 253, 1, // 3457: decode to VGEG using decoder 253 |
| 4760 | // 3457: } |
| 4761 | 19, 11, // 3462: case 0x13: { |
| 4762 | OPC_CheckPredicate, 39, // 3464: check predicate 39 |
| 4763 | OPC_CheckField, 8, 2, 0, // 3466: check Inst[9:8] == 0x0 |
| 4764 | OPC_Decode, 218, 21, 254, 1, // 3470: decode to VGEF using decoder 254 |
| 4765 | // 3470: } |
| 4766 | 26, 11, // 3475: case 0x1a: { |
| 4767 | OPC_CheckPredicate, 39, // 3477: check predicate 39 |
| 4768 | OPC_CheckField, 8, 2, 0, // 3479: check Inst[9:8] == 0x0 |
| 4769 | OPC_Decode, 251, 23, 255, 1, // 3483: decode to VSCEG using decoder 255 |
| 4770 | // 3483: } |
| 4771 | 27, 11, // 3488: case 0x1b: { |
| 4772 | OPC_CheckPredicate, 39, // 3490: check predicate 39 |
| 4773 | OPC_CheckField, 8, 2, 0, // 3492: check Inst[9:8] == 0x0 |
| 4774 | OPC_Decode, 250, 23, 128, 2, // 3496: decode to VSCEF using decoder 256 |
| 4775 | // 3496: } |
| 4776 | 33, 56, // 3501: case 0x21: { |
| 4777 | OPC_CheckField, 8, 2, 0, // 3503: check Inst[9:8] == 0x0 |
| 4778 | OPC_CheckField, 11, 1, 0, // 3507: check Inst[11] == 0x0 |
| 4779 | OPC_Scope, 39, // 3511: try { |
| 4780 | OPC_SwitchField, 12, 4, // 3513: switch Inst[15:12] { |
| 4781 | 0, 7, // 3516: case 0x0: { |
| 4782 | OPC_CheckPredicate, 39, // 3518: check predicate 39 |
| 4783 | OPC_Decode, 158, 22, 129, 2, // 3520: decode to VLGVB using decoder 257 |
| 4784 | // 3520: } |
| 4785 | 1, 7, // 3525: case 0x1: { |
| 4786 | OPC_CheckPredicate, 39, // 3527: check predicate 39 |
| 4787 | OPC_Decode, 161, 22, 129, 2, // 3529: decode to VLGVH using decoder 257 |
| 4788 | // 3529: } |
| 4789 | 2, 7, // 3534: case 0x2: { |
| 4790 | OPC_CheckPredicate, 39, // 3536: check predicate 39 |
| 4791 | OPC_Decode, 159, 22, 129, 2, // 3538: decode to VLGVF using decoder 257 |
| 4792 | // 3538: } |
| 4793 | 3, 0, // 3543: case 0x3: { |
| 4794 | OPC_CheckPredicate, 39, // 3545: check predicate 39 |
| 4795 | OPC_Decode, 160, 22, 129, 2, // 3547: decode to VLGVG using decoder 257 |
| 4796 | // 3547: } |
| 4797 | // 3547: } // switch Inst[15:12] |
| 4798 | // 3547: } else try { |
| 4799 | OPC_CheckPredicate, 39, // 3552: check predicate 39 |
| 4800 | OPC_Decode, 157, 22, 130, 2, // 3554: decode to VLGV using decoder 258 |
| 4801 | // 3554: } |
| 4802 | // 3554: } |
| 4803 | 34, 52, // 3559: case 0x22: { |
| 4804 | OPC_CheckField, 8, 3, 0, // 3561: check Inst[10:8] == 0x0 |
| 4805 | OPC_Scope, 39, // 3565: try { |
| 4806 | OPC_SwitchField, 12, 4, // 3567: switch Inst[15:12] { |
| 4807 | 0, 7, // 3570: case 0x0: { |
| 4808 | OPC_CheckPredicate, 39, // 3572: check predicate 39 |
| 4809 | OPC_Decode, 192, 22, 131, 2, // 3574: decode to VLVGB using decoder 259 |
| 4810 | // 3574: } |
| 4811 | 1, 7, // 3579: case 0x1: { |
| 4812 | OPC_CheckPredicate, 39, // 3581: check predicate 39 |
| 4813 | OPC_Decode, 195, 22, 131, 2, // 3583: decode to VLVGH using decoder 259 |
| 4814 | // 3583: } |
| 4815 | 2, 7, // 3588: case 0x2: { |
| 4816 | OPC_CheckPredicate, 39, // 3590: check predicate 39 |
| 4817 | OPC_Decode, 193, 22, 131, 2, // 3592: decode to VLVGF using decoder 259 |
| 4818 | // 3592: } |
| 4819 | 3, 0, // 3597: case 0x3: { |
| 4820 | OPC_CheckPredicate, 39, // 3599: check predicate 39 |
| 4821 | OPC_Decode, 194, 22, 132, 2, // 3601: decode to VLVGG using decoder 260 |
| 4822 | // 3601: } |
| 4823 | // 3601: } // switch Inst[15:12] |
| 4824 | // 3601: } else try { |
| 4825 | OPC_CheckPredicate, 39, // 3606: check predicate 39 |
| 4826 | OPC_Decode, 191, 22, 133, 2, // 3608: decode to VLVG using decoder 261 |
| 4827 | // 3608: } |
| 4828 | // 3608: } |
| 4829 | 39, 11, // 3613: case 0x27: { |
| 4830 | OPC_CheckPredicate, 39, // 3615: check predicate 39 |
| 4831 | OPC_CheckField, 8, 4, 0, // 3617: check Inst[11:8] == 0x0 |
| 4832 | OPC_Decode, 229, 11, 134, 2, // 3621: decode to LCBB using decoder 262 |
| 4833 | // 3621: } |
| 4834 | 48, 52, // 3626: case 0x30: { |
| 4835 | OPC_CheckField, 8, 2, 0, // 3628: check Inst[9:8] == 0x0 |
| 4836 | OPC_Scope, 39, // 3632: try { |
| 4837 | OPC_SwitchField, 12, 4, // 3634: switch Inst[15:12] { |
| 4838 | 0, 7, // 3637: case 0x0: { |
| 4839 | OPC_CheckPredicate, 39, // 3639: check predicate 39 |
| 4840 | OPC_Decode, 197, 20, 135, 2, // 3641: decode to VESLB using decoder 263 |
| 4841 | // 3641: } |
| 4842 | 1, 7, // 3646: case 0x1: { |
| 4843 | OPC_CheckPredicate, 39, // 3648: check predicate 39 |
| 4844 | OPC_Decode, 200, 20, 135, 2, // 3650: decode to VESLH using decoder 263 |
| 4845 | // 3650: } |
| 4846 | 2, 7, // 3655: case 0x2: { |
| 4847 | OPC_CheckPredicate, 39, // 3657: check predicate 39 |
| 4848 | OPC_Decode, 198, 20, 135, 2, // 3659: decode to VESLF using decoder 263 |
| 4849 | // 3659: } |
| 4850 | 3, 0, // 3664: case 0x3: { |
| 4851 | OPC_CheckPredicate, 39, // 3666: check predicate 39 |
| 4852 | OPC_Decode, 199, 20, 135, 2, // 3668: decode to VESLG using decoder 263 |
| 4853 | // 3668: } |
| 4854 | // 3668: } // switch Inst[15:12] |
| 4855 | // 3668: } else try { |
| 4856 | OPC_CheckPredicate, 39, // 3673: check predicate 39 |
| 4857 | OPC_Decode, 196, 20, 136, 2, // 3675: decode to VESL using decoder 264 |
| 4858 | // 3675: } |
| 4859 | // 3675: } |
| 4860 | 51, 52, // 3680: case 0x33: { |
| 4861 | OPC_CheckField, 8, 2, 0, // 3682: check Inst[9:8] == 0x0 |
| 4862 | OPC_Scope, 39, // 3686: try { |
| 4863 | OPC_SwitchField, 12, 4, // 3688: switch Inst[15:12] { |
| 4864 | 0, 7, // 3691: case 0x0: { |
| 4865 | OPC_CheckPredicate, 39, // 3693: check predicate 39 |
| 4866 | OPC_Decode, 187, 20, 135, 2, // 3695: decode to VERLLB using decoder 263 |
| 4867 | // 3695: } |
| 4868 | 1, 7, // 3700: case 0x1: { |
| 4869 | OPC_CheckPredicate, 39, // 3702: check predicate 39 |
| 4870 | OPC_Decode, 190, 20, 135, 2, // 3704: decode to VERLLH using decoder 263 |
| 4871 | // 3704: } |
| 4872 | 2, 7, // 3709: case 0x2: { |
| 4873 | OPC_CheckPredicate, 39, // 3711: check predicate 39 |
| 4874 | OPC_Decode, 188, 20, 135, 2, // 3713: decode to VERLLF using decoder 263 |
| 4875 | // 3713: } |
| 4876 | 3, 0, // 3718: case 0x3: { |
| 4877 | OPC_CheckPredicate, 39, // 3720: check predicate 39 |
| 4878 | OPC_Decode, 189, 20, 135, 2, // 3722: decode to VERLLG using decoder 263 |
| 4879 | // 3722: } |
| 4880 | // 3722: } // switch Inst[15:12] |
| 4881 | // 3722: } else try { |
| 4882 | OPC_CheckPredicate, 39, // 3727: check predicate 39 |
| 4883 | OPC_Decode, 186, 20, 136, 2, // 3729: decode to VERLL using decoder 264 |
| 4884 | // 3729: } |
| 4885 | // 3729: } |
| 4886 | 54, 24, // 3734: case 0x36: { |
| 4887 | OPC_CheckField, 8, 2, 0, // 3736: check Inst[9:8] == 0x0 |
| 4888 | OPC_Scope, 11, // 3740: try { |
| 4889 | OPC_CheckField, 12, 4, 0, // 3742: check Inst[15:12] == 0x0 |
| 4890 | OPC_CheckPredicate, 39, // 3746: check predicate 39 |
| 4891 | OPC_Decode, 175, 22, 137, 2, // 3748: decode to VLM using decoder 265 |
| 4892 | // 3748: } else try { |
| 4893 | OPC_CheckPredicate, 39, // 3753: check predicate 39 |
| 4894 | OPC_Decode, 176, 22, 138, 2, // 3755: decode to VLMAlign using decoder 266 |
| 4895 | // 3755: } |
| 4896 | // 3755: } |
| 4897 | 55, 15, // 3760: case 0x37: { |
| 4898 | OPC_CheckPredicate, 39, // 3762: check predicate 39 |
| 4899 | OPC_CheckField, 12, 4, 0, // 3764: check Inst[15:12] == 0x0 |
| 4900 | OPC_CheckField, 8, 3, 0, // 3768: check Inst[10:8] == 0x0 |
| 4901 | OPC_Decode, 163, 22, 139, 2, // 3772: decode to VLL using decoder 267 |
| 4902 | // 3772: } |
| 4903 | 56, 52, // 3777: case 0x38: { |
| 4904 | OPC_CheckField, 8, 2, 0, // 3779: check Inst[9:8] == 0x0 |
| 4905 | OPC_Scope, 39, // 3783: try { |
| 4906 | OPC_SwitchField, 12, 4, // 3785: switch Inst[15:12] { |
| 4907 | 0, 7, // 3788: case 0x0: { |
| 4908 | OPC_CheckPredicate, 39, // 3790: check predicate 39 |
| 4909 | OPC_Decode, 217, 20, 135, 2, // 3792: decode to VESRLB using decoder 263 |
| 4910 | // 3792: } |
| 4911 | 1, 7, // 3797: case 0x1: { |
| 4912 | OPC_CheckPredicate, 39, // 3799: check predicate 39 |
| 4913 | OPC_Decode, 220, 20, 135, 2, // 3801: decode to VESRLH using decoder 263 |
| 4914 | // 3801: } |
| 4915 | 2, 7, // 3806: case 0x2: { |
| 4916 | OPC_CheckPredicate, 39, // 3808: check predicate 39 |
| 4917 | OPC_Decode, 218, 20, 135, 2, // 3810: decode to VESRLF using decoder 263 |
| 4918 | // 3810: } |
| 4919 | 3, 0, // 3815: case 0x3: { |
| 4920 | OPC_CheckPredicate, 39, // 3817: check predicate 39 |
| 4921 | OPC_Decode, 219, 20, 135, 2, // 3819: decode to VESRLG using decoder 263 |
| 4922 | // 3819: } |
| 4923 | // 3819: } // switch Inst[15:12] |
| 4924 | // 3819: } else try { |
| 4925 | OPC_CheckPredicate, 39, // 3824: check predicate 39 |
| 4926 | OPC_Decode, 216, 20, 136, 2, // 3826: decode to VESRL using decoder 264 |
| 4927 | // 3826: } |
| 4928 | // 3826: } |
| 4929 | 58, 52, // 3831: case 0x3a: { |
| 4930 | OPC_CheckField, 8, 2, 0, // 3833: check Inst[9:8] == 0x0 |
| 4931 | OPC_Scope, 39, // 3837: try { |
| 4932 | OPC_SwitchField, 12, 4, // 3839: switch Inst[15:12] { |
| 4933 | 0, 7, // 3842: case 0x0: { |
| 4934 | OPC_CheckPredicate, 39, // 3844: check predicate 39 |
| 4935 | OPC_Decode, 207, 20, 135, 2, // 3846: decode to VESRAB using decoder 263 |
| 4936 | // 3846: } |
| 4937 | 1, 7, // 3851: case 0x1: { |
| 4938 | OPC_CheckPredicate, 39, // 3853: check predicate 39 |
| 4939 | OPC_Decode, 210, 20, 135, 2, // 3855: decode to VESRAH using decoder 263 |
| 4940 | // 3855: } |
| 4941 | 2, 7, // 3860: case 0x2: { |
| 4942 | OPC_CheckPredicate, 39, // 3862: check predicate 39 |
| 4943 | OPC_Decode, 208, 20, 135, 2, // 3864: decode to VESRAF using decoder 263 |
| 4944 | // 3864: } |
| 4945 | 3, 0, // 3869: case 0x3: { |
| 4946 | OPC_CheckPredicate, 39, // 3871: check predicate 39 |
| 4947 | OPC_Decode, 209, 20, 135, 2, // 3873: decode to VESRAG using decoder 263 |
| 4948 | // 3873: } |
| 4949 | // 3873: } // switch Inst[15:12] |
| 4950 | // 3873: } else try { |
| 4951 | OPC_CheckPredicate, 39, // 3878: check predicate 39 |
| 4952 | OPC_Decode, 206, 20, 136, 2, // 3880: decode to VESRA using decoder 264 |
| 4953 | // 3880: } |
| 4954 | // 3880: } |
| 4955 | 62, 24, // 3885: case 0x3e: { |
| 4956 | OPC_CheckField, 8, 2, 0, // 3887: check Inst[9:8] == 0x0 |
| 4957 | OPC_Scope, 11, // 3891: try { |
| 4958 | OPC_CheckField, 12, 4, 0, // 3893: check Inst[15:12] == 0x0 |
| 4959 | OPC_CheckPredicate, 39, // 3897: check predicate 39 |
| 4960 | OPC_Decode, 170, 24, 137, 2, // 3899: decode to VSTM using decoder 265 |
| 4961 | // 3899: } else try { |
| 4962 | OPC_CheckPredicate, 39, // 3904: check predicate 39 |
| 4963 | OPC_Decode, 171, 24, 138, 2, // 3906: decode to VSTMAlign using decoder 266 |
| 4964 | // 3906: } |
| 4965 | // 3906: } |
| 4966 | 63, 15, // 3911: case 0x3f: { |
| 4967 | OPC_CheckPredicate, 39, // 3913: check predicate 39 |
| 4968 | OPC_CheckField, 12, 4, 0, // 3915: check Inst[15:12] == 0x0 |
| 4969 | OPC_CheckField, 8, 3, 0, // 3919: check Inst[10:8] == 0x0 |
| 4970 | OPC_Decode, 169, 24, 139, 2, // 3923: decode to VSTL using decoder 267 |
| 4971 | // 3923: } |
| 4972 | 64, 15, // 3928: case 0x40: { |
| 4973 | OPC_CheckPredicate, 39, // 3930: check predicate 39 |
| 4974 | OPC_CheckField, 32, 4, 0, // 3932: check Inst[35:32] == 0x0 |
| 4975 | OPC_CheckField, 8, 3, 0, // 3936: check Inst[10:8] == 0x0 |
| 4976 | OPC_Decode, 149, 22, 140, 2, // 3940: decode to VLEIB using decoder 268 |
| 4977 | // 3940: } |
| 4978 | 65, 15, // 3945: case 0x41: { |
| 4979 | OPC_CheckPredicate, 39, // 3947: check predicate 39 |
| 4980 | OPC_CheckField, 32, 4, 0, // 3949: check Inst[35:32] == 0x0 |
| 4981 | OPC_CheckField, 8, 3, 0, // 3953: check Inst[10:8] == 0x0 |
| 4982 | OPC_Decode, 152, 22, 141, 2, // 3957: decode to VLEIH using decoder 269 |
| 4983 | // 3957: } |
| 4984 | 66, 15, // 3962: case 0x42: { |
| 4985 | OPC_CheckPredicate, 39, // 3964: check predicate 39 |
| 4986 | OPC_CheckField, 32, 4, 0, // 3966: check Inst[35:32] == 0x0 |
| 4987 | OPC_CheckField, 8, 3, 0, // 3970: check Inst[10:8] == 0x0 |
| 4988 | OPC_Decode, 151, 22, 142, 2, // 3974: decode to VLEIG using decoder 270 |
| 4989 | // 3974: } |
| 4990 | 67, 15, // 3979: case 0x43: { |
| 4991 | OPC_CheckPredicate, 39, // 3981: check predicate 39 |
| 4992 | OPC_CheckField, 32, 4, 0, // 3983: check Inst[35:32] == 0x0 |
| 4993 | OPC_CheckField, 8, 3, 0, // 3987: check Inst[10:8] == 0x0 |
| 4994 | OPC_Decode, 150, 22, 143, 2, // 3991: decode to VLEIF using decoder 271 |
| 4995 | // 3991: } |
| 4996 | 68, 44, // 3996: case 0x44: { |
| 4997 | OPC_CheckField, 8, 3, 0, // 3998: check Inst[10:8] == 0x0 |
| 4998 | OPC_CheckField, 12, 4, 0, // 4002: check Inst[15:12] == 0x0 |
| 4999 | OPC_CheckField, 32, 4, 0, // 4006: check Inst[35:32] == 0x0 |
| 5000 | OPC_Scope, 23, // 4010: try { |
| 5001 | OPC_SwitchField, 16, 16, // 4012: switch Inst[31:16] { |
| 5002 | 0, 7, // 4015: case 0x0: { |
| 5003 | OPC_CheckPredicate, 39, // 4017: check predicate 39 |
| 5004 | OPC_Decode, 231, 24, 144, 2, // 4019: decode to VZERO using decoder 272 |
| 5005 | // 4019: } |
| 5006 | 255, 255, 3, 0, // 4024: case 0xffff: { |
| 5007 | OPC_CheckPredicate, 39, // 4028: check predicate 39 |
| 5008 | OPC_Decode, 190, 23, 144, 2, // 4030: decode to VONE using decoder 272 |
| 5009 | // 4030: } |
| 5010 | // 4030: } // switch Inst[31:16] |
| 5011 | // 4030: } else try { |
| 5012 | OPC_CheckPredicate, 39, // 4035: check predicate 39 |
| 5013 | OPC_Decode, 217, 21, 145, 2, // 4037: decode to VGBM using decoder 273 |
| 5014 | // 4037: } |
| 5015 | // 4037: } |
| 5016 | 69, 56, // 4042: case 0x45: { |
| 5017 | OPC_CheckField, 8, 3, 0, // 4044: check Inst[10:8] == 0x0 |
| 5018 | OPC_CheckField, 32, 4, 0, // 4048: check Inst[35:32] == 0x0 |
| 5019 | OPC_Scope, 39, // 4052: try { |
| 5020 | OPC_SwitchField, 12, 4, // 4054: switch Inst[15:12] { |
| 5021 | 0, 7, // 4057: case 0x0: { |
| 5022 | OPC_CheckPredicate, 39, // 4059: check predicate 39 |
| 5023 | OPC_Decode, 226, 23, 146, 2, // 4061: decode to VREPIB using decoder 274 |
| 5024 | // 4061: } |
| 5025 | 1, 7, // 4066: case 0x1: { |
| 5026 | OPC_CheckPredicate, 39, // 4068: check predicate 39 |
| 5027 | OPC_Decode, 229, 23, 146, 2, // 4070: decode to VREPIH using decoder 274 |
| 5028 | // 4070: } |
| 5029 | 2, 7, // 4075: case 0x2: { |
| 5030 | OPC_CheckPredicate, 39, // 4077: check predicate 39 |
| 5031 | OPC_Decode, 227, 23, 146, 2, // 4079: decode to VREPIF using decoder 274 |
| 5032 | // 4079: } |
| 5033 | 3, 0, // 4084: case 0x3: { |
| 5034 | OPC_CheckPredicate, 39, // 4086: check predicate 39 |
| 5035 | OPC_Decode, 228, 23, 146, 2, // 4088: decode to VREPIG using decoder 274 |
| 5036 | // 4088: } |
| 5037 | // 4088: } // switch Inst[15:12] |
| 5038 | // 4088: } else try { |
| 5039 | OPC_CheckPredicate, 39, // 4093: check predicate 39 |
| 5040 | OPC_Decode, 225, 23, 147, 2, // 4095: decode to VREPI using decoder 275 |
| 5041 | // 4095: } |
| 5042 | // 4095: } |
| 5043 | 70, 56, // 4100: case 0x46: { |
| 5044 | OPC_CheckField, 8, 3, 0, // 4102: check Inst[10:8] == 0x0 |
| 5045 | OPC_CheckField, 32, 4, 0, // 4106: check Inst[35:32] == 0x0 |
| 5046 | OPC_Scope, 39, // 4110: try { |
| 5047 | OPC_SwitchField, 12, 4, // 4112: switch Inst[15:12] { |
| 5048 | 0, 7, // 4115: case 0x0: { |
| 5049 | OPC_CheckPredicate, 39, // 4117: check predicate 39 |
| 5050 | OPC_Decode, 237, 21, 148, 2, // 4119: decode to VGMB using decoder 276 |
| 5051 | // 4119: } |
| 5052 | 1, 7, // 4124: case 0x1: { |
| 5053 | OPC_CheckPredicate, 39, // 4126: check predicate 39 |
| 5054 | OPC_Decode, 240, 21, 148, 2, // 4128: decode to VGMH using decoder 276 |
| 5055 | // 4128: } |
| 5056 | 2, 7, // 4133: case 0x2: { |
| 5057 | OPC_CheckPredicate, 39, // 4135: check predicate 39 |
| 5058 | OPC_Decode, 238, 21, 148, 2, // 4137: decode to VGMF using decoder 276 |
| 5059 | // 4137: } |
| 5060 | 3, 0, // 4142: case 0x3: { |
| 5061 | OPC_CheckPredicate, 39, // 4144: check predicate 39 |
| 5062 | OPC_Decode, 239, 21, 148, 2, // 4146: decode to VGMG using decoder 276 |
| 5063 | // 4146: } |
| 5064 | // 4146: } // switch Inst[15:12] |
| 5065 | // 4146: } else try { |
| 5066 | OPC_CheckPredicate, 39, // 4151: check predicate 39 |
| 5067 | OPC_Decode, 236, 21, 149, 2, // 4153: decode to VGM using decoder 277 |
| 5068 | // 4153: } |
| 5069 | // 4153: } |
| 5070 | 74, 64, // 4158: case 0x4a: { |
| 5071 | OPC_CheckField, 8, 2, 0, // 4160: check Inst[9:8] == 0x0 |
| 5072 | OPC_Scope, 51, // 4164: try { |
| 5073 | OPC_SwitchField, 12, 8, // 4166: switch Inst[19:12] { |
| 5074 | 2, 7, // 4169: case 0x2: { |
| 5075 | OPC_CheckPredicate, 40, // 4171: check predicate 40 |
| 5076 | OPC_Decode, 216, 21, 150, 2, // 4173: decode to VFTCISB using decoder 278 |
| 5077 | // 4173: } |
| 5078 | 3, 7, // 4178: case 0x3: { |
| 5079 | OPC_CheckPredicate, 39, // 4180: check predicate 39 |
| 5080 | OPC_Decode, 215, 21, 150, 2, // 4182: decode to VFTCIDB using decoder 278 |
| 5081 | // 4182: } |
| 5082 | 130, 1, 7, // 4187: case 0x82: { |
| 5083 | OPC_CheckPredicate, 40, // 4190: check predicate 40 |
| 5084 | OPC_Decode, 209, 25, 151, 2, // 4192: decode to WFTCISB using decoder 279 |
| 5085 | // 4192: } |
| 5086 | 131, 1, 7, // 4197: case 0x83: { |
| 5087 | OPC_CheckPredicate, 39, // 4200: check predicate 39 |
| 5088 | OPC_Decode, 208, 25, 152, 2, // 4202: decode to WFTCIDB using decoder 280 |
| 5089 | // 4202: } |
| 5090 | 132, 1, 0, // 4207: case 0x84: { |
| 5091 | OPC_CheckPredicate, 40, // 4210: check predicate 40 |
| 5092 | OPC_Decode, 210, 25, 150, 2, // 4212: decode to WFTCIXB using decoder 278 |
| 5093 | // 4212: } |
| 5094 | // 4212: } // switch Inst[19:12] |
| 5095 | // 4212: } else try { |
| 5096 | OPC_CheckPredicate, 39, // 4217: check predicate 39 |
| 5097 | OPC_Decode, 214, 21, 153, 2, // 4219: decode to VFTCI using decoder 281 |
| 5098 | // 4219: } |
| 5099 | // 4219: } |
| 5100 | 77, 52, // 4224: case 0x4d: { |
| 5101 | OPC_CheckField, 8, 2, 0, // 4226: check Inst[9:8] == 0x0 |
| 5102 | OPC_Scope, 39, // 4230: try { |
| 5103 | OPC_SwitchField, 12, 4, // 4232: switch Inst[15:12] { |
| 5104 | 0, 7, // 4235: case 0x0: { |
| 5105 | OPC_CheckPredicate, 39, // 4237: check predicate 39 |
| 5106 | OPC_Decode, 221, 23, 154, 2, // 4239: decode to VREPB using decoder 282 |
| 5107 | // 4239: } |
| 5108 | 1, 7, // 4244: case 0x1: { |
| 5109 | OPC_CheckPredicate, 39, // 4246: check predicate 39 |
| 5110 | OPC_Decode, 224, 23, 154, 2, // 4248: decode to VREPH using decoder 282 |
| 5111 | // 4248: } |
| 5112 | 2, 7, // 4253: case 0x2: { |
| 5113 | OPC_CheckPredicate, 39, // 4255: check predicate 39 |
| 5114 | OPC_Decode, 222, 23, 154, 2, // 4257: decode to VREPF using decoder 282 |
| 5115 | // 4257: } |
| 5116 | 3, 0, // 4262: case 0x3: { |
| 5117 | OPC_CheckPredicate, 39, // 4264: check predicate 39 |
| 5118 | OPC_Decode, 223, 23, 154, 2, // 4266: decode to VREPG using decoder 282 |
| 5119 | // 4266: } |
| 5120 | // 4266: } // switch Inst[15:12] |
| 5121 | // 4266: } else try { |
| 5122 | OPC_CheckPredicate, 39, // 4271: check predicate 39 |
| 5123 | OPC_Decode, 220, 23, 155, 2, // 4273: decode to VREP using decoder 283 |
| 5124 | // 4273: } |
| 5125 | // 4273: } |
| 5126 | 80, 56, // 4278: case 0x50: { |
| 5127 | OPC_CheckField, 8, 2, 0, // 4280: check Inst[9:8] == 0x0 |
| 5128 | OPC_CheckField, 16, 16, 0, // 4284: check Inst[31:16] == 0x0 |
| 5129 | OPC_Scope, 39, // 4288: try { |
| 5130 | OPC_SwitchField, 12, 4, // 4290: switch Inst[15:12] { |
| 5131 | 0, 7, // 4293: case 0x0: { |
| 5132 | OPC_CheckPredicate, 40, // 4295: check predicate 40 |
| 5133 | OPC_Decode, 214, 23, 156, 2, // 4297: decode to VPOPCTB using decoder 284 |
| 5134 | // 4297: } |
| 5135 | 1, 7, // 4302: case 0x1: { |
| 5136 | OPC_CheckPredicate, 40, // 4304: check predicate 40 |
| 5137 | OPC_Decode, 217, 23, 156, 2, // 4306: decode to VPOPCTH using decoder 284 |
| 5138 | // 4306: } |
| 5139 | 2, 7, // 4311: case 0x2: { |
| 5140 | OPC_CheckPredicate, 40, // 4313: check predicate 40 |
| 5141 | OPC_Decode, 215, 23, 156, 2, // 4315: decode to VPOPCTF using decoder 284 |
| 5142 | // 4315: } |
| 5143 | 3, 0, // 4320: case 0x3: { |
| 5144 | OPC_CheckPredicate, 40, // 4322: check predicate 40 |
| 5145 | OPC_Decode, 216, 23, 156, 2, // 4324: decode to VPOPCTG using decoder 284 |
| 5146 | // 4324: } |
| 5147 | // 4324: } // switch Inst[15:12] |
| 5148 | // 4324: } else try { |
| 5149 | OPC_CheckPredicate, 39, // 4329: check predicate 39 |
| 5150 | OPC_Decode, 213, 23, 157, 2, // 4331: decode to VPOPCT using decoder 285 |
| 5151 | // 4331: } |
| 5152 | // 4331: } |
| 5153 | 82, 65, // 4336: case 0x52: { |
| 5154 | OPC_CheckField, 8, 2, 0, // 4338: check Inst[9:8] == 0x0 |
| 5155 | OPC_CheckField, 16, 16, 0, // 4342: check Inst[31:16] == 0x0 |
| 5156 | OPC_Scope, 48, // 4346: try { |
| 5157 | OPC_SwitchField, 12, 4, // 4348: switch Inst[15:12] { |
| 5158 | 0, 7, // 4351: case 0x0: { |
| 5159 | OPC_CheckPredicate, 39, // 4353: check predicate 39 |
| 5160 | OPC_Decode, 147, 20, 156, 2, // 4355: decode to VCTZB using decoder 284 |
| 5161 | // 4355: } |
| 5162 | 1, 7, // 4360: case 0x1: { |
| 5163 | OPC_CheckPredicate, 39, // 4362: check predicate 39 |
| 5164 | OPC_Decode, 150, 20, 156, 2, // 4364: decode to VCTZH using decoder 284 |
| 5165 | // 4364: } |
| 5166 | 2, 7, // 4369: case 0x2: { |
| 5167 | OPC_CheckPredicate, 39, // 4371: check predicate 39 |
| 5168 | OPC_Decode, 148, 20, 156, 2, // 4373: decode to VCTZF using decoder 284 |
| 5169 | // 4373: } |
| 5170 | 3, 7, // 4378: case 0x3: { |
| 5171 | OPC_CheckPredicate, 39, // 4380: check predicate 39 |
| 5172 | OPC_Decode, 149, 20, 156, 2, // 4382: decode to VCTZG using decoder 284 |
| 5173 | // 4382: } |
| 5174 | 4, 0, // 4387: case 0x4: { |
| 5175 | OPC_CheckPredicate, 41, // 4389: check predicate 41 |
| 5176 | OPC_Decode, 151, 20, 156, 2, // 4391: decode to VCTZQ using decoder 284 |
| 5177 | // 4391: } |
| 5178 | // 4391: } // switch Inst[15:12] |
| 5179 | // 4391: } else try { |
| 5180 | OPC_CheckPredicate, 39, // 4396: check predicate 39 |
| 5181 | OPC_Decode, 146, 20, 157, 2, // 4398: decode to VCTZ using decoder 285 |
| 5182 | // 4398: } |
| 5183 | // 4398: } |
| 5184 | 83, 65, // 4403: case 0x53: { |
| 5185 | OPC_CheckField, 8, 2, 0, // 4405: check Inst[9:8] == 0x0 |
| 5186 | OPC_CheckField, 16, 16, 0, // 4409: check Inst[31:16] == 0x0 |
| 5187 | OPC_Scope, 48, // 4413: try { |
| 5188 | OPC_SwitchField, 12, 4, // 4415: switch Inst[15:12] { |
| 5189 | 0, 7, // 4418: case 0x0: { |
| 5190 | OPC_CheckPredicate, 39, // 4420: check predicate 39 |
| 5191 | OPC_Decode, 135, 20, 156, 2, // 4422: decode to VCLZB using decoder 284 |
| 5192 | // 4422: } |
| 5193 | 1, 7, // 4427: case 0x1: { |
| 5194 | OPC_CheckPredicate, 39, // 4429: check predicate 39 |
| 5195 | OPC_Decode, 139, 20, 156, 2, // 4431: decode to VCLZH using decoder 284 |
| 5196 | // 4431: } |
| 5197 | 2, 7, // 4436: case 0x2: { |
| 5198 | OPC_CheckPredicate, 39, // 4438: check predicate 39 |
| 5199 | OPC_Decode, 137, 20, 156, 2, // 4440: decode to VCLZF using decoder 284 |
| 5200 | // 4440: } |
| 5201 | 3, 7, // 4445: case 0x3: { |
| 5202 | OPC_CheckPredicate, 39, // 4447: check predicate 39 |
| 5203 | OPC_Decode, 138, 20, 156, 2, // 4449: decode to VCLZG using decoder 284 |
| 5204 | // 4449: } |
| 5205 | 4, 0, // 4454: case 0x4: { |
| 5206 | OPC_CheckPredicate, 41, // 4456: check predicate 41 |
| 5207 | OPC_Decode, 140, 20, 156, 2, // 4458: decode to VCLZQ using decoder 284 |
| 5208 | // 4458: } |
| 5209 | // 4458: } // switch Inst[15:12] |
| 5210 | // 4458: } else try { |
| 5211 | OPC_CheckPredicate, 39, // 4463: check predicate 39 |
| 5212 | OPC_Decode, 134, 20, 157, 2, // 4465: decode to VCLZ using decoder 285 |
| 5213 | // 4465: } |
| 5214 | // 4465: } |
| 5215 | 84, 65, // 4470: case 0x54: { |
| 5216 | OPC_CheckField, 8, 2, 0, // 4472: check Inst[9:8] == 0x0 |
| 5217 | OPC_CheckField, 16, 16, 0, // 4476: check Inst[31:16] == 0x0 |
| 5218 | OPC_Scope, 48, // 4480: try { |
| 5219 | OPC_SwitchField, 12, 4, // 4482: switch Inst[15:12] { |
| 5220 | 0, 7, // 4485: case 0x0: { |
| 5221 | OPC_CheckPredicate, 41, // 4487: check predicate 41 |
| 5222 | OPC_Decode, 221, 21, 156, 2, // 4489: decode to VGEMB using decoder 284 |
| 5223 | // 4489: } |
| 5224 | 1, 7, // 4494: case 0x1: { |
| 5225 | OPC_CheckPredicate, 41, // 4496: check predicate 41 |
| 5226 | OPC_Decode, 224, 21, 156, 2, // 4498: decode to VGEMH using decoder 284 |
| 5227 | // 4498: } |
| 5228 | 2, 7, // 4503: case 0x2: { |
| 5229 | OPC_CheckPredicate, 41, // 4505: check predicate 41 |
| 5230 | OPC_Decode, 222, 21, 156, 2, // 4507: decode to VGEMF using decoder 284 |
| 5231 | // 4507: } |
| 5232 | 3, 7, // 4512: case 0x3: { |
| 5233 | OPC_CheckPredicate, 41, // 4514: check predicate 41 |
| 5234 | OPC_Decode, 223, 21, 156, 2, // 4516: decode to VGEMG using decoder 284 |
| 5235 | // 4516: } |
| 5236 | 4, 0, // 4521: case 0x4: { |
| 5237 | OPC_CheckPredicate, 41, // 4523: check predicate 41 |
| 5238 | OPC_Decode, 225, 21, 156, 2, // 4525: decode to VGEMQ using decoder 284 |
| 5239 | // 4525: } |
| 5240 | // 4525: } // switch Inst[15:12] |
| 5241 | // 4525: } else try { |
| 5242 | OPC_CheckPredicate, 41, // 4530: check predicate 41 |
| 5243 | OPC_Decode, 220, 21, 157, 2, // 4532: decode to VGEM using decoder 285 |
| 5244 | // 4532: } |
| 5245 | // 4532: } |
| 5246 | 86, 15, // 4537: case 0x56: { |
| 5247 | OPC_CheckPredicate, 39, // 4539: check predicate 39 |
| 5248 | OPC_CheckField, 12, 20, 0, // 4541: check Inst[31:12] == 0x0 |
| 5249 | OPC_CheckField, 8, 2, 0, // 4545: check Inst[9:8] == 0x0 |
| 5250 | OPC_Decode, 183, 22, 156, 2, // 4549: decode to VLR using decoder 284 |
| 5251 | // 4549: } |
| 5252 | 92, 90, // 4554: case 0x5c: { |
| 5253 | OPC_CheckField, 8, 2, 0, // 4556: check Inst[9:8] == 0x0 |
| 5254 | OPC_CheckField, 16, 4, 0, // 4560: check Inst[19:16] == 0x0 |
| 5255 | OPC_CheckField, 24, 8, 0, // 4564: check Inst[31:24] == 0x0 |
| 5256 | OPC_Scope, 69, // 4568: try { |
| 5257 | OPC_SwitchField, 12, 4, // 4570: switch Inst[15:12] { |
| 5258 | 0, 20, // 4573: case 0x0: { |
| 5259 | OPC_Scope, 11, // 4575: try { |
| 5260 | OPC_CheckField, 20, 4, 1, // 4577: check Inst[23:20] == 0x1 |
| 5261 | OPC_CheckPredicate, 39, // 4581: check predicate 39 |
| 5262 | OPC_Decode, 243, 21, 156, 2, // 4583: decode to VISTRBS using decoder 284 |
| 5263 | // 4583: } else try { |
| 5264 | OPC_CheckPredicate, 39, // 4588: check predicate 39 |
| 5265 | OPC_Decode, 242, 21, 234, 1, // 4590: decode to VISTRB using decoder 234 |
| 5266 | // 4590: } |
| 5267 | // 4590: } |
| 5268 | 1, 20, // 4595: case 0x1: { |
| 5269 | OPC_Scope, 11, // 4597: try { |
| 5270 | OPC_CheckField, 20, 4, 1, // 4599: check Inst[23:20] == 0x1 |
| 5271 | OPC_CheckPredicate, 39, // 4603: check predicate 39 |
| 5272 | OPC_Decode, 247, 21, 156, 2, // 4605: decode to VISTRHS using decoder 284 |
| 5273 | // 4605: } else try { |
| 5274 | OPC_CheckPredicate, 39, // 4610: check predicate 39 |
| 5275 | OPC_Decode, 246, 21, 234, 1, // 4612: decode to VISTRH using decoder 234 |
| 5276 | // 4612: } |
| 5277 | // 4612: } |
| 5278 | 2, 0, // 4617: case 0x2: { |
| 5279 | OPC_Scope, 11, // 4619: try { |
| 5280 | OPC_CheckField, 20, 4, 1, // 4621: check Inst[23:20] == 0x1 |
| 5281 | OPC_CheckPredicate, 39, // 4625: check predicate 39 |
| 5282 | OPC_Decode, 245, 21, 156, 2, // 4627: decode to VISTRFS using decoder 284 |
| 5283 | // 4627: } else try { |
| 5284 | OPC_CheckPredicate, 39, // 4632: check predicate 39 |
| 5285 | OPC_Decode, 244, 21, 234, 1, // 4634: decode to VISTRF using decoder 234 |
| 5286 | // 4634: } |
| 5287 | // 4634: } |
| 5288 | // 4634: } // switch Inst[15:12] |
| 5289 | // 4634: } else try { |
| 5290 | OPC_CheckPredicate, 39, // 4639: check predicate 39 |
| 5291 | OPC_Decode, 241, 21, 158, 2, // 4641: decode to VISTR using decoder 286 |
| 5292 | // 4641: } |
| 5293 | // 4641: } |
| 5294 | 95, 47, // 4646: case 0x5f: { |
| 5295 | OPC_CheckField, 8, 2, 0, // 4648: check Inst[9:8] == 0x0 |
| 5296 | OPC_CheckField, 16, 16, 0, // 4652: check Inst[31:16] == 0x0 |
| 5297 | OPC_Scope, 30, // 4656: try { |
| 5298 | OPC_SwitchField, 12, 4, // 4658: switch Inst[15:12] { |
| 5299 | 0, 7, // 4661: case 0x0: { |
| 5300 | OPC_CheckPredicate, 39, // 4663: check predicate 39 |
| 5301 | OPC_Decode, 131, 24, 156, 2, // 4665: decode to VSEGB using decoder 284 |
| 5302 | // 4665: } |
| 5303 | 1, 7, // 4670: case 0x1: { |
| 5304 | OPC_CheckPredicate, 39, // 4672: check predicate 39 |
| 5305 | OPC_Decode, 133, 24, 156, 2, // 4674: decode to VSEGH using decoder 284 |
| 5306 | // 4674: } |
| 5307 | 2, 0, // 4679: case 0x2: { |
| 5308 | OPC_CheckPredicate, 39, // 4681: check predicate 39 |
| 5309 | OPC_Decode, 132, 24, 156, 2, // 4683: decode to VSEGF using decoder 284 |
| 5310 | // 4683: } |
| 5311 | // 4683: } // switch Inst[15:12] |
| 5312 | // 4683: } else try { |
| 5313 | OPC_CheckPredicate, 39, // 4688: check predicate 39 |
| 5314 | OPC_Decode, 130, 24, 157, 2, // 4690: decode to VSEG using decoder 285 |
| 5315 | // 4690: } |
| 5316 | // 4690: } |
| 5317 | 96, 56, // 4695: case 0x60: { |
| 5318 | OPC_CheckField, 8, 1, 0, // 4697: check Inst[8] == 0x0 |
| 5319 | OPC_CheckField, 16, 12, 0, // 4701: check Inst[27:16] == 0x0 |
| 5320 | OPC_Scope, 39, // 4705: try { |
| 5321 | OPC_SwitchField, 12, 4, // 4707: switch Inst[15:12] { |
| 5322 | 0, 7, // 4710: case 0x0: { |
| 5323 | OPC_CheckPredicate, 39, // 4712: check predicate 39 |
| 5324 | OPC_Decode, 164, 23, 250, 1, // 4714: decode to VMRLB using decoder 250 |
| 5325 | // 4714: } |
| 5326 | 1, 7, // 4719: case 0x1: { |
| 5327 | OPC_CheckPredicate, 39, // 4721: check predicate 39 |
| 5328 | OPC_Decode, 167, 23, 250, 1, // 4723: decode to VMRLH using decoder 250 |
| 5329 | // 4723: } |
| 5330 | 2, 7, // 4728: case 0x2: { |
| 5331 | OPC_CheckPredicate, 39, // 4730: check predicate 39 |
| 5332 | OPC_Decode, 165, 23, 250, 1, // 4732: decode to VMRLF using decoder 250 |
| 5333 | // 4732: } |
| 5334 | 3, 0, // 4737: case 0x3: { |
| 5335 | OPC_CheckPredicate, 39, // 4739: check predicate 39 |
| 5336 | OPC_Decode, 166, 23, 250, 1, // 4741: decode to VMRLG using decoder 250 |
| 5337 | // 4741: } |
| 5338 | // 4741: } // switch Inst[15:12] |
| 5339 | // 4741: } else try { |
| 5340 | OPC_CheckPredicate, 39, // 4746: check predicate 39 |
| 5341 | OPC_Decode, 163, 23, 159, 2, // 4748: decode to VMRL using decoder 287 |
| 5342 | // 4748: } |
| 5343 | // 4748: } |
| 5344 | 97, 56, // 4753: case 0x61: { |
| 5345 | OPC_CheckField, 8, 1, 0, // 4755: check Inst[8] == 0x0 |
| 5346 | OPC_CheckField, 16, 12, 0, // 4759: check Inst[27:16] == 0x0 |
| 5347 | OPC_Scope, 39, // 4763: try { |
| 5348 | OPC_SwitchField, 12, 4, // 4765: switch Inst[15:12] { |
| 5349 | 0, 7, // 4768: case 0x0: { |
| 5350 | OPC_CheckPredicate, 39, // 4770: check predicate 39 |
| 5351 | OPC_Decode, 159, 23, 250, 1, // 4772: decode to VMRHB using decoder 250 |
| 5352 | // 4772: } |
| 5353 | 1, 7, // 4777: case 0x1: { |
| 5354 | OPC_CheckPredicate, 39, // 4779: check predicate 39 |
| 5355 | OPC_Decode, 162, 23, 250, 1, // 4781: decode to VMRHH using decoder 250 |
| 5356 | // 4781: } |
| 5357 | 2, 7, // 4786: case 0x2: { |
| 5358 | OPC_CheckPredicate, 39, // 4788: check predicate 39 |
| 5359 | OPC_Decode, 160, 23, 250, 1, // 4790: decode to VMRHF using decoder 250 |
| 5360 | // 4790: } |
| 5361 | 3, 0, // 4795: case 0x3: { |
| 5362 | OPC_CheckPredicate, 39, // 4797: check predicate 39 |
| 5363 | OPC_Decode, 161, 23, 250, 1, // 4799: decode to VMRHG using decoder 250 |
| 5364 | // 4799: } |
| 5365 | // 4799: } // switch Inst[15:12] |
| 5366 | // 4799: } else try { |
| 5367 | OPC_CheckPredicate, 39, // 4804: check predicate 39 |
| 5368 | OPC_Decode, 158, 23, 159, 2, // 4806: decode to VMRH using decoder 287 |
| 5369 | // 4806: } |
| 5370 | // 4806: } |
| 5371 | 98, 15, // 4811: case 0x62: { |
| 5372 | OPC_CheckPredicate, 39, // 4813: check predicate 39 |
| 5373 | OPC_CheckField, 12, 16, 0, // 4815: check Inst[27:12] == 0x0 |
| 5374 | OPC_CheckField, 8, 3, 0, // 4819: check Inst[10:8] == 0x0 |
| 5375 | OPC_Decode, 196, 22, 160, 2, // 4823: decode to VLVGP using decoder 288 |
| 5376 | // 4823: } |
| 5377 | 100, 38, // 4828: case 0x64: { |
| 5378 | OPC_CheckField, 8, 1, 0, // 4830: check Inst[8] == 0x0 |
| 5379 | OPC_CheckField, 16, 12, 0, // 4834: check Inst[27:16] == 0x0 |
| 5380 | OPC_Scope, 21, // 4838: try { |
| 5381 | OPC_SwitchField, 12, 4, // 4840: switch Inst[15:12] { |
| 5382 | 0, 7, // 4843: case 0x0: { |
| 5383 | OPC_CheckPredicate, 39, // 4845: check predicate 39 |
| 5384 | OPC_Decode, 195, 24, 250, 1, // 4847: decode to VSUMB using decoder 250 |
| 5385 | // 4847: } |
| 5386 | 1, 0, // 4852: case 0x1: { |
| 5387 | OPC_CheckPredicate, 39, // 4854: check predicate 39 |
| 5388 | OPC_Decode, 199, 24, 250, 1, // 4856: decode to VSUMH using decoder 250 |
| 5389 | // 4856: } |
| 5390 | // 4856: } // switch Inst[15:12] |
| 5391 | // 4856: } else try { |
| 5392 | OPC_CheckPredicate, 39, // 4861: check predicate 39 |
| 5393 | OPC_Decode, 194, 24, 159, 2, // 4863: decode to VSUM using decoder 287 |
| 5394 | // 4863: } |
| 5395 | // 4863: } |
| 5396 | 101, 38, // 4868: case 0x65: { |
| 5397 | OPC_CheckField, 8, 1, 0, // 4870: check Inst[8] == 0x0 |
| 5398 | OPC_CheckField, 16, 12, 0, // 4874: check Inst[27:16] == 0x0 |
| 5399 | OPC_Scope, 21, // 4878: try { |
| 5400 | OPC_SwitchField, 12, 4, // 4880: switch Inst[15:12] { |
| 5401 | 1, 7, // 4883: case 0x1: { |
| 5402 | OPC_CheckPredicate, 39, // 4885: check predicate 39 |
| 5403 | OPC_Decode, 198, 24, 250, 1, // 4887: decode to VSUMGH using decoder 250 |
| 5404 | // 4887: } |
| 5405 | 2, 0, // 4892: case 0x2: { |
| 5406 | OPC_CheckPredicate, 39, // 4894: check predicate 39 |
| 5407 | OPC_Decode, 197, 24, 250, 1, // 4896: decode to VSUMGF using decoder 250 |
| 5408 | // 4896: } |
| 5409 | // 4896: } // switch Inst[15:12] |
| 5410 | // 4896: } else try { |
| 5411 | OPC_CheckPredicate, 39, // 4901: check predicate 39 |
| 5412 | OPC_Decode, 196, 24, 159, 2, // 4903: decode to VSUMG using decoder 287 |
| 5413 | // 4903: } |
| 5414 | // 4903: } |
| 5415 | 102, 15, // 4908: case 0x66: { |
| 5416 | OPC_CheckPredicate, 39, // 4910: check predicate 39 |
| 5417 | OPC_CheckField, 12, 16, 0, // 4912: check Inst[27:12] == 0x0 |
| 5418 | OPC_CheckField, 8, 1, 0, // 4916: check Inst[8] == 0x0 |
| 5419 | OPC_Decode, 255, 19, 250, 1, // 4920: decode to VCKSM using decoder 250 |
| 5420 | // 4920: } |
| 5421 | 103, 38, // 4925: case 0x67: { |
| 5422 | OPC_CheckField, 8, 1, 0, // 4927: check Inst[8] == 0x0 |
| 5423 | OPC_CheckField, 16, 12, 0, // 4931: check Inst[27:16] == 0x0 |
| 5424 | OPC_Scope, 21, // 4935: try { |
| 5425 | OPC_SwitchField, 12, 4, // 4937: switch Inst[15:12] { |
| 5426 | 2, 7, // 4940: case 0x2: { |
| 5427 | OPC_CheckPredicate, 39, // 4942: check predicate 39 |
| 5428 | OPC_Decode, 201, 24, 250, 1, // 4944: decode to VSUMQF using decoder 250 |
| 5429 | // 4944: } |
| 5430 | 3, 0, // 4949: case 0x3: { |
| 5431 | OPC_CheckPredicate, 39, // 4951: check predicate 39 |
| 5432 | OPC_Decode, 202, 24, 250, 1, // 4953: decode to VSUMQG using decoder 250 |
| 5433 | // 4953: } |
| 5434 | // 4953: } // switch Inst[15:12] |
| 5435 | // 4953: } else try { |
| 5436 | OPC_CheckPredicate, 39, // 4958: check predicate 39 |
| 5437 | OPC_Decode, 200, 24, 159, 2, // 4960: decode to VSUMQ using decoder 287 |
| 5438 | // 4960: } |
| 5439 | // 4960: } |
| 5440 | 104, 15, // 4965: case 0x68: { |
| 5441 | OPC_CheckPredicate, 39, // 4967: check predicate 39 |
| 5442 | OPC_CheckField, 12, 16, 0, // 4969: check Inst[27:12] == 0x0 |
| 5443 | OPC_CheckField, 8, 1, 0, // 4973: check Inst[8] == 0x0 |
| 5444 | OPC_Decode, 183, 23, 250, 1, // 4977: decode to VN using decoder 250 |
| 5445 | // 4977: } |
| 5446 | 105, 15, // 4982: case 0x69: { |
| 5447 | OPC_CheckPredicate, 39, // 4984: check predicate 39 |
| 5448 | OPC_CheckField, 12, 16, 0, // 4986: check Inst[27:12] == 0x0 |
| 5449 | OPC_CheckField, 8, 1, 0, // 4990: check Inst[8] == 0x0 |
| 5450 | OPC_Decode, 184, 23, 250, 1, // 4994: decode to VNC using decoder 250 |
| 5451 | // 4994: } |
| 5452 | 106, 15, // 4999: case 0x6a: { |
| 5453 | OPC_CheckPredicate, 39, // 5001: check predicate 39 |
| 5454 | OPC_CheckField, 12, 16, 0, // 5003: check Inst[27:12] == 0x0 |
| 5455 | OPC_CheckField, 8, 1, 0, // 5007: check Inst[8] == 0x0 |
| 5456 | OPC_Decode, 188, 23, 250, 1, // 5011: decode to VO using decoder 250 |
| 5457 | // 5011: } |
| 5458 | 107, 15, // 5016: case 0x6b: { |
| 5459 | OPC_CheckPredicate, 39, // 5018: check predicate 39 |
| 5460 | OPC_CheckField, 12, 16, 0, // 5020: check Inst[27:12] == 0x0 |
| 5461 | OPC_CheckField, 8, 1, 0, // 5024: check Inst[8] == 0x0 |
| 5462 | OPC_Decode, 186, 23, 250, 1, // 5028: decode to VNO using decoder 250 |
| 5463 | // 5028: } |
| 5464 | 108, 15, // 5033: case 0x6c: { |
| 5465 | OPC_CheckPredicate, 40, // 5035: check predicate 40 |
| 5466 | OPC_CheckField, 12, 16, 0, // 5037: check Inst[27:12] == 0x0 |
| 5467 | OPC_CheckField, 8, 1, 0, // 5041: check Inst[8] == 0x0 |
| 5468 | OPC_Decode, 187, 23, 250, 1, // 5045: decode to VNX using decoder 250 |
| 5469 | // 5045: } |
| 5470 | 109, 15, // 5050: case 0x6d: { |
| 5471 | OPC_CheckPredicate, 39, // 5052: check predicate 39 |
| 5472 | OPC_CheckField, 12, 16, 0, // 5054: check Inst[27:12] == 0x0 |
| 5473 | OPC_CheckField, 8, 1, 0, // 5058: check Inst[8] == 0x0 |
| 5474 | OPC_Decode, 230, 24, 250, 1, // 5062: decode to VX using decoder 250 |
| 5475 | // 5062: } |
| 5476 | 110, 15, // 5067: case 0x6e: { |
| 5477 | OPC_CheckPredicate, 40, // 5069: check predicate 40 |
| 5478 | OPC_CheckField, 12, 16, 0, // 5071: check Inst[27:12] == 0x0 |
| 5479 | OPC_CheckField, 8, 1, 0, // 5075: check Inst[8] == 0x0 |
| 5480 | OPC_Decode, 185, 23, 250, 1, // 5079: decode to VNN using decoder 250 |
| 5481 | // 5079: } |
| 5482 | 111, 15, // 5084: case 0x6f: { |
| 5483 | OPC_CheckPredicate, 40, // 5086: check predicate 40 |
| 5484 | OPC_CheckField, 12, 16, 0, // 5088: check Inst[27:12] == 0x0 |
| 5485 | OPC_CheckField, 8, 1, 0, // 5092: check Inst[8] == 0x0 |
| 5486 | OPC_Decode, 189, 23, 250, 1, // 5096: decode to VOC using decoder 250 |
| 5487 | // 5096: } |
| 5488 | 112, 56, // 5101: case 0x70: { |
| 5489 | OPC_CheckField, 8, 1, 0, // 5103: check Inst[8] == 0x0 |
| 5490 | OPC_CheckField, 16, 12, 0, // 5107: check Inst[27:16] == 0x0 |
| 5491 | OPC_Scope, 39, // 5111: try { |
| 5492 | OPC_SwitchField, 12, 4, // 5113: switch Inst[15:12] { |
| 5493 | 0, 7, // 5116: case 0x0: { |
| 5494 | OPC_CheckPredicate, 39, // 5118: check predicate 39 |
| 5495 | OPC_Decode, 202, 20, 250, 1, // 5120: decode to VESLVB using decoder 250 |
| 5496 | // 5120: } |
| 5497 | 1, 7, // 5125: case 0x1: { |
| 5498 | OPC_CheckPredicate, 39, // 5127: check predicate 39 |
| 5499 | OPC_Decode, 205, 20, 250, 1, // 5129: decode to VESLVH using decoder 250 |
| 5500 | // 5129: } |
| 5501 | 2, 7, // 5134: case 0x2: { |
| 5502 | OPC_CheckPredicate, 39, // 5136: check predicate 39 |
| 5503 | OPC_Decode, 203, 20, 250, 1, // 5138: decode to VESLVF using decoder 250 |
| 5504 | // 5138: } |
| 5505 | 3, 0, // 5143: case 0x3: { |
| 5506 | OPC_CheckPredicate, 39, // 5145: check predicate 39 |
| 5507 | OPC_Decode, 204, 20, 250, 1, // 5147: decode to VESLVG using decoder 250 |
| 5508 | // 5147: } |
| 5509 | // 5147: } // switch Inst[15:12] |
| 5510 | // 5147: } else try { |
| 5511 | OPC_CheckPredicate, 39, // 5152: check predicate 39 |
| 5512 | OPC_Decode, 201, 20, 159, 2, // 5154: decode to VESLV using decoder 287 |
| 5513 | // 5154: } |
| 5514 | // 5154: } |
| 5515 | 114, 56, // 5159: case 0x72: { |
| 5516 | OPC_CheckField, 8, 1, 0, // 5161: check Inst[8] == 0x0 |
| 5517 | OPC_CheckField, 24, 4, 0, // 5165: check Inst[27:24] == 0x0 |
| 5518 | OPC_Scope, 39, // 5169: try { |
| 5519 | OPC_SwitchField, 12, 4, // 5171: switch Inst[15:12] { |
| 5520 | 0, 7, // 5174: case 0x0: { |
| 5521 | OPC_CheckPredicate, 39, // 5176: check predicate 39 |
| 5522 | OPC_Decode, 182, 20, 161, 2, // 5178: decode to VERIMB using decoder 289 |
| 5523 | // 5178: } |
| 5524 | 1, 7, // 5183: case 0x1: { |
| 5525 | OPC_CheckPredicate, 39, // 5185: check predicate 39 |
| 5526 | OPC_Decode, 185, 20, 161, 2, // 5187: decode to VERIMH using decoder 289 |
| 5527 | // 5187: } |
| 5528 | 2, 7, // 5192: case 0x2: { |
| 5529 | OPC_CheckPredicate, 39, // 5194: check predicate 39 |
| 5530 | OPC_Decode, 183, 20, 161, 2, // 5196: decode to VERIMF using decoder 289 |
| 5531 | // 5196: } |
| 5532 | 3, 0, // 5201: case 0x3: { |
| 5533 | OPC_CheckPredicate, 39, // 5203: check predicate 39 |
| 5534 | OPC_Decode, 184, 20, 161, 2, // 5205: decode to VERIMG using decoder 289 |
| 5535 | // 5205: } |
| 5536 | // 5205: } // switch Inst[15:12] |
| 5537 | // 5205: } else try { |
| 5538 | OPC_CheckPredicate, 39, // 5210: check predicate 39 |
| 5539 | OPC_Decode, 181, 20, 162, 2, // 5212: decode to VERIM using decoder 290 |
| 5540 | // 5212: } |
| 5541 | // 5212: } |
| 5542 | 115, 56, // 5217: case 0x73: { |
| 5543 | OPC_CheckField, 8, 1, 0, // 5219: check Inst[8] == 0x0 |
| 5544 | OPC_CheckField, 16, 12, 0, // 5223: check Inst[27:16] == 0x0 |
| 5545 | OPC_Scope, 39, // 5227: try { |
| 5546 | OPC_SwitchField, 12, 4, // 5229: switch Inst[15:12] { |
| 5547 | 0, 7, // 5232: case 0x0: { |
| 5548 | OPC_CheckPredicate, 39, // 5234: check predicate 39 |
| 5549 | OPC_Decode, 192, 20, 250, 1, // 5236: decode to VERLLVB using decoder 250 |
| 5550 | // 5236: } |
| 5551 | 1, 7, // 5241: case 0x1: { |
| 5552 | OPC_CheckPredicate, 39, // 5243: check predicate 39 |
| 5553 | OPC_Decode, 195, 20, 250, 1, // 5245: decode to VERLLVH using decoder 250 |
| 5554 | // 5245: } |
| 5555 | 2, 7, // 5250: case 0x2: { |
| 5556 | OPC_CheckPredicate, 39, // 5252: check predicate 39 |
| 5557 | OPC_Decode, 193, 20, 250, 1, // 5254: decode to VERLLVF using decoder 250 |
| 5558 | // 5254: } |
| 5559 | 3, 0, // 5259: case 0x3: { |
| 5560 | OPC_CheckPredicate, 39, // 5261: check predicate 39 |
| 5561 | OPC_Decode, 194, 20, 250, 1, // 5263: decode to VERLLVG using decoder 250 |
| 5562 | // 5263: } |
| 5563 | // 5263: } // switch Inst[15:12] |
| 5564 | // 5263: } else try { |
| 5565 | OPC_CheckPredicate, 39, // 5268: check predicate 39 |
| 5566 | OPC_Decode, 191, 20, 159, 2, // 5270: decode to VERLLV using decoder 287 |
| 5567 | // 5270: } |
| 5568 | // 5270: } |
| 5569 | 116, 15, // 5275: case 0x74: { |
| 5570 | OPC_CheckPredicate, 39, // 5277: check predicate 39 |
| 5571 | OPC_CheckField, 12, 16, 0, // 5279: check Inst[27:12] == 0x0 |
| 5572 | OPC_CheckField, 8, 1, 0, // 5283: check Inst[8] == 0x0 |
| 5573 | OPC_Decode, 138, 24, 250, 1, // 5287: decode to VSL using decoder 250 |
| 5574 | // 5287: } |
| 5575 | 117, 15, // 5292: case 0x75: { |
| 5576 | OPC_CheckPredicate, 39, // 5294: check predicate 39 |
| 5577 | OPC_CheckField, 12, 16, 0, // 5296: check Inst[27:12] == 0x0 |
| 5578 | OPC_CheckField, 8, 1, 0, // 5300: check Inst[8] == 0x0 |
| 5579 | OPC_Decode, 139, 24, 250, 1, // 5304: decode to VSLB using decoder 250 |
| 5580 | // 5304: } |
| 5581 | 119, 19, // 5309: case 0x77: { |
| 5582 | OPC_CheckPredicate, 39, // 5311: check predicate 39 |
| 5583 | OPC_CheckField, 24, 4, 0, // 5313: check Inst[27:24] == 0x0 |
| 5584 | OPC_CheckField, 12, 4, 0, // 5317: check Inst[15:12] == 0x0 |
| 5585 | OPC_CheckField, 8, 1, 0, // 5321: check Inst[8] == 0x0 |
| 5586 | OPC_Decode, 141, 24, 163, 2, // 5325: decode to VSLDB using decoder 291 |
| 5587 | // 5325: } |
| 5588 | 120, 56, // 5330: case 0x78: { |
| 5589 | OPC_CheckField, 8, 1, 0, // 5332: check Inst[8] == 0x0 |
| 5590 | OPC_CheckField, 16, 12, 0, // 5336: check Inst[27:16] == 0x0 |
| 5591 | OPC_Scope, 39, // 5340: try { |
| 5592 | OPC_SwitchField, 12, 4, // 5342: switch Inst[15:12] { |
| 5593 | 0, 7, // 5345: case 0x0: { |
| 5594 | OPC_CheckPredicate, 39, // 5347: check predicate 39 |
| 5595 | OPC_Decode, 222, 20, 250, 1, // 5349: decode to VESRLVB using decoder 250 |
| 5596 | // 5349: } |
| 5597 | 1, 7, // 5354: case 0x1: { |
| 5598 | OPC_CheckPredicate, 39, // 5356: check predicate 39 |
| 5599 | OPC_Decode, 225, 20, 250, 1, // 5358: decode to VESRLVH using decoder 250 |
| 5600 | // 5358: } |
| 5601 | 2, 7, // 5363: case 0x2: { |
| 5602 | OPC_CheckPredicate, 39, // 5365: check predicate 39 |
| 5603 | OPC_Decode, 223, 20, 250, 1, // 5367: decode to VESRLVF using decoder 250 |
| 5604 | // 5367: } |
| 5605 | 3, 0, // 5372: case 0x3: { |
| 5606 | OPC_CheckPredicate, 39, // 5374: check predicate 39 |
| 5607 | OPC_Decode, 224, 20, 250, 1, // 5376: decode to VESRLVG using decoder 250 |
| 5608 | // 5376: } |
| 5609 | // 5376: } // switch Inst[15:12] |
| 5610 | // 5376: } else try { |
| 5611 | OPC_CheckPredicate, 39, // 5381: check predicate 39 |
| 5612 | OPC_Decode, 221, 20, 159, 2, // 5383: decode to VESRLV using decoder 287 |
| 5613 | // 5383: } |
| 5614 | // 5383: } |
| 5615 | 122, 56, // 5388: case 0x7a: { |
| 5616 | OPC_CheckField, 8, 1, 0, // 5390: check Inst[8] == 0x0 |
| 5617 | OPC_CheckField, 16, 12, 0, // 5394: check Inst[27:16] == 0x0 |
| 5618 | OPC_Scope, 39, // 5398: try { |
| 5619 | OPC_SwitchField, 12, 4, // 5400: switch Inst[15:12] { |
| 5620 | 0, 7, // 5403: case 0x0: { |
| 5621 | OPC_CheckPredicate, 39, // 5405: check predicate 39 |
| 5622 | OPC_Decode, 212, 20, 250, 1, // 5407: decode to VESRAVB using decoder 250 |
| 5623 | // 5407: } |
| 5624 | 1, 7, // 5412: case 0x1: { |
| 5625 | OPC_CheckPredicate, 39, // 5414: check predicate 39 |
| 5626 | OPC_Decode, 215, 20, 250, 1, // 5416: decode to VESRAVH using decoder 250 |
| 5627 | // 5416: } |
| 5628 | 2, 7, // 5421: case 0x2: { |
| 5629 | OPC_CheckPredicate, 39, // 5423: check predicate 39 |
| 5630 | OPC_Decode, 213, 20, 250, 1, // 5425: decode to VESRAVF using decoder 250 |
| 5631 | // 5425: } |
| 5632 | 3, 0, // 5430: case 0x3: { |
| 5633 | OPC_CheckPredicate, 39, // 5432: check predicate 39 |
| 5634 | OPC_Decode, 214, 20, 250, 1, // 5434: decode to VESRAVG using decoder 250 |
| 5635 | // 5434: } |
| 5636 | // 5434: } // switch Inst[15:12] |
| 5637 | // 5434: } else try { |
| 5638 | OPC_CheckPredicate, 39, // 5439: check predicate 39 |
| 5639 | OPC_Decode, 211, 20, 159, 2, // 5441: decode to VESRAV using decoder 287 |
| 5640 | // 5441: } |
| 5641 | // 5441: } |
| 5642 | 124, 15, // 5446: case 0x7c: { |
| 5643 | OPC_CheckPredicate, 39, // 5448: check predicate 39 |
| 5644 | OPC_CheckField, 12, 16, 0, // 5450: check Inst[27:12] == 0x0 |
| 5645 | OPC_CheckField, 8, 1, 0, // 5454: check Inst[8] == 0x0 |
| 5646 | OPC_Decode, 147, 24, 250, 1, // 5458: decode to VSRL using decoder 250 |
| 5647 | // 5458: } |
| 5648 | 125, 15, // 5463: case 0x7d: { |
| 5649 | OPC_CheckPredicate, 39, // 5465: check predicate 39 |
| 5650 | OPC_CheckField, 12, 16, 0, // 5467: check Inst[27:12] == 0x0 |
| 5651 | OPC_CheckField, 8, 1, 0, // 5471: check Inst[8] == 0x0 |
| 5652 | OPC_Decode, 148, 24, 250, 1, // 5475: decode to VSRLB using decoder 250 |
| 5653 | // 5475: } |
| 5654 | 126, 15, // 5480: case 0x7e: { |
| 5655 | OPC_CheckPredicate, 39, // 5482: check predicate 39 |
| 5656 | OPC_CheckField, 12, 16, 0, // 5484: check Inst[27:12] == 0x0 |
| 5657 | OPC_CheckField, 8, 1, 0, // 5488: check Inst[8] == 0x0 |
| 5658 | OPC_Decode, 144, 24, 250, 1, // 5492: decode to VSRA using decoder 250 |
| 5659 | // 5492: } |
| 5660 | 127, 15, // 5497: case 0x7f: { |
| 5661 | OPC_CheckPredicate, 39, // 5499: check predicate 39 |
| 5662 | OPC_CheckField, 12, 16, 0, // 5501: check Inst[27:12] == 0x0 |
| 5663 | OPC_CheckField, 8, 1, 0, // 5505: check Inst[8] == 0x0 |
| 5664 | OPC_Decode, 145, 24, 250, 1, // 5509: decode to VSRAB using decoder 250 |
| 5665 | // 5509: } |
| 5666 | 128, 1, 147, 1, // 5514: case 0x80: { |
| 5667 | OPC_CheckField, 8, 1, 0, // 5518: check Inst[8] == 0x0 |
| 5668 | OPC_CheckField, 16, 4, 0, // 5522: check Inst[19:16] == 0x0 |
| 5669 | OPC_CheckField, 24, 4, 0, // 5526: check Inst[27:24] == 0x0 |
| 5670 | OPC_Scope, 126, // 5530: try { |
| 5671 | OPC_SwitchField, 12, 4, // 5532: switch Inst[15:12] { |
| 5672 | 0, 39, // 5535: case 0x0: { |
| 5673 | OPC_Scope, 30, // 5537: try { |
| 5674 | OPC_SwitchField, 20, 4, // 5539: switch Inst[23:20] { |
| 5675 | 1, 7, // 5542: case 0x1: { |
| 5676 | OPC_CheckPredicate, 39, // 5544: check predicate 39 |
| 5677 | OPC_Decode, 135, 21, 250, 1, // 5546: decode to VFEEBS using decoder 250 |
| 5678 | // 5546: } |
| 5679 | 2, 7, // 5551: case 0x2: { |
| 5680 | OPC_CheckPredicate, 39, // 5553: check predicate 39 |
| 5681 | OPC_Decode, 140, 21, 250, 1, // 5555: decode to VFEEZB using decoder 250 |
| 5682 | // 5555: } |
| 5683 | 3, 0, // 5560: case 0x3: { |
| 5684 | OPC_CheckPredicate, 39, // 5562: check predicate 39 |
| 5685 | OPC_Decode, 141, 21, 250, 1, // 5564: decode to VFEEZBS using decoder 250 |
| 5686 | // 5564: } |
| 5687 | // 5564: } // switch Inst[23:20] |
| 5688 | // 5564: } else try { |
| 5689 | OPC_CheckPredicate, 39, // 5569: check predicate 39 |
| 5690 | OPC_Decode, 134, 21, 246, 1, // 5571: decode to VFEEB using decoder 246 |
| 5691 | // 5571: } |
| 5692 | // 5571: } |
| 5693 | 1, 39, // 5576: case 0x1: { |
| 5694 | OPC_Scope, 30, // 5578: try { |
| 5695 | OPC_SwitchField, 20, 4, // 5580: switch Inst[23:20] { |
| 5696 | 1, 7, // 5583: case 0x1: { |
| 5697 | OPC_CheckPredicate, 39, // 5585: check predicate 39 |
| 5698 | OPC_Decode, 139, 21, 250, 1, // 5587: decode to VFEEHS using decoder 250 |
| 5699 | // 5587: } |
| 5700 | 2, 7, // 5592: case 0x2: { |
| 5701 | OPC_CheckPredicate, 39, // 5594: check predicate 39 |
| 5702 | OPC_Decode, 144, 21, 250, 1, // 5596: decode to VFEEZH using decoder 250 |
| 5703 | // 5596: } |
| 5704 | 3, 0, // 5601: case 0x3: { |
| 5705 | OPC_CheckPredicate, 39, // 5603: check predicate 39 |
| 5706 | OPC_Decode, 145, 21, 250, 1, // 5605: decode to VFEEZHS using decoder 250 |
| 5707 | // 5605: } |
| 5708 | // 5605: } // switch Inst[23:20] |
| 5709 | // 5605: } else try { |
| 5710 | OPC_CheckPredicate, 39, // 5610: check predicate 39 |
| 5711 | OPC_Decode, 138, 21, 246, 1, // 5612: decode to VFEEH using decoder 246 |
| 5712 | // 5612: } |
| 5713 | // 5612: } |
| 5714 | 2, 0, // 5617: case 0x2: { |
| 5715 | OPC_Scope, 30, // 5619: try { |
| 5716 | OPC_SwitchField, 20, 4, // 5621: switch Inst[23:20] { |
| 5717 | 1, 7, // 5624: case 0x1: { |
| 5718 | OPC_CheckPredicate, 39, // 5626: check predicate 39 |
| 5719 | OPC_Decode, 137, 21, 250, 1, // 5628: decode to VFEEFS using decoder 250 |
| 5720 | // 5628: } |
| 5721 | 2, 7, // 5633: case 0x2: { |
| 5722 | OPC_CheckPredicate, 39, // 5635: check predicate 39 |
| 5723 | OPC_Decode, 142, 21, 250, 1, // 5637: decode to VFEEZF using decoder 250 |
| 5724 | // 5637: } |
| 5725 | 3, 0, // 5642: case 0x3: { |
| 5726 | OPC_CheckPredicate, 39, // 5644: check predicate 39 |
| 5727 | OPC_Decode, 143, 21, 250, 1, // 5646: decode to VFEEZFS using decoder 250 |
| 5728 | // 5646: } |
| 5729 | // 5646: } // switch Inst[23:20] |
| 5730 | // 5646: } else try { |
| 5731 | OPC_CheckPredicate, 39, // 5651: check predicate 39 |
| 5732 | OPC_Decode, 136, 21, 246, 1, // 5653: decode to VFEEF using decoder 246 |
| 5733 | // 5653: } |
| 5734 | // 5653: } |
| 5735 | // 5653: } // switch Inst[15:12] |
| 5736 | // 5653: } else try { |
| 5737 | OPC_CheckPredicate, 39, // 5658: check predicate 39 |
| 5738 | OPC_Decode, 133, 21, 247, 1, // 5660: decode to VFEE using decoder 247 |
| 5739 | // 5660: } |
| 5740 | // 5660: } |
| 5741 | 129, 1, 147, 1, // 5665: case 0x81: { |
| 5742 | OPC_CheckField, 8, 1, 0, // 5669: check Inst[8] == 0x0 |
| 5743 | OPC_CheckField, 16, 4, 0, // 5673: check Inst[19:16] == 0x0 |
| 5744 | OPC_CheckField, 24, 4, 0, // 5677: check Inst[27:24] == 0x0 |
| 5745 | OPC_Scope, 126, // 5681: try { |
| 5746 | OPC_SwitchField, 12, 4, // 5683: switch Inst[15:12] { |
| 5747 | 0, 39, // 5686: case 0x0: { |
| 5748 | OPC_Scope, 30, // 5688: try { |
| 5749 | OPC_SwitchField, 20, 4, // 5690: switch Inst[23:20] { |
| 5750 | 1, 7, // 5693: case 0x1: { |
| 5751 | OPC_CheckPredicate, 39, // 5695: check predicate 39 |
| 5752 | OPC_Decode, 148, 21, 250, 1, // 5697: decode to VFENEBS using decoder 250 |
| 5753 | // 5697: } |
| 5754 | 2, 7, // 5702: case 0x2: { |
| 5755 | OPC_CheckPredicate, 39, // 5704: check predicate 39 |
| 5756 | OPC_Decode, 153, 21, 250, 1, // 5706: decode to VFENEZB using decoder 250 |
| 5757 | // 5706: } |
| 5758 | 3, 0, // 5711: case 0x3: { |
| 5759 | OPC_CheckPredicate, 39, // 5713: check predicate 39 |
| 5760 | OPC_Decode, 154, 21, 250, 1, // 5715: decode to VFENEZBS using decoder 250 |
| 5761 | // 5715: } |
| 5762 | // 5715: } // switch Inst[23:20] |
| 5763 | // 5715: } else try { |
| 5764 | OPC_CheckPredicate, 39, // 5720: check predicate 39 |
| 5765 | OPC_Decode, 147, 21, 246, 1, // 5722: decode to VFENEB using decoder 246 |
| 5766 | // 5722: } |
| 5767 | // 5722: } |
| 5768 | 1, 39, // 5727: case 0x1: { |
| 5769 | OPC_Scope, 30, // 5729: try { |
| 5770 | OPC_SwitchField, 20, 4, // 5731: switch Inst[23:20] { |
| 5771 | 1, 7, // 5734: case 0x1: { |
| 5772 | OPC_CheckPredicate, 39, // 5736: check predicate 39 |
| 5773 | OPC_Decode, 152, 21, 250, 1, // 5738: decode to VFENEHS using decoder 250 |
| 5774 | // 5738: } |
| 5775 | 2, 7, // 5743: case 0x2: { |
| 5776 | OPC_CheckPredicate, 39, // 5745: check predicate 39 |
| 5777 | OPC_Decode, 157, 21, 250, 1, // 5747: decode to VFENEZH using decoder 250 |
| 5778 | // 5747: } |
| 5779 | 3, 0, // 5752: case 0x3: { |
| 5780 | OPC_CheckPredicate, 39, // 5754: check predicate 39 |
| 5781 | OPC_Decode, 158, 21, 250, 1, // 5756: decode to VFENEZHS using decoder 250 |
| 5782 | // 5756: } |
| 5783 | // 5756: } // switch Inst[23:20] |
| 5784 | // 5756: } else try { |
| 5785 | OPC_CheckPredicate, 39, // 5761: check predicate 39 |
| 5786 | OPC_Decode, 151, 21, 246, 1, // 5763: decode to VFENEH using decoder 246 |
| 5787 | // 5763: } |
| 5788 | // 5763: } |
| 5789 | 2, 0, // 5768: case 0x2: { |
| 5790 | OPC_Scope, 30, // 5770: try { |
| 5791 | OPC_SwitchField, 20, 4, // 5772: switch Inst[23:20] { |
| 5792 | 1, 7, // 5775: case 0x1: { |
| 5793 | OPC_CheckPredicate, 39, // 5777: check predicate 39 |
| 5794 | OPC_Decode, 150, 21, 250, 1, // 5779: decode to VFENEFS using decoder 250 |
| 5795 | // 5779: } |
| 5796 | 2, 7, // 5784: case 0x2: { |
| 5797 | OPC_CheckPredicate, 39, // 5786: check predicate 39 |
| 5798 | OPC_Decode, 155, 21, 250, 1, // 5788: decode to VFENEZF using decoder 250 |
| 5799 | // 5788: } |
| 5800 | 3, 0, // 5793: case 0x3: { |
| 5801 | OPC_CheckPredicate, 39, // 5795: check predicate 39 |
| 5802 | OPC_Decode, 156, 21, 250, 1, // 5797: decode to VFENEZFS using decoder 250 |
| 5803 | // 5797: } |
| 5804 | // 5797: } // switch Inst[23:20] |
| 5805 | // 5797: } else try { |
| 5806 | OPC_CheckPredicate, 39, // 5802: check predicate 39 |
| 5807 | OPC_Decode, 149, 21, 246, 1, // 5804: decode to VFENEF using decoder 246 |
| 5808 | // 5804: } |
| 5809 | // 5804: } |
| 5810 | // 5804: } // switch Inst[15:12] |
| 5811 | // 5804: } else try { |
| 5812 | OPC_CheckPredicate, 39, // 5809: check predicate 39 |
| 5813 | OPC_Decode, 146, 21, 247, 1, // 5811: decode to VFENE using decoder 247 |
| 5814 | // 5811: } |
| 5815 | // 5811: } |
| 5816 | 130, 1, 169, 1, // 5816: case 0x82: { |
| 5817 | OPC_CheckField, 8, 1, 0, // 5820: check Inst[8] == 0x0 |
| 5818 | OPC_CheckField, 16, 4, 0, // 5824: check Inst[19:16] == 0x0 |
| 5819 | OPC_CheckField, 24, 4, 0, // 5828: check Inst[27:24] == 0x0 |
| 5820 | OPC_Scope, 147, 1, // 5832: try { |
| 5821 | OPC_SwitchField, 12, 4, // 5835: switch Inst[15:12] { |
| 5822 | 0, 46, // 5838: case 0x0: { |
| 5823 | OPC_Scope, 11, // 5840: try { |
| 5824 | OPC_CheckField, 20, 2, 3, // 5842: check Inst[21:20] == 0x3 |
| 5825 | OPC_CheckPredicate, 39, // 5846: check predicate 39 |
| 5826 | OPC_Decode, 237, 20, 164, 2, // 5848: decode to VFAEZBS using decoder 292 |
| 5827 | OPC_Scope, 11, // 5853: } else try { |
| 5828 | OPC_CheckField, 20, 1, 1, // 5855: check Inst[20] == 0x1 |
| 5829 | OPC_CheckPredicate, 39, // 5859: check predicate 39 |
| 5830 | OPC_Decode, 231, 20, 165, 2, // 5861: decode to VFAEBS using decoder 293 |
| 5831 | OPC_Scope, 11, // 5866: } else try { |
| 5832 | OPC_CheckField, 21, 1, 1, // 5868: check Inst[21] == 0x1 |
| 5833 | OPC_CheckPredicate, 39, // 5872: check predicate 39 |
| 5834 | OPC_Decode, 236, 20, 166, 2, // 5874: decode to VFAEZB using decoder 294 |
| 5835 | // 5874: } else try { |
| 5836 | OPC_CheckPredicate, 39, // 5879: check predicate 39 |
| 5837 | OPC_Decode, 230, 20, 246, 1, // 5881: decode to VFAEB using decoder 246 |
| 5838 | // 5881: } |
| 5839 | // 5881: } |
| 5840 | 1, 46, // 5886: case 0x1: { |
| 5841 | OPC_Scope, 11, // 5888: try { |
| 5842 | OPC_CheckField, 20, 2, 3, // 5890: check Inst[21:20] == 0x3 |
| 5843 | OPC_CheckPredicate, 39, // 5894: check predicate 39 |
| 5844 | OPC_Decode, 241, 20, 164, 2, // 5896: decode to VFAEZHS using decoder 292 |
| 5845 | OPC_Scope, 11, // 5901: } else try { |
| 5846 | OPC_CheckField, 20, 1, 1, // 5903: check Inst[20] == 0x1 |
| 5847 | OPC_CheckPredicate, 39, // 5907: check predicate 39 |
| 5848 | OPC_Decode, 235, 20, 165, 2, // 5909: decode to VFAEHS using decoder 293 |
| 5849 | OPC_Scope, 11, // 5914: } else try { |
| 5850 | OPC_CheckField, 21, 1, 1, // 5916: check Inst[21] == 0x1 |
| 5851 | OPC_CheckPredicate, 39, // 5920: check predicate 39 |
| 5852 | OPC_Decode, 240, 20, 166, 2, // 5922: decode to VFAEZH using decoder 294 |
| 5853 | // 5922: } else try { |
| 5854 | OPC_CheckPredicate, 39, // 5927: check predicate 39 |
| 5855 | OPC_Decode, 234, 20, 246, 1, // 5929: decode to VFAEH using decoder 246 |
| 5856 | // 5929: } |
| 5857 | // 5929: } |
| 5858 | 2, 0, // 5934: case 0x2: { |
| 5859 | OPC_Scope, 11, // 5936: try { |
| 5860 | OPC_CheckField, 20, 2, 3, // 5938: check Inst[21:20] == 0x3 |
| 5861 | OPC_CheckPredicate, 39, // 5942: check predicate 39 |
| 5862 | OPC_Decode, 239, 20, 164, 2, // 5944: decode to VFAEZFS using decoder 292 |
| 5863 | OPC_Scope, 11, // 5949: } else try { |
| 5864 | OPC_CheckField, 20, 1, 1, // 5951: check Inst[20] == 0x1 |
| 5865 | OPC_CheckPredicate, 39, // 5955: check predicate 39 |
| 5866 | OPC_Decode, 233, 20, 165, 2, // 5957: decode to VFAEFS using decoder 293 |
| 5867 | OPC_Scope, 11, // 5962: } else try { |
| 5868 | OPC_CheckField, 21, 1, 1, // 5964: check Inst[21] == 0x1 |
| 5869 | OPC_CheckPredicate, 39, // 5968: check predicate 39 |
| 5870 | OPC_Decode, 238, 20, 166, 2, // 5970: decode to VFAEZF using decoder 294 |
| 5871 | // 5970: } else try { |
| 5872 | OPC_CheckPredicate, 39, // 5975: check predicate 39 |
| 5873 | OPC_Decode, 232, 20, 246, 1, // 5977: decode to VFAEF using decoder 246 |
| 5874 | // 5977: } |
| 5875 | // 5977: } |
| 5876 | // 5977: } // switch Inst[15:12] |
| 5877 | // 5977: } else try { |
| 5878 | OPC_CheckPredicate, 39, // 5982: check predicate 39 |
| 5879 | OPC_Decode, 229, 20, 247, 1, // 5984: decode to VFAE using decoder 247 |
| 5880 | // 5984: } |
| 5881 | // 5984: } |
| 5882 | 132, 1, 15, // 5989: case 0x84: { |
| 5883 | OPC_CheckPredicate, 39, // 5992: check predicate 39 |
| 5884 | OPC_CheckField, 16, 12, 0, // 5994: check Inst[27:16] == 0x0 |
| 5885 | OPC_CheckField, 8, 1, 0, // 5998: check Inst[8] == 0x0 |
| 5886 | OPC_Decode, 191, 23, 159, 2, // 6002: decode to VPDI using decoder 287 |
| 5887 | // 6002: } |
| 5888 | 133, 1, 15, // 6007: case 0x85: { |
| 5889 | OPC_CheckPredicate, 40, // 6010: check predicate 40 |
| 5890 | OPC_CheckField, 12, 16, 0, // 6012: check Inst[27:12] == 0x0 |
| 5891 | OPC_CheckField, 8, 1, 0, // 6016: check Inst[8] == 0x0 |
| 5892 | OPC_Decode, 209, 19, 250, 1, // 6020: decode to VBPERM using decoder 250 |
| 5893 | // 6020: } |
| 5894 | 134, 1, 19, // 6025: case 0x86: { |
| 5895 | OPC_CheckPredicate, 33, // 6028: check predicate 33 |
| 5896 | OPC_CheckField, 24, 4, 0, // 6030: check Inst[27:24] == 0x0 |
| 5897 | OPC_CheckField, 12, 4, 0, // 6034: check Inst[15:12] == 0x0 |
| 5898 | OPC_CheckField, 8, 1, 0, // 6038: check Inst[8] == 0x0 |
| 5899 | OPC_Decode, 140, 24, 163, 2, // 6042: decode to VSLD using decoder 291 |
| 5900 | // 6042: } |
| 5901 | 135, 1, 19, // 6047: case 0x87: { |
| 5902 | OPC_CheckPredicate, 33, // 6050: check predicate 33 |
| 5903 | OPC_CheckField, 24, 4, 0, // 6052: check Inst[27:24] == 0x0 |
| 5904 | OPC_CheckField, 12, 4, 0, // 6056: check Inst[15:12] == 0x0 |
| 5905 | OPC_CheckField, 8, 1, 0, // 6060: check Inst[8] == 0x0 |
| 5906 | OPC_Decode, 146, 24, 163, 2, // 6064: decode to VSRD using decoder 291 |
| 5907 | // 6064: } |
| 5908 | 136, 1, 11, // 6069: case 0x88: { |
| 5909 | OPC_CheckPredicate, 41, // 6072: check predicate 41 |
| 5910 | OPC_CheckField, 24, 4, 0, // 6074: check Inst[27:24] == 0x0 |
| 5911 | OPC_Decode, 226, 20, 167, 2, // 6078: decode to VEVAL using decoder 295 |
| 5912 | // 6078: } |
| 5913 | 137, 1, 61, // 6083: case 0x89: { |
| 5914 | OPC_CheckField, 16, 8, 0, // 6086: check Inst[23:16] == 0x0 |
| 5915 | OPC_Scope, 48, // 6090: try { |
| 5916 | OPC_SwitchField, 24, 4, // 6092: switch Inst[27:24] { |
| 5917 | 0, 7, // 6095: case 0x0: { |
| 5918 | OPC_CheckPredicate, 41, // 6097: check predicate 41 |
| 5919 | OPC_Decode, 204, 19, 168, 2, // 6099: decode to VBLENDB using decoder 296 |
| 5920 | // 6099: } |
| 5921 | 1, 7, // 6104: case 0x1: { |
| 5922 | OPC_CheckPredicate, 41, // 6106: check predicate 41 |
| 5923 | OPC_Decode, 207, 19, 168, 2, // 6108: decode to VBLENDH using decoder 296 |
| 5924 | // 6108: } |
| 5925 | 2, 7, // 6113: case 0x2: { |
| 5926 | OPC_CheckPredicate, 41, // 6115: check predicate 41 |
| 5927 | OPC_Decode, 205, 19, 168, 2, // 6117: decode to VBLENDF using decoder 296 |
| 5928 | // 6117: } |
| 5929 | 3, 7, // 6122: case 0x3: { |
| 5930 | OPC_CheckPredicate, 41, // 6124: check predicate 41 |
| 5931 | OPC_Decode, 206, 19, 168, 2, // 6126: decode to VBLENDG using decoder 296 |
| 5932 | // 6126: } |
| 5933 | 4, 0, // 6131: case 0x4: { |
| 5934 | OPC_CheckPredicate, 41, // 6133: check predicate 41 |
| 5935 | OPC_Decode, 208, 19, 168, 2, // 6135: decode to VBLENDQ using decoder 296 |
| 5936 | // 6135: } |
| 5937 | // 6135: } // switch Inst[27:24] |
| 5938 | // 6135: } else try { |
| 5939 | OPC_CheckPredicate, 41, // 6140: check predicate 41 |
| 5940 | OPC_Decode, 203, 19, 169, 2, // 6142: decode to VBLEND using decoder 297 |
| 5941 | // 6142: } |
| 5942 | // 6142: } |
| 5943 | 138, 1, 161, 1, // 6147: case 0x8a: { |
| 5944 | OPC_CheckField, 16, 4, 0, // 6151: check Inst[19:16] == 0x0 |
| 5945 | OPC_Scope, 147, 1, // 6155: try { |
| 5946 | OPC_SwitchField, 24, 4, // 6158: switch Inst[27:24] { |
| 5947 | 0, 46, // 6161: case 0x0: { |
| 5948 | OPC_Scope, 11, // 6163: try { |
| 5949 | OPC_CheckField, 20, 2, 3, // 6165: check Inst[21:20] == 0x3 |
| 5950 | OPC_CheckPredicate, 39, // 6169: check predicate 39 |
| 5951 | OPC_Decode, 180, 24, 170, 2, // 6171: decode to VSTRCZBS using decoder 298 |
| 5952 | OPC_Scope, 11, // 6176: } else try { |
| 5953 | OPC_CheckField, 20, 1, 1, // 6178: check Inst[20] == 0x1 |
| 5954 | OPC_CheckPredicate, 39, // 6182: check predicate 39 |
| 5955 | OPC_Decode, 174, 24, 171, 2, // 6184: decode to VSTRCBS using decoder 299 |
| 5956 | OPC_Scope, 11, // 6189: } else try { |
| 5957 | OPC_CheckField, 21, 1, 1, // 6191: check Inst[21] == 0x1 |
| 5958 | OPC_CheckPredicate, 39, // 6195: check predicate 39 |
| 5959 | OPC_Decode, 179, 24, 172, 2, // 6197: decode to VSTRCZB using decoder 300 |
| 5960 | // 6197: } else try { |
| 5961 | OPC_CheckPredicate, 39, // 6202: check predicate 39 |
| 5962 | OPC_Decode, 173, 24, 173, 2, // 6204: decode to VSTRCB using decoder 301 |
| 5963 | // 6204: } |
| 5964 | // 6204: } |
| 5965 | 1, 46, // 6209: case 0x1: { |
| 5966 | OPC_Scope, 11, // 6211: try { |
| 5967 | OPC_CheckField, 20, 2, 3, // 6213: check Inst[21:20] == 0x3 |
| 5968 | OPC_CheckPredicate, 39, // 6217: check predicate 39 |
| 5969 | OPC_Decode, 184, 24, 170, 2, // 6219: decode to VSTRCZHS using decoder 298 |
| 5970 | OPC_Scope, 11, // 6224: } else try { |
| 5971 | OPC_CheckField, 20, 1, 1, // 6226: check Inst[20] == 0x1 |
| 5972 | OPC_CheckPredicate, 39, // 6230: check predicate 39 |
| 5973 | OPC_Decode, 178, 24, 171, 2, // 6232: decode to VSTRCHS using decoder 299 |
| 5974 | OPC_Scope, 11, // 6237: } else try { |
| 5975 | OPC_CheckField, 21, 1, 1, // 6239: check Inst[21] == 0x1 |
| 5976 | OPC_CheckPredicate, 39, // 6243: check predicate 39 |
| 5977 | OPC_Decode, 183, 24, 172, 2, // 6245: decode to VSTRCZH using decoder 300 |
| 5978 | // 6245: } else try { |
| 5979 | OPC_CheckPredicate, 39, // 6250: check predicate 39 |
| 5980 | OPC_Decode, 177, 24, 173, 2, // 6252: decode to VSTRCH using decoder 301 |
| 5981 | // 6252: } |
| 5982 | // 6252: } |
| 5983 | 2, 0, // 6257: case 0x2: { |
| 5984 | OPC_Scope, 11, // 6259: try { |
| 5985 | OPC_CheckField, 20, 2, 3, // 6261: check Inst[21:20] == 0x3 |
| 5986 | OPC_CheckPredicate, 39, // 6265: check predicate 39 |
| 5987 | OPC_Decode, 182, 24, 170, 2, // 6267: decode to VSTRCZFS using decoder 298 |
| 5988 | OPC_Scope, 11, // 6272: } else try { |
| 5989 | OPC_CheckField, 20, 1, 1, // 6274: check Inst[20] == 0x1 |
| 5990 | OPC_CheckPredicate, 39, // 6278: check predicate 39 |
| 5991 | OPC_Decode, 176, 24, 171, 2, // 6280: decode to VSTRCFS using decoder 299 |
| 5992 | OPC_Scope, 11, // 6285: } else try { |
| 5993 | OPC_CheckField, 21, 1, 1, // 6287: check Inst[21] == 0x1 |
| 5994 | OPC_CheckPredicate, 39, // 6291: check predicate 39 |
| 5995 | OPC_Decode, 181, 24, 172, 2, // 6293: decode to VSTRCZF using decoder 300 |
| 5996 | // 6293: } else try { |
| 5997 | OPC_CheckPredicate, 39, // 6298: check predicate 39 |
| 5998 | OPC_Decode, 175, 24, 173, 2, // 6300: decode to VSTRCF using decoder 301 |
| 5999 | // 6300: } |
| 6000 | // 6300: } |
| 6001 | // 6300: } // switch Inst[27:24] |
| 6002 | // 6300: } else try { |
| 6003 | OPC_CheckPredicate, 39, // 6305: check predicate 39 |
| 6004 | OPC_Decode, 172, 24, 174, 2, // 6307: decode to VSTRC using decoder 302 |
| 6005 | // 6307: } |
| 6006 | // 6307: } |
| 6007 | 139, 1, 75, // 6312: case 0x8b: { |
| 6008 | OPC_CheckField, 16, 4, 0, // 6315: check Inst[19:16] == 0x0 |
| 6009 | OPC_Scope, 30, // 6319: try { |
| 6010 | OPC_SwitchField, 20, 8, // 6321: switch Inst[27:20] { |
| 6011 | 2, 7, // 6324: case 0x2: { |
| 6012 | OPC_CheckPredicate, 33, // 6326: check predicate 33 |
| 6013 | OPC_Decode, 191, 24, 168, 2, // 6328: decode to VSTRSZB using decoder 296 |
| 6014 | // 6328: } |
| 6015 | 18, 7, // 6333: case 0x12: { |
| 6016 | OPC_CheckPredicate, 33, // 6335: check predicate 33 |
| 6017 | OPC_Decode, 193, 24, 168, 2, // 6337: decode to VSTRSZH using decoder 296 |
| 6018 | // 6337: } |
| 6019 | 34, 0, // 6342: case 0x22: { |
| 6020 | OPC_CheckPredicate, 33, // 6344: check predicate 33 |
| 6021 | OPC_Decode, 192, 24, 168, 2, // 6346: decode to VSTRSZF using decoder 296 |
| 6022 | // 6346: } |
| 6023 | // 6346: } // switch Inst[27:20] |
| 6024 | OPC_Scope, 30, // 6351: } else try { |
| 6025 | OPC_SwitchField, 24, 4, // 6353: switch Inst[27:24] { |
| 6026 | 0, 7, // 6356: case 0x0: { |
| 6027 | OPC_CheckPredicate, 33, // 6358: check predicate 33 |
| 6028 | OPC_Decode, 188, 24, 173, 2, // 6360: decode to VSTRSB using decoder 301 |
| 6029 | // 6360: } |
| 6030 | 1, 7, // 6365: case 0x1: { |
| 6031 | OPC_CheckPredicate, 33, // 6367: check predicate 33 |
| 6032 | OPC_Decode, 190, 24, 173, 2, // 6369: decode to VSTRSH using decoder 301 |
| 6033 | // 6369: } |
| 6034 | 2, 0, // 6374: case 0x2: { |
| 6035 | OPC_CheckPredicate, 33, // 6376: check predicate 33 |
| 6036 | OPC_Decode, 189, 24, 173, 2, // 6378: decode to VSTRSF using decoder 301 |
| 6037 | // 6378: } |
| 6038 | // 6378: } // switch Inst[27:24] |
| 6039 | // 6378: } else try { |
| 6040 | OPC_CheckPredicate, 33, // 6383: check predicate 33 |
| 6041 | OPC_Decode, 187, 24, 174, 2, // 6385: decode to VSTRS using decoder 302 |
| 6042 | // 6385: } |
| 6043 | // 6385: } |
| 6044 | 140, 1, 11, // 6390: case 0x8c: { |
| 6045 | OPC_CheckPredicate, 39, // 6393: check predicate 39 |
| 6046 | OPC_CheckField, 16, 12, 0, // 6395: check Inst[27:16] == 0x0 |
| 6047 | OPC_Decode, 192, 23, 168, 2, // 6399: decode to VPERM using decoder 296 |
| 6048 | // 6399: } |
| 6049 | 141, 1, 11, // 6404: case 0x8d: { |
| 6050 | OPC_CheckPredicate, 39, // 6407: check predicate 39 |
| 6051 | OPC_CheckField, 16, 12, 0, // 6409: check Inst[27:16] == 0x0 |
| 6052 | OPC_Decode, 134, 24, 168, 2, // 6413: decode to VSEL using decoder 296 |
| 6053 | // 6413: } |
| 6054 | 142, 1, 75, // 6418: case 0x8e: { |
| 6055 | OPC_CheckField, 20, 4, 0, // 6421: check Inst[23:20] == 0x0 |
| 6056 | OPC_Scope, 62, // 6425: try { |
| 6057 | OPC_SwitchField, 24, 4, // 6427: switch Inst[27:24] { |
| 6058 | 2, 21, // 6430: case 0x2: { |
| 6059 | OPC_SwitchField, 16, 4, // 6432: switch Inst[19:16] { |
| 6060 | 0, 7, // 6435: case 0x0: { |
| 6061 | OPC_CheckPredicate, 40, // 6437: check predicate 40 |
| 6062 | OPC_Decode, 198, 21, 168, 2, // 6439: decode to VFMSSB using decoder 296 |
| 6063 | // 6439: } |
| 6064 | 8, 0, // 6444: case 0x8: { |
| 6065 | OPC_CheckPredicate, 40, // 6446: check predicate 40 |
| 6066 | OPC_Decode, 190, 25, 175, 2, // 6448: decode to WFMSSB using decoder 303 |
| 6067 | // 6448: } |
| 6068 | // 6448: } // switch Inst[19:16] |
| 6069 | // 6448: } |
| 6070 | 3, 21, // 6453: case 0x3: { |
| 6071 | OPC_SwitchField, 16, 4, // 6455: switch Inst[19:16] { |
| 6072 | 0, 7, // 6458: case 0x0: { |
| 6073 | OPC_CheckPredicate, 39, // 6460: check predicate 39 |
| 6074 | OPC_Decode, 197, 21, 168, 2, // 6462: decode to VFMSDB using decoder 296 |
| 6075 | // 6462: } |
| 6076 | 8, 0, // 6467: case 0x8: { |
| 6077 | OPC_CheckPredicate, 39, // 6469: check predicate 39 |
| 6078 | OPC_Decode, 189, 25, 176, 2, // 6471: decode to WFMSDB using decoder 304 |
| 6079 | // 6471: } |
| 6080 | // 6471: } // switch Inst[19:16] |
| 6081 | // 6471: } |
| 6082 | 4, 0, // 6476: case 0x4: { |
| 6083 | OPC_CheckPredicate, 40, // 6478: check predicate 40 |
| 6084 | OPC_CheckField, 16, 4, 8, // 6480: check Inst[19:16] == 0x8 |
| 6085 | OPC_Decode, 191, 25, 168, 2, // 6484: decode to WFMSXB using decoder 296 |
| 6086 | // 6484: } |
| 6087 | // 6484: } // switch Inst[27:24] |
| 6088 | // 6484: } else try { |
| 6089 | OPC_CheckPredicate, 39, // 6489: check predicate 39 |
| 6090 | OPC_Decode, 195, 21, 177, 2, // 6491: decode to VFMS using decoder 305 |
| 6091 | // 6491: } |
| 6092 | // 6491: } |
| 6093 | 143, 1, 75, // 6496: case 0x8f: { |
| 6094 | OPC_CheckField, 20, 4, 0, // 6499: check Inst[23:20] == 0x0 |
| 6095 | OPC_Scope, 62, // 6503: try { |
| 6096 | OPC_SwitchField, 24, 4, // 6505: switch Inst[27:24] { |
| 6097 | 2, 21, // 6508: case 0x2: { |
| 6098 | OPC_SwitchField, 16, 4, // 6510: switch Inst[19:16] { |
| 6099 | 0, 7, // 6513: case 0x0: { |
| 6100 | OPC_CheckPredicate, 40, // 6515: check predicate 40 |
| 6101 | OPC_Decode, 187, 21, 168, 2, // 6517: decode to VFMASB using decoder 296 |
| 6102 | // 6517: } |
| 6103 | 8, 0, // 6522: case 0x8: { |
| 6104 | OPC_CheckPredicate, 40, // 6524: check predicate 40 |
| 6105 | OPC_Decode, 179, 25, 175, 2, // 6526: decode to WFMASB using decoder 303 |
| 6106 | // 6526: } |
| 6107 | // 6526: } // switch Inst[19:16] |
| 6108 | // 6526: } |
| 6109 | 3, 21, // 6531: case 0x3: { |
| 6110 | OPC_SwitchField, 16, 4, // 6533: switch Inst[19:16] { |
| 6111 | 0, 7, // 6536: case 0x0: { |
| 6112 | OPC_CheckPredicate, 39, // 6538: check predicate 39 |
| 6113 | OPC_Decode, 186, 21, 168, 2, // 6540: decode to VFMADB using decoder 296 |
| 6114 | // 6540: } |
| 6115 | 8, 0, // 6545: case 0x8: { |
| 6116 | OPC_CheckPredicate, 39, // 6547: check predicate 39 |
| 6117 | OPC_Decode, 178, 25, 176, 2, // 6549: decode to WFMADB using decoder 304 |
| 6118 | // 6549: } |
| 6119 | // 6549: } // switch Inst[19:16] |
| 6120 | // 6549: } |
| 6121 | 4, 0, // 6554: case 0x4: { |
| 6122 | OPC_CheckPredicate, 40, // 6556: check predicate 40 |
| 6123 | OPC_CheckField, 16, 4, 8, // 6558: check Inst[19:16] == 0x8 |
| 6124 | OPC_Decode, 180, 25, 168, 2, // 6562: decode to WFMAXB using decoder 296 |
| 6125 | // 6562: } |
| 6126 | // 6562: } // switch Inst[27:24] |
| 6127 | // 6562: } else try { |
| 6128 | OPC_CheckPredicate, 39, // 6567: check predicate 39 |
| 6129 | OPC_Decode, 185, 21, 177, 2, // 6569: decode to VFMA using decoder 305 |
| 6130 | // 6569: } |
| 6131 | // 6569: } |
| 6132 | 148, 1, 47, // 6574: case 0x94: { |
| 6133 | OPC_CheckField, 8, 1, 0, // 6577: check Inst[8] == 0x0 |
| 6134 | OPC_CheckField, 16, 12, 0, // 6581: check Inst[27:16] == 0x0 |
| 6135 | OPC_Scope, 30, // 6585: try { |
| 6136 | OPC_SwitchField, 12, 4, // 6587: switch Inst[15:12] { |
| 6137 | 1, 7, // 6590: case 0x1: { |
| 6138 | OPC_CheckPredicate, 39, // 6592: check predicate 39 |
| 6139 | OPC_Decode, 196, 23, 250, 1, // 6594: decode to VPKH using decoder 250 |
| 6140 | // 6594: } |
| 6141 | 2, 7, // 6599: case 0x2: { |
| 6142 | OPC_CheckPredicate, 39, // 6601: check predicate 39 |
| 6143 | OPC_Decode, 194, 23, 250, 1, // 6603: decode to VPKF using decoder 250 |
| 6144 | // 6603: } |
| 6145 | 3, 0, // 6608: case 0x3: { |
| 6146 | OPC_CheckPredicate, 39, // 6610: check predicate 39 |
| 6147 | OPC_Decode, 195, 23, 250, 1, // 6612: decode to VPKG using decoder 250 |
| 6148 | // 6612: } |
| 6149 | // 6612: } // switch Inst[15:12] |
| 6150 | // 6612: } else try { |
| 6151 | OPC_CheckPredicate, 39, // 6617: check predicate 39 |
| 6152 | OPC_Decode, 193, 23, 159, 2, // 6619: decode to VPK using decoder 287 |
| 6153 | // 6619: } |
| 6154 | // 6619: } |
| 6155 | 149, 1, 93, // 6624: case 0x95: { |
| 6156 | OPC_CheckField, 8, 1, 0, // 6627: check Inst[8] == 0x0 |
| 6157 | OPC_CheckField, 16, 4, 0, // 6631: check Inst[19:16] == 0x0 |
| 6158 | OPC_CheckField, 24, 4, 0, // 6635: check Inst[27:24] == 0x0 |
| 6159 | OPC_Scope, 72, // 6639: try { |
| 6160 | OPC_SwitchField, 12, 4, // 6641: switch Inst[15:12] { |
| 6161 | 1, 21, // 6644: case 0x1: { |
| 6162 | OPC_SwitchField, 20, 4, // 6646: switch Inst[23:20] { |
| 6163 | 0, 7, // 6649: case 0x0: { |
| 6164 | OPC_CheckPredicate, 39, // 6651: check predicate 39 |
| 6165 | OPC_Decode, 202, 23, 250, 1, // 6653: decode to VPKLSH using decoder 250 |
| 6166 | // 6653: } |
| 6167 | 1, 0, // 6658: case 0x1: { |
| 6168 | OPC_CheckPredicate, 39, // 6660: check predicate 39 |
| 6169 | OPC_Decode, 203, 23, 250, 1, // 6662: decode to VPKLSHS using decoder 250 |
| 6170 | // 6662: } |
| 6171 | // 6662: } // switch Inst[23:20] |
| 6172 | // 6662: } |
| 6173 | 2, 21, // 6667: case 0x2: { |
| 6174 | OPC_SwitchField, 20, 4, // 6669: switch Inst[23:20] { |
| 6175 | 0, 7, // 6672: case 0x0: { |
| 6176 | OPC_CheckPredicate, 39, // 6674: check predicate 39 |
| 6177 | OPC_Decode, 198, 23, 250, 1, // 6676: decode to VPKLSF using decoder 250 |
| 6178 | // 6676: } |
| 6179 | 1, 0, // 6681: case 0x1: { |
| 6180 | OPC_CheckPredicate, 39, // 6683: check predicate 39 |
| 6181 | OPC_Decode, 199, 23, 250, 1, // 6685: decode to VPKLSFS using decoder 250 |
| 6182 | // 6685: } |
| 6183 | // 6685: } // switch Inst[23:20] |
| 6184 | // 6685: } |
| 6185 | 3, 0, // 6690: case 0x3: { |
| 6186 | OPC_SwitchField, 20, 4, // 6692: switch Inst[23:20] { |
| 6187 | 0, 7, // 6695: case 0x0: { |
| 6188 | OPC_CheckPredicate, 39, // 6697: check predicate 39 |
| 6189 | OPC_Decode, 200, 23, 250, 1, // 6699: decode to VPKLSG using decoder 250 |
| 6190 | // 6699: } |
| 6191 | 1, 0, // 6704: case 0x1: { |
| 6192 | OPC_CheckPredicate, 39, // 6706: check predicate 39 |
| 6193 | OPC_Decode, 201, 23, 250, 1, // 6708: decode to VPKLSGS using decoder 250 |
| 6194 | // 6708: } |
| 6195 | // 6708: } // switch Inst[23:20] |
| 6196 | // 6708: } |
| 6197 | // 6708: } // switch Inst[15:12] |
| 6198 | // 6708: } else try { |
| 6199 | OPC_CheckPredicate, 39, // 6713: check predicate 39 |
| 6200 | OPC_Decode, 197, 23, 247, 1, // 6715: decode to VPKLS using decoder 247 |
| 6201 | // 6715: } |
| 6202 | // 6715: } |
| 6203 | 151, 1, 93, // 6720: case 0x97: { |
| 6204 | OPC_CheckField, 8, 1, 0, // 6723: check Inst[8] == 0x0 |
| 6205 | OPC_CheckField, 16, 4, 0, // 6727: check Inst[19:16] == 0x0 |
| 6206 | OPC_CheckField, 24, 4, 0, // 6731: check Inst[27:24] == 0x0 |
| 6207 | OPC_Scope, 72, // 6735: try { |
| 6208 | OPC_SwitchField, 12, 4, // 6737: switch Inst[15:12] { |
| 6209 | 1, 21, // 6740: case 0x1: { |
| 6210 | OPC_SwitchField, 20, 4, // 6742: switch Inst[23:20] { |
| 6211 | 0, 7, // 6745: case 0x0: { |
| 6212 | OPC_CheckPredicate, 39, // 6747: check predicate 39 |
| 6213 | OPC_Decode, 209, 23, 250, 1, // 6749: decode to VPKSH using decoder 250 |
| 6214 | // 6749: } |
| 6215 | 1, 0, // 6754: case 0x1: { |
| 6216 | OPC_CheckPredicate, 39, // 6756: check predicate 39 |
| 6217 | OPC_Decode, 210, 23, 250, 1, // 6758: decode to VPKSHS using decoder 250 |
| 6218 | // 6758: } |
| 6219 | // 6758: } // switch Inst[23:20] |
| 6220 | // 6758: } |
| 6221 | 2, 21, // 6763: case 0x2: { |
| 6222 | OPC_SwitchField, 20, 4, // 6765: switch Inst[23:20] { |
| 6223 | 0, 7, // 6768: case 0x0: { |
| 6224 | OPC_CheckPredicate, 39, // 6770: check predicate 39 |
| 6225 | OPC_Decode, 205, 23, 250, 1, // 6772: decode to VPKSF using decoder 250 |
| 6226 | // 6772: } |
| 6227 | 1, 0, // 6777: case 0x1: { |
| 6228 | OPC_CheckPredicate, 39, // 6779: check predicate 39 |
| 6229 | OPC_Decode, 206, 23, 250, 1, // 6781: decode to VPKSFS using decoder 250 |
| 6230 | // 6781: } |
| 6231 | // 6781: } // switch Inst[23:20] |
| 6232 | // 6781: } |
| 6233 | 3, 0, // 6786: case 0x3: { |
| 6234 | OPC_SwitchField, 20, 4, // 6788: switch Inst[23:20] { |
| 6235 | 0, 7, // 6791: case 0x0: { |
| 6236 | OPC_CheckPredicate, 39, // 6793: check predicate 39 |
| 6237 | OPC_Decode, 207, 23, 250, 1, // 6795: decode to VPKSG using decoder 250 |
| 6238 | // 6795: } |
| 6239 | 1, 0, // 6800: case 0x1: { |
| 6240 | OPC_CheckPredicate, 39, // 6802: check predicate 39 |
| 6241 | OPC_Decode, 208, 23, 250, 1, // 6804: decode to VPKSGS using decoder 250 |
| 6242 | // 6804: } |
| 6243 | // 6804: } // switch Inst[23:20] |
| 6244 | // 6804: } |
| 6245 | // 6804: } // switch Inst[15:12] |
| 6246 | // 6804: } else try { |
| 6247 | OPC_CheckPredicate, 39, // 6809: check predicate 39 |
| 6248 | OPC_Decode, 204, 23, 247, 1, // 6811: decode to VPKS using decoder 247 |
| 6249 | // 6811: } |
| 6250 | // 6811: } |
| 6251 | 158, 1, 75, // 6816: case 0x9e: { |
| 6252 | OPC_CheckField, 20, 4, 0, // 6819: check Inst[23:20] == 0x0 |
| 6253 | OPC_Scope, 62, // 6823: try { |
| 6254 | OPC_SwitchField, 24, 4, // 6825: switch Inst[27:24] { |
| 6255 | 2, 21, // 6828: case 0x2: { |
| 6256 | OPC_SwitchField, 16, 4, // 6830: switch Inst[19:16] { |
| 6257 | 0, 7, // 6833: case 0x0: { |
| 6258 | OPC_CheckPredicate, 40, // 6835: check predicate 40 |
| 6259 | OPC_Decode, 204, 21, 168, 2, // 6837: decode to VFNMSSB using decoder 296 |
| 6260 | // 6837: } |
| 6261 | 8, 0, // 6842: case 0x8: { |
| 6262 | OPC_CheckPredicate, 40, // 6844: check predicate 40 |
| 6263 | OPC_Decode, 197, 25, 175, 2, // 6846: decode to WFNMSSB using decoder 303 |
| 6264 | // 6846: } |
| 6265 | // 6846: } // switch Inst[19:16] |
| 6266 | // 6846: } |
| 6267 | 3, 21, // 6851: case 0x3: { |
| 6268 | OPC_SwitchField, 16, 4, // 6853: switch Inst[19:16] { |
| 6269 | 0, 7, // 6856: case 0x0: { |
| 6270 | OPC_CheckPredicate, 40, // 6858: check predicate 40 |
| 6271 | OPC_Decode, 203, 21, 168, 2, // 6860: decode to VFNMSDB using decoder 296 |
| 6272 | // 6860: } |
| 6273 | 8, 0, // 6865: case 0x8: { |
| 6274 | OPC_CheckPredicate, 40, // 6867: check predicate 40 |
| 6275 | OPC_Decode, 196, 25, 176, 2, // 6869: decode to WFNMSDB using decoder 304 |
| 6276 | // 6869: } |
| 6277 | // 6869: } // switch Inst[19:16] |
| 6278 | // 6869: } |
| 6279 | 4, 0, // 6874: case 0x4: { |
| 6280 | OPC_CheckPredicate, 40, // 6876: check predicate 40 |
| 6281 | OPC_CheckField, 16, 4, 8, // 6878: check Inst[19:16] == 0x8 |
| 6282 | OPC_Decode, 198, 25, 168, 2, // 6882: decode to WFNMSXB using decoder 296 |
| 6283 | // 6882: } |
| 6284 | // 6882: } // switch Inst[27:24] |
| 6285 | // 6882: } else try { |
| 6286 | OPC_CheckPredicate, 40, // 6887: check predicate 40 |
| 6287 | OPC_Decode, 202, 21, 177, 2, // 6889: decode to VFNMS using decoder 305 |
| 6288 | // 6889: } |
| 6289 | // 6889: } |
| 6290 | 159, 1, 75, // 6894: case 0x9f: { |
| 6291 | OPC_CheckField, 20, 4, 0, // 6897: check Inst[23:20] == 0x0 |
| 6292 | OPC_Scope, 62, // 6901: try { |
| 6293 | OPC_SwitchField, 24, 4, // 6903: switch Inst[27:24] { |
| 6294 | 2, 21, // 6906: case 0x2: { |
| 6295 | OPC_SwitchField, 16, 4, // 6908: switch Inst[19:16] { |
| 6296 | 0, 7, // 6911: case 0x0: { |
| 6297 | OPC_CheckPredicate, 40, // 6913: check predicate 40 |
| 6298 | OPC_Decode, 201, 21, 168, 2, // 6915: decode to VFNMASB using decoder 296 |
| 6299 | // 6915: } |
| 6300 | 8, 0, // 6920: case 0x8: { |
| 6301 | OPC_CheckPredicate, 40, // 6922: check predicate 40 |
| 6302 | OPC_Decode, 194, 25, 175, 2, // 6924: decode to WFNMASB using decoder 303 |
| 6303 | // 6924: } |
| 6304 | // 6924: } // switch Inst[19:16] |
| 6305 | // 6924: } |
| 6306 | 3, 21, // 6929: case 0x3: { |
| 6307 | OPC_SwitchField, 16, 4, // 6931: switch Inst[19:16] { |
| 6308 | 0, 7, // 6934: case 0x0: { |
| 6309 | OPC_CheckPredicate, 40, // 6936: check predicate 40 |
| 6310 | OPC_Decode, 200, 21, 168, 2, // 6938: decode to VFNMADB using decoder 296 |
| 6311 | // 6938: } |
| 6312 | 8, 0, // 6943: case 0x8: { |
| 6313 | OPC_CheckPredicate, 40, // 6945: check predicate 40 |
| 6314 | OPC_Decode, 193, 25, 176, 2, // 6947: decode to WFNMADB using decoder 304 |
| 6315 | // 6947: } |
| 6316 | // 6947: } // switch Inst[19:16] |
| 6317 | // 6947: } |
| 6318 | 4, 0, // 6952: case 0x4: { |
| 6319 | OPC_CheckPredicate, 40, // 6954: check predicate 40 |
| 6320 | OPC_CheckField, 16, 4, 8, // 6956: check Inst[19:16] == 0x8 |
| 6321 | OPC_Decode, 195, 25, 168, 2, // 6960: decode to WFNMAXB using decoder 296 |
| 6322 | // 6960: } |
| 6323 | // 6960: } // switch Inst[27:24] |
| 6324 | // 6960: } else try { |
| 6325 | OPC_CheckPredicate, 40, // 6965: check predicate 40 |
| 6326 | OPC_Decode, 199, 21, 177, 2, // 6967: decode to VFNMA using decoder 305 |
| 6327 | // 6967: } |
| 6328 | // 6967: } |
| 6329 | 161, 1, 65, // 6972: case 0xa1: { |
| 6330 | OPC_CheckField, 8, 1, 0, // 6975: check Inst[8] == 0x0 |
| 6331 | OPC_CheckField, 16, 12, 0, // 6979: check Inst[27:16] == 0x0 |
| 6332 | OPC_Scope, 48, // 6983: try { |
| 6333 | OPC_SwitchField, 12, 4, // 6985: switch Inst[15:12] { |
| 6334 | 0, 7, // 6988: case 0x0: { |
| 6335 | OPC_CheckPredicate, 39, // 6990: check predicate 39 |
| 6336 | OPC_Decode, 128, 23, 250, 1, // 6992: decode to VMLHB using decoder 250 |
| 6337 | // 6992: } |
| 6338 | 1, 7, // 6997: case 0x1: { |
| 6339 | OPC_CheckPredicate, 39, // 6999: check predicate 39 |
| 6340 | OPC_Decode, 131, 23, 250, 1, // 7001: decode to VMLHH using decoder 250 |
| 6341 | // 7001: } |
| 6342 | 2, 7, // 7006: case 0x2: { |
| 6343 | OPC_CheckPredicate, 39, // 7008: check predicate 39 |
| 6344 | OPC_Decode, 129, 23, 250, 1, // 7010: decode to VMLHF using decoder 250 |
| 6345 | // 7010: } |
| 6346 | 3, 7, // 7015: case 0x3: { |
| 6347 | OPC_CheckPredicate, 41, // 7017: check predicate 41 |
| 6348 | OPC_Decode, 130, 23, 250, 1, // 7019: decode to VMLHG using decoder 250 |
| 6349 | // 7019: } |
| 6350 | 4, 0, // 7024: case 0x4: { |
| 6351 | OPC_CheckPredicate, 41, // 7026: check predicate 41 |
| 6352 | OPC_Decode, 132, 23, 250, 1, // 7028: decode to VMLHQ using decoder 250 |
| 6353 | // 7028: } |
| 6354 | // 7028: } // switch Inst[15:12] |
| 6355 | // 7028: } else try { |
| 6356 | OPC_CheckPredicate, 39, // 7033: check predicate 39 |
| 6357 | OPC_Decode, 255, 22, 159, 2, // 7035: decode to VMLH using decoder 287 |
| 6358 | // 7035: } |
| 6359 | // 7035: } |
| 6360 | 162, 1, 65, // 7040: case 0xa2: { |
| 6361 | OPC_CheckField, 8, 1, 0, // 7043: check Inst[8] == 0x0 |
| 6362 | OPC_CheckField, 16, 12, 0, // 7047: check Inst[27:16] == 0x0 |
| 6363 | OPC_Scope, 48, // 7051: try { |
| 6364 | OPC_SwitchField, 12, 4, // 7053: switch Inst[15:12] { |
| 6365 | 0, 7, // 7056: case 0x0: { |
| 6366 | OPC_CheckPredicate, 39, // 7058: check predicate 39 |
| 6367 | OPC_Decode, 247, 22, 250, 1, // 7060: decode to VMLB using decoder 250 |
| 6368 | // 7060: } |
| 6369 | 1, 7, // 7065: case 0x1: { |
| 6370 | OPC_CheckPredicate, 39, // 7067: check predicate 39 |
| 6371 | OPC_Decode, 133, 23, 250, 1, // 7069: decode to VMLHW using decoder 250 |
| 6372 | // 7069: } |
| 6373 | 2, 7, // 7074: case 0x2: { |
| 6374 | OPC_CheckPredicate, 39, // 7076: check predicate 39 |
| 6375 | OPC_Decode, 253, 22, 250, 1, // 7078: decode to VMLF using decoder 250 |
| 6376 | // 7078: } |
| 6377 | 3, 7, // 7083: case 0x3: { |
| 6378 | OPC_CheckPredicate, 41, // 7085: check predicate 41 |
| 6379 | OPC_Decode, 254, 22, 250, 1, // 7087: decode to VMLG using decoder 250 |
| 6380 | // 7087: } |
| 6381 | 4, 0, // 7092: case 0x4: { |
| 6382 | OPC_CheckPredicate, 41, // 7094: check predicate 41 |
| 6383 | OPC_Decode, 139, 23, 250, 1, // 7096: decode to VMLQ using decoder 250 |
| 6384 | // 7096: } |
| 6385 | // 7096: } // switch Inst[15:12] |
| 6386 | // 7096: } else try { |
| 6387 | OPC_CheckPredicate, 39, // 7101: check predicate 39 |
| 6388 | OPC_Decode, 246, 22, 159, 2, // 7103: decode to VML using decoder 287 |
| 6389 | // 7103: } |
| 6390 | // 7103: } |
| 6391 | 163, 1, 65, // 7108: case 0xa3: { |
| 6392 | OPC_CheckField, 8, 1, 0, // 7111: check Inst[8] == 0x0 |
| 6393 | OPC_CheckField, 16, 12, 0, // 7115: check Inst[27:16] == 0x0 |
| 6394 | OPC_Scope, 48, // 7119: try { |
| 6395 | OPC_SwitchField, 12, 4, // 7121: switch Inst[15:12] { |
| 6396 | 0, 7, // 7124: case 0x0: { |
| 6397 | OPC_CheckPredicate, 39, // 7126: check predicate 39 |
| 6398 | OPC_Decode, 241, 22, 250, 1, // 7128: decode to VMHB using decoder 250 |
| 6399 | // 7128: } |
| 6400 | 1, 7, // 7133: case 0x1: { |
| 6401 | OPC_CheckPredicate, 39, // 7135: check predicate 39 |
| 6402 | OPC_Decode, 244, 22, 250, 1, // 7137: decode to VMHH using decoder 250 |
| 6403 | // 7137: } |
| 6404 | 2, 7, // 7142: case 0x2: { |
| 6405 | OPC_CheckPredicate, 39, // 7144: check predicate 39 |
| 6406 | OPC_Decode, 242, 22, 250, 1, // 7146: decode to VMHF using decoder 250 |
| 6407 | // 7146: } |
| 6408 | 3, 7, // 7151: case 0x3: { |
| 6409 | OPC_CheckPredicate, 41, // 7153: check predicate 41 |
| 6410 | OPC_Decode, 243, 22, 250, 1, // 7155: decode to VMHG using decoder 250 |
| 6411 | // 7155: } |
| 6412 | 4, 0, // 7160: case 0x4: { |
| 6413 | OPC_CheckPredicate, 41, // 7162: check predicate 41 |
| 6414 | OPC_Decode, 245, 22, 250, 1, // 7164: decode to VMHQ using decoder 250 |
| 6415 | // 7164: } |
| 6416 | // 7164: } // switch Inst[15:12] |
| 6417 | // 7164: } else try { |
| 6418 | OPC_CheckPredicate, 39, // 7169: check predicate 39 |
| 6419 | OPC_Decode, 240, 22, 159, 2, // 7171: decode to VMH using decoder 287 |
| 6420 | // 7171: } |
| 6421 | // 7171: } |
| 6422 | 164, 1, 56, // 7176: case 0xa4: { |
| 6423 | OPC_CheckField, 8, 1, 0, // 7179: check Inst[8] == 0x0 |
| 6424 | OPC_CheckField, 16, 12, 0, // 7183: check Inst[27:16] == 0x0 |
| 6425 | OPC_Scope, 39, // 7187: try { |
| 6426 | OPC_SwitchField, 12, 4, // 7189: switch Inst[15:12] { |
| 6427 | 0, 7, // 7192: case 0x0: { |
| 6428 | OPC_CheckPredicate, 39, // 7194: check predicate 39 |
| 6429 | OPC_Decode, 249, 22, 250, 1, // 7196: decode to VMLEB using decoder 250 |
| 6430 | // 7196: } |
| 6431 | 1, 7, // 7201: case 0x1: { |
| 6432 | OPC_CheckPredicate, 39, // 7203: check predicate 39 |
| 6433 | OPC_Decode, 252, 22, 250, 1, // 7205: decode to VMLEH using decoder 250 |
| 6434 | // 7205: } |
| 6435 | 2, 7, // 7210: case 0x2: { |
| 6436 | OPC_CheckPredicate, 39, // 7212: check predicate 39 |
| 6437 | OPC_Decode, 250, 22, 250, 1, // 7214: decode to VMLEF using decoder 250 |
| 6438 | // 7214: } |
| 6439 | 3, 0, // 7219: case 0x3: { |
| 6440 | OPC_CheckPredicate, 41, // 7221: check predicate 41 |
| 6441 | OPC_Decode, 251, 22, 250, 1, // 7223: decode to VMLEG using decoder 250 |
| 6442 | // 7223: } |
| 6443 | // 7223: } // switch Inst[15:12] |
| 6444 | // 7223: } else try { |
| 6445 | OPC_CheckPredicate, 39, // 7228: check predicate 39 |
| 6446 | OPC_Decode, 248, 22, 159, 2, // 7230: decode to VMLE using decoder 287 |
| 6447 | // 7230: } |
| 6448 | // 7230: } |
| 6449 | 165, 1, 56, // 7235: case 0xa5: { |
| 6450 | OPC_CheckField, 8, 1, 0, // 7238: check Inst[8] == 0x0 |
| 6451 | OPC_CheckField, 16, 12, 0, // 7242: check Inst[27:16] == 0x0 |
| 6452 | OPC_Scope, 39, // 7246: try { |
| 6453 | OPC_SwitchField, 12, 4, // 7248: switch Inst[15:12] { |
| 6454 | 0, 7, // 7251: case 0x0: { |
| 6455 | OPC_CheckPredicate, 39, // 7253: check predicate 39 |
| 6456 | OPC_Decode, 135, 23, 250, 1, // 7255: decode to VMLOB using decoder 250 |
| 6457 | // 7255: } |
| 6458 | 1, 7, // 7260: case 0x1: { |
| 6459 | OPC_CheckPredicate, 39, // 7262: check predicate 39 |
| 6460 | OPC_Decode, 138, 23, 250, 1, // 7264: decode to VMLOH using decoder 250 |
| 6461 | // 7264: } |
| 6462 | 2, 7, // 7269: case 0x2: { |
| 6463 | OPC_CheckPredicate, 39, // 7271: check predicate 39 |
| 6464 | OPC_Decode, 136, 23, 250, 1, // 7273: decode to VMLOF using decoder 250 |
| 6465 | // 7273: } |
| 6466 | 3, 0, // 7278: case 0x3: { |
| 6467 | OPC_CheckPredicate, 41, // 7280: check predicate 41 |
| 6468 | OPC_Decode, 137, 23, 250, 1, // 7282: decode to VMLOG using decoder 250 |
| 6469 | // 7282: } |
| 6470 | // 7282: } // switch Inst[15:12] |
| 6471 | // 7282: } else try { |
| 6472 | OPC_CheckPredicate, 39, // 7287: check predicate 39 |
| 6473 | OPC_Decode, 134, 23, 159, 2, // 7289: decode to VMLO using decoder 287 |
| 6474 | // 7289: } |
| 6475 | // 7289: } |
| 6476 | 166, 1, 56, // 7294: case 0xa6: { |
| 6477 | OPC_CheckField, 8, 1, 0, // 7297: check Inst[8] == 0x0 |
| 6478 | OPC_CheckField, 16, 12, 0, // 7301: check Inst[27:16] == 0x0 |
| 6479 | OPC_Scope, 39, // 7305: try { |
| 6480 | OPC_SwitchField, 12, 4, // 7307: switch Inst[15:12] { |
| 6481 | 0, 7, // 7310: case 0x0: { |
| 6482 | OPC_CheckPredicate, 39, // 7312: check predicate 39 |
| 6483 | OPC_Decode, 236, 22, 250, 1, // 7314: decode to VMEB using decoder 250 |
| 6484 | // 7314: } |
| 6485 | 1, 7, // 7319: case 0x1: { |
| 6486 | OPC_CheckPredicate, 39, // 7321: check predicate 39 |
| 6487 | OPC_Decode, 239, 22, 250, 1, // 7323: decode to VMEH using decoder 250 |
| 6488 | // 7323: } |
| 6489 | 2, 7, // 7328: case 0x2: { |
| 6490 | OPC_CheckPredicate, 39, // 7330: check predicate 39 |
| 6491 | OPC_Decode, 237, 22, 250, 1, // 7332: decode to VMEF using decoder 250 |
| 6492 | // 7332: } |
| 6493 | 3, 0, // 7337: case 0x3: { |
| 6494 | OPC_CheckPredicate, 41, // 7339: check predicate 41 |
| 6495 | OPC_Decode, 238, 22, 250, 1, // 7341: decode to VMEG using decoder 250 |
| 6496 | // 7341: } |
| 6497 | // 7341: } // switch Inst[15:12] |
| 6498 | // 7341: } else try { |
| 6499 | OPC_CheckPredicate, 39, // 7346: check predicate 39 |
| 6500 | OPC_Decode, 235, 22, 159, 2, // 7348: decode to VME using decoder 287 |
| 6501 | // 7348: } |
| 6502 | // 7348: } |
| 6503 | 167, 1, 56, // 7353: case 0xa7: { |
| 6504 | OPC_CheckField, 8, 1, 0, // 7356: check Inst[8] == 0x0 |
| 6505 | OPC_CheckField, 16, 12, 0, // 7360: check Inst[27:16] == 0x0 |
| 6506 | OPC_Scope, 39, // 7364: try { |
| 6507 | OPC_SwitchField, 12, 4, // 7366: switch Inst[15:12] { |
| 6508 | 0, 7, // 7369: case 0x0: { |
| 6509 | OPC_CheckPredicate, 39, // 7371: check predicate 39 |
| 6510 | OPC_Decode, 153, 23, 250, 1, // 7373: decode to VMOB using decoder 250 |
| 6511 | // 7373: } |
| 6512 | 1, 7, // 7378: case 0x1: { |
| 6513 | OPC_CheckPredicate, 39, // 7380: check predicate 39 |
| 6514 | OPC_Decode, 156, 23, 250, 1, // 7382: decode to VMOH using decoder 250 |
| 6515 | // 7382: } |
| 6516 | 2, 7, // 7387: case 0x2: { |
| 6517 | OPC_CheckPredicate, 39, // 7389: check predicate 39 |
| 6518 | OPC_Decode, 154, 23, 250, 1, // 7391: decode to VMOF using decoder 250 |
| 6519 | // 7391: } |
| 6520 | 3, 0, // 7396: case 0x3: { |
| 6521 | OPC_CheckPredicate, 41, // 7398: check predicate 41 |
| 6522 | OPC_Decode, 155, 23, 250, 1, // 7400: decode to VMOG using decoder 250 |
| 6523 | // 7400: } |
| 6524 | // 7400: } // switch Inst[15:12] |
| 6525 | // 7400: } else try { |
| 6526 | OPC_CheckPredicate, 39, // 7405: check predicate 39 |
| 6527 | OPC_Decode, 152, 23, 159, 2, // 7407: decode to VMO using decoder 287 |
| 6528 | // 7407: } |
| 6529 | // 7407: } |
| 6530 | 169, 1, 61, // 7412: case 0xa9: { |
| 6531 | OPC_CheckField, 16, 8, 0, // 7415: check Inst[23:16] == 0x0 |
| 6532 | OPC_Scope, 48, // 7419: try { |
| 6533 | OPC_SwitchField, 24, 4, // 7421: switch Inst[27:24] { |
| 6534 | 0, 7, // 7424: case 0x0: { |
| 6535 | OPC_CheckPredicate, 39, // 7426: check predicate 39 |
| 6536 | OPC_Decode, 218, 22, 168, 2, // 7428: decode to VMALHB using decoder 296 |
| 6537 | // 7428: } |
| 6538 | 1, 7, // 7433: case 0x1: { |
| 6539 | OPC_CheckPredicate, 39, // 7435: check predicate 39 |
| 6540 | OPC_Decode, 221, 22, 168, 2, // 7437: decode to VMALHH using decoder 296 |
| 6541 | // 7437: } |
| 6542 | 2, 7, // 7442: case 0x2: { |
| 6543 | OPC_CheckPredicate, 39, // 7444: check predicate 39 |
| 6544 | OPC_Decode, 219, 22, 168, 2, // 7446: decode to VMALHF using decoder 296 |
| 6545 | // 7446: } |
| 6546 | 3, 7, // 7451: case 0x3: { |
| 6547 | OPC_CheckPredicate, 41, // 7453: check predicate 41 |
| 6548 | OPC_Decode, 220, 22, 168, 2, // 7455: decode to VMALHG using decoder 296 |
| 6549 | // 7455: } |
| 6550 | 4, 0, // 7460: case 0x4: { |
| 6551 | OPC_CheckPredicate, 41, // 7462: check predicate 41 |
| 6552 | OPC_Decode, 222, 22, 168, 2, // 7464: decode to VMALHQ using decoder 296 |
| 6553 | // 7464: } |
| 6554 | // 7464: } // switch Inst[27:24] |
| 6555 | // 7464: } else try { |
| 6556 | OPC_CheckPredicate, 39, // 7469: check predicate 39 |
| 6557 | OPC_Decode, 217, 22, 169, 2, // 7471: decode to VMALH using decoder 297 |
| 6558 | // 7471: } |
| 6559 | // 7471: } |
| 6560 | 170, 1, 61, // 7476: case 0xaa: { |
| 6561 | OPC_CheckField, 16, 8, 0, // 7479: check Inst[23:16] == 0x0 |
| 6562 | OPC_Scope, 48, // 7483: try { |
| 6563 | OPC_SwitchField, 24, 4, // 7485: switch Inst[27:24] { |
| 6564 | 0, 7, // 7488: case 0x0: { |
| 6565 | OPC_CheckPredicate, 39, // 7490: check predicate 39 |
| 6566 | OPC_Decode, 209, 22, 168, 2, // 7492: decode to VMALB using decoder 296 |
| 6567 | // 7492: } |
| 6568 | 1, 7, // 7497: case 0x1: { |
| 6569 | OPC_CheckPredicate, 39, // 7499: check predicate 39 |
| 6570 | OPC_Decode, 223, 22, 168, 2, // 7501: decode to VMALHW using decoder 296 |
| 6571 | // 7501: } |
| 6572 | 2, 7, // 7506: case 0x2: { |
| 6573 | OPC_CheckPredicate, 39, // 7508: check predicate 39 |
| 6574 | OPC_Decode, 215, 22, 168, 2, // 7510: decode to VMALF using decoder 296 |
| 6575 | // 7510: } |
| 6576 | 3, 7, // 7515: case 0x3: { |
| 6577 | OPC_CheckPredicate, 41, // 7517: check predicate 41 |
| 6578 | OPC_Decode, 216, 22, 168, 2, // 7519: decode to VMALG using decoder 296 |
| 6579 | // 7519: } |
| 6580 | 4, 0, // 7524: case 0x4: { |
| 6581 | OPC_CheckPredicate, 41, // 7526: check predicate 41 |
| 6582 | OPC_Decode, 229, 22, 168, 2, // 7528: decode to VMALQ using decoder 296 |
| 6583 | // 7528: } |
| 6584 | // 7528: } // switch Inst[27:24] |
| 6585 | // 7528: } else try { |
| 6586 | OPC_CheckPredicate, 39, // 7533: check predicate 39 |
| 6587 | OPC_Decode, 208, 22, 169, 2, // 7535: decode to VMAL using decoder 297 |
| 6588 | // 7535: } |
| 6589 | // 7535: } |
| 6590 | 171, 1, 61, // 7540: case 0xab: { |
| 6591 | OPC_CheckField, 16, 8, 0, // 7543: check Inst[23:16] == 0x0 |
| 6592 | OPC_Scope, 48, // 7547: try { |
| 6593 | OPC_SwitchField, 24, 4, // 7549: switch Inst[27:24] { |
| 6594 | 0, 7, // 7552: case 0x0: { |
| 6595 | OPC_CheckPredicate, 39, // 7554: check predicate 39 |
| 6596 | OPC_Decode, 203, 22, 168, 2, // 7556: decode to VMAHB using decoder 296 |
| 6597 | // 7556: } |
| 6598 | 1, 7, // 7561: case 0x1: { |
| 6599 | OPC_CheckPredicate, 39, // 7563: check predicate 39 |
| 6600 | OPC_Decode, 206, 22, 168, 2, // 7565: decode to VMAHH using decoder 296 |
| 6601 | // 7565: } |
| 6602 | 2, 7, // 7570: case 0x2: { |
| 6603 | OPC_CheckPredicate, 39, // 7572: check predicate 39 |
| 6604 | OPC_Decode, 204, 22, 168, 2, // 7574: decode to VMAHF using decoder 296 |
| 6605 | // 7574: } |
| 6606 | 3, 7, // 7579: case 0x3: { |
| 6607 | OPC_CheckPredicate, 41, // 7581: check predicate 41 |
| 6608 | OPC_Decode, 205, 22, 168, 2, // 7583: decode to VMAHG using decoder 296 |
| 6609 | // 7583: } |
| 6610 | 4, 0, // 7588: case 0x4: { |
| 6611 | OPC_CheckPredicate, 41, // 7590: check predicate 41 |
| 6612 | OPC_Decode, 207, 22, 168, 2, // 7592: decode to VMAHQ using decoder 296 |
| 6613 | // 7592: } |
| 6614 | // 7592: } // switch Inst[27:24] |
| 6615 | // 7592: } else try { |
| 6616 | OPC_CheckPredicate, 39, // 7597: check predicate 39 |
| 6617 | OPC_Decode, 202, 22, 169, 2, // 7599: decode to VMAH using decoder 297 |
| 6618 | // 7599: } |
| 6619 | // 7599: } |
| 6620 | 172, 1, 52, // 7604: case 0xac: { |
| 6621 | OPC_CheckField, 16, 8, 0, // 7607: check Inst[23:16] == 0x0 |
| 6622 | OPC_Scope, 39, // 7611: try { |
| 6623 | OPC_SwitchField, 24, 4, // 7613: switch Inst[27:24] { |
| 6624 | 0, 7, // 7616: case 0x0: { |
| 6625 | OPC_CheckPredicate, 39, // 7618: check predicate 39 |
| 6626 | OPC_Decode, 211, 22, 168, 2, // 7620: decode to VMALEB using decoder 296 |
| 6627 | // 7620: } |
| 6628 | 1, 7, // 7625: case 0x1: { |
| 6629 | OPC_CheckPredicate, 39, // 7627: check predicate 39 |
| 6630 | OPC_Decode, 214, 22, 168, 2, // 7629: decode to VMALEH using decoder 296 |
| 6631 | // 7629: } |
| 6632 | 2, 7, // 7634: case 0x2: { |
| 6633 | OPC_CheckPredicate, 39, // 7636: check predicate 39 |
| 6634 | OPC_Decode, 212, 22, 168, 2, // 7638: decode to VMALEF using decoder 296 |
| 6635 | // 7638: } |
| 6636 | 3, 0, // 7643: case 0x3: { |
| 6637 | OPC_CheckPredicate, 41, // 7645: check predicate 41 |
| 6638 | OPC_Decode, 213, 22, 168, 2, // 7647: decode to VMALEG using decoder 296 |
| 6639 | // 7647: } |
| 6640 | // 7647: } // switch Inst[27:24] |
| 6641 | // 7647: } else try { |
| 6642 | OPC_CheckPredicate, 39, // 7652: check predicate 39 |
| 6643 | OPC_Decode, 210, 22, 169, 2, // 7654: decode to VMALE using decoder 297 |
| 6644 | // 7654: } |
| 6645 | // 7654: } |
| 6646 | 173, 1, 52, // 7659: case 0xad: { |
| 6647 | OPC_CheckField, 16, 8, 0, // 7662: check Inst[23:16] == 0x0 |
| 6648 | OPC_Scope, 39, // 7666: try { |
| 6649 | OPC_SwitchField, 24, 4, // 7668: switch Inst[27:24] { |
| 6650 | 0, 7, // 7671: case 0x0: { |
| 6651 | OPC_CheckPredicate, 39, // 7673: check predicate 39 |
| 6652 | OPC_Decode, 225, 22, 168, 2, // 7675: decode to VMALOB using decoder 296 |
| 6653 | // 7675: } |
| 6654 | 1, 7, // 7680: case 0x1: { |
| 6655 | OPC_CheckPredicate, 39, // 7682: check predicate 39 |
| 6656 | OPC_Decode, 228, 22, 168, 2, // 7684: decode to VMALOH using decoder 296 |
| 6657 | // 7684: } |
| 6658 | 2, 7, // 7689: case 0x2: { |
| 6659 | OPC_CheckPredicate, 39, // 7691: check predicate 39 |
| 6660 | OPC_Decode, 226, 22, 168, 2, // 7693: decode to VMALOF using decoder 296 |
| 6661 | // 7693: } |
| 6662 | 3, 0, // 7698: case 0x3: { |
| 6663 | OPC_CheckPredicate, 41, // 7700: check predicate 41 |
| 6664 | OPC_Decode, 227, 22, 168, 2, // 7702: decode to VMALOG using decoder 296 |
| 6665 | // 7702: } |
| 6666 | // 7702: } // switch Inst[27:24] |
| 6667 | // 7702: } else try { |
| 6668 | OPC_CheckPredicate, 39, // 7707: check predicate 39 |
| 6669 | OPC_Decode, 224, 22, 169, 2, // 7709: decode to VMALO using decoder 297 |
| 6670 | // 7709: } |
| 6671 | // 7709: } |
| 6672 | 174, 1, 52, // 7714: case 0xae: { |
| 6673 | OPC_CheckField, 16, 8, 0, // 7717: check Inst[23:16] == 0x0 |
| 6674 | OPC_Scope, 39, // 7721: try { |
| 6675 | OPC_SwitchField, 24, 4, // 7723: switch Inst[27:24] { |
| 6676 | 0, 7, // 7726: case 0x0: { |
| 6677 | OPC_CheckPredicate, 39, // 7728: check predicate 39 |
| 6678 | OPC_Decode, 198, 22, 168, 2, // 7730: decode to VMAEB using decoder 296 |
| 6679 | // 7730: } |
| 6680 | 1, 7, // 7735: case 0x1: { |
| 6681 | OPC_CheckPredicate, 39, // 7737: check predicate 39 |
| 6682 | OPC_Decode, 201, 22, 168, 2, // 7739: decode to VMAEH using decoder 296 |
| 6683 | // 7739: } |
| 6684 | 2, 7, // 7744: case 0x2: { |
| 6685 | OPC_CheckPredicate, 39, // 7746: check predicate 39 |
| 6686 | OPC_Decode, 199, 22, 168, 2, // 7748: decode to VMAEF using decoder 296 |
| 6687 | // 7748: } |
| 6688 | 3, 0, // 7753: case 0x3: { |
| 6689 | OPC_CheckPredicate, 41, // 7755: check predicate 41 |
| 6690 | OPC_Decode, 200, 22, 168, 2, // 7757: decode to VMAEG using decoder 296 |
| 6691 | // 7757: } |
| 6692 | // 7757: } // switch Inst[27:24] |
| 6693 | // 7757: } else try { |
| 6694 | OPC_CheckPredicate, 39, // 7762: check predicate 39 |
| 6695 | OPC_Decode, 197, 22, 169, 2, // 7764: decode to VMAE using decoder 297 |
| 6696 | // 7764: } |
| 6697 | // 7764: } |
| 6698 | 175, 1, 52, // 7769: case 0xaf: { |
| 6699 | OPC_CheckField, 16, 8, 0, // 7772: check Inst[23:16] == 0x0 |
| 6700 | OPC_Scope, 39, // 7776: try { |
| 6701 | OPC_SwitchField, 24, 4, // 7778: switch Inst[27:24] { |
| 6702 | 0, 7, // 7781: case 0x0: { |
| 6703 | OPC_CheckPredicate, 39, // 7783: check predicate 39 |
| 6704 | OPC_Decode, 231, 22, 168, 2, // 7785: decode to VMAOB using decoder 296 |
| 6705 | // 7785: } |
| 6706 | 1, 7, // 7790: case 0x1: { |
| 6707 | OPC_CheckPredicate, 39, // 7792: check predicate 39 |
| 6708 | OPC_Decode, 234, 22, 168, 2, // 7794: decode to VMAOH using decoder 296 |
| 6709 | // 7794: } |
| 6710 | 2, 7, // 7799: case 0x2: { |
| 6711 | OPC_CheckPredicate, 39, // 7801: check predicate 39 |
| 6712 | OPC_Decode, 232, 22, 168, 2, // 7803: decode to VMAOF using decoder 296 |
| 6713 | // 7803: } |
| 6714 | 3, 0, // 7808: case 0x3: { |
| 6715 | OPC_CheckPredicate, 41, // 7810: check predicate 41 |
| 6716 | OPC_Decode, 233, 22, 168, 2, // 7812: decode to VMAOG using decoder 296 |
| 6717 | // 7812: } |
| 6718 | // 7812: } // switch Inst[27:24] |
| 6719 | // 7812: } else try { |
| 6720 | OPC_CheckPredicate, 39, // 7817: check predicate 39 |
| 6721 | OPC_Decode, 230, 22, 169, 2, // 7819: decode to VMAO using decoder 297 |
| 6722 | // 7819: } |
| 6723 | // 7819: } |
| 6724 | 176, 1, 47, // 7824: case 0xb0: { |
| 6725 | OPC_CheckField, 8, 1, 0, // 7827: check Inst[8] == 0x0 |
| 6726 | OPC_CheckField, 20, 8, 0, // 7831: check Inst[27:20] == 0x0 |
| 6727 | OPC_Scope, 30, // 7835: try { |
| 6728 | OPC_SwitchField, 12, 4, // 7837: switch Inst[15:12] { |
| 6729 | 2, 7, // 7840: case 0x2: { |
| 6730 | OPC_CheckPredicate, 41, // 7842: check predicate 41 |
| 6731 | OPC_Decode, 164, 20, 178, 2, // 7844: decode to VDLF using decoder 306 |
| 6732 | // 7844: } |
| 6733 | 3, 7, // 7849: case 0x3: { |
| 6734 | OPC_CheckPredicate, 41, // 7851: check predicate 41 |
| 6735 | OPC_Decode, 165, 20, 178, 2, // 7853: decode to VDLG using decoder 306 |
| 6736 | // 7853: } |
| 6737 | 4, 0, // 7858: case 0x4: { |
| 6738 | OPC_CheckPredicate, 41, // 7860: check predicate 41 |
| 6739 | OPC_Decode, 166, 20, 178, 2, // 7862: decode to VDLQ using decoder 306 |
| 6740 | // 7862: } |
| 6741 | // 7862: } // switch Inst[15:12] |
| 6742 | // 7862: } else try { |
| 6743 | OPC_CheckPredicate, 41, // 7867: check predicate 41 |
| 6744 | OPC_Decode, 163, 20, 248, 1, // 7869: decode to VDL using decoder 248 |
| 6745 | // 7869: } |
| 6746 | // 7869: } |
| 6747 | 177, 1, 47, // 7874: case 0xb1: { |
| 6748 | OPC_CheckField, 8, 1, 0, // 7877: check Inst[8] == 0x0 |
| 6749 | OPC_CheckField, 20, 8, 0, // 7881: check Inst[27:20] == 0x0 |
| 6750 | OPC_Scope, 30, // 7885: try { |
| 6751 | OPC_SwitchField, 12, 4, // 7887: switch Inst[15:12] { |
| 6752 | 2, 7, // 7890: case 0x2: { |
| 6753 | OPC_CheckPredicate, 41, // 7892: check predicate 41 |
| 6754 | OPC_Decode, 233, 23, 178, 2, // 7894: decode to VRLF using decoder 306 |
| 6755 | // 7894: } |
| 6756 | 3, 7, // 7899: case 0x3: { |
| 6757 | OPC_CheckPredicate, 41, // 7901: check predicate 41 |
| 6758 | OPC_Decode, 234, 23, 178, 2, // 7903: decode to VRLG using decoder 306 |
| 6759 | // 7903: } |
| 6760 | 4, 0, // 7908: case 0x4: { |
| 6761 | OPC_CheckPredicate, 41, // 7910: check predicate 41 |
| 6762 | OPC_Decode, 235, 23, 178, 2, // 7912: decode to VRLQ using decoder 306 |
| 6763 | // 7912: } |
| 6764 | // 7912: } // switch Inst[15:12] |
| 6765 | // 7912: } else try { |
| 6766 | OPC_CheckPredicate, 41, // 7917: check predicate 41 |
| 6767 | OPC_Decode, 232, 23, 248, 1, // 7919: decode to VRL using decoder 248 |
| 6768 | // 7919: } |
| 6769 | // 7919: } |
| 6770 | 178, 1, 47, // 7924: case 0xb2: { |
| 6771 | OPC_CheckField, 8, 1, 0, // 7927: check Inst[8] == 0x0 |
| 6772 | OPC_CheckField, 20, 8, 0, // 7931: check Inst[27:20] == 0x0 |
| 6773 | OPC_Scope, 30, // 7935: try { |
| 6774 | OPC_SwitchField, 12, 4, // 7937: switch Inst[15:12] { |
| 6775 | 2, 7, // 7940: case 0x2: { |
| 6776 | OPC_CheckPredicate, 41, // 7942: check predicate 41 |
| 6777 | OPC_Decode, 161, 20, 178, 2, // 7944: decode to VDF using decoder 306 |
| 6778 | // 7944: } |
| 6779 | 3, 7, // 7949: case 0x3: { |
| 6780 | OPC_CheckPredicate, 41, // 7951: check predicate 41 |
| 6781 | OPC_Decode, 162, 20, 178, 2, // 7953: decode to VDG using decoder 306 |
| 6782 | // 7953: } |
| 6783 | 4, 0, // 7958: case 0x4: { |
| 6784 | OPC_CheckPredicate, 41, // 7960: check predicate 41 |
| 6785 | OPC_Decode, 168, 20, 178, 2, // 7962: decode to VDQ using decoder 306 |
| 6786 | // 7962: } |
| 6787 | // 7962: } // switch Inst[15:12] |
| 6788 | // 7962: } else try { |
| 6789 | OPC_CheckPredicate, 41, // 7967: check predicate 41 |
| 6790 | OPC_Decode, 160, 20, 248, 1, // 7969: decode to VD using decoder 248 |
| 6791 | // 7969: } |
| 6792 | // 7969: } |
| 6793 | 179, 1, 47, // 7974: case 0xb3: { |
| 6794 | OPC_CheckField, 8, 1, 0, // 7977: check Inst[8] == 0x0 |
| 6795 | OPC_CheckField, 20, 8, 0, // 7981: check Inst[27:20] == 0x0 |
| 6796 | OPC_Scope, 30, // 7985: try { |
| 6797 | OPC_SwitchField, 12, 4, // 7987: switch Inst[15:12] { |
| 6798 | 2, 7, // 7990: case 0x2: { |
| 6799 | OPC_CheckPredicate, 41, // 7992: check predicate 41 |
| 6800 | OPC_Decode, 230, 23, 178, 2, // 7994: decode to VRF using decoder 306 |
| 6801 | // 7994: } |
| 6802 | 3, 7, // 7999: case 0x3: { |
| 6803 | OPC_CheckPredicate, 41, // 8001: check predicate 41 |
| 6804 | OPC_Decode, 231, 23, 178, 2, // 8003: decode to VRG using decoder 306 |
| 6805 | // 8003: } |
| 6806 | 4, 0, // 8008: case 0x4: { |
| 6807 | OPC_CheckPredicate, 41, // 8010: check predicate 41 |
| 6808 | OPC_Decode, 237, 23, 178, 2, // 8012: decode to VRQ using decoder 306 |
| 6809 | // 8012: } |
| 6810 | // 8012: } // switch Inst[15:12] |
| 6811 | // 8012: } else try { |
| 6812 | OPC_CheckPredicate, 41, // 8017: check predicate 41 |
| 6813 | OPC_Decode, 219, 23, 248, 1, // 8019: decode to VR using decoder 248 |
| 6814 | // 8019: } |
| 6815 | // 8019: } |
| 6816 | 180, 1, 56, // 8024: case 0xb4: { |
| 6817 | OPC_CheckField, 8, 1, 0, // 8027: check Inst[8] == 0x0 |
| 6818 | OPC_CheckField, 16, 12, 0, // 8031: check Inst[27:16] == 0x0 |
| 6819 | OPC_Scope, 39, // 8035: try { |
| 6820 | OPC_SwitchField, 12, 4, // 8037: switch Inst[15:12] { |
| 6821 | 0, 7, // 8040: case 0x0: { |
| 6822 | OPC_CheckPredicate, 39, // 8042: check predicate 39 |
| 6823 | OPC_Decode, 232, 21, 250, 1, // 8044: decode to VGFMB using decoder 250 |
| 6824 | // 8044: } |
| 6825 | 1, 7, // 8049: case 0x1: { |
| 6826 | OPC_CheckPredicate, 39, // 8051: check predicate 39 |
| 6827 | OPC_Decode, 235, 21, 250, 1, // 8053: decode to VGFMH using decoder 250 |
| 6828 | // 8053: } |
| 6829 | 2, 7, // 8058: case 0x2: { |
| 6830 | OPC_CheckPredicate, 39, // 8060: check predicate 39 |
| 6831 | OPC_Decode, 233, 21, 250, 1, // 8062: decode to VGFMF using decoder 250 |
| 6832 | // 8062: } |
| 6833 | 3, 0, // 8067: case 0x3: { |
| 6834 | OPC_CheckPredicate, 39, // 8069: check predicate 39 |
| 6835 | OPC_Decode, 234, 21, 250, 1, // 8071: decode to VGFMG using decoder 250 |
| 6836 | // 8071: } |
| 6837 | // 8071: } // switch Inst[15:12] |
| 6838 | // 8071: } else try { |
| 6839 | OPC_CheckPredicate, 39, // 8076: check predicate 39 |
| 6840 | OPC_Decode, 226, 21, 159, 2, // 8078: decode to VGFM using decoder 287 |
| 6841 | // 8078: } |
| 6842 | // 8078: } |
| 6843 | 184, 1, 24, // 8083: case 0xb8: { |
| 6844 | OPC_CheckField, 16, 4, 0, // 8086: check Inst[19:16] == 0x0 |
| 6845 | OPC_Scope, 11, // 8090: try { |
| 6846 | OPC_CheckField, 24, 4, 3, // 8092: check Inst[27:24] == 0x3 |
| 6847 | OPC_CheckPredicate, 40, // 8096: check predicate 40 |
| 6848 | OPC_Decode, 169, 23, 173, 2, // 8098: decode to VMSLG using decoder 301 |
| 6849 | // 8098: } else try { |
| 6850 | OPC_CheckPredicate, 40, // 8103: check predicate 40 |
| 6851 | OPC_Decode, 168, 23, 174, 2, // 8105: decode to VMSL using decoder 302 |
| 6852 | // 8105: } |
| 6853 | // 8105: } |
| 6854 | 185, 1, 24, // 8110: case 0xb9: { |
| 6855 | OPC_CheckField, 16, 8, 0, // 8113: check Inst[23:16] == 0x0 |
| 6856 | OPC_Scope, 11, // 8117: try { |
| 6857 | OPC_CheckField, 24, 4, 4, // 8119: check Inst[27:24] == 0x4 |
| 6858 | OPC_CheckPredicate, 39, // 8123: check predicate 39 |
| 6859 | OPC_Decode, 180, 19, 168, 2, // 8125: decode to VACCCQ using decoder 296 |
| 6860 | // 8125: } else try { |
| 6861 | OPC_CheckPredicate, 39, // 8130: check predicate 39 |
| 6862 | OPC_Decode, 179, 19, 169, 2, // 8132: decode to VACCC using decoder 297 |
| 6863 | // 8132: } |
| 6864 | // 8132: } |
| 6865 | 187, 1, 24, // 8137: case 0xbb: { |
| 6866 | OPC_CheckField, 16, 8, 0, // 8140: check Inst[23:16] == 0x0 |
| 6867 | OPC_Scope, 11, // 8144: try { |
| 6868 | OPC_CheckField, 24, 4, 4, // 8146: check Inst[27:24] == 0x4 |
| 6869 | OPC_CheckPredicate, 39, // 8150: check predicate 39 |
| 6870 | OPC_Decode, 185, 19, 168, 2, // 8152: decode to VACQ using decoder 296 |
| 6871 | // 8152: } else try { |
| 6872 | OPC_CheckPredicate, 39, // 8157: check predicate 39 |
| 6873 | OPC_Decode, 176, 19, 169, 2, // 8159: decode to VAC using decoder 297 |
| 6874 | // 8159: } |
| 6875 | // 8159: } |
| 6876 | 188, 1, 52, // 8164: case 0xbc: { |
| 6877 | OPC_CheckField, 16, 8, 0, // 8167: check Inst[23:16] == 0x0 |
| 6878 | OPC_Scope, 39, // 8171: try { |
| 6879 | OPC_SwitchField, 24, 4, // 8173: switch Inst[27:24] { |
| 6880 | 0, 7, // 8176: case 0x0: { |
| 6881 | OPC_CheckPredicate, 39, // 8178: check predicate 39 |
| 6882 | OPC_Decode, 228, 21, 168, 2, // 8180: decode to VGFMAB using decoder 296 |
| 6883 | // 8180: } |
| 6884 | 1, 7, // 8185: case 0x1: { |
| 6885 | OPC_CheckPredicate, 39, // 8187: check predicate 39 |
| 6886 | OPC_Decode, 231, 21, 168, 2, // 8189: decode to VGFMAH using decoder 296 |
| 6887 | // 8189: } |
| 6888 | 2, 7, // 8194: case 0x2: { |
| 6889 | OPC_CheckPredicate, 39, // 8196: check predicate 39 |
| 6890 | OPC_Decode, 229, 21, 168, 2, // 8198: decode to VGFMAF using decoder 296 |
| 6891 | // 8198: } |
| 6892 | 3, 0, // 8203: case 0x3: { |
| 6893 | OPC_CheckPredicate, 39, // 8205: check predicate 39 |
| 6894 | OPC_Decode, 230, 21, 168, 2, // 8207: decode to VGFMAG using decoder 296 |
| 6895 | // 8207: } |
| 6896 | // 8207: } // switch Inst[27:24] |
| 6897 | // 8207: } else try { |
| 6898 | OPC_CheckPredicate, 39, // 8212: check predicate 39 |
| 6899 | OPC_Decode, 227, 21, 169, 2, // 8214: decode to VGFMA using decoder 297 |
| 6900 | // 8214: } |
| 6901 | // 8214: } |
| 6902 | 189, 1, 24, // 8219: case 0xbd: { |
| 6903 | OPC_CheckField, 16, 8, 0, // 8222: check Inst[23:16] == 0x0 |
| 6904 | OPC_Scope, 11, // 8226: try { |
| 6905 | OPC_CheckField, 24, 4, 4, // 8228: check Inst[27:24] == 0x4 |
| 6906 | OPC_CheckPredicate, 39, // 8232: check predicate 39 |
| 6907 | OPC_Decode, 241, 23, 168, 2, // 8234: decode to VSBCBIQ using decoder 296 |
| 6908 | // 8234: } else try { |
| 6909 | OPC_CheckPredicate, 39, // 8239: check predicate 39 |
| 6910 | OPC_Decode, 240, 23, 169, 2, // 8241: decode to VSBCBI using decoder 297 |
| 6911 | // 8241: } |
| 6912 | // 8241: } |
| 6913 | 191, 1, 24, // 8246: case 0xbf: { |
| 6914 | OPC_CheckField, 16, 8, 0, // 8249: check Inst[23:16] == 0x0 |
| 6915 | OPC_Scope, 11, // 8253: try { |
| 6916 | OPC_CheckField, 24, 4, 4, // 8255: check Inst[27:24] == 0x4 |
| 6917 | OPC_CheckPredicate, 39, // 8259: check predicate 39 |
| 6918 | OPC_Decode, 243, 23, 168, 2, // 8261: decode to VSBIQ using decoder 296 |
| 6919 | // 8261: } else try { |
| 6920 | OPC_CheckPredicate, 39, // 8266: check predicate 39 |
| 6921 | OPC_Decode, 242, 23, 169, 2, // 8268: decode to VSBI using decoder 297 |
| 6922 | // 8268: } |
| 6923 | // 8268: } |
| 6924 | 192, 1, 64, // 8273: case 0xc0: { |
| 6925 | OPC_CheckField, 8, 2, 0, // 8276: check Inst[9:8] == 0x0 |
| 6926 | OPC_CheckField, 24, 8, 0, // 8280: check Inst[31:24] == 0x0 |
| 6927 | OPC_Scope, 47, // 8284: try { |
| 6928 | OPC_SwitchField, 12, 4, // 8286: switch Inst[15:12] { |
| 6929 | 2, 20, // 8289: case 0x2: { |
| 6930 | OPC_Scope, 11, // 8291: try { |
| 6931 | OPC_CheckField, 19, 1, 1, // 8293: check Inst[19] == 0x1 |
| 6932 | OPC_CheckPredicate, 33, // 8297: check predicate 33 |
| 6933 | OPC_Decode, 238, 24, 179, 2, // 8299: decode to WCLFEB using decoder 307 |
| 6934 | // 8299: } else try { |
| 6935 | OPC_CheckPredicate, 33, // 8304: check predicate 33 |
| 6936 | OPC_Decode, 128, 20, 180, 2, // 8306: decode to VCLFEB using decoder 308 |
| 6937 | // 8306: } |
| 6938 | // 8306: } |
| 6939 | 3, 0, // 8311: case 0x3: { |
| 6940 | OPC_Scope, 11, // 8313: try { |
| 6941 | OPC_CheckField, 19, 1, 1, // 8315: check Inst[19] == 0x1 |
| 6942 | OPC_CheckPredicate, 39, // 8319: check predicate 39 |
| 6943 | OPC_Decode, 239, 24, 181, 2, // 8321: decode to WCLGDB using decoder 309 |
| 6944 | // 8321: } else try { |
| 6945 | OPC_CheckPredicate, 39, // 8326: check predicate 39 |
| 6946 | OPC_Decode, 133, 20, 180, 2, // 8328: decode to VCLGDB using decoder 308 |
| 6947 | // 8328: } |
| 6948 | // 8328: } |
| 6949 | // 8328: } // switch Inst[15:12] |
| 6950 | // 8328: } else try { |
| 6951 | OPC_CheckPredicate, 39, // 8333: check predicate 39 |
| 6952 | OPC_Decode, 132, 20, 182, 2, // 8335: decode to VCLGD using decoder 310 |
| 6953 | // 8335: } |
| 6954 | // 8335: } |
| 6955 | 193, 1, 64, // 8340: case 0xc1: { |
| 6956 | OPC_CheckField, 8, 2, 0, // 8343: check Inst[9:8] == 0x0 |
| 6957 | OPC_CheckField, 24, 8, 0, // 8347: check Inst[31:24] == 0x0 |
| 6958 | OPC_Scope, 47, // 8351: try { |
| 6959 | OPC_SwitchField, 12, 4, // 8353: switch Inst[15:12] { |
| 6960 | 2, 20, // 8356: case 0x2: { |
| 6961 | OPC_Scope, 11, // 8358: try { |
| 6962 | OPC_CheckField, 19, 1, 1, // 8360: check Inst[19] == 0x1 |
| 6963 | OPC_CheckPredicate, 33, // 8364: check predicate 33 |
| 6964 | OPC_Decode, 235, 24, 179, 2, // 8366: decode to WCELFB using decoder 307 |
| 6965 | // 8366: } else try { |
| 6966 | OPC_CheckPredicate, 33, // 8371: check predicate 33 |
| 6967 | OPC_Decode, 215, 19, 180, 2, // 8373: decode to VCELFB using decoder 308 |
| 6968 | // 8373: } |
| 6969 | // 8373: } |
| 6970 | 3, 0, // 8378: case 0x3: { |
| 6971 | OPC_Scope, 11, // 8380: try { |
| 6972 | OPC_CheckField, 19, 1, 1, // 8382: check Inst[19] == 0x1 |
| 6973 | OPC_CheckPredicate, 39, // 8386: check predicate 39 |
| 6974 | OPC_Decode, 233, 24, 181, 2, // 8388: decode to WCDLGB using decoder 309 |
| 6975 | // 8388: } else try { |
| 6976 | OPC_CheckPredicate, 39, // 8393: check predicate 39 |
| 6977 | OPC_Decode, 213, 19, 180, 2, // 8395: decode to VCDLGB using decoder 308 |
| 6978 | // 8395: } |
| 6979 | // 8395: } |
| 6980 | // 8395: } // switch Inst[15:12] |
| 6981 | // 8395: } else try { |
| 6982 | OPC_CheckPredicate, 39, // 8400: check predicate 39 |
| 6983 | OPC_Decode, 212, 19, 182, 2, // 8402: decode to VCDLG using decoder 310 |
| 6984 | // 8402: } |
| 6985 | // 8402: } |
| 6986 | 194, 1, 64, // 8407: case 0xc2: { |
| 6987 | OPC_CheckField, 8, 2, 0, // 8410: check Inst[9:8] == 0x0 |
| 6988 | OPC_CheckField, 24, 8, 0, // 8414: check Inst[31:24] == 0x0 |
| 6989 | OPC_Scope, 47, // 8418: try { |
| 6990 | OPC_SwitchField, 12, 4, // 8420: switch Inst[15:12] { |
| 6991 | 2, 20, // 8423: case 0x2: { |
| 6992 | OPC_Scope, 11, // 8425: try { |
| 6993 | OPC_CheckField, 19, 1, 1, // 8427: check Inst[19] == 0x1 |
| 6994 | OPC_CheckPredicate, 33, // 8431: check predicate 33 |
| 6995 | OPC_Decode, 236, 24, 179, 2, // 8433: decode to WCFEB using decoder 307 |
| 6996 | // 8433: } else try { |
| 6997 | OPC_CheckPredicate, 33, // 8438: check predicate 33 |
| 6998 | OPC_Decode, 227, 19, 180, 2, // 8440: decode to VCFEB using decoder 308 |
| 6999 | // 8440: } |
| 7000 | // 8440: } |
| 7001 | 3, 0, // 8445: case 0x3: { |
| 7002 | OPC_Scope, 11, // 8447: try { |
| 7003 | OPC_CheckField, 19, 1, 1, // 8449: check Inst[19] == 0x1 |
| 7004 | OPC_CheckPredicate, 39, // 8453: check predicate 39 |
| 7005 | OPC_Decode, 237, 24, 181, 2, // 8455: decode to WCGDB using decoder 309 |
| 7006 | // 8455: } else try { |
| 7007 | OPC_CheckPredicate, 39, // 8460: check predicate 39 |
| 7008 | OPC_Decode, 232, 19, 180, 2, // 8462: decode to VCGDB using decoder 308 |
| 7009 | // 8462: } |
| 7010 | // 8462: } |
| 7011 | // 8462: } // switch Inst[15:12] |
| 7012 | // 8462: } else try { |
| 7013 | OPC_CheckPredicate, 39, // 8467: check predicate 39 |
| 7014 | OPC_Decode, 231, 19, 182, 2, // 8469: decode to VCGD using decoder 310 |
| 7015 | // 8469: } |
| 7016 | // 8469: } |
| 7017 | 195, 1, 64, // 8474: case 0xc3: { |
| 7018 | OPC_CheckField, 8, 2, 0, // 8477: check Inst[9:8] == 0x0 |
| 7019 | OPC_CheckField, 24, 8, 0, // 8481: check Inst[31:24] == 0x0 |
| 7020 | OPC_Scope, 47, // 8485: try { |
| 7021 | OPC_SwitchField, 12, 4, // 8487: switch Inst[15:12] { |
| 7022 | 2, 20, // 8490: case 0x2: { |
| 7023 | OPC_Scope, 11, // 8492: try { |
| 7024 | OPC_CheckField, 19, 1, 1, // 8494: check Inst[19] == 0x1 |
| 7025 | OPC_CheckPredicate, 33, // 8498: check predicate 33 |
| 7026 | OPC_Decode, 234, 24, 179, 2, // 8500: decode to WCEFB using decoder 307 |
| 7027 | // 8500: } else try { |
| 7028 | OPC_CheckPredicate, 33, // 8505: check predicate 33 |
| 7029 | OPC_Decode, 214, 19, 180, 2, // 8507: decode to VCEFB using decoder 308 |
| 7030 | // 8507: } |
| 7031 | // 8507: } |
| 7032 | 3, 0, // 8512: case 0x3: { |
| 7033 | OPC_Scope, 11, // 8514: try { |
| 7034 | OPC_CheckField, 19, 1, 1, // 8516: check Inst[19] == 0x1 |
| 7035 | OPC_CheckPredicate, 39, // 8520: check predicate 39 |
| 7036 | OPC_Decode, 232, 24, 181, 2, // 8522: decode to WCDGB using decoder 309 |
| 7037 | // 8522: } else try { |
| 7038 | OPC_CheckPredicate, 39, // 8527: check predicate 39 |
| 7039 | OPC_Decode, 211, 19, 180, 2, // 8529: decode to VCDGB using decoder 308 |
| 7040 | // 8529: } |
| 7041 | // 8529: } |
| 7042 | // 8529: } // switch Inst[15:12] |
| 7043 | // 8529: } else try { |
| 7044 | OPC_CheckPredicate, 39, // 8534: check predicate 39 |
| 7045 | OPC_Decode, 210, 19, 182, 2, // 8536: decode to VCDG using decoder 310 |
| 7046 | // 8536: } |
| 7047 | // 8536: } |
| 7048 | 196, 1, 49, // 8541: case 0xc4: { |
| 7049 | OPC_CheckField, 8, 2, 0, // 8544: check Inst[9:8] == 0x0 |
| 7050 | OPC_CheckField, 20, 12, 0, // 8548: check Inst[31:20] == 0x0 |
| 7051 | OPC_Scope, 32, // 8552: try { |
| 7052 | OPC_SwitchField, 12, 8, // 8554: switch Inst[19:12] { |
| 7053 | 2, 7, // 8557: case 0x2: { |
| 7054 | OPC_CheckPredicate, 39, // 8559: check predicate 39 |
| 7055 | OPC_Decode, 139, 22, 156, 2, // 8561: decode to VLDEB using decoder 284 |
| 7056 | // 8561: } |
| 7057 | 130, 1, 7, // 8566: case 0x82: { |
| 7058 | OPC_CheckPredicate, 39, // 8569: check predicate 39 |
| 7059 | OPC_Decode, 211, 25, 183, 2, // 8571: decode to WLDEB using decoder 311 |
| 7060 | // 8571: } |
| 7061 | 131, 1, 0, // 8576: case 0x83: { |
| 7062 | OPC_CheckPredicate, 40, // 8579: check predicate 40 |
| 7063 | OPC_Decode, 168, 25, 184, 2, // 8581: decode to WFLLD using decoder 312 |
| 7064 | // 8581: } |
| 7065 | // 8581: } // switch Inst[19:12] |
| 7066 | // 8581: } else try { |
| 7067 | OPC_CheckPredicate, 39, // 8586: check predicate 39 |
| 7068 | OPC_Decode, 138, 22, 239, 1, // 8588: decode to VLDE using decoder 239 |
| 7069 | // 8588: } |
| 7070 | // 8588: } |
| 7071 | 197, 1, 55, // 8593: case 0xc5: { |
| 7072 | OPC_CheckField, 8, 2, 0, // 8596: check Inst[9:8] == 0x0 |
| 7073 | OPC_CheckField, 24, 8, 0, // 8600: check Inst[31:24] == 0x0 |
| 7074 | OPC_Scope, 38, // 8604: try { |
| 7075 | OPC_SwitchField, 12, 4, // 8606: switch Inst[15:12] { |
| 7076 | 3, 20, // 8609: case 0x3: { |
| 7077 | OPC_Scope, 11, // 8611: try { |
| 7078 | OPC_CheckField, 19, 1, 1, // 8613: check Inst[19] == 0x1 |
| 7079 | OPC_CheckPredicate, 39, // 8617: check predicate 39 |
| 7080 | OPC_Decode, 212, 25, 185, 2, // 8619: decode to WLEDB using decoder 313 |
| 7081 | // 8619: } else try { |
| 7082 | OPC_CheckPredicate, 39, // 8624: check predicate 39 |
| 7083 | OPC_Decode, 145, 22, 180, 2, // 8626: decode to VLEDB using decoder 308 |
| 7084 | // 8626: } |
| 7085 | // 8626: } |
| 7086 | 4, 0, // 8631: case 0x4: { |
| 7087 | OPC_CheckPredicate, 40, // 8633: check predicate 40 |
| 7088 | OPC_CheckField, 19, 1, 1, // 8635: check Inst[19] == 0x1 |
| 7089 | OPC_Decode, 177, 25, 186, 2, // 8639: decode to WFLRX using decoder 314 |
| 7090 | // 8639: } |
| 7091 | // 8639: } // switch Inst[15:12] |
| 7092 | // 8639: } else try { |
| 7093 | OPC_CheckPredicate, 39, // 8644: check predicate 39 |
| 7094 | OPC_Decode, 144, 22, 182, 2, // 8646: decode to VLED using decoder 310 |
| 7095 | // 8646: } |
| 7096 | // 8646: } |
| 7097 | 199, 1, 77, // 8651: case 0xc7: { |
| 7098 | OPC_CheckField, 8, 2, 0, // 8654: check Inst[9:8] == 0x0 |
| 7099 | OPC_CheckField, 24, 8, 0, // 8658: check Inst[31:24] == 0x0 |
| 7100 | OPC_Scope, 60, // 8662: try { |
| 7101 | OPC_SwitchField, 12, 4, // 8664: switch Inst[15:12] { |
| 7102 | 2, 20, // 8667: case 0x2: { |
| 7103 | OPC_Scope, 11, // 8669: try { |
| 7104 | OPC_CheckField, 19, 1, 1, // 8671: check Inst[19] == 0x1 |
| 7105 | OPC_CheckPredicate, 40, // 8675: check predicate 40 |
| 7106 | OPC_Decode, 141, 25, 179, 2, // 8677: decode to WFISB using decoder 307 |
| 7107 | // 8677: } else try { |
| 7108 | OPC_CheckPredicate, 40, // 8682: check predicate 40 |
| 7109 | OPC_Decode, 161, 21, 180, 2, // 8684: decode to VFISB using decoder 308 |
| 7110 | // 8684: } |
| 7111 | // 8684: } |
| 7112 | 3, 20, // 8689: case 0x3: { |
| 7113 | OPC_Scope, 11, // 8691: try { |
| 7114 | OPC_CheckField, 19, 1, 1, // 8693: check Inst[19] == 0x1 |
| 7115 | OPC_CheckPredicate, 39, // 8697: check predicate 39 |
| 7116 | OPC_Decode, 140, 25, 181, 2, // 8699: decode to WFIDB using decoder 309 |
| 7117 | // 8699: } else try { |
| 7118 | OPC_CheckPredicate, 39, // 8704: check predicate 39 |
| 7119 | OPC_Decode, 160, 21, 180, 2, // 8706: decode to VFIDB using decoder 308 |
| 7120 | // 8706: } |
| 7121 | // 8706: } |
| 7122 | 4, 0, // 8711: case 0x4: { |
| 7123 | OPC_CheckPredicate, 40, // 8713: check predicate 40 |
| 7124 | OPC_CheckField, 19, 1, 1, // 8715: check Inst[19] == 0x1 |
| 7125 | OPC_Decode, 142, 25, 187, 2, // 8719: decode to WFIXB using decoder 315 |
| 7126 | // 8719: } |
| 7127 | // 8719: } // switch Inst[15:12] |
| 7128 | // 8719: } else try { |
| 7129 | OPC_CheckPredicate, 39, // 8724: check predicate 39 |
| 7130 | OPC_Decode, 159, 21, 182, 2, // 8726: decode to VFI using decoder 310 |
| 7131 | // 8726: } |
| 7132 | // 8726: } |
| 7133 | 202, 1, 47, // 8731: case 0xca: { |
| 7134 | OPC_CheckField, 8, 2, 0, // 8734: check Inst[9:8] == 0x0 |
| 7135 | OPC_CheckField, 20, 12, 0, // 8738: check Inst[31:20] == 0x0 |
| 7136 | OPC_Scope, 30, // 8742: try { |
| 7137 | OPC_SwitchField, 12, 8, // 8744: switch Inst[19:12] { |
| 7138 | 2, 7, // 8747: case 0x2: { |
| 7139 | OPC_CheckPredicate, 40, // 8749: check predicate 40 |
| 7140 | OPC_Decode, 163, 25, 188, 2, // 8751: decode to WFKSB using decoder 316 |
| 7141 | // 8751: } |
| 7142 | 3, 7, // 8756: case 0x3: { |
| 7143 | OPC_CheckPredicate, 39, // 8758: check predicate 39 |
| 7144 | OPC_Decode, 144, 25, 189, 2, // 8760: decode to WFKDB using decoder 317 |
| 7145 | // 8760: } |
| 7146 | 4, 0, // 8765: case 0x4: { |
| 7147 | OPC_CheckPredicate, 40, // 8767: check predicate 40 |
| 7148 | OPC_Decode, 164, 25, 156, 2, // 8769: decode to WFKXB using decoder 284 |
| 7149 | // 8769: } |
| 7150 | // 8769: } // switch Inst[19:12] |
| 7151 | // 8769: } else try { |
| 7152 | OPC_CheckPredicate, 39, // 8774: check predicate 39 |
| 7153 | OPC_Decode, 143, 25, 190, 2, // 8776: decode to WFK using decoder 318 |
| 7154 | // 8776: } |
| 7155 | // 8776: } |
| 7156 | 203, 1, 47, // 8781: case 0xcb: { |
| 7157 | OPC_CheckField, 8, 2, 0, // 8784: check Inst[9:8] == 0x0 |
| 7158 | OPC_CheckField, 20, 12, 0, // 8788: check Inst[31:20] == 0x0 |
| 7159 | OPC_Scope, 30, // 8792: try { |
| 7160 | OPC_SwitchField, 12, 8, // 8794: switch Inst[19:12] { |
| 7161 | 2, 7, // 8797: case 0x2: { |
| 7162 | OPC_CheckPredicate, 40, // 8799: check predicate 40 |
| 7163 | OPC_Decode, 135, 25, 188, 2, // 8801: decode to WFCSB using decoder 316 |
| 7164 | // 8801: } |
| 7165 | 3, 7, // 8806: case 0x3: { |
| 7166 | OPC_CheckPredicate, 39, // 8808: check predicate 39 |
| 7167 | OPC_Decode, 244, 24, 189, 2, // 8810: decode to WFCDB using decoder 317 |
| 7168 | // 8810: } |
| 7169 | 4, 0, // 8815: case 0x4: { |
| 7170 | OPC_CheckPredicate, 40, // 8817: check predicate 40 |
| 7171 | OPC_Decode, 136, 25, 156, 2, // 8819: decode to WFCXB using decoder 284 |
| 7172 | // 8819: } |
| 7173 | // 8819: } // switch Inst[19:12] |
| 7174 | // 8819: } else try { |
| 7175 | OPC_CheckPredicate, 39, // 8824: check predicate 39 |
| 7176 | OPC_Decode, 243, 24, 190, 2, // 8826: decode to WFC using decoder 318 |
| 7177 | // 8826: } |
| 7178 | // 8826: } |
| 7179 | 204, 1, 222, 1, // 8831: case 0xcc: { |
| 7180 | OPC_CheckField, 8, 2, 0, // 8835: check Inst[9:8] == 0x0 |
| 7181 | OPC_CheckField, 24, 8, 0, // 8839: check Inst[31:24] == 0x0 |
| 7182 | OPC_Scope, 151, 1, // 8843: try { |
| 7183 | OPC_SwitchField, 12, 12, // 8846: switch Inst[23:12] { |
| 7184 | 2, 7, // 8849: case 0x2: { |
| 7185 | OPC_CheckPredicate, 40, // 8851: check predicate 40 |
| 7186 | OPC_Decode, 175, 21, 156, 2, // 8853: decode to VFLCSB using decoder 284 |
| 7187 | // 8853: } |
| 7188 | 3, 7, // 8858: case 0x3: { |
| 7189 | OPC_CheckPredicate, 39, // 8860: check predicate 39 |
| 7190 | OPC_Decode, 174, 21, 156, 2, // 8862: decode to VFLCDB using decoder 284 |
| 7191 | // 8862: } |
| 7192 | 130, 1, 7, // 8867: case 0x82: { |
| 7193 | OPC_CheckPredicate, 40, // 8870: check predicate 40 |
| 7194 | OPC_Decode, 166, 25, 188, 2, // 8872: decode to WFLCSB using decoder 316 |
| 7195 | // 8872: } |
| 7196 | 131, 1, 7, // 8877: case 0x83: { |
| 7197 | OPC_CheckPredicate, 39, // 8880: check predicate 39 |
| 7198 | OPC_Decode, 165, 25, 189, 2, // 8882: decode to WFLCDB using decoder 317 |
| 7199 | // 8882: } |
| 7200 | 132, 1, 7, // 8887: case 0x84: { |
| 7201 | OPC_CheckPredicate, 40, // 8890: check predicate 40 |
| 7202 | OPC_Decode, 167, 25, 156, 2, // 8892: decode to WFLCXB using decoder 284 |
| 7203 | // 8892: } |
| 7204 | 130, 2, 7, // 8897: case 0x102: { |
| 7205 | OPC_CheckPredicate, 40, // 8900: check predicate 40 |
| 7206 | OPC_Decode, 179, 21, 156, 2, // 8902: decode to VFLNSB using decoder 284 |
| 7207 | // 8902: } |
| 7208 | 131, 2, 7, // 8907: case 0x103: { |
| 7209 | OPC_CheckPredicate, 39, // 8910: check predicate 39 |
| 7210 | OPC_Decode, 178, 21, 156, 2, // 8912: decode to VFLNDB using decoder 284 |
| 7211 | // 8912: } |
| 7212 | 130, 3, 7, // 8917: case 0x182: { |
| 7213 | OPC_CheckPredicate, 40, // 8920: check predicate 40 |
| 7214 | OPC_Decode, 171, 25, 188, 2, // 8922: decode to WFLNSB using decoder 316 |
| 7215 | // 8922: } |
| 7216 | 131, 3, 7, // 8927: case 0x183: { |
| 7217 | OPC_CheckPredicate, 39, // 8930: check predicate 39 |
| 7218 | OPC_Decode, 170, 25, 189, 2, // 8932: decode to WFLNDB using decoder 317 |
| 7219 | // 8932: } |
| 7220 | 132, 3, 7, // 8937: case 0x184: { |
| 7221 | OPC_CheckPredicate, 40, // 8940: check predicate 40 |
| 7222 | OPC_Decode, 172, 25, 156, 2, // 8942: decode to WFLNXB using decoder 284 |
| 7223 | // 8942: } |
| 7224 | 130, 4, 7, // 8947: case 0x202: { |
| 7225 | OPC_CheckPredicate, 40, // 8950: check predicate 40 |
| 7226 | OPC_Decode, 181, 21, 156, 2, // 8952: decode to VFLPSB using decoder 284 |
| 7227 | // 8952: } |
| 7228 | 131, 4, 7, // 8957: case 0x203: { |
| 7229 | OPC_CheckPredicate, 39, // 8960: check predicate 39 |
| 7230 | OPC_Decode, 180, 21, 156, 2, // 8962: decode to VFLPDB using decoder 284 |
| 7231 | // 8962: } |
| 7232 | 130, 5, 7, // 8967: case 0x282: { |
| 7233 | OPC_CheckPredicate, 40, // 8970: check predicate 40 |
| 7234 | OPC_Decode, 174, 25, 188, 2, // 8972: decode to WFLPSB using decoder 316 |
| 7235 | // 8972: } |
| 7236 | 131, 5, 7, // 8977: case 0x283: { |
| 7237 | OPC_CheckPredicate, 39, // 8980: check predicate 39 |
| 7238 | OPC_Decode, 173, 25, 189, 2, // 8982: decode to WFLPDB using decoder 317 |
| 7239 | // 8982: } |
| 7240 | 132, 5, 0, // 8987: case 0x284: { |
| 7241 | OPC_CheckPredicate, 40, // 8990: check predicate 40 |
| 7242 | OPC_Decode, 175, 25, 156, 2, // 8992: decode to WFLPXB using decoder 284 |
| 7243 | // 8992: } |
| 7244 | // 8992: } // switch Inst[23:12] |
| 7245 | OPC_Scope, 51, // 8997: } else try { |
| 7246 | OPC_SwitchField, 12, 8, // 8999: switch Inst[19:12] { |
| 7247 | 2, 7, // 9002: case 0x2: { |
| 7248 | OPC_CheckPredicate, 40, // 9004: check predicate 40 |
| 7249 | OPC_Decode, 207, 21, 234, 1, // 9006: decode to VFPSOSB using decoder 234 |
| 7250 | // 9006: } |
| 7251 | 3, 7, // 9011: case 0x3: { |
| 7252 | OPC_CheckPredicate, 39, // 9013: check predicate 39 |
| 7253 | OPC_Decode, 206, 21, 234, 1, // 9015: decode to VFPSODB using decoder 234 |
| 7254 | // 9015: } |
| 7255 | 130, 1, 7, // 9020: case 0x82: { |
| 7256 | OPC_CheckPredicate, 40, // 9023: check predicate 40 |
| 7257 | OPC_Decode, 200, 25, 191, 2, // 9025: decode to WFPSOSB using decoder 319 |
| 7258 | // 9025: } |
| 7259 | 131, 1, 7, // 9030: case 0x83: { |
| 7260 | OPC_CheckPredicate, 39, // 9033: check predicate 39 |
| 7261 | OPC_Decode, 199, 25, 192, 2, // 9035: decode to WFPSODB using decoder 320 |
| 7262 | // 9035: } |
| 7263 | 132, 1, 0, // 9040: case 0x84: { |
| 7264 | OPC_CheckPredicate, 40, // 9043: check predicate 40 |
| 7265 | OPC_Decode, 201, 25, 234, 1, // 9045: decode to WFPSOXB using decoder 234 |
| 7266 | // 9045: } |
| 7267 | // 9045: } // switch Inst[19:12] |
| 7268 | // 9045: } else try { |
| 7269 | OPC_CheckPredicate, 39, // 9050: check predicate 39 |
| 7270 | OPC_Decode, 205, 21, 182, 2, // 9052: decode to VFPSO using decoder 310 |
| 7271 | // 9052: } |
| 7272 | // 9052: } |
| 7273 | 206, 1, 68, // 9057: case 0xce: { |
| 7274 | OPC_CheckField, 8, 2, 0, // 9060: check Inst[9:8] == 0x0 |
| 7275 | OPC_CheckField, 20, 12, 0, // 9064: check Inst[31:20] == 0x0 |
| 7276 | OPC_Scope, 51, // 9068: try { |
| 7277 | OPC_SwitchField, 12, 8, // 9070: switch Inst[19:12] { |
| 7278 | 2, 7, // 9073: case 0x2: { |
| 7279 | OPC_CheckPredicate, 40, // 9075: check predicate 40 |
| 7280 | OPC_Decode, 212, 21, 156, 2, // 9077: decode to VFSQSB using decoder 284 |
| 7281 | // 9077: } |
| 7282 | 3, 7, // 9082: case 0x3: { |
| 7283 | OPC_CheckPredicate, 39, // 9084: check predicate 39 |
| 7284 | OPC_Decode, 211, 21, 156, 2, // 9086: decode to VFSQDB using decoder 284 |
| 7285 | // 9086: } |
| 7286 | 130, 1, 7, // 9091: case 0x82: { |
| 7287 | OPC_CheckPredicate, 40, // 9094: check predicate 40 |
| 7288 | OPC_Decode, 204, 25, 188, 2, // 9096: decode to WFSQSB using decoder 316 |
| 7289 | // 9096: } |
| 7290 | 131, 1, 7, // 9101: case 0x83: { |
| 7291 | OPC_CheckPredicate, 39, // 9104: check predicate 39 |
| 7292 | OPC_Decode, 203, 25, 189, 2, // 9106: decode to WFSQDB using decoder 317 |
| 7293 | // 9106: } |
| 7294 | 132, 1, 0, // 9111: case 0x84: { |
| 7295 | OPC_CheckPredicate, 40, // 9114: check predicate 40 |
| 7296 | OPC_Decode, 205, 25, 156, 2, // 9116: decode to WFSQXB using decoder 284 |
| 7297 | // 9116: } |
| 7298 | // 9116: } // switch Inst[19:12] |
| 7299 | // 9116: } else try { |
| 7300 | OPC_CheckPredicate, 39, // 9121: check predicate 39 |
| 7301 | OPC_Decode, 210, 21, 239, 1, // 9123: decode to VFSQ using decoder 239 |
| 7302 | // 9123: } |
| 7303 | // 9123: } |
| 7304 | 212, 1, 56, // 9128: case 0xd4: { |
| 7305 | OPC_CheckField, 8, 2, 0, // 9131: check Inst[9:8] == 0x0 |
| 7306 | OPC_CheckField, 16, 16, 0, // 9135: check Inst[31:16] == 0x0 |
| 7307 | OPC_Scope, 39, // 9139: try { |
| 7308 | OPC_SwitchField, 12, 4, // 9141: switch Inst[15:12] { |
| 7309 | 0, 7, // 9144: case 0x0: { |
| 7310 | OPC_CheckPredicate, 39, // 9146: check predicate 39 |
| 7311 | OPC_Decode, 226, 24, 156, 2, // 9148: decode to VUPLLB using decoder 284 |
| 7312 | // 9148: } |
| 7313 | 1, 7, // 9153: case 0x1: { |
| 7314 | OPC_CheckPredicate, 39, // 9155: check predicate 39 |
| 7315 | OPC_Decode, 229, 24, 156, 2, // 9157: decode to VUPLLH using decoder 284 |
| 7316 | // 9157: } |
| 7317 | 2, 7, // 9162: case 0x2: { |
| 7318 | OPC_CheckPredicate, 39, // 9164: check predicate 39 |
| 7319 | OPC_Decode, 227, 24, 156, 2, // 9166: decode to VUPLLF using decoder 284 |
| 7320 | // 9166: } |
| 7321 | 3, 0, // 9171: case 0x3: { |
| 7322 | OPC_CheckPredicate, 41, // 9173: check predicate 41 |
| 7323 | OPC_Decode, 228, 24, 156, 2, // 9175: decode to VUPLLG using decoder 284 |
| 7324 | // 9175: } |
| 7325 | // 9175: } // switch Inst[15:12] |
| 7326 | // 9175: } else try { |
| 7327 | OPC_CheckPredicate, 39, // 9180: check predicate 39 |
| 7328 | OPC_Decode, 225, 24, 157, 2, // 9182: decode to VUPLL using decoder 285 |
| 7329 | // 9182: } |
| 7330 | // 9182: } |
| 7331 | 213, 1, 56, // 9187: case 0xd5: { |
| 7332 | OPC_CheckField, 8, 2, 0, // 9190: check Inst[9:8] == 0x0 |
| 7333 | OPC_CheckField, 16, 16, 0, // 9194: check Inst[31:16] == 0x0 |
| 7334 | OPC_Scope, 39, // 9198: try { |
| 7335 | OPC_SwitchField, 12, 4, // 9200: switch Inst[15:12] { |
| 7336 | 0, 7, // 9203: case 0x0: { |
| 7337 | OPC_CheckPredicate, 39, // 9205: check predicate 39 |
| 7338 | OPC_Decode, 220, 24, 156, 2, // 9207: decode to VUPLHB using decoder 284 |
| 7339 | // 9207: } |
| 7340 | 1, 7, // 9212: case 0x1: { |
| 7341 | OPC_CheckPredicate, 39, // 9214: check predicate 39 |
| 7342 | OPC_Decode, 223, 24, 156, 2, // 9216: decode to VUPLHH using decoder 284 |
| 7343 | // 9216: } |
| 7344 | 2, 7, // 9221: case 0x2: { |
| 7345 | OPC_CheckPredicate, 39, // 9223: check predicate 39 |
| 7346 | OPC_Decode, 221, 24, 156, 2, // 9225: decode to VUPLHF using decoder 284 |
| 7347 | // 9225: } |
| 7348 | 3, 0, // 9230: case 0x3: { |
| 7349 | OPC_CheckPredicate, 41, // 9232: check predicate 41 |
| 7350 | OPC_Decode, 222, 24, 156, 2, // 9234: decode to VUPLHG using decoder 284 |
| 7351 | // 9234: } |
| 7352 | // 9234: } // switch Inst[15:12] |
| 7353 | // 9234: } else try { |
| 7354 | OPC_CheckPredicate, 39, // 9239: check predicate 39 |
| 7355 | OPC_Decode, 219, 24, 157, 2, // 9241: decode to VUPLH using decoder 285 |
| 7356 | // 9241: } |
| 7357 | // 9241: } |
| 7358 | 214, 1, 56, // 9246: case 0xd6: { |
| 7359 | OPC_CheckField, 8, 2, 0, // 9249: check Inst[9:8] == 0x0 |
| 7360 | OPC_CheckField, 16, 16, 0, // 9253: check Inst[31:16] == 0x0 |
| 7361 | OPC_Scope, 39, // 9257: try { |
| 7362 | OPC_SwitchField, 12, 4, // 9259: switch Inst[15:12] { |
| 7363 | 0, 7, // 9262: case 0x0: { |
| 7364 | OPC_CheckPredicate, 39, // 9264: check predicate 39 |
| 7365 | OPC_Decode, 216, 24, 156, 2, // 9266: decode to VUPLB using decoder 284 |
| 7366 | // 9266: } |
| 7367 | 1, 7, // 9271: case 0x1: { |
| 7368 | OPC_CheckPredicate, 39, // 9273: check predicate 39 |
| 7369 | OPC_Decode, 224, 24, 156, 2, // 9275: decode to VUPLHW using decoder 284 |
| 7370 | // 9275: } |
| 7371 | 2, 7, // 9280: case 0x2: { |
| 7372 | OPC_CheckPredicate, 39, // 9282: check predicate 39 |
| 7373 | OPC_Decode, 217, 24, 156, 2, // 9284: decode to VUPLF using decoder 284 |
| 7374 | // 9284: } |
| 7375 | 3, 0, // 9289: case 0x3: { |
| 7376 | OPC_CheckPredicate, 41, // 9291: check predicate 41 |
| 7377 | OPC_Decode, 218, 24, 156, 2, // 9293: decode to VUPLG using decoder 284 |
| 7378 | // 9293: } |
| 7379 | // 9293: } // switch Inst[15:12] |
| 7380 | // 9293: } else try { |
| 7381 | OPC_CheckPredicate, 39, // 9298: check predicate 39 |
| 7382 | OPC_Decode, 215, 24, 157, 2, // 9300: decode to VUPL using decoder 285 |
| 7383 | // 9300: } |
| 7384 | // 9300: } |
| 7385 | 215, 1, 56, // 9305: case 0xd7: { |
| 7386 | OPC_CheckField, 8, 2, 0, // 9308: check Inst[9:8] == 0x0 |
| 7387 | OPC_CheckField, 16, 16, 0, // 9312: check Inst[31:16] == 0x0 |
| 7388 | OPC_Scope, 39, // 9316: try { |
| 7389 | OPC_SwitchField, 12, 4, // 9318: switch Inst[15:12] { |
| 7390 | 0, 7, // 9321: case 0x0: { |
| 7391 | OPC_CheckPredicate, 39, // 9323: check predicate 39 |
| 7392 | OPC_Decode, 208, 24, 156, 2, // 9325: decode to VUPHB using decoder 284 |
| 7393 | // 9325: } |
| 7394 | 1, 7, // 9330: case 0x1: { |
| 7395 | OPC_CheckPredicate, 39, // 9332: check predicate 39 |
| 7396 | OPC_Decode, 211, 24, 156, 2, // 9334: decode to VUPHH using decoder 284 |
| 7397 | // 9334: } |
| 7398 | 2, 7, // 9339: case 0x2: { |
| 7399 | OPC_CheckPredicate, 39, // 9341: check predicate 39 |
| 7400 | OPC_Decode, 209, 24, 156, 2, // 9343: decode to VUPHF using decoder 284 |
| 7401 | // 9343: } |
| 7402 | 3, 0, // 9348: case 0x3: { |
| 7403 | OPC_CheckPredicate, 41, // 9350: check predicate 41 |
| 7404 | OPC_Decode, 210, 24, 156, 2, // 9352: decode to VUPHG using decoder 284 |
| 7405 | // 9352: } |
| 7406 | // 9352: } // switch Inst[15:12] |
| 7407 | // 9352: } else try { |
| 7408 | OPC_CheckPredicate, 39, // 9357: check predicate 39 |
| 7409 | OPC_Decode, 207, 24, 157, 2, // 9359: decode to VUPH using decoder 285 |
| 7410 | // 9359: } |
| 7411 | // 9359: } |
| 7412 | 216, 1, 15, // 9364: case 0xd8: { |
| 7413 | OPC_CheckPredicate, 39, // 9367: check predicate 39 |
| 7414 | OPC_CheckField, 12, 20, 0, // 9369: check Inst[31:12] == 0x0 |
| 7415 | OPC_CheckField, 8, 2, 0, // 9373: check Inst[9:8] == 0x0 |
| 7416 | OPC_Decode, 203, 24, 156, 2, // 9377: decode to VTM using decoder 284 |
| 7417 | // 9377: } |
| 7418 | 217, 1, 65, // 9382: case 0xd9: { |
| 7419 | OPC_CheckField, 8, 2, 0, // 9385: check Inst[9:8] == 0x0 |
| 7420 | OPC_CheckField, 16, 16, 0, // 9389: check Inst[31:16] == 0x0 |
| 7421 | OPC_Scope, 48, // 9393: try { |
| 7422 | OPC_SwitchField, 12, 4, // 9395: switch Inst[15:12] { |
| 7423 | 0, 7, // 9398: case 0x0: { |
| 7424 | OPC_CheckPredicate, 39, // 9400: check predicate 39 |
| 7425 | OPC_Decode, 175, 20, 156, 2, // 9402: decode to VECLB using decoder 284 |
| 7426 | // 9402: } |
| 7427 | 1, 7, // 9407: case 0x1: { |
| 7428 | OPC_CheckPredicate, 39, // 9409: check predicate 39 |
| 7429 | OPC_Decode, 178, 20, 156, 2, // 9411: decode to VECLH using decoder 284 |
| 7430 | // 9411: } |
| 7431 | 2, 7, // 9416: case 0x2: { |
| 7432 | OPC_CheckPredicate, 39, // 9418: check predicate 39 |
| 7433 | OPC_Decode, 176, 20, 156, 2, // 9420: decode to VECLF using decoder 284 |
| 7434 | // 9420: } |
| 7435 | 3, 7, // 9425: case 0x3: { |
| 7436 | OPC_CheckPredicate, 39, // 9427: check predicate 39 |
| 7437 | OPC_Decode, 177, 20, 156, 2, // 9429: decode to VECLG using decoder 284 |
| 7438 | // 9429: } |
| 7439 | 4, 0, // 9434: case 0x4: { |
| 7440 | OPC_CheckPredicate, 41, // 9436: check predicate 41 |
| 7441 | OPC_Decode, 179, 20, 156, 2, // 9438: decode to VECLQ using decoder 284 |
| 7442 | // 9438: } |
| 7443 | // 9438: } // switch Inst[15:12] |
| 7444 | // 9438: } else try { |
| 7445 | OPC_CheckPredicate, 39, // 9443: check predicate 39 |
| 7446 | OPC_Decode, 174, 20, 157, 2, // 9445: decode to VECL using decoder 285 |
| 7447 | // 9445: } |
| 7448 | // 9445: } |
| 7449 | 219, 1, 65, // 9450: case 0xdb: { |
| 7450 | OPC_CheckField, 8, 2, 0, // 9453: check Inst[9:8] == 0x0 |
| 7451 | OPC_CheckField, 16, 16, 0, // 9457: check Inst[31:16] == 0x0 |
| 7452 | OPC_Scope, 48, // 9461: try { |
| 7453 | OPC_SwitchField, 12, 4, // 9463: switch Inst[15:12] { |
| 7454 | 0, 7, // 9466: case 0x0: { |
| 7455 | OPC_CheckPredicate, 39, // 9468: check predicate 39 |
| 7456 | OPC_Decode, 170, 20, 156, 2, // 9470: decode to VECB using decoder 284 |
| 7457 | // 9470: } |
| 7458 | 1, 7, // 9475: case 0x1: { |
| 7459 | OPC_CheckPredicate, 39, // 9477: check predicate 39 |
| 7460 | OPC_Decode, 173, 20, 156, 2, // 9479: decode to VECH using decoder 284 |
| 7461 | // 9479: } |
| 7462 | 2, 7, // 9484: case 0x2: { |
| 7463 | OPC_CheckPredicate, 39, // 9486: check predicate 39 |
| 7464 | OPC_Decode, 171, 20, 156, 2, // 9488: decode to VECF using decoder 284 |
| 7465 | // 9488: } |
| 7466 | 3, 7, // 9493: case 0x3: { |
| 7467 | OPC_CheckPredicate, 39, // 9495: check predicate 39 |
| 7468 | OPC_Decode, 172, 20, 156, 2, // 9497: decode to VECG using decoder 284 |
| 7469 | // 9497: } |
| 7470 | 4, 0, // 9502: case 0x4: { |
| 7471 | OPC_CheckPredicate, 41, // 9504: check predicate 41 |
| 7472 | OPC_Decode, 180, 20, 156, 2, // 9506: decode to VECQ using decoder 284 |
| 7473 | // 9506: } |
| 7474 | // 9506: } // switch Inst[15:12] |
| 7475 | // 9506: } else try { |
| 7476 | OPC_CheckPredicate, 39, // 9511: check predicate 39 |
| 7477 | OPC_Decode, 169, 20, 157, 2, // 9513: decode to VEC using decoder 285 |
| 7478 | // 9513: } |
| 7479 | // 9513: } |
| 7480 | 222, 1, 65, // 9518: case 0xde: { |
| 7481 | OPC_CheckField, 8, 2, 0, // 9521: check Inst[9:8] == 0x0 |
| 7482 | OPC_CheckField, 16, 16, 0, // 9525: check Inst[31:16] == 0x0 |
| 7483 | OPC_Scope, 48, // 9529: try { |
| 7484 | OPC_SwitchField, 12, 4, // 9531: switch Inst[15:12] { |
| 7485 | 0, 7, // 9534: case 0x0: { |
| 7486 | OPC_CheckPredicate, 39, // 9536: check predicate 39 |
| 7487 | OPC_Decode, 133, 22, 156, 2, // 9538: decode to VLCB using decoder 284 |
| 7488 | // 9538: } |
| 7489 | 1, 7, // 9543: case 0x1: { |
| 7490 | OPC_CheckPredicate, 39, // 9545: check predicate 39 |
| 7491 | OPC_Decode, 136, 22, 156, 2, // 9547: decode to VLCH using decoder 284 |
| 7492 | // 9547: } |
| 7493 | 2, 7, // 9552: case 0x2: { |
| 7494 | OPC_CheckPredicate, 39, // 9554: check predicate 39 |
| 7495 | OPC_Decode, 134, 22, 156, 2, // 9556: decode to VLCF using decoder 284 |
| 7496 | // 9556: } |
| 7497 | 3, 7, // 9561: case 0x3: { |
| 7498 | OPC_CheckPredicate, 39, // 9563: check predicate 39 |
| 7499 | OPC_Decode, 135, 22, 156, 2, // 9565: decode to VLCG using decoder 284 |
| 7500 | // 9565: } |
| 7501 | 4, 0, // 9570: case 0x4: { |
| 7502 | OPC_CheckPredicate, 41, // 9572: check predicate 41 |
| 7503 | OPC_Decode, 137, 22, 156, 2, // 9574: decode to VLCQ using decoder 284 |
| 7504 | // 9574: } |
| 7505 | // 9574: } // switch Inst[15:12] |
| 7506 | // 9574: } else try { |
| 7507 | OPC_CheckPredicate, 39, // 9579: check predicate 39 |
| 7508 | OPC_Decode, 132, 22, 157, 2, // 9581: decode to VLC using decoder 285 |
| 7509 | // 9581: } |
| 7510 | // 9581: } |
| 7511 | 223, 1, 65, // 9586: case 0xdf: { |
| 7512 | OPC_CheckField, 8, 2, 0, // 9589: check Inst[9:8] == 0x0 |
| 7513 | OPC_CheckField, 16, 16, 0, // 9593: check Inst[31:16] == 0x0 |
| 7514 | OPC_Scope, 48, // 9597: try { |
| 7515 | OPC_SwitchField, 12, 4, // 9599: switch Inst[15:12] { |
| 7516 | 0, 7, // 9602: case 0x0: { |
| 7517 | OPC_CheckPredicate, 39, // 9604: check predicate 39 |
| 7518 | OPC_Decode, 178, 22, 156, 2, // 9606: decode to VLPB using decoder 284 |
| 7519 | // 9606: } |
| 7520 | 1, 7, // 9611: case 0x1: { |
| 7521 | OPC_CheckPredicate, 39, // 9613: check predicate 39 |
| 7522 | OPC_Decode, 181, 22, 156, 2, // 9615: decode to VLPH using decoder 284 |
| 7523 | // 9615: } |
| 7524 | 2, 7, // 9620: case 0x2: { |
| 7525 | OPC_CheckPredicate, 39, // 9622: check predicate 39 |
| 7526 | OPC_Decode, 179, 22, 156, 2, // 9624: decode to VLPF using decoder 284 |
| 7527 | // 9624: } |
| 7528 | 3, 7, // 9629: case 0x3: { |
| 7529 | OPC_CheckPredicate, 39, // 9631: check predicate 39 |
| 7530 | OPC_Decode, 180, 22, 156, 2, // 9633: decode to VLPG using decoder 284 |
| 7531 | // 9633: } |
| 7532 | 4, 0, // 9638: case 0x4: { |
| 7533 | OPC_CheckPredicate, 41, // 9640: check predicate 41 |
| 7534 | OPC_Decode, 182, 22, 156, 2, // 9642: decode to VLPQ using decoder 284 |
| 7535 | // 9642: } |
| 7536 | // 9642: } // switch Inst[15:12] |
| 7537 | // 9642: } else try { |
| 7538 | OPC_CheckPredicate, 39, // 9647: check predicate 39 |
| 7539 | OPC_Decode, 177, 22, 157, 2, // 9649: decode to VLP using decoder 285 |
| 7540 | // 9649: } |
| 7541 | // 9649: } |
| 7542 | 226, 1, 68, // 9654: case 0xe2: { |
| 7543 | OPC_CheckField, 8, 1, 0, // 9657: check Inst[8] == 0x0 |
| 7544 | OPC_CheckField, 20, 8, 0, // 9661: check Inst[27:20] == 0x0 |
| 7545 | OPC_Scope, 51, // 9665: try { |
| 7546 | OPC_SwitchField, 12, 8, // 9667: switch Inst[19:12] { |
| 7547 | 2, 7, // 9670: case 0x2: { |
| 7548 | OPC_CheckPredicate, 40, // 9672: check predicate 40 |
| 7549 | OPC_Decode, 213, 21, 250, 1, // 9674: decode to VFSSB using decoder 250 |
| 7550 | // 9674: } |
| 7551 | 3, 7, // 9679: case 0x3: { |
| 7552 | OPC_CheckPredicate, 39, // 9681: check predicate 39 |
| 7553 | OPC_Decode, 209, 21, 250, 1, // 9683: decode to VFSDB using decoder 250 |
| 7554 | // 9683: } |
| 7555 | 130, 1, 7, // 9688: case 0x82: { |
| 7556 | OPC_CheckPredicate, 40, // 9691: check predicate 40 |
| 7557 | OPC_Decode, 206, 25, 193, 2, // 9693: decode to WFSSB using decoder 321 |
| 7558 | // 9693: } |
| 7559 | 131, 1, 7, // 9698: case 0x83: { |
| 7560 | OPC_CheckPredicate, 39, // 9701: check predicate 39 |
| 7561 | OPC_Decode, 202, 25, 194, 2, // 9703: decode to WFSDB using decoder 322 |
| 7562 | // 9703: } |
| 7563 | 132, 1, 0, // 9708: case 0x84: { |
| 7564 | OPC_CheckPredicate, 40, // 9711: check predicate 40 |
| 7565 | OPC_Decode, 207, 25, 250, 1, // 9713: decode to WFSXB using decoder 250 |
| 7566 | // 9713: } |
| 7567 | // 9713: } // switch Inst[19:12] |
| 7568 | // 9713: } else try { |
| 7569 | OPC_CheckPredicate, 39, // 9718: check predicate 39 |
| 7570 | OPC_Decode, 208, 21, 248, 1, // 9720: decode to VFS using decoder 248 |
| 7571 | // 9720: } |
| 7572 | // 9720: } |
| 7573 | 227, 1, 68, // 9725: case 0xe3: { |
| 7574 | OPC_CheckField, 8, 1, 0, // 9728: check Inst[8] == 0x0 |
| 7575 | OPC_CheckField, 20, 8, 0, // 9732: check Inst[27:20] == 0x0 |
| 7576 | OPC_Scope, 51, // 9736: try { |
| 7577 | OPC_SwitchField, 12, 8, // 9738: switch Inst[19:12] { |
| 7578 | 2, 7, // 9741: case 0x2: { |
| 7579 | OPC_CheckPredicate, 40, // 9743: check predicate 40 |
| 7580 | OPC_Decode, 242, 20, 250, 1, // 9745: decode to VFASB using decoder 250 |
| 7581 | // 9745: } |
| 7582 | 3, 7, // 9750: case 0x3: { |
| 7583 | OPC_CheckPredicate, 39, // 9752: check predicate 39 |
| 7584 | OPC_Decode, 228, 20, 250, 1, // 9754: decode to VFADB using decoder 250 |
| 7585 | // 9754: } |
| 7586 | 130, 1, 7, // 9759: case 0x82: { |
| 7587 | OPC_CheckPredicate, 40, // 9762: check predicate 40 |
| 7588 | OPC_Decode, 241, 24, 193, 2, // 9764: decode to WFASB using decoder 321 |
| 7589 | // 9764: } |
| 7590 | 131, 1, 7, // 9769: case 0x83: { |
| 7591 | OPC_CheckPredicate, 39, // 9772: check predicate 39 |
| 7592 | OPC_Decode, 240, 24, 194, 2, // 9774: decode to WFADB using decoder 322 |
| 7593 | // 9774: } |
| 7594 | 132, 1, 0, // 9779: case 0x84: { |
| 7595 | OPC_CheckPredicate, 40, // 9782: check predicate 40 |
| 7596 | OPC_Decode, 242, 24, 250, 1, // 9784: decode to WFAXB using decoder 250 |
| 7597 | // 9784: } |
| 7598 | // 9784: } // switch Inst[19:12] |
| 7599 | // 9784: } else try { |
| 7600 | OPC_CheckPredicate, 39, // 9789: check predicate 39 |
| 7601 | OPC_Decode, 227, 20, 248, 1, // 9791: decode to VFA using decoder 248 |
| 7602 | // 9791: } |
| 7603 | // 9791: } |
| 7604 | 229, 1, 68, // 9796: case 0xe5: { |
| 7605 | OPC_CheckField, 8, 1, 0, // 9799: check Inst[8] == 0x0 |
| 7606 | OPC_CheckField, 20, 8, 0, // 9803: check Inst[27:20] == 0x0 |
| 7607 | OPC_Scope, 51, // 9807: try { |
| 7608 | OPC_SwitchField, 12, 8, // 9809: switch Inst[19:12] { |
| 7609 | 2, 7, // 9812: case 0x2: { |
| 7610 | OPC_CheckPredicate, 40, // 9814: check predicate 40 |
| 7611 | OPC_Decode, 132, 21, 250, 1, // 9816: decode to VFDSB using decoder 250 |
| 7612 | // 9816: } |
| 7613 | 3, 7, // 9821: case 0x3: { |
| 7614 | OPC_CheckPredicate, 39, // 9823: check predicate 39 |
| 7615 | OPC_Decode, 131, 21, 250, 1, // 9825: decode to VFDDB using decoder 250 |
| 7616 | // 9825: } |
| 7617 | 130, 1, 7, // 9830: case 0x82: { |
| 7618 | OPC_CheckPredicate, 40, // 9833: check predicate 40 |
| 7619 | OPC_Decode, 138, 25, 193, 2, // 9835: decode to WFDSB using decoder 321 |
| 7620 | // 9835: } |
| 7621 | 131, 1, 7, // 9840: case 0x83: { |
| 7622 | OPC_CheckPredicate, 39, // 9843: check predicate 39 |
| 7623 | OPC_Decode, 137, 25, 194, 2, // 9845: decode to WFDDB using decoder 322 |
| 7624 | // 9845: } |
| 7625 | 132, 1, 0, // 9850: case 0x84: { |
| 7626 | OPC_CheckPredicate, 40, // 9853: check predicate 40 |
| 7627 | OPC_Decode, 139, 25, 250, 1, // 9855: decode to WFDXB using decoder 250 |
| 7628 | // 9855: } |
| 7629 | // 9855: } // switch Inst[19:12] |
| 7630 | // 9855: } else try { |
| 7631 | OPC_CheckPredicate, 39, // 9860: check predicate 39 |
| 7632 | OPC_Decode, 130, 21, 248, 1, // 9862: decode to VFD using decoder 248 |
| 7633 | // 9862: } |
| 7634 | // 9862: } |
| 7635 | 231, 1, 68, // 9867: case 0xe7: { |
| 7636 | OPC_CheckField, 8, 1, 0, // 9870: check Inst[8] == 0x0 |
| 7637 | OPC_CheckField, 20, 8, 0, // 9874: check Inst[27:20] == 0x0 |
| 7638 | OPC_Scope, 51, // 9878: try { |
| 7639 | OPC_SwitchField, 12, 8, // 9880: switch Inst[19:12] { |
| 7640 | 2, 7, // 9883: case 0x2: { |
| 7641 | OPC_CheckPredicate, 40, // 9885: check predicate 40 |
| 7642 | OPC_Decode, 196, 21, 250, 1, // 9887: decode to VFMSB using decoder 250 |
| 7643 | // 9887: } |
| 7644 | 3, 7, // 9892: case 0x3: { |
| 7645 | OPC_CheckPredicate, 39, // 9894: check predicate 39 |
| 7646 | OPC_Decode, 191, 21, 250, 1, // 9896: decode to VFMDB using decoder 250 |
| 7647 | // 9896: } |
| 7648 | 130, 1, 7, // 9901: case 0x82: { |
| 7649 | OPC_CheckPredicate, 40, // 9904: check predicate 40 |
| 7650 | OPC_Decode, 188, 25, 193, 2, // 9906: decode to WFMSB using decoder 321 |
| 7651 | // 9906: } |
| 7652 | 131, 1, 7, // 9911: case 0x83: { |
| 7653 | OPC_CheckPredicate, 39, // 9914: check predicate 39 |
| 7654 | OPC_Decode, 184, 25, 194, 2, // 9916: decode to WFMDB using decoder 322 |
| 7655 | // 9916: } |
| 7656 | 132, 1, 0, // 9921: case 0x84: { |
| 7657 | OPC_CheckPredicate, 40, // 9924: check predicate 40 |
| 7658 | OPC_Decode, 192, 25, 250, 1, // 9926: decode to WFMXB using decoder 250 |
| 7659 | // 9926: } |
| 7660 | // 9926: } // switch Inst[19:12] |
| 7661 | // 9926: } else try { |
| 7662 | OPC_CheckPredicate, 39, // 9931: check predicate 39 |
| 7663 | OPC_Decode, 184, 21, 248, 1, // 9933: decode to VFM using decoder 248 |
| 7664 | // 9933: } |
| 7665 | // 9933: } |
| 7666 | 232, 1, 217, 1, // 9938: case 0xe8: { |
| 7667 | OPC_CheckField, 8, 1, 0, // 9942: check Inst[8] == 0x0 |
| 7668 | OPC_CheckField, 24, 4, 0, // 9946: check Inst[27:24] == 0x0 |
| 7669 | OPC_Scope, 199, 1, // 9950: try { |
| 7670 | OPC_SwitchField, 12, 12, // 9953: switch Inst[23:12] { |
| 7671 | 2, 7, // 9956: case 0x2: { |
| 7672 | OPC_CheckPredicate, 40, // 9958: check predicate 40 |
| 7673 | OPC_Decode, 246, 20, 250, 1, // 9960: decode to VFCESB using decoder 250 |
| 7674 | // 9960: } |
| 7675 | 3, 7, // 9965: case 0x3: { |
| 7676 | OPC_CheckPredicate, 39, // 9967: check predicate 39 |
| 7677 | OPC_Decode, 244, 20, 250, 1, // 9969: decode to VFCEDB using decoder 250 |
| 7678 | // 9969: } |
| 7679 | 66, 7, // 9974: case 0x42: { |
| 7680 | OPC_CheckPredicate, 40, // 9976: check predicate 40 |
| 7681 | OPC_Decode, 164, 21, 250, 1, // 9978: decode to VFKESB using decoder 250 |
| 7682 | // 9978: } |
| 7683 | 67, 7, // 9983: case 0x43: { |
| 7684 | OPC_CheckPredicate, 40, // 9985: check predicate 40 |
| 7685 | OPC_Decode, 162, 21, 250, 1, // 9987: decode to VFKEDB using decoder 250 |
| 7686 | // 9987: } |
| 7687 | 130, 1, 7, // 9992: case 0x82: { |
| 7688 | OPC_CheckPredicate, 40, // 9995: check predicate 40 |
| 7689 | OPC_Decode, 247, 24, 193, 2, // 9997: decode to WFCESB using decoder 321 |
| 7690 | // 9997: } |
| 7691 | 131, 1, 7, // 10002: case 0x83: { |
| 7692 | OPC_CheckPredicate, 39, // 10005: check predicate 39 |
| 7693 | OPC_Decode, 245, 24, 194, 2, // 10007: decode to WFCEDB using decoder 322 |
| 7694 | // 10007: } |
| 7695 | 132, 1, 7, // 10012: case 0x84: { |
| 7696 | OPC_CheckPredicate, 40, // 10015: check predicate 40 |
| 7697 | OPC_Decode, 249, 24, 250, 1, // 10017: decode to WFCEXB using decoder 250 |
| 7698 | // 10017: } |
| 7699 | 194, 1, 7, // 10022: case 0xc2: { |
| 7700 | OPC_CheckPredicate, 40, // 10025: check predicate 40 |
| 7701 | OPC_Decode, 147, 25, 193, 2, // 10027: decode to WFKESB using decoder 321 |
| 7702 | // 10027: } |
| 7703 | 195, 1, 7, // 10032: case 0xc3: { |
| 7704 | OPC_CheckPredicate, 40, // 10035: check predicate 40 |
| 7705 | OPC_Decode, 145, 25, 194, 2, // 10037: decode to WFKEDB using decoder 322 |
| 7706 | // 10037: } |
| 7707 | 196, 1, 7, // 10042: case 0xc4: { |
| 7708 | OPC_CheckPredicate, 40, // 10045: check predicate 40 |
| 7709 | OPC_Decode, 149, 25, 250, 1, // 10047: decode to WFKEXB using decoder 250 |
| 7710 | // 10047: } |
| 7711 | 130, 2, 7, // 10052: case 0x102: { |
| 7712 | OPC_CheckPredicate, 40, // 10055: check predicate 40 |
| 7713 | OPC_Decode, 247, 20, 250, 1, // 10057: decode to VFCESBS using decoder 250 |
| 7714 | // 10057: } |
| 7715 | 131, 2, 7, // 10062: case 0x103: { |
| 7716 | OPC_CheckPredicate, 39, // 10065: check predicate 39 |
| 7717 | OPC_Decode, 245, 20, 250, 1, // 10067: decode to VFCEDBS using decoder 250 |
| 7718 | // 10067: } |
| 7719 | 194, 2, 7, // 10072: case 0x142: { |
| 7720 | OPC_CheckPredicate, 40, // 10075: check predicate 40 |
| 7721 | OPC_Decode, 165, 21, 250, 1, // 10077: decode to VFKESBS using decoder 250 |
| 7722 | // 10077: } |
| 7723 | 195, 2, 7, // 10082: case 0x143: { |
| 7724 | OPC_CheckPredicate, 40, // 10085: check predicate 40 |
| 7725 | OPC_Decode, 163, 21, 250, 1, // 10087: decode to VFKEDBS using decoder 250 |
| 7726 | // 10087: } |
| 7727 | 130, 3, 7, // 10092: case 0x182: { |
| 7728 | OPC_CheckPredicate, 40, // 10095: check predicate 40 |
| 7729 | OPC_Decode, 248, 24, 193, 2, // 10097: decode to WFCESBS using decoder 321 |
| 7730 | // 10097: } |
| 7731 | 131, 3, 7, // 10102: case 0x183: { |
| 7732 | OPC_CheckPredicate, 39, // 10105: check predicate 39 |
| 7733 | OPC_Decode, 246, 24, 194, 2, // 10107: decode to WFCEDBS using decoder 322 |
| 7734 | // 10107: } |
| 7735 | 132, 3, 7, // 10112: case 0x184: { |
| 7736 | OPC_CheckPredicate, 40, // 10115: check predicate 40 |
| 7737 | OPC_Decode, 250, 24, 250, 1, // 10117: decode to WFCEXBS using decoder 250 |
| 7738 | // 10117: } |
| 7739 | 194, 3, 7, // 10122: case 0x1c2: { |
| 7740 | OPC_CheckPredicate, 40, // 10125: check predicate 40 |
| 7741 | OPC_Decode, 148, 25, 193, 2, // 10127: decode to WFKESBS using decoder 321 |
| 7742 | // 10127: } |
| 7743 | 195, 3, 7, // 10132: case 0x1c3: { |
| 7744 | OPC_CheckPredicate, 40, // 10135: check predicate 40 |
| 7745 | OPC_Decode, 146, 25, 194, 2, // 10137: decode to WFKEDBS using decoder 322 |
| 7746 | // 10137: } |
| 7747 | 196, 3, 0, // 10142: case 0x1c4: { |
| 7748 | OPC_CheckPredicate, 40, // 10145: check predicate 40 |
| 7749 | OPC_Decode, 150, 25, 250, 1, // 10147: decode to WFKEXBS using decoder 250 |
| 7750 | // 10147: } |
| 7751 | // 10147: } // switch Inst[23:12] |
| 7752 | // 10147: } else try { |
| 7753 | OPC_CheckPredicate, 39, // 10152: check predicate 39 |
| 7754 | OPC_Decode, 243, 20, 195, 2, // 10154: decode to VFCE using decoder 323 |
| 7755 | // 10154: } |
| 7756 | // 10154: } |
| 7757 | 234, 1, 217, 1, // 10159: case 0xea: { |
| 7758 | OPC_CheckField, 8, 1, 0, // 10163: check Inst[8] == 0x0 |
| 7759 | OPC_CheckField, 24, 4, 0, // 10167: check Inst[27:24] == 0x0 |
| 7760 | OPC_Scope, 199, 1, // 10171: try { |
| 7761 | OPC_SwitchField, 12, 12, // 10174: switch Inst[23:12] { |
| 7762 | 2, 7, // 10177: case 0x2: { |
| 7763 | OPC_CheckPredicate, 40, // 10179: check predicate 40 |
| 7764 | OPC_Decode, 254, 20, 250, 1, // 10181: decode to VFCHESB using decoder 250 |
| 7765 | // 10181: } |
| 7766 | 3, 7, // 10186: case 0x3: { |
| 7767 | OPC_CheckPredicate, 39, // 10188: check predicate 39 |
| 7768 | OPC_Decode, 252, 20, 250, 1, // 10190: decode to VFCHEDB using decoder 250 |
| 7769 | // 10190: } |
| 7770 | 66, 7, // 10195: case 0x42: { |
| 7771 | OPC_CheckPredicate, 40, // 10197: check predicate 40 |
| 7772 | OPC_Decode, 170, 21, 250, 1, // 10199: decode to VFKHESB using decoder 250 |
| 7773 | // 10199: } |
| 7774 | 67, 7, // 10204: case 0x43: { |
| 7775 | OPC_CheckPredicate, 40, // 10206: check predicate 40 |
| 7776 | OPC_Decode, 168, 21, 250, 1, // 10208: decode to VFKHEDB using decoder 250 |
| 7777 | // 10208: } |
| 7778 | 130, 1, 7, // 10213: case 0x82: { |
| 7779 | OPC_CheckPredicate, 40, // 10216: check predicate 40 |
| 7780 | OPC_Decode, 255, 24, 193, 2, // 10218: decode to WFCHESB using decoder 321 |
| 7781 | // 10218: } |
| 7782 | 131, 1, 7, // 10223: case 0x83: { |
| 7783 | OPC_CheckPredicate, 39, // 10226: check predicate 39 |
| 7784 | OPC_Decode, 253, 24, 194, 2, // 10228: decode to WFCHEDB using decoder 322 |
| 7785 | // 10228: } |
| 7786 | 132, 1, 7, // 10233: case 0x84: { |
| 7787 | OPC_CheckPredicate, 40, // 10236: check predicate 40 |
| 7788 | OPC_Decode, 129, 25, 250, 1, // 10238: decode to WFCHEXB using decoder 250 |
| 7789 | // 10238: } |
| 7790 | 194, 1, 7, // 10243: case 0xc2: { |
| 7791 | OPC_CheckPredicate, 40, // 10246: check predicate 40 |
| 7792 | OPC_Decode, 155, 25, 193, 2, // 10248: decode to WFKHESB using decoder 321 |
| 7793 | // 10248: } |
| 7794 | 195, 1, 7, // 10253: case 0xc3: { |
| 7795 | OPC_CheckPredicate, 40, // 10256: check predicate 40 |
| 7796 | OPC_Decode, 153, 25, 194, 2, // 10258: decode to WFKHEDB using decoder 322 |
| 7797 | // 10258: } |
| 7798 | 196, 1, 7, // 10263: case 0xc4: { |
| 7799 | OPC_CheckPredicate, 40, // 10266: check predicate 40 |
| 7800 | OPC_Decode, 157, 25, 250, 1, // 10268: decode to WFKHEXB using decoder 250 |
| 7801 | // 10268: } |
| 7802 | 130, 2, 7, // 10273: case 0x102: { |
| 7803 | OPC_CheckPredicate, 40, // 10276: check predicate 40 |
| 7804 | OPC_Decode, 255, 20, 250, 1, // 10278: decode to VFCHESBS using decoder 250 |
| 7805 | // 10278: } |
| 7806 | 131, 2, 7, // 10283: case 0x103: { |
| 7807 | OPC_CheckPredicate, 39, // 10286: check predicate 39 |
| 7808 | OPC_Decode, 253, 20, 250, 1, // 10288: decode to VFCHEDBS using decoder 250 |
| 7809 | // 10288: } |
| 7810 | 194, 2, 7, // 10293: case 0x142: { |
| 7811 | OPC_CheckPredicate, 40, // 10296: check predicate 40 |
| 7812 | OPC_Decode, 171, 21, 250, 1, // 10298: decode to VFKHESBS using decoder 250 |
| 7813 | // 10298: } |
| 7814 | 195, 2, 7, // 10303: case 0x143: { |
| 7815 | OPC_CheckPredicate, 40, // 10306: check predicate 40 |
| 7816 | OPC_Decode, 169, 21, 250, 1, // 10308: decode to VFKHEDBS using decoder 250 |
| 7817 | // 10308: } |
| 7818 | 130, 3, 7, // 10313: case 0x182: { |
| 7819 | OPC_CheckPredicate, 40, // 10316: check predicate 40 |
| 7820 | OPC_Decode, 128, 25, 193, 2, // 10318: decode to WFCHESBS using decoder 321 |
| 7821 | // 10318: } |
| 7822 | 131, 3, 7, // 10323: case 0x183: { |
| 7823 | OPC_CheckPredicate, 39, // 10326: check predicate 39 |
| 7824 | OPC_Decode, 254, 24, 194, 2, // 10328: decode to WFCHEDBS using decoder 322 |
| 7825 | // 10328: } |
| 7826 | 132, 3, 7, // 10333: case 0x184: { |
| 7827 | OPC_CheckPredicate, 40, // 10336: check predicate 40 |
| 7828 | OPC_Decode, 130, 25, 250, 1, // 10338: decode to WFCHEXBS using decoder 250 |
| 7829 | // 10338: } |
| 7830 | 194, 3, 7, // 10343: case 0x1c2: { |
| 7831 | OPC_CheckPredicate, 40, // 10346: check predicate 40 |
| 7832 | OPC_Decode, 156, 25, 193, 2, // 10348: decode to WFKHESBS using decoder 321 |
| 7833 | // 10348: } |
| 7834 | 195, 3, 7, // 10353: case 0x1c3: { |
| 7835 | OPC_CheckPredicate, 40, // 10356: check predicate 40 |
| 7836 | OPC_Decode, 154, 25, 194, 2, // 10358: decode to WFKHEDBS using decoder 322 |
| 7837 | // 10358: } |
| 7838 | 196, 3, 0, // 10363: case 0x1c4: { |
| 7839 | OPC_CheckPredicate, 40, // 10366: check predicate 40 |
| 7840 | OPC_Decode, 158, 25, 250, 1, // 10368: decode to WFKHEXBS using decoder 250 |
| 7841 | // 10368: } |
| 7842 | // 10368: } // switch Inst[23:12] |
| 7843 | // 10368: } else try { |
| 7844 | OPC_CheckPredicate, 39, // 10373: check predicate 39 |
| 7845 | OPC_Decode, 251, 20, 195, 2, // 10375: decode to VFCHE using decoder 323 |
| 7846 | // 10375: } |
| 7847 | // 10375: } |
| 7848 | 235, 1, 217, 1, // 10380: case 0xeb: { |
| 7849 | OPC_CheckField, 8, 1, 0, // 10384: check Inst[8] == 0x0 |
| 7850 | OPC_CheckField, 24, 4, 0, // 10388: check Inst[27:24] == 0x0 |
| 7851 | OPC_Scope, 199, 1, // 10392: try { |
| 7852 | OPC_SwitchField, 12, 12, // 10395: switch Inst[23:12] { |
| 7853 | 2, 7, // 10398: case 0x2: { |
| 7854 | OPC_CheckPredicate, 40, // 10400: check predicate 40 |
| 7855 | OPC_Decode, 128, 21, 250, 1, // 10402: decode to VFCHSB using decoder 250 |
| 7856 | // 10402: } |
| 7857 | 3, 7, // 10407: case 0x3: { |
| 7858 | OPC_CheckPredicate, 39, // 10409: check predicate 39 |
| 7859 | OPC_Decode, 249, 20, 250, 1, // 10411: decode to VFCHDB using decoder 250 |
| 7860 | // 10411: } |
| 7861 | 66, 7, // 10416: case 0x42: { |
| 7862 | OPC_CheckPredicate, 40, // 10418: check predicate 40 |
| 7863 | OPC_Decode, 172, 21, 250, 1, // 10420: decode to VFKHSB using decoder 250 |
| 7864 | // 10420: } |
| 7865 | 67, 7, // 10425: case 0x43: { |
| 7866 | OPC_CheckPredicate, 40, // 10427: check predicate 40 |
| 7867 | OPC_Decode, 166, 21, 250, 1, // 10429: decode to VFKHDB using decoder 250 |
| 7868 | // 10429: } |
| 7869 | 130, 1, 7, // 10434: case 0x82: { |
| 7870 | OPC_CheckPredicate, 40, // 10437: check predicate 40 |
| 7871 | OPC_Decode, 131, 25, 193, 2, // 10439: decode to WFCHSB using decoder 321 |
| 7872 | // 10439: } |
| 7873 | 131, 1, 7, // 10444: case 0x83: { |
| 7874 | OPC_CheckPredicate, 39, // 10447: check predicate 39 |
| 7875 | OPC_Decode, 251, 24, 194, 2, // 10449: decode to WFCHDB using decoder 322 |
| 7876 | // 10449: } |
| 7877 | 132, 1, 7, // 10454: case 0x84: { |
| 7878 | OPC_CheckPredicate, 40, // 10457: check predicate 40 |
| 7879 | OPC_Decode, 133, 25, 250, 1, // 10459: decode to WFCHXB using decoder 250 |
| 7880 | // 10459: } |
| 7881 | 194, 1, 7, // 10464: case 0xc2: { |
| 7882 | OPC_CheckPredicate, 40, // 10467: check predicate 40 |
| 7883 | OPC_Decode, 159, 25, 193, 2, // 10469: decode to WFKHSB using decoder 321 |
| 7884 | // 10469: } |
| 7885 | 195, 1, 7, // 10474: case 0xc3: { |
| 7886 | OPC_CheckPredicate, 40, // 10477: check predicate 40 |
| 7887 | OPC_Decode, 151, 25, 194, 2, // 10479: decode to WFKHDB using decoder 322 |
| 7888 | // 10479: } |
| 7889 | 196, 1, 7, // 10484: case 0xc4: { |
| 7890 | OPC_CheckPredicate, 40, // 10487: check predicate 40 |
| 7891 | OPC_Decode, 161, 25, 250, 1, // 10489: decode to WFKHXB using decoder 250 |
| 7892 | // 10489: } |
| 7893 | 130, 2, 7, // 10494: case 0x102: { |
| 7894 | OPC_CheckPredicate, 40, // 10497: check predicate 40 |
| 7895 | OPC_Decode, 129, 21, 250, 1, // 10499: decode to VFCHSBS using decoder 250 |
| 7896 | // 10499: } |
| 7897 | 131, 2, 7, // 10504: case 0x103: { |
| 7898 | OPC_CheckPredicate, 39, // 10507: check predicate 39 |
| 7899 | OPC_Decode, 250, 20, 250, 1, // 10509: decode to VFCHDBS using decoder 250 |
| 7900 | // 10509: } |
| 7901 | 194, 2, 7, // 10514: case 0x142: { |
| 7902 | OPC_CheckPredicate, 40, // 10517: check predicate 40 |
| 7903 | OPC_Decode, 173, 21, 250, 1, // 10519: decode to VFKHSBS using decoder 250 |
| 7904 | // 10519: } |
| 7905 | 195, 2, 7, // 10524: case 0x143: { |
| 7906 | OPC_CheckPredicate, 40, // 10527: check predicate 40 |
| 7907 | OPC_Decode, 167, 21, 250, 1, // 10529: decode to VFKHDBS using decoder 250 |
| 7908 | // 10529: } |
| 7909 | 130, 3, 7, // 10534: case 0x182: { |
| 7910 | OPC_CheckPredicate, 40, // 10537: check predicate 40 |
| 7911 | OPC_Decode, 132, 25, 193, 2, // 10539: decode to WFCHSBS using decoder 321 |
| 7912 | // 10539: } |
| 7913 | 131, 3, 7, // 10544: case 0x183: { |
| 7914 | OPC_CheckPredicate, 39, // 10547: check predicate 39 |
| 7915 | OPC_Decode, 252, 24, 194, 2, // 10549: decode to WFCHDBS using decoder 322 |
| 7916 | // 10549: } |
| 7917 | 132, 3, 7, // 10554: case 0x184: { |
| 7918 | OPC_CheckPredicate, 40, // 10557: check predicate 40 |
| 7919 | OPC_Decode, 134, 25, 250, 1, // 10559: decode to WFCHXBS using decoder 250 |
| 7920 | // 10559: } |
| 7921 | 194, 3, 7, // 10564: case 0x1c2: { |
| 7922 | OPC_CheckPredicate, 40, // 10567: check predicate 40 |
| 7923 | OPC_Decode, 160, 25, 193, 2, // 10569: decode to WFKHSBS using decoder 321 |
| 7924 | // 10569: } |
| 7925 | 195, 3, 7, // 10574: case 0x1c3: { |
| 7926 | OPC_CheckPredicate, 40, // 10577: check predicate 40 |
| 7927 | OPC_Decode, 152, 25, 194, 2, // 10579: decode to WFKHDBS using decoder 322 |
| 7928 | // 10579: } |
| 7929 | 196, 3, 0, // 10584: case 0x1c4: { |
| 7930 | OPC_CheckPredicate, 40, // 10587: check predicate 40 |
| 7931 | OPC_Decode, 162, 25, 250, 1, // 10589: decode to WFKHXBS using decoder 250 |
| 7932 | // 10589: } |
| 7933 | // 10589: } // switch Inst[23:12] |
| 7934 | // 10589: } else try { |
| 7935 | OPC_CheckPredicate, 39, // 10594: check predicate 39 |
| 7936 | OPC_Decode, 248, 20, 195, 2, // 10596: decode to VFCH using decoder 323 |
| 7937 | // 10596: } |
| 7938 | // 10596: } |
| 7939 | 238, 1, 68, // 10601: case 0xee: { |
| 7940 | OPC_CheckField, 8, 1, 0, // 10604: check Inst[8] == 0x0 |
| 7941 | OPC_CheckField, 24, 4, 0, // 10608: check Inst[27:24] == 0x0 |
| 7942 | OPC_Scope, 51, // 10612: try { |
| 7943 | OPC_SwitchField, 12, 8, // 10614: switch Inst[19:12] { |
| 7944 | 2, 7, // 10617: case 0x2: { |
| 7945 | OPC_CheckPredicate, 40, // 10619: check predicate 40 |
| 7946 | OPC_Decode, 194, 21, 246, 1, // 10621: decode to VFMINSB using decoder 246 |
| 7947 | // 10621: } |
| 7948 | 3, 7, // 10626: case 0x3: { |
| 7949 | OPC_CheckPredicate, 40, // 10628: check predicate 40 |
| 7950 | OPC_Decode, 193, 21, 246, 1, // 10630: decode to VFMINDB using decoder 246 |
| 7951 | // 10630: } |
| 7952 | 130, 1, 7, // 10635: case 0x82: { |
| 7953 | OPC_CheckPredicate, 40, // 10638: check predicate 40 |
| 7954 | OPC_Decode, 186, 25, 196, 2, // 10640: decode to WFMINSB using decoder 324 |
| 7955 | // 10640: } |
| 7956 | 131, 1, 7, // 10645: case 0x83: { |
| 7957 | OPC_CheckPredicate, 40, // 10648: check predicate 40 |
| 7958 | OPC_Decode, 185, 25, 197, 2, // 10650: decode to WFMINDB using decoder 325 |
| 7959 | // 10650: } |
| 7960 | 132, 1, 0, // 10655: case 0x84: { |
| 7961 | OPC_CheckPredicate, 40, // 10658: check predicate 40 |
| 7962 | OPC_Decode, 187, 25, 246, 1, // 10660: decode to WFMINXB using decoder 246 |
| 7963 | // 10660: } |
| 7964 | // 10660: } // switch Inst[19:12] |
| 7965 | // 10660: } else try { |
| 7966 | OPC_CheckPredicate, 40, // 10665: check predicate 40 |
| 7967 | OPC_Decode, 192, 21, 195, 2, // 10667: decode to VFMIN using decoder 323 |
| 7968 | // 10667: } |
| 7969 | // 10667: } |
| 7970 | 239, 1, 68, // 10672: case 0xef: { |
| 7971 | OPC_CheckField, 8, 1, 0, // 10675: check Inst[8] == 0x0 |
| 7972 | OPC_CheckField, 24, 4, 0, // 10679: check Inst[27:24] == 0x0 |
| 7973 | OPC_Scope, 51, // 10683: try { |
| 7974 | OPC_SwitchField, 12, 8, // 10685: switch Inst[19:12] { |
| 7975 | 2, 7, // 10688: case 0x2: { |
| 7976 | OPC_CheckPredicate, 40, // 10690: check predicate 40 |
| 7977 | OPC_Decode, 190, 21, 246, 1, // 10692: decode to VFMAXSB using decoder 246 |
| 7978 | // 10692: } |
| 7979 | 3, 7, // 10697: case 0x3: { |
| 7980 | OPC_CheckPredicate, 40, // 10699: check predicate 40 |
| 7981 | OPC_Decode, 189, 21, 246, 1, // 10701: decode to VFMAXDB using decoder 246 |
| 7982 | // 10701: } |
| 7983 | 130, 1, 7, // 10706: case 0x82: { |
| 7984 | OPC_CheckPredicate, 40, // 10709: check predicate 40 |
| 7985 | OPC_Decode, 182, 25, 196, 2, // 10711: decode to WFMAXSB using decoder 324 |
| 7986 | // 10711: } |
| 7987 | 131, 1, 7, // 10716: case 0x83: { |
| 7988 | OPC_CheckPredicate, 40, // 10719: check predicate 40 |
| 7989 | OPC_Decode, 181, 25, 197, 2, // 10721: decode to WFMAXDB using decoder 325 |
| 7990 | // 10721: } |
| 7991 | 132, 1, 0, // 10726: case 0x84: { |
| 7992 | OPC_CheckPredicate, 40, // 10729: check predicate 40 |
| 7993 | OPC_Decode, 183, 25, 246, 1, // 10731: decode to WFMAXXB using decoder 246 |
| 7994 | // 10731: } |
| 7995 | // 10731: } // switch Inst[19:12] |
| 7996 | // 10731: } else try { |
| 7997 | OPC_CheckPredicate, 40, // 10736: check predicate 40 |
| 7998 | OPC_Decode, 188, 21, 195, 2, // 10738: decode to VFMAX using decoder 323 |
| 7999 | // 10738: } |
| 8000 | // 10738: } |
| 8001 | 240, 1, 65, // 10743: case 0xf0: { |
| 8002 | OPC_CheckField, 8, 1, 0, // 10746: check Inst[8] == 0x0 |
| 8003 | OPC_CheckField, 16, 12, 0, // 10750: check Inst[27:16] == 0x0 |
| 8004 | OPC_Scope, 48, // 10754: try { |
| 8005 | OPC_SwitchField, 12, 4, // 10756: switch Inst[15:12] { |
| 8006 | 0, 7, // 10759: case 0x0: { |
| 8007 | OPC_CheckPredicate, 39, // 10761: check predicate 39 |
| 8008 | OPC_Decode, 197, 19, 250, 1, // 10763: decode to VAVGLB using decoder 250 |
| 8009 | // 10763: } |
| 8010 | 1, 7, // 10768: case 0x1: { |
| 8011 | OPC_CheckPredicate, 39, // 10770: check predicate 39 |
| 8012 | OPC_Decode, 200, 19, 250, 1, // 10772: decode to VAVGLH using decoder 250 |
| 8013 | // 10772: } |
| 8014 | 2, 7, // 10777: case 0x2: { |
| 8015 | OPC_CheckPredicate, 39, // 10779: check predicate 39 |
| 8016 | OPC_Decode, 198, 19, 250, 1, // 10781: decode to VAVGLF using decoder 250 |
| 8017 | // 10781: } |
| 8018 | 3, 7, // 10786: case 0x3: { |
| 8019 | OPC_CheckPredicate, 39, // 10788: check predicate 39 |
| 8020 | OPC_Decode, 199, 19, 250, 1, // 10790: decode to VAVGLG using decoder 250 |
| 8021 | // 10790: } |
| 8022 | 4, 0, // 10795: case 0x4: { |
| 8023 | OPC_CheckPredicate, 41, // 10797: check predicate 41 |
| 8024 | OPC_Decode, 201, 19, 250, 1, // 10799: decode to VAVGLQ using decoder 250 |
| 8025 | // 10799: } |
| 8026 | // 10799: } // switch Inst[15:12] |
| 8027 | // 10799: } else try { |
| 8028 | OPC_CheckPredicate, 39, // 10804: check predicate 39 |
| 8029 | OPC_Decode, 196, 19, 159, 2, // 10806: decode to VAVGL using decoder 287 |
| 8030 | // 10806: } |
| 8031 | // 10806: } |
| 8032 | 241, 1, 65, // 10811: case 0xf1: { |
| 8033 | OPC_CheckField, 8, 1, 0, // 10814: check Inst[8] == 0x0 |
| 8034 | OPC_CheckField, 16, 12, 0, // 10818: check Inst[27:16] == 0x0 |
| 8035 | OPC_Scope, 48, // 10822: try { |
| 8036 | OPC_SwitchField, 12, 4, // 10824: switch Inst[15:12] { |
| 8037 | 0, 7, // 10827: case 0x0: { |
| 8038 | OPC_CheckPredicate, 39, // 10829: check predicate 39 |
| 8039 | OPC_Decode, 178, 19, 250, 1, // 10831: decode to VACCB using decoder 250 |
| 8040 | // 10831: } |
| 8041 | 1, 7, // 10836: case 0x1: { |
| 8042 | OPC_CheckPredicate, 39, // 10838: check predicate 39 |
| 8043 | OPC_Decode, 183, 19, 250, 1, // 10840: decode to VACCH using decoder 250 |
| 8044 | // 10840: } |
| 8045 | 2, 7, // 10845: case 0x2: { |
| 8046 | OPC_CheckPredicate, 39, // 10847: check predicate 39 |
| 8047 | OPC_Decode, 181, 19, 250, 1, // 10849: decode to VACCF using decoder 250 |
| 8048 | // 10849: } |
| 8049 | 3, 7, // 10854: case 0x3: { |
| 8050 | OPC_CheckPredicate, 39, // 10856: check predicate 39 |
| 8051 | OPC_Decode, 182, 19, 250, 1, // 10858: decode to VACCG using decoder 250 |
| 8052 | // 10858: } |
| 8053 | 4, 0, // 10863: case 0x4: { |
| 8054 | OPC_CheckPredicate, 39, // 10865: check predicate 39 |
| 8055 | OPC_Decode, 184, 19, 250, 1, // 10867: decode to VACCQ using decoder 250 |
| 8056 | // 10867: } |
| 8057 | // 10867: } // switch Inst[15:12] |
| 8058 | // 10867: } else try { |
| 8059 | OPC_CheckPredicate, 39, // 10872: check predicate 39 |
| 8060 | OPC_Decode, 177, 19, 159, 2, // 10874: decode to VACC using decoder 287 |
| 8061 | // 10874: } |
| 8062 | // 10874: } |
| 8063 | 242, 1, 65, // 10879: case 0xf2: { |
| 8064 | OPC_CheckField, 8, 1, 0, // 10882: check Inst[8] == 0x0 |
| 8065 | OPC_CheckField, 16, 12, 0, // 10886: check Inst[27:16] == 0x0 |
| 8066 | OPC_Scope, 48, // 10890: try { |
| 8067 | OPC_SwitchField, 12, 4, // 10892: switch Inst[15:12] { |
| 8068 | 0, 7, // 10895: case 0x0: { |
| 8069 | OPC_CheckPredicate, 39, // 10897: check predicate 39 |
| 8070 | OPC_Decode, 192, 19, 250, 1, // 10899: decode to VAVGB using decoder 250 |
| 8071 | // 10899: } |
| 8072 | 1, 7, // 10904: case 0x1: { |
| 8073 | OPC_CheckPredicate, 39, // 10906: check predicate 39 |
| 8074 | OPC_Decode, 195, 19, 250, 1, // 10908: decode to VAVGH using decoder 250 |
| 8075 | // 10908: } |
| 8076 | 2, 7, // 10913: case 0x2: { |
| 8077 | OPC_CheckPredicate, 39, // 10915: check predicate 39 |
| 8078 | OPC_Decode, 193, 19, 250, 1, // 10917: decode to VAVGF using decoder 250 |
| 8079 | // 10917: } |
| 8080 | 3, 7, // 10922: case 0x3: { |
| 8081 | OPC_CheckPredicate, 39, // 10924: check predicate 39 |
| 8082 | OPC_Decode, 194, 19, 250, 1, // 10926: decode to VAVGG using decoder 250 |
| 8083 | // 10926: } |
| 8084 | 4, 0, // 10931: case 0x4: { |
| 8085 | OPC_CheckPredicate, 41, // 10933: check predicate 41 |
| 8086 | OPC_Decode, 202, 19, 250, 1, // 10935: decode to VAVGQ using decoder 250 |
| 8087 | // 10935: } |
| 8088 | // 10935: } // switch Inst[15:12] |
| 8089 | // 10935: } else try { |
| 8090 | OPC_CheckPredicate, 39, // 10940: check predicate 39 |
| 8091 | OPC_Decode, 191, 19, 159, 2, // 10942: decode to VAVG using decoder 287 |
| 8092 | // 10942: } |
| 8093 | // 10942: } |
| 8094 | 243, 1, 65, // 10947: case 0xf3: { |
| 8095 | OPC_CheckField, 8, 1, 0, // 10950: check Inst[8] == 0x0 |
| 8096 | OPC_CheckField, 16, 12, 0, // 10954: check Inst[27:16] == 0x0 |
| 8097 | OPC_Scope, 48, // 10958: try { |
| 8098 | OPC_SwitchField, 12, 4, // 10960: switch Inst[15:12] { |
| 8099 | 0, 7, // 10963: case 0x0: { |
| 8100 | OPC_CheckPredicate, 39, // 10965: check predicate 39 |
| 8101 | OPC_Decode, 175, 19, 250, 1, // 10967: decode to VAB using decoder 250 |
| 8102 | // 10967: } |
| 8103 | 1, 7, // 10972: case 0x1: { |
| 8104 | OPC_CheckPredicate, 39, // 10974: check predicate 39 |
| 8105 | OPC_Decode, 188, 19, 250, 1, // 10976: decode to VAH using decoder 250 |
| 8106 | // 10976: } |
| 8107 | 2, 7, // 10981: case 0x2: { |
| 8108 | OPC_CheckPredicate, 39, // 10983: check predicate 39 |
| 8109 | OPC_Decode, 186, 19, 250, 1, // 10985: decode to VAF using decoder 250 |
| 8110 | // 10985: } |
| 8111 | 3, 7, // 10990: case 0x3: { |
| 8112 | OPC_CheckPredicate, 39, // 10992: check predicate 39 |
| 8113 | OPC_Decode, 187, 19, 250, 1, // 10994: decode to VAG using decoder 250 |
| 8114 | // 10994: } |
| 8115 | 4, 0, // 10999: case 0x4: { |
| 8116 | OPC_CheckPredicate, 39, // 11001: check predicate 39 |
| 8117 | OPC_Decode, 190, 19, 250, 1, // 11003: decode to VAQ using decoder 250 |
| 8118 | // 11003: } |
| 8119 | // 11003: } // switch Inst[15:12] |
| 8120 | // 11003: } else try { |
| 8121 | OPC_CheckPredicate, 39, // 11008: check predicate 39 |
| 8122 | OPC_Decode, 174, 19, 159, 2, // 11010: decode to VA using decoder 287 |
| 8123 | // 11010: } |
| 8124 | // 11010: } |
| 8125 | 245, 1, 65, // 11015: case 0xf5: { |
| 8126 | OPC_CheckField, 8, 1, 0, // 11018: check Inst[8] == 0x0 |
| 8127 | OPC_CheckField, 16, 12, 0, // 11022: check Inst[27:16] == 0x0 |
| 8128 | OPC_Scope, 48, // 11026: try { |
| 8129 | OPC_SwitchField, 12, 4, // 11028: switch Inst[15:12] { |
| 8130 | 0, 7, // 11031: case 0x0: { |
| 8131 | OPC_CheckPredicate, 39, // 11033: check predicate 39 |
| 8132 | OPC_Decode, 245, 23, 250, 1, // 11035: decode to VSCBIB using decoder 250 |
| 8133 | // 11035: } |
| 8134 | 1, 7, // 11040: case 0x1: { |
| 8135 | OPC_CheckPredicate, 39, // 11042: check predicate 39 |
| 8136 | OPC_Decode, 248, 23, 250, 1, // 11044: decode to VSCBIH using decoder 250 |
| 8137 | // 11044: } |
| 8138 | 2, 7, // 11049: case 0x2: { |
| 8139 | OPC_CheckPredicate, 39, // 11051: check predicate 39 |
| 8140 | OPC_Decode, 246, 23, 250, 1, // 11053: decode to VSCBIF using decoder 250 |
| 8141 | // 11053: } |
| 8142 | 3, 7, // 11058: case 0x3: { |
| 8143 | OPC_CheckPredicate, 39, // 11060: check predicate 39 |
| 8144 | OPC_Decode, 247, 23, 250, 1, // 11062: decode to VSCBIG using decoder 250 |
| 8145 | // 11062: } |
| 8146 | 4, 0, // 11067: case 0x4: { |
| 8147 | OPC_CheckPredicate, 39, // 11069: check predicate 39 |
| 8148 | OPC_Decode, 249, 23, 250, 1, // 11071: decode to VSCBIQ using decoder 250 |
| 8149 | // 11071: } |
| 8150 | // 11071: } // switch Inst[15:12] |
| 8151 | // 11071: } else try { |
| 8152 | OPC_CheckPredicate, 39, // 11076: check predicate 39 |
| 8153 | OPC_Decode, 244, 23, 159, 2, // 11078: decode to VSCBI using decoder 287 |
| 8154 | // 11078: } |
| 8155 | // 11078: } |
| 8156 | 247, 1, 65, // 11083: case 0xf7: { |
| 8157 | OPC_CheckField, 8, 1, 0, // 11086: check Inst[8] == 0x0 |
| 8158 | OPC_CheckField, 16, 12, 0, // 11090: check Inst[27:16] == 0x0 |
| 8159 | OPC_Scope, 48, // 11094: try { |
| 8160 | OPC_SwitchField, 12, 4, // 11096: switch Inst[15:12] { |
| 8161 | 0, 7, // 11099: case 0x0: { |
| 8162 | OPC_CheckPredicate, 39, // 11101: check predicate 39 |
| 8163 | OPC_Decode, 239, 23, 250, 1, // 11103: decode to VSB using decoder 250 |
| 8164 | // 11103: } |
| 8165 | 1, 7, // 11108: case 0x1: { |
| 8166 | OPC_CheckPredicate, 39, // 11110: check predicate 39 |
| 8167 | OPC_Decode, 137, 24, 250, 1, // 11112: decode to VSH using decoder 250 |
| 8168 | // 11112: } |
| 8169 | 2, 7, // 11117: case 0x2: { |
| 8170 | OPC_CheckPredicate, 39, // 11119: check predicate 39 |
| 8171 | OPC_Decode, 135, 24, 250, 1, // 11121: decode to VSF using decoder 250 |
| 8172 | // 11121: } |
| 8173 | 3, 7, // 11126: case 0x3: { |
| 8174 | OPC_CheckPredicate, 39, // 11128: check predicate 39 |
| 8175 | OPC_Decode, 136, 24, 250, 1, // 11130: decode to VSG using decoder 250 |
| 8176 | // 11130: } |
| 8177 | 4, 0, // 11135: case 0x4: { |
| 8178 | OPC_CheckPredicate, 39, // 11137: check predicate 39 |
| 8179 | OPC_Decode, 143, 24, 250, 1, // 11139: decode to VSQ using decoder 250 |
| 8180 | // 11139: } |
| 8181 | // 11139: } // switch Inst[15:12] |
| 8182 | // 11139: } else try { |
| 8183 | OPC_CheckPredicate, 39, // 11144: check predicate 39 |
| 8184 | OPC_Decode, 238, 23, 159, 2, // 11146: decode to VS using decoder 287 |
| 8185 | // 11146: } |
| 8186 | // 11146: } |
| 8187 | 248, 1, 139, 1, // 11151: case 0xf8: { |
| 8188 | OPC_CheckField, 8, 1, 0, // 11155: check Inst[8] == 0x0 |
| 8189 | OPC_CheckField, 16, 4, 0, // 11159: check Inst[19:16] == 0x0 |
| 8190 | OPC_CheckField, 24, 4, 0, // 11163: check Inst[27:24] == 0x0 |
| 8191 | OPC_Scope, 118, // 11167: try { |
| 8192 | OPC_SwitchField, 12, 4, // 11169: switch Inst[15:12] { |
| 8193 | 0, 21, // 11172: case 0x0: { |
| 8194 | OPC_SwitchField, 20, 4, // 11174: switch Inst[23:20] { |
| 8195 | 0, 7, // 11177: case 0x0: { |
| 8196 | OPC_CheckPredicate, 39, // 11179: check predicate 39 |
| 8197 | OPC_Decode, 217, 19, 250, 1, // 11181: decode to VCEQB using decoder 250 |
| 8198 | // 11181: } |
| 8199 | 1, 0, // 11186: case 0x1: { |
| 8200 | OPC_CheckPredicate, 39, // 11188: check predicate 39 |
| 8201 | OPC_Decode, 218, 19, 250, 1, // 11190: decode to VCEQBS using decoder 250 |
| 8202 | // 11190: } |
| 8203 | // 11190: } // switch Inst[23:20] |
| 8204 | // 11190: } |
| 8205 | 1, 21, // 11195: case 0x1: { |
| 8206 | OPC_SwitchField, 20, 4, // 11197: switch Inst[23:20] { |
| 8207 | 0, 7, // 11200: case 0x0: { |
| 8208 | OPC_CheckPredicate, 39, // 11202: check predicate 39 |
| 8209 | OPC_Decode, 223, 19, 250, 1, // 11204: decode to VCEQH using decoder 250 |
| 8210 | // 11204: } |
| 8211 | 1, 0, // 11209: case 0x1: { |
| 8212 | OPC_CheckPredicate, 39, // 11211: check predicate 39 |
| 8213 | OPC_Decode, 224, 19, 250, 1, // 11213: decode to VCEQHS using decoder 250 |
| 8214 | // 11213: } |
| 8215 | // 11213: } // switch Inst[23:20] |
| 8216 | // 11213: } |
| 8217 | 2, 21, // 11218: case 0x2: { |
| 8218 | OPC_SwitchField, 20, 4, // 11220: switch Inst[23:20] { |
| 8219 | 0, 7, // 11223: case 0x0: { |
| 8220 | OPC_CheckPredicate, 39, // 11225: check predicate 39 |
| 8221 | OPC_Decode, 219, 19, 250, 1, // 11227: decode to VCEQF using decoder 250 |
| 8222 | // 11227: } |
| 8223 | 1, 0, // 11232: case 0x1: { |
| 8224 | OPC_CheckPredicate, 39, // 11234: check predicate 39 |
| 8225 | OPC_Decode, 220, 19, 250, 1, // 11236: decode to VCEQFS using decoder 250 |
| 8226 | // 11236: } |
| 8227 | // 11236: } // switch Inst[23:20] |
| 8228 | // 11236: } |
| 8229 | 3, 21, // 11241: case 0x3: { |
| 8230 | OPC_SwitchField, 20, 4, // 11243: switch Inst[23:20] { |
| 8231 | 0, 7, // 11246: case 0x0: { |
| 8232 | OPC_CheckPredicate, 39, // 11248: check predicate 39 |
| 8233 | OPC_Decode, 221, 19, 250, 1, // 11250: decode to VCEQG using decoder 250 |
| 8234 | // 11250: } |
| 8235 | 1, 0, // 11255: case 0x1: { |
| 8236 | OPC_CheckPredicate, 39, // 11257: check predicate 39 |
| 8237 | OPC_Decode, 222, 19, 250, 1, // 11259: decode to VCEQGS using decoder 250 |
| 8238 | // 11259: } |
| 8239 | // 11259: } // switch Inst[23:20] |
| 8240 | // 11259: } |
| 8241 | 4, 0, // 11264: case 0x4: { |
| 8242 | OPC_SwitchField, 20, 4, // 11266: switch Inst[23:20] { |
| 8243 | 0, 7, // 11269: case 0x0: { |
| 8244 | OPC_CheckPredicate, 41, // 11271: check predicate 41 |
| 8245 | OPC_Decode, 225, 19, 250, 1, // 11273: decode to VCEQQ using decoder 250 |
| 8246 | // 11273: } |
| 8247 | 1, 0, // 11278: case 0x1: { |
| 8248 | OPC_CheckPredicate, 41, // 11280: check predicate 41 |
| 8249 | OPC_Decode, 226, 19, 250, 1, // 11282: decode to VCEQQS using decoder 250 |
| 8250 | // 11282: } |
| 8251 | // 11282: } // switch Inst[23:20] |
| 8252 | // 11282: } |
| 8253 | // 11282: } // switch Inst[15:12] |
| 8254 | // 11282: } else try { |
| 8255 | OPC_CheckPredicate, 39, // 11287: check predicate 39 |
| 8256 | OPC_Decode, 216, 19, 247, 1, // 11289: decode to VCEQ using decoder 247 |
| 8257 | // 11289: } |
| 8258 | // 11289: } |
| 8259 | 249, 1, 139, 1, // 11294: case 0xf9: { |
| 8260 | OPC_CheckField, 8, 1, 0, // 11298: check Inst[8] == 0x0 |
| 8261 | OPC_CheckField, 16, 4, 0, // 11302: check Inst[19:16] == 0x0 |
| 8262 | OPC_CheckField, 24, 4, 0, // 11306: check Inst[27:24] == 0x0 |
| 8263 | OPC_Scope, 118, // 11310: try { |
| 8264 | OPC_SwitchField, 12, 4, // 11312: switch Inst[15:12] { |
| 8265 | 0, 21, // 11315: case 0x0: { |
| 8266 | OPC_SwitchField, 20, 4, // 11317: switch Inst[23:20] { |
| 8267 | 0, 7, // 11320: case 0x0: { |
| 8268 | OPC_CheckPredicate, 39, // 11322: check predicate 39 |
| 8269 | OPC_Decode, 243, 19, 250, 1, // 11324: decode to VCHLB using decoder 250 |
| 8270 | // 11324: } |
| 8271 | 1, 0, // 11329: case 0x1: { |
| 8272 | OPC_CheckPredicate, 39, // 11331: check predicate 39 |
| 8273 | OPC_Decode, 244, 19, 250, 1, // 11333: decode to VCHLBS using decoder 250 |
| 8274 | // 11333: } |
| 8275 | // 11333: } // switch Inst[23:20] |
| 8276 | // 11333: } |
| 8277 | 1, 21, // 11338: case 0x1: { |
| 8278 | OPC_SwitchField, 20, 4, // 11340: switch Inst[23:20] { |
| 8279 | 0, 7, // 11343: case 0x0: { |
| 8280 | OPC_CheckPredicate, 39, // 11345: check predicate 39 |
| 8281 | OPC_Decode, 249, 19, 250, 1, // 11347: decode to VCHLH using decoder 250 |
| 8282 | // 11347: } |
| 8283 | 1, 0, // 11352: case 0x1: { |
| 8284 | OPC_CheckPredicate, 39, // 11354: check predicate 39 |
| 8285 | OPC_Decode, 250, 19, 250, 1, // 11356: decode to VCHLHS using decoder 250 |
| 8286 | // 11356: } |
| 8287 | // 11356: } // switch Inst[23:20] |
| 8288 | // 11356: } |
| 8289 | 2, 21, // 11361: case 0x2: { |
| 8290 | OPC_SwitchField, 20, 4, // 11363: switch Inst[23:20] { |
| 8291 | 0, 7, // 11366: case 0x0: { |
| 8292 | OPC_CheckPredicate, 39, // 11368: check predicate 39 |
| 8293 | OPC_Decode, 245, 19, 250, 1, // 11370: decode to VCHLF using decoder 250 |
| 8294 | // 11370: } |
| 8295 | 1, 0, // 11375: case 0x1: { |
| 8296 | OPC_CheckPredicate, 39, // 11377: check predicate 39 |
| 8297 | OPC_Decode, 246, 19, 250, 1, // 11379: decode to VCHLFS using decoder 250 |
| 8298 | // 11379: } |
| 8299 | // 11379: } // switch Inst[23:20] |
| 8300 | // 11379: } |
| 8301 | 3, 21, // 11384: case 0x3: { |
| 8302 | OPC_SwitchField, 20, 4, // 11386: switch Inst[23:20] { |
| 8303 | 0, 7, // 11389: case 0x0: { |
| 8304 | OPC_CheckPredicate, 39, // 11391: check predicate 39 |
| 8305 | OPC_Decode, 247, 19, 250, 1, // 11393: decode to VCHLG using decoder 250 |
| 8306 | // 11393: } |
| 8307 | 1, 0, // 11398: case 0x1: { |
| 8308 | OPC_CheckPredicate, 39, // 11400: check predicate 39 |
| 8309 | OPC_Decode, 248, 19, 250, 1, // 11402: decode to VCHLGS using decoder 250 |
| 8310 | // 11402: } |
| 8311 | // 11402: } // switch Inst[23:20] |
| 8312 | // 11402: } |
| 8313 | 4, 0, // 11407: case 0x4: { |
| 8314 | OPC_SwitchField, 20, 4, // 11409: switch Inst[23:20] { |
| 8315 | 0, 7, // 11412: case 0x0: { |
| 8316 | OPC_CheckPredicate, 41, // 11414: check predicate 41 |
| 8317 | OPC_Decode, 251, 19, 250, 1, // 11416: decode to VCHLQ using decoder 250 |
| 8318 | // 11416: } |
| 8319 | 1, 0, // 11421: case 0x1: { |
| 8320 | OPC_CheckPredicate, 41, // 11423: check predicate 41 |
| 8321 | OPC_Decode, 252, 19, 250, 1, // 11425: decode to VCHLQS using decoder 250 |
| 8322 | // 11425: } |
| 8323 | // 11425: } // switch Inst[23:20] |
| 8324 | // 11425: } |
| 8325 | // 11425: } // switch Inst[15:12] |
| 8326 | // 11425: } else try { |
| 8327 | OPC_CheckPredicate, 39, // 11430: check predicate 39 |
| 8328 | OPC_Decode, 242, 19, 247, 1, // 11432: decode to VCHL using decoder 247 |
| 8329 | // 11432: } |
| 8330 | // 11432: } |
| 8331 | 251, 1, 139, 1, // 11437: case 0xfb: { |
| 8332 | OPC_CheckField, 8, 1, 0, // 11441: check Inst[8] == 0x0 |
| 8333 | OPC_CheckField, 16, 4, 0, // 11445: check Inst[19:16] == 0x0 |
| 8334 | OPC_CheckField, 24, 4, 0, // 11449: check Inst[27:24] == 0x0 |
| 8335 | OPC_Scope, 118, // 11453: try { |
| 8336 | OPC_SwitchField, 12, 4, // 11455: switch Inst[15:12] { |
| 8337 | 0, 21, // 11458: case 0x0: { |
| 8338 | OPC_SwitchField, 20, 4, // 11460: switch Inst[23:20] { |
| 8339 | 0, 7, // 11463: case 0x0: { |
| 8340 | OPC_CheckPredicate, 39, // 11465: check predicate 39 |
| 8341 | OPC_Decode, 234, 19, 250, 1, // 11467: decode to VCHB using decoder 250 |
| 8342 | // 11467: } |
| 8343 | 1, 0, // 11472: case 0x1: { |
| 8344 | OPC_CheckPredicate, 39, // 11474: check predicate 39 |
| 8345 | OPC_Decode, 235, 19, 250, 1, // 11476: decode to VCHBS using decoder 250 |
| 8346 | // 11476: } |
| 8347 | // 11476: } // switch Inst[23:20] |
| 8348 | // 11476: } |
| 8349 | 1, 21, // 11481: case 0x1: { |
| 8350 | OPC_SwitchField, 20, 4, // 11483: switch Inst[23:20] { |
| 8351 | 0, 7, // 11486: case 0x0: { |
| 8352 | OPC_CheckPredicate, 39, // 11488: check predicate 39 |
| 8353 | OPC_Decode, 240, 19, 250, 1, // 11490: decode to VCHH using decoder 250 |
| 8354 | // 11490: } |
| 8355 | 1, 0, // 11495: case 0x1: { |
| 8356 | OPC_CheckPredicate, 39, // 11497: check predicate 39 |
| 8357 | OPC_Decode, 241, 19, 250, 1, // 11499: decode to VCHHS using decoder 250 |
| 8358 | // 11499: } |
| 8359 | // 11499: } // switch Inst[23:20] |
| 8360 | // 11499: } |
| 8361 | 2, 21, // 11504: case 0x2: { |
| 8362 | OPC_SwitchField, 20, 4, // 11506: switch Inst[23:20] { |
| 8363 | 0, 7, // 11509: case 0x0: { |
| 8364 | OPC_CheckPredicate, 39, // 11511: check predicate 39 |
| 8365 | OPC_Decode, 236, 19, 250, 1, // 11513: decode to VCHF using decoder 250 |
| 8366 | // 11513: } |
| 8367 | 1, 0, // 11518: case 0x1: { |
| 8368 | OPC_CheckPredicate, 39, // 11520: check predicate 39 |
| 8369 | OPC_Decode, 237, 19, 250, 1, // 11522: decode to VCHFS using decoder 250 |
| 8370 | // 11522: } |
| 8371 | // 11522: } // switch Inst[23:20] |
| 8372 | // 11522: } |
| 8373 | 3, 21, // 11527: case 0x3: { |
| 8374 | OPC_SwitchField, 20, 4, // 11529: switch Inst[23:20] { |
| 8375 | 0, 7, // 11532: case 0x0: { |
| 8376 | OPC_CheckPredicate, 39, // 11534: check predicate 39 |
| 8377 | OPC_Decode, 238, 19, 250, 1, // 11536: decode to VCHG using decoder 250 |
| 8378 | // 11536: } |
| 8379 | 1, 0, // 11541: case 0x1: { |
| 8380 | OPC_CheckPredicate, 39, // 11543: check predicate 39 |
| 8381 | OPC_Decode, 239, 19, 250, 1, // 11545: decode to VCHGS using decoder 250 |
| 8382 | // 11545: } |
| 8383 | // 11545: } // switch Inst[23:20] |
| 8384 | // 11545: } |
| 8385 | 4, 0, // 11550: case 0x4: { |
| 8386 | OPC_SwitchField, 20, 4, // 11552: switch Inst[23:20] { |
| 8387 | 0, 7, // 11555: case 0x0: { |
| 8388 | OPC_CheckPredicate, 41, // 11557: check predicate 41 |
| 8389 | OPC_Decode, 253, 19, 250, 1, // 11559: decode to VCHQ using decoder 250 |
| 8390 | // 11559: } |
| 8391 | 1, 0, // 11564: case 0x1: { |
| 8392 | OPC_CheckPredicate, 41, // 11566: check predicate 41 |
| 8393 | OPC_Decode, 254, 19, 250, 1, // 11568: decode to VCHQS using decoder 250 |
| 8394 | // 11568: } |
| 8395 | // 11568: } // switch Inst[23:20] |
| 8396 | // 11568: } |
| 8397 | // 11568: } // switch Inst[15:12] |
| 8398 | // 11568: } else try { |
| 8399 | OPC_CheckPredicate, 39, // 11573: check predicate 39 |
| 8400 | OPC_Decode, 233, 19, 247, 1, // 11575: decode to VCH using decoder 247 |
| 8401 | // 11575: } |
| 8402 | // 11575: } |
| 8403 | 252, 1, 65, // 11580: case 0xfc: { |
| 8404 | OPC_CheckField, 8, 1, 0, // 11583: check Inst[8] == 0x0 |
| 8405 | OPC_CheckField, 16, 12, 0, // 11587: check Inst[27:16] == 0x0 |
| 8406 | OPC_Scope, 48, // 11591: try { |
| 8407 | OPC_SwitchField, 12, 4, // 11593: switch Inst[15:12] { |
| 8408 | 0, 7, // 11596: case 0x0: { |
| 8409 | OPC_CheckPredicate, 39, // 11598: check predicate 39 |
| 8410 | OPC_Decode, 146, 23, 250, 1, // 11600: decode to VMNLB using decoder 250 |
| 8411 | // 11600: } |
| 8412 | 1, 7, // 11605: case 0x1: { |
| 8413 | OPC_CheckPredicate, 39, // 11607: check predicate 39 |
| 8414 | OPC_Decode, 149, 23, 250, 1, // 11609: decode to VMNLH using decoder 250 |
| 8415 | // 11609: } |
| 8416 | 2, 7, // 11614: case 0x2: { |
| 8417 | OPC_CheckPredicate, 39, // 11616: check predicate 39 |
| 8418 | OPC_Decode, 147, 23, 250, 1, // 11618: decode to VMNLF using decoder 250 |
| 8419 | // 11618: } |
| 8420 | 3, 7, // 11623: case 0x3: { |
| 8421 | OPC_CheckPredicate, 39, // 11625: check predicate 39 |
| 8422 | OPC_Decode, 148, 23, 250, 1, // 11627: decode to VMNLG using decoder 250 |
| 8423 | // 11627: } |
| 8424 | 4, 0, // 11632: case 0x4: { |
| 8425 | OPC_CheckPredicate, 41, // 11634: check predicate 41 |
| 8426 | OPC_Decode, 150, 23, 250, 1, // 11636: decode to VMNLQ using decoder 250 |
| 8427 | // 11636: } |
| 8428 | // 11636: } // switch Inst[15:12] |
| 8429 | // 11636: } else try { |
| 8430 | OPC_CheckPredicate, 39, // 11641: check predicate 39 |
| 8431 | OPC_Decode, 145, 23, 159, 2, // 11643: decode to VMNL using decoder 287 |
| 8432 | // 11643: } |
| 8433 | // 11643: } |
| 8434 | 253, 1, 65, // 11648: case 0xfd: { |
| 8435 | OPC_CheckField, 8, 1, 0, // 11651: check Inst[8] == 0x0 |
| 8436 | OPC_CheckField, 16, 12, 0, // 11655: check Inst[27:16] == 0x0 |
| 8437 | OPC_Scope, 48, // 11659: try { |
| 8438 | OPC_SwitchField, 12, 4, // 11661: switch Inst[15:12] { |
| 8439 | 0, 7, // 11664: case 0x0: { |
| 8440 | OPC_CheckPredicate, 39, // 11666: check predicate 39 |
| 8441 | OPC_Decode, 177, 23, 250, 1, // 11668: decode to VMXLB using decoder 250 |
| 8442 | // 11668: } |
| 8443 | 1, 7, // 11673: case 0x1: { |
| 8444 | OPC_CheckPredicate, 39, // 11675: check predicate 39 |
| 8445 | OPC_Decode, 180, 23, 250, 1, // 11677: decode to VMXLH using decoder 250 |
| 8446 | // 11677: } |
| 8447 | 2, 7, // 11682: case 0x2: { |
| 8448 | OPC_CheckPredicate, 39, // 11684: check predicate 39 |
| 8449 | OPC_Decode, 178, 23, 250, 1, // 11686: decode to VMXLF using decoder 250 |
| 8450 | // 11686: } |
| 8451 | 3, 7, // 11691: case 0x3: { |
| 8452 | OPC_CheckPredicate, 39, // 11693: check predicate 39 |
| 8453 | OPC_Decode, 179, 23, 250, 1, // 11695: decode to VMXLG using decoder 250 |
| 8454 | // 11695: } |
| 8455 | 4, 0, // 11700: case 0x4: { |
| 8456 | OPC_CheckPredicate, 41, // 11702: check predicate 41 |
| 8457 | OPC_Decode, 181, 23, 250, 1, // 11704: decode to VMXLQ using decoder 250 |
| 8458 | // 11704: } |
| 8459 | // 11704: } // switch Inst[15:12] |
| 8460 | // 11704: } else try { |
| 8461 | OPC_CheckPredicate, 39, // 11709: check predicate 39 |
| 8462 | OPC_Decode, 176, 23, 159, 2, // 11711: decode to VMXL using decoder 287 |
| 8463 | // 11711: } |
| 8464 | // 11711: } |
| 8465 | 254, 1, 65, // 11716: case 0xfe: { |
| 8466 | OPC_CheckField, 8, 1, 0, // 11719: check Inst[8] == 0x0 |
| 8467 | OPC_CheckField, 16, 12, 0, // 11723: check Inst[27:16] == 0x0 |
| 8468 | OPC_Scope, 48, // 11727: try { |
| 8469 | OPC_SwitchField, 12, 4, // 11729: switch Inst[15:12] { |
| 8470 | 0, 7, // 11732: case 0x0: { |
| 8471 | OPC_CheckPredicate, 39, // 11734: check predicate 39 |
| 8472 | OPC_Decode, 141, 23, 250, 1, // 11736: decode to VMNB using decoder 250 |
| 8473 | // 11736: } |
| 8474 | 1, 7, // 11741: case 0x1: { |
| 8475 | OPC_CheckPredicate, 39, // 11743: check predicate 39 |
| 8476 | OPC_Decode, 144, 23, 250, 1, // 11745: decode to VMNH using decoder 250 |
| 8477 | // 11745: } |
| 8478 | 2, 7, // 11750: case 0x2: { |
| 8479 | OPC_CheckPredicate, 39, // 11752: check predicate 39 |
| 8480 | OPC_Decode, 142, 23, 250, 1, // 11754: decode to VMNF using decoder 250 |
| 8481 | // 11754: } |
| 8482 | 3, 7, // 11759: case 0x3: { |
| 8483 | OPC_CheckPredicate, 39, // 11761: check predicate 39 |
| 8484 | OPC_Decode, 143, 23, 250, 1, // 11763: decode to VMNG using decoder 250 |
| 8485 | // 11763: } |
| 8486 | 4, 0, // 11768: case 0x4: { |
| 8487 | OPC_CheckPredicate, 41, // 11770: check predicate 41 |
| 8488 | OPC_Decode, 151, 23, 250, 1, // 11772: decode to VMNQ using decoder 250 |
| 8489 | // 11772: } |
| 8490 | // 11772: } // switch Inst[15:12] |
| 8491 | // 11772: } else try { |
| 8492 | OPC_CheckPredicate, 39, // 11777: check predicate 39 |
| 8493 | OPC_Decode, 140, 23, 159, 2, // 11779: decode to VMN using decoder 287 |
| 8494 | // 11779: } |
| 8495 | // 11779: } |
| 8496 | 255, 1, 0, // 11784: case 0xff: { |
| 8497 | OPC_CheckField, 8, 1, 0, // 11787: check Inst[8] == 0x0 |
| 8498 | OPC_CheckField, 16, 12, 0, // 11791: check Inst[27:16] == 0x0 |
| 8499 | OPC_Scope, 48, // 11795: try { |
| 8500 | OPC_SwitchField, 12, 4, // 11797: switch Inst[15:12] { |
| 8501 | 0, 7, // 11800: case 0x0: { |
| 8502 | OPC_CheckPredicate, 39, // 11802: check predicate 39 |
| 8503 | OPC_Decode, 172, 23, 250, 1, // 11804: decode to VMXB using decoder 250 |
| 8504 | // 11804: } |
| 8505 | 1, 7, // 11809: case 0x1: { |
| 8506 | OPC_CheckPredicate, 39, // 11811: check predicate 39 |
| 8507 | OPC_Decode, 175, 23, 250, 1, // 11813: decode to VMXH using decoder 250 |
| 8508 | // 11813: } |
| 8509 | 2, 7, // 11818: case 0x2: { |
| 8510 | OPC_CheckPredicate, 39, // 11820: check predicate 39 |
| 8511 | OPC_Decode, 173, 23, 250, 1, // 11822: decode to VMXF using decoder 250 |
| 8512 | // 11822: } |
| 8513 | 3, 7, // 11827: case 0x3: { |
| 8514 | OPC_CheckPredicate, 39, // 11829: check predicate 39 |
| 8515 | OPC_Decode, 174, 23, 250, 1, // 11831: decode to VMXG using decoder 250 |
| 8516 | // 11831: } |
| 8517 | 4, 0, // 11836: case 0x4: { |
| 8518 | OPC_CheckPredicate, 41, // 11838: check predicate 41 |
| 8519 | OPC_Decode, 182, 23, 250, 1, // 11840: decode to VMXQ using decoder 250 |
| 8520 | // 11840: } |
| 8521 | // 11840: } // switch Inst[15:12] |
| 8522 | // 11840: } else try { |
| 8523 | OPC_CheckPredicate, 39, // 11845: check predicate 39 |
| 8524 | OPC_Decode, 171, 23, 159, 2, // 11847: decode to VMX using decoder 287 |
| 8525 | // 11847: } |
| 8526 | // 11847: } |
| 8527 | // 11847: } // switch Inst[7:0] |
| 8528 | // 11847: } |
| 8529 | 232, 1, 5, // 11852: case 0xe8: { |
| 8530 | OPC_Decode, 179, 15, 206, 1, // 11855: decode to MVCIN using decoder 206 |
| 8531 | // 11855: } |
| 8532 | 233, 1, 5, // 11860: case 0xe9: { |
| 8533 | OPC_Decode, 148, 16, 208, 1, // 11863: decode to PKA using decoder 208 |
| 8534 | // 11863: } |
| 8535 | 234, 1, 5, // 11868: case 0xea: { |
| 8536 | OPC_Decode, 171, 19, 206, 1, // 11871: decode to UNPKA using decoder 206 |
| 8537 | // 11871: } |
| 8538 | 235, 1, 198, 11, // 11876: case 0xeb: { |
| 8539 | OPC_SwitchField, 0, 8, // 11880: switch Inst[7:0] { |
| 8540 | 4, 5, // 11883: case 0x4: { |
| 8541 | OPC_Decode, 207, 12, 198, 2, // 11885: decode to LMG using decoder 326 |
| 8542 | // 11885: } |
| 8543 | 10, 5, // 11890: case 0xa: { |
| 8544 | OPC_Decode, 220, 17, 199, 2, // 11892: decode to SRAG using decoder 327 |
| 8545 | // 11892: } |
| 8546 | 11, 5, // 11897: case 0xb: { |
| 8547 | OPC_Decode, 176, 17, 199, 2, // 11899: decode to SLAG using decoder 327 |
| 8548 | // 11899: } |
| 8549 | 12, 5, // 11904: case 0xc: { |
| 8550 | OPC_Decode, 227, 17, 199, 2, // 11906: decode to SRLG using decoder 327 |
| 8551 | // 11906: } |
| 8552 | 13, 5, // 11911: case 0xd: { |
| 8553 | OPC_Decode, 195, 17, 199, 2, // 11913: decode to SLLG using decoder 327 |
| 8554 | // 11913: } |
| 8555 | 15, 5, // 11918: case 0xf: { |
| 8556 | OPC_Decode, 150, 19, 198, 2, // 11920: decode to TRACG using decoder 326 |
| 8557 | // 11920: } |
| 8558 | 20, 5, // 11925: case 0x14: { |
| 8559 | OPC_Decode, 224, 9, 200, 2, // 11927: decode to CSY using decoder 328 |
| 8560 | // 11927: } |
| 8561 | 22, 7, // 11932: case 0x16: { |
| 8562 | OPC_CheckPredicate, 29, // 11934: check predicate 29 |
| 8563 | OPC_Decode, 141, 16, 199, 2, // 11936: decode to PFCR using decoder 327 |
| 8564 | // 11936: } |
| 8565 | 28, 5, // 11941: case 0x1c: { |
| 8566 | OPC_Decode, 185, 16, 199, 2, // 11943: decode to RLLG using decoder 327 |
| 8567 | // 11943: } |
| 8568 | 29, 5, // 11948: case 0x1d: { |
| 8569 | OPC_Decode, 184, 16, 201, 2, // 11950: decode to RLL using decoder 329 |
| 8570 | // 11950: } |
| 8571 | 32, 5, // 11955: case 0x20: { |
| 8572 | OPC_Decode, 221, 8, 202, 2, // 11957: decode to CLMH using decoder 330 |
| 8573 | // 11957: } |
| 8574 | 33, 5, // 11962: case 0x21: { |
| 8575 | OPC_Decode, 222, 8, 203, 2, // 11964: decode to CLMY using decoder 331 |
| 8576 | // 11964: } |
| 8577 | 35, 66, // 11969: case 0x23: { |
| 8578 | OPC_Scope, 57, // 11971: try { |
| 8579 | OPC_SwitchField, 32, 4, // 11973: switch Inst[35:32] { |
| 8580 | 2, 7, // 11976: case 0x2: { |
| 8581 | OPC_CheckPredicate, 42, // 11978: check predicate 42 |
| 8582 | OPC_Decode, 143, 9, 204, 2, // 11980: decode to CLTAsmH using decoder 332 |
| 8583 | // 11980: } |
| 8584 | 4, 7, // 11985: case 0x4: { |
| 8585 | OPC_CheckPredicate, 42, // 11987: check predicate 42 |
| 8586 | OPC_Decode, 145, 9, 204, 2, // 11989: decode to CLTAsmL using decoder 332 |
| 8587 | // 11989: } |
| 8588 | 6, 7, // 11994: case 0x6: { |
| 8589 | OPC_CheckPredicate, 42, // 11996: check predicate 42 |
| 8590 | OPC_Decode, 147, 9, 204, 2, // 11998: decode to CLTAsmLH using decoder 332 |
| 8591 | // 11998: } |
| 8592 | 8, 7, // 12003: case 0x8: { |
| 8593 | OPC_CheckPredicate, 42, // 12005: check predicate 42 |
| 8594 | OPC_Decode, 142, 9, 204, 2, // 12007: decode to CLTAsmE using decoder 332 |
| 8595 | // 12007: } |
| 8596 | 10, 7, // 12012: case 0xa: { |
| 8597 | OPC_CheckPredicate, 42, // 12014: check predicate 42 |
| 8598 | OPC_Decode, 144, 9, 204, 2, // 12016: decode to CLTAsmHE using decoder 332 |
| 8599 | // 12016: } |
| 8600 | 12, 0, // 12021: case 0xc: { |
| 8601 | OPC_CheckPredicate, 42, // 12023: check predicate 42 |
| 8602 | OPC_Decode, 146, 9, 204, 2, // 12025: decode to CLTAsmLE using decoder 332 |
| 8603 | // 12025: } |
| 8604 | // 12025: } // switch Inst[35:32] |
| 8605 | // 12025: } else try { |
| 8606 | OPC_CheckPredicate, 42, // 12030: check predicate 42 |
| 8607 | OPC_Decode, 141, 9, 205, 2, // 12032: decode to CLTAsm using decoder 333 |
| 8608 | // 12032: } |
| 8609 | // 12032: } |
| 8610 | 36, 5, // 12037: case 0x24: { |
| 8611 | OPC_Decode, 152, 18, 198, 2, // 12039: decode to STMG using decoder 326 |
| 8612 | // 12039: } |
| 8613 | 37, 5, // 12044: case 0x25: { |
| 8614 | OPC_Decode, 130, 18, 206, 2, // 12046: decode to STCTG using decoder 334 |
| 8615 | // 12046: } |
| 8616 | 38, 5, // 12051: case 0x26: { |
| 8617 | OPC_Decode, 153, 18, 207, 2, // 12053: decode to STMH using decoder 335 |
| 8618 | // 12053: } |
| 8619 | 43, 66, // 12058: case 0x2b: { |
| 8620 | OPC_Scope, 57, // 12060: try { |
| 8621 | OPC_SwitchField, 32, 4, // 12062: switch Inst[35:32] { |
| 8622 | 2, 7, // 12065: case 0x2: { |
| 8623 | OPC_CheckPredicate, 42, // 12067: check predicate 42 |
| 8624 | OPC_Decode, 171, 8, 208, 2, // 12069: decode to CLGTAsmH using decoder 336 |
| 8625 | // 12069: } |
| 8626 | 4, 7, // 12074: case 0x4: { |
| 8627 | OPC_CheckPredicate, 42, // 12076: check predicate 42 |
| 8628 | OPC_Decode, 173, 8, 208, 2, // 12078: decode to CLGTAsmL using decoder 336 |
| 8629 | // 12078: } |
| 8630 | 6, 7, // 12083: case 0x6: { |
| 8631 | OPC_CheckPredicate, 42, // 12085: check predicate 42 |
| 8632 | OPC_Decode, 175, 8, 208, 2, // 12087: decode to CLGTAsmLH using decoder 336 |
| 8633 | // 12087: } |
| 8634 | 8, 7, // 12092: case 0x8: { |
| 8635 | OPC_CheckPredicate, 42, // 12094: check predicate 42 |
| 8636 | OPC_Decode, 170, 8, 208, 2, // 12096: decode to CLGTAsmE using decoder 336 |
| 8637 | // 12096: } |
| 8638 | 10, 7, // 12101: case 0xa: { |
| 8639 | OPC_CheckPredicate, 42, // 12103: check predicate 42 |
| 8640 | OPC_Decode, 172, 8, 208, 2, // 12105: decode to CLGTAsmHE using decoder 336 |
| 8641 | // 12105: } |
| 8642 | 12, 0, // 12110: case 0xc: { |
| 8643 | OPC_CheckPredicate, 42, // 12112: check predicate 42 |
| 8644 | OPC_Decode, 174, 8, 208, 2, // 12114: decode to CLGTAsmLE using decoder 336 |
| 8645 | // 12114: } |
| 8646 | // 12114: } // switch Inst[35:32] |
| 8647 | // 12114: } else try { |
| 8648 | OPC_CheckPredicate, 42, // 12119: check predicate 42 |
| 8649 | OPC_Decode, 169, 8, 209, 2, // 12121: decode to CLGTAsm using decoder 337 |
| 8650 | // 12121: } |
| 8651 | // 12121: } |
| 8652 | 44, 5, // 12126: case 0x2c: { |
| 8653 | OPC_Decode, 254, 17, 202, 2, // 12128: decode to STCMH using decoder 330 |
| 8654 | // 12128: } |
| 8655 | 45, 5, // 12133: case 0x2d: { |
| 8656 | OPC_Decode, 255, 17, 203, 2, // 12135: decode to STCMY using decoder 331 |
| 8657 | // 12135: } |
| 8658 | 47, 5, // 12140: case 0x2f: { |
| 8659 | OPC_Decode, 242, 11, 206, 2, // 12142: decode to LCTLG using decoder 334 |
| 8660 | // 12142: } |
| 8661 | 48, 5, // 12147: case 0x30: { |
| 8662 | OPC_Decode, 219, 9, 210, 2, // 12149: decode to CSG using decoder 338 |
| 8663 | // 12149: } |
| 8664 | 49, 5, // 12154: case 0x31: { |
| 8665 | OPC_Decode, 238, 5, 211, 2, // 12156: decode to CDSY using decoder 339 |
| 8666 | // 12156: } |
| 8667 | 62, 5, // 12161: case 0x3e: { |
| 8668 | OPC_Decode, 236, 5, 211, 2, // 12163: decode to CDSG using decoder 339 |
| 8669 | // 12163: } |
| 8670 | 68, 5, // 12168: case 0x44: { |
| 8671 | OPC_Decode, 210, 5, 210, 2, // 12170: decode to BXHG using decoder 338 |
| 8672 | // 12170: } |
| 8673 | 69, 5, // 12175: case 0x45: { |
| 8674 | OPC_Decode, 212, 5, 210, 2, // 12177: decode to BXLEG using decoder 338 |
| 8675 | // 12177: } |
| 8676 | 76, 5, // 12182: case 0x4c: { |
| 8677 | OPC_Decode, 174, 10, 199, 2, // 12184: decode to ECAG using decoder 327 |
| 8678 | // 12184: } |
| 8679 | 81, 5, // 12189: case 0x51: { |
| 8680 | OPC_Decode, 143, 19, 212, 2, // 12191: decode to TMY using decoder 340 |
| 8681 | // 12191: } |
| 8682 | 82, 5, // 12196: case 0x52: { |
| 8683 | OPC_Decode, 193, 15, 212, 2, // 12198: decode to MVIY using decoder 340 |
| 8684 | // 12198: } |
| 8685 | 84, 5, // 12203: case 0x54: { |
| 8686 | OPC_Decode, 228, 15, 212, 2, // 12205: decode to NIY using decoder 340 |
| 8687 | // 12205: } |
| 8688 | 85, 5, // 12210: case 0x55: { |
| 8689 | OPC_Decode, 219, 8, 212, 2, // 12212: decode to CLIY using decoder 340 |
| 8690 | // 12212: } |
| 8691 | 86, 5, // 12217: case 0x56: { |
| 8692 | OPC_Decode, 132, 16, 212, 2, // 12219: decode to OIY using decoder 340 |
| 8693 | // 12219: } |
| 8694 | 87, 5, // 12224: case 0x57: { |
| 8695 | OPC_Decode, 221, 25, 212, 2, // 12226: decode to XIY using decoder 340 |
| 8696 | // 12226: } |
| 8697 | 106, 5, // 12231: case 0x6a: { |
| 8698 | OPC_Decode, 228, 4, 213, 2, // 12233: decode to ASI using decoder 341 |
| 8699 | // 12233: } |
| 8700 | 110, 5, // 12238: case 0x6e: { |
| 8701 | OPC_Decode, 221, 4, 213, 2, // 12240: decode to ALSI using decoder 341 |
| 8702 | // 12240: } |
| 8703 | 113, 11, // 12245: case 0x71: { |
| 8704 | OPC_CheckPredicate, 0, // 12247: check predicate 0 |
| 8705 | OPC_CheckField, 32, 8, 0, // 12249: check Inst[39:32] == 0x0 |
| 8706 | OPC_Decode, 181, 14, 214, 2, // 12253: decode to LPSWEY using decoder 342 |
| 8707 | // 12253: } |
| 8708 | 122, 5, // 12258: case 0x7a: { |
| 8709 | OPC_Decode, 194, 4, 213, 2, // 12260: decode to AGSI using decoder 341 |
| 8710 | // 12260: } |
| 8711 | 126, 5, // 12265: case 0x7e: { |
| 8712 | OPC_Decode, 215, 4, 213, 2, // 12267: decode to ALGSI using decoder 341 |
| 8713 | // 12267: } |
| 8714 | 128, 1, 5, // 12272: case 0x80: { |
| 8715 | OPC_Decode, 218, 10, 215, 2, // 12275: decode to ICMH using decoder 343 |
| 8716 | // 12275: } |
| 8717 | 129, 1, 5, // 12280: case 0x81: { |
| 8718 | OPC_Decode, 219, 10, 216, 2, // 12283: decode to ICMY using decoder 344 |
| 8719 | // 12283: } |
| 8720 | 142, 1, 5, // 12288: case 0x8e: { |
| 8721 | OPC_Decode, 183, 15, 217, 2, // 12291: decode to MVCLU using decoder 345 |
| 8722 | // 12291: } |
| 8723 | 143, 1, 5, // 12296: case 0x8f: { |
| 8724 | OPC_Decode, 178, 7, 217, 2, // 12299: decode to CLCLU using decoder 345 |
| 8725 | // 12299: } |
| 8726 | 144, 1, 5, // 12304: case 0x90: { |
| 8727 | OPC_Decode, 154, 18, 218, 2, // 12307: decode to STMY using decoder 346 |
| 8728 | // 12307: } |
| 8729 | 150, 1, 5, // 12312: case 0x96: { |
| 8730 | OPC_Decode, 208, 12, 207, 2, // 12315: decode to LMH using decoder 335 |
| 8731 | // 12315: } |
| 8732 | 152, 1, 5, // 12320: case 0x98: { |
| 8733 | OPC_Decode, 209, 12, 218, 2, // 12323: decode to LMY using decoder 346 |
| 8734 | // 12323: } |
| 8735 | 154, 1, 5, // 12328: case 0x9a: { |
| 8736 | OPC_Decode, 214, 11, 219, 2, // 12331: decode to LAMY using decoder 347 |
| 8737 | // 12331: } |
| 8738 | 155, 1, 5, // 12336: case 0x9b: { |
| 8739 | OPC_Decode, 244, 17, 219, 2, // 12339: decode to STAMY using decoder 347 |
| 8740 | // 12339: } |
| 8741 | 192, 1, 13, // 12344: case 0xc0: { |
| 8742 | OPC_CheckField, 32, 4, 0, // 12347: check Inst[35:32] == 0x0 |
| 8743 | OPC_CheckField, 8, 8, 0, // 12351: check Inst[15:8] == 0x0 |
| 8744 | OPC_Decode, 144, 19, 220, 2, // 12355: decode to TP using decoder 348 |
| 8745 | // 12355: } |
| 8746 | 220, 1, 7, // 12360: case 0xdc: { |
| 8747 | OPC_CheckPredicate, 26, // 12363: check predicate 26 |
| 8748 | OPC_Decode, 221, 17, 201, 2, // 12365: decode to SRAK using decoder 329 |
| 8749 | // 12365: } |
| 8750 | 221, 1, 7, // 12370: case 0xdd: { |
| 8751 | OPC_CheckPredicate, 26, // 12373: check predicate 26 |
| 8752 | OPC_Decode, 177, 17, 201, 2, // 12375: decode to SLAK using decoder 329 |
| 8753 | // 12375: } |
| 8754 | 222, 1, 7, // 12380: case 0xde: { |
| 8755 | OPC_CheckPredicate, 26, // 12383: check predicate 26 |
| 8756 | OPC_Decode, 228, 17, 201, 2, // 12385: decode to SRLK using decoder 329 |
| 8757 | // 12385: } |
| 8758 | 223, 1, 7, // 12390: case 0xdf: { |
| 8759 | OPC_CheckPredicate, 26, // 12393: check predicate 26 |
| 8760 | OPC_Decode, 196, 17, 201, 2, // 12395: decode to SLLK using decoder 329 |
| 8761 | // 12395: } |
| 8762 | 224, 1, 139, 1, // 12400: case 0xe0: { |
| 8763 | OPC_Scope, 129, 1, // 12404: try { |
| 8764 | OPC_SwitchField, 32, 4, // 12407: switch Inst[35:32] { |
| 8765 | 1, 7, // 12410: case 0x1: { |
| 8766 | OPC_CheckPredicate, 23, // 12412: check predicate 23 |
| 8767 | OPC_Decode, 135, 13, 221, 2, // 12414: decode to LOCFHAsmO using decoder 349 |
| 8768 | // 12414: } |
| 8769 | 2, 7, // 12419: case 0x2: { |
| 8770 | OPC_CheckPredicate, 23, // 12421: check predicate 23 |
| 8771 | OPC_Decode, 247, 12, 221, 2, // 12423: decode to LOCFHAsmH using decoder 349 |
| 8772 | // 12423: } |
| 8773 | 3, 7, // 12428: case 0x3: { |
| 8774 | OPC_CheckPredicate, 23, // 12430: check predicate 23 |
| 8775 | OPC_Decode, 129, 13, 221, 2, // 12432: decode to LOCFHAsmNLE using decoder 349 |
| 8776 | // 12432: } |
| 8777 | 4, 7, // 12437: case 0x4: { |
| 8778 | OPC_CheckPredicate, 23, // 12439: check predicate 23 |
| 8779 | OPC_Decode, 249, 12, 221, 2, // 12441: decode to LOCFHAsmL using decoder 349 |
| 8780 | // 12441: } |
| 8781 | 5, 7, // 12446: case 0x5: { |
| 8782 | OPC_CheckPredicate, 23, // 12448: check predicate 23 |
| 8783 | OPC_Decode, 255, 12, 221, 2, // 12450: decode to LOCFHAsmNHE using decoder 349 |
| 8784 | // 12450: } |
| 8785 | 6, 7, // 12455: case 0x6: { |
| 8786 | OPC_CheckPredicate, 23, // 12457: check predicate 23 |
| 8787 | OPC_Decode, 251, 12, 221, 2, // 12459: decode to LOCFHAsmLH using decoder 349 |
| 8788 | // 12459: } |
| 8789 | 7, 7, // 12464: case 0x7: { |
| 8790 | OPC_CheckPredicate, 23, // 12466: check predicate 23 |
| 8791 | OPC_Decode, 253, 12, 221, 2, // 12468: decode to LOCFHAsmNE using decoder 349 |
| 8792 | // 12468: } |
| 8793 | 8, 7, // 12473: case 0x8: { |
| 8794 | OPC_CheckPredicate, 23, // 12475: check predicate 23 |
| 8795 | OPC_Decode, 246, 12, 221, 2, // 12477: decode to LOCFHAsmE using decoder 349 |
| 8796 | // 12477: } |
| 8797 | 9, 7, // 12482: case 0x9: { |
| 8798 | OPC_CheckPredicate, 23, // 12484: check predicate 23 |
| 8799 | OPC_Decode, 130, 13, 221, 2, // 12486: decode to LOCFHAsmNLH using decoder 349 |
| 8800 | // 12486: } |
| 8801 | 10, 7, // 12491: case 0xa: { |
| 8802 | OPC_CheckPredicate, 23, // 12493: check predicate 23 |
| 8803 | OPC_Decode, 248, 12, 221, 2, // 12495: decode to LOCFHAsmHE using decoder 349 |
| 8804 | // 12495: } |
| 8805 | 11, 7, // 12500: case 0xb: { |
| 8806 | OPC_CheckPredicate, 23, // 12502: check predicate 23 |
| 8807 | OPC_Decode, 128, 13, 221, 2, // 12504: decode to LOCFHAsmNL using decoder 349 |
| 8808 | // 12504: } |
| 8809 | 12, 7, // 12509: case 0xc: { |
| 8810 | OPC_CheckPredicate, 23, // 12511: check predicate 23 |
| 8811 | OPC_Decode, 250, 12, 221, 2, // 12513: decode to LOCFHAsmLE using decoder 349 |
| 8812 | // 12513: } |
| 8813 | 13, 7, // 12518: case 0xd: { |
| 8814 | OPC_CheckPredicate, 23, // 12520: check predicate 23 |
| 8815 | OPC_Decode, 254, 12, 221, 2, // 12522: decode to LOCFHAsmNH using decoder 349 |
| 8816 | // 12522: } |
| 8817 | 14, 0, // 12527: case 0xe: { |
| 8818 | OPC_CheckPredicate, 23, // 12529: check predicate 23 |
| 8819 | OPC_Decode, 132, 13, 221, 2, // 12531: decode to LOCFHAsmNO using decoder 349 |
| 8820 | // 12531: } |
| 8821 | // 12531: } // switch Inst[35:32] |
| 8822 | // 12531: } else try { |
| 8823 | OPC_CheckPredicate, 23, // 12536: check predicate 23 |
| 8824 | OPC_Decode, 245, 12, 222, 2, // 12538: decode to LOCFHAsm using decoder 350 |
| 8825 | // 12538: } |
| 8826 | // 12538: } |
| 8827 | 225, 1, 139, 1, // 12543: case 0xe1: { |
| 8828 | OPC_Scope, 129, 1, // 12547: try { |
| 8829 | OPC_SwitchField, 32, 4, // 12550: switch Inst[35:32] { |
| 8830 | 1, 7, // 12553: case 0x1: { |
| 8831 | OPC_CheckPredicate, 23, // 12555: check predicate 23 |
| 8832 | OPC_Decode, 197, 18, 223, 2, // 12557: decode to STOCFHAsmO using decoder 351 |
| 8833 | // 12557: } |
| 8834 | 2, 7, // 12562: case 0x2: { |
| 8835 | OPC_CheckPredicate, 23, // 12564: check predicate 23 |
| 8836 | OPC_Decode, 181, 18, 223, 2, // 12566: decode to STOCFHAsmH using decoder 351 |
| 8837 | // 12566: } |
| 8838 | 3, 7, // 12571: case 0x3: { |
| 8839 | OPC_CheckPredicate, 23, // 12573: check predicate 23 |
| 8840 | OPC_Decode, 191, 18, 223, 2, // 12575: decode to STOCFHAsmNLE using decoder 351 |
| 8841 | // 12575: } |
| 8842 | 4, 7, // 12580: case 0x4: { |
| 8843 | OPC_CheckPredicate, 23, // 12582: check predicate 23 |
| 8844 | OPC_Decode, 183, 18, 223, 2, // 12584: decode to STOCFHAsmL using decoder 351 |
| 8845 | // 12584: } |
| 8846 | 5, 7, // 12589: case 0x5: { |
| 8847 | OPC_CheckPredicate, 23, // 12591: check predicate 23 |
| 8848 | OPC_Decode, 189, 18, 223, 2, // 12593: decode to STOCFHAsmNHE using decoder 351 |
| 8849 | // 12593: } |
| 8850 | 6, 7, // 12598: case 0x6: { |
| 8851 | OPC_CheckPredicate, 23, // 12600: check predicate 23 |
| 8852 | OPC_Decode, 185, 18, 223, 2, // 12602: decode to STOCFHAsmLH using decoder 351 |
| 8853 | // 12602: } |
| 8854 | 7, 7, // 12607: case 0x7: { |
| 8855 | OPC_CheckPredicate, 23, // 12609: check predicate 23 |
| 8856 | OPC_Decode, 187, 18, 223, 2, // 12611: decode to STOCFHAsmNE using decoder 351 |
| 8857 | // 12611: } |
| 8858 | 8, 7, // 12616: case 0x8: { |
| 8859 | OPC_CheckPredicate, 23, // 12618: check predicate 23 |
| 8860 | OPC_Decode, 180, 18, 223, 2, // 12620: decode to STOCFHAsmE using decoder 351 |
| 8861 | // 12620: } |
| 8862 | 9, 7, // 12625: case 0x9: { |
| 8863 | OPC_CheckPredicate, 23, // 12627: check predicate 23 |
| 8864 | OPC_Decode, 192, 18, 223, 2, // 12629: decode to STOCFHAsmNLH using decoder 351 |
| 8865 | // 12629: } |
| 8866 | 10, 7, // 12634: case 0xa: { |
| 8867 | OPC_CheckPredicate, 23, // 12636: check predicate 23 |
| 8868 | OPC_Decode, 182, 18, 223, 2, // 12638: decode to STOCFHAsmHE using decoder 351 |
| 8869 | // 12638: } |
| 8870 | 11, 7, // 12643: case 0xb: { |
| 8871 | OPC_CheckPredicate, 23, // 12645: check predicate 23 |
| 8872 | OPC_Decode, 190, 18, 223, 2, // 12647: decode to STOCFHAsmNL using decoder 351 |
| 8873 | // 12647: } |
| 8874 | 12, 7, // 12652: case 0xc: { |
| 8875 | OPC_CheckPredicate, 23, // 12654: check predicate 23 |
| 8876 | OPC_Decode, 184, 18, 223, 2, // 12656: decode to STOCFHAsmLE using decoder 351 |
| 8877 | // 12656: } |
| 8878 | 13, 7, // 12661: case 0xd: { |
| 8879 | OPC_CheckPredicate, 23, // 12663: check predicate 23 |
| 8880 | OPC_Decode, 188, 18, 223, 2, // 12665: decode to STOCFHAsmNH using decoder 351 |
| 8881 | // 12665: } |
| 8882 | 14, 0, // 12670: case 0xe: { |
| 8883 | OPC_CheckPredicate, 23, // 12672: check predicate 23 |
| 8884 | OPC_Decode, 194, 18, 223, 2, // 12674: decode to STOCFHAsmNO using decoder 351 |
| 8885 | // 12674: } |
| 8886 | // 12674: } // switch Inst[35:32] |
| 8887 | // 12674: } else try { |
| 8888 | OPC_CheckPredicate, 23, // 12679: check predicate 23 |
| 8889 | OPC_Decode, 179, 18, 224, 2, // 12681: decode to STOCFHAsm using decoder 352 |
| 8890 | // 12681: } |
| 8891 | // 12681: } |
| 8892 | 226, 1, 139, 1, // 12686: case 0xe2: { |
| 8893 | OPC_Scope, 129, 1, // 12690: try { |
| 8894 | OPC_SwitchField, 32, 4, // 12693: switch Inst[35:32] { |
| 8895 | 1, 7, // 12696: case 0x1: { |
| 8896 | OPC_CheckPredicate, 25, // 12698: check predicate 25 |
| 8897 | OPC_Decode, 179, 13, 225, 2, // 12700: decode to LOCGAsmO using decoder 353 |
| 8898 | // 12700: } |
| 8899 | 2, 7, // 12705: case 0x2: { |
| 8900 | OPC_CheckPredicate, 25, // 12707: check predicate 25 |
| 8901 | OPC_Decode, 163, 13, 225, 2, // 12709: decode to LOCGAsmH using decoder 353 |
| 8902 | // 12709: } |
| 8903 | 3, 7, // 12714: case 0x3: { |
| 8904 | OPC_CheckPredicate, 25, // 12716: check predicate 25 |
| 8905 | OPC_Decode, 173, 13, 225, 2, // 12718: decode to LOCGAsmNLE using decoder 353 |
| 8906 | // 12718: } |
| 8907 | 4, 7, // 12723: case 0x4: { |
| 8908 | OPC_CheckPredicate, 25, // 12725: check predicate 25 |
| 8909 | OPC_Decode, 165, 13, 225, 2, // 12727: decode to LOCGAsmL using decoder 353 |
| 8910 | // 12727: } |
| 8911 | 5, 7, // 12732: case 0x5: { |
| 8912 | OPC_CheckPredicate, 25, // 12734: check predicate 25 |
| 8913 | OPC_Decode, 171, 13, 225, 2, // 12736: decode to LOCGAsmNHE using decoder 353 |
| 8914 | // 12736: } |
| 8915 | 6, 7, // 12741: case 0x6: { |
| 8916 | OPC_CheckPredicate, 25, // 12743: check predicate 25 |
| 8917 | OPC_Decode, 167, 13, 225, 2, // 12745: decode to LOCGAsmLH using decoder 353 |
| 8918 | // 12745: } |
| 8919 | 7, 7, // 12750: case 0x7: { |
| 8920 | OPC_CheckPredicate, 25, // 12752: check predicate 25 |
| 8921 | OPC_Decode, 169, 13, 225, 2, // 12754: decode to LOCGAsmNE using decoder 353 |
| 8922 | // 12754: } |
| 8923 | 8, 7, // 12759: case 0x8: { |
| 8924 | OPC_CheckPredicate, 25, // 12761: check predicate 25 |
| 8925 | OPC_Decode, 162, 13, 225, 2, // 12763: decode to LOCGAsmE using decoder 353 |
| 8926 | // 12763: } |
| 8927 | 9, 7, // 12768: case 0x9: { |
| 8928 | OPC_CheckPredicate, 25, // 12770: check predicate 25 |
| 8929 | OPC_Decode, 174, 13, 225, 2, // 12772: decode to LOCGAsmNLH using decoder 353 |
| 8930 | // 12772: } |
| 8931 | 10, 7, // 12777: case 0xa: { |
| 8932 | OPC_CheckPredicate, 25, // 12779: check predicate 25 |
| 8933 | OPC_Decode, 164, 13, 225, 2, // 12781: decode to LOCGAsmHE using decoder 353 |
| 8934 | // 12781: } |
| 8935 | 11, 7, // 12786: case 0xb: { |
| 8936 | OPC_CheckPredicate, 25, // 12788: check predicate 25 |
| 8937 | OPC_Decode, 172, 13, 225, 2, // 12790: decode to LOCGAsmNL using decoder 353 |
| 8938 | // 12790: } |
| 8939 | 12, 7, // 12795: case 0xc: { |
| 8940 | OPC_CheckPredicate, 25, // 12797: check predicate 25 |
| 8941 | OPC_Decode, 166, 13, 225, 2, // 12799: decode to LOCGAsmLE using decoder 353 |
| 8942 | // 12799: } |
| 8943 | 13, 7, // 12804: case 0xd: { |
| 8944 | OPC_CheckPredicate, 25, // 12806: check predicate 25 |
| 8945 | OPC_Decode, 170, 13, 225, 2, // 12808: decode to LOCGAsmNH using decoder 353 |
| 8946 | // 12808: } |
| 8947 | 14, 0, // 12813: case 0xe: { |
| 8948 | OPC_CheckPredicate, 25, // 12815: check predicate 25 |
| 8949 | OPC_Decode, 176, 13, 225, 2, // 12817: decode to LOCGAsmNO using decoder 353 |
| 8950 | // 12817: } |
| 8951 | // 12817: } // switch Inst[35:32] |
| 8952 | // 12817: } else try { |
| 8953 | OPC_CheckPredicate, 25, // 12822: check predicate 25 |
| 8954 | OPC_Decode, 161, 13, 226, 2, // 12824: decode to LOCGAsm using decoder 354 |
| 8955 | // 12824: } |
| 8956 | // 12824: } |
| 8957 | 227, 1, 139, 1, // 12829: case 0xe3: { |
| 8958 | OPC_Scope, 129, 1, // 12833: try { |
| 8959 | OPC_SwitchField, 32, 4, // 12836: switch Inst[35:32] { |
| 8960 | 1, 7, // 12839: case 0x1: { |
| 8961 | OPC_CheckPredicate, 25, // 12841: check predicate 25 |
| 8962 | OPC_Decode, 219, 18, 208, 2, // 12843: decode to STOCGAsmO using decoder 336 |
| 8963 | // 12843: } |
| 8964 | 2, 7, // 12848: case 0x2: { |
| 8965 | OPC_CheckPredicate, 25, // 12850: check predicate 25 |
| 8966 | OPC_Decode, 203, 18, 208, 2, // 12852: decode to STOCGAsmH using decoder 336 |
| 8967 | // 12852: } |
| 8968 | 3, 7, // 12857: case 0x3: { |
| 8969 | OPC_CheckPredicate, 25, // 12859: check predicate 25 |
| 8970 | OPC_Decode, 213, 18, 208, 2, // 12861: decode to STOCGAsmNLE using decoder 336 |
| 8971 | // 12861: } |
| 8972 | 4, 7, // 12866: case 0x4: { |
| 8973 | OPC_CheckPredicate, 25, // 12868: check predicate 25 |
| 8974 | OPC_Decode, 205, 18, 208, 2, // 12870: decode to STOCGAsmL using decoder 336 |
| 8975 | // 12870: } |
| 8976 | 5, 7, // 12875: case 0x5: { |
| 8977 | OPC_CheckPredicate, 25, // 12877: check predicate 25 |
| 8978 | OPC_Decode, 211, 18, 208, 2, // 12879: decode to STOCGAsmNHE using decoder 336 |
| 8979 | // 12879: } |
| 8980 | 6, 7, // 12884: case 0x6: { |
| 8981 | OPC_CheckPredicate, 25, // 12886: check predicate 25 |
| 8982 | OPC_Decode, 207, 18, 208, 2, // 12888: decode to STOCGAsmLH using decoder 336 |
| 8983 | // 12888: } |
| 8984 | 7, 7, // 12893: case 0x7: { |
| 8985 | OPC_CheckPredicate, 25, // 12895: check predicate 25 |
| 8986 | OPC_Decode, 209, 18, 208, 2, // 12897: decode to STOCGAsmNE using decoder 336 |
| 8987 | // 12897: } |
| 8988 | 8, 7, // 12902: case 0x8: { |
| 8989 | OPC_CheckPredicate, 25, // 12904: check predicate 25 |
| 8990 | OPC_Decode, 202, 18, 208, 2, // 12906: decode to STOCGAsmE using decoder 336 |
| 8991 | // 12906: } |
| 8992 | 9, 7, // 12911: case 0x9: { |
| 8993 | OPC_CheckPredicate, 25, // 12913: check predicate 25 |
| 8994 | OPC_Decode, 214, 18, 208, 2, // 12915: decode to STOCGAsmNLH using decoder 336 |
| 8995 | // 12915: } |
| 8996 | 10, 7, // 12920: case 0xa: { |
| 8997 | OPC_CheckPredicate, 25, // 12922: check predicate 25 |
| 8998 | OPC_Decode, 204, 18, 208, 2, // 12924: decode to STOCGAsmHE using decoder 336 |
| 8999 | // 12924: } |
| 9000 | 11, 7, // 12929: case 0xb: { |
| 9001 | OPC_CheckPredicate, 25, // 12931: check predicate 25 |
| 9002 | OPC_Decode, 212, 18, 208, 2, // 12933: decode to STOCGAsmNL using decoder 336 |
| 9003 | // 12933: } |
| 9004 | 12, 7, // 12938: case 0xc: { |
| 9005 | OPC_CheckPredicate, 25, // 12940: check predicate 25 |
| 9006 | OPC_Decode, 206, 18, 208, 2, // 12942: decode to STOCGAsmLE using decoder 336 |
| 9007 | // 12942: } |
| 9008 | 13, 7, // 12947: case 0xd: { |
| 9009 | OPC_CheckPredicate, 25, // 12949: check predicate 25 |
| 9010 | OPC_Decode, 210, 18, 208, 2, // 12951: decode to STOCGAsmNH using decoder 336 |
| 9011 | // 12951: } |
| 9012 | 14, 0, // 12956: case 0xe: { |
| 9013 | OPC_CheckPredicate, 25, // 12958: check predicate 25 |
| 9014 | OPC_Decode, 216, 18, 208, 2, // 12960: decode to STOCGAsmNO using decoder 336 |
| 9015 | // 12960: } |
| 9016 | // 12960: } // switch Inst[35:32] |
| 9017 | // 12960: } else try { |
| 9018 | OPC_CheckPredicate, 25, // 12965: check predicate 25 |
| 9019 | OPC_Decode, 201, 18, 209, 2, // 12967: decode to STOCGAsm using decoder 337 |
| 9020 | // 12967: } |
| 9021 | // 12967: } |
| 9022 | 228, 1, 7, // 12972: case 0xe4: { |
| 9023 | OPC_CheckPredicate, 28, // 12975: check predicate 28 |
| 9024 | OPC_Decode, 216, 11, 198, 2, // 12977: decode to LANG using decoder 326 |
| 9025 | // 12977: } |
| 9026 | 230, 1, 7, // 12982: case 0xe6: { |
| 9027 | OPC_CheckPredicate, 28, // 12985: check predicate 28 |
| 9028 | OPC_Decode, 218, 11, 198, 2, // 12987: decode to LAOG using decoder 326 |
| 9029 | // 12987: } |
| 9030 | 231, 1, 7, // 12992: case 0xe7: { |
| 9031 | OPC_CheckPredicate, 28, // 12995: check predicate 28 |
| 9032 | OPC_Decode, 223, 11, 198, 2, // 12997: decode to LAXG using decoder 326 |
| 9033 | // 12997: } |
| 9034 | 232, 1, 7, // 13002: case 0xe8: { |
| 9035 | OPC_CheckPredicate, 28, // 13005: check predicate 28 |
| 9036 | OPC_Decode, 208, 11, 198, 2, // 13007: decode to LAAG using decoder 326 |
| 9037 | // 13007: } |
| 9038 | 234, 1, 7, // 13012: case 0xea: { |
| 9039 | OPC_CheckPredicate, 28, // 13015: check predicate 28 |
| 9040 | OPC_Decode, 210, 11, 198, 2, // 13017: decode to LAALG using decoder 326 |
| 9041 | // 13017: } |
| 9042 | 242, 1, 139, 1, // 13022: case 0xf2: { |
| 9043 | OPC_Scope, 129, 1, // 13026: try { |
| 9044 | OPC_SwitchField, 32, 4, // 13029: switch Inst[35:32] { |
| 9045 | 1, 7, // 13032: case 0x1: { |
| 9046 | OPC_CheckPredicate, 25, // 13034: check predicate 25 |
| 9047 | OPC_Decode, 241, 12, 227, 2, // 13036: decode to LOCAsmO using decoder 355 |
| 9048 | // 13036: } |
| 9049 | 2, 7, // 13041: case 0x2: { |
| 9050 | OPC_CheckPredicate, 25, // 13043: check predicate 25 |
| 9051 | OPC_Decode, 225, 12, 227, 2, // 13045: decode to LOCAsmH using decoder 355 |
| 9052 | // 13045: } |
| 9053 | 3, 7, // 13050: case 0x3: { |
| 9054 | OPC_CheckPredicate, 25, // 13052: check predicate 25 |
| 9055 | OPC_Decode, 235, 12, 227, 2, // 13054: decode to LOCAsmNLE using decoder 355 |
| 9056 | // 13054: } |
| 9057 | 4, 7, // 13059: case 0x4: { |
| 9058 | OPC_CheckPredicate, 25, // 13061: check predicate 25 |
| 9059 | OPC_Decode, 227, 12, 227, 2, // 13063: decode to LOCAsmL using decoder 355 |
| 9060 | // 13063: } |
| 9061 | 5, 7, // 13068: case 0x5: { |
| 9062 | OPC_CheckPredicate, 25, // 13070: check predicate 25 |
| 9063 | OPC_Decode, 233, 12, 227, 2, // 13072: decode to LOCAsmNHE using decoder 355 |
| 9064 | // 13072: } |
| 9065 | 6, 7, // 13077: case 0x6: { |
| 9066 | OPC_CheckPredicate, 25, // 13079: check predicate 25 |
| 9067 | OPC_Decode, 229, 12, 227, 2, // 13081: decode to LOCAsmLH using decoder 355 |
| 9068 | // 13081: } |
| 9069 | 7, 7, // 13086: case 0x7: { |
| 9070 | OPC_CheckPredicate, 25, // 13088: check predicate 25 |
| 9071 | OPC_Decode, 231, 12, 227, 2, // 13090: decode to LOCAsmNE using decoder 355 |
| 9072 | // 13090: } |
| 9073 | 8, 7, // 13095: case 0x8: { |
| 9074 | OPC_CheckPredicate, 25, // 13097: check predicate 25 |
| 9075 | OPC_Decode, 224, 12, 227, 2, // 13099: decode to LOCAsmE using decoder 355 |
| 9076 | // 13099: } |
| 9077 | 9, 7, // 13104: case 0x9: { |
| 9078 | OPC_CheckPredicate, 25, // 13106: check predicate 25 |
| 9079 | OPC_Decode, 236, 12, 227, 2, // 13108: decode to LOCAsmNLH using decoder 355 |
| 9080 | // 13108: } |
| 9081 | 10, 7, // 13113: case 0xa: { |
| 9082 | OPC_CheckPredicate, 25, // 13115: check predicate 25 |
| 9083 | OPC_Decode, 226, 12, 227, 2, // 13117: decode to LOCAsmHE using decoder 355 |
| 9084 | // 13117: } |
| 9085 | 11, 7, // 13122: case 0xb: { |
| 9086 | OPC_CheckPredicate, 25, // 13124: check predicate 25 |
| 9087 | OPC_Decode, 234, 12, 227, 2, // 13126: decode to LOCAsmNL using decoder 355 |
| 9088 | // 13126: } |
| 9089 | 12, 7, // 13131: case 0xc: { |
| 9090 | OPC_CheckPredicate, 25, // 13133: check predicate 25 |
| 9091 | OPC_Decode, 228, 12, 227, 2, // 13135: decode to LOCAsmLE using decoder 355 |
| 9092 | // 13135: } |
| 9093 | 13, 7, // 13140: case 0xd: { |
| 9094 | OPC_CheckPredicate, 25, // 13142: check predicate 25 |
| 9095 | OPC_Decode, 232, 12, 227, 2, // 13144: decode to LOCAsmNH using decoder 355 |
| 9096 | // 13144: } |
| 9097 | 14, 0, // 13149: case 0xe: { |
| 9098 | OPC_CheckPredicate, 25, // 13151: check predicate 25 |
| 9099 | OPC_Decode, 238, 12, 227, 2, // 13153: decode to LOCAsmNO using decoder 355 |
| 9100 | // 13153: } |
| 9101 | // 13153: } // switch Inst[35:32] |
| 9102 | // 13153: } else try { |
| 9103 | OPC_CheckPredicate, 25, // 13158: check predicate 25 |
| 9104 | OPC_Decode, 223, 12, 228, 2, // 13160: decode to LOCAsm using decoder 356 |
| 9105 | // 13160: } |
| 9106 | // 13160: } |
| 9107 | 243, 1, 139, 1, // 13165: case 0xf3: { |
| 9108 | OPC_Scope, 129, 1, // 13169: try { |
| 9109 | OPC_SwitchField, 32, 4, // 13172: switch Inst[35:32] { |
| 9110 | 1, 7, // 13175: case 0x1: { |
| 9111 | OPC_CheckPredicate, 25, // 13177: check predicate 25 |
| 9112 | OPC_Decode, 175, 18, 204, 2, // 13179: decode to STOCAsmO using decoder 332 |
| 9113 | // 13179: } |
| 9114 | 2, 7, // 13184: case 0x2: { |
| 9115 | OPC_CheckPredicate, 25, // 13186: check predicate 25 |
| 9116 | OPC_Decode, 159, 18, 204, 2, // 13188: decode to STOCAsmH using decoder 332 |
| 9117 | // 13188: } |
| 9118 | 3, 7, // 13193: case 0x3: { |
| 9119 | OPC_CheckPredicate, 25, // 13195: check predicate 25 |
| 9120 | OPC_Decode, 169, 18, 204, 2, // 13197: decode to STOCAsmNLE using decoder 332 |
| 9121 | // 13197: } |
| 9122 | 4, 7, // 13202: case 0x4: { |
| 9123 | OPC_CheckPredicate, 25, // 13204: check predicate 25 |
| 9124 | OPC_Decode, 161, 18, 204, 2, // 13206: decode to STOCAsmL using decoder 332 |
| 9125 | // 13206: } |
| 9126 | 5, 7, // 13211: case 0x5: { |
| 9127 | OPC_CheckPredicate, 25, // 13213: check predicate 25 |
| 9128 | OPC_Decode, 167, 18, 204, 2, // 13215: decode to STOCAsmNHE using decoder 332 |
| 9129 | // 13215: } |
| 9130 | 6, 7, // 13220: case 0x6: { |
| 9131 | OPC_CheckPredicate, 25, // 13222: check predicate 25 |
| 9132 | OPC_Decode, 163, 18, 204, 2, // 13224: decode to STOCAsmLH using decoder 332 |
| 9133 | // 13224: } |
| 9134 | 7, 7, // 13229: case 0x7: { |
| 9135 | OPC_CheckPredicate, 25, // 13231: check predicate 25 |
| 9136 | OPC_Decode, 165, 18, 204, 2, // 13233: decode to STOCAsmNE using decoder 332 |
| 9137 | // 13233: } |
| 9138 | 8, 7, // 13238: case 0x8: { |
| 9139 | OPC_CheckPredicate, 25, // 13240: check predicate 25 |
| 9140 | OPC_Decode, 158, 18, 204, 2, // 13242: decode to STOCAsmE using decoder 332 |
| 9141 | // 13242: } |
| 9142 | 9, 7, // 13247: case 0x9: { |
| 9143 | OPC_CheckPredicate, 25, // 13249: check predicate 25 |
| 9144 | OPC_Decode, 170, 18, 204, 2, // 13251: decode to STOCAsmNLH using decoder 332 |
| 9145 | // 13251: } |
| 9146 | 10, 7, // 13256: case 0xa: { |
| 9147 | OPC_CheckPredicate, 25, // 13258: check predicate 25 |
| 9148 | OPC_Decode, 160, 18, 204, 2, // 13260: decode to STOCAsmHE using decoder 332 |
| 9149 | // 13260: } |
| 9150 | 11, 7, // 13265: case 0xb: { |
| 9151 | OPC_CheckPredicate, 25, // 13267: check predicate 25 |
| 9152 | OPC_Decode, 168, 18, 204, 2, // 13269: decode to STOCAsmNL using decoder 332 |
| 9153 | // 13269: } |
| 9154 | 12, 7, // 13274: case 0xc: { |
| 9155 | OPC_CheckPredicate, 25, // 13276: check predicate 25 |
| 9156 | OPC_Decode, 162, 18, 204, 2, // 13278: decode to STOCAsmLE using decoder 332 |
| 9157 | // 13278: } |
| 9158 | 13, 7, // 13283: case 0xd: { |
| 9159 | OPC_CheckPredicate, 25, // 13285: check predicate 25 |
| 9160 | OPC_Decode, 166, 18, 204, 2, // 13287: decode to STOCAsmNH using decoder 332 |
| 9161 | // 13287: } |
| 9162 | 14, 0, // 13292: case 0xe: { |
| 9163 | OPC_CheckPredicate, 25, // 13294: check predicate 25 |
| 9164 | OPC_Decode, 172, 18, 204, 2, // 13296: decode to STOCAsmNO using decoder 332 |
| 9165 | // 13296: } |
| 9166 | // 13296: } // switch Inst[35:32] |
| 9167 | // 13296: } else try { |
| 9168 | OPC_CheckPredicate, 25, // 13301: check predicate 25 |
| 9169 | OPC_Decode, 157, 18, 205, 2, // 13303: decode to STOCAsm using decoder 333 |
| 9170 | // 13303: } |
| 9171 | // 13303: } |
| 9172 | 244, 1, 7, // 13308: case 0xf4: { |
| 9173 | OPC_CheckPredicate, 28, // 13311: check predicate 28 |
| 9174 | OPC_Decode, 215, 11, 218, 2, // 13313: decode to LAN using decoder 346 |
| 9175 | // 13313: } |
| 9176 | 246, 1, 7, // 13318: case 0xf6: { |
| 9177 | OPC_CheckPredicate, 28, // 13321: check predicate 28 |
| 9178 | OPC_Decode, 217, 11, 218, 2, // 13323: decode to LAO using decoder 346 |
| 9179 | // 13323: } |
| 9180 | 247, 1, 7, // 13328: case 0xf7: { |
| 9181 | OPC_CheckPredicate, 28, // 13331: check predicate 28 |
| 9182 | OPC_Decode, 222, 11, 218, 2, // 13333: decode to LAX using decoder 346 |
| 9183 | // 13333: } |
| 9184 | 248, 1, 7, // 13338: case 0xf8: { |
| 9185 | OPC_CheckPredicate, 28, // 13341: check predicate 28 |
| 9186 | OPC_Decode, 207, 11, 218, 2, // 13343: decode to LAA using decoder 346 |
| 9187 | // 13343: } |
| 9188 | 250, 1, 0, // 13348: case 0xfa: { |
| 9189 | OPC_CheckPredicate, 28, // 13351: check predicate 28 |
| 9190 | OPC_Decode, 209, 11, 218, 2, // 13353: decode to LAAL using decoder 346 |
| 9191 | // 13353: } |
| 9192 | // 13353: } // switch Inst[7:0] |
| 9193 | // 13353: } |
| 9194 | 236, 1, 193, 14, // 13358: case 0xec: { |
| 9195 | OPC_SwitchField, 0, 8, // 13362: switch Inst[7:0] { |
| 9196 | 66, 143, 1, // 13365: case 0x42: { |
| 9197 | OPC_CheckField, 8, 8, 0, // 13368: check Inst[15:8] == 0x0 |
| 9198 | OPC_Scope, 129, 1, // 13372: try { |
| 9199 | OPC_SwitchField, 32, 4, // 13375: switch Inst[35:32] { |
| 9200 | 1, 7, // 13378: case 0x1: { |
| 9201 | OPC_CheckPredicate, 23, // 13380: check predicate 23 |
| 9202 | OPC_Decode, 139, 14, 229, 2, // 13382: decode to LOCHIAsmO using decoder 357 |
| 9203 | // 13382: } |
| 9204 | 2, 7, // 13387: case 0x2: { |
| 9205 | OPC_CheckPredicate, 23, // 13389: check predicate 23 |
| 9206 | OPC_Decode, 251, 13, 229, 2, // 13391: decode to LOCHIAsmH using decoder 357 |
| 9207 | // 13391: } |
| 9208 | 3, 7, // 13396: case 0x3: { |
| 9209 | OPC_CheckPredicate, 23, // 13398: check predicate 23 |
| 9210 | OPC_Decode, 133, 14, 229, 2, // 13400: decode to LOCHIAsmNLE using decoder 357 |
| 9211 | // 13400: } |
| 9212 | 4, 7, // 13405: case 0x4: { |
| 9213 | OPC_CheckPredicate, 23, // 13407: check predicate 23 |
| 9214 | OPC_Decode, 253, 13, 229, 2, // 13409: decode to LOCHIAsmL using decoder 357 |
| 9215 | // 13409: } |
| 9216 | 5, 7, // 13414: case 0x5: { |
| 9217 | OPC_CheckPredicate, 23, // 13416: check predicate 23 |
| 9218 | OPC_Decode, 131, 14, 229, 2, // 13418: decode to LOCHIAsmNHE using decoder 357 |
| 9219 | // 13418: } |
| 9220 | 6, 7, // 13423: case 0x6: { |
| 9221 | OPC_CheckPredicate, 23, // 13425: check predicate 23 |
| 9222 | OPC_Decode, 255, 13, 229, 2, // 13427: decode to LOCHIAsmLH using decoder 357 |
| 9223 | // 13427: } |
| 9224 | 7, 7, // 13432: case 0x7: { |
| 9225 | OPC_CheckPredicate, 23, // 13434: check predicate 23 |
| 9226 | OPC_Decode, 129, 14, 229, 2, // 13436: decode to LOCHIAsmNE using decoder 357 |
| 9227 | // 13436: } |
| 9228 | 8, 7, // 13441: case 0x8: { |
| 9229 | OPC_CheckPredicate, 23, // 13443: check predicate 23 |
| 9230 | OPC_Decode, 250, 13, 229, 2, // 13445: decode to LOCHIAsmE using decoder 357 |
| 9231 | // 13445: } |
| 9232 | 9, 7, // 13450: case 0x9: { |
| 9233 | OPC_CheckPredicate, 23, // 13452: check predicate 23 |
| 9234 | OPC_Decode, 134, 14, 229, 2, // 13454: decode to LOCHIAsmNLH using decoder 357 |
| 9235 | // 13454: } |
| 9236 | 10, 7, // 13459: case 0xa: { |
| 9237 | OPC_CheckPredicate, 23, // 13461: check predicate 23 |
| 9238 | OPC_Decode, 252, 13, 229, 2, // 13463: decode to LOCHIAsmHE using decoder 357 |
| 9239 | // 13463: } |
| 9240 | 11, 7, // 13468: case 0xb: { |
| 9241 | OPC_CheckPredicate, 23, // 13470: check predicate 23 |
| 9242 | OPC_Decode, 132, 14, 229, 2, // 13472: decode to LOCHIAsmNL using decoder 357 |
| 9243 | // 13472: } |
| 9244 | 12, 7, // 13477: case 0xc: { |
| 9245 | OPC_CheckPredicate, 23, // 13479: check predicate 23 |
| 9246 | OPC_Decode, 254, 13, 229, 2, // 13481: decode to LOCHIAsmLE using decoder 357 |
| 9247 | // 13481: } |
| 9248 | 13, 7, // 13486: case 0xd: { |
| 9249 | OPC_CheckPredicate, 23, // 13488: check predicate 23 |
| 9250 | OPC_Decode, 130, 14, 229, 2, // 13490: decode to LOCHIAsmNH using decoder 357 |
| 9251 | // 13490: } |
| 9252 | 14, 0, // 13495: case 0xe: { |
| 9253 | OPC_CheckPredicate, 23, // 13497: check predicate 23 |
| 9254 | OPC_Decode, 136, 14, 229, 2, // 13499: decode to LOCHIAsmNO using decoder 357 |
| 9255 | // 13499: } |
| 9256 | // 13499: } // switch Inst[35:32] |
| 9257 | // 13499: } else try { |
| 9258 | OPC_CheckPredicate, 23, // 13504: check predicate 23 |
| 9259 | OPC_Decode, 249, 13, 230, 2, // 13506: decode to LOCHIAsm using decoder 358 |
| 9260 | // 13506: } |
| 9261 | // 13506: } |
| 9262 | 68, 9, // 13511: case 0x44: { |
| 9263 | OPC_CheckField, 8, 8, 0, // 13513: check Inst[15:8] == 0x0 |
| 9264 | OPC_Decode, 203, 5, 231, 2, // 13517: decode to BRXHG using decoder 359 |
| 9265 | // 13517: } |
| 9266 | 69, 9, // 13522: case 0x45: { |
| 9267 | OPC_CheckField, 8, 8, 0, // 13524: check Inst[15:8] == 0x0 |
| 9268 | OPC_Decode, 205, 5, 231, 2, // 13528: decode to BRXLG using decoder 359 |
| 9269 | // 13528: } |
| 9270 | 70, 143, 1, // 13533: case 0x46: { |
| 9271 | OPC_CheckField, 8, 8, 0, // 13536: check Inst[15:8] == 0x0 |
| 9272 | OPC_Scope, 129, 1, // 13540: try { |
| 9273 | OPC_SwitchField, 32, 4, // 13543: switch Inst[35:32] { |
| 9274 | 1, 7, // 13546: case 0x1: { |
| 9275 | OPC_CheckPredicate, 23, // 13548: check predicate 23 |
| 9276 | OPC_Decode, 201, 13, 232, 2, // 13550: decode to LOCGHIAsmO using decoder 360 |
| 9277 | // 13550: } |
| 9278 | 2, 7, // 13555: case 0x2: { |
| 9279 | OPC_CheckPredicate, 23, // 13557: check predicate 23 |
| 9280 | OPC_Decode, 185, 13, 232, 2, // 13559: decode to LOCGHIAsmH using decoder 360 |
| 9281 | // 13559: } |
| 9282 | 3, 7, // 13564: case 0x3: { |
| 9283 | OPC_CheckPredicate, 23, // 13566: check predicate 23 |
| 9284 | OPC_Decode, 195, 13, 232, 2, // 13568: decode to LOCGHIAsmNLE using decoder 360 |
| 9285 | // 13568: } |
| 9286 | 4, 7, // 13573: case 0x4: { |
| 9287 | OPC_CheckPredicate, 23, // 13575: check predicate 23 |
| 9288 | OPC_Decode, 187, 13, 232, 2, // 13577: decode to LOCGHIAsmL using decoder 360 |
| 9289 | // 13577: } |
| 9290 | 5, 7, // 13582: case 0x5: { |
| 9291 | OPC_CheckPredicate, 23, // 13584: check predicate 23 |
| 9292 | OPC_Decode, 193, 13, 232, 2, // 13586: decode to LOCGHIAsmNHE using decoder 360 |
| 9293 | // 13586: } |
| 9294 | 6, 7, // 13591: case 0x6: { |
| 9295 | OPC_CheckPredicate, 23, // 13593: check predicate 23 |
| 9296 | OPC_Decode, 189, 13, 232, 2, // 13595: decode to LOCGHIAsmLH using decoder 360 |
| 9297 | // 13595: } |
| 9298 | 7, 7, // 13600: case 0x7: { |
| 9299 | OPC_CheckPredicate, 23, // 13602: check predicate 23 |
| 9300 | OPC_Decode, 191, 13, 232, 2, // 13604: decode to LOCGHIAsmNE using decoder 360 |
| 9301 | // 13604: } |
| 9302 | 8, 7, // 13609: case 0x8: { |
| 9303 | OPC_CheckPredicate, 23, // 13611: check predicate 23 |
| 9304 | OPC_Decode, 184, 13, 232, 2, // 13613: decode to LOCGHIAsmE using decoder 360 |
| 9305 | // 13613: } |
| 9306 | 9, 7, // 13618: case 0x9: { |
| 9307 | OPC_CheckPredicate, 23, // 13620: check predicate 23 |
| 9308 | OPC_Decode, 196, 13, 232, 2, // 13622: decode to LOCGHIAsmNLH using decoder 360 |
| 9309 | // 13622: } |
| 9310 | 10, 7, // 13627: case 0xa: { |
| 9311 | OPC_CheckPredicate, 23, // 13629: check predicate 23 |
| 9312 | OPC_Decode, 186, 13, 232, 2, // 13631: decode to LOCGHIAsmHE using decoder 360 |
| 9313 | // 13631: } |
| 9314 | 11, 7, // 13636: case 0xb: { |
| 9315 | OPC_CheckPredicate, 23, // 13638: check predicate 23 |
| 9316 | OPC_Decode, 194, 13, 232, 2, // 13640: decode to LOCGHIAsmNL using decoder 360 |
| 9317 | // 13640: } |
| 9318 | 12, 7, // 13645: case 0xc: { |
| 9319 | OPC_CheckPredicate, 23, // 13647: check predicate 23 |
| 9320 | OPC_Decode, 188, 13, 232, 2, // 13649: decode to LOCGHIAsmLE using decoder 360 |
| 9321 | // 13649: } |
| 9322 | 13, 7, // 13654: case 0xd: { |
| 9323 | OPC_CheckPredicate, 23, // 13656: check predicate 23 |
| 9324 | OPC_Decode, 192, 13, 232, 2, // 13658: decode to LOCGHIAsmNH using decoder 360 |
| 9325 | // 13658: } |
| 9326 | 14, 0, // 13663: case 0xe: { |
| 9327 | OPC_CheckPredicate, 23, // 13665: check predicate 23 |
| 9328 | OPC_Decode, 198, 13, 232, 2, // 13667: decode to LOCGHIAsmNO using decoder 360 |
| 9329 | // 13667: } |
| 9330 | // 13667: } // switch Inst[35:32] |
| 9331 | // 13667: } else try { |
| 9332 | OPC_CheckPredicate, 23, // 13672: check predicate 23 |
| 9333 | OPC_Decode, 183, 13, 233, 2, // 13674: decode to LOCGHIAsm using decoder 361 |
| 9334 | // 13674: } |
| 9335 | // 13674: } |
| 9336 | 78, 143, 1, // 13679: case 0x4e: { |
| 9337 | OPC_CheckField, 8, 8, 0, // 13682: check Inst[15:8] == 0x0 |
| 9338 | OPC_Scope, 129, 1, // 13686: try { |
| 9339 | OPC_SwitchField, 32, 4, // 13689: switch Inst[35:32] { |
| 9340 | 1, 7, // 13692: case 0x1: { |
| 9341 | OPC_CheckPredicate, 23, // 13694: check predicate 23 |
| 9342 | OPC_Decode, 245, 13, 234, 2, // 13696: decode to LOCHHIAsmO using decoder 362 |
| 9343 | // 13696: } |
| 9344 | 2, 7, // 13701: case 0x2: { |
| 9345 | OPC_CheckPredicate, 23, // 13703: check predicate 23 |
| 9346 | OPC_Decode, 229, 13, 234, 2, // 13705: decode to LOCHHIAsmH using decoder 362 |
| 9347 | // 13705: } |
| 9348 | 3, 7, // 13710: case 0x3: { |
| 9349 | OPC_CheckPredicate, 23, // 13712: check predicate 23 |
| 9350 | OPC_Decode, 239, 13, 234, 2, // 13714: decode to LOCHHIAsmNLE using decoder 362 |
| 9351 | // 13714: } |
| 9352 | 4, 7, // 13719: case 0x4: { |
| 9353 | OPC_CheckPredicate, 23, // 13721: check predicate 23 |
| 9354 | OPC_Decode, 231, 13, 234, 2, // 13723: decode to LOCHHIAsmL using decoder 362 |
| 9355 | // 13723: } |
| 9356 | 5, 7, // 13728: case 0x5: { |
| 9357 | OPC_CheckPredicate, 23, // 13730: check predicate 23 |
| 9358 | OPC_Decode, 237, 13, 234, 2, // 13732: decode to LOCHHIAsmNHE using decoder 362 |
| 9359 | // 13732: } |
| 9360 | 6, 7, // 13737: case 0x6: { |
| 9361 | OPC_CheckPredicate, 23, // 13739: check predicate 23 |
| 9362 | OPC_Decode, 233, 13, 234, 2, // 13741: decode to LOCHHIAsmLH using decoder 362 |
| 9363 | // 13741: } |
| 9364 | 7, 7, // 13746: case 0x7: { |
| 9365 | OPC_CheckPredicate, 23, // 13748: check predicate 23 |
| 9366 | OPC_Decode, 235, 13, 234, 2, // 13750: decode to LOCHHIAsmNE using decoder 362 |
| 9367 | // 13750: } |
| 9368 | 8, 7, // 13755: case 0x8: { |
| 9369 | OPC_CheckPredicate, 23, // 13757: check predicate 23 |
| 9370 | OPC_Decode, 228, 13, 234, 2, // 13759: decode to LOCHHIAsmE using decoder 362 |
| 9371 | // 13759: } |
| 9372 | 9, 7, // 13764: case 0x9: { |
| 9373 | OPC_CheckPredicate, 23, // 13766: check predicate 23 |
| 9374 | OPC_Decode, 240, 13, 234, 2, // 13768: decode to LOCHHIAsmNLH using decoder 362 |
| 9375 | // 13768: } |
| 9376 | 10, 7, // 13773: case 0xa: { |
| 9377 | OPC_CheckPredicate, 23, // 13775: check predicate 23 |
| 9378 | OPC_Decode, 230, 13, 234, 2, // 13777: decode to LOCHHIAsmHE using decoder 362 |
| 9379 | // 13777: } |
| 9380 | 11, 7, // 13782: case 0xb: { |
| 9381 | OPC_CheckPredicate, 23, // 13784: check predicate 23 |
| 9382 | OPC_Decode, 238, 13, 234, 2, // 13786: decode to LOCHHIAsmNL using decoder 362 |
| 9383 | // 13786: } |
| 9384 | 12, 7, // 13791: case 0xc: { |
| 9385 | OPC_CheckPredicate, 23, // 13793: check predicate 23 |
| 9386 | OPC_Decode, 232, 13, 234, 2, // 13795: decode to LOCHHIAsmLE using decoder 362 |
| 9387 | // 13795: } |
| 9388 | 13, 7, // 13800: case 0xd: { |
| 9389 | OPC_CheckPredicate, 23, // 13802: check predicate 23 |
| 9390 | OPC_Decode, 236, 13, 234, 2, // 13804: decode to LOCHHIAsmNH using decoder 362 |
| 9391 | // 13804: } |
| 9392 | 14, 0, // 13809: case 0xe: { |
| 9393 | OPC_CheckPredicate, 23, // 13811: check predicate 23 |
| 9394 | OPC_Decode, 242, 13, 234, 2, // 13813: decode to LOCHHIAsmNO using decoder 362 |
| 9395 | // 13813: } |
| 9396 | // 13813: } // switch Inst[35:32] |
| 9397 | // 13813: } else try { |
| 9398 | OPC_CheckPredicate, 23, // 13818: check predicate 23 |
| 9399 | OPC_Decode, 227, 13, 235, 2, // 13820: decode to LOCHHIAsm using decoder 363 |
| 9400 | // 13820: } |
| 9401 | // 13820: } |
| 9402 | 81, 20, // 13825: case 0x51: { |
| 9403 | OPC_Scope, 11, // 13827: try { |
| 9404 | OPC_CheckField, 8, 8, 0, // 13829: check Inst[15:8] == 0x0 |
| 9405 | OPC_CheckPredicate, 22, // 13833: check predicate 22 |
| 9406 | OPC_Decode, 183, 16, 236, 2, // 13835: decode to RISBLGOpt using decoder 364 |
| 9407 | // 13835: } else try { |
| 9408 | OPC_CheckPredicate, 22, // 13840: check predicate 22 |
| 9409 | OPC_Decode, 182, 16, 237, 2, // 13842: decode to RISBLG using decoder 365 |
| 9410 | // 13842: } |
| 9411 | // 13842: } |
| 9412 | 84, 16, // 13847: case 0x54: { |
| 9413 | OPC_Scope, 9, // 13849: try { |
| 9414 | OPC_CheckField, 8, 8, 0, // 13851: check Inst[15:8] == 0x0 |
| 9415 | OPC_Decode, 187, 16, 238, 2, // 13855: decode to RNSBGOpt using decoder 366 |
| 9416 | // 13855: } else try { |
| 9417 | OPC_Decode, 186, 16, 239, 2, // 13860: decode to RNSBG using decoder 367 |
| 9418 | // 13860: } |
| 9419 | // 13860: } |
| 9420 | 85, 38, // 13865: case 0x55: { |
| 9421 | OPC_Scope, 20, // 13867: try { |
| 9422 | OPC_CheckField, 8, 8, 0, // 13869: check Inst[15:8] == 0x0 |
| 9423 | OPC_Scope, 9, // 13873: try { |
| 9424 | OPC_CheckField, 23, 1, 1, // 13875: check Inst[23] == 0x1 |
| 9425 | OPC_Decode, 179, 16, 240, 2, // 13879: decode to RISBGZOpt using decoder 368 |
| 9426 | // 13879: } else try { |
| 9427 | OPC_Decode, 177, 16, 238, 2, // 13884: decode to RISBGOpt using decoder 366 |
| 9428 | // 13884: } |
| 9429 | OPC_Scope, 9, // 13889: } else try { |
| 9430 | OPC_CheckField, 23, 1, 1, // 13891: check Inst[23] == 0x1 |
| 9431 | OPC_Decode, 178, 16, 241, 2, // 13895: decode to RISBGZ using decoder 369 |
| 9432 | // 13895: } else try { |
| 9433 | OPC_Decode, 170, 16, 239, 2, // 13900: decode to RISBG using decoder 367 |
| 9434 | // 13900: } |
| 9435 | // 13900: } |
| 9436 | 86, 16, // 13905: case 0x56: { |
| 9437 | OPC_Scope, 9, // 13907: try { |
| 9438 | OPC_CheckField, 8, 8, 0, // 13909: check Inst[15:8] == 0x0 |
| 9439 | OPC_Decode, 189, 16, 238, 2, // 13913: decode to ROSBGOpt using decoder 366 |
| 9440 | // 13913: } else try { |
| 9441 | OPC_Decode, 188, 16, 239, 2, // 13918: decode to ROSBG using decoder 367 |
| 9442 | // 13918: } |
| 9443 | // 13918: } |
| 9444 | 87, 16, // 13923: case 0x57: { |
| 9445 | OPC_Scope, 9, // 13925: try { |
| 9446 | OPC_CheckField, 8, 8, 0, // 13927: check Inst[15:8] == 0x0 |
| 9447 | OPC_Decode, 197, 16, 238, 2, // 13931: decode to RXSBGOpt using decoder 366 |
| 9448 | // 13931: } else try { |
| 9449 | OPC_Decode, 196, 16, 239, 2, // 13936: decode to RXSBG using decoder 367 |
| 9450 | // 13936: } |
| 9451 | // 13936: } |
| 9452 | 89, 46, // 13941: case 0x59: { |
| 9453 | OPC_Scope, 24, // 13943: try { |
| 9454 | OPC_CheckField, 8, 8, 0, // 13945: check Inst[15:8] == 0x0 |
| 9455 | OPC_Scope, 11, // 13949: try { |
| 9456 | OPC_CheckField, 23, 1, 1, // 13951: check Inst[23] == 0x1 |
| 9457 | OPC_CheckPredicate, 42, // 13955: check predicate 42 |
| 9458 | OPC_Decode, 176, 16, 240, 2, // 13957: decode to RISBGNZOpt using decoder 368 |
| 9459 | // 13957: } else try { |
| 9460 | OPC_CheckPredicate, 42, // 13962: check predicate 42 |
| 9461 | OPC_Decode, 174, 16, 238, 2, // 13964: decode to RISBGNOpt using decoder 366 |
| 9462 | // 13964: } |
| 9463 | OPC_Scope, 11, // 13969: } else try { |
| 9464 | OPC_CheckField, 23, 1, 1, // 13971: check Inst[23] == 0x1 |
| 9465 | OPC_CheckPredicate, 42, // 13975: check predicate 42 |
| 9466 | OPC_Decode, 175, 16, 241, 2, // 13977: decode to RISBGNZ using decoder 369 |
| 9467 | // 13977: } else try { |
| 9468 | OPC_CheckPredicate, 42, // 13982: check predicate 42 |
| 9469 | OPC_Decode, 173, 16, 239, 2, // 13984: decode to RISBGN using decoder 367 |
| 9470 | // 13984: } |
| 9471 | // 13984: } |
| 9472 | 93, 20, // 13989: case 0x5d: { |
| 9473 | OPC_Scope, 11, // 13991: try { |
| 9474 | OPC_CheckField, 8, 8, 0, // 13993: check Inst[15:8] == 0x0 |
| 9475 | OPC_CheckPredicate, 22, // 13997: check predicate 22 |
| 9476 | OPC_Decode, 181, 16, 242, 2, // 13999: decode to RISBHGOpt using decoder 370 |
| 9477 | // 13999: } else try { |
| 9478 | OPC_CheckPredicate, 22, // 14004: check predicate 22 |
| 9479 | OPC_Decode, 180, 16, 243, 2, // 14006: decode to RISBHG using decoder 371 |
| 9480 | // 14006: } |
| 9481 | // 14006: } |
| 9482 | 100, 56, // 14011: case 0x64: { |
| 9483 | OPC_CheckField, 8, 4, 0, // 14013: check Inst[11:8] == 0x0 |
| 9484 | OPC_Scope, 45, // 14017: try { |
| 9485 | OPC_SwitchField, 12, 4, // 14019: switch Inst[15:12] { |
| 9486 | 2, 5, // 14022: case 0x2: { |
| 9487 | OPC_Decode, 218, 6, 244, 2, // 14024: decode to CGRJAsmH using decoder 372 |
| 9488 | // 14024: } |
| 9489 | 4, 5, // 14029: case 0x4: { |
| 9490 | OPC_Decode, 220, 6, 244, 2, // 14031: decode to CGRJAsmL using decoder 372 |
| 9491 | // 14031: } |
| 9492 | 6, 5, // 14036: case 0x6: { |
| 9493 | OPC_Decode, 222, 6, 244, 2, // 14038: decode to CGRJAsmLH using decoder 372 |
| 9494 | // 14038: } |
| 9495 | 8, 5, // 14043: case 0x8: { |
| 9496 | OPC_Decode, 217, 6, 244, 2, // 14045: decode to CGRJAsmE using decoder 372 |
| 9497 | // 14045: } |
| 9498 | 10, 5, // 14050: case 0xa: { |
| 9499 | OPC_Decode, 219, 6, 244, 2, // 14052: decode to CGRJAsmHE using decoder 372 |
| 9500 | // 14052: } |
| 9501 | 12, 0, // 14057: case 0xc: { |
| 9502 | OPC_Decode, 221, 6, 244, 2, // 14059: decode to CGRJAsmLE using decoder 372 |
| 9503 | // 14059: } |
| 9504 | // 14059: } // switch Inst[15:12] |
| 9505 | // 14059: } else try { |
| 9506 | OPC_Decode, 216, 6, 245, 2, // 14064: decode to CGRJAsm using decoder 373 |
| 9507 | // 14064: } |
| 9508 | // 14064: } |
| 9509 | 101, 56, // 14069: case 0x65: { |
| 9510 | OPC_CheckField, 8, 4, 0, // 14071: check Inst[11:8] == 0x0 |
| 9511 | OPC_Scope, 45, // 14075: try { |
| 9512 | OPC_SwitchField, 12, 4, // 14077: switch Inst[15:12] { |
| 9513 | 2, 5, // 14080: case 0x2: { |
| 9514 | OPC_Decode, 142, 8, 244, 2, // 14082: decode to CLGRJAsmH using decoder 372 |
| 9515 | // 14082: } |
| 9516 | 4, 5, // 14087: case 0x4: { |
| 9517 | OPC_Decode, 144, 8, 244, 2, // 14089: decode to CLGRJAsmL using decoder 372 |
| 9518 | // 14089: } |
| 9519 | 6, 5, // 14094: case 0x6: { |
| 9520 | OPC_Decode, 146, 8, 244, 2, // 14096: decode to CLGRJAsmLH using decoder 372 |
| 9521 | // 14096: } |
| 9522 | 8, 5, // 14101: case 0x8: { |
| 9523 | OPC_Decode, 141, 8, 244, 2, // 14103: decode to CLGRJAsmE using decoder 372 |
| 9524 | // 14103: } |
| 9525 | 10, 5, // 14108: case 0xa: { |
| 9526 | OPC_Decode, 143, 8, 244, 2, // 14110: decode to CLGRJAsmHE using decoder 372 |
| 9527 | // 14110: } |
| 9528 | 12, 0, // 14115: case 0xc: { |
| 9529 | OPC_Decode, 145, 8, 244, 2, // 14117: decode to CLGRJAsmLE using decoder 372 |
| 9530 | // 14117: } |
| 9531 | // 14117: } // switch Inst[15:12] |
| 9532 | // 14117: } else try { |
| 9533 | OPC_Decode, 140, 8, 245, 2, // 14122: decode to CLGRJAsm using decoder 373 |
| 9534 | // 14122: } |
| 9535 | // 14122: } |
| 9536 | 112, 60, // 14127: case 0x70: { |
| 9537 | OPC_CheckField, 8, 4, 0, // 14129: check Inst[11:8] == 0x0 |
| 9538 | OPC_CheckField, 32, 4, 0, // 14133: check Inst[35:32] == 0x0 |
| 9539 | OPC_Scope, 45, // 14137: try { |
| 9540 | OPC_SwitchField, 12, 4, // 14139: switch Inst[15:12] { |
| 9541 | 2, 5, // 14142: case 0x2: { |
| 9542 | OPC_Decode, 189, 6, 246, 2, // 14144: decode to CGITAsmH using decoder 374 |
| 9543 | // 14144: } |
| 9544 | 4, 5, // 14149: case 0x4: { |
| 9545 | OPC_Decode, 191, 6, 246, 2, // 14151: decode to CGITAsmL using decoder 374 |
| 9546 | // 14151: } |
| 9547 | 6, 5, // 14156: case 0x6: { |
| 9548 | OPC_Decode, 193, 6, 246, 2, // 14158: decode to CGITAsmLH using decoder 374 |
| 9549 | // 14158: } |
| 9550 | 8, 5, // 14163: case 0x8: { |
| 9551 | OPC_Decode, 188, 6, 246, 2, // 14165: decode to CGITAsmE using decoder 374 |
| 9552 | // 14165: } |
| 9553 | 10, 5, // 14170: case 0xa: { |
| 9554 | OPC_Decode, 190, 6, 246, 2, // 14172: decode to CGITAsmHE using decoder 374 |
| 9555 | // 14172: } |
| 9556 | 12, 0, // 14177: case 0xc: { |
| 9557 | OPC_Decode, 192, 6, 246, 2, // 14179: decode to CGITAsmLE using decoder 374 |
| 9558 | // 14179: } |
| 9559 | // 14179: } // switch Inst[15:12] |
| 9560 | // 14179: } else try { |
| 9561 | OPC_Decode, 187, 6, 247, 2, // 14184: decode to CGITAsm using decoder 375 |
| 9562 | // 14184: } |
| 9563 | // 14184: } |
| 9564 | 113, 60, // 14189: case 0x71: { |
| 9565 | OPC_CheckField, 8, 4, 0, // 14191: check Inst[11:8] == 0x0 |
| 9566 | OPC_CheckField, 32, 4, 0, // 14195: check Inst[35:32] == 0x0 |
| 9567 | OPC_Scope, 45, // 14199: try { |
| 9568 | OPC_SwitchField, 12, 4, // 14201: switch Inst[15:12] { |
| 9569 | 2, 5, // 14204: case 0x2: { |
| 9570 | OPC_Decode, 241, 7, 248, 2, // 14206: decode to CLGITAsmH using decoder 376 |
| 9571 | // 14206: } |
| 9572 | 4, 5, // 14211: case 0x4: { |
| 9573 | OPC_Decode, 243, 7, 248, 2, // 14213: decode to CLGITAsmL using decoder 376 |
| 9574 | // 14213: } |
| 9575 | 6, 5, // 14218: case 0x6: { |
| 9576 | OPC_Decode, 245, 7, 248, 2, // 14220: decode to CLGITAsmLH using decoder 376 |
| 9577 | // 14220: } |
| 9578 | 8, 5, // 14225: case 0x8: { |
| 9579 | OPC_Decode, 240, 7, 248, 2, // 14227: decode to CLGITAsmE using decoder 376 |
| 9580 | // 14227: } |
| 9581 | 10, 5, // 14232: case 0xa: { |
| 9582 | OPC_Decode, 242, 7, 248, 2, // 14234: decode to CLGITAsmHE using decoder 376 |
| 9583 | // 14234: } |
| 9584 | 12, 0, // 14239: case 0xc: { |
| 9585 | OPC_Decode, 244, 7, 248, 2, // 14241: decode to CLGITAsmLE using decoder 376 |
| 9586 | // 14241: } |
| 9587 | // 14241: } // switch Inst[15:12] |
| 9588 | // 14241: } else try { |
| 9589 | OPC_Decode, 239, 7, 249, 2, // 14246: decode to CLGITAsm using decoder 377 |
| 9590 | // 14246: } |
| 9591 | // 14246: } |
| 9592 | 114, 60, // 14251: case 0x72: { |
| 9593 | OPC_CheckField, 8, 4, 0, // 14253: check Inst[11:8] == 0x0 |
| 9594 | OPC_CheckField, 32, 4, 0, // 14257: check Inst[35:32] == 0x0 |
| 9595 | OPC_Scope, 45, // 14261: try { |
| 9596 | OPC_SwitchField, 12, 4, // 14263: switch Inst[15:12] { |
| 9597 | 2, 5, // 14266: case 0x2: { |
| 9598 | OPC_Decode, 162, 7, 250, 2, // 14268: decode to CITAsmH using decoder 378 |
| 9599 | // 14268: } |
| 9600 | 4, 5, // 14273: case 0x4: { |
| 9601 | OPC_Decode, 164, 7, 250, 2, // 14275: decode to CITAsmL using decoder 378 |
| 9602 | // 14275: } |
| 9603 | 6, 5, // 14280: case 0x6: { |
| 9604 | OPC_Decode, 166, 7, 250, 2, // 14282: decode to CITAsmLH using decoder 378 |
| 9605 | // 14282: } |
| 9606 | 8, 5, // 14287: case 0x8: { |
| 9607 | OPC_Decode, 161, 7, 250, 2, // 14289: decode to CITAsmE using decoder 378 |
| 9608 | // 14289: } |
| 9609 | 10, 5, // 14294: case 0xa: { |
| 9610 | OPC_Decode, 163, 7, 250, 2, // 14296: decode to CITAsmHE using decoder 378 |
| 9611 | // 14296: } |
| 9612 | 12, 0, // 14301: case 0xc: { |
| 9613 | OPC_Decode, 165, 7, 250, 2, // 14303: decode to CITAsmLE using decoder 378 |
| 9614 | // 14303: } |
| 9615 | // 14303: } // switch Inst[15:12] |
| 9616 | // 14303: } else try { |
| 9617 | OPC_Decode, 160, 7, 251, 2, // 14308: decode to CITAsm using decoder 379 |
| 9618 | // 14308: } |
| 9619 | // 14308: } |
| 9620 | 115, 60, // 14313: case 0x73: { |
| 9621 | OPC_CheckField, 8, 4, 0, // 14315: check Inst[11:8] == 0x0 |
| 9622 | OPC_CheckField, 32, 4, 0, // 14319: check Inst[35:32] == 0x0 |
| 9623 | OPC_Scope, 45, // 14323: try { |
| 9624 | OPC_SwitchField, 12, 4, // 14325: switch Inst[15:12] { |
| 9625 | 2, 5, // 14328: case 0x2: { |
| 9626 | OPC_Decode, 187, 7, 252, 2, // 14330: decode to CLFITAsmH using decoder 380 |
| 9627 | // 14330: } |
| 9628 | 4, 5, // 14335: case 0x4: { |
| 9629 | OPC_Decode, 189, 7, 252, 2, // 14337: decode to CLFITAsmL using decoder 380 |
| 9630 | // 14337: } |
| 9631 | 6, 5, // 14342: case 0x6: { |
| 9632 | OPC_Decode, 191, 7, 252, 2, // 14344: decode to CLFITAsmLH using decoder 380 |
| 9633 | // 14344: } |
| 9634 | 8, 5, // 14349: case 0x8: { |
| 9635 | OPC_Decode, 186, 7, 252, 2, // 14351: decode to CLFITAsmE using decoder 380 |
| 9636 | // 14351: } |
| 9637 | 10, 5, // 14356: case 0xa: { |
| 9638 | OPC_Decode, 188, 7, 252, 2, // 14358: decode to CLFITAsmHE using decoder 380 |
| 9639 | // 14358: } |
| 9640 | 12, 0, // 14363: case 0xc: { |
| 9641 | OPC_Decode, 190, 7, 252, 2, // 14365: decode to CLFITAsmLE using decoder 380 |
| 9642 | // 14365: } |
| 9643 | // 14365: } // switch Inst[15:12] |
| 9644 | // 14365: } else try { |
| 9645 | OPC_Decode, 185, 7, 253, 2, // 14370: decode to CLFITAsm using decoder 381 |
| 9646 | // 14370: } |
| 9647 | // 14370: } |
| 9648 | 118, 56, // 14375: case 0x76: { |
| 9649 | OPC_CheckField, 8, 4, 0, // 14377: check Inst[11:8] == 0x0 |
| 9650 | OPC_Scope, 45, // 14381: try { |
| 9651 | OPC_SwitchField, 12, 4, // 14383: switch Inst[15:12] { |
| 9652 | 2, 5, // 14386: case 0x2: { |
| 9653 | OPC_Decode, 190, 9, 254, 2, // 14388: decode to CRJAsmH using decoder 382 |
| 9654 | // 14388: } |
| 9655 | 4, 5, // 14393: case 0x4: { |
| 9656 | OPC_Decode, 192, 9, 254, 2, // 14395: decode to CRJAsmL using decoder 382 |
| 9657 | // 14395: } |
| 9658 | 6, 5, // 14400: case 0x6: { |
| 9659 | OPC_Decode, 194, 9, 254, 2, // 14402: decode to CRJAsmLH using decoder 382 |
| 9660 | // 14402: } |
| 9661 | 8, 5, // 14407: case 0x8: { |
| 9662 | OPC_Decode, 189, 9, 254, 2, // 14409: decode to CRJAsmE using decoder 382 |
| 9663 | // 14409: } |
| 9664 | 10, 5, // 14414: case 0xa: { |
| 9665 | OPC_Decode, 191, 9, 254, 2, // 14416: decode to CRJAsmHE using decoder 382 |
| 9666 | // 14416: } |
| 9667 | 12, 0, // 14421: case 0xc: { |
| 9668 | OPC_Decode, 193, 9, 254, 2, // 14423: decode to CRJAsmLE using decoder 382 |
| 9669 | // 14423: } |
| 9670 | // 14423: } // switch Inst[15:12] |
| 9671 | // 14423: } else try { |
| 9672 | OPC_Decode, 188, 9, 255, 2, // 14428: decode to CRJAsm using decoder 383 |
| 9673 | // 14428: } |
| 9674 | // 14428: } |
| 9675 | 119, 56, // 14433: case 0x77: { |
| 9676 | OPC_CheckField, 8, 4, 0, // 14435: check Inst[11:8] == 0x0 |
| 9677 | OPC_Scope, 45, // 14439: try { |
| 9678 | OPC_SwitchField, 12, 4, // 14441: switch Inst[15:12] { |
| 9679 | 2, 5, // 14444: case 0x2: { |
| 9680 | OPC_Decode, 241, 8, 254, 2, // 14446: decode to CLRJAsmH using decoder 382 |
| 9681 | // 14446: } |
| 9682 | 4, 5, // 14451: case 0x4: { |
| 9683 | OPC_Decode, 243, 8, 254, 2, // 14453: decode to CLRJAsmL using decoder 382 |
| 9684 | // 14453: } |
| 9685 | 6, 5, // 14458: case 0x6: { |
| 9686 | OPC_Decode, 245, 8, 254, 2, // 14460: decode to CLRJAsmLH using decoder 382 |
| 9687 | // 14460: } |
| 9688 | 8, 5, // 14465: case 0x8: { |
| 9689 | OPC_Decode, 240, 8, 254, 2, // 14467: decode to CLRJAsmE using decoder 382 |
| 9690 | // 14467: } |
| 9691 | 10, 5, // 14472: case 0xa: { |
| 9692 | OPC_Decode, 242, 8, 254, 2, // 14474: decode to CLRJAsmHE using decoder 382 |
| 9693 | // 14474: } |
| 9694 | 12, 0, // 14479: case 0xc: { |
| 9695 | OPC_Decode, 244, 8, 254, 2, // 14481: decode to CLRJAsmLE using decoder 382 |
| 9696 | // 14481: } |
| 9697 | // 14481: } // switch Inst[15:12] |
| 9698 | // 14481: } else try { |
| 9699 | OPC_Decode, 239, 8, 255, 2, // 14486: decode to CLRJAsm using decoder 383 |
| 9700 | // 14486: } |
| 9701 | // 14486: } |
| 9702 | 124, 52, // 14491: case 0x7c: { |
| 9703 | OPC_Scope, 45, // 14493: try { |
| 9704 | OPC_SwitchField, 32, 4, // 14495: switch Inst[35:32] { |
| 9705 | 2, 5, // 14498: case 0x2: { |
| 9706 | OPC_Decode, 175, 6, 128, 3, // 14500: decode to CGIJAsmH using decoder 384 |
| 9707 | // 14500: } |
| 9708 | 4, 5, // 14505: case 0x4: { |
| 9709 | OPC_Decode, 177, 6, 128, 3, // 14507: decode to CGIJAsmL using decoder 384 |
| 9710 | // 14507: } |
| 9711 | 6, 5, // 14512: case 0x6: { |
| 9712 | OPC_Decode, 179, 6, 128, 3, // 14514: decode to CGIJAsmLH using decoder 384 |
| 9713 | // 14514: } |
| 9714 | 8, 5, // 14519: case 0x8: { |
| 9715 | OPC_Decode, 174, 6, 128, 3, // 14521: decode to CGIJAsmE using decoder 384 |
| 9716 | // 14521: } |
| 9717 | 10, 5, // 14526: case 0xa: { |
| 9718 | OPC_Decode, 176, 6, 128, 3, // 14528: decode to CGIJAsmHE using decoder 384 |
| 9719 | // 14528: } |
| 9720 | 12, 0, // 14533: case 0xc: { |
| 9721 | OPC_Decode, 178, 6, 128, 3, // 14535: decode to CGIJAsmLE using decoder 384 |
| 9722 | // 14535: } |
| 9723 | // 14535: } // switch Inst[35:32] |
| 9724 | // 14535: } else try { |
| 9725 | OPC_Decode, 173, 6, 129, 3, // 14540: decode to CGIJAsm using decoder 385 |
| 9726 | // 14540: } |
| 9727 | // 14540: } |
| 9728 | 125, 52, // 14545: case 0x7d: { |
| 9729 | OPC_Scope, 45, // 14547: try { |
| 9730 | OPC_SwitchField, 32, 4, // 14549: switch Inst[35:32] { |
| 9731 | 2, 5, // 14552: case 0x2: { |
| 9732 | OPC_Decode, 227, 7, 130, 3, // 14554: decode to CLGIJAsmH using decoder 386 |
| 9733 | // 14554: } |
| 9734 | 4, 5, // 14559: case 0x4: { |
| 9735 | OPC_Decode, 229, 7, 130, 3, // 14561: decode to CLGIJAsmL using decoder 386 |
| 9736 | // 14561: } |
| 9737 | 6, 5, // 14566: case 0x6: { |
| 9738 | OPC_Decode, 231, 7, 130, 3, // 14568: decode to CLGIJAsmLH using decoder 386 |
| 9739 | // 14568: } |
| 9740 | 8, 5, // 14573: case 0x8: { |
| 9741 | OPC_Decode, 226, 7, 130, 3, // 14575: decode to CLGIJAsmE using decoder 386 |
| 9742 | // 14575: } |
| 9743 | 10, 5, // 14580: case 0xa: { |
| 9744 | OPC_Decode, 228, 7, 130, 3, // 14582: decode to CLGIJAsmHE using decoder 386 |
| 9745 | // 14582: } |
| 9746 | 12, 0, // 14587: case 0xc: { |
| 9747 | OPC_Decode, 230, 7, 130, 3, // 14589: decode to CLGIJAsmLE using decoder 386 |
| 9748 | // 14589: } |
| 9749 | // 14589: } // switch Inst[35:32] |
| 9750 | // 14589: } else try { |
| 9751 | OPC_Decode, 225, 7, 131, 3, // 14594: decode to CLGIJAsm using decoder 387 |
| 9752 | // 14594: } |
| 9753 | // 14594: } |
| 9754 | 126, 52, // 14599: case 0x7e: { |
| 9755 | OPC_Scope, 45, // 14601: try { |
| 9756 | OPC_SwitchField, 32, 4, // 14603: switch Inst[35:32] { |
| 9757 | 2, 5, // 14606: case 0x2: { |
| 9758 | OPC_Decode, 148, 7, 132, 3, // 14608: decode to CIJAsmH using decoder 388 |
| 9759 | // 14608: } |
| 9760 | 4, 5, // 14613: case 0x4: { |
| 9761 | OPC_Decode, 150, 7, 132, 3, // 14615: decode to CIJAsmL using decoder 388 |
| 9762 | // 14615: } |
| 9763 | 6, 5, // 14620: case 0x6: { |
| 9764 | OPC_Decode, 152, 7, 132, 3, // 14622: decode to CIJAsmLH using decoder 388 |
| 9765 | // 14622: } |
| 9766 | 8, 5, // 14627: case 0x8: { |
| 9767 | OPC_Decode, 147, 7, 132, 3, // 14629: decode to CIJAsmE using decoder 388 |
| 9768 | // 14629: } |
| 9769 | 10, 5, // 14634: case 0xa: { |
| 9770 | OPC_Decode, 149, 7, 132, 3, // 14636: decode to CIJAsmHE using decoder 388 |
| 9771 | // 14636: } |
| 9772 | 12, 0, // 14641: case 0xc: { |
| 9773 | OPC_Decode, 151, 7, 132, 3, // 14643: decode to CIJAsmLE using decoder 388 |
| 9774 | // 14643: } |
| 9775 | // 14643: } // switch Inst[35:32] |
| 9776 | // 14643: } else try { |
| 9777 | OPC_Decode, 146, 7, 133, 3, // 14648: decode to CIJAsm using decoder 389 |
| 9778 | // 14648: } |
| 9779 | // 14648: } |
| 9780 | 127, 52, // 14653: case 0x7f: { |
| 9781 | OPC_Scope, 45, // 14655: try { |
| 9782 | OPC_SwitchField, 32, 4, // 14657: switch Inst[35:32] { |
| 9783 | 2, 5, // 14660: case 0x2: { |
| 9784 | OPC_Decode, 208, 8, 134, 3, // 14662: decode to CLIJAsmH using decoder 390 |
| 9785 | // 14662: } |
| 9786 | 4, 5, // 14667: case 0x4: { |
| 9787 | OPC_Decode, 210, 8, 134, 3, // 14669: decode to CLIJAsmL using decoder 390 |
| 9788 | // 14669: } |
| 9789 | 6, 5, // 14674: case 0x6: { |
| 9790 | OPC_Decode, 212, 8, 134, 3, // 14676: decode to CLIJAsmLH using decoder 390 |
| 9791 | // 14676: } |
| 9792 | 8, 5, // 14681: case 0x8: { |
| 9793 | OPC_Decode, 207, 8, 134, 3, // 14683: decode to CLIJAsmE using decoder 390 |
| 9794 | // 14683: } |
| 9795 | 10, 5, // 14688: case 0xa: { |
| 9796 | OPC_Decode, 209, 8, 134, 3, // 14690: decode to CLIJAsmHE using decoder 390 |
| 9797 | // 14690: } |
| 9798 | 12, 0, // 14695: case 0xc: { |
| 9799 | OPC_Decode, 211, 8, 134, 3, // 14697: decode to CLIJAsmLE using decoder 390 |
| 9800 | // 14697: } |
| 9801 | // 14697: } // switch Inst[35:32] |
| 9802 | // 14697: } else try { |
| 9803 | OPC_Decode, 206, 8, 135, 3, // 14702: decode to CLIJAsm using decoder 391 |
| 9804 | // 14702: } |
| 9805 | // 14702: } |
| 9806 | 216, 1, 11, // 14707: case 0xd8: { |
| 9807 | OPC_CheckPredicate, 26, // 14710: check predicate 26 |
| 9808 | OPC_CheckField, 8, 8, 0, // 14712: check Inst[15:8] == 0x0 |
| 9809 | OPC_Decode, 199, 4, 136, 3, // 14716: decode to AHIK using decoder 392 |
| 9810 | // 14716: } |
| 9811 | 217, 1, 11, // 14721: case 0xd9: { |
| 9812 | OPC_CheckPredicate, 26, // 14724: check predicate 26 |
| 9813 | OPC_CheckField, 8, 8, 0, // 14726: check Inst[15:8] == 0x0 |
| 9814 | OPC_Decode, 191, 4, 137, 3, // 14730: decode to AGHIK using decoder 393 |
| 9815 | // 14730: } |
| 9816 | 218, 1, 11, // 14735: case 0xda: { |
| 9817 | OPC_CheckPredicate, 26, // 14738: check predicate 26 |
| 9818 | OPC_CheckField, 8, 8, 0, // 14740: check Inst[15:8] == 0x0 |
| 9819 | OPC_Decode, 218, 4, 136, 3, // 14744: decode to ALHSIK using decoder 392 |
| 9820 | // 14744: } |
| 9821 | 219, 1, 11, // 14749: case 0xdb: { |
| 9822 | OPC_CheckPredicate, 26, // 14752: check predicate 26 |
| 9823 | OPC_CheckField, 8, 8, 0, // 14754: check Inst[15:8] == 0x0 |
| 9824 | OPC_Decode, 212, 4, 137, 3, // 14758: decode to ALGHSIK using decoder 393 |
| 9825 | // 14758: } |
| 9826 | 228, 1, 56, // 14763: case 0xe4: { |
| 9827 | OPC_CheckField, 8, 4, 0, // 14766: check Inst[11:8] == 0x0 |
| 9828 | OPC_Scope, 45, // 14770: try { |
| 9829 | OPC_SwitchField, 12, 4, // 14772: switch Inst[15:12] { |
| 9830 | 2, 5, // 14775: case 0x2: { |
| 9831 | OPC_Decode, 204, 6, 138, 3, // 14777: decode to CGRBAsmH using decoder 394 |
| 9832 | // 14777: } |
| 9833 | 4, 5, // 14782: case 0x4: { |
| 9834 | OPC_Decode, 206, 6, 138, 3, // 14784: decode to CGRBAsmL using decoder 394 |
| 9835 | // 14784: } |
| 9836 | 6, 5, // 14789: case 0x6: { |
| 9837 | OPC_Decode, 208, 6, 138, 3, // 14791: decode to CGRBAsmLH using decoder 394 |
| 9838 | // 14791: } |
| 9839 | 8, 5, // 14796: case 0x8: { |
| 9840 | OPC_Decode, 203, 6, 138, 3, // 14798: decode to CGRBAsmE using decoder 394 |
| 9841 | // 14798: } |
| 9842 | 10, 5, // 14803: case 0xa: { |
| 9843 | OPC_Decode, 205, 6, 138, 3, // 14805: decode to CGRBAsmHE using decoder 394 |
| 9844 | // 14805: } |
| 9845 | 12, 0, // 14810: case 0xc: { |
| 9846 | OPC_Decode, 207, 6, 138, 3, // 14812: decode to CGRBAsmLE using decoder 394 |
| 9847 | // 14812: } |
| 9848 | // 14812: } // switch Inst[15:12] |
| 9849 | // 14812: } else try { |
| 9850 | OPC_Decode, 202, 6, 139, 3, // 14817: decode to CGRBAsm using decoder 395 |
| 9851 | // 14817: } |
| 9852 | // 14817: } |
| 9853 | 229, 1, 56, // 14822: case 0xe5: { |
| 9854 | OPC_CheckField, 8, 4, 0, // 14825: check Inst[11:8] == 0x0 |
| 9855 | OPC_Scope, 45, // 14829: try { |
| 9856 | OPC_SwitchField, 12, 4, // 14831: switch Inst[15:12] { |
| 9857 | 2, 5, // 14834: case 0x2: { |
| 9858 | OPC_Decode, 128, 8, 138, 3, // 14836: decode to CLGRBAsmH using decoder 394 |
| 9859 | // 14836: } |
| 9860 | 4, 5, // 14841: case 0x4: { |
| 9861 | OPC_Decode, 130, 8, 138, 3, // 14843: decode to CLGRBAsmL using decoder 394 |
| 9862 | // 14843: } |
| 9863 | 6, 5, // 14848: case 0x6: { |
| 9864 | OPC_Decode, 132, 8, 138, 3, // 14850: decode to CLGRBAsmLH using decoder 394 |
| 9865 | // 14850: } |
| 9866 | 8, 5, // 14855: case 0x8: { |
| 9867 | OPC_Decode, 255, 7, 138, 3, // 14857: decode to CLGRBAsmE using decoder 394 |
| 9868 | // 14857: } |
| 9869 | 10, 5, // 14862: case 0xa: { |
| 9870 | OPC_Decode, 129, 8, 138, 3, // 14864: decode to CLGRBAsmHE using decoder 394 |
| 9871 | // 14864: } |
| 9872 | 12, 0, // 14869: case 0xc: { |
| 9873 | OPC_Decode, 131, 8, 138, 3, // 14871: decode to CLGRBAsmLE using decoder 394 |
| 9874 | // 14871: } |
| 9875 | // 14871: } // switch Inst[15:12] |
| 9876 | // 14871: } else try { |
| 9877 | OPC_Decode, 254, 7, 139, 3, // 14876: decode to CLGRBAsm using decoder 395 |
| 9878 | // 14876: } |
| 9879 | // 14876: } |
| 9880 | 246, 1, 56, // 14881: case 0xf6: { |
| 9881 | OPC_CheckField, 8, 4, 0, // 14884: check Inst[11:8] == 0x0 |
| 9882 | OPC_Scope, 45, // 14888: try { |
| 9883 | OPC_SwitchField, 12, 4, // 14890: switch Inst[15:12] { |
| 9884 | 2, 5, // 14893: case 0x2: { |
| 9885 | OPC_Decode, 174, 9, 140, 3, // 14895: decode to CRBAsmH using decoder 396 |
| 9886 | // 14895: } |
| 9887 | 4, 5, // 14900: case 0x4: { |
| 9888 | OPC_Decode, 176, 9, 140, 3, // 14902: decode to CRBAsmL using decoder 396 |
| 9889 | // 14902: } |
| 9890 | 6, 5, // 14907: case 0x6: { |
| 9891 | OPC_Decode, 178, 9, 140, 3, // 14909: decode to CRBAsmLH using decoder 396 |
| 9892 | // 14909: } |
| 9893 | 8, 5, // 14914: case 0x8: { |
| 9894 | OPC_Decode, 173, 9, 140, 3, // 14916: decode to CRBAsmE using decoder 396 |
| 9895 | // 14916: } |
| 9896 | 10, 5, // 14921: case 0xa: { |
| 9897 | OPC_Decode, 175, 9, 140, 3, // 14923: decode to CRBAsmHE using decoder 396 |
| 9898 | // 14923: } |
| 9899 | 12, 0, // 14928: case 0xc: { |
| 9900 | OPC_Decode, 177, 9, 140, 3, // 14930: decode to CRBAsmLE using decoder 396 |
| 9901 | // 14930: } |
| 9902 | // 14930: } // switch Inst[15:12] |
| 9903 | // 14930: } else try { |
| 9904 | OPC_Decode, 172, 9, 141, 3, // 14935: decode to CRBAsm using decoder 397 |
| 9905 | // 14935: } |
| 9906 | // 14935: } |
| 9907 | 247, 1, 56, // 14940: case 0xf7: { |
| 9908 | OPC_CheckField, 8, 4, 0, // 14943: check Inst[11:8] == 0x0 |
| 9909 | OPC_Scope, 45, // 14947: try { |
| 9910 | OPC_SwitchField, 12, 4, // 14949: switch Inst[15:12] { |
| 9911 | 2, 5, // 14952: case 0x2: { |
| 9912 | OPC_Decode, 227, 8, 140, 3, // 14954: decode to CLRBAsmH using decoder 396 |
| 9913 | // 14954: } |
| 9914 | 4, 5, // 14959: case 0x4: { |
| 9915 | OPC_Decode, 229, 8, 140, 3, // 14961: decode to CLRBAsmL using decoder 396 |
| 9916 | // 14961: } |
| 9917 | 6, 5, // 14966: case 0x6: { |
| 9918 | OPC_Decode, 231, 8, 140, 3, // 14968: decode to CLRBAsmLH using decoder 396 |
| 9919 | // 14968: } |
| 9920 | 8, 5, // 14973: case 0x8: { |
| 9921 | OPC_Decode, 226, 8, 140, 3, // 14975: decode to CLRBAsmE using decoder 396 |
| 9922 | // 14975: } |
| 9923 | 10, 5, // 14980: case 0xa: { |
| 9924 | OPC_Decode, 228, 8, 140, 3, // 14982: decode to CLRBAsmHE using decoder 396 |
| 9925 | // 14982: } |
| 9926 | 12, 0, // 14987: case 0xc: { |
| 9927 | OPC_Decode, 230, 8, 140, 3, // 14989: decode to CLRBAsmLE using decoder 396 |
| 9928 | // 14989: } |
| 9929 | // 14989: } // switch Inst[15:12] |
| 9930 | // 14989: } else try { |
| 9931 | OPC_Decode, 225, 8, 141, 3, // 14994: decode to CLRBAsm using decoder 397 |
| 9932 | // 14994: } |
| 9933 | // 14994: } |
| 9934 | 252, 1, 52, // 14999: case 0xfc: { |
| 9935 | OPC_Scope, 45, // 15002: try { |
| 9936 | OPC_SwitchField, 32, 4, // 15004: switch Inst[35:32] { |
| 9937 | 2, 5, // 15007: case 0x2: { |
| 9938 | OPC_Decode, 161, 6, 142, 3, // 15009: decode to CGIBAsmH using decoder 398 |
| 9939 | // 15009: } |
| 9940 | 4, 5, // 15014: case 0x4: { |
| 9941 | OPC_Decode, 163, 6, 142, 3, // 15016: decode to CGIBAsmL using decoder 398 |
| 9942 | // 15016: } |
| 9943 | 6, 5, // 15021: case 0x6: { |
| 9944 | OPC_Decode, 165, 6, 142, 3, // 15023: decode to CGIBAsmLH using decoder 398 |
| 9945 | // 15023: } |
| 9946 | 8, 5, // 15028: case 0x8: { |
| 9947 | OPC_Decode, 160, 6, 142, 3, // 15030: decode to CGIBAsmE using decoder 398 |
| 9948 | // 15030: } |
| 9949 | 10, 5, // 15035: case 0xa: { |
| 9950 | OPC_Decode, 162, 6, 142, 3, // 15037: decode to CGIBAsmHE using decoder 398 |
| 9951 | // 15037: } |
| 9952 | 12, 0, // 15042: case 0xc: { |
| 9953 | OPC_Decode, 164, 6, 142, 3, // 15044: decode to CGIBAsmLE using decoder 398 |
| 9954 | // 15044: } |
| 9955 | // 15044: } // switch Inst[35:32] |
| 9956 | // 15044: } else try { |
| 9957 | OPC_Decode, 159, 6, 143, 3, // 15049: decode to CGIBAsm using decoder 399 |
| 9958 | // 15049: } |
| 9959 | // 15049: } |
| 9960 | 253, 1, 52, // 15054: case 0xfd: { |
| 9961 | OPC_Scope, 45, // 15057: try { |
| 9962 | OPC_SwitchField, 32, 4, // 15059: switch Inst[35:32] { |
| 9963 | 2, 5, // 15062: case 0x2: { |
| 9964 | OPC_Decode, 213, 7, 144, 3, // 15064: decode to CLGIBAsmH using decoder 400 |
| 9965 | // 15064: } |
| 9966 | 4, 5, // 15069: case 0x4: { |
| 9967 | OPC_Decode, 215, 7, 144, 3, // 15071: decode to CLGIBAsmL using decoder 400 |
| 9968 | // 15071: } |
| 9969 | 6, 5, // 15076: case 0x6: { |
| 9970 | OPC_Decode, 217, 7, 144, 3, // 15078: decode to CLGIBAsmLH using decoder 400 |
| 9971 | // 15078: } |
| 9972 | 8, 5, // 15083: case 0x8: { |
| 9973 | OPC_Decode, 212, 7, 144, 3, // 15085: decode to CLGIBAsmE using decoder 400 |
| 9974 | // 15085: } |
| 9975 | 10, 5, // 15090: case 0xa: { |
| 9976 | OPC_Decode, 214, 7, 144, 3, // 15092: decode to CLGIBAsmHE using decoder 400 |
| 9977 | // 15092: } |
| 9978 | 12, 0, // 15097: case 0xc: { |
| 9979 | OPC_Decode, 216, 7, 144, 3, // 15099: decode to CLGIBAsmLE using decoder 400 |
| 9980 | // 15099: } |
| 9981 | // 15099: } // switch Inst[35:32] |
| 9982 | // 15099: } else try { |
| 9983 | OPC_Decode, 211, 7, 145, 3, // 15104: decode to CLGIBAsm using decoder 401 |
| 9984 | // 15104: } |
| 9985 | // 15104: } |
| 9986 | 254, 1, 52, // 15109: case 0xfe: { |
| 9987 | OPC_Scope, 45, // 15112: try { |
| 9988 | OPC_SwitchField, 32, 4, // 15114: switch Inst[35:32] { |
| 9989 | 2, 5, // 15117: case 0x2: { |
| 9990 | OPC_Decode, 133, 7, 146, 3, // 15119: decode to CIBAsmH using decoder 402 |
| 9991 | // 15119: } |
| 9992 | 4, 5, // 15124: case 0x4: { |
| 9993 | OPC_Decode, 135, 7, 146, 3, // 15126: decode to CIBAsmL using decoder 402 |
| 9994 | // 15126: } |
| 9995 | 6, 5, // 15131: case 0x6: { |
| 9996 | OPC_Decode, 137, 7, 146, 3, // 15133: decode to CIBAsmLH using decoder 402 |
| 9997 | // 15133: } |
| 9998 | 8, 5, // 15138: case 0x8: { |
| 9999 | OPC_Decode, 132, 7, 146, 3, // 15140: decode to CIBAsmE using decoder 402 |
| 10000 | // 15140: } |
| 10001 | 10, 5, // 15145: case 0xa: { |
| 10002 | OPC_Decode, 134, 7, 146, 3, // 15147: decode to CIBAsmHE using decoder 402 |
| 10003 | // 15147: } |
| 10004 | 12, 0, // 15152: case 0xc: { |
| 10005 | OPC_Decode, 136, 7, 146, 3, // 15154: decode to CIBAsmLE using decoder 402 |
| 10006 | // 15154: } |
| 10007 | // 15154: } // switch Inst[35:32] |
| 10008 | // 15154: } else try { |
| 10009 | OPC_Decode, 131, 7, 147, 3, // 15159: decode to CIBAsm using decoder 403 |
| 10010 | // 15159: } |
| 10011 | // 15159: } |
| 10012 | 255, 1, 0, // 15164: case 0xff: { |
| 10013 | OPC_Scope, 45, // 15167: try { |
| 10014 | OPC_SwitchField, 32, 4, // 15169: switch Inst[35:32] { |
| 10015 | 2, 5, // 15172: case 0x2: { |
| 10016 | OPC_Decode, 193, 8, 148, 3, // 15174: decode to CLIBAsmH using decoder 404 |
| 10017 | // 15174: } |
| 10018 | 4, 5, // 15179: case 0x4: { |
| 10019 | OPC_Decode, 195, 8, 148, 3, // 15181: decode to CLIBAsmL using decoder 404 |
| 10020 | // 15181: } |
| 10021 | 6, 5, // 15186: case 0x6: { |
| 10022 | OPC_Decode, 197, 8, 148, 3, // 15188: decode to CLIBAsmLH using decoder 404 |
| 10023 | // 15188: } |
| 10024 | 8, 5, // 15193: case 0x8: { |
| 10025 | OPC_Decode, 192, 8, 148, 3, // 15195: decode to CLIBAsmE using decoder 404 |
| 10026 | // 15195: } |
| 10027 | 10, 5, // 15200: case 0xa: { |
| 10028 | OPC_Decode, 194, 8, 148, 3, // 15202: decode to CLIBAsmHE using decoder 404 |
| 10029 | // 15202: } |
| 10030 | 12, 0, // 15207: case 0xc: { |
| 10031 | OPC_Decode, 196, 8, 148, 3, // 15209: decode to CLIBAsmLE using decoder 404 |
| 10032 | // 15209: } |
| 10033 | // 15209: } // switch Inst[35:32] |
| 10034 | // 15209: } else try { |
| 10035 | OPC_Decode, 191, 8, 149, 3, // 15214: decode to CLIBAsm using decoder 405 |
| 10036 | // 15214: } |
| 10037 | // 15214: } |
| 10038 | // 15214: } // switch Inst[7:0] |
| 10039 | // 15214: } |
| 10040 | 237, 1, 171, 5, // 15219: case 0xed: { |
| 10041 | OPC_SwitchField, 0, 8, // 15223: switch Inst[7:0] { |
| 10042 | 4, 9, // 15226: case 0x4: { |
| 10043 | OPC_CheckField, 8, 8, 0, // 15228: check Inst[15:8] == 0x0 |
| 10044 | OPC_Decode, 248, 11, 150, 3, // 15232: decode to LDEB using decoder 406 |
| 10045 | // 15232: } |
| 10046 | 5, 9, // 15237: case 0x5: { |
| 10047 | OPC_CheckField, 8, 8, 0, // 15239: check Inst[15:8] == 0x0 |
| 10048 | OPC_Decode, 220, 14, 151, 3, // 15243: decode to LXDB using decoder 407 |
| 10049 | // 15243: } |
| 10050 | 6, 9, // 15248: case 0x6: { |
| 10051 | OPC_CheckField, 8, 8, 0, // 15250: check Inst[15:8] == 0x0 |
| 10052 | OPC_Decode, 225, 14, 151, 3, // 15254: decode to LXEB using decoder 407 |
| 10053 | // 15254: } |
| 10054 | 7, 9, // 15259: case 0x7: { |
| 10055 | OPC_CheckField, 8, 8, 0, // 15261: check Inst[15:8] == 0x0 |
| 10056 | OPC_Decode, 201, 15, 152, 3, // 15265: decode to MXDB using decoder 408 |
| 10057 | // 15265: } |
| 10058 | 8, 9, // 15270: case 0x8: { |
| 10059 | OPC_CheckField, 8, 8, 0, // 15272: check Inst[15:8] == 0x0 |
| 10060 | OPC_Decode, 190, 11, 153, 3, // 15276: decode to KEB using decoder 409 |
| 10061 | // 15276: } |
| 10062 | 9, 9, // 15281: case 0x9: { |
| 10063 | OPC_CheckField, 8, 8, 0, // 15283: check Inst[15:8] == 0x0 |
| 10064 | OPC_Decode, 243, 5, 153, 3, // 15287: decode to CEB using decoder 409 |
| 10065 | // 15287: } |
| 10066 | 10, 9, // 15292: case 0xa: { |
| 10067 | OPC_CheckField, 8, 8, 0, // 15294: check Inst[15:8] == 0x0 |
| 10068 | OPC_Decode, 181, 4, 154, 3, // 15298: decode to AEB using decoder 410 |
| 10069 | // 15298: } |
| 10070 | 11, 9, // 15303: case 0xb: { |
| 10071 | OPC_CheckField, 8, 8, 0, // 15305: check Inst[15:8] == 0x0 |
| 10072 | OPC_Decode, 218, 16, 154, 3, // 15309: decode to SEB using decoder 410 |
| 10073 | // 15309: } |
| 10074 | 12, 9, // 15314: case 0xc: { |
| 10075 | OPC_CheckField, 8, 8, 0, // 15316: check Inst[15:8] == 0x0 |
| 10076 | OPC_Decode, 128, 15, 155, 3, // 15320: decode to MDEB using decoder 411 |
| 10077 | // 15320: } |
| 10078 | 13, 9, // 15325: case 0xd: { |
| 10079 | OPC_CheckField, 8, 8, 0, // 15327: check Inst[15:8] == 0x0 |
| 10080 | OPC_Decode, 152, 10, 154, 3, // 15331: decode to DEB using decoder 410 |
| 10081 | // 15331: } |
| 10082 | 14, 9, // 15336: case 0xe: { |
| 10083 | OPC_CheckField, 8, 4, 0, // 15338: check Inst[11:8] == 0x0 |
| 10084 | OPC_Decode, 242, 14, 156, 3, // 15342: decode to MAEB using decoder 412 |
| 10085 | // 15342: } |
| 10086 | 15, 9, // 15347: case 0xf: { |
| 10087 | OPC_CheckField, 8, 4, 0, // 15349: check Inst[11:8] == 0x0 |
| 10088 | OPC_Decode, 162, 15, 156, 3, // 15353: decode to MSEB using decoder 412 |
| 10089 | // 15353: } |
| 10090 | 16, 9, // 15358: case 0x10: { |
| 10091 | OPC_CheckField, 8, 8, 0, // 15360: check Inst[15:8] == 0x0 |
| 10092 | OPC_Decode, 255, 18, 153, 3, // 15364: decode to TCEB using decoder 409 |
| 10093 | // 15364: } |
| 10094 | 17, 9, // 15369: case 0x11: { |
| 10095 | OPC_CheckField, 8, 8, 0, // 15371: check Inst[15:8] == 0x0 |
| 10096 | OPC_Decode, 254, 18, 150, 3, // 15375: decode to TCDB using decoder 406 |
| 10097 | // 15375: } |
| 10098 | 18, 9, // 15380: case 0x12: { |
| 10099 | OPC_CheckField, 8, 8, 0, // 15382: check Inst[15:8] == 0x0 |
| 10100 | OPC_Decode, 128, 19, 151, 3, // 15386: decode to TCXB using decoder 407 |
| 10101 | // 15386: } |
| 10102 | 20, 9, // 15391: case 0x14: { |
| 10103 | OPC_CheckField, 8, 8, 0, // 15393: check Inst[15:8] == 0x0 |
| 10104 | OPC_Decode, 213, 17, 153, 3, // 15397: decode to SQEB using decoder 409 |
| 10105 | // 15397: } |
| 10106 | 21, 9, // 15402: case 0x15: { |
| 10107 | OPC_CheckField, 8, 8, 0, // 15404: check Inst[15:8] == 0x0 |
| 10108 | OPC_Decode, 209, 17, 150, 3, // 15408: decode to SQDB using decoder 406 |
| 10109 | // 15408: } |
| 10110 | 23, 9, // 15413: case 0x17: { |
| 10111 | OPC_CheckField, 8, 8, 0, // 15415: check Inst[15:8] == 0x0 |
| 10112 | OPC_Decode, 136, 15, 154, 3, // 15419: decode to MEEB using decoder 410 |
| 10113 | // 15419: } |
| 10114 | 24, 9, // 15424: case 0x18: { |
| 10115 | OPC_CheckField, 8, 8, 0, // 15426: check Inst[15:8] == 0x0 |
| 10116 | OPC_Decode, 186, 11, 150, 3, // 15430: decode to KDB using decoder 406 |
| 10117 | // 15430: } |
| 10118 | 25, 9, // 15435: case 0x19: { |
| 10119 | OPC_CheckField, 8, 8, 0, // 15437: check Inst[15:8] == 0x0 |
| 10120 | OPC_Decode, 218, 5, 150, 3, // 15441: decode to CDB using decoder 406 |
| 10121 | // 15441: } |
| 10122 | 26, 9, // 15446: case 0x1a: { |
| 10123 | OPC_CheckField, 8, 8, 0, // 15448: check Inst[15:8] == 0x0 |
| 10124 | OPC_Decode, 175, 4, 155, 3, // 15452: decode to ADB using decoder 411 |
| 10125 | // 15452: } |
| 10126 | 27, 9, // 15457: case 0x1b: { |
| 10127 | OPC_CheckField, 8, 8, 0, // 15459: check Inst[15:8] == 0x0 |
| 10128 | OPC_Decode, 212, 16, 155, 3, // 15463: decode to SDB using decoder 411 |
| 10129 | // 15463: } |
| 10130 | 28, 9, // 15468: case 0x1c: { |
| 10131 | OPC_CheckField, 8, 8, 0, // 15470: check Inst[15:8] == 0x0 |
| 10132 | OPC_Decode, 253, 14, 155, 3, // 15474: decode to MDB using decoder 411 |
| 10133 | // 15474: } |
| 10134 | 29, 9, // 15479: case 0x1d: { |
| 10135 | OPC_CheckField, 8, 8, 0, // 15481: check Inst[15:8] == 0x0 |
| 10136 | OPC_Decode, 146, 10, 155, 3, // 15485: decode to DDB using decoder 411 |
| 10137 | // 15485: } |
| 10138 | 30, 9, // 15490: case 0x1e: { |
| 10139 | OPC_CheckField, 8, 4, 0, // 15492: check Inst[11:8] == 0x0 |
| 10140 | OPC_Decode, 238, 14, 157, 3, // 15496: decode to MADB using decoder 413 |
| 10141 | // 15496: } |
| 10142 | 31, 9, // 15501: case 0x1f: { |
| 10143 | OPC_CheckField, 8, 4, 0, // 15503: check Inst[11:8] == 0x0 |
| 10144 | OPC_Decode, 158, 15, 157, 3, // 15507: decode to MSDB using decoder 413 |
| 10145 | // 15507: } |
| 10146 | 36, 9, // 15512: case 0x24: { |
| 10147 | OPC_CheckField, 8, 8, 0, // 15514: check Inst[15:8] == 0x0 |
| 10148 | OPC_Decode, 246, 11, 150, 3, // 15518: decode to LDE using decoder 406 |
| 10149 | // 15518: } |
| 10150 | 37, 9, // 15523: case 0x25: { |
| 10151 | OPC_CheckField, 8, 8, 0, // 15525: check Inst[15:8] == 0x0 |
| 10152 | OPC_Decode, 219, 14, 151, 3, // 15529: decode to LXD using decoder 407 |
| 10153 | // 15529: } |
| 10154 | 38, 9, // 15534: case 0x26: { |
| 10155 | OPC_CheckField, 8, 8, 0, // 15536: check Inst[15:8] == 0x0 |
| 10156 | OPC_Decode, 224, 14, 151, 3, // 15540: decode to LXE using decoder 407 |
| 10157 | // 15540: } |
| 10158 | 46, 9, // 15545: case 0x2e: { |
| 10159 | OPC_CheckField, 8, 4, 0, // 15547: check Inst[11:8] == 0x0 |
| 10160 | OPC_Decode, 241, 14, 156, 3, // 15551: decode to MAE using decoder 412 |
| 10161 | // 15551: } |
| 10162 | 47, 9, // 15556: case 0x2f: { |
| 10163 | OPC_CheckField, 8, 4, 0, // 15558: check Inst[11:8] == 0x0 |
| 10164 | OPC_Decode, 161, 15, 156, 3, // 15562: decode to MSE using decoder 412 |
| 10165 | // 15562: } |
| 10166 | 52, 9, // 15567: case 0x34: { |
| 10167 | OPC_CheckField, 8, 8, 0, // 15569: check Inst[15:8] == 0x0 |
| 10168 | OPC_Decode, 212, 17, 153, 3, // 15573: decode to SQE using decoder 409 |
| 10169 | // 15573: } |
| 10170 | 53, 9, // 15578: case 0x35: { |
| 10171 | OPC_CheckField, 8, 8, 0, // 15580: check Inst[15:8] == 0x0 |
| 10172 | OPC_Decode, 208, 17, 150, 3, // 15584: decode to SQD using decoder 406 |
| 10173 | // 15584: } |
| 10174 | 55, 9, // 15589: case 0x37: { |
| 10175 | OPC_CheckField, 8, 8, 0, // 15591: check Inst[15:8] == 0x0 |
| 10176 | OPC_Decode, 135, 15, 154, 3, // 15595: decode to MEE using decoder 410 |
| 10177 | // 15595: } |
| 10178 | 56, 9, // 15600: case 0x38: { |
| 10179 | OPC_CheckField, 8, 4, 0, // 15602: check Inst[11:8] == 0x0 |
| 10180 | OPC_Decode, 248, 14, 157, 3, // 15606: decode to MAYL using decoder 413 |
| 10181 | // 15606: } |
| 10182 | 57, 9, // 15611: case 0x39: { |
| 10183 | OPC_CheckField, 8, 4, 0, // 15613: check Inst[11:8] == 0x0 |
| 10184 | OPC_Decode, 210, 15, 158, 3, // 15617: decode to MYL using decoder 414 |
| 10185 | // 15617: } |
| 10186 | 58, 9, // 15622: case 0x3a: { |
| 10187 | OPC_CheckField, 8, 4, 0, // 15624: check Inst[11:8] == 0x0 |
| 10188 | OPC_Decode, 245, 14, 157, 3, // 15628: decode to MAY using decoder 413 |
| 10189 | // 15628: } |
| 10190 | 59, 9, // 15633: case 0x3b: { |
| 10191 | OPC_CheckField, 8, 4, 0, // 15635: check Inst[11:8] == 0x0 |
| 10192 | OPC_Decode, 207, 15, 159, 3, // 15639: decode to MY using decoder 415 |
| 10193 | // 15639: } |
| 10194 | 60, 9, // 15644: case 0x3c: { |
| 10195 | OPC_CheckField, 8, 4, 0, // 15646: check Inst[11:8] == 0x0 |
| 10196 | OPC_Decode, 246, 14, 157, 3, // 15650: decode to MAYH using decoder 413 |
| 10197 | // 15650: } |
| 10198 | 61, 9, // 15655: case 0x3d: { |
| 10199 | OPC_CheckField, 8, 4, 0, // 15657: check Inst[11:8] == 0x0 |
| 10200 | OPC_Decode, 208, 15, 158, 3, // 15661: decode to MYH using decoder 414 |
| 10201 | // 15661: } |
| 10202 | 62, 9, // 15666: case 0x3e: { |
| 10203 | OPC_CheckField, 8, 4, 0, // 15668: check Inst[11:8] == 0x0 |
| 10204 | OPC_Decode, 237, 14, 157, 3, // 15672: decode to MAD using decoder 413 |
| 10205 | // 15672: } |
| 10206 | 63, 9, // 15677: case 0x3f: { |
| 10207 | OPC_CheckField, 8, 4, 0, // 15679: check Inst[11:8] == 0x0 |
| 10208 | OPC_Decode, 157, 15, 157, 3, // 15683: decode to MSD using decoder 413 |
| 10209 | // 15683: } |
| 10210 | 64, 9, // 15688: case 0x40: { |
| 10211 | OPC_CheckField, 8, 4, 0, // 15690: check Inst[11:8] == 0x0 |
| 10212 | OPC_Decode, 184, 17, 158, 3, // 15694: decode to SLDT using decoder 414 |
| 10213 | // 15694: } |
| 10214 | 65, 9, // 15699: case 0x41: { |
| 10215 | OPC_CheckField, 8, 4, 0, // 15701: check Inst[11:8] == 0x0 |
| 10216 | OPC_Decode, 224, 17, 158, 3, // 15705: decode to SRDT using decoder 414 |
| 10217 | // 15705: } |
| 10218 | 72, 9, // 15710: case 0x48: { |
| 10219 | OPC_CheckField, 8, 4, 0, // 15712: check Inst[11:8] == 0x0 |
| 10220 | OPC_Decode, 199, 17, 160, 3, // 15716: decode to SLXT using decoder 416 |
| 10221 | // 15716: } |
| 10222 | 73, 9, // 15721: case 0x49: { |
| 10223 | OPC_CheckField, 8, 4, 0, // 15723: check Inst[11:8] == 0x0 |
| 10224 | OPC_Decode, 235, 17, 160, 3, // 15727: decode to SRXT using decoder 416 |
| 10225 | // 15727: } |
| 10226 | 80, 9, // 15732: case 0x50: { |
| 10227 | OPC_CheckField, 8, 8, 0, // 15734: check Inst[15:8] == 0x0 |
| 10228 | OPC_Decode, 130, 19, 153, 3, // 15738: decode to TDCET using decoder 409 |
| 10229 | // 15738: } |
| 10230 | 81, 9, // 15743: case 0x51: { |
| 10231 | OPC_CheckField, 8, 8, 0, // 15745: check Inst[15:8] == 0x0 |
| 10232 | OPC_Decode, 133, 19, 153, 3, // 15749: decode to TDGET using decoder 409 |
| 10233 | // 15749: } |
| 10234 | 84, 9, // 15754: case 0x54: { |
| 10235 | OPC_CheckField, 8, 8, 0, // 15756: check Inst[15:8] == 0x0 |
| 10236 | OPC_Decode, 129, 19, 150, 3, // 15760: decode to TDCDT using decoder 406 |
| 10237 | // 15760: } |
| 10238 | 85, 9, // 15765: case 0x55: { |
| 10239 | OPC_CheckField, 8, 8, 0, // 15767: check Inst[15:8] == 0x0 |
| 10240 | OPC_Decode, 132, 19, 150, 3, // 15771: decode to TDGDT using decoder 406 |
| 10241 | // 15771: } |
| 10242 | 88, 9, // 15776: case 0x58: { |
| 10243 | OPC_CheckField, 8, 8, 0, // 15778: check Inst[15:8] == 0x0 |
| 10244 | OPC_Decode, 131, 19, 151, 3, // 15782: decode to TDCXT using decoder 407 |
| 10245 | // 15782: } |
| 10246 | 89, 9, // 15787: case 0x59: { |
| 10247 | OPC_CheckField, 8, 8, 0, // 15789: check Inst[15:8] == 0x0 |
| 10248 | OPC_Decode, 134, 19, 151, 3, // 15793: decode to TDGXT using decoder 407 |
| 10249 | // 15793: } |
| 10250 | 100, 5, // 15798: case 0x64: { |
| 10251 | OPC_Decode, 145, 12, 161, 3, // 15800: decode to LEY using decoder 417 |
| 10252 | // 15800: } |
| 10253 | 101, 5, // 15805: case 0x65: { |
| 10254 | OPC_Decode, 132, 12, 162, 3, // 15807: decode to LDY using decoder 418 |
| 10255 | // 15807: } |
| 10256 | 102, 5, // 15812: case 0x66: { |
| 10257 | OPC_Decode, 138, 18, 161, 3, // 15814: decode to STEY using decoder 417 |
| 10258 | // 15814: } |
| 10259 | 103, 5, // 15819: case 0x67: { |
| 10260 | OPC_Decode, 134, 18, 162, 3, // 15821: decode to STDY using decoder 418 |
| 10261 | // 15821: } |
| 10262 | 168, 1, 7, // 15826: case 0xa8: { |
| 10263 | OPC_CheckPredicate, 43, // 15829: check predicate 43 |
| 10264 | OPC_Decode, 142, 10, 163, 3, // 15831: decode to CZDT using decoder 419 |
| 10265 | // 15831: } |
| 10266 | 169, 1, 7, // 15836: case 0xa9: { |
| 10267 | OPC_CheckPredicate, 43, // 15839: check predicate 43 |
| 10268 | OPC_Decode, 143, 10, 164, 3, // 15841: decode to CZXT using decoder 420 |
| 10269 | // 15841: } |
| 10270 | 170, 1, 7, // 15846: case 0xaa: { |
| 10271 | OPC_CheckPredicate, 43, // 15849: check predicate 43 |
| 10272 | OPC_Decode, 241, 5, 163, 3, // 15851: decode to CDZT using decoder 419 |
| 10273 | // 15851: } |
| 10274 | 171, 1, 7, // 15856: case 0xab: { |
| 10275 | OPC_CheckPredicate, 43, // 15859: check predicate 43 |
| 10276 | OPC_Decode, 140, 10, 164, 3, // 15861: decode to CXZT using decoder 420 |
| 10277 | // 15861: } |
| 10278 | 172, 1, 7, // 15866: case 0xac: { |
| 10279 | OPC_CheckPredicate, 44, // 15869: check predicate 44 |
| 10280 | OPC_Decode, 158, 9, 163, 3, // 15871: decode to CPDT using decoder 419 |
| 10281 | // 15871: } |
| 10282 | 173, 1, 7, // 15876: case 0xad: { |
| 10283 | OPC_CheckPredicate, 44, // 15879: check predicate 44 |
| 10284 | OPC_Decode, 168, 9, 164, 3, // 15881: decode to CPXT using decoder 420 |
| 10285 | // 15881: } |
| 10286 | 174, 1, 7, // 15886: case 0xae: { |
| 10287 | OPC_CheckPredicate, 44, // 15889: check predicate 44 |
| 10288 | OPC_Decode, 233, 5, 163, 3, // 15891: decode to CDPT using decoder 419 |
| 10289 | // 15891: } |
| 10290 | 175, 1, 0, // 15896: case 0xaf: { |
| 10291 | OPC_CheckPredicate, 44, // 15899: check predicate 44 |
| 10292 | OPC_Decode, 135, 10, 164, 3, // 15901: decode to CXPT using decoder 420 |
| 10293 | // 15901: } |
| 10294 | // 15901: } // switch Inst[7:0] |
| 10295 | // 15901: } |
| 10296 | 238, 1, 5, // 15906: case 0xee: { |
| 10297 | OPC_Decode, 150, 16, 165, 3, // 15909: decode to PLO using decoder 421 |
| 10298 | // 15909: } |
| 10299 | 239, 1, 5, // 15914: case 0xef: { |
| 10300 | OPC_Decode, 206, 12, 166, 3, // 15917: decode to LMD using decoder 422 |
| 10301 | // 15917: } |
| 10302 | 240, 1, 5, // 15922: case 0xf0: { |
| 10303 | OPC_Decode, 232, 17, 167, 3, // 15925: decode to SRP using decoder 423 |
| 10304 | // 15925: } |
| 10305 | 241, 1, 5, // 15930: case 0xf1: { |
| 10306 | OPC_Decode, 195, 15, 168, 3, // 15933: decode to MVO using decoder 424 |
| 10307 | // 15933: } |
| 10308 | 242, 1, 5, // 15938: case 0xf2: { |
| 10309 | OPC_Decode, 136, 16, 168, 3, // 15941: decode to PACK using decoder 424 |
| 10310 | // 15941: } |
| 10311 | 243, 1, 5, // 15946: case 0xf3: { |
| 10312 | OPC_Decode, 170, 19, 168, 3, // 15949: decode to UNPK using decoder 424 |
| 10313 | // 15949: } |
| 10314 | 248, 1, 5, // 15954: case 0xf8: { |
| 10315 | OPC_Decode, 226, 25, 168, 3, // 15957: decode to ZAP using decoder 424 |
| 10316 | // 15957: } |
| 10317 | 249, 1, 5, // 15962: case 0xf9: { |
| 10318 | OPC_Decode, 157, 9, 168, 3, // 15965: decode to CP using decoder 424 |
| 10319 | // 15965: } |
| 10320 | 250, 1, 5, // 15970: case 0xfa: { |
| 10321 | OPC_Decode, 225, 4, 168, 3, // 15973: decode to AP using decoder 424 |
| 10322 | // 15973: } |
| 10323 | 251, 1, 5, // 15978: case 0xfb: { |
| 10324 | OPC_Decode, 202, 17, 168, 3, // 15981: decode to SP using decoder 424 |
| 10325 | // 15981: } |
| 10326 | 252, 1, 5, // 15986: case 0xfc: { |
| 10327 | OPC_Decode, 152, 15, 168, 3, // 15989: decode to MP using decoder 424 |
| 10328 | // 15989: } |
| 10329 | 253, 1, 0, // 15994: case 0xfd: { |
| 10330 | OPC_Decode, 163, 10, 168, 3, // 15997: decode to DP using decoder 424 |
| 10331 | // 15997: } |
| 10332 | // 15997: } // switch Inst[47:40] |
| 10333 | }; |
| 10334 | // Handling 425 cases. |
| 10335 | template <typename InsnType> |
| 10336 | static DecodeStatus decodeToMCInst(unsigned Idx, DecodeStatus S, InsnType insn, MCInst &MI, uint64_t Address, const MCDisassembler *Decoder, bool &DecodeComplete) { |
| 10337 | DecodeComplete = true; |
| 10338 | using TmpType = std::conditional_t<std::is_integral<InsnType>::value, InsnType, uint64_t>; |
| 10339 | TmpType tmp; |
| 10340 | switch (Idx) { |
| 10341 | default: llvm_unreachable("Invalid decoder index!"); |
| 10342 | case 0: |
| 10343 | return S; |
| 10344 | case 1: |
| 10345 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10346 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10347 | return S; |
| 10348 | case 2: |
| 10349 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10350 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10351 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10352 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10353 | return S; |
| 10354 | case 3: |
| 10355 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10356 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10357 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10358 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10359 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10360 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10361 | return S; |
| 10362 | case 4: |
| 10363 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10364 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10365 | return S; |
| 10366 | case 5: |
| 10367 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10368 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10369 | return S; |
| 10370 | case 6: |
| 10371 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10372 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10373 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10374 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10375 | return S; |
| 10376 | case 7: |
| 10377 | tmp = fieldFromInstruction(insn, 0, 8); |
| 10378 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10379 | return S; |
| 10380 | case 8: |
| 10381 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10382 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10383 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10384 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10385 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10386 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10387 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10388 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10389 | return S; |
| 10390 | case 9: |
| 10391 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10392 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10393 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10394 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10395 | return S; |
| 10396 | case 10: |
| 10397 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10398 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10399 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10400 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10401 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10402 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10403 | return S; |
| 10404 | case 11: |
| 10405 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10406 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10407 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10408 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10409 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10410 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10411 | return S; |
| 10412 | case 12: |
| 10413 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10414 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10415 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10416 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10417 | return S; |
| 10418 | case 13: |
| 10419 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10420 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10421 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10422 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10423 | return S; |
| 10424 | case 14: |
| 10425 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10426 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10427 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10428 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10429 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10430 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10431 | return S; |
| 10432 | case 15: |
| 10433 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10434 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10435 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10436 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10437 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10438 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10439 | return S; |
| 10440 | case 16: |
| 10441 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10442 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10443 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10444 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10445 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10446 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10447 | return S; |
| 10448 | case 17: |
| 10449 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10450 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10451 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10452 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10453 | return S; |
| 10454 | case 18: |
| 10455 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10456 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10457 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10458 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10459 | return S; |
| 10460 | case 19: |
| 10461 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10462 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10463 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10464 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10465 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10466 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10467 | return S; |
| 10468 | case 20: |
| 10469 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10470 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10471 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10472 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10473 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10474 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10475 | return S; |
| 10476 | case 21: |
| 10477 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10478 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10479 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10480 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10481 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10482 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10483 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10484 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10485 | return S; |
| 10486 | case 22: |
| 10487 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10488 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10489 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10490 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10491 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10492 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10493 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10494 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10495 | return S; |
| 10496 | case 23: |
| 10497 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10498 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10499 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10500 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10501 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10502 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10503 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10504 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10505 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10506 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10507 | return S; |
| 10508 | case 24: |
| 10509 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10510 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10511 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10512 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10513 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10514 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10515 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10516 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10517 | return S; |
| 10518 | case 25: |
| 10519 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10520 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10521 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10522 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10523 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10524 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10525 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10526 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10527 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10528 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10529 | return S; |
| 10530 | case 26: |
| 10531 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10532 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10533 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10534 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10535 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10536 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10537 | return S; |
| 10538 | case 27: |
| 10539 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10540 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10541 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10542 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10543 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10544 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10545 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10546 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10547 | return S; |
| 10548 | case 28: |
| 10549 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10550 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10551 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10552 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10553 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10554 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10555 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10556 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10557 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10558 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10559 | return S; |
| 10560 | case 29: |
| 10561 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10562 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10563 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10564 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10565 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10566 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10567 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10568 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10569 | return S; |
| 10570 | case 30: |
| 10571 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10572 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10573 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10574 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10575 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10576 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10577 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10578 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10579 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10580 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10581 | return S; |
| 10582 | case 31: |
| 10583 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10584 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10585 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10586 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10587 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10588 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10589 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10590 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10591 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10592 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10593 | return S; |
| 10594 | case 32: |
| 10595 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10596 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10597 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10598 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10599 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10600 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10601 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10602 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10603 | return S; |
| 10604 | case 33: |
| 10605 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10606 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10607 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10608 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10609 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10610 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10611 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10612 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10613 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10614 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10615 | return S; |
| 10616 | case 34: |
| 10617 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10618 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10619 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10620 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10621 | return S; |
| 10622 | case 35: |
| 10623 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10624 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10625 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10626 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10627 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10628 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10629 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10630 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10631 | return S; |
| 10632 | case 36: |
| 10633 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10634 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10635 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10636 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10637 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10638 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10639 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10640 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10641 | return S; |
| 10642 | case 37: |
| 10643 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10644 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10645 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10646 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10647 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10648 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10649 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10650 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10651 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10652 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10653 | return S; |
| 10654 | case 38: |
| 10655 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10656 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10657 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10658 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10659 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10660 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10661 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10662 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10663 | return S; |
| 10664 | case 39: |
| 10665 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10666 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10667 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10668 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10669 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10670 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10671 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10672 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10673 | return S; |
| 10674 | case 40: |
| 10675 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10676 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10677 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10678 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10679 | tmp = fieldFromInstruction(insn, 16, 8); |
| 10680 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10681 | return S; |
| 10682 | case 41: |
| 10683 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10684 | if (!Check(S, DecodeAR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10685 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10686 | if (!Check(S, DecodeAR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10687 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10688 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10689 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10690 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10691 | return S; |
| 10692 | case 42: |
| 10693 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10694 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10695 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10696 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10697 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10698 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10699 | return S; |
| 10700 | case 43: |
| 10701 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10702 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10703 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10704 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10705 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10706 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10707 | return S; |
| 10708 | case 44: |
| 10709 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10710 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10711 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10712 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10713 | return S; |
| 10714 | case 45: |
| 10715 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10716 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10717 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10718 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10719 | return S; |
| 10720 | case 46: |
| 10721 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10722 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10723 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10724 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10725 | return S; |
| 10726 | case 47: |
| 10727 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10728 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10729 | return S; |
| 10730 | case 48: |
| 10731 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10732 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10733 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10734 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10735 | return S; |
| 10736 | case 49: |
| 10737 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10738 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10739 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10740 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10741 | return S; |
| 10742 | case 50: |
| 10743 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10744 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10745 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10746 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10747 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10748 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10749 | return S; |
| 10750 | case 51: |
| 10751 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10752 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10753 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10754 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10755 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10756 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10757 | return S; |
| 10758 | case 52: |
| 10759 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10760 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10761 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10762 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10763 | return S; |
| 10764 | case 53: |
| 10765 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10766 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10767 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10768 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10769 | return S; |
| 10770 | case 54: |
| 10771 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10772 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10773 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10774 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10775 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10776 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10777 | return S; |
| 10778 | case 55: |
| 10779 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10780 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10781 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10782 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10783 | tmp = fieldFromInstruction(insn, 0, 16); |
| 10784 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10785 | return S; |
| 10786 | case 56: |
| 10787 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10788 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10789 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10790 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10791 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10792 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10793 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10794 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10795 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10796 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10797 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10798 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10799 | return S; |
| 10800 | case 57: |
| 10801 | tmp = fieldFromInstruction(insn, 20, 4); |
| 10802 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10803 | tmp = fieldFromInstruction(insn, 16, 4); |
| 10804 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10805 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10806 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10807 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10808 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10809 | return S; |
| 10810 | case 58: |
| 10811 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10812 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10813 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10814 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10815 | return S; |
| 10816 | case 59: |
| 10817 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10818 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10819 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10820 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10821 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10822 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10823 | return S; |
| 10824 | case 60: |
| 10825 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10826 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10827 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10828 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10829 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10830 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10831 | tmp = fieldFromInstruction(insn, 8, 4); |
| 10832 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10833 | return S; |
| 10834 | case 61: |
| 10835 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10836 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10837 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10838 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10839 | return S; |
| 10840 | case 62: |
| 10841 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10842 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10843 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10844 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10845 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10846 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10847 | return S; |
| 10848 | case 63: |
| 10849 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10850 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10851 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10852 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10853 | return S; |
| 10854 | case 64: |
| 10855 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10856 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10857 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10858 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10859 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10860 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10861 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10862 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10863 | return S; |
| 10864 | case 65: |
| 10865 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10866 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10867 | return S; |
| 10868 | case 66: |
| 10869 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10870 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10871 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10872 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10873 | return S; |
| 10874 | case 67: |
| 10875 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10876 | if (!Check(S, DecodeAR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10877 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10878 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10879 | return S; |
| 10880 | case 68: |
| 10881 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10882 | if (!Check(S, DecodeAR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10883 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10884 | if (!Check(S, DecodeAR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10885 | return S; |
| 10886 | case 69: |
| 10887 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10888 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10889 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10890 | if (!Check(S, DecodeAR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10891 | return S; |
| 10892 | case 70: |
| 10893 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10894 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10895 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10896 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10897 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10898 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10899 | return S; |
| 10900 | case 71: |
| 10901 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10902 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10903 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10904 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10905 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10906 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10907 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10908 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10909 | return S; |
| 10910 | case 72: |
| 10911 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10912 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10913 | tmp = fieldFromInstruction(insn, 0, 12); |
| 10914 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10915 | return S; |
| 10916 | case 73: |
| 10917 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10918 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10919 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10920 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10921 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10922 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10923 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10924 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10925 | return S; |
| 10926 | case 74: |
| 10927 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10928 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10929 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10930 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10931 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10932 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10933 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10934 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10935 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10936 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10937 | return S; |
| 10938 | case 75: |
| 10939 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10940 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10941 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10942 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10943 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10944 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10945 | return S; |
| 10946 | case 76: |
| 10947 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10948 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10949 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10950 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10951 | return S; |
| 10952 | case 77: |
| 10953 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10954 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10955 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10956 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10957 | return S; |
| 10958 | case 78: |
| 10959 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10960 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10961 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10962 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10963 | return S; |
| 10964 | case 79: |
| 10965 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10966 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10967 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10968 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10969 | return S; |
| 10970 | case 80: |
| 10971 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10972 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10973 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10974 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10975 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10976 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10977 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10978 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10979 | return S; |
| 10980 | case 81: |
| 10981 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10982 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10983 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10984 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10985 | return S; |
| 10986 | case 82: |
| 10987 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10988 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10989 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10990 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10991 | tmp = fieldFromInstruction(insn, 4, 4); |
| 10992 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10993 | tmp = fieldFromInstruction(insn, 0, 4); |
| 10994 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10995 | return S; |
| 10996 | case 83: |
| 10997 | tmp = fieldFromInstruction(insn, 12, 4); |
| 10998 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 10999 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11000 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11001 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11002 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11003 | return S; |
| 11004 | case 84: |
| 11005 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11006 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11007 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11008 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11009 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11010 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11011 | return S; |
| 11012 | case 85: |
| 11013 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11014 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11015 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11016 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11017 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11018 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11019 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11020 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11021 | return S; |
| 11022 | case 86: |
| 11023 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11024 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11025 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11026 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11027 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11028 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11029 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11030 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11031 | return S; |
| 11032 | case 87: |
| 11033 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11034 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11035 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11036 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11037 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11038 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11039 | return S; |
| 11040 | case 88: |
| 11041 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11042 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11043 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11044 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11045 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11046 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11047 | return S; |
| 11048 | case 89: |
| 11049 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11050 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11051 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11052 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11053 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11054 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11055 | return S; |
| 11056 | case 90: |
| 11057 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11058 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11059 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11060 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11061 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11062 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11063 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11064 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11065 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11066 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11067 | return S; |
| 11068 | case 91: |
| 11069 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11070 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11071 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11072 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11073 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11074 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11075 | return S; |
| 11076 | case 92: |
| 11077 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11078 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11079 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11080 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11081 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11082 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11083 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11084 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11085 | return S; |
| 11086 | case 93: |
| 11087 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11088 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11089 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11090 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11091 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11092 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11093 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11094 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11095 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11096 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11097 | return S; |
| 11098 | case 94: |
| 11099 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11100 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11101 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11102 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11103 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11104 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11105 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11106 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11107 | return S; |
| 11108 | case 95: |
| 11109 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11110 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11111 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11112 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11113 | return S; |
| 11114 | case 96: |
| 11115 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11116 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11117 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11118 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11119 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11120 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11121 | return S; |
| 11122 | case 97: |
| 11123 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11124 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11125 | return S; |
| 11126 | case 98: |
| 11127 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11128 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11129 | return S; |
| 11130 | case 99: |
| 11131 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11132 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11133 | return S; |
| 11134 | case 100: |
| 11135 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11136 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11137 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11138 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11139 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11140 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11141 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11142 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11143 | return S; |
| 11144 | case 101: |
| 11145 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11146 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11147 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11148 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11149 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11150 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11151 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11152 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11153 | return S; |
| 11154 | case 102: |
| 11155 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11156 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11157 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11158 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11159 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11160 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11161 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11162 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11163 | return S; |
| 11164 | case 103: |
| 11165 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11166 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11167 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11168 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11169 | return S; |
| 11170 | case 104: |
| 11171 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11172 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11173 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11174 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11175 | return S; |
| 11176 | case 105: |
| 11177 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11178 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11179 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11180 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11181 | return S; |
| 11182 | case 106: |
| 11183 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11184 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11185 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11186 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11187 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11188 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11189 | return S; |
| 11190 | case 107: |
| 11191 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11192 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11193 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11194 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11195 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11196 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11197 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11198 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11199 | return S; |
| 11200 | case 108: |
| 11201 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11202 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11203 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11204 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11205 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11206 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11207 | return S; |
| 11208 | case 109: |
| 11209 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11210 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11211 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11212 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11213 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11214 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11215 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11216 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11217 | return S; |
| 11218 | case 110: |
| 11219 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11220 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11221 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11222 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11223 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11224 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11225 | return S; |
| 11226 | case 111: |
| 11227 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11228 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11229 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11230 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11231 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11232 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11233 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11234 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11235 | return S; |
| 11236 | case 112: |
| 11237 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11238 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11239 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11240 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11241 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11242 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11243 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11244 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11245 | return S; |
| 11246 | case 113: |
| 11247 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11248 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11249 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11250 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11251 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11252 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11253 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11254 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11255 | return S; |
| 11256 | case 114: |
| 11257 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11258 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11259 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11260 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11261 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11262 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11263 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11264 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11265 | return S; |
| 11266 | case 115: |
| 11267 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11268 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11269 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11270 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11271 | return S; |
| 11272 | case 116: |
| 11273 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11274 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11275 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11276 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11277 | return S; |
| 11278 | case 117: |
| 11279 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11280 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11281 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11282 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11283 | return S; |
| 11284 | case 118: |
| 11285 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11286 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11287 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11288 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11289 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11290 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11291 | return S; |
| 11292 | case 119: |
| 11293 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11294 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11295 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11296 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11297 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11298 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11299 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11300 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11301 | return S; |
| 11302 | case 120: |
| 11303 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11304 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11305 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11306 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11307 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11308 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11309 | return S; |
| 11310 | case 121: |
| 11311 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11312 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11313 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11314 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11315 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11316 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11317 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11318 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11319 | return S; |
| 11320 | case 122: |
| 11321 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11322 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11323 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11324 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11325 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11326 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11327 | return S; |
| 11328 | case 123: |
| 11329 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11330 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11331 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11332 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11333 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11334 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11335 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11336 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11337 | return S; |
| 11338 | case 124: |
| 11339 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11340 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11341 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11342 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11343 | return S; |
| 11344 | case 125: |
| 11345 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11346 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11347 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11348 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11349 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11350 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11351 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11352 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11353 | return S; |
| 11354 | case 126: |
| 11355 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11356 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11357 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11358 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11359 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11360 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11361 | return S; |
| 11362 | case 127: |
| 11363 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11364 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11365 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11366 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11367 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11368 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11369 | return S; |
| 11370 | case 128: |
| 11371 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11372 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11373 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11374 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11375 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11376 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11377 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11378 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11379 | return S; |
| 11380 | case 129: |
| 11381 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11382 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11383 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11384 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11385 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11386 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11387 | return S; |
| 11388 | case 130: |
| 11389 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11390 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11391 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11392 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11393 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11394 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11395 | return S; |
| 11396 | case 131: |
| 11397 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11398 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11399 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11400 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11401 | return S; |
| 11402 | case 132: |
| 11403 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11404 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11405 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11406 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11407 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11408 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11409 | return S; |
| 11410 | case 133: |
| 11411 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11412 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11413 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11414 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11415 | return S; |
| 11416 | case 134: |
| 11417 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11418 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11419 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11420 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11421 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11422 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11423 | return S; |
| 11424 | case 135: |
| 11425 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11426 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11427 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11428 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11429 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11430 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11431 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11432 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11433 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11434 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11435 | return S; |
| 11436 | case 136: |
| 11437 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11438 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11439 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11440 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11441 | return S; |
| 11442 | case 137: |
| 11443 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11444 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11445 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11446 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11447 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11448 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11449 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11450 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11451 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11452 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11453 | return S; |
| 11454 | case 138: |
| 11455 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11456 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11457 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11458 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11459 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11460 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11461 | return S; |
| 11462 | case 139: |
| 11463 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11464 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11465 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11466 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11467 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11468 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11469 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11470 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11471 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11472 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11473 | return S; |
| 11474 | case 140: |
| 11475 | tmp = fieldFromInstruction(insn, 20, 4); |
| 11476 | if (!Check(S, DecodeCR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11477 | tmp = fieldFromInstruction(insn, 16, 4); |
| 11478 | if (!Check(S, DecodeCR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11479 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11480 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11481 | tmp = fieldFromInstruction(insn, 0, 12); |
| 11482 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11483 | return S; |
| 11484 | case 141: |
| 11485 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11486 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11487 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11488 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11489 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11490 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11491 | return S; |
| 11492 | case 142: |
| 11493 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11494 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11495 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11496 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11497 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11498 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11499 | return S; |
| 11500 | case 143: |
| 11501 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11502 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11503 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11504 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11505 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11506 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11507 | return S; |
| 11508 | case 144: |
| 11509 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11510 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11511 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11512 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11513 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11514 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11515 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11516 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11517 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11518 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11519 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11520 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11521 | return S; |
| 11522 | case 145: |
| 11523 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11524 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11525 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11526 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11527 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11528 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11529 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11530 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11531 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11532 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11533 | return S; |
| 11534 | case 146: |
| 11535 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11536 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11537 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11538 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11539 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11540 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11541 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11542 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11543 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11544 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11545 | return S; |
| 11546 | case 147: |
| 11547 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11548 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11549 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11550 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11551 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11552 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11553 | return S; |
| 11554 | case 148: |
| 11555 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11556 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11557 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11558 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11559 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11560 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11561 | return S; |
| 11562 | case 149: |
| 11563 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11564 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11565 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11566 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11567 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11568 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11569 | return S; |
| 11570 | case 150: |
| 11571 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11572 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11573 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11574 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11575 | return S; |
| 11576 | case 151: |
| 11577 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11578 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11579 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11580 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11581 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11582 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11583 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11584 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11585 | return S; |
| 11586 | case 152: |
| 11587 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11588 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11589 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11590 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11591 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11592 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11593 | return S; |
| 11594 | case 153: |
| 11595 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11596 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11597 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11598 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11599 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11600 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11601 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11602 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11603 | return S; |
| 11604 | case 154: |
| 11605 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11606 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11607 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11608 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11609 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11610 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11611 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11612 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11613 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11614 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11615 | return S; |
| 11616 | case 155: |
| 11617 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11618 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11619 | return S; |
| 11620 | case 156: |
| 11621 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11622 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11623 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11624 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11625 | return S; |
| 11626 | case 157: |
| 11627 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11628 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11629 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11630 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11631 | return S; |
| 11632 | case 158: |
| 11633 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11634 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11635 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11636 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11637 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11638 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11639 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11640 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11641 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11642 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11643 | return S; |
| 11644 | case 159: |
| 11645 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11646 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11647 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11648 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11649 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11650 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11651 | return S; |
| 11652 | case 160: |
| 11653 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11654 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11655 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11656 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11657 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11658 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11659 | return S; |
| 11660 | case 161: |
| 11661 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11662 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11663 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11664 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11665 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11666 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11667 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11668 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11669 | return S; |
| 11670 | case 162: |
| 11671 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11672 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11673 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11674 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11675 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11676 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11677 | return S; |
| 11678 | case 163: |
| 11679 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11680 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11681 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11682 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11683 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11684 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11685 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11686 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11687 | return S; |
| 11688 | case 164: |
| 11689 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11690 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11691 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11692 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11693 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11694 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11695 | return S; |
| 11696 | case 165: |
| 11697 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11698 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11699 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11700 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11701 | return S; |
| 11702 | case 166: |
| 11703 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11704 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11705 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11706 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11707 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11708 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11709 | return S; |
| 11710 | case 167: |
| 11711 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11712 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11713 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11714 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11715 | return S; |
| 11716 | case 168: |
| 11717 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11718 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11719 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11720 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11721 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11722 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11723 | return S; |
| 11724 | case 169: |
| 11725 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11726 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11727 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11728 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11729 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11730 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11731 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11732 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11733 | return S; |
| 11734 | case 170: |
| 11735 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11736 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11737 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11738 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11739 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11740 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11741 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11742 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11743 | return S; |
| 11744 | case 171: |
| 11745 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11746 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11747 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11748 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11749 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11750 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11751 | return S; |
| 11752 | case 172: |
| 11753 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11754 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11755 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11756 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11757 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11758 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11759 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11760 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11761 | return S; |
| 11762 | case 173: |
| 11763 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11764 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11765 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11766 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11767 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11768 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11769 | return S; |
| 11770 | case 174: |
| 11771 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11772 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11773 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11774 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11775 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11776 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11777 | return S; |
| 11778 | case 175: |
| 11779 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11780 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11781 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11782 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11783 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11784 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11785 | tmp = fieldFromInstruction(insn, 8, 4); |
| 11786 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11787 | return S; |
| 11788 | case 176: |
| 11789 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11790 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11791 | tmp = fieldFromInstruction(insn, 4, 4); |
| 11792 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11793 | tmp = fieldFromInstruction(insn, 0, 4); |
| 11794 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11795 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11796 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11797 | return S; |
| 11798 | case 177: |
| 11799 | tmp = fieldFromInstruction(insn, 20, 4); |
| 11800 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11801 | tmp = fieldFromInstruction(insn, 20, 4); |
| 11802 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11803 | tmp = fieldFromInstruction(insn, 16, 4); |
| 11804 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11805 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11806 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11807 | tmp = fieldFromInstruction(insn, 0, 12); |
| 11808 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11809 | return S; |
| 11810 | case 178: |
| 11811 | tmp = fieldFromInstruction(insn, 20, 4); |
| 11812 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11813 | tmp = fieldFromInstruction(insn, 16, 4); |
| 11814 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11815 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11816 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11817 | tmp = fieldFromInstruction(insn, 0, 12); |
| 11818 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11819 | return S; |
| 11820 | case 179: |
| 11821 | tmp = fieldFromInstruction(insn, 20, 4); |
| 11822 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11823 | tmp = fieldFromInstruction(insn, 20, 4); |
| 11824 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11825 | tmp = fieldFromInstruction(insn, 16, 4); |
| 11826 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11827 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11828 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11829 | tmp = fieldFromInstruction(insn, 0, 12); |
| 11830 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11831 | return S; |
| 11832 | case 180: |
| 11833 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11834 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11835 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11836 | if (!Check(S, decodePC32DBLOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11837 | return S; |
| 11838 | case 181: |
| 11839 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11840 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11841 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11842 | if (!Check(S, decodeS32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11843 | return S; |
| 11844 | case 182: |
| 11845 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11846 | if (!Check(S, decodePC32DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11847 | return S; |
| 11848 | case 183: |
| 11849 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11850 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11851 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11852 | if (!Check(S, decodePC32DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11853 | return S; |
| 11854 | case 184: |
| 11855 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11856 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11857 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11858 | if (!Check(S, decodePC32DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11859 | return S; |
| 11860 | case 185: |
| 11861 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11862 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11863 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11864 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11865 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11866 | if (!Check(S, decodeU32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11867 | return S; |
| 11868 | case 186: |
| 11869 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11870 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11871 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11872 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11873 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11874 | if (!Check(S, decodeU32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11875 | return S; |
| 11876 | case 187: |
| 11877 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11878 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11879 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11880 | if (!Check(S, decodeU32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11881 | return S; |
| 11882 | case 188: |
| 11883 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11884 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11885 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11886 | if (!Check(S, decodeU32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11887 | return S; |
| 11888 | case 189: |
| 11889 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11890 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11891 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11892 | if (!Check(S, decodeU32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11893 | return S; |
| 11894 | case 190: |
| 11895 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11896 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11897 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11898 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11899 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11900 | if (!Check(S, decodeS32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11901 | return S; |
| 11902 | case 191: |
| 11903 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11904 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11905 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11906 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11907 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11908 | if (!Check(S, decodeS32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11909 | return S; |
| 11910 | case 192: |
| 11911 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11912 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11913 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11914 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11915 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11916 | if (!Check(S, decodeU32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11917 | return S; |
| 11918 | case 193: |
| 11919 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11920 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11921 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11922 | if (!Check(S, decodeS32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11923 | return S; |
| 11924 | case 194: |
| 11925 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11926 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11927 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11928 | if (!Check(S, decodePC32DBLOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11929 | return S; |
| 11930 | case 195: |
| 11931 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11932 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11933 | tmp = fieldFromInstruction(insn, 24, 12); |
| 11934 | if (!Check(S, decodePC12DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11935 | tmp = fieldFromInstruction(insn, 0, 24); |
| 11936 | if (!Check(S, decodePC24DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11937 | return S; |
| 11938 | case 196: |
| 11939 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11940 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11941 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11942 | if (!Check(S, decodePC32DBLOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11943 | return S; |
| 11944 | case 197: |
| 11945 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11946 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11947 | tmp = fieldFromInstruction(insn, 0, 32); |
| 11948 | if (!Check(S, decodePC32DBLOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11949 | return S; |
| 11950 | case 198: |
| 11951 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11952 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11953 | tmp = fieldFromInstruction(insn, 0, 16); |
| 11954 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11955 | tmp = fieldFromInstruction(insn, 28, 4); |
| 11956 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11957 | tmp = fieldFromInstruction(insn, 16, 12); |
| 11958 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11959 | return S; |
| 11960 | case 199: |
| 11961 | tmp = fieldFromInstruction(insn, 28, 4); |
| 11962 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11963 | tmp = fieldFromInstruction(insn, 16, 12); |
| 11964 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11965 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11966 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11967 | tmp = fieldFromInstruction(insn, 0, 12); |
| 11968 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11969 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11970 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11971 | return S; |
| 11972 | case 200: |
| 11973 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11974 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11975 | tmp = fieldFromInstruction(insn, 28, 4); |
| 11976 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11977 | tmp = fieldFromInstruction(insn, 16, 12); |
| 11978 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11979 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11980 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11981 | tmp = fieldFromInstruction(insn, 0, 12); |
| 11982 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11983 | return S; |
| 11984 | case 201: |
| 11985 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11986 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11987 | tmp = fieldFromInstruction(insn, 28, 4); |
| 11988 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11989 | tmp = fieldFromInstruction(insn, 16, 12); |
| 11990 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11991 | tmp = fieldFromInstruction(insn, 12, 4); |
| 11992 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11993 | tmp = fieldFromInstruction(insn, 0, 12); |
| 11994 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11995 | return S; |
| 11996 | case 202: |
| 11997 | tmp = fieldFromInstruction(insn, 36, 4); |
| 11998 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 11999 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12000 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12001 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12002 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12003 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12004 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12005 | tmp = fieldFromInstruction(insn, 0, 12); |
| 12006 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12007 | return S; |
| 12008 | case 203: |
| 12009 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12010 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12011 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12012 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12013 | tmp = fieldFromInstruction(insn, 0, 32); |
| 12014 | if (!Check(S, decodePC32DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12015 | return S; |
| 12016 | case 204: |
| 12017 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12018 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12019 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12020 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12021 | tmp = fieldFromInstruction(insn, 0, 32); |
| 12022 | if (!Check(S, decodeS32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12023 | return S; |
| 12024 | case 205: |
| 12025 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12026 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12027 | tmp = fieldFromInstruction(insn, 0, 32); |
| 12028 | if (!Check(S, decodeS32ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12029 | return S; |
| 12030 | case 206: |
| 12031 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12032 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12033 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12034 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12035 | tmp = fieldFromInstruction(insn, 32, 8); |
| 12036 | if (!Check(S, decodeLenOperand<8>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12037 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12038 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12039 | tmp = fieldFromInstruction(insn, 0, 12); |
| 12040 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12041 | return S; |
| 12042 | case 207: |
| 12043 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12044 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12045 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12046 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12047 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12048 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12049 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12050 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12051 | tmp = fieldFromInstruction(insn, 0, 12); |
| 12052 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12053 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12054 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12055 | return S; |
| 12056 | case 208: |
| 12057 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12058 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12059 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12060 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12061 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12062 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12063 | tmp = fieldFromInstruction(insn, 0, 12); |
| 12064 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12065 | tmp = fieldFromInstruction(insn, 32, 8); |
| 12066 | if (!Check(S, decodeLenOperand<8>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12067 | return S; |
| 12068 | case 209: |
| 12069 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12070 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12071 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12072 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12073 | tmp = 0x0; |
| 12074 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12075 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12076 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12077 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12078 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12079 | return S; |
| 12080 | case 210: |
| 12081 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12082 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12083 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12084 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12085 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12086 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12087 | tmp = 0x0; |
| 12088 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12089 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12090 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12091 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12092 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12093 | return S; |
| 12094 | case 211: |
| 12095 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12096 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12097 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12098 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12099 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12100 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12101 | tmp = 0x0; |
| 12102 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12103 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12104 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12105 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12106 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12107 | return S; |
| 12108 | case 212: |
| 12109 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12110 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12111 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12112 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12113 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12114 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12115 | tmp = 0x0; |
| 12116 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12117 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12118 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12119 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12120 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12121 | return S; |
| 12122 | case 213: |
| 12123 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12124 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12125 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12126 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12127 | tmp = 0x0; |
| 12128 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12129 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12130 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12131 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12132 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12133 | return S; |
| 12134 | case 214: |
| 12135 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12136 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12137 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12138 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12139 | tmp = 0x0; |
| 12140 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12141 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12142 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12143 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12144 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12145 | return S; |
| 12146 | case 215: |
| 12147 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12148 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12149 | tmp = 0x0; |
| 12150 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12151 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12152 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12153 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12154 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12155 | return S; |
| 12156 | case 216: |
| 12157 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12158 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12159 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12160 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12161 | tmp = 0x0; |
| 12162 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12163 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12164 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12165 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12166 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12167 | return S; |
| 12168 | case 217: |
| 12169 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12170 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12171 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12172 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12173 | tmp = 0x0; |
| 12174 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12175 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12176 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12177 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12178 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12179 | return S; |
| 12180 | case 218: |
| 12181 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12182 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12183 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12184 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12185 | tmp = 0x0; |
| 12186 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 12187 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 12188 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12189 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12190 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12191 | return S; |
| 12192 | case 219: |
| 12193 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12194 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12195 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12196 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12197 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12198 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12199 | tmp = fieldFromInstruction(insn, 0, 12); |
| 12200 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12201 | return S; |
| 12202 | case 220: |
| 12203 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12204 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12205 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12206 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12207 | tmp = fieldFromInstruction(insn, 0, 16); |
| 12208 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12209 | return S; |
| 12210 | case 221: |
| 12211 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12212 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12213 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12214 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12215 | tmp = fieldFromInstruction(insn, 0, 16); |
| 12216 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12217 | return S; |
| 12218 | case 222: |
| 12219 | tmp = 0x0; |
| 12220 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12221 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12222 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12223 | tmp = 0x0; |
| 12224 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12225 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12226 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12227 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12228 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12229 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12230 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12231 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12232 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12233 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12234 | if (!Check(S, decodeU3ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12235 | return S; |
| 12236 | case 223: |
| 12237 | tmp = 0x0; |
| 12238 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12239 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12240 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12241 | tmp = 0x0; |
| 12242 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12243 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12244 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12245 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12246 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12247 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12248 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12249 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12250 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12251 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12252 | if (!Check(S, decodeU1ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12253 | return S; |
| 12254 | case 224: |
| 12255 | tmp = 0x0; |
| 12256 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12257 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12258 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12259 | tmp = 0x0; |
| 12260 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12261 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12262 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12263 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12264 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12265 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12266 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12267 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12268 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12269 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12270 | if (!Check(S, decodeU2ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12271 | return S; |
| 12272 | case 225: |
| 12273 | tmp = 0x0; |
| 12274 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12275 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12276 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12277 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12278 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12279 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12280 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12281 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12282 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12283 | return S; |
| 12284 | case 226: |
| 12285 | tmp = 0x0; |
| 12286 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12287 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12288 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12289 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12290 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12291 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12292 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12293 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12294 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12295 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12296 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12297 | return S; |
| 12298 | case 227: |
| 12299 | tmp = 0x0; |
| 12300 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12301 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12302 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12303 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12304 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12305 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12306 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12307 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12308 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12309 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12310 | if (!Check(S, decodeU3ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12311 | return S; |
| 12312 | case 228: |
| 12313 | tmp = 0x0; |
| 12314 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12315 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12316 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12317 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12318 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12319 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12320 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12321 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12322 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12323 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12324 | if (!Check(S, decodeU1ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12325 | return S; |
| 12326 | case 229: |
| 12327 | tmp = 0x0; |
| 12328 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12329 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12330 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12331 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12332 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12333 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12334 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12335 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12336 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12337 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12338 | if (!Check(S, decodeU2ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12339 | return S; |
| 12340 | case 230: |
| 12341 | tmp = 0x0; |
| 12342 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 12343 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 12344 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12345 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12346 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12347 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12348 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12349 | tmp = fieldFromInstruction(insn, 32, 8); |
| 12350 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12351 | return S; |
| 12352 | case 231: |
| 12353 | tmp = 0x0; |
| 12354 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 12355 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 12356 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12357 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12358 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12359 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12360 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12361 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12362 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12363 | return S; |
| 12364 | case 232: |
| 12365 | tmp = 0x0; |
| 12366 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12367 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12368 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12369 | tmp = fieldFromInstruction(insn, 16, 16); |
| 12370 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12371 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12372 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12373 | return S; |
| 12374 | case 233: |
| 12375 | tmp = 0x0; |
| 12376 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12377 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12378 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12379 | tmp = 0x0; |
| 12380 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12381 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12382 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12383 | tmp = fieldFromInstruction(insn, 12, 8); |
| 12384 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12385 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12386 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12387 | return S; |
| 12388 | case 234: |
| 12389 | tmp = 0x0; |
| 12390 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12391 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12392 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12393 | tmp = 0x0; |
| 12394 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12395 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12396 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12397 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12398 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12399 | return S; |
| 12400 | case 235: |
| 12401 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12402 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12403 | tmp = 0x0; |
| 12404 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12405 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12406 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12407 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12408 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12409 | return S; |
| 12410 | case 236: |
| 12411 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12412 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12413 | tmp = 0x0; |
| 12414 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12415 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12416 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12417 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12418 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12419 | tmp = fieldFromInstruction(insn, 16, 4); |
| 12420 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12421 | return S; |
| 12422 | case 237: |
| 12423 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12424 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12425 | tmp = 0x0; |
| 12426 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12427 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12428 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12429 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12430 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12431 | return S; |
| 12432 | case 238: |
| 12433 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12434 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12435 | tmp = 0x0; |
| 12436 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12437 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12438 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12439 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12440 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12441 | tmp = fieldFromInstruction(insn, 16, 4); |
| 12442 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12443 | return S; |
| 12444 | case 239: |
| 12445 | tmp = 0x0; |
| 12446 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12447 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12448 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12449 | tmp = 0x0; |
| 12450 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12451 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12452 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12453 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12454 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12455 | tmp = fieldFromInstruction(insn, 16, 4); |
| 12456 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12457 | return S; |
| 12458 | case 240: |
| 12459 | tmp = 0x0; |
| 12460 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12461 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12462 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12463 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12464 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12465 | tmp = fieldFromInstruction(insn, 12, 8); |
| 12466 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12467 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12468 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12469 | return S; |
| 12470 | case 241: |
| 12471 | tmp = 0x0; |
| 12472 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12473 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12474 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12475 | tmp = 0x0; |
| 12476 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12477 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12478 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12479 | tmp = fieldFromInstruction(insn, 12, 8); |
| 12480 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12481 | tmp = fieldFromInstruction(insn, 24, 8); |
| 12482 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12483 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12484 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12485 | return S; |
| 12486 | case 242: |
| 12487 | tmp = 0x0; |
| 12488 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12489 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12490 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12491 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12492 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12493 | tmp = fieldFromInstruction(insn, 12, 8); |
| 12494 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12495 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12496 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12497 | return S; |
| 12498 | case 243: |
| 12499 | tmp = 0x0; |
| 12500 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12501 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12502 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12503 | return S; |
| 12504 | case 244: |
| 12505 | tmp = 0x0; |
| 12506 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12507 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12508 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12509 | tmp = fieldFromInstruction(insn, 12, 16); |
| 12510 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12511 | return S; |
| 12512 | case 245: |
| 12513 | tmp = 0x0; |
| 12514 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12515 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12516 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12517 | tmp = 0x0; |
| 12518 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12519 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12520 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12521 | tmp = 0x0; |
| 12522 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 12523 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 12524 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12525 | tmp = fieldFromInstruction(insn, 12, 8); |
| 12526 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12527 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12528 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12529 | return S; |
| 12530 | case 246: |
| 12531 | tmp = 0x0; |
| 12532 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12533 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12534 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12535 | tmp = 0x0; |
| 12536 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12537 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12538 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12539 | tmp = 0x0; |
| 12540 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 12541 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 12542 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12543 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12544 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12545 | return S; |
| 12546 | case 247: |
| 12547 | tmp = 0x0; |
| 12548 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12549 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12550 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12551 | tmp = 0x0; |
| 12552 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12553 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12554 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12555 | tmp = 0x0; |
| 12556 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 12557 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 12558 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12559 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12560 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12561 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12562 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12563 | return S; |
| 12564 | case 248: |
| 12565 | tmp = 0x0; |
| 12566 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12567 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12568 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12569 | tmp = 0x0; |
| 12570 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12571 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12572 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12573 | tmp = 0x0; |
| 12574 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 12575 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 12576 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12577 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12578 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12579 | tmp = fieldFromInstruction(insn, 16, 4); |
| 12580 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12581 | return S; |
| 12582 | case 249: |
| 12583 | tmp = 0x0; |
| 12584 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12585 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12586 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12587 | tmp = 0x0; |
| 12588 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 12589 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 12590 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12591 | tmp = fieldFromInstruction(insn, 20, 4); |
| 12592 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12593 | return S; |
| 12594 | case 250: |
| 12595 | tmp = 0x0; |
| 12596 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12597 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12598 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12599 | tmp = 0x0; |
| 12600 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12601 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12602 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12603 | tmp = 0x0; |
| 12604 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 12605 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 12606 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12607 | return S; |
| 12608 | case 251: |
| 12609 | tmp = 0x0; |
| 12610 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12611 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12612 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12613 | tmp = 0x0; |
| 12614 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 12615 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 12616 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12617 | tmp = fieldFromInstruction(insn, 12, 16); |
| 12618 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12619 | return S; |
| 12620 | case 252: |
| 12621 | tmp = 0x0; |
| 12622 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12623 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12624 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12625 | tmp = 0x0; |
| 12626 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12627 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12628 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12629 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12630 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12631 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12632 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12633 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12634 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12635 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12636 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12637 | return S; |
| 12638 | case 253: |
| 12639 | tmp = 0x0; |
| 12640 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12641 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12642 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12643 | tmp = 0x0; |
| 12644 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12645 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12646 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12647 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12648 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12649 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12650 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12651 | tmp = 0x0; |
| 12652 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12653 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12654 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12655 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12656 | if (!Check(S, decodeU1ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12657 | return S; |
| 12658 | case 254: |
| 12659 | tmp = 0x0; |
| 12660 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12661 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12662 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12663 | tmp = 0x0; |
| 12664 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12665 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12666 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12667 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12668 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12669 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12670 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12671 | tmp = 0x0; |
| 12672 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12673 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12674 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12675 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12676 | if (!Check(S, decodeU2ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12677 | return S; |
| 12678 | case 255: |
| 12679 | tmp = 0x0; |
| 12680 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12681 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12682 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12683 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12684 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12685 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12686 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12687 | tmp = 0x0; |
| 12688 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12689 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12690 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12691 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12692 | if (!Check(S, decodeU1ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12693 | return S; |
| 12694 | case 256: |
| 12695 | tmp = 0x0; |
| 12696 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12697 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12698 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12699 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12700 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12701 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12702 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12703 | tmp = 0x0; |
| 12704 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12705 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12706 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12707 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12708 | if (!Check(S, decodeU2ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12709 | return S; |
| 12710 | case 257: |
| 12711 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12712 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12713 | tmp = 0x0; |
| 12714 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12715 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12716 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12717 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12718 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12719 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12720 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12721 | return S; |
| 12722 | case 258: |
| 12723 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12724 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12725 | tmp = 0x0; |
| 12726 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12727 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12728 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12729 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12730 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12731 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12732 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12733 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12734 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12735 | return S; |
| 12736 | case 259: |
| 12737 | tmp = 0x0; |
| 12738 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12739 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12740 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12741 | tmp = 0x0; |
| 12742 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12743 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12744 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12745 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12746 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12747 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12748 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12749 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12750 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12751 | return S; |
| 12752 | case 260: |
| 12753 | tmp = 0x0; |
| 12754 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12755 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12756 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12757 | tmp = 0x0; |
| 12758 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12759 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12760 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12761 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12762 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12763 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12764 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12765 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12766 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12767 | return S; |
| 12768 | case 261: |
| 12769 | tmp = 0x0; |
| 12770 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12771 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12772 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12773 | tmp = 0x0; |
| 12774 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12775 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12776 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12777 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12778 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12779 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12780 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12781 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12782 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12783 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12784 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12785 | return S; |
| 12786 | case 262: |
| 12787 | tmp = fieldFromInstruction(insn, 36, 4); |
| 12788 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12789 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12790 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12791 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12792 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12793 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12794 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12795 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12796 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12797 | return S; |
| 12798 | case 263: |
| 12799 | tmp = 0x0; |
| 12800 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12801 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12802 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12803 | tmp = 0x0; |
| 12804 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12805 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12806 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12807 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12808 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12809 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12810 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12811 | return S; |
| 12812 | case 264: |
| 12813 | tmp = 0x0; |
| 12814 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12815 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12816 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12817 | tmp = 0x0; |
| 12818 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12819 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12820 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12821 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12822 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12823 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12824 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12825 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12826 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12827 | return S; |
| 12828 | case 265: |
| 12829 | tmp = 0x0; |
| 12830 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12831 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12832 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12833 | tmp = 0x0; |
| 12834 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12835 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12836 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12837 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12838 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12839 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12840 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12841 | return S; |
| 12842 | case 266: |
| 12843 | tmp = 0x0; |
| 12844 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12845 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12846 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12847 | tmp = 0x0; |
| 12848 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12849 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12850 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12851 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12852 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12853 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12854 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12855 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12856 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12857 | return S; |
| 12858 | case 267: |
| 12859 | tmp = 0x0; |
| 12860 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12861 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12862 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12863 | tmp = fieldFromInstruction(insn, 32, 4); |
| 12864 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12865 | tmp = fieldFromInstruction(insn, 28, 4); |
| 12866 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12867 | tmp = fieldFromInstruction(insn, 16, 12); |
| 12868 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12869 | return S; |
| 12870 | case 268: |
| 12871 | tmp = 0x0; |
| 12872 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12873 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12874 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12875 | tmp = 0x0; |
| 12876 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12877 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12878 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12879 | tmp = fieldFromInstruction(insn, 16, 16); |
| 12880 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12881 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12882 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12883 | return S; |
| 12884 | case 269: |
| 12885 | tmp = 0x0; |
| 12886 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12887 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12888 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12889 | tmp = 0x0; |
| 12890 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12891 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12892 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12893 | tmp = fieldFromInstruction(insn, 16, 16); |
| 12894 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12895 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12896 | if (!Check(S, decodeU3ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12897 | return S; |
| 12898 | case 270: |
| 12899 | tmp = 0x0; |
| 12900 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12901 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12902 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12903 | tmp = 0x0; |
| 12904 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12905 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12906 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12907 | tmp = fieldFromInstruction(insn, 16, 16); |
| 12908 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12909 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12910 | if (!Check(S, decodeU1ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12911 | return S; |
| 12912 | case 271: |
| 12913 | tmp = 0x0; |
| 12914 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12915 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12916 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12917 | tmp = 0x0; |
| 12918 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12919 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12920 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12921 | tmp = fieldFromInstruction(insn, 16, 16); |
| 12922 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12923 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12924 | if (!Check(S, decodeU2ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12925 | return S; |
| 12926 | case 272: |
| 12927 | tmp = 0x0; |
| 12928 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12929 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12930 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12931 | return S; |
| 12932 | case 273: |
| 12933 | tmp = 0x0; |
| 12934 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12935 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12936 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12937 | tmp = fieldFromInstruction(insn, 16, 16); |
| 12938 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12939 | return S; |
| 12940 | case 274: |
| 12941 | tmp = 0x0; |
| 12942 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12943 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12944 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12945 | tmp = fieldFromInstruction(insn, 16, 16); |
| 12946 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12947 | return S; |
| 12948 | case 275: |
| 12949 | tmp = 0x0; |
| 12950 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12951 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12952 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12953 | tmp = fieldFromInstruction(insn, 16, 16); |
| 12954 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12955 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12956 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12957 | return S; |
| 12958 | case 276: |
| 12959 | tmp = 0x0; |
| 12960 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12961 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12962 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12963 | tmp = fieldFromInstruction(insn, 24, 8); |
| 12964 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12965 | tmp = fieldFromInstruction(insn, 16, 8); |
| 12966 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12967 | return S; |
| 12968 | case 277: |
| 12969 | tmp = 0x0; |
| 12970 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12971 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12972 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12973 | tmp = fieldFromInstruction(insn, 24, 8); |
| 12974 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12975 | tmp = fieldFromInstruction(insn, 16, 8); |
| 12976 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12977 | tmp = fieldFromInstruction(insn, 12, 4); |
| 12978 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12979 | return S; |
| 12980 | case 278: |
| 12981 | tmp = 0x0; |
| 12982 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12983 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12984 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12985 | tmp = 0x0; |
| 12986 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12987 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 12988 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12989 | tmp = fieldFromInstruction(insn, 20, 12); |
| 12990 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12991 | return S; |
| 12992 | case 279: |
| 12993 | tmp = 0x0; |
| 12994 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 12995 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 12996 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 12997 | tmp = 0x0; |
| 12998 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 12999 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13000 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13001 | tmp = fieldFromInstruction(insn, 20, 12); |
| 13002 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13003 | return S; |
| 13004 | case 280: |
| 13005 | tmp = 0x0; |
| 13006 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13007 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13008 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13009 | tmp = 0x0; |
| 13010 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13011 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13012 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13013 | tmp = fieldFromInstruction(insn, 20, 12); |
| 13014 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13015 | return S; |
| 13016 | case 281: |
| 13017 | tmp = 0x0; |
| 13018 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13019 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13020 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13021 | tmp = 0x0; |
| 13022 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13023 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13024 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13025 | tmp = fieldFromInstruction(insn, 20, 12); |
| 13026 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13027 | tmp = fieldFromInstruction(insn, 12, 4); |
| 13028 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13029 | tmp = fieldFromInstruction(insn, 16, 4); |
| 13030 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13031 | return S; |
| 13032 | case 282: |
| 13033 | tmp = 0x0; |
| 13034 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13035 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13036 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13037 | tmp = 0x0; |
| 13038 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13039 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13040 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13041 | tmp = fieldFromInstruction(insn, 16, 16); |
| 13042 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13043 | return S; |
| 13044 | case 283: |
| 13045 | tmp = 0x0; |
| 13046 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13047 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13048 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13049 | tmp = 0x0; |
| 13050 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13051 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13052 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13053 | tmp = fieldFromInstruction(insn, 16, 16); |
| 13054 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13055 | tmp = fieldFromInstruction(insn, 12, 4); |
| 13056 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13057 | return S; |
| 13058 | case 284: |
| 13059 | tmp = 0x0; |
| 13060 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13061 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13062 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13063 | tmp = 0x0; |
| 13064 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13065 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13066 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13067 | return S; |
| 13068 | case 285: |
| 13069 | tmp = 0x0; |
| 13070 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13071 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13072 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13073 | tmp = 0x0; |
| 13074 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13075 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13076 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13077 | tmp = fieldFromInstruction(insn, 12, 4); |
| 13078 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13079 | return S; |
| 13080 | case 286: |
| 13081 | tmp = 0x0; |
| 13082 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13083 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13084 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13085 | tmp = 0x0; |
| 13086 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13087 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13088 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13089 | tmp = fieldFromInstruction(insn, 12, 4); |
| 13090 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13091 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13092 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13093 | return S; |
| 13094 | case 287: |
| 13095 | tmp = 0x0; |
| 13096 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13097 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13098 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13099 | tmp = 0x0; |
| 13100 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13101 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13102 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13103 | tmp = 0x0; |
| 13104 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13105 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13106 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13107 | tmp = fieldFromInstruction(insn, 12, 4); |
| 13108 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13109 | return S; |
| 13110 | case 288: |
| 13111 | tmp = 0x0; |
| 13112 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13113 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13114 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13115 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13116 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13117 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13118 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13119 | return S; |
| 13120 | case 289: |
| 13121 | tmp = 0x0; |
| 13122 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13123 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13124 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13125 | tmp = 0x0; |
| 13126 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13127 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13128 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13129 | tmp = 0x0; |
| 13130 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13131 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13132 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13133 | tmp = 0x0; |
| 13134 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13135 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13136 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13137 | tmp = fieldFromInstruction(insn, 16, 8); |
| 13138 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13139 | return S; |
| 13140 | case 290: |
| 13141 | tmp = 0x0; |
| 13142 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13143 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13144 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13145 | tmp = 0x0; |
| 13146 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13147 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13148 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13149 | tmp = 0x0; |
| 13150 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13151 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13152 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13153 | tmp = 0x0; |
| 13154 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13155 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13156 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13157 | tmp = fieldFromInstruction(insn, 16, 8); |
| 13158 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13159 | tmp = fieldFromInstruction(insn, 12, 4); |
| 13160 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13161 | return S; |
| 13162 | case 291: |
| 13163 | tmp = 0x0; |
| 13164 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13165 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13166 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13167 | tmp = 0x0; |
| 13168 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13169 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13170 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13171 | tmp = 0x0; |
| 13172 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13173 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13174 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13175 | tmp = fieldFromInstruction(insn, 16, 8); |
| 13176 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13177 | return S; |
| 13178 | case 292: |
| 13179 | tmp = 0x0; |
| 13180 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13181 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13182 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13183 | tmp = 0x0; |
| 13184 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13185 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13186 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13187 | tmp = 0x0; |
| 13188 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13189 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13190 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13191 | tmp = fieldFromInstruction(insn, 22, 2) << 2; |
| 13192 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13193 | return S; |
| 13194 | case 293: |
| 13195 | tmp = 0x0; |
| 13196 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13197 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13198 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13199 | tmp = 0x0; |
| 13200 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13201 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13202 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13203 | tmp = 0x0; |
| 13204 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13205 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13206 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13207 | tmp = fieldFromInstruction(insn, 21, 3) << 1; |
| 13208 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13209 | return S; |
| 13210 | case 294: |
| 13211 | tmp = 0x0; |
| 13212 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13213 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13214 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13215 | tmp = 0x0; |
| 13216 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13217 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13218 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13219 | tmp = 0x0; |
| 13220 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13221 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13222 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13223 | tmp = 0x0; |
| 13224 | tmp |= fieldFromInstruction(insn, 20, 1); |
| 13225 | tmp |= fieldFromInstruction(insn, 22, 2) << 2; |
| 13226 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13227 | return S; |
| 13228 | case 295: |
| 13229 | tmp = 0x0; |
| 13230 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13231 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13232 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13233 | tmp = 0x0; |
| 13234 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13235 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13236 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13237 | tmp = 0x0; |
| 13238 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13239 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13240 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13241 | tmp = 0x0; |
| 13242 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13243 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13244 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13245 | tmp = fieldFromInstruction(insn, 16, 8); |
| 13246 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13247 | return S; |
| 13248 | case 296: |
| 13249 | tmp = 0x0; |
| 13250 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13251 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13252 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13253 | tmp = 0x0; |
| 13254 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13255 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13256 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13257 | tmp = 0x0; |
| 13258 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13259 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13260 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13261 | tmp = 0x0; |
| 13262 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13263 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13264 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13265 | return S; |
| 13266 | case 297: |
| 13267 | tmp = 0x0; |
| 13268 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13269 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13270 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13271 | tmp = 0x0; |
| 13272 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13273 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13274 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13275 | tmp = 0x0; |
| 13276 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13277 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13278 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13279 | tmp = 0x0; |
| 13280 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13281 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13282 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13283 | tmp = fieldFromInstruction(insn, 24, 4); |
| 13284 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13285 | return S; |
| 13286 | case 298: |
| 13287 | tmp = 0x0; |
| 13288 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13289 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13290 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13291 | tmp = 0x0; |
| 13292 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13293 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13294 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13295 | tmp = 0x0; |
| 13296 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13297 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13298 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13299 | tmp = 0x0; |
| 13300 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13301 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13302 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13303 | tmp = fieldFromInstruction(insn, 22, 2) << 2; |
| 13304 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13305 | return S; |
| 13306 | case 299: |
| 13307 | tmp = 0x0; |
| 13308 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13309 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13310 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13311 | tmp = 0x0; |
| 13312 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13313 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13314 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13315 | tmp = 0x0; |
| 13316 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13317 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13318 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13319 | tmp = 0x0; |
| 13320 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13321 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13322 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13323 | tmp = fieldFromInstruction(insn, 21, 3) << 1; |
| 13324 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13325 | return S; |
| 13326 | case 300: |
| 13327 | tmp = 0x0; |
| 13328 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13329 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13330 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13331 | tmp = 0x0; |
| 13332 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13333 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13334 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13335 | tmp = 0x0; |
| 13336 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13337 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13338 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13339 | tmp = 0x0; |
| 13340 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13341 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13342 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13343 | tmp = 0x0; |
| 13344 | tmp |= fieldFromInstruction(insn, 20, 1); |
| 13345 | tmp |= fieldFromInstruction(insn, 22, 2) << 2; |
| 13346 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13347 | return S; |
| 13348 | case 301: |
| 13349 | tmp = 0x0; |
| 13350 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13351 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13352 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13353 | tmp = 0x0; |
| 13354 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13355 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13356 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13357 | tmp = 0x0; |
| 13358 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13359 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13360 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13361 | tmp = 0x0; |
| 13362 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13363 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13364 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13365 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13366 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13367 | return S; |
| 13368 | case 302: |
| 13369 | tmp = 0x0; |
| 13370 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13371 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13372 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13373 | tmp = 0x0; |
| 13374 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13375 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13376 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13377 | tmp = 0x0; |
| 13378 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13379 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13380 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13381 | tmp = 0x0; |
| 13382 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13383 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13384 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13385 | tmp = fieldFromInstruction(insn, 24, 4); |
| 13386 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13387 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13388 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13389 | return S; |
| 13390 | case 303: |
| 13391 | tmp = 0x0; |
| 13392 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13393 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13394 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13395 | tmp = 0x0; |
| 13396 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13397 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13398 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13399 | tmp = 0x0; |
| 13400 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13401 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13402 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13403 | tmp = 0x0; |
| 13404 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13405 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13406 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13407 | return S; |
| 13408 | case 304: |
| 13409 | tmp = 0x0; |
| 13410 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13411 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13412 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13413 | tmp = 0x0; |
| 13414 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13415 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13416 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13417 | tmp = 0x0; |
| 13418 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13419 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13420 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13421 | tmp = 0x0; |
| 13422 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13423 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13424 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13425 | return S; |
| 13426 | case 305: |
| 13427 | tmp = 0x0; |
| 13428 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13429 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13430 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13431 | tmp = 0x0; |
| 13432 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13433 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13434 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13435 | tmp = 0x0; |
| 13436 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13437 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13438 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13439 | tmp = 0x0; |
| 13440 | tmp |= fieldFromInstruction(insn, 8, 1) << 4; |
| 13441 | tmp |= fieldFromInstruction(insn, 12, 4); |
| 13442 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13443 | tmp = fieldFromInstruction(insn, 16, 4); |
| 13444 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13445 | tmp = fieldFromInstruction(insn, 24, 4); |
| 13446 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13447 | return S; |
| 13448 | case 306: |
| 13449 | tmp = 0x0; |
| 13450 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13451 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13452 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13453 | tmp = 0x0; |
| 13454 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13455 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13456 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13457 | tmp = 0x0; |
| 13458 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13459 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13460 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13461 | tmp = fieldFromInstruction(insn, 16, 4); |
| 13462 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13463 | return S; |
| 13464 | case 307: |
| 13465 | tmp = 0x0; |
| 13466 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13467 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13468 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13469 | tmp = 0x0; |
| 13470 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13471 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13472 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13473 | tmp = fieldFromInstruction(insn, 16, 3); |
| 13474 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13475 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13476 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13477 | return S; |
| 13478 | case 308: |
| 13479 | tmp = 0x0; |
| 13480 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13481 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13482 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13483 | tmp = 0x0; |
| 13484 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13485 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13486 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13487 | tmp = fieldFromInstruction(insn, 16, 4); |
| 13488 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13489 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13490 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13491 | return S; |
| 13492 | case 309: |
| 13493 | tmp = 0x0; |
| 13494 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13495 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13496 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13497 | tmp = 0x0; |
| 13498 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13499 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13500 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13501 | tmp = fieldFromInstruction(insn, 16, 3); |
| 13502 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13503 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13504 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13505 | return S; |
| 13506 | case 310: |
| 13507 | tmp = 0x0; |
| 13508 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13509 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13510 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13511 | tmp = 0x0; |
| 13512 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13513 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13514 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13515 | tmp = fieldFromInstruction(insn, 12, 4); |
| 13516 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13517 | tmp = fieldFromInstruction(insn, 16, 4); |
| 13518 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13519 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13520 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13521 | return S; |
| 13522 | case 311: |
| 13523 | tmp = 0x0; |
| 13524 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13525 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13526 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13527 | tmp = 0x0; |
| 13528 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13529 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13530 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13531 | return S; |
| 13532 | case 312: |
| 13533 | tmp = 0x0; |
| 13534 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13535 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13536 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13537 | tmp = 0x0; |
| 13538 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13539 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13540 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13541 | return S; |
| 13542 | case 313: |
| 13543 | tmp = 0x0; |
| 13544 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13545 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13546 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13547 | tmp = 0x0; |
| 13548 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13549 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13550 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13551 | tmp = fieldFromInstruction(insn, 16, 3); |
| 13552 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13553 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13554 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13555 | return S; |
| 13556 | case 314: |
| 13557 | tmp = 0x0; |
| 13558 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13559 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13560 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13561 | tmp = 0x0; |
| 13562 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13563 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13564 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13565 | tmp = fieldFromInstruction(insn, 16, 3); |
| 13566 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13567 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13568 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13569 | return S; |
| 13570 | case 315: |
| 13571 | tmp = 0x0; |
| 13572 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13573 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13574 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13575 | tmp = 0x0; |
| 13576 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13577 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13578 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13579 | tmp = fieldFromInstruction(insn, 16, 3); |
| 13580 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13581 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13582 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13583 | return S; |
| 13584 | case 316: |
| 13585 | tmp = 0x0; |
| 13586 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13587 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13588 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13589 | tmp = 0x0; |
| 13590 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13591 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13592 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13593 | return S; |
| 13594 | case 317: |
| 13595 | tmp = 0x0; |
| 13596 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13597 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13598 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13599 | tmp = 0x0; |
| 13600 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13601 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13602 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13603 | return S; |
| 13604 | case 318: |
| 13605 | tmp = 0x0; |
| 13606 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13607 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13608 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13609 | tmp = 0x0; |
| 13610 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13611 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13612 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13613 | tmp = fieldFromInstruction(insn, 12, 4); |
| 13614 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13615 | tmp = fieldFromInstruction(insn, 16, 4); |
| 13616 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13617 | return S; |
| 13618 | case 319: |
| 13619 | tmp = 0x0; |
| 13620 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13621 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13622 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13623 | tmp = 0x0; |
| 13624 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13625 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13626 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13627 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13628 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13629 | return S; |
| 13630 | case 320: |
| 13631 | tmp = 0x0; |
| 13632 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13633 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13634 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13635 | tmp = 0x0; |
| 13636 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13637 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13638 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13639 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13640 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13641 | return S; |
| 13642 | case 321: |
| 13643 | tmp = 0x0; |
| 13644 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13645 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13646 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13647 | tmp = 0x0; |
| 13648 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13649 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13650 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13651 | tmp = 0x0; |
| 13652 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13653 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13654 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13655 | return S; |
| 13656 | case 322: |
| 13657 | tmp = 0x0; |
| 13658 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13659 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13660 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13661 | tmp = 0x0; |
| 13662 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13663 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13664 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13665 | tmp = 0x0; |
| 13666 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13667 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13668 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13669 | return S; |
| 13670 | case 323: |
| 13671 | tmp = 0x0; |
| 13672 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13673 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13674 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13675 | tmp = 0x0; |
| 13676 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13677 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13678 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13679 | tmp = 0x0; |
| 13680 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13681 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13682 | if (!Check(S, DecodeVR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13683 | tmp = fieldFromInstruction(insn, 12, 4); |
| 13684 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13685 | tmp = fieldFromInstruction(insn, 16, 4); |
| 13686 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13687 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13688 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13689 | return S; |
| 13690 | case 324: |
| 13691 | tmp = 0x0; |
| 13692 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13693 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13694 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13695 | tmp = 0x0; |
| 13696 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13697 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13698 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13699 | tmp = 0x0; |
| 13700 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13701 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13702 | if (!Check(S, DecodeVR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13703 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13704 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13705 | return S; |
| 13706 | case 325: |
| 13707 | tmp = 0x0; |
| 13708 | tmp |= fieldFromInstruction(insn, 11, 1) << 4; |
| 13709 | tmp |= fieldFromInstruction(insn, 36, 4); |
| 13710 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13711 | tmp = 0x0; |
| 13712 | tmp |= fieldFromInstruction(insn, 10, 1) << 4; |
| 13713 | tmp |= fieldFromInstruction(insn, 32, 4); |
| 13714 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13715 | tmp = 0x0; |
| 13716 | tmp |= fieldFromInstruction(insn, 9, 1) << 4; |
| 13717 | tmp |= fieldFromInstruction(insn, 28, 4); |
| 13718 | if (!Check(S, DecodeVR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13719 | tmp = fieldFromInstruction(insn, 20, 4); |
| 13720 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13721 | return S; |
| 13722 | case 326: |
| 13723 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13724 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13725 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13726 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13727 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13728 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13729 | tmp = 0x0; |
| 13730 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13731 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13732 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13733 | return S; |
| 13734 | case 327: |
| 13735 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13736 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13737 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13738 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13739 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13740 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13741 | tmp = 0x0; |
| 13742 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13743 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13744 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13745 | return S; |
| 13746 | case 328: |
| 13747 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13748 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13749 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13750 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13751 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13752 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13753 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13754 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13755 | tmp = 0x0; |
| 13756 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13757 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13758 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13759 | return S; |
| 13760 | case 329: |
| 13761 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13762 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13763 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13764 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13765 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13766 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13767 | tmp = 0x0; |
| 13768 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13769 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13770 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13771 | return S; |
| 13772 | case 330: |
| 13773 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13774 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13775 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13776 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13777 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13778 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13779 | tmp = 0x0; |
| 13780 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13781 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13782 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13783 | return S; |
| 13784 | case 331: |
| 13785 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13786 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13787 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13788 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13789 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13790 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13791 | tmp = 0x0; |
| 13792 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13793 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13794 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13795 | return S; |
| 13796 | case 332: |
| 13797 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13798 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13799 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13800 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13801 | tmp = 0x0; |
| 13802 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13803 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13804 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13805 | return S; |
| 13806 | case 333: |
| 13807 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13808 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13809 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13810 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13811 | tmp = 0x0; |
| 13812 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13813 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13814 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13815 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13816 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13817 | return S; |
| 13818 | case 334: |
| 13819 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13820 | if (!Check(S, DecodeCR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13821 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13822 | if (!Check(S, DecodeCR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13823 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13824 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13825 | tmp = 0x0; |
| 13826 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13827 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13828 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13829 | return S; |
| 13830 | case 335: |
| 13831 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13832 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13833 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13834 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13835 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13836 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13837 | tmp = 0x0; |
| 13838 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13839 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13840 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13841 | return S; |
| 13842 | case 336: |
| 13843 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13844 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13845 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13846 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13847 | tmp = 0x0; |
| 13848 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13849 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13850 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13851 | return S; |
| 13852 | case 337: |
| 13853 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13854 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13855 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13856 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13857 | tmp = 0x0; |
| 13858 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13859 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13860 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13861 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13862 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13863 | return S; |
| 13864 | case 338: |
| 13865 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13866 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13867 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13868 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13869 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13870 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13871 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13872 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13873 | tmp = 0x0; |
| 13874 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13875 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13876 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13877 | return S; |
| 13878 | case 339: |
| 13879 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13880 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13881 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13882 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13883 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13884 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13885 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13886 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13887 | tmp = 0x0; |
| 13888 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13889 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13890 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13891 | return S; |
| 13892 | case 340: |
| 13893 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13894 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13895 | tmp = 0x0; |
| 13896 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13897 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13898 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13899 | tmp = fieldFromInstruction(insn, 32, 8); |
| 13900 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13901 | return S; |
| 13902 | case 341: |
| 13903 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13904 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13905 | tmp = 0x0; |
| 13906 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13907 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13908 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13909 | tmp = fieldFromInstruction(insn, 32, 8); |
| 13910 | if (!Check(S, decodeS8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13911 | return S; |
| 13912 | case 342: |
| 13913 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13914 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13915 | tmp = 0x0; |
| 13916 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13917 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13918 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13919 | return S; |
| 13920 | case 343: |
| 13921 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13922 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13923 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13924 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13925 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13926 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13927 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13928 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13929 | tmp = 0x0; |
| 13930 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13931 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13932 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13933 | return S; |
| 13934 | case 344: |
| 13935 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13936 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13937 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13938 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13939 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13940 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13941 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13942 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13943 | tmp = 0x0; |
| 13944 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13945 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13946 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13947 | return S; |
| 13948 | case 345: |
| 13949 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13950 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13951 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13952 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13953 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13954 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13955 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13956 | if (!Check(S, DecodeGR128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13957 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13958 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13959 | tmp = 0x0; |
| 13960 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13961 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13962 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13963 | return S; |
| 13964 | case 346: |
| 13965 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13966 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13967 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13968 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13969 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13970 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13971 | tmp = 0x0; |
| 13972 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13973 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13974 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13975 | return S; |
| 13976 | case 347: |
| 13977 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13978 | if (!Check(S, DecodeAR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13979 | tmp = fieldFromInstruction(insn, 32, 4); |
| 13980 | if (!Check(S, DecodeAR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13981 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13982 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13983 | tmp = 0x0; |
| 13984 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 13985 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 13986 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13987 | return S; |
| 13988 | case 348: |
| 13989 | tmp = fieldFromInstruction(insn, 28, 4); |
| 13990 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13991 | tmp = fieldFromInstruction(insn, 16, 12); |
| 13992 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13993 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13994 | if (!Check(S, decodeLenOperand<4>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13995 | return S; |
| 13996 | case 349: |
| 13997 | tmp = fieldFromInstruction(insn, 36, 4); |
| 13998 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 13999 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14000 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14001 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14002 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14003 | tmp = 0x0; |
| 14004 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14005 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14006 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14007 | return S; |
| 14008 | case 350: |
| 14009 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14010 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14011 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14012 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14013 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14014 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14015 | tmp = 0x0; |
| 14016 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14017 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14018 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14019 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14020 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14021 | return S; |
| 14022 | case 351: |
| 14023 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14024 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14025 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14026 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14027 | tmp = 0x0; |
| 14028 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14029 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14030 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14031 | return S; |
| 14032 | case 352: |
| 14033 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14034 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14035 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14036 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14037 | tmp = 0x0; |
| 14038 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14039 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14040 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14041 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14042 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14043 | return S; |
| 14044 | case 353: |
| 14045 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14046 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14047 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14048 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14049 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14050 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14051 | tmp = 0x0; |
| 14052 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14053 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14054 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14055 | return S; |
| 14056 | case 354: |
| 14057 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14058 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14059 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14060 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14061 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14062 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14063 | tmp = 0x0; |
| 14064 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14065 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14066 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14067 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14068 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14069 | return S; |
| 14070 | case 355: |
| 14071 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14072 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14073 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14074 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14075 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14076 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14077 | tmp = 0x0; |
| 14078 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14079 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14080 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14081 | return S; |
| 14082 | case 356: |
| 14083 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14084 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14085 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14086 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14087 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14088 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14089 | tmp = 0x0; |
| 14090 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14091 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14092 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14093 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14094 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14095 | return S; |
| 14096 | case 357: |
| 14097 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14098 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14099 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14100 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14101 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14102 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14103 | return S; |
| 14104 | case 358: |
| 14105 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14106 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14107 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14108 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14109 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14110 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14111 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14112 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14113 | return S; |
| 14114 | case 359: |
| 14115 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14116 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14117 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14118 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14119 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14120 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14121 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14122 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14123 | return S; |
| 14124 | case 360: |
| 14125 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14126 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14127 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14128 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14129 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14130 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14131 | return S; |
| 14132 | case 361: |
| 14133 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14134 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14135 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14136 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14137 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14138 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14139 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14140 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14141 | return S; |
| 14142 | case 362: |
| 14143 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14144 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14145 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14146 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14147 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14148 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14149 | return S; |
| 14150 | case 363: |
| 14151 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14152 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14153 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14154 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14155 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14156 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14157 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14158 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14159 | return S; |
| 14160 | case 364: |
| 14161 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14162 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14163 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14164 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14165 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14166 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14167 | tmp = fieldFromInstruction(insn, 24, 8); |
| 14168 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14169 | tmp = fieldFromInstruction(insn, 16, 8); |
| 14170 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14171 | return S; |
| 14172 | case 365: |
| 14173 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14174 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14175 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14176 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14177 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14178 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14179 | tmp = fieldFromInstruction(insn, 24, 8); |
| 14180 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14181 | tmp = fieldFromInstruction(insn, 16, 8); |
| 14182 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14183 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14184 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14185 | return S; |
| 14186 | case 366: |
| 14187 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14188 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14189 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14190 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14191 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14192 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14193 | tmp = fieldFromInstruction(insn, 24, 8); |
| 14194 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14195 | tmp = fieldFromInstruction(insn, 16, 8); |
| 14196 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14197 | return S; |
| 14198 | case 367: |
| 14199 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14200 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14201 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14202 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14203 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14204 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14205 | tmp = fieldFromInstruction(insn, 24, 8); |
| 14206 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14207 | tmp = fieldFromInstruction(insn, 16, 8); |
| 14208 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14209 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14210 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14211 | return S; |
| 14212 | case 368: |
| 14213 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14214 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14215 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14216 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14217 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14218 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14219 | tmp = fieldFromInstruction(insn, 24, 8); |
| 14220 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14221 | tmp = fieldFromInstruction(insn, 16, 7); |
| 14222 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14223 | return S; |
| 14224 | case 369: |
| 14225 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14226 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14227 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14228 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14229 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14230 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14231 | tmp = fieldFromInstruction(insn, 24, 8); |
| 14232 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14233 | tmp = fieldFromInstruction(insn, 16, 7); |
| 14234 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14235 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14236 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14237 | return S; |
| 14238 | case 370: |
| 14239 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14240 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14241 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14242 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14243 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14244 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14245 | tmp = fieldFromInstruction(insn, 24, 8); |
| 14246 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14247 | tmp = fieldFromInstruction(insn, 16, 8); |
| 14248 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14249 | return S; |
| 14250 | case 371: |
| 14251 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14252 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14253 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14254 | if (!Check(S, DecodeGRH32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14255 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14256 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14257 | tmp = fieldFromInstruction(insn, 24, 8); |
| 14258 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14259 | tmp = fieldFromInstruction(insn, 16, 8); |
| 14260 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14261 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14262 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14263 | return S; |
| 14264 | case 372: |
| 14265 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14266 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14267 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14268 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14269 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14270 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14271 | return S; |
| 14272 | case 373: |
| 14273 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14274 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14275 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14276 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14277 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14278 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14279 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14280 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14281 | return S; |
| 14282 | case 374: |
| 14283 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14284 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14285 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14286 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14287 | return S; |
| 14288 | case 375: |
| 14289 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14290 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14291 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14292 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14293 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14294 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14295 | return S; |
| 14296 | case 376: |
| 14297 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14298 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14299 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14300 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14301 | return S; |
| 14302 | case 377: |
| 14303 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14304 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14305 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14306 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14307 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14308 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14309 | return S; |
| 14310 | case 378: |
| 14311 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14312 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14313 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14314 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14315 | return S; |
| 14316 | case 379: |
| 14317 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14318 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14319 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14320 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14321 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14322 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14323 | return S; |
| 14324 | case 380: |
| 14325 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14326 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14327 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14328 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14329 | return S; |
| 14330 | case 381: |
| 14331 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14332 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14333 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14334 | if (!Check(S, decodeU16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14335 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14336 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14337 | return S; |
| 14338 | case 382: |
| 14339 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14340 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14341 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14342 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14343 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14344 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14345 | return S; |
| 14346 | case 383: |
| 14347 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14348 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14349 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14350 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14351 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14352 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14353 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14354 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14355 | return S; |
| 14356 | case 384: |
| 14357 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14358 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14359 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14360 | if (!Check(S, decodeS8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14361 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14362 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14363 | return S; |
| 14364 | case 385: |
| 14365 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14366 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14367 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14368 | if (!Check(S, decodeS8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14369 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14370 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14371 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14372 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14373 | return S; |
| 14374 | case 386: |
| 14375 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14376 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14377 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14378 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14379 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14380 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14381 | return S; |
| 14382 | case 387: |
| 14383 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14384 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14385 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14386 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14387 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14388 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14389 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14390 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14391 | return S; |
| 14392 | case 388: |
| 14393 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14394 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14395 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14396 | if (!Check(S, decodeS8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14397 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14398 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14399 | return S; |
| 14400 | case 389: |
| 14401 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14402 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14403 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14404 | if (!Check(S, decodeS8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14405 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14406 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14407 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14408 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14409 | return S; |
| 14410 | case 390: |
| 14411 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14412 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14413 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14414 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14415 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14416 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14417 | return S; |
| 14418 | case 391: |
| 14419 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14420 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14421 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14422 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14423 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14424 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14425 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14426 | if (!Check(S, decodePC16DBLBranchOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14427 | return S; |
| 14428 | case 392: |
| 14429 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14430 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14431 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14432 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14433 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14434 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14435 | return S; |
| 14436 | case 393: |
| 14437 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14438 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14439 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14440 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14441 | tmp = fieldFromInstruction(insn, 16, 16); |
| 14442 | if (!Check(S, decodeS16ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14443 | return S; |
| 14444 | case 394: |
| 14445 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14446 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14447 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14448 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14449 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14450 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14451 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14452 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14453 | return S; |
| 14454 | case 395: |
| 14455 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14456 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14457 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14458 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14459 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14460 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14461 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14462 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14463 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14464 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14465 | return S; |
| 14466 | case 396: |
| 14467 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14468 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14469 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14470 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14471 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14472 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14473 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14474 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14475 | return S; |
| 14476 | case 397: |
| 14477 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14478 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14479 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14480 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14481 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14482 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14483 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14484 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14485 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14486 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14487 | return S; |
| 14488 | case 398: |
| 14489 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14490 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14491 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14492 | if (!Check(S, decodeS8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14493 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14494 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14495 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14496 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14497 | return S; |
| 14498 | case 399: |
| 14499 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14500 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14501 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14502 | if (!Check(S, decodeS8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14503 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14504 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14505 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14506 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14507 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14508 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14509 | return S; |
| 14510 | case 400: |
| 14511 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14512 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14513 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14514 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14515 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14516 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14517 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14518 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14519 | return S; |
| 14520 | case 401: |
| 14521 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14522 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14523 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14524 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14525 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14526 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14527 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14528 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14529 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14530 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14531 | return S; |
| 14532 | case 402: |
| 14533 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14534 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14535 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14536 | if (!Check(S, decodeS8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14537 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14538 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14539 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14540 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14541 | return S; |
| 14542 | case 403: |
| 14543 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14544 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14545 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14546 | if (!Check(S, decodeS8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14547 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14548 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14549 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14550 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14551 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14552 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14553 | return S; |
| 14554 | case 404: |
| 14555 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14556 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14557 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14558 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14559 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14560 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14561 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14562 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14563 | return S; |
| 14564 | case 405: |
| 14565 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14566 | if (!Check(S, DecodeGR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14567 | tmp = fieldFromInstruction(insn, 8, 8); |
| 14568 | if (!Check(S, decodeU8ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14569 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14570 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14571 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14572 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14573 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14574 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14575 | return S; |
| 14576 | case 406: |
| 14577 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14578 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14579 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14580 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14581 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14582 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14583 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14584 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14585 | return S; |
| 14586 | case 407: |
| 14587 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14588 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14589 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14590 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14591 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14592 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14593 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14594 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14595 | return S; |
| 14596 | case 408: |
| 14597 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14598 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14599 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14600 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14601 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14602 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14603 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14604 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14605 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14606 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14607 | return S; |
| 14608 | case 409: |
| 14609 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14610 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14611 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14612 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14613 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14614 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14615 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14616 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14617 | return S; |
| 14618 | case 410: |
| 14619 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14620 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14621 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14622 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14623 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14624 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14625 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14626 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14627 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14628 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14629 | return S; |
| 14630 | case 411: |
| 14631 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14632 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14633 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14634 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14635 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14636 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14637 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14638 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14639 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14640 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14641 | return S; |
| 14642 | case 412: |
| 14643 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14644 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14645 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14646 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14647 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14648 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14649 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14650 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14651 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14652 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14653 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14654 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14655 | return S; |
| 14656 | case 413: |
| 14657 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14658 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14659 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14660 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14661 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14662 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14663 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14664 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14665 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14666 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14667 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14668 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14669 | return S; |
| 14670 | case 414: |
| 14671 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14672 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14673 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14674 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14675 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14676 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14677 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14678 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14679 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14680 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14681 | return S; |
| 14682 | case 415: |
| 14683 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14684 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14685 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14686 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14687 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14688 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14689 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14690 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14691 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14692 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14693 | return S; |
| 14694 | case 416: |
| 14695 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14696 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14697 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14698 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14699 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14700 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14701 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14702 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14703 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14704 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14705 | return S; |
| 14706 | case 417: |
| 14707 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14708 | if (!Check(S, DecodeFP32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14709 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14710 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14711 | tmp = 0x0; |
| 14712 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14713 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14714 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14715 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14716 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14717 | return S; |
| 14718 | case 418: |
| 14719 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14720 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14721 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14722 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14723 | tmp = 0x0; |
| 14724 | tmp |= fieldFromInstruction(insn, 8, 8) << 12; |
| 14725 | tmp |= fieldFromInstruction(insn, 16, 12); |
| 14726 | if (!Check(S, decodeS20ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14727 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14728 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14729 | return S; |
| 14730 | case 419: |
| 14731 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14732 | if (!Check(S, DecodeFP64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14733 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14734 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14735 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14736 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14737 | tmp = fieldFromInstruction(insn, 32, 8); |
| 14738 | if (!Check(S, decodeLenOperand<8>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14739 | tmp = fieldFromInstruction(insn, 8, 4); |
| 14740 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14741 | return S; |
| 14742 | case 420: |
| 14743 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14744 | if (!Check(S, DecodeFP128BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14745 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14746 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14747 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14748 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14749 | tmp = fieldFromInstruction(insn, 32, 8); |
| 14750 | if (!Check(S, decodeLenOperand<8>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14751 | tmp = fieldFromInstruction(insn, 8, 4); |
| 14752 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14753 | return S; |
| 14754 | case 421: |
| 14755 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14756 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14757 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14758 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14759 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14760 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14761 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14762 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14763 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14764 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14765 | tmp = fieldFromInstruction(insn, 0, 12); |
| 14766 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14767 | return S; |
| 14768 | case 422: |
| 14769 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14770 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14771 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14772 | if (!Check(S, DecodeGR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14773 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14774 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14775 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14776 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14777 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14778 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14779 | tmp = fieldFromInstruction(insn, 0, 12); |
| 14780 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14781 | return S; |
| 14782 | case 423: |
| 14783 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14784 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14785 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14786 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14787 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14788 | if (!Check(S, decodeLenOperand<4>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14789 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14790 | if (!Check(S, DecodeADDR32BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14791 | tmp = fieldFromInstruction(insn, 0, 12); |
| 14792 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14793 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14794 | if (!Check(S, decodeU4ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14795 | return S; |
| 14796 | case 424: |
| 14797 | tmp = fieldFromInstruction(insn, 28, 4); |
| 14798 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14799 | tmp = fieldFromInstruction(insn, 16, 12); |
| 14800 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14801 | tmp = fieldFromInstruction(insn, 36, 4); |
| 14802 | if (!Check(S, decodeLenOperand<4>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14803 | tmp = fieldFromInstruction(insn, 12, 4); |
| 14804 | if (!Check(S, DecodeADDR64BitRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14805 | tmp = fieldFromInstruction(insn, 0, 12); |
| 14806 | if (!Check(S, decodeU12ImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14807 | tmp = fieldFromInstruction(insn, 32, 4); |
| 14808 | if (!Check(S, decodeLenOperand<4>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; } |
| 14809 | return S; |
| 14810 | } |
| 14811 | } |
| 14812 | static bool checkDecoderPredicate(unsigned Idx, const FeatureBitset &FB) { |
| 14813 | switch (Idx) { |
| 14814 | default: llvm_unreachable("Invalid index!"); |
| 14815 | case 0: |
| 14816 | return FB[SystemZ::FeatureBEAREnhancement]; |
| 14817 | case 1: |
| 14818 | return FB[SystemZ::FeatureProcessorActivityInstrumentation]; |
| 14819 | case 2: |
| 14820 | return FB[SystemZ::FeatureFPExtension]; |
| 14821 | case 3: |
| 14822 | return FB[SystemZ::FeatureProcessorAssist]; |
| 14823 | case 4: |
| 14824 | return FB[SystemZ::FeatureTransactionalExecution]; |
| 14825 | case 5: |
| 14826 | return FB[SystemZ::FeatureExecutionHint]; |
| 14827 | case 6: |
| 14828 | return FB[SystemZ::FeatureMessageSecurityAssist3]; |
| 14829 | case 7: |
| 14830 | return FB[SystemZ::FeatureMessageSecurityAssist8]; |
| 14831 | case 8: |
| 14832 | return FB[SystemZ::FeatureMessageSecurityAssist4]; |
| 14833 | case 9: |
| 14834 | return FB[SystemZ::FeatureEnhancedSort]; |
| 14835 | case 10: |
| 14836 | return FB[SystemZ::FeatureDeflateConversion]; |
| 14837 | case 11: |
| 14838 | return FB[SystemZ::FeatureMessageSecurityAssist9]; |
| 14839 | case 12: |
| 14840 | return FB[SystemZ::FeatureNNPAssist]; |
| 14841 | case 13: |
| 14842 | return FB[SystemZ::FeatureMessageSecurityAssist5]; |
| 14843 | case 14: |
| 14844 | return FB[SystemZ::FeatureMessageSecurityAssist12]; |
| 14845 | case 15: |
| 14846 | return FB[SystemZ::FeatureMiscellaneousExtensions3]; |
| 14847 | case 16: |
| 14848 | return FB[SystemZ::FeatureMiscellaneousExtensions4]; |
| 14849 | case 17: |
| 14850 | return FB[SystemZ::FeatureResetDATProtection]; |
| 14851 | case 18: |
| 14852 | return FB[SystemZ::FeatureEnhancedDAT2]; |
| 14853 | case 19: |
| 14854 | return FB[SystemZ::FeatureTestPendingExternalInterruption]; |
| 14855 | case 20: |
| 14856 | return FB[SystemZ::FeatureInsertReferenceBitsMultiple]; |
| 14857 | case 21: |
| 14858 | return FB[SystemZ::FeatureResetReferenceBitsMultiple]; |
| 14859 | case 22: |
| 14860 | return FB[SystemZ::FeatureHighWord]; |
| 14861 | case 23: |
| 14862 | return FB[SystemZ::FeatureLoadStoreOnCond2]; |
| 14863 | case 24: |
| 14864 | return FB[SystemZ::FeaturePopulationCount]; |
| 14865 | case 25: |
| 14866 | return FB[SystemZ::FeatureLoadStoreOnCond]; |
| 14867 | case 26: |
| 14868 | return FB[SystemZ::FeatureDistinctOps]; |
| 14869 | case 27: |
| 14870 | return FB[SystemZ::FeatureMiscellaneousExtensions2]; |
| 14871 | case 28: |
| 14872 | return FB[SystemZ::FeatureInterlockedAccess1]; |
| 14873 | case 29: |
| 14874 | return FB[SystemZ::FeatureConcurrentFunctions]; |
| 14875 | case 30: |
| 14876 | return FB[SystemZ::FeatureLoadAndZeroRightmostByte]; |
| 14877 | case 31: |
| 14878 | return FB[SystemZ::FeatureGuardedStorage]; |
| 14879 | case 32: |
| 14880 | return FB[SystemZ::FeatureLoadAndTrap]; |
| 14881 | case 33: |
| 14882 | return FB[SystemZ::FeatureVectorEnhancements2]; |
| 14883 | case 34: |
| 14884 | return FB[SystemZ::FeatureVectorPackedDecimal]; |
| 14885 | case 35: |
| 14886 | return FB[SystemZ::FeatureVectorPackedDecimalEnhancement3]; |
| 14887 | case 36: |
| 14888 | return FB[SystemZ::FeatureVectorPackedDecimalEnhancement]; |
| 14889 | case 37: |
| 14890 | return FB[SystemZ::FeatureVectorPackedDecimalEnhancement2]; |
| 14891 | case 38: |
| 14892 | return FB[SystemZ::FeatureVector] && FB[SystemZ::FeatureNNPAssist]; |
| 14893 | case 39: |
| 14894 | return FB[SystemZ::FeatureVector]; |
| 14895 | case 40: |
| 14896 | return FB[SystemZ::FeatureVectorEnhancements1]; |
| 14897 | case 41: |
| 14898 | return FB[SystemZ::FeatureVectorEnhancements3]; |
| 14899 | case 42: |
| 14900 | return FB[SystemZ::FeatureMiscellaneousExtensions]; |
| 14901 | case 43: |
| 14902 | return FB[SystemZ::FeatureDFPZonedConversion]; |
| 14903 | case 44: |
| 14904 | return FB[SystemZ::FeatureDFPPackedConversion]; |
| 14905 | } |
| 14906 | } |
| 14907 | |
| 14908 | |
| 14909 | template <typename InsnType> |
| 14910 | static DecodeStatus decodeInstruction(const uint8_t DecodeTable[], MCInst &MI, |
| 14911 | InsnType insn, uint64_t Address, |
| 14912 | const MCDisassembler *DisAsm, |
| 14913 | const MCSubtargetInfo &STI) { |
| 14914 | const FeatureBitset &Bits = STI.getFeatureBits(); |
| 14915 | const uint8_t *Ptr = DecodeTable; |
| 14916 | |
| 14917 | SmallVector<const uint8_t *, 8> ScopeStack; |
| 14918 | DecodeStatus S = MCDisassembler::Success; |
| 14919 | while (true) { |
| 14920 | ptrdiff_t Loc = Ptr - DecodeTable; |
| 14921 | const uint8_t DecoderOp = *Ptr++; |
| 14922 | switch (DecoderOp) { |
| 14923 | default: |
| 14924 | errs() << Loc << ": Unexpected decode table opcode: " |
| 14925 | << (int)DecoderOp << '\n'; |
| 14926 | return MCDisassembler::Fail; |
| 14927 | case OPC_Scope: { |
| 14928 | unsigned NumToSkip = decodeULEB128AndIncUnsafe(p&: Ptr); |
| 14929 | const uint8_t *SkipTo = Ptr + NumToSkip; |
| 14930 | ScopeStack.push_back(Elt: SkipTo); |
| 14931 | LLVM_DEBUG(dbgs() << Loc << ": OPC_Scope("<< SkipTo - DecodeTable |
| 14932 | << ")\n"); |
| 14933 | continue; |
| 14934 | } |
| 14935 | case OPC_SwitchField: { |
| 14936 | // Decode the start value. |
| 14937 | unsigned Start = decodeULEB128AndIncUnsafe(p&: Ptr); |
| 14938 | unsigned Len = *Ptr++; |
| 14939 | uint64_t FieldValue = fieldFromInstruction(insn, Start, Len); |
| 14940 | uint64_t CaseValue; |
| 14941 | unsigned CaseSize; |
| 14942 | while (true) { |
| 14943 | CaseValue = decodeULEB128AndIncUnsafe(p&: Ptr); |
| 14944 | CaseSize = decodeULEB128AndIncUnsafe(p&: Ptr); |
| 14945 | if (FieldValue == CaseValue || !CaseSize) |
| 14946 | break; |
| 14947 | Ptr += CaseSize; |
| 14948 | } |
| 14949 | if (FieldValue == CaseValue) { |
| 14950 | LLVM_DEBUG(dbgs() << Loc << ": OPC_SwitchField("<< Start << ", "<< Len |
| 14951 | << "): "<< FieldValue << '\n'); |
| 14952 | continue; |
| 14953 | } |
| 14954 | break; |
| 14955 | } |
| 14956 | case OPC_CheckField: { |
| 14957 | // Decode the start value. |
| 14958 | unsigned Start = decodeULEB128AndIncUnsafe(p&: Ptr); |
| 14959 | unsigned Len = *Ptr; |
| 14960 | uint64_t FieldValue = fieldFromInstruction(insn, Start, Len); |
| 14961 | // Decode the field value. |
| 14962 | unsigned PtrLen = 0; |
| 14963 | uint64_t ExpectedValue = decodeULEB128(p: ++Ptr, n: &PtrLen); |
| 14964 | Ptr += PtrLen; |
| 14965 | bool Failed = ExpectedValue != FieldValue; |
| 14966 | |
| 14967 | LLVM_DEBUG(dbgs() << Loc << ": OPC_CheckField("<< Start << ", "<< Len |
| 14968 | << ", "<< ExpectedValue << "): FieldValue = " |
| 14969 | << FieldValue << ", ExpectedValue = "<< ExpectedValue |
| 14970 | << ": "<< (Failed ? "FAIL, ": "PASS\n");); |
| 14971 | if (!Failed) |
| 14972 | continue; |
| 14973 | break; |
| 14974 | } |
| 14975 | case OPC_CheckPredicate: { |
| 14976 | // Decode the Predicate Index value. |
| 14977 | unsigned PIdx = decodeULEB128AndIncUnsafe(p&: Ptr); |
| 14978 | // Check the predicate. |
| 14979 | bool Failed = !checkDecoderPredicate(Idx: PIdx, FB: Bits); |
| 14980 | |
| 14981 | LLVM_DEBUG(dbgs() << Loc << ": OPC_CheckPredicate("<< PIdx << "): " |
| 14982 | << (Failed ? "FAIL, ": "PASS\n");); |
| 14983 | if (!Failed) |
| 14984 | continue; |
| 14985 | break; |
| 14986 | } |
| 14987 | case OPC_Decode: { |
| 14988 | // Decode the Opcode value. |
| 14989 | unsigned Opc = decodeULEB128AndIncUnsafe(p&: Ptr); |
| 14990 | unsigned DecodeIdx = decodeULEB128AndIncUnsafe(p&: Ptr); |
| 14991 | |
| 14992 | MI.clear(); |
| 14993 | MI.setOpcode(Opc); |
| 14994 | bool DecodeComplete; |
| 14995 | S = decodeToMCInst(DecodeIdx, S, insn, MI, Address, DisAsm, |
| 14996 | DecodeComplete); |
| 14997 | LLVM_DEBUG(dbgs() << Loc << ": OPC_Decode: opcode "<< Opc |
| 14998 | << ", using decoder "<< DecodeIdx << ": " |
| 14999 | << (S ? "PASS, ": "FAIL, ")); |
| 15000 | |
| 15001 | if (DecodeComplete) { |
| 15002 | LLVM_DEBUG(dbgs() << "decoding complete\n"); |
| 15003 | return S; |
| 15004 | } |
| 15005 | assert(S == MCDisassembler::Fail); |
| 15006 | // Reset decode status. This also drops a SoftFail status that could be |
| 15007 | // set before the decode attempt. |
| 15008 | S = MCDisassembler::Success; |
| 15009 | break; |
| 15010 | } |
| 15011 | } |
| 15012 | if (ScopeStack.empty()) { |
| 15013 | LLVM_DEBUG(dbgs() << "returning Fail\n"); |
| 15014 | return MCDisassembler::Fail; |
| 15015 | } |
| 15016 | Ptr = ScopeStack.pop_back_val(); |
| 15017 | LLVM_DEBUG(dbgs() << "continuing at "<< Ptr - DecodeTable << '\n'); |
| 15018 | } |
| 15019 | llvm_unreachable("bogosity detected in disassembler state machine!"); |
| 15020 | } |
| 15021 | |
| 15022 | |
| 15023 | } // namespace |
| 15024 |
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