1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Match Table for SystemZ .insn directive operand types *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9constexpr unsigned MAX_INSN_OPERANDNUM = 7;
10
11struct InsnMatchEntry {
12 StringRef Format;
13 uint64_t Opcode;
14 uint32_t NumOperands;
15 uint32_t NumOptionalOperands;
16 MatchClassKind OperandKinds[MAX_INSN_OPERANDNUM];
17};
18
19struct CompareInsn {
20 bool operator()(const InsnMatchEntry &LHS, StringRef RHS) {
21 return LHS.Format < RHS;
22 }
23 bool operator()(StringRef LHS, const InsnMatchEntry &RHS) {
24 return LHS < RHS.Format;
25 }
26 bool operator()(const InsnMatchEntry &LHS,
27 const InsnMatchEntry &RHS) {
28 return LHS.Format < RHS.Format;
29 }
30};
31
32/* Format, Opcode, NumOperands, NumOptionalOperands, OperandKinds */
33static InsnMatchEntry InsnMatchTable[] = {
34 {.Format: "e", .Opcode: SystemZ::InsnE, .NumOperands: 1, .NumOptionalOperands: 0, .OperandKinds: {MCK_U16Imm}},
35 {.Format: "i", .Opcode: SystemZ::InsnI, .NumOperands: 2, .NumOptionalOperands: 0, .OperandKinds: {MCK_U16Imm, MCK_U8Imm}},
36 {.Format: "ie", .Opcode: SystemZ::InsnIE, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_U4Imm, MCK_U4Imm}},
37 {.Format: "mii", .Opcode: SystemZ::InsnMII, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_U4Imm, MCK_PCRel12, MCK_PCRel24}},
38 {.Format: "ri", .Opcode: SystemZ::InsnRI, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_S16Imm}},
39 {.Format: "ri_a", .Opcode: SystemZ::InsnRIa, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_X16Imm}},
40 {.Format: "ri_b", .Opcode: SystemZ::InsnRIb, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_PCRel16}},
41 {.Format: "ri_c", .Opcode: SystemZ::InsnRIc, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_U4Imm, MCK_PCRel16}},
42 {.Format: "rie", .Opcode: SystemZ::InsnRIE, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_AnyReg, MCK_PCRel16}},
43 {.Format: "rie_a", .Opcode: SystemZ::InsnRIEa, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_X16Imm, MCK_U4Imm}},
44 {.Format: "rie_b", .Opcode: SystemZ::InsnRIEb, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_AnyReg, MCK_U4Imm, MCK_PCRel16}},
45 {.Format: "rie_c", .Opcode: SystemZ::InsnRIEc, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_X8Imm, MCK_U4Imm, MCK_PCRel16}},
46 {.Format: "rie_d", .Opcode: SystemZ::InsnRIEd, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_S16Imm, MCK_AnyReg}},
47 {.Format: "rie_e", .Opcode: SystemZ::InsnRIEe, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_PCRel16, MCK_AnyReg}},
48 {.Format: "rie_f", .Opcode: SystemZ::InsnRIEf, .NumOperands: 6, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_AnyReg, MCK_U8Imm, MCK_U8Imm, MCK_U8Imm}},
49 {.Format: "rie_g", .Opcode: SystemZ::InsnRIEg, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_S16Imm, MCK_U4Imm}},
50 {.Format: "ril", .Opcode: SystemZ::InsnRIL, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_PCRel32}},
51 {.Format: "ril_a", .Opcode: SystemZ::InsnRILa, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_X32Imm}},
52 {.Format: "ril_b", .Opcode: SystemZ::InsnRILb, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_PCRel32}},
53 {.Format: "ril_c", .Opcode: SystemZ::InsnRILc, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_U4Imm, MCK_PCRel32}},
54 {.Format: "rilu", .Opcode: SystemZ::InsnRILU, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_U32Imm}},
55 {.Format: "ris", .Opcode: SystemZ::InsnRIS, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_X8Imm, MCK_U4Imm, MCK_BDAddr64Disp12}},
56 {.Format: "rr", .Opcode: SystemZ::InsnRR, .NumOperands: 3, .NumOptionalOperands: 1, .OperandKinds: {MCK_U16Imm, MCK_AnyReg, MCK_AnyReg}},
57 {.Format: "rrd", .Opcode: SystemZ::InsnRRD, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_AnyReg, MCK_AnyReg}},
58 {.Format: "rre", .Opcode: SystemZ::InsnRRE, .NumOperands: 3, .NumOptionalOperands: 2, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_AnyReg}},
59 {.Format: "rrf", .Opcode: SystemZ::InsnRRF, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_AnyReg, MCK_AnyReg, MCK_U4Imm}},
60 {.Format: "rrf_a", .Opcode: SystemZ::InsnRRFa, .NumOperands: 5, .NumOptionalOperands: 2, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_AnyReg, MCK_AnyReg, MCK_U4Imm}},
61 {.Format: "rrf_b", .Opcode: SystemZ::InsnRRFb, .NumOperands: 5, .NumOptionalOperands: 1, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_AnyReg, MCK_AnyReg, MCK_U4Imm}},
62 {.Format: "rrf_c", .Opcode: SystemZ::InsnRRFc, .NumOperands: 4, .NumOptionalOperands: 1, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_AnyReg, MCK_U4Imm}},
63 {.Format: "rrf_d", .Opcode: SystemZ::InsnRRFd, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_AnyReg, MCK_U4Imm}},
64 {.Format: "rrf_e", .Opcode: SystemZ::InsnRRFe, .NumOperands: 5, .NumOptionalOperands: 1, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_U4Imm, MCK_AnyReg, MCK_U4Imm}},
65 {.Format: "rrs", .Opcode: SystemZ::InsnRRS, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_AnyReg, MCK_U4Imm, MCK_BDAddr64Disp12}},
66 {.Format: "rs", .Opcode: SystemZ::InsnRS, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_AnyReg, MCK_BDAddr64Disp12}},
67 {.Format: "rs_a", .Opcode: SystemZ::InsnRSa, .NumOperands: 4, .NumOptionalOperands: 1, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_BDAddr64Disp12, MCK_AnyReg}},
68 {.Format: "rs_b", .Opcode: SystemZ::InsnRSb, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_BDAddr64Disp12, MCK_U4Imm}},
69 {.Format: "rse", .Opcode: SystemZ::InsnRSE, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_AnyReg, MCK_BDAddr64Disp12}},
70 {.Format: "rsi", .Opcode: SystemZ::InsnRSI, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_AnyReg, MCK_PCRel16}},
71 {.Format: "rsl_a", .Opcode: SystemZ::InsnRSLa, .NumOperands: 2, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDLAddr64Disp12Len4}},
72 {.Format: "rsl_b", .Opcode: SystemZ::InsnRSLb, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_BDLAddr64Disp12Len8, MCK_U4Imm}},
73 {.Format: "rsy", .Opcode: SystemZ::InsnRSY, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_AnyReg, MCK_BDAddr64Disp20}},
74 {.Format: "rsy_a", .Opcode: SystemZ::InsnRSYa, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_BDAddr64Disp20, MCK_AnyReg}},
75 {.Format: "rsy_b", .Opcode: SystemZ::InsnRSYb, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_BDAddr64Disp20, MCK_U4Imm}},
76 {.Format: "rx", .Opcode: SystemZ::InsnRX, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_BDXAddr64Disp12}},
77 {.Format: "rx_a", .Opcode: SystemZ::InsnRXa, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_AnyReg, MCK_BDXAddr64Disp12}},
78 {.Format: "rx_b", .Opcode: SystemZ::InsnRXb, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U32Imm, MCK_U4Imm, MCK_BDXAddr64Disp12}},
79 {.Format: "rxe", .Opcode: SystemZ::InsnRXE, .NumOperands: 4, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_BDXAddr64Disp12, MCK_U4Imm}},
80 {.Format: "rxf", .Opcode: SystemZ::InsnRXF, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_AnyReg, MCK_BDXAddr64Disp12}},
81 {.Format: "rxy", .Opcode: SystemZ::InsnRXY, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_BDXAddr64Disp20}},
82 {.Format: "rxy_a", .Opcode: SystemZ::InsnRXYa, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_BDXAddr64Disp20}},
83 {.Format: "rxy_b", .Opcode: SystemZ::InsnRXYb, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_U4Imm, MCK_BDXAddr64Disp20}},
84 {.Format: "rxy_c", .Opcode: SystemZ::InsnRXYc, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_BDXAddr64Disp20}},
85 {.Format: "s", .Opcode: SystemZ::InsnS, .NumOperands: 2, .NumOptionalOperands: 1, .OperandKinds: {MCK_U32Imm, MCK_BDAddr64Disp12}},
86 {.Format: "si", .Opcode: SystemZ::InsnSI, .NumOperands: 3, .NumOptionalOperands: 1, .OperandKinds: {MCK_U32Imm, MCK_BDAddr64Disp12, MCK_X8Imm}},
87 {.Format: "sil", .Opcode: SystemZ::InsnSIL, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDAddr64Disp12, MCK_X16Imm}},
88 {.Format: "siy", .Opcode: SystemZ::InsnSIY, .NumOperands: 3, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_BDAddr64Disp20, MCK_X8Imm}},
89 {.Format: "smi", .Opcode: SystemZ::InsnSMI, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_U4Imm, MCK_PCRel16, MCK_BDAddr64Disp12}},
90 {.Format: "ss", .Opcode: SystemZ::InsnSS, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDRAddr64Disp12, MCK_BDAddr64Disp12, MCK_AnyReg}},
91 {.Format: "ss_a", .Opcode: SystemZ::InsnSSa, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDLAddr64Disp12Len8, MCK_BDAddr64Disp12}},
92 {.Format: "ss_b", .Opcode: SystemZ::InsnSSb, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDLAddr64Disp12Len4, MCK_BDLAddr64Disp12Len4}},
93 {.Format: "ss_c", .Opcode: SystemZ::InsnSSc, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDLAddr64Disp12Len4, MCK_BDAddr64Disp12, MCK_U4Imm}},
94 {.Format: "ss_d", .Opcode: SystemZ::InsnSSd, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDRAddr64Disp12, MCK_BDAddr64Disp12, MCK_AnyReg}},
95 {.Format: "ss_e", .Opcode: SystemZ::InsnSSe, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_BDAddr64Disp12, MCK_AnyReg, MCK_BDAddr64Disp12}},
96 {.Format: "ss_f", .Opcode: SystemZ::InsnSSf, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDAddr64Disp12, MCK_BDLAddr64Disp12Len8}},
97 {.Format: "sse", .Opcode: SystemZ::InsnSSE, .NumOperands: 3, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDAddr64Disp12, MCK_BDAddr64Disp12}},
98 {.Format: "ssf", .Opcode: SystemZ::InsnSSF, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_BDAddr64Disp12, MCK_BDAddr64Disp12, MCK_AnyReg}},
99 {.Format: "vri", .Opcode: SystemZ::InsnVRI, .NumOperands: 6, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_U12Imm, MCK_U4Imm, MCK_U4Imm}},
100 {.Format: "vri_a", .Opcode: SystemZ::InsnVRIa, .NumOperands: 4, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_X16Imm, MCK_U4Imm}},
101 {.Format: "vri_b", .Opcode: SystemZ::InsnVRIb, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_U8Imm, MCK_U8Imm, MCK_U4Imm}},
102 {.Format: "vri_c", .Opcode: SystemZ::InsnVRIc, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_U16Imm, MCK_VR128, MCK_U4Imm}},
103 {.Format: "vri_d", .Opcode: SystemZ::InsnVRId, .NumOperands: 6, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U8Imm, MCK_U4Imm}},
104 {.Format: "vri_e", .Opcode: SystemZ::InsnVRIe, .NumOperands: 6, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_U12Imm, MCK_U4Imm, MCK_U4Imm}},
105 {.Format: "vri_f", .Opcode: SystemZ::InsnVRIf, .NumOperands: 6, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U8Imm, MCK_U4Imm}},
106 {.Format: "vri_g", .Opcode: SystemZ::InsnVRIg, .NumOperands: 6, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_U8Imm, MCK_U8Imm, MCK_U4Imm}},
107 {.Format: "vri_h", .Opcode: SystemZ::InsnVRIh, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_U16Imm, MCK_U4Imm}},
108 {.Format: "vri_i", .Opcode: SystemZ::InsnVRIi, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_AnyReg, MCK_U8Imm, MCK_U4Imm}},
109 {.Format: "vri_j", .Opcode: SystemZ::InsnVRIj, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_U8Imm, MCK_U4Imm}},
110 {.Format: "vri_k", .Opcode: SystemZ::InsnVRIk, .NumOperands: 6, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U8Imm}},
111 {.Format: "vri_l", .Opcode: SystemZ::InsnVRIl, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_U16Imm}},
112 {.Format: "vrr", .Opcode: SystemZ::InsnVRR, .NumOperands: 7, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm, MCK_U4Imm}},
113 {.Format: "vrr_a", .Opcode: SystemZ::InsnVRRa, .NumOperands: 6, .NumOptionalOperands: 3, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm, MCK_U4Imm}},
114 {.Format: "vrr_b", .Opcode: SystemZ::InsnVRRb, .NumOperands: 6, .NumOptionalOperands: 2, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm}},
115 {.Format: "vrr_c", .Opcode: SystemZ::InsnVRRc, .NumOperands: 7, .NumOptionalOperands: 3, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm, MCK_U4Imm}},
116 {.Format: "vrr_d", .Opcode: SystemZ::InsnVRRd, .NumOperands: 7, .NumOptionalOperands: 2, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm}},
117 {.Format: "vrr_e", .Opcode: SystemZ::InsnVRRe, .NumOperands: 7, .NumOptionalOperands: 2, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm}},
118 {.Format: "vrr_f", .Opcode: SystemZ::InsnVRRf, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_AnyReg, MCK_AnyReg}},
119 {.Format: "vrr_g", .Opcode: SystemZ::InsnVRRg, .NumOperands: 3, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_U16Imm}},
120 {.Format: "vrr_h", .Opcode: SystemZ::InsnVRRh, .NumOperands: 4, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_U4Imm}},
121 {.Format: "vrr_i", .Opcode: SystemZ::InsnVRRi, .NumOperands: 5, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_VR128, MCK_U4Imm, MCK_U4Imm}},
122 {.Format: "vrr_j", .Opcode: SystemZ::InsnVRRj, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm}},
123 {.Format: "vrr_k", .Opcode: SystemZ::InsnVRRk, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_VR128, MCK_U4Imm}},
124 {.Format: "vrs", .Opcode: SystemZ::InsnVRS, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_VR128, MCK_BDAddr64Disp12, MCK_U4Imm}},
125 {.Format: "vrs_a", .Opcode: SystemZ::InsnVRSa, .NumOperands: 5, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_BDAddr64Disp12, MCK_VR128, MCK_U4Imm}},
126 {.Format: "vrs_b", .Opcode: SystemZ::InsnVRSb, .NumOperands: 5, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_BDAddr64Disp12, MCK_AnyReg, MCK_U4Imm}},
127 {.Format: "vrs_c", .Opcode: SystemZ::InsnVRSc, .NumOperands: 5, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_AnyReg, MCK_BDAddr64Disp12, MCK_VR128, MCK_U4Imm}},
128 {.Format: "vrs_d", .Opcode: SystemZ::InsnVRSd, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_BDAddr64Disp12, MCK_AnyReg}},
129 {.Format: "vrv", .Opcode: SystemZ::InsnVRV, .NumOperands: 4, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_BDVAddr64Disp12, MCK_U4Imm}},
130 {.Format: "vrx", .Opcode: SystemZ::InsnVRX, .NumOperands: 4, .NumOptionalOperands: 1, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_BDXAddr64Disp12, MCK_U4Imm}},
131 {.Format: "vsi", .Opcode: SystemZ::InsnVSI, .NumOperands: 4, .NumOptionalOperands: 0, .OperandKinds: {MCK_U48Imm, MCK_VR128, MCK_BDAddr64Disp12, MCK_U8Imm}},
132};
133