1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Register Information Header Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#include "llvm/CodeGen/TargetRegisterInfo.h"
10
11namespace llvm {
12
13class VEFrameLowering;
14
15extern const MCRegisterClassStorage<10, 344, 76, 18, 12, 1> VEMCRegisterClassStorage;
16
17struct VEGenRegisterInfo : public TargetRegisterInfo {
18 explicit VEGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0,
19 unsigned PC = 0, unsigned HwMode = 0);
20 unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override;
21 unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override;
22 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
23 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
24 const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override;
25 const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override;
26 const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override;
27 unsigned getRegUnitWeight(MCRegUnit RegUnit) const override;
28 unsigned getNumRegPressureSets() const override;
29 const char *getRegPressureSetName(unsigned Idx) const override;
30 unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override;
31 const TargetRegisterClass *getLargestRegClassForRegPressureSet(unsigned Idx) const override;
32 const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override;
33 const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override;
34 ArrayRef<const char *> getRegMaskNames() const override;
35 ArrayRef<const uint32_t *> getRegMasks() const override;
36 bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override;
37 bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override;
38 bool isFixedRegister(const MachineFunction &, MCRegister) const override;
39 bool isArgumentRegister(const MachineFunction &, MCRegister) const override;
40 bool isConstantPhysReg(MCRegister PhysReg) const override final;
41 /// Devirtualized TargetFrameLowering.
42 static const VEFrameLowering *getFrameLowering(
43 const MachineFunction &MF);
44 const TargetRegisterClass *getMinimalPhysRegClass(MCRegister Reg) const override;
45};
46
47namespace VE {
48
49// Register classes
50static constexpr const TargetRegisterClass &F32RegClass = VEMCRegisterClassStorage.Classes[0];
51static constexpr const TargetRegisterClass &I32RegClass = VEMCRegisterClassStorage.Classes[1];
52static constexpr const TargetRegisterClass &VLSRegClass = VEMCRegisterClassStorage.Classes[2];
53static constexpr const TargetRegisterClass &I64RegClass = VEMCRegisterClassStorage.Classes[3];
54static constexpr const TargetRegisterClass &MISCRegClass = VEMCRegisterClassStorage.Classes[4];
55static constexpr const TargetRegisterClass &F128RegClass = VEMCRegisterClassStorage.Classes[5];
56static constexpr const TargetRegisterClass &VMRegClass = VEMCRegisterClassStorage.Classes[6];
57static constexpr const TargetRegisterClass &VM512RegClass = VEMCRegisterClassStorage.Classes[7];
58static constexpr const TargetRegisterClass &VM512_with_sub_vm_evenRegClass = VEMCRegisterClassStorage.Classes[8];
59static constexpr const TargetRegisterClass &V64RegClass = VEMCRegisterClassStorage.Classes[9];
60
61} // namespace VE
62
63} // namespace llvm
64