| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
|---|---|
| 2 | |* *| |
| 3 | |* Assembly Matcher Source Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* From: WebAssembly.td *| |
| 7 | |* *| |
| 8 | \*===----------------------------------------------------------------------===*/ |
| 9 | |
| 10 | |
| 11 | #ifdef GET_ASSEMBLER_HEADER |
| 12 | #undef GET_ASSEMBLER_HEADER |
| 13 | // This should be included into the middle of the declaration of |
| 14 | // your subclasses implementation of MCTargetAsmParser. |
| 15 | FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const; |
| 16 | void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
| 17 | const OperandVector &Operands); |
| 18 | void convertToMapAndConstraints(unsigned Kind, |
| 19 | const OperandVector &Operands) override; |
| 20 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
| 21 | MCInst &Inst, |
| 22 | uint64_t &ErrorInfo, |
| 23 | FeatureBitset &MissingFeatures, |
| 24 | bool matchingInlineAsm, |
| 25 | unsigned VariantID = 0); |
| 26 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
| 27 | MCInst &Inst, |
| 28 | uint64_t &ErrorInfo, |
| 29 | bool matchingInlineAsm, |
| 30 | unsigned VariantID = 0) { |
| 31 | FeatureBitset MissingFeatures; |
| 32 | return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, |
| 33 | matchingInlineAsm, VariantID); |
| 34 | } |
| 35 | |
| 36 | #endif // GET_ASSEMBLER_HEADER |
| 37 | |
| 38 | |
| 39 | #ifdef GET_OPERAND_DIAGNOSTIC_TYPES |
| 40 | #undef GET_OPERAND_DIAGNOSTIC_TYPES |
| 41 | |
| 42 | #endif // GET_OPERAND_DIAGNOSTIC_TYPES |
| 43 | |
| 44 | |
| 45 | #ifdef GET_REGISTER_MATCHER |
| 46 | #undef GET_REGISTER_MATCHER |
| 47 | |
| 48 | // Bits for subtarget features that participate in instruction matching. |
| 49 | enum SubtargetFeatureBits : uint8_t { |
| 50 | Feature_HasAtomicsBit = 0, |
| 51 | Feature_HasBulkMemoryBit = 1, |
| 52 | Feature_HasBulkMemoryOptBit = 2, |
| 53 | Feature_HasCallIndirectOverlongBit = 3, |
| 54 | Feature_HasExceptionHandlingBit = 4, |
| 55 | Feature_HasExtendedConstBit = 5, |
| 56 | Feature_HasFP16Bit = 6, |
| 57 | Feature_HasGCBit = 7, |
| 58 | Feature_HasMultiMemoryBit = 8, |
| 59 | Feature_HasMultivalueBit = 9, |
| 60 | Feature_HasMutableGlobalsBit = 10, |
| 61 | Feature_HasNontrappingFPToIntBit = 11, |
| 62 | Feature_NotHasNontrappingFPToIntBit = 18, |
| 63 | Feature_HasReferenceTypesBit = 12, |
| 64 | Feature_HasRelaxedSIMDBit = 13, |
| 65 | Feature_HasSignExtBit = 15, |
| 66 | Feature_HasSIMD128Bit = 14, |
| 67 | Feature_HasTailCallBit = 16, |
| 68 | Feature_HasWideArithmeticBit = 17, |
| 69 | }; |
| 70 | |
| 71 | #endif // GET_REGISTER_MATCHER |
| 72 | |
| 73 | |
| 74 | #ifdef GET_SUBTARGET_FEATURE_NAME |
| 75 | #undef GET_SUBTARGET_FEATURE_NAME |
| 76 | |
| 77 | // User-level names for subtarget features that participate in |
| 78 | // instruction matching. |
| 79 | static const char *getSubtargetFeatureName(uint64_t Val) { |
| 80 | switch(Val) { |
| 81 | case Feature_HasAtomicsBit: return "atomics"; |
| 82 | case Feature_HasBulkMemoryBit: return "bulk-memory"; |
| 83 | case Feature_HasBulkMemoryOptBit: return "bulk-memory-opt"; |
| 84 | case Feature_HasCallIndirectOverlongBit: return "call-indirect-overlong"; |
| 85 | case Feature_HasExceptionHandlingBit: return "exception-handling"; |
| 86 | case Feature_HasExtendedConstBit: return "extended-const"; |
| 87 | case Feature_HasFP16Bit: return "fp16"; |
| 88 | case Feature_HasGCBit: return "gc"; |
| 89 | case Feature_HasMultiMemoryBit: return "multimemory"; |
| 90 | case Feature_HasMultivalueBit: return "multivalue"; |
| 91 | case Feature_HasMutableGlobalsBit: return "mutable-globals"; |
| 92 | case Feature_HasNontrappingFPToIntBit: return "nontrapping-fptoint"; |
| 93 | case Feature_NotHasNontrappingFPToIntBit: return "nontrapping-fptoint"; |
| 94 | case Feature_HasReferenceTypesBit: return "reference-types"; |
| 95 | case Feature_HasRelaxedSIMDBit: return "relaxed-simd"; |
| 96 | case Feature_HasSignExtBit: return "sign-ext"; |
| 97 | case Feature_HasSIMD128Bit: return "simd128"; |
| 98 | case Feature_HasTailCallBit: return "tail-call"; |
| 99 | case Feature_HasWideArithmeticBit: return "wide-arithmetic"; |
| 100 | default: return "(unknown)"; |
| 101 | } |
| 102 | } |
| 103 | |
| 104 | #endif // GET_SUBTARGET_FEATURE_NAME |
| 105 | |
| 106 | |
| 107 | #ifdef GET_MATCHER_IMPLEMENTATION |
| 108 | #undef GET_MATCHER_IMPLEMENTATION |
| 109 | |
| 110 | static const uint8_t TiedAsmOperandTable[][3] = { /* empty */ {0, 0, 0} }; |
| 111 | |
| 112 | namespace { |
| 113 | enum OperatorConversionKind { |
| 114 | CVT_Done, |
| 115 | CVT_Reg, |
| 116 | CVT_Tied, |
| 117 | CVT_imm_95_0, |
| 118 | CVT_95_addImmOperands, |
| 119 | CVT_95_addBrListOperands, |
| 120 | CVT_95_addFPImmf32Operands, |
| 121 | CVT_95_addFPImmf64Operands, |
| 122 | CVT_95_addCatchListOperands, |
| 123 | CVT_NUM_CONVERTERS |
| 124 | }; |
| 125 | |
| 126 | enum InstructionConversionKind { |
| 127 | Convert__imm_95_0, |
| 128 | Convert__Imm1_0, |
| 129 | Convert__BrList1_0, |
| 130 | Convert__Imm1_0__Imm1_1, |
| 131 | Convert_NoOperands, |
| 132 | Convert__imm_95_0__imm_95_0, |
| 133 | Convert__FPImmf321_0, |
| 134 | Convert__Imm1_1__Imm1_0, |
| 135 | Convert__FPImmf641_0, |
| 136 | Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7__Imm1_8__Imm1_9__Imm1_10__Imm1_11__Imm1_12__Imm1_13__Imm1_14__Imm1_15, |
| 137 | Convert__Imm1_0__CatchList1_1, |
| 138 | Convert__FPImmf641_0__FPImmf641_1, |
| 139 | Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3, |
| 140 | Convert__FPImmf321_0__FPImmf321_1__FPImmf321_2__FPImmf321_3, |
| 141 | Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7, |
| 142 | Convert__Imm1_1__Imm1_0__Imm1_2, |
| 143 | CVT_NUM_SIGNATURES |
| 144 | }; |
| 145 | |
| 146 | } // end anonymous namespace |
| 147 | |
| 148 | static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][33] = { |
| 149 | // Convert__imm_95_0 |
| 150 | { CVT_imm_95_0, 0, CVT_Done }, |
| 151 | // Convert__Imm1_0 |
| 152 | { CVT_95_addImmOperands, 1, CVT_Done }, |
| 153 | // Convert__BrList1_0 |
| 154 | { CVT_95_addBrListOperands, 1, CVT_Done }, |
| 155 | // Convert__Imm1_0__Imm1_1 |
| 156 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
| 157 | // Convert_NoOperands |
| 158 | { CVT_Done }, |
| 159 | // Convert__imm_95_0__imm_95_0 |
| 160 | { CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
| 161 | // Convert__FPImmf321_0 |
| 162 | { CVT_95_addFPImmf32Operands, 1, CVT_Done }, |
| 163 | // Convert__Imm1_1__Imm1_0 |
| 164 | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, |
| 165 | // Convert__FPImmf641_0 |
| 166 | { CVT_95_addFPImmf64Operands, 1, CVT_Done }, |
| 167 | // Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7__Imm1_8__Imm1_9__Imm1_10__Imm1_11__Imm1_12__Imm1_13__Imm1_14__Imm1_15 |
| 168 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 7, CVT_95_addImmOperands, 8, CVT_95_addImmOperands, 9, CVT_95_addImmOperands, 10, CVT_95_addImmOperands, 11, CVT_95_addImmOperands, 12, CVT_95_addImmOperands, 13, CVT_95_addImmOperands, 14, CVT_95_addImmOperands, 15, CVT_95_addImmOperands, 16, CVT_Done }, |
| 169 | // Convert__Imm1_0__CatchList1_1 |
| 170 | { CVT_95_addImmOperands, 1, CVT_95_addCatchListOperands, 2, CVT_Done }, |
| 171 | // Convert__FPImmf641_0__FPImmf641_1 |
| 172 | { CVT_95_addFPImmf64Operands, 1, CVT_95_addFPImmf64Operands, 2, CVT_Done }, |
| 173 | // Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3 |
| 174 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
| 175 | // Convert__FPImmf321_0__FPImmf321_1__FPImmf321_2__FPImmf321_3 |
| 176 | { CVT_95_addFPImmf32Operands, 1, CVT_95_addFPImmf32Operands, 2, CVT_95_addFPImmf32Operands, 3, CVT_95_addFPImmf32Operands, 4, CVT_Done }, |
| 177 | // Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7 |
| 178 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, |
| 179 | // Convert__Imm1_1__Imm1_0__Imm1_2 |
| 180 | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 3, CVT_Done }, |
| 181 | }; |
| 182 | |
| 183 | void WebAssemblyAsmParser:: |
| 184 | convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
| 185 | const OperandVector &Operands) { |
| 186 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
| 187 | const uint8_t *Converter = ConversionTable[Kind]; |
| 188 | Inst.setOpcode(Opcode); |
| 189 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 190 | unsigned OpIdx = *(p + 1); |
| 191 | switch (*p) { |
| 192 | default: llvm_unreachable("invalid conversion entry!"); |
| 193 | case CVT_Reg: |
| 194 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
| 195 | break; |
| 196 | case CVT_Tied: { |
| 197 | assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) - |
| 198 | std::begin(TiedAsmOperandTable)) && |
| 199 | "Tied operand not found"); |
| 200 | unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0]; |
| 201 | if (TiedResOpnd != (uint8_t)-1) |
| 202 | Inst.addOperand(Inst.getOperand(TiedResOpnd)); |
| 203 | break; |
| 204 | } |
| 205 | case CVT_imm_95_0: |
| 206 | Inst.addOperand(MCOperand::createImm(0)); |
| 207 | break; |
| 208 | case CVT_95_addImmOperands: |
| 209 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1); |
| 210 | break; |
| 211 | case CVT_95_addBrListOperands: |
| 212 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addBrListOperands(Inst, 1); |
| 213 | break; |
| 214 | case CVT_95_addFPImmf32Operands: |
| 215 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addFPImmf32Operands(Inst, 1); |
| 216 | break; |
| 217 | case CVT_95_addFPImmf64Operands: |
| 218 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addFPImmf64Operands(Inst, 1); |
| 219 | break; |
| 220 | case CVT_95_addCatchListOperands: |
| 221 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addCatchListOperands(Inst, 1); |
| 222 | break; |
| 223 | } |
| 224 | } |
| 225 | } |
| 226 | |
| 227 | void WebAssemblyAsmParser:: |
| 228 | convertToMapAndConstraints(unsigned Kind, |
| 229 | const OperandVector &Operands) { |
| 230 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
| 231 | unsigned NumMCOperands = 0; |
| 232 | const uint8_t *Converter = ConversionTable[Kind]; |
| 233 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 234 | switch (*p) { |
| 235 | default: llvm_unreachable("invalid conversion entry!"); |
| 236 | case CVT_Reg: |
| 237 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 238 | Operands[*(p + 1)]->setConstraint("r"); |
| 239 | ++NumMCOperands; |
| 240 | break; |
| 241 | case CVT_Tied: |
| 242 | ++NumMCOperands; |
| 243 | break; |
| 244 | case CVT_imm_95_0: |
| 245 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 246 | Operands[*(p + 1)]->setConstraint(""); |
| 247 | ++NumMCOperands; |
| 248 | break; |
| 249 | case CVT_95_addImmOperands: |
| 250 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 251 | Operands[*(p + 1)]->setConstraint("m"); |
| 252 | NumMCOperands += 1; |
| 253 | break; |
| 254 | case CVT_95_addBrListOperands: |
| 255 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 256 | Operands[*(p + 1)]->setConstraint("m"); |
| 257 | NumMCOperands += 1; |
| 258 | break; |
| 259 | case CVT_95_addFPImmf32Operands: |
| 260 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 261 | Operands[*(p + 1)]->setConstraint("m"); |
| 262 | NumMCOperands += 1; |
| 263 | break; |
| 264 | case CVT_95_addFPImmf64Operands: |
| 265 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 266 | Operands[*(p + 1)]->setConstraint("m"); |
| 267 | NumMCOperands += 1; |
| 268 | break; |
| 269 | case CVT_95_addCatchListOperands: |
| 270 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 271 | Operands[*(p + 1)]->setConstraint("m"); |
| 272 | NumMCOperands += 1; |
| 273 | break; |
| 274 | } |
| 275 | } |
| 276 | } |
| 277 | |
| 278 | namespace { |
| 279 | |
| 280 | /// MatchClassKind - The kinds of classes which participate in |
| 281 | /// instruction matching. |
| 282 | enum MatchClassKind { |
| 283 | InvalidMatchClass = 0, |
| 284 | OptionalMatchClass = 1, |
| 285 | MCK_LAST_TOKEN = OptionalMatchClass, |
| 286 | MCK_EXNREF, // register class 'EXNREF' |
| 287 | MCK_EXTERNREF, // register class 'EXTERNREF' |
| 288 | MCK_F32, // register class 'F32' |
| 289 | MCK_F64, // register class 'F64' |
| 290 | MCK_FUNCREF, // register class 'FUNCREF' |
| 291 | MCK_V128, // register class 'V128' |
| 292 | MCK_I32, // register class 'I32' |
| 293 | MCK_I64, // register class 'I64' |
| 294 | MCK_LAST_REGISTER = MCK_I64, |
| 295 | MCK_RegByHwMode_wasm_ptr_rc, // register class by hwmode |
| 296 | MCK_LAST_REGCLASS_BY_HWMODE = MCK_RegByHwMode_wasm_ptr_rc, |
| 297 | MCK_BrList, // user defined class 'BrListAsmOperand' |
| 298 | MCK_CatchList, // user defined class 'CatchListAsmOperand' |
| 299 | MCK_Imm, // user defined class 'ImmAsmOperand' |
| 300 | MCK_FPImmf32, // user defined class 'anonymous_14570' |
| 301 | MCK_FPImmf64, // user defined class 'anonymous_14571' |
| 302 | NumMatchClassKinds |
| 303 | }; |
| 304 | |
| 305 | } // end anonymous namespace |
| 306 | |
| 307 | static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { |
| 308 | return MCTargetAsmParser::Match_InvalidOperand; |
| 309 | } |
| 310 | |
| 311 | static MatchClassKind matchTokenString(StringRef Name) { |
| 312 | return InvalidMatchClass; |
| 313 | } |
| 314 | |
| 315 | /// isSubclass - Compute whether \p A is a subclass of \p B. |
| 316 | static bool isSubclass(MatchClassKind A, MatchClassKind B) { |
| 317 | if (A == B) |
| 318 | return true; |
| 319 | |
| 320 | [[maybe_unused]] static constexpr struct { |
| 321 | uint32_t Offset; |
| 322 | uint16_t Start; |
| 323 | uint16_t Length; |
| 324 | } Table[] = { |
| 325 | {0, 0, 0}, |
| 326 | {0, 0, 0}, |
| 327 | {0, 0, 0}, |
| 328 | {0, 0, 0}, |
| 329 | {0, 0, 0}, |
| 330 | {0, 0, 0}, |
| 331 | {0, 0, 0}, |
| 332 | {0, 0, 0}, |
| 333 | {0, 0, 0}, |
| 334 | {0, 0, 0}, |
| 335 | {0, 0, 0}, |
| 336 | {0, 0, 0}, |
| 337 | {0, 0, 0}, |
| 338 | {0, 0, 0}, |
| 339 | {0, 0, 0}, |
| 340 | {0, 0, 0}, |
| 341 | }; |
| 342 | |
| 343 | return false; |
| 344 | } |
| 345 | |
| 346 | static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind, const MCSubtargetInfo &STI) { |
| 347 | WebAssemblyOperand &Operand = (WebAssemblyOperand &)GOp; |
| 348 | if (Kind == InvalidMatchClass) |
| 349 | return MCTargetAsmParser::Match_InvalidOperand; |
| 350 | |
| 351 | if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) |
| 352 | return isSubclass(matchTokenString(Operand.getToken()), Kind) ? |
| 353 | MCTargetAsmParser::Match_Success : |
| 354 | MCTargetAsmParser::Match_InvalidOperand; |
| 355 | |
| 356 | switch (Kind) { |
| 357 | default: break; |
| 358 | case MCK_BrList: { |
| 359 | DiagnosticPredicate DP(Operand.isBrList()); |
| 360 | if (DP.isMatch()) |
| 361 | return MCTargetAsmParser::Match_Success; |
| 362 | break; |
| 363 | } |
| 364 | case MCK_CatchList: { |
| 365 | DiagnosticPredicate DP(Operand.isCatchList()); |
| 366 | if (DP.isMatch()) |
| 367 | return MCTargetAsmParser::Match_Success; |
| 368 | break; |
| 369 | } |
| 370 | case MCK_Imm: { |
| 371 | DiagnosticPredicate DP(Operand.isImm()); |
| 372 | if (DP.isMatch()) |
| 373 | return MCTargetAsmParser::Match_Success; |
| 374 | break; |
| 375 | } |
| 376 | case MCK_FPImmf32: { |
| 377 | DiagnosticPredicate DP(Operand.isFPImm()); |
| 378 | if (DP.isMatch()) |
| 379 | return MCTargetAsmParser::Match_Success; |
| 380 | break; |
| 381 | } |
| 382 | case MCK_FPImmf64: { |
| 383 | DiagnosticPredicate DP(Operand.isFPImm()); |
| 384 | if (DP.isMatch()) |
| 385 | return MCTargetAsmParser::Match_Success; |
| 386 | break; |
| 387 | } |
| 388 | } // end switch (Kind) |
| 389 | |
| 390 | if (Operand.isReg() && Kind > MCK_LAST_REGISTER && Kind <= MCK_LAST_REGCLASS_BY_HWMODE) { |
| 391 | static constexpr MatchClassKind RegClassByHwModeMatchTable[2][1] = { |
| 392 | { // DefaultMode |
| 393 | MCK_I32, // wasm_ptr_rc |
| 394 | }, |
| 395 | { // WASM64 |
| 396 | MCK_I64, // wasm_ptr_rc |
| 397 | }, |
| 398 | }; |
| 399 | |
| 400 | static_assert(MCK_LAST_REGCLASS_BY_HWMODE - MCK_LAST_REGISTER == 1); |
| 401 | const unsigned HwMode = STI.getHwMode(MCSubtargetInfo::HwMode_RegInfo); |
| 402 | Kind = RegClassByHwModeMatchTable[HwMode][Kind - (MCK_LAST_REGISTER + 1)]; |
| 403 | } |
| 404 | |
| 405 | if (Operand.isReg()) { |
| 406 | static constexpr uint16_t Table[WebAssembly::NUM_TARGET_REGS] = { |
| 407 | InvalidMatchClass, |
| 408 | InvalidMatchClass, |
| 409 | InvalidMatchClass, |
| 410 | MCK_EXNREF, |
| 411 | MCK_EXTERNREF, |
| 412 | MCK_I32, |
| 413 | MCK_I64, |
| 414 | MCK_FUNCREF, |
| 415 | MCK_I32, |
| 416 | MCK_I64, |
| 417 | MCK_F32, |
| 418 | MCK_F64, |
| 419 | MCK_I32, |
| 420 | MCK_I64, |
| 421 | MCK_V128, |
| 422 | }; |
| 423 | |
| 424 | MCRegister Reg = Operand.getReg(); |
| 425 | MatchClassKind OpKind = Reg.isPhysical() ? (MatchClassKind)Table[Reg.id()] : InvalidMatchClass; |
| 426 | return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : |
| 427 | getDiagKindFromRegisterClass(Kind); |
| 428 | } |
| 429 | |
| 430 | if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) |
| 431 | return getDiagKindFromRegisterClass(Kind); |
| 432 | |
| 433 | return MCTargetAsmParser::Match_InvalidOperand; |
| 434 | } |
| 435 | |
| 436 | #ifndef NDEBUG |
| 437 | const char *getMatchClassName(MatchClassKind Kind) { |
| 438 | switch (Kind) { |
| 439 | case InvalidMatchClass: return "InvalidMatchClass"; |
| 440 | case OptionalMatchClass: return "OptionalMatchClass"; |
| 441 | case MCK_EXNREF: return "MCK_EXNREF"; |
| 442 | case MCK_EXTERNREF: return "MCK_EXTERNREF"; |
| 443 | case MCK_F32: return "MCK_F32"; |
| 444 | case MCK_F64: return "MCK_F64"; |
| 445 | case MCK_FUNCREF: return "MCK_FUNCREF"; |
| 446 | case MCK_V128: return "MCK_V128"; |
| 447 | case MCK_I32: return "MCK_I32"; |
| 448 | case MCK_I64: return "MCK_I64"; |
| 449 | case MCK_RegByHwMode_wasm_ptr_rc: return "MCK_RegByHwMode_wasm_ptr_rc"; |
| 450 | case MCK_BrList: return "MCK_BrList"; |
| 451 | case MCK_CatchList: return "MCK_CatchList"; |
| 452 | case MCK_Imm: return "MCK_Imm"; |
| 453 | case MCK_FPImmf32: return "MCK_FPImmf32"; |
| 454 | case MCK_FPImmf64: return "MCK_FPImmf64"; |
| 455 | case NumMatchClassKinds: return "NumMatchClassKinds"; |
| 456 | } |
| 457 | llvm_unreachable("unhandled MatchClassKind!"); |
| 458 | } |
| 459 | |
| 460 | #endif // NDEBUG |
| 461 | FeatureBitset WebAssemblyAsmParser:: |
| 462 | ComputeAvailableFeatures(const FeatureBitset &FB) const { |
| 463 | FeatureBitset Features; |
| 464 | if (FB[WebAssembly::FeatureAtomics]) |
| 465 | Features.set(Feature_HasAtomicsBit); |
| 466 | if (FB[WebAssembly::FeatureBulkMemory]) |
| 467 | Features.set(Feature_HasBulkMemoryBit); |
| 468 | if (FB[WebAssembly::FeatureBulkMemoryOpt]) |
| 469 | Features.set(Feature_HasBulkMemoryOptBit); |
| 470 | if (FB[WebAssembly::FeatureCallIndirectOverlong]) |
| 471 | Features.set(Feature_HasCallIndirectOverlongBit); |
| 472 | if (FB[WebAssembly::FeatureExceptionHandling]) |
| 473 | Features.set(Feature_HasExceptionHandlingBit); |
| 474 | if (FB[WebAssembly::FeatureExtendedConst]) |
| 475 | Features.set(Feature_HasExtendedConstBit); |
| 476 | if (FB[WebAssembly::FeatureFP16]) |
| 477 | Features.set(Feature_HasFP16Bit); |
| 478 | if (FB[WebAssembly::FeatureGC]) |
| 479 | Features.set(Feature_HasGCBit); |
| 480 | if (FB[WebAssembly::FeatureMultiMemory]) |
| 481 | Features.set(Feature_HasMultiMemoryBit); |
| 482 | if (FB[WebAssembly::FeatureMultivalue]) |
| 483 | Features.set(Feature_HasMultivalueBit); |
| 484 | if (FB[WebAssembly::FeatureMutableGlobals]) |
| 485 | Features.set(Feature_HasMutableGlobalsBit); |
| 486 | if (FB[WebAssembly::FeatureNontrappingFPToInt]) |
| 487 | Features.set(Feature_HasNontrappingFPToIntBit); |
| 488 | if (!FB[WebAssembly::FeatureNontrappingFPToInt]) |
| 489 | Features.set(Feature_NotHasNontrappingFPToIntBit); |
| 490 | if (FB[WebAssembly::FeatureReferenceTypes]) |
| 491 | Features.set(Feature_HasReferenceTypesBit); |
| 492 | if (FB[WebAssembly::FeatureRelaxedSIMD]) |
| 493 | Features.set(Feature_HasRelaxedSIMDBit); |
| 494 | if (FB[WebAssembly::FeatureSignExt]) |
| 495 | Features.set(Feature_HasSignExtBit); |
| 496 | if (FB[WebAssembly::FeatureSIMD128] || FB[WebAssembly::FeatureRelaxedSIMD]) |
| 497 | Features.set(Feature_HasSIMD128Bit); |
| 498 | if (FB[WebAssembly::FeatureTailCall]) |
| 499 | Features.set(Feature_HasTailCallBit); |
| 500 | if (FB[WebAssembly::FeatureWideArithmetic]) |
| 501 | Features.set(Feature_HasWideArithmeticBit); |
| 502 | return Features; |
| 503 | } |
| 504 | |
| 505 | static bool checkAsmTiedOperandConstraints(const WebAssemblyAsmParser&AsmParser, |
| 506 | unsigned Kind, const OperandVector &Operands, |
| 507 | uint64_t &ErrorInfo) { |
| 508 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
| 509 | const uint8_t *Converter = ConversionTable[Kind]; |
| 510 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 511 | switch (*p) { |
| 512 | case CVT_Tied: { |
| 513 | unsigned OpIdx = *(p + 1); |
| 514 | assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - |
| 515 | std::begin(TiedAsmOperandTable)) && |
| 516 | "Tied operand not found"); |
| 517 | unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; |
| 518 | unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; |
| 519 | if (OpndNum1 != OpndNum2) { |
| 520 | auto &SrcOp1 = Operands[OpndNum1]; |
| 521 | auto &SrcOp2 = Operands[OpndNum2]; |
| 522 | if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) { |
| 523 | ErrorInfo = OpndNum2; |
| 524 | return false; |
| 525 | } |
| 526 | } |
| 527 | break; |
| 528 | } |
| 529 | default: |
| 530 | break; |
| 531 | } |
| 532 | } |
| 533 | return true; |
| 534 | } |
| 535 | |
| 536 | static const char MnemonicTable[] = |
| 537 | "\014atomic.fence\005block\002br\005br_if\010br_table\004call\015call_in" |
| 538 | "direct\013call_params\014call_results\005catch\tcatch_all\010catchret\n" |
| 539 | "cleanupret\016compiler_fence\tdata.drop\010delegate\004drop\004else\003" |
| 540 | "end\tend_block\014end_function\006end_if\010end_loop\007end_try\015end_" |
| 541 | "try_table\015exnref.select\020externref.select\tf16x8.abs\tf16x8.add\nf" |
| 542 | "16x8.ceil\025f16x8.convert_i16x8_s\025f16x8.convert_i16x8_u\tf16x8.div\010" |
| 543 | "f16x8.eq\022f16x8.extract_lane\013f16x8.floor\010f16x8.ge\010f16x8.gt\010" |
| 544 | "f16x8.le\010f16x8.lt\nf16x8.madd\tf16x8.max\tf16x8.min\tf16x8.mul\010f1" |
| 545 | "6x8.ne\015f16x8.nearest\tf16x8.neg\013f16x8.nmadd\nf16x8.pmax\nf16x8.pm" |
| 546 | "in\022f16x8.replace_lane\013f16x8.splat\nf16x8.sqrt\tf16x8.sub\013f16x8" |
| 547 | ".trunc\007f32.abs\007f32.add\010f32.ceil\tf32.const\021f32.convert_i32_" |
| 548 | "s\021f32.convert_i32_u\021f32.convert_i64_s\021f32.convert_i64_u\014f32" |
| 549 | ".copysign\016f32.demote_f64\007f32.div\006f32.eq\tf32.floor\006f32.ge\006" |
| 550 | "f32.gt\006f32.le\010f32.load\014f32.load_f16\006f32.lt\007f32.max\007f3" |
| 551 | "2.min\007f32.mul\006f32.ne\013f32.nearest\007f32.neg\023f32.reinterpret" |
| 552 | "_i32\nf32.select\010f32.sqrt\tf32.store\015f32.store_f16\007f32.sub\tf3" |
| 553 | "2.trunc\tf32x4.abs\tf32x4.add\nf32x4.ceil\025f32x4.convert_i32x4_s\025f" |
| 554 | "32x4.convert_i32x4_u\027f32x4.demote_f64x2_zero\tf32x4.div\010f32x4.eq\022" |
| 555 | "f32x4.extract_lane\013f32x4.floor\010f32x4.ge\010f32x4.gt\010f32x4.le\010" |
| 556 | "f32x4.lt\tf32x4.max\tf32x4.min\tf32x4.mul\010f32x4.ne\015f32x4.nearest\t" |
| 557 | "f32x4.neg\nf32x4.pmax\nf32x4.pmin f32x4.relaxed_dot_bf16x8_add_f32\022f" |
| 558 | "32x4.relaxed_madd\021f32x4.relaxed_max\021f32x4.relaxed_min\023f32x4.re" |
| 559 | "laxed_nmadd\022f32x4.replace_lane\013f32x4.splat\nf32x4.sqrt\tf32x4.sub" |
| 560 | "\013f32x4.trunc\007f64.abs\007f64.add\010f64.ceil\tf64.const\021f64.con" |
| 561 | "vert_i32_s\021f64.convert_i32_u\021f64.convert_i64_s\021f64.convert_i64" |
| 562 | "_u\014f64.copysign\007f64.div\006f64.eq\tf64.floor\006f64.ge\006f64.gt\006" |
| 563 | "f64.le\010f64.load\006f64.lt\007f64.max\007f64.min\007f64.mul\006f64.ne" |
| 564 | "\013f64.nearest\007f64.neg\017f64.promote_f32\023f64.reinterpret_i64\nf" |
| 565 | "64.select\010f64.sqrt\tf64.store\007f64.sub\tf64.trunc\tf64x2.abs\tf64x" |
| 566 | "2.add\nf64x2.ceil\031f64x2.convert_low_i32x4_s\031f64x2.convert_low_i32" |
| 567 | "x4_u\tf64x2.div\010f64x2.eq\022f64x2.extract_lane\013f64x2.floor\010f64" |
| 568 | "x2.ge\010f64x2.gt\010f64x2.le\010f64x2.lt\tf64x2.max\tf64x2.min\tf64x2." |
| 569 | "mul\010f64x2.ne\015f64x2.nearest\tf64x2.neg\nf64x2.pmax\nf64x2.pmin\027" |
| 570 | "f64x2.promote_low_f32x4\022f64x2.relaxed_madd\021f64x2.relaxed_max\021f" |
| 571 | "64x2.relaxed_min\023f64x2.relaxed_nmadd\022f64x2.replace_lane\013f64x2." |
| 572 | "splat\nf64x2.sqrt\tf64x2.sub\013f64x2.trunc\016funcref.select\nglobal.g" |
| 573 | "et\nglobal.set\ti16x8.abs\ti16x8.add\017i16x8.add_sat_s\017i16x8.add_sa" |
| 574 | "t_u\016i16x8.all_true\014i16x8.avgr_u\015i16x8.bitmask\010i16x8.eq\035i" |
| 575 | "16x8.extadd_pairwise_i8x16_s\035i16x8.extadd_pairwise_i8x16_u\031i16x8." |
| 576 | "extend_high_i8x16_s\031i16x8.extend_high_i8x16_u\030i16x8.extend_low_i8" |
| 577 | "x16_s\030i16x8.extend_low_i8x16_u\031i16x8.extmul_high_i8x16_s\031i16x8" |
| 578 | ".extmul_high_i8x16_u\030i16x8.extmul_low_i8x16_s\030i16x8.extmul_low_i8" |
| 579 | "x16_u\024i16x8.extract_lane_s\024i16x8.extract_lane_u\ni16x8.ge_s\ni16x" |
| 580 | "8.ge_u\ni16x8.gt_s\ni16x8.gt_u\ni16x8.le_s\ni16x8.le_u\017i16x8.load8x8" |
| 581 | "_s\017i16x8.load8x8_u\ni16x8.lt_s\ni16x8.lt_u\013i16x8.max_s\013i16x8.m" |
| 582 | "ax_u\013i16x8.min_s\013i16x8.min_u\ti16x8.mul\024i16x8.narrow_i32x4_s\024" |
| 583 | "i16x8.narrow_i32x4_u\010i16x8.ne\ti16x8.neg\023i16x8.q15mulr_sat_s\037i" |
| 584 | "16x8.relaxed_dot_i8x16_i7x16_s\030i16x8.relaxed_laneselect\027i16x8.rel" |
| 585 | "axed_q15mulr_s\022i16x8.replace_lane\ti16x8.shl\013i16x8.shr_s\013i16x8" |
| 586 | ".shr_u\013i16x8.splat\ti16x8.sub\017i16x8.sub_sat_s\017i16x8.sub_sat_u\027" |
| 587 | "i16x8.trunc_sat_f16x8_s\027i16x8.trunc_sat_f16x8_u\007i32.add\007i32.an" |
| 588 | "d\017i32.atomic.load\023i32.atomic.load16_u\022i32.atomic.load8_u\022i3" |
| 589 | "2.atomic.rmw.add\022i32.atomic.rmw.and\026i32.atomic.rmw.cmpxchg\021i32" |
| 590 | ".atomic.rmw.or\022i32.atomic.rmw.sub\023i32.atomic.rmw.xchg\022i32.atom" |
| 591 | "ic.rmw.xor\026i32.atomic.rmw16.add_u\026i32.atomic.rmw16.and_u\032i32.a" |
| 592 | "tomic.rmw16.cmpxchg_u\025i32.atomic.rmw16.or_u\026i32.atomic.rmw16.sub_" |
| 593 | "u\027i32.atomic.rmw16.xchg_u\026i32.atomic.rmw16.xor_u\025i32.atomic.rm" |
| 594 | "w8.add_u\025i32.atomic.rmw8.and_u\031i32.atomic.rmw8.cmpxchg_u\024i32.a" |
| 595 | "tomic.rmw8.or_u\025i32.atomic.rmw8.sub_u\026i32.atomic.rmw8.xchg_u\025i" |
| 596 | "32.atomic.rmw8.xor_u\020i32.atomic.store\022i32.atomic.store16\021i32.a" |
| 597 | "tomic.store8\007i32.clz\ti32.const\007i32.ctz\ti32.div_s\ti32.div_u\006" |
| 598 | "i32.eq\007i32.eqz\016i32.extend16_s\015i32.extend8_s\010i32.ge_s\010i32" |
| 599 | ".ge_u\010i32.gt_s\010i32.gt_u\010i32.le_s\010i32.le_u\010i32.load\014i3" |
| 600 | "2.load16_s\014i32.load16_u\013i32.load8_s\013i32.load8_u\010i32.lt_s\010" |
| 601 | "i32.lt_u\007i32.mul\006i32.ne\006i32.or\ni32.popcnt\023i32.reinterpret_" |
| 602 | "f32\ti32.rem_s\ti32.rem_u\010i32.rotl\010i32.rotr\ni32.select\007i32.sh" |
| 603 | "l\ti32.shr_s\ti32.shr_u\ti32.store\013i32.store16\ni32.store8\007i32.su" |
| 604 | "b\017i32.trunc_f32_s\017i32.trunc_f32_u\017i32.trunc_f64_s\017i32.trunc" |
| 605 | "_f64_u\023i32.trunc_sat_f32_s\023i32.trunc_sat_f32_u\023i32.trunc_sat_f" |
| 606 | "64_s\023i32.trunc_sat_f64_u\014i32.wrap_i64\007i32.xor\ti32x4.abs\ti32x" |
| 607 | "4.add\016i32x4.all_true\015i32x4.bitmask\021i32x4.dot_i16x8_s\010i32x4." |
| 608 | "eq\035i32x4.extadd_pairwise_i16x8_s\035i32x4.extadd_pairwise_i16x8_u\031" |
| 609 | "i32x4.extend_high_i16x8_s\031i32x4.extend_high_i16x8_u\030i32x4.extend_" |
| 610 | "low_i16x8_s\030i32x4.extend_low_i16x8_u\031i32x4.extmul_high_i16x8_s\031" |
| 611 | "i32x4.extmul_high_i16x8_u\030i32x4.extmul_low_i16x8_s\030i32x4.extmul_l" |
| 612 | "ow_i16x8_u\022i32x4.extract_lane\ni32x4.ge_s\ni32x4.ge_u\ni32x4.gt_s\ni" |
| 613 | "32x4.gt_u\ni32x4.le_s\ni32x4.le_u\020i32x4.load16x4_s\020i32x4.load16x4" |
| 614 | "_u\ni32x4.lt_s\ni32x4.lt_u\013i32x4.max_s\013i32x4.max_u\013i32x4.min_s" |
| 615 | "\013i32x4.min_u\ti32x4.mul\010i32x4.ne\ti32x4.neg#i32x4.relaxed_dot_i8x" |
| 616 | "16_i7x16_add_s\030i32x4.relaxed_laneselect\033i32x4.relaxed_trunc_f32x4" |
| 617 | "_s\033i32x4.relaxed_trunc_f32x4_u i32x4.relaxed_trunc_f64x2_s_zero i32x" |
| 618 | "4.relaxed_trunc_f64x2_u_zero\022i32x4.replace_lane\ti32x4.shl\013i32x4." |
| 619 | "shr_s\013i32x4.shr_u\013i32x4.splat\ti32x4.sub\027i32x4.trunc_sat_f32x4" |
| 620 | "_s\027i32x4.trunc_sat_f32x4_u\034i32x4.trunc_sat_f64x2_s_zero\034i32x4." |
| 621 | "trunc_sat_f64x2_u_zero\007i64.add\ni64.add128\007i64.and\017i64.atomic." |
| 622 | "load\023i64.atomic.load16_u\023i64.atomic.load32_u\022i64.atomic.load8_" |
| 623 | "u\022i64.atomic.rmw.add\022i64.atomic.rmw.and\026i64.atomic.rmw.cmpxchg" |
| 624 | "\021i64.atomic.rmw.or\022i64.atomic.rmw.sub\023i64.atomic.rmw.xchg\022i" |
| 625 | "64.atomic.rmw.xor\026i64.atomic.rmw16.add_u\026i64.atomic.rmw16.and_u\032" |
| 626 | "i64.atomic.rmw16.cmpxchg_u\025i64.atomic.rmw16.or_u\026i64.atomic.rmw16" |
| 627 | ".sub_u\027i64.atomic.rmw16.xchg_u\026i64.atomic.rmw16.xor_u\026i64.atom" |
| 628 | "ic.rmw32.add_u\026i64.atomic.rmw32.and_u\032i64.atomic.rmw32.cmpxchg_u\025" |
| 629 | "i64.atomic.rmw32.or_u\026i64.atomic.rmw32.sub_u\027i64.atomic.rmw32.xch" |
| 630 | "g_u\026i64.atomic.rmw32.xor_u\025i64.atomic.rmw8.add_u\025i64.atomic.rm" |
| 631 | "w8.and_u\031i64.atomic.rmw8.cmpxchg_u\024i64.atomic.rmw8.or_u\025i64.at" |
| 632 | "omic.rmw8.sub_u\026i64.atomic.rmw8.xchg_u\025i64.atomic.rmw8.xor_u\020i" |
| 633 | "64.atomic.store\022i64.atomic.store16\022i64.atomic.store32\021i64.atom" |
| 634 | "ic.store8\007i64.clz\ti64.const\007i64.ctz\ti64.div_s\ti64.div_u\006i64" |
| 635 | ".eq\007i64.eqz\016i64.extend16_s\016i64.extend32_s\015i64.extend8_s\020" |
| 636 | "i64.extend_i32_s\020i64.extend_i32_u\010i64.ge_s\010i64.ge_u\010i64.gt_" |
| 637 | "s\010i64.gt_u\010i64.le_s\010i64.le_u\010i64.load\014i64.load16_s\014i6" |
| 638 | "4.load16_u\014i64.load32_s\014i64.load32_u\013i64.load8_s\013i64.load8_" |
| 639 | "u\010i64.lt_s\010i64.lt_u\007i64.mul\016i64.mul_wide_s\016i64.mul_wide_" |
| 640 | "u\006i64.ne\006i64.or\ni64.popcnt\023i64.reinterpret_f64\ti64.rem_s\ti6" |
| 641 | "4.rem_u\010i64.rotl\010i64.rotr\ni64.select\007i64.shl\ti64.shr_s\ti64." |
| 642 | "shr_u\ti64.store\013i64.store16\013i64.store32\ni64.store8\007i64.sub\n" |
| 643 | "i64.sub128\017i64.trunc_f32_s\017i64.trunc_f32_u\017i64.trunc_f64_s\017" |
| 644 | "i64.trunc_f64_u\023i64.trunc_sat_f32_s\023i64.trunc_sat_f32_u\023i64.tr" |
| 645 | "unc_sat_f64_s\023i64.trunc_sat_f64_u\007i64.xor\ti64x2.abs\ti64x2.add\016" |
| 646 | "i64x2.all_true\015i64x2.bitmask\010i64x2.eq\031i64x2.extend_high_i32x4_" |
| 647 | "s\031i64x2.extend_high_i32x4_u\030i64x2.extend_low_i32x4_s\030i64x2.ext" |
| 648 | "end_low_i32x4_u\031i64x2.extmul_high_i32x4_s\031i64x2.extmul_high_i32x4" |
| 649 | "_u\030i64x2.extmul_low_i32x4_s\030i64x2.extmul_low_i32x4_u\022i64x2.ext" |
| 650 | "ract_lane\ni64x2.ge_s\ni64x2.gt_s\ni64x2.le_s\020i64x2.load32x2_s\020i6" |
| 651 | "4x2.load32x2_u\ni64x2.lt_s\ti64x2.mul\010i64x2.ne\ti64x2.neg\030i64x2.r" |
| 652 | "elaxed_laneselect\022i64x2.replace_lane\ti64x2.shl\013i64x2.shr_s\013i6" |
| 653 | "4x2.shr_u\013i64x2.splat\ti64x2.sub\ti8x16.abs\ti8x16.add\017i8x16.add_" |
| 654 | "sat_s\017i8x16.add_sat_u\016i8x16.all_true\014i8x16.avgr_u\015i8x16.bit" |
| 655 | "mask\010i8x16.eq\024i8x16.extract_lane_s\024i8x16.extract_lane_u\ni8x16" |
| 656 | ".ge_s\ni8x16.ge_u\ni8x16.gt_s\ni8x16.gt_u\ni8x16.le_s\ni8x16.le_u\ni8x1" |
| 657 | "6.lt_s\ni8x16.lt_u\013i8x16.max_s\013i8x16.max_u\013i8x16.min_s\013i8x1" |
| 658 | "6.min_u\024i8x16.narrow_i16x8_s\024i8x16.narrow_i16x8_u\010i8x16.ne\ti8" |
| 659 | "x16.neg\014i8x16.popcnt\030i8x16.relaxed_laneselect\025i8x16.relaxed_sw" |
| 660 | "izzle\022i8x16.replace_lane\ti8x16.shl\013i8x16.shr_s\013i8x16.shr_u\015" |
| 661 | "i8x16.shuffle\013i8x16.splat\ti8x16.sub\017i8x16.sub_sat_s\017i8x16.sub" |
| 662 | "_sat_u\015i8x16.swizzle\002if\tlocal.get\tlocal.set\tlocal.tee\004loop\024" |
| 663 | "memory.atomic.notify\024memory.atomic.wait32\024memory.atomic.wait64\013" |
| 664 | "memory.copy\013memory.fill\013memory.grow\013memory.init\013memory.size" |
| 665 | "\003nop\010ref.func\013ref.is_null\014ref.null_exn\017ref.null_extern\015" |
| 666 | "ref.null_func\010ref.test\007rethrow\006return\013return_call\024return" |
| 667 | "_call_indirect\023return_call_results\ntable.copy\ntable.fill\ttable.ge" |
| 668 | "t\ntable.grow\ttable.set\ntable.size\005throw\tthrow_ref\003try\ttry_ta" |
| 669 | "ble\013unreachable\010v128.and\013v128.andnot\015v128.any_true\016v128." |
| 670 | "bitselect\nv128.const\tv128.load\020v128.load16_lane\021v128.load16_spl" |
| 671 | "at\020v128.load32_lane\021v128.load32_splat\020v128.load32_zero\020v128" |
| 672 | ".load64_lane\021v128.load64_splat\020v128.load64_zero\017v128.load8_lan" |
| 673 | "e\020v128.load8_splat\010v128.not\007v128.or\013v128.select\nv128.store" |
| 674 | "\021v128.store16_lane\021v128.store32_lane\021v128.store64_lane\020v128" |
| 675 | ".store8_lane\010v128.xor"; |
| 676 | |
| 677 | // Feature bitsets. |
| 678 | enum : uint8_t { |
| 679 | AMFBS_None, |
| 680 | AMFBS_HasAtomics, |
| 681 | AMFBS_HasBulkMemoryOpt, |
| 682 | AMFBS_HasExceptionHandling, |
| 683 | AMFBS_HasFP16, |
| 684 | AMFBS_HasGC, |
| 685 | AMFBS_HasNontrappingFPToInt, |
| 686 | AMFBS_HasReferenceTypes, |
| 687 | AMFBS_HasRelaxedSIMD, |
| 688 | AMFBS_HasSIMD128, |
| 689 | AMFBS_HasSignExt, |
| 690 | AMFBS_HasTailCall, |
| 691 | AMFBS_HasWideArithmetic, |
| 692 | AMFBS_HasReferenceTypes_HasExceptionHandling, |
| 693 | AMFBS_HasSIMD128_HasFP16, |
| 694 | AMFBS_HasSIMD128_HasRelaxedSIMD, |
| 695 | }; |
| 696 | |
| 697 | static constexpr FeatureBitset FeatureBitsets[] = { |
| 698 | {}, // AMFBS_None |
| 699 | {Feature_HasAtomicsBit, }, |
| 700 | {Feature_HasBulkMemoryOptBit, }, |
| 701 | {Feature_HasExceptionHandlingBit, }, |
| 702 | {Feature_HasFP16Bit, }, |
| 703 | {Feature_HasGCBit, }, |
| 704 | {Feature_HasNontrappingFPToIntBit, }, |
| 705 | {Feature_HasReferenceTypesBit, }, |
| 706 | {Feature_HasRelaxedSIMDBit, }, |
| 707 | {Feature_HasSIMD128Bit, }, |
| 708 | {Feature_HasSignExtBit, }, |
| 709 | {Feature_HasTailCallBit, }, |
| 710 | {Feature_HasWideArithmeticBit, }, |
| 711 | {Feature_HasReferenceTypesBit, Feature_HasExceptionHandlingBit, }, |
| 712 | {Feature_HasSIMD128Bit, Feature_HasFP16Bit, }, |
| 713 | {Feature_HasSIMD128Bit, Feature_HasRelaxedSIMDBit, }, |
| 714 | }; |
| 715 | |
| 716 | namespace { |
| 717 | struct MatchEntry { |
| 718 | uint16_t Mnemonic; |
| 719 | uint16_t Opcode; |
| 720 | uint8_t ConvertFn; |
| 721 | uint8_t RequiredFeaturesIdx; |
| 722 | uint8_t Classes[16]; |
| 723 | StringRef getMnemonic() const { |
| 724 | return StringRef(MnemonicTable + Mnemonic + 1, |
| 725 | MnemonicTable[Mnemonic]); |
| 726 | } |
| 727 | }; |
| 728 | |
| 729 | // Predicate for searching for an opcode. |
| 730 | struct LessOpcode { |
| 731 | bool operator()(const MatchEntry &LHS, StringRef RHS) { |
| 732 | return LHS.getMnemonic() < RHS; |
| 733 | } |
| 734 | bool operator()(StringRef LHS, const MatchEntry &RHS) { |
| 735 | return LHS < RHS.getMnemonic(); |
| 736 | } |
| 737 | bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { |
| 738 | return LHS.getMnemonic() < RHS.getMnemonic(); |
| 739 | } |
| 740 | }; |
| 741 | } // end anonymous namespace |
| 742 | |
| 743 | static const MatchEntry MatchTable0[] = { |
| 744 | { 0 /* atomic.fence */, WebAssembly::ATOMIC_FENCE_S, Convert__imm_95_0, AMFBS_HasAtomics, { }, }, |
| 745 | { 13 /* block */, WebAssembly::BLOCK_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 746 | { 19 /* br */, WebAssembly::BR_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 747 | { 22 /* br_if */, WebAssembly::BR_IF_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 748 | { 28 /* br_table */, WebAssembly::BR_TABLE_I32_S, Convert__BrList1_0, AMFBS_None, { MCK_BrList }, }, |
| 749 | { 28 /* br_table */, WebAssembly::BR_TABLE_I64_S, Convert__BrList1_0, AMFBS_None, { MCK_BrList }, }, |
| 750 | { 37 /* call */, WebAssembly::CALL_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 751 | { 42 /* call_indirect */, WebAssembly::CALL_INDIRECT_S, Convert__Imm1_0__Imm1_1, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 752 | { 56 /* call_params */, WebAssembly::CALL_PARAMS_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 753 | { 68 /* call_results */, WebAssembly::CALL_RESULTS_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 754 | { 81 /* catch */, WebAssembly::CATCH_LEGACY_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
| 755 | { 87 /* catch_all */, WebAssembly::CATCH_ALL_LEGACY_S, Convert_NoOperands, AMFBS_HasExceptionHandling, { }, }, |
| 756 | { 97 /* catchret */, WebAssembly::CATCHRET_S, Convert__imm_95_0__imm_95_0, AMFBS_HasExceptionHandling, { }, }, |
| 757 | { 106 /* cleanupret */, WebAssembly::CLEANUPRET_S, Convert__imm_95_0, AMFBS_HasExceptionHandling, { }, }, |
| 758 | { 117 /* compiler_fence */, WebAssembly::COMPILER_FENCE_S, Convert_NoOperands, AMFBS_HasAtomics, { }, }, |
| 759 | { 132 /* data.drop */, WebAssembly::DATA_DROP_S, Convert__Imm1_0, AMFBS_HasBulkMemoryOpt, { MCK_Imm }, }, |
| 760 | { 142 /* delegate */, WebAssembly::DELEGATE_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
| 761 | { 151 /* drop */, WebAssembly::DROP_EXNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes_HasExceptionHandling, { }, }, |
| 762 | { 151 /* drop */, WebAssembly::DROP_EXTERNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 763 | { 151 /* drop */, WebAssembly::DROP_FUNCREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 764 | { 151 /* drop */, WebAssembly::DROP_V128_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 765 | { 151 /* drop */, WebAssembly::DROP_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 766 | { 151 /* drop */, WebAssembly::DROP_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 767 | { 151 /* drop */, WebAssembly::DROP_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 768 | { 151 /* drop */, WebAssembly::DROP_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 769 | { 156 /* else */, WebAssembly::ELSE_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 770 | { 161 /* end */, WebAssembly::END_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 771 | { 165 /* end_block */, WebAssembly::END_BLOCK_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 772 | { 175 /* end_function */, WebAssembly::END_FUNCTION_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 773 | { 188 /* end_if */, WebAssembly::END_IF_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 774 | { 195 /* end_loop */, WebAssembly::END_LOOP_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 775 | { 204 /* end_try */, WebAssembly::END_TRY_S, Convert_NoOperands, AMFBS_HasExceptionHandling, { }, }, |
| 776 | { 212 /* end_try_table */, WebAssembly::END_TRY_TABLE_S, Convert_NoOperands, AMFBS_HasExceptionHandling, { }, }, |
| 777 | { 226 /* exnref.select */, WebAssembly::SELECT_EXNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 778 | { 240 /* externref.select */, WebAssembly::SELECT_EXTERNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 779 | { 257 /* f16x8.abs */, WebAssembly::ABS_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 780 | { 267 /* f16x8.add */, WebAssembly::ADD_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 781 | { 277 /* f16x8.ceil */, WebAssembly::CEIL_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 782 | { 288 /* f16x8.convert_i16x8_s */, WebAssembly::sint_to_fp_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 783 | { 310 /* f16x8.convert_i16x8_u */, WebAssembly::uint_to_fp_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 784 | { 332 /* f16x8.div */, WebAssembly::DIV_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 785 | { 342 /* f16x8.eq */, WebAssembly::EQ_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 786 | { 351 /* f16x8.extract_lane */, WebAssembly::EXTRACT_LANE_F16x8_S, Convert__Imm1_0, AMFBS_HasFP16, { MCK_Imm }, }, |
| 787 | { 370 /* f16x8.floor */, WebAssembly::FLOOR_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 788 | { 382 /* f16x8.ge */, WebAssembly::GE_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 789 | { 391 /* f16x8.gt */, WebAssembly::GT_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 790 | { 400 /* f16x8.le */, WebAssembly::LE_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 791 | { 409 /* f16x8.lt */, WebAssembly::LT_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 792 | { 418 /* f16x8.madd */, WebAssembly::MADD_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 793 | { 429 /* f16x8.max */, WebAssembly::MAX_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 794 | { 439 /* f16x8.min */, WebAssembly::MIN_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 795 | { 449 /* f16x8.mul */, WebAssembly::MUL_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 796 | { 459 /* f16x8.ne */, WebAssembly::NE_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 797 | { 468 /* f16x8.nearest */, WebAssembly::NEAREST_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 798 | { 482 /* f16x8.neg */, WebAssembly::NEG_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 799 | { 492 /* f16x8.nmadd */, WebAssembly::NMADD_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 800 | { 504 /* f16x8.pmax */, WebAssembly::PMAX_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 801 | { 515 /* f16x8.pmin */, WebAssembly::PMIN_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 802 | { 526 /* f16x8.replace_lane */, WebAssembly::REPLACE_LANE_F16x8_S, Convert__Imm1_0, AMFBS_HasFP16, { MCK_Imm }, }, |
| 803 | { 545 /* f16x8.splat */, WebAssembly::SPLAT_F16x8_S, Convert_NoOperands, AMFBS_HasFP16, { }, }, |
| 804 | { 557 /* f16x8.sqrt */, WebAssembly::SQRT_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 805 | { 568 /* f16x8.sub */, WebAssembly::SUB_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 806 | { 578 /* f16x8.trunc */, WebAssembly::TRUNC_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 807 | { 590 /* f32.abs */, WebAssembly::ABS_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 808 | { 598 /* f32.add */, WebAssembly::ADD_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 809 | { 606 /* f32.ceil */, WebAssembly::CEIL_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 810 | { 615 /* f32.const */, WebAssembly::CONST_F32_S, Convert__FPImmf321_0, AMFBS_None, { MCK_FPImmf32 }, }, |
| 811 | { 625 /* f32.convert_i32_s */, WebAssembly::F32_CONVERT_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 812 | { 643 /* f32.convert_i32_u */, WebAssembly::F32_CONVERT_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 813 | { 661 /* f32.convert_i64_s */, WebAssembly::F32_CONVERT_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 814 | { 679 /* f32.convert_i64_u */, WebAssembly::F32_CONVERT_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 815 | { 697 /* f32.copysign */, WebAssembly::COPYSIGN_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 816 | { 710 /* f32.demote_f64 */, WebAssembly::F32_DEMOTE_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 817 | { 725 /* f32.div */, WebAssembly::DIV_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 818 | { 733 /* f32.eq */, WebAssembly::EQ_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 819 | { 740 /* f32.floor */, WebAssembly::FLOOR_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 820 | { 750 /* f32.ge */, WebAssembly::GE_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 821 | { 757 /* f32.gt */, WebAssembly::GT_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 822 | { 764 /* f32.le */, WebAssembly::LE_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 823 | { 771 /* f32.load */, WebAssembly::LOAD_F32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 824 | { 771 /* f32.load */, WebAssembly::LOAD_F32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 825 | { 780 /* f32.load_f16 */, WebAssembly::LOAD_F16_F32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasFP16, { MCK_Imm, MCK_Imm }, }, |
| 826 | { 780 /* f32.load_f16 */, WebAssembly::LOAD_F16_F32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasFP16, { MCK_Imm, MCK_Imm }, }, |
| 827 | { 793 /* f32.lt */, WebAssembly::LT_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 828 | { 800 /* f32.max */, WebAssembly::MAX_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 829 | { 808 /* f32.min */, WebAssembly::MIN_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 830 | { 816 /* f32.mul */, WebAssembly::MUL_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 831 | { 824 /* f32.ne */, WebAssembly::NE_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 832 | { 831 /* f32.nearest */, WebAssembly::NEAREST_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 833 | { 843 /* f32.neg */, WebAssembly::NEG_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 834 | { 851 /* f32.reinterpret_i32 */, WebAssembly::F32_REINTERPRET_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 835 | { 871 /* f32.select */, WebAssembly::SELECT_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 836 | { 882 /* f32.sqrt */, WebAssembly::SQRT_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 837 | { 891 /* f32.store */, WebAssembly::STORE_F32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 838 | { 891 /* f32.store */, WebAssembly::STORE_F32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 839 | { 901 /* f32.store_f16 */, WebAssembly::STORE_F16_F32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasFP16, { MCK_Imm, MCK_Imm }, }, |
| 840 | { 901 /* f32.store_f16 */, WebAssembly::STORE_F16_F32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasFP16, { MCK_Imm, MCK_Imm }, }, |
| 841 | { 915 /* f32.sub */, WebAssembly::SUB_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 842 | { 923 /* f32.trunc */, WebAssembly::TRUNC_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 843 | { 933 /* f32x4.abs */, WebAssembly::ABS_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 844 | { 943 /* f32x4.add */, WebAssembly::ADD_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 845 | { 953 /* f32x4.ceil */, WebAssembly::CEIL_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 846 | { 964 /* f32x4.convert_i32x4_s */, WebAssembly::sint_to_fp_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 847 | { 986 /* f32x4.convert_i32x4_u */, WebAssembly::uint_to_fp_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 848 | { 1008 /* f32x4.demote_f64x2_zero */, WebAssembly::demote_zero_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 849 | { 1032 /* f32x4.div */, WebAssembly::DIV_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 850 | { 1042 /* f32x4.eq */, WebAssembly::EQ_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 851 | { 1051 /* f32x4.extract_lane */, WebAssembly::EXTRACT_LANE_F32x4_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 852 | { 1070 /* f32x4.floor */, WebAssembly::FLOOR_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 853 | { 1082 /* f32x4.ge */, WebAssembly::GE_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 854 | { 1091 /* f32x4.gt */, WebAssembly::GT_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 855 | { 1100 /* f32x4.le */, WebAssembly::LE_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 856 | { 1109 /* f32x4.lt */, WebAssembly::LT_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 857 | { 1118 /* f32x4.max */, WebAssembly::MAX_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 858 | { 1128 /* f32x4.min */, WebAssembly::MIN_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 859 | { 1138 /* f32x4.mul */, WebAssembly::MUL_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 860 | { 1148 /* f32x4.ne */, WebAssembly::NE_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 861 | { 1157 /* f32x4.nearest */, WebAssembly::NEAREST_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 862 | { 1171 /* f32x4.neg */, WebAssembly::NEG_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 863 | { 1181 /* f32x4.pmax */, WebAssembly::PMAX_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 864 | { 1192 /* f32x4.pmin */, WebAssembly::PMIN_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 865 | { 1203 /* f32x4.relaxed_dot_bf16x8_add_f32 */, WebAssembly::RELAXED_DOT_BFLOAT_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 866 | { 1236 /* f32x4.relaxed_madd */, WebAssembly::MADD_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128_HasRelaxedSIMD, { }, }, |
| 867 | { 1255 /* f32x4.relaxed_max */, WebAssembly::SIMD_RELAXED_FMAX_F32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 868 | { 1273 /* f32x4.relaxed_min */, WebAssembly::SIMD_RELAXED_FMIN_F32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 869 | { 1291 /* f32x4.relaxed_nmadd */, WebAssembly::NMADD_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128_HasRelaxedSIMD, { }, }, |
| 870 | { 1311 /* f32x4.replace_lane */, WebAssembly::REPLACE_LANE_F32x4_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 871 | { 1330 /* f32x4.splat */, WebAssembly::SPLAT_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 872 | { 1342 /* f32x4.sqrt */, WebAssembly::SQRT_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 873 | { 1353 /* f32x4.sub */, WebAssembly::SUB_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 874 | { 1363 /* f32x4.trunc */, WebAssembly::TRUNC_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 875 | { 1375 /* f64.abs */, WebAssembly::ABS_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 876 | { 1383 /* f64.add */, WebAssembly::ADD_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 877 | { 1391 /* f64.ceil */, WebAssembly::CEIL_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 878 | { 1400 /* f64.const */, WebAssembly::CONST_F64_S, Convert__FPImmf641_0, AMFBS_None, { MCK_FPImmf64 }, }, |
| 879 | { 1410 /* f64.convert_i32_s */, WebAssembly::F64_CONVERT_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 880 | { 1428 /* f64.convert_i32_u */, WebAssembly::F64_CONVERT_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 881 | { 1446 /* f64.convert_i64_s */, WebAssembly::F64_CONVERT_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 882 | { 1464 /* f64.convert_i64_u */, WebAssembly::F64_CONVERT_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 883 | { 1482 /* f64.copysign */, WebAssembly::COPYSIGN_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 884 | { 1495 /* f64.div */, WebAssembly::DIV_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 885 | { 1503 /* f64.eq */, WebAssembly::EQ_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 886 | { 1510 /* f64.floor */, WebAssembly::FLOOR_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 887 | { 1520 /* f64.ge */, WebAssembly::GE_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 888 | { 1527 /* f64.gt */, WebAssembly::GT_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 889 | { 1534 /* f64.le */, WebAssembly::LE_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 890 | { 1541 /* f64.load */, WebAssembly::LOAD_F64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 891 | { 1541 /* f64.load */, WebAssembly::LOAD_F64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 892 | { 1550 /* f64.lt */, WebAssembly::LT_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 893 | { 1557 /* f64.max */, WebAssembly::MAX_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 894 | { 1565 /* f64.min */, WebAssembly::MIN_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 895 | { 1573 /* f64.mul */, WebAssembly::MUL_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 896 | { 1581 /* f64.ne */, WebAssembly::NE_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 897 | { 1588 /* f64.nearest */, WebAssembly::NEAREST_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 898 | { 1600 /* f64.neg */, WebAssembly::NEG_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 899 | { 1608 /* f64.promote_f32 */, WebAssembly::F64_PROMOTE_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 900 | { 1624 /* f64.reinterpret_i64 */, WebAssembly::F64_REINTERPRET_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 901 | { 1644 /* f64.select */, WebAssembly::SELECT_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 902 | { 1655 /* f64.sqrt */, WebAssembly::SQRT_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 903 | { 1664 /* f64.store */, WebAssembly::STORE_F64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 904 | { 1664 /* f64.store */, WebAssembly::STORE_F64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 905 | { 1674 /* f64.sub */, WebAssembly::SUB_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 906 | { 1682 /* f64.trunc */, WebAssembly::TRUNC_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 907 | { 1692 /* f64x2.abs */, WebAssembly::ABS_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 908 | { 1702 /* f64x2.add */, WebAssembly::ADD_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 909 | { 1712 /* f64x2.ceil */, WebAssembly::CEIL_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 910 | { 1723 /* f64x2.convert_low_i32x4_s */, WebAssembly::convert_low_s_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 911 | { 1749 /* f64x2.convert_low_i32x4_u */, WebAssembly::convert_low_u_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 912 | { 1775 /* f64x2.div */, WebAssembly::DIV_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 913 | { 1785 /* f64x2.eq */, WebAssembly::EQ_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 914 | { 1794 /* f64x2.extract_lane */, WebAssembly::EXTRACT_LANE_F64x2_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 915 | { 1813 /* f64x2.floor */, WebAssembly::FLOOR_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 916 | { 1825 /* f64x2.ge */, WebAssembly::GE_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 917 | { 1834 /* f64x2.gt */, WebAssembly::GT_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 918 | { 1843 /* f64x2.le */, WebAssembly::LE_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 919 | { 1852 /* f64x2.lt */, WebAssembly::LT_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 920 | { 1861 /* f64x2.max */, WebAssembly::MAX_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 921 | { 1871 /* f64x2.min */, WebAssembly::MIN_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 922 | { 1881 /* f64x2.mul */, WebAssembly::MUL_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 923 | { 1891 /* f64x2.ne */, WebAssembly::NE_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 924 | { 1900 /* f64x2.nearest */, WebAssembly::NEAREST_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 925 | { 1914 /* f64x2.neg */, WebAssembly::NEG_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 926 | { 1924 /* f64x2.pmax */, WebAssembly::PMAX_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 927 | { 1935 /* f64x2.pmin */, WebAssembly::PMIN_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 928 | { 1946 /* f64x2.promote_low_f32x4 */, WebAssembly::promote_low_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 929 | { 1970 /* f64x2.relaxed_madd */, WebAssembly::MADD_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128_HasRelaxedSIMD, { }, }, |
| 930 | { 1989 /* f64x2.relaxed_max */, WebAssembly::SIMD_RELAXED_FMAX_F64x2_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 931 | { 2007 /* f64x2.relaxed_min */, WebAssembly::SIMD_RELAXED_FMIN_F64x2_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 932 | { 2025 /* f64x2.relaxed_nmadd */, WebAssembly::NMADD_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128_HasRelaxedSIMD, { }, }, |
| 933 | { 2045 /* f64x2.replace_lane */, WebAssembly::REPLACE_LANE_F64x2_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 934 | { 2064 /* f64x2.splat */, WebAssembly::SPLAT_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 935 | { 2076 /* f64x2.sqrt */, WebAssembly::SQRT_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 936 | { 2087 /* f64x2.sub */, WebAssembly::SUB_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 937 | { 2097 /* f64x2.trunc */, WebAssembly::TRUNC_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 938 | { 2109 /* funcref.select */, WebAssembly::SELECT_FUNCREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 939 | { 2124 /* global.get */, WebAssembly::GLOBAL_GET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
| 940 | { 2124 /* global.get */, WebAssembly::GLOBAL_GET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 941 | { 2124 /* global.get */, WebAssembly::GLOBAL_GET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 942 | { 2124 /* global.get */, WebAssembly::GLOBAL_GET_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 943 | { 2124 /* global.get */, WebAssembly::GLOBAL_GET_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 944 | { 2124 /* global.get */, WebAssembly::GLOBAL_GET_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 945 | { 2124 /* global.get */, WebAssembly::GLOBAL_GET_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 946 | { 2124 /* global.get */, WebAssembly::GLOBAL_GET_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 947 | { 2135 /* global.set */, WebAssembly::GLOBAL_SET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
| 948 | { 2135 /* global.set */, WebAssembly::GLOBAL_SET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 949 | { 2135 /* global.set */, WebAssembly::GLOBAL_SET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 950 | { 2135 /* global.set */, WebAssembly::GLOBAL_SET_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 951 | { 2135 /* global.set */, WebAssembly::GLOBAL_SET_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 952 | { 2135 /* global.set */, WebAssembly::GLOBAL_SET_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 953 | { 2135 /* global.set */, WebAssembly::GLOBAL_SET_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 954 | { 2135 /* global.set */, WebAssembly::GLOBAL_SET_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 955 | { 2146 /* i16x8.abs */, WebAssembly::ABS_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 956 | { 2156 /* i16x8.add */, WebAssembly::ADD_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 957 | { 2166 /* i16x8.add_sat_s */, WebAssembly::ADD_SAT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 958 | { 2182 /* i16x8.add_sat_u */, WebAssembly::ADD_SAT_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 959 | { 2198 /* i16x8.all_true */, WebAssembly::ALLTRUE_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 960 | { 2213 /* i16x8.avgr_u */, WebAssembly::AVGR_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 961 | { 2226 /* i16x8.bitmask */, WebAssembly::BITMASK_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 962 | { 2240 /* i16x8.eq */, WebAssembly::EQ_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 963 | { 2249 /* i16x8.extadd_pairwise_i8x16_s */, WebAssembly::extadd_pairwise_s_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 964 | { 2279 /* i16x8.extadd_pairwise_i8x16_u */, WebAssembly::extadd_pairwise_u_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 965 | { 2309 /* i16x8.extend_high_i8x16_s */, WebAssembly::extend_high_s_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 966 | { 2335 /* i16x8.extend_high_i8x16_u */, WebAssembly::extend_high_u_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 967 | { 2361 /* i16x8.extend_low_i8x16_s */, WebAssembly::extend_low_s_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 968 | { 2386 /* i16x8.extend_low_i8x16_u */, WebAssembly::extend_low_u_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 969 | { 2411 /* i16x8.extmul_high_i8x16_s */, WebAssembly::EXTMUL_HIGH_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 970 | { 2437 /* i16x8.extmul_high_i8x16_u */, WebAssembly::EXTMUL_HIGH_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 971 | { 2463 /* i16x8.extmul_low_i8x16_s */, WebAssembly::EXTMUL_LOW_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 972 | { 2488 /* i16x8.extmul_low_i8x16_u */, WebAssembly::EXTMUL_LOW_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 973 | { 2513 /* i16x8.extract_lane_s */, WebAssembly::EXTRACT_LANE_I16x8_s_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 974 | { 2534 /* i16x8.extract_lane_u */, WebAssembly::EXTRACT_LANE_I16x8_u_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 975 | { 2555 /* i16x8.ge_s */, WebAssembly::GE_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 976 | { 2566 /* i16x8.ge_u */, WebAssembly::GE_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 977 | { 2577 /* i16x8.gt_s */, WebAssembly::GT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 978 | { 2588 /* i16x8.gt_u */, WebAssembly::GT_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 979 | { 2599 /* i16x8.le_s */, WebAssembly::LE_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 980 | { 2610 /* i16x8.le_u */, WebAssembly::LE_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 981 | { 2621 /* i16x8.load8x8_s */, WebAssembly::LOAD_EXTEND_S_I16x8_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 982 | { 2621 /* i16x8.load8x8_s */, WebAssembly::LOAD_EXTEND_S_I16x8_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 983 | { 2637 /* i16x8.load8x8_u */, WebAssembly::LOAD_EXTEND_U_I16x8_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 984 | { 2637 /* i16x8.load8x8_u */, WebAssembly::LOAD_EXTEND_U_I16x8_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 985 | { 2653 /* i16x8.lt_s */, WebAssembly::LT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 986 | { 2664 /* i16x8.lt_u */, WebAssembly::LT_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 987 | { 2675 /* i16x8.max_s */, WebAssembly::MAX_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 988 | { 2687 /* i16x8.max_u */, WebAssembly::MAX_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 989 | { 2699 /* i16x8.min_s */, WebAssembly::MIN_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 990 | { 2711 /* i16x8.min_u */, WebAssembly::MIN_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 991 | { 2723 /* i16x8.mul */, WebAssembly::MUL_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 992 | { 2733 /* i16x8.narrow_i32x4_s */, WebAssembly::NARROW_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 993 | { 2754 /* i16x8.narrow_i32x4_u */, WebAssembly::NARROW_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 994 | { 2775 /* i16x8.ne */, WebAssembly::NE_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 995 | { 2784 /* i16x8.neg */, WebAssembly::NEG_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 996 | { 2794 /* i16x8.q15mulr_sat_s */, WebAssembly::Q15MULR_SAT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 997 | { 2814 /* i16x8.relaxed_dot_i8x16_i7x16_s */, WebAssembly::RELAXED_DOT_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 998 | { 2846 /* i16x8.relaxed_laneselect */, WebAssembly::LANESELECT_I16x8_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 999 | { 2871 /* i16x8.relaxed_q15mulr_s */, WebAssembly::RELAXED_Q15MULR_S_I16x8_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1000 | { 2895 /* i16x8.replace_lane */, WebAssembly::REPLACE_LANE_I16x8_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1001 | { 2914 /* i16x8.shl */, WebAssembly::SHL_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1002 | { 2924 /* i16x8.shr_s */, WebAssembly::SHR_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1003 | { 2936 /* i16x8.shr_u */, WebAssembly::SHR_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1004 | { 2948 /* i16x8.splat */, WebAssembly::SPLAT_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1005 | { 2960 /* i16x8.sub */, WebAssembly::SUB_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1006 | { 2970 /* i16x8.sub_sat_s */, WebAssembly::SUB_SAT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1007 | { 2986 /* i16x8.sub_sat_u */, WebAssembly::SUB_SAT_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1008 | { 3002 /* i16x8.trunc_sat_f16x8_s */, WebAssembly::fp_to_sint_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 1009 | { 3026 /* i16x8.trunc_sat_f16x8_u */, WebAssembly::fp_to_uint_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasFP16, { }, }, |
| 1010 | { 3050 /* i32.add */, WebAssembly::ADD_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1011 | { 3058 /* i32.and */, WebAssembly::AND_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1012 | { 3066 /* i32.atomic.load */, WebAssembly::ATOMIC_LOAD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1013 | { 3066 /* i32.atomic.load */, WebAssembly::ATOMIC_LOAD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1014 | { 3082 /* i32.atomic.load16_u */, WebAssembly::ATOMIC_LOAD16_U_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1015 | { 3082 /* i32.atomic.load16_u */, WebAssembly::ATOMIC_LOAD16_U_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1016 | { 3102 /* i32.atomic.load8_u */, WebAssembly::ATOMIC_LOAD8_U_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1017 | { 3102 /* i32.atomic.load8_u */, WebAssembly::ATOMIC_LOAD8_U_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1018 | { 3121 /* i32.atomic.rmw.add */, WebAssembly::ATOMIC_RMW_ADD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1019 | { 3121 /* i32.atomic.rmw.add */, WebAssembly::ATOMIC_RMW_ADD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1020 | { 3140 /* i32.atomic.rmw.and */, WebAssembly::ATOMIC_RMW_AND_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1021 | { 3140 /* i32.atomic.rmw.and */, WebAssembly::ATOMIC_RMW_AND_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1022 | { 3159 /* i32.atomic.rmw.cmpxchg */, WebAssembly::ATOMIC_RMW_CMPXCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1023 | { 3159 /* i32.atomic.rmw.cmpxchg */, WebAssembly::ATOMIC_RMW_CMPXCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1024 | { 3182 /* i32.atomic.rmw.or */, WebAssembly::ATOMIC_RMW_OR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1025 | { 3182 /* i32.atomic.rmw.or */, WebAssembly::ATOMIC_RMW_OR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1026 | { 3200 /* i32.atomic.rmw.sub */, WebAssembly::ATOMIC_RMW_SUB_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1027 | { 3200 /* i32.atomic.rmw.sub */, WebAssembly::ATOMIC_RMW_SUB_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1028 | { 3219 /* i32.atomic.rmw.xchg */, WebAssembly::ATOMIC_RMW_XCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1029 | { 3219 /* i32.atomic.rmw.xchg */, WebAssembly::ATOMIC_RMW_XCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1030 | { 3239 /* i32.atomic.rmw.xor */, WebAssembly::ATOMIC_RMW_XOR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1031 | { 3239 /* i32.atomic.rmw.xor */, WebAssembly::ATOMIC_RMW_XOR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1032 | { 3258 /* i32.atomic.rmw16.add_u */, WebAssembly::ATOMIC_RMW16_U_ADD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1033 | { 3258 /* i32.atomic.rmw16.add_u */, WebAssembly::ATOMIC_RMW16_U_ADD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1034 | { 3281 /* i32.atomic.rmw16.and_u */, WebAssembly::ATOMIC_RMW16_U_AND_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1035 | { 3281 /* i32.atomic.rmw16.and_u */, WebAssembly::ATOMIC_RMW16_U_AND_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1036 | { 3304 /* i32.atomic.rmw16.cmpxchg_u */, WebAssembly::ATOMIC_RMW16_U_CMPXCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1037 | { 3304 /* i32.atomic.rmw16.cmpxchg_u */, WebAssembly::ATOMIC_RMW16_U_CMPXCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1038 | { 3331 /* i32.atomic.rmw16.or_u */, WebAssembly::ATOMIC_RMW16_U_OR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1039 | { 3331 /* i32.atomic.rmw16.or_u */, WebAssembly::ATOMIC_RMW16_U_OR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1040 | { 3353 /* i32.atomic.rmw16.sub_u */, WebAssembly::ATOMIC_RMW16_U_SUB_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1041 | { 3353 /* i32.atomic.rmw16.sub_u */, WebAssembly::ATOMIC_RMW16_U_SUB_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1042 | { 3376 /* i32.atomic.rmw16.xchg_u */, WebAssembly::ATOMIC_RMW16_U_XCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1043 | { 3376 /* i32.atomic.rmw16.xchg_u */, WebAssembly::ATOMIC_RMW16_U_XCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1044 | { 3400 /* i32.atomic.rmw16.xor_u */, WebAssembly::ATOMIC_RMW16_U_XOR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1045 | { 3400 /* i32.atomic.rmw16.xor_u */, WebAssembly::ATOMIC_RMW16_U_XOR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1046 | { 3423 /* i32.atomic.rmw8.add_u */, WebAssembly::ATOMIC_RMW8_U_ADD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1047 | { 3423 /* i32.atomic.rmw8.add_u */, WebAssembly::ATOMIC_RMW8_U_ADD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1048 | { 3445 /* i32.atomic.rmw8.and_u */, WebAssembly::ATOMIC_RMW8_U_AND_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1049 | { 3445 /* i32.atomic.rmw8.and_u */, WebAssembly::ATOMIC_RMW8_U_AND_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1050 | { 3467 /* i32.atomic.rmw8.cmpxchg_u */, WebAssembly::ATOMIC_RMW8_U_CMPXCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1051 | { 3467 /* i32.atomic.rmw8.cmpxchg_u */, WebAssembly::ATOMIC_RMW8_U_CMPXCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1052 | { 3493 /* i32.atomic.rmw8.or_u */, WebAssembly::ATOMIC_RMW8_U_OR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1053 | { 3493 /* i32.atomic.rmw8.or_u */, WebAssembly::ATOMIC_RMW8_U_OR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1054 | { 3514 /* i32.atomic.rmw8.sub_u */, WebAssembly::ATOMIC_RMW8_U_SUB_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1055 | { 3514 /* i32.atomic.rmw8.sub_u */, WebAssembly::ATOMIC_RMW8_U_SUB_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1056 | { 3536 /* i32.atomic.rmw8.xchg_u */, WebAssembly::ATOMIC_RMW8_U_XCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1057 | { 3536 /* i32.atomic.rmw8.xchg_u */, WebAssembly::ATOMIC_RMW8_U_XCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1058 | { 3559 /* i32.atomic.rmw8.xor_u */, WebAssembly::ATOMIC_RMW8_U_XOR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1059 | { 3559 /* i32.atomic.rmw8.xor_u */, WebAssembly::ATOMIC_RMW8_U_XOR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1060 | { 3581 /* i32.atomic.store */, WebAssembly::ATOMIC_STORE_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1061 | { 3581 /* i32.atomic.store */, WebAssembly::ATOMIC_STORE_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1062 | { 3598 /* i32.atomic.store16 */, WebAssembly::ATOMIC_STORE16_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1063 | { 3598 /* i32.atomic.store16 */, WebAssembly::ATOMIC_STORE16_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1064 | { 3617 /* i32.atomic.store8 */, WebAssembly::ATOMIC_STORE8_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1065 | { 3617 /* i32.atomic.store8 */, WebAssembly::ATOMIC_STORE8_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1066 | { 3635 /* i32.clz */, WebAssembly::CLZ_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1067 | { 3643 /* i32.const */, WebAssembly::CONST_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1068 | { 3653 /* i32.ctz */, WebAssembly::CTZ_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1069 | { 3661 /* i32.div_s */, WebAssembly::DIV_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1070 | { 3671 /* i32.div_u */, WebAssembly::DIV_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1071 | { 3681 /* i32.eq */, WebAssembly::EQ_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1072 | { 3688 /* i32.eqz */, WebAssembly::EQZ_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1073 | { 3696 /* i32.extend16_s */, WebAssembly::I32_EXTEND16_S_I32_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
| 1074 | { 3711 /* i32.extend8_s */, WebAssembly::I32_EXTEND8_S_I32_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
| 1075 | { 3725 /* i32.ge_s */, WebAssembly::GE_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1076 | { 3734 /* i32.ge_u */, WebAssembly::GE_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1077 | { 3743 /* i32.gt_s */, WebAssembly::GT_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1078 | { 3752 /* i32.gt_u */, WebAssembly::GT_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1079 | { 3761 /* i32.le_s */, WebAssembly::LE_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1080 | { 3770 /* i32.le_u */, WebAssembly::LE_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1081 | { 3779 /* i32.load */, WebAssembly::LOAD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1082 | { 3779 /* i32.load */, WebAssembly::LOAD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1083 | { 3788 /* i32.load16_s */, WebAssembly::LOAD16_S_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1084 | { 3788 /* i32.load16_s */, WebAssembly::LOAD16_S_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1085 | { 3801 /* i32.load16_u */, WebAssembly::LOAD16_U_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1086 | { 3801 /* i32.load16_u */, WebAssembly::LOAD16_U_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1087 | { 3814 /* i32.load8_s */, WebAssembly::LOAD8_S_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1088 | { 3814 /* i32.load8_s */, WebAssembly::LOAD8_S_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1089 | { 3826 /* i32.load8_u */, WebAssembly::LOAD8_U_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1090 | { 3826 /* i32.load8_u */, WebAssembly::LOAD8_U_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1091 | { 3838 /* i32.lt_s */, WebAssembly::LT_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1092 | { 3847 /* i32.lt_u */, WebAssembly::LT_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1093 | { 3856 /* i32.mul */, WebAssembly::MUL_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1094 | { 3864 /* i32.ne */, WebAssembly::NE_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1095 | { 3871 /* i32.or */, WebAssembly::OR_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1096 | { 3878 /* i32.popcnt */, WebAssembly::POPCNT_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1097 | { 3889 /* i32.reinterpret_f32 */, WebAssembly::I32_REINTERPRET_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1098 | { 3909 /* i32.rem_s */, WebAssembly::REM_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1099 | { 3919 /* i32.rem_u */, WebAssembly::REM_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1100 | { 3929 /* i32.rotl */, WebAssembly::ROTL_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1101 | { 3938 /* i32.rotr */, WebAssembly::ROTR_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1102 | { 3947 /* i32.select */, WebAssembly::SELECT_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1103 | { 3958 /* i32.shl */, WebAssembly::SHL_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1104 | { 3966 /* i32.shr_s */, WebAssembly::SHR_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1105 | { 3976 /* i32.shr_u */, WebAssembly::SHR_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1106 | { 3986 /* i32.store */, WebAssembly::STORE_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1107 | { 3986 /* i32.store */, WebAssembly::STORE_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1108 | { 3996 /* i32.store16 */, WebAssembly::STORE16_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1109 | { 3996 /* i32.store16 */, WebAssembly::STORE16_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1110 | { 4008 /* i32.store8 */, WebAssembly::STORE8_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1111 | { 4008 /* i32.store8 */, WebAssembly::STORE8_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1112 | { 4019 /* i32.sub */, WebAssembly::SUB_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1113 | { 4027 /* i32.trunc_f32_s */, WebAssembly::I32_TRUNC_S_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1114 | { 4043 /* i32.trunc_f32_u */, WebAssembly::I32_TRUNC_U_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1115 | { 4059 /* i32.trunc_f64_s */, WebAssembly::I32_TRUNC_S_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1116 | { 4075 /* i32.trunc_f64_u */, WebAssembly::I32_TRUNC_U_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1117 | { 4091 /* i32.trunc_sat_f32_s */, WebAssembly::I32_TRUNC_S_SAT_F32_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
| 1118 | { 4111 /* i32.trunc_sat_f32_u */, WebAssembly::I32_TRUNC_U_SAT_F32_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
| 1119 | { 4131 /* i32.trunc_sat_f64_s */, WebAssembly::I32_TRUNC_S_SAT_F64_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
| 1120 | { 4151 /* i32.trunc_sat_f64_u */, WebAssembly::I32_TRUNC_U_SAT_F64_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
| 1121 | { 4171 /* i32.wrap_i64 */, WebAssembly::I32_WRAP_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1122 | { 4184 /* i32.xor */, WebAssembly::XOR_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1123 | { 4192 /* i32x4.abs */, WebAssembly::ABS_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1124 | { 4202 /* i32x4.add */, WebAssembly::ADD_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1125 | { 4212 /* i32x4.all_true */, WebAssembly::ALLTRUE_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1126 | { 4227 /* i32x4.bitmask */, WebAssembly::BITMASK_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1127 | { 4241 /* i32x4.dot_i16x8_s */, WebAssembly::DOT_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1128 | { 4259 /* i32x4.eq */, WebAssembly::EQ_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1129 | { 4268 /* i32x4.extadd_pairwise_i16x8_s */, WebAssembly::extadd_pairwise_s_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1130 | { 4298 /* i32x4.extadd_pairwise_i16x8_u */, WebAssembly::extadd_pairwise_u_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1131 | { 4328 /* i32x4.extend_high_i16x8_s */, WebAssembly::extend_high_s_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1132 | { 4354 /* i32x4.extend_high_i16x8_u */, WebAssembly::extend_high_u_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1133 | { 4380 /* i32x4.extend_low_i16x8_s */, WebAssembly::extend_low_s_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1134 | { 4405 /* i32x4.extend_low_i16x8_u */, WebAssembly::extend_low_u_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1135 | { 4430 /* i32x4.extmul_high_i16x8_s */, WebAssembly::EXTMUL_HIGH_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1136 | { 4456 /* i32x4.extmul_high_i16x8_u */, WebAssembly::EXTMUL_HIGH_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1137 | { 4482 /* i32x4.extmul_low_i16x8_s */, WebAssembly::EXTMUL_LOW_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1138 | { 4507 /* i32x4.extmul_low_i16x8_u */, WebAssembly::EXTMUL_LOW_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1139 | { 4532 /* i32x4.extract_lane */, WebAssembly::EXTRACT_LANE_I32x4_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1140 | { 4551 /* i32x4.ge_s */, WebAssembly::GE_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1141 | { 4562 /* i32x4.ge_u */, WebAssembly::GE_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1142 | { 4573 /* i32x4.gt_s */, WebAssembly::GT_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1143 | { 4584 /* i32x4.gt_u */, WebAssembly::GT_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1144 | { 4595 /* i32x4.le_s */, WebAssembly::LE_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1145 | { 4606 /* i32x4.le_u */, WebAssembly::LE_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1146 | { 4617 /* i32x4.load16x4_s */, WebAssembly::LOAD_EXTEND_S_I32x4_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1147 | { 4617 /* i32x4.load16x4_s */, WebAssembly::LOAD_EXTEND_S_I32x4_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1148 | { 4634 /* i32x4.load16x4_u */, WebAssembly::LOAD_EXTEND_U_I32x4_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1149 | { 4634 /* i32x4.load16x4_u */, WebAssembly::LOAD_EXTEND_U_I32x4_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1150 | { 4651 /* i32x4.lt_s */, WebAssembly::LT_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1151 | { 4662 /* i32x4.lt_u */, WebAssembly::LT_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1152 | { 4673 /* i32x4.max_s */, WebAssembly::MAX_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1153 | { 4685 /* i32x4.max_u */, WebAssembly::MAX_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1154 | { 4697 /* i32x4.min_s */, WebAssembly::MIN_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1155 | { 4709 /* i32x4.min_u */, WebAssembly::MIN_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1156 | { 4721 /* i32x4.mul */, WebAssembly::MUL_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1157 | { 4731 /* i32x4.ne */, WebAssembly::NE_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1158 | { 4740 /* i32x4.neg */, WebAssembly::NEG_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1159 | { 4750 /* i32x4.relaxed_dot_i8x16_i7x16_add_s */, WebAssembly::RELAXED_DOT_ADD_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1160 | { 4786 /* i32x4.relaxed_laneselect */, WebAssembly::LANESELECT_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1161 | { 4811 /* i32x4.relaxed_trunc_f32x4_s */, WebAssembly::int_wasm_relaxed_trunc_signed_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1162 | { 4839 /* i32x4.relaxed_trunc_f32x4_u */, WebAssembly::int_wasm_relaxed_trunc_unsigned_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1163 | { 4867 /* i32x4.relaxed_trunc_f64x2_s_zero */, WebAssembly::int_wasm_relaxed_trunc_signed_zero_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1164 | { 4900 /* i32x4.relaxed_trunc_f64x2_u_zero */, WebAssembly::int_wasm_relaxed_trunc_unsigned_zero_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1165 | { 4933 /* i32x4.replace_lane */, WebAssembly::REPLACE_LANE_I32x4_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1166 | { 4952 /* i32x4.shl */, WebAssembly::SHL_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1167 | { 4962 /* i32x4.shr_s */, WebAssembly::SHR_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1168 | { 4974 /* i32x4.shr_u */, WebAssembly::SHR_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1169 | { 4986 /* i32x4.splat */, WebAssembly::SPLAT_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1170 | { 4998 /* i32x4.sub */, WebAssembly::SUB_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1171 | { 5008 /* i32x4.trunc_sat_f32x4_s */, WebAssembly::fp_to_sint_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1172 | { 5032 /* i32x4.trunc_sat_f32x4_u */, WebAssembly::fp_to_uint_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1173 | { 5056 /* i32x4.trunc_sat_f64x2_s_zero */, WebAssembly::trunc_sat_zero_s_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1174 | { 5085 /* i32x4.trunc_sat_f64x2_u_zero */, WebAssembly::trunc_sat_zero_u_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1175 | { 5114 /* i64.add */, WebAssembly::ADD_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1176 | { 5122 /* i64.add128 */, WebAssembly::I64_ADD128_S, Convert_NoOperands, AMFBS_HasWideArithmetic, { }, }, |
| 1177 | { 5133 /* i64.and */, WebAssembly::AND_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1178 | { 5141 /* i64.atomic.load */, WebAssembly::ATOMIC_LOAD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1179 | { 5141 /* i64.atomic.load */, WebAssembly::ATOMIC_LOAD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1180 | { 5157 /* i64.atomic.load16_u */, WebAssembly::ATOMIC_LOAD16_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1181 | { 5157 /* i64.atomic.load16_u */, WebAssembly::ATOMIC_LOAD16_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1182 | { 5177 /* i64.atomic.load32_u */, WebAssembly::ATOMIC_LOAD32_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1183 | { 5177 /* i64.atomic.load32_u */, WebAssembly::ATOMIC_LOAD32_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1184 | { 5197 /* i64.atomic.load8_u */, WebAssembly::ATOMIC_LOAD8_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1185 | { 5197 /* i64.atomic.load8_u */, WebAssembly::ATOMIC_LOAD8_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1186 | { 5216 /* i64.atomic.rmw.add */, WebAssembly::ATOMIC_RMW_ADD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1187 | { 5216 /* i64.atomic.rmw.add */, WebAssembly::ATOMIC_RMW_ADD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1188 | { 5235 /* i64.atomic.rmw.and */, WebAssembly::ATOMIC_RMW_AND_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1189 | { 5235 /* i64.atomic.rmw.and */, WebAssembly::ATOMIC_RMW_AND_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1190 | { 5254 /* i64.atomic.rmw.cmpxchg */, WebAssembly::ATOMIC_RMW_CMPXCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1191 | { 5254 /* i64.atomic.rmw.cmpxchg */, WebAssembly::ATOMIC_RMW_CMPXCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1192 | { 5277 /* i64.atomic.rmw.or */, WebAssembly::ATOMIC_RMW_OR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1193 | { 5277 /* i64.atomic.rmw.or */, WebAssembly::ATOMIC_RMW_OR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1194 | { 5295 /* i64.atomic.rmw.sub */, WebAssembly::ATOMIC_RMW_SUB_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1195 | { 5295 /* i64.atomic.rmw.sub */, WebAssembly::ATOMIC_RMW_SUB_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1196 | { 5314 /* i64.atomic.rmw.xchg */, WebAssembly::ATOMIC_RMW_XCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1197 | { 5314 /* i64.atomic.rmw.xchg */, WebAssembly::ATOMIC_RMW_XCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1198 | { 5334 /* i64.atomic.rmw.xor */, WebAssembly::ATOMIC_RMW_XOR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1199 | { 5334 /* i64.atomic.rmw.xor */, WebAssembly::ATOMIC_RMW_XOR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1200 | { 5353 /* i64.atomic.rmw16.add_u */, WebAssembly::ATOMIC_RMW16_U_ADD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1201 | { 5353 /* i64.atomic.rmw16.add_u */, WebAssembly::ATOMIC_RMW16_U_ADD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1202 | { 5376 /* i64.atomic.rmw16.and_u */, WebAssembly::ATOMIC_RMW16_U_AND_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1203 | { 5376 /* i64.atomic.rmw16.and_u */, WebAssembly::ATOMIC_RMW16_U_AND_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1204 | { 5399 /* i64.atomic.rmw16.cmpxchg_u */, WebAssembly::ATOMIC_RMW16_U_CMPXCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1205 | { 5399 /* i64.atomic.rmw16.cmpxchg_u */, WebAssembly::ATOMIC_RMW16_U_CMPXCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1206 | { 5426 /* i64.atomic.rmw16.or_u */, WebAssembly::ATOMIC_RMW16_U_OR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1207 | { 5426 /* i64.atomic.rmw16.or_u */, WebAssembly::ATOMIC_RMW16_U_OR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1208 | { 5448 /* i64.atomic.rmw16.sub_u */, WebAssembly::ATOMIC_RMW16_U_SUB_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1209 | { 5448 /* i64.atomic.rmw16.sub_u */, WebAssembly::ATOMIC_RMW16_U_SUB_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1210 | { 5471 /* i64.atomic.rmw16.xchg_u */, WebAssembly::ATOMIC_RMW16_U_XCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1211 | { 5471 /* i64.atomic.rmw16.xchg_u */, WebAssembly::ATOMIC_RMW16_U_XCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1212 | { 5495 /* i64.atomic.rmw16.xor_u */, WebAssembly::ATOMIC_RMW16_U_XOR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1213 | { 5495 /* i64.atomic.rmw16.xor_u */, WebAssembly::ATOMIC_RMW16_U_XOR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1214 | { 5518 /* i64.atomic.rmw32.add_u */, WebAssembly::ATOMIC_RMW32_U_ADD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1215 | { 5518 /* i64.atomic.rmw32.add_u */, WebAssembly::ATOMIC_RMW32_U_ADD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1216 | { 5541 /* i64.atomic.rmw32.and_u */, WebAssembly::ATOMIC_RMW32_U_AND_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1217 | { 5541 /* i64.atomic.rmw32.and_u */, WebAssembly::ATOMIC_RMW32_U_AND_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1218 | { 5564 /* i64.atomic.rmw32.cmpxchg_u */, WebAssembly::ATOMIC_RMW32_U_CMPXCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1219 | { 5564 /* i64.atomic.rmw32.cmpxchg_u */, WebAssembly::ATOMIC_RMW32_U_CMPXCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1220 | { 5591 /* i64.atomic.rmw32.or_u */, WebAssembly::ATOMIC_RMW32_U_OR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1221 | { 5591 /* i64.atomic.rmw32.or_u */, WebAssembly::ATOMIC_RMW32_U_OR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1222 | { 5613 /* i64.atomic.rmw32.sub_u */, WebAssembly::ATOMIC_RMW32_U_SUB_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1223 | { 5613 /* i64.atomic.rmw32.sub_u */, WebAssembly::ATOMIC_RMW32_U_SUB_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1224 | { 5636 /* i64.atomic.rmw32.xchg_u */, WebAssembly::ATOMIC_RMW32_U_XCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1225 | { 5636 /* i64.atomic.rmw32.xchg_u */, WebAssembly::ATOMIC_RMW32_U_XCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1226 | { 5660 /* i64.atomic.rmw32.xor_u */, WebAssembly::ATOMIC_RMW32_U_XOR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1227 | { 5660 /* i64.atomic.rmw32.xor_u */, WebAssembly::ATOMIC_RMW32_U_XOR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1228 | { 5683 /* i64.atomic.rmw8.add_u */, WebAssembly::ATOMIC_RMW8_U_ADD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1229 | { 5683 /* i64.atomic.rmw8.add_u */, WebAssembly::ATOMIC_RMW8_U_ADD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1230 | { 5705 /* i64.atomic.rmw8.and_u */, WebAssembly::ATOMIC_RMW8_U_AND_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1231 | { 5705 /* i64.atomic.rmw8.and_u */, WebAssembly::ATOMIC_RMW8_U_AND_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1232 | { 5727 /* i64.atomic.rmw8.cmpxchg_u */, WebAssembly::ATOMIC_RMW8_U_CMPXCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1233 | { 5727 /* i64.atomic.rmw8.cmpxchg_u */, WebAssembly::ATOMIC_RMW8_U_CMPXCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1234 | { 5753 /* i64.atomic.rmw8.or_u */, WebAssembly::ATOMIC_RMW8_U_OR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1235 | { 5753 /* i64.atomic.rmw8.or_u */, WebAssembly::ATOMIC_RMW8_U_OR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1236 | { 5774 /* i64.atomic.rmw8.sub_u */, WebAssembly::ATOMIC_RMW8_U_SUB_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1237 | { 5774 /* i64.atomic.rmw8.sub_u */, WebAssembly::ATOMIC_RMW8_U_SUB_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1238 | { 5796 /* i64.atomic.rmw8.xchg_u */, WebAssembly::ATOMIC_RMW8_U_XCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1239 | { 5796 /* i64.atomic.rmw8.xchg_u */, WebAssembly::ATOMIC_RMW8_U_XCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1240 | { 5819 /* i64.atomic.rmw8.xor_u */, WebAssembly::ATOMIC_RMW8_U_XOR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1241 | { 5819 /* i64.atomic.rmw8.xor_u */, WebAssembly::ATOMIC_RMW8_U_XOR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1242 | { 5841 /* i64.atomic.store */, WebAssembly::ATOMIC_STORE_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1243 | { 5841 /* i64.atomic.store */, WebAssembly::ATOMIC_STORE_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1244 | { 5858 /* i64.atomic.store16 */, WebAssembly::ATOMIC_STORE16_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1245 | { 5858 /* i64.atomic.store16 */, WebAssembly::ATOMIC_STORE16_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1246 | { 5877 /* i64.atomic.store32 */, WebAssembly::ATOMIC_STORE32_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1247 | { 5877 /* i64.atomic.store32 */, WebAssembly::ATOMIC_STORE32_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1248 | { 5896 /* i64.atomic.store8 */, WebAssembly::ATOMIC_STORE8_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1249 | { 5896 /* i64.atomic.store8 */, WebAssembly::ATOMIC_STORE8_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1250 | { 5914 /* i64.clz */, WebAssembly::CLZ_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1251 | { 5922 /* i64.const */, WebAssembly::CONST_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1252 | { 5932 /* i64.ctz */, WebAssembly::CTZ_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1253 | { 5940 /* i64.div_s */, WebAssembly::DIV_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1254 | { 5950 /* i64.div_u */, WebAssembly::DIV_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1255 | { 5960 /* i64.eq */, WebAssembly::EQ_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1256 | { 5967 /* i64.eqz */, WebAssembly::EQZ_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1257 | { 5975 /* i64.extend16_s */, WebAssembly::I64_EXTEND16_S_I64_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
| 1258 | { 5990 /* i64.extend32_s */, WebAssembly::I64_EXTEND32_S_I64_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
| 1259 | { 6005 /* i64.extend8_s */, WebAssembly::I64_EXTEND8_S_I64_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
| 1260 | { 6019 /* i64.extend_i32_s */, WebAssembly::I64_EXTEND_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1261 | { 6036 /* i64.extend_i32_u */, WebAssembly::I64_EXTEND_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1262 | { 6053 /* i64.ge_s */, WebAssembly::GE_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1263 | { 6062 /* i64.ge_u */, WebAssembly::GE_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1264 | { 6071 /* i64.gt_s */, WebAssembly::GT_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1265 | { 6080 /* i64.gt_u */, WebAssembly::GT_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1266 | { 6089 /* i64.le_s */, WebAssembly::LE_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1267 | { 6098 /* i64.le_u */, WebAssembly::LE_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1268 | { 6107 /* i64.load */, WebAssembly::LOAD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1269 | { 6107 /* i64.load */, WebAssembly::LOAD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1270 | { 6116 /* i64.load16_s */, WebAssembly::LOAD16_S_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1271 | { 6116 /* i64.load16_s */, WebAssembly::LOAD16_S_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1272 | { 6129 /* i64.load16_u */, WebAssembly::LOAD16_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1273 | { 6129 /* i64.load16_u */, WebAssembly::LOAD16_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1274 | { 6142 /* i64.load32_s */, WebAssembly::LOAD32_S_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1275 | { 6142 /* i64.load32_s */, WebAssembly::LOAD32_S_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1276 | { 6155 /* i64.load32_u */, WebAssembly::LOAD32_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1277 | { 6155 /* i64.load32_u */, WebAssembly::LOAD32_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1278 | { 6168 /* i64.load8_s */, WebAssembly::LOAD8_S_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1279 | { 6168 /* i64.load8_s */, WebAssembly::LOAD8_S_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1280 | { 6180 /* i64.load8_u */, WebAssembly::LOAD8_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1281 | { 6180 /* i64.load8_u */, WebAssembly::LOAD8_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1282 | { 6192 /* i64.lt_s */, WebAssembly::LT_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1283 | { 6201 /* i64.lt_u */, WebAssembly::LT_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1284 | { 6210 /* i64.mul */, WebAssembly::MUL_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1285 | { 6218 /* i64.mul_wide_s */, WebAssembly::I64_MUL_WIDE_S_S, Convert_NoOperands, AMFBS_HasWideArithmetic, { }, }, |
| 1286 | { 6233 /* i64.mul_wide_u */, WebAssembly::I64_MUL_WIDE_U_S, Convert_NoOperands, AMFBS_HasWideArithmetic, { }, }, |
| 1287 | { 6248 /* i64.ne */, WebAssembly::NE_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1288 | { 6255 /* i64.or */, WebAssembly::OR_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1289 | { 6262 /* i64.popcnt */, WebAssembly::POPCNT_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1290 | { 6273 /* i64.reinterpret_f64 */, WebAssembly::I64_REINTERPRET_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1291 | { 6293 /* i64.rem_s */, WebAssembly::REM_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1292 | { 6303 /* i64.rem_u */, WebAssembly::REM_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1293 | { 6313 /* i64.rotl */, WebAssembly::ROTL_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1294 | { 6322 /* i64.rotr */, WebAssembly::ROTR_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1295 | { 6331 /* i64.select */, WebAssembly::SELECT_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1296 | { 6342 /* i64.shl */, WebAssembly::SHL_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1297 | { 6350 /* i64.shr_s */, WebAssembly::SHR_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1298 | { 6360 /* i64.shr_u */, WebAssembly::SHR_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1299 | { 6370 /* i64.store */, WebAssembly::STORE_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1300 | { 6370 /* i64.store */, WebAssembly::STORE_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1301 | { 6380 /* i64.store16 */, WebAssembly::STORE16_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1302 | { 6380 /* i64.store16 */, WebAssembly::STORE16_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1303 | { 6392 /* i64.store32 */, WebAssembly::STORE32_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1304 | { 6392 /* i64.store32 */, WebAssembly::STORE32_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1305 | { 6404 /* i64.store8 */, WebAssembly::STORE8_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1306 | { 6404 /* i64.store8 */, WebAssembly::STORE8_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
| 1307 | { 6415 /* i64.sub */, WebAssembly::SUB_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1308 | { 6423 /* i64.sub128 */, WebAssembly::I64_SUB128_S, Convert_NoOperands, AMFBS_HasWideArithmetic, { }, }, |
| 1309 | { 6434 /* i64.trunc_f32_s */, WebAssembly::I64_TRUNC_S_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1310 | { 6450 /* i64.trunc_f32_u */, WebAssembly::I64_TRUNC_U_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1311 | { 6466 /* i64.trunc_f64_s */, WebAssembly::I64_TRUNC_S_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1312 | { 6482 /* i64.trunc_f64_u */, WebAssembly::I64_TRUNC_U_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1313 | { 6498 /* i64.trunc_sat_f32_s */, WebAssembly::I64_TRUNC_S_SAT_F32_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
| 1314 | { 6518 /* i64.trunc_sat_f32_u */, WebAssembly::I64_TRUNC_U_SAT_F32_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
| 1315 | { 6538 /* i64.trunc_sat_f64_s */, WebAssembly::I64_TRUNC_S_SAT_F64_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
| 1316 | { 6558 /* i64.trunc_sat_f64_u */, WebAssembly::I64_TRUNC_U_SAT_F64_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
| 1317 | { 6578 /* i64.xor */, WebAssembly::XOR_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1318 | { 6586 /* i64x2.abs */, WebAssembly::ABS_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1319 | { 6596 /* i64x2.add */, WebAssembly::ADD_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1320 | { 6606 /* i64x2.all_true */, WebAssembly::ALLTRUE_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1321 | { 6621 /* i64x2.bitmask */, WebAssembly::BITMASK_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1322 | { 6635 /* i64x2.eq */, WebAssembly::EQ_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1323 | { 6644 /* i64x2.extend_high_i32x4_s */, WebAssembly::extend_high_s_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1324 | { 6670 /* i64x2.extend_high_i32x4_u */, WebAssembly::extend_high_u_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1325 | { 6696 /* i64x2.extend_low_i32x4_s */, WebAssembly::extend_low_s_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1326 | { 6721 /* i64x2.extend_low_i32x4_u */, WebAssembly::extend_low_u_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1327 | { 6746 /* i64x2.extmul_high_i32x4_s */, WebAssembly::EXTMUL_HIGH_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1328 | { 6772 /* i64x2.extmul_high_i32x4_u */, WebAssembly::EXTMUL_HIGH_U_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1329 | { 6798 /* i64x2.extmul_low_i32x4_s */, WebAssembly::EXTMUL_LOW_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1330 | { 6823 /* i64x2.extmul_low_i32x4_u */, WebAssembly::EXTMUL_LOW_U_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1331 | { 6848 /* i64x2.extract_lane */, WebAssembly::EXTRACT_LANE_I64x2_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1332 | { 6867 /* i64x2.ge_s */, WebAssembly::GE_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1333 | { 6878 /* i64x2.gt_s */, WebAssembly::GT_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1334 | { 6889 /* i64x2.le_s */, WebAssembly::LE_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1335 | { 6900 /* i64x2.load32x2_s */, WebAssembly::LOAD_EXTEND_S_I64x2_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1336 | { 6900 /* i64x2.load32x2_s */, WebAssembly::LOAD_EXTEND_S_I64x2_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1337 | { 6917 /* i64x2.load32x2_u */, WebAssembly::LOAD_EXTEND_U_I64x2_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1338 | { 6917 /* i64x2.load32x2_u */, WebAssembly::LOAD_EXTEND_U_I64x2_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1339 | { 6934 /* i64x2.lt_s */, WebAssembly::LT_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1340 | { 6945 /* i64x2.mul */, WebAssembly::MUL_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1341 | { 6955 /* i64x2.ne */, WebAssembly::NE_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1342 | { 6964 /* i64x2.neg */, WebAssembly::NEG_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1343 | { 6974 /* i64x2.relaxed_laneselect */, WebAssembly::LANESELECT_I64x2_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1344 | { 6999 /* i64x2.replace_lane */, WebAssembly::REPLACE_LANE_I64x2_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1345 | { 7018 /* i64x2.shl */, WebAssembly::SHL_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1346 | { 7028 /* i64x2.shr_s */, WebAssembly::SHR_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1347 | { 7040 /* i64x2.shr_u */, WebAssembly::SHR_U_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1348 | { 7052 /* i64x2.splat */, WebAssembly::SPLAT_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1349 | { 7064 /* i64x2.sub */, WebAssembly::SUB_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1350 | { 7074 /* i8x16.abs */, WebAssembly::ABS_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1351 | { 7084 /* i8x16.add */, WebAssembly::ADD_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1352 | { 7094 /* i8x16.add_sat_s */, WebAssembly::ADD_SAT_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1353 | { 7110 /* i8x16.add_sat_u */, WebAssembly::ADD_SAT_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1354 | { 7126 /* i8x16.all_true */, WebAssembly::ALLTRUE_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1355 | { 7141 /* i8x16.avgr_u */, WebAssembly::AVGR_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1356 | { 7154 /* i8x16.bitmask */, WebAssembly::BITMASK_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1357 | { 7168 /* i8x16.eq */, WebAssembly::EQ_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1358 | { 7177 /* i8x16.extract_lane_s */, WebAssembly::EXTRACT_LANE_I8x16_s_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1359 | { 7198 /* i8x16.extract_lane_u */, WebAssembly::EXTRACT_LANE_I8x16_u_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1360 | { 7219 /* i8x16.ge_s */, WebAssembly::GE_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1361 | { 7230 /* i8x16.ge_u */, WebAssembly::GE_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1362 | { 7241 /* i8x16.gt_s */, WebAssembly::GT_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1363 | { 7252 /* i8x16.gt_u */, WebAssembly::GT_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1364 | { 7263 /* i8x16.le_s */, WebAssembly::LE_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1365 | { 7274 /* i8x16.le_u */, WebAssembly::LE_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1366 | { 7285 /* i8x16.lt_s */, WebAssembly::LT_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1367 | { 7296 /* i8x16.lt_u */, WebAssembly::LT_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1368 | { 7307 /* i8x16.max_s */, WebAssembly::MAX_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1369 | { 7319 /* i8x16.max_u */, WebAssembly::MAX_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1370 | { 7331 /* i8x16.min_s */, WebAssembly::MIN_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1371 | { 7343 /* i8x16.min_u */, WebAssembly::MIN_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1372 | { 7355 /* i8x16.narrow_i16x8_s */, WebAssembly::NARROW_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1373 | { 7376 /* i8x16.narrow_i16x8_u */, WebAssembly::NARROW_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1374 | { 7397 /* i8x16.ne */, WebAssembly::NE_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1375 | { 7406 /* i8x16.neg */, WebAssembly::NEG_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1376 | { 7416 /* i8x16.popcnt */, WebAssembly::POPCNT_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1377 | { 7429 /* i8x16.relaxed_laneselect */, WebAssembly::LANESELECT_I8x16_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1378 | { 7454 /* i8x16.relaxed_swizzle */, WebAssembly::RELAXED_SWIZZLE_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
| 1379 | { 7476 /* i8x16.replace_lane */, WebAssembly::REPLACE_LANE_I8x16_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1380 | { 7495 /* i8x16.shl */, WebAssembly::SHL_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1381 | { 7505 /* i8x16.shr_s */, WebAssembly::SHR_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1382 | { 7517 /* i8x16.shr_u */, WebAssembly::SHR_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1383 | { 7529 /* i8x16.shuffle */, WebAssembly::SHUFFLE_S, Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7__Imm1_8__Imm1_9__Imm1_10__Imm1_11__Imm1_12__Imm1_13__Imm1_14__Imm1_15, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1384 | { 7543 /* i8x16.splat */, WebAssembly::SPLAT_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1385 | { 7555 /* i8x16.sub */, WebAssembly::SUB_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1386 | { 7565 /* i8x16.sub_sat_s */, WebAssembly::SUB_SAT_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1387 | { 7581 /* i8x16.sub_sat_u */, WebAssembly::SUB_SAT_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1388 | { 7597 /* i8x16.swizzle */, WebAssembly::SWIZZLE_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1389 | { 7611 /* if */, WebAssembly::IF_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1390 | { 7614 /* local.get */, WebAssembly::LOCAL_GET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
| 1391 | { 7614 /* local.get */, WebAssembly::LOCAL_GET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1392 | { 7614 /* local.get */, WebAssembly::LOCAL_GET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1393 | { 7614 /* local.get */, WebAssembly::LOCAL_GET_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1394 | { 7614 /* local.get */, WebAssembly::LOCAL_GET_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1395 | { 7614 /* local.get */, WebAssembly::LOCAL_GET_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1396 | { 7614 /* local.get */, WebAssembly::LOCAL_GET_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1397 | { 7614 /* local.get */, WebAssembly::LOCAL_GET_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1398 | { 7624 /* local.set */, WebAssembly::LOCAL_SET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
| 1399 | { 7624 /* local.set */, WebAssembly::LOCAL_SET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1400 | { 7624 /* local.set */, WebAssembly::LOCAL_SET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1401 | { 7624 /* local.set */, WebAssembly::LOCAL_SET_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1402 | { 7624 /* local.set */, WebAssembly::LOCAL_SET_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1403 | { 7624 /* local.set */, WebAssembly::LOCAL_SET_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1404 | { 7624 /* local.set */, WebAssembly::LOCAL_SET_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1405 | { 7624 /* local.set */, WebAssembly::LOCAL_SET_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1406 | { 7634 /* local.tee */, WebAssembly::LOCAL_TEE_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
| 1407 | { 7634 /* local.tee */, WebAssembly::LOCAL_TEE_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1408 | { 7634 /* local.tee */, WebAssembly::LOCAL_TEE_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1409 | { 7634 /* local.tee */, WebAssembly::LOCAL_TEE_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
| 1410 | { 7634 /* local.tee */, WebAssembly::LOCAL_TEE_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1411 | { 7634 /* local.tee */, WebAssembly::LOCAL_TEE_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1412 | { 7634 /* local.tee */, WebAssembly::LOCAL_TEE_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1413 | { 7634 /* local.tee */, WebAssembly::LOCAL_TEE_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1414 | { 7644 /* loop */, WebAssembly::LOOP_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1415 | { 7649 /* memory.atomic.notify */, WebAssembly::MEMORY_ATOMIC_NOTIFY_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1416 | { 7649 /* memory.atomic.notify */, WebAssembly::MEMORY_ATOMIC_NOTIFY_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1417 | { 7670 /* memory.atomic.wait32 */, WebAssembly::MEMORY_ATOMIC_WAIT32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1418 | { 7670 /* memory.atomic.wait32 */, WebAssembly::MEMORY_ATOMIC_WAIT32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1419 | { 7691 /* memory.atomic.wait64 */, WebAssembly::MEMORY_ATOMIC_WAIT64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1420 | { 7691 /* memory.atomic.wait64 */, WebAssembly::MEMORY_ATOMIC_WAIT64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
| 1421 | { 7712 /* memory.copy */, WebAssembly::MEMORY_COPY_A32_S, Convert__Imm1_0__Imm1_1, AMFBS_HasBulkMemoryOpt, { MCK_Imm, MCK_Imm }, }, |
| 1422 | { 7712 /* memory.copy */, WebAssembly::MEMORY_COPY_A64_S, Convert__Imm1_0__Imm1_1, AMFBS_HasBulkMemoryOpt, { MCK_Imm, MCK_Imm }, }, |
| 1423 | { 7724 /* memory.fill */, WebAssembly::MEMORY_FILL_A32_S, Convert__Imm1_0, AMFBS_HasBulkMemoryOpt, { MCK_Imm }, }, |
| 1424 | { 7724 /* memory.fill */, WebAssembly::MEMORY_FILL_A64_S, Convert__Imm1_0, AMFBS_HasBulkMemoryOpt, { MCK_Imm }, }, |
| 1425 | { 7736 /* memory.grow */, WebAssembly::anonymous_14734MEMORY_GROW_A32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1426 | { 7736 /* memory.grow */, WebAssembly::anonymous_14735MEMORY_GROW_A64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1427 | { 7748 /* memory.init */, WebAssembly::MEMORY_INIT_A32_S, Convert__Imm1_0__Imm1_1, AMFBS_HasBulkMemoryOpt, { MCK_Imm, MCK_Imm }, }, |
| 1428 | { 7748 /* memory.init */, WebAssembly::MEMORY_INIT_A64_S, Convert__Imm1_0__Imm1_1, AMFBS_HasBulkMemoryOpt, { MCK_Imm, MCK_Imm }, }, |
| 1429 | { 7760 /* memory.size */, WebAssembly::anonymous_14734MEMORY_SIZE_A32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1430 | { 7760 /* memory.size */, WebAssembly::anonymous_14735MEMORY_SIZE_A64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
| 1431 | { 7772 /* nop */, WebAssembly::NOP_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1432 | { 7776 /* ref.func */, WebAssembly::REF_FUNC_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1433 | { 7785 /* ref.is_null */, WebAssembly::REF_IS_NULL_EXNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 1434 | { 7785 /* ref.is_null */, WebAssembly::REF_IS_NULL_EXTERNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 1435 | { 7785 /* ref.is_null */, WebAssembly::REF_IS_NULL_FUNCREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 1436 | { 7797 /* ref.null_exn */, WebAssembly::REF_NULL_EXNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 1437 | { 7810 /* ref.null_extern */, WebAssembly::REF_NULL_EXTERNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 1438 | { 7826 /* ref.null_func */, WebAssembly::REF_NULL_FUNCREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
| 1439 | { 7840 /* ref.test */, WebAssembly::REF_TEST_FUNCREF_S, Convert__Imm1_0, AMFBS_HasGC, { MCK_Imm }, }, |
| 1440 | { 7849 /* rethrow */, WebAssembly::RETHROW_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
| 1441 | { 7857 /* return */, WebAssembly::RETURN_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1442 | { 7864 /* return_call */, WebAssembly::RET_CALL_S, Convert__Imm1_0, AMFBS_HasTailCall, { MCK_Imm }, }, |
| 1443 | { 7876 /* return_call_indirect */, WebAssembly::RET_CALL_INDIRECT_S, Convert__Imm1_0__Imm1_1, AMFBS_HasTailCall, { MCK_Imm, MCK_Imm }, }, |
| 1444 | { 7897 /* return_call_results */, WebAssembly::RET_CALL_RESULTS_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1445 | { 7917 /* table.copy */, WebAssembly::TABLE_COPY_S, Convert__Imm1_0__Imm1_1, AMFBS_HasReferenceTypes, { MCK_Imm, MCK_Imm }, }, |
| 1446 | { 7928 /* table.fill */, WebAssembly::TABLE_FILL_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
| 1447 | { 7928 /* table.fill */, WebAssembly::TABLE_FILL_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1448 | { 7928 /* table.fill */, WebAssembly::TABLE_FILL_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1449 | { 7939 /* table.get */, WebAssembly::TABLE_GET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
| 1450 | { 7939 /* table.get */, WebAssembly::TABLE_GET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1451 | { 7939 /* table.get */, WebAssembly::TABLE_GET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1452 | { 7949 /* table.grow */, WebAssembly::TABLE_GROW_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
| 1453 | { 7949 /* table.grow */, WebAssembly::TABLE_GROW_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1454 | { 7949 /* table.grow */, WebAssembly::TABLE_GROW_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1455 | { 7960 /* table.set */, WebAssembly::TABLE_SET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
| 1456 | { 7960 /* table.set */, WebAssembly::TABLE_SET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1457 | { 7960 /* table.set */, WebAssembly::TABLE_SET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1458 | { 7970 /* table.size */, WebAssembly::TABLE_SIZE_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
| 1459 | { 7981 /* throw */, WebAssembly::THROW_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
| 1460 | { 7987 /* throw_ref */, WebAssembly::THROW_REF_S, Convert_NoOperands, AMFBS_HasExceptionHandling, { }, }, |
| 1461 | { 7997 /* try */, WebAssembly::TRY_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
| 1462 | { 8001 /* try_table */, WebAssembly::TRY_TABLE_S, Convert__Imm1_0__CatchList1_1, AMFBS_HasExceptionHandling, { MCK_Imm, MCK_CatchList }, }, |
| 1463 | { 8011 /* unreachable */, WebAssembly::DEBUG_UNREACHABLE_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1464 | { 8011 /* unreachable */, WebAssembly::UNREACHABLE_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1465 | { 8023 /* v128.and */, WebAssembly::AND_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1466 | { 8032 /* v128.andnot */, WebAssembly::ANDNOT_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1467 | { 8044 /* v128.any_true */, WebAssembly::ANYTRUE_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1468 | { 8058 /* v128.bitselect */, WebAssembly::BITSELECT_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1469 | { 8073 /* v128.const */, WebAssembly::CONST_V128_I64x2_S, Convert__Imm1_0__Imm1_1, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1470 | { 8073 /* v128.const */, WebAssembly::CONST_V128_F64x2_S, Convert__FPImmf641_0__FPImmf641_1, AMFBS_HasSIMD128, { MCK_FPImmf64, MCK_FPImmf64 }, }, |
| 1471 | { 8073 /* v128.const */, WebAssembly::CONST_V128_I32x4_S, Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1472 | { 8073 /* v128.const */, WebAssembly::CONST_V128_F32x4_S, Convert__FPImmf321_0__FPImmf321_1__FPImmf321_2__FPImmf321_3, AMFBS_HasSIMD128, { MCK_FPImmf32, MCK_FPImmf32, MCK_FPImmf32, MCK_FPImmf32 }, }, |
| 1473 | { 8073 /* v128.const */, WebAssembly::CONST_V128_I16x8_S, Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1474 | { 8073 /* v128.const */, WebAssembly::CONST_V128_I8x16_S, Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7__Imm1_8__Imm1_9__Imm1_10__Imm1_11__Imm1_12__Imm1_13__Imm1_14__Imm1_15, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1475 | { 8084 /* v128.load */, WebAssembly::LOAD_V128_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1476 | { 8084 /* v128.load */, WebAssembly::LOAD_V128_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1477 | { 8094 /* v128.load16_lane */, WebAssembly::LOAD_LANE_16_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1478 | { 8094 /* v128.load16_lane */, WebAssembly::LOAD_LANE_16_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1479 | { 8111 /* v128.load16_splat */, WebAssembly::LOAD16_SPLAT_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1480 | { 8111 /* v128.load16_splat */, WebAssembly::LOAD16_SPLAT_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1481 | { 8129 /* v128.load32_lane */, WebAssembly::LOAD_LANE_32_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1482 | { 8129 /* v128.load32_lane */, WebAssembly::LOAD_LANE_32_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1483 | { 8146 /* v128.load32_splat */, WebAssembly::LOAD32_SPLAT_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1484 | { 8146 /* v128.load32_splat */, WebAssembly::LOAD32_SPLAT_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1485 | { 8164 /* v128.load32_zero */, WebAssembly::LOAD_ZERO_32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1486 | { 8164 /* v128.load32_zero */, WebAssembly::LOAD_ZERO_32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1487 | { 8181 /* v128.load64_lane */, WebAssembly::LOAD_LANE_64_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1488 | { 8181 /* v128.load64_lane */, WebAssembly::LOAD_LANE_64_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1489 | { 8198 /* v128.load64_splat */, WebAssembly::LOAD64_SPLAT_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1490 | { 8198 /* v128.load64_splat */, WebAssembly::LOAD64_SPLAT_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1491 | { 8216 /* v128.load64_zero */, WebAssembly::LOAD_ZERO_64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1492 | { 8216 /* v128.load64_zero */, WebAssembly::LOAD_ZERO_64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1493 | { 8233 /* v128.load8_lane */, WebAssembly::LOAD_LANE_8_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1494 | { 8233 /* v128.load8_lane */, WebAssembly::LOAD_LANE_8_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1495 | { 8249 /* v128.load8_splat */, WebAssembly::LOAD8_SPLAT_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1496 | { 8249 /* v128.load8_splat */, WebAssembly::LOAD8_SPLAT_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1497 | { 8266 /* v128.not */, WebAssembly::NOT_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1498 | { 8275 /* v128.or */, WebAssembly::OR_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1499 | { 8283 /* v128.select */, WebAssembly::SELECT_V128_S, Convert_NoOperands, AMFBS_None, { }, }, |
| 1500 | { 8295 /* v128.store */, WebAssembly::STORE_V128_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1501 | { 8295 /* v128.store */, WebAssembly::STORE_V128_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
| 1502 | { 8306 /* v128.store16_lane */, WebAssembly::STORE_LANE_I16x8_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1503 | { 8306 /* v128.store16_lane */, WebAssembly::STORE_LANE_I16x8_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1504 | { 8324 /* v128.store32_lane */, WebAssembly::STORE_LANE_I32x4_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1505 | { 8324 /* v128.store32_lane */, WebAssembly::STORE_LANE_I32x4_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1506 | { 8342 /* v128.store64_lane */, WebAssembly::STORE_LANE_I64x2_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1507 | { 8342 /* v128.store64_lane */, WebAssembly::STORE_LANE_I64x2_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1508 | { 8360 /* v128.store8_lane */, WebAssembly::STORE_LANE_I8x16_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1509 | { 8360 /* v128.store8_lane */, WebAssembly::STORE_LANE_I8x16_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
| 1510 | { 8377 /* v128.xor */, WebAssembly::XOR_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
| 1511 | }; |
| 1512 | |
| 1513 | #include "llvm/Support/Debug.h" |
| 1514 | #include "llvm/Support/Format.h" |
| 1515 | |
| 1516 | unsigned WebAssemblyAsmParser:: |
| 1517 | MatchInstructionImpl(const OperandVector &Operands, |
| 1518 | MCInst &Inst, |
| 1519 | uint64_t &ErrorInfo, |
| 1520 | FeatureBitset &MissingFeatures, |
| 1521 | bool matchingInlineAsm, unsigned VariantID) { |
| 1522 | // Eliminate obvious mismatches. |
| 1523 | if (Operands.size() > 17) { |
| 1524 | ErrorInfo = 17; |
| 1525 | return Match_InvalidOperand; |
| 1526 | } |
| 1527 | |
| 1528 | // Get the current feature set. |
| 1529 | const FeatureBitset &AvailableFeatures = getAvailableFeatures(); |
| 1530 | |
| 1531 | // Get the instruction mnemonic, which is the first token. |
| 1532 | StringRef Mnemonic = ((WebAssemblyOperand &)*Operands[0]).getToken(); |
| 1533 | |
| 1534 | // Some state to try to produce better error messages. |
| 1535 | bool HadMatchOtherThanFeatures = false; |
| 1536 | bool HadMatchOtherThanPredicate = false; |
| 1537 | unsigned RetCode = Match_InvalidOperand; |
| 1538 | MissingFeatures.set(); |
| 1539 | // Set ErrorInfo to the operand that mismatches if it is |
| 1540 | // wrong for all instances of the instruction. |
| 1541 | ErrorInfo = ~0ULL; |
| 1542 | // Find the appropriate table for this asm variant. |
| 1543 | const MatchEntry *Start, *End; |
| 1544 | switch (VariantID) { |
| 1545 | default: llvm_unreachable("invalid variant!"); |
| 1546 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 1547 | } |
| 1548 | // Search the table. |
| 1549 | auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); |
| 1550 | |
| 1551 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found "<< |
| 1552 | std::distance(MnemonicRange.first, MnemonicRange.second) << |
| 1553 | " encodings with mnemonic '"<< Mnemonic << "'\n"); |
| 1554 | |
| 1555 | // Return a more specific error code if no mnemonics match. |
| 1556 | if (MnemonicRange.first == MnemonicRange.second) |
| 1557 | return Match_MnemonicFail; |
| 1558 | |
| 1559 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
| 1560 | it != ie; ++it) { |
| 1561 | const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; |
| 1562 | bool HasRequiredFeatures = |
| 1563 | (AvailableFeatures & RequiredFeatures) == RequiredFeatures; |
| 1564 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode " |
| 1565 | << MII.getName(it->Opcode) << "\n"); |
| 1566 | // equal_range guarantees that instruction mnemonic matches. |
| 1567 | assert(Mnemonic == it->getMnemonic()); |
| 1568 | bool OperandsValid = true; |
| 1569 | for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 16; ++FormalIdx) { |
| 1570 | auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); |
| 1571 | DEBUG_WITH_TYPE("asm-matcher", |
| 1572 | dbgs() << " Matching formal operand class "<< getMatchClassName(Formal) |
| 1573 | << " against actual operand at index "<< ActualIdx); |
| 1574 | if (ActualIdx < Operands.size()) |
| 1575 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << " ("; |
| 1576 | Operands[ActualIdx]->print(dbgs(), *getContext().getAsmInfo()); dbgs() << "): "); |
| 1577 | else |
| 1578 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": "); |
| 1579 | if (ActualIdx >= Operands.size()) { |
| 1580 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n"); |
| 1581 | if (Formal == InvalidMatchClass) { |
| 1582 | break; |
| 1583 | } |
| 1584 | if (isSubclass(Formal, OptionalMatchClass)) { |
| 1585 | continue; |
| 1586 | } |
| 1587 | OperandsValid = false; |
| 1588 | ErrorInfo = ActualIdx; |
| 1589 | break; |
| 1590 | } |
| 1591 | MCParsedAsmOperand &Actual = *Operands[ActualIdx]; |
| 1592 | unsigned Diag = validateOperandClass(Actual, Formal, *STI); |
| 1593 | if (Diag == Match_Success) { |
| 1594 | DEBUG_WITH_TYPE("asm-matcher", |
| 1595 | dbgs() << "match success using generic matcher\n"); |
| 1596 | ++ActualIdx; |
| 1597 | continue; |
| 1598 | } |
| 1599 | // If the generic handler indicates an invalid operand |
| 1600 | // failure, check for a special case. |
| 1601 | if (Diag != Match_Success) { |
| 1602 | unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); |
| 1603 | if (TargetDiag == Match_Success) { |
| 1604 | DEBUG_WITH_TYPE("asm-matcher", |
| 1605 | dbgs() << "match success using target matcher\n"); |
| 1606 | ++ActualIdx; |
| 1607 | continue; |
| 1608 | } |
| 1609 | // If the target matcher returned a specific error code use |
| 1610 | // that, else use the one from the generic matcher. |
| 1611 | if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) |
| 1612 | Diag = TargetDiag; |
| 1613 | } |
| 1614 | // If current formal operand wasn't matched and it is optional |
| 1615 | // then try to match next formal operand |
| 1616 | if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { |
| 1617 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n"); |
| 1618 | continue; |
| 1619 | } |
| 1620 | // If this operand is broken for all of the instances of this |
| 1621 | // mnemonic, keep track of it so we can report loc info. |
| 1622 | // If we already had a match that only failed due to a |
| 1623 | // target predicate, that diagnostic is preferred. |
| 1624 | if (!HadMatchOtherThanPredicate && |
| 1625 | (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { |
| 1626 | if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) |
| 1627 | RetCode = Diag; |
| 1628 | ErrorInfo = ActualIdx; |
| 1629 | } |
| 1630 | // Otherwise, just reject this instance of the mnemonic. |
| 1631 | OperandsValid = false; |
| 1632 | break; |
| 1633 | } |
| 1634 | |
| 1635 | if (!OperandsValid) { |
| 1636 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple " |
| 1637 | "operand mismatches, ignoring " |
| 1638 | "this opcode\n"); |
| 1639 | continue; |
| 1640 | } |
| 1641 | if (!HasRequiredFeatures) { |
| 1642 | HadMatchOtherThanFeatures = true; |
| 1643 | FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; |
| 1644 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:"; |
| 1645 | for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) |
| 1646 | if (NewMissingFeatures[I]) |
| 1647 | dbgs() << ' ' << I; |
| 1648 | dbgs() << "\n"); |
| 1649 | if (NewMissingFeatures.count() <= |
| 1650 | MissingFeatures.count()) |
| 1651 | MissingFeatures = NewMissingFeatures; |
| 1652 | continue; |
| 1653 | } |
| 1654 | |
| 1655 | Inst.clear(); |
| 1656 | |
| 1657 | Inst.setOpcode(it->Opcode); |
| 1658 | // We have a potential match but have not rendered the operands. |
| 1659 | // Check the target predicate to handle any context sensitive |
| 1660 | // constraints. |
| 1661 | // For example, Ties that are referenced multiple times must be |
| 1662 | // checked here to ensure the input is the same for each match |
| 1663 | // constraints. If we leave it any later the ties will have been |
| 1664 | // canonicalized |
| 1665 | unsigned MatchResult; |
| 1666 | if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { |
| 1667 | Inst.clear(); |
| 1668 | DEBUG_WITH_TYPE( |
| 1669 | "asm-matcher", |
| 1670 | dbgs() << "Early target match predicate failed with diag code " |
| 1671 | << MatchResult << "\n"); |
| 1672 | RetCode = MatchResult; |
| 1673 | HadMatchOtherThanPredicate = true; |
| 1674 | continue; |
| 1675 | } |
| 1676 | |
| 1677 | if (matchingInlineAsm) { |
| 1678 | convertToMapAndConstraints(it->ConvertFn, Operands); |
| 1679 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
| 1680 | ErrorInfo)) |
| 1681 | return Match_InvalidTiedOperand; |
| 1682 | |
| 1683 | return Match_Success; |
| 1684 | } |
| 1685 | |
| 1686 | // We have selected a definite instruction, convert the parsed |
| 1687 | // operands into the appropriate MCInst. |
| 1688 | convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); |
| 1689 | |
| 1690 | // We have a potential match. Check the target predicate to |
| 1691 | // handle any context sensitive constraints. |
| 1692 | if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { |
| 1693 | DEBUG_WITH_TYPE("asm-matcher", |
| 1694 | dbgs() << "Target match predicate failed with diag code " |
| 1695 | << MatchResult << "\n"); |
| 1696 | Inst.clear(); |
| 1697 | RetCode = MatchResult; |
| 1698 | HadMatchOtherThanPredicate = true; |
| 1699 | continue; |
| 1700 | } |
| 1701 | |
| 1702 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
| 1703 | ErrorInfo)) |
| 1704 | return Match_InvalidTiedOperand; |
| 1705 | |
| 1706 | DEBUG_WITH_TYPE( |
| 1707 | "asm-matcher", |
| 1708 | dbgs() << "Opcode result: complete match, selecting this opcode\n"); |
| 1709 | return Match_Success; |
| 1710 | } |
| 1711 | |
| 1712 | // Okay, we had no match. Try to return a useful error code. |
| 1713 | if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) |
| 1714 | return RetCode; |
| 1715 | |
| 1716 | ErrorInfo = 0; |
| 1717 | return Match_MissingFeature; |
| 1718 | } |
| 1719 | |
| 1720 | #endif // GET_MATCHER_IMPLEMENTATION |
| 1721 | |
| 1722 | |
| 1723 | #ifdef GET_MNEMONIC_SPELL_CHECKER |
| 1724 | #undef GET_MNEMONIC_SPELL_CHECKER |
| 1725 | |
| 1726 | static std::string WebAssemblyMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { |
| 1727 | const unsigned MaxEditDist = 2; |
| 1728 | std::vector<StringRef> Candidates; |
| 1729 | StringRef Prev = ""; |
| 1730 | |
| 1731 | // Find the appropriate table for this asm variant. |
| 1732 | const MatchEntry *Start, *End; |
| 1733 | switch (VariantID) { |
| 1734 | default: llvm_unreachable("invalid variant!"); |
| 1735 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 1736 | } |
| 1737 | |
| 1738 | for (auto I = Start; I < End; I++) { |
| 1739 | // Ignore unsupported instructions. |
| 1740 | const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; |
| 1741 | if ((FBS & RequiredFeatures) != RequiredFeatures) |
| 1742 | continue; |
| 1743 | |
| 1744 | StringRef T = I->getMnemonic(); |
| 1745 | // Avoid recomputing the edit distance for the same string. |
| 1746 | if (T == Prev) |
| 1747 | continue; |
| 1748 | |
| 1749 | Prev = T; |
| 1750 | unsigned Dist = S.edit_distance(T, false, MaxEditDist); |
| 1751 | if (Dist <= MaxEditDist) |
| 1752 | Candidates.push_back(T); |
| 1753 | } |
| 1754 | |
| 1755 | if (Candidates.empty()) |
| 1756 | return ""; |
| 1757 | |
| 1758 | std::string Res = ", did you mean: "; |
| 1759 | unsigned i = 0; |
| 1760 | for (; i < Candidates.size() - 1; i++) |
| 1761 | Res += Candidates[i].str() + ", "; |
| 1762 | return Res + Candidates[i].str() + "?"; |
| 1763 | } |
| 1764 | |
| 1765 | #endif // GET_MNEMONIC_SPELL_CHECKER |
| 1766 | |
| 1767 | |
| 1768 | #ifdef GET_MNEMONIC_CHECKER |
| 1769 | #undef GET_MNEMONIC_CHECKER |
| 1770 | |
| 1771 | static bool WebAssemblyCheckMnemonic(StringRef Mnemonic, |
| 1772 | const FeatureBitset &AvailableFeatures, |
| 1773 | unsigned VariantID) { |
| 1774 | // Find the appropriate table for this asm variant. |
| 1775 | const MatchEntry *Start, *End; |
| 1776 | switch (VariantID) { |
| 1777 | default: llvm_unreachable("invalid variant!"); |
| 1778 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 1779 | } |
| 1780 | |
| 1781 | // Search the table. |
| 1782 | auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); |
| 1783 | |
| 1784 | if (MnemonicRange.first == MnemonicRange.second) |
| 1785 | return false; |
| 1786 | |
| 1787 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
| 1788 | it != ie; ++it) { |
| 1789 | const FeatureBitset &RequiredFeatures = |
| 1790 | FeatureBitsets[it->RequiredFeaturesIdx]; |
| 1791 | if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures) |
| 1792 | return true; |
| 1793 | } |
| 1794 | return false; |
| 1795 | } |
| 1796 | |
| 1797 | #endif // GET_MNEMONIC_CHECKER |
| 1798 | |
| 1799 |
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