1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* MC Register Information *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11extern const int16_t WebAssemblyRegDiffLists[] = {
12 /* 0 */ 0,
13};
14
15extern const LaneBitmask WebAssemblyLaneMaskLists[] = {
16 /* 0 */ LaneBitmask(0xFFFFFFFFFFFFFFFF),
17};
18
19extern const uint16_t WebAssemblySubRegIdxLists[] = {
20 /* 0 */
21 /* dummy */ 0
22};
23
24
25#ifdef __GNUC__
26#pragma GCC diagnostic push
27#pragma GCC diagnostic ignored "-Woverlength-strings"
28#endif
29extern const char WebAssemblyRegStrings[] = {
30 /* 0 */ "F32_0\000"
31 /* 6 */ "I32_0\000"
32 /* 12 */ "F64_0\000"
33 /* 18 */ "I64_0\000"
34 /* 24 */ "V128_0\000"
35 /* 31 */ "FUNCREF_0\000"
36 /* 41 */ "EXTERNREF_0\000"
37 /* 53 */ "EXNREF_0\000"
38 /* 62 */ "FP32\000"
39 /* 67 */ "SP32\000"
40 /* 72 */ "FP64\000"
41 /* 77 */ "SP64\000"
42 /* 82 */ "VALUE_STACK\000"
43 /* 94 */ "ARGUMENTS\000"
44};
45#ifdef __GNUC__
46#pragma GCC diagnostic pop
47#endif
48
49extern const MCRegisterDesc WebAssemblyRegDesc[] = { // Descriptors
50 { .Name: 5, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 0, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
51 { .Name: 94, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 0, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
52 { .Name: 82, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 1, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
53 { .Name: 53, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 2, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
54 { .Name: 41, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 3, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
55 { .Name: 62, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 4, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
56 { .Name: 72, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 5, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
57 { .Name: 31, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 6, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
58 { .Name: 67, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 7, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
59 { .Name: 77, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 8, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
60 { .Name: 0, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 9, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
61 { .Name: 12, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 10, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
62 { .Name: 6, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 11, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
63 { .Name: 18, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 12, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
64 { .Name: 24, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 13, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
65};
66
67extern const MCPhysReg WebAssemblyRegUnitRoots[][2] = {
68 { WebAssembly::ARGUMENTS },
69 { WebAssembly::VALUE_STACK },
70 { WebAssembly::EXNREF_0 },
71 { WebAssembly::EXTERNREF_0 },
72 { WebAssembly::FP32 },
73 { WebAssembly::FP64 },
74 { WebAssembly::FUNCREF_0 },
75 { WebAssembly::SP32 },
76 { WebAssembly::SP64 },
77 { WebAssembly::F32_0 },
78 { WebAssembly::F64_0 },
79 { WebAssembly::I32_0 },
80 { WebAssembly::I64_0 },
81 { WebAssembly::V128_0 },
82};
83
84// Register classes...
85
86#ifdef __GNUC__
87#pragma GCC diagnostic push
88#pragma GCC diagnostic ignored "-Woverlength-strings"
89#endif
90extern const char WebAssemblyRegClassStrings[] = {
91 /* 0 */ "F32\000"
92 /* 4 */ "I32\000"
93 /* 8 */ "F64\000"
94 /* 12 */ "I64\000"
95 /* 16 */ "V128\000"
96 /* 21 */ "FUNCREF\000"
97 /* 29 */ "EXTERNREF\000"
98 /* 39 */ "EXNREF\000"
99};
100#ifdef __GNUC__
101#pragma GCC diagnostic pop
102#endif
103
104using WebAssemblyRegisterClassStorage = MCRegisterClassStorage<8, 12, 13, 8, 1, 0>;
105extern const MCRegisterClassStorage<8, 12, 13, 8, 1, 0> WebAssemblyMCRegisterClassStorage = {
106 .Classes: {
107 {
108 offsetof(WebAssemblyRegisterClassStorage, Regs[0]) - 0 * sizeof(MCRegisterClass),
109 offsetof(WebAssemblyRegisterClassStorage, BitSets[0]) - 0 * sizeof(MCRegisterClass),
110 .NameIdx: 39,
111 .RegSizeInBits: 0,
112 .RegsSize: 1,
113 .RegSetSize: 1,
114 .ID: WebAssembly::EXNREFRegClassID,
115 .CopyCost: 1, /* CopyCost */
116 .Allocatable: true, /* Allocatable */
117 .BaseClass: false,
118 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[0]) - 0 * sizeof(MCRegisterClass),
119 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 0 * sizeof(MCRegisterClass),
120 .LaneMask: LaneBitmask(0x0000000000000001),
121 .AllocationPriority: 0,
122 .GlobalPriority: false,
123 .TSFlags: 0x00, /* TSFlags */
124 .SpillStackID: 0, /* SpillStackID */
125 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
126 .CoveredBySubRegs: false, /* CoveredBySubRegs */
127 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 0 * sizeof(MCRegisterClass),
128 .SuperClassesSize: 0
129 },
130 {
131 offsetof(WebAssemblyRegisterClassStorage, Regs[1]) - 1 * sizeof(MCRegisterClass),
132 offsetof(WebAssemblyRegisterClassStorage, BitSets[1]) - 1 * sizeof(MCRegisterClass),
133 .NameIdx: 29,
134 .RegSizeInBits: 0,
135 .RegsSize: 1,
136 .RegSetSize: 1,
137 .ID: WebAssembly::EXTERNREFRegClassID,
138 .CopyCost: 1, /* CopyCost */
139 .Allocatable: true, /* Allocatable */
140 .BaseClass: false,
141 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[1]) - 1 * sizeof(MCRegisterClass),
142 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 1 * sizeof(MCRegisterClass),
143 .LaneMask: LaneBitmask(0x0000000000000001),
144 .AllocationPriority: 0,
145 .GlobalPriority: false,
146 .TSFlags: 0x00, /* TSFlags */
147 .SpillStackID: 0, /* SpillStackID */
148 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
149 .CoveredBySubRegs: false, /* CoveredBySubRegs */
150 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 1 * sizeof(MCRegisterClass),
151 .SuperClassesSize: 0
152 },
153 {
154 offsetof(WebAssemblyRegisterClassStorage, Regs[2]) - 2 * sizeof(MCRegisterClass),
155 offsetof(WebAssemblyRegisterClassStorage, BitSets[2]) - 2 * sizeof(MCRegisterClass),
156 .NameIdx: 21,
157 .RegSizeInBits: 0,
158 .RegsSize: 1,
159 .RegSetSize: 1,
160 .ID: WebAssembly::FUNCREFRegClassID,
161 .CopyCost: 1, /* CopyCost */
162 .Allocatable: true, /* Allocatable */
163 .BaseClass: false,
164 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[2]) - 2 * sizeof(MCRegisterClass),
165 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 2 * sizeof(MCRegisterClass),
166 .LaneMask: LaneBitmask(0x0000000000000001),
167 .AllocationPriority: 0,
168 .GlobalPriority: false,
169 .TSFlags: 0x00, /* TSFlags */
170 .SpillStackID: 0, /* SpillStackID */
171 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
172 .CoveredBySubRegs: false, /* CoveredBySubRegs */
173 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 2 * sizeof(MCRegisterClass),
174 .SuperClassesSize: 0
175 },
176 {
177 offsetof(WebAssemblyRegisterClassStorage, Regs[3]) - 3 * sizeof(MCRegisterClass),
178 offsetof(WebAssemblyRegisterClassStorage, BitSets[3]) - 3 * sizeof(MCRegisterClass),
179 .NameIdx: 4,
180 .RegSizeInBits: 32,
181 .RegsSize: 3,
182 .RegSetSize: 2,
183 .ID: WebAssembly::I32RegClassID,
184 .CopyCost: 1, /* CopyCost */
185 .Allocatable: true, /* Allocatable */
186 .BaseClass: false,
187 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[3]) - 3 * sizeof(MCRegisterClass),
188 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 3 * sizeof(MCRegisterClass),
189 .LaneMask: LaneBitmask(0x0000000000000001),
190 .AllocationPriority: 0,
191 .GlobalPriority: false,
192 .TSFlags: 0x00, /* TSFlags */
193 .SpillStackID: 0, /* SpillStackID */
194 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
195 .CoveredBySubRegs: false, /* CoveredBySubRegs */
196 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 3 * sizeof(MCRegisterClass),
197 .SuperClassesSize: 0
198 },
199 {
200 offsetof(WebAssemblyRegisterClassStorage, Regs[6]) - 4 * sizeof(MCRegisterClass),
201 offsetof(WebAssemblyRegisterClassStorage, BitSets[5]) - 4 * sizeof(MCRegisterClass),
202 .NameIdx: 0,
203 .RegSizeInBits: 32,
204 .RegsSize: 1,
205 .RegSetSize: 2,
206 .ID: WebAssembly::F32RegClassID,
207 .CopyCost: 1, /* CopyCost */
208 .Allocatable: true, /* Allocatable */
209 .BaseClass: false,
210 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[4]) - 4 * sizeof(MCRegisterClass),
211 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 4 * sizeof(MCRegisterClass),
212 .LaneMask: LaneBitmask(0x0000000000000001),
213 .AllocationPriority: 0,
214 .GlobalPriority: false,
215 .TSFlags: 0x00, /* TSFlags */
216 .SpillStackID: 0, /* SpillStackID */
217 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
218 .CoveredBySubRegs: false, /* CoveredBySubRegs */
219 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 4 * sizeof(MCRegisterClass),
220 .SuperClassesSize: 0
221 },
222 {
223 offsetof(WebAssemblyRegisterClassStorage, Regs[7]) - 5 * sizeof(MCRegisterClass),
224 offsetof(WebAssemblyRegisterClassStorage, BitSets[7]) - 5 * sizeof(MCRegisterClass),
225 .NameIdx: 12,
226 .RegSizeInBits: 64,
227 .RegsSize: 3,
228 .RegSetSize: 2,
229 .ID: WebAssembly::I64RegClassID,
230 .CopyCost: 1, /* CopyCost */
231 .Allocatable: true, /* Allocatable */
232 .BaseClass: false,
233 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[5]) - 5 * sizeof(MCRegisterClass),
234 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 5 * sizeof(MCRegisterClass),
235 .LaneMask: LaneBitmask(0x0000000000000001),
236 .AllocationPriority: 0,
237 .GlobalPriority: false,
238 .TSFlags: 0x00, /* TSFlags */
239 .SpillStackID: 0, /* SpillStackID */
240 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
241 .CoveredBySubRegs: false, /* CoveredBySubRegs */
242 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 5 * sizeof(MCRegisterClass),
243 .SuperClassesSize: 0
244 },
245 {
246 offsetof(WebAssemblyRegisterClassStorage, Regs[10]) - 6 * sizeof(MCRegisterClass),
247 offsetof(WebAssemblyRegisterClassStorage, BitSets[9]) - 6 * sizeof(MCRegisterClass),
248 .NameIdx: 8,
249 .RegSizeInBits: 64,
250 .RegsSize: 1,
251 .RegSetSize: 2,
252 .ID: WebAssembly::F64RegClassID,
253 .CopyCost: 1, /* CopyCost */
254 .Allocatable: true, /* Allocatable */
255 .BaseClass: false,
256 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[6]) - 6 * sizeof(MCRegisterClass),
257 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 6 * sizeof(MCRegisterClass),
258 .LaneMask: LaneBitmask(0x0000000000000001),
259 .AllocationPriority: 0,
260 .GlobalPriority: false,
261 .TSFlags: 0x00, /* TSFlags */
262 .SpillStackID: 0, /* SpillStackID */
263 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
264 .CoveredBySubRegs: false, /* CoveredBySubRegs */
265 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 6 * sizeof(MCRegisterClass),
266 .SuperClassesSize: 0
267 },
268 {
269 offsetof(WebAssemblyRegisterClassStorage, Regs[11]) - 7 * sizeof(MCRegisterClass),
270 offsetof(WebAssemblyRegisterClassStorage, BitSets[11]) - 7 * sizeof(MCRegisterClass),
271 .NameIdx: 16,
272 .RegSizeInBits: 128,
273 .RegsSize: 1,
274 .RegSetSize: 2,
275 .ID: WebAssembly::V128RegClassID,
276 .CopyCost: 1, /* CopyCost */
277 .Allocatable: true, /* Allocatable */
278 .BaseClass: false,
279 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[7]) - 7 * sizeof(MCRegisterClass),
280 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 7 * sizeof(MCRegisterClass),
281 .LaneMask: LaneBitmask(0x0000000000000001),
282 .AllocationPriority: 0,
283 .GlobalPriority: false,
284 .TSFlags: 0x00, /* TSFlags */
285 .SpillStackID: 0, /* SpillStackID */
286 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
287 .CoveredBySubRegs: false, /* CoveredBySubRegs */
288 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 7 * sizeof(MCRegisterClass),
289 .SuperClassesSize: 0
290 },
291 },
292 .Regs: {
293 /* 0 */ WebAssembly::EXNREF_0,
294 /* 1 */ WebAssembly::EXTERNREF_0,
295 /* 2 */ WebAssembly::FUNCREF_0,
296 /* 3 */ WebAssembly::FP32, WebAssembly::SP32, WebAssembly::I32_0,
297 /* 6 */ WebAssembly::F32_0,
298 /* 7 */ WebAssembly::FP64, WebAssembly::SP64, WebAssembly::I64_0,
299 /* 10 */ WebAssembly::F64_0,
300 /* 11 */ WebAssembly::V128_0,
301 },
302 .BitSets: {
303 /* 0 */ 0x08,
304 /* 1 */ 0x10,
305 /* 2 */ 0x80,
306 /* 3 */ 0x20, 0x11,
307 /* 5 */ 0x00, 0x04,
308 /* 7 */ 0x40, 0x22,
309 /* 9 */ 0x00, 0x08,
310 /* 11 */ 0x00, 0x40,
311 },
312 .SubClassMasks: {
313 // 0 EXNREF
314 0x00000001,
315 // 1 EXTERNREF
316 0x00000002,
317 // 2 FUNCREF
318 0x00000004,
319 // 3 I32
320 0x00000008,
321 // 4 F32
322 0x00000010,
323 // 5 I64
324 0x00000020,
325 // 6 F64
326 0x00000040,
327 // 7 V128
328 0x00000080,
329 },
330 .SuperRegIdxSeqs: {
331 /* 0 */ 0,
332 },
333 .SuperClasses: {
334 /* 0 EXNREF */
335 /* 0 EXTERNREF */
336 /* 0 FUNCREF */
337 /* 0 I32 */
338 /* 0 F32 */
339 /* 0 I64 */
340 /* 0 F64 */
341 /* 0 V128 */
342 }
343};
344
345const MCRegisterClass &getWebAssemblyMCRegisterClass(unsigned RC) {
346 return WebAssemblyMCRegisterClassStorage.Classes[RC];
347}
348
349extern const uint16_t WebAssemblyRegEncodingTable[] = {
350 0,
351 0,
352 0,
353 0,
354 0,
355 0,
356 0,
357 0,
358 0,
359 0,
360 0,
361 0,
362 0,
363 0,
364 0,
365};
366static inline void InitWebAssemblyMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) {
367 RI->InitMCRegisterInfo(D: WebAssemblyRegDesc, NR: 15, RA, PC, C: WebAssemblyMCRegisterClassStorage.Classes, NC: 8, RURoots: WebAssemblyRegUnitRoots, NRU: 14, DL: WebAssemblyRegDiffLists, RUMS: WebAssemblyLaneMaskLists, Strings: WebAssemblyRegStrings, ClassStrings: WebAssemblyRegClassStrings, SubIndices: WebAssemblySubRegIdxLists, NumIndices: 1,
368RET: WebAssemblyRegEncodingTable, RUI: nullptr);
369
370}
371
372
373} // namespace llvm
374