1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* MC Register Information *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11extern const int16_t WebAssemblyRegDiffLists[] = {
12 /* 0 */ 0,
13};
14
15extern const LaneBitmask WebAssemblyLaneMaskLists[] = {
16 /* 0 */ LaneBitmask(0xFFFFFFFFFFFFFFFF),
17};
18
19extern const uint16_t WebAssemblySubRegIdxLists[] = {
20 /* 0 */
21 /* dummy */ 0
22};
23
24
25#ifdef __GNUC__
26#pragma GCC diagnostic push
27#pragma GCC diagnostic ignored "-Woverlength-strings"
28#endif
29extern const char WebAssemblyRegStrings[] = {
30 /* 0 */ "F32_0\000"
31 /* 6 */ "I32_0\000"
32 /* 12 */ "F64_0\000"
33 /* 18 */ "I64_0\000"
34 /* 24 */ "V128_0\000"
35 /* 31 */ "FUNCREF_0\000"
36 /* 41 */ "EXTERNREF_0\000"
37 /* 53 */ "EXNREF_0\000"
38 /* 62 */ "FP32\000"
39 /* 67 */ "SP32\000"
40 /* 72 */ "FP64\000"
41 /* 77 */ "SP64\000"
42 /* 82 */ "VALUE_STACK\000"
43 /* 94 */ "ARGUMENTS\000"
44};
45#ifdef __GNUC__
46#pragma GCC diagnostic pop
47#endif
48
49extern const MCRegisterDesc WebAssemblyRegDesc[] = { // Descriptors
50 { .Name: 5, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 0, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
51 { .Name: 94, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 0, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
52 { .Name: 82, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 1, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
53 { .Name: 53, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 2, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
54 { .Name: 41, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 3, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
55 { .Name: 62, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 4, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
56 { .Name: 72, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 5, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
57 { .Name: 31, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 6, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
58 { .Name: 67, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 7, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
59 { .Name: 77, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 8, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
60 { .Name: 0, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 9, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
61 { .Name: 12, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 10, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
62 { .Name: 6, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 11, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
63 { .Name: 18, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 12, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
64 { .Name: 24, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 13, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
65};
66
67extern const MCPhysReg WebAssemblyRegUnitRoots[][2] = {
68 { WebAssembly::ARGUMENTS },
69 { WebAssembly::VALUE_STACK },
70 { WebAssembly::EXNREF_0 },
71 { WebAssembly::EXTERNREF_0 },
72 { WebAssembly::FP32 },
73 { WebAssembly::FP64 },
74 { WebAssembly::FUNCREF_0 },
75 { WebAssembly::SP32 },
76 { WebAssembly::SP64 },
77 { WebAssembly::F32_0 },
78 { WebAssembly::F64_0 },
79 { WebAssembly::I32_0 },
80 { WebAssembly::I64_0 },
81 { WebAssembly::V128_0 },
82};
83
84namespace { // Register classes...
85 // EXNREF Register Class...
86 const MCPhysReg EXNREF[] = {
87 WebAssembly::EXNREF_0,
88 };
89
90 // EXNREF Bit set.
91 const uint8_t EXNREFBits[] = {
92 0x08,
93 };
94
95 // EXTERNREF Register Class...
96 const MCPhysReg EXTERNREF[] = {
97 WebAssembly::EXTERNREF_0,
98 };
99
100 // EXTERNREF Bit set.
101 const uint8_t EXTERNREFBits[] = {
102 0x10,
103 };
104
105 // FUNCREF Register Class...
106 const MCPhysReg FUNCREF[] = {
107 WebAssembly::FUNCREF_0,
108 };
109
110 // FUNCREF Bit set.
111 const uint8_t FUNCREFBits[] = {
112 0x80,
113 };
114
115 // I32 Register Class...
116 const MCPhysReg I32[] = {
117 WebAssembly::FP32, WebAssembly::SP32, WebAssembly::I32_0,
118 };
119
120 // I32 Bit set.
121 const uint8_t I32Bits[] = {
122 0x20, 0x11,
123 };
124
125 // F32 Register Class...
126 const MCPhysReg F32[] = {
127 WebAssembly::F32_0,
128 };
129
130 // F32 Bit set.
131 const uint8_t F32Bits[] = {
132 0x00, 0x04,
133 };
134
135 // I64 Register Class...
136 const MCPhysReg I64[] = {
137 WebAssembly::FP64, WebAssembly::SP64, WebAssembly::I64_0,
138 };
139
140 // I64 Bit set.
141 const uint8_t I64Bits[] = {
142 0x40, 0x22,
143 };
144
145 // F64 Register Class...
146 const MCPhysReg F64[] = {
147 WebAssembly::F64_0,
148 };
149
150 // F64 Bit set.
151 const uint8_t F64Bits[] = {
152 0x00, 0x08,
153 };
154
155 // V128 Register Class...
156 const MCPhysReg V128[] = {
157 WebAssembly::V128_0,
158 };
159
160 // V128 Bit set.
161 const uint8_t V128Bits[] = {
162 0x00, 0x40,
163 };
164
165} // end anonymous namespace
166
167
168#ifdef __GNUC__
169#pragma GCC diagnostic push
170#pragma GCC diagnostic ignored "-Woverlength-strings"
171#endif
172extern const char WebAssemblyRegClassStrings[] = {
173 /* 0 */ "F32\000"
174 /* 4 */ "I32\000"
175 /* 8 */ "F64\000"
176 /* 12 */ "I64\000"
177 /* 16 */ "V128\000"
178 /* 21 */ "FUNCREF\000"
179 /* 29 */ "EXTERNREF\000"
180 /* 39 */ "EXNREF\000"
181};
182#ifdef __GNUC__
183#pragma GCC diagnostic pop
184#endif
185
186extern const MCRegisterClass WebAssemblyMCRegisterClasses[] = {
187 { .RegsBegin: EXNREF, .RegSet: EXNREFBits, .NameIdx: 39, .RegsSize: 1, .RegSetSize: sizeof(EXNREFBits), .ID: WebAssembly::EXNREFRegClassID, .RegSizeInBits: 0, .CopyCost: 1, .Allocatable: true, .BaseClass: false },
188 { .RegsBegin: EXTERNREF, .RegSet: EXTERNREFBits, .NameIdx: 29, .RegsSize: 1, .RegSetSize: sizeof(EXTERNREFBits), .ID: WebAssembly::EXTERNREFRegClassID, .RegSizeInBits: 0, .CopyCost: 1, .Allocatable: true, .BaseClass: false },
189 { .RegsBegin: FUNCREF, .RegSet: FUNCREFBits, .NameIdx: 21, .RegsSize: 1, .RegSetSize: sizeof(FUNCREFBits), .ID: WebAssembly::FUNCREFRegClassID, .RegSizeInBits: 0, .CopyCost: 1, .Allocatable: true, .BaseClass: false },
190 { .RegsBegin: I32, .RegSet: I32Bits, .NameIdx: 4, .RegsSize: 3, .RegSetSize: sizeof(I32Bits), .ID: WebAssembly::I32RegClassID, .RegSizeInBits: 32, .CopyCost: 1, .Allocatable: true, .BaseClass: false },
191 { .RegsBegin: F32, .RegSet: F32Bits, .NameIdx: 0, .RegsSize: 1, .RegSetSize: sizeof(F32Bits), .ID: WebAssembly::F32RegClassID, .RegSizeInBits: 32, .CopyCost: 1, .Allocatable: true, .BaseClass: false },
192 { .RegsBegin: I64, .RegSet: I64Bits, .NameIdx: 12, .RegsSize: 3, .RegSetSize: sizeof(I64Bits), .ID: WebAssembly::I64RegClassID, .RegSizeInBits: 64, .CopyCost: 1, .Allocatable: true, .BaseClass: false },
193 { .RegsBegin: F64, .RegSet: F64Bits, .NameIdx: 8, .RegsSize: 1, .RegSetSize: sizeof(F64Bits), .ID: WebAssembly::F64RegClassID, .RegSizeInBits: 64, .CopyCost: 1, .Allocatable: true, .BaseClass: false },
194 { .RegsBegin: V128, .RegSet: V128Bits, .NameIdx: 16, .RegsSize: 1, .RegSetSize: sizeof(V128Bits), .ID: WebAssembly::V128RegClassID, .RegSizeInBits: 128, .CopyCost: 1, .Allocatable: true, .BaseClass: false },
195};
196
197extern const uint16_t WebAssemblyRegEncodingTable[] = {
198 0,
199 0,
200 0,
201 0,
202 0,
203 0,
204 0,
205 0,
206 0,
207 0,
208 0,
209 0,
210 0,
211 0,
212 0,
213};
214static inline void InitWebAssemblyMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) {
215 RI->InitMCRegisterInfo(D: WebAssemblyRegDesc, NR: 15, RA, PC, C: WebAssemblyMCRegisterClasses, NC: 8, RURoots: WebAssemblyRegUnitRoots, NRU: 14, DL: WebAssemblyRegDiffLists, RUMS: WebAssemblyLaneMaskLists, Strings: WebAssemblyRegStrings, ClassStrings: WebAssemblyRegClassStrings, SubIndices: WebAssemblySubRegIdxLists, NumIndices: 1,
216RET: WebAssemblyRegEncodingTable);
217
218}
219
220} // end namespace llvm
221
222