1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* MC Register Information *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11extern const int16_t WebAssemblyRegDiffLists[] = {
12 /* 0 */ 0,
13};
14
15extern const LaneBitmask WebAssemblyLaneMaskLists[] = {
16 /* 0 */ LaneBitmask(0xFFFFFFFFFFFFFFFF),
17};
18
19extern const uint16_t WebAssemblySubRegIdxLists[] = {
20 /* 0 */
21 /* dummy */ 0
22};
23
24
25#ifdef __GNUC__
26#pragma GCC diagnostic push
27#pragma GCC diagnostic ignored "-Woverlength-strings"
28#endif
29extern const char WebAssemblyRegStrings[] = {
30 /* 0 */ "F32_0\000"
31 /* 6 */ "I32_0\000"
32 /* 12 */ "F64_0\000"
33 /* 18 */ "I64_0\000"
34 /* 24 */ "V128_0\000"
35 /* 31 */ "FUNCREF_0\000"
36 /* 41 */ "EXTERNREF_0\000"
37 /* 53 */ "EXNREF_0\000"
38 /* 62 */ "FP32\000"
39 /* 67 */ "SP32\000"
40 /* 72 */ "FP64\000"
41 /* 77 */ "SP64\000"
42 /* 82 */ "VALUE_STACK\000"
43 /* 94 */ "ARGUMENTS\000"
44};
45#ifdef __GNUC__
46#pragma GCC diagnostic pop
47#endif
48
49extern const MCRegisterDesc WebAssemblyRegDesc[] = { // Descriptors
50 { .Name: 5, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 0, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
51 { .Name: 94, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 0, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
52 { .Name: 82, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 1, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
53 { .Name: 53, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 2, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
54 { .Name: 41, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 3, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
55 { .Name: 62, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 4, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
56 { .Name: 72, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 5, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
57 { .Name: 31, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 6, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
58 { .Name: 67, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 7, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
59 { .Name: 77, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 8, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
60 { .Name: 0, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 9, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
61 { .Name: 12, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 10, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
62 { .Name: 6, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 11, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
63 { .Name: 18, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 12, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
64 { .Name: 24, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 13, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
65};
66
67extern const MCPhysReg WebAssemblyRegUnitRoots[][2] = {
68 { WebAssembly::ARGUMENTS },
69 { WebAssembly::VALUE_STACK },
70 { WebAssembly::EXNREF_0 },
71 { WebAssembly::EXTERNREF_0 },
72 { WebAssembly::FP32 },
73 { WebAssembly::FP64 },
74 { WebAssembly::FUNCREF_0 },
75 { WebAssembly::SP32 },
76 { WebAssembly::SP64 },
77 { WebAssembly::F32_0 },
78 { WebAssembly::F64_0 },
79 { WebAssembly::I32_0 },
80 { WebAssembly::I64_0 },
81 { WebAssembly::V128_0 },
82};
83
84// Register classes...
85
86#ifdef __GNUC__
87#pragma GCC diagnostic push
88#pragma GCC diagnostic ignored "-Woverlength-strings"
89#endif
90extern const char WebAssemblyRegClassStrings[] = {
91 /* 0 */ "F32\000"
92 /* 4 */ "I32\000"
93 /* 8 */ "F64\000"
94 /* 12 */ "I64\000"
95 /* 16 */ "V128\000"
96 /* 21 */ "FUNCREF\000"
97 /* 29 */ "EXTERNREF\000"
98 /* 39 */ "EXNREF\000"
99};
100#ifdef __GNUC__
101#pragma GCC diagnostic pop
102#endif
103
104using WebAssemblyRegisterClassStorage = MCRegisterClassStorage<8, 12, 8, 8, 1, 0>;
105extern const MCRegisterClassStorage<8, 12, 8, 8, 1, 0> WebAssemblyMCRegisterClassStorage = {
106 .Classes: {
107 {
108 offsetof(WebAssemblyRegisterClassStorage, Regs[0]) - 0 * sizeof(MCRegisterClass),
109 offsetof(WebAssemblyRegisterClassStorage, BitSets[0]) - 0 * sizeof(MCRegisterClass),
110 .NameIdx: 39,
111 .RegSizeInBits: 0,
112 .RegsSize: 1,
113 .RegSetBegin: 3, /* MinRegVal */
114 .RegSetSize: 1, /* RegSetSize */
115 .ID: WebAssembly::EXNREFRegClassID,
116 .CopyCost: 1, /* CopyCost */
117 .Allocatable: true, /* Allocatable */
118 .BaseClass: false,
119 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[0]) - 0 * sizeof(MCRegisterClass),
120 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 0 * sizeof(MCRegisterClass),
121 .LaneMask: LaneBitmask(0x0000000000000001),
122 .AllocationPriority: 0,
123 .GlobalPriority: false,
124 .TSFlags: 0x00, /* TSFlags */
125 .SpillStackID: 0, /* SpillStackID */
126 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
127 .CoveredBySubRegs: false, /* CoveredBySubRegs */
128 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 0 * sizeof(MCRegisterClass),
129 .SuperClassesSize: 0
130 },
131 {
132 offsetof(WebAssemblyRegisterClassStorage, Regs[1]) - 1 * sizeof(MCRegisterClass),
133 offsetof(WebAssemblyRegisterClassStorage, BitSets[1]) - 1 * sizeof(MCRegisterClass),
134 .NameIdx: 29,
135 .RegSizeInBits: 0,
136 .RegsSize: 1,
137 .RegSetBegin: 4, /* MinRegVal */
138 .RegSetSize: 1, /* RegSetSize */
139 .ID: WebAssembly::EXTERNREFRegClassID,
140 .CopyCost: 1, /* CopyCost */
141 .Allocatable: true, /* Allocatable */
142 .BaseClass: false,
143 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[1]) - 1 * sizeof(MCRegisterClass),
144 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 1 * sizeof(MCRegisterClass),
145 .LaneMask: LaneBitmask(0x0000000000000001),
146 .AllocationPriority: 0,
147 .GlobalPriority: false,
148 .TSFlags: 0x00, /* TSFlags */
149 .SpillStackID: 0, /* SpillStackID */
150 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
151 .CoveredBySubRegs: false, /* CoveredBySubRegs */
152 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 1 * sizeof(MCRegisterClass),
153 .SuperClassesSize: 0
154 },
155 {
156 offsetof(WebAssemblyRegisterClassStorage, Regs[2]) - 2 * sizeof(MCRegisterClass),
157 offsetof(WebAssemblyRegisterClassStorage, BitSets[2]) - 2 * sizeof(MCRegisterClass),
158 .NameIdx: 21,
159 .RegSizeInBits: 0,
160 .RegsSize: 1,
161 .RegSetBegin: 7, /* MinRegVal */
162 .RegSetSize: 1, /* RegSetSize */
163 .ID: WebAssembly::FUNCREFRegClassID,
164 .CopyCost: 1, /* CopyCost */
165 .Allocatable: true, /* Allocatable */
166 .BaseClass: false,
167 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[2]) - 2 * sizeof(MCRegisterClass),
168 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 2 * sizeof(MCRegisterClass),
169 .LaneMask: LaneBitmask(0x0000000000000001),
170 .AllocationPriority: 0,
171 .GlobalPriority: false,
172 .TSFlags: 0x00, /* TSFlags */
173 .SpillStackID: 0, /* SpillStackID */
174 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
175 .CoveredBySubRegs: false, /* CoveredBySubRegs */
176 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 2 * sizeof(MCRegisterClass),
177 .SuperClassesSize: 0
178 },
179 {
180 offsetof(WebAssemblyRegisterClassStorage, Regs[3]) - 3 * sizeof(MCRegisterClass),
181 offsetof(WebAssemblyRegisterClassStorage, BitSets[3]) - 3 * sizeof(MCRegisterClass),
182 .NameIdx: 4,
183 .RegSizeInBits: 32,
184 .RegsSize: 3,
185 .RegSetBegin: 5, /* MinRegVal */
186 .RegSetSize: 8, /* RegSetSize */
187 .ID: WebAssembly::I32RegClassID,
188 .CopyCost: 1, /* CopyCost */
189 .Allocatable: true, /* Allocatable */
190 .BaseClass: false,
191 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[3]) - 3 * sizeof(MCRegisterClass),
192 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 3 * sizeof(MCRegisterClass),
193 .LaneMask: LaneBitmask(0x0000000000000001),
194 .AllocationPriority: 0,
195 .GlobalPriority: false,
196 .TSFlags: 0x00, /* TSFlags */
197 .SpillStackID: 0, /* SpillStackID */
198 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
199 .CoveredBySubRegs: false, /* CoveredBySubRegs */
200 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 3 * sizeof(MCRegisterClass),
201 .SuperClassesSize: 0
202 },
203 {
204 offsetof(WebAssemblyRegisterClassStorage, Regs[6]) - 4 * sizeof(MCRegisterClass),
205 offsetof(WebAssemblyRegisterClassStorage, BitSets[4]) - 4 * sizeof(MCRegisterClass),
206 .NameIdx: 0,
207 .RegSizeInBits: 32,
208 .RegsSize: 1,
209 .RegSetBegin: 10, /* MinRegVal */
210 .RegSetSize: 1, /* RegSetSize */
211 .ID: WebAssembly::F32RegClassID,
212 .CopyCost: 1, /* CopyCost */
213 .Allocatable: true, /* Allocatable */
214 .BaseClass: false,
215 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[4]) - 4 * sizeof(MCRegisterClass),
216 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 4 * sizeof(MCRegisterClass),
217 .LaneMask: LaneBitmask(0x0000000000000001),
218 .AllocationPriority: 0,
219 .GlobalPriority: false,
220 .TSFlags: 0x00, /* TSFlags */
221 .SpillStackID: 0, /* SpillStackID */
222 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
223 .CoveredBySubRegs: false, /* CoveredBySubRegs */
224 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 4 * sizeof(MCRegisterClass),
225 .SuperClassesSize: 0
226 },
227 {
228 offsetof(WebAssemblyRegisterClassStorage, Regs[7]) - 5 * sizeof(MCRegisterClass),
229 offsetof(WebAssemblyRegisterClassStorage, BitSets[5]) - 5 * sizeof(MCRegisterClass),
230 .NameIdx: 12,
231 .RegSizeInBits: 64,
232 .RegsSize: 3,
233 .RegSetBegin: 6, /* MinRegVal */
234 .RegSetSize: 8, /* RegSetSize */
235 .ID: WebAssembly::I64RegClassID,
236 .CopyCost: 1, /* CopyCost */
237 .Allocatable: true, /* Allocatable */
238 .BaseClass: false,
239 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[5]) - 5 * sizeof(MCRegisterClass),
240 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 5 * sizeof(MCRegisterClass),
241 .LaneMask: LaneBitmask(0x0000000000000001),
242 .AllocationPriority: 0,
243 .GlobalPriority: false,
244 .TSFlags: 0x00, /* TSFlags */
245 .SpillStackID: 0, /* SpillStackID */
246 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
247 .CoveredBySubRegs: false, /* CoveredBySubRegs */
248 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 5 * sizeof(MCRegisterClass),
249 .SuperClassesSize: 0
250 },
251 {
252 offsetof(WebAssemblyRegisterClassStorage, Regs[10]) - 6 * sizeof(MCRegisterClass),
253 offsetof(WebAssemblyRegisterClassStorage, BitSets[6]) - 6 * sizeof(MCRegisterClass),
254 .NameIdx: 8,
255 .RegSizeInBits: 64,
256 .RegsSize: 1,
257 .RegSetBegin: 11, /* MinRegVal */
258 .RegSetSize: 1, /* RegSetSize */
259 .ID: WebAssembly::F64RegClassID,
260 .CopyCost: 1, /* CopyCost */
261 .Allocatable: true, /* Allocatable */
262 .BaseClass: false,
263 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[6]) - 6 * sizeof(MCRegisterClass),
264 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 6 * sizeof(MCRegisterClass),
265 .LaneMask: LaneBitmask(0x0000000000000001),
266 .AllocationPriority: 0,
267 .GlobalPriority: false,
268 .TSFlags: 0x00, /* TSFlags */
269 .SpillStackID: 0, /* SpillStackID */
270 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
271 .CoveredBySubRegs: false, /* CoveredBySubRegs */
272 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 6 * sizeof(MCRegisterClass),
273 .SuperClassesSize: 0
274 },
275 {
276 offsetof(WebAssemblyRegisterClassStorage, Regs[11]) - 7 * sizeof(MCRegisterClass),
277 offsetof(WebAssemblyRegisterClassStorage, BitSets[7]) - 7 * sizeof(MCRegisterClass),
278 .NameIdx: 16,
279 .RegSizeInBits: 128,
280 .RegsSize: 1,
281 .RegSetBegin: 14, /* MinRegVal */
282 .RegSetSize: 1, /* RegSetSize */
283 .ID: WebAssembly::V128RegClassID,
284 .CopyCost: 1, /* CopyCost */
285 .Allocatable: true, /* Allocatable */
286 .BaseClass: false,
287 offsetof(WebAssemblyRegisterClassStorage, SubClassMasks[7]) - 7 * sizeof(MCRegisterClass),
288 offsetof(WebAssemblyRegisterClassStorage, SuperRegIdxSeqs[0]) - 7 * sizeof(MCRegisterClass),
289 .LaneMask: LaneBitmask(0x0000000000000001),
290 .AllocationPriority: 0,
291 .GlobalPriority: false,
292 .TSFlags: 0x00, /* TSFlags */
293 .SpillStackID: 0, /* SpillStackID */
294 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
295 .CoveredBySubRegs: false, /* CoveredBySubRegs */
296 offsetof(WebAssemblyRegisterClassStorage, SuperClasses[0]) - 7 * sizeof(MCRegisterClass),
297 .SuperClassesSize: 0
298 },
299 },
300 .Regs: {
301 /* 0 */ WebAssembly::EXNREF_0,
302 /* 1 */ WebAssembly::EXTERNREF_0,
303 /* 2 */ WebAssembly::FUNCREF_0,
304 /* 3 */ WebAssembly::FP32, WebAssembly::SP32, WebAssembly::I32_0,
305 /* 6 */ WebAssembly::F32_0,
306 /* 7 */ WebAssembly::FP64, WebAssembly::SP64, WebAssembly::I64_0,
307 /* 10 */ WebAssembly::F64_0,
308 /* 11 */ WebAssembly::V128_0,
309 },
310 .BitSets: {
311 /* 0 */ 0x01,
312 /* 1 */ 0x01,
313 /* 2 */ 0x01,
314 /* 3 */ 0x89,
315 /* 4 */ 0x01,
316 /* 5 */ 0x89,
317 /* 6 */ 0x01,
318 /* 7 */ 0x01,
319 },
320 .SubClassMasks: {
321 // 0 EXNREF
322 0x00000001,
323 // 1 EXTERNREF
324 0x00000002,
325 // 2 FUNCREF
326 0x00000004,
327 // 3 I32
328 0x00000008,
329 // 4 F32
330 0x00000010,
331 // 5 I64
332 0x00000020,
333 // 6 F64
334 0x00000040,
335 // 7 V128
336 0x00000080,
337 },
338 .SuperRegIdxSeqs: {
339 /* 0 */ 0,
340 },
341 .SuperClasses: {
342 /* 0 EXNREF */
343 /* 0 EXTERNREF */
344 /* 0 FUNCREF */
345 /* 0 I32 */
346 /* 0 F32 */
347 /* 0 I64 */
348 /* 0 F64 */
349 /* 0 V128 */
350 }
351};
352
353const MCRegisterClass &getWebAssemblyMCRegisterClass(unsigned RC) {
354 return WebAssemblyMCRegisterClassStorage.Classes[RC];
355}
356
357extern const uint16_t WebAssemblyRegEncodingTable[] = {
358 0,
359 0,
360 0,
361 0,
362 0,
363 0,
364 0,
365 0,
366 0,
367 0,
368 0,
369 0,
370 0,
371 0,
372 0,
373};
374static inline void InitWebAssemblyMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) {
375 RI->InitMCRegisterInfo(D: WebAssemblyRegDesc, NR: 15, RA, PC, C: WebAssemblyMCRegisterClassStorage.Classes, NC: 8, RURoots: WebAssemblyRegUnitRoots, NRU: 14, DL: WebAssemblyRegDiffLists, RUMS: WebAssemblyLaneMaskLists, Strings: WebAssemblyRegStrings, ClassStrings: WebAssemblyRegClassStrings, SubIndices: WebAssemblySubRegIdxLists, NumIndices: 1,
376RET: WebAssemblyRegEncodingTable, RUI: nullptr);
377
378}
379
380
381} // namespace llvm
382