| 1 | //===--- AArch64.h - Declare AArch64 target feature support -----*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file declares AArch64 TargetInfo objects. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AARCH64_H |
| 14 | #define LLVM_CLANG_LIB_BASIC_TARGETS_AARCH64_H |
| 15 | |
| 16 | #include "OSTargets.h" |
| 17 | #include "clang/Basic/TargetBuiltins.h" |
| 18 | #include "llvm/ADT/DenseSet.h" |
| 19 | #include "llvm/TargetParser/AArch64TargetParser.h" |
| 20 | #include <optional> |
| 21 | |
| 22 | namespace clang { |
| 23 | namespace targets { |
| 24 | |
| 25 | enum AArch64AddrSpace { ptr32_sptr = 270, ptr32_uptr = 271, ptr64 = 272 }; |
| 26 | |
| 27 | static constexpr LangASMap ARM64AddrSpaceMap = { |
| 28 | {LangAS::ptr32_sptr, static_cast<unsigned>(AArch64AddrSpace::ptr32_sptr)}, |
| 29 | {LangAS::ptr32_uptr, static_cast<unsigned>(AArch64AddrSpace::ptr32_uptr)}, |
| 30 | {LangAS::ptr64, static_cast<unsigned>(AArch64AddrSpace::ptr64)}, |
| 31 | }; |
| 32 | |
| 33 | using AArch64FeatureSet = llvm::SmallDenseSet<StringRef, 32>; |
| 34 | |
| 35 | class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { |
| 36 | static const TargetInfo::GCCRegAlias GCCRegAliases[]; |
| 37 | static const char *const GCCRegNames[]; |
| 38 | |
| 39 | enum FPUModeEnum { |
| 40 | FPUMode = (1 << 0), |
| 41 | NeonMode = (1 << 1), |
| 42 | SveMode = (1 << 2), |
| 43 | }; |
| 44 | |
| 45 | unsigned FPU = FPUMode; |
| 46 | bool HasCRC = false; |
| 47 | bool HasCSSC = false; |
| 48 | bool HasAES = false; |
| 49 | bool HasSHA2 = false; |
| 50 | bool HasSHA3 = false; |
| 51 | bool HasSM4 = false; |
| 52 | bool HasFullFP16 = false; |
| 53 | bool HasDotProd = false; |
| 54 | bool HasFP16FML = false; |
| 55 | bool HasMTE = false; |
| 56 | bool HasPAuth = false; |
| 57 | bool HasLS64 = false; |
| 58 | bool HasRandGen = false; |
| 59 | bool HasMatMul = false; |
| 60 | bool HasBFloat16 = false; |
| 61 | bool HasSVE2 = false; |
| 62 | bool HasSVE2p1 = false; |
| 63 | bool HasSVEAES = false; |
| 64 | bool HasSVE2SHA3 = false; |
| 65 | bool HasSVE2SM4 = false; |
| 66 | bool HasSVEB16B16 = false; |
| 67 | bool HasSVEBitPerm = false; |
| 68 | bool HasMatmulFP64 = false; |
| 69 | bool HasMatmulFP32 = false; |
| 70 | bool HasLSE = false; |
| 71 | bool HasFlagM = false; |
| 72 | bool HasAlternativeNZCV = false; |
| 73 | bool HasMOPS = false; |
| 74 | bool HasD128 = false; |
| 75 | bool HasRCPC = false; |
| 76 | bool HasRDM = false; |
| 77 | bool HasDIT = false; |
| 78 | bool HasCCPP = false; |
| 79 | bool HasCCDP = false; |
| 80 | bool HasFRInt3264 = false; |
| 81 | bool HasSME = false; |
| 82 | bool HasSME2 = false; |
| 83 | bool HasSMEF64F64 = false; |
| 84 | bool HasSMEI16I64 = false; |
| 85 | bool HasSMEF16F16 = false; |
| 86 | bool HasSMEB16B16 = false; |
| 87 | bool HasSME2p1 = false; |
| 88 | bool HasFP8 = false; |
| 89 | bool HasFP8FMA = false; |
| 90 | bool HasFP8DOT2 = false; |
| 91 | bool HasFP8DOT4 = false; |
| 92 | bool HasSSVE_FP8DOT2 = false; |
| 93 | bool HasSSVE_FP8DOT4 = false; |
| 94 | bool HasSSVE_FP8FMA = false; |
| 95 | bool HasSME_F8F32 = false; |
| 96 | bool HasSME_F8F16 = false; |
| 97 | bool HasSB = false; |
| 98 | bool HasPredRes = false; |
| 99 | bool HasSSBS = false; |
| 100 | bool HasBTI = false; |
| 101 | bool HasWFxT = false; |
| 102 | bool HasJSCVT = false; |
| 103 | bool HasFCMA = false; |
| 104 | bool HasNoFP = false; |
| 105 | bool HasNoNeon = false; |
| 106 | bool HasNoSVE = false; |
| 107 | bool HasFMV = true; |
| 108 | bool HasGCS = false; |
| 109 | bool HasRCPC3 = false; |
| 110 | bool HasSMEFA64 = false; |
| 111 | bool HasPAuthLR = false; |
| 112 | bool HasFPRCVT = false; |
| 113 | bool HasF8F16MM = false; |
| 114 | bool HasF8F32MM = false; |
| 115 | bool HasSVE_F16F32MM = false; |
| 116 | bool HasSVE_BFSCALE = false; |
| 117 | bool HasSVE_AES2 = false; |
| 118 | bool HasSSVE_AES = false; |
| 119 | bool HasSVE2p2 = false; |
| 120 | bool HasSME2p2 = false; |
| 121 | bool HasSVE2p3 = false; |
| 122 | bool HasSME2p3 = false; |
| 123 | bool HasSVE_B16MM = false; |
| 124 | bool HasF16MM = false; |
| 125 | bool HasF16F32DOT = false; |
| 126 | bool HasF16F32MM = false; |
| 127 | |
| 128 | const llvm::AArch64::ArchInfo *ArchInfo = &llvm::AArch64::ARMV8A; |
| 129 | |
| 130 | AArch64FeatureSet HasFeatureLookup; |
| 131 | |
| 132 | void computeFeatureLookup(); |
| 133 | |
| 134 | protected: |
| 135 | std::string ABI; |
| 136 | |
| 137 | public: |
| 138 | AArch64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 139 | |
| 140 | StringRef getABI() const override; |
| 141 | bool setABI(const std::string &Name) override; |
| 142 | |
| 143 | bool validateBranchProtection(StringRef Spec, StringRef Arch, |
| 144 | BranchProtectionInfo &BPI, |
| 145 | const LangOptions &LO, |
| 146 | StringRef &Err) const override; |
| 147 | |
| 148 | bool isValidCPUName(StringRef Name) const override; |
| 149 | void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; |
| 150 | bool setCPU(StringRef Name) override; |
| 151 | |
| 152 | llvm::APInt getFMVPriority(ArrayRef<StringRef> Features) const override; |
| 153 | |
| 154 | void getTargetDefinesARMV81A(const LangOptions &Opts, |
| 155 | MacroBuilder &Builder) const; |
| 156 | void getTargetDefinesARMV82A(const LangOptions &Opts, |
| 157 | MacroBuilder &Builder) const; |
| 158 | void getTargetDefinesARMV83A(const LangOptions &Opts, |
| 159 | MacroBuilder &Builder) const; |
| 160 | void getTargetDefinesARMV84A(const LangOptions &Opts, |
| 161 | MacroBuilder &Builder) const; |
| 162 | void getTargetDefinesARMV85A(const LangOptions &Opts, |
| 163 | MacroBuilder &Builder) const; |
| 164 | void getTargetDefinesARMV86A(const LangOptions &Opts, |
| 165 | MacroBuilder &Builder) const; |
| 166 | void getTargetDefinesARMV87A(const LangOptions &Opts, |
| 167 | MacroBuilder &Builder) const; |
| 168 | void getTargetDefinesARMV88A(const LangOptions &Opts, |
| 169 | MacroBuilder &Builder) const; |
| 170 | void getTargetDefinesARMV89A(const LangOptions &Opts, |
| 171 | MacroBuilder &Builder) const; |
| 172 | void getTargetDefinesARMV9A(const LangOptions &Opts, |
| 173 | MacroBuilder &Builder) const; |
| 174 | void getTargetDefinesARMV91A(const LangOptions &Opts, |
| 175 | MacroBuilder &Builder) const; |
| 176 | void getTargetDefinesARMV92A(const LangOptions &Opts, |
| 177 | MacroBuilder &Builder) const; |
| 178 | void getTargetDefinesARMV93A(const LangOptions &Opts, |
| 179 | MacroBuilder &Builder) const; |
| 180 | void getTargetDefinesARMV94A(const LangOptions &Opts, |
| 181 | MacroBuilder &Builder) const; |
| 182 | void getTargetDefinesARMV95A(const LangOptions &Opts, |
| 183 | MacroBuilder &Builder) const; |
| 184 | void getTargetDefinesARMV96A(const LangOptions &Opts, |
| 185 | MacroBuilder &Builder) const; |
| 186 | void getTargetDefinesARMV97A(const LangOptions &Opts, |
| 187 | MacroBuilder &Builder) const; |
| 188 | void getTargetDefines(const LangOptions &Opts, |
| 189 | MacroBuilder &Builder) const override; |
| 190 | |
| 191 | llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override; |
| 192 | |
| 193 | std::optional<std::pair<unsigned, unsigned>> |
| 194 | getVScaleRange(const LangOptions &LangOpts, ArmStreamingKind Mode, |
| 195 | llvm::StringMap<bool> *FeatureMap = nullptr) const override; |
| 196 | bool doesFeatureAffectCodeGen(StringRef Name) const override; |
| 197 | bool validateCpuSupports(StringRef FeatureStr) const override; |
| 198 | bool hasFeature(StringRef Feature) const override; |
| 199 | void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name, |
| 200 | bool Enabled) const override; |
| 201 | bool handleTargetFeatures(std::vector<std::string> &Features, |
| 202 | DiagnosticsEngine &Diags) override; |
| 203 | ParsedTargetAttr parseTargetAttr(StringRef Str) const override; |
| 204 | bool supportsTargetAttributeTune() const override { return true; } |
| 205 | bool supportsCpuSupports() const override { return true; } |
| 206 | bool checkArithmeticFenceSupported() const override { return true; } |
| 207 | |
| 208 | bool hasBFloat16Type() const override; |
| 209 | |
| 210 | CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; |
| 211 | |
| 212 | bool isCLZForZeroUndef() const override; |
| 213 | |
| 214 | BuiltinVaListKind getBuiltinVaListKind() const override; |
| 215 | |
| 216 | ArrayRef<const char *> getGCCRegNames() const override; |
| 217 | ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override; |
| 218 | |
| 219 | std::string convertConstraint(const char *&Constraint) const override; |
| 220 | |
| 221 | bool validateAsmConstraint(const char *&Name, |
| 222 | TargetInfo::ConstraintInfo &Info) const override; |
| 223 | bool |
| 224 | validateConstraintModifier(StringRef Constraint, char Modifier, unsigned Size, |
| 225 | std::string &SuggestedModifier) const override; |
| 226 | std::string_view getClobbers() const override; |
| 227 | |
| 228 | StringRef getConstraintRegister(StringRef Constraint, |
| 229 | StringRef Expression) const override { |
| 230 | return Expression; |
| 231 | } |
| 232 | |
| 233 | int getEHDataRegisterNumber(unsigned RegNo) const override; |
| 234 | |
| 235 | bool validatePointerAuthKey(const llvm::APSInt &value) const override; |
| 236 | |
| 237 | const char *getBFloat16Mangling() const override { return "u6__bf16" ; }; |
| 238 | |
| 239 | std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override { |
| 240 | return std::make_pair(x: 256, y: 64); |
| 241 | } |
| 242 | |
| 243 | bool hasInt128Type() const override; |
| 244 | |
| 245 | bool hasBitIntType() const override { return true; } |
| 246 | |
| 247 | bool validateTarget(DiagnosticsEngine &Diags) const override; |
| 248 | |
| 249 | bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize, |
| 250 | bool &HasSizeMismatch) const override; |
| 251 | |
| 252 | uint64_t getPointerWidthV(LangAS AddrSpace) const override { |
| 253 | if (AddrSpace == LangAS::ptr32_sptr || AddrSpace == LangAS::ptr32_uptr) |
| 254 | return 32; |
| 255 | if (AddrSpace == LangAS::ptr64) |
| 256 | return 64; |
| 257 | return PointerWidth; |
| 258 | } |
| 259 | |
| 260 | uint64_t getPointerAlignV(LangAS AddrSpace) const override { |
| 261 | return getPointerWidthV(AddrSpace); |
| 262 | } |
| 263 | }; |
| 264 | |
| 265 | class LLVM_LIBRARY_VISIBILITY AArch64leTargetInfo : public AArch64TargetInfo { |
| 266 | public: |
| 267 | AArch64leTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 268 | |
| 269 | void getTargetDefines(const LangOptions &Opts, |
| 270 | MacroBuilder &Builder) const override; |
| 271 | }; |
| 272 | |
| 273 | template <> |
| 274 | inline bool |
| 275 | LinuxTargetInfo<AArch64leTargetInfo>::setABI(const std::string &Name) { |
| 276 | if (Name == "pauthtest" ) { |
| 277 | ABI = Name; |
| 278 | return true; |
| 279 | } |
| 280 | return AArch64leTargetInfo::setABI(Name); |
| 281 | } |
| 282 | |
| 283 | class LLVM_LIBRARY_VISIBILITY WindowsARM64TargetInfo |
| 284 | : public WindowsTargetInfo<AArch64leTargetInfo> { |
| 285 | const llvm::Triple Triple; |
| 286 | |
| 287 | public: |
| 288 | WindowsARM64TargetInfo(const llvm::Triple &Triple, |
| 289 | const TargetOptions &Opts); |
| 290 | |
| 291 | BuiltinVaListKind getBuiltinVaListKind() const override; |
| 292 | |
| 293 | CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; |
| 294 | }; |
| 295 | |
| 296 | // Windows ARM, MS (C++) ABI |
| 297 | class LLVM_LIBRARY_VISIBILITY MicrosoftARM64TargetInfo |
| 298 | : public WindowsARM64TargetInfo { |
| 299 | public: |
| 300 | MicrosoftARM64TargetInfo(const llvm::Triple &Triple, |
| 301 | const TargetOptions &Opts); |
| 302 | |
| 303 | void getTargetDefines(const LangOptions &Opts, |
| 304 | MacroBuilder &Builder) const override; |
| 305 | TargetInfo::CallingConvKind |
| 306 | getCallingConvKind(bool ClangABICompat4) const override; |
| 307 | |
| 308 | unsigned getMinGlobalAlign(uint64_t TypeSize, |
| 309 | bool HasNonWeakDef) const override; |
| 310 | }; |
| 311 | |
| 312 | // ARM64 MinGW target |
| 313 | class LLVM_LIBRARY_VISIBILITY MinGWARM64TargetInfo |
| 314 | : public WindowsARM64TargetInfo { |
| 315 | public: |
| 316 | MinGWARM64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 317 | }; |
| 318 | |
| 319 | class LLVM_LIBRARY_VISIBILITY AArch64beTargetInfo : public AArch64TargetInfo { |
| 320 | public: |
| 321 | AArch64beTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 322 | void getTargetDefines(const LangOptions &Opts, |
| 323 | MacroBuilder &Builder) const override; |
| 324 | }; |
| 325 | |
| 326 | void getAppleMachOAArch64Defines(MacroBuilder &Builder, const LangOptions &Opts, |
| 327 | const llvm::Triple &Triple); |
| 328 | |
| 329 | class LLVM_LIBRARY_VISIBILITY AppleMachOAArch64TargetInfo |
| 330 | : public AppleMachOTargetInfo<AArch64leTargetInfo> { |
| 331 | public: |
| 332 | AppleMachOAArch64TargetInfo(const llvm::Triple &Triple, |
| 333 | const TargetOptions &Opts); |
| 334 | |
| 335 | std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override { |
| 336 | // Apple AArch64 cores use a 128-byte cache line, unlike the ARM-documented |
| 337 | // value of 256 used by the generic aarch64 triple. |
| 338 | return std::make_pair(x: 128, y: 64); |
| 339 | } |
| 340 | |
| 341 | protected: |
| 342 | void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, |
| 343 | MacroBuilder &Builder) const override; |
| 344 | }; |
| 345 | |
| 346 | class LLVM_LIBRARY_VISIBILITY DarwinAArch64TargetInfo |
| 347 | : public DarwinTargetInfo<AArch64leTargetInfo> { |
| 348 | public: |
| 349 | DarwinAArch64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 350 | |
| 351 | BuiltinVaListKind getBuiltinVaListKind() const override; |
| 352 | |
| 353 | std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override { |
| 354 | // Apple AArch64 cores use a 128-byte cache line, so 128 (not the generic |
| 355 | // AArch64 value of 256) is the right destructive interference size. These |
| 356 | // values are implementation-defined and not part of the ABI. |
| 357 | return std::make_pair(x: 128, y: 64); |
| 358 | } |
| 359 | |
| 360 | protected: |
| 361 | void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, |
| 362 | MacroBuilder &Builder) const override; |
| 363 | }; |
| 364 | |
| 365 | } // namespace targets |
| 366 | } // namespace clang |
| 367 | |
| 368 | #endif // LLVM_CLANG_LIB_BASIC_TARGETS_AARCH64_H |
| 369 | |