1//===--- NVPTX.h - Declare NVPTX target feature support ---------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares NVPTX TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_NVPTX_H
14#define LLVM_CLANG_LIB_BASIC_TARGETS_NVPTX_H
15
16#include "clang/Basic/Cuda.h"
17#include "clang/Basic/TargetInfo.h"
18#include "clang/Basic/TargetOptions.h"
19#include "llvm/Support/Compiler.h"
20#include "llvm/Support/NVPTXAddrSpace.h"
21#include "llvm/TargetParser/Triple.h"
22#include <optional>
23
24namespace clang {
25namespace targets {
26
27static const unsigned NVPTXAddrSpaceMap[] = {
28 0, // Default
29 1, // opencl_global
30 3, // opencl_local
31 4, // opencl_constant
32 0, // opencl_private
33 // FIXME: generic has to be added to the target
34 0, // opencl_generic
35 1, // opencl_global_device
36 1, // opencl_global_host
37 1, // cuda_device
38 4, // cuda_constant
39 3, // cuda_shared
40 1, // sycl_global
41 1, // sycl_global_device
42 1, // sycl_global_host
43 3, // sycl_local
44 0, // sycl_private
45 0, // ptr32_sptr
46 0, // ptr32_uptr
47 0, // ptr64
48 0, // hlsl_groupshared
49 0, // hlsl_constant
50 0, // hlsl_private
51 0, // hlsl_device
52 0, // hlsl_input
53 0, // hlsl_push_constant
54 // Wasm address space values for this target are dummy values,
55 // as it is only enabled for Wasm targets.
56 20, // wasm_funcref
57};
58
59/// The DWARF address class. Taken from
60/// https://docs.nvidia.com/cuda/archive/10.0/ptx-writers-guide-to-interoperability/index.html#cuda-specific-dwarf
61static const int NVPTXDWARFAddrSpaceMap[] = {
62 -1, // Default, opencl_private or opencl_generic - not defined
63 5, // opencl_global
64 -1,
65 8, // opencl_local or cuda_shared
66 4, // opencl_constant or cuda_constant
67};
68
69class LLVM_LIBRARY_VISIBILITY NVPTXTargetInfo : public TargetInfo {
70 static const char *const GCCRegNames[];
71 OffloadArch GPU;
72 uint32_t PTXVersion;
73 std::unique_ptr<TargetInfo> HostTarget;
74
75public:
76 NVPTXTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts,
77 unsigned TargetPointerWidth);
78
79 void getTargetDefines(const LangOptions &Opts,
80 MacroBuilder &Builder) const override;
81
82 llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override;
83
84 bool useFP16ConversionIntrinsics() const override { return false; }
85
86 bool
87 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
88 StringRef CPU,
89 const std::vector<std::string> &FeaturesVec) const override {
90 if (GPU != OffloadArch::UNUSED)
91 Features[OffloadArchToString(A: GPU)] = true;
92 // Only add PTX feature if explicitly requested. Otherwise, let the backend
93 // use the minimum required PTX version for the target SM.
94 if (PTXVersion != 0)
95 Features["ptx" + std::to_string(val: PTXVersion)] = true;
96 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeatureVec: FeaturesVec);
97 }
98
99 bool hasFeature(StringRef Feature) const override;
100
101 virtual bool isAddressSpaceSupersetOf(LangAS A, LangAS B) const override {
102 // The generic address space AS(0) is a superset of all the other address
103 // spaces used by the backend target.
104 return A == B ||
105 ((A == LangAS::Default ||
106 (isTargetAddressSpace(AS: A) &&
107 toTargetAddressSpace(AS: A) ==
108 llvm::NVPTXAS::ADDRESS_SPACE_GENERIC)) &&
109 isTargetAddressSpace(AS: B) &&
110 toTargetAddressSpace(AS: B) >= llvm::NVPTXAS::ADDRESS_SPACE_GENERIC &&
111 toTargetAddressSpace(AS: B) <= llvm::NVPTXAS::ADDRESS_SPACE_LOCAL &&
112 toTargetAddressSpace(AS: B) != 2);
113 }
114
115 ArrayRef<const char *> getGCCRegNames() const override;
116
117 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
118 // No aliases.
119 return {};
120 }
121
122 bool validateAsmConstraint(const char *&Name,
123 TargetInfo::ConstraintInfo &Info) const override {
124 switch (*Name) {
125 default:
126 return false;
127 case 'c':
128 case 'h':
129 case 'r':
130 case 'l':
131 case 'f':
132 case 'd':
133 case 'q':
134 Info.setAllowsRegister();
135 return true;
136 }
137 }
138
139 std::string_view getClobbers() const override {
140 // FIXME: Is this really right?
141 return "";
142 }
143
144 BuiltinVaListKind getBuiltinVaListKind() const override {
145 return TargetInfo::CharPtrBuiltinVaList;
146 }
147
148 bool isValidCPUName(StringRef Name) const override {
149 return StringToOffloadArch(S: Name) != OffloadArch::UNKNOWN;
150 }
151
152 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override {
153 for (int i = static_cast<int>(OffloadArch::SM_20);
154 i < static_cast<int>(OffloadArch::Generic); ++i)
155 Values.emplace_back(Args: OffloadArchToString(A: static_cast<OffloadArch>(i)));
156 }
157
158 bool setCPU(const std::string &Name) override {
159 GPU = StringToOffloadArch(S: Name);
160 return GPU != OffloadArch::UNKNOWN;
161 }
162
163 void setSupportedOpenCLOpts() override {
164 auto &Opts = getSupportedOpenCLOpts();
165 Opts["cl_clang_storage_class_specifiers"] = true;
166 Opts["__cl_clang_function_pointers"] = true;
167 Opts["__cl_clang_variadic_functions"] = true;
168 Opts["__cl_clang_non_portable_kernel_param_types"] = true;
169 Opts["__cl_clang_bitfields"] = true;
170
171 Opts["cl_khr_fp64"] = true;
172 Opts["__opencl_c_fp64"] = true;
173 Opts["cl_khr_byte_addressable_store"] = true;
174 Opts["cl_khr_global_int32_base_atomics"] = true;
175 Opts["cl_khr_global_int32_extended_atomics"] = true;
176 Opts["cl_khr_local_int32_base_atomics"] = true;
177 Opts["cl_khr_local_int32_extended_atomics"] = true;
178
179 Opts["__opencl_c_generic_address_space"] = true;
180 }
181
182 const llvm::omp::GV &getGridValue() const override {
183 return llvm::omp::NVPTXGridValues;
184 }
185
186 /// \returns If a target requires an address within a target specific address
187 /// space \p AddressSpace to be converted in order to be used, then return the
188 /// corresponding target specific DWARF address space.
189 ///
190 /// \returns Otherwise return std::nullopt and no conversion will be emitted
191 /// in the DWARF.
192 std::optional<unsigned>
193 getDWARFAddressSpace(unsigned AddressSpace) const override {
194 if (AddressSpace >= std::size(NVPTXDWARFAddrSpaceMap) ||
195 NVPTXDWARFAddrSpaceMap[AddressSpace] < 0)
196 return std::nullopt;
197 return NVPTXDWARFAddrSpaceMap[AddressSpace];
198 }
199
200 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
201 // CUDA compilations support all of the host's calling conventions.
202 //
203 // TODO: We should warn if you apply a non-default CC to anything other than
204 // a host function.
205 if (HostTarget)
206 return HostTarget->checkCallingConvention(CC);
207 return CC == CC_DeviceKernel ? CCCR_OK : CCCR_Warning;
208 }
209
210 bool hasBitIntType() const override { return true; }
211 bool hasBFloat16Type() const override { return true; }
212
213 OffloadArch getGPU() const { return GPU; }
214};
215} // namespace targets
216} // namespace clang
217#endif // LLVM_CLANG_LIB_BASIC_TARGETS_NVPTX_H
218