1//===--- SystemZ.cpp - Implement SystemZ target feature support -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements SystemZ TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SystemZ.h"
14#include "clang/Basic/Builtins.h"
15#include "clang/Basic/LangOptions.h"
16#include "clang/Basic/MacroBuilder.h"
17#include "clang/Basic/TargetBuiltins.h"
18#include "llvm/ADT/StringExtras.h"
19#include "llvm/ADT/StringSwitch.h"
20
21using namespace clang;
22using namespace clang::targets;
23
24static constexpr int NumBuiltins =
25 clang::SystemZ::LastTSBuiltin - Builtin::FirstTSBuiltin;
26
27#define GET_BUILTIN_STR_TABLE
28#include "clang/Basic/BuiltinsSystemZ.inc"
29#undef GET_BUILTIN_STR_TABLE
30
31static constexpr Builtin::Info BuiltinInfos[] = {
32#define GET_BUILTIN_INFOS
33#include "clang/Basic/BuiltinsSystemZ.inc"
34#undef GET_BUILTIN_INFOS
35};
36
37static constexpr Builtin::Info PrefixedBuiltinInfos[] = {
38#define GET_BUILTIN_PREFIXED_INFOS
39#include "clang/Basic/BuiltinsSystemZ.inc"
40#undef GET_BUILTIN_PREFIXED_INFOS
41};
42static_assert((std::size(BuiltinInfos) + std::size(PrefixedBuiltinInfos)) ==
43 NumBuiltins);
44
45const char *const SystemZTargetInfo::GCCRegNames[] = {
46 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
47 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
48 "f0", "f2", "f4", "f6", "f1", "f3", "f5", "f7",
49 "f8", "f10", "f12", "f14", "f9", "f11", "f13", "f15",
50 /*ap*/"", "cc", /*fp*/"", /*rp*/"", "a0", "a1",
51 "v16", "v18", "v20", "v22", "v17", "v19", "v21", "v23",
52 "v24", "v26", "v28", "v30", "v25", "v27", "v29", "v31"
53};
54
55const TargetInfo::AddlRegName GCCAddlRegNames[] = {
56 {.Names: {"v0"}, .RegNum: 16}, {.Names: {"v2"}, .RegNum: 17}, {.Names: {"v4"}, .RegNum: 18}, {.Names: {"v6"}, .RegNum: 19},
57 {.Names: {"v1"}, .RegNum: 20}, {.Names: {"v3"}, .RegNum: 21}, {.Names: {"v5"}, .RegNum: 22}, {.Names: {"v7"}, .RegNum: 23},
58 {.Names: {"v8"}, .RegNum: 24}, {.Names: {"v10"}, .RegNum: 25}, {.Names: {"v12"}, .RegNum: 26}, {.Names: {"v14"}, .RegNum: 27},
59 {.Names: {"v9"}, .RegNum: 28}, {.Names: {"v11"}, .RegNum: 29}, {.Names: {"v13"}, .RegNum: 30}, {.Names: {"v15"}, .RegNum: 31}
60};
61
62ArrayRef<const char *> SystemZTargetInfo::getGCCRegNames() const {
63 return llvm::ArrayRef(GCCRegNames);
64}
65
66ArrayRef<TargetInfo::AddlRegName> SystemZTargetInfo::getGCCAddlRegNames() const {
67 return llvm::ArrayRef(GCCAddlRegNames);
68}
69
70bool SystemZTargetInfo::validateAsmConstraint(
71 const char *&Name, TargetInfo::ConstraintInfo &Info) const {
72 switch (*Name) {
73 default:
74 return false;
75
76 case 'Z':
77 switch (Name[1]) {
78 default:
79 return false;
80 case 'Q': // Address with base and unsigned 12-bit displacement
81 case 'R': // Likewise, plus an index
82 case 'S': // Address with base and signed 20-bit displacement
83 case 'T': // Likewise, plus an index
84 break;
85 }
86 [[fallthrough]];
87 case 'a': // Address register
88 case 'd': // Data register (equivalent to 'r')
89 case 'f': // Floating-point register
90 case 'v': // Vector register
91 Info.setAllowsRegister();
92 return true;
93
94 case 'I': // Unsigned 8-bit constant
95 case 'J': // Unsigned 12-bit constant
96 case 'K': // Signed 16-bit constant
97 case 'L': // Signed 20-bit displacement (on all targets we support)
98 case 'M': // 0x7fffffff
99 return true;
100
101 case 'Q': // Memory with base and unsigned 12-bit displacement
102 case 'R': // Likewise, plus an index
103 case 'S': // Memory with base and signed 20-bit displacement
104 case 'T': // Likewise, plus an index
105 Info.setAllowsMemory();
106 return true;
107 case '@':
108 // CC condition changes.
109 if (StringRef(Name) == "@cc") {
110 Name += 2;
111 Info.setAllowsRegister();
112 // SystemZ has 2-bits CC, and hence Interval [0, 4).
113 Info.setOutputOperandBounds(Min: 0, Max: 4);
114 return true;
115 }
116 return false;
117 }
118}
119
120struct ISANameRevision {
121 llvm::StringLiteral Name;
122 int ISARevisionID;
123};
124static constexpr ISANameRevision ISARevisions[] = {
125 {.Name: {"arch8"}, .ISARevisionID: 8}, {.Name: {"z10"}, .ISARevisionID: 8},
126 {.Name: {"arch9"}, .ISARevisionID: 9}, {.Name: {"z196"}, .ISARevisionID: 9},
127 {.Name: {"arch10"}, .ISARevisionID: 10}, {.Name: {"zEC12"}, .ISARevisionID: 10},
128 {.Name: {"arch11"}, .ISARevisionID: 11}, {.Name: {"z13"}, .ISARevisionID: 11},
129 {.Name: {"arch12"}, .ISARevisionID: 12}, {.Name: {"z14"}, .ISARevisionID: 12},
130 {.Name: {"arch13"}, .ISARevisionID: 13}, {.Name: {"z15"}, .ISARevisionID: 13},
131 {.Name: {"arch14"}, .ISARevisionID: 14}, {.Name: {"z16"}, .ISARevisionID: 14},
132 {.Name: {"arch15"}, .ISARevisionID: 15}, {.Name: {"z17"}, .ISARevisionID: 15},
133};
134
135int SystemZTargetInfo::getISARevision(StringRef Name) const {
136 const auto Rev =
137 llvm::find_if(Range: ISARevisions, P: [Name](const ISANameRevision &CR) {
138 return CR.Name == Name;
139 });
140 if (Rev == std::end(arr: ISARevisions))
141 return -1;
142 return Rev->ISARevisionID;
143}
144
145void SystemZTargetInfo::fillValidCPUList(
146 SmallVectorImpl<StringRef> &Values) const {
147 for (const ISANameRevision &Rev : ISARevisions)
148 Values.push_back(Elt: Rev.Name);
149}
150
151bool SystemZTargetInfo::hasFeature(StringRef Feature) const {
152 return llvm::StringSwitch<bool>(Feature)
153 .Case(S: "systemz", Value: true)
154 .Case(S: "arch8", Value: ISARevision >= 8)
155 .Case(S: "arch9", Value: ISARevision >= 9)
156 .Case(S: "arch10", Value: ISARevision >= 10)
157 .Case(S: "arch11", Value: ISARevision >= 11)
158 .Case(S: "arch12", Value: ISARevision >= 12)
159 .Case(S: "arch13", Value: ISARevision >= 13)
160 .Case(S: "arch14", Value: ISARevision >= 14)
161 .Case(S: "arch15", Value: ISARevision >= 15)
162 .Case(S: "htm", Value: HasTransactionalExecution)
163 .Case(S: "vx", Value: HasVector)
164 .Default(Value: false);
165}
166
167unsigned SystemZTargetInfo::getMinGlobalAlign(uint64_t Size,
168 bool HasNonWeakDef) const {
169 // Don't enforce the minimum alignment on an external or weak symbol if
170 // -munaligned-symbols is passed.
171 if (UnalignedSymbols && !HasNonWeakDef)
172 return 0;
173
174 return MinGlobalAlign;
175}
176
177void SystemZTargetInfo::getTargetDefines(const LangOptions &Opts,
178 MacroBuilder &Builder) const {
179 // Inline assembly supports SystemZ flag outputs.
180 Builder.defineMacro(Name: "__GCC_ASM_FLAG_OUTPUTS__");
181
182 Builder.defineMacro(Name: "__s390__");
183 Builder.defineMacro(Name: "__s390x__");
184 Builder.defineMacro(Name: "__zarch__");
185 Builder.defineMacro(Name: "__LONG_DOUBLE_128__");
186
187 Builder.defineMacro(Name: "__ARCH__", Value: Twine(ISARevision));
188
189 Builder.defineMacro(Name: "__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
190 Builder.defineMacro(Name: "__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
191 Builder.defineMacro(Name: "__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
192 Builder.defineMacro(Name: "__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
193
194 if (HasTransactionalExecution)
195 Builder.defineMacro(Name: "__HTM__");
196 if (HasVector)
197 Builder.defineMacro(Name: "__VX__");
198 if (Opts.ZVector)
199 Builder.defineMacro(Name: "__VEC__", Value: "10305");
200
201 /* Set __TARGET_LIB__ only if a value was given. If no value was given */
202 /* we rely on the LE headers to define __TARGET_LIB__. */
203 if (!getTriple().getOSVersion().empty()) {
204 llvm::VersionTuple V = getTriple().getOSVersion();
205 // Create string with form: 0xPVRRMMMM, where P=4
206 std::string Str("0x");
207 unsigned int Librel = 0x40000000;
208 Librel |= V.getMajor() << 24;
209 Librel |= V.getMinor().value_or(u: 1) << 16;
210 Librel |= V.getSubminor().value_or(u: 0);
211 Str += llvm::utohexstr(X: Librel);
212
213 Builder.defineMacro(Name: "__TARGET_LIB__", Value: Str);
214 }
215}
216
217llvm::SmallVector<Builtin::InfosShard>
218SystemZTargetInfo::getTargetBuiltins() const {
219 return {{.Strings: &BuiltinStrings, .Infos: BuiltinInfos},
220 {.Strings: &BuiltinStrings, .Infos: PrefixedBuiltinInfos, .NamePrefix: "__builtin_s390_"}};
221}
222