1//===--- X86.h - Declare X86 target feature support -------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares X86 TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
14#define LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
15
16#include "OSTargets.h"
17#include "clang/Basic/BitmaskEnum.h"
18#include "clang/Basic/TargetInfo.h"
19#include "clang/Basic/TargetOptions.h"
20#include "llvm/ADT/STLExtras.h"
21#include "llvm/IR/DerivedTypes.h"
22#include "llvm/Support/Compiler.h"
23#include "llvm/TargetParser/Triple.h"
24#include "llvm/TargetParser/X86TargetParser.h"
25#include <optional>
26
27namespace clang {
28namespace targets {
29
30static constexpr LangASMap X86AddrSpaceMap = {
31 {LangAS::ptr32_sptr, 270},
32 {LangAS::ptr32_uptr, 271},
33 {LangAS::ptr64, 272},
34};
35
36// X86 target abstract base class; x86-32 and x86-64 are very close, so
37// most of the implementation can be shared.
38class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
39
40 enum X86SSEEnum {
41 NoSSE,
42 SSE1,
43 SSE2,
44 SSE3,
45 SSSE3,
46 SSE41,
47 SSE42,
48 AVX,
49 AVX2,
50 AVX512F
51 } SSELevel = NoSSE;
52 bool HasMMX = false;
53 enum XOPEnum { NoXOP, SSE4A, FMA4, XOP } XOPLevel = NoXOP;
54 enum AddrSpace { ptr32_sptr = 270, ptr32_uptr = 271, ptr64 = 272 };
55
56 bool HasAES = false;
57 bool HasVAES = false;
58 bool HasPCLMUL = false;
59 bool HasVPCLMULQDQ = false;
60 bool HasGFNI = false;
61 bool HasLZCNT = false;
62 bool HasRDRND = false;
63 bool HasFSGSBASE = false;
64 bool HasBMI = false;
65 bool HasBMI2 = false;
66 bool HasPOPCNT = false;
67 bool HasRTM = false;
68 bool HasPRFCHW = false;
69 bool HasRDSEED = false;
70 bool HasADX = false;
71 bool HasTBM = false;
72 bool HasLWP = false;
73 bool HasFMA = false;
74 bool HasF16C = false;
75 bool HasAVX10_1 = false;
76 bool HasAVX10_2 = false;
77 bool HasAVX10_V2_AUX = false;
78 bool HasAVX512CD = false;
79 bool HasAVX512VPOPCNTDQ = false;
80 bool HasAVX512VNNI = false;
81 bool HasAVX512FP16 = false;
82 bool HasAVX512BF16 = false;
83 bool HasAVX512DQ = false;
84 bool HasAVX512BITALG = false;
85 bool HasAVX512BMM = false;
86 bool HasAVX512BW = false;
87 bool HasAVX512VL = false;
88 bool HasAVX512VBMI = false;
89 bool HasAVX512VBMI2 = false;
90 bool HasAVXIFMA = false;
91 bool HasAVX512IFMA = false;
92 bool HasAVX512VP2INTERSECT = false;
93 bool HasSHA = false;
94 bool HasSHA512 = false;
95 bool HasSHSTK = false;
96 bool HasSM3 = false;
97 bool HasSGX = false;
98 bool HasSM4 = false;
99 bool HasCX8 = false;
100 bool HasCX16 = false;
101 bool HasFXSR = false;
102 bool HasXSAVE = false;
103 bool HasXSAVEOPT = false;
104 bool HasXSAVEC = false;
105 bool HasXSAVES = false;
106 bool HasMWAITX = false;
107 bool HasCLZERO = false;
108 bool HasCLDEMOTE = false;
109 bool HasPCONFIG = false;
110 bool HasPKU = false;
111 bool HasCLFLUSHOPT = false;
112 bool HasCLWB = false;
113 bool HasMOVBE = false;
114 bool HasMOVRS = false;
115 bool HasPREFETCHI = false;
116 bool HasRDPID = false;
117 bool HasRDPRU = false;
118 bool HasRetpolineExternalThunk = false;
119 bool HasLAHFSAHF = false;
120 bool HasWBNOINVD = false;
121 bool HasWAITPKG = false;
122 bool HasMOVDIRI = false;
123 bool HasMOVDIR64B = false;
124 bool HasPTWRITE = false;
125 bool HasINVPCID = false;
126 bool HasENQCMD = false;
127 bool HasAVXVNNIINT16 = false;
128 bool HasAMXFP16 = false;
129 bool HasCMPCCXADD = false;
130 bool HasRAOINT = false;
131 bool HasAVXVNNIINT8 = false;
132 bool HasAVXNECONVERT = false;
133 bool HasKL = false; // For key locker
134 bool HasWIDEKL = false; // For wide key locker
135 bool HasHRESET = false;
136 bool HasAVXVNNI = false;
137 bool HasAMXTILE = false;
138 bool HasAMXINT8 = false;
139 bool HasAMXBF16 = false;
140 bool HasAMXCOMPLEX = false;
141 bool HasAMXFP8 = false;
142 bool HasAMXMOVRS = false;
143 bool HasAMXAVX512 = false;
144 bool HasSERIALIZE = false;
145 bool HasTSXLDTRK = false;
146 bool HasUSERMSR = false;
147 bool HasUINTR = false;
148 bool HasCRC32 = false;
149 bool HasX87 = false;
150 bool HasEGPR = false;
151 bool HasPush2Pop2 = false;
152 bool HasPPX = false;
153 bool HasNDD = false;
154 bool HasCCMP = false;
155 bool HasNF = false;
156 bool HasCF = false;
157 bool HasZU = false;
158 bool HasJMPABS = false;
159 bool HasInlineAsmUseGPR32 = false;
160 bool HasBranchHint = false;
161
162protected:
163 llvm::X86::CPUKind CPU = llvm::X86::CK_None;
164
165 enum FPMathKind { FP_Default, FP_SSE, FP_387 } FPMath = FP_Default;
166
167public:
168 X86TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
169 : TargetInfo(Triple) {
170 BFloat16Width = BFloat16Align = 16;
171 BFloat16Format = &llvm::APFloat::BFloat();
172 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
173 AddrSpaceMap = &X86AddrSpaceMap;
174 HasStrictFP = true;
175 HasUnalignedAccess = true;
176
177 bool IsWinCOFF =
178 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
179 if (IsWinCOFF)
180 MaxVectorAlign = MaxTLSAlign = 8192u * getCharWidth();
181 }
182
183 const char *getLongDoubleMangling() const override {
184 return LongDoubleFormat == &llvm::APFloat::IEEEquad() ? "g" : "e";
185 }
186
187 LangOptions::FPEvalMethodKind getFPEvalMethod() const override {
188 // X87 evaluates with 80 bits "long double" precision.
189 return SSELevel == NoSSE ? LangOptions::FPEvalMethodKind::FEM_Extended
190 : LangOptions::FPEvalMethodKind::FEM_Source;
191 }
192
193 // EvalMethod `source` is not supported for targets with `NoSSE` feature.
194 bool supportSourceEvalMethod() const override { return SSELevel > NoSSE; }
195
196 ArrayRef<const char *> getGCCRegNames() const override;
197
198 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
199 return {};
200 }
201
202 ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
203
204 bool isSPRegName(StringRef RegName) const override {
205 return RegName == "esp" || RegName == "rsp";
206 }
207
208 bool supportsCpuSupports() const override { return true; }
209 bool supportsCpuIs() const override { return true; }
210 bool supportsCpuInit() const override { return true; }
211
212 bool validateCpuSupports(StringRef FeatureStr) const override;
213
214 bool validateCpuIs(StringRef FeatureStr) const override;
215
216 bool validateCPUSpecificCPUDispatch(StringRef Name) const override;
217
218 char CPUSpecificManglingCharacter(StringRef Name) const override;
219
220 void getCPUSpecificCPUDispatchFeatures(
221 StringRef Name,
222 llvm::SmallVectorImpl<StringRef> &Features) const override;
223
224 std::optional<unsigned> getCPUCacheLineSize() const override;
225
226 bool validateAsmConstraint(const char *&Name,
227 TargetInfo::ConstraintInfo &info) const override;
228
229 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
230 bool &HasSizeMismatch) const override {
231 // esp and ebp are the only 32-bit registers the x86 backend can currently
232 // handle.
233 if (RegName == "esp" || RegName == "ebp") {
234 // Check that the register size is 32-bit.
235 HasSizeMismatch = RegSize != 32;
236 return true;
237 }
238 if (RegName.ends_with(Suffix: "di")) {
239 if (getTargetOpts().FeatureMap.lookup(Key: "reserve-edi")) {
240 if (RegName == "edi") {
241 HasSizeMismatch = RegSize != 32;
242 } else if (RegName == "di") {
243 HasSizeMismatch = RegSize != 16;
244 }
245 return true;
246 }
247 }
248
249 return false;
250 }
251
252 bool validateLocalRegisterVariable(StringRef RegName) const override {
253 return !llvm::is_contained(
254 Set: {"argp", "flags", "fpcr", "fpsr", "dirflag", "frame"}, Element: RegName);
255 }
256
257 bool validateOutputSize(const llvm::StringMap<bool> &FeatureMap,
258 StringRef Constraint, unsigned Size) const override;
259
260 bool validateInputSize(const llvm::StringMap<bool> &FeatureMap,
261 StringRef Constraint, unsigned Size) const override;
262
263 bool
264 checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const override {
265 if (CPU == llvm::X86::CK_None || CPU >= llvm::X86::CK_PentiumPro)
266 return true;
267 return TargetInfo::checkCFProtectionReturnSupported(Diags);
268 };
269
270 bool
271 checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const override {
272 if (CPU == llvm::X86::CK_None || CPU >= llvm::X86::CK_PentiumPro)
273 return true;
274 return TargetInfo::checkCFProtectionBranchSupported(Diags);
275 };
276
277 virtual bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
278 StringRef Constraint, unsigned Size) const;
279
280 std::string convertConstraint(const char *&Constraint) const override;
281 std::string_view getClobbers() const override {
282 return "~{dirflag},~{fpsr},~{flags}";
283 }
284
285 StringRef getConstraintRegister(StringRef Constraint,
286 StringRef Expression) const override {
287 StringRef::iterator I, E;
288 for (I = Constraint.begin(), E = Constraint.end(); I != E; ++I) {
289 if (isalpha(*I) || *I == '@')
290 break;
291 }
292 if (I == E)
293 return "";
294 switch (*I) {
295 // For the register constraints, return the matching register name
296 case 'a':
297 return "ax";
298 case 'b':
299 return "bx";
300 case 'c':
301 return "cx";
302 case 'd':
303 return "dx";
304 case 'S':
305 return "si";
306 case 'D':
307 return "di";
308 // In case the constraint is 'r' we need to return Expression
309 case 'r':
310 return Expression;
311 // Double letters Y<x> constraints
312 case 'Y':
313 if ((++I != E) && ((*I == '0') || (*I == 'z')))
314 return "xmm0";
315 break;
316 default:
317 break;
318 }
319 return "";
320 }
321
322 void getTargetDefines(const LangOptions &Opts,
323 MacroBuilder &Builder) const override;
324
325 void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
326 bool Enabled) const final;
327
328 bool
329 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
330 StringRef CPU,
331 const std::vector<std::string> &FeaturesVec) const override;
332
333 bool isValidFeatureName(StringRef Name) const override;
334
335 bool hasFeature(StringRef Feature) const final;
336
337 bool handleTargetFeatures(std::vector<std::string> &Features,
338 DiagnosticsEngine &Diags) override;
339
340 StringRef getABI() const override {
341 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX512F)
342 return "avx512";
343 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
344 return "avx";
345 if (getTriple().getArch() == llvm::Triple::x86 && !HasMMX)
346 return "no-mmx";
347 return "";
348 }
349
350 bool supportsTargetAttributeTune() const override {
351 return true;
352 }
353
354 bool isValidCPUName(StringRef Name) const override {
355 bool Only64Bit = getTriple().getArch() != llvm::Triple::x86;
356 return llvm::X86::parseArchX86(CPU: Name, Only64Bit) != llvm::X86::CK_None;
357 }
358
359 bool isValidTuneCPUName(StringRef Name) const override {
360 if (Name == "generic")
361 return true;
362
363 // Allow 32-bit only CPUs regardless of 64-bit mode unlike isValidCPUName.
364 // NOTE: gcc rejects 32-bit mtune CPUs in 64-bit mode. But being lenient
365 // since mtune was ignored by clang for so long.
366 return llvm::X86::parseTuneCPU(CPU: Name) != llvm::X86::CK_None;
367 }
368
369 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
370 void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override;
371
372 bool setCPU(StringRef Name) override {
373 bool Only64Bit = getTriple().getArch() != llvm::Triple::x86;
374 CPU = llvm::X86::parseArchX86(CPU: Name, Only64Bit);
375 return CPU != llvm::X86::CK_None;
376 }
377
378 llvm::APInt getFMVPriority(ArrayRef<StringRef> Features) const override;
379
380 bool setFPMath(StringRef Name) override;
381
382 bool supportsExtendIntArgs() const override {
383 return getTriple().getArch() != llvm::Triple::x86;
384 }
385
386 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
387 // Most of the non-ARM calling conventions are i386 conventions.
388 switch (CC) {
389 case CC_X86ThisCall:
390 case CC_X86FastCall:
391 case CC_X86StdCall:
392 case CC_X86VectorCall:
393 case CC_X86RegCall:
394 case CC_C:
395 case CC_PreserveMost:
396 case CC_Swift:
397 case CC_X86Pascal:
398 case CC_IntelOclBicc:
399 return CCCR_OK;
400 case CC_SwiftAsync:
401 return CCCR_Error;
402 case CC_DeviceKernel:
403 return IsOpenCL ? CCCR_OK : CCCR_Warning;
404 default:
405 return CCCR_Warning;
406 }
407 }
408
409 bool checkArithmeticFenceSupported() const override { return true; }
410
411 CallingConv getDefaultCallingConv() const override {
412 return CC_C;
413 }
414
415 bool hasSjLjLowering() const override { return true; }
416
417 void setSupportedOpenCLOpts() override { supportAllOpenCLOpts(); }
418
419 uint64_t getPointerWidthV(LangAS AS) const override {
420 unsigned TargetAddrSpace = getTargetAddressSpace(AS);
421 if (TargetAddrSpace == ptr32_sptr || TargetAddrSpace == ptr32_uptr)
422 return 32;
423 if (TargetAddrSpace == ptr64)
424 return 64;
425 return PointerWidth;
426 }
427
428 uint64_t getPointerAlignV(LangAS AddrSpace) const override {
429 return getPointerWidthV(AS: AddrSpace);
430 }
431 void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
432 const TargetInfo *Aux) override {
433 TargetInfo::adjust(Diags, Opts, Aux);
434 IsOpenCL = Opts.OpenCL;
435 }
436
437private:
438 bool IsOpenCL = false;
439};
440
441// X86-32 generic target
442class LLVM_LIBRARY_VISIBILITY X86_32TargetInfo : public X86TargetInfo {
443public:
444 X86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
445 : X86TargetInfo(Triple, Opts) {
446 DoubleAlign = LongLongAlign = 32;
447 LongDoubleWidth = 96;
448 LongDoubleAlign = 32;
449 SuitableAlign = 128;
450 resetDataLayout();
451 SizeType = UnsignedInt;
452 PtrDiffType = SignedInt;
453 IntPtrType = SignedInt;
454 RegParmMax = 3;
455
456 // Use fpret for all types.
457 RealTypeUsesObjCFPRetMask =
458 (unsigned)(FloatModeKind::Float | FloatModeKind::Double |
459 FloatModeKind::LongDouble);
460
461 // x86-32 has atomics up to 8 bytes
462 MaxAtomicPromoteWidth = 64;
463 MaxAtomicInlineWidth = 32;
464 }
465
466 BuiltinVaListKind getBuiltinVaListKind() const override {
467 return TargetInfo::CharPtrBuiltinVaList;
468 }
469
470 int getEHDataRegisterNumber(unsigned RegNo) const override {
471 if (RegNo == 0)
472 return 0;
473 if (RegNo == 1)
474 return 2;
475 return -1;
476 }
477
478 bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
479 StringRef Constraint, unsigned Size) const override {
480 switch (Constraint[0]) {
481 default:
482 break;
483 case 'R':
484 case 'q':
485 case 'Q':
486 case 'a':
487 case 'b':
488 case 'c':
489 case 'd':
490 case 'S':
491 case 'D':
492 return Size <= 32;
493 case 'A':
494 return Size <= 64;
495 }
496
497 return X86TargetInfo::validateOperandSize(FeatureMap, Constraint, Size);
498 }
499
500 void setMaxAtomicWidth() override {
501 if (hasFeature(Feature: "cx8"))
502 MaxAtomicInlineWidth = 64;
503 }
504
505 llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override;
506
507 bool hasBitIntType() const override { return true; }
508 size_t getMaxBitIntWidth() const override {
509 return llvm::IntegerType::MAX_INT_BITS;
510 }
511};
512
513class LLVM_LIBRARY_VISIBILITY NetBSDI386TargetInfo
514 : public NetBSDTargetInfo<X86_32TargetInfo> {
515public:
516 NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
517 : NetBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
518};
519
520class LLVM_LIBRARY_VISIBILITY OpenBSDI386TargetInfo
521 : public OpenBSDTargetInfo<X86_32TargetInfo> {
522public:
523 OpenBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
524 : OpenBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {
525 SizeType = UnsignedLong;
526 IntPtrType = SignedLong;
527 PtrDiffType = SignedLong;
528 }
529};
530
531class LLVM_LIBRARY_VISIBILITY AppleMachOI386TargetInfo
532 : public AppleMachOTargetInfo<X86_32TargetInfo> {
533public:
534 AppleMachOI386TargetInfo(const llvm::Triple &Triple,
535 const TargetOptions &Opts)
536 : AppleMachOTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
537};
538
539class LLVM_LIBRARY_VISIBILITY DarwinI386TargetInfo
540 : public DarwinTargetInfo<X86_32TargetInfo> {
541public:
542 DarwinI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
543 : DarwinTargetInfo<X86_32TargetInfo>(Triple, Opts) {
544 LongDoubleWidth = 128;
545 LongDoubleAlign = 128;
546 SuitableAlign = 128;
547 MaxVectorAlign = 256;
548 // The watchOS simulator uses the builtin bool type for Objective-C.
549 llvm::Triple T = llvm::Triple(Triple);
550 if (T.isWatchOS())
551 UseSignedCharForObjCBool = false;
552 SizeType = UnsignedLong;
553 IntPtrType = SignedLong;
554 resetDataLayout();
555 HasAlignMac68kSupport = true;
556 }
557
558 bool handleTargetFeatures(std::vector<std::string> &Features,
559 DiagnosticsEngine &Diags) override {
560 if (!DarwinTargetInfo<X86_32TargetInfo>::handleTargetFeatures(Features,
561 Diags))
562 return false;
563 // We now know the features we have: we can decide how to align vectors.
564 MaxVectorAlign =
565 hasFeature(Feature: "avx512f") ? 512 : hasFeature(Feature: "avx") ? 256 : 128;
566 return true;
567 }
568};
569
570// x86-32 Windows target
571class LLVM_LIBRARY_VISIBILITY WindowsX86_32TargetInfo
572 : public WindowsTargetInfo<X86_32TargetInfo> {
573public:
574 WindowsX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
575 : WindowsTargetInfo<X86_32TargetInfo>(Triple, Opts) {
576 DoubleAlign = LongLongAlign = 64;
577 bool IsWinCOFF =
578 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
579 bool IsMSVC = getTriple().isWindowsMSVCEnvironment();
580 std::string Layout = IsWinCOFF ? "e-m:x" : "e-m:e";
581 Layout += "-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-";
582 Layout += IsMSVC ? "f80:128" : "f80:32";
583 Layout += "-n8:16:32-a:0:32-S32";
584 if (IsWinCOFF)
585 UserLabelPrefix = "_";
586 resetDataLayout();
587 }
588};
589
590// x86-32 Windows Visual Studio target
591class LLVM_LIBRARY_VISIBILITY MicrosoftX86_32TargetInfo
592 : public WindowsX86_32TargetInfo {
593public:
594 MicrosoftX86_32TargetInfo(const llvm::Triple &Triple,
595 const TargetOptions &Opts)
596 : WindowsX86_32TargetInfo(Triple, Opts) {
597 LongDoubleWidth = LongDoubleAlign = 64;
598 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
599 }
600
601 void getTargetDefines(const LangOptions &Opts,
602 MacroBuilder &Builder) const override {
603 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
604 // The value of the following reflects processor type.
605 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
606 // We lost the original triple, so we use the default.
607 Builder.defineMacro(Name: "_M_IX86", Value: "600");
608 }
609};
610
611// x86-32 MinGW target
612class LLVM_LIBRARY_VISIBILITY MinGWX86_32TargetInfo
613 : public WindowsX86_32TargetInfo {
614public:
615 MinGWX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
616 : WindowsX86_32TargetInfo(Triple, Opts) {
617 HasFloat128 = true;
618 }
619
620 void getTargetDefines(const LangOptions &Opts,
621 MacroBuilder &Builder) const override {
622 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
623 Builder.defineMacro(Name: "_X86_");
624 }
625};
626
627// x86-32 Cygwin target
628class LLVM_LIBRARY_VISIBILITY CygwinX86_32TargetInfo : public X86_32TargetInfo {
629public:
630 CygwinX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
631 : X86_32TargetInfo(Triple, Opts) {
632 this->WCharType = TargetInfo::UnsignedShort;
633 this->WIntType = TargetInfo::UnsignedInt;
634 this->UseMicrosoftManglingForC = true;
635 DoubleAlign = LongLongAlign = 64;
636 UserLabelPrefix = "_";
637 resetDataLayout();
638 }
639
640 void getTargetDefines(const LangOptions &Opts,
641 MacroBuilder &Builder) const override {
642 X86_32TargetInfo::getTargetDefines(Opts, Builder);
643 Builder.defineMacro(Name: "_X86_");
644 Builder.defineMacro(Name: "__CYGWIN__");
645 Builder.defineMacro(Name: "__CYGWIN32__");
646 addCygMingDefines(Opts, Builder);
647 DefineStd(Builder, MacroName: "unix", Opts);
648 if (Opts.CPlusPlus)
649 Builder.defineMacro(Name: "_GNU_SOURCE");
650 }
651};
652
653// x86-32 Haiku target
654class LLVM_LIBRARY_VISIBILITY HaikuX86_32TargetInfo
655 : public HaikuTargetInfo<X86_32TargetInfo> {
656public:
657 HaikuX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
658 : HaikuTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
659
660 void getTargetDefines(const LangOptions &Opts,
661 MacroBuilder &Builder) const override {
662 HaikuTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
663 Builder.defineMacro(Name: "__INTEL__");
664 }
665};
666
667// X86-32 MCU target
668class LLVM_LIBRARY_VISIBILITY MCUX86_32TargetInfo : public X86_32TargetInfo {
669public:
670 MCUX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
671 : X86_32TargetInfo(Triple, Opts) {
672 LongDoubleWidth = 64;
673 DefaultAlignForAttributeAligned = 32;
674 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
675 resetDataLayout();
676 WIntType = UnsignedInt;
677 }
678
679 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
680 // On MCU we support only C calling convention.
681 return CC == CC_C ? CCCR_OK : CCCR_Warning;
682 }
683
684 void getTargetDefines(const LangOptions &Opts,
685 MacroBuilder &Builder) const override {
686 X86_32TargetInfo::getTargetDefines(Opts, Builder);
687 Builder.defineMacro(Name: "__iamcu");
688 Builder.defineMacro(Name: "__iamcu__");
689 }
690
691 bool allowsLargerPreferedTypeAlignment() const override { return false; }
692};
693
694// x86-32 RTEMS target
695class LLVM_LIBRARY_VISIBILITY RTEMSX86_32TargetInfo : public X86_32TargetInfo {
696public:
697 RTEMSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
698 : X86_32TargetInfo(Triple, Opts) {
699 SizeType = UnsignedLong;
700 IntPtrType = SignedLong;
701 PtrDiffType = SignedLong;
702 }
703
704 void getTargetDefines(const LangOptions &Opts,
705 MacroBuilder &Builder) const override {
706 X86_32TargetInfo::getTargetDefines(Opts, Builder);
707 Builder.defineMacro(Name: "__INTEL__");
708 Builder.defineMacro(Name: "__rtems__");
709 }
710};
711
712// x86-64 generic target
713class LLVM_LIBRARY_VISIBILITY X86_64TargetInfo : public X86TargetInfo {
714public:
715 X86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
716 : X86TargetInfo(Triple, Opts) {
717 const bool IsX32 = getTriple().isX32();
718 LongWidth = LongAlign = PointerWidth = PointerAlign = IsX32 ? 32 : 64;
719 LongDoubleWidth = 128;
720 LongDoubleAlign = 128;
721 LargeArrayMinWidth = 128;
722 LargeArrayAlign = 128;
723 SuitableAlign = 128;
724 SizeType = IsX32 ? UnsignedInt : UnsignedLong;
725 PtrDiffType = IsX32 ? SignedInt : SignedLong;
726 IntPtrType = IsX32 ? SignedInt : SignedLong;
727 IntMaxType = IsX32 ? SignedLongLong : SignedLong;
728 Int64Type = IsX32 ? SignedLongLong : SignedLong;
729 RegParmMax = 6;
730
731 resetDataLayout();
732
733 // Use fpret only for long double.
734 RealTypeUsesObjCFPRetMask = (unsigned)FloatModeKind::LongDouble;
735
736 // Use fp2ret for _Complex long double.
737 ComplexLongDoubleUsesFP2Ret = true;
738
739 // Make __builtin_ms_va_list available.
740 HasBuiltinMSVaList = true;
741
742 // x86-64 has atomics up to 16 bytes.
743 MaxAtomicPromoteWidth = 128;
744 MaxAtomicInlineWidth = 64;
745 }
746
747 BuiltinVaListKind getBuiltinVaListKind() const override {
748 return TargetInfo::X86_64ABIBuiltinVaList;
749 }
750
751 int getEHDataRegisterNumber(unsigned RegNo) const override {
752 if (RegNo == 0)
753 return 0;
754 if (RegNo == 1)
755 return 1;
756 return -1;
757 }
758
759 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
760 switch (CC) {
761 case CC_C:
762 case CC_Swift:
763 case CC_SwiftAsync:
764 case CC_X86VectorCall:
765 case CC_IntelOclBicc:
766 case CC_Win64:
767 case CC_PreserveMost:
768 case CC_PreserveAll:
769 case CC_PreserveNone:
770 case CC_X86RegCall:
771 return CCCR_OK;
772 case CC_DeviceKernel:
773 return IsOpenCL ? CCCR_OK : CCCR_Warning;
774 default:
775 return CCCR_Warning;
776 }
777 }
778
779 CallingConv getDefaultCallingConv() const override {
780 return CC_C;
781 }
782
783 // for x32 we need it here explicitly
784 bool hasInt128Type() const override { return true; }
785
786 unsigned getUnwindWordWidth() const override { return 64; }
787
788 unsigned getRegisterWidth() const override { return 64; }
789
790 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
791 bool &HasSizeMismatch) const override {
792 // rsp and rbp are the only 64-bit registers the x86 backend can currently
793 // handle.
794 if (RegName == "rsp" || RegName == "rbp") {
795 // Check that the register size is 64-bit.
796 HasSizeMismatch = RegSize != 64;
797 return true;
798 }
799
800 // -ffixed-r8 through -ffixed-r31 are lowered to reserve-r8 through
801 // reserve-r31 target features, so canonicalize subregister spellings
802 // like r15d/r15w/r15b back to the corresponding 64-bit register first.
803 StringRef Reg64 = RegName;
804 if (Reg64.back() == 'd' || Reg64.back() == 'w' || Reg64.back() == 'b') {
805 Reg64 = Reg64.substr(Start: 0, N: Reg64.size() - 1);
806 }
807 if (getTargetOpts().FeatureMap.lookup(Key: ("reserve-" + Reg64).str())) {
808 switch (RegName.back()) {
809 case 'd':
810 HasSizeMismatch = RegSize != 32;
811 break;
812 case 'w':
813 HasSizeMismatch = RegSize != 16;
814 break;
815 case 'b':
816 HasSizeMismatch = RegSize != 8;
817 break;
818 default:
819 HasSizeMismatch = RegSize != 64;
820 }
821 return true;
822 }
823
824 // Check if the register is a 32-bit register the backend can handle.
825 return X86TargetInfo::validateGlobalRegisterVariable(RegName, RegSize,
826 HasSizeMismatch);
827 }
828 void setMaxAtomicWidth() override {
829 if (hasFeature(Feature: "cx16"))
830 MaxAtomicInlineWidth = 128;
831 }
832
833 llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override;
834
835 bool hasBitIntType() const override { return true; }
836 size_t getMaxBitIntWidth() const override {
837 return llvm::IntegerType::MAX_INT_BITS;
838 }
839
840 void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
841 const TargetInfo *Aux) override {
842 TargetInfo::adjust(Diags, Opts, Aux);
843 IsOpenCL = Opts.OpenCL;
844 }
845
846private:
847 bool IsOpenCL = false;
848};
849
850// x86-64 UEFI target
851class LLVM_LIBRARY_VISIBILITY UEFIX86_64TargetInfo
852 : public UEFITargetInfo<X86_64TargetInfo> {
853public:
854 UEFIX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
855 : UEFITargetInfo<X86_64TargetInfo>(Triple, Opts) {
856 // The UEFI spec does not mandate specific C++ ABI, integer widths, or
857 // alignment. We are setting these defaults to match the Windows target as
858 // it is the only way to build EFI applications with Clang/LLVM today. We
859 // intend to offer flexibility by supporting choices that are not default in
860 // Windows target in the future.
861 this->TheCXXABI.set(TargetCXXABI::Microsoft);
862 LongWidth = LongAlign = 32;
863 DoubleAlign = LongLongAlign = 64;
864 LongDoubleWidth = LongDoubleAlign = 64;
865 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
866 IntMaxType = SignedLongLong;
867 Int64Type = SignedLongLong;
868 SizeType = UnsignedLongLong;
869 PtrDiffType = SignedLongLong;
870 IntPtrType = SignedLongLong;
871 WCharType = UnsignedShort;
872 WIntType = UnsignedShort;
873 this->resetDataLayout();
874 }
875
876 BuiltinVaListKind getBuiltinVaListKind() const override {
877 return TargetInfo::CharPtrBuiltinVaList;
878 }
879
880 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
881 switch (CC) {
882 case CC_C:
883 case CC_Win64:
884 case CC_X86_64SysV:
885 return CCCR_OK;
886 default:
887 return CCCR_Warning;
888 }
889 }
890
891 TargetInfo::CallingConvKind
892 getCallingConvKind(bool ClangABICompat4) const override {
893 return CCK_MicrosoftWin64;
894 }
895};
896
897// x86-64 Windows target
898class LLVM_LIBRARY_VISIBILITY WindowsX86_64TargetInfo
899 : public WindowsTargetInfo<X86_64TargetInfo> {
900public:
901 WindowsX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
902 : WindowsTargetInfo<X86_64TargetInfo>(Triple, Opts) {
903 LongWidth = LongAlign = 32;
904 DoubleAlign = LongLongAlign = 64;
905 IntMaxType = SignedLongLong;
906 Int64Type = SignedLongLong;
907 SizeType = UnsignedLongLong;
908 PtrDiffType = SignedLongLong;
909 IntPtrType = SignedLongLong;
910 }
911
912 BuiltinVaListKind getBuiltinVaListKind() const override {
913 return TargetInfo::CharPtrBuiltinVaList;
914 }
915
916 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
917 switch (CC) {
918 case CC_X86StdCall:
919 case CC_X86ThisCall:
920 case CC_X86FastCall:
921 return CCCR_Ignore;
922 case CC_C:
923 case CC_X86VectorCall:
924 case CC_IntelOclBicc:
925 case CC_PreserveMost:
926 case CC_PreserveAll:
927 case CC_PreserveNone:
928 case CC_X86_64SysV:
929 case CC_Swift:
930 case CC_SwiftAsync:
931 case CC_X86RegCall:
932 case CC_DeviceKernel:
933 return CCCR_OK;
934 default:
935 return CCCR_Warning;
936 }
937 }
938};
939
940// x86-64 Windows Visual Studio target
941class LLVM_LIBRARY_VISIBILITY MicrosoftX86_64TargetInfo
942 : public WindowsX86_64TargetInfo {
943public:
944 MicrosoftX86_64TargetInfo(const llvm::Triple &Triple,
945 const TargetOptions &Opts)
946 : WindowsX86_64TargetInfo(Triple, Opts) {
947 LongDoubleWidth = LongDoubleAlign = 64;
948 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
949 LargeArrayMinWidth = 0;
950 LargeArrayAlign = 0;
951 }
952
953 void getTargetDefines(const LangOptions &Opts,
954 MacroBuilder &Builder) const override {
955 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
956 Builder.defineMacro(Name: "_M_X64", Value: "100");
957 Builder.defineMacro(Name: "_M_AMD64", Value: "100");
958 }
959
960 TargetInfo::CallingConvKind
961 getCallingConvKind(bool ClangABICompat4) const override {
962 return CCK_MicrosoftWin64;
963 }
964
965 unsigned getMinGlobalAlign(uint64_t TypeSize,
966 bool HasNonWeakDef) const override;
967
968 void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
969 const TargetInfo *Aux) override;
970
971private:
972 // Whether to apply the MSVC size-based global-alignment scheme. Disabled by
973 // -fclang-abi-compat<=22 to restore prior x86_64-windows-msvc behavior.
974 bool UseMSVCCompatGlobalAlign = true;
975};
976
977// x86-64 MinGW target
978class LLVM_LIBRARY_VISIBILITY MinGWX86_64TargetInfo
979 : public WindowsX86_64TargetInfo {
980public:
981 MinGWX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
982 : WindowsX86_64TargetInfo(Triple, Opts) {
983 // Mingw64 rounds long double size and alignment up to 16 bytes, but sticks
984 // with x86 FP ops. Weird.
985 LongDoubleWidth = LongDoubleAlign = 128;
986 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
987 HasFloat128 = true;
988 }
989};
990
991// x86-64 Cygwin target
992class LLVM_LIBRARY_VISIBILITY CygwinX86_64TargetInfo : public X86_64TargetInfo {
993public:
994 CygwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
995 : X86_64TargetInfo(Triple, Opts) {
996 this->WCharType = TargetInfo::UnsignedShort;
997 this->WIntType = TargetInfo::UnsignedInt;
998 this->UseMicrosoftManglingForC = true;
999 }
1000
1001 void getTargetDefines(const LangOptions &Opts,
1002 MacroBuilder &Builder) const override {
1003 X86_64TargetInfo::getTargetDefines(Opts, Builder);
1004 Builder.defineMacro(Name: "__x86_64__");
1005 Builder.defineMacro(Name: "__CYGWIN__");
1006 Builder.defineMacro(Name: "__CYGWIN64__");
1007 addCygMingDefines(Opts, Builder);
1008 DefineStd(Builder, MacroName: "unix", Opts);
1009 if (Opts.CPlusPlus)
1010 Builder.defineMacro(Name: "_GNU_SOURCE");
1011 }
1012
1013 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
1014 switch (CC) {
1015 case CC_X86StdCall:
1016 case CC_X86ThisCall:
1017 case CC_X86FastCall:
1018 return CCCR_Ignore;
1019 case CC_C:
1020 case CC_X86VectorCall:
1021 case CC_IntelOclBicc:
1022 case CC_PreserveMost:
1023 case CC_PreserveAll:
1024 case CC_PreserveNone:
1025 case CC_X86_64SysV:
1026 case CC_Swift:
1027 case CC_SwiftAsync:
1028 case CC_X86RegCall:
1029 case CC_DeviceKernel:
1030 return CCCR_OK;
1031 default:
1032 return CCCR_Warning;
1033 }
1034 }
1035
1036 BuiltinVaListKind getBuiltinVaListKind() const override {
1037 return TargetInfo::CharPtrBuiltinVaList;
1038 }
1039};
1040
1041class LLVM_LIBRARY_VISIBILITY DarwinX86_64TargetInfo
1042 : public DarwinTargetInfo<X86_64TargetInfo> {
1043public:
1044 DarwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1045 : DarwinTargetInfo<X86_64TargetInfo>(Triple, Opts) {
1046 Int64Type = SignedLongLong;
1047 // The 64-bit iOS simulator uses the builtin bool type for Objective-C.
1048 llvm::Triple T = llvm::Triple(Triple);
1049 if (T.isiOS())
1050 UseSignedCharForObjCBool = false;
1051 resetDataLayout();
1052 }
1053
1054 bool handleTargetFeatures(std::vector<std::string> &Features,
1055 DiagnosticsEngine &Diags) override {
1056 if (!DarwinTargetInfo<X86_64TargetInfo>::handleTargetFeatures(Features,
1057 Diags))
1058 return false;
1059 // We now know the features we have: we can decide how to align vectors.
1060 MaxVectorAlign =
1061 hasFeature(Feature: "avx512f") ? 512 : hasFeature(Feature: "avx") ? 256 : 128;
1062 return true;
1063 }
1064};
1065
1066class LLVM_LIBRARY_VISIBILITY OpenBSDX86_64TargetInfo
1067 : public OpenBSDTargetInfo<X86_64TargetInfo> {
1068public:
1069 OpenBSDX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1070 : OpenBSDTargetInfo<X86_64TargetInfo>(Triple, Opts) {
1071 IntMaxType = SignedLongLong;
1072 Int64Type = SignedLongLong;
1073 }
1074};
1075
1076// x86_32 Android target
1077class LLVM_LIBRARY_VISIBILITY AndroidX86_32TargetInfo
1078 : public LinuxTargetInfo<X86_32TargetInfo> {
1079public:
1080 AndroidX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1081 : LinuxTargetInfo<X86_32TargetInfo>(Triple, Opts) {
1082 SuitableAlign = 32;
1083 LongDoubleWidth = 64;
1084 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
1085 }
1086};
1087
1088// x86_64 Android target
1089class LLVM_LIBRARY_VISIBILITY AndroidX86_64TargetInfo
1090 : public LinuxTargetInfo<X86_64TargetInfo> {
1091public:
1092 AndroidX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1093 : LinuxTargetInfo<X86_64TargetInfo>(Triple, Opts) {
1094 LongDoubleFormat = &llvm::APFloat::IEEEquad();
1095 }
1096};
1097
1098// x86_32 OHOS target
1099class LLVM_LIBRARY_VISIBILITY OHOSX86_32TargetInfo
1100 : public OHOSTargetInfo<X86_32TargetInfo> {
1101public:
1102 OHOSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1103 : OHOSTargetInfo<X86_32TargetInfo>(Triple, Opts) {
1104 SuitableAlign = 32;
1105 LongDoubleWidth = 64;
1106 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
1107 }
1108};
1109
1110// x86_64 OHOS target
1111class LLVM_LIBRARY_VISIBILITY OHOSX86_64TargetInfo
1112 : public OHOSTargetInfo<X86_64TargetInfo> {
1113public:
1114 OHOSX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1115 : OHOSTargetInfo<X86_64TargetInfo>(Triple, Opts) {
1116 LongDoubleFormat = &llvm::APFloat::IEEEquad();
1117 }
1118};
1119} // namespace targets
1120} // namespace clang
1121#endif // LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
1122