1//===--- X86.h - Declare X86 target feature support -------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares X86 TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
14#define LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
15
16#include "OSTargets.h"
17#include "clang/Basic/BitmaskEnum.h"
18#include "clang/Basic/TargetInfo.h"
19#include "clang/Basic/TargetOptions.h"
20#include "llvm/Support/Compiler.h"
21#include "llvm/TargetParser/Triple.h"
22#include "llvm/TargetParser/X86TargetParser.h"
23#include <optional>
24
25namespace clang {
26namespace targets {
27
28static constexpr LangASMap X86AddrSpaceMap = {
29 {LangAS::ptr32_sptr, 270},
30 {LangAS::ptr32_uptr, 271},
31 {LangAS::ptr64, 272},
32};
33
34// X86 target abstract base class; x86-32 and x86-64 are very close, so
35// most of the implementation can be shared.
36class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
37
38 enum X86SSEEnum {
39 NoSSE,
40 SSE1,
41 SSE2,
42 SSE3,
43 SSSE3,
44 SSE41,
45 SSE42,
46 AVX,
47 AVX2,
48 AVX512F
49 } SSELevel = NoSSE;
50 bool HasMMX = false;
51 enum XOPEnum { NoXOP, SSE4A, FMA4, XOP } XOPLevel = NoXOP;
52 enum AddrSpace { ptr32_sptr = 270, ptr32_uptr = 271, ptr64 = 272 };
53
54 bool HasAES = false;
55 bool HasVAES = false;
56 bool HasPCLMUL = false;
57 bool HasVPCLMULQDQ = false;
58 bool HasGFNI = false;
59 bool HasLZCNT = false;
60 bool HasRDRND = false;
61 bool HasFSGSBASE = false;
62 bool HasBMI = false;
63 bool HasBMI2 = false;
64 bool HasPOPCNT = false;
65 bool HasRTM = false;
66 bool HasPRFCHW = false;
67 bool HasRDSEED = false;
68 bool HasADX = false;
69 bool HasTBM = false;
70 bool HasLWP = false;
71 bool HasFMA = false;
72 bool HasF16C = false;
73 bool HasAVX10_1 = false;
74 bool HasAVX10_2 = false;
75 bool HasAVX512CD = false;
76 bool HasAVX512VPOPCNTDQ = false;
77 bool HasAVX512VNNI = false;
78 bool HasAVX512FP16 = false;
79 bool HasAVX512BF16 = false;
80 bool HasAVX512DQ = false;
81 bool HasAVX512BITALG = false;
82 bool HasAVX512BMM = false;
83 bool HasAVX512BW = false;
84 bool HasAVX512VL = false;
85 bool HasAVX512VBMI = false;
86 bool HasAVX512VBMI2 = false;
87 bool HasAVXIFMA = false;
88 bool HasAVX512IFMA = false;
89 bool HasAVX512VP2INTERSECT = false;
90 bool HasSHA = false;
91 bool HasSHA512 = false;
92 bool HasSHSTK = false;
93 bool HasSM3 = false;
94 bool HasSGX = false;
95 bool HasSM4 = false;
96 bool HasCX8 = false;
97 bool HasCX16 = false;
98 bool HasFXSR = false;
99 bool HasXSAVE = false;
100 bool HasXSAVEOPT = false;
101 bool HasXSAVEC = false;
102 bool HasXSAVES = false;
103 bool HasMWAITX = false;
104 bool HasCLZERO = false;
105 bool HasCLDEMOTE = false;
106 bool HasPCONFIG = false;
107 bool HasPKU = false;
108 bool HasCLFLUSHOPT = false;
109 bool HasCLWB = false;
110 bool HasMOVBE = false;
111 bool HasMOVRS = false;
112 bool HasPREFETCHI = false;
113 bool HasRDPID = false;
114 bool HasRDPRU = false;
115 bool HasRetpolineExternalThunk = false;
116 bool HasLAHFSAHF = false;
117 bool HasWBNOINVD = false;
118 bool HasWAITPKG = false;
119 bool HasMOVDIRI = false;
120 bool HasMOVDIR64B = false;
121 bool HasPTWRITE = false;
122 bool HasINVPCID = false;
123 bool HasENQCMD = false;
124 bool HasAVXVNNIINT16 = false;
125 bool HasAMXFP16 = false;
126 bool HasCMPCCXADD = false;
127 bool HasRAOINT = false;
128 bool HasAVXVNNIINT8 = false;
129 bool HasAVXNECONVERT = false;
130 bool HasKL = false; // For key locker
131 bool HasWIDEKL = false; // For wide key locker
132 bool HasHRESET = false;
133 bool HasAVXVNNI = false;
134 bool HasAMXTILE = false;
135 bool HasAMXINT8 = false;
136 bool HasAMXBF16 = false;
137 bool HasAMXCOMPLEX = false;
138 bool HasAMXFP8 = false;
139 bool HasAMXMOVRS = false;
140 bool HasAMXAVX512 = false;
141 bool HasSERIALIZE = false;
142 bool HasTSXLDTRK = false;
143 bool HasUSERMSR = false;
144 bool HasUINTR = false;
145 bool HasCRC32 = false;
146 bool HasX87 = false;
147 bool HasEGPR = false;
148 bool HasPush2Pop2 = false;
149 bool HasPPX = false;
150 bool HasNDD = false;
151 bool HasCCMP = false;
152 bool HasNF = false;
153 bool HasCF = false;
154 bool HasZU = false;
155 bool HasJMPABS = false;
156 bool HasInlineAsmUseGPR32 = false;
157 bool HasBranchHint = false;
158
159protected:
160 llvm::X86::CPUKind CPU = llvm::X86::CK_None;
161
162 enum FPMathKind { FP_Default, FP_SSE, FP_387 } FPMath = FP_Default;
163
164public:
165 X86TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
166 : TargetInfo(Triple) {
167 BFloat16Width = BFloat16Align = 16;
168 BFloat16Format = &llvm::APFloat::BFloat();
169 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
170 AddrSpaceMap = &X86AddrSpaceMap;
171 HasStrictFP = true;
172 HasUnalignedAccess = true;
173
174 bool IsWinCOFF =
175 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
176 if (IsWinCOFF)
177 MaxVectorAlign = MaxTLSAlign = 8192u * getCharWidth();
178 }
179
180 const char *getLongDoubleMangling() const override {
181 return LongDoubleFormat == &llvm::APFloat::IEEEquad() ? "g" : "e";
182 }
183
184 LangOptions::FPEvalMethodKind getFPEvalMethod() const override {
185 // X87 evaluates with 80 bits "long double" precision.
186 return SSELevel == NoSSE ? LangOptions::FPEvalMethodKind::FEM_Extended
187 : LangOptions::FPEvalMethodKind::FEM_Source;
188 }
189
190 // EvalMethod `source` is not supported for targets with `NoSSE` feature.
191 bool supportSourceEvalMethod() const override { return SSELevel > NoSSE; }
192
193 ArrayRef<const char *> getGCCRegNames() const override;
194
195 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
196 return {};
197 }
198
199 ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
200
201 bool isSPRegName(StringRef RegName) const override {
202 return RegName == "esp" || RegName == "rsp";
203 }
204
205 bool supportsCpuSupports() const override { return true; }
206 bool supportsCpuIs() const override { return true; }
207 bool supportsCpuInit() const override { return true; }
208
209 bool validateCpuSupports(StringRef FeatureStr) const override;
210
211 bool validateCpuIs(StringRef FeatureStr) const override;
212
213 bool validateCPUSpecificCPUDispatch(StringRef Name) const override;
214
215 char CPUSpecificManglingCharacter(StringRef Name) const override;
216
217 void getCPUSpecificCPUDispatchFeatures(
218 StringRef Name,
219 llvm::SmallVectorImpl<StringRef> &Features) const override;
220
221 std::optional<unsigned> getCPUCacheLineSize() const override;
222
223 bool validateAsmConstraint(const char *&Name,
224 TargetInfo::ConstraintInfo &info) const override;
225
226 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
227 bool &HasSizeMismatch) const override {
228 // esp and ebp are the only 32-bit registers the x86 backend can currently
229 // handle.
230 if (RegName == "esp" || RegName == "ebp") {
231 // Check that the register size is 32-bit.
232 HasSizeMismatch = RegSize != 32;
233 return true;
234 }
235 if (RegName.ends_with(Suffix: "di")) {
236 if (getTargetOpts().FeatureMap.lookup(Key: "reserve-edi")) {
237 if (RegName == "edi") {
238 HasSizeMismatch = RegSize != 32;
239 } else if (RegName == "di") {
240 HasSizeMismatch = RegSize != 16;
241 }
242 return true;
243 }
244 }
245
246 return false;
247 }
248
249 bool validateOutputSize(const llvm::StringMap<bool> &FeatureMap,
250 StringRef Constraint, unsigned Size) const override;
251
252 bool validateInputSize(const llvm::StringMap<bool> &FeatureMap,
253 StringRef Constraint, unsigned Size) const override;
254
255 bool
256 checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const override {
257 if (CPU == llvm::X86::CK_None || CPU >= llvm::X86::CK_PentiumPro)
258 return true;
259 return TargetInfo::checkCFProtectionReturnSupported(Diags);
260 };
261
262 bool
263 checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const override {
264 if (CPU == llvm::X86::CK_None || CPU >= llvm::X86::CK_PentiumPro)
265 return true;
266 return TargetInfo::checkCFProtectionBranchSupported(Diags);
267 };
268
269 virtual bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
270 StringRef Constraint, unsigned Size) const;
271
272 std::string convertConstraint(const char *&Constraint) const override;
273 std::string_view getClobbers() const override {
274 return "~{dirflag},~{fpsr},~{flags}";
275 }
276
277 StringRef getConstraintRegister(StringRef Constraint,
278 StringRef Expression) const override {
279 StringRef::iterator I, E;
280 for (I = Constraint.begin(), E = Constraint.end(); I != E; ++I) {
281 if (isalpha(*I) || *I == '@')
282 break;
283 }
284 if (I == E)
285 return "";
286 switch (*I) {
287 // For the register constraints, return the matching register name
288 case 'a':
289 return "ax";
290 case 'b':
291 return "bx";
292 case 'c':
293 return "cx";
294 case 'd':
295 return "dx";
296 case 'S':
297 return "si";
298 case 'D':
299 return "di";
300 // In case the constraint is 'r' we need to return Expression
301 case 'r':
302 return Expression;
303 // Double letters Y<x> constraints
304 case 'Y':
305 if ((++I != E) && ((*I == '0') || (*I == 'z')))
306 return "xmm0";
307 break;
308 default:
309 break;
310 }
311 return "";
312 }
313
314 void getTargetDefines(const LangOptions &Opts,
315 MacroBuilder &Builder) const override;
316
317 void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
318 bool Enabled) const final;
319
320 bool
321 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
322 StringRef CPU,
323 const std::vector<std::string> &FeaturesVec) const override;
324
325 bool isValidFeatureName(StringRef Name) const override;
326
327 bool hasFeature(StringRef Feature) const final;
328
329 bool handleTargetFeatures(std::vector<std::string> &Features,
330 DiagnosticsEngine &Diags) override;
331
332 StringRef getABI() const override {
333 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX512F)
334 return "avx512";
335 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
336 return "avx";
337 if (getTriple().getArch() == llvm::Triple::x86 && !HasMMX)
338 return "no-mmx";
339 return "";
340 }
341
342 bool supportsTargetAttributeTune() const override {
343 return true;
344 }
345
346 bool isValidCPUName(StringRef Name) const override {
347 bool Only64Bit = getTriple().getArch() != llvm::Triple::x86;
348 return llvm::X86::parseArchX86(CPU: Name, Only64Bit) != llvm::X86::CK_None;
349 }
350
351 bool isValidTuneCPUName(StringRef Name) const override {
352 if (Name == "generic")
353 return true;
354
355 // Allow 32-bit only CPUs regardless of 64-bit mode unlike isValidCPUName.
356 // NOTE: gcc rejects 32-bit mtune CPUs in 64-bit mode. But being lenient
357 // since mtune was ignored by clang for so long.
358 return llvm::X86::parseTuneCPU(CPU: Name) != llvm::X86::CK_None;
359 }
360
361 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
362 void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override;
363
364 bool setCPU(StringRef Name) override {
365 bool Only64Bit = getTriple().getArch() != llvm::Triple::x86;
366 CPU = llvm::X86::parseArchX86(CPU: Name, Only64Bit);
367 return CPU != llvm::X86::CK_None;
368 }
369
370 llvm::APInt getFMVPriority(ArrayRef<StringRef> Features) const override;
371
372 bool setFPMath(StringRef Name) override;
373
374 bool supportsExtendIntArgs() const override {
375 return getTriple().getArch() != llvm::Triple::x86;
376 }
377
378 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
379 // Most of the non-ARM calling conventions are i386 conventions.
380 switch (CC) {
381 case CC_X86ThisCall:
382 case CC_X86FastCall:
383 case CC_X86StdCall:
384 case CC_X86VectorCall:
385 case CC_X86RegCall:
386 case CC_C:
387 case CC_PreserveMost:
388 case CC_Swift:
389 case CC_X86Pascal:
390 case CC_IntelOclBicc:
391 return CCCR_OK;
392 case CC_SwiftAsync:
393 return CCCR_Error;
394 case CC_DeviceKernel:
395 return IsOpenCL ? CCCR_OK : CCCR_Warning;
396 default:
397 return CCCR_Warning;
398 }
399 }
400
401 bool checkArithmeticFenceSupported() const override { return true; }
402
403 CallingConv getDefaultCallingConv() const override {
404 return CC_C;
405 }
406
407 bool hasSjLjLowering() const override { return true; }
408
409 void setSupportedOpenCLOpts() override { supportAllOpenCLOpts(); }
410
411 uint64_t getPointerWidthV(LangAS AS) const override {
412 unsigned TargetAddrSpace = getTargetAddressSpace(AS);
413 if (TargetAddrSpace == ptr32_sptr || TargetAddrSpace == ptr32_uptr)
414 return 32;
415 if (TargetAddrSpace == ptr64)
416 return 64;
417 return PointerWidth;
418 }
419
420 uint64_t getPointerAlignV(LangAS AddrSpace) const override {
421 return getPointerWidthV(AS: AddrSpace);
422 }
423 void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
424 const TargetInfo *Aux) override {
425 TargetInfo::adjust(Diags, Opts, Aux);
426 IsOpenCL = Opts.OpenCL;
427 }
428
429private:
430 bool IsOpenCL = false;
431};
432
433// X86-32 generic target
434class LLVM_LIBRARY_VISIBILITY X86_32TargetInfo : public X86TargetInfo {
435public:
436 X86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
437 : X86TargetInfo(Triple, Opts) {
438 DoubleAlign = LongLongAlign = 32;
439 LongDoubleWidth = 96;
440 LongDoubleAlign = 32;
441 SuitableAlign = 128;
442 resetDataLayout();
443 SizeType = UnsignedInt;
444 PtrDiffType = SignedInt;
445 IntPtrType = SignedInt;
446 RegParmMax = 3;
447
448 // Use fpret for all types.
449 RealTypeUsesObjCFPRetMask =
450 (unsigned)(FloatModeKind::Float | FloatModeKind::Double |
451 FloatModeKind::LongDouble);
452
453 // x86-32 has atomics up to 8 bytes
454 MaxAtomicPromoteWidth = 64;
455 MaxAtomicInlineWidth = 32;
456 }
457
458 BuiltinVaListKind getBuiltinVaListKind() const override {
459 return TargetInfo::CharPtrBuiltinVaList;
460 }
461
462 int getEHDataRegisterNumber(unsigned RegNo) const override {
463 if (RegNo == 0)
464 return 0;
465 if (RegNo == 1)
466 return 2;
467 return -1;
468 }
469
470 bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
471 StringRef Constraint, unsigned Size) const override {
472 switch (Constraint[0]) {
473 default:
474 break;
475 case 'R':
476 case 'q':
477 case 'Q':
478 case 'a':
479 case 'b':
480 case 'c':
481 case 'd':
482 case 'S':
483 case 'D':
484 return Size <= 32;
485 case 'A':
486 return Size <= 64;
487 }
488
489 return X86TargetInfo::validateOperandSize(FeatureMap, Constraint, Size);
490 }
491
492 void setMaxAtomicWidth() override {
493 if (hasFeature(Feature: "cx8"))
494 MaxAtomicInlineWidth = 64;
495 }
496
497 llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override;
498
499 bool hasBitIntType() const override { return true; }
500 size_t getMaxBitIntWidth() const override {
501 return llvm::IntegerType::MAX_INT_BITS;
502 }
503};
504
505class LLVM_LIBRARY_VISIBILITY NetBSDI386TargetInfo
506 : public NetBSDTargetInfo<X86_32TargetInfo> {
507public:
508 NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
509 : NetBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
510};
511
512class LLVM_LIBRARY_VISIBILITY OpenBSDI386TargetInfo
513 : public OpenBSDTargetInfo<X86_32TargetInfo> {
514public:
515 OpenBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
516 : OpenBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {
517 SizeType = UnsignedLong;
518 IntPtrType = SignedLong;
519 PtrDiffType = SignedLong;
520 }
521};
522
523class LLVM_LIBRARY_VISIBILITY AppleMachOI386TargetInfo
524 : public AppleMachOTargetInfo<X86_32TargetInfo> {
525public:
526 AppleMachOI386TargetInfo(const llvm::Triple &Triple,
527 const TargetOptions &Opts)
528 : AppleMachOTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
529};
530
531class LLVM_LIBRARY_VISIBILITY DarwinI386TargetInfo
532 : public DarwinTargetInfo<X86_32TargetInfo> {
533public:
534 DarwinI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
535 : DarwinTargetInfo<X86_32TargetInfo>(Triple, Opts) {
536 LongDoubleWidth = 128;
537 LongDoubleAlign = 128;
538 SuitableAlign = 128;
539 MaxVectorAlign = 256;
540 // The watchOS simulator uses the builtin bool type for Objective-C.
541 llvm::Triple T = llvm::Triple(Triple);
542 if (T.isWatchOS())
543 UseSignedCharForObjCBool = false;
544 SizeType = UnsignedLong;
545 IntPtrType = SignedLong;
546 resetDataLayout();
547 HasAlignMac68kSupport = true;
548 }
549
550 bool handleTargetFeatures(std::vector<std::string> &Features,
551 DiagnosticsEngine &Diags) override {
552 if (!DarwinTargetInfo<X86_32TargetInfo>::handleTargetFeatures(Features,
553 Diags))
554 return false;
555 // We now know the features we have: we can decide how to align vectors.
556 MaxVectorAlign =
557 hasFeature(Feature: "avx512f") ? 512 : hasFeature(Feature: "avx") ? 256 : 128;
558 return true;
559 }
560};
561
562// x86-32 Windows target
563class LLVM_LIBRARY_VISIBILITY WindowsX86_32TargetInfo
564 : public WindowsTargetInfo<X86_32TargetInfo> {
565public:
566 WindowsX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
567 : WindowsTargetInfo<X86_32TargetInfo>(Triple, Opts) {
568 DoubleAlign = LongLongAlign = 64;
569 bool IsWinCOFF =
570 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
571 bool IsMSVC = getTriple().isWindowsMSVCEnvironment();
572 std::string Layout = IsWinCOFF ? "e-m:x" : "e-m:e";
573 Layout += "-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-";
574 Layout += IsMSVC ? "f80:128" : "f80:32";
575 Layout += "-n8:16:32-a:0:32-S32";
576 if (IsWinCOFF)
577 UserLabelPrefix = "_";
578 resetDataLayout();
579 }
580};
581
582// x86-32 Windows Visual Studio target
583class LLVM_LIBRARY_VISIBILITY MicrosoftX86_32TargetInfo
584 : public WindowsX86_32TargetInfo {
585public:
586 MicrosoftX86_32TargetInfo(const llvm::Triple &Triple,
587 const TargetOptions &Opts)
588 : WindowsX86_32TargetInfo(Triple, Opts) {
589 LongDoubleWidth = LongDoubleAlign = 64;
590 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
591 }
592
593 void getTargetDefines(const LangOptions &Opts,
594 MacroBuilder &Builder) const override {
595 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
596 // The value of the following reflects processor type.
597 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
598 // We lost the original triple, so we use the default.
599 Builder.defineMacro(Name: "_M_IX86", Value: "600");
600 }
601};
602
603// x86-32 MinGW target
604class LLVM_LIBRARY_VISIBILITY MinGWX86_32TargetInfo
605 : public WindowsX86_32TargetInfo {
606public:
607 MinGWX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
608 : WindowsX86_32TargetInfo(Triple, Opts) {
609 HasFloat128 = true;
610 }
611
612 void getTargetDefines(const LangOptions &Opts,
613 MacroBuilder &Builder) const override {
614 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
615 Builder.defineMacro(Name: "_X86_");
616 }
617};
618
619// x86-32 Cygwin target
620class LLVM_LIBRARY_VISIBILITY CygwinX86_32TargetInfo : public X86_32TargetInfo {
621public:
622 CygwinX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
623 : X86_32TargetInfo(Triple, Opts) {
624 this->WCharType = TargetInfo::UnsignedShort;
625 this->WIntType = TargetInfo::UnsignedInt;
626 this->UseMicrosoftManglingForC = true;
627 DoubleAlign = LongLongAlign = 64;
628 UserLabelPrefix = "_";
629 resetDataLayout();
630 }
631
632 void getTargetDefines(const LangOptions &Opts,
633 MacroBuilder &Builder) const override {
634 X86_32TargetInfo::getTargetDefines(Opts, Builder);
635 Builder.defineMacro(Name: "_X86_");
636 Builder.defineMacro(Name: "__CYGWIN__");
637 Builder.defineMacro(Name: "__CYGWIN32__");
638 addCygMingDefines(Opts, Builder);
639 DefineStd(Builder, MacroName: "unix", Opts);
640 if (Opts.CPlusPlus)
641 Builder.defineMacro(Name: "_GNU_SOURCE");
642 }
643};
644
645// x86-32 Haiku target
646class LLVM_LIBRARY_VISIBILITY HaikuX86_32TargetInfo
647 : public HaikuTargetInfo<X86_32TargetInfo> {
648public:
649 HaikuX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
650 : HaikuTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
651
652 void getTargetDefines(const LangOptions &Opts,
653 MacroBuilder &Builder) const override {
654 HaikuTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
655 Builder.defineMacro(Name: "__INTEL__");
656 }
657};
658
659// X86-32 MCU target
660class LLVM_LIBRARY_VISIBILITY MCUX86_32TargetInfo : public X86_32TargetInfo {
661public:
662 MCUX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
663 : X86_32TargetInfo(Triple, Opts) {
664 LongDoubleWidth = 64;
665 DefaultAlignForAttributeAligned = 32;
666 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
667 resetDataLayout();
668 WIntType = UnsignedInt;
669 }
670
671 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
672 // On MCU we support only C calling convention.
673 return CC == CC_C ? CCCR_OK : CCCR_Warning;
674 }
675
676 void getTargetDefines(const LangOptions &Opts,
677 MacroBuilder &Builder) const override {
678 X86_32TargetInfo::getTargetDefines(Opts, Builder);
679 Builder.defineMacro(Name: "__iamcu");
680 Builder.defineMacro(Name: "__iamcu__");
681 }
682
683 bool allowsLargerPreferedTypeAlignment() const override { return false; }
684};
685
686// x86-32 RTEMS target
687class LLVM_LIBRARY_VISIBILITY RTEMSX86_32TargetInfo : public X86_32TargetInfo {
688public:
689 RTEMSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
690 : X86_32TargetInfo(Triple, Opts) {
691 SizeType = UnsignedLong;
692 IntPtrType = SignedLong;
693 PtrDiffType = SignedLong;
694 }
695
696 void getTargetDefines(const LangOptions &Opts,
697 MacroBuilder &Builder) const override {
698 X86_32TargetInfo::getTargetDefines(Opts, Builder);
699 Builder.defineMacro(Name: "__INTEL__");
700 Builder.defineMacro(Name: "__rtems__");
701 }
702};
703
704// x86-64 generic target
705class LLVM_LIBRARY_VISIBILITY X86_64TargetInfo : public X86TargetInfo {
706public:
707 X86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
708 : X86TargetInfo(Triple, Opts) {
709 const bool IsX32 = getTriple().isX32();
710 LongWidth = LongAlign = PointerWidth = PointerAlign = IsX32 ? 32 : 64;
711 LongDoubleWidth = 128;
712 LongDoubleAlign = 128;
713 LargeArrayMinWidth = 128;
714 LargeArrayAlign = 128;
715 SuitableAlign = 128;
716 SizeType = IsX32 ? UnsignedInt : UnsignedLong;
717 PtrDiffType = IsX32 ? SignedInt : SignedLong;
718 IntPtrType = IsX32 ? SignedInt : SignedLong;
719 IntMaxType = IsX32 ? SignedLongLong : SignedLong;
720 Int64Type = IsX32 ? SignedLongLong : SignedLong;
721 RegParmMax = 6;
722
723 resetDataLayout();
724
725 // Use fpret only for long double.
726 RealTypeUsesObjCFPRetMask = (unsigned)FloatModeKind::LongDouble;
727
728 // Use fp2ret for _Complex long double.
729 ComplexLongDoubleUsesFP2Ret = true;
730
731 // Make __builtin_ms_va_list available.
732 HasBuiltinMSVaList = true;
733
734 // x86-64 has atomics up to 16 bytes.
735 MaxAtomicPromoteWidth = 128;
736 MaxAtomicInlineWidth = 64;
737 }
738
739 BuiltinVaListKind getBuiltinVaListKind() const override {
740 return TargetInfo::X86_64ABIBuiltinVaList;
741 }
742
743 int getEHDataRegisterNumber(unsigned RegNo) const override {
744 if (RegNo == 0)
745 return 0;
746 if (RegNo == 1)
747 return 1;
748 return -1;
749 }
750
751 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
752 switch (CC) {
753 case CC_C:
754 case CC_Swift:
755 case CC_SwiftAsync:
756 case CC_X86VectorCall:
757 case CC_IntelOclBicc:
758 case CC_Win64:
759 case CC_PreserveMost:
760 case CC_PreserveAll:
761 case CC_PreserveNone:
762 case CC_X86RegCall:
763 return CCCR_OK;
764 case CC_DeviceKernel:
765 return IsOpenCL ? CCCR_OK : CCCR_Warning;
766 default:
767 return CCCR_Warning;
768 }
769 }
770
771 CallingConv getDefaultCallingConv() const override {
772 return CC_C;
773 }
774
775 // for x32 we need it here explicitly
776 bool hasInt128Type() const override { return true; }
777
778 unsigned getUnwindWordWidth() const override { return 64; }
779
780 unsigned getRegisterWidth() const override { return 64; }
781
782 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
783 bool &HasSizeMismatch) const override {
784 // rsp and rbp are the only 64-bit registers the x86 backend can currently
785 // handle.
786 if (RegName == "rsp" || RegName == "rbp") {
787 // Check that the register size is 64-bit.
788 HasSizeMismatch = RegSize != 64;
789 return true;
790 }
791
792 // -ffixed-r8 through -ffixed-r31 are lowered to reserve-r8 through
793 // reserve-r31 target features, so canonicalize subregister spellings
794 // like r15d/r15w/r15b back to the corresponding 64-bit register first.
795 StringRef Reg64 = RegName;
796 if (Reg64.back() == 'd' || Reg64.back() == 'w' || Reg64.back() == 'b') {
797 Reg64 = Reg64.substr(Start: 0, N: Reg64.size() - 1);
798 }
799 if (getTargetOpts().FeatureMap.lookup(Key: ("reserve-" + Reg64).str())) {
800 switch (RegName.back()) {
801 case 'd':
802 HasSizeMismatch = RegSize != 32;
803 break;
804 case 'w':
805 HasSizeMismatch = RegSize != 16;
806 break;
807 case 'b':
808 HasSizeMismatch = RegSize != 8;
809 break;
810 default:
811 HasSizeMismatch = RegSize != 64;
812 }
813 return true;
814 }
815
816 // Check if the register is a 32-bit register the backend can handle.
817 return X86TargetInfo::validateGlobalRegisterVariable(RegName, RegSize,
818 HasSizeMismatch);
819 }
820 void setMaxAtomicWidth() override {
821 if (hasFeature(Feature: "cx16"))
822 MaxAtomicInlineWidth = 128;
823 }
824
825 llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override;
826
827 bool hasBitIntType() const override { return true; }
828 size_t getMaxBitIntWidth() const override {
829 return llvm::IntegerType::MAX_INT_BITS;
830 }
831
832 void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
833 const TargetInfo *Aux) override {
834 TargetInfo::adjust(Diags, Opts, Aux);
835 IsOpenCL = Opts.OpenCL;
836 }
837
838private:
839 bool IsOpenCL = false;
840};
841
842// x86-64 UEFI target
843class LLVM_LIBRARY_VISIBILITY UEFIX86_64TargetInfo
844 : public UEFITargetInfo<X86_64TargetInfo> {
845public:
846 UEFIX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
847 : UEFITargetInfo<X86_64TargetInfo>(Triple, Opts) {
848 // The UEFI spec does not mandate specific C++ ABI, integer widths, or
849 // alignment. We are setting these defaults to match the Windows target as
850 // it is the only way to build EFI applications with Clang/LLVM today. We
851 // intend to offer flexibility by supporting choices that are not default in
852 // Windows target in the future.
853 this->TheCXXABI.set(TargetCXXABI::Microsoft);
854 LongWidth = LongAlign = 32;
855 DoubleAlign = LongLongAlign = 64;
856 LongDoubleWidth = LongDoubleAlign = 64;
857 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
858 IntMaxType = SignedLongLong;
859 Int64Type = SignedLongLong;
860 SizeType = UnsignedLongLong;
861 PtrDiffType = SignedLongLong;
862 IntPtrType = SignedLongLong;
863 WCharType = UnsignedShort;
864 WIntType = UnsignedShort;
865 this->resetDataLayout();
866 }
867
868 BuiltinVaListKind getBuiltinVaListKind() const override {
869 return TargetInfo::CharPtrBuiltinVaList;
870 }
871
872 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
873 switch (CC) {
874 case CC_C:
875 case CC_Win64:
876 case CC_X86_64SysV:
877 return CCCR_OK;
878 default:
879 return CCCR_Warning;
880 }
881 }
882
883 TargetInfo::CallingConvKind
884 getCallingConvKind(bool ClangABICompat4) const override {
885 return CCK_MicrosoftWin64;
886 }
887};
888
889// x86-64 Windows target
890class LLVM_LIBRARY_VISIBILITY WindowsX86_64TargetInfo
891 : public WindowsTargetInfo<X86_64TargetInfo> {
892public:
893 WindowsX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
894 : WindowsTargetInfo<X86_64TargetInfo>(Triple, Opts) {
895 LongWidth = LongAlign = 32;
896 DoubleAlign = LongLongAlign = 64;
897 IntMaxType = SignedLongLong;
898 Int64Type = SignedLongLong;
899 SizeType = UnsignedLongLong;
900 PtrDiffType = SignedLongLong;
901 IntPtrType = SignedLongLong;
902 }
903
904 BuiltinVaListKind getBuiltinVaListKind() const override {
905 return TargetInfo::CharPtrBuiltinVaList;
906 }
907
908 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
909 switch (CC) {
910 case CC_X86StdCall:
911 case CC_X86ThisCall:
912 case CC_X86FastCall:
913 return CCCR_Ignore;
914 case CC_C:
915 case CC_X86VectorCall:
916 case CC_IntelOclBicc:
917 case CC_PreserveMost:
918 case CC_PreserveAll:
919 case CC_PreserveNone:
920 case CC_X86_64SysV:
921 case CC_Swift:
922 case CC_SwiftAsync:
923 case CC_X86RegCall:
924 case CC_DeviceKernel:
925 return CCCR_OK;
926 default:
927 return CCCR_Warning;
928 }
929 }
930};
931
932// x86-64 Windows Visual Studio target
933class LLVM_LIBRARY_VISIBILITY MicrosoftX86_64TargetInfo
934 : public WindowsX86_64TargetInfo {
935public:
936 MicrosoftX86_64TargetInfo(const llvm::Triple &Triple,
937 const TargetOptions &Opts)
938 : WindowsX86_64TargetInfo(Triple, Opts) {
939 LongDoubleWidth = LongDoubleAlign = 64;
940 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
941 LargeArrayMinWidth = 0;
942 LargeArrayAlign = 0;
943 }
944
945 void getTargetDefines(const LangOptions &Opts,
946 MacroBuilder &Builder) const override {
947 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
948 Builder.defineMacro(Name: "_M_X64", Value: "100");
949 Builder.defineMacro(Name: "_M_AMD64", Value: "100");
950 }
951
952 TargetInfo::CallingConvKind
953 getCallingConvKind(bool ClangABICompat4) const override {
954 return CCK_MicrosoftWin64;
955 }
956
957 unsigned getMinGlobalAlign(uint64_t TypeSize,
958 bool HasNonWeakDef) const override;
959};
960
961// x86-64 MinGW target
962class LLVM_LIBRARY_VISIBILITY MinGWX86_64TargetInfo
963 : public WindowsX86_64TargetInfo {
964public:
965 MinGWX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
966 : WindowsX86_64TargetInfo(Triple, Opts) {
967 // Mingw64 rounds long double size and alignment up to 16 bytes, but sticks
968 // with x86 FP ops. Weird.
969 LongDoubleWidth = LongDoubleAlign = 128;
970 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
971 HasFloat128 = true;
972 }
973};
974
975// x86-64 Cygwin target
976class LLVM_LIBRARY_VISIBILITY CygwinX86_64TargetInfo : public X86_64TargetInfo {
977public:
978 CygwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
979 : X86_64TargetInfo(Triple, Opts) {
980 this->WCharType = TargetInfo::UnsignedShort;
981 this->WIntType = TargetInfo::UnsignedInt;
982 this->UseMicrosoftManglingForC = true;
983 }
984
985 void getTargetDefines(const LangOptions &Opts,
986 MacroBuilder &Builder) const override {
987 X86_64TargetInfo::getTargetDefines(Opts, Builder);
988 Builder.defineMacro(Name: "__x86_64__");
989 Builder.defineMacro(Name: "__CYGWIN__");
990 Builder.defineMacro(Name: "__CYGWIN64__");
991 addCygMingDefines(Opts, Builder);
992 DefineStd(Builder, MacroName: "unix", Opts);
993 if (Opts.CPlusPlus)
994 Builder.defineMacro(Name: "_GNU_SOURCE");
995 }
996
997 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
998 switch (CC) {
999 case CC_X86StdCall:
1000 case CC_X86ThisCall:
1001 case CC_X86FastCall:
1002 return CCCR_Ignore;
1003 case CC_C:
1004 case CC_X86VectorCall:
1005 case CC_IntelOclBicc:
1006 case CC_PreserveMost:
1007 case CC_PreserveAll:
1008 case CC_PreserveNone:
1009 case CC_X86_64SysV:
1010 case CC_Swift:
1011 case CC_SwiftAsync:
1012 case CC_X86RegCall:
1013 case CC_DeviceKernel:
1014 return CCCR_OK;
1015 default:
1016 return CCCR_Warning;
1017 }
1018 }
1019
1020 BuiltinVaListKind getBuiltinVaListKind() const override {
1021 return TargetInfo::CharPtrBuiltinVaList;
1022 }
1023};
1024
1025class LLVM_LIBRARY_VISIBILITY DarwinX86_64TargetInfo
1026 : public DarwinTargetInfo<X86_64TargetInfo> {
1027public:
1028 DarwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1029 : DarwinTargetInfo<X86_64TargetInfo>(Triple, Opts) {
1030 Int64Type = SignedLongLong;
1031 // The 64-bit iOS simulator uses the builtin bool type for Objective-C.
1032 llvm::Triple T = llvm::Triple(Triple);
1033 if (T.isiOS())
1034 UseSignedCharForObjCBool = false;
1035 resetDataLayout();
1036 }
1037
1038 bool handleTargetFeatures(std::vector<std::string> &Features,
1039 DiagnosticsEngine &Diags) override {
1040 if (!DarwinTargetInfo<X86_64TargetInfo>::handleTargetFeatures(Features,
1041 Diags))
1042 return false;
1043 // We now know the features we have: we can decide how to align vectors.
1044 MaxVectorAlign =
1045 hasFeature(Feature: "avx512f") ? 512 : hasFeature(Feature: "avx") ? 256 : 128;
1046 return true;
1047 }
1048};
1049
1050class LLVM_LIBRARY_VISIBILITY OpenBSDX86_64TargetInfo
1051 : public OpenBSDTargetInfo<X86_64TargetInfo> {
1052public:
1053 OpenBSDX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1054 : OpenBSDTargetInfo<X86_64TargetInfo>(Triple, Opts) {
1055 IntMaxType = SignedLongLong;
1056 Int64Type = SignedLongLong;
1057 }
1058};
1059
1060// x86_32 Android target
1061class LLVM_LIBRARY_VISIBILITY AndroidX86_32TargetInfo
1062 : public LinuxTargetInfo<X86_32TargetInfo> {
1063public:
1064 AndroidX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1065 : LinuxTargetInfo<X86_32TargetInfo>(Triple, Opts) {
1066 SuitableAlign = 32;
1067 LongDoubleWidth = 64;
1068 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
1069 }
1070};
1071
1072// x86_64 Android target
1073class LLVM_LIBRARY_VISIBILITY AndroidX86_64TargetInfo
1074 : public LinuxTargetInfo<X86_64TargetInfo> {
1075public:
1076 AndroidX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1077 : LinuxTargetInfo<X86_64TargetInfo>(Triple, Opts) {
1078 LongDoubleFormat = &llvm::APFloat::IEEEquad();
1079 }
1080};
1081
1082// x86_32 OHOS target
1083class LLVM_LIBRARY_VISIBILITY OHOSX86_32TargetInfo
1084 : public OHOSTargetInfo<X86_32TargetInfo> {
1085public:
1086 OHOSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1087 : OHOSTargetInfo<X86_32TargetInfo>(Triple, Opts) {
1088 SuitableAlign = 32;
1089 LongDoubleWidth = 64;
1090 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
1091 }
1092};
1093
1094// x86_64 OHOS target
1095class LLVM_LIBRARY_VISIBILITY OHOSX86_64TargetInfo
1096 : public OHOSTargetInfo<X86_64TargetInfo> {
1097public:
1098 OHOSX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
1099 : OHOSTargetInfo<X86_64TargetInfo>(Triple, Opts) {
1100 LongDoubleFormat = &llvm::APFloat::IEEEquad();
1101 }
1102};
1103} // namespace targets
1104} // namespace clang
1105#endif // LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
1106