1//===--- Sparc.cpp - Tools Implementations ----------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "Sparc.h"
10#include "clang/Driver/Driver.h"
11#include "clang/Options/Options.h"
12#include "llvm/ADT/StringSwitch.h"
13#include "llvm/Option/ArgList.h"
14#include "llvm/TargetParser/Host.h"
15
16using namespace clang::driver;
17using namespace clang::driver::tools;
18using namespace clang;
19using namespace llvm::opt;
20
21const char *sparc::getSparcAsmModeForCPU(StringRef Name,
22 const llvm::Triple &Triple) {
23 if (Triple.getArch() == llvm::Triple::sparcv9) {
24 const char *DefV9CPU;
25
26 if (Triple.isOSSolaris())
27 DefV9CPU = "-Av9b";
28 else if (Triple.isOSLinux() || Triple.isOSFreeBSD() || Triple.isOSOpenBSD())
29 DefV9CPU = "-Av9a";
30 else
31 DefV9CPU = "-Av9";
32
33 return llvm::StringSwitch<const char *>(Name)
34 .Case(S: "niagara", Value: "-Av9b")
35 .Case(S: "niagara2", Value: "-Av9b")
36 .Case(S: "niagara3", Value: "-Av9d")
37 .Case(S: "niagara4", Value: "-Av9d")
38 .Default(Value: DefV9CPU);
39 } else {
40 const char *DefV8CPU;
41
42 if (Triple.isOSSolaris())
43 DefV8CPU = "-Av8plus";
44 else
45 DefV8CPU = "-Av8";
46
47 return llvm::StringSwitch<const char *>(Name)
48 .Case(S: "v8", Value: "-Av8")
49 .Case(S: "supersparc", Value: "-Av8")
50 .Case(S: "sparclite", Value: "-Asparclite")
51 .Case(S: "f934", Value: "-Asparclite")
52 .Case(S: "hypersparc", Value: "-Av8")
53 .Case(S: "sparclite86x", Value: "-Asparclite")
54 .Case(S: "sparclet", Value: "-Asparclet")
55 .Case(S: "tsc701", Value: "-Asparclet")
56 .Case(S: "v9", Value: "-Av8plus")
57 .Case(S: "ultrasparc", Value: "-Av8plus")
58 .Case(S: "ultrasparc3", Value: "-Av8plus")
59 .Case(S: "niagara", Value: "-Av8plusb")
60 .Case(S: "niagara2", Value: "-Av8plusb")
61 .Case(S: "niagara3", Value: "-Av8plusd")
62 .Case(S: "niagara4", Value: "-Av8plusd")
63 .Case(S: "ma2100", Value: "-Aleon")
64 .Case(S: "ma2150", Value: "-Aleon")
65 .Case(S: "ma2155", Value: "-Aleon")
66 .Case(S: "ma2450", Value: "-Aleon")
67 .Case(S: "ma2455", Value: "-Aleon")
68 .Case(S: "ma2x5x", Value: "-Aleon")
69 .Case(S: "ma2080", Value: "-Aleon")
70 .Case(S: "ma2085", Value: "-Aleon")
71 .Case(S: "ma2480", Value: "-Aleon")
72 .Case(S: "ma2485", Value: "-Aleon")
73 .Case(S: "ma2x8x", Value: "-Aleon")
74 .Case(S: "leon2", Value: "-Av8")
75 .Case(S: "at697e", Value: "-Av8")
76 .Case(S: "at697f", Value: "-Av8")
77 .Case(S: "leon3", Value: "-Aleon")
78 .Case(S: "ut699", Value: "-Av8")
79 .Case(S: "gr712rc", Value: "-Aleon")
80 .Case(S: "leon4", Value: "-Aleon")
81 .Case(S: "gr740", Value: "-Aleon")
82 .Case(S: "leon5", Value: "-Aleon")
83 .Default(Value: DefV8CPU);
84 }
85}
86
87sparc::FloatABI sparc::getSparcFloatABI(const Driver &D,
88 const ArgList &Args) {
89 sparc::FloatABI ABI = sparc::FloatABI::Invalid;
90 if (Arg *A = Args.getLastArg(Ids: options::OPT_msoft_float, Ids: options::OPT_mno_fpu,
91 Ids: options::OPT_mhard_float, Ids: options::OPT_mfpu,
92 Ids: options::OPT_mfloat_abi_EQ)) {
93 if (A->getOption().matches(ID: options::OPT_msoft_float) ||
94 A->getOption().matches(ID: options::OPT_mno_fpu))
95 ABI = sparc::FloatABI::Soft;
96 else if (A->getOption().matches(ID: options::OPT_mhard_float) ||
97 A->getOption().matches(ID: options::OPT_mfpu))
98 ABI = sparc::FloatABI::Hard;
99 else {
100 ABI = llvm::StringSwitch<sparc::FloatABI>(A->getValue())
101 .Case(S: "soft", Value: sparc::FloatABI::Soft)
102 .Case(S: "hard", Value: sparc::FloatABI::Hard)
103 .Default(Value: sparc::FloatABI::Invalid);
104 if (ABI == sparc::FloatABI::Invalid &&
105 !StringRef(A->getValue()).empty()) {
106 D.Diag(DiagID: clang::diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
107 ABI = sparc::FloatABI::Hard;
108 }
109 }
110 }
111
112 // If unspecified, choose the default based on the platform.
113 // Only the hard-float ABI on Sparc is standardized, and it is the
114 // default. GCC also supports a nonstandard soft-float ABI mode, also
115 // implemented in LLVM. However as this is not standard we set the default
116 // to be hard-float.
117 if (ABI == sparc::FloatABI::Invalid) {
118 ABI = sparc::FloatABI::Hard;
119 }
120
121 return ABI;
122}
123
124std::string sparc::getSparcTargetCPU(const Driver &D, const ArgList &Args,
125 const llvm::Triple &Triple) {
126 if (const Arg *A = Args.getLastArg(Ids: options::OPT_mcpu_EQ)) {
127 StringRef CPUName = A->getValue();
128 if (CPUName == "native") {
129 std::string CPU = std::string(llvm::sys::getHostCPUName());
130 if (!CPU.empty() && CPU != "generic")
131 return CPU;
132 return "";
133 }
134 return std::string(CPUName);
135 }
136
137 if (Triple.getArch() == llvm::Triple::sparc &&
138 (Triple.isOSSolaris() || Triple.isOSLinux()))
139 return "v9";
140 return "";
141}
142
143void sparc::getSparcTargetFeatures(const Driver &D, const llvm::Triple &Triple,
144 const ArgList &Args,
145 std::vector<StringRef> &Features) {
146 sparc::FloatABI FloatABI = sparc::getSparcFloatABI(D, Args);
147 if (FloatABI == sparc::FloatABI::Soft)
148 Features.push_back(x: "+soft-float");
149
150 if (Arg *A = Args.getLastArg(Ids: options::OPT_mfsmuld, Ids: options::OPT_mno_fsmuld)) {
151 if (A->getOption().matches(ID: options::OPT_mfsmuld))
152 Features.push_back(x: "+fsmuld");
153 else
154 Features.push_back(x: "-fsmuld");
155 }
156
157 if (Arg *A = Args.getLastArg(Ids: options::OPT_mpopc, Ids: options::OPT_mno_popc)) {
158 if (A->getOption().matches(ID: options::OPT_mpopc))
159 Features.push_back(x: "+popc");
160 else
161 Features.push_back(x: "-popc");
162 }
163
164 // Those OSes default to enabling VIS on 64-bit SPARC.
165 // See also the corresponding code for external assemblers in
166 // sparc::getSparcAsmModeForCPU().
167 bool IsSparcV9ATarget =
168 (Triple.getArch() == llvm::Triple::sparcv9) &&
169 (Triple.isOSLinux() || Triple.isOSFreeBSD() || Triple.isOSOpenBSD());
170 bool IsSparcV9BTarget = Triple.isOSSolaris();
171 bool IsSparcV8PlusTarget =
172 Triple.getArch() == llvm::Triple::sparc && Triple.isOSSolaris();
173 if (Arg *A = Args.getLastArg(Ids: options::OPT_mvis, Ids: options::OPT_mno_vis)) {
174 if (A->getOption().matches(ID: options::OPT_mvis))
175 Features.push_back(x: "+vis");
176 else
177 Features.push_back(x: "-vis");
178 } else if (IsSparcV9ATarget) {
179 Features.push_back(x: "+vis");
180 }
181
182 if (Arg *A = Args.getLastArg(Ids: options::OPT_mvis2, Ids: options::OPT_mno_vis2)) {
183 if (A->getOption().matches(ID: options::OPT_mvis2))
184 Features.push_back(x: "+vis2");
185 else
186 Features.push_back(x: "-vis2");
187 } else if (IsSparcV9BTarget) {
188 Features.push_back(x: "+vis2");
189 }
190
191 if (Arg *A = Args.getLastArg(Ids: options::OPT_mvis3, Ids: options::OPT_mno_vis3)) {
192 if (A->getOption().matches(ID: options::OPT_mvis3))
193 Features.push_back(x: "+vis3");
194 else
195 Features.push_back(x: "-vis3");
196 }
197
198 if (Arg *A = Args.getLastArg(Ids: options::OPT_mhard_quad_float,
199 Ids: options::OPT_msoft_quad_float)) {
200 if (A->getOption().matches(ID: options::OPT_mhard_quad_float))
201 Features.push_back(x: "+hard-quad-float");
202 else
203 Features.push_back(x: "-hard-quad-float");
204 }
205
206 if (Arg *A = Args.getLastArg(Ids: options::OPT_mv8plus, Ids: options::OPT_mno_v8plus)) {
207 if (A->getOption().matches(ID: options::OPT_mv8plus))
208 Features.push_back(x: "+v8plus");
209 } else if (IsSparcV8PlusTarget) {
210 Features.push_back(x: "+v8plus");
211 }
212
213 if (Args.hasArg(Ids: options::OPT_ffixed_g1))
214 Features.push_back(x: "+reserve-g1");
215
216 if (Args.hasArg(Ids: options::OPT_ffixed_g2))
217 Features.push_back(x: "+reserve-g2");
218
219 if (Args.hasArg(Ids: options::OPT_ffixed_g3))
220 Features.push_back(x: "+reserve-g3");
221
222 if (Args.hasArg(Ids: options::OPT_ffixed_g4))
223 Features.push_back(x: "+reserve-g4");
224
225 if (Args.hasArg(Ids: options::OPT_ffixed_g5))
226 Features.push_back(x: "+reserve-g5");
227
228 if (Args.hasArg(Ids: options::OPT_ffixed_g6))
229 Features.push_back(x: "+reserve-g6");
230
231 if (Args.hasArg(Ids: options::OPT_ffixed_g7))
232 Features.push_back(x: "+reserve-g7");
233
234 if (Args.hasArg(Ids: options::OPT_ffixed_o0))
235 Features.push_back(x: "+reserve-o0");
236
237 if (Args.hasArg(Ids: options::OPT_ffixed_o1))
238 Features.push_back(x: "+reserve-o1");
239
240 if (Args.hasArg(Ids: options::OPT_ffixed_o2))
241 Features.push_back(x: "+reserve-o2");
242
243 if (Args.hasArg(Ids: options::OPT_ffixed_o3))
244 Features.push_back(x: "+reserve-o3");
245
246 if (Args.hasArg(Ids: options::OPT_ffixed_o4))
247 Features.push_back(x: "+reserve-o4");
248
249 if (Args.hasArg(Ids: options::OPT_ffixed_o5))
250 Features.push_back(x: "+reserve-o5");
251
252 if (Args.hasArg(Ids: options::OPT_ffixed_l0))
253 Features.push_back(x: "+reserve-l0");
254
255 if (Args.hasArg(Ids: options::OPT_ffixed_l1))
256 Features.push_back(x: "+reserve-l1");
257
258 if (Args.hasArg(Ids: options::OPT_ffixed_l2))
259 Features.push_back(x: "+reserve-l2");
260
261 if (Args.hasArg(Ids: options::OPT_ffixed_l3))
262 Features.push_back(x: "+reserve-l3");
263
264 if (Args.hasArg(Ids: options::OPT_ffixed_l4))
265 Features.push_back(x: "+reserve-l4");
266
267 if (Args.hasArg(Ids: options::OPT_ffixed_l5))
268 Features.push_back(x: "+reserve-l5");
269
270 if (Args.hasArg(Ids: options::OPT_ffixed_l6))
271 Features.push_back(x: "+reserve-l6");
272
273 if (Args.hasArg(Ids: options::OPT_ffixed_l7))
274 Features.push_back(x: "+reserve-l7");
275
276 if (Args.hasArg(Ids: options::OPT_ffixed_i0))
277 Features.push_back(x: "+reserve-i0");
278
279 if (Args.hasArg(Ids: options::OPT_ffixed_i1))
280 Features.push_back(x: "+reserve-i1");
281
282 if (Args.hasArg(Ids: options::OPT_ffixed_i2))
283 Features.push_back(x: "+reserve-i2");
284
285 if (Args.hasArg(Ids: options::OPT_ffixed_i3))
286 Features.push_back(x: "+reserve-i3");
287
288 if (Args.hasArg(Ids: options::OPT_ffixed_i4))
289 Features.push_back(x: "+reserve-i4");
290
291 if (Args.hasArg(Ids: options::OPT_ffixed_i5))
292 Features.push_back(x: "+reserve-i5");
293
294 if (Args.hasArg(Ids: options::OPT_mfix_gr712rc)) {
295 Features.push_back(x: "+fix-tn0009");
296 Features.push_back(x: "+fix-tn0011");
297 Features.push_back(x: "+fix-tn0012");
298 Features.push_back(x: "+fix-tn0013");
299 }
300
301 if (Args.hasArg(Ids: options::OPT_mfix_ut700)) {
302 Features.push_back(x: "+fix-tn0009");
303 Features.push_back(x: "+fix-tn0010");
304 Features.push_back(x: "+fix-tn0013");
305 }
306}
307