1//===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "llvm/Analysis/TargetTransformInfo.h"
10#include "llvm/ADT/SmallVector.h"
11#include "llvm/Analysis/CFG.h"
12#include "llvm/Analysis/LoopIterator.h"
13#include "llvm/Analysis/TargetLibraryInfo.h"
14#include "llvm/Analysis/TargetTransformInfoImpl.h"
15#include "llvm/IR/CFG.h"
16#include "llvm/IR/Dominators.h"
17#include "llvm/IR/Instruction.h"
18#include "llvm/IR/Instructions.h"
19#include "llvm/IR/IntrinsicInst.h"
20#include "llvm/IR/Module.h"
21#include "llvm/IR/Operator.h"
22#include "llvm/InitializePasses.h"
23#include "llvm/Support/CommandLine.h"
24#include <optional>
25#include <utility>
26
27using namespace llvm;
28using namespace PatternMatch;
29
30#define DEBUG_TYPE "tti"
31
32static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(Val: false),
33 cl::Hidden,
34 cl::desc("Recognize reduction patterns."));
35
36static cl::opt<unsigned> CacheLineSize(
37 "cache-line-size", cl::init(Val: 0), cl::Hidden,
38 cl::desc("Use this to override the target cache line size when "
39 "specified by the user."));
40
41static cl::opt<unsigned> MinPageSize(
42 "min-page-size", cl::init(Val: 0), cl::Hidden,
43 cl::desc("Use this to override the target's minimum page size."));
44
45static cl::opt<unsigned> PredictableBranchThreshold(
46 "predictable-branch-threshold", cl::init(Val: 99), cl::Hidden,
47 cl::desc(
48 "Use this to override the target's predictable branch threshold (%)."));
49
50namespace {
51/// No-op implementation of the TTI interface using the utility base
52/// classes.
53///
54/// This is used when no target specific information is available.
55struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
56 explicit NoTTIImpl(const DataLayout &DL)
57 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
58};
59} // namespace
60
61TargetTransformInfo::TargetTransformInfo(
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
63 : TTIImpl(std::move(Impl)) {}
64
65bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
66 // If the loop has irreducible control flow, it can not be converted to
67 // Hardware loop.
68 LoopBlocksRPO RPOT(L);
69 RPOT.perform(LI: &LI);
70 if (containsIrreducibleCFG<const BasicBlock *>(RPOTraversal&: RPOT, LI))
71 return false;
72 return true;
73}
74
75IntrinsicCostAttributes::IntrinsicCostAttributes(
76 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
77 bool TypeBasedOnly)
78 : II(dyn_cast<IntrinsicInst>(Val: &CI)), RetTy(CI.getType()), IID(Id),
79 ScalarizationCost(ScalarizationCost) {
80
81 if (const auto *FPMO = dyn_cast<FPMathOperator>(Val: &CI))
82 FMF = FPMO->getFastMathFlags();
83
84 if (!TypeBasedOnly)
85 Arguments.insert(I: Arguments.begin(), From: CI.arg_begin(), To: CI.arg_end());
86 for (const Value *Arg : CI.args())
87 ParamTys.push_back(Elt: Arg->getType());
88}
89
90IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
91 ArrayRef<Type *> Tys,
92 FastMathFlags Flags,
93 const IntrinsicInst *I,
94 InstructionCost ScalarCost)
95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
97}
98
99IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty,
100 ArrayRef<const Value *> Args)
101 : RetTy(Ty), IID(Id) {
102
103 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
104 ParamTys.reserve(N: Arguments.size());
105 for (const Value *Argument : Arguments)
106 ParamTys.push_back(Elt: Argument->getType());
107}
108
109IntrinsicCostAttributes::IntrinsicCostAttributes(
110 Intrinsic::ID Id, Type *RTy, ArrayRef<const Value *> Args,
111 ArrayRef<Type *> Tys, FastMathFlags Flags, const IntrinsicInst *I,
112 InstructionCost ScalarCost, VectorInstrContext VIC)
113 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
114 VIC(VIC) {
115 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
116 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
117}
118
119HardwareLoopInfo::HardwareLoopInfo(Loop *L) : L(L) {
120 // Match default options:
121 // - hardware-loop-counter-bitwidth = 32
122 // - hardware-loop-decrement = 1
123 CountType = Type::getInt32Ty(C&: L->getHeader()->getContext());
124 LoopDecrement = ConstantInt::get(Ty: CountType, V: 1);
125}
126
127bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
128 LoopInfo &LI, DominatorTree &DT,
129 bool ForceNestedLoop,
130 bool ForceHardwareLoopPHI) {
131 SmallVector<BasicBlock *, 4> ExitingBlocks;
132 L->getExitingBlocks(ExitingBlocks);
133
134 for (BasicBlock *BB : ExitingBlocks) {
135 // If we pass the updated counter back through a phi, we need to know
136 // which latch the updated value will be coming from.
137 if (!L->isLoopLatch(BB)) {
138 if (ForceHardwareLoopPHI || CounterInReg)
139 continue;
140 }
141
142 const SCEV *EC = SE.getExitCount(L, ExitingBlock: BB);
143 if (isa<SCEVCouldNotCompute>(Val: EC))
144 continue;
145 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(Val: EC)) {
146 if (ConstEC->getValue()->isZero())
147 continue;
148 } else if (!SE.isLoopInvariant(S: EC, L))
149 continue;
150
151 if (SE.getTypeSizeInBits(Ty: EC->getType()) > CountType->getBitWidth())
152 continue;
153
154 // If this exiting block is contained in a nested loop, it is not eligible
155 // for insertion of the branch-and-decrement since the inner loop would
156 // end up messing up the value in the CTR.
157 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
158 continue;
159
160 // We now have a loop-invariant count of loop iterations (which is not the
161 // constant zero) for which we know that this loop will not exit via this
162 // existing block.
163
164 // We need to make sure that this block will run on every loop iteration.
165 // For this to be true, we must dominate all blocks with backedges. Such
166 // blocks are in-loop predecessors to the header block.
167 bool NotAlways = false;
168 for (BasicBlock *Pred : predecessors(BB: L->getHeader())) {
169 if (!L->contains(BB: Pred))
170 continue;
171
172 if (!DT.dominates(A: BB, B: Pred)) {
173 NotAlways = true;
174 break;
175 }
176 }
177
178 if (NotAlways)
179 continue;
180
181 // Make sure this blocks ends with a conditional branch.
182 Instruction *TI = BB->getTerminator();
183 if (!TI)
184 continue;
185
186 if (CondBrInst *BI = dyn_cast<CondBrInst>(Val: TI))
187 ExitBranch = BI;
188 else
189 continue;
190
191 // Note that this block may not be the loop latch block, even if the loop
192 // has a latch block.
193 ExitBlock = BB;
194 ExitCount = EC;
195 break;
196 }
197
198 if (!ExitBlock)
199 return false;
200 return true;
201}
202
203TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
204 : TTIImpl(std::make_unique<NoTTIImpl>(args: DL)) {}
205
206TargetTransformInfo::~TargetTransformInfo() = default;
207
208TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
209 : TTIImpl(std::move(Arg.TTIImpl)) {}
210
211TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
212 TTIImpl = std::move(RHS.TTIImpl);
213 return *this;
214}
215
216unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
217 return TTIImpl->getInliningThresholdMultiplier();
218}
219
220unsigned
221TargetTransformInfo::getInliningCostBenefitAnalysisSavingsMultiplier() const {
222 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
223}
224
225unsigned
226TargetTransformInfo::getInliningCostBenefitAnalysisProfitableMultiplier()
227 const {
228 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
229}
230
231int TargetTransformInfo::getInliningLastCallToStaticBonus() const {
232 return TTIImpl->getInliningLastCallToStaticBonus();
233}
234
235unsigned
236TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const {
237 return TTIImpl->adjustInliningThreshold(CB);
238}
239
240unsigned TargetTransformInfo::getCallerAllocaCost(const CallBase *CB,
241 const AllocaInst *AI) const {
242 return TTIImpl->getCallerAllocaCost(CB, AI);
243}
244
245int TargetTransformInfo::getInlinerVectorBonusPercent() const {
246 return TTIImpl->getInlinerVectorBonusPercent();
247}
248
249InstructionCost TargetTransformInfo::getGEPCost(
250 Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
251 TTI::TargetCostKind CostKind, Type *AccessType) const {
252 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind, AccessType);
253}
254
255InstructionCost TargetTransformInfo::getPointersChainCost(
256 ArrayRef<const Value *> Ptrs, const Value *Base,
257 const TTI::PointersChainInfo &Info, Type *AccessTy,
258 TTI::TargetCostKind CostKind) const {
259 assert((Base || !Info.isSameBase()) &&
260 "If pointers have same base address it has to be provided.");
261 return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
262}
263
264unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(
265 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
266 BlockFrequencyInfo *BFI) const {
267 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
268}
269
270InstructionCost
271TargetTransformInfo::getInstructionCost(const User *U,
272 ArrayRef<const Value *> Operands,
273 enum TargetCostKind CostKind) const {
274 InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
275 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) &&
276 "TTI should not produce negative costs!");
277 return Cost;
278}
279
280BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const {
281 return PredictableBranchThreshold.getNumOccurrences() > 0
282 ? BranchProbability(PredictableBranchThreshold, 100)
283 : TTIImpl->getPredictableBranchThreshold();
284}
285
286InstructionCost TargetTransformInfo::getBranchMispredictPenalty() const {
287 return TTIImpl->getBranchMispredictPenalty();
288}
289
290bool TargetTransformInfo::hasBranchDivergence(const Function *F) const {
291 return TTIImpl->hasBranchDivergence(F);
292}
293
294ValueUniformity
295llvm::TargetTransformInfo::getValueUniformity(const Value *V) const {
296 ValueUniformity VU = TTIImpl->getValueUniformity(V);
297 if (const auto *Call = dyn_cast<CallBase>(Val: V)) {
298 if (VU == ValueUniformity::NeverUniform &&
299 Call->hasFnAttr(Kind: Attribute::NoDivergenceSource))
300 return ValueUniformity::Default;
301 }
302 return VU;
303}
304
305bool llvm::TargetTransformInfo::isValidAddrSpaceCast(unsigned FromAS,
306 unsigned ToAS) const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
308}
309
310bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned FromAS,
311 unsigned ToAS) const {
312 return TTIImpl->addrspacesMayAlias(AS0: FromAS, AS1: ToAS);
313}
314
315unsigned TargetTransformInfo::getFlatAddressSpace() const {
316 return TTIImpl->getFlatAddressSpace();
317}
318
319bool TargetTransformInfo::collectFlatAddressOperands(
320 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
321 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
322}
323
324bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
325 unsigned ToAS) const {
326 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
327}
328
329std::pair<KnownBits, KnownBits>
330TargetTransformInfo::computeKnownBitsAddrSpaceCast(unsigned ToAS,
331 const Value &PtrOp) const {
332 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
333}
334
335KnownBits TargetTransformInfo::computeKnownBitsAddrSpaceCast(
336 unsigned FromAS, unsigned ToAS, const KnownBits &FromPtrBits) const {
337 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
338}
339
340APInt TargetTransformInfo::getAddrSpaceCastPreservedPtrMask(
341 unsigned SrcAS, unsigned DstAS) const {
342 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
343}
344
345bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace(
346 unsigned AS) const {
347 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
348}
349
350unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const {
351 return TTIImpl->getAssumedAddrSpace(V);
352}
353
354std::pair<const Value *, unsigned>
355TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const {
356 return TTIImpl->getPredicatedAddrSpace(V);
357}
358
359Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace(
360 IntrinsicInst *II, Value *OldV, Value *NewV) const {
361 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
362}
363
364bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
365 return TTIImpl->isLoweredToCall(F);
366}
367
368bool TargetTransformInfo::isHardwareLoopProfitable(
369 Loop *L, ScalarEvolution &SE, AssumptionCache &AC,
370 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
371 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
372}
373
374unsigned TargetTransformInfo::getEpilogueVectorizationMinVF() const {
375 return TTIImpl->getEpilogueVectorizationMinVF();
376}
377
378bool TargetTransformInfo::preferTailFoldingOverEpilogue(
379 TailFoldingInfo *TFI) const {
380 return TTIImpl->preferTailFoldingOverEpilogue(TFI);
381}
382
383TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle() const {
384 return TTIImpl->getPreferredTailFoldingStyle();
385}
386
387std::optional<Instruction *>
388TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC,
389 IntrinsicInst &II) const {
390 return TTIImpl->instCombineIntrinsic(IC, II);
391}
392
393std::optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(
394 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
395 bool &KnownBitsComputed) const {
396 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
397 KnownBitsComputed);
398}
399
400std::optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(
401 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
402 APInt &UndefElts2, APInt &UndefElts3,
403 std::function<void(Instruction *, unsigned, APInt, APInt &)>
404 SimplifyAndSetOp) const {
405 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
406 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
407 SimplifyAndSetOp);
408}
409
410void TargetTransformInfo::getUnrollingPreferences(
411 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP,
412 OptimizationRemarkEmitter *ORE) const {
413 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
414}
415
416void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
417 PeelingPreferences &PP) const {
418 return TTIImpl->getPeelingPreferences(L, SE, PP);
419}
420
421bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
422 return TTIImpl->isLegalAddImmediate(Imm);
423}
424
425bool TargetTransformInfo::isLegalAddScalableImmediate(int64_t Imm) const {
426 return TTIImpl->isLegalAddScalableImmediate(Imm);
427}
428
429bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
430 return TTIImpl->isLegalICmpImmediate(Imm);
431}
432
433bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
434 int64_t BaseOffset,
435 bool HasBaseReg, int64_t Scale,
436 unsigned AddrSpace,
437 Instruction *I,
438 int64_t ScalableOffset) const {
439 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
440 Scale, AddrSpace, I, ScalableOffset);
441}
442
443bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1,
444 const LSRCost &C2) const {
445 return TTIImpl->isLSRCostLess(C1, C2);
446}
447
448bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const {
449 return TTIImpl->isNumRegsMajorCostOfLSR();
450}
451
452bool TargetTransformInfo::shouldDropLSRSolutionIfLessProfitable() const {
453 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
454}
455
456bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const {
457 return TTIImpl->isProfitableLSRChainElement(I);
458}
459
460bool TargetTransformInfo::canMacroFuseCmp() const {
461 return TTIImpl->canMacroFuseCmp();
462}
463
464bool TargetTransformInfo::canSaveCmp(Loop *L, CondBrInst **BI,
465 ScalarEvolution *SE, LoopInfo *LI,
466 DominatorTree *DT, AssumptionCache *AC,
467 TargetLibraryInfo *LibInfo) const {
468 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
469}
470
471TTI::AddressingModeKind
472TargetTransformInfo::getPreferredAddressingMode(const Loop *L,
473 ScalarEvolution *SE) const {
474 return TTIImpl->getPreferredAddressingMode(L, SE);
475}
476
477bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, Align Alignment,
478 unsigned AddressSpace,
479 TTI::MaskKind MaskKind) const {
480 return TTIImpl->isLegalMaskedStore(DataType, Alignment, AddressSpace,
481 MaskKind);
482}
483
484bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, Align Alignment,
485 unsigned AddressSpace,
486 TTI::MaskKind MaskKind) const {
487 return TTIImpl->isLegalMaskedLoad(DataType, Alignment, AddressSpace,
488 MaskKind);
489}
490
491bool TargetTransformInfo::isLegalNTStore(Type *DataType,
492 Align Alignment) const {
493 return TTIImpl->isLegalNTStore(DataType, Alignment);
494}
495
496bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
497 return TTIImpl->isLegalNTLoad(DataType, Alignment);
498}
499
500bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy,
501 ElementCount NumElements) const {
502 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
503}
504
505bool TargetTransformInfo::isLegalMaskedGather(Type *DataType,
506 Align Alignment) const {
507 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
508}
509
510bool TargetTransformInfo::isLegalAltInstr(
511 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
512 const SmallBitVector &OpcodeMask) const {
513 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
514}
515
516bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType,
517 Align Alignment) const {
518 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
519}
520
521bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType,
522 Align Alignment) const {
523 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
524}
525
526bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType,
527 Align Alignment) const {
528 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
529}
530
531bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType,
532 Align Alignment) const {
533 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
534}
535
536bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType,
537 Align Alignment) const {
538 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
539}
540
541bool TargetTransformInfo::isLegalStridedLoadStore(Type *DataType,
542 Align Alignment) const {
543 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
544}
545
546bool TargetTransformInfo::isLegalInterleavedAccessType(
547 VectorType *VTy, unsigned Factor, Align Alignment,
548 unsigned AddrSpace) const {
549 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
550 AddrSpace);
551}
552
553bool TargetTransformInfo::isLegalMaskedVectorHistogram(Type *AddrType,
554 Type *DataType) const {
555 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
556}
557
558bool TargetTransformInfo::enableOrderedReductions() const {
559 return TTIImpl->enableOrderedReductions();
560}
561
562bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
563 return TTIImpl->hasDivRemOp(DataType, IsSigned);
564}
565
566bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
567 unsigned AddrSpace) const {
568 return TTIImpl->hasVolatileVariant(I, AddrSpace);
569}
570
571bool TargetTransformInfo::prefersVectorizedAddressing() const {
572 return TTIImpl->prefersVectorizedAddressing();
573}
574
575InstructionCost TargetTransformInfo::getScalingFactorCost(
576 Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg,
577 int64_t Scale, unsigned AddrSpace) const {
578 InstructionCost Cost = TTIImpl->getScalingFactorCost(
579 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
580 assert(Cost >= 0 && "TTI should not produce negative costs!");
581 return Cost;
582}
583
584bool TargetTransformInfo::LSRWithInstrQueries() const {
585 return TTIImpl->LSRWithInstrQueries();
586}
587
588bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
589 return TTIImpl->isTruncateFree(Ty1, Ty2);
590}
591
592bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
593 return TTIImpl->isProfitableToHoist(I);
594}
595
596bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
597
598bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
599 return TTIImpl->isTypeLegal(Ty);
600}
601
602unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const {
603 return TTIImpl->getRegUsageForType(Ty);
604}
605
606bool TargetTransformInfo::shouldBuildLookupTables() const {
607 return TTIImpl->shouldBuildLookupTables();
608}
609
610bool TargetTransformInfo::shouldBuildLookupTablesForConstant(
611 Constant *C) const {
612 return TTIImpl->shouldBuildLookupTablesForConstant(C);
613}
614
615unsigned TargetTransformInfo::getMinimumLookupTableEntryBitWidth() const {
616 return TTIImpl->getMinimumLookupTableEntryBitWidth();
617}
618
619bool TargetTransformInfo::shouldBuildRelLookupTables() const {
620 return TTIImpl->shouldBuildRelLookupTables();
621}
622
623bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
624 return TTIImpl->useColdCCForColdCall(F);
625}
626
627bool TargetTransformInfo::useFastCCForInternalCall(Function &F) const {
628 return TTIImpl->useFastCCForInternalCall(F);
629}
630
631bool TargetTransformInfo::isTargetIntrinsicWithScalarOpAtArg(
632 Intrinsic::ID ID, unsigned ScalarOpdIdx) const {
633 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
634}
635
636bool TargetTransformInfo::isTargetIntrinsicWithOverloadTypeAtArg(
637 Intrinsic::ID ID, int OpdIdx) const {
638 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
639}
640
641bool TargetTransformInfo::isTargetIntrinsicWithStructReturnOverloadAtField(
642 Intrinsic::ID ID, int RetIdx) const {
643 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
644}
645
646TargetTransformInfo::VectorInstrContext
647TargetTransformInfo::getVectorInstrContextHint(const Instruction *I) {
648 if (!I)
649 return VectorInstrContext::None;
650
651 // For inserts, check if the value being inserted comes from a single-use
652 // load.
653 if (isa<InsertElementInst>(Val: I) && isa<LoadInst>(Val: I->getOperand(i: 1)) &&
654 I->getOperand(i: 1)->hasOneUse())
655 return VectorInstrContext::Load;
656
657 // For extracts, check if it has a single use that is a store.
658 if (isa<ExtractElementInst>(Val: I) && I->hasOneUse() &&
659 isa<StoreInst>(Val: *I->user_begin()))
660 return VectorInstrContext::Store;
661
662 return VectorInstrContext::None;
663}
664
665InstructionCost TargetTransformInfo::getScalarizationOverhead(
666 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
667 TTI::TargetCostKind CostKind, bool ForPoisonSrc, ArrayRef<Value *> VL,
668 TTI::VectorInstrContext VIC) const {
669 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
670 CostKind, ForPoisonSrc, VL, VIC);
671}
672
673InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(
674 ArrayRef<Type *> Tys, TTI::TargetCostKind CostKind,
675 TTI::VectorInstrContext VIC) const {
676 return TTIImpl->getOperandsScalarizationOverhead(Tys, CostKind, VIC);
677}
678
679bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
680 return TTIImpl->supportsEfficientVectorElementLoadStore();
681}
682
683bool TargetTransformInfo::supportsTailCalls() const {
684 return TTIImpl->supportsTailCalls();
685}
686
687bool TargetTransformInfo::supportsTailCallFor(const CallBase *CB) const {
688 return TTIImpl->supportsTailCallFor(CB);
689}
690
691bool TargetTransformInfo::enableAggressiveInterleaving(
692 bool LoopHasReductions) const {
693 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
694}
695
696TargetTransformInfo::MemCmpExpansionOptions
697TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
698 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
699}
700
701bool TargetTransformInfo::enableSelectOptimize() const {
702 return TTIImpl->enableSelectOptimize();
703}
704
705bool TargetTransformInfo::shouldTreatInstructionLikeSelect(
706 const Instruction *I) const {
707 return TTIImpl->shouldTreatInstructionLikeSelect(I);
708}
709
710bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
711 return TTIImpl->enableInterleavedAccessVectorization();
712}
713
714bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
715 return TTIImpl->enableMaskedInterleavedAccessVectorization();
716}
717
718bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
719 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
720}
721
722bool
723TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
724 unsigned BitWidth,
725 unsigned AddressSpace,
726 Align Alignment,
727 unsigned *Fast) const {
728 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
729 AddressSpace, Alignment, Fast);
730}
731
732TargetTransformInfo::PopcntSupportKind
733TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
734 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
735}
736
737bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
738 return TTIImpl->haveFastSqrt(Ty);
739}
740
741bool TargetTransformInfo::haveFastClmul(IntegerType *Ty) const {
742 return TTIImpl->haveFastClmul(Ty);
743}
744
745bool TargetTransformInfo::isExpensiveToSpeculativelyExecute(
746 const Instruction *I) const {
747 return TTIImpl->isExpensiveToSpeculativelyExecute(I);
748}
749
750bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
751 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
752}
753
754InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const {
755 InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
756 assert(Cost >= 0 && "TTI should not produce negative costs!");
757 return Cost;
758}
759
760InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode,
761 unsigned Idx,
762 const APInt &Imm,
763 Type *Ty) const {
764 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
765 assert(Cost >= 0 && "TTI should not produce negative costs!");
766 return Cost;
767}
768
769InstructionCost
770TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty,
771 TTI::TargetCostKind CostKind) const {
772 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
773 assert(Cost >= 0 && "TTI should not produce negative costs!");
774 return Cost;
775}
776
777InstructionCost TargetTransformInfo::getIntImmCostInst(
778 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
779 TTI::TargetCostKind CostKind, Instruction *Inst) const {
780 InstructionCost Cost =
781 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
782 assert(Cost >= 0 && "TTI should not produce negative costs!");
783 return Cost;
784}
785
786InstructionCost
787TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
788 const APInt &Imm, Type *Ty,
789 TTI::TargetCostKind CostKind) const {
790 InstructionCost Cost =
791 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
792 assert(Cost >= 0 && "TTI should not produce negative costs!");
793 return Cost;
794}
795
796bool TargetTransformInfo::preferToKeepConstantsAttached(
797 const Instruction &Inst, const Function &Fn) const {
798 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
799}
800
801unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
802 return TTIImpl->getNumberOfRegisters(ClassID);
803}
804
805bool TargetTransformInfo::hasConditionalLoadStoreForType(Type *Ty,
806 bool IsStore) const {
807 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
808}
809
810unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
811 Type *Ty) const {
812 return TTIImpl->getRegisterClassForType(Vector, Ty);
813}
814
815const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
816 return TTIImpl->getRegisterClassName(ClassID);
817}
818
819InstructionCost TargetTransformInfo::getRegisterClassSpillCost(
820 unsigned ClassID, TTI::TargetCostKind CostKind) const {
821 return TTIImpl->getRegisterClassSpillCost(ClassID, CostKind);
822}
823
824InstructionCost TargetTransformInfo::getRegisterClassReloadCost(
825 unsigned ClassID, TTI::TargetCostKind CostKind) const {
826 return TTIImpl->getRegisterClassReloadCost(ClassID, CostKind);
827}
828
829TypeSize TargetTransformInfo::getRegisterBitWidth(
830 TargetTransformInfo::RegisterKind K) const {
831 return TTIImpl->getRegisterBitWidth(K);
832}
833
834unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
835 return TTIImpl->getMinVectorRegisterBitWidth();
836}
837
838std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
839 return TTIImpl->getVScaleForTuning();
840}
841
842bool TargetTransformInfo::shouldMaximizeVectorBandwidth(
843 TargetTransformInfo::RegisterKind K) const {
844 return TTIImpl->shouldMaximizeVectorBandwidth(K);
845}
846
847ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
848 bool IsScalable) const {
849 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
850}
851
852unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
853 unsigned Opcode) const {
854 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
855}
856
857unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
858 Type *ScalarValTy,
859 Align Alignment,
860 unsigned AddrSpace) const {
861 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy, Alignment,
862 AddrSpace);
863}
864
865bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
866 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
867 return TTIImpl->shouldConsiderAddressTypePromotion(
868 I, AllowPromotionWithoutCommonHeader);
869}
870
871unsigned TargetTransformInfo::getCacheLineSize() const {
872 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
873 : TTIImpl->getCacheLineSize();
874}
875
876std::optional<unsigned>
877TargetTransformInfo::getCacheSize(CacheLevel Level) const {
878 return TTIImpl->getCacheSize(Level);
879}
880
881std::optional<unsigned>
882TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const {
883 return TTIImpl->getCacheAssociativity(Level);
884}
885
886std::optional<unsigned> TargetTransformInfo::getMinPageSize() const {
887 return MinPageSize.getNumOccurrences() > 0 ? MinPageSize
888 : TTIImpl->getMinPageSize();
889}
890
891unsigned TargetTransformInfo::getPrefetchDistance() const {
892 return TTIImpl->getPrefetchDistance();
893}
894
895unsigned TargetTransformInfo::getMinPrefetchStride(
896 unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
897 unsigned NumPrefetches, bool HasCall) const {
898 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
899 NumPrefetches, HasCall);
900}
901
902unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
903 return TTIImpl->getMaxPrefetchIterationsAhead();
904}
905
906bool TargetTransformInfo::enableWritePrefetching() const {
907 return TTIImpl->enableWritePrefetching();
908}
909
910bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
911 return TTIImpl->shouldPrefetchAddressSpace(AS);
912}
913
914InstructionCost TargetTransformInfo::getPartialReductionCost(
915 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
916 ElementCount VF, PartialReductionExtendKind OpAExtend,
917 PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
918 TTI::TargetCostKind CostKind, std::optional<FastMathFlags> FMF) const {
919 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
920 AccumType, VF, OpAExtend, OpBExtend,
921 BinOp, CostKind, FMF);
922}
923
924unsigned
925TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF,
926 bool HasUnorderedReductions) const {
927 return TTIImpl->getMaxInterleaveFactor(VF, HasUnorderedReductions);
928}
929
930TargetTransformInfo::OperandValueInfo
931TargetTransformInfo::getOperandInfo(const Value *V) {
932 OperandValueKind OpInfo = OK_AnyValue;
933 OperandValueProperties OpProps = OP_None;
934
935 // undef/poison don't materialize constants.
936 if (isa<UndefValue>(Val: V))
937 return {.Kind: OK_AnyValue, .Properties: OP_None};
938
939 if (isa<ConstantInt>(Val: V) || isa<ConstantFP>(Val: V)) {
940 if (const auto *CI = dyn_cast<ConstantInt>(Val: V)) {
941 if (CI->getValue().isPowerOf2())
942 OpProps = OP_PowerOf2;
943 else if (CI->getValue().isNegatedPowerOf2())
944 OpProps = OP_NegatedPowerOf2;
945 }
946 return {.Kind: OK_UniformConstantValue, .Properties: OpProps};
947 }
948
949 // A broadcast shuffle creates a uniform value.
950 // TODO: Add support for non-zero index broadcasts.
951 // TODO: Add support for different source vector width.
952 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(Val: V))
953 if (ShuffleInst->isZeroEltSplat())
954 OpInfo = OK_UniformValue;
955
956 const Value *Splat = getSplatValue(V);
957
958 // Check for a splat of a constant or for a non uniform vector of constants
959 // and check if the constant(s) are all powers of two.
960 if (Splat) {
961 // Check for a splat of a uniform value. This is not loop aware, so return
962 // true only for the obviously uniform cases (argument, globalvalue)
963 if (isa<Argument>(Val: Splat) || isa<GlobalValue>(Val: Splat)) {
964 OpInfo = OK_UniformValue;
965 } else if (isa<Constant>(Val: Splat)) {
966 OpInfo = OK_UniformConstantValue;
967 if (auto *CI = dyn_cast<ConstantInt>(Val: Splat)) {
968 if (CI->getValue().isPowerOf2())
969 OpProps = OP_PowerOf2;
970 else if (CI->getValue().isNegatedPowerOf2())
971 OpProps = OP_NegatedPowerOf2;
972 }
973 }
974 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(Val: V)) {
975 OpInfo = OK_NonUniformConstantValue;
976 bool AllPow2 = true, AllNegPow2 = true;
977 for (uint64_t I = 0, E = CDS->getNumElements(); I != E; ++I) {
978 if (auto *CI = dyn_cast<ConstantInt>(Val: CDS->getElementAsConstant(i: I))) {
979 AllPow2 &= CI->getValue().isPowerOf2();
980 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
981 if (AllPow2 || AllNegPow2)
982 continue;
983 }
984 AllPow2 = AllNegPow2 = false;
985 break;
986 }
987 OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
988 OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
989 } else if (isa<ConstantVector>(Val: V) || isa<ConstantDataVector>(Val: V)) {
990 OpInfo = OK_NonUniformConstantValue;
991 }
992
993 return {.Kind: OpInfo, .Properties: OpProps};
994}
995
996TargetTransformInfo::OperandValueInfo
997TargetTransformInfo::commonOperandInfo(const Value *X, const Value *Y) {
998 OperandValueInfo OpInfoX = getOperandInfo(V: X);
999 if (X == Y)
1000 return OpInfoX;
1001 return OpInfoX.mergeWith(OpInfoY: getOperandInfo(V: Y));
1002}
1003
1004InstructionCost TargetTransformInfo::getArithmeticInstrCost(
1005 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1006 OperandValueInfo Op1Info, OperandValueInfo Op2Info,
1007 ArrayRef<const Value *> Args, const Instruction *CxtI,
1008 const TargetLibraryInfo *TLibInfo) const {
1009
1010 // Use call cost for frem intructions that have platform specific vector math
1011 // functions, as those will be replaced with calls later by SelectionDAG or
1012 // ReplaceWithVecLib pass.
1013 if (TLibInfo && Opcode == Instruction::FRem) {
1014 VectorType *VecTy = dyn_cast<VectorType>(Val: Ty);
1015 LibFunc Func = TLibInfo->getLibFunc(Opcode: Instruction::FRem, Ty: Ty->getScalarType());
1016 if (VecTy && Func != NotLibFunc &&
1017 TLibInfo->isFunctionVectorizable(F: TLibInfo->getName(F: Func),
1018 VF: VecTy->getElementCount()))
1019 return getCallInstrCost(F: nullptr, RetTy: VecTy, Tys: {VecTy, VecTy}, CostKind);
1020 }
1021
1022 InstructionCost Cost = TTIImpl->getArithmeticInstrCost(
1023 Opcode, Ty, CostKind, Opd1Info: Op1Info, Opd2Info: Op2Info, Args, CxtI);
1024 assert(Cost >= 0 && "TTI should not produce negative costs!");
1025 return Cost;
1026}
1027
1028InstructionCost TargetTransformInfo::getAltInstrCost(
1029 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
1030 const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const {
1031 InstructionCost Cost =
1032 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);
1033 assert(Cost >= 0 && "TTI should not produce negative costs!");
1034 return Cost;
1035}
1036
1037InstructionCost TargetTransformInfo::getShuffleCost(
1038 ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy,
1039 TTI::TargetCostKind CostKind, ArrayRef<int> Mask, int Index,
1040 VectorType *SubTp, ArrayRef<const Value *> Args,
1041 const Instruction *CxtI) const {
1042 assert((Mask.empty() || DstTy->isScalableTy() ||
1043 Mask.size() == DstTy->getElementCount().getKnownMinValue()) &&
1044 "Expected the Mask to match the return size if given");
1045 assert(SrcTy->getScalarType() == DstTy->getScalarType() &&
1046 "Expected the same scalar types");
1047 InstructionCost Cost = TTIImpl->getShuffleCost(
1048 Kind, DstTy, SrcTy, CostKind, Mask, Index, SubTp, Args, CxtI);
1049 assert(Cost >= 0 && "TTI should not produce negative costs!");
1050 return Cost;
1051}
1052
1053TargetTransformInfo::PartialReductionExtendKind
1054TargetTransformInfo::getPartialReductionExtendKind(Instruction *I) {
1055 if (auto *Cast = dyn_cast<CastInst>(Val: I))
1056 return getPartialReductionExtendKind(CastOpc: Cast->getOpcode());
1057 return PR_None;
1058}
1059
1060Instruction::CastOps
1061TargetTransformInfo::getOpcodeForPartialReductionExtendKind(
1062 TargetTransformInfo::PartialReductionExtendKind Kind) {
1063 switch (Kind) {
1064 case TargetTransformInfo::PR_ZeroExtend:
1065 return Instruction::CastOps::ZExt;
1066 case TargetTransformInfo::PR_SignExtend:
1067 return Instruction::CastOps::SExt;
1068 case TargetTransformInfo::PR_FPExtend:
1069 return Instruction::CastOps::FPExt;
1070 default:
1071 break;
1072 }
1073 llvm_unreachable("Unhandled partial reduction extend kind");
1074}
1075
1076TargetTransformInfo::PartialReductionExtendKind
1077TargetTransformInfo::getPartialReductionExtendKind(
1078 Instruction::CastOps CastOpc) {
1079 switch (CastOpc) {
1080 case Instruction::CastOps::ZExt:
1081 return PR_ZeroExtend;
1082 case Instruction::CastOps::SExt:
1083 return PR_SignExtend;
1084 case Instruction::CastOps::FPExt:
1085 return PR_FPExtend;
1086 default:
1087 return PR_None;
1088 }
1089 llvm_unreachable("Unhandled cast opcode");
1090}
1091
1092TTI::CastContextHint
1093TargetTransformInfo::getCastContextHint(const Instruction *I) {
1094 if (!I)
1095 return CastContextHint::None;
1096
1097 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
1098 unsigned GatScatOp) {
1099 const Instruction *I = dyn_cast<Instruction>(Val: V);
1100 if (!I)
1101 return CastContextHint::None;
1102
1103 if (I->getOpcode() == LdStOp)
1104 return CastContextHint::Normal;
1105
1106 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Val: I)) {
1107 if (II->getIntrinsicID() == MaskedOp)
1108 return TTI::CastContextHint::Masked;
1109 if (II->getIntrinsicID() == GatScatOp)
1110 return TTI::CastContextHint::GatherScatter;
1111 }
1112
1113 return TTI::CastContextHint::None;
1114 };
1115
1116 switch (I->getOpcode()) {
1117 case Instruction::ZExt:
1118 case Instruction::SExt:
1119 case Instruction::FPExt:
1120 return getLoadStoreKind(I->getOperand(i: 0), Instruction::Load,
1121 Intrinsic::masked_load, Intrinsic::masked_gather);
1122 case Instruction::Trunc:
1123 case Instruction::FPTrunc:
1124 if (I->hasOneUse())
1125 return getLoadStoreKind(*I->user_begin(), Instruction::Store,
1126 Intrinsic::masked_store,
1127 Intrinsic::masked_scatter);
1128 break;
1129 default:
1130 return CastContextHint::None;
1131 }
1132
1133 return TTI::CastContextHint::None;
1134}
1135
1136InstructionCost TargetTransformInfo::getCastInstrCost(
1137 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
1138 TTI::TargetCostKind CostKind, const Instruction *I) const {
1139 assert((I == nullptr || I->getOpcode() == Opcode) &&
1140 "Opcode should reflect passed instruction.");
1141 InstructionCost Cost =
1142 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
1143 assert(Cost >= 0 && "TTI should not produce negative costs!");
1144 return Cost;
1145}
1146
1147InstructionCost TargetTransformInfo::getExtractWithExtendCost(
1148 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index,
1149 TTI::TargetCostKind CostKind) const {
1150 InstructionCost Cost =
1151 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index, CostKind);
1152 assert(Cost >= 0 && "TTI should not produce negative costs!");
1153 return Cost;
1154}
1155
1156InstructionCost TargetTransformInfo::getCFInstrCost(
1157 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
1158 assert((I == nullptr || I->getOpcode() == Opcode) &&
1159 "Opcode should reflect passed instruction.");
1160 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
1161 assert(Cost >= 0 && "TTI should not produce negative costs!");
1162 return Cost;
1163}
1164
1165InstructionCost TargetTransformInfo::getCmpSelInstrCost(
1166 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1167 TTI::TargetCostKind CostKind, OperandValueInfo Op1Info,
1168 OperandValueInfo Op2Info, const Instruction *I) const {
1169 assert((I == nullptr || I->getOpcode() == Opcode) &&
1170 "Opcode should reflect passed instruction.");
1171 InstructionCost Cost = TTIImpl->getCmpSelInstrCost(
1172 Opcode, ValTy, CondTy, VecPred, CostKind, Op1Info, Op2Info, I);
1173 assert(Cost >= 0 && "TTI should not produce negative costs!");
1174 return Cost;
1175}
1176
1177InstructionCost TargetTransformInfo::getVectorInstrCost(
1178 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1179 const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC) const {
1180 assert((Opcode == Instruction::InsertElement ||
1181 Opcode == Instruction::ExtractElement) &&
1182 "Expecting Opcode to be insertelement/extractelement.");
1183 InstructionCost Cost =
1184 TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1, VIC);
1185 assert(Cost >= 0 && "TTI should not produce negative costs!");
1186 return Cost;
1187}
1188
1189InstructionCost TargetTransformInfo::getVectorInstrCost(
1190 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1191 Value *Scalar, ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1192 TTI::VectorInstrContext VIC) const {
1193 assert((Opcode == Instruction::InsertElement ||
1194 Opcode == Instruction::ExtractElement) &&
1195 "Expecting Opcode to be insertelement/extractelement.");
1196 InstructionCost Cost = TTIImpl->getVectorInstrCost(
1197 Opcode, Val, CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1198 assert(Cost >= 0 && "TTI should not produce negative costs!");
1199 return Cost;
1200}
1201
1202InstructionCost TargetTransformInfo::getVectorInstrCost(
1203 const Instruction &I, Type *Val, TTI::TargetCostKind CostKind,
1204 unsigned Index, TTI::VectorInstrContext VIC) const {
1205 // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
1206 // This is mentioned in the interface description and respected by all
1207 // callers, but never asserted upon.
1208 InstructionCost Cost =
1209 TTIImpl->getVectorInstrCost(I, Val, CostKind, Index, VIC);
1210 assert(Cost >= 0 && "TTI should not produce negative costs!");
1211 return Cost;
1212}
1213
1214InstructionCost TargetTransformInfo::getIndexedVectorInstrCostFromEnd(
1215 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind,
1216 unsigned Index) const {
1217 InstructionCost Cost =
1218 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val, CostKind, Index);
1219 assert(Cost >= 0 && "TTI should not produce negative costs!");
1220 return Cost;
1221}
1222
1223InstructionCost TargetTransformInfo::getInsertExtractValueCost(
1224 unsigned Opcode, TTI::TargetCostKind CostKind) const {
1225 assert((Opcode == Instruction::InsertValue ||
1226 Opcode == Instruction::ExtractValue) &&
1227 "Expecting Opcode to be insertvalue/extractvalue.");
1228 InstructionCost Cost = TTIImpl->getInsertExtractValueCost(Opcode, CostKind);
1229 assert(Cost >= 0 && "TTI should not produce negative costs!");
1230 return Cost;
1231}
1232
1233InstructionCost TargetTransformInfo::getReplicationShuffleCost(
1234 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
1235 TTI::TargetCostKind CostKind) const {
1236 InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
1237 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
1238 assert(Cost >= 0 && "TTI should not produce negative costs!");
1239 return Cost;
1240}
1241
1242InstructionCost TargetTransformInfo::getMemoryOpCost(
1243 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1244 TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo,
1245 const Instruction *I) const {
1246 assert((I == nullptr || I->getOpcode() == Opcode) &&
1247 "Opcode should reflect passed instruction.");
1248 InstructionCost Cost = TTIImpl->getMemoryOpCost(
1249 Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
1250 assert(Cost >= 0 && "TTI should not produce negative costs!");
1251 return Cost;
1252}
1253
1254InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(
1255 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1256 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1257 bool UseMaskForCond, bool UseMaskForGaps) const {
1258 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1259 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1260 UseMaskForCond, UseMaskForGaps);
1261 assert(Cost >= 0 && "TTI should not produce negative costs!");
1262 return Cost;
1263}
1264
1265InstructionCost
1266TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
1267 TTI::TargetCostKind CostKind) const {
1268 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1269 assert(Cost >= 0 && "TTI should not produce negative costs!");
1270 return Cost;
1271}
1272
1273InstructionCost TargetTransformInfo::getMemIntrinsicInstrCost(
1274 const MemIntrinsicCostAttributes &MICA,
1275 TTI::TargetCostKind CostKind) const {
1276 InstructionCost Cost = TTIImpl->getMemIntrinsicInstrCost(MICA, CostKind);
1277 assert(Cost >= 0 && "TTI should not produce negative costs!");
1278 return Cost;
1279}
1280
1281InstructionCost
1282TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
1283 ArrayRef<Type *> Tys,
1284 TTI::TargetCostKind CostKind) const {
1285 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1286 assert(Cost >= 0 && "TTI should not produce negative costs!");
1287 return Cost;
1288}
1289
1290unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
1291 return TTIImpl->getNumberOfParts(Tp);
1292}
1293
1294InstructionCost TargetTransformInfo::getAddressComputationCost(
1295 Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
1296 TTI::TargetCostKind CostKind) const {
1297 InstructionCost Cost =
1298 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
1299 assert(Cost >= 0 && "TTI should not produce negative costs!");
1300 return Cost;
1301}
1302
1303InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
1304 InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1305 assert(Cost >= 0 && "TTI should not produce negative costs!");
1306 return Cost;
1307}
1308
1309uint64_t TargetTransformInfo::getMaxMemIntrinsicInlineSizeThreshold() const {
1310 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1311}
1312
1313InstructionCost TargetTransformInfo::getArithmeticReductionCost(
1314 unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1315 TTI::TargetCostKind CostKind) const {
1316 InstructionCost Cost =
1317 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1318 assert(Cost >= 0 && "TTI should not produce negative costs!");
1319 return Cost;
1320}
1321
1322InstructionCost TargetTransformInfo::getMinMaxReductionCost(
1323 Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
1324 TTI::TargetCostKind CostKind) const {
1325 InstructionCost Cost =
1326 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1327 assert(Cost >= 0 && "TTI should not produce negative costs!");
1328 return Cost;
1329}
1330
1331InstructionCost TargetTransformInfo::getExtendedReductionCost(
1332 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1333 std::optional<FastMathFlags> FMF, TTI::TargetCostKind CostKind) const {
1334 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1335 CostKind);
1336}
1337
1338InstructionCost TargetTransformInfo::getMulAccReductionCost(
1339 bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty,
1340 TTI::TargetCostKind CostKind) const {
1341 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1342 CostKind);
1343}
1344
1345InstructionCost
1346TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
1347 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1348}
1349
1350bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
1351 MemIntrinsicInfo &Info) const {
1352 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1353}
1354
1355unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
1356 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1357}
1358
1359Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
1360 IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate) const {
1361 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1362 CanCreate);
1363}
1364
1365Type *TargetTransformInfo::getMemcpyLoopLoweringType(
1366 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1367 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
1368 std::optional<uint32_t> AtomicElementSize) const {
1369 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1370 DestAddrSpace, SrcAlign, DestAlign,
1371 AtomicElementSize);
1372}
1373
1374void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
1375 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1376 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1377 Align SrcAlign, Align DestAlign,
1378 std::optional<uint32_t> AtomicCpySize) const {
1379 TTIImpl->getMemcpyLoopResidualLoweringType(
1380 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1381 DestAlign, AtomicCpySize);
1382}
1383
1384bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
1385 const Function *Callee) const {
1386 return TTIImpl->areInlineCompatible(Caller, Callee);
1387}
1388
1389unsigned
1390TargetTransformInfo::getInlineCallPenalty(const Function *F,
1391 const CallBase &Call,
1392 unsigned DefaultCallPenalty) const {
1393 return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1394}
1395
1396bool TargetTransformInfo::shouldCopyAttributeWhenOutliningFrom(
1397 const Function *Caller, const Attribute &Attr) const {
1398 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1399}
1400bool TargetTransformInfo::areTypesABICompatible(const Function *Caller,
1401 const Function *Callee,
1402 ArrayRef<Type *> Types) const {
1403 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1404}
1405
1406bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
1407 Type *Ty) const {
1408 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1409}
1410
1411bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
1412 Type *Ty) const {
1413 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1414}
1415
1416unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
1417 return TTIImpl->getLoadStoreVecRegBitWidth(AddrSpace: AS);
1418}
1419
1420bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
1421 return TTIImpl->isLegalToVectorizeLoad(LI);
1422}
1423
1424bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
1425 return TTIImpl->isLegalToVectorizeStore(SI);
1426}
1427
1428bool TargetTransformInfo::isLegalToVectorizeLoadChain(
1429 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1430 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1431 AddrSpace);
1432}
1433
1434bool TargetTransformInfo::isLegalToVectorizeStoreChain(
1435 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1436 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1437 AddrSpace);
1438}
1439
1440bool TargetTransformInfo::isLegalToVectorizeReduction(
1441 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1442 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1443}
1444
1445bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const {
1446 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1447}
1448
1449unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
1450 unsigned LoadSize,
1451 unsigned ChainSizeInBytes,
1452 VectorType *VecTy) const {
1453 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1454}
1455
1456unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
1457 unsigned StoreSize,
1458 unsigned ChainSizeInBytes,
1459 VectorType *VecTy) const {
1460 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1461}
1462
1463bool TargetTransformInfo::preferFixedOverScalableIfEqualCost() const {
1464 return TTIImpl->preferFixedOverScalableIfEqualCost();
1465}
1466
1467bool TargetTransformInfo::preferInLoopReduction(RecurKind Kind,
1468 Type *Ty) const {
1469 return TTIImpl->preferInLoopReduction(Kind, Ty);
1470}
1471
1472bool TargetTransformInfo::preferAlternateOpcodeVectorization() const {
1473 return TTIImpl->preferAlternateOpcodeVectorization();
1474}
1475
1476bool TargetTransformInfo::preferSLPInstCountCheck() const {
1477 return TTIImpl->preferSLPInstCountCheck();
1478}
1479
1480bool TargetTransformInfo::preferPredicatedReductionSelect() const {
1481 return TTIImpl->preferPredicatedReductionSelect();
1482}
1483
1484bool TargetTransformInfo::preferEpilogueVectorization(
1485 ElementCount Iters) const {
1486 return TTIImpl->preferEpilogueVectorization(Iters);
1487}
1488
1489bool TargetTransformInfo::shouldConsiderVectorizationRegPressure() const {
1490 return TTIImpl->shouldConsiderVectorizationRegPressure();
1491}
1492
1493TargetTransformInfo::VPLegalization
1494TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const {
1495 return TTIImpl->getVPLegalizationStrategy(PI: VPI);
1496}
1497
1498bool TargetTransformInfo::hasArmWideBranch(bool Thumb) const {
1499 return TTIImpl->hasArmWideBranch(Thumb);
1500}
1501
1502APInt TargetTransformInfo::getFeatureMask(const Function &F) const {
1503 return TTIImpl->getFeatureMask(F);
1504}
1505
1506APInt TargetTransformInfo::getPriorityMask(const Function &F) const {
1507 return TTIImpl->getPriorityMask(F);
1508}
1509
1510bool TargetTransformInfo::isMultiversionedFunction(const Function &F) const {
1511 return TTIImpl->isMultiversionedFunction(F);
1512}
1513
1514unsigned TargetTransformInfo::getMaxNumArgs() const {
1515 return TTIImpl->getMaxNumArgs();
1516}
1517
1518bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
1519 return TTIImpl->shouldExpandReduction(II);
1520}
1521
1522TargetTransformInfo::ReductionShuffle
1523TargetTransformInfo::getPreferredExpandedReductionShuffle(
1524 const IntrinsicInst *II) const {
1525 return TTIImpl->getPreferredExpandedReductionShuffle(II);
1526}
1527
1528unsigned TargetTransformInfo::getGISelRematGlobalCost() const {
1529 return TTIImpl->getGISelRematGlobalCost();
1530}
1531
1532unsigned TargetTransformInfo::getMinTripCountTailFoldingThreshold() const {
1533 return TTIImpl->getMinTripCountTailFoldingThreshold();
1534}
1535
1536bool TargetTransformInfo::supportsScalableVectors() const {
1537 return TTIImpl->supportsScalableVectors();
1538}
1539
1540bool TargetTransformInfo::enableScalableVectorization() const {
1541 return TTIImpl->enableScalableVectorization();
1542}
1543
1544bool TargetTransformInfo::hasActiveVectorLength() const {
1545 return TTIImpl->hasActiveVectorLength();
1546}
1547
1548bool TargetTransformInfo::isProfitableToSinkOperands(
1549 Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
1550 return TTIImpl->isProfitableToSinkOperands(I, Ops&: OpsToSink);
1551}
1552
1553bool TargetTransformInfo::isVectorShiftByScalarCheap(Type *Ty) const {
1554 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1555}
1556
1557unsigned
1558TargetTransformInfo::getNumBytesToPadGlobalArray(unsigned Size,
1559 Type *ArrayType) const {
1560 return TTIImpl->getNumBytesToPadGlobalArray(Size, ArrayType);
1561}
1562
1563void TargetTransformInfo::collectKernelLaunchBounds(
1564 const Function &F,
1565 SmallVectorImpl<std::pair<StringRef, int64_t>> &LB) const {
1566 return TTIImpl->collectKernelLaunchBounds(F, LB);
1567}
1568
1569bool TargetTransformInfo::allowVectorElementIndexingUsingGEP() const {
1570 return TTIImpl->allowVectorElementIndexingUsingGEP();
1571}
1572
1573bool TargetTransformInfo::isUniform(const Instruction *I,
1574 const SmallBitVector &UniformArgs) const {
1575 return TTIImpl->isUniform(I, UniformArgs);
1576}
1577
1578TargetTransformInfoImplBase::~TargetTransformInfoImplBase() = default;
1579
1580TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1581
1582TargetIRAnalysis::TargetIRAnalysis(
1583 std::function<Result(const Function &)> TTICallback)
1584 : TTICallback(std::move(TTICallback)) {}
1585
1586TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1587 FunctionAnalysisManager &) {
1588 assert(!F.isIntrinsic() && "Should not request TTI for intrinsics");
1589 return TTICallback(F);
1590}
1591
1592AnalysisKey TargetIRAnalysis::Key;
1593
1594TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1595 return Result(F.getDataLayout());
1596}
1597
1598// Register the basic pass.
1599INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1600 "Target Transform Information", false, true)
1601char TargetTransformInfoWrapperPass::ID = 0;
1602
1603void TargetTransformInfoWrapperPass::anchor() {}
1604
1605TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1606 : ImmutablePass(ID) {}
1607
1608TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1609 TargetIRAnalysis TIRA)
1610 : ImmutablePass(ID), TIRA(std::move(TIRA)) {}
1611
1612TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1613 FunctionAnalysisManager DummyFAM;
1614 TTI = TIRA.run(F, DummyFAM);
1615 return *TTI;
1616}
1617
1618ImmutablePass *
1619llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1620 return new TargetTransformInfoWrapperPass(std::move(TIRA));
1621}
1622