1//===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "llvm/Analysis/TargetTransformInfo.h"
10#include "llvm/ADT/SmallVector.h"
11#include "llvm/Analysis/CFG.h"
12#include "llvm/Analysis/LoopIterator.h"
13#include "llvm/Analysis/TargetLibraryInfo.h"
14#include "llvm/Analysis/TargetTransformInfoImpl.h"
15#include "llvm/IR/CFG.h"
16#include "llvm/IR/Dominators.h"
17#include "llvm/IR/Instruction.h"
18#include "llvm/IR/Instructions.h"
19#include "llvm/IR/IntrinsicInst.h"
20#include "llvm/IR/Module.h"
21#include "llvm/IR/Operator.h"
22#include "llvm/InitializePasses.h"
23#include "llvm/Support/CommandLine.h"
24#include <optional>
25#include <utility>
26
27using namespace llvm;
28using namespace PatternMatch;
29
30#define DEBUG_TYPE "tti"
31
32static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(Val: false),
33 cl::Hidden,
34 cl::desc("Recognize reduction patterns."));
35
36static cl::opt<unsigned> CacheLineSize(
37 "cache-line-size", cl::init(Val: 0), cl::Hidden,
38 cl::desc("Use this to override the target cache line size when "
39 "specified by the user."));
40
41static cl::opt<unsigned> MinPageSize(
42 "min-page-size", cl::init(Val: 0), cl::Hidden,
43 cl::desc("Use this to override the target's minimum page size."));
44
45static cl::opt<unsigned> PredictableBranchThreshold(
46 "predictable-branch-threshold", cl::init(Val: 99), cl::Hidden,
47 cl::desc(
48 "Use this to override the target's predictable branch threshold (%)."));
49
50namespace {
51/// No-op implementation of the TTI interface using the utility base
52/// classes.
53///
54/// This is used when no target specific information is available.
55struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
56 explicit NoTTIImpl(const DataLayout &DL)
57 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
58};
59} // namespace
60
61TargetTransformInfo::TargetTransformInfo(
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
63 : TTIImpl(std::move(Impl)) {}
64
65bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
66 // If the loop has irreducible control flow, it can not be converted to
67 // Hardware loop.
68 LoopBlocksRPO RPOT(L);
69 RPOT.perform(LI: &LI);
70 if (containsIrreducibleCFG<const BasicBlock *>(RPOTraversal&: RPOT, LI))
71 return false;
72 return true;
73}
74
75IntrinsicCostAttributes::IntrinsicCostAttributes(
76 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
77 bool TypeBasedOnly, const TargetLibraryInfo *LibInfo)
78 : II(dyn_cast<IntrinsicInst>(Val: &CI)), RetTy(CI.getType()), IID(Id),
79 ScalarizationCost(ScalarizationCost), LibInfo(LibInfo) {
80
81 if (const auto *FPMO = dyn_cast<FPMathOperator>(Val: &CI))
82 FMF = FPMO->getFastMathFlags();
83
84 if (!TypeBasedOnly)
85 Arguments.insert(I: Arguments.begin(), From: CI.arg_begin(), To: CI.arg_end());
86 FunctionType *FTy = CI.getCalledFunction()->getFunctionType();
87 ParamTys.insert(I: ParamTys.begin(), From: FTy->param_begin(), To: FTy->param_end());
88}
89
90IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
91 ArrayRef<Type *> Tys,
92 FastMathFlags Flags,
93 const IntrinsicInst *I,
94 InstructionCost ScalarCost)
95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
97}
98
99IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty,
100 ArrayRef<const Value *> Args)
101 : RetTy(Ty), IID(Id) {
102
103 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
104 ParamTys.reserve(N: Arguments.size());
105 for (const Value *Argument : Arguments)
106 ParamTys.push_back(Elt: Argument->getType());
107}
108
109IntrinsicCostAttributes::IntrinsicCostAttributes(
110 Intrinsic::ID Id, Type *RTy, ArrayRef<const Value *> Args,
111 ArrayRef<Type *> Tys, FastMathFlags Flags, const IntrinsicInst *I,
112 InstructionCost ScalarCost, TargetLibraryInfo const *LibInfo)
113 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
114 LibInfo(LibInfo) {
115 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
116 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
117}
118
119HardwareLoopInfo::HardwareLoopInfo(Loop *L) : L(L) {
120 // Match default options:
121 // - hardware-loop-counter-bitwidth = 32
122 // - hardware-loop-decrement = 1
123 CountType = Type::getInt32Ty(C&: L->getHeader()->getContext());
124 LoopDecrement = ConstantInt::get(Ty: CountType, V: 1);
125}
126
127bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
128 LoopInfo &LI, DominatorTree &DT,
129 bool ForceNestedLoop,
130 bool ForceHardwareLoopPHI) {
131 SmallVector<BasicBlock *, 4> ExitingBlocks;
132 L->getExitingBlocks(ExitingBlocks);
133
134 for (BasicBlock *BB : ExitingBlocks) {
135 // If we pass the updated counter back through a phi, we need to know
136 // which latch the updated value will be coming from.
137 if (!L->isLoopLatch(BB)) {
138 if (ForceHardwareLoopPHI || CounterInReg)
139 continue;
140 }
141
142 const SCEV *EC = SE.getExitCount(L, ExitingBlock: BB);
143 if (isa<SCEVCouldNotCompute>(Val: EC))
144 continue;
145 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(Val: EC)) {
146 if (ConstEC->getValue()->isZero())
147 continue;
148 } else if (!SE.isLoopInvariant(S: EC, L))
149 continue;
150
151 if (SE.getTypeSizeInBits(Ty: EC->getType()) > CountType->getBitWidth())
152 continue;
153
154 // If this exiting block is contained in a nested loop, it is not eligible
155 // for insertion of the branch-and-decrement since the inner loop would
156 // end up messing up the value in the CTR.
157 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
158 continue;
159
160 // We now have a loop-invariant count of loop iterations (which is not the
161 // constant zero) for which we know that this loop will not exit via this
162 // existing block.
163
164 // We need to make sure that this block will run on every loop iteration.
165 // For this to be true, we must dominate all blocks with backedges. Such
166 // blocks are in-loop predecessors to the header block.
167 bool NotAlways = false;
168 for (BasicBlock *Pred : predecessors(BB: L->getHeader())) {
169 if (!L->contains(BB: Pred))
170 continue;
171
172 if (!DT.dominates(A: BB, B: Pred)) {
173 NotAlways = true;
174 break;
175 }
176 }
177
178 if (NotAlways)
179 continue;
180
181 // Make sure this blocks ends with a conditional branch.
182 Instruction *TI = BB->getTerminator();
183 if (!TI)
184 continue;
185
186 if (BranchInst *BI = dyn_cast<BranchInst>(Val: TI)) {
187 if (!BI->isConditional())
188 continue;
189
190 ExitBranch = BI;
191 } else
192 continue;
193
194 // Note that this block may not be the loop latch block, even if the loop
195 // has a latch block.
196 ExitBlock = BB;
197 ExitCount = EC;
198 break;
199 }
200
201 if (!ExitBlock)
202 return false;
203 return true;
204}
205
206TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
207 : TTIImpl(std::make_unique<NoTTIImpl>(args: DL)) {}
208
209TargetTransformInfo::~TargetTransformInfo() = default;
210
211TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
212 : TTIImpl(std::move(Arg.TTIImpl)) {}
213
214TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
215 TTIImpl = std::move(RHS.TTIImpl);
216 return *this;
217}
218
219unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
220 return TTIImpl->getInliningThresholdMultiplier();
221}
222
223unsigned
224TargetTransformInfo::getInliningCostBenefitAnalysisSavingsMultiplier() const {
225 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
226}
227
228unsigned
229TargetTransformInfo::getInliningCostBenefitAnalysisProfitableMultiplier()
230 const {
231 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
232}
233
234int TargetTransformInfo::getInliningLastCallToStaticBonus() const {
235 return TTIImpl->getInliningLastCallToStaticBonus();
236}
237
238unsigned
239TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const {
240 return TTIImpl->adjustInliningThreshold(CB);
241}
242
243unsigned TargetTransformInfo::getCallerAllocaCost(const CallBase *CB,
244 const AllocaInst *AI) const {
245 return TTIImpl->getCallerAllocaCost(CB, AI);
246}
247
248int TargetTransformInfo::getInlinerVectorBonusPercent() const {
249 return TTIImpl->getInlinerVectorBonusPercent();
250}
251
252InstructionCost TargetTransformInfo::getGEPCost(
253 Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
254 Type *AccessType, TTI::TargetCostKind CostKind) const {
255 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
256}
257
258InstructionCost TargetTransformInfo::getPointersChainCost(
259 ArrayRef<const Value *> Ptrs, const Value *Base,
260 const TTI::PointersChainInfo &Info, Type *AccessTy,
261 TTI::TargetCostKind CostKind) const {
262 assert((Base || !Info.isSameBase()) &&
263 "If pointers have same base address it has to be provided.");
264 return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
265}
266
267unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(
268 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
269 BlockFrequencyInfo *BFI) const {
270 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
271}
272
273InstructionCost
274TargetTransformInfo::getInstructionCost(const User *U,
275 ArrayRef<const Value *> Operands,
276 enum TargetCostKind CostKind) const {
277 InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
278 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) &&
279 "TTI should not produce negative costs!");
280 return Cost;
281}
282
283BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const {
284 return PredictableBranchThreshold.getNumOccurrences() > 0
285 ? BranchProbability(PredictableBranchThreshold, 100)
286 : TTIImpl->getPredictableBranchThreshold();
287}
288
289InstructionCost TargetTransformInfo::getBranchMispredictPenalty() const {
290 return TTIImpl->getBranchMispredictPenalty();
291}
292
293bool TargetTransformInfo::hasBranchDivergence(const Function *F) const {
294 return TTIImpl->hasBranchDivergence(F);
295}
296
297InstructionUniformity
298llvm::TargetTransformInfo::getInstructionUniformity(const Value *V) const {
299 // Calls with the NoDivergenceSource attribute are always uniform.
300 if (const auto *Call = dyn_cast<CallBase>(Val: V)) {
301 if (Call->hasFnAttr(Kind: Attribute::NoDivergenceSource))
302 return InstructionUniformity::AlwaysUniform;
303 }
304 return TTIImpl->getInstructionUniformity(V);
305}
306
307bool llvm::TargetTransformInfo::isValidAddrSpaceCast(unsigned FromAS,
308 unsigned ToAS) const {
309 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
310}
311
312bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned FromAS,
313 unsigned ToAS) const {
314 return TTIImpl->addrspacesMayAlias(AS0: FromAS, AS1: ToAS);
315}
316
317unsigned TargetTransformInfo::getFlatAddressSpace() const {
318 return TTIImpl->getFlatAddressSpace();
319}
320
321bool TargetTransformInfo::collectFlatAddressOperands(
322 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
323 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
324}
325
326bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
327 unsigned ToAS) const {
328 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
329}
330
331std::pair<KnownBits, KnownBits>
332TargetTransformInfo::computeKnownBitsAddrSpaceCast(unsigned ToAS,
333 const Value &PtrOp) const {
334 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
335}
336
337KnownBits TargetTransformInfo::computeKnownBitsAddrSpaceCast(
338 unsigned FromAS, unsigned ToAS, const KnownBits &FromPtrBits) const {
339 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
340}
341
342bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace(
343 unsigned AS) const {
344 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
345}
346
347unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const {
348 return TTIImpl->getAssumedAddrSpace(V);
349}
350
351bool TargetTransformInfo::isSingleThreaded() const {
352 return TTIImpl->isSingleThreaded();
353}
354
355std::pair<const Value *, unsigned>
356TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const {
357 return TTIImpl->getPredicatedAddrSpace(V);
358}
359
360Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace(
361 IntrinsicInst *II, Value *OldV, Value *NewV) const {
362 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
363}
364
365bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
366 return TTIImpl->isLoweredToCall(F);
367}
368
369bool TargetTransformInfo::isHardwareLoopProfitable(
370 Loop *L, ScalarEvolution &SE, AssumptionCache &AC,
371 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
372 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
373}
374
375unsigned TargetTransformInfo::getEpilogueVectorizationMinVF() const {
376 return TTIImpl->getEpilogueVectorizationMinVF();
377}
378
379bool TargetTransformInfo::preferPredicateOverEpilogue(
380 TailFoldingInfo *TFI) const {
381 return TTIImpl->preferPredicateOverEpilogue(TFI);
382}
383
384TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle(
385 bool IVUpdateMayOverflow) const {
386 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
387}
388
389std::optional<Instruction *>
390TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC,
391 IntrinsicInst &II) const {
392 return TTIImpl->instCombineIntrinsic(IC, II);
393}
394
395std::optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(
396 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
397 bool &KnownBitsComputed) const {
398 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
399 KnownBitsComputed);
400}
401
402std::optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(
403 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
404 APInt &UndefElts2, APInt &UndefElts3,
405 std::function<void(Instruction *, unsigned, APInt, APInt &)>
406 SimplifyAndSetOp) const {
407 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
408 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
409 SimplifyAndSetOp);
410}
411
412void TargetTransformInfo::getUnrollingPreferences(
413 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP,
414 OptimizationRemarkEmitter *ORE) const {
415 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
416}
417
418void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
419 PeelingPreferences &PP) const {
420 return TTIImpl->getPeelingPreferences(L, SE, PP);
421}
422
423bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
424 return TTIImpl->isLegalAddImmediate(Imm);
425}
426
427bool TargetTransformInfo::isLegalAddScalableImmediate(int64_t Imm) const {
428 return TTIImpl->isLegalAddScalableImmediate(Imm);
429}
430
431bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
432 return TTIImpl->isLegalICmpImmediate(Imm);
433}
434
435bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
436 int64_t BaseOffset,
437 bool HasBaseReg, int64_t Scale,
438 unsigned AddrSpace,
439 Instruction *I,
440 int64_t ScalableOffset) const {
441 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
442 Scale, AddrSpace, I, ScalableOffset);
443}
444
445bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1,
446 const LSRCost &C2) const {
447 return TTIImpl->isLSRCostLess(C1, C2);
448}
449
450bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const {
451 return TTIImpl->isNumRegsMajorCostOfLSR();
452}
453
454bool TargetTransformInfo::shouldDropLSRSolutionIfLessProfitable() const {
455 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
456}
457
458bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const {
459 return TTIImpl->isProfitableLSRChainElement(I);
460}
461
462bool TargetTransformInfo::canMacroFuseCmp() const {
463 return TTIImpl->canMacroFuseCmp();
464}
465
466bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI,
467 ScalarEvolution *SE, LoopInfo *LI,
468 DominatorTree *DT, AssumptionCache *AC,
469 TargetLibraryInfo *LibInfo) const {
470 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
471}
472
473TTI::AddressingModeKind
474TargetTransformInfo::getPreferredAddressingMode(const Loop *L,
475 ScalarEvolution *SE) const {
476 return TTIImpl->getPreferredAddressingMode(L, SE);
477}
478
479bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, Align Alignment,
480 unsigned AddressSpace,
481 TTI::MaskKind MaskKind) const {
482 return TTIImpl->isLegalMaskedStore(DataType, Alignment, AddressSpace,
483 MaskKind);
484}
485
486bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, Align Alignment,
487 unsigned AddressSpace,
488 TTI::MaskKind MaskKind) const {
489 return TTIImpl->isLegalMaskedLoad(DataType, Alignment, AddressSpace,
490 MaskKind);
491}
492
493bool TargetTransformInfo::isLegalNTStore(Type *DataType,
494 Align Alignment) const {
495 return TTIImpl->isLegalNTStore(DataType, Alignment);
496}
497
498bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
499 return TTIImpl->isLegalNTLoad(DataType, Alignment);
500}
501
502bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy,
503 ElementCount NumElements) const {
504 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
505}
506
507bool TargetTransformInfo::isLegalMaskedGather(Type *DataType,
508 Align Alignment) const {
509 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
510}
511
512bool TargetTransformInfo::isLegalAltInstr(
513 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
514 const SmallBitVector &OpcodeMask) const {
515 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
516}
517
518bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType,
519 Align Alignment) const {
520 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
521}
522
523bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType,
524 Align Alignment) const {
525 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
526}
527
528bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType,
529 Align Alignment) const {
530 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
531}
532
533bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType,
534 Align Alignment) const {
535 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
536}
537
538bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType,
539 Align Alignment) const {
540 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
541}
542
543bool TargetTransformInfo::isLegalStridedLoadStore(Type *DataType,
544 Align Alignment) const {
545 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
546}
547
548bool TargetTransformInfo::isLegalInterleavedAccessType(
549 VectorType *VTy, unsigned Factor, Align Alignment,
550 unsigned AddrSpace) const {
551 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
552 AddrSpace);
553}
554
555bool TargetTransformInfo::isLegalMaskedVectorHistogram(Type *AddrType,
556 Type *DataType) const {
557 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
558}
559
560bool TargetTransformInfo::enableOrderedReductions() const {
561 return TTIImpl->enableOrderedReductions();
562}
563
564bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
565 return TTIImpl->hasDivRemOp(DataType, IsSigned);
566}
567
568bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
569 unsigned AddrSpace) const {
570 return TTIImpl->hasVolatileVariant(I, AddrSpace);
571}
572
573bool TargetTransformInfo::prefersVectorizedAddressing() const {
574 return TTIImpl->prefersVectorizedAddressing();
575}
576
577InstructionCost TargetTransformInfo::getScalingFactorCost(
578 Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg,
579 int64_t Scale, unsigned AddrSpace) const {
580 InstructionCost Cost = TTIImpl->getScalingFactorCost(
581 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
582 assert(Cost >= 0 && "TTI should not produce negative costs!");
583 return Cost;
584}
585
586bool TargetTransformInfo::LSRWithInstrQueries() const {
587 return TTIImpl->LSRWithInstrQueries();
588}
589
590bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
591 return TTIImpl->isTruncateFree(Ty1, Ty2);
592}
593
594bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
595 return TTIImpl->isProfitableToHoist(I);
596}
597
598bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
599
600bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
601 return TTIImpl->isTypeLegal(Ty);
602}
603
604unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const {
605 return TTIImpl->getRegUsageForType(Ty);
606}
607
608bool TargetTransformInfo::shouldBuildLookupTables() const {
609 return TTIImpl->shouldBuildLookupTables();
610}
611
612bool TargetTransformInfo::shouldBuildLookupTablesForConstant(
613 Constant *C) const {
614 return TTIImpl->shouldBuildLookupTablesForConstant(C);
615}
616
617bool TargetTransformInfo::shouldBuildRelLookupTables() const {
618 return TTIImpl->shouldBuildRelLookupTables();
619}
620
621bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
622 return TTIImpl->useColdCCForColdCall(F);
623}
624
625bool TargetTransformInfo::useFastCCForInternalCall(Function &F) const {
626 return TTIImpl->useFastCCForInternalCall(F);
627}
628
629bool TargetTransformInfo::isTargetIntrinsicTriviallyScalarizable(
630 Intrinsic::ID ID) const {
631 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(ID);
632}
633
634bool TargetTransformInfo::isTargetIntrinsicWithScalarOpAtArg(
635 Intrinsic::ID ID, unsigned ScalarOpdIdx) const {
636 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
637}
638
639bool TargetTransformInfo::isTargetIntrinsicWithOverloadTypeAtArg(
640 Intrinsic::ID ID, int OpdIdx) const {
641 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
642}
643
644bool TargetTransformInfo::isTargetIntrinsicWithStructReturnOverloadAtField(
645 Intrinsic::ID ID, int RetIdx) const {
646 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
647}
648
649TargetTransformInfo::VectorInstrContext
650TargetTransformInfo::getVectorInstrContextHint(const Instruction *I) {
651 if (!I)
652 return VectorInstrContext::None;
653
654 // For inserts, check if the value being inserted comes from a single-use
655 // load.
656 if (isa<InsertElementInst>(Val: I) && isa<LoadInst>(Val: I->getOperand(i: 1)) &&
657 I->getOperand(i: 1)->hasOneUse())
658 return VectorInstrContext::Load;
659
660 // For extracts, check if it has a single use that is a store.
661 if (isa<ExtractElementInst>(Val: I) && I->hasOneUse() &&
662 isa<StoreInst>(Val: *I->user_begin()))
663 return VectorInstrContext::Store;
664
665 return VectorInstrContext::None;
666}
667
668InstructionCost TargetTransformInfo::getScalarizationOverhead(
669 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
670 TTI::TargetCostKind CostKind, bool ForPoisonSrc, ArrayRef<Value *> VL,
671 TTI::VectorInstrContext VIC) const {
672 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
673 CostKind, ForPoisonSrc, VL, VIC);
674}
675
676InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(
677 ArrayRef<Type *> Tys, TTI::TargetCostKind CostKind,
678 TTI::VectorInstrContext VIC) const {
679 return TTIImpl->getOperandsScalarizationOverhead(Tys, CostKind, VIC);
680}
681
682bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
683 return TTIImpl->supportsEfficientVectorElementLoadStore();
684}
685
686bool TargetTransformInfo::supportsTailCalls() const {
687 return TTIImpl->supportsTailCalls();
688}
689
690bool TargetTransformInfo::supportsTailCallFor(const CallBase *CB) const {
691 return TTIImpl->supportsTailCallFor(CB);
692}
693
694bool TargetTransformInfo::enableAggressiveInterleaving(
695 bool LoopHasReductions) const {
696 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
697}
698
699TargetTransformInfo::MemCmpExpansionOptions
700TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
701 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
702}
703
704bool TargetTransformInfo::enableSelectOptimize() const {
705 return TTIImpl->enableSelectOptimize();
706}
707
708bool TargetTransformInfo::shouldTreatInstructionLikeSelect(
709 const Instruction *I) const {
710 return TTIImpl->shouldTreatInstructionLikeSelect(I);
711}
712
713bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
714 return TTIImpl->enableInterleavedAccessVectorization();
715}
716
717bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
718 return TTIImpl->enableMaskedInterleavedAccessVectorization();
719}
720
721bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
722 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
723}
724
725bool
726TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
727 unsigned BitWidth,
728 unsigned AddressSpace,
729 Align Alignment,
730 unsigned *Fast) const {
731 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
732 AddressSpace, Alignment, Fast);
733}
734
735TargetTransformInfo::PopcntSupportKind
736TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
737 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
738}
739
740bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
741 return TTIImpl->haveFastSqrt(Ty);
742}
743
744bool TargetTransformInfo::isExpensiveToSpeculativelyExecute(
745 const Instruction *I) const {
746 return TTIImpl->isExpensiveToSpeculativelyExecute(I);
747}
748
749bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
750 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
751}
752
753InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const {
754 InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
755 assert(Cost >= 0 && "TTI should not produce negative costs!");
756 return Cost;
757}
758
759InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode,
760 unsigned Idx,
761 const APInt &Imm,
762 Type *Ty) const {
763 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
764 assert(Cost >= 0 && "TTI should not produce negative costs!");
765 return Cost;
766}
767
768InstructionCost
769TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty,
770 TTI::TargetCostKind CostKind) const {
771 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
772 assert(Cost >= 0 && "TTI should not produce negative costs!");
773 return Cost;
774}
775
776InstructionCost TargetTransformInfo::getIntImmCostInst(
777 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
778 TTI::TargetCostKind CostKind, Instruction *Inst) const {
779 InstructionCost Cost =
780 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
781 assert(Cost >= 0 && "TTI should not produce negative costs!");
782 return Cost;
783}
784
785InstructionCost
786TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
787 const APInt &Imm, Type *Ty,
788 TTI::TargetCostKind CostKind) const {
789 InstructionCost Cost =
790 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
791 assert(Cost >= 0 && "TTI should not produce negative costs!");
792 return Cost;
793}
794
795bool TargetTransformInfo::preferToKeepConstantsAttached(
796 const Instruction &Inst, const Function &Fn) const {
797 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
798}
799
800unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
801 return TTIImpl->getNumberOfRegisters(ClassID);
802}
803
804bool TargetTransformInfo::hasConditionalLoadStoreForType(Type *Ty,
805 bool IsStore) const {
806 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
807}
808
809unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
810 Type *Ty) const {
811 return TTIImpl->getRegisterClassForType(Vector, Ty);
812}
813
814const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
815 return TTIImpl->getRegisterClassName(ClassID);
816}
817
818TypeSize TargetTransformInfo::getRegisterBitWidth(
819 TargetTransformInfo::RegisterKind K) const {
820 return TTIImpl->getRegisterBitWidth(K);
821}
822
823unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
824 return TTIImpl->getMinVectorRegisterBitWidth();
825}
826
827std::optional<unsigned> TargetTransformInfo::getMaxVScale() const {
828 return TTIImpl->getMaxVScale();
829}
830
831std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
832 return TTIImpl->getVScaleForTuning();
833}
834
835bool TargetTransformInfo::isVScaleKnownToBeAPowerOfTwo() const {
836 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
837}
838
839bool TargetTransformInfo::shouldMaximizeVectorBandwidth(
840 TargetTransformInfo::RegisterKind K) const {
841 return TTIImpl->shouldMaximizeVectorBandwidth(K);
842}
843
844ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
845 bool IsScalable) const {
846 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
847}
848
849unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
850 unsigned Opcode) const {
851 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
852}
853
854unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
855 Type *ScalarValTy) const {
856 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
857}
858
859bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
860 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
861 return TTIImpl->shouldConsiderAddressTypePromotion(
862 I, AllowPromotionWithoutCommonHeader);
863}
864
865unsigned TargetTransformInfo::getCacheLineSize() const {
866 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
867 : TTIImpl->getCacheLineSize();
868}
869
870std::optional<unsigned>
871TargetTransformInfo::getCacheSize(CacheLevel Level) const {
872 return TTIImpl->getCacheSize(Level);
873}
874
875std::optional<unsigned>
876TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const {
877 return TTIImpl->getCacheAssociativity(Level);
878}
879
880std::optional<unsigned> TargetTransformInfo::getMinPageSize() const {
881 return MinPageSize.getNumOccurrences() > 0 ? MinPageSize
882 : TTIImpl->getMinPageSize();
883}
884
885unsigned TargetTransformInfo::getPrefetchDistance() const {
886 return TTIImpl->getPrefetchDistance();
887}
888
889unsigned TargetTransformInfo::getMinPrefetchStride(
890 unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
891 unsigned NumPrefetches, bool HasCall) const {
892 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
893 NumPrefetches, HasCall);
894}
895
896unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
897 return TTIImpl->getMaxPrefetchIterationsAhead();
898}
899
900bool TargetTransformInfo::enableWritePrefetching() const {
901 return TTIImpl->enableWritePrefetching();
902}
903
904bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
905 return TTIImpl->shouldPrefetchAddressSpace(AS);
906}
907
908InstructionCost TargetTransformInfo::getPartialReductionCost(
909 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
910 ElementCount VF, PartialReductionExtendKind OpAExtend,
911 PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
912 TTI::TargetCostKind CostKind, std::optional<FastMathFlags> FMF) const {
913 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
914 AccumType, VF, OpAExtend, OpBExtend,
915 BinOp, CostKind, FMF);
916}
917
918unsigned TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF) const {
919 return TTIImpl->getMaxInterleaveFactor(VF);
920}
921
922TargetTransformInfo::OperandValueInfo
923TargetTransformInfo::getOperandInfo(const Value *V) {
924 OperandValueKind OpInfo = OK_AnyValue;
925 OperandValueProperties OpProps = OP_None;
926
927 // undef/poison don't materialize constants.
928 if (isa<UndefValue>(Val: V))
929 return {.Kind: OK_AnyValue, .Properties: OP_None};
930
931 if (isa<ConstantInt>(Val: V) || isa<ConstantFP>(Val: V)) {
932 if (const auto *CI = dyn_cast<ConstantInt>(Val: V)) {
933 if (CI->getValue().isPowerOf2())
934 OpProps = OP_PowerOf2;
935 else if (CI->getValue().isNegatedPowerOf2())
936 OpProps = OP_NegatedPowerOf2;
937 }
938 return {.Kind: OK_UniformConstantValue, .Properties: OpProps};
939 }
940
941 // A broadcast shuffle creates a uniform value.
942 // TODO: Add support for non-zero index broadcasts.
943 // TODO: Add support for different source vector width.
944 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(Val: V))
945 if (ShuffleInst->isZeroEltSplat())
946 OpInfo = OK_UniformValue;
947
948 const Value *Splat = getSplatValue(V);
949
950 // Check for a splat of a constant or for a non uniform vector of constants
951 // and check if the constant(s) are all powers of two.
952 if (Splat) {
953 // Check for a splat of a uniform value. This is not loop aware, so return
954 // true only for the obviously uniform cases (argument, globalvalue)
955 if (isa<Argument>(Val: Splat) || isa<GlobalValue>(Val: Splat)) {
956 OpInfo = OK_UniformValue;
957 } else if (isa<Constant>(Val: Splat)) {
958 OpInfo = OK_UniformConstantValue;
959 if (auto *CI = dyn_cast<ConstantInt>(Val: Splat)) {
960 if (CI->getValue().isPowerOf2())
961 OpProps = OP_PowerOf2;
962 else if (CI->getValue().isNegatedPowerOf2())
963 OpProps = OP_NegatedPowerOf2;
964 }
965 }
966 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(Val: V)) {
967 OpInfo = OK_NonUniformConstantValue;
968 bool AllPow2 = true, AllNegPow2 = true;
969 for (uint64_t I = 0, E = CDS->getNumElements(); I != E; ++I) {
970 if (auto *CI = dyn_cast<ConstantInt>(Val: CDS->getElementAsConstant(i: I))) {
971 AllPow2 &= CI->getValue().isPowerOf2();
972 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
973 if (AllPow2 || AllNegPow2)
974 continue;
975 }
976 AllPow2 = AllNegPow2 = false;
977 break;
978 }
979 OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
980 OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
981 } else if (isa<ConstantVector>(Val: V) || isa<ConstantDataVector>(Val: V)) {
982 OpInfo = OK_NonUniformConstantValue;
983 }
984
985 return {.Kind: OpInfo, .Properties: OpProps};
986}
987
988TargetTransformInfo::OperandValueInfo
989TargetTransformInfo::commonOperandInfo(const Value *X, const Value *Y) {
990 OperandValueInfo OpInfoX = getOperandInfo(V: X);
991 if (X == Y)
992 return OpInfoX;
993 return OpInfoX.mergeWith(OpInfoY: getOperandInfo(V: Y));
994}
995
996InstructionCost TargetTransformInfo::getArithmeticInstrCost(
997 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
998 OperandValueInfo Op1Info, OperandValueInfo Op2Info,
999 ArrayRef<const Value *> Args, const Instruction *CxtI,
1000 const TargetLibraryInfo *TLibInfo) const {
1001
1002 // Use call cost for frem intructions that have platform specific vector math
1003 // functions, as those will be replaced with calls later by SelectionDAG or
1004 // ReplaceWithVecLib pass.
1005 if (TLibInfo && Opcode == Instruction::FRem) {
1006 VectorType *VecTy = dyn_cast<VectorType>(Val: Ty);
1007 LibFunc Func;
1008 if (VecTy &&
1009 TLibInfo->getLibFunc(Opcode: Instruction::FRem, Ty: Ty->getScalarType(), F&: Func) &&
1010 TLibInfo->isFunctionVectorizable(F: TLibInfo->getName(F: Func),
1011 VF: VecTy->getElementCount()))
1012 return getCallInstrCost(F: nullptr, RetTy: VecTy, Tys: {VecTy, VecTy}, CostKind);
1013 }
1014
1015 InstructionCost Cost = TTIImpl->getArithmeticInstrCost(
1016 Opcode, Ty, CostKind, Opd1Info: Op1Info, Opd2Info: Op2Info, Args, CxtI);
1017 assert(Cost >= 0 && "TTI should not produce negative costs!");
1018 return Cost;
1019}
1020
1021InstructionCost TargetTransformInfo::getAltInstrCost(
1022 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
1023 const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const {
1024 InstructionCost Cost =
1025 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);
1026 assert(Cost >= 0 && "TTI should not produce negative costs!");
1027 return Cost;
1028}
1029
1030InstructionCost TargetTransformInfo::getShuffleCost(
1031 ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef<int> Mask,
1032 TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
1033 ArrayRef<const Value *> Args, const Instruction *CxtI) const {
1034 assert((Mask.empty() || DstTy->isScalableTy() ||
1035 Mask.size() == DstTy->getElementCount().getKnownMinValue()) &&
1036 "Expected the Mask to match the return size if given");
1037 assert(SrcTy->getScalarType() == DstTy->getScalarType() &&
1038 "Expected the same scalar types");
1039 InstructionCost Cost = TTIImpl->getShuffleCost(
1040 Kind, DstTy, SrcTy, Mask, CostKind, Index, SubTp, Args, CxtI);
1041 assert(Cost >= 0 && "TTI should not produce negative costs!");
1042 return Cost;
1043}
1044
1045TargetTransformInfo::PartialReductionExtendKind
1046TargetTransformInfo::getPartialReductionExtendKind(Instruction *I) {
1047 if (auto *Cast = dyn_cast<CastInst>(Val: I))
1048 return getPartialReductionExtendKind(CastOpc: Cast->getOpcode());
1049 return PR_None;
1050}
1051
1052TargetTransformInfo::PartialReductionExtendKind
1053TargetTransformInfo::getPartialReductionExtendKind(
1054 Instruction::CastOps CastOpc) {
1055 switch (CastOpc) {
1056 case Instruction::CastOps::ZExt:
1057 return PR_ZeroExtend;
1058 case Instruction::CastOps::SExt:
1059 return PR_SignExtend;
1060 case Instruction::CastOps::FPExt:
1061 return PR_FPExtend;
1062 default:
1063 return PR_None;
1064 }
1065 llvm_unreachable("Unhandled cast opcode");
1066}
1067
1068TTI::CastContextHint
1069TargetTransformInfo::getCastContextHint(const Instruction *I) {
1070 if (!I)
1071 return CastContextHint::None;
1072
1073 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
1074 unsigned GatScatOp) {
1075 const Instruction *I = dyn_cast<Instruction>(Val: V);
1076 if (!I)
1077 return CastContextHint::None;
1078
1079 if (I->getOpcode() == LdStOp)
1080 return CastContextHint::Normal;
1081
1082 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Val: I)) {
1083 if (II->getIntrinsicID() == MaskedOp)
1084 return TTI::CastContextHint::Masked;
1085 if (II->getIntrinsicID() == GatScatOp)
1086 return TTI::CastContextHint::GatherScatter;
1087 }
1088
1089 return TTI::CastContextHint::None;
1090 };
1091
1092 switch (I->getOpcode()) {
1093 case Instruction::ZExt:
1094 case Instruction::SExt:
1095 case Instruction::FPExt:
1096 return getLoadStoreKind(I->getOperand(i: 0), Instruction::Load,
1097 Intrinsic::masked_load, Intrinsic::masked_gather);
1098 case Instruction::Trunc:
1099 case Instruction::FPTrunc:
1100 if (I->hasOneUse())
1101 return getLoadStoreKind(*I->user_begin(), Instruction::Store,
1102 Intrinsic::masked_store,
1103 Intrinsic::masked_scatter);
1104 break;
1105 default:
1106 return CastContextHint::None;
1107 }
1108
1109 return TTI::CastContextHint::None;
1110}
1111
1112InstructionCost TargetTransformInfo::getCastInstrCost(
1113 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
1114 TTI::TargetCostKind CostKind, const Instruction *I) const {
1115 assert((I == nullptr || I->getOpcode() == Opcode) &&
1116 "Opcode should reflect passed instruction.");
1117 InstructionCost Cost =
1118 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
1119 assert(Cost >= 0 && "TTI should not produce negative costs!");
1120 return Cost;
1121}
1122
1123InstructionCost TargetTransformInfo::getExtractWithExtendCost(
1124 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index,
1125 TTI::TargetCostKind CostKind) const {
1126 InstructionCost Cost =
1127 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index, CostKind);
1128 assert(Cost >= 0 && "TTI should not produce negative costs!");
1129 return Cost;
1130}
1131
1132InstructionCost TargetTransformInfo::getCFInstrCost(
1133 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
1134 assert((I == nullptr || I->getOpcode() == Opcode) &&
1135 "Opcode should reflect passed instruction.");
1136 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
1137 assert(Cost >= 0 && "TTI should not produce negative costs!");
1138 return Cost;
1139}
1140
1141InstructionCost TargetTransformInfo::getCmpSelInstrCost(
1142 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1143 TTI::TargetCostKind CostKind, OperandValueInfo Op1Info,
1144 OperandValueInfo Op2Info, const Instruction *I) const {
1145 assert((I == nullptr || I->getOpcode() == Opcode) &&
1146 "Opcode should reflect passed instruction.");
1147 InstructionCost Cost = TTIImpl->getCmpSelInstrCost(
1148 Opcode, ValTy, CondTy, VecPred, CostKind, Op1Info, Op2Info, I);
1149 assert(Cost >= 0 && "TTI should not produce negative costs!");
1150 return Cost;
1151}
1152
1153InstructionCost TargetTransformInfo::getVectorInstrCost(
1154 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1155 const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC) const {
1156 assert((Opcode == Instruction::InsertElement ||
1157 Opcode == Instruction::ExtractElement) &&
1158 "Expecting Opcode to be insertelement/extractelement.");
1159 InstructionCost Cost =
1160 TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1, VIC);
1161 assert(Cost >= 0 && "TTI should not produce negative costs!");
1162 return Cost;
1163}
1164
1165InstructionCost TargetTransformInfo::getVectorInstrCost(
1166 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1167 Value *Scalar, ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1168 TTI::VectorInstrContext VIC) const {
1169 assert((Opcode == Instruction::InsertElement ||
1170 Opcode == Instruction::ExtractElement) &&
1171 "Expecting Opcode to be insertelement/extractelement.");
1172 InstructionCost Cost = TTIImpl->getVectorInstrCost(
1173 Opcode, Val, CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1174 assert(Cost >= 0 && "TTI should not produce negative costs!");
1175 return Cost;
1176}
1177
1178InstructionCost TargetTransformInfo::getVectorInstrCost(
1179 const Instruction &I, Type *Val, TTI::TargetCostKind CostKind,
1180 unsigned Index, TTI::VectorInstrContext VIC) const {
1181 // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
1182 // This is mentioned in the interface description and respected by all
1183 // callers, but never asserted upon.
1184 InstructionCost Cost =
1185 TTIImpl->getVectorInstrCost(I, Val, CostKind, Index, VIC);
1186 assert(Cost >= 0 && "TTI should not produce negative costs!");
1187 return Cost;
1188}
1189
1190InstructionCost TargetTransformInfo::getIndexedVectorInstrCostFromEnd(
1191 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind,
1192 unsigned Index) const {
1193 InstructionCost Cost =
1194 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val, CostKind, Index);
1195 assert(Cost >= 0 && "TTI should not produce negative costs!");
1196 return Cost;
1197}
1198
1199InstructionCost TargetTransformInfo::getInsertExtractValueCost(
1200 unsigned Opcode, TTI::TargetCostKind CostKind) const {
1201 assert((Opcode == Instruction::InsertValue ||
1202 Opcode == Instruction::ExtractValue) &&
1203 "Expecting Opcode to be insertvalue/extractvalue.");
1204 InstructionCost Cost = TTIImpl->getInsertExtractValueCost(Opcode, CostKind);
1205 assert(Cost >= 0 && "TTI should not produce negative costs!");
1206 return Cost;
1207}
1208
1209InstructionCost TargetTransformInfo::getReplicationShuffleCost(
1210 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
1211 TTI::TargetCostKind CostKind) const {
1212 InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
1213 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
1214 assert(Cost >= 0 && "TTI should not produce negative costs!");
1215 return Cost;
1216}
1217
1218InstructionCost TargetTransformInfo::getMemoryOpCost(
1219 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1220 TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo,
1221 const Instruction *I) const {
1222 assert((I == nullptr || I->getOpcode() == Opcode) &&
1223 "Opcode should reflect passed instruction.");
1224 InstructionCost Cost = TTIImpl->getMemoryOpCost(
1225 Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
1226 assert(Cost >= 0 && "TTI should not produce negative costs!");
1227 return Cost;
1228}
1229
1230InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(
1231 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1232 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1233 bool UseMaskForCond, bool UseMaskForGaps) const {
1234 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1235 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1236 UseMaskForCond, UseMaskForGaps);
1237 assert(Cost >= 0 && "TTI should not produce negative costs!");
1238 return Cost;
1239}
1240
1241InstructionCost
1242TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
1243 TTI::TargetCostKind CostKind) const {
1244 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1245 assert(Cost >= 0 && "TTI should not produce negative costs!");
1246 return Cost;
1247}
1248
1249InstructionCost TargetTransformInfo::getMemIntrinsicInstrCost(
1250 const MemIntrinsicCostAttributes &MICA,
1251 TTI::TargetCostKind CostKind) const {
1252 InstructionCost Cost = TTIImpl->getMemIntrinsicInstrCost(MICA, CostKind);
1253 assert(Cost >= 0 && "TTI should not produce negative costs!");
1254 return Cost;
1255}
1256
1257InstructionCost
1258TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
1259 ArrayRef<Type *> Tys,
1260 TTI::TargetCostKind CostKind) const {
1261 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1262 assert(Cost >= 0 && "TTI should not produce negative costs!");
1263 return Cost;
1264}
1265
1266unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
1267 return TTIImpl->getNumberOfParts(Tp);
1268}
1269
1270InstructionCost TargetTransformInfo::getAddressComputationCost(
1271 Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
1272 TTI::TargetCostKind CostKind) const {
1273 InstructionCost Cost =
1274 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
1275 assert(Cost >= 0 && "TTI should not produce negative costs!");
1276 return Cost;
1277}
1278
1279InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
1280 InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1281 assert(Cost >= 0 && "TTI should not produce negative costs!");
1282 return Cost;
1283}
1284
1285uint64_t TargetTransformInfo::getMaxMemIntrinsicInlineSizeThreshold() const {
1286 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1287}
1288
1289InstructionCost TargetTransformInfo::getArithmeticReductionCost(
1290 unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1291 TTI::TargetCostKind CostKind) const {
1292 InstructionCost Cost =
1293 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1294 assert(Cost >= 0 && "TTI should not produce negative costs!");
1295 return Cost;
1296}
1297
1298InstructionCost TargetTransformInfo::getMinMaxReductionCost(
1299 Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
1300 TTI::TargetCostKind CostKind) const {
1301 InstructionCost Cost =
1302 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1303 assert(Cost >= 0 && "TTI should not produce negative costs!");
1304 return Cost;
1305}
1306
1307InstructionCost TargetTransformInfo::getExtendedReductionCost(
1308 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1309 std::optional<FastMathFlags> FMF, TTI::TargetCostKind CostKind) const {
1310 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1311 CostKind);
1312}
1313
1314InstructionCost TargetTransformInfo::getMulAccReductionCost(
1315 bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty,
1316 TTI::TargetCostKind CostKind) const {
1317 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1318 CostKind);
1319}
1320
1321InstructionCost
1322TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
1323 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1324}
1325
1326bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
1327 MemIntrinsicInfo &Info) const {
1328 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1329}
1330
1331unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
1332 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1333}
1334
1335Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
1336 IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate) const {
1337 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1338 CanCreate);
1339}
1340
1341Type *TargetTransformInfo::getMemcpyLoopLoweringType(
1342 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1343 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
1344 std::optional<uint32_t> AtomicElementSize) const {
1345 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1346 DestAddrSpace, SrcAlign, DestAlign,
1347 AtomicElementSize);
1348}
1349
1350void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
1351 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1352 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1353 Align SrcAlign, Align DestAlign,
1354 std::optional<uint32_t> AtomicCpySize) const {
1355 TTIImpl->getMemcpyLoopResidualLoweringType(
1356 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1357 DestAlign, AtomicCpySize);
1358}
1359
1360bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
1361 const Function *Callee) const {
1362 return TTIImpl->areInlineCompatible(Caller, Callee);
1363}
1364
1365unsigned
1366TargetTransformInfo::getInlineCallPenalty(const Function *F,
1367 const CallBase &Call,
1368 unsigned DefaultCallPenalty) const {
1369 return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1370}
1371
1372bool TargetTransformInfo::areTypesABICompatible(const Function *Caller,
1373 const Function *Callee,
1374 ArrayRef<Type *> Types) const {
1375 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1376}
1377
1378bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
1379 Type *Ty) const {
1380 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1381}
1382
1383bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
1384 Type *Ty) const {
1385 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1386}
1387
1388unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
1389 return TTIImpl->getLoadStoreVecRegBitWidth(AddrSpace: AS);
1390}
1391
1392bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
1393 return TTIImpl->isLegalToVectorizeLoad(LI);
1394}
1395
1396bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
1397 return TTIImpl->isLegalToVectorizeStore(SI);
1398}
1399
1400bool TargetTransformInfo::isLegalToVectorizeLoadChain(
1401 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1402 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1403 AddrSpace);
1404}
1405
1406bool TargetTransformInfo::isLegalToVectorizeStoreChain(
1407 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1408 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1409 AddrSpace);
1410}
1411
1412bool TargetTransformInfo::isLegalToVectorizeReduction(
1413 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1414 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1415}
1416
1417bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const {
1418 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1419}
1420
1421unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
1422 unsigned LoadSize,
1423 unsigned ChainSizeInBytes,
1424 VectorType *VecTy) const {
1425 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1426}
1427
1428unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
1429 unsigned StoreSize,
1430 unsigned ChainSizeInBytes,
1431 VectorType *VecTy) const {
1432 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1433}
1434
1435bool TargetTransformInfo::preferFixedOverScalableIfEqualCost(
1436 bool IsEpilogue) const {
1437 return TTIImpl->preferFixedOverScalableIfEqualCost(IsEpilogue);
1438}
1439
1440bool TargetTransformInfo::preferInLoopReduction(RecurKind Kind,
1441 Type *Ty) const {
1442 return TTIImpl->preferInLoopReduction(Kind, Ty);
1443}
1444
1445bool TargetTransformInfo::preferAlternateOpcodeVectorization() const {
1446 return TTIImpl->preferAlternateOpcodeVectorization();
1447}
1448
1449bool TargetTransformInfo::preferPredicatedReductionSelect() const {
1450 return TTIImpl->preferPredicatedReductionSelect();
1451}
1452
1453bool TargetTransformInfo::preferEpilogueVectorization() const {
1454 return TTIImpl->preferEpilogueVectorization();
1455}
1456
1457bool TargetTransformInfo::shouldConsiderVectorizationRegPressure() const {
1458 return TTIImpl->shouldConsiderVectorizationRegPressure();
1459}
1460
1461TargetTransformInfo::VPLegalization
1462TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const {
1463 return TTIImpl->getVPLegalizationStrategy(PI: VPI);
1464}
1465
1466bool TargetTransformInfo::hasArmWideBranch(bool Thumb) const {
1467 return TTIImpl->hasArmWideBranch(Thumb);
1468}
1469
1470APInt TargetTransformInfo::getFeatureMask(const Function &F) const {
1471 return TTIImpl->getFeatureMask(F);
1472}
1473
1474APInt TargetTransformInfo::getPriorityMask(const Function &F) const {
1475 return TTIImpl->getPriorityMask(F);
1476}
1477
1478bool TargetTransformInfo::isMultiversionedFunction(const Function &F) const {
1479 return TTIImpl->isMultiversionedFunction(F);
1480}
1481
1482unsigned TargetTransformInfo::getMaxNumArgs() const {
1483 return TTIImpl->getMaxNumArgs();
1484}
1485
1486bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
1487 return TTIImpl->shouldExpandReduction(II);
1488}
1489
1490TargetTransformInfo::ReductionShuffle
1491TargetTransformInfo::getPreferredExpandedReductionShuffle(
1492 const IntrinsicInst *II) const {
1493 return TTIImpl->getPreferredExpandedReductionShuffle(II);
1494}
1495
1496unsigned TargetTransformInfo::getGISelRematGlobalCost() const {
1497 return TTIImpl->getGISelRematGlobalCost();
1498}
1499
1500unsigned TargetTransformInfo::getMinTripCountTailFoldingThreshold() const {
1501 return TTIImpl->getMinTripCountTailFoldingThreshold();
1502}
1503
1504bool TargetTransformInfo::supportsScalableVectors() const {
1505 return TTIImpl->supportsScalableVectors();
1506}
1507
1508bool TargetTransformInfo::enableScalableVectorization() const {
1509 return TTIImpl->enableScalableVectorization();
1510}
1511
1512bool TargetTransformInfo::hasActiveVectorLength() const {
1513 return TTIImpl->hasActiveVectorLength();
1514}
1515
1516bool TargetTransformInfo::isProfitableToSinkOperands(
1517 Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
1518 return TTIImpl->isProfitableToSinkOperands(I, Ops&: OpsToSink);
1519}
1520
1521bool TargetTransformInfo::isVectorShiftByScalarCheap(Type *Ty) const {
1522 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1523}
1524
1525unsigned
1526TargetTransformInfo::getNumBytesToPadGlobalArray(unsigned Size,
1527 Type *ArrayType) const {
1528 return TTIImpl->getNumBytesToPadGlobalArray(Size, ArrayType);
1529}
1530
1531void TargetTransformInfo::collectKernelLaunchBounds(
1532 const Function &F,
1533 SmallVectorImpl<std::pair<StringRef, int64_t>> &LB) const {
1534 return TTIImpl->collectKernelLaunchBounds(F, LB);
1535}
1536
1537bool TargetTransformInfo::allowVectorElementIndexingUsingGEP() const {
1538 return TTIImpl->allowVectorElementIndexingUsingGEP();
1539}
1540
1541TargetTransformInfoImplBase::~TargetTransformInfoImplBase() = default;
1542
1543TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1544
1545TargetIRAnalysis::TargetIRAnalysis(
1546 std::function<Result(const Function &)> TTICallback)
1547 : TTICallback(std::move(TTICallback)) {}
1548
1549TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1550 FunctionAnalysisManager &) {
1551 assert(!F.isIntrinsic() && "Should not request TTI for intrinsics");
1552 return TTICallback(F);
1553}
1554
1555AnalysisKey TargetIRAnalysis::Key;
1556
1557TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1558 return Result(F.getDataLayout());
1559}
1560
1561// Register the basic pass.
1562INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1563 "Target Transform Information", false, true)
1564char TargetTransformInfoWrapperPass::ID = 0;
1565
1566void TargetTransformInfoWrapperPass::anchor() {}
1567
1568TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1569 : ImmutablePass(ID) {}
1570
1571TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1572 TargetIRAnalysis TIRA)
1573 : ImmutablePass(ID), TIRA(std::move(TIRA)) {}
1574
1575TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1576 FunctionAnalysisManager DummyFAM;
1577 TTI = TIRA.run(F, DummyFAM);
1578 return *TTI;
1579}
1580
1581ImmutablePass *
1582llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1583 return new TargetTransformInfoWrapperPass(std::move(TIRA));
1584}
1585