1//===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "llvm/Analysis/TargetTransformInfo.h"
10#include "llvm/ADT/SmallVector.h"
11#include "llvm/Analysis/CFG.h"
12#include "llvm/Analysis/LoopIterator.h"
13#include "llvm/Analysis/TargetLibraryInfo.h"
14#include "llvm/Analysis/TargetTransformInfoImpl.h"
15#include "llvm/IR/CFG.h"
16#include "llvm/IR/Dominators.h"
17#include "llvm/IR/Instruction.h"
18#include "llvm/IR/Instructions.h"
19#include "llvm/IR/IntrinsicInst.h"
20#include "llvm/IR/Module.h"
21#include "llvm/IR/Operator.h"
22#include "llvm/InitializePasses.h"
23#include "llvm/Support/CommandLine.h"
24#include <optional>
25#include <utility>
26
27using namespace llvm;
28using namespace PatternMatch;
29
30#define DEBUG_TYPE "tti"
31
32static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(Val: false),
33 cl::Hidden,
34 cl::desc("Recognize reduction patterns."));
35
36static cl::opt<unsigned> CacheLineSize(
37 "cache-line-size", cl::init(Val: 0), cl::Hidden,
38 cl::desc("Use this to override the target cache line size when "
39 "specified by the user."));
40
41static cl::opt<unsigned> MinPageSize(
42 "min-page-size", cl::init(Val: 0), cl::Hidden,
43 cl::desc("Use this to override the target's minimum page size."));
44
45static cl::opt<unsigned> PredictableBranchThreshold(
46 "predictable-branch-threshold", cl::init(Val: 99), cl::Hidden,
47 cl::desc(
48 "Use this to override the target's predictable branch threshold (%)."));
49
50namespace {
51/// No-op implementation of the TTI interface using the utility base
52/// classes.
53///
54/// This is used when no target specific information is available.
55struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
56 explicit NoTTIImpl(const DataLayout &DL)
57 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
58};
59} // namespace
60
61TargetTransformInfo::TargetTransformInfo(
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
63 : TTIImpl(std::move(Impl)) {}
64
65bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
66 // If the loop has irreducible control flow, it can not be converted to
67 // Hardware loop.
68 LoopBlocksRPO RPOT(L);
69 RPOT.perform(LI: &LI);
70 if (containsIrreducibleCFG<const BasicBlock *>(RPOTraversal&: RPOT, LI))
71 return false;
72 return true;
73}
74
75IntrinsicCostAttributes::IntrinsicCostAttributes(
76 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
77 bool TypeBasedOnly)
78 : II(dyn_cast<IntrinsicInst>(Val: &CI)), RetTy(CI.getType()), IID(Id),
79 ScalarizationCost(ScalarizationCost) {
80
81 if (const auto *FPMO = dyn_cast<FPMathOperator>(Val: &CI))
82 FMF = FPMO->getFastMathFlags();
83
84 if (!TypeBasedOnly)
85 Arguments.insert(I: Arguments.begin(), From: CI.arg_begin(), To: CI.arg_end());
86 FunctionType *FTy = CI.getCalledFunction()->getFunctionType();
87 ParamTys.insert(I: ParamTys.begin(), From: FTy->param_begin(), To: FTy->param_end());
88}
89
90IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
91 ArrayRef<Type *> Tys,
92 FastMathFlags Flags,
93 const IntrinsicInst *I,
94 InstructionCost ScalarCost)
95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
97}
98
99IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty,
100 ArrayRef<const Value *> Args)
101 : RetTy(Ty), IID(Id) {
102
103 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
104 ParamTys.reserve(N: Arguments.size());
105 for (const Value *Argument : Arguments)
106 ParamTys.push_back(Elt: Argument->getType());
107}
108
109IntrinsicCostAttributes::IntrinsicCostAttributes(
110 Intrinsic::ID Id, Type *RTy, ArrayRef<const Value *> Args,
111 ArrayRef<Type *> Tys, FastMathFlags Flags, const IntrinsicInst *I,
112 InstructionCost ScalarCost, VectorInstrContext VIC)
113 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
114 VIC(VIC) {
115 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
116 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
117}
118
119HardwareLoopInfo::HardwareLoopInfo(Loop *L) : L(L) {
120 // Match default options:
121 // - hardware-loop-counter-bitwidth = 32
122 // - hardware-loop-decrement = 1
123 CountType = Type::getInt32Ty(C&: L->getHeader()->getContext());
124 LoopDecrement = ConstantInt::get(Ty: CountType, V: 1);
125}
126
127bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
128 LoopInfo &LI, DominatorTree &DT,
129 bool ForceNestedLoop,
130 bool ForceHardwareLoopPHI) {
131 SmallVector<BasicBlock *, 4> ExitingBlocks;
132 L->getExitingBlocks(ExitingBlocks);
133
134 for (BasicBlock *BB : ExitingBlocks) {
135 // If we pass the updated counter back through a phi, we need to know
136 // which latch the updated value will be coming from.
137 if (!L->isLoopLatch(BB)) {
138 if (ForceHardwareLoopPHI || CounterInReg)
139 continue;
140 }
141
142 const SCEV *EC = SE.getExitCount(L, ExitingBlock: BB);
143 if (isa<SCEVCouldNotCompute>(Val: EC))
144 continue;
145 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(Val: EC)) {
146 if (ConstEC->getValue()->isZero())
147 continue;
148 } else if (!SE.isLoopInvariant(S: EC, L))
149 continue;
150
151 if (SE.getTypeSizeInBits(Ty: EC->getType()) > CountType->getBitWidth())
152 continue;
153
154 // If this exiting block is contained in a nested loop, it is not eligible
155 // for insertion of the branch-and-decrement since the inner loop would
156 // end up messing up the value in the CTR.
157 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
158 continue;
159
160 // We now have a loop-invariant count of loop iterations (which is not the
161 // constant zero) for which we know that this loop will not exit via this
162 // existing block.
163
164 // We need to make sure that this block will run on every loop iteration.
165 // For this to be true, we must dominate all blocks with backedges. Such
166 // blocks are in-loop predecessors to the header block.
167 bool NotAlways = false;
168 for (BasicBlock *Pred : predecessors(BB: L->getHeader())) {
169 if (!L->contains(BB: Pred))
170 continue;
171
172 if (!DT.dominates(A: BB, B: Pred)) {
173 NotAlways = true;
174 break;
175 }
176 }
177
178 if (NotAlways)
179 continue;
180
181 // Make sure this blocks ends with a conditional branch.
182 Instruction *TI = BB->getTerminator();
183 if (!TI)
184 continue;
185
186 if (CondBrInst *BI = dyn_cast<CondBrInst>(Val: TI))
187 ExitBranch = BI;
188 else
189 continue;
190
191 // Note that this block may not be the loop latch block, even if the loop
192 // has a latch block.
193 ExitBlock = BB;
194 ExitCount = EC;
195 break;
196 }
197
198 if (!ExitBlock)
199 return false;
200 return true;
201}
202
203TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
204 : TTIImpl(std::make_unique<NoTTIImpl>(args: DL)) {}
205
206TargetTransformInfo::~TargetTransformInfo() = default;
207
208TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
209 : TTIImpl(std::move(Arg.TTIImpl)) {}
210
211TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
212 TTIImpl = std::move(RHS.TTIImpl);
213 return *this;
214}
215
216unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
217 return TTIImpl->getInliningThresholdMultiplier();
218}
219
220unsigned
221TargetTransformInfo::getInliningCostBenefitAnalysisSavingsMultiplier() const {
222 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
223}
224
225unsigned
226TargetTransformInfo::getInliningCostBenefitAnalysisProfitableMultiplier()
227 const {
228 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
229}
230
231int TargetTransformInfo::getInliningLastCallToStaticBonus() const {
232 return TTIImpl->getInliningLastCallToStaticBonus();
233}
234
235unsigned
236TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const {
237 return TTIImpl->adjustInliningThreshold(CB);
238}
239
240unsigned TargetTransformInfo::getCallerAllocaCost(const CallBase *CB,
241 const AllocaInst *AI) const {
242 return TTIImpl->getCallerAllocaCost(CB, AI);
243}
244
245int TargetTransformInfo::getInlinerVectorBonusPercent() const {
246 return TTIImpl->getInlinerVectorBonusPercent();
247}
248
249InstructionCost TargetTransformInfo::getGEPCost(
250 Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
251 Type *AccessType, TTI::TargetCostKind CostKind) const {
252 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
253}
254
255InstructionCost TargetTransformInfo::getPointersChainCost(
256 ArrayRef<const Value *> Ptrs, const Value *Base,
257 const TTI::PointersChainInfo &Info, Type *AccessTy,
258 TTI::TargetCostKind CostKind) const {
259 assert((Base || !Info.isSameBase()) &&
260 "If pointers have same base address it has to be provided.");
261 return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
262}
263
264unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(
265 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
266 BlockFrequencyInfo *BFI) const {
267 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
268}
269
270InstructionCost
271TargetTransformInfo::getInstructionCost(const User *U,
272 ArrayRef<const Value *> Operands,
273 enum TargetCostKind CostKind) const {
274 InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
275 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) &&
276 "TTI should not produce negative costs!");
277 return Cost;
278}
279
280BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const {
281 return PredictableBranchThreshold.getNumOccurrences() > 0
282 ? BranchProbability(PredictableBranchThreshold, 100)
283 : TTIImpl->getPredictableBranchThreshold();
284}
285
286InstructionCost TargetTransformInfo::getBranchMispredictPenalty() const {
287 return TTIImpl->getBranchMispredictPenalty();
288}
289
290bool TargetTransformInfo::hasBranchDivergence(const Function *F) const {
291 return TTIImpl->hasBranchDivergence(F);
292}
293
294ValueUniformity
295llvm::TargetTransformInfo::getValueUniformity(const Value *V) const {
296 ValueUniformity VU = TTIImpl->getValueUniformity(V);
297 if (const auto *Call = dyn_cast<CallBase>(Val: V)) {
298 if (VU == ValueUniformity::NeverUniform &&
299 Call->hasFnAttr(Kind: Attribute::NoDivergenceSource))
300 return ValueUniformity::Default;
301 }
302 return VU;
303}
304
305bool llvm::TargetTransformInfo::isValidAddrSpaceCast(unsigned FromAS,
306 unsigned ToAS) const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
308}
309
310bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned FromAS,
311 unsigned ToAS) const {
312 return TTIImpl->addrspacesMayAlias(AS0: FromAS, AS1: ToAS);
313}
314
315unsigned TargetTransformInfo::getFlatAddressSpace() const {
316 return TTIImpl->getFlatAddressSpace();
317}
318
319bool TargetTransformInfo::collectFlatAddressOperands(
320 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
321 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
322}
323
324bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
325 unsigned ToAS) const {
326 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
327}
328
329std::pair<KnownBits, KnownBits>
330TargetTransformInfo::computeKnownBitsAddrSpaceCast(unsigned ToAS,
331 const Value &PtrOp) const {
332 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
333}
334
335KnownBits TargetTransformInfo::computeKnownBitsAddrSpaceCast(
336 unsigned FromAS, unsigned ToAS, const KnownBits &FromPtrBits) const {
337 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
338}
339
340APInt TargetTransformInfo::getAddrSpaceCastPreservedPtrMask(
341 unsigned SrcAS, unsigned DstAS) const {
342 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
343}
344
345bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace(
346 unsigned AS) const {
347 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
348}
349
350unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const {
351 return TTIImpl->getAssumedAddrSpace(V);
352}
353
354bool TargetTransformInfo::isSingleThreaded() const {
355 return TTIImpl->isSingleThreaded();
356}
357
358std::pair<const Value *, unsigned>
359TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const {
360 return TTIImpl->getPredicatedAddrSpace(V);
361}
362
363Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace(
364 IntrinsicInst *II, Value *OldV, Value *NewV) const {
365 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
366}
367
368bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
369 return TTIImpl->isLoweredToCall(F);
370}
371
372bool TargetTransformInfo::isHardwareLoopProfitable(
373 Loop *L, ScalarEvolution &SE, AssumptionCache &AC,
374 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
375 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
376}
377
378unsigned TargetTransformInfo::getEpilogueVectorizationMinVF() const {
379 return TTIImpl->getEpilogueVectorizationMinVF();
380}
381
382bool TargetTransformInfo::preferTailFoldingOverEpilogue(
383 TailFoldingInfo *TFI) const {
384 return TTIImpl->preferTailFoldingOverEpilogue(TFI);
385}
386
387TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle() const {
388 return TTIImpl->getPreferredTailFoldingStyle();
389}
390
391std::optional<Instruction *>
392TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC,
393 IntrinsicInst &II) const {
394 return TTIImpl->instCombineIntrinsic(IC, II);
395}
396
397std::optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(
398 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
399 bool &KnownBitsComputed) const {
400 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
401 KnownBitsComputed);
402}
403
404std::optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(
405 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
406 APInt &UndefElts2, APInt &UndefElts3,
407 std::function<void(Instruction *, unsigned, APInt, APInt &)>
408 SimplifyAndSetOp) const {
409 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
410 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
411 SimplifyAndSetOp);
412}
413
414void TargetTransformInfo::getUnrollingPreferences(
415 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP,
416 OptimizationRemarkEmitter *ORE) const {
417 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
418}
419
420void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
421 PeelingPreferences &PP) const {
422 return TTIImpl->getPeelingPreferences(L, SE, PP);
423}
424
425bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
426 return TTIImpl->isLegalAddImmediate(Imm);
427}
428
429bool TargetTransformInfo::isLegalAddScalableImmediate(int64_t Imm) const {
430 return TTIImpl->isLegalAddScalableImmediate(Imm);
431}
432
433bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
434 return TTIImpl->isLegalICmpImmediate(Imm);
435}
436
437bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
438 int64_t BaseOffset,
439 bool HasBaseReg, int64_t Scale,
440 unsigned AddrSpace,
441 Instruction *I,
442 int64_t ScalableOffset) const {
443 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
444 Scale, AddrSpace, I, ScalableOffset);
445}
446
447bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1,
448 const LSRCost &C2) const {
449 return TTIImpl->isLSRCostLess(C1, C2);
450}
451
452bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const {
453 return TTIImpl->isNumRegsMajorCostOfLSR();
454}
455
456bool TargetTransformInfo::shouldDropLSRSolutionIfLessProfitable() const {
457 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
458}
459
460bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const {
461 return TTIImpl->isProfitableLSRChainElement(I);
462}
463
464bool TargetTransformInfo::canMacroFuseCmp() const {
465 return TTIImpl->canMacroFuseCmp();
466}
467
468bool TargetTransformInfo::canSaveCmp(Loop *L, CondBrInst **BI,
469 ScalarEvolution *SE, LoopInfo *LI,
470 DominatorTree *DT, AssumptionCache *AC,
471 TargetLibraryInfo *LibInfo) const {
472 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
473}
474
475TTI::AddressingModeKind
476TargetTransformInfo::getPreferredAddressingMode(const Loop *L,
477 ScalarEvolution *SE) const {
478 return TTIImpl->getPreferredAddressingMode(L, SE);
479}
480
481bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, Align Alignment,
482 unsigned AddressSpace,
483 TTI::MaskKind MaskKind) const {
484 return TTIImpl->isLegalMaskedStore(DataType, Alignment, AddressSpace,
485 MaskKind);
486}
487
488bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, Align Alignment,
489 unsigned AddressSpace,
490 TTI::MaskKind MaskKind) const {
491 return TTIImpl->isLegalMaskedLoad(DataType, Alignment, AddressSpace,
492 MaskKind);
493}
494
495bool TargetTransformInfo::isLegalNTStore(Type *DataType,
496 Align Alignment) const {
497 return TTIImpl->isLegalNTStore(DataType, Alignment);
498}
499
500bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
501 return TTIImpl->isLegalNTLoad(DataType, Alignment);
502}
503
504bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy,
505 ElementCount NumElements) const {
506 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
507}
508
509bool TargetTransformInfo::isLegalMaskedGather(Type *DataType,
510 Align Alignment) const {
511 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
512}
513
514bool TargetTransformInfo::isLegalAltInstr(
515 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
516 const SmallBitVector &OpcodeMask) const {
517 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
518}
519
520bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType,
521 Align Alignment) const {
522 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
523}
524
525bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType,
526 Align Alignment) const {
527 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
528}
529
530bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType,
531 Align Alignment) const {
532 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
533}
534
535bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType,
536 Align Alignment) const {
537 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
538}
539
540bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType,
541 Align Alignment) const {
542 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
543}
544
545bool TargetTransformInfo::isLegalStridedLoadStore(Type *DataType,
546 Align Alignment) const {
547 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
548}
549
550bool TargetTransformInfo::isLegalInterleavedAccessType(
551 VectorType *VTy, unsigned Factor, Align Alignment,
552 unsigned AddrSpace) const {
553 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
554 AddrSpace);
555}
556
557bool TargetTransformInfo::isLegalMaskedVectorHistogram(Type *AddrType,
558 Type *DataType) const {
559 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
560}
561
562bool TargetTransformInfo::enableOrderedReductions() const {
563 return TTIImpl->enableOrderedReductions();
564}
565
566bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
567 return TTIImpl->hasDivRemOp(DataType, IsSigned);
568}
569
570bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
571 unsigned AddrSpace) const {
572 return TTIImpl->hasVolatileVariant(I, AddrSpace);
573}
574
575bool TargetTransformInfo::prefersVectorizedAddressing() const {
576 return TTIImpl->prefersVectorizedAddressing();
577}
578
579InstructionCost TargetTransformInfo::getScalingFactorCost(
580 Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg,
581 int64_t Scale, unsigned AddrSpace) const {
582 InstructionCost Cost = TTIImpl->getScalingFactorCost(
583 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
584 assert(Cost >= 0 && "TTI should not produce negative costs!");
585 return Cost;
586}
587
588bool TargetTransformInfo::LSRWithInstrQueries() const {
589 return TTIImpl->LSRWithInstrQueries();
590}
591
592bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
593 return TTIImpl->isTruncateFree(Ty1, Ty2);
594}
595
596bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
597 return TTIImpl->isProfitableToHoist(I);
598}
599
600bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
601
602bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
603 return TTIImpl->isTypeLegal(Ty);
604}
605
606unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const {
607 return TTIImpl->getRegUsageForType(Ty);
608}
609
610bool TargetTransformInfo::shouldBuildLookupTables() const {
611 return TTIImpl->shouldBuildLookupTables();
612}
613
614bool TargetTransformInfo::shouldBuildLookupTablesForConstant(
615 Constant *C) const {
616 return TTIImpl->shouldBuildLookupTablesForConstant(C);
617}
618
619unsigned TargetTransformInfo::getMinimumLookupTableEntryBitWidth() const {
620 return TTIImpl->getMinimumLookupTableEntryBitWidth();
621}
622
623bool TargetTransformInfo::shouldBuildRelLookupTables() const {
624 return TTIImpl->shouldBuildRelLookupTables();
625}
626
627bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
628 return TTIImpl->useColdCCForColdCall(F);
629}
630
631bool TargetTransformInfo::useFastCCForInternalCall(Function &F) const {
632 return TTIImpl->useFastCCForInternalCall(F);
633}
634
635bool TargetTransformInfo::isTargetIntrinsicWithScalarOpAtArg(
636 Intrinsic::ID ID, unsigned ScalarOpdIdx) const {
637 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
638}
639
640bool TargetTransformInfo::isTargetIntrinsicWithOverloadTypeAtArg(
641 Intrinsic::ID ID, int OpdIdx) const {
642 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
643}
644
645bool TargetTransformInfo::isTargetIntrinsicWithStructReturnOverloadAtField(
646 Intrinsic::ID ID, int RetIdx) const {
647 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
648}
649
650TargetTransformInfo::VectorInstrContext
651TargetTransformInfo::getVectorInstrContextHint(const Instruction *I) {
652 if (!I)
653 return VectorInstrContext::None;
654
655 // For inserts, check if the value being inserted comes from a single-use
656 // load.
657 if (isa<InsertElementInst>(Val: I) && isa<LoadInst>(Val: I->getOperand(i: 1)) &&
658 I->getOperand(i: 1)->hasOneUse())
659 return VectorInstrContext::Load;
660
661 // For extracts, check if it has a single use that is a store.
662 if (isa<ExtractElementInst>(Val: I) && I->hasOneUse() &&
663 isa<StoreInst>(Val: *I->user_begin()))
664 return VectorInstrContext::Store;
665
666 return VectorInstrContext::None;
667}
668
669InstructionCost TargetTransformInfo::getScalarizationOverhead(
670 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
671 TTI::TargetCostKind CostKind, bool ForPoisonSrc, ArrayRef<Value *> VL,
672 TTI::VectorInstrContext VIC) const {
673 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
674 CostKind, ForPoisonSrc, VL, VIC);
675}
676
677InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(
678 ArrayRef<Type *> Tys, TTI::TargetCostKind CostKind,
679 TTI::VectorInstrContext VIC) const {
680 return TTIImpl->getOperandsScalarizationOverhead(Tys, CostKind, VIC);
681}
682
683bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
684 return TTIImpl->supportsEfficientVectorElementLoadStore();
685}
686
687bool TargetTransformInfo::supportsTailCalls() const {
688 return TTIImpl->supportsTailCalls();
689}
690
691bool TargetTransformInfo::supportsTailCallFor(const CallBase *CB) const {
692 return TTIImpl->supportsTailCallFor(CB);
693}
694
695bool TargetTransformInfo::enableAggressiveInterleaving(
696 bool LoopHasReductions) const {
697 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
698}
699
700TargetTransformInfo::MemCmpExpansionOptions
701TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
702 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
703}
704
705bool TargetTransformInfo::enableSelectOptimize() const {
706 return TTIImpl->enableSelectOptimize();
707}
708
709bool TargetTransformInfo::shouldTreatInstructionLikeSelect(
710 const Instruction *I) const {
711 return TTIImpl->shouldTreatInstructionLikeSelect(I);
712}
713
714bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
715 return TTIImpl->enableInterleavedAccessVectorization();
716}
717
718bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
719 return TTIImpl->enableMaskedInterleavedAccessVectorization();
720}
721
722bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
723 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
724}
725
726bool
727TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
728 unsigned BitWidth,
729 unsigned AddressSpace,
730 Align Alignment,
731 unsigned *Fast) const {
732 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
733 AddressSpace, Alignment, Fast);
734}
735
736TargetTransformInfo::PopcntSupportKind
737TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
738 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
739}
740
741bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
742 return TTIImpl->haveFastSqrt(Ty);
743}
744
745bool TargetTransformInfo::haveFastClmul(IntegerType *Ty) const {
746 return TTIImpl->haveFastClmul(Ty);
747}
748
749bool TargetTransformInfo::isExpensiveToSpeculativelyExecute(
750 const Instruction *I) const {
751 return TTIImpl->isExpensiveToSpeculativelyExecute(I);
752}
753
754bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
755 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
756}
757
758InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const {
759 InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
760 assert(Cost >= 0 && "TTI should not produce negative costs!");
761 return Cost;
762}
763
764InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode,
765 unsigned Idx,
766 const APInt &Imm,
767 Type *Ty) const {
768 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
769 assert(Cost >= 0 && "TTI should not produce negative costs!");
770 return Cost;
771}
772
773InstructionCost
774TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty,
775 TTI::TargetCostKind CostKind) const {
776 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
777 assert(Cost >= 0 && "TTI should not produce negative costs!");
778 return Cost;
779}
780
781InstructionCost TargetTransformInfo::getIntImmCostInst(
782 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
783 TTI::TargetCostKind CostKind, Instruction *Inst) const {
784 InstructionCost Cost =
785 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
786 assert(Cost >= 0 && "TTI should not produce negative costs!");
787 return Cost;
788}
789
790InstructionCost
791TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
792 const APInt &Imm, Type *Ty,
793 TTI::TargetCostKind CostKind) const {
794 InstructionCost Cost =
795 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
796 assert(Cost >= 0 && "TTI should not produce negative costs!");
797 return Cost;
798}
799
800bool TargetTransformInfo::preferToKeepConstantsAttached(
801 const Instruction &Inst, const Function &Fn) const {
802 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
803}
804
805unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
806 return TTIImpl->getNumberOfRegisters(ClassID);
807}
808
809bool TargetTransformInfo::hasConditionalLoadStoreForType(Type *Ty,
810 bool IsStore) const {
811 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
812}
813
814unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
815 Type *Ty) const {
816 return TTIImpl->getRegisterClassForType(Vector, Ty);
817}
818
819const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
820 return TTIImpl->getRegisterClassName(ClassID);
821}
822
823InstructionCost TargetTransformInfo::getRegisterClassSpillCost(
824 unsigned ClassID, TTI::TargetCostKind CostKind) const {
825 return TTIImpl->getRegisterClassSpillCost(ClassID, CostKind);
826}
827
828InstructionCost TargetTransformInfo::getRegisterClassReloadCost(
829 unsigned ClassID, TTI::TargetCostKind CostKind) const {
830 return TTIImpl->getRegisterClassReloadCost(ClassID, CostKind);
831}
832
833TypeSize TargetTransformInfo::getRegisterBitWidth(
834 TargetTransformInfo::RegisterKind K) const {
835 return TTIImpl->getRegisterBitWidth(K);
836}
837
838unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
839 return TTIImpl->getMinVectorRegisterBitWidth();
840}
841
842std::optional<unsigned> TargetTransformInfo::getMaxVScale() const {
843 return TTIImpl->getMaxVScale();
844}
845
846std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
847 return TTIImpl->getVScaleForTuning();
848}
849
850bool TargetTransformInfo::shouldMaximizeVectorBandwidth(
851 TargetTransformInfo::RegisterKind K) const {
852 return TTIImpl->shouldMaximizeVectorBandwidth(K);
853}
854
855ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
856 bool IsScalable) const {
857 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
858}
859
860unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
861 unsigned Opcode) const {
862 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
863}
864
865unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
866 Type *ScalarValTy,
867 Align Alignment,
868 unsigned AddrSpace) const {
869 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy, Alignment,
870 AddrSpace);
871}
872
873bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
874 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
875 return TTIImpl->shouldConsiderAddressTypePromotion(
876 I, AllowPromotionWithoutCommonHeader);
877}
878
879unsigned TargetTransformInfo::getCacheLineSize() const {
880 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
881 : TTIImpl->getCacheLineSize();
882}
883
884std::optional<unsigned>
885TargetTransformInfo::getCacheSize(CacheLevel Level) const {
886 return TTIImpl->getCacheSize(Level);
887}
888
889std::optional<unsigned>
890TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const {
891 return TTIImpl->getCacheAssociativity(Level);
892}
893
894std::optional<unsigned> TargetTransformInfo::getMinPageSize() const {
895 return MinPageSize.getNumOccurrences() > 0 ? MinPageSize
896 : TTIImpl->getMinPageSize();
897}
898
899unsigned TargetTransformInfo::getPrefetchDistance() const {
900 return TTIImpl->getPrefetchDistance();
901}
902
903unsigned TargetTransformInfo::getMinPrefetchStride(
904 unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
905 unsigned NumPrefetches, bool HasCall) const {
906 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
907 NumPrefetches, HasCall);
908}
909
910unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
911 return TTIImpl->getMaxPrefetchIterationsAhead();
912}
913
914bool TargetTransformInfo::enableWritePrefetching() const {
915 return TTIImpl->enableWritePrefetching();
916}
917
918bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
919 return TTIImpl->shouldPrefetchAddressSpace(AS);
920}
921
922InstructionCost TargetTransformInfo::getPartialReductionCost(
923 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
924 ElementCount VF, PartialReductionExtendKind OpAExtend,
925 PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
926 TTI::TargetCostKind CostKind, std::optional<FastMathFlags> FMF) const {
927 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
928 AccumType, VF, OpAExtend, OpBExtend,
929 BinOp, CostKind, FMF);
930}
931
932unsigned
933TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF,
934 bool HasUnorderedReductions) const {
935 return TTIImpl->getMaxInterleaveFactor(VF, HasUnorderedReductions);
936}
937
938TargetTransformInfo::OperandValueInfo
939TargetTransformInfo::getOperandInfo(const Value *V) {
940 OperandValueKind OpInfo = OK_AnyValue;
941 OperandValueProperties OpProps = OP_None;
942
943 // undef/poison don't materialize constants.
944 if (isa<UndefValue>(Val: V))
945 return {.Kind: OK_AnyValue, .Properties: OP_None};
946
947 if (isa<ConstantInt>(Val: V) || isa<ConstantFP>(Val: V)) {
948 if (const auto *CI = dyn_cast<ConstantInt>(Val: V)) {
949 if (CI->getValue().isPowerOf2())
950 OpProps = OP_PowerOf2;
951 else if (CI->getValue().isNegatedPowerOf2())
952 OpProps = OP_NegatedPowerOf2;
953 }
954 return {.Kind: OK_UniformConstantValue, .Properties: OpProps};
955 }
956
957 // A broadcast shuffle creates a uniform value.
958 // TODO: Add support for non-zero index broadcasts.
959 // TODO: Add support for different source vector width.
960 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(Val: V))
961 if (ShuffleInst->isZeroEltSplat())
962 OpInfo = OK_UniformValue;
963
964 const Value *Splat = getSplatValue(V);
965
966 // Check for a splat of a constant or for a non uniform vector of constants
967 // and check if the constant(s) are all powers of two.
968 if (Splat) {
969 // Check for a splat of a uniform value. This is not loop aware, so return
970 // true only for the obviously uniform cases (argument, globalvalue)
971 if (isa<Argument>(Val: Splat) || isa<GlobalValue>(Val: Splat)) {
972 OpInfo = OK_UniformValue;
973 } else if (isa<Constant>(Val: Splat)) {
974 OpInfo = OK_UniformConstantValue;
975 if (auto *CI = dyn_cast<ConstantInt>(Val: Splat)) {
976 if (CI->getValue().isPowerOf2())
977 OpProps = OP_PowerOf2;
978 else if (CI->getValue().isNegatedPowerOf2())
979 OpProps = OP_NegatedPowerOf2;
980 }
981 }
982 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(Val: V)) {
983 OpInfo = OK_NonUniformConstantValue;
984 bool AllPow2 = true, AllNegPow2 = true;
985 for (uint64_t I = 0, E = CDS->getNumElements(); I != E; ++I) {
986 if (auto *CI = dyn_cast<ConstantInt>(Val: CDS->getElementAsConstant(i: I))) {
987 AllPow2 &= CI->getValue().isPowerOf2();
988 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
989 if (AllPow2 || AllNegPow2)
990 continue;
991 }
992 AllPow2 = AllNegPow2 = false;
993 break;
994 }
995 OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
996 OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
997 } else if (isa<ConstantVector>(Val: V) || isa<ConstantDataVector>(Val: V)) {
998 OpInfo = OK_NonUniformConstantValue;
999 }
1000
1001 return {.Kind: OpInfo, .Properties: OpProps};
1002}
1003
1004TargetTransformInfo::OperandValueInfo
1005TargetTransformInfo::commonOperandInfo(const Value *X, const Value *Y) {
1006 OperandValueInfo OpInfoX = getOperandInfo(V: X);
1007 if (X == Y)
1008 return OpInfoX;
1009 return OpInfoX.mergeWith(OpInfoY: getOperandInfo(V: Y));
1010}
1011
1012InstructionCost TargetTransformInfo::getArithmeticInstrCost(
1013 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1014 OperandValueInfo Op1Info, OperandValueInfo Op2Info,
1015 ArrayRef<const Value *> Args, const Instruction *CxtI,
1016 const TargetLibraryInfo *TLibInfo) const {
1017
1018 // Use call cost for frem intructions that have platform specific vector math
1019 // functions, as those will be replaced with calls later by SelectionDAG or
1020 // ReplaceWithVecLib pass.
1021 if (TLibInfo && Opcode == Instruction::FRem) {
1022 VectorType *VecTy = dyn_cast<VectorType>(Val: Ty);
1023 LibFunc Func;
1024 if (VecTy &&
1025 TLibInfo->getLibFunc(Opcode: Instruction::FRem, Ty: Ty->getScalarType(), F&: Func) &&
1026 TLibInfo->isFunctionVectorizable(F: TLibInfo->getName(F: Func),
1027 VF: VecTy->getElementCount()))
1028 return getCallInstrCost(F: nullptr, RetTy: VecTy, Tys: {VecTy, VecTy}, CostKind);
1029 }
1030
1031 InstructionCost Cost = TTIImpl->getArithmeticInstrCost(
1032 Opcode, Ty, CostKind, Opd1Info: Op1Info, Opd2Info: Op2Info, Args, CxtI);
1033 assert(Cost >= 0 && "TTI should not produce negative costs!");
1034 return Cost;
1035}
1036
1037InstructionCost TargetTransformInfo::getAltInstrCost(
1038 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
1039 const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const {
1040 InstructionCost Cost =
1041 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);
1042 assert(Cost >= 0 && "TTI should not produce negative costs!");
1043 return Cost;
1044}
1045
1046InstructionCost TargetTransformInfo::getShuffleCost(
1047 ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef<int> Mask,
1048 TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
1049 ArrayRef<const Value *> Args, const Instruction *CxtI) const {
1050 assert((Mask.empty() || DstTy->isScalableTy() ||
1051 Mask.size() == DstTy->getElementCount().getKnownMinValue()) &&
1052 "Expected the Mask to match the return size if given");
1053 assert(SrcTy->getScalarType() == DstTy->getScalarType() &&
1054 "Expected the same scalar types");
1055 InstructionCost Cost = TTIImpl->getShuffleCost(
1056 Kind, DstTy, SrcTy, Mask, CostKind, Index, SubTp, Args, CxtI);
1057 assert(Cost >= 0 && "TTI should not produce negative costs!");
1058 return Cost;
1059}
1060
1061TargetTransformInfo::PartialReductionExtendKind
1062TargetTransformInfo::getPartialReductionExtendKind(Instruction *I) {
1063 if (auto *Cast = dyn_cast<CastInst>(Val: I))
1064 return getPartialReductionExtendKind(CastOpc: Cast->getOpcode());
1065 return PR_None;
1066}
1067
1068Instruction::CastOps
1069TargetTransformInfo::getOpcodeForPartialReductionExtendKind(
1070 TargetTransformInfo::PartialReductionExtendKind Kind) {
1071 switch (Kind) {
1072 case TargetTransformInfo::PR_ZeroExtend:
1073 return Instruction::CastOps::ZExt;
1074 case TargetTransformInfo::PR_SignExtend:
1075 return Instruction::CastOps::SExt;
1076 case TargetTransformInfo::PR_FPExtend:
1077 return Instruction::CastOps::FPExt;
1078 default:
1079 break;
1080 }
1081 llvm_unreachable("Unhandled partial reduction extend kind");
1082}
1083
1084TargetTransformInfo::PartialReductionExtendKind
1085TargetTransformInfo::getPartialReductionExtendKind(
1086 Instruction::CastOps CastOpc) {
1087 switch (CastOpc) {
1088 case Instruction::CastOps::ZExt:
1089 return PR_ZeroExtend;
1090 case Instruction::CastOps::SExt:
1091 return PR_SignExtend;
1092 case Instruction::CastOps::FPExt:
1093 return PR_FPExtend;
1094 default:
1095 return PR_None;
1096 }
1097 llvm_unreachable("Unhandled cast opcode");
1098}
1099
1100TTI::CastContextHint
1101TargetTransformInfo::getCastContextHint(const Instruction *I) {
1102 if (!I)
1103 return CastContextHint::None;
1104
1105 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
1106 unsigned GatScatOp) {
1107 const Instruction *I = dyn_cast<Instruction>(Val: V);
1108 if (!I)
1109 return CastContextHint::None;
1110
1111 if (I->getOpcode() == LdStOp)
1112 return CastContextHint::Normal;
1113
1114 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Val: I)) {
1115 if (II->getIntrinsicID() == MaskedOp)
1116 return TTI::CastContextHint::Masked;
1117 if (II->getIntrinsicID() == GatScatOp)
1118 return TTI::CastContextHint::GatherScatter;
1119 }
1120
1121 return TTI::CastContextHint::None;
1122 };
1123
1124 switch (I->getOpcode()) {
1125 case Instruction::ZExt:
1126 case Instruction::SExt:
1127 case Instruction::FPExt:
1128 return getLoadStoreKind(I->getOperand(i: 0), Instruction::Load,
1129 Intrinsic::masked_load, Intrinsic::masked_gather);
1130 case Instruction::Trunc:
1131 case Instruction::FPTrunc:
1132 if (I->hasOneUse())
1133 return getLoadStoreKind(*I->user_begin(), Instruction::Store,
1134 Intrinsic::masked_store,
1135 Intrinsic::masked_scatter);
1136 break;
1137 default:
1138 return CastContextHint::None;
1139 }
1140
1141 return TTI::CastContextHint::None;
1142}
1143
1144InstructionCost TargetTransformInfo::getCastInstrCost(
1145 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
1146 TTI::TargetCostKind CostKind, const Instruction *I) const {
1147 assert((I == nullptr || I->getOpcode() == Opcode) &&
1148 "Opcode should reflect passed instruction.");
1149 InstructionCost Cost =
1150 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
1151 assert(Cost >= 0 && "TTI should not produce negative costs!");
1152 return Cost;
1153}
1154
1155InstructionCost TargetTransformInfo::getExtractWithExtendCost(
1156 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index,
1157 TTI::TargetCostKind CostKind) const {
1158 InstructionCost Cost =
1159 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index, CostKind);
1160 assert(Cost >= 0 && "TTI should not produce negative costs!");
1161 return Cost;
1162}
1163
1164InstructionCost TargetTransformInfo::getCFInstrCost(
1165 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
1166 assert((I == nullptr || I->getOpcode() == Opcode) &&
1167 "Opcode should reflect passed instruction.");
1168 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
1169 assert(Cost >= 0 && "TTI should not produce negative costs!");
1170 return Cost;
1171}
1172
1173InstructionCost TargetTransformInfo::getCmpSelInstrCost(
1174 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1175 TTI::TargetCostKind CostKind, OperandValueInfo Op1Info,
1176 OperandValueInfo Op2Info, const Instruction *I) const {
1177 assert((I == nullptr || I->getOpcode() == Opcode) &&
1178 "Opcode should reflect passed instruction.");
1179 InstructionCost Cost = TTIImpl->getCmpSelInstrCost(
1180 Opcode, ValTy, CondTy, VecPred, CostKind, Op1Info, Op2Info, I);
1181 assert(Cost >= 0 && "TTI should not produce negative costs!");
1182 return Cost;
1183}
1184
1185InstructionCost TargetTransformInfo::getVectorInstrCost(
1186 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1187 const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC) const {
1188 assert((Opcode == Instruction::InsertElement ||
1189 Opcode == Instruction::ExtractElement) &&
1190 "Expecting Opcode to be insertelement/extractelement.");
1191 InstructionCost Cost =
1192 TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1, VIC);
1193 assert(Cost >= 0 && "TTI should not produce negative costs!");
1194 return Cost;
1195}
1196
1197InstructionCost TargetTransformInfo::getVectorInstrCost(
1198 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1199 Value *Scalar, ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1200 TTI::VectorInstrContext VIC) const {
1201 assert((Opcode == Instruction::InsertElement ||
1202 Opcode == Instruction::ExtractElement) &&
1203 "Expecting Opcode to be insertelement/extractelement.");
1204 InstructionCost Cost = TTIImpl->getVectorInstrCost(
1205 Opcode, Val, CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1206 assert(Cost >= 0 && "TTI should not produce negative costs!");
1207 return Cost;
1208}
1209
1210InstructionCost TargetTransformInfo::getVectorInstrCost(
1211 const Instruction &I, Type *Val, TTI::TargetCostKind CostKind,
1212 unsigned Index, TTI::VectorInstrContext VIC) const {
1213 // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
1214 // This is mentioned in the interface description and respected by all
1215 // callers, but never asserted upon.
1216 InstructionCost Cost =
1217 TTIImpl->getVectorInstrCost(I, Val, CostKind, Index, VIC);
1218 assert(Cost >= 0 && "TTI should not produce negative costs!");
1219 return Cost;
1220}
1221
1222InstructionCost TargetTransformInfo::getIndexedVectorInstrCostFromEnd(
1223 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind,
1224 unsigned Index) const {
1225 InstructionCost Cost =
1226 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val, CostKind, Index);
1227 assert(Cost >= 0 && "TTI should not produce negative costs!");
1228 return Cost;
1229}
1230
1231InstructionCost TargetTransformInfo::getInsertExtractValueCost(
1232 unsigned Opcode, TTI::TargetCostKind CostKind) const {
1233 assert((Opcode == Instruction::InsertValue ||
1234 Opcode == Instruction::ExtractValue) &&
1235 "Expecting Opcode to be insertvalue/extractvalue.");
1236 InstructionCost Cost = TTIImpl->getInsertExtractValueCost(Opcode, CostKind);
1237 assert(Cost >= 0 && "TTI should not produce negative costs!");
1238 return Cost;
1239}
1240
1241InstructionCost TargetTransformInfo::getReplicationShuffleCost(
1242 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
1243 TTI::TargetCostKind CostKind) const {
1244 InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
1245 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
1246 assert(Cost >= 0 && "TTI should not produce negative costs!");
1247 return Cost;
1248}
1249
1250InstructionCost TargetTransformInfo::getMemoryOpCost(
1251 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1252 TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo,
1253 const Instruction *I) const {
1254 assert((I == nullptr || I->getOpcode() == Opcode) &&
1255 "Opcode should reflect passed instruction.");
1256 InstructionCost Cost = TTIImpl->getMemoryOpCost(
1257 Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
1258 assert(Cost >= 0 && "TTI should not produce negative costs!");
1259 return Cost;
1260}
1261
1262InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(
1263 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1264 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1265 bool UseMaskForCond, bool UseMaskForGaps) const {
1266 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1267 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1268 UseMaskForCond, UseMaskForGaps);
1269 assert(Cost >= 0 && "TTI should not produce negative costs!");
1270 return Cost;
1271}
1272
1273InstructionCost
1274TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
1275 TTI::TargetCostKind CostKind) const {
1276 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1277 assert(Cost >= 0 && "TTI should not produce negative costs!");
1278 return Cost;
1279}
1280
1281InstructionCost TargetTransformInfo::getMemIntrinsicInstrCost(
1282 const MemIntrinsicCostAttributes &MICA,
1283 TTI::TargetCostKind CostKind) const {
1284 InstructionCost Cost = TTIImpl->getMemIntrinsicInstrCost(MICA, CostKind);
1285 assert(Cost >= 0 && "TTI should not produce negative costs!");
1286 return Cost;
1287}
1288
1289InstructionCost
1290TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
1291 ArrayRef<Type *> Tys,
1292 TTI::TargetCostKind CostKind) const {
1293 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1294 assert(Cost >= 0 && "TTI should not produce negative costs!");
1295 return Cost;
1296}
1297
1298unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
1299 return TTIImpl->getNumberOfParts(Tp);
1300}
1301
1302InstructionCost TargetTransformInfo::getAddressComputationCost(
1303 Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
1304 TTI::TargetCostKind CostKind) const {
1305 InstructionCost Cost =
1306 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
1307 assert(Cost >= 0 && "TTI should not produce negative costs!");
1308 return Cost;
1309}
1310
1311InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
1312 InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1313 assert(Cost >= 0 && "TTI should not produce negative costs!");
1314 return Cost;
1315}
1316
1317uint64_t TargetTransformInfo::getMaxMemIntrinsicInlineSizeThreshold() const {
1318 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1319}
1320
1321InstructionCost TargetTransformInfo::getArithmeticReductionCost(
1322 unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1323 TTI::TargetCostKind CostKind) const {
1324 InstructionCost Cost =
1325 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1326 assert(Cost >= 0 && "TTI should not produce negative costs!");
1327 return Cost;
1328}
1329
1330InstructionCost TargetTransformInfo::getMinMaxReductionCost(
1331 Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
1332 TTI::TargetCostKind CostKind) const {
1333 InstructionCost Cost =
1334 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1335 assert(Cost >= 0 && "TTI should not produce negative costs!");
1336 return Cost;
1337}
1338
1339InstructionCost TargetTransformInfo::getExtendedReductionCost(
1340 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1341 std::optional<FastMathFlags> FMF, TTI::TargetCostKind CostKind) const {
1342 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1343 CostKind);
1344}
1345
1346InstructionCost TargetTransformInfo::getMulAccReductionCost(
1347 bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty,
1348 TTI::TargetCostKind CostKind) const {
1349 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1350 CostKind);
1351}
1352
1353InstructionCost
1354TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
1355 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1356}
1357
1358bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
1359 MemIntrinsicInfo &Info) const {
1360 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1361}
1362
1363unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
1364 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1365}
1366
1367Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
1368 IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate) const {
1369 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1370 CanCreate);
1371}
1372
1373Type *TargetTransformInfo::getMemcpyLoopLoweringType(
1374 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1375 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
1376 std::optional<uint32_t> AtomicElementSize) const {
1377 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1378 DestAddrSpace, SrcAlign, DestAlign,
1379 AtomicElementSize);
1380}
1381
1382void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
1383 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1384 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1385 Align SrcAlign, Align DestAlign,
1386 std::optional<uint32_t> AtomicCpySize) const {
1387 TTIImpl->getMemcpyLoopResidualLoweringType(
1388 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1389 DestAlign, AtomicCpySize);
1390}
1391
1392bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
1393 const Function *Callee) const {
1394 return TTIImpl->areInlineCompatible(Caller, Callee);
1395}
1396
1397unsigned
1398TargetTransformInfo::getInlineCallPenalty(const Function *F,
1399 const CallBase &Call,
1400 unsigned DefaultCallPenalty) const {
1401 return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1402}
1403
1404bool TargetTransformInfo::shouldCopyAttributeWhenOutliningFrom(
1405 const Function *Caller, const Attribute &Attr) const {
1406 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1407}
1408bool TargetTransformInfo::areTypesABICompatible(const Function *Caller,
1409 const Function *Callee,
1410 ArrayRef<Type *> Types) const {
1411 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1412}
1413
1414bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
1415 Type *Ty) const {
1416 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1417}
1418
1419bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
1420 Type *Ty) const {
1421 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1422}
1423
1424unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
1425 return TTIImpl->getLoadStoreVecRegBitWidth(AddrSpace: AS);
1426}
1427
1428bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
1429 return TTIImpl->isLegalToVectorizeLoad(LI);
1430}
1431
1432bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
1433 return TTIImpl->isLegalToVectorizeStore(SI);
1434}
1435
1436bool TargetTransformInfo::isLegalToVectorizeLoadChain(
1437 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1438 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1439 AddrSpace);
1440}
1441
1442bool TargetTransformInfo::isLegalToVectorizeStoreChain(
1443 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1444 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1445 AddrSpace);
1446}
1447
1448bool TargetTransformInfo::isLegalToVectorizeReduction(
1449 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1450 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1451}
1452
1453bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const {
1454 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1455}
1456
1457unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
1458 unsigned LoadSize,
1459 unsigned ChainSizeInBytes,
1460 VectorType *VecTy) const {
1461 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1462}
1463
1464unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
1465 unsigned StoreSize,
1466 unsigned ChainSizeInBytes,
1467 VectorType *VecTy) const {
1468 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1469}
1470
1471bool TargetTransformInfo::preferFixedOverScalableIfEqualCost(
1472 bool IsEpilogue) const {
1473 return TTIImpl->preferFixedOverScalableIfEqualCost(IsEpilogue);
1474}
1475
1476bool TargetTransformInfo::preferInLoopReduction(RecurKind Kind,
1477 Type *Ty) const {
1478 return TTIImpl->preferInLoopReduction(Kind, Ty);
1479}
1480
1481bool TargetTransformInfo::preferAlternateOpcodeVectorization() const {
1482 return TTIImpl->preferAlternateOpcodeVectorization();
1483}
1484
1485bool TargetTransformInfo::preferSLPInstCountCheck() const {
1486 return TTIImpl->preferSLPInstCountCheck();
1487}
1488
1489bool TargetTransformInfo::preferPredicatedReductionSelect() const {
1490 return TTIImpl->preferPredicatedReductionSelect();
1491}
1492
1493bool TargetTransformInfo::preferEpilogueVectorization(
1494 ElementCount Iters) const {
1495 return TTIImpl->preferEpilogueVectorization(Iters);
1496}
1497
1498bool TargetTransformInfo::shouldConsiderVectorizationRegPressure() const {
1499 return TTIImpl->shouldConsiderVectorizationRegPressure();
1500}
1501
1502TargetTransformInfo::VPLegalization
1503TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const {
1504 return TTIImpl->getVPLegalizationStrategy(PI: VPI);
1505}
1506
1507bool TargetTransformInfo::hasArmWideBranch(bool Thumb) const {
1508 return TTIImpl->hasArmWideBranch(Thumb);
1509}
1510
1511APInt TargetTransformInfo::getFeatureMask(const Function &F) const {
1512 return TTIImpl->getFeatureMask(F);
1513}
1514
1515APInt TargetTransformInfo::getPriorityMask(const Function &F) const {
1516 return TTIImpl->getPriorityMask(F);
1517}
1518
1519bool TargetTransformInfo::isMultiversionedFunction(const Function &F) const {
1520 return TTIImpl->isMultiversionedFunction(F);
1521}
1522
1523unsigned TargetTransformInfo::getMaxNumArgs() const {
1524 return TTIImpl->getMaxNumArgs();
1525}
1526
1527bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
1528 return TTIImpl->shouldExpandReduction(II);
1529}
1530
1531TargetTransformInfo::ReductionShuffle
1532TargetTransformInfo::getPreferredExpandedReductionShuffle(
1533 const IntrinsicInst *II) const {
1534 return TTIImpl->getPreferredExpandedReductionShuffle(II);
1535}
1536
1537unsigned TargetTransformInfo::getGISelRematGlobalCost() const {
1538 return TTIImpl->getGISelRematGlobalCost();
1539}
1540
1541unsigned TargetTransformInfo::getMinTripCountTailFoldingThreshold() const {
1542 return TTIImpl->getMinTripCountTailFoldingThreshold();
1543}
1544
1545bool TargetTransformInfo::supportsScalableVectors() const {
1546 return TTIImpl->supportsScalableVectors();
1547}
1548
1549bool TargetTransformInfo::enableScalableVectorization() const {
1550 return TTIImpl->enableScalableVectorization();
1551}
1552
1553bool TargetTransformInfo::hasActiveVectorLength() const {
1554 return TTIImpl->hasActiveVectorLength();
1555}
1556
1557bool TargetTransformInfo::isProfitableToSinkOperands(
1558 Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
1559 return TTIImpl->isProfitableToSinkOperands(I, Ops&: OpsToSink);
1560}
1561
1562bool TargetTransformInfo::isVectorShiftByScalarCheap(Type *Ty) const {
1563 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1564}
1565
1566unsigned
1567TargetTransformInfo::getNumBytesToPadGlobalArray(unsigned Size,
1568 Type *ArrayType) const {
1569 return TTIImpl->getNumBytesToPadGlobalArray(Size, ArrayType);
1570}
1571
1572void TargetTransformInfo::collectKernelLaunchBounds(
1573 const Function &F,
1574 SmallVectorImpl<std::pair<StringRef, int64_t>> &LB) const {
1575 return TTIImpl->collectKernelLaunchBounds(F, LB);
1576}
1577
1578bool TargetTransformInfo::allowVectorElementIndexingUsingGEP() const {
1579 return TTIImpl->allowVectorElementIndexingUsingGEP();
1580}
1581
1582bool TargetTransformInfo::isUniform(const Instruction *I,
1583 const SmallBitVector &UniformArgs) const {
1584 return TTIImpl->isUniform(I, UniformArgs);
1585}
1586
1587TargetTransformInfoImplBase::~TargetTransformInfoImplBase() = default;
1588
1589TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1590
1591TargetIRAnalysis::TargetIRAnalysis(
1592 std::function<Result(const Function &)> TTICallback)
1593 : TTICallback(std::move(TTICallback)) {}
1594
1595TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1596 FunctionAnalysisManager &) {
1597 assert(!F.isIntrinsic() && "Should not request TTI for intrinsics");
1598 return TTICallback(F);
1599}
1600
1601AnalysisKey TargetIRAnalysis::Key;
1602
1603TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1604 return Result(F.getDataLayout());
1605}
1606
1607// Register the basic pass.
1608INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1609 "Target Transform Information", false, true)
1610char TargetTransformInfoWrapperPass::ID = 0;
1611
1612void TargetTransformInfoWrapperPass::anchor() {}
1613
1614TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1615 : ImmutablePass(ID) {}
1616
1617TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1618 TargetIRAnalysis TIRA)
1619 : ImmutablePass(ID), TIRA(std::move(TIRA)) {}
1620
1621TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1622 FunctionAnalysisManager DummyFAM;
1623 TTI = TIRA.run(F, DummyFAM);
1624 return *TTI;
1625}
1626
1627ImmutablePass *
1628llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1629 return new TargetTransformInfoWrapperPass(std::move(TIRA));
1630}
1631