1//===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "llvm/Analysis/TargetTransformInfo.h"
10#include "llvm/ADT/SmallVector.h"
11#include "llvm/Analysis/CFG.h"
12#include "llvm/Analysis/LoopIterator.h"
13#include "llvm/Analysis/TargetLibraryInfo.h"
14#include "llvm/Analysis/TargetTransformInfoImpl.h"
15#include "llvm/IR/CFG.h"
16#include "llvm/IR/Dominators.h"
17#include "llvm/IR/Instruction.h"
18#include "llvm/IR/Instructions.h"
19#include "llvm/IR/IntrinsicInst.h"
20#include "llvm/IR/Module.h"
21#include "llvm/IR/Operator.h"
22#include "llvm/InitializePasses.h"
23#include "llvm/Support/CommandLine.h"
24#include <optional>
25#include <utility>
26
27using namespace llvm;
28using namespace PatternMatch;
29
30#define DEBUG_TYPE "tti"
31
32static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(Val: false),
33 cl::Hidden,
34 cl::desc("Recognize reduction patterns."));
35
36static cl::opt<unsigned> CacheLineSize(
37 "cache-line-size", cl::init(Val: 0), cl::Hidden,
38 cl::desc("Use this to override the target cache line size when "
39 "specified by the user."));
40
41static cl::opt<unsigned> MinPageSize(
42 "min-page-size", cl::init(Val: 0), cl::Hidden,
43 cl::desc("Use this to override the target's minimum page size."));
44
45static cl::opt<unsigned> PredictableBranchThreshold(
46 "predictable-branch-threshold", cl::init(Val: 99), cl::Hidden,
47 cl::desc(
48 "Use this to override the target's predictable branch threshold (%)."));
49
50namespace {
51/// No-op implementation of the TTI interface using the utility base
52/// classes.
53///
54/// This is used when no target specific information is available.
55struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
56 explicit NoTTIImpl(const DataLayout &DL)
57 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
58};
59} // namespace
60
61TargetTransformInfo::TargetTransformInfo(
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
63 : TTIImpl(std::move(Impl)) {}
64
65bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
66 // If the loop has irreducible control flow, it can not be converted to
67 // Hardware loop.
68 LoopBlocksRPO RPOT(L);
69 RPOT.perform(LI: &LI);
70 if (containsIrreducibleCFG<const BasicBlock *>(RPOTraversal&: RPOT, LI))
71 return false;
72 return true;
73}
74
75IntrinsicCostAttributes::IntrinsicCostAttributes(
76 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
77 bool TypeBasedOnly)
78 : II(dyn_cast<IntrinsicInst>(Val: &CI)), RetTy(CI.getType()), IID(Id),
79 ScalarizationCost(ScalarizationCost) {
80
81 if (const auto *FPMO = dyn_cast<FPMathOperator>(Val: &CI))
82 FMF = FPMO->getFastMathFlags();
83
84 if (!TypeBasedOnly)
85 Arguments.insert(I: Arguments.begin(), From: CI.arg_begin(), To: CI.arg_end());
86 for (const Value *Arg : CI.args())
87 ParamTys.push_back(Elt: Arg->getType());
88}
89
90IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
91 ArrayRef<Type *> Tys,
92 FastMathFlags Flags,
93 const IntrinsicInst *I,
94 InstructionCost ScalarCost)
95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
97}
98
99IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty,
100 ArrayRef<const Value *> Args)
101 : RetTy(Ty), IID(Id) {
102
103 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
104 ParamTys.reserve(N: Arguments.size());
105 for (const Value *Argument : Arguments)
106 ParamTys.push_back(Elt: Argument->getType());
107}
108
109IntrinsicCostAttributes::IntrinsicCostAttributes(
110 Intrinsic::ID Id, Type *RTy, ArrayRef<const Value *> Args,
111 ArrayRef<Type *> Tys, FastMathFlags Flags, const IntrinsicInst *I,
112 InstructionCost ScalarCost, VectorInstrContext VIC)
113 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
114 VIC(VIC) {
115 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
116 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
117}
118
119HardwareLoopInfo::HardwareLoopInfo(Loop *L) : L(L) {
120 // Match default options:
121 // - hardware-loop-counter-bitwidth = 32
122 // - hardware-loop-decrement = 1
123 CountType = Type::getInt32Ty(C&: L->getHeader()->getContext());
124 LoopDecrement = ConstantInt::get(Ty: CountType, V: 1);
125}
126
127bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
128 LoopInfo &LI, DominatorTree &DT,
129 bool ForceNestedLoop,
130 bool ForceHardwareLoopPHI) {
131 SmallVector<BasicBlock *, 4> ExitingBlocks;
132 L->getExitingBlocks(ExitingBlocks);
133
134 for (BasicBlock *BB : ExitingBlocks) {
135 // If we pass the updated counter back through a phi, we need to know
136 // which latch the updated value will be coming from.
137 if (!L->isLoopLatch(BB)) {
138 if (ForceHardwareLoopPHI || CounterInReg)
139 continue;
140 }
141
142 const SCEV *EC = SE.getExitCount(L, ExitingBlock: BB);
143 if (isa<SCEVCouldNotCompute>(Val: EC))
144 continue;
145 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(Val: EC)) {
146 if (ConstEC->getValue()->isZero())
147 continue;
148 } else if (!SE.isLoopInvariant(S: EC, L))
149 continue;
150
151 if (SE.getTypeSizeInBits(Ty: EC->getType()) > CountType->getBitWidth())
152 continue;
153
154 // If this exiting block is contained in a nested loop, it is not eligible
155 // for insertion of the branch-and-decrement since the inner loop would
156 // end up messing up the value in the CTR.
157 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
158 continue;
159
160 // We now have a loop-invariant count of loop iterations (which is not the
161 // constant zero) for which we know that this loop will not exit via this
162 // existing block.
163
164 // We need to make sure that this block will run on every loop iteration.
165 // For this to be true, we must dominate all blocks with backedges. Such
166 // blocks are in-loop predecessors to the header block.
167 bool NotAlways = false;
168 for (BasicBlock *Pred : predecessors(BB: L->getHeader())) {
169 if (!L->contains(BB: Pred))
170 continue;
171
172 if (!DT.dominates(A: BB, B: Pred)) {
173 NotAlways = true;
174 break;
175 }
176 }
177
178 if (NotAlways)
179 continue;
180
181 // Make sure this blocks ends with a conditional branch.
182 Instruction *TI = BB->getTerminator();
183 if (!TI)
184 continue;
185
186 if (CondBrInst *BI = dyn_cast<CondBrInst>(Val: TI))
187 ExitBranch = BI;
188 else
189 continue;
190
191 // Note that this block may not be the loop latch block, even if the loop
192 // has a latch block.
193 ExitBlock = BB;
194 ExitCount = EC;
195 break;
196 }
197
198 if (!ExitBlock)
199 return false;
200 return true;
201}
202
203TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
204 : TTIImpl(std::make_unique<NoTTIImpl>(args: DL)) {}
205
206TargetTransformInfo::~TargetTransformInfo() = default;
207
208TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
209 : TTIImpl(std::move(Arg.TTIImpl)) {}
210
211TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
212 TTIImpl = std::move(RHS.TTIImpl);
213 return *this;
214}
215
216unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
217 return TTIImpl->getInliningThresholdMultiplier();
218}
219
220unsigned
221TargetTransformInfo::getInliningCostBenefitAnalysisSavingsMultiplier() const {
222 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
223}
224
225unsigned
226TargetTransformInfo::getInliningCostBenefitAnalysisProfitableMultiplier()
227 const {
228 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
229}
230
231int TargetTransformInfo::getInliningLastCallToStaticBonus() const {
232 return TTIImpl->getInliningLastCallToStaticBonus();
233}
234
235unsigned
236TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const {
237 return TTIImpl->adjustInliningThreshold(CB);
238}
239
240unsigned TargetTransformInfo::getCallerAllocaCost(const CallBase *CB,
241 const AllocaInst *AI) const {
242 return TTIImpl->getCallerAllocaCost(CB, AI);
243}
244
245int TargetTransformInfo::getInlinerVectorBonusPercent() const {
246 return TTIImpl->getInlinerVectorBonusPercent();
247}
248
249InstructionCost TargetTransformInfo::getGEPCost(
250 Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
251 TTI::TargetCostKind CostKind, Type *AccessType) const {
252 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind, AccessType);
253}
254
255InstructionCost TargetTransformInfo::getPointersChainCost(
256 ArrayRef<const Value *> Ptrs, const Value *Base,
257 const TTI::PointersChainInfo &Info, Type *AccessTy,
258 TTI::TargetCostKind CostKind) const {
259 assert((Base || !Info.isSameBase()) &&
260 "If pointers have same base address it has to be provided.");
261 return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
262}
263
264unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(
265 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
266 BlockFrequencyInfo *BFI) const {
267 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
268}
269
270InstructionCost
271TargetTransformInfo::getInstructionCost(const User *U,
272 ArrayRef<const Value *> Operands,
273 enum TargetCostKind CostKind) const {
274 InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
275 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) &&
276 "TTI should not produce negative costs!");
277 return Cost;
278}
279
280BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const {
281 return PredictableBranchThreshold.getNumOccurrences() > 0
282 ? BranchProbability(PredictableBranchThreshold, 100)
283 : TTIImpl->getPredictableBranchThreshold();
284}
285
286InstructionCost TargetTransformInfo::getBranchMispredictPenalty() const {
287 return TTIImpl->getBranchMispredictPenalty();
288}
289
290bool TargetTransformInfo::hasBranchDivergence(const Function *F) const {
291 return TTIImpl->hasBranchDivergence(F);
292}
293
294ValueUniformity
295llvm::TargetTransformInfo::getValueUniformity(const Value *V) const {
296 ValueUniformity VU = TTIImpl->getValueUniformity(V);
297 if (const auto *Call = dyn_cast<CallBase>(Val: V)) {
298 if (VU == ValueUniformity::NeverUniform &&
299 Call->hasFnAttr(Kind: Attribute::NoDivergenceSource))
300 return ValueUniformity::Default;
301 }
302 return VU;
303}
304
305bool llvm::TargetTransformInfo::isValidAddrSpaceCast(unsigned FromAS,
306 unsigned ToAS) const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
308}
309
310bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned FromAS,
311 unsigned ToAS) const {
312 return TTIImpl->addrspacesMayAlias(AS0: FromAS, AS1: ToAS);
313}
314
315unsigned TargetTransformInfo::getFlatAddressSpace() const {
316 return TTIImpl->getFlatAddressSpace();
317}
318
319unsigned TargetTransformInfo::getAddressSpaceJoin(unsigned AS1,
320 unsigned AS2) const {
321 assert(AS1 != AS2 && "Expected distinct address spaces");
322 return TTIImpl->getAddressSpaceJoin(AS1, AS2);
323}
324
325bool TargetTransformInfo::collectFlatAddressOperands(
326 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
327 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
328}
329
330bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
331 unsigned ToAS) const {
332 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
333}
334
335std::pair<KnownBits, KnownBits>
336TargetTransformInfo::computeKnownBitsAddrSpaceCast(unsigned ToAS,
337 const Value &PtrOp) const {
338 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
339}
340
341KnownBits TargetTransformInfo::computeKnownBitsAddrSpaceCast(
342 unsigned FromAS, unsigned ToAS, const KnownBits &FromPtrBits) const {
343 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
344}
345
346APInt TargetTransformInfo::getAddrSpaceCastPreservedPtrMask(
347 unsigned SrcAS, unsigned DstAS) const {
348 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
349}
350
351bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace(
352 unsigned AS) const {
353 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
354}
355
356unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const {
357 return TTIImpl->getAssumedAddrSpace(V);
358}
359
360std::pair<const Value *, unsigned>
361TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const {
362 return TTIImpl->getPredicatedAddrSpace(V);
363}
364
365Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace(
366 IntrinsicInst *II, Value *OldV, Value *NewV) const {
367 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
368}
369
370bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
371 return TTIImpl->isLoweredToCall(F);
372}
373
374bool TargetTransformInfo::isHardwareLoopProfitable(
375 Loop *L, ScalarEvolution &SE, AssumptionCache &AC,
376 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
377 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
378}
379
380unsigned TargetTransformInfo::getEpilogueVectorizationMinVF() const {
381 return TTIImpl->getEpilogueVectorizationMinVF();
382}
383
384bool TargetTransformInfo::preferTailFoldingOverEpilogue(
385 TailFoldingInfo *TFI) const {
386 return TTIImpl->preferTailFoldingOverEpilogue(TFI);
387}
388
389TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle() const {
390 return TTIImpl->getPreferredTailFoldingStyle();
391}
392
393std::optional<Instruction *>
394TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC,
395 IntrinsicInst &II) const {
396 return TTIImpl->instCombineIntrinsic(IC, II);
397}
398
399std::optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(
400 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
401 bool &KnownBitsComputed) const {
402 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
403 KnownBitsComputed);
404}
405
406std::optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(
407 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
408 APInt &UndefElts2, APInt &UndefElts3,
409 std::function<void(Instruction *, unsigned, APInt, APInt &)>
410 SimplifyAndSetOp) const {
411 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
412 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
413 SimplifyAndSetOp);
414}
415
416void TargetTransformInfo::getUnrollingPreferences(
417 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP,
418 OptimizationRemarkEmitter *ORE) const {
419 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
420}
421
422void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
423 PeelingPreferences &PP) const {
424 return TTIImpl->getPeelingPreferences(L, SE, PP);
425}
426
427bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
428 return TTIImpl->isLegalAddImmediate(Imm);
429}
430
431bool TargetTransformInfo::isLegalAddScalableImmediate(int64_t Imm) const {
432 return TTIImpl->isLegalAddScalableImmediate(Imm);
433}
434
435bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
436 return TTIImpl->isLegalICmpImmediate(Imm);
437}
438
439bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
440 int64_t BaseOffset,
441 bool HasBaseReg, int64_t Scale,
442 unsigned AddrSpace,
443 Instruction *I,
444 int64_t ScalableOffset) const {
445 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
446 Scale, AddrSpace, I, ScalableOffset);
447}
448
449bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1,
450 const LSRCost &C2) const {
451 return TTIImpl->isLSRCostLess(C1, C2);
452}
453
454bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const {
455 return TTIImpl->isNumRegsMajorCostOfLSR();
456}
457
458bool TargetTransformInfo::shouldDropLSRSolutionIfLessProfitable() const {
459 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
460}
461
462bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const {
463 return TTIImpl->isProfitableLSRChainElement(I);
464}
465
466bool TargetTransformInfo::canMacroFuseCmp() const {
467 return TTIImpl->canMacroFuseCmp();
468}
469
470bool TargetTransformInfo::canSaveCmp(Loop *L, CondBrInst **BI,
471 ScalarEvolution *SE, LoopInfo *LI,
472 DominatorTree *DT, AssumptionCache *AC,
473 TargetLibraryInfo *LibInfo) const {
474 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
475}
476
477TTI::AddressingModeKind
478TargetTransformInfo::getPreferredAddressingMode(const Loop *L,
479 ScalarEvolution *SE) const {
480 return TTIImpl->getPreferredAddressingMode(L, SE);
481}
482
483bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, Align Alignment,
484 unsigned AddressSpace,
485 TTI::MaskKind MaskKind) const {
486 return TTIImpl->isLegalMaskedStore(DataType, Alignment, AddressSpace,
487 MaskKind);
488}
489
490bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, Align Alignment,
491 unsigned AddressSpace,
492 TTI::MaskKind MaskKind) const {
493 return TTIImpl->isLegalMaskedLoad(DataType, Alignment, AddressSpace,
494 MaskKind);
495}
496
497bool TargetTransformInfo::isLegalSpeculativeLoad(Type *DataType,
498 unsigned AddressSpace) const {
499 return TTIImpl->isLegalSpeculativeLoad(DataType, AddressSpace);
500}
501
502bool TargetTransformInfo::isLegalNTStore(Type *DataType,
503 Align Alignment) const {
504 return TTIImpl->isLegalNTStore(DataType, Alignment);
505}
506
507bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
508 return TTIImpl->isLegalNTLoad(DataType, Alignment);
509}
510
511bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy,
512 ElementCount NumElements) const {
513 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
514}
515
516bool TargetTransformInfo::isLegalMaskedGather(Type *DataType,
517 Align Alignment) const {
518 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
519}
520
521bool TargetTransformInfo::isLegalAltInstr(
522 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
523 const SmallBitVector &OpcodeMask, ArrayRef<const Value *> Scalars) const {
524 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask, Scalars);
525}
526
527bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType,
528 Align Alignment) const {
529 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
530}
531
532bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType,
533 Align Alignment) const {
534 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
535}
536
537bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType,
538 Align Alignment) const {
539 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
540}
541
542bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType,
543 Align Alignment) const {
544 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
545}
546
547bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType,
548 Align Alignment) const {
549 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
550}
551
552bool TargetTransformInfo::isLegalStridedLoadStore(Type *DataType,
553 Align Alignment) const {
554 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
555}
556
557bool TargetTransformInfo::hasMultiVectorLoadStore(
558 unsigned NumVectors, TTI::MaskSource Mask, VectorType *VectorTy,
559 bool IsStore, std::optional<Instruction::CastOps> CastHint) const {
560 return TTIImpl->hasMultiVectorLoadStore(NumVectors, Mask, VectorTy, IsStore,
561 CastHint);
562}
563
564bool TargetTransformInfo::isLegalInterleavedAccessType(
565 VectorType *VTy, unsigned Factor, Align Alignment,
566 unsigned AddrSpace) const {
567 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
568 AddrSpace);
569}
570
571bool TargetTransformInfo::isLegalMaskedVectorHistogram(Type *AddrType,
572 Type *DataType) const {
573 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
574}
575
576bool TargetTransformInfo::enableOrderedReductions() const {
577 return TTIImpl->enableOrderedReductions();
578}
579
580bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
581 return TTIImpl->hasDivRemOp(DataType, IsSigned);
582}
583
584bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
585 unsigned AddrSpace) const {
586 return TTIImpl->hasVolatileVariant(I, AddrSpace);
587}
588
589bool TargetTransformInfo::prefersVectorizedAddressing() const {
590 return TTIImpl->prefersVectorizedAddressing();
591}
592
593InstructionCost TargetTransformInfo::getScalingFactorCost(
594 Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg,
595 int64_t Scale, unsigned AddrSpace) const {
596 InstructionCost Cost = TTIImpl->getScalingFactorCost(
597 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
598 assert(Cost >= 0 && "TTI should not produce negative costs!");
599 return Cost;
600}
601
602bool TargetTransformInfo::LSRWithInstrQueries() const {
603 return TTIImpl->LSRWithInstrQueries();
604}
605
606bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
607 return TTIImpl->isTruncateFree(Ty1, Ty2);
608}
609
610bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
611 return TTIImpl->isProfitableToHoist(I);
612}
613
614bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
615
616bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
617 return TTIImpl->isTypeLegal(Ty);
618}
619
620unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const {
621 return TTIImpl->getRegUsageForType(Ty);
622}
623
624bool TargetTransformInfo::shouldBuildLookupTables() const {
625 return TTIImpl->shouldBuildLookupTables();
626}
627
628bool TargetTransformInfo::shouldBuildLookupTablesForConstant(
629 Constant *C) const {
630 return TTIImpl->shouldBuildLookupTablesForConstant(C);
631}
632
633unsigned TargetTransformInfo::getMinimumLookupTableEntryBitWidth() const {
634 return TTIImpl->getMinimumLookupTableEntryBitWidth();
635}
636
637bool TargetTransformInfo::shouldBuildRelLookupTables() const {
638 return TTIImpl->shouldBuildRelLookupTables();
639}
640
641bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
642 return TTIImpl->useColdCCForColdCall(F);
643}
644
645bool TargetTransformInfo::useFastCCForInternalCall(Function &F) const {
646 return TTIImpl->useFastCCForInternalCall(F);
647}
648
649bool TargetTransformInfo::isTargetIntrinsicWithScalarOpAtArg(
650 Intrinsic::ID ID, unsigned ScalarOpdIdx) const {
651 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
652}
653
654bool TargetTransformInfo::isTargetIntrinsicWithOverloadTypeAtArg(
655 Intrinsic::ID ID, int OpdIdx) const {
656 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
657}
658
659bool TargetTransformInfo::isTargetIntrinsicWithStructReturnOverloadAtField(
660 Intrinsic::ID ID, int RetIdx) const {
661 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
662}
663
664TargetTransformInfo::VectorInstrContext
665TargetTransformInfo::combineVectorInstrContexts(
666 TargetTransformInfo::VectorInstrContext Ctx1,
667 TargetTransformInfo::VectorInstrContext Ctx2) {
668 return Ctx1 == Ctx2 ? Ctx1 : TargetTransformInfo::VectorInstrContext::None;
669}
670
671TargetTransformInfo::VectorInstrContext
672TargetTransformInfo::getVectorInstrContextHint(const Instruction *I) {
673 if (!I)
674 return VectorInstrContext::None;
675
676 // For inserts, check if the value being inserted comes from a single-use
677 // load.
678 if (isa<InsertElementInst>(Val: I) && isa<LoadInst>(Val: I->getOperand(i: 1)) &&
679 I->getOperand(i: 1)->hasOneUse())
680 return VectorInstrContext::Load;
681
682 // For extracts, check if it has a single use that is a store.
683 if (isa<ExtractElementInst>(Val: I) && I->hasOneUse() &&
684 isa<StoreInst>(Val: *I->user_begin()))
685 return VectorInstrContext::Store;
686
687 return VectorInstrContext::None;
688}
689
690TargetTransformInfo::VectorInstrContext
691TargetTransformInfo::getBuildVectorContextHint(
692 ArrayRef<int> Mask, ArrayRef<Value *> Scalars,
693 function_ref<bool(SmallVectorImpl<BuildVectorUseOp> &)> GatherUseOps)
694 const {
695 return TTIImpl->getBuildVectorContextHint(Mask, Scalars, GatherUseOps);
696}
697
698InstructionCost TargetTransformInfo::getScalarizationOverhead(
699 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
700 TTI::TargetCostKind CostKind, bool ForPoisonSrc, ArrayRef<Value *> VL,
701 TTI::VectorInstrContext VIC) const {
702 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
703 CostKind, ForPoisonSrc, VL, VIC);
704}
705
706InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(
707 ArrayRef<Type *> Tys, TTI::TargetCostKind CostKind,
708 TTI::VectorInstrContext VIC) const {
709 return TTIImpl->getOperandsScalarizationOverhead(Tys, CostKind, VIC);
710}
711
712bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
713 return TTIImpl->supportsEfficientVectorElementLoadStore();
714}
715
716bool TargetTransformInfo::supportsTailCalls() const {
717 return TTIImpl->supportsTailCalls();
718}
719
720bool TargetTransformInfo::supportsTailCallFor(const CallBase *CB) const {
721 return TTIImpl->supportsTailCallFor(CB);
722}
723
724bool TargetTransformInfo::enableAggressiveInterleaving(
725 bool LoopHasReductions) const {
726 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
727}
728
729TargetTransformInfo::MemCmpExpansionOptions
730TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
731 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
732}
733
734bool TargetTransformInfo::enableSelectOptimize() const {
735 return TTIImpl->enableSelectOptimize();
736}
737
738bool TargetTransformInfo::shouldTreatInstructionLikeSelect(
739 const Instruction *I) const {
740 return TTIImpl->shouldTreatInstructionLikeSelect(I);
741}
742
743bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
744 return TTIImpl->enableInterleavedAccessVectorization();
745}
746
747bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
748 return TTIImpl->enableMaskedInterleavedAccessVectorization();
749}
750
751bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
752 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
753}
754
755bool
756TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
757 unsigned BitWidth,
758 unsigned AddressSpace,
759 Align Alignment,
760 unsigned *Fast) const {
761 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
762 AddressSpace, Alignment, Fast);
763}
764
765TargetTransformInfo::PopcntSupportKind
766TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
767 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
768}
769
770bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
771 return TTIImpl->haveFastSqrt(Ty);
772}
773
774bool TargetTransformInfo::isExpensiveToSpeculativelyExecute(
775 const Instruction *I) const {
776 return TTIImpl->isExpensiveToSpeculativelyExecute(I);
777}
778
779bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
780 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
781}
782
783InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const {
784 InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
785 assert(Cost >= 0 && "TTI should not produce negative costs!");
786 return Cost;
787}
788
789InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode,
790 unsigned Idx,
791 const APInt &Imm,
792 Type *Ty) const {
793 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
794 assert(Cost >= 0 && "TTI should not produce negative costs!");
795 return Cost;
796}
797
798InstructionCost
799TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty,
800 TTI::TargetCostKind CostKind) const {
801 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
802 assert(Cost >= 0 && "TTI should not produce negative costs!");
803 return Cost;
804}
805
806InstructionCost TargetTransformInfo::getIntImmCostInst(
807 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
808 TTI::TargetCostKind CostKind, Instruction *Inst) const {
809 InstructionCost Cost =
810 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
811 assert(Cost >= 0 && "TTI should not produce negative costs!");
812 return Cost;
813}
814
815InstructionCost
816TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
817 const APInt &Imm, Type *Ty,
818 TTI::TargetCostKind CostKind) const {
819 InstructionCost Cost =
820 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
821 assert(Cost >= 0 && "TTI should not produce negative costs!");
822 return Cost;
823}
824
825bool TargetTransformInfo::preferToKeepConstantsAttached(
826 const Instruction &Inst, const Function &Fn) const {
827 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
828}
829
830unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
831 return TTIImpl->getNumberOfRegisters(ClassID);
832}
833
834bool TargetTransformInfo::hasConditionalLoadStoreForType(Type *Ty,
835 bool IsStore) const {
836 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
837}
838
839unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
840 Type *Ty) const {
841 return TTIImpl->getRegisterClassForType(Vector, Ty);
842}
843
844const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
845 return TTIImpl->getRegisterClassName(ClassID);
846}
847
848InstructionCost TargetTransformInfo::getRegisterClassSpillCost(
849 unsigned ClassID, TTI::TargetCostKind CostKind) const {
850 return TTIImpl->getRegisterClassSpillCost(ClassID, CostKind);
851}
852
853InstructionCost TargetTransformInfo::getRegisterClassReloadCost(
854 unsigned ClassID, TTI::TargetCostKind CostKind) const {
855 return TTIImpl->getRegisterClassReloadCost(ClassID, CostKind);
856}
857
858TypeSize TargetTransformInfo::getRegisterBitWidth(
859 TargetTransformInfo::RegisterKind K) const {
860 return TTIImpl->getRegisterBitWidth(K);
861}
862
863unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
864 return TTIImpl->getMinVectorRegisterBitWidth();
865}
866
867std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
868 return TTIImpl->getVScaleForTuning();
869}
870
871bool TargetTransformInfo::shouldMaximizeVectorBandwidth(
872 TargetTransformInfo::RegisterKind K) const {
873 return TTIImpl->shouldMaximizeVectorBandwidth(K);
874}
875
876ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
877 bool IsScalable) const {
878 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
879}
880
881unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
882 unsigned Opcode) const {
883 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
884}
885
886unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
887 Type *ScalarValTy,
888 Align Alignment,
889 unsigned AddrSpace) const {
890 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy, Alignment,
891 AddrSpace);
892}
893
894bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
895 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
896 return TTIImpl->shouldConsiderAddressTypePromotion(
897 I, AllowPromotionWithoutCommonHeader);
898}
899
900unsigned TargetTransformInfo::getCacheLineSize() const {
901 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
902 : TTIImpl->getCacheLineSize();
903}
904
905std::optional<unsigned>
906TargetTransformInfo::getCacheSize(CacheLevel Level) const {
907 return TTIImpl->getCacheSize(Level);
908}
909
910std::optional<unsigned>
911TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const {
912 return TTIImpl->getCacheAssociativity(Level);
913}
914
915std::optional<unsigned> TargetTransformInfo::getMinPageSize() const {
916 return MinPageSize.getNumOccurrences() > 0 ? MinPageSize
917 : TTIImpl->getMinPageSize();
918}
919
920unsigned TargetTransformInfo::getPrefetchDistance() const {
921 return TTIImpl->getPrefetchDistance();
922}
923
924unsigned TargetTransformInfo::getMinPrefetchStride(
925 unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
926 unsigned NumPrefetches, bool HasCall) const {
927 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
928 NumPrefetches, HasCall);
929}
930
931unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
932 return TTIImpl->getMaxPrefetchIterationsAhead();
933}
934
935bool TargetTransformInfo::enableWritePrefetching() const {
936 return TTIImpl->enableWritePrefetching();
937}
938
939bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
940 return TTIImpl->shouldPrefetchAddressSpace(AS);
941}
942
943InstructionCost TargetTransformInfo::getPartialReductionCost(
944 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
945 ElementCount VF, PartialReductionExtendKind OpAExtend,
946 PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
947 TTI::TargetCostKind CostKind, std::optional<FastMathFlags> FMF) const {
948 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
949 AccumType, VF, OpAExtend, OpBExtend,
950 BinOp, CostKind, FMF);
951}
952
953unsigned
954TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF,
955 bool HasUnorderedReductions) const {
956 return TTIImpl->getMaxInterleaveFactor(VF, HasUnorderedReductions);
957}
958
959TargetTransformInfo::OperandValueInfo
960TargetTransformInfo::getOperandInfo(const Value *V) {
961 OperandValueKind OpInfo = OK_AnyValue;
962 OperandValueProperties OpProps = OP_None;
963
964 // undef/poison don't materialize constants.
965 if (isa<UndefValue>(Val: V))
966 return {.Kind: OK_AnyValue, .Properties: OP_None};
967
968 if (isa<ConstantInt>(Val: V) || isa<ConstantFP>(Val: V)) {
969 if (const auto *CI = dyn_cast<ConstantInt>(Val: V)) {
970 if (CI->getValue().isPowerOf2())
971 OpProps = OP_PowerOf2;
972 else if (CI->getValue().isNegatedPowerOf2())
973 OpProps = OP_NegatedPowerOf2;
974 }
975 return {.Kind: OK_UniformConstantValue, .Properties: OpProps};
976 }
977
978 // A broadcast shuffle creates a uniform value.
979 // TODO: Add support for non-zero index broadcasts.
980 // TODO: Add support for different source vector width.
981 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(Val: V))
982 if (ShuffleInst->isZeroEltSplat())
983 OpInfo = OK_UniformValue;
984
985 const Value *Splat = getSplatValue(V);
986
987 // Check for a splat of a constant or for a non uniform vector of constants
988 // and check if the constant(s) are all powers of two.
989 if (Splat) {
990 // Check for a splat of a uniform value. This is not loop aware, so return
991 // true only for the obviously uniform cases (argument, globalvalue)
992 if (isa<Argument>(Val: Splat) || isa<GlobalValue>(Val: Splat)) {
993 OpInfo = OK_UniformValue;
994 } else if (isa<Constant>(Val: Splat)) {
995 OpInfo = OK_UniformConstantValue;
996 if (auto *CI = dyn_cast<ConstantInt>(Val: Splat)) {
997 if (CI->getValue().isPowerOf2())
998 OpProps = OP_PowerOf2;
999 else if (CI->getValue().isNegatedPowerOf2())
1000 OpProps = OP_NegatedPowerOf2;
1001 }
1002 }
1003 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(Val: V)) {
1004 OpInfo = OK_NonUniformConstantValue;
1005 bool AllPow2 = true, AllNegPow2 = true;
1006 for (uint64_t I = 0, E = CDS->getNumElements(); I != E; ++I) {
1007 if (auto *CI = dyn_cast<ConstantInt>(Val: CDS->getElementAsConstant(i: I))) {
1008 AllPow2 &= CI->getValue().isPowerOf2();
1009 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
1010 if (AllPow2 || AllNegPow2)
1011 continue;
1012 }
1013 AllPow2 = AllNegPow2 = false;
1014 break;
1015 }
1016 OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
1017 OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
1018 } else if (isa<ConstantVector>(Val: V) || isa<ConstantDataVector>(Val: V)) {
1019 OpInfo = OK_NonUniformConstantValue;
1020 }
1021
1022 return {.Kind: OpInfo, .Properties: OpProps};
1023}
1024
1025TargetTransformInfo::OperandValueInfo
1026TargetTransformInfo::getOperandInfo(ArrayRef<Value *> Ops) {
1027 assert(!Ops.empty());
1028 const auto *Op0 = Ops.front();
1029
1030 const bool IsConstant = all_of(Range&: Ops, P: [](Value *V) {
1031 // TODO: We should allow undef elements here
1032 return isa<Constant>(Val: V) && !isa<ConstantExpr, GlobalValue>(Val: V) &&
1033 !isa<UndefValue>(Val: V);
1034 });
1035 const bool IsUniform = all_of(Range&: Ops, P: [=](Value *V) {
1036 // TODO: We should allow undef elements here
1037 return V == Op0;
1038 });
1039 const bool IsPowerOfTwo = all_of(Range&: Ops, P: [](Value *V) {
1040 // TODO: We should allow undef elements here
1041 if (auto *CI = dyn_cast<ConstantInt>(Val: V))
1042 return CI->getValue().isPowerOf2();
1043 return false;
1044 });
1045 const bool IsNegatedPowerOfTwo = all_of(Range&: Ops, P: [](Value *V) {
1046 // TODO: We should allow undef elements here
1047 if (auto *CI = dyn_cast<ConstantInt>(Val: V))
1048 return CI->getValue().isNegatedPowerOf2();
1049 return false;
1050 });
1051
1052 TTI::OperandValueKind VK = TTI::OK_AnyValue;
1053 if (IsConstant && IsUniform)
1054 VK = TTI::OK_UniformConstantValue;
1055 else if (IsConstant)
1056 VK = TTI::OK_NonUniformConstantValue;
1057 else if (IsUniform)
1058 VK = TTI::OK_UniformValue;
1059
1060 TTI::OperandValueProperties VP = TTI::OP_None;
1061 VP = IsPowerOfTwo ? TTI::OP_PowerOf2 : VP;
1062 VP = IsNegatedPowerOfTwo ? TTI::OP_NegatedPowerOf2 : VP;
1063
1064 return {.Kind: VK, .Properties: VP};
1065}
1066
1067TargetTransformInfo::OperandValueInfo
1068TargetTransformInfo::commonOperandInfo(const Value *X, const Value *Y) {
1069 OperandValueInfo OpInfoX = getOperandInfo(V: X);
1070 if (X == Y)
1071 return OpInfoX;
1072 return OpInfoX.mergeWith(OpInfoY: getOperandInfo(V: Y));
1073}
1074
1075InstructionCost TargetTransformInfo::getArithmeticInstrCost(
1076 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1077 OperandValueInfo Op1Info, OperandValueInfo Op2Info,
1078 ArrayRef<const Value *> Args, const Instruction *CtxI,
1079 const TargetLibraryInfo *TLibInfo) const {
1080
1081 // Use call cost for frem intructions that have platform specific vector math
1082 // functions, as those will be replaced with calls later by SelectionDAG or
1083 // ReplaceWithVecLib pass.
1084 if (TLibInfo && Opcode == Instruction::FRem) {
1085 VectorType *VecTy = dyn_cast<VectorType>(Val: Ty);
1086 LibFunc Func = TLibInfo->getLibFunc(Opcode: Instruction::FRem, Ty: Ty->getScalarType());
1087 if (VecTy && Func != NotLibFunc &&
1088 TLibInfo->isFunctionVectorizable(F: TLibInfo->getName(F: Func),
1089 VF: VecTy->getElementCount()))
1090 return getCallInstrCost(F: nullptr, RetTy: VecTy, Tys: {VecTy, VecTy}, CostKind);
1091 }
1092
1093 InstructionCost Cost = TTIImpl->getArithmeticInstrCost(
1094 Opcode, Ty, CostKind, Opd1Info: Op1Info, Opd2Info: Op2Info, Args, CtxI);
1095 assert(Cost >= 0 && "TTI should not produce negative costs!");
1096 return Cost;
1097}
1098
1099InstructionCost TargetTransformInfo::getAltInstrCost(
1100 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
1101 const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind,
1102 ArrayRef<const Value *> Scalars) const {
1103 InstructionCost Cost = TTIImpl->getAltInstrCost(
1104 VecTy, Opcode0, Opcode1, OpcodeMask, CostKind, Scalars);
1105 assert(Cost >= 0 && "TTI should not produce negative costs!");
1106 return Cost;
1107}
1108
1109InstructionCost TargetTransformInfo::getShuffleCost(
1110 ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy,
1111 TTI::TargetCostKind CostKind, ArrayRef<int> Mask, int Index,
1112 VectorType *SubTp, ArrayRef<const Value *> Args, const Instruction *CtxI,
1113 TTI::VectorInstrContext VIC) const {
1114 assert((Mask.empty() || DstTy->isScalableTy() ||
1115 Mask.size() == DstTy->getElementCount().getKnownMinValue()) &&
1116 "Expected the Mask to match the return size if given");
1117 assert(SrcTy->getScalarType() == DstTy->getScalarType() &&
1118 "Expected the same scalar types");
1119 InstructionCost Cost = TTIImpl->getShuffleCost(
1120 Kind, DstTy, SrcTy, CostKind, Mask, Index, SubTp, Args, CtxI, VIC);
1121 assert(Cost >= 0 && "TTI should not produce negative costs!");
1122 return Cost;
1123}
1124
1125TargetTransformInfo::PartialReductionExtendKind
1126TargetTransformInfo::getPartialReductionExtendKind(Instruction *I) {
1127 if (auto *Cast = dyn_cast<CastInst>(Val: I))
1128 return getPartialReductionExtendKind(CastOpc: Cast->getOpcode());
1129 return PR_None;
1130}
1131
1132Instruction::CastOps
1133TargetTransformInfo::getOpcodeForPartialReductionExtendKind(
1134 TargetTransformInfo::PartialReductionExtendKind Kind) {
1135 switch (Kind) {
1136 case TargetTransformInfo::PR_ZeroExtend:
1137 return Instruction::CastOps::ZExt;
1138 case TargetTransformInfo::PR_SignExtend:
1139 return Instruction::CastOps::SExt;
1140 case TargetTransformInfo::PR_FPExtend:
1141 return Instruction::CastOps::FPExt;
1142 default:
1143 break;
1144 }
1145 llvm_unreachable("Unhandled partial reduction extend kind");
1146}
1147
1148TargetTransformInfo::PartialReductionExtendKind
1149TargetTransformInfo::getPartialReductionExtendKind(
1150 Instruction::CastOps CastOpc) {
1151 switch (CastOpc) {
1152 case Instruction::CastOps::ZExt:
1153 return PR_ZeroExtend;
1154 case Instruction::CastOps::SExt:
1155 return PR_SignExtend;
1156 case Instruction::CastOps::FPExt:
1157 return PR_FPExtend;
1158 default:
1159 return PR_None;
1160 }
1161 llvm_unreachable("Unhandled cast opcode");
1162}
1163
1164TTI::CastContextHint
1165TargetTransformInfo::getCastContextHint(const Instruction *I) {
1166 if (!I)
1167 return CastContextHint::None;
1168
1169 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
1170 unsigned GatScatOp) {
1171 const Instruction *I = dyn_cast<Instruction>(Val: V);
1172 if (!I)
1173 return CastContextHint::None;
1174
1175 if (I->getOpcode() == LdStOp)
1176 return CastContextHint::Normal;
1177
1178 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Val: I)) {
1179 if (II->getIntrinsicID() == MaskedOp)
1180 return TTI::CastContextHint::Masked;
1181 if (II->getIntrinsicID() == GatScatOp)
1182 return TTI::CastContextHint::GatherScatter;
1183 }
1184
1185 return TTI::CastContextHint::None;
1186 };
1187
1188 switch (I->getOpcode()) {
1189 case Instruction::ZExt:
1190 case Instruction::SExt:
1191 case Instruction::FPExt:
1192 return getLoadStoreKind(I->getOperand(i: 0), Instruction::Load,
1193 Intrinsic::masked_load, Intrinsic::masked_gather);
1194 case Instruction::Trunc:
1195 case Instruction::FPTrunc:
1196 if (I->hasOneUse())
1197 return getLoadStoreKind(*I->user_begin(), Instruction::Store,
1198 Intrinsic::masked_store,
1199 Intrinsic::masked_scatter);
1200 break;
1201 default:
1202 return CastContextHint::None;
1203 }
1204
1205 return TTI::CastContextHint::None;
1206}
1207
1208InstructionCost TargetTransformInfo::getCastInstrCost(
1209 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
1210 TTI::TargetCostKind CostKind, const Instruction *I) const {
1211 assert((I == nullptr || I->getOpcode() == Opcode) &&
1212 "Opcode should reflect passed instruction.");
1213 InstructionCost Cost =
1214 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
1215 assert(Cost >= 0 && "TTI should not produce negative costs!");
1216 return Cost;
1217}
1218
1219InstructionCost TargetTransformInfo::getExtractWithExtendCost(
1220 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index,
1221 TTI::TargetCostKind CostKind) const {
1222 InstructionCost Cost =
1223 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index, CostKind);
1224 assert(Cost >= 0 && "TTI should not produce negative costs!");
1225 return Cost;
1226}
1227
1228InstructionCost TargetTransformInfo::getCFInstrCost(
1229 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
1230 assert((I == nullptr || I->getOpcode() == Opcode) &&
1231 "Opcode should reflect passed instruction.");
1232 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
1233 assert(Cost >= 0 && "TTI should not produce negative costs!");
1234 return Cost;
1235}
1236
1237InstructionCost TargetTransformInfo::getCmpSelInstrCost(
1238 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1239 TTI::TargetCostKind CostKind, OperandValueInfo Op1Info,
1240 OperandValueInfo Op2Info, const Instruction *I) const {
1241 assert((I == nullptr || I->getOpcode() == Opcode) &&
1242 "Opcode should reflect passed instruction.");
1243 InstructionCost Cost = TTIImpl->getCmpSelInstrCost(
1244 Opcode, ValTy, CondTy, VecPred, CostKind, Op1Info, Op2Info, I);
1245 assert(Cost >= 0 && "TTI should not produce negative costs!");
1246 return Cost;
1247}
1248
1249InstructionCost TargetTransformInfo::getVectorInstrCost(
1250 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1251 const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC) const {
1252 assert((Opcode == Instruction::InsertElement ||
1253 Opcode == Instruction::ExtractElement) &&
1254 "Expecting Opcode to be insertelement/extractelement.");
1255 InstructionCost Cost =
1256 TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1, VIC);
1257 assert(Cost >= 0 && "TTI should not produce negative costs!");
1258 return Cost;
1259}
1260
1261InstructionCost TargetTransformInfo::getVectorInstrCost(
1262 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1263 Value *Scalar, ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1264 TTI::VectorInstrContext VIC) const {
1265 assert((Opcode == Instruction::InsertElement ||
1266 Opcode == Instruction::ExtractElement) &&
1267 "Expecting Opcode to be insertelement/extractelement.");
1268 InstructionCost Cost = TTIImpl->getVectorInstrCost(
1269 Opcode, Val, CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1270 assert(Cost >= 0 && "TTI should not produce negative costs!");
1271 return Cost;
1272}
1273
1274InstructionCost TargetTransformInfo::getVectorInstrCost(
1275 const Instruction &I, Type *Val, TTI::TargetCostKind CostKind,
1276 unsigned Index, TTI::VectorInstrContext VIC) const {
1277 // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
1278 // This is mentioned in the interface description and respected by all
1279 // callers, but never asserted upon.
1280 InstructionCost Cost =
1281 TTIImpl->getVectorInstrCost(I, Val, CostKind, Index, VIC);
1282 assert(Cost >= 0 && "TTI should not produce negative costs!");
1283 return Cost;
1284}
1285
1286InstructionCost TargetTransformInfo::getIndexedVectorInstrCostFromEnd(
1287 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind,
1288 unsigned Index) const {
1289 InstructionCost Cost =
1290 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val, CostKind, Index);
1291 assert(Cost >= 0 && "TTI should not produce negative costs!");
1292 return Cost;
1293}
1294
1295InstructionCost TargetTransformInfo::getInsertExtractValueCost(
1296 unsigned Opcode, TTI::TargetCostKind CostKind) const {
1297 assert((Opcode == Instruction::InsertValue ||
1298 Opcode == Instruction::ExtractValue) &&
1299 "Expecting Opcode to be insertvalue/extractvalue.");
1300 InstructionCost Cost = TTIImpl->getInsertExtractValueCost(Opcode, CostKind);
1301 assert(Cost >= 0 && "TTI should not produce negative costs!");
1302 return Cost;
1303}
1304
1305InstructionCost TargetTransformInfo::getReplicationShuffleCost(
1306 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
1307 TTI::TargetCostKind CostKind) const {
1308 InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
1309 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
1310 assert(Cost >= 0 && "TTI should not produce negative costs!");
1311 return Cost;
1312}
1313
1314InstructionCost TargetTransformInfo::getMemoryOpCost(
1315 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1316 TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo,
1317 const Instruction *I) const {
1318 assert((I == nullptr || I->getOpcode() == Opcode) &&
1319 "Opcode should reflect passed instruction.");
1320 InstructionCost Cost = TTIImpl->getMemoryOpCost(
1321 Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
1322 assert(Cost >= 0 && "TTI should not produce negative costs!");
1323 return Cost;
1324}
1325
1326InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(
1327 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1328 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1329 bool UseMaskForCond, bool UseMaskForGaps) const {
1330 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1331 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1332 UseMaskForCond, UseMaskForGaps);
1333 assert(Cost >= 0 && "TTI should not produce negative costs!");
1334 return Cost;
1335}
1336
1337InstructionCost
1338TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
1339 TTI::TargetCostKind CostKind) const {
1340 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1341 assert(Cost >= 0 && "TTI should not produce negative costs!");
1342 return Cost;
1343}
1344
1345InstructionCost TargetTransformInfo::getMemIntrinsicInstrCost(
1346 const MemIntrinsicCostAttributes &MICA,
1347 TTI::TargetCostKind CostKind) const {
1348 InstructionCost Cost = TTIImpl->getMemIntrinsicInstrCost(MICA, CostKind);
1349 assert(Cost >= 0 && "TTI should not produce negative costs!");
1350 return Cost;
1351}
1352
1353InstructionCost
1354TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
1355 ArrayRef<Type *> Tys,
1356 TTI::TargetCostKind CostKind) const {
1357 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1358 assert(Cost >= 0 && "TTI should not produce negative costs!");
1359 return Cost;
1360}
1361
1362unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
1363 return TTIImpl->getNumberOfParts(Tp);
1364}
1365
1366InstructionCost TargetTransformInfo::getAddressComputationCost(
1367 Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
1368 TTI::TargetCostKind CostKind) const {
1369 InstructionCost Cost =
1370 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
1371 assert(Cost >= 0 && "TTI should not produce negative costs!");
1372 return Cost;
1373}
1374
1375InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
1376 InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1377 assert(Cost >= 0 && "TTI should not produce negative costs!");
1378 return Cost;
1379}
1380
1381uint64_t TargetTransformInfo::getMaxMemIntrinsicInlineSizeThreshold() const {
1382 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1383}
1384
1385InstructionCost TargetTransformInfo::getArithmeticReductionCost(
1386 unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1387 TTI::TargetCostKind CostKind) const {
1388 InstructionCost Cost =
1389 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1390 assert(Cost >= 0 && "TTI should not produce negative costs!");
1391 return Cost;
1392}
1393
1394InstructionCost TargetTransformInfo::getMinMaxReductionCost(
1395 Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
1396 TTI::TargetCostKind CostKind) const {
1397 InstructionCost Cost =
1398 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1399 assert(Cost >= 0 && "TTI should not produce negative costs!");
1400 return Cost;
1401}
1402
1403InstructionCost TargetTransformInfo::getExtendedReductionCost(
1404 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1405 std::optional<FastMathFlags> FMF, TTI::TargetCostKind CostKind) const {
1406 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1407 CostKind);
1408}
1409
1410InstructionCost TargetTransformInfo::getMulAccReductionCost(
1411 bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty,
1412 TTI::TargetCostKind CostKind) const {
1413 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1414 CostKind);
1415}
1416
1417InstructionCost
1418TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
1419 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1420}
1421
1422bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
1423 MemIntrinsicInfo &Info) const {
1424 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1425}
1426
1427unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
1428 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1429}
1430
1431Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
1432 IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate) const {
1433 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1434 CanCreate);
1435}
1436
1437Type *TargetTransformInfo::getMemcpyLoopLoweringType(
1438 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1439 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
1440 std::optional<uint32_t> AtomicElementSize) const {
1441 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1442 DestAddrSpace, SrcAlign, DestAlign,
1443 AtomicElementSize);
1444}
1445
1446void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
1447 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1448 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1449 Align SrcAlign, Align DestAlign,
1450 std::optional<uint32_t> AtomicCpySize) const {
1451 TTIImpl->getMemcpyLoopResidualLoweringType(
1452 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1453 DestAlign, AtomicCpySize);
1454}
1455
1456bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
1457 const Function *Callee) const {
1458 return TTIImpl->areInlineCompatible(Caller, Callee);
1459}
1460
1461unsigned
1462TargetTransformInfo::getInlineCallPenalty(const Function *F,
1463 const CallBase &Call,
1464 unsigned DefaultCallPenalty) const {
1465 return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1466}
1467
1468bool TargetTransformInfo::shouldCopyAttributeWhenOutliningFrom(
1469 const Function *Caller, const Attribute &Attr) const {
1470 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1471}
1472bool TargetTransformInfo::areTypesABICompatible(const Function *Caller,
1473 const Function *Callee,
1474 ArrayRef<Type *> Types) const {
1475 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1476}
1477
1478bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
1479 Type *Ty) const {
1480 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1481}
1482
1483bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
1484 Type *Ty) const {
1485 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1486}
1487
1488unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
1489 return TTIImpl->getLoadStoreVecRegBitWidth(AddrSpace: AS);
1490}
1491
1492bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
1493 return TTIImpl->isLegalToVectorizeLoad(LI);
1494}
1495
1496bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
1497 return TTIImpl->isLegalToVectorizeStore(SI);
1498}
1499
1500bool TargetTransformInfo::isLegalToVectorizeLoadChain(
1501 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1502 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1503 AddrSpace);
1504}
1505
1506bool TargetTransformInfo::isLegalToVectorizeStoreChain(
1507 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1508 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1509 AddrSpace);
1510}
1511
1512bool TargetTransformInfo::isLegalToVectorizeReduction(
1513 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1514 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1515}
1516
1517bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const {
1518 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1519}
1520
1521unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
1522 unsigned LoadSize,
1523 unsigned ChainSizeInBytes,
1524 VectorType *VecTy) const {
1525 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1526}
1527
1528unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
1529 unsigned StoreSize,
1530 unsigned ChainSizeInBytes,
1531 VectorType *VecTy) const {
1532 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1533}
1534
1535bool TargetTransformInfo::preferFixedOverScalableIfEqualCost() const {
1536 return TTIImpl->preferFixedOverScalableIfEqualCost();
1537}
1538
1539bool TargetTransformInfo::preferInLoopReduction(RecurKind Kind,
1540 Type *Ty) const {
1541 return TTIImpl->preferInLoopReduction(Kind, Ty);
1542}
1543
1544bool TargetTransformInfo::preferAlternateOpcodeVectorization() const {
1545 return TTIImpl->preferAlternateOpcodeVectorization();
1546}
1547
1548bool TargetTransformInfo::preferSLPInstCountCheck() const {
1549 return TTIImpl->preferSLPInstCountCheck();
1550}
1551
1552bool TargetTransformInfo::preferPredicatedReductionSelect() const {
1553 return TTIImpl->preferPredicatedReductionSelect();
1554}
1555
1556bool TargetTransformInfo::preferEpilogueVectorization(
1557 ElementCount Iters) const {
1558 return TTIImpl->preferEpilogueVectorization(Iters);
1559}
1560
1561bool TargetTransformInfo::shouldConsiderVectorizationRegPressure() const {
1562 return TTIImpl->shouldConsiderVectorizationRegPressure();
1563}
1564
1565TargetTransformInfo::VPLegalization
1566TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const {
1567 return TTIImpl->getVPLegalizationStrategy(PI: VPI);
1568}
1569
1570bool TargetTransformInfo::hasArmWideBranch(bool Thumb) const {
1571 return TTIImpl->hasArmWideBranch(Thumb);
1572}
1573
1574APInt TargetTransformInfo::getFeatureMask(const Function &F) const {
1575 return TTIImpl->getFeatureMask(F);
1576}
1577
1578APInt TargetTransformInfo::getPriorityMask(const Function &F) const {
1579 return TTIImpl->getPriorityMask(F);
1580}
1581
1582bool TargetTransformInfo::isMultiversionedFunction(const Function &F) const {
1583 return TTIImpl->isMultiversionedFunction(F);
1584}
1585
1586unsigned TargetTransformInfo::getMaxNumArgs() const {
1587 return TTIImpl->getMaxNumArgs();
1588}
1589
1590bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
1591 return TTIImpl->shouldExpandReduction(II);
1592}
1593
1594TargetTransformInfo::ReductionShuffle
1595TargetTransformInfo::getPreferredExpandedReductionShuffle(
1596 const IntrinsicInst *II) const {
1597 return TTIImpl->getPreferredExpandedReductionShuffle(II);
1598}
1599
1600unsigned TargetTransformInfo::getGISelRematGlobalCost() const {
1601 return TTIImpl->getGISelRematGlobalCost();
1602}
1603
1604unsigned TargetTransformInfo::getMinTripCountTailFoldingThreshold() const {
1605 return TTIImpl->getMinTripCountTailFoldingThreshold();
1606}
1607
1608bool TargetTransformInfo::supportsScalableVectors() const {
1609 return TTIImpl->supportsScalableVectors();
1610}
1611
1612bool TargetTransformInfo::enableScalableVectorization() const {
1613 return TTIImpl->enableScalableVectorization();
1614}
1615
1616bool TargetTransformInfo::hasActiveVectorLength() const {
1617 return TTIImpl->hasActiveVectorLength();
1618}
1619
1620bool TargetTransformInfo::isProfitableToSinkOperands(
1621 Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
1622 return TTIImpl->isProfitableToSinkOperands(I, Ops&: OpsToSink);
1623}
1624
1625bool TargetTransformInfo::isVectorShiftByScalarCheap(Type *Ty) const {
1626 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1627}
1628
1629unsigned
1630TargetTransformInfo::getNumBytesToPadGlobalArray(unsigned Size,
1631 Type *ArrayType) const {
1632 return TTIImpl->getNumBytesToPadGlobalArray(Size, ArrayType);
1633}
1634
1635void TargetTransformInfo::collectKernelLaunchBounds(
1636 const Function &F,
1637 SmallVectorImpl<std::pair<StringRef, int64_t>> &LB) const {
1638 return TTIImpl->collectKernelLaunchBounds(F, LB);
1639}
1640
1641bool TargetTransformInfo::allowVectorElementIndexingUsingGEP() const {
1642 return TTIImpl->allowVectorElementIndexingUsingGEP();
1643}
1644
1645bool TargetTransformInfo::isUniform(const Instruction *I,
1646 const SmallBitVector &UniformArgs) const {
1647 return TTIImpl->isUniform(I, UniformArgs);
1648}
1649
1650TargetTransformInfoImplBase::~TargetTransformInfoImplBase() = default;
1651
1652TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1653
1654TargetIRAnalysis::TargetIRAnalysis(
1655 std::function<Result(const Function &)> TTICallback)
1656 : TTICallback(std::move(TTICallback)) {}
1657
1658TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1659 FunctionAnalysisManager &) {
1660 assert(!F.isIntrinsic() && "Should not request TTI for intrinsics");
1661 return TTICallback(F);
1662}
1663
1664AnalysisKey TargetIRAnalysis::Key;
1665
1666TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1667 return Result(F.getDataLayout());
1668}
1669
1670// Register the basic pass.
1671INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1672 "Target Transform Information", false, true)
1673char TargetTransformInfoWrapperPass::ID = 0;
1674
1675void TargetTransformInfoWrapperPass::anchor() {}
1676
1677TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1678 : ImmutablePass(ID) {}
1679
1680TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1681 TargetIRAnalysis TIRA)
1682 : ImmutablePass(ID), TIRA(std::move(TIRA)) {}
1683
1684TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1685 FunctionAnalysisManager DummyFAM;
1686 TTI = TIRA.run(F, DummyFAM);
1687 return *TTI;
1688}
1689
1690ImmutablePass *
1691llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1692 return new TargetTransformInfoWrapperPass(std::move(TIRA));
1693}
1694