1//===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "llvm/Analysis/TargetTransformInfo.h"
10#include "llvm/ADT/SmallVector.h"
11#include "llvm/Analysis/CFG.h"
12#include "llvm/Analysis/LoopIterator.h"
13#include "llvm/Analysis/TargetLibraryInfo.h"
14#include "llvm/Analysis/TargetTransformInfoImpl.h"
15#include "llvm/IR/CFG.h"
16#include "llvm/IR/Dominators.h"
17#include "llvm/IR/Instruction.h"
18#include "llvm/IR/Instructions.h"
19#include "llvm/IR/IntrinsicInst.h"
20#include "llvm/IR/Module.h"
21#include "llvm/IR/Operator.h"
22#include "llvm/InitializePasses.h"
23#include "llvm/Support/CommandLine.h"
24#include <optional>
25#include <utility>
26
27using namespace llvm;
28using namespace PatternMatch;
29
30#define DEBUG_TYPE "tti"
31
32static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(Val: false),
33 cl::Hidden,
34 cl::desc("Recognize reduction patterns."));
35
36static cl::opt<unsigned> CacheLineSize(
37 "cache-line-size", cl::init(Val: 0), cl::Hidden,
38 cl::desc("Use this to override the target cache line size when "
39 "specified by the user."));
40
41static cl::opt<unsigned> MinPageSize(
42 "min-page-size", cl::init(Val: 0), cl::Hidden,
43 cl::desc("Use this to override the target's minimum page size."));
44
45static cl::opt<unsigned> PredictableBranchThreshold(
46 "predictable-branch-threshold", cl::init(Val: 99), cl::Hidden,
47 cl::desc(
48 "Use this to override the target's predictable branch threshold (%)."));
49
50namespace {
51/// No-op implementation of the TTI interface using the utility base
52/// classes.
53///
54/// This is used when no target specific information is available.
55struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
56 explicit NoTTIImpl(const DataLayout &DL)
57 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
58};
59} // namespace
60
61TargetTransformInfo::TargetTransformInfo(
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
63 : TTIImpl(std::move(Impl)) {}
64
65bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
66 // If the loop has irreducible control flow, it can not be converted to
67 // Hardware loop.
68 LoopBlocksRPO RPOT(L);
69 RPOT.perform(LI: &LI);
70 if (containsIrreducibleCFG<const BasicBlock *>(RPOTraversal&: RPOT, LI))
71 return false;
72 return true;
73}
74
75IntrinsicCostAttributes::IntrinsicCostAttributes(
76 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
77 bool TypeBasedOnly)
78 : II(dyn_cast<IntrinsicInst>(Val: &CI)), RetTy(CI.getType()), IID(Id),
79 ScalarizationCost(ScalarizationCost) {
80
81 if (const auto *FPMO = dyn_cast<FPMathOperator>(Val: &CI))
82 FMF = FPMO->getFastMathFlags();
83
84 if (!TypeBasedOnly)
85 Arguments.insert(I: Arguments.begin(), From: CI.arg_begin(), To: CI.arg_end());
86 FunctionType *FTy = CI.getCalledFunction()->getFunctionType();
87 ParamTys.insert(I: ParamTys.begin(), From: FTy->param_begin(), To: FTy->param_end());
88}
89
90IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
91 ArrayRef<Type *> Tys,
92 FastMathFlags Flags,
93 const IntrinsicInst *I,
94 InstructionCost ScalarCost)
95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
97}
98
99IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty,
100 ArrayRef<const Value *> Args)
101 : RetTy(Ty), IID(Id) {
102
103 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
104 ParamTys.reserve(N: Arguments.size());
105 for (const Value *Argument : Arguments)
106 ParamTys.push_back(Elt: Argument->getType());
107}
108
109IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
110 ArrayRef<const Value *> Args,
111 ArrayRef<Type *> Tys,
112 FastMathFlags Flags,
113 const IntrinsicInst *I,
114 InstructionCost ScalarCost)
115 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
116 ParamTys.insert(I: ParamTys.begin(), From: Tys.begin(), To: Tys.end());
117 Arguments.insert(I: Arguments.begin(), From: Args.begin(), To: Args.end());
118}
119
120HardwareLoopInfo::HardwareLoopInfo(Loop *L) : L(L) {
121 // Match default options:
122 // - hardware-loop-counter-bitwidth = 32
123 // - hardware-loop-decrement = 1
124 CountType = Type::getInt32Ty(C&: L->getHeader()->getContext());
125 LoopDecrement = ConstantInt::get(Ty: CountType, V: 1);
126}
127
128bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
129 LoopInfo &LI, DominatorTree &DT,
130 bool ForceNestedLoop,
131 bool ForceHardwareLoopPHI) {
132 SmallVector<BasicBlock *, 4> ExitingBlocks;
133 L->getExitingBlocks(ExitingBlocks);
134
135 for (BasicBlock *BB : ExitingBlocks) {
136 // If we pass the updated counter back through a phi, we need to know
137 // which latch the updated value will be coming from.
138 if (!L->isLoopLatch(BB)) {
139 if (ForceHardwareLoopPHI || CounterInReg)
140 continue;
141 }
142
143 const SCEV *EC = SE.getExitCount(L, ExitingBlock: BB);
144 if (isa<SCEVCouldNotCompute>(Val: EC))
145 continue;
146 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(Val: EC)) {
147 if (ConstEC->getValue()->isZero())
148 continue;
149 } else if (!SE.isLoopInvariant(S: EC, L))
150 continue;
151
152 if (SE.getTypeSizeInBits(Ty: EC->getType()) > CountType->getBitWidth())
153 continue;
154
155 // If this exiting block is contained in a nested loop, it is not eligible
156 // for insertion of the branch-and-decrement since the inner loop would
157 // end up messing up the value in the CTR.
158 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
159 continue;
160
161 // We now have a loop-invariant count of loop iterations (which is not the
162 // constant zero) for which we know that this loop will not exit via this
163 // existing block.
164
165 // We need to make sure that this block will run on every loop iteration.
166 // For this to be true, we must dominate all blocks with backedges. Such
167 // blocks are in-loop predecessors to the header block.
168 bool NotAlways = false;
169 for (BasicBlock *Pred : predecessors(BB: L->getHeader())) {
170 if (!L->contains(BB: Pred))
171 continue;
172
173 if (!DT.dominates(A: BB, B: Pred)) {
174 NotAlways = true;
175 break;
176 }
177 }
178
179 if (NotAlways)
180 continue;
181
182 // Make sure this blocks ends with a conditional branch.
183 Instruction *TI = BB->getTerminator();
184 if (!TI)
185 continue;
186
187 if (CondBrInst *BI = dyn_cast<CondBrInst>(Val: TI))
188 ExitBranch = BI;
189 else
190 continue;
191
192 // Note that this block may not be the loop latch block, even if the loop
193 // has a latch block.
194 ExitBlock = BB;
195 ExitCount = EC;
196 break;
197 }
198
199 if (!ExitBlock)
200 return false;
201 return true;
202}
203
204TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
205 : TTIImpl(std::make_unique<NoTTIImpl>(args: DL)) {}
206
207TargetTransformInfo::~TargetTransformInfo() = default;
208
209TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
210 : TTIImpl(std::move(Arg.TTIImpl)) {}
211
212TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
213 TTIImpl = std::move(RHS.TTIImpl);
214 return *this;
215}
216
217unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
218 return TTIImpl->getInliningThresholdMultiplier();
219}
220
221unsigned
222TargetTransformInfo::getInliningCostBenefitAnalysisSavingsMultiplier() const {
223 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
224}
225
226unsigned
227TargetTransformInfo::getInliningCostBenefitAnalysisProfitableMultiplier()
228 const {
229 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
230}
231
232int TargetTransformInfo::getInliningLastCallToStaticBonus() const {
233 return TTIImpl->getInliningLastCallToStaticBonus();
234}
235
236unsigned
237TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const {
238 return TTIImpl->adjustInliningThreshold(CB);
239}
240
241unsigned TargetTransformInfo::getCallerAllocaCost(const CallBase *CB,
242 const AllocaInst *AI) const {
243 return TTIImpl->getCallerAllocaCost(CB, AI);
244}
245
246int TargetTransformInfo::getInlinerVectorBonusPercent() const {
247 return TTIImpl->getInlinerVectorBonusPercent();
248}
249
250InstructionCost TargetTransformInfo::getGEPCost(
251 Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
252 Type *AccessType, TTI::TargetCostKind CostKind) const {
253 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
254}
255
256InstructionCost TargetTransformInfo::getPointersChainCost(
257 ArrayRef<const Value *> Ptrs, const Value *Base,
258 const TTI::PointersChainInfo &Info, Type *AccessTy,
259 TTI::TargetCostKind CostKind) const {
260 assert((Base || !Info.isSameBase()) &&
261 "If pointers have same base address it has to be provided.");
262 return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
263}
264
265unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(
266 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
267 BlockFrequencyInfo *BFI) const {
268 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
269}
270
271InstructionCost
272TargetTransformInfo::getInstructionCost(const User *U,
273 ArrayRef<const Value *> Operands,
274 enum TargetCostKind CostKind) const {
275 InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
276 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) &&
277 "TTI should not produce negative costs!");
278 return Cost;
279}
280
281BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const {
282 return PredictableBranchThreshold.getNumOccurrences() > 0
283 ? BranchProbability(PredictableBranchThreshold, 100)
284 : TTIImpl->getPredictableBranchThreshold();
285}
286
287InstructionCost TargetTransformInfo::getBranchMispredictPenalty() const {
288 return TTIImpl->getBranchMispredictPenalty();
289}
290
291bool TargetTransformInfo::hasBranchDivergence(const Function *F) const {
292 return TTIImpl->hasBranchDivergence(F);
293}
294
295ValueUniformity
296llvm::TargetTransformInfo::getValueUniformity(const Value *V) const {
297 // Calls with the NoDivergenceSource attribute are always uniform.
298 if (const auto *Call = dyn_cast<CallBase>(Val: V)) {
299 if (Call->hasFnAttr(Kind: Attribute::NoDivergenceSource))
300 return ValueUniformity::AlwaysUniform;
301 }
302 return TTIImpl->getValueUniformity(V);
303}
304
305bool llvm::TargetTransformInfo::isValidAddrSpaceCast(unsigned FromAS,
306 unsigned ToAS) const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
308}
309
310bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned FromAS,
311 unsigned ToAS) const {
312 return TTIImpl->addrspacesMayAlias(AS0: FromAS, AS1: ToAS);
313}
314
315unsigned TargetTransformInfo::getFlatAddressSpace() const {
316 return TTIImpl->getFlatAddressSpace();
317}
318
319bool TargetTransformInfo::collectFlatAddressOperands(
320 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
321 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
322}
323
324bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
325 unsigned ToAS) const {
326 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
327}
328
329std::pair<KnownBits, KnownBits>
330TargetTransformInfo::computeKnownBitsAddrSpaceCast(unsigned ToAS,
331 const Value &PtrOp) const {
332 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
333}
334
335KnownBits TargetTransformInfo::computeKnownBitsAddrSpaceCast(
336 unsigned FromAS, unsigned ToAS, const KnownBits &FromPtrBits) const {
337 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
338}
339
340APInt TargetTransformInfo::getAddrSpaceCastPreservedPtrMask(
341 unsigned SrcAS, unsigned DstAS) const {
342 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
343}
344
345bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace(
346 unsigned AS) const {
347 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
348}
349
350unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const {
351 return TTIImpl->getAssumedAddrSpace(V);
352}
353
354bool TargetTransformInfo::isSingleThreaded() const {
355 return TTIImpl->isSingleThreaded();
356}
357
358std::pair<const Value *, unsigned>
359TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const {
360 return TTIImpl->getPredicatedAddrSpace(V);
361}
362
363Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace(
364 IntrinsicInst *II, Value *OldV, Value *NewV) const {
365 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
366}
367
368bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
369 return TTIImpl->isLoweredToCall(F);
370}
371
372bool TargetTransformInfo::isHardwareLoopProfitable(
373 Loop *L, ScalarEvolution &SE, AssumptionCache &AC,
374 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
375 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
376}
377
378unsigned TargetTransformInfo::getEpilogueVectorizationMinVF() const {
379 return TTIImpl->getEpilogueVectorizationMinVF();
380}
381
382bool TargetTransformInfo::preferPredicateOverEpilogue(
383 TailFoldingInfo *TFI) const {
384 return TTIImpl->preferPredicateOverEpilogue(TFI);
385}
386
387TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle() const {
388 return TTIImpl->getPreferredTailFoldingStyle();
389}
390
391std::optional<Instruction *>
392TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC,
393 IntrinsicInst &II) const {
394 return TTIImpl->instCombineIntrinsic(IC, II);
395}
396
397std::optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(
398 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
399 bool &KnownBitsComputed) const {
400 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
401 KnownBitsComputed);
402}
403
404std::optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(
405 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
406 APInt &UndefElts2, APInt &UndefElts3,
407 std::function<void(Instruction *, unsigned, APInt, APInt &)>
408 SimplifyAndSetOp) const {
409 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
410 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
411 SimplifyAndSetOp);
412}
413
414void TargetTransformInfo::getUnrollingPreferences(
415 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP,
416 OptimizationRemarkEmitter *ORE) const {
417 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
418}
419
420void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
421 PeelingPreferences &PP) const {
422 return TTIImpl->getPeelingPreferences(L, SE, PP);
423}
424
425bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
426 return TTIImpl->isLegalAddImmediate(Imm);
427}
428
429bool TargetTransformInfo::isLegalAddScalableImmediate(int64_t Imm) const {
430 return TTIImpl->isLegalAddScalableImmediate(Imm);
431}
432
433bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
434 return TTIImpl->isLegalICmpImmediate(Imm);
435}
436
437bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
438 int64_t BaseOffset,
439 bool HasBaseReg, int64_t Scale,
440 unsigned AddrSpace,
441 Instruction *I,
442 int64_t ScalableOffset) const {
443 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
444 Scale, AddrSpace, I, ScalableOffset);
445}
446
447bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1,
448 const LSRCost &C2) const {
449 return TTIImpl->isLSRCostLess(C1, C2);
450}
451
452bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const {
453 return TTIImpl->isNumRegsMajorCostOfLSR();
454}
455
456bool TargetTransformInfo::shouldDropLSRSolutionIfLessProfitable() const {
457 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
458}
459
460bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const {
461 return TTIImpl->isProfitableLSRChainElement(I);
462}
463
464bool TargetTransformInfo::canMacroFuseCmp() const {
465 return TTIImpl->canMacroFuseCmp();
466}
467
468bool TargetTransformInfo::canSaveCmp(Loop *L, CondBrInst **BI,
469 ScalarEvolution *SE, LoopInfo *LI,
470 DominatorTree *DT, AssumptionCache *AC,
471 TargetLibraryInfo *LibInfo) const {
472 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
473}
474
475TTI::AddressingModeKind
476TargetTransformInfo::getPreferredAddressingMode(const Loop *L,
477 ScalarEvolution *SE) const {
478 return TTIImpl->getPreferredAddressingMode(L, SE);
479}
480
481bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, Align Alignment,
482 unsigned AddressSpace,
483 TTI::MaskKind MaskKind) const {
484 return TTIImpl->isLegalMaskedStore(DataType, Alignment, AddressSpace,
485 MaskKind);
486}
487
488bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, Align Alignment,
489 unsigned AddressSpace,
490 TTI::MaskKind MaskKind) const {
491 return TTIImpl->isLegalMaskedLoad(DataType, Alignment, AddressSpace,
492 MaskKind);
493}
494
495bool TargetTransformInfo::isLegalNTStore(Type *DataType,
496 Align Alignment) const {
497 return TTIImpl->isLegalNTStore(DataType, Alignment);
498}
499
500bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
501 return TTIImpl->isLegalNTLoad(DataType, Alignment);
502}
503
504bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy,
505 ElementCount NumElements) const {
506 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
507}
508
509bool TargetTransformInfo::isLegalMaskedGather(Type *DataType,
510 Align Alignment) const {
511 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
512}
513
514bool TargetTransformInfo::isLegalAltInstr(
515 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
516 const SmallBitVector &OpcodeMask) const {
517 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
518}
519
520bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType,
521 Align Alignment) const {
522 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
523}
524
525bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType,
526 Align Alignment) const {
527 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
528}
529
530bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType,
531 Align Alignment) const {
532 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
533}
534
535bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType,
536 Align Alignment) const {
537 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
538}
539
540bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType,
541 Align Alignment) const {
542 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
543}
544
545bool TargetTransformInfo::isLegalStridedLoadStore(Type *DataType,
546 Align Alignment) const {
547 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
548}
549
550bool TargetTransformInfo::isLegalInterleavedAccessType(
551 VectorType *VTy, unsigned Factor, Align Alignment,
552 unsigned AddrSpace) const {
553 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
554 AddrSpace);
555}
556
557bool TargetTransformInfo::isLegalMaskedVectorHistogram(Type *AddrType,
558 Type *DataType) const {
559 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
560}
561
562bool TargetTransformInfo::enableOrderedReductions() const {
563 return TTIImpl->enableOrderedReductions();
564}
565
566bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
567 return TTIImpl->hasDivRemOp(DataType, IsSigned);
568}
569
570bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
571 unsigned AddrSpace) const {
572 return TTIImpl->hasVolatileVariant(I, AddrSpace);
573}
574
575bool TargetTransformInfo::prefersVectorizedAddressing() const {
576 return TTIImpl->prefersVectorizedAddressing();
577}
578
579InstructionCost TargetTransformInfo::getScalingFactorCost(
580 Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg,
581 int64_t Scale, unsigned AddrSpace) const {
582 InstructionCost Cost = TTIImpl->getScalingFactorCost(
583 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
584 assert(Cost >= 0 && "TTI should not produce negative costs!");
585 return Cost;
586}
587
588bool TargetTransformInfo::LSRWithInstrQueries() const {
589 return TTIImpl->LSRWithInstrQueries();
590}
591
592bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
593 return TTIImpl->isTruncateFree(Ty1, Ty2);
594}
595
596bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
597 return TTIImpl->isProfitableToHoist(I);
598}
599
600bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
601
602bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
603 return TTIImpl->isTypeLegal(Ty);
604}
605
606unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const {
607 return TTIImpl->getRegUsageForType(Ty);
608}
609
610bool TargetTransformInfo::shouldBuildLookupTables() const {
611 return TTIImpl->shouldBuildLookupTables();
612}
613
614bool TargetTransformInfo::shouldBuildLookupTablesForConstant(
615 Constant *C) const {
616 return TTIImpl->shouldBuildLookupTablesForConstant(C);
617}
618
619bool TargetTransformInfo::shouldBuildRelLookupTables() const {
620 return TTIImpl->shouldBuildRelLookupTables();
621}
622
623bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
624 return TTIImpl->useColdCCForColdCall(F);
625}
626
627bool TargetTransformInfo::useFastCCForInternalCall(Function &F) const {
628 return TTIImpl->useFastCCForInternalCall(F);
629}
630
631bool TargetTransformInfo::isTargetIntrinsicTriviallyScalarizable(
632 Intrinsic::ID ID) const {
633 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(ID);
634}
635
636bool TargetTransformInfo::isTargetIntrinsicWithScalarOpAtArg(
637 Intrinsic::ID ID, unsigned ScalarOpdIdx) const {
638 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
639}
640
641bool TargetTransformInfo::isTargetIntrinsicWithOverloadTypeAtArg(
642 Intrinsic::ID ID, int OpdIdx) const {
643 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
644}
645
646bool TargetTransformInfo::isTargetIntrinsicWithStructReturnOverloadAtField(
647 Intrinsic::ID ID, int RetIdx) const {
648 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
649}
650
651TargetTransformInfo::VectorInstrContext
652TargetTransformInfo::getVectorInstrContextHint(const Instruction *I) {
653 if (!I)
654 return VectorInstrContext::None;
655
656 // For inserts, check if the value being inserted comes from a single-use
657 // load.
658 if (isa<InsertElementInst>(Val: I) && isa<LoadInst>(Val: I->getOperand(i: 1)) &&
659 I->getOperand(i: 1)->hasOneUse())
660 return VectorInstrContext::Load;
661
662 // For extracts, check if it has a single use that is a store.
663 if (isa<ExtractElementInst>(Val: I) && I->hasOneUse() &&
664 isa<StoreInst>(Val: *I->user_begin()))
665 return VectorInstrContext::Store;
666
667 return VectorInstrContext::None;
668}
669
670InstructionCost TargetTransformInfo::getScalarizationOverhead(
671 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
672 TTI::TargetCostKind CostKind, bool ForPoisonSrc, ArrayRef<Value *> VL,
673 TTI::VectorInstrContext VIC) const {
674 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
675 CostKind, ForPoisonSrc, VL, VIC);
676}
677
678InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(
679 ArrayRef<Type *> Tys, TTI::TargetCostKind CostKind,
680 TTI::VectorInstrContext VIC) const {
681 return TTIImpl->getOperandsScalarizationOverhead(Tys, CostKind, VIC);
682}
683
684bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
685 return TTIImpl->supportsEfficientVectorElementLoadStore();
686}
687
688bool TargetTransformInfo::supportsTailCalls() const {
689 return TTIImpl->supportsTailCalls();
690}
691
692bool TargetTransformInfo::supportsTailCallFor(const CallBase *CB) const {
693 return TTIImpl->supportsTailCallFor(CB);
694}
695
696bool TargetTransformInfo::enableAggressiveInterleaving(
697 bool LoopHasReductions) const {
698 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
699}
700
701TargetTransformInfo::MemCmpExpansionOptions
702TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
703 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
704}
705
706bool TargetTransformInfo::enableSelectOptimize() const {
707 return TTIImpl->enableSelectOptimize();
708}
709
710bool TargetTransformInfo::shouldTreatInstructionLikeSelect(
711 const Instruction *I) const {
712 return TTIImpl->shouldTreatInstructionLikeSelect(I);
713}
714
715bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
716 return TTIImpl->enableInterleavedAccessVectorization();
717}
718
719bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
720 return TTIImpl->enableMaskedInterleavedAccessVectorization();
721}
722
723bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
724 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
725}
726
727bool
728TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
729 unsigned BitWidth,
730 unsigned AddressSpace,
731 Align Alignment,
732 unsigned *Fast) const {
733 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
734 AddressSpace, Alignment, Fast);
735}
736
737TargetTransformInfo::PopcntSupportKind
738TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
739 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
740}
741
742bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
743 return TTIImpl->haveFastSqrt(Ty);
744}
745
746bool TargetTransformInfo::isExpensiveToSpeculativelyExecute(
747 const Instruction *I) const {
748 return TTIImpl->isExpensiveToSpeculativelyExecute(I);
749}
750
751bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
752 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
753}
754
755InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const {
756 InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
757 assert(Cost >= 0 && "TTI should not produce negative costs!");
758 return Cost;
759}
760
761InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode,
762 unsigned Idx,
763 const APInt &Imm,
764 Type *Ty) const {
765 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
766 assert(Cost >= 0 && "TTI should not produce negative costs!");
767 return Cost;
768}
769
770InstructionCost
771TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty,
772 TTI::TargetCostKind CostKind) const {
773 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
774 assert(Cost >= 0 && "TTI should not produce negative costs!");
775 return Cost;
776}
777
778InstructionCost TargetTransformInfo::getIntImmCostInst(
779 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
780 TTI::TargetCostKind CostKind, Instruction *Inst) const {
781 InstructionCost Cost =
782 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
783 assert(Cost >= 0 && "TTI should not produce negative costs!");
784 return Cost;
785}
786
787InstructionCost
788TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
789 const APInt &Imm, Type *Ty,
790 TTI::TargetCostKind CostKind) const {
791 InstructionCost Cost =
792 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
793 assert(Cost >= 0 && "TTI should not produce negative costs!");
794 return Cost;
795}
796
797bool TargetTransformInfo::preferToKeepConstantsAttached(
798 const Instruction &Inst, const Function &Fn) const {
799 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
800}
801
802unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
803 return TTIImpl->getNumberOfRegisters(ClassID);
804}
805
806bool TargetTransformInfo::hasConditionalLoadStoreForType(Type *Ty,
807 bool IsStore) const {
808 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
809}
810
811unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
812 Type *Ty) const {
813 return TTIImpl->getRegisterClassForType(Vector, Ty);
814}
815
816const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
817 return TTIImpl->getRegisterClassName(ClassID);
818}
819
820InstructionCost TargetTransformInfo::getRegisterClassSpillCost(
821 unsigned ClassID, TTI::TargetCostKind CostKind) const {
822 return TTIImpl->getRegisterClassSpillCost(ClassID, CostKind);
823}
824
825InstructionCost TargetTransformInfo::getRegisterClassReloadCost(
826 unsigned ClassID, TTI::TargetCostKind CostKind) const {
827 return TTIImpl->getRegisterClassReloadCost(ClassID, CostKind);
828}
829
830TypeSize TargetTransformInfo::getRegisterBitWidth(
831 TargetTransformInfo::RegisterKind K) const {
832 return TTIImpl->getRegisterBitWidth(K);
833}
834
835unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
836 return TTIImpl->getMinVectorRegisterBitWidth();
837}
838
839std::optional<unsigned> TargetTransformInfo::getMaxVScale() const {
840 return TTIImpl->getMaxVScale();
841}
842
843std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
844 return TTIImpl->getVScaleForTuning();
845}
846
847bool TargetTransformInfo::shouldMaximizeVectorBandwidth(
848 TargetTransformInfo::RegisterKind K) const {
849 return TTIImpl->shouldMaximizeVectorBandwidth(K);
850}
851
852ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
853 bool IsScalable) const {
854 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
855}
856
857unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
858 unsigned Opcode) const {
859 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
860}
861
862unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
863 Type *ScalarValTy,
864 Align Alignment,
865 unsigned AddrSpace) const {
866 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy, Alignment,
867 AddrSpace);
868}
869
870bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
871 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
872 return TTIImpl->shouldConsiderAddressTypePromotion(
873 I, AllowPromotionWithoutCommonHeader);
874}
875
876unsigned TargetTransformInfo::getCacheLineSize() const {
877 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
878 : TTIImpl->getCacheLineSize();
879}
880
881std::optional<unsigned>
882TargetTransformInfo::getCacheSize(CacheLevel Level) const {
883 return TTIImpl->getCacheSize(Level);
884}
885
886std::optional<unsigned>
887TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const {
888 return TTIImpl->getCacheAssociativity(Level);
889}
890
891std::optional<unsigned> TargetTransformInfo::getMinPageSize() const {
892 return MinPageSize.getNumOccurrences() > 0 ? MinPageSize
893 : TTIImpl->getMinPageSize();
894}
895
896unsigned TargetTransformInfo::getPrefetchDistance() const {
897 return TTIImpl->getPrefetchDistance();
898}
899
900unsigned TargetTransformInfo::getMinPrefetchStride(
901 unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
902 unsigned NumPrefetches, bool HasCall) const {
903 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
904 NumPrefetches, HasCall);
905}
906
907unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
908 return TTIImpl->getMaxPrefetchIterationsAhead();
909}
910
911bool TargetTransformInfo::enableWritePrefetching() const {
912 return TTIImpl->enableWritePrefetching();
913}
914
915bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
916 return TTIImpl->shouldPrefetchAddressSpace(AS);
917}
918
919InstructionCost TargetTransformInfo::getPartialReductionCost(
920 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
921 ElementCount VF, PartialReductionExtendKind OpAExtend,
922 PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
923 TTI::TargetCostKind CostKind, std::optional<FastMathFlags> FMF) const {
924 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
925 AccumType, VF, OpAExtend, OpBExtend,
926 BinOp, CostKind, FMF);
927}
928
929unsigned TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF) const {
930 return TTIImpl->getMaxInterleaveFactor(VF);
931}
932
933TargetTransformInfo::OperandValueInfo
934TargetTransformInfo::getOperandInfo(const Value *V) {
935 OperandValueKind OpInfo = OK_AnyValue;
936 OperandValueProperties OpProps = OP_None;
937
938 // undef/poison don't materialize constants.
939 if (isa<UndefValue>(Val: V))
940 return {.Kind: OK_AnyValue, .Properties: OP_None};
941
942 if (isa<ConstantInt>(Val: V) || isa<ConstantFP>(Val: V)) {
943 if (const auto *CI = dyn_cast<ConstantInt>(Val: V)) {
944 if (CI->getValue().isPowerOf2())
945 OpProps = OP_PowerOf2;
946 else if (CI->getValue().isNegatedPowerOf2())
947 OpProps = OP_NegatedPowerOf2;
948 }
949 return {.Kind: OK_UniformConstantValue, .Properties: OpProps};
950 }
951
952 // A broadcast shuffle creates a uniform value.
953 // TODO: Add support for non-zero index broadcasts.
954 // TODO: Add support for different source vector width.
955 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(Val: V))
956 if (ShuffleInst->isZeroEltSplat())
957 OpInfo = OK_UniformValue;
958
959 const Value *Splat = getSplatValue(V);
960
961 // Check for a splat of a constant or for a non uniform vector of constants
962 // and check if the constant(s) are all powers of two.
963 if (Splat) {
964 // Check for a splat of a uniform value. This is not loop aware, so return
965 // true only for the obviously uniform cases (argument, globalvalue)
966 if (isa<Argument>(Val: Splat) || isa<GlobalValue>(Val: Splat)) {
967 OpInfo = OK_UniformValue;
968 } else if (isa<Constant>(Val: Splat)) {
969 OpInfo = OK_UniformConstantValue;
970 if (auto *CI = dyn_cast<ConstantInt>(Val: Splat)) {
971 if (CI->getValue().isPowerOf2())
972 OpProps = OP_PowerOf2;
973 else if (CI->getValue().isNegatedPowerOf2())
974 OpProps = OP_NegatedPowerOf2;
975 }
976 }
977 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(Val: V)) {
978 OpInfo = OK_NonUniformConstantValue;
979 bool AllPow2 = true, AllNegPow2 = true;
980 for (uint64_t I = 0, E = CDS->getNumElements(); I != E; ++I) {
981 if (auto *CI = dyn_cast<ConstantInt>(Val: CDS->getElementAsConstant(i: I))) {
982 AllPow2 &= CI->getValue().isPowerOf2();
983 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
984 if (AllPow2 || AllNegPow2)
985 continue;
986 }
987 AllPow2 = AllNegPow2 = false;
988 break;
989 }
990 OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
991 OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
992 } else if (isa<ConstantVector>(Val: V) || isa<ConstantDataVector>(Val: V)) {
993 OpInfo = OK_NonUniformConstantValue;
994 }
995
996 return {.Kind: OpInfo, .Properties: OpProps};
997}
998
999TargetTransformInfo::OperandValueInfo
1000TargetTransformInfo::commonOperandInfo(const Value *X, const Value *Y) {
1001 OperandValueInfo OpInfoX = getOperandInfo(V: X);
1002 if (X == Y)
1003 return OpInfoX;
1004 return OpInfoX.mergeWith(OpInfoY: getOperandInfo(V: Y));
1005}
1006
1007InstructionCost TargetTransformInfo::getArithmeticInstrCost(
1008 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1009 OperandValueInfo Op1Info, OperandValueInfo Op2Info,
1010 ArrayRef<const Value *> Args, const Instruction *CxtI,
1011 const TargetLibraryInfo *TLibInfo) const {
1012
1013 // Use call cost for frem intructions that have platform specific vector math
1014 // functions, as those will be replaced with calls later by SelectionDAG or
1015 // ReplaceWithVecLib pass.
1016 if (TLibInfo && Opcode == Instruction::FRem) {
1017 VectorType *VecTy = dyn_cast<VectorType>(Val: Ty);
1018 LibFunc Func;
1019 if (VecTy &&
1020 TLibInfo->getLibFunc(Opcode: Instruction::FRem, Ty: Ty->getScalarType(), F&: Func) &&
1021 TLibInfo->isFunctionVectorizable(F: TLibInfo->getName(F: Func),
1022 VF: VecTy->getElementCount()))
1023 return getCallInstrCost(F: nullptr, RetTy: VecTy, Tys: {VecTy, VecTy}, CostKind);
1024 }
1025
1026 InstructionCost Cost = TTIImpl->getArithmeticInstrCost(
1027 Opcode, Ty, CostKind, Opd1Info: Op1Info, Opd2Info: Op2Info, Args, CxtI);
1028 assert(Cost >= 0 && "TTI should not produce negative costs!");
1029 return Cost;
1030}
1031
1032InstructionCost TargetTransformInfo::getAltInstrCost(
1033 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
1034 const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const {
1035 InstructionCost Cost =
1036 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);
1037 assert(Cost >= 0 && "TTI should not produce negative costs!");
1038 return Cost;
1039}
1040
1041InstructionCost TargetTransformInfo::getShuffleCost(
1042 ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef<int> Mask,
1043 TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
1044 ArrayRef<const Value *> Args, const Instruction *CxtI) const {
1045 assert((Mask.empty() || DstTy->isScalableTy() ||
1046 Mask.size() == DstTy->getElementCount().getKnownMinValue()) &&
1047 "Expected the Mask to match the return size if given");
1048 assert(SrcTy->getScalarType() == DstTy->getScalarType() &&
1049 "Expected the same scalar types");
1050 InstructionCost Cost = TTIImpl->getShuffleCost(
1051 Kind, DstTy, SrcTy, Mask, CostKind, Index, SubTp, Args, CxtI);
1052 assert(Cost >= 0 && "TTI should not produce negative costs!");
1053 return Cost;
1054}
1055
1056TargetTransformInfo::PartialReductionExtendKind
1057TargetTransformInfo::getPartialReductionExtendKind(Instruction *I) {
1058 if (auto *Cast = dyn_cast<CastInst>(Val: I))
1059 return getPartialReductionExtendKind(CastOpc: Cast->getOpcode());
1060 return PR_None;
1061}
1062
1063Instruction::CastOps
1064TargetTransformInfo::getOpcodeForPartialReductionExtendKind(
1065 TargetTransformInfo::PartialReductionExtendKind Kind) {
1066 switch (Kind) {
1067 case TargetTransformInfo::PR_ZeroExtend:
1068 return Instruction::CastOps::ZExt;
1069 case TargetTransformInfo::PR_SignExtend:
1070 return Instruction::CastOps::SExt;
1071 case TargetTransformInfo::PR_FPExtend:
1072 return Instruction::CastOps::FPExt;
1073 default:
1074 break;
1075 }
1076 llvm_unreachable("Unhandled partial reduction extend kind");
1077}
1078
1079TargetTransformInfo::PartialReductionExtendKind
1080TargetTransformInfo::getPartialReductionExtendKind(
1081 Instruction::CastOps CastOpc) {
1082 switch (CastOpc) {
1083 case Instruction::CastOps::ZExt:
1084 return PR_ZeroExtend;
1085 case Instruction::CastOps::SExt:
1086 return PR_SignExtend;
1087 case Instruction::CastOps::FPExt:
1088 return PR_FPExtend;
1089 default:
1090 return PR_None;
1091 }
1092 llvm_unreachable("Unhandled cast opcode");
1093}
1094
1095TTI::CastContextHint
1096TargetTransformInfo::getCastContextHint(const Instruction *I) {
1097 if (!I)
1098 return CastContextHint::None;
1099
1100 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
1101 unsigned GatScatOp) {
1102 const Instruction *I = dyn_cast<Instruction>(Val: V);
1103 if (!I)
1104 return CastContextHint::None;
1105
1106 if (I->getOpcode() == LdStOp)
1107 return CastContextHint::Normal;
1108
1109 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Val: I)) {
1110 if (II->getIntrinsicID() == MaskedOp)
1111 return TTI::CastContextHint::Masked;
1112 if (II->getIntrinsicID() == GatScatOp)
1113 return TTI::CastContextHint::GatherScatter;
1114 }
1115
1116 return TTI::CastContextHint::None;
1117 };
1118
1119 switch (I->getOpcode()) {
1120 case Instruction::ZExt:
1121 case Instruction::SExt:
1122 case Instruction::FPExt:
1123 return getLoadStoreKind(I->getOperand(i: 0), Instruction::Load,
1124 Intrinsic::masked_load, Intrinsic::masked_gather);
1125 case Instruction::Trunc:
1126 case Instruction::FPTrunc:
1127 if (I->hasOneUse())
1128 return getLoadStoreKind(*I->user_begin(), Instruction::Store,
1129 Intrinsic::masked_store,
1130 Intrinsic::masked_scatter);
1131 break;
1132 default:
1133 return CastContextHint::None;
1134 }
1135
1136 return TTI::CastContextHint::None;
1137}
1138
1139InstructionCost TargetTransformInfo::getCastInstrCost(
1140 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
1141 TTI::TargetCostKind CostKind, const Instruction *I) const {
1142 assert((I == nullptr || I->getOpcode() == Opcode) &&
1143 "Opcode should reflect passed instruction.");
1144 InstructionCost Cost =
1145 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
1146 assert(Cost >= 0 && "TTI should not produce negative costs!");
1147 return Cost;
1148}
1149
1150InstructionCost TargetTransformInfo::getExtractWithExtendCost(
1151 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index,
1152 TTI::TargetCostKind CostKind) const {
1153 InstructionCost Cost =
1154 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index, CostKind);
1155 assert(Cost >= 0 && "TTI should not produce negative costs!");
1156 return Cost;
1157}
1158
1159InstructionCost TargetTransformInfo::getCFInstrCost(
1160 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
1161 assert((I == nullptr || I->getOpcode() == Opcode) &&
1162 "Opcode should reflect passed instruction.");
1163 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
1164 assert(Cost >= 0 && "TTI should not produce negative costs!");
1165 return Cost;
1166}
1167
1168InstructionCost TargetTransformInfo::getCmpSelInstrCost(
1169 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1170 TTI::TargetCostKind CostKind, OperandValueInfo Op1Info,
1171 OperandValueInfo Op2Info, const Instruction *I) const {
1172 assert((I == nullptr || I->getOpcode() == Opcode) &&
1173 "Opcode should reflect passed instruction.");
1174 InstructionCost Cost = TTIImpl->getCmpSelInstrCost(
1175 Opcode, ValTy, CondTy, VecPred, CostKind, Op1Info, Op2Info, I);
1176 assert(Cost >= 0 && "TTI should not produce negative costs!");
1177 return Cost;
1178}
1179
1180InstructionCost TargetTransformInfo::getVectorInstrCost(
1181 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1182 const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC) const {
1183 assert((Opcode == Instruction::InsertElement ||
1184 Opcode == Instruction::ExtractElement) &&
1185 "Expecting Opcode to be insertelement/extractelement.");
1186 InstructionCost Cost =
1187 TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1, VIC);
1188 assert(Cost >= 0 && "TTI should not produce negative costs!");
1189 return Cost;
1190}
1191
1192InstructionCost TargetTransformInfo::getVectorInstrCost(
1193 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1194 Value *Scalar, ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1195 TTI::VectorInstrContext VIC) const {
1196 assert((Opcode == Instruction::InsertElement ||
1197 Opcode == Instruction::ExtractElement) &&
1198 "Expecting Opcode to be insertelement/extractelement.");
1199 InstructionCost Cost = TTIImpl->getVectorInstrCost(
1200 Opcode, Val, CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1201 assert(Cost >= 0 && "TTI should not produce negative costs!");
1202 return Cost;
1203}
1204
1205InstructionCost TargetTransformInfo::getVectorInstrCost(
1206 const Instruction &I, Type *Val, TTI::TargetCostKind CostKind,
1207 unsigned Index, TTI::VectorInstrContext VIC) const {
1208 // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
1209 // This is mentioned in the interface description and respected by all
1210 // callers, but never asserted upon.
1211 InstructionCost Cost =
1212 TTIImpl->getVectorInstrCost(I, Val, CostKind, Index, VIC);
1213 assert(Cost >= 0 && "TTI should not produce negative costs!");
1214 return Cost;
1215}
1216
1217InstructionCost TargetTransformInfo::getIndexedVectorInstrCostFromEnd(
1218 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind,
1219 unsigned Index) const {
1220 InstructionCost Cost =
1221 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val, CostKind, Index);
1222 assert(Cost >= 0 && "TTI should not produce negative costs!");
1223 return Cost;
1224}
1225
1226InstructionCost TargetTransformInfo::getInsertExtractValueCost(
1227 unsigned Opcode, TTI::TargetCostKind CostKind) const {
1228 assert((Opcode == Instruction::InsertValue ||
1229 Opcode == Instruction::ExtractValue) &&
1230 "Expecting Opcode to be insertvalue/extractvalue.");
1231 InstructionCost Cost = TTIImpl->getInsertExtractValueCost(Opcode, CostKind);
1232 assert(Cost >= 0 && "TTI should not produce negative costs!");
1233 return Cost;
1234}
1235
1236InstructionCost TargetTransformInfo::getReplicationShuffleCost(
1237 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
1238 TTI::TargetCostKind CostKind) const {
1239 InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
1240 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
1241 assert(Cost >= 0 && "TTI should not produce negative costs!");
1242 return Cost;
1243}
1244
1245InstructionCost TargetTransformInfo::getMemoryOpCost(
1246 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1247 TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo,
1248 const Instruction *I) const {
1249 assert((I == nullptr || I->getOpcode() == Opcode) &&
1250 "Opcode should reflect passed instruction.");
1251 InstructionCost Cost = TTIImpl->getMemoryOpCost(
1252 Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
1253 assert(Cost >= 0 && "TTI should not produce negative costs!");
1254 return Cost;
1255}
1256
1257InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(
1258 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1259 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1260 bool UseMaskForCond, bool UseMaskForGaps) const {
1261 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1262 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1263 UseMaskForCond, UseMaskForGaps);
1264 assert(Cost >= 0 && "TTI should not produce negative costs!");
1265 return Cost;
1266}
1267
1268InstructionCost
1269TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
1270 TTI::TargetCostKind CostKind) const {
1271 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1272 assert(Cost >= 0 && "TTI should not produce negative costs!");
1273 return Cost;
1274}
1275
1276InstructionCost TargetTransformInfo::getMemIntrinsicInstrCost(
1277 const MemIntrinsicCostAttributes &MICA,
1278 TTI::TargetCostKind CostKind) const {
1279 InstructionCost Cost = TTIImpl->getMemIntrinsicInstrCost(MICA, CostKind);
1280 assert(Cost >= 0 && "TTI should not produce negative costs!");
1281 return Cost;
1282}
1283
1284InstructionCost
1285TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
1286 ArrayRef<Type *> Tys,
1287 TTI::TargetCostKind CostKind) const {
1288 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1289 assert(Cost >= 0 && "TTI should not produce negative costs!");
1290 return Cost;
1291}
1292
1293unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
1294 return TTIImpl->getNumberOfParts(Tp);
1295}
1296
1297InstructionCost TargetTransformInfo::getAddressComputationCost(
1298 Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
1299 TTI::TargetCostKind CostKind) const {
1300 InstructionCost Cost =
1301 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
1302 assert(Cost >= 0 && "TTI should not produce negative costs!");
1303 return Cost;
1304}
1305
1306InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
1307 InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1308 assert(Cost >= 0 && "TTI should not produce negative costs!");
1309 return Cost;
1310}
1311
1312uint64_t TargetTransformInfo::getMaxMemIntrinsicInlineSizeThreshold() const {
1313 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1314}
1315
1316InstructionCost TargetTransformInfo::getArithmeticReductionCost(
1317 unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1318 TTI::TargetCostKind CostKind) const {
1319 InstructionCost Cost =
1320 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1321 assert(Cost >= 0 && "TTI should not produce negative costs!");
1322 return Cost;
1323}
1324
1325InstructionCost TargetTransformInfo::getMinMaxReductionCost(
1326 Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
1327 TTI::TargetCostKind CostKind) const {
1328 InstructionCost Cost =
1329 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1330 assert(Cost >= 0 && "TTI should not produce negative costs!");
1331 return Cost;
1332}
1333
1334InstructionCost TargetTransformInfo::getExtendedReductionCost(
1335 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1336 std::optional<FastMathFlags> FMF, TTI::TargetCostKind CostKind) const {
1337 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1338 CostKind);
1339}
1340
1341InstructionCost TargetTransformInfo::getMulAccReductionCost(
1342 bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty,
1343 TTI::TargetCostKind CostKind) const {
1344 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1345 CostKind);
1346}
1347
1348InstructionCost
1349TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
1350 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1351}
1352
1353bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
1354 MemIntrinsicInfo &Info) const {
1355 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1356}
1357
1358unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
1359 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1360}
1361
1362Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
1363 IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate) const {
1364 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1365 CanCreate);
1366}
1367
1368Type *TargetTransformInfo::getMemcpyLoopLoweringType(
1369 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1370 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
1371 std::optional<uint32_t> AtomicElementSize) const {
1372 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1373 DestAddrSpace, SrcAlign, DestAlign,
1374 AtomicElementSize);
1375}
1376
1377void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
1378 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1379 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1380 Align SrcAlign, Align DestAlign,
1381 std::optional<uint32_t> AtomicCpySize) const {
1382 TTIImpl->getMemcpyLoopResidualLoweringType(
1383 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1384 DestAlign, AtomicCpySize);
1385}
1386
1387bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
1388 const Function *Callee) const {
1389 return TTIImpl->areInlineCompatible(Caller, Callee);
1390}
1391
1392unsigned
1393TargetTransformInfo::getInlineCallPenalty(const Function *F,
1394 const CallBase &Call,
1395 unsigned DefaultCallPenalty) const {
1396 return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1397}
1398
1399bool TargetTransformInfo::shouldCopyAttributeWhenOutliningFrom(
1400 const Function *Caller, const Attribute &Attr) const {
1401 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1402}
1403bool TargetTransformInfo::areTypesABICompatible(const Function *Caller,
1404 const Function *Callee,
1405 ArrayRef<Type *> Types) const {
1406 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1407}
1408
1409bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
1410 Type *Ty) const {
1411 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1412}
1413
1414bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
1415 Type *Ty) const {
1416 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1417}
1418
1419unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
1420 return TTIImpl->getLoadStoreVecRegBitWidth(AddrSpace: AS);
1421}
1422
1423bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
1424 return TTIImpl->isLegalToVectorizeLoad(LI);
1425}
1426
1427bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
1428 return TTIImpl->isLegalToVectorizeStore(SI);
1429}
1430
1431bool TargetTransformInfo::isLegalToVectorizeLoadChain(
1432 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1433 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1434 AddrSpace);
1435}
1436
1437bool TargetTransformInfo::isLegalToVectorizeStoreChain(
1438 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1439 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1440 AddrSpace);
1441}
1442
1443bool TargetTransformInfo::isLegalToVectorizeReduction(
1444 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1445 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1446}
1447
1448bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const {
1449 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1450}
1451
1452unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
1453 unsigned LoadSize,
1454 unsigned ChainSizeInBytes,
1455 VectorType *VecTy) const {
1456 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1457}
1458
1459unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
1460 unsigned StoreSize,
1461 unsigned ChainSizeInBytes,
1462 VectorType *VecTy) const {
1463 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1464}
1465
1466bool TargetTransformInfo::preferFixedOverScalableIfEqualCost(
1467 bool IsEpilogue) const {
1468 return TTIImpl->preferFixedOverScalableIfEqualCost(IsEpilogue);
1469}
1470
1471bool TargetTransformInfo::preferInLoopReduction(RecurKind Kind,
1472 Type *Ty) const {
1473 return TTIImpl->preferInLoopReduction(Kind, Ty);
1474}
1475
1476bool TargetTransformInfo::preferAlternateOpcodeVectorization() const {
1477 return TTIImpl->preferAlternateOpcodeVectorization();
1478}
1479
1480bool TargetTransformInfo::preferPredicatedReductionSelect() const {
1481 return TTIImpl->preferPredicatedReductionSelect();
1482}
1483
1484bool TargetTransformInfo::preferEpilogueVectorization(
1485 ElementCount Iters) const {
1486 return TTIImpl->preferEpilogueVectorization(Iters);
1487}
1488
1489bool TargetTransformInfo::shouldConsiderVectorizationRegPressure() const {
1490 return TTIImpl->shouldConsiderVectorizationRegPressure();
1491}
1492
1493TargetTransformInfo::VPLegalization
1494TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const {
1495 return TTIImpl->getVPLegalizationStrategy(PI: VPI);
1496}
1497
1498bool TargetTransformInfo::hasArmWideBranch(bool Thumb) const {
1499 return TTIImpl->hasArmWideBranch(Thumb);
1500}
1501
1502APInt TargetTransformInfo::getFeatureMask(const Function &F) const {
1503 return TTIImpl->getFeatureMask(F);
1504}
1505
1506APInt TargetTransformInfo::getPriorityMask(const Function &F) const {
1507 return TTIImpl->getPriorityMask(F);
1508}
1509
1510bool TargetTransformInfo::isMultiversionedFunction(const Function &F) const {
1511 return TTIImpl->isMultiversionedFunction(F);
1512}
1513
1514unsigned TargetTransformInfo::getMaxNumArgs() const {
1515 return TTIImpl->getMaxNumArgs();
1516}
1517
1518bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
1519 return TTIImpl->shouldExpandReduction(II);
1520}
1521
1522TargetTransformInfo::ReductionShuffle
1523TargetTransformInfo::getPreferredExpandedReductionShuffle(
1524 const IntrinsicInst *II) const {
1525 return TTIImpl->getPreferredExpandedReductionShuffle(II);
1526}
1527
1528unsigned TargetTransformInfo::getGISelRematGlobalCost() const {
1529 return TTIImpl->getGISelRematGlobalCost();
1530}
1531
1532unsigned TargetTransformInfo::getMinTripCountTailFoldingThreshold() const {
1533 return TTIImpl->getMinTripCountTailFoldingThreshold();
1534}
1535
1536bool TargetTransformInfo::supportsScalableVectors() const {
1537 return TTIImpl->supportsScalableVectors();
1538}
1539
1540bool TargetTransformInfo::enableScalableVectorization() const {
1541 return TTIImpl->enableScalableVectorization();
1542}
1543
1544bool TargetTransformInfo::hasActiveVectorLength() const {
1545 return TTIImpl->hasActiveVectorLength();
1546}
1547
1548bool TargetTransformInfo::isProfitableToSinkOperands(
1549 Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
1550 return TTIImpl->isProfitableToSinkOperands(I, Ops&: OpsToSink);
1551}
1552
1553bool TargetTransformInfo::isVectorShiftByScalarCheap(Type *Ty) const {
1554 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1555}
1556
1557unsigned
1558TargetTransformInfo::getNumBytesToPadGlobalArray(unsigned Size,
1559 Type *ArrayType) const {
1560 return TTIImpl->getNumBytesToPadGlobalArray(Size, ArrayType);
1561}
1562
1563void TargetTransformInfo::collectKernelLaunchBounds(
1564 const Function &F,
1565 SmallVectorImpl<std::pair<StringRef, int64_t>> &LB) const {
1566 return TTIImpl->collectKernelLaunchBounds(F, LB);
1567}
1568
1569bool TargetTransformInfo::allowVectorElementIndexingUsingGEP() const {
1570 return TTIImpl->allowVectorElementIndexingUsingGEP();
1571}
1572
1573bool TargetTransformInfo::isUniform(const Instruction *I,
1574 const SmallBitVector &UniformArgs) const {
1575 return TTIImpl->isUniform(I, UniformArgs);
1576}
1577
1578TargetTransformInfoImplBase::~TargetTransformInfoImplBase() = default;
1579
1580TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1581
1582TargetIRAnalysis::TargetIRAnalysis(
1583 std::function<Result(const Function &)> TTICallback)
1584 : TTICallback(std::move(TTICallback)) {}
1585
1586TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1587 FunctionAnalysisManager &) {
1588 assert(!F.isIntrinsic() && "Should not request TTI for intrinsics");
1589 return TTICallback(F);
1590}
1591
1592AnalysisKey TargetIRAnalysis::Key;
1593
1594TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1595 return Result(F.getDataLayout());
1596}
1597
1598// Register the basic pass.
1599INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1600 "Target Transform Information", false, true)
1601char TargetTransformInfoWrapperPass::ID = 0;
1602
1603void TargetTransformInfoWrapperPass::anchor() {}
1604
1605TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1606 : ImmutablePass(ID) {}
1607
1608TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1609 TargetIRAnalysis TIRA)
1610 : ImmutablePass(ID), TIRA(std::move(TIRA)) {}
1611
1612TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1613 FunctionAnalysisManager DummyFAM;
1614 TTI = TIRA.run(F, DummyFAM);
1615 return *TTI;
1616}
1617
1618ImmutablePass *
1619llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1620 return new TargetTransformInfoWrapperPass(std::move(TIRA));
1621}
1622