1//===- MIRPrintingPass.cpp - Pass that prints out using the MIR format ----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a pass that prints out the LLVM module using the MIR
10// serialization format.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/MIRPrinter.h"
15#include "llvm/CodeGen/MachineFunctionAnalysis.h"
16#include "llvm/CodeGen/MachineFunctionPass.h"
17#include "llvm/CodeGen/MachineModuleInfo.h"
18#include "llvm/CodeGen/MachineModuleSlotTracker.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/CodeGen/VirtRegMap.h"
21#include "llvm/IR/Function.h"
22#include "llvm/IR/Module.h"
23#include "llvm/InitializePasses.h"
24
25using namespace llvm;
26
27PreservedAnalyses PrintMIRPreparePass::run(Module &M, ModuleAnalysisManager &) {
28 M.renumberMetadataForAssembly();
29 printMIR(OS, M);
30 return PreservedAnalyses::all();
31}
32
33PreservedAnalyses PrintMIRPass::run(MachineFunction &MF,
34 MachineFunctionAnalysisManager &MFAM) {
35 auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(IR&: MF)
36 .getManager();
37
38 const VirtRegMap *VRM = MFAM.getCachedResult<VirtRegMapAnalysis>(IR&: MF);
39 MachineModuleSlotTracker MST(
40 [&](const Function &F) {
41 return &FAM.getResult<MachineFunctionAnalysis>(
42 IR&: const_cast<Function &>(F))
43 .getMF();
44 },
45 &MF);
46 MST.renumberMetadataForAssembly();
47 printMIR(OS, FAM, MF, VRM);
48 return PreservedAnalyses::all();
49}
50
51namespace {
52
53/// This pass prints out the LLVM IR to an output stream using the MIR
54/// serialization format.
55struct MIRPrintingPass : public MachineFunctionPass {
56 static char ID;
57 raw_ostream &OS;
58 std::string MachineFunctions;
59
60 MIRPrintingPass() : MachineFunctionPass(ID), OS(dbgs()) {}
61 MIRPrintingPass(raw_ostream &OS) : MachineFunctionPass(ID), OS(OS) {}
62
63 StringRef getPassName() const override { return "MIR Printing Pass"; }
64
65 void getAnalysisUsage(AnalysisUsage &AU) const override {
66 AU.setPreservesAll();
67 AU.addUsedIfAvailable<VirtRegMapWrapperLegacy>();
68 MachineFunctionPass::getAnalysisUsage(AU);
69 }
70
71 bool runOnMachineFunction(MachineFunction &MF) override {
72 std::string Str;
73 raw_string_ostream StrOS(Str);
74
75 MachineModuleInfo *MMI =
76 &getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
77
78 const VirtRegMap *VRM = nullptr;
79 if (auto *W = getAnalysisIfAvailable<VirtRegMapWrapperLegacy>())
80 VRM = &W->getVRM();
81
82 MachineModuleSlotTracker MST(
83 [&](const Function &F) { return MMI->getMachineFunction(F); }, &MF);
84 MST.renumberMetadataForAssembly();
85 printMIR(OS&: StrOS, MMI: *MMI, MF, VRM);
86 MachineFunctions.append(str: Str);
87 return false;
88 }
89
90 bool doFinalization(Module &M) override {
91 M.renumberMetadataForAssembly();
92 printMIR(OS, M);
93 OS << MachineFunctions;
94 return false;
95 }
96};
97
98char MIRPrintingPass::ID = 0;
99
100} // end anonymous namespace
101
102MachineFunctionPass *llvm::createPrintMIRPass(raw_ostream &OS) {
103 return new MIRPrintingPass(OS);
104}
105