1//===- MLRegAllocEvictAdvisor.cpp - ML eviction advisor -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Function declarations of utilities related to feature extraction for unit
10// testing.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H
15#define LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H
16
17#include "llvm/Analysis/MLModelRunner.h"
18#include "llvm/CodeGen/MachineBasicBlock.h"
19#include "llvm/CodeGen/SlotIndexes.h"
20#include "llvm/Support/Compiler.h"
21#include <map>
22
23namespace llvm {
24
25// LRStartEndInfo contains the start and end of a specific live range as
26// slot indices as well as storing the index of the physical register it
27// is assigned to (or 1 above the phys reg count if its the candidate).
28// Used when extracting per-instruction features in the context of a
29// specific eviction problem.
30struct LRStartEndInfo {
31 SlotIndex Begin;
32 SlotIndex End;
33 size_t Pos = 0;
34};
35
36// This is the maximum number of interfererring ranges. That's the number of
37// distinct AllocationOrder values, which comes from MCRegisterClass::RegsSize.
38// For X86, that's 32.
39// TODO: find a way to get this, statically, in a programmatic way.
40static const int64_t MaxInterferences = 32;
41
42// Logically, we can think of the feature set given to the evaluator as a 2D
43// matrix. The rows are the features (see next). The columns correspond to the
44// interferences. We treat the candidate virt reg as an 'interference', too, as
45// its feature set is the same as that of the interferring ranges. So we'll have
46// MaxInterferences + 1 columns and by convention, we will use the last column
47// for the virt reg seeking allocation.
48static const int64_t CandidateVirtRegPos = MaxInterferences;
49static const int64_t NumberOfInterferences = CandidateVirtRegPos + 1;
50
51// The number of instructions that a specific live range might have is variable,
52// but we're passing in a single matrix of instructions and tensorflow saved
53// models only support a fixed input size, so we have to cap the number of
54// instructions that can be passed along. The specific value was derived from
55// experimentation such that the majority of eviction problems would be
56// completely covered.
57static const int ModelMaxSupportedInstructionCount = 300;
58
59// When extracting per-instruction features, the advisor will currently create
60// a vector of size ModelMaxSupportedInstructionCount to hold the opcodes of the
61// instructions relevant to the eviction problem, and a NumberOfInterferences *
62// ModelMaxSupportedInstructionCount matrix that maps LRs to the instructions
63// that they span.
64static const std::vector<int64_t> InstructionsShape{
65 1, ModelMaxSupportedInstructionCount};
66static const std::vector<int64_t> InstructionsMappingShape{
67 1, NumberOfInterferences, ModelMaxSupportedInstructionCount};
68
69// When extracting mappings between MBBs and individual instructions, we create
70// a vector of MBB frequencies, currently of size 100, which was a value
71// determined through experimentation to encompass the vast majority of eviction
72// problems. The actual mapping is the same shape as the instruction opcodes
73// vector.
74static const int64_t ModelMaxSupportedMBBCount = 100;
75static const std::vector<int64_t> MBBFrequencyShape{1,
76 ModelMaxSupportedMBBCount};
77
78} // namespace llvm
79
80#endif // LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H
81