| 1 | //===----- PostRAHazardRecognizer.cpp - hazard recognizer -----------------===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | /// \file |
| 10 | /// This runs the hazard recognizer and emits noops when necessary. This |
| 11 | /// gives targets a way to run the hazard recognizer without running one of |
| 12 | /// the schedulers. Example use cases for this pass would be: |
| 13 | /// |
| 14 | /// - Targets that need the hazard recognizer to be run at -O0. |
| 15 | /// - Targets that want to guarantee that hazards at the beginning of |
| 16 | /// scheduling regions are handled correctly. The post-RA scheduler is |
| 17 | /// a top-down scheduler, but when there are multiple scheduling regions |
| 18 | /// in a basic block, it visits the regions in bottom-up order. This |
| 19 | /// makes it impossible for the scheduler to gauranttee it can correctly |
| 20 | /// handle hazards at the beginning of scheduling regions. |
| 21 | /// |
| 22 | /// This pass traverses all the instructions in a program in top-down order. |
| 23 | /// In contrast to the instruction scheduling passes, this pass never resets |
| 24 | /// the hazard recognizer to ensure it can correctly handles noop hazards at |
| 25 | /// the beginning of blocks. |
| 26 | // |
| 27 | //===----------------------------------------------------------------------===// |
| 28 | |
| 29 | #include "llvm/CodeGen/PostRAHazardRecognizer.h" |
| 30 | #include "llvm/ADT/Statistic.h" |
| 31 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 32 | #include "llvm/CodeGen/MachineLoopInfo.h" |
| 33 | #include "llvm/CodeGen/ScheduleHazardRecognizer.h" |
| 34 | #include "llvm/CodeGen/TargetInstrInfo.h" |
| 35 | #include "llvm/CodeGen/TargetSubtargetInfo.h" |
| 36 | #include "llvm/InitializePasses.h" |
| 37 | #include "llvm/Pass.h" |
| 38 | using namespace llvm; |
| 39 | |
| 40 | #define DEBUG_TYPE "post-RA-hazard-rec" |
| 41 | |
| 42 | STATISTIC(NumNoops, "Number of noops inserted" ); |
| 43 | |
| 44 | namespace { |
| 45 | struct PostRAHazardRecognizer { |
| 46 | bool run(MachineFunction &MF, MachineLoopInfo *MLI); |
| 47 | }; |
| 48 | |
| 49 | class PostRAHazardRecognizerLegacy : public MachineFunctionPass { |
| 50 | |
| 51 | public: |
| 52 | static char ID; |
| 53 | PostRAHazardRecognizerLegacy() : MachineFunctionPass(ID) {} |
| 54 | |
| 55 | void getAnalysisUsage(AnalysisUsage &AU) const override { |
| 56 | AU.setPreservesCFG(); |
| 57 | AU.addRequired<MachineLoopInfoWrapperPass>(); |
| 58 | MachineFunctionPass::getAnalysisUsage(AU); |
| 59 | } |
| 60 | |
| 61 | bool runOnMachineFunction(MachineFunction &Fn) override { |
| 62 | MachineLoopInfo &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI(); |
| 63 | return PostRAHazardRecognizer().run(MF&: Fn, MLI: &MLI); |
| 64 | } |
| 65 | }; |
| 66 | char PostRAHazardRecognizerLegacy::ID = 0; |
| 67 | |
| 68 | } // namespace |
| 69 | |
| 70 | char &llvm::PostRAHazardRecognizerID = PostRAHazardRecognizerLegacy::ID; |
| 71 | |
| 72 | INITIALIZE_PASS_BEGIN(PostRAHazardRecognizerLegacy, DEBUG_TYPE, |
| 73 | "Post RA hazard recognizer" , false, false) |
| 74 | INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass) |
| 75 | INITIALIZE_PASS_END(PostRAHazardRecognizerLegacy, DEBUG_TYPE, |
| 76 | "Post RA hazard recognizer" , false, false) |
| 77 | |
| 78 | PreservedAnalyses |
| 79 | llvm::PostRAHazardRecognizerPass::run(MachineFunction &MF, |
| 80 | MachineFunctionAnalysisManager &MFAM) { |
| 81 | MachineLoopInfo *MLI = &MFAM.getResult<MachineLoopAnalysis>(IR&: MF); |
| 82 | if (!PostRAHazardRecognizer().run(MF, MLI)) |
| 83 | return PreservedAnalyses::all(); |
| 84 | |
| 85 | auto PA = getMachineFunctionPassPreservedAnalyses(); |
| 86 | PA.preserveSet<CFGAnalyses>(); |
| 87 | return PA; |
| 88 | } |
| 89 | |
| 90 | bool PostRAHazardRecognizer::run(MachineFunction &Fn, MachineLoopInfo *MLI) { |
| 91 | const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo(); |
| 92 | std::unique_ptr<ScheduleHazardRecognizer> HazardRec( |
| 93 | TII->CreateTargetPostRAHazardRecognizer(MF: Fn, MLI)); |
| 94 | |
| 95 | // Return if the target has not implemented a hazard recognizer. |
| 96 | if (!HazardRec) |
| 97 | return false; |
| 98 | |
| 99 | // Loop over all of the basic blocks |
| 100 | bool Changed = false; |
| 101 | for (auto &MBB : Fn) { |
| 102 | // We do not call HazardRec->reset() here to make sure we are handling noop |
| 103 | // hazards at the start of basic blocks. |
| 104 | for (MachineInstr &MI : MBB) { |
| 105 | // If we need to emit noops prior to this instruction, then do so. |
| 106 | unsigned NumPreNoops = HazardRec->PreEmitNoops(&MI); |
| 107 | HazardRec->EmitNoops(Quantity: NumPreNoops); |
| 108 | TII->insertNoops(MBB, MI: MachineBasicBlock::iterator(MI), Quantity: NumPreNoops); |
| 109 | NumNoops += NumPreNoops; |
| 110 | if (NumPreNoops) |
| 111 | Changed = true; |
| 112 | |
| 113 | HazardRec->EmitInstruction(&MI); |
| 114 | if (HazardRec->atIssueLimit()) { |
| 115 | HazardRec->AdvanceCycle(); |
| 116 | } |
| 117 | } |
| 118 | } |
| 119 | return Changed; |
| 120 | } |
| 121 | |