1//=--- RegUsageInfoPropagate.cpp - Register Usage Informartion Propagation --=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// This pass is required to take advantage of the interprocedural register
10/// allocation infrastructure.
11///
12/// This pass iterates through MachineInstrs in a given MachineFunction and at
13/// each callsite queries RegisterUsageInfo for RegMask (calculated based on
14/// actual register allocation) of the callee function, if the RegMask detail
15/// is available then this pass will update the RegMask of the call instruction.
16/// This updated RegMask will be used by the register allocator while allocating
17/// the current MachineFunction.
18///
19//===----------------------------------------------------------------------===//
20
21#include "llvm/CodeGen/RegUsageInfoPropagate.h"
22#include "llvm/CodeGen/MachineBasicBlock.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineFunctionPass.h"
25#include "llvm/CodeGen/MachineInstr.h"
26#include "llvm/CodeGen/MachineRegisterInfo.h"
27#include "llvm/CodeGen/Passes.h"
28#include "llvm/CodeGen/RegisterUsageInfo.h"
29#include "llvm/IR/Analysis.h"
30#include "llvm/IR/Module.h"
31#include "llvm/InitializePasses.h"
32#include "llvm/Pass.h"
33#include "llvm/Support/Debug.h"
34#include "llvm/Support/raw_ostream.h"
35
36using namespace llvm;
37
38#define DEBUG_TYPE "ip-regalloc"
39
40#define RUIP_NAME "Register Usage Information Propagation"
41
42namespace {
43
44class RegUsageInfoPropagation {
45public:
46 explicit RegUsageInfoPropagation(PhysicalRegisterUsageInfo *PRUI)
47 : PRUI(PRUI) {}
48
49 bool run(MachineFunction &MF);
50
51private:
52 PhysicalRegisterUsageInfo *PRUI;
53
54 static void setRegMask(MachineInstr &MI, ArrayRef<uint32_t> RegMask) {
55 assert(RegMask.size() ==
56 MachineOperand::getRegMaskSize(MI.getParent()->getParent()
57 ->getRegInfo().getTargetRegisterInfo()
58 ->getNumRegs())
59 && "expected register mask size");
60 for (MachineOperand &MO : MI.operands()) {
61 if (MO.isRegMask())
62 MO.setRegMask(RegMask.data());
63 }
64 }
65};
66
67class RegUsageInfoPropagationLegacy : public MachineFunctionPass {
68public:
69 static char ID;
70 RegUsageInfoPropagationLegacy() : MachineFunctionPass(ID) {}
71
72 StringRef getPassName() const override { return RUIP_NAME; }
73
74 bool runOnMachineFunction(MachineFunction &MF) override;
75
76 void getAnalysisUsage(AnalysisUsage &AU) const override {
77 AU.addRequired<PhysicalRegisterUsageInfoWrapperLegacy>();
78 AU.setPreservesAll();
79 MachineFunctionPass::getAnalysisUsage(AU);
80 }
81};
82
83} // end of anonymous namespace
84
85INITIALIZE_PASS_BEGIN(RegUsageInfoPropagationLegacy, "reg-usage-propagation",
86 RUIP_NAME, false, false)
87INITIALIZE_PASS_DEPENDENCY(PhysicalRegisterUsageInfoWrapperLegacy)
88INITIALIZE_PASS_END(RegUsageInfoPropagationLegacy, "reg-usage-propagation",
89 RUIP_NAME, false, false)
90
91char RegUsageInfoPropagationLegacy::ID = 0;
92
93// Assumes call instructions have a single reference to a function.
94static const Function *findCalledFunction(const Module &M,
95 const MachineInstr &MI) {
96 for (const MachineOperand &MO : MI.operands()) {
97 if (MO.isGlobal())
98 return dyn_cast<const Function>(Val: MO.getGlobal());
99
100 if (MO.isSymbol())
101 return M.getFunction(Name: MO.getSymbolName());
102 }
103
104 return nullptr;
105}
106
107bool RegUsageInfoPropagationLegacy::runOnMachineFunction(MachineFunction &MF) {
108 PhysicalRegisterUsageInfo *PRUI =
109 &getAnalysis<PhysicalRegisterUsageInfoWrapperLegacy>().getPRUI();
110
111 RegUsageInfoPropagation RUIP(PRUI);
112 return RUIP.run(MF);
113}
114
115PreservedAnalyses
116RegUsageInfoPropagationPass::run(MachineFunction &MF,
117 MachineFunctionAnalysisManager &MFAM) {
118 Module &MFA = *MF.getFunction().getParent();
119 auto *PRUI = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
120 .getCachedResult<PhysicalRegisterUsageAnalysis>(IR&: MFA);
121 assert(PRUI && "PhysicalRegisterUsageAnalysis not available");
122 RegUsageInfoPropagation(PRUI).run(MF);
123 return PreservedAnalyses::all();
124}
125
126bool RegUsageInfoPropagation::run(MachineFunction &MF) {
127 const Module &M = *MF.getFunction().getParent();
128
129 LLVM_DEBUG(dbgs() << " ++++++++++++++++++++ " << RUIP_NAME
130 << " ++++++++++++++++++++ \n");
131 LLVM_DEBUG(dbgs() << "MachineFunction : " << MF.getName() << "\n");
132
133 const MachineFrameInfo &MFI = MF.getFrameInfo();
134 if (!MFI.hasCalls() && !MFI.hasTailCall())
135 return false;
136
137 bool Changed = false;
138
139 for (MachineBasicBlock &MBB : MF) {
140 for (MachineInstr &MI : MBB) {
141 if (!MI.isCall())
142 continue;
143 LLVM_DEBUG(
144 dbgs()
145 << "Call Instruction Before Register Usage Info Propagation : \n"
146 << MI << "\n");
147
148 auto UpdateRegMask = [&](const Function &F) {
149 const ArrayRef<uint32_t> RegMask = PRUI->getRegUsageInfo(FP: F);
150 if (RegMask.empty())
151 return;
152 setRegMask(MI, RegMask);
153 Changed = true;
154 };
155
156 if (const Function *F = findCalledFunction(M, MI)) {
157 if (F->isDefinitionExact()) {
158 UpdateRegMask(*F);
159 } else {
160 LLVM_DEBUG(dbgs() << "Function definition is not exact\n");
161 }
162 } else {
163 LLVM_DEBUG(dbgs() << "Failed to find call target function\n");
164 }
165
166 LLVM_DEBUG(
167 dbgs()
168 << "Call Instruction After Register Usage Info Propagation : \n"
169 << MI << '\n');
170 }
171 }
172
173 LLVM_DEBUG(
174 dbgs() << " +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
175 "++++++ \n");
176 return Changed;
177}
178
179FunctionPass *llvm::createRegUsageInfoPropPass() {
180 return new RegUsageInfoPropagationLegacy();
181}
182