1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallPtrSet.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/CodeGen/ISDOpcodes.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/MachineConstantPool.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/SelectionDAG.h"
23#include "llvm/CodeGen/SelectionDAGNodes.h"
24#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25#include "llvm/CodeGen/TargetInstrInfo.h"
26#include "llvm/CodeGen/TargetLowering.h"
27#include "llvm/CodeGen/TargetRegisterInfo.h"
28#include "llvm/CodeGen/TargetSubtargetInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/CodeGenTypes/MachineValueType.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/ModuleSlotTracker.h"
39#include "llvm/IR/Value.h"
40#include "llvm/Support/Casting.h"
41#include "llvm/Support/CommandLine.h"
42#include "llvm/Support/Compiler.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/Printable.h"
46#include "llvm/Support/raw_ostream.h"
47#include "llvm/Target/TargetMachine.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58static cl::opt<bool>
59 PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden,
60 cl::desc("Print addresses of SDNodes when dumping"));
61
62std::string SDNode::getOperationName(const SelectionDAG *G) const {
63 switch (getOpcode()) {
64 default:
65 if (getOpcode() < ISD::BUILTIN_OP_END)
66 return "<<Unknown DAG Node>>";
67 if (isMachineOpcode()) {
68 if (G)
69 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
70 if (getMachineOpcode() < TII->getNumOpcodes())
71 return std::string(TII->getName(Opcode: getMachineOpcode()));
72 return "<<Unknown Machine Node #" + utostr(X: getOpcode()) + ">>";
73 }
74 if (G) {
75 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
76 if (const char *Name = TSI.getTargetNodeName(Opcode: getOpcode()))
77 return Name;
78 const TargetLowering &TLI = G->getTargetLoweringInfo();
79 const char *Name = TLI.getTargetNodeName(Opcode: getOpcode());
80 if (Name) return Name;
81 return "<<Unknown Target Node #" + utostr(X: getOpcode()) + ">>";
82 }
83 return "<<Unknown Node #" + utostr(X: getOpcode()) + ">>";
84
85 // clang-format off
86#ifndef NDEBUG
87 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
88#endif
89 case ISD::PREFETCH: return "Prefetch";
90 case ISD::MEMBARRIER: return "MemBarrier";
91 case ISD::ATOMIC_FENCE: return "AtomicFence";
92 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
93 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
94 case ISD::ATOMIC_SWAP: return "AtomicSwap";
95 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
96 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
97 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
98 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
99 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
100 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
101 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
102 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
103 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
104 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
105 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
106 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
107 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
108 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
109 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
110 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
111 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
112 case ISD::ATOMIC_LOAD_UINC_WRAP:
113 return "AtomicLoadUIncWrap";
114 case ISD::ATOMIC_LOAD_UDEC_WRAP:
115 return "AtomicLoadUDecWrap";
116 case ISD::ATOMIC_LOAD_USUB_COND:
117 return "AtomicLoadUSubCond";
118 case ISD::ATOMIC_LOAD_USUB_SAT:
119 return "AtomicLoadUSubSat";
120 case ISD::ATOMIC_LOAD: return "AtomicLoad";
121 case ISD::ATOMIC_STORE: return "AtomicStore";
122 case ISD::PCMARKER: return "PCMarker";
123 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
124 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
125 case ISD::SRCVALUE: return "SrcValue";
126 case ISD::MDNODE_SDNODE: return "MDNode";
127 case ISD::EntryToken: return "EntryToken";
128 case ISD::TokenFactor: return "TokenFactor";
129 case ISD::AssertSext: return "AssertSext";
130 case ISD::AssertZext: return "AssertZext";
131 case ISD::AssertNoFPClass: return "AssertNoFPClass";
132 case ISD::AssertAlign: return "AssertAlign";
133
134 case ISD::BasicBlock: return "BasicBlock";
135 case ISD::VALUETYPE: return "ValueType";
136 case ISD::Register: return "Register";
137 case ISD::RegisterMask: return "RegisterMask";
138 case ISD::Constant:
139 if (cast<ConstantSDNode>(Val: this)->isOpaque())
140 return "OpaqueConstant";
141 return "Constant";
142 case ISD::ConstantFP: return "ConstantFP";
143 case ISD::GlobalAddress: return "GlobalAddress";
144 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
145 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
146 case ISD::FrameIndex: return "FrameIndex";
147 case ISD::JumpTable: return "JumpTable";
148 case ISD::JUMP_TABLE_DEBUG_INFO:
149 return "JUMP_TABLE_DEBUG_INFO";
150 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
151 case ISD::RETURNADDR: return "RETURNADDR";
152 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
153 case ISD::FRAMEADDR: return "FRAMEADDR";
154 case ISD::SPONENTRY: return "SPONENTRY";
155 case ISD::STACKADDRESS: return "STACKADDRESS";
156 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
157 case ISD::READ_REGISTER: return "READ_REGISTER";
158 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
159 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
160 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
161 case ISD::EH_RETURN: return "EH_RETURN";
162 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
163 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
164 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
165 case ISD::ConstantPool: return "ConstantPool";
166 case ISD::TargetIndex: return "TargetIndex";
167 case ISD::ExternalSymbol: return "ExternalSymbol";
168 case ISD::BlockAddress: return "BlockAddress";
169 case ISD::INTRINSIC_WO_CHAIN:
170 case ISD::INTRINSIC_VOID:
171 case ISD::INTRINSIC_W_CHAIN: {
172 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
173 unsigned IID = getOperand(Num: OpNo)->getAsZExtVal();
174 if (IID < Intrinsic::num_intrinsics)
175 return Intrinsic::getBaseName(id: (Intrinsic::ID)IID).str();
176 if (!G)
177 return "Unknown intrinsic";
178 llvm_unreachable("Invalid intrinsic ID");
179 }
180
181 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
182 case ISD::TargetConstant:
183 if (cast<ConstantSDNode>(Val: this)->isOpaque())
184 return "OpaqueTargetConstant";
185 return "TargetConstant";
186
187 case ISD::TargetConstantFP: return "TargetConstantFP";
188 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
189 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
190 case ISD::TargetFrameIndex: return "TargetFrameIndex";
191 case ISD::TargetJumpTable: return "TargetJumpTable";
192 case ISD::TargetConstantPool: return "TargetConstantPool";
193 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
194 case ISD::MCSymbol: return "MCSymbol";
195 case ISD::TargetBlockAddress: return "TargetBlockAddress";
196
197 case ISD::CopyToReg: return "CopyToReg";
198 case ISD::CopyFromReg: return "CopyFromReg";
199 case ISD::UNDEF: return "undef";
200 case ISD::POISON: return "poison";
201 case ISD::VSCALE: return "vscale";
202 case ISD::MERGE_VALUES: return "merge_values";
203 case ISD::INLINEASM: return "inlineasm";
204 case ISD::INLINEASM_BR: return "inlineasm_br";
205 case ISD::EH_LABEL: return "eh_label";
206 case ISD::ANNOTATION_LABEL: return "annotation_label";
207 case ISD::HANDLENODE: return "handlenode";
208
209 // Unary operators
210 case ISD::FABS: return "fabs";
211 case ISD::FMINNUM: return "fminnum";
212 case ISD::STRICT_FMINNUM: return "strict_fminnum";
213 case ISD::FMAXNUM: return "fmaxnum";
214 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
215 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
216 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
217 case ISD::FMINIMUM: return "fminimum";
218 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
219 case ISD::FMAXIMUM: return "fmaximum";
220 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
221 case ISD::FMINIMUMNUM: return "fminimumnum";
222 case ISD::FMAXIMUMNUM: return "fmaximumnum";
223 case ISD::FNEG: return "fneg";
224 case ISD::FSQRT: return "fsqrt";
225 case ISD::STRICT_FSQRT: return "strict_fsqrt";
226 case ISD::FCBRT: return "fcbrt";
227 case ISD::FSIN: return "fsin";
228 case ISD::STRICT_FSIN: return "strict_fsin";
229 case ISD::FCOS: return "fcos";
230 case ISD::STRICT_FCOS: return "strict_fcos";
231 case ISD::FSINCOS: return "fsincos";
232 case ISD::FSINCOSPI: return "fsincospi";
233 case ISD::FMODF: return "fmodf";
234 case ISD::FTAN: return "ftan";
235 case ISD::STRICT_FTAN: return "strict_ftan";
236 case ISD::FASIN: return "fasin";
237 case ISD::STRICT_FASIN: return "strict_fasin";
238 case ISD::FACOS: return "facos";
239 case ISD::STRICT_FACOS: return "strict_facos";
240 case ISD::FATAN: return "fatan";
241 case ISD::STRICT_FATAN: return "strict_fatan";
242 case ISD::FATAN2: return "fatan2";
243 case ISD::STRICT_FATAN2: return "strict_fatan2";
244 case ISD::FSINH: return "fsinh";
245 case ISD::STRICT_FSINH: return "strict_fsinh";
246 case ISD::FCOSH: return "fcosh";
247 case ISD::STRICT_FCOSH: return "strict_fcosh";
248 case ISD::FTANH: return "ftanh";
249 case ISD::STRICT_FTANH: return "strict_ftanh";
250 case ISD::FTRUNC: return "ftrunc";
251 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
252 case ISD::FFLOOR: return "ffloor";
253 case ISD::STRICT_FFLOOR: return "strict_ffloor";
254 case ISD::FCEIL: return "fceil";
255 case ISD::STRICT_FCEIL: return "strict_fceil";
256 case ISD::FRINT: return "frint";
257 case ISD::STRICT_FRINT: return "strict_frint";
258 case ISD::FNEARBYINT: return "fnearbyint";
259 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
260 case ISD::FROUND: return "fround";
261 case ISD::STRICT_FROUND: return "strict_fround";
262 case ISD::FROUNDEVEN: return "froundeven";
263 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
264 case ISD::FEXP: return "fexp";
265 case ISD::STRICT_FEXP: return "strict_fexp";
266 case ISD::FEXP2: return "fexp2";
267 case ISD::STRICT_FEXP2: return "strict_fexp2";
268 case ISD::FEXP10: return "fexp10";
269 case ISD::FLOG: return "flog";
270 case ISD::STRICT_FLOG: return "strict_flog";
271 case ISD::FLOG2: return "flog2";
272 case ISD::STRICT_FLOG2: return "strict_flog2";
273 case ISD::FLOG10: return "flog10";
274 case ISD::STRICT_FLOG10: return "strict_flog10";
275
276 // Binary operators
277 case ISD::ADD: return "add";
278 case ISD::PTRADD: return "ptradd";
279 case ISD::SUB: return "sub";
280 case ISD::MUL: return "mul";
281 case ISD::MULHU: return "mulhu";
282 case ISD::MULHS: return "mulhs";
283 case ISD::AVGFLOORU: return "avgflooru";
284 case ISD::AVGFLOORS: return "avgfloors";
285 case ISD::AVGCEILU: return "avgceilu";
286 case ISD::AVGCEILS: return "avgceils";
287 case ISD::ABDS: return "abds";
288 case ISD::ABDU: return "abdu";
289 case ISD::SDIV: return "sdiv";
290 case ISD::UDIV: return "udiv";
291 case ISD::SREM: return "srem";
292 case ISD::UREM: return "urem";
293 case ISD::SMUL_LOHI: return "smul_lohi";
294 case ISD::UMUL_LOHI: return "umul_lohi";
295 case ISD::SDIVREM: return "sdivrem";
296 case ISD::UDIVREM: return "udivrem";
297 case ISD::AND: return "and";
298 case ISD::OR: return "or";
299 case ISD::XOR: return "xor";
300 case ISD::SHL: return "shl";
301 case ISD::SRA: return "sra";
302 case ISD::SRL: return "srl";
303 case ISD::ROTL: return "rotl";
304 case ISD::ROTR: return "rotr";
305 case ISD::FSHL: return "fshl";
306 case ISD::FSHR: return "fshr";
307 case ISD::CLMUL: return "clmul";
308 case ISD::CLMULR: return "clmulr";
309 case ISD::CLMULH: return "clmulh";
310 case ISD::FADD: return "fadd";
311 case ISD::STRICT_FADD: return "strict_fadd";
312 case ISD::FSUB: return "fsub";
313 case ISD::STRICT_FSUB: return "strict_fsub";
314 case ISD::FMUL: return "fmul";
315 case ISD::STRICT_FMUL: return "strict_fmul";
316 case ISD::FDIV: return "fdiv";
317 case ISD::STRICT_FDIV: return "strict_fdiv";
318 case ISD::FMA: return "fma";
319 case ISD::STRICT_FMA: return "strict_fma";
320 case ISD::FMAD: return "fmad";
321 case ISD::FMULADD: return "fmuladd";
322 case ISD::FREM: return "frem";
323 case ISD::STRICT_FREM: return "strict_frem";
324 case ISD::FCOPYSIGN: return "fcopysign";
325 case ISD::FGETSIGN: return "fgetsign";
326 case ISD::FCANONICALIZE: return "fcanonicalize";
327 case ISD::IS_FPCLASS: return "is_fpclass";
328 case ISD::FPOW: return "fpow";
329 case ISD::STRICT_FPOW: return "strict_fpow";
330 case ISD::SMIN: return "smin";
331 case ISD::SMAX: return "smax";
332 case ISD::UMIN: return "umin";
333 case ISD::UMAX: return "umax";
334 case ISD::SCMP: return "scmp";
335 case ISD::UCMP: return "ucmp";
336
337 case ISD::FLDEXP: return "fldexp";
338 case ISD::STRICT_FLDEXP: return "strict_fldexp";
339 case ISD::FFREXP: return "ffrexp";
340 case ISD::FPOWI: return "fpowi";
341 case ISD::STRICT_FPOWI: return "strict_fpowi";
342 case ISD::SETCC: return "setcc";
343 case ISD::SETCCCARRY: return "setcccarry";
344 case ISD::STRICT_FSETCC: return "strict_fsetcc";
345 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
346 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
347 case ISD::SELECT: return "select";
348 case ISD::VSELECT: return "vselect";
349 case ISD::SELECT_CC: return "select_cc";
350 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
351 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
352 case ISD::CONCAT_VECTORS: return "concat_vectors";
353 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
354 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
355 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
356 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
357 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
358 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
359 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
360 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
361 case ISD::SPLAT_VECTOR: return "splat_vector";
362 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
363 case ISD::VECTOR_REVERSE: return "vector_reverse";
364 case ISD::STEP_VECTOR: return "step_vector";
365 case ISD::CARRY_FALSE: return "carry_false";
366 case ISD::ADDC: return "addc";
367 case ISD::ADDE: return "adde";
368 case ISD::UADDO_CARRY: return "uaddo_carry";
369 case ISD::SADDO_CARRY: return "saddo_carry";
370 case ISD::SADDO: return "saddo";
371 case ISD::UADDO: return "uaddo";
372 case ISD::SSUBO: return "ssubo";
373 case ISD::USUBO: return "usubo";
374 case ISD::SMULO: return "smulo";
375 case ISD::UMULO: return "umulo";
376 case ISD::SUBC: return "subc";
377 case ISD::SUBE: return "sube";
378 case ISD::USUBO_CARRY: return "usubo_carry";
379 case ISD::SSUBO_CARRY: return "ssubo_carry";
380 case ISD::SHL_PARTS: return "shl_parts";
381 case ISD::SRA_PARTS: return "sra_parts";
382 case ISD::SRL_PARTS: return "srl_parts";
383
384 case ISD::SADDSAT: return "saddsat";
385 case ISD::UADDSAT: return "uaddsat";
386 case ISD::SSUBSAT: return "ssubsat";
387 case ISD::USUBSAT: return "usubsat";
388 case ISD::SSHLSAT: return "sshlsat";
389 case ISD::USHLSAT: return "ushlsat";
390
391 case ISD::SMULFIX: return "smulfix";
392 case ISD::SMULFIXSAT: return "smulfixsat";
393 case ISD::UMULFIX: return "umulfix";
394 case ISD::UMULFIXSAT: return "umulfixsat";
395
396 case ISD::SDIVFIX: return "sdivfix";
397 case ISD::SDIVFIXSAT: return "sdivfixsat";
398 case ISD::UDIVFIX: return "udivfix";
399 case ISD::UDIVFIXSAT: return "udivfixsat";
400
401 // Conversion operators.
402 case ISD::SIGN_EXTEND: return "sign_extend";
403 case ISD::ZERO_EXTEND: return "zero_extend";
404 case ISD::ANY_EXTEND: return "any_extend";
405 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
406 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
407 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
408 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
409 case ISD::TRUNCATE: return "truncate";
410 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
411 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
412 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
413 case ISD::FP_ROUND: return "fp_round";
414 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
415 case ISD::FP_EXTEND: return "fp_extend";
416 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
417
418 case ISD::SINT_TO_FP: return "sint_to_fp";
419 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
420 case ISD::UINT_TO_FP: return "uint_to_fp";
421 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
422 case ISD::FP_TO_SINT: return "fp_to_sint";
423 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
424 case ISD::FP_TO_UINT: return "fp_to_uint";
425 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
426 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
427 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
428 case ISD::BITCAST: return "bitcast";
429 case ISD::ADDRSPACECAST: return "addrspacecast";
430 case ISD::FP16_TO_FP: return "fp16_to_fp";
431 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
432 case ISD::FP_TO_FP16: return "fp_to_fp16";
433 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
434 case ISD::BF16_TO_FP: return "bf16_to_fp";
435 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
436 case ISD::FP_TO_BF16: return "fp_to_bf16";
437 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
438 case ISD::LROUND: return "lround";
439 case ISD::STRICT_LROUND: return "strict_lround";
440 case ISD::LLROUND: return "llround";
441 case ISD::STRICT_LLROUND: return "strict_llround";
442 case ISD::LRINT: return "lrint";
443 case ISD::STRICT_LRINT: return "strict_lrint";
444 case ISD::LLRINT: return "llrint";
445 case ISD::STRICT_LLRINT: return "strict_llrint";
446
447 // Control flow instructions
448 case ISD::BR: return "br";
449 case ISD::BRIND: return "brind";
450 case ISD::BR_JT: return "br_jt";
451 case ISD::BRCOND: return "brcond";
452 case ISD::BR_CC: return "br_cc";
453 case ISD::CALLSEQ_START: return "callseq_start";
454 case ISD::CALLSEQ_END: return "callseq_end";
455
456 // EH instructions
457 case ISD::CATCHRET: return "catchret";
458 case ISD::CLEANUPRET: return "cleanupret";
459
460 // Other operators
461 case ISD::LOAD: return "load";
462 case ISD::STORE: return "store";
463 case ISD::MLOAD: return "masked_load";
464 case ISD::MSTORE: return "masked_store";
465 case ISD::MGATHER: return "masked_gather";
466 case ISD::MSCATTER: return "masked_scatter";
467 case ISD::VECTOR_COMPRESS: return "vector_compress";
468 case ISD::VAARG: return "vaarg";
469 case ISD::VACOPY: return "vacopy";
470 case ISD::VAEND: return "vaend";
471 case ISD::VASTART: return "vastart";
472 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
473 case ISD::EXTRACT_ELEMENT: return "extract_element";
474 case ISD::BUILD_PAIR: return "build_pair";
475 case ISD::STACKSAVE: return "stacksave";
476 case ISD::STACKRESTORE: return "stackrestore";
477 case ISD::TRAP: return "trap";
478 case ISD::DEBUGTRAP: return "debugtrap";
479 case ISD::UBSANTRAP: return "ubsantrap";
480 case ISD::LIFETIME_START: return "lifetime.start";
481 case ISD::LIFETIME_END: return "lifetime.end";
482 case ISD::FAKE_USE:
483 return "fake_use";
484 case ISD::RELOC_NONE:
485 return "reloc_none";
486 case ISD::COND_LOOP:
487 return "cond_loop";
488 case ISD::PSEUDO_PROBE:
489 return "pseudoprobe";
490 case ISD::GC_TRANSITION_START: return "gc_transition.start";
491 case ISD::GC_TRANSITION_END: return "gc_transition.end";
492 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
493 case ISD::FREEZE: return "freeze";
494 case ISD::PREALLOCATED_SETUP:
495 return "call_setup";
496 case ISD::PREALLOCATED_ARG:
497 return "call_alloc";
498
499 // Floating point environment manipulation
500 case ISD::GET_ROUNDING: return "get_rounding";
501 case ISD::SET_ROUNDING: return "set_rounding";
502 case ISD::GET_FPENV: return "get_fpenv";
503 case ISD::SET_FPENV: return "set_fpenv";
504 case ISD::RESET_FPENV: return "reset_fpenv";
505 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
506 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
507 case ISD::GET_FPMODE: return "get_fpmode";
508 case ISD::SET_FPMODE: return "set_fpmode";
509 case ISD::RESET_FPMODE: return "reset_fpmode";
510
511 // Convergence control instructions
512 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
513 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
514 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
515 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
516
517 // Bit manipulation
518 case ISD::ABS: return "abs";
519 case ISD::BITREVERSE: return "bitreverse";
520 case ISD::BSWAP: return "bswap";
521 case ISD::CTPOP: return "ctpop";
522 case ISD::CTTZ: return "cttz";
523 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
524 case ISD::CTLZ: return "ctlz";
525 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
526 case ISD::CTLS: return "ctls";
527 case ISD::PARITY: return "parity";
528
529 // Trampolines
530 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
531 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
532
533 // clang-format on
534
535 case ISD::CONDCODE:
536 switch (cast<CondCodeSDNode>(Val: this)->get()) {
537 default: llvm_unreachable("Unknown setcc condition!");
538 case ISD::SETOEQ: return "setoeq";
539 case ISD::SETOGT: return "setogt";
540 case ISD::SETOGE: return "setoge";
541 case ISD::SETOLT: return "setolt";
542 case ISD::SETOLE: return "setole";
543 case ISD::SETONE: return "setone";
544
545 case ISD::SETO: return "seto";
546 case ISD::SETUO: return "setuo";
547 case ISD::SETUEQ: return "setueq";
548 case ISD::SETUGT: return "setugt";
549 case ISD::SETUGE: return "setuge";
550 case ISD::SETULT: return "setult";
551 case ISD::SETULE: return "setule";
552 case ISD::SETUNE: return "setune";
553
554 case ISD::SETEQ: return "seteq";
555 case ISD::SETGT: return "setgt";
556 case ISD::SETGE: return "setge";
557 case ISD::SETLT: return "setlt";
558 case ISD::SETLE: return "setle";
559 case ISD::SETNE: return "setne";
560
561 case ISD::SETTRUE: return "settrue";
562 case ISD::SETTRUE2: return "settrue2";
563 case ISD::SETFALSE: return "setfalse";
564 case ISD::SETFALSE2: return "setfalse2";
565 }
566 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
567 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
568 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
569 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
570 case ISD::VECREDUCE_ADD: return "vecreduce_add";
571 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
572 case ISD::VECREDUCE_AND: return "vecreduce_and";
573 case ISD::VECREDUCE_OR: return "vecreduce_or";
574 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
575 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
576 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
577 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
578 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
579 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
580 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
581 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
582 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
583 case ISD::STACKMAP:
584 return "stackmap";
585 case ISD::PATCHPOINT:
586 return "patchpoint";
587 case ISD::CLEAR_CACHE:
588 return "clear_cache";
589
590 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
591 return "histogram";
592
593 case ISD::VECTOR_FIND_LAST_ACTIVE:
594 return "find_last_active";
595
596 case ISD::GET_ACTIVE_LANE_MASK:
597 return "get_active_lane_mask";
598
599 case ISD::PARTIAL_REDUCE_UMLA:
600 return "partial_reduce_umla";
601 case ISD::PARTIAL_REDUCE_SMLA:
602 return "partial_reduce_smla";
603 case ISD::PARTIAL_REDUCE_SUMLA:
604 return "partial_reduce_sumla";
605 case ISD::PARTIAL_REDUCE_FMLA:
606 return "partial_reduce_fmla";
607 case ISD::LOOP_DEPENDENCE_WAR_MASK:
608 return "loop_dep_war";
609 case ISD::LOOP_DEPENDENCE_RAW_MASK:
610 return "loop_dep_raw";
611
612 // Vector Predication
613#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
614 case ISD::SDID: \
615 return #NAME;
616#include "llvm/IR/VPIntrinsics.def"
617 }
618}
619
620const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
621 switch (AM) {
622 default: return "";
623 case ISD::PRE_INC: return "<pre-inc>";
624 case ISD::PRE_DEC: return "<pre-dec>";
625 case ISD::POST_INC: return "<post-inc>";
626 case ISD::POST_DEC: return "<post-dec>";
627 }
628}
629
630static Printable PrintNodeId(const SDNode &Node) {
631 return Printable([&Node](raw_ostream &OS) {
632#ifndef NDEBUG
633 static const raw_ostream::Colors Color[] = {
634 raw_ostream::BLACK, raw_ostream::RED, raw_ostream::GREEN,
635 raw_ostream::YELLOW, raw_ostream::BLUE, raw_ostream::MAGENTA,
636 raw_ostream::CYAN,
637 };
638 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
639 OS << 't' << Node.PersistentId;
640 OS.resetColor();
641#else
642 OS << (const void*)&Node;
643#endif
644 });
645}
646
647// Print the MMO with more information from the SelectionDAG.
648static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
649 const MachineFunction *MF, const Module *M,
650 const MachineFrameInfo *MFI,
651 const TargetInstrInfo *TII, LLVMContext &Ctx) {
652 ModuleSlotTracker MST(M);
653 if (MF)
654 MST.incorporateFunction(F: MF->getFunction());
655 SmallVector<StringRef, 0> SSNs;
656 MMO.print(OS, MST, SSNs, Context: Ctx, MFI, TII);
657}
658
659static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
660 const SelectionDAG *G) {
661 if (G) {
662 const MachineFunction *MF = &G->getMachineFunction();
663 return printMemOperand(OS, MMO, MF, M: MF->getFunction().getParent(),
664 MFI: &MF->getFrameInfo(),
665 TII: G->getSubtarget().getInstrInfo(), Ctx&: *G->getContext());
666 }
667
668 LLVMContext Ctx;
669 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
670 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
671}
672
673#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
674LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
675
676LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
677 print(dbgs(), G);
678 dbgs() << '\n';
679}
680#endif
681
682void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
683 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
684 if (i) OS << ",";
685 if (getValueType(ResNo: i) == MVT::Other)
686 OS << "ch";
687 else
688 OS << getValueType(ResNo: i).getEVTString();
689 }
690}
691
692void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
693 if (getFlags().hasNoUnsignedWrap())
694 OS << " nuw";
695
696 if (getFlags().hasNoSignedWrap())
697 OS << " nsw";
698
699 if (getFlags().hasExact())
700 OS << " exact";
701
702 if (getFlags().hasDisjoint())
703 OS << " disjoint";
704
705 if (getFlags().hasSameSign())
706 OS << " samesign";
707
708 if (getFlags().hasInBounds())
709 OS << " inbounds";
710
711 if (getFlags().hasNonNeg())
712 OS << " nneg";
713
714 if (getFlags().hasNoNaNs())
715 OS << " nnan";
716
717 if (getFlags().hasNoInfs())
718 OS << " ninf";
719
720 if (getFlags().hasNoSignedZeros())
721 OS << " nsz";
722
723 if (getFlags().hasAllowReciprocal())
724 OS << " arcp";
725
726 if (getFlags().hasAllowContract())
727 OS << " contract";
728
729 if (getFlags().hasApproximateFuncs())
730 OS << " afn";
731
732 if (getFlags().hasAllowReassociation())
733 OS << " reassoc";
734
735 if (getFlags().hasNoFPExcept())
736 OS << " nofpexcept";
737
738 if (getFlags().hasNoConvergent())
739 OS << " noconvergent";
740
741 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(Val: this)) {
742 if (!MN->memoperands_empty()) {
743 OS << "<";
744 OS << "Mem:";
745 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
746 e = MN->memoperands_end(); i != e; ++i) {
747 printMemOperand(OS, MMO: **i, G);
748 if (std::next(x: i) != e)
749 OS << " ";
750 }
751 OS << ">";
752 }
753 } else if (const ShuffleVectorSDNode *SVN =
754 dyn_cast<ShuffleVectorSDNode>(Val: this)) {
755 OS << "<";
756 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
757 int Idx = SVN->getMaskElt(Idx: i);
758 if (i) OS << ",";
759 if (Idx < 0)
760 OS << "u";
761 else
762 OS << Idx;
763 }
764 OS << ">";
765 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(Val: this)) {
766 OS << '<' << CSDN->getAPIntValue() << '>';
767 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(Val: this)) {
768 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
769 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
770 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
771 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
772 else {
773 OS << "<APFloat(";
774 CSDN->getValueAPF().bitcastToAPInt().print(OS, isSigned: false);
775 OS << ")>";
776 }
777 } else if (const GlobalAddressSDNode *GADN =
778 dyn_cast<GlobalAddressSDNode>(Val: this)) {
779 int64_t offset = GADN->getOffset();
780 OS << '<';
781 GADN->getGlobal()->printAsOperand(O&: OS);
782 OS << '>';
783 if (offset > 0)
784 OS << " + " << offset;
785 else
786 OS << " " << offset;
787 if (unsigned int TF = GADN->getTargetFlags())
788 OS << " [TF=" << TF << ']';
789 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(Val: this)) {
790 OS << "<" << FIDN->getIndex() << ">";
791 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(Val: this)) {
792 OS << "<" << JTDN->getIndex() << ">";
793 if (unsigned int TF = JTDN->getTargetFlags())
794 OS << " [TF=" << TF << ']';
795 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Val: this)){
796 int offset = CP->getOffset();
797 if (CP->isMachineConstantPoolEntry())
798 OS << "<" << *CP->getMachineCPVal() << ">";
799 else
800 OS << "<" << *CP->getConstVal() << ">";
801 if (offset > 0)
802 OS << " + " << offset;
803 else
804 OS << " " << offset;
805 if (unsigned int TF = CP->getTargetFlags())
806 OS << " [TF=" << TF << ']';
807 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(Val: this)) {
808 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
809 if (unsigned TF = TI->getTargetFlags())
810 OS << " [TF=" << TF << ']';
811 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(Val: this)) {
812 OS << "<";
813 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
814 if (LBB)
815 OS << LBB->getName() << " ";
816 OS << (const void*)BBDN->getBasicBlock() << ">";
817 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(Val: this)) {
818 OS << ' ' << printReg(Reg: R->getReg(),
819 TRI: G ? G->getSubtarget().getRegisterInfo() : nullptr);
820 } else if (const ExternalSymbolSDNode *ES =
821 dyn_cast<ExternalSymbolSDNode>(Val: this)) {
822 OS << "'" << ES->getSymbol() << "'";
823 if (unsigned int TF = ES->getTargetFlags())
824 OS << " [TF=" << TF << ']';
825 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(Val: this)) {
826 if (M->getValue())
827 OS << "<" << M->getValue() << ">";
828 else
829 OS << "<null>";
830 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(Val: this)) {
831 if (MD->getMD())
832 OS << "<" << MD->getMD() << ">";
833 else
834 OS << "<null>";
835 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(Val: this)) {
836 OS << ":" << N->getVT();
837 }
838 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(Val: this)) {
839 OS << "<";
840
841 printMemOperand(OS, MMO: *LD->getMemOperand(), G);
842
843 bool doExt = true;
844 switch (LD->getExtensionType()) {
845 default: doExt = false; break;
846 case ISD::EXTLOAD: OS << ", anyext"; break;
847 case ISD::SEXTLOAD: OS << ", sext"; break;
848 case ISD::ZEXTLOAD: OS << ", zext"; break;
849 }
850 if (doExt)
851 OS << " from " << LD->getMemoryVT();
852
853 const char *AM = getIndexedModeName(AM: LD->getAddressingMode());
854 if (*AM)
855 OS << ", " << AM;
856
857 OS << ">";
858 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(Val: this)) {
859 OS << "<";
860 printMemOperand(OS, MMO: *ST->getMemOperand(), G);
861
862 if (ST->isTruncatingStore())
863 OS << ", trunc to " << ST->getMemoryVT();
864
865 const char *AM = getIndexedModeName(AM: ST->getAddressingMode());
866 if (*AM)
867 OS << ", " << AM;
868
869 OS << ">";
870 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(Val: this)) {
871 OS << "<";
872
873 printMemOperand(OS, MMO: *MLd->getMemOperand(), G);
874
875 bool doExt = true;
876 switch (MLd->getExtensionType()) {
877 default: doExt = false; break;
878 case ISD::EXTLOAD: OS << ", anyext"; break;
879 case ISD::SEXTLOAD: OS << ", sext"; break;
880 case ISD::ZEXTLOAD: OS << ", zext"; break;
881 }
882 if (doExt)
883 OS << " from " << MLd->getMemoryVT();
884
885 const char *AM = getIndexedModeName(AM: MLd->getAddressingMode());
886 if (*AM)
887 OS << ", " << AM;
888
889 if (MLd->isExpandingLoad())
890 OS << ", expanding";
891
892 OS << ">";
893 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(Val: this)) {
894 OS << "<";
895 printMemOperand(OS, MMO: *MSt->getMemOperand(), G);
896
897 if (MSt->isTruncatingStore())
898 OS << ", trunc to " << MSt->getMemoryVT();
899
900 const char *AM = getIndexedModeName(AM: MSt->getAddressingMode());
901 if (*AM)
902 OS << ", " << AM;
903
904 if (MSt->isCompressingStore())
905 OS << ", compressing";
906
907 OS << ">";
908 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(Val: this)) {
909 OS << "<";
910 printMemOperand(OS, MMO: *MGather->getMemOperand(), G);
911
912 bool doExt = true;
913 switch (MGather->getExtensionType()) {
914 default: doExt = false; break;
915 case ISD::EXTLOAD: OS << ", anyext"; break;
916 case ISD::SEXTLOAD: OS << ", sext"; break;
917 case ISD::ZEXTLOAD: OS << ", zext"; break;
918 }
919 if (doExt)
920 OS << " from " << MGather->getMemoryVT();
921
922 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
923 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
924 OS << ", " << Signed << " " << Scaled << " offset";
925
926 OS << ">";
927 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(Val: this)) {
928 OS << "<";
929 printMemOperand(OS, MMO: *MScatter->getMemOperand(), G);
930
931 if (MScatter->isTruncatingStore())
932 OS << ", trunc to " << MScatter->getMemoryVT();
933
934 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
935 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
936 OS << ", " << Signed << " " << Scaled << " offset";
937
938 OS << ">";
939 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(Val: this)) {
940 OS << "<";
941 interleaveComma(c: M->memoperands(), os&: OS, each_fn: [&](const MachineMemOperand *MMO) {
942 printMemOperand(OS, MMO: *MMO, G);
943 });
944 if (auto *A = dyn_cast<AtomicSDNode>(Val: M))
945 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
946 bool doExt = true;
947 switch (A->getExtensionType()) {
948 default: doExt = false; break;
949 case ISD::EXTLOAD: OS << ", anyext"; break;
950 case ISD::SEXTLOAD: OS << ", sext"; break;
951 case ISD::ZEXTLOAD: OS << ", zext"; break;
952 }
953 if (doExt)
954 OS << " from " << A->getMemoryVT();
955 }
956 OS << ">";
957 } else if (const BlockAddressSDNode *BA =
958 dyn_cast<BlockAddressSDNode>(Val: this)) {
959 int64_t offset = BA->getOffset();
960 OS << "<";
961 BA->getBlockAddress()->getFunction()->printAsOperand(O&: OS, PrintType: false);
962 OS << ", ";
963 BA->getBlockAddress()->getBasicBlock()->printAsOperand(O&: OS, PrintType: false);
964 OS << ">";
965 if (offset > 0)
966 OS << " + " << offset;
967 else
968 OS << " " << offset;
969 if (unsigned int TF = BA->getTargetFlags())
970 OS << " [TF=" << TF << ']';
971 } else if (const AddrSpaceCastSDNode *ASC =
972 dyn_cast<AddrSpaceCastSDNode>(Val: this)) {
973 OS << '['
974 << ASC->getSrcAddressSpace()
975 << " -> "
976 << ASC->getDestAddressSpace()
977 << ']';
978 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(Val: this)) {
979 OS << '<' << AA->getAlign().value() << '>';
980 }
981
982 if (VerboseDAGDumping) {
983 if (unsigned Order = getIROrder())
984 OS << " [ORD=" << Order << ']';
985
986 if (getNodeId() != -1)
987 OS << " [ID=" << getNodeId() << ']';
988 if (!(isa<ConstantSDNode>(Val: this) || (isa<ConstantFPSDNode>(Val: this))))
989 OS << " # D:" << isDivergent();
990
991 if (G && !G->GetDbgValues(SD: this).empty()) {
992 OS << " [NoOfDbgValues=" << G->GetDbgValues(SD: this).size() << ']';
993 for (SDDbgValue *Dbg : G->GetDbgValues(SD: this))
994 if (!Dbg->isInvalidated())
995 Dbg->print(OS);
996 } else if (getHasDebugValue())
997 OS << " [NoOfDbgValues>0]";
998
999 if (const auto *MD = G ? G->getPCSections(Node: this) : nullptr) {
1000 OS << " [pcsections ";
1001 MD->printAsOperand(OS, M: G->getMachineFunction().getFunction().getParent());
1002 OS << ']';
1003 }
1004
1005 if (MDNode *MMRA = G ? G->getMMRAMetadata(Node: this) : nullptr) {
1006 OS << " [mmra ";
1007 MMRA->printAsOperand(OS,
1008 M: G->getMachineFunction().getFunction().getParent());
1009 OS << ']';
1010 }
1011 }
1012}
1013
1014LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
1015 OS << " DbgVal(Order=" << getOrder() << ')';
1016 if (isInvalidated())
1017 OS << "(Invalidated)";
1018 if (isEmitted())
1019 OS << "(Emitted)";
1020 OS << "(";
1021 bool Comma = false;
1022 for (const SDDbgOperand &Op : getLocationOps()) {
1023 if (Comma)
1024 OS << ", ";
1025 switch (Op.getKind()) {
1026 case SDDbgOperand::SDNODE:
1027 if (Op.getSDNode())
1028 OS << "SDNODE=" << PrintNodeId(Node: *Op.getSDNode()) << ':' << Op.getResNo();
1029 else
1030 OS << "SDNODE";
1031 break;
1032 case SDDbgOperand::CONST:
1033 OS << "CONST";
1034 break;
1035 case SDDbgOperand::FRAMEIX:
1036 OS << "FRAMEIX=" << Op.getFrameIx();
1037 break;
1038 case SDDbgOperand::VREG:
1039 OS << "VREG=" << printReg(Reg: Op.getVReg());
1040 break;
1041 }
1042 Comma = true;
1043 }
1044 OS << ")";
1045 if (isIndirect()) OS << "(Indirect)";
1046 if (isVariadic())
1047 OS << "(Variadic)";
1048 OS << ":\"" << Var->getName() << '"';
1049#ifndef NDEBUG
1050 if (Expr->getNumElements())
1051 Expr->dump();
1052#endif
1053}
1054
1055#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1056LLVM_DUMP_METHOD void SDDbgValue::dump() const {
1057 if (isInvalidated())
1058 return;
1059 print(dbgs());
1060 dbgs() << "\n";
1061}
1062#endif
1063
1064/// Return true if this node is so simple that we should just print it inline
1065/// if it appears as an operand.
1066static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1067 // Avoid lots of cluttering when inline printing nodes with associated
1068 // DbgValues in verbose mode.
1069 if (VerboseDAGDumping && G && !G->GetDbgValues(SD: &Node).empty())
1070 return false;
1071 if (Node.getOpcode() == ISD::EntryToken)
1072 return false;
1073 return Node.getNumOperands() == 0;
1074}
1075
1076#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1077static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1078 for (const SDValue &Op : N->op_values()) {
1079 if (shouldPrintInline(*Op.getNode(), G))
1080 continue;
1081 if (Op.getNode()->hasOneUse())
1082 DumpNodes(Op.getNode(), indent+2, G);
1083 }
1084
1085 dbgs().indent(indent);
1086 N->dump(G);
1087}
1088
1089LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1090 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1091
1092 auto dumpEachNode = [this](const SDNode &N) {
1093 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1094 (!shouldPrintInline(N, this) || N.use_empty()))
1095 DumpNodes(&N, 2, this);
1096 };
1097
1098 if (Sorted) {
1099 SmallVector<const SDNode *> SortedNodes;
1100 SortedNodes.reserve(AllNodes.size());
1101 getTopologicallyOrderedNodes(SortedNodes);
1102 for (const SDNode *N : SortedNodes)
1103 dumpEachNode(*N);
1104 } else {
1105 for (const SDNode &N : allnodes())
1106 dumpEachNode(N);
1107 }
1108
1109 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1110 dbgs() << "\n";
1111
1112 if (VerboseDAGDumping) {
1113 if (DbgBegin() != DbgEnd())
1114 dbgs() << "SDDbgValues:\n";
1115 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1116 Dbg->dump();
1117 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
1118 dbgs() << "Byval SDDbgValues:\n";
1119 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1120 Dbg->dump();
1121 }
1122 dbgs() << "\n";
1123}
1124#endif
1125
1126void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1127 OS << PrintNodeId(Node: *this) << ": ";
1128 print_types(OS, G);
1129 OS << " = " << getOperationName(G);
1130 print_details(OS, G);
1131}
1132
1133static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1134 const SDValue Value) {
1135 if (!Value.getNode()) {
1136 OS << "<null>";
1137 return false;
1138 }
1139
1140 if (shouldPrintInline(Node: *Value.getNode(), G)) {
1141 OS << Value->getOperationName(G) << ':';
1142 Value->print_types(OS, G);
1143 Value->print_details(OS, G);
1144 return true;
1145 }
1146
1147 OS << PrintNodeId(Node: *Value.getNode());
1148 if (unsigned RN = Value.getResNo())
1149 OS << ':' << RN;
1150 return false;
1151}
1152
1153#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1154using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
1155
1156static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1157 const SelectionDAG *G, VisitedSDNodeSet &once) {
1158 if (!once.insert(N).second) // If we've been here before, return now.
1159 return;
1160
1161 // Dump the current SDNode, but don't end the line yet.
1162 OS.indent(indent);
1163 N->printr(OS, G);
1164
1165 // Having printed this SDNode, walk the children:
1166 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1167 if (i) OS << ",";
1168 OS << " ";
1169
1170 const SDValue Op = N->getOperand(i);
1171 bool printedInline = printOperand(OS, G, Op);
1172 if (printedInline)
1173 once.insert(Op.getNode());
1174 }
1175
1176 OS << "\n";
1177
1178 // Dump children that have grandchildren on their own line(s).
1179 for (const SDValue &Op : N->op_values())
1180 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1181}
1182
1183LLVM_DUMP_METHOD void SDNode::dumpr() const {
1184 VisitedSDNodeSet once;
1185 DumpNodesr(dbgs(), this, 0, nullptr, once);
1186}
1187
1188LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1189 VisitedSDNodeSet once;
1190 DumpNodesr(dbgs(), this, 0, G, once);
1191}
1192#endif
1193
1194static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1195 const SelectionDAG *G, unsigned depth,
1196 unsigned indent) {
1197 if (depth == 0)
1198 return;
1199
1200 OS.indent(NumSpaces: indent);
1201
1202 N->print(OS, G);
1203
1204 for (const SDValue &Op : N->op_values()) {
1205 // Don't follow chain operands.
1206 if (Op.getValueType() == MVT::Other)
1207 continue;
1208 // Don't print children that were fully rendered inline.
1209 if (shouldPrintInline(Node: *Op.getNode(), G))
1210 continue;
1211 OS << '\n';
1212 printrWithDepthHelper(OS, N: Op.getNode(), G, depth: depth - 1, indent: indent + 2);
1213 }
1214}
1215
1216void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1217 unsigned depth) const {
1218 printrWithDepthHelper(OS, N: this, G, depth, indent: 0);
1219}
1220
1221void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1222 // Don't print impossibly deep things.
1223 printrWithDepth(OS, G, depth: 10);
1224}
1225
1226#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1227LLVM_DUMP_METHOD
1228void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1229 printrWithDepth(dbgs(), G, depth);
1230}
1231
1232LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1233 // Don't print impossibly deep things.
1234 dumprWithDepth(G, 10);
1235}
1236#endif
1237
1238void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1239 printr(OS, G);
1240 // Under VerboseDAGDumping divergence will be printed always.
1241 if (isDivergent() && !VerboseDAGDumping)
1242 OS << " # D:1";
1243 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1244 if (i) OS << ", "; else OS << " ";
1245 printOperand(OS, G, Value: getOperand(Num: i));
1246 }
1247 if (DebugLoc DL = getDebugLoc()) {
1248 OS << ", ";
1249 DL.print(OS);
1250 }
1251 if (PrintSDNodeAddrs)
1252 OS << " ; " << this;
1253}
1254