1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallPtrSet.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/CodeGen/ISDOpcodes.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/MachineConstantPool.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/SelectionDAG.h"
23#include "llvm/CodeGen/SelectionDAGNodes.h"
24#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25#include "llvm/CodeGen/TargetInstrInfo.h"
26#include "llvm/CodeGen/TargetLowering.h"
27#include "llvm/CodeGen/TargetRegisterInfo.h"
28#include "llvm/CodeGen/TargetSubtargetInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/CodeGenTypes/MachineValueType.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/ModuleSlotTracker.h"
39#include "llvm/IR/Value.h"
40#include "llvm/Support/Casting.h"
41#include "llvm/Support/CommandLine.h"
42#include "llvm/Support/Compiler.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/Printable.h"
46#include "llvm/Support/raw_ostream.h"
47#include "llvm/Target/TargetMachine.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58static cl::opt<bool>
59 PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden,
60 cl::desc("Print addresses of SDNodes when dumping"));
61
62std::string SDNode::getOperationName(const SelectionDAG *G) const {
63 switch (getOpcode()) {
64 default:
65 if (getOpcode() < ISD::BUILTIN_OP_END)
66 return "<<Unknown DAG Node>>";
67 if (isMachineOpcode()) {
68 if (G)
69 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
70 if (getMachineOpcode() < TII->getNumOpcodes())
71 return std::string(TII->getName(Opcode: getMachineOpcode()));
72 return "<<Unknown Machine Node #" + utostr(X: getOpcode()) + ">>";
73 }
74 if (G) {
75 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
76 if (const char *Name = TSI.getTargetNodeName(Opcode: getOpcode()))
77 return Name;
78 const TargetLowering &TLI = G->getTargetLoweringInfo();
79 const char *Name = TLI.getTargetNodeName(Opcode: getOpcode());
80 if (Name) return Name;
81 return "<<Unknown Target Node #" + utostr(X: getOpcode()) + ">>";
82 }
83 return "<<Unknown Node #" + utostr(X: getOpcode()) + ">>";
84
85 // clang-format off
86#ifndef NDEBUG
87 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
88#endif
89 case ISD::PREFETCH: return "Prefetch";
90 case ISD::MEMBARRIER: return "MemBarrier";
91 case ISD::ATOMIC_FENCE: return "AtomicFence";
92 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
93 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
94 case ISD::ATOMIC_SWAP: return "AtomicSwap";
95 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
96 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
97 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
98 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
99 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
100 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
101 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
102 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
103 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
104 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
105 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
106 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
107 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
108 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
109 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
110 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
111 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
112 case ISD::ATOMIC_LOAD_UINC_WRAP:
113 return "AtomicLoadUIncWrap";
114 case ISD::ATOMIC_LOAD_UDEC_WRAP:
115 return "AtomicLoadUDecWrap";
116 case ISD::ATOMIC_LOAD_USUB_COND:
117 return "AtomicLoadUSubCond";
118 case ISD::ATOMIC_LOAD_USUB_SAT:
119 return "AtomicLoadUSubSat";
120 case ISD::ATOMIC_LOAD: return "AtomicLoad";
121 case ISD::ATOMIC_STORE: return "AtomicStore";
122 case ISD::PCMARKER: return "PCMarker";
123 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
124 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
125 case ISD::SRCVALUE: return "SrcValue";
126 case ISD::MDNODE_SDNODE: return "MDNode";
127 case ISD::EntryToken: return "EntryToken";
128 case ISD::TokenFactor: return "TokenFactor";
129 case ISD::AssertSext: return "AssertSext";
130 case ISD::AssertZext: return "AssertZext";
131 case ISD::AssertNoFPClass: return "AssertNoFPClass";
132 case ISD::AssertAlign: return "AssertAlign";
133
134 case ISD::BasicBlock: return "BasicBlock";
135 case ISD::VALUETYPE: return "ValueType";
136 case ISD::Register: return "Register";
137 case ISD::RegisterMask: return "RegisterMask";
138 case ISD::Constant:
139 if (cast<ConstantSDNode>(Val: this)->isOpaque())
140 return "OpaqueConstant";
141 return "Constant";
142 case ISD::ConstantFP: return "ConstantFP";
143 case ISD::GlobalAddress: return "GlobalAddress";
144 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
145 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
146 case ISD::FrameIndex: return "FrameIndex";
147 case ISD::JumpTable: return "JumpTable";
148 case ISD::JUMP_TABLE_DEBUG_INFO:
149 return "JUMP_TABLE_DEBUG_INFO";
150 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
151 case ISD::RETURNADDR: return "RETURNADDR";
152 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
153 case ISD::FRAMEADDR: return "FRAMEADDR";
154 case ISD::SPONENTRY: return "SPONENTRY";
155 case ISD::STACKADDRESS: return "STACKADDRESS";
156 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
157 case ISD::READ_REGISTER: return "READ_REGISTER";
158 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
159 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
160 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
161 case ISD::EH_RETURN: return "EH_RETURN";
162 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
163 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
164 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
165 case ISD::ConstantPool: return "ConstantPool";
166 case ISD::TargetIndex: return "TargetIndex";
167 case ISD::ExternalSymbol: return "ExternalSymbol";
168 case ISD::BlockAddress: return "BlockAddress";
169 case ISD::INTRINSIC_WO_CHAIN:
170 case ISD::INTRINSIC_VOID:
171 case ISD::INTRINSIC_W_CHAIN: {
172 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
173 unsigned IID = getOperand(Num: OpNo)->getAsZExtVal();
174 if (IID < Intrinsic::num_intrinsics)
175 return Intrinsic::getBaseName(id: (Intrinsic::ID)IID).str();
176 if (!G)
177 return "Unknown intrinsic";
178 llvm_unreachable("Invalid intrinsic ID");
179 }
180
181 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
182 case ISD::TargetConstant:
183 if (cast<ConstantSDNode>(Val: this)->isOpaque())
184 return "OpaqueTargetConstant";
185 return "TargetConstant";
186
187 case ISD::TargetConstantFP: return "TargetConstantFP";
188 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
189 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
190 case ISD::TargetFrameIndex: return "TargetFrameIndex";
191 case ISD::TargetJumpTable: return "TargetJumpTable";
192 case ISD::TargetConstantPool: return "TargetConstantPool";
193 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
194 case ISD::MCSymbol: return "MCSymbol";
195 case ISD::TargetBlockAddress: return "TargetBlockAddress";
196
197 case ISD::CopyToReg: return "CopyToReg";
198 case ISD::CopyFromReg: return "CopyFromReg";
199 case ISD::UNDEF: return "undef";
200 case ISD::POISON: return "poison";
201 case ISD::VSCALE: return "vscale";
202 case ISD::MERGE_VALUES: return "merge_values";
203 case ISD::INLINEASM: return "inlineasm";
204 case ISD::INLINEASM_BR: return "inlineasm_br";
205 case ISD::EH_LABEL: return "eh_label";
206 case ISD::ANNOTATION_LABEL: return "annotation_label";
207 case ISD::HANDLENODE: return "handlenode";
208
209 // Unary operators
210 case ISD::FABS: return "fabs";
211 case ISD::FMINNUM: return "fminnum";
212 case ISD::STRICT_FMINNUM: return "strict_fminnum";
213 case ISD::FMAXNUM: return "fmaxnum";
214 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
215 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
216 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
217 case ISD::FMINIMUM: return "fminimum";
218 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
219 case ISD::FMAXIMUM: return "fmaximum";
220 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
221 case ISD::FMINIMUMNUM: return "fminimumnum";
222 case ISD::FMAXIMUMNUM: return "fmaximumnum";
223 case ISD::PSEUDO_FMIN: return "pseudo_fmin";
224 case ISD::PSEUDO_FMAX: return "pseudo_fmax";
225 case ISD::STRICT_PSEUDO_FMIN: return "strict_pseudo_fmin";
226 case ISD::STRICT_PSEUDO_FMAX: return "strict_pseudo_fmax";
227 case ISD::FNEG: return "fneg";
228 case ISD::FSQRT: return "fsqrt";
229 case ISD::STRICT_FSQRT: return "strict_fsqrt";
230 case ISD::FCBRT: return "fcbrt";
231 case ISD::FSIN: return "fsin";
232 case ISD::STRICT_FSIN: return "strict_fsin";
233 case ISD::FCOS: return "fcos";
234 case ISD::STRICT_FCOS: return "strict_fcos";
235 case ISD::FSINCOS: return "fsincos";
236 case ISD::FSINCOSPI: return "fsincospi";
237 case ISD::FMODF: return "fmodf";
238 case ISD::FTAN: return "ftan";
239 case ISD::STRICT_FTAN: return "strict_ftan";
240 case ISD::FASIN: return "fasin";
241 case ISD::STRICT_FASIN: return "strict_fasin";
242 case ISD::FACOS: return "facos";
243 case ISD::STRICT_FACOS: return "strict_facos";
244 case ISD::FATAN: return "fatan";
245 case ISD::STRICT_FATAN: return "strict_fatan";
246 case ISD::FATAN2: return "fatan2";
247 case ISD::STRICT_FATAN2: return "strict_fatan2";
248 case ISD::FSINH: return "fsinh";
249 case ISD::STRICT_FSINH: return "strict_fsinh";
250 case ISD::FCOSH: return "fcosh";
251 case ISD::STRICT_FCOSH: return "strict_fcosh";
252 case ISD::FTANH: return "ftanh";
253 case ISD::STRICT_FTANH: return "strict_ftanh";
254 case ISD::FTRUNC: return "ftrunc";
255 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
256 case ISD::FFLOOR: return "ffloor";
257 case ISD::STRICT_FFLOOR: return "strict_ffloor";
258 case ISD::FCEIL: return "fceil";
259 case ISD::STRICT_FCEIL: return "strict_fceil";
260 case ISD::FRINT: return "frint";
261 case ISD::STRICT_FRINT: return "strict_frint";
262 case ISD::FNEARBYINT: return "fnearbyint";
263 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
264 case ISD::FROUND: return "fround";
265 case ISD::STRICT_FROUND: return "strict_fround";
266 case ISD::FROUNDEVEN: return "froundeven";
267 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
268 case ISD::FEXP: return "fexp";
269 case ISD::STRICT_FEXP: return "strict_fexp";
270 case ISD::FEXP2: return "fexp2";
271 case ISD::STRICT_FEXP2: return "strict_fexp2";
272 case ISD::FEXP10: return "fexp10";
273 case ISD::FLOG: return "flog";
274 case ISD::STRICT_FLOG: return "strict_flog";
275 case ISD::FLOG2: return "flog2";
276 case ISD::STRICT_FLOG2: return "strict_flog2";
277 case ISD::FLOG10: return "flog10";
278 case ISD::STRICT_FLOG10: return "strict_flog10";
279
280 // Binary operators
281 case ISD::ADD: return "add";
282 case ISD::PTRADD: return "ptradd";
283 case ISD::SUB: return "sub";
284 case ISD::MUL: return "mul";
285 case ISD::MULHU: return "mulhu";
286 case ISD::MULHS: return "mulhs";
287 case ISD::AVGFLOORU: return "avgflooru";
288 case ISD::AVGFLOORS: return "avgfloors";
289 case ISD::AVGCEILU: return "avgceilu";
290 case ISD::AVGCEILS: return "avgceils";
291 case ISD::ABDS: return "abds";
292 case ISD::ABDU: return "abdu";
293 case ISD::SDIV: return "sdiv";
294 case ISD::UDIV: return "udiv";
295 case ISD::SREM: return "srem";
296 case ISD::UREM: return "urem";
297 case ISD::SMUL_LOHI: return "smul_lohi";
298 case ISD::UMUL_LOHI: return "umul_lohi";
299 case ISD::SDIVREM: return "sdivrem";
300 case ISD::UDIVREM: return "udivrem";
301 case ISD::AND: return "and";
302 case ISD::OR: return "or";
303 case ISD::XOR: return "xor";
304 case ISD::SHL: return "shl";
305 case ISD::SRA: return "sra";
306 case ISD::SRL: return "srl";
307 case ISD::ROTL: return "rotl";
308 case ISD::ROTR: return "rotr";
309 case ISD::FSHL: return "fshl";
310 case ISD::FSHR: return "fshr";
311 case ISD::CLMUL: return "clmul";
312 case ISD::CLMULR: return "clmulr";
313 case ISD::CLMULH: return "clmulh";
314 case ISD::PEXT: return "pext";
315 case ISD::PDEP: return "pdep";
316 case ISD::FADD: return "fadd";
317 case ISD::STRICT_FADD: return "strict_fadd";
318 case ISD::FSUB: return "fsub";
319 case ISD::STRICT_FSUB: return "strict_fsub";
320 case ISD::FMUL: return "fmul";
321 case ISD::STRICT_FMUL: return "strict_fmul";
322 case ISD::FDIV: return "fdiv";
323 case ISD::STRICT_FDIV: return "strict_fdiv";
324 case ISD::FMA: return "fma";
325 case ISD::STRICT_FMA: return "strict_fma";
326 case ISD::FMAD: return "fmad";
327 case ISD::FMULADD: return "fmuladd";
328 case ISD::FREM: return "frem";
329 case ISD::STRICT_FREM: return "strict_frem";
330 case ISD::FCOPYSIGN: return "fcopysign";
331 case ISD::FGETSIGN: return "fgetsign";
332 case ISD::FCANONICALIZE: return "fcanonicalize";
333 case ISD::IS_FPCLASS: return "is_fpclass";
334 case ISD::FPOW: return "fpow";
335 case ISD::STRICT_FPOW: return "strict_fpow";
336 case ISD::SMIN: return "smin";
337 case ISD::SMAX: return "smax";
338 case ISD::UMIN: return "umin";
339 case ISD::UMAX: return "umax";
340 case ISD::SCMP: return "scmp";
341 case ISD::UCMP: return "ucmp";
342
343 case ISD::FLDEXP: return "fldexp";
344 case ISD::STRICT_FLDEXP: return "strict_fldexp";
345 case ISD::FFREXP: return "ffrexp";
346 case ISD::FPOWI: return "fpowi";
347 case ISD::STRICT_FPOWI: return "strict_fpowi";
348 case ISD::SETCC: return "setcc";
349 case ISD::SETCCCARRY: return "setcccarry";
350 case ISD::STRICT_FSETCC: return "strict_fsetcc";
351 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
352 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
353 case ISD::SELECT: return "select";
354 case ISD::VSELECT: return "vselect";
355 case ISD::SELECT_CC: return "select_cc";
356 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
357 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
358 case ISD::CONCAT_VECTORS: return "concat_vectors";
359 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
360 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
361 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
362 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
363 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
364 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
365 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
366 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
367 case ISD::SPLAT_VECTOR: return "splat_vector";
368 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
369 case ISD::VECTOR_REVERSE: return "vector_reverse";
370 case ISD::STEP_VECTOR: return "step_vector";
371 case ISD::CARRY_FALSE: return "carry_false";
372 case ISD::ADDC: return "addc";
373 case ISD::ADDE: return "adde";
374 case ISD::UADDO_CARRY: return "uaddo_carry";
375 case ISD::SADDO_CARRY: return "saddo_carry";
376 case ISD::SADDO: return "saddo";
377 case ISD::UADDO: return "uaddo";
378 case ISD::SSUBO: return "ssubo";
379 case ISD::USUBO: return "usubo";
380 case ISD::SMULO: return "smulo";
381 case ISD::UMULO: return "umulo";
382 case ISD::SUBC: return "subc";
383 case ISD::SUBE: return "sube";
384 case ISD::USUBO_CARRY: return "usubo_carry";
385 case ISD::SSUBO_CARRY: return "ssubo_carry";
386 case ISD::SHL_PARTS: return "shl_parts";
387 case ISD::SRA_PARTS: return "sra_parts";
388 case ISD::SRL_PARTS: return "srl_parts";
389
390 case ISD::SADDSAT: return "saddsat";
391 case ISD::UADDSAT: return "uaddsat";
392 case ISD::SSUBSAT: return "ssubsat";
393 case ISD::USUBSAT: return "usubsat";
394 case ISD::SSHLSAT: return "sshlsat";
395 case ISD::USHLSAT: return "ushlsat";
396
397 case ISD::SMULFIX: return "smulfix";
398 case ISD::SMULFIXSAT: return "smulfixsat";
399 case ISD::UMULFIX: return "umulfix";
400 case ISD::UMULFIXSAT: return "umulfixsat";
401
402 case ISD::SDIVFIX: return "sdivfix";
403 case ISD::SDIVFIXSAT: return "sdivfixsat";
404 case ISD::UDIVFIX: return "udivfix";
405 case ISD::UDIVFIXSAT: return "udivfixsat";
406
407 // Conversion operators.
408 case ISD::SIGN_EXTEND: return "sign_extend";
409 case ISD::ZERO_EXTEND: return "zero_extend";
410 case ISD::ANY_EXTEND: return "any_extend";
411 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
412 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
413 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
414 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
415 case ISD::TRUNCATE: return "truncate";
416 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
417 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
418 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
419 case ISD::FP_ROUND: return "fp_round";
420 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
421 case ISD::FP_EXTEND: return "fp_extend";
422 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
423
424 case ISD::SINT_TO_FP: return "sint_to_fp";
425 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
426 case ISD::UINT_TO_FP: return "uint_to_fp";
427 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
428 case ISD::FP_TO_SINT: return "fp_to_sint";
429 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
430 case ISD::FP_TO_UINT: return "fp_to_uint";
431 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
432 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
433 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
434 case ISD::BITCAST: return "bitcast";
435 case ISD::ADDRSPACECAST: return "addrspacecast";
436 case ISD::FP16_TO_FP: return "fp16_to_fp";
437 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
438 case ISD::FP_TO_FP16: return "fp_to_fp16";
439 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
440 case ISD::BF16_TO_FP: return "bf16_to_fp";
441 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
442 case ISD::FP_TO_BF16: return "fp_to_bf16";
443 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
444 case ISD::CONVERT_FROM_ARBITRARY_FP: return "convert_from_arbitrary_fp";
445 case ISD::CONVERT_TO_ARBITRARY_FP: return "convert_to_arbitrary_fp";
446 case ISD::LROUND: return "lround";
447 case ISD::STRICT_LROUND: return "strict_lround";
448 case ISD::LLROUND: return "llround";
449 case ISD::STRICT_LLROUND: return "strict_llround";
450 case ISD::LRINT: return "lrint";
451 case ISD::STRICT_LRINT: return "strict_lrint";
452 case ISD::LLRINT: return "llrint";
453 case ISD::STRICT_LLRINT: return "strict_llrint";
454
455 // Control flow instructions
456 case ISD::BR: return "br";
457 case ISD::BRIND: return "brind";
458 case ISD::BR_JT: return "br_jt";
459 case ISD::BRCOND: return "brcond";
460 case ISD::BR_CC: return "br_cc";
461 case ISD::CALLSEQ_START: return "callseq_start";
462 case ISD::CALLSEQ_END: return "callseq_end";
463
464 // EH instructions
465 case ISD::CATCHRET: return "catchret";
466 case ISD::CLEANUPRET: return "cleanupret";
467
468 // Other operators
469 case ISD::LOAD: return "load";
470 case ISD::STORE: return "store";
471 case ISD::MLOAD: return "masked_load";
472 case ISD::MSTORE: return "masked_store";
473 case ISD::MGATHER: return "masked_gather";
474 case ISD::MSCATTER: return "masked_scatter";
475 case ISD::VECTOR_COMPRESS: return "vector_compress";
476 case ISD::VAARG: return "vaarg";
477 case ISD::VACOPY: return "vacopy";
478 case ISD::VAEND: return "vaend";
479 case ISD::VASTART: return "vastart";
480 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
481 case ISD::EXTRACT_ELEMENT: return "extract_element";
482 case ISD::BUILD_PAIR: return "build_pair";
483 case ISD::STACKSAVE: return "stacksave";
484 case ISD::STACKRESTORE: return "stackrestore";
485 case ISD::TRAP: return "trap";
486 case ISD::DEBUGTRAP: return "debugtrap";
487 case ISD::UBSANTRAP: return "ubsantrap";
488 case ISD::LIFETIME_START: return "lifetime.start";
489 case ISD::LIFETIME_END: return "lifetime.end";
490 case ISD::FAKE_USE:
491 return "fake_use";
492 case ISD::RELOC_NONE:
493 return "reloc_none";
494 case ISD::COND_LOOP:
495 return "cond_loop";
496 case ISD::PSEUDO_PROBE:
497 return "pseudoprobe";
498 case ISD::GC_TRANSITION_START: return "gc_transition.start";
499 case ISD::GC_TRANSITION_END: return "gc_transition.end";
500 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
501 case ISD::FREEZE: return "freeze";
502 case ISD::PREALLOCATED_SETUP:
503 return "call_setup";
504 case ISD::PREALLOCATED_ARG:
505 return "call_alloc";
506
507 // Floating point environment manipulation
508 case ISD::GET_ROUNDING: return "get_rounding";
509 case ISD::SET_ROUNDING: return "set_rounding";
510 case ISD::GET_FPENV: return "get_fpenv";
511 case ISD::SET_FPENV: return "set_fpenv";
512 case ISD::RESET_FPENV: return "reset_fpenv";
513 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
514 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
515 case ISD::GET_FPMODE: return "get_fpmode";
516 case ISD::SET_FPMODE: return "set_fpmode";
517 case ISD::RESET_FPMODE: return "reset_fpmode";
518
519 // Convergence control instructions
520 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
521 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
522 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
523 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
524
525 // Bit manipulation
526 case ISD::ABS: return "abs";
527 case ISD::ABS_MIN_POISON: return "abs_min_poison";
528 case ISD::BITREVERSE: return "bitreverse";
529 case ISD::BSWAP: return "bswap";
530 case ISD::CTPOP: return "ctpop";
531 case ISD::CTTZ: return "cttz";
532 case ISD::CTTZ_ZERO_POISON: return "cttz_zero_poison";
533 case ISD::CTLZ: return "ctlz";
534 case ISD::CTLZ_ZERO_POISON: return "ctlz_zero_poison";
535 case ISD::CTLS: return "ctls";
536 case ISD::PARITY: return "parity";
537
538 // Trampolines
539 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
540 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
541
542 // clang-format on
543
544 case ISD::CONDCODE:
545 switch (cast<CondCodeSDNode>(Val: this)->get()) {
546 default: llvm_unreachable("Unknown setcc condition!");
547 case ISD::SETOEQ: return "setoeq";
548 case ISD::SETOGT: return "setogt";
549 case ISD::SETOGE: return "setoge";
550 case ISD::SETOLT: return "setolt";
551 case ISD::SETOLE: return "setole";
552 case ISD::SETONE: return "setone";
553
554 case ISD::SETO: return "seto";
555 case ISD::SETUO: return "setuo";
556 case ISD::SETUEQ: return "setueq";
557 case ISD::SETUGT: return "setugt";
558 case ISD::SETUGE: return "setuge";
559 case ISD::SETULT: return "setult";
560 case ISD::SETULE: return "setule";
561 case ISD::SETUNE: return "setune";
562
563 case ISD::SETEQ: return "seteq";
564 case ISD::SETGT: return "setgt";
565 case ISD::SETGE: return "setge";
566 case ISD::SETLT: return "setlt";
567 case ISD::SETLE: return "setle";
568 case ISD::SETNE: return "setne";
569
570 case ISD::SETTRUE: return "settrue";
571 case ISD::SETTRUE2: return "settrue2";
572 case ISD::SETFALSE: return "setfalse";
573 case ISD::SETFALSE2: return "setfalse2";
574 }
575 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
576 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
577 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
578 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
579 case ISD::VECREDUCE_ADD: return "vecreduce_add";
580 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
581 case ISD::VECREDUCE_AND: return "vecreduce_and";
582 case ISD::VECREDUCE_OR: return "vecreduce_or";
583 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
584 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
585 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
586 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
587 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
588 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
589 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
590 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
591 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
592 case ISD::STACKMAP:
593 return "stackmap";
594 case ISD::PATCHPOINT:
595 return "patchpoint";
596 case ISD::CLEAR_CACHE:
597 return "clear_cache";
598
599 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
600 return "histogram";
601
602 case ISD::CTTZ_ELTS:
603 return "cttz_elts";
604 case ISD::CTTZ_ELTS_ZERO_POISON:
605 return "cttz_elts_zero_poison";
606
607 case ISD::VECTOR_FIND_LAST_ACTIVE:
608 return "find_last_active";
609
610 case ISD::GET_ACTIVE_LANE_MASK:
611 return "get_active_lane_mask";
612
613 case ISD::PARTIAL_REDUCE_UMLA:
614 return "partial_reduce_umla";
615 case ISD::PARTIAL_REDUCE_SMLA:
616 return "partial_reduce_smla";
617 case ISD::PARTIAL_REDUCE_SUMLA:
618 return "partial_reduce_sumla";
619 case ISD::PARTIAL_REDUCE_FMLA:
620 return "partial_reduce_fmla";
621 case ISD::LOOP_DEPENDENCE_WAR_MASK:
622 return "loop_dep_war";
623 case ISD::LOOP_DEPENDENCE_RAW_MASK:
624 return "loop_dep_raw";
625 case ISD::MASKED_UDIV:
626 return "masked_udiv";
627 case ISD::MASKED_SDIV:
628 return "masked_sdiv";
629 case ISD::MASKED_UREM:
630 return "masked_urem";
631 case ISD::MASKED_SREM:
632 return "masked_srem";
633
634 // Vector Predication
635#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
636 case ISD::SDID: \
637 return #NAME;
638#include "llvm/IR/VPIntrinsics.def"
639 }
640}
641
642const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
643 switch (AM) {
644 default: return "";
645 case ISD::PRE_INC: return "<pre-inc>";
646 case ISD::PRE_DEC: return "<pre-dec>";
647 case ISD::POST_INC: return "<post-inc>";
648 case ISD::POST_DEC: return "<post-dec>";
649 }
650}
651
652static Printable PrintNodeId(const SDNode &Node) {
653 return Printable([&Node](raw_ostream &OS) {
654#ifndef NDEBUG
655 static const raw_ostream::Colors Color[] = {
656 raw_ostream::BLACK, raw_ostream::RED, raw_ostream::GREEN,
657 raw_ostream::YELLOW, raw_ostream::BLUE, raw_ostream::MAGENTA,
658 raw_ostream::CYAN,
659 };
660 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
661 OS << 't' << Node.PersistentId;
662 OS.resetColor();
663#else
664 OS << (const void*)&Node;
665#endif
666 });
667}
668
669// Print the MMO with more information from the SelectionDAG.
670static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
671 const MachineFunction *MF, const Module *M,
672 const MachineFrameInfo *MFI,
673 const TargetInstrInfo *TII, LLVMContext &Ctx) {
674 ModuleSlotTracker MST(M);
675 if (MF)
676 MST.incorporateFunction(F: MF->getFunction());
677 SmallVector<StringRef, 0> SSNs;
678 MMO.print(OS, MST, SSNs, Context: Ctx, MFI, TII);
679}
680
681static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
682 const SelectionDAG *G) {
683 if (G) {
684 const MachineFunction *MF = &G->getMachineFunction();
685 return printMemOperand(OS, MMO, MF, M: MF->getFunction().getParent(),
686 MFI: &MF->getFrameInfo(),
687 TII: G->getSubtarget().getInstrInfo(), Ctx&: *G->getContext());
688 }
689
690 LLVMContext Ctx;
691 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
692 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
693}
694
695#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
696LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
697
698LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
699 print(dbgs(), G);
700 dbgs() << '\n';
701}
702#endif
703
704void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
705 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
706 if (i) OS << ",";
707 if (getValueType(ResNo: i) == MVT::Other)
708 OS << "ch";
709 else
710 OS << getValueType(ResNo: i).getEVTString();
711 }
712}
713
714void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
715 if (getFlags().hasNoUnsignedWrap())
716 OS << " nuw";
717
718 if (getFlags().hasNoSignedWrap())
719 OS << " nsw";
720
721 if (getFlags().hasExact())
722 OS << " exact";
723
724 if (getFlags().hasDisjoint())
725 OS << " disjoint";
726
727 if (getFlags().hasSameSign())
728 OS << " samesign";
729
730 if (getFlags().hasInBounds())
731 OS << " inbounds";
732
733 if (getFlags().hasNonNeg())
734 OS << " nneg";
735
736 if (getFlags().hasNoNaNs())
737 OS << " nnan";
738
739 if (getFlags().hasNoInfs())
740 OS << " ninf";
741
742 if (getFlags().hasNoSignedZeros())
743 OS << " nsz";
744
745 if (getFlags().hasAllowReciprocal())
746 OS << " arcp";
747
748 if (getFlags().hasAllowContract())
749 OS << " contract";
750
751 if (getFlags().hasApproximateFuncs())
752 OS << " afn";
753
754 if (getFlags().hasAllowReassociation())
755 OS << " reassoc";
756
757 if (getFlags().hasNoFPExcept())
758 OS << " nofpexcept";
759
760 if (getFlags().hasNoConvergent())
761 OS << " noconvergent";
762
763 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(Val: this)) {
764 if (!MN->memoperands_empty()) {
765 OS << "<";
766 OS << "Mem:";
767 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
768 e = MN->memoperands_end(); i != e; ++i) {
769 printMemOperand(OS, MMO: **i, G);
770 if (std::next(x: i) != e)
771 OS << " ";
772 }
773 OS << ">";
774 }
775 } else if (const ShuffleVectorSDNode *SVN =
776 dyn_cast<ShuffleVectorSDNode>(Val: this)) {
777 OS << "<";
778 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
779 int Idx = SVN->getMaskElt(Idx: i);
780 if (i) OS << ",";
781 if (Idx < 0)
782 OS << "u";
783 else
784 OS << Idx;
785 }
786 OS << ">";
787 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(Val: this)) {
788 OS << '<' << CSDN->getAPIntValue() << '>';
789 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(Val: this)) {
790 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
791 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
792 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
793 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
794 else {
795 OS << "<APFloat(";
796 CSDN->getValueAPF().bitcastToAPInt().print(OS, isSigned: false);
797 OS << ")>";
798 }
799 } else if (const GlobalAddressSDNode *GADN =
800 dyn_cast<GlobalAddressSDNode>(Val: this)) {
801 int64_t offset = GADN->getOffset();
802 OS << '<';
803 GADN->getGlobal()->printAsOperand(O&: OS);
804 OS << '>';
805 if (offset > 0)
806 OS << " + " << offset;
807 else
808 OS << " " << offset;
809 if (unsigned int TF = GADN->getTargetFlags())
810 OS << " [TF=" << TF << ']';
811 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(Val: this)) {
812 OS << "<" << FIDN->getIndex() << ">";
813 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(Val: this)) {
814 OS << "<" << JTDN->getIndex() << ">";
815 if (unsigned int TF = JTDN->getTargetFlags())
816 OS << " [TF=" << TF << ']';
817 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Val: this)){
818 int offset = CP->getOffset();
819 if (CP->isMachineConstantPoolEntry())
820 OS << "<" << *CP->getMachineCPVal() << ">";
821 else
822 OS << "<" << *CP->getConstVal() << ">";
823 if (offset > 0)
824 OS << " + " << offset;
825 else
826 OS << " " << offset;
827 if (unsigned int TF = CP->getTargetFlags())
828 OS << " [TF=" << TF << ']';
829 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(Val: this)) {
830 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
831 if (unsigned TF = TI->getTargetFlags())
832 OS << " [TF=" << TF << ']';
833 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(Val: this)) {
834 OS << "<";
835 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
836 if (LBB)
837 OS << LBB->getName() << " ";
838 OS << (const void*)BBDN->getBasicBlock() << ">";
839 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(Val: this)) {
840 OS << ' ' << printReg(Reg: R->getReg(),
841 TRI: G ? G->getSubtarget().getRegisterInfo() : nullptr);
842 } else if (const ExternalSymbolSDNode *ES =
843 dyn_cast<ExternalSymbolSDNode>(Val: this)) {
844 OS << "'" << ES->getSymbol() << "'";
845 if (unsigned int TF = ES->getTargetFlags())
846 OS << " [TF=" << TF << ']';
847 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(Val: this)) {
848 if (M->getValue())
849 OS << "<" << M->getValue() << ">";
850 else
851 OS << "<null>";
852 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(Val: this)) {
853 if (MD->getMD())
854 OS << "<" << MD->getMD() << ">";
855 else
856 OS << "<null>";
857 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(Val: this)) {
858 OS << ":" << N->getVT();
859 }
860 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(Val: this)) {
861 OS << "<";
862
863 printMemOperand(OS, MMO: *LD->getMemOperand(), G);
864
865 bool doExt = true;
866 switch (LD->getExtensionType()) {
867 default: doExt = false; break;
868 case ISD::EXTLOAD: OS << ", anyext"; break;
869 case ISD::SEXTLOAD: OS << ", sext"; break;
870 case ISD::ZEXTLOAD: OS << ", zext"; break;
871 }
872 if (doExt)
873 OS << " from " << LD->getMemoryVT();
874
875 const char *AM = getIndexedModeName(AM: LD->getAddressingMode());
876 if (*AM)
877 OS << ", " << AM;
878
879 OS << ">";
880 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(Val: this)) {
881 OS << "<";
882 printMemOperand(OS, MMO: *ST->getMemOperand(), G);
883
884 if (ST->isTruncatingStore())
885 OS << ", trunc to " << ST->getMemoryVT();
886
887 const char *AM = getIndexedModeName(AM: ST->getAddressingMode());
888 if (*AM)
889 OS << ", " << AM;
890
891 OS << ">";
892 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(Val: this)) {
893 OS << "<";
894
895 printMemOperand(OS, MMO: *MLd->getMemOperand(), G);
896
897 bool doExt = true;
898 switch (MLd->getExtensionType()) {
899 default: doExt = false; break;
900 case ISD::EXTLOAD: OS << ", anyext"; break;
901 case ISD::SEXTLOAD: OS << ", sext"; break;
902 case ISD::ZEXTLOAD: OS << ", zext"; break;
903 }
904 if (doExt)
905 OS << " from " << MLd->getMemoryVT();
906
907 const char *AM = getIndexedModeName(AM: MLd->getAddressingMode());
908 if (*AM)
909 OS << ", " << AM;
910
911 if (MLd->isExpandingLoad())
912 OS << ", expanding";
913
914 OS << ">";
915 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(Val: this)) {
916 OS << "<";
917 printMemOperand(OS, MMO: *MSt->getMemOperand(), G);
918
919 if (MSt->isTruncatingStore())
920 OS << ", trunc to " << MSt->getMemoryVT();
921
922 const char *AM = getIndexedModeName(AM: MSt->getAddressingMode());
923 if (*AM)
924 OS << ", " << AM;
925
926 if (MSt->isCompressingStore())
927 OS << ", compressing";
928
929 OS << ">";
930 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(Val: this)) {
931 OS << "<";
932 printMemOperand(OS, MMO: *MGather->getMemOperand(), G);
933
934 bool doExt = true;
935 switch (MGather->getExtensionType()) {
936 default: doExt = false; break;
937 case ISD::EXTLOAD: OS << ", anyext"; break;
938 case ISD::SEXTLOAD: OS << ", sext"; break;
939 case ISD::ZEXTLOAD: OS << ", zext"; break;
940 }
941 if (doExt)
942 OS << " from " << MGather->getMemoryVT();
943
944 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
945 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
946 OS << ", " << Signed << " " << Scaled << " offset";
947
948 OS << ">";
949 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(Val: this)) {
950 OS << "<";
951 printMemOperand(OS, MMO: *MScatter->getMemOperand(), G);
952
953 if (MScatter->isTruncatingStore())
954 OS << ", trunc to " << MScatter->getMemoryVT();
955
956 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
957 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
958 OS << ", " << Signed << " " << Scaled << " offset";
959
960 OS << ">";
961 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(Val: this)) {
962 OS << "<";
963 interleaveComma(c: M->memoperands(), os&: OS, each_fn: [&](const MachineMemOperand *MMO) {
964 printMemOperand(OS, MMO: *MMO, G);
965 });
966 if (auto *A = dyn_cast<AtomicSDNode>(Val: M))
967 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
968 bool doExt = true;
969 switch (A->getExtensionType()) {
970 default: doExt = false; break;
971 case ISD::EXTLOAD: OS << ", anyext"; break;
972 case ISD::SEXTLOAD: OS << ", sext"; break;
973 case ISD::ZEXTLOAD: OS << ", zext"; break;
974 }
975 if (doExt)
976 OS << " from " << A->getMemoryVT();
977 }
978 OS << ">";
979 } else if (const BlockAddressSDNode *BA =
980 dyn_cast<BlockAddressSDNode>(Val: this)) {
981 int64_t offset = BA->getOffset();
982 OS << "<";
983 BA->getBlockAddress()->getFunction()->printAsOperand(O&: OS, PrintType: false);
984 OS << ", ";
985 BA->getBlockAddress()->getBasicBlock()->printAsOperand(O&: OS, PrintType: false);
986 OS << ">";
987 if (offset > 0)
988 OS << " + " << offset;
989 else
990 OS << " " << offset;
991 if (unsigned int TF = BA->getTargetFlags())
992 OS << " [TF=" << TF << ']';
993 } else if (const AddrSpaceCastSDNode *ASC =
994 dyn_cast<AddrSpaceCastSDNode>(Val: this)) {
995 OS << '['
996 << ASC->getSrcAddressSpace()
997 << " -> "
998 << ASC->getDestAddressSpace()
999 << ']';
1000 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(Val: this)) {
1001 OS << '<' << AA->getAlign().value() << '>';
1002 }
1003
1004 if (VerboseDAGDumping) {
1005 if (unsigned Order = getIROrder())
1006 OS << " [ORD=" << Order << ']';
1007
1008 if (getNodeId() != -1)
1009 OS << " [ID=" << getNodeId() << ']';
1010 if (!(isa<ConstantSDNode>(Val: this) || (isa<ConstantFPSDNode>(Val: this))))
1011 OS << " # D:" << isDivergent();
1012
1013 if (G && !G->GetDbgValues(SD: this).empty()) {
1014 OS << " [NoOfDbgValues=" << G->GetDbgValues(SD: this).size() << ']';
1015 for (SDDbgValue *Dbg : G->GetDbgValues(SD: this))
1016 if (!Dbg->isInvalidated())
1017 Dbg->print(OS);
1018 } else if (getHasDebugValue())
1019 OS << " [NoOfDbgValues>0]";
1020
1021 if (const auto *MD = G ? G->getPCSections(Node: this) : nullptr) {
1022 OS << " [pcsections ";
1023 MD->printAsOperand(OS, M: G->getMachineFunction().getFunction().getParent());
1024 OS << ']';
1025 }
1026
1027 if (MDNode *MMRA = G ? G->getMMRAMetadata(Node: this) : nullptr) {
1028 OS << " [mmra ";
1029 MMRA->printAsOperand(OS,
1030 M: G->getMachineFunction().getFunction().getParent());
1031 OS << ']';
1032 }
1033 }
1034}
1035
1036LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
1037 OS << " DbgVal(Order=" << getOrder() << ')';
1038 if (isInvalidated())
1039 OS << "(Invalidated)";
1040 if (isEmitted())
1041 OS << "(Emitted)";
1042 OS << "(";
1043 bool Comma = false;
1044 for (const SDDbgOperand &Op : getLocationOps()) {
1045 if (Comma)
1046 OS << ", ";
1047 switch (Op.getKind()) {
1048 case SDDbgOperand::SDNODE:
1049 if (Op.getSDNode())
1050 OS << "SDNODE=" << PrintNodeId(Node: *Op.getSDNode()) << ':' << Op.getResNo();
1051 else
1052 OS << "SDNODE";
1053 break;
1054 case SDDbgOperand::CONST:
1055 OS << "CONST";
1056 break;
1057 case SDDbgOperand::FRAMEIX:
1058 OS << "FRAMEIX=" << Op.getFrameIx();
1059 break;
1060 case SDDbgOperand::VREG:
1061 OS << "VREG=" << printReg(Reg: Op.getVReg());
1062 break;
1063 }
1064 Comma = true;
1065 }
1066 OS << ")";
1067 if (isIndirect()) OS << "(Indirect)";
1068 if (isVariadic())
1069 OS << "(Variadic)";
1070 OS << ":\"" << Var->getName() << '"';
1071#ifndef NDEBUG
1072 if (Expr->getNumElements())
1073 Expr->dump();
1074#endif
1075}
1076
1077#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1078LLVM_DUMP_METHOD void SDDbgValue::dump() const {
1079 if (isInvalidated())
1080 return;
1081 print(dbgs());
1082 dbgs() << "\n";
1083}
1084#endif
1085
1086/// Return true if this node is so simple that we should just print it inline
1087/// if it appears as an operand.
1088static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1089 // Avoid lots of cluttering when inline printing nodes with associated
1090 // DbgValues in verbose mode.
1091 if (VerboseDAGDumping && G && !G->GetDbgValues(SD: &Node).empty())
1092 return false;
1093 if (Node.getOpcode() == ISD::EntryToken)
1094 return false;
1095 return Node.getNumOperands() == 0;
1096}
1097
1098#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1099static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1100 for (const SDValue &Op : N->op_values()) {
1101 if (shouldPrintInline(*Op.getNode(), G))
1102 continue;
1103 if (Op.getNode()->hasOneUse())
1104 DumpNodes(Op.getNode(), indent+2, G);
1105 }
1106
1107 dbgs().indent(indent);
1108 N->dump(G);
1109}
1110
1111LLVM_DUMP_METHOD void SelectionDAG::dump() const { dump(false); }
1112
1113LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1114 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1115
1116 auto dumpEachNode = [this](const SDNode &N) {
1117 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1118 (!shouldPrintInline(N, this) || N.use_empty()))
1119 DumpNodes(&N, 2, this);
1120 };
1121
1122 if (Sorted) {
1123 SmallVector<const SDNode *> SortedNodes;
1124 SortedNodes.reserve(AllNodes.size());
1125 getTopologicallyOrderedNodes(SortedNodes);
1126 for (const SDNode *N : SortedNodes)
1127 dumpEachNode(*N);
1128 } else {
1129 for (const SDNode &N : allnodes())
1130 dumpEachNode(N);
1131 }
1132
1133 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1134 dbgs() << "\n";
1135
1136 if (VerboseDAGDumping) {
1137 if (DbgBegin() != DbgEnd())
1138 dbgs() << "SDDbgValues:\n";
1139 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1140 Dbg->dump();
1141 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
1142 dbgs() << "Byval SDDbgValues:\n";
1143 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1144 Dbg->dump();
1145 }
1146 dbgs() << "\n";
1147}
1148#endif
1149
1150void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1151 OS << PrintNodeId(Node: *this) << ": ";
1152 print_types(OS, G);
1153 OS << " = " << getOperationName(G);
1154 print_details(OS, G);
1155}
1156
1157static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1158 const SDValue Value) {
1159 if (!Value.getNode()) {
1160 OS << "<null>";
1161 return false;
1162 }
1163
1164 if (shouldPrintInline(Node: *Value.getNode(), G)) {
1165 OS << Value->getOperationName(G) << ':';
1166 Value->print_types(OS, G);
1167 Value->print_details(OS, G);
1168 return true;
1169 }
1170
1171 OS << PrintNodeId(Node: *Value.getNode());
1172 if (unsigned RN = Value.getResNo())
1173 OS << ':' << RN;
1174 return false;
1175}
1176
1177#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1178using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
1179
1180static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1181 const SelectionDAG *G, VisitedSDNodeSet &once) {
1182 if (!once.insert(N).second) // If we've been here before, return now.
1183 return;
1184
1185 // Dump the current SDNode, but don't end the line yet.
1186 OS.indent(indent);
1187 N->printr(OS, G);
1188
1189 // Having printed this SDNode, walk the children:
1190 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1191 if (i) OS << ",";
1192 OS << " ";
1193
1194 const SDValue Op = N->getOperand(i);
1195 bool printedInline = printOperand(OS, G, Op);
1196 if (printedInline)
1197 once.insert(Op.getNode());
1198 }
1199
1200 OS << "\n";
1201
1202 // Dump children that have grandchildren on their own line(s).
1203 for (const SDValue &Op : N->op_values())
1204 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1205}
1206
1207LLVM_DUMP_METHOD void SDNode::dumpr() const {
1208 VisitedSDNodeSet once;
1209 DumpNodesr(dbgs(), this, 0, nullptr, once);
1210}
1211
1212LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1213 VisitedSDNodeSet once;
1214 DumpNodesr(dbgs(), this, 0, G, once);
1215}
1216#endif
1217
1218static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1219 const SelectionDAG *G, unsigned depth,
1220 unsigned indent) {
1221 if (depth == 0)
1222 return;
1223
1224 OS.indent(NumSpaces: indent);
1225
1226 N->print(OS, G);
1227
1228 for (const SDValue &Op : N->op_values()) {
1229 // Don't follow chain operands.
1230 if (Op.getValueType() == MVT::Other)
1231 continue;
1232 // Don't print children that were fully rendered inline.
1233 if (shouldPrintInline(Node: *Op.getNode(), G))
1234 continue;
1235 OS << '\n';
1236 printrWithDepthHelper(OS, N: Op.getNode(), G, depth: depth - 1, indent: indent + 2);
1237 }
1238}
1239
1240void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1241 unsigned depth) const {
1242 printrWithDepthHelper(OS, N: this, G, depth, indent: 0);
1243}
1244
1245void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1246 // Don't print impossibly deep things.
1247 printrWithDepth(OS, G, depth: 10);
1248}
1249
1250#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1251LLVM_DUMP_METHOD
1252void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1253 printrWithDepth(dbgs(), G, depth);
1254}
1255
1256LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1257 // Don't print impossibly deep things.
1258 dumprWithDepth(G, 10);
1259}
1260#endif
1261
1262void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1263 printr(OS, G);
1264 // Under VerboseDAGDumping divergence will be printed always.
1265 if (isDivergent() && !VerboseDAGDumping)
1266 OS << " # D:1";
1267 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1268 if (i) OS << ", "; else OS << " ";
1269 printOperand(OS, G, Value: getOperand(Num: i));
1270 }
1271 if (DebugLoc DL = getDebugLoc()) {
1272 OS << ", ";
1273 DL.print(OS);
1274 }
1275 if (PrintSDNodeAddrs)
1276 OS << " ; " << this;
1277}
1278