1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallPtrSet.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/CodeGen/ISDOpcodes.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/MachineConstantPool.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/SelectionDAG.h"
23#include "llvm/CodeGen/SelectionDAGNodes.h"
24#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25#include "llvm/CodeGen/TargetInstrInfo.h"
26#include "llvm/CodeGen/TargetLowering.h"
27#include "llvm/CodeGen/TargetRegisterInfo.h"
28#include "llvm/CodeGen/TargetSubtargetInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/CodeGenTypes/MachineValueType.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/ModuleSlotTracker.h"
39#include "llvm/IR/Value.h"
40#include "llvm/Support/Casting.h"
41#include "llvm/Support/CommandLine.h"
42#include "llvm/Support/Compiler.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/Printable.h"
46#include "llvm/Support/raw_ostream.h"
47#include "llvm/Target/TargetMachine.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58static cl::opt<bool>
59 PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden,
60 cl::desc("Print addresses of SDNodes when dumping"));
61
62StringRef ISD::getCondCodeName(ISD::CondCode Operation) {
63 switch (Operation) {
64 default:
65 llvm_unreachable("Unknown setcc condition!");
66 case ISD::SETOEQ:
67 return "setoeq";
68 case ISD::SETOGT:
69 return "setogt";
70 case ISD::SETOGE:
71 return "setoge";
72 case ISD::SETOLT:
73 return "setolt";
74 case ISD::SETOLE:
75 return "setole";
76 case ISD::SETONE:
77 return "setone";
78
79 case ISD::SETO:
80 return "seto";
81 case ISD::SETUO:
82 return "setuo";
83 case ISD::SETUEQ:
84 return "setueq";
85 case ISD::SETUGT:
86 return "setugt";
87 case ISD::SETUGE:
88 return "setuge";
89 case ISD::SETULT:
90 return "setult";
91 case ISD::SETULE:
92 return "setule";
93 case ISD::SETUNE:
94 return "setune";
95
96 case ISD::SETEQ:
97 return "seteq";
98 case ISD::SETGT:
99 return "setgt";
100 case ISD::SETGE:
101 return "setge";
102 case ISD::SETLT:
103 return "setlt";
104 case ISD::SETLE:
105 return "setle";
106 case ISD::SETNE:
107 return "setne";
108
109 case ISD::SETTRUE:
110 return "settrue";
111 case ISD::SETTRUE2:
112 return "settrue2";
113 case ISD::SETFALSE:
114 return "setfalse";
115 case ISD::SETFALSE2:
116 return "setfalse2";
117 }
118}
119
120std::string SDNode::getOperationName(const SelectionDAG *G) const {
121 switch (getOpcode()) {
122 default:
123 // If this assert fails, add/remove the newly added/removed opcode from the
124 // switch and update the expected value.
125 static_assert(ISD::BUILTIN_OP_END == 477, "Unexpected number of opcodes");
126 if (getOpcode() < ISD::BUILTIN_OP_END)
127 return "<<Unknown DAG Node>>";
128 if (isMachineOpcode()) {
129 if (G)
130 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
131 if (getMachineOpcode() < TII->getNumOpcodes())
132 return std::string(TII->getName(Opcode: getMachineOpcode()));
133 return "<<Unknown Machine Node #" + utostr(X: getOpcode()) + ">>";
134 }
135 if (G) {
136 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
137 if (const char *Name = TSI.getTargetNodeName(Opcode: getOpcode()))
138 return Name;
139 const TargetLowering &TLI = G->getTargetLoweringInfo();
140 const char *Name = TLI.getTargetNodeName(Opcode: getOpcode());
141 if (Name) return Name;
142 return "<<Unknown Target Node #" + utostr(X: getOpcode()) + ">>";
143 }
144 return "<<Unknown Node #" + utostr(X: getOpcode()) + ">>";
145
146 // clang-format off
147#ifndef NDEBUG
148 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
149#endif
150 case ISD::PREFETCH: return "Prefetch";
151 case ISD::ARITH_FENCE: return "ArithFence";
152 case ISD::MEMBARRIER: return "MemBarrier";
153 case ISD::ATOMIC_FENCE: return "AtomicFence";
154 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
155 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
156 case ISD::ATOMIC_SWAP: return "AtomicSwap";
157 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
158 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
159 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
160 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
161 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
162 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
163 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
164 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
165 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
166 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
167 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
168 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
169 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
170 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
171 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
172 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
173 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
174 case ISD::ATOMIC_LOAD_FMAXIMUMNUM: return "AtomicLoadFMaximumNum";
175 case ISD::ATOMIC_LOAD_FMINIMUMNUM: return "AtomicLoadFMinimumNum";
176 case ISD::ATOMIC_LOAD_UINC_WRAP:
177 return "AtomicLoadUIncWrap";
178 case ISD::ATOMIC_LOAD_UDEC_WRAP:
179 return "AtomicLoadUDecWrap";
180 case ISD::ATOMIC_LOAD_USUB_COND:
181 return "AtomicLoadUSubCond";
182 case ISD::ATOMIC_LOAD_USUB_SAT:
183 return "AtomicLoadUSubSat";
184 case ISD::ATOMIC_LOAD: return "AtomicLoad";
185 case ISD::ATOMIC_STORE: return "AtomicStore";
186 case ISD::PCMARKER: return "PCMarker";
187 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
188 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
189 case ISD::SRCVALUE: return "SrcValue";
190 case ISD::MDNODE_SDNODE: return "MDNode";
191 case ISD::EntryToken: return "EntryToken";
192 case ISD::TokenFactor: return "TokenFactor";
193 case ISD::AssertSext: return "AssertSext";
194 case ISD::AssertZext: return "AssertZext";
195 case ISD::AssertNoFPClass: return "AssertNoFPClass";
196 case ISD::AssertAlign: return "AssertAlign";
197
198 case ISD::BasicBlock: return "BasicBlock";
199 case ISD::VALUETYPE: return "ValueType";
200 case ISD::Register: return "Register";
201 case ISD::RegisterMask: return "RegisterMask";
202 case ISD::Constant:
203 if (cast<ConstantSDNode>(Val: this)->isOpaque())
204 return "OpaqueConstant";
205 return "Constant";
206 case ISD::ConstantFP: return "ConstantFP";
207 case ISD::GlobalAddress: return "GlobalAddress";
208 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
209 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
210 case ISD::FrameIndex: return "FrameIndex";
211 case ISD::JumpTable: return "JumpTable";
212 case ISD::JUMP_TABLE_DEBUG_INFO:
213 return "JUMP_TABLE_DEBUG_INFO";
214 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
215 case ISD::RETURNADDR: return "RETURNADDR";
216 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
217 case ISD::FRAMEADDR: return "FRAMEADDR";
218 case ISD::SPONENTRY: return "SPONENTRY";
219 case ISD::STACKADDRESS: return "STACKADDRESS";
220 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
221 case ISD::READ_REGISTER: return "READ_REGISTER";
222 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
223 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
224 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
225 case ISD::EH_RETURN: return "EH_RETURN";
226 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
227 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
228 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
229 case ISD::ConstantPool: return "ConstantPool";
230 case ISD::TargetIndex: return "TargetIndex";
231 case ISD::ExternalSymbol: return "ExternalSymbol";
232 case ISD::BlockAddress: return "BlockAddress";
233 case ISD::INTRINSIC_WO_CHAIN:
234 case ISD::INTRINSIC_VOID:
235 case ISD::INTRINSIC_W_CHAIN: {
236 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
237 unsigned IID = getOperand(Num: OpNo)->getAsZExtVal();
238 if (IID < Intrinsic::num_intrinsics)
239 return Intrinsic::getBaseName(id: (Intrinsic::ID)IID).str();
240 if (!G)
241 return "Unknown intrinsic";
242 llvm_unreachable("Invalid intrinsic ID");
243 }
244
245 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
246 case ISD::TargetConstant:
247 if (cast<ConstantSDNode>(Val: this)->isOpaque())
248 return "OpaqueTargetConstant";
249 return "TargetConstant";
250
251 case ISD::TargetConstantFP: return "TargetConstantFP";
252 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
253 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
254 case ISD::TargetFrameIndex: return "TargetFrameIndex";
255 case ISD::TargetJumpTable: return "TargetJumpTable";
256 case ISD::TargetConstantPool: return "TargetConstantPool";
257 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
258 case ISD::MCSymbol: return "MCSymbol";
259 case ISD::TargetBlockAddress: return "TargetBlockAddress";
260
261 case ISD::CopyToReg: return "CopyToReg";
262 case ISD::CopyFromReg: return "CopyFromReg";
263 case ISD::UNDEF: return "undef";
264 case ISD::POISON: return "poison";
265 case ISD::VSCALE: return "vscale";
266 case ISD::MERGE_VALUES: return "merge_values";
267 case ISD::INLINEASM: return "inlineasm";
268 case ISD::INLINEASM_BR: return "inlineasm_br";
269 case ISD::EH_LABEL: return "eh_label";
270 case ISD::ANNOTATION_LABEL: return "annotation_label";
271 case ISD::HANDLENODE: return "handlenode";
272
273 // Unary operators
274 case ISD::FABS: return "fabs";
275 case ISD::FMINNUM: return "fminnum";
276 case ISD::STRICT_FMINNUM: return "strict_fminnum";
277 case ISD::FMAXNUM: return "fmaxnum";
278 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
279 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
280 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
281 case ISD::FMINIMUM: return "fminimum";
282 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
283 case ISD::FMAXIMUM: return "fmaximum";
284 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
285 case ISD::FMINIMUMNUM: return "fminimumnum";
286 case ISD::FMAXIMUMNUM: return "fmaximumnum";
287 case ISD::PSEUDO_FMIN: return "pseudo_fmin";
288 case ISD::PSEUDO_FMAX: return "pseudo_fmax";
289 case ISD::STRICT_PSEUDO_FMIN: return "strict_pseudo_fmin";
290 case ISD::STRICT_PSEUDO_FMAX: return "strict_pseudo_fmax";
291 case ISD::FNEG: return "fneg";
292 case ISD::FSQRT: return "fsqrt";
293 case ISD::STRICT_FSQRT: return "strict_fsqrt";
294 case ISD::FCBRT: return "fcbrt";
295 case ISD::FSIN: return "fsin";
296 case ISD::STRICT_FSIN: return "strict_fsin";
297 case ISD::FCOS: return "fcos";
298 case ISD::STRICT_FCOS: return "strict_fcos";
299 case ISD::FSINCOS: return "fsincos";
300 case ISD::FSINCOSPI: return "fsincospi";
301 case ISD::FMODF: return "fmodf";
302 case ISD::FTAN: return "ftan";
303 case ISD::STRICT_FTAN: return "strict_ftan";
304 case ISD::FASIN: return "fasin";
305 case ISD::STRICT_FASIN: return "strict_fasin";
306 case ISD::FACOS: return "facos";
307 case ISD::STRICT_FACOS: return "strict_facos";
308 case ISD::FATAN: return "fatan";
309 case ISD::STRICT_FATAN: return "strict_fatan";
310 case ISD::FATAN2: return "fatan2";
311 case ISD::STRICT_FATAN2: return "strict_fatan2";
312 case ISD::FSINH: return "fsinh";
313 case ISD::STRICT_FSINH: return "strict_fsinh";
314 case ISD::FCOSH: return "fcosh";
315 case ISD::STRICT_FCOSH: return "strict_fcosh";
316 case ISD::FTANH: return "ftanh";
317 case ISD::STRICT_FTANH: return "strict_ftanh";
318 case ISD::FTRUNC: return "ftrunc";
319 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
320 case ISD::FFLOOR: return "ffloor";
321 case ISD::STRICT_FFLOOR: return "strict_ffloor";
322 case ISD::FCEIL: return "fceil";
323 case ISD::STRICT_FCEIL: return "strict_fceil";
324 case ISD::FRINT: return "frint";
325 case ISD::STRICT_FRINT: return "strict_frint";
326 case ISD::FNEARBYINT: return "fnearbyint";
327 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
328 case ISD::FROUND: return "fround";
329 case ISD::STRICT_FROUND: return "strict_fround";
330 case ISD::FROUNDEVEN: return "froundeven";
331 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
332 case ISD::FEXP: return "fexp";
333 case ISD::STRICT_FEXP: return "strict_fexp";
334 case ISD::FEXP2: return "fexp2";
335 case ISD::STRICT_FEXP2: return "strict_fexp2";
336 case ISD::FEXP10: return "fexp10";
337 case ISD::FLOG: return "flog";
338 case ISD::STRICT_FLOG: return "strict_flog";
339 case ISD::FLOG2: return "flog2";
340 case ISD::STRICT_FLOG2: return "strict_flog2";
341 case ISD::FLOG10: return "flog10";
342 case ISD::STRICT_FLOG10: return "strict_flog10";
343
344 // Binary operators
345 case ISD::ADD: return "add";
346 case ISD::PTRADD: return "ptradd";
347 case ISD::SUB: return "sub";
348 case ISD::MUL: return "mul";
349 case ISD::MULHU: return "mulhu";
350 case ISD::MULHS: return "mulhs";
351 case ISD::AVGFLOORU: return "avgflooru";
352 case ISD::AVGFLOORS: return "avgfloors";
353 case ISD::AVGCEILU: return "avgceilu";
354 case ISD::AVGCEILS: return "avgceils";
355 case ISD::ABDS: return "abds";
356 case ISD::ABDU: return "abdu";
357 case ISD::SDIV: return "sdiv";
358 case ISD::UDIV: return "udiv";
359 case ISD::SREM: return "srem";
360 case ISD::UREM: return "urem";
361 case ISD::SMUL_LOHI: return "smul_lohi";
362 case ISD::UMUL_LOHI: return "umul_lohi";
363 case ISD::SDIVREM: return "sdivrem";
364 case ISD::UDIVREM: return "udivrem";
365 case ISD::AND: return "and";
366 case ISD::OR: return "or";
367 case ISD::XOR: return "xor";
368 case ISD::SHL: return "shl";
369 case ISD::SRA: return "sra";
370 case ISD::SRL: return "srl";
371 case ISD::ROTL: return "rotl";
372 case ISD::ROTR: return "rotr";
373 case ISD::FSHL: return "fshl";
374 case ISD::FSHR: return "fshr";
375 case ISD::CLMUL: return "clmul";
376 case ISD::CLMULR: return "clmulr";
377 case ISD::CLMULH: return "clmulh";
378 case ISD::PEXT: return "pext";
379 case ISD::PDEP: return "pdep";
380 case ISD::FADD: return "fadd";
381 case ISD::STRICT_FADD: return "strict_fadd";
382 case ISD::FSUB: return "fsub";
383 case ISD::STRICT_FSUB: return "strict_fsub";
384 case ISD::FMUL: return "fmul";
385 case ISD::STRICT_FMUL: return "strict_fmul";
386 case ISD::FDIV: return "fdiv";
387 case ISD::STRICT_FDIV: return "strict_fdiv";
388 case ISD::FMA: return "fma";
389 case ISD::STRICT_FMA: return "strict_fma";
390 case ISD::FMAD: return "fmad";
391 case ISD::FMULADD: return "fmuladd";
392 case ISD::FREM: return "frem";
393 case ISD::STRICT_FREM: return "strict_frem";
394 case ISD::FCOPYSIGN: return "fcopysign";
395 case ISD::FGETSIGN: return "fgetsign";
396 case ISD::FCANONICALIZE: return "fcanonicalize";
397 case ISD::IS_FPCLASS: return "is_fpclass";
398 case ISD::FPOW: return "fpow";
399 case ISD::STRICT_FPOW: return "strict_fpow";
400 case ISD::SMIN: return "smin";
401 case ISD::SMAX: return "smax";
402 case ISD::UMIN: return "umin";
403 case ISD::UMAX: return "umax";
404 case ISD::SCMP: return "scmp";
405 case ISD::UCMP: return "ucmp";
406
407 case ISD::FLDEXP: return "fldexp";
408 case ISD::STRICT_FLDEXP: return "strict_fldexp";
409 case ISD::FFREXP: return "ffrexp";
410 case ISD::FPOWI: return "fpowi";
411 case ISD::STRICT_FPOWI: return "strict_fpowi";
412 case ISD::SETCC: return "setcc";
413 case ISD::SETCCCARRY: return "setcccarry";
414 case ISD::STRICT_FSETCC: return "strict_fsetcc";
415 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
416 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
417 case ISD::SELECT: return "select";
418 case ISD::VSELECT: return "vselect";
419 case ISD::SELECT_CC: return "select_cc";
420 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
421 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
422 case ISD::CONCAT_VECTORS: return "concat_vectors";
423 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
424 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
425 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
426 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
427 case ISD::VECTOR_REPEAT: return "vector_repeat";
428 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
429 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
430 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
431 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
432 case ISD::SPLAT_VECTOR: return "splat_vector";
433 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
434 case ISD::VECTOR_REVERSE: return "vector_reverse";
435 case ISD::STEP_VECTOR: return "step_vector";
436 case ISD::CARRY_FALSE: return "carry_false";
437 case ISD::ADDC: return "addc";
438 case ISD::ADDE: return "adde";
439 case ISD::UADDO_CARRY: return "uaddo_carry";
440 case ISD::SADDO_CARRY: return "saddo_carry";
441 case ISD::SADDO: return "saddo";
442 case ISD::UADDO: return "uaddo";
443 case ISD::SSUBO: return "ssubo";
444 case ISD::USUBO: return "usubo";
445 case ISD::SMULO: return "smulo";
446 case ISD::UMULO: return "umulo";
447 case ISD::SUBC: return "subc";
448 case ISD::SUBE: return "sube";
449 case ISD::USUBO_CARRY: return "usubo_carry";
450 case ISD::SSUBO_CARRY: return "ssubo_carry";
451 case ISD::SHL_PARTS: return "shl_parts";
452 case ISD::SRA_PARTS: return "sra_parts";
453 case ISD::SRL_PARTS: return "srl_parts";
454
455 case ISD::SADDSAT: return "saddsat";
456 case ISD::UADDSAT: return "uaddsat";
457 case ISD::SSUBSAT: return "ssubsat";
458 case ISD::USUBSAT: return "usubsat";
459 case ISD::SSHLSAT: return "sshlsat";
460 case ISD::USHLSAT: return "ushlsat";
461
462 case ISD::SMULFIX: return "smulfix";
463 case ISD::SMULFIXSAT: return "smulfixsat";
464 case ISD::UMULFIX: return "umulfix";
465 case ISD::UMULFIXSAT: return "umulfixsat";
466
467 case ISD::SDIVFIX: return "sdivfix";
468 case ISD::SDIVFIXSAT: return "sdivfixsat";
469 case ISD::UDIVFIX: return "udivfix";
470 case ISD::UDIVFIXSAT: return "udivfixsat";
471
472 // Conversion operators.
473 case ISD::SIGN_EXTEND: return "sign_extend";
474 case ISD::ZERO_EXTEND: return "zero_extend";
475 case ISD::ANY_EXTEND: return "any_extend";
476 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
477 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
478 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
479 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
480 case ISD::TRUNCATE: return "truncate";
481 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
482 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
483 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
484 case ISD::FP_ROUND: return "fp_round";
485 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
486 case ISD::FP_EXTEND: return "fp_extend";
487 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
488
489 case ISD::SINT_TO_FP: return "sint_to_fp";
490 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
491 case ISD::UINT_TO_FP: return "uint_to_fp";
492 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
493 case ISD::FP_TO_SINT: return "fp_to_sint";
494 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
495 case ISD::FP_TO_UINT: return "fp_to_uint";
496 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
497 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
498 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
499 case ISD::BITCAST: return "bitcast";
500 case ISD::ADDRSPACECAST: return "addrspacecast";
501 case ISD::FP16_TO_FP: return "fp16_to_fp";
502 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
503 case ISD::FP_TO_FP16: return "fp_to_fp16";
504 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
505 case ISD::BF16_TO_FP: return "bf16_to_fp";
506 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
507 case ISD::FP_TO_BF16: return "fp_to_bf16";
508 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
509 case ISD::CONVERT_FROM_ARBITRARY_FP: return "convert_from_arbitrary_fp";
510 case ISD::CONVERT_TO_ARBITRARY_FP: return "convert_to_arbitrary_fp";
511 case ISD::LROUND: return "lround";
512 case ISD::STRICT_LROUND: return "strict_lround";
513 case ISD::LLROUND: return "llround";
514 case ISD::STRICT_LLROUND: return "strict_llround";
515 case ISD::LRINT: return "lrint";
516 case ISD::STRICT_LRINT: return "strict_lrint";
517 case ISD::LLRINT: return "llrint";
518 case ISD::STRICT_LLRINT: return "strict_llrint";
519
520 // Control flow instructions
521 case ISD::BR: return "br";
522 case ISD::BRIND: return "brind";
523 case ISD::BR_JT: return "br_jt";
524 case ISD::BRCOND: return "brcond";
525 case ISD::BR_CC: return "br_cc";
526 case ISD::CALLSEQ_START: return "callseq_start";
527 case ISD::CALLSEQ_END: return "callseq_end";
528
529 // EH instructions
530 case ISD::CATCHRET: return "catchret";
531 case ISD::CLEANUPRET: return "cleanupret";
532
533 // Other operators
534 case ISD::LOAD: return "load";
535 case ISD::STORE: return "store";
536 case ISD::MLOAD: return "masked_load";
537 case ISD::MSTORE: return "masked_store";
538 case ISD::MGATHER: return "masked_gather";
539 case ISD::MSCATTER: return "masked_scatter";
540 case ISD::VECTOR_COMPRESS: return "vector_compress";
541 case ISD::VAARG: return "vaarg";
542 case ISD::VACOPY: return "vacopy";
543 case ISD::VAEND: return "vaend";
544 case ISD::VASTART: return "vastart";
545 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
546 case ISD::EXTRACT_ELEMENT: return "extract_element";
547 case ISD::BUILD_PAIR: return "build_pair";
548 case ISD::STACKSAVE: return "stacksave";
549 case ISD::STACKRESTORE: return "stackrestore";
550 case ISD::TRAP: return "trap";
551 case ISD::DEBUGTRAP: return "debugtrap";
552 case ISD::UBSANTRAP: return "ubsantrap";
553 case ISD::LIFETIME_START: return "lifetime.start";
554 case ISD::LIFETIME_END: return "lifetime.end";
555 case ISD::FAKE_USE:
556 return "fake_use";
557 case ISD::RELOC_NONE:
558 return "reloc_none";
559 case ISD::COND_LOOP:
560 return "cond_loop";
561 case ISD::PSEUDO_PROBE:
562 return "pseudoprobe";
563 case ISD::GC_TRANSITION_START: return "gc_transition.start";
564 case ISD::GC_TRANSITION_END: return "gc_transition.end";
565 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
566 case ISD::FREEZE: return "freeze";
567 case ISD::PREALLOCATED_SETUP:
568 return "call_setup";
569 case ISD::PREALLOCATED_ARG:
570 return "call_alloc";
571
572 // Floating point environment manipulation
573 case ISD::GET_ROUNDING: return "get_rounding";
574 case ISD::SET_ROUNDING: return "set_rounding";
575 case ISD::GET_FPENV: return "get_fpenv";
576 case ISD::SET_FPENV: return "set_fpenv";
577 case ISD::RESET_FPENV: return "reset_fpenv";
578 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
579 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
580 case ISD::GET_FPMODE: return "get_fpmode";
581 case ISD::SET_FPMODE: return "set_fpmode";
582 case ISD::RESET_FPMODE: return "reset_fpmode";
583
584 // Convergence control instructions
585 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
586 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
587 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
588 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
589
590 // Bit manipulation
591 case ISD::ABS: return "abs";
592 case ISD::ABS_MIN_POISON: return "abs_min_poison";
593 case ISD::BITREVERSE: return "bitreverse";
594 case ISD::BSWAP: return "bswap";
595 case ISD::CTPOP: return "ctpop";
596 case ISD::CTTZ: return "cttz";
597 case ISD::CTTZ_ZERO_POISON: return "cttz_zero_poison";
598 case ISD::CTLZ: return "ctlz";
599 case ISD::CTLZ_ZERO_POISON: return "ctlz_zero_poison";
600 case ISD::CTLS: return "ctls";
601 case ISD::PARITY: return "parity";
602
603 // Trampolines
604 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
605 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
606
607 // clang-format on
608
609 case ISD::CONDCODE:
610 return ISD::getCondCodeName(Operation: cast<CondCodeSDNode>(Val: this)->get()).str();
611 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
612 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
613 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
614 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
615 case ISD::VECREDUCE_ADD: return "vecreduce_add";
616 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
617 case ISD::VECREDUCE_AND: return "vecreduce_and";
618 case ISD::VECREDUCE_OR: return "vecreduce_or";
619 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
620 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
621 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
622 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
623 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
624 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
625 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
626 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
627 case ISD::VECREDUCE_FMINIMUMNUM:
628 return "vecreduce_fminimumnum";
629 case ISD::VECREDUCE_FMAXIMUMNUM:
630 return "vecreduce_fmaximumnum";
631 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
632 case ISD::STACKMAP:
633 return "stackmap";
634 case ISD::PATCHPOINT:
635 return "patchpoint";
636 case ISD::CLEAR_CACHE:
637 return "clear_cache";
638 case ISD::DEACTIVATION_SYMBOL:
639 return "deactivation_symbol";
640
641 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
642 return "histogram";
643
644 case ISD::CTTZ_ELTS:
645 return "cttz_elts";
646 case ISD::CTTZ_ELTS_ZERO_POISON:
647 return "cttz_elts_zero_poison";
648
649 case ISD::VECTOR_FIND_LAST_ACTIVE:
650 return "find_last_active";
651
652 case ISD::GET_ACTIVE_LANE_MASK:
653 return "get_active_lane_mask";
654 case ISD::MASK_BEFOREFIRST:
655 return "mask_beforefirst";
656
657 case ISD::VECTOR_MATCH:
658 return "vector_match";
659
660 case ISD::PARTIAL_REDUCE_UMLA:
661 return "partial_reduce_umla";
662 case ISD::PARTIAL_REDUCE_SMLA:
663 return "partial_reduce_smla";
664 case ISD::PARTIAL_REDUCE_SUMLA:
665 return "partial_reduce_sumla";
666 case ISD::PARTIAL_REDUCE_FMLA:
667 return "partial_reduce_fmla";
668 case ISD::LOOP_DEPENDENCE_WAR_MASK:
669 return "loop_dep_war";
670 case ISD::LOOP_DEPENDENCE_RAW_MASK:
671 return "loop_dep_raw";
672 case ISD::MASKED_UDIV:
673 return "masked_udiv";
674 case ISD::MASKED_SDIV:
675 return "masked_sdiv";
676 case ISD::MASKED_UREM:
677 return "masked_urem";
678 case ISD::MASKED_SREM:
679 return "masked_srem";
680
681 // Vector Predication
682#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
683 case ISD::SDID: \
684 return #NAME;
685#include "llvm/IR/VPIntrinsics.def"
686 }
687}
688
689const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
690 switch (AM) {
691 default: return "";
692 case ISD::PRE_INC: return "<pre-inc>";
693 case ISD::PRE_DEC: return "<pre-dec>";
694 case ISD::POST_INC: return "<post-inc>";
695 case ISD::POST_DEC: return "<post-dec>";
696 }
697}
698
699static Printable PrintNodeId(const SDNode &Node) {
700 return Printable([&Node](raw_ostream &OS) {
701#ifndef NDEBUG
702 static const raw_ostream::Colors Color[] = {
703 raw_ostream::BLACK, raw_ostream::RED, raw_ostream::GREEN,
704 raw_ostream::YELLOW, raw_ostream::BLUE, raw_ostream::MAGENTA,
705 raw_ostream::CYAN,
706 };
707 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
708 OS << 't' << Node.PersistentId;
709 OS.resetColor();
710#else
711 OS << (const void*)&Node;
712#endif
713 });
714}
715
716// Print the MMO with more information from the SelectionDAG.
717static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
718 const MachineFunction *MF, const Module *M,
719 const MachineFrameInfo *MFI,
720 const TargetInstrInfo *TII, LLVMContext &Ctx) {
721 ModuleSlotTracker MST(M);
722 if (MF)
723 MST.incorporateFunction(F: MF->getFunction());
724 SmallVector<StringRef, 0> SSNs;
725 MMO.print(OS, MST, SSNs, Context: Ctx, MFI, TII);
726}
727
728static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
729 const SelectionDAG *G) {
730 if (G) {
731 const MachineFunction *MF = &G->getMachineFunction();
732 return printMemOperand(OS, MMO, MF, M: MF->getFunction().getParent(),
733 MFI: &MF->getFrameInfo(),
734 TII: G->getSubtarget().getInstrInfo(), Ctx&: *G->getContext());
735 }
736
737 LLVMContext Ctx;
738 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
739 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
740}
741
742#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
743LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
744
745LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
746 print(dbgs(), G);
747 dbgs() << '\n';
748}
749#endif
750
751void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
752 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
753 if (i) OS << ",";
754 if (getValueType(ResNo: i) == MVT::Other)
755 OS << "ch";
756 else
757 OS << getValueType(ResNo: i).getEVTString();
758 }
759}
760
761void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
762 if (getFlags().hasNoUnsignedWrap())
763 OS << " nuw";
764
765 if (getFlags().hasNoSignedWrap())
766 OS << " nsw";
767
768 if (getFlags().hasExact())
769 OS << " exact";
770
771 if (getFlags().hasDisjoint())
772 OS << " disjoint";
773
774 if (getFlags().hasSameSign())
775 OS << " samesign";
776
777 if (getFlags().hasInBounds())
778 OS << " inbounds";
779
780 if (getFlags().hasNonNeg())
781 OS << " nneg";
782
783 if (getFlags().hasNonNull())
784 OS << " nonnull";
785
786 if (getFlags().hasNoNaNs())
787 OS << " nnan";
788
789 if (getFlags().hasNoInfs())
790 OS << " ninf";
791
792 if (getFlags().hasNoSignedZeros())
793 OS << " nsz";
794
795 if (getFlags().hasAllowReciprocal())
796 OS << " arcp";
797
798 if (getFlags().hasAllowContract())
799 OS << " contract";
800
801 if (getFlags().hasApproximateFuncs())
802 OS << " afn";
803
804 if (getFlags().hasAllowReassociation())
805 OS << " reassoc";
806
807 if (getFlags().hasNoFPExcept())
808 OS << " nofpexcept";
809
810 if (getFlags().hasNoConvergent())
811 OS << " noconvergent";
812
813 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(Val: this)) {
814 if (!MN->memoperands_empty()) {
815 OS << "<";
816 OS << "Mem:";
817 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
818 e = MN->memoperands_end(); i != e; ++i) {
819 printMemOperand(OS, MMO: **i, G);
820 if (std::next(x: i) != e)
821 OS << " ";
822 }
823 OS << ">";
824 }
825 } else if (const ShuffleVectorSDNode *SVN =
826 dyn_cast<ShuffleVectorSDNode>(Val: this)) {
827 OS << "<";
828 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
829 int Idx = SVN->getMaskElt(Idx: i);
830 if (i) OS << ",";
831 if (Idx < 0)
832 OS << "u";
833 else
834 OS << Idx;
835 }
836 OS << ">";
837 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(Val: this)) {
838 OS << '<' << CSDN->getAPIntValue() << '>';
839 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(Val: this)) {
840 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
841 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
842 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
843 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
844 else {
845 OS << "<APFloat(";
846 CSDN->getValueAPF().bitcastToAPInt().print(OS, isSigned: false);
847 OS << ")>";
848 }
849 } else if (const GlobalAddressSDNode *GADN =
850 dyn_cast<GlobalAddressSDNode>(Val: this)) {
851 int64_t offset = GADN->getOffset();
852 OS << '<';
853 GADN->getGlobal()->printAsOperand(O&: OS);
854 OS << '>';
855 if (offset > 0)
856 OS << " + " << offset;
857 else
858 OS << " " << offset;
859 if (unsigned int TF = GADN->getTargetFlags())
860 OS << " [TF=" << TF << ']';
861 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(Val: this)) {
862 OS << "<" << FIDN->getIndex() << ">";
863 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(Val: this)) {
864 OS << "<" << JTDN->getIndex() << ">";
865 if (unsigned int TF = JTDN->getTargetFlags())
866 OS << " [TF=" << TF << ']';
867 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Val: this)){
868 int offset = CP->getOffset();
869 if (CP->isMachineConstantPoolEntry())
870 OS << "<" << *CP->getMachineCPVal() << ">";
871 else
872 OS << "<" << *CP->getConstVal() << ">";
873 if (offset > 0)
874 OS << " + " << offset;
875 else
876 OS << " " << offset;
877 if (unsigned int TF = CP->getTargetFlags())
878 OS << " [TF=" << TF << ']';
879 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(Val: this)) {
880 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
881 if (unsigned TF = TI->getTargetFlags())
882 OS << " [TF=" << TF << ']';
883 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(Val: this)) {
884 OS << "<";
885 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
886 if (LBB)
887 OS << LBB->getName() << " ";
888 OS << (const void*)BBDN->getBasicBlock() << ">";
889 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(Val: this)) {
890 OS << ' ' << printReg(Reg: R->getReg(),
891 TRI: G ? G->getSubtarget().getRegisterInfo() : nullptr);
892 } else if (const ExternalSymbolSDNode *ES =
893 dyn_cast<ExternalSymbolSDNode>(Val: this)) {
894 OS << "'" << ES->getSymbol() << "'";
895 if (unsigned int TF = ES->getTargetFlags())
896 OS << " [TF=" << TF << ']';
897 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(Val: this)) {
898 if (M->getValue())
899 OS << "<" << M->getValue() << ">";
900 else
901 OS << "<null>";
902 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(Val: this)) {
903 if (MD->getMD())
904 OS << "<" << MD->getMD() << ">";
905 else
906 OS << "<null>";
907 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(Val: this)) {
908 OS << ":" << N->getVT();
909 }
910 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(Val: this)) {
911 OS << "<";
912
913 printMemOperand(OS, MMO: *LD->getMemOperand(), G);
914
915 bool doExt = true;
916 switch (LD->getExtensionType()) {
917 default: doExt = false; break;
918 case ISD::EXTLOAD: OS << ", anyext"; break;
919 case ISD::SEXTLOAD: OS << ", sext"; break;
920 case ISD::ZEXTLOAD: OS << ", zext"; break;
921 }
922 if (doExt)
923 OS << " from " << LD->getMemoryVT();
924
925 const char *AM = getIndexedModeName(AM: LD->getAddressingMode());
926 if (*AM)
927 OS << ", " << AM;
928
929 OS << ">";
930 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(Val: this)) {
931 OS << "<";
932 printMemOperand(OS, MMO: *ST->getMemOperand(), G);
933
934 if (ST->isTruncatingStore())
935 OS << ", trunc to " << ST->getMemoryVT();
936
937 const char *AM = getIndexedModeName(AM: ST->getAddressingMode());
938 if (*AM)
939 OS << ", " << AM;
940
941 OS << ">";
942 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(Val: this)) {
943 OS << "<";
944
945 printMemOperand(OS, MMO: *MLd->getMemOperand(), G);
946
947 bool doExt = true;
948 switch (MLd->getExtensionType()) {
949 default: doExt = false; break;
950 case ISD::EXTLOAD: OS << ", anyext"; break;
951 case ISD::SEXTLOAD: OS << ", sext"; break;
952 case ISD::ZEXTLOAD: OS << ", zext"; break;
953 }
954 if (doExt)
955 OS << " from " << MLd->getMemoryVT();
956
957 const char *AM = getIndexedModeName(AM: MLd->getAddressingMode());
958 if (*AM)
959 OS << ", " << AM;
960
961 if (MLd->isExpandingLoad())
962 OS << ", expanding";
963
964 OS << ">";
965 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(Val: this)) {
966 OS << "<";
967 printMemOperand(OS, MMO: *MSt->getMemOperand(), G);
968
969 if (MSt->isTruncatingStore())
970 OS << ", trunc to " << MSt->getMemoryVT();
971
972 const char *AM = getIndexedModeName(AM: MSt->getAddressingMode());
973 if (*AM)
974 OS << ", " << AM;
975
976 if (MSt->isCompressingStore())
977 OS << ", compressing";
978
979 OS << ">";
980 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(Val: this)) {
981 OS << "<";
982 printMemOperand(OS, MMO: *MGather->getMemOperand(), G);
983
984 bool doExt = true;
985 switch (MGather->getExtensionType()) {
986 default: doExt = false; break;
987 case ISD::EXTLOAD: OS << ", anyext"; break;
988 case ISD::SEXTLOAD: OS << ", sext"; break;
989 case ISD::ZEXTLOAD: OS << ", zext"; break;
990 }
991 if (doExt)
992 OS << " from " << MGather->getMemoryVT();
993
994 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
995 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
996 OS << ", " << Signed << " " << Scaled << " offset";
997
998 OS << ">";
999 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(Val: this)) {
1000 OS << "<";
1001 printMemOperand(OS, MMO: *MScatter->getMemOperand(), G);
1002
1003 if (MScatter->isTruncatingStore())
1004 OS << ", trunc to " << MScatter->getMemoryVT();
1005
1006 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
1007 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
1008 OS << ", " << Signed << " " << Scaled << " offset";
1009
1010 OS << ">";
1011 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(Val: this)) {
1012 OS << "<";
1013 interleaveComma(c: M->memoperands(), os&: OS, each_fn: [&](const MachineMemOperand *MMO) {
1014 printMemOperand(OS, MMO: *MMO, G);
1015 });
1016 if (auto *A = dyn_cast<AtomicSDNode>(Val: M))
1017 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
1018 bool doExt = true;
1019 switch (A->getExtensionType()) {
1020 default: doExt = false; break;
1021 case ISD::EXTLOAD: OS << ", anyext"; break;
1022 case ISD::SEXTLOAD: OS << ", sext"; break;
1023 case ISD::ZEXTLOAD: OS << ", zext"; break;
1024 }
1025 if (doExt)
1026 OS << " from " << A->getMemoryVT();
1027 }
1028 OS << ">";
1029 } else if (const BlockAddressSDNode *BA =
1030 dyn_cast<BlockAddressSDNode>(Val: this)) {
1031 int64_t offset = BA->getOffset();
1032 OS << "<";
1033 BA->getBlockAddress()->getFunction()->printAsOperand(O&: OS, PrintType: false);
1034 OS << ", ";
1035 BA->getBlockAddress()->getBasicBlock()->printAsOperand(O&: OS, PrintType: false);
1036 OS << ">";
1037 if (offset > 0)
1038 OS << " + " << offset;
1039 else
1040 OS << " " << offset;
1041 if (unsigned int TF = BA->getTargetFlags())
1042 OS << " [TF=" << TF << ']';
1043 } else if (const AddrSpaceCastSDNode *ASC =
1044 dyn_cast<AddrSpaceCastSDNode>(Val: this)) {
1045 OS << '['
1046 << ASC->getSrcAddressSpace()
1047 << " -> "
1048 << ASC->getDestAddressSpace()
1049 << ']';
1050 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(Val: this)) {
1051 OS << '<' << AA->getAlign().value() << '>';
1052 }
1053
1054 if (VerboseDAGDumping) {
1055 if (unsigned Order = getIROrder())
1056 OS << " [ORD=" << Order << ']';
1057
1058 if (getNodeId() != -1)
1059 OS << " [ID=" << getNodeId() << ']';
1060 if (!(isa<ConstantSDNode>(Val: this) || (isa<ConstantFPSDNode>(Val: this))))
1061 OS << " # D:" << isDivergent();
1062
1063 if (G && !G->GetDbgValues(SD: this).empty()) {
1064 OS << " [NoOfDbgValues=" << G->GetDbgValues(SD: this).size() << ']';
1065 for (SDDbgValue *Dbg : G->GetDbgValues(SD: this))
1066 if (!Dbg->isInvalidated())
1067 Dbg->print(OS);
1068 } else if (getHasDebugValue())
1069 OS << " [NoOfDbgValues>0]";
1070
1071 if (const auto *MD = G ? G->getPCSections(Node: this) : nullptr) {
1072 OS << " [pcsections ";
1073 MD->printAsOperand(OS, M: G->getMachineFunction().getFunction().getParent());
1074 OS << ']';
1075 }
1076
1077 if (MDNode *MMRA = G ? G->getMMRAMetadata(Node: this) : nullptr) {
1078 OS << " [mmra ";
1079 MMRA->printAsOperand(OS,
1080 M: G->getMachineFunction().getFunction().getParent());
1081 OS << ']';
1082 }
1083 }
1084}
1085
1086LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
1087 OS << " DbgVal(Order=" << getOrder() << ')';
1088 if (isInvalidated())
1089 OS << "(Invalidated)";
1090 if (isEmitted())
1091 OS << "(Emitted)";
1092 OS << "(";
1093 bool Comma = false;
1094 for (const SDDbgOperand &Op : getLocationOps()) {
1095 if (Comma)
1096 OS << ", ";
1097 switch (Op.getKind()) {
1098 case SDDbgOperand::SDNODE:
1099 if (Op.getSDNode())
1100 OS << "SDNODE=" << PrintNodeId(Node: *Op.getSDNode()) << ':' << Op.getResNo();
1101 else
1102 OS << "SDNODE";
1103 break;
1104 case SDDbgOperand::CONST:
1105 OS << "CONST";
1106 break;
1107 case SDDbgOperand::FRAMEIX:
1108 OS << "FRAMEIX=" << Op.getFrameIx();
1109 break;
1110 case SDDbgOperand::VREG:
1111 OS << "VREG=" << printReg(Reg: Op.getVReg());
1112 break;
1113 case SDDbgOperand::GLOBALADDR:
1114 OS << "GLOBALADDR=" << Op.getGlobal()->getName();
1115 break;
1116 }
1117 Comma = true;
1118 }
1119 OS << ")";
1120 if (isIndirect()) OS << "(Indirect)";
1121 if (isVariadic())
1122 OS << "(Variadic)";
1123 OS << ":\"" << Var->getName() << '"';
1124#ifndef NDEBUG
1125 if (Expr->getNumElements())
1126 Expr->dump();
1127#endif
1128}
1129
1130#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1131LLVM_DUMP_METHOD void SDDbgValue::dump() const {
1132 if (isInvalidated())
1133 return;
1134 print(dbgs());
1135 dbgs() << "\n";
1136}
1137#endif
1138
1139/// Return true if this node is so simple that we should just print it inline
1140/// if it appears as an operand.
1141static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1142 // Avoid lots of cluttering when inline printing nodes with associated
1143 // DbgValues in verbose mode.
1144 if (VerboseDAGDumping && G && !G->GetDbgValues(SD: &Node).empty())
1145 return false;
1146 if (Node.getOpcode() == ISD::EntryToken)
1147 return false;
1148 return Node.getNumOperands() == 0;
1149}
1150
1151#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1152static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1153 for (const SDValue &Op : N->op_values()) {
1154 if (shouldPrintInline(*Op.getNode(), G))
1155 continue;
1156 if (Op.getNode()->hasOneUse())
1157 DumpNodes(Op.getNode(), indent+2, G);
1158 }
1159
1160 dbgs().indent(indent);
1161 N->dump(G);
1162}
1163
1164LLVM_DUMP_METHOD void SelectionDAG::dump() const { dump(false); }
1165
1166LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1167 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1168
1169 auto dumpEachNode = [this](const SDNode &N) {
1170 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1171 (!shouldPrintInline(N, this) || N.use_empty()))
1172 DumpNodes(&N, 2, this);
1173 };
1174
1175 if (Sorted) {
1176 SmallVector<const SDNode *> SortedNodes;
1177 SortedNodes.reserve(AllNodes.size());
1178 getTopologicallyOrderedNodes(SortedNodes);
1179 for (const SDNode *N : SortedNodes)
1180 dumpEachNode(*N);
1181 } else {
1182 for (const SDNode &N : allnodes())
1183 dumpEachNode(N);
1184 }
1185
1186 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1187 dbgs() << "\n";
1188
1189 if (VerboseDAGDumping) {
1190 if (DbgBegin() != DbgEnd())
1191 dbgs() << "SDDbgValues:\n";
1192 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1193 Dbg->dump();
1194 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
1195 dbgs() << "Byval SDDbgValues:\n";
1196 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1197 Dbg->dump();
1198 }
1199 dbgs() << "\n";
1200}
1201#endif
1202
1203void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1204 OS << PrintNodeId(Node: *this) << ": ";
1205 print_types(OS, G);
1206 OS << " = " << getOperationName(G);
1207 print_details(OS, G);
1208}
1209
1210static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1211 const SDValue Value) {
1212 if (!Value.getNode()) {
1213 OS << "<null>";
1214 return false;
1215 }
1216
1217 if (shouldPrintInline(Node: *Value.getNode(), G)) {
1218 OS << Value->getOperationName(G) << ':';
1219 Value->print_types(OS, G);
1220 Value->print_details(OS, G);
1221 return true;
1222 }
1223
1224 OS << PrintNodeId(Node: *Value.getNode());
1225 if (unsigned RN = Value.getResNo())
1226 OS << ':' << RN;
1227 return false;
1228}
1229
1230#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1231using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
1232
1233static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1234 const SelectionDAG *G, VisitedSDNodeSet &once) {
1235 if (!once.insert(N).second) // If we've been here before, return now.
1236 return;
1237
1238 // Dump the current SDNode, but don't end the line yet.
1239 OS.indent(indent);
1240 N->printr(OS, G);
1241
1242 // Having printed this SDNode, walk the children:
1243 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1244 if (i) OS << ",";
1245 OS << " ";
1246
1247 const SDValue Op = N->getOperand(i);
1248 bool printedInline = printOperand(OS, G, Op);
1249 if (printedInline)
1250 once.insert(Op.getNode());
1251 }
1252
1253 OS << "\n";
1254
1255 // Dump children that have grandchildren on their own line(s).
1256 for (const SDValue &Op : N->op_values())
1257 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1258}
1259
1260LLVM_DUMP_METHOD void SDNode::dumpr() const {
1261 VisitedSDNodeSet once;
1262 DumpNodesr(dbgs(), this, 0, nullptr, once);
1263}
1264
1265LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1266 VisitedSDNodeSet once;
1267 DumpNodesr(dbgs(), this, 0, G, once);
1268}
1269#endif
1270
1271static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1272 const SelectionDAG *G, unsigned depth,
1273 unsigned indent) {
1274 if (depth == 0)
1275 return;
1276
1277 OS.indent(NumSpaces: indent);
1278
1279 N->print(OS, G);
1280
1281 for (const SDValue &Op : N->op_values()) {
1282 // Don't follow chain operands.
1283 if (Op.getValueType() == MVT::Other)
1284 continue;
1285 // Don't print children that were fully rendered inline.
1286 if (shouldPrintInline(Node: *Op.getNode(), G))
1287 continue;
1288 OS << '\n';
1289 printrWithDepthHelper(OS, N: Op.getNode(), G, depth: depth - 1, indent: indent + 2);
1290 }
1291}
1292
1293void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1294 unsigned depth) const {
1295 printrWithDepthHelper(OS, N: this, G, depth, indent: 0);
1296}
1297
1298void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1299 // Don't print impossibly deep things.
1300 printrWithDepth(OS, G, depth: 10);
1301}
1302
1303#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1304LLVM_DUMP_METHOD
1305void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1306 printrWithDepth(dbgs(), G, depth);
1307}
1308
1309LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1310 // Don't print impossibly deep things.
1311 dumprWithDepth(G, 10);
1312}
1313#endif
1314
1315void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1316 printr(OS, G);
1317 // Under VerboseDAGDumping divergence will be printed always.
1318 if (isDivergent() && !VerboseDAGDumping)
1319 OS << " # D:1";
1320 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1321 if (i) OS << ", "; else OS << " ";
1322 printOperand(OS, G, Value: getOperand(Num: i));
1323 }
1324 if (DebugLoc DL = getDebugLoc()) {
1325 OS << ", ";
1326 DL.print(OS);
1327 }
1328 if (PrintSDNodeAddrs)
1329 OS << " ; " << this;
1330}
1331