1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallPtrSet.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/CodeGen/ISDOpcodes.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/MachineConstantPool.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/SelectionDAG.h"
23#include "llvm/CodeGen/SelectionDAGNodes.h"
24#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25#include "llvm/CodeGen/TargetInstrInfo.h"
26#include "llvm/CodeGen/TargetLowering.h"
27#include "llvm/CodeGen/TargetRegisterInfo.h"
28#include "llvm/CodeGen/TargetSubtargetInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/CodeGenTypes/MachineValueType.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/ModuleSlotTracker.h"
39#include "llvm/IR/Value.h"
40#include "llvm/Support/Casting.h"
41#include "llvm/Support/CommandLine.h"
42#include "llvm/Support/Compiler.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/Printable.h"
46#include "llvm/Support/raw_ostream.h"
47#include "llvm/Target/TargetMachine.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58static cl::opt<bool>
59 PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden,
60 cl::desc("Print addresses of SDNodes when dumping"));
61
62std::string SDNode::getOperationName(const SelectionDAG *G) const {
63 switch (getOpcode()) {
64 default:
65 if (getOpcode() < ISD::BUILTIN_OP_END)
66 return "<<Unknown DAG Node>>";
67 if (isMachineOpcode()) {
68 if (G)
69 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
70 if (getMachineOpcode() < TII->getNumOpcodes())
71 return std::string(TII->getName(Opcode: getMachineOpcode()));
72 return "<<Unknown Machine Node #" + utostr(X: getOpcode()) + ">>";
73 }
74 if (G) {
75 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
76 if (const char *Name = TSI.getTargetNodeName(Opcode: getOpcode()))
77 return Name;
78 const TargetLowering &TLI = G->getTargetLoweringInfo();
79 const char *Name = TLI.getTargetNodeName(Opcode: getOpcode());
80 if (Name) return Name;
81 return "<<Unknown Target Node #" + utostr(X: getOpcode()) + ">>";
82 }
83 return "<<Unknown Node #" + utostr(X: getOpcode()) + ">>";
84
85 // clang-format off
86#ifndef NDEBUG
87 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
88#endif
89 case ISD::PREFETCH: return "Prefetch";
90 case ISD::MEMBARRIER: return "MemBarrier";
91 case ISD::ATOMIC_FENCE: return "AtomicFence";
92 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
93 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
94 case ISD::ATOMIC_SWAP: return "AtomicSwap";
95 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
96 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
97 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
98 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
99 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
100 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
101 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
102 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
103 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
104 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
105 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
106 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
107 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
108 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
109 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
110 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
111 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
112 case ISD::ATOMIC_LOAD_UINC_WRAP:
113 return "AtomicLoadUIncWrap";
114 case ISD::ATOMIC_LOAD_UDEC_WRAP:
115 return "AtomicLoadUDecWrap";
116 case ISD::ATOMIC_LOAD_USUB_COND:
117 return "AtomicLoadUSubCond";
118 case ISD::ATOMIC_LOAD_USUB_SAT:
119 return "AtomicLoadUSubSat";
120 case ISD::ATOMIC_LOAD: return "AtomicLoad";
121 case ISD::ATOMIC_STORE: return "AtomicStore";
122 case ISD::PCMARKER: return "PCMarker";
123 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
124 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
125 case ISD::SRCVALUE: return "SrcValue";
126 case ISD::MDNODE_SDNODE: return "MDNode";
127 case ISD::EntryToken: return "EntryToken";
128 case ISD::TokenFactor: return "TokenFactor";
129 case ISD::AssertSext: return "AssertSext";
130 case ISD::AssertZext: return "AssertZext";
131 case ISD::AssertNoFPClass: return "AssertNoFPClass";
132 case ISD::AssertAlign: return "AssertAlign";
133
134 case ISD::BasicBlock: return "BasicBlock";
135 case ISD::VALUETYPE: return "ValueType";
136 case ISD::Register: return "Register";
137 case ISD::RegisterMask: return "RegisterMask";
138 case ISD::Constant:
139 if (cast<ConstantSDNode>(Val: this)->isOpaque())
140 return "OpaqueConstant";
141 return "Constant";
142 case ISD::ConstantFP: return "ConstantFP";
143 case ISD::GlobalAddress: return "GlobalAddress";
144 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
145 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
146 case ISD::FrameIndex: return "FrameIndex";
147 case ISD::JumpTable: return "JumpTable";
148 case ISD::JUMP_TABLE_DEBUG_INFO:
149 return "JUMP_TABLE_DEBUG_INFO";
150 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
151 case ISD::RETURNADDR: return "RETURNADDR";
152 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
153 case ISD::FRAMEADDR: return "FRAMEADDR";
154 case ISD::SPONENTRY: return "SPONENTRY";
155 case ISD::STACKADDRESS: return "STACKADDRESS";
156 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
157 case ISD::READ_REGISTER: return "READ_REGISTER";
158 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
159 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
160 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
161 case ISD::EH_RETURN: return "EH_RETURN";
162 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
163 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
164 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
165 case ISD::ConstantPool: return "ConstantPool";
166 case ISD::TargetIndex: return "TargetIndex";
167 case ISD::ExternalSymbol: return "ExternalSymbol";
168 case ISD::BlockAddress: return "BlockAddress";
169 case ISD::INTRINSIC_WO_CHAIN:
170 case ISD::INTRINSIC_VOID:
171 case ISD::INTRINSIC_W_CHAIN: {
172 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
173 unsigned IID = getOperand(Num: OpNo)->getAsZExtVal();
174 if (IID < Intrinsic::num_intrinsics)
175 return Intrinsic::getBaseName(id: (Intrinsic::ID)IID).str();
176 if (!G)
177 return "Unknown intrinsic";
178 llvm_unreachable("Invalid intrinsic ID");
179 }
180
181 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
182 case ISD::TargetConstant:
183 if (cast<ConstantSDNode>(Val: this)->isOpaque())
184 return "OpaqueTargetConstant";
185 return "TargetConstant";
186
187 case ISD::TargetConstantFP: return "TargetConstantFP";
188 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
189 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
190 case ISD::TargetFrameIndex: return "TargetFrameIndex";
191 case ISD::TargetJumpTable: return "TargetJumpTable";
192 case ISD::TargetConstantPool: return "TargetConstantPool";
193 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
194 case ISD::MCSymbol: return "MCSymbol";
195 case ISD::TargetBlockAddress: return "TargetBlockAddress";
196
197 case ISD::CopyToReg: return "CopyToReg";
198 case ISD::CopyFromReg: return "CopyFromReg";
199 case ISD::UNDEF: return "undef";
200 case ISD::POISON: return "poison";
201 case ISD::VSCALE: return "vscale";
202 case ISD::MERGE_VALUES: return "merge_values";
203 case ISD::INLINEASM: return "inlineasm";
204 case ISD::INLINEASM_BR: return "inlineasm_br";
205 case ISD::EH_LABEL: return "eh_label";
206 case ISD::ANNOTATION_LABEL: return "annotation_label";
207 case ISD::HANDLENODE: return "handlenode";
208
209 // Unary operators
210 case ISD::FABS: return "fabs";
211 case ISD::FMINNUM: return "fminnum";
212 case ISD::STRICT_FMINNUM: return "strict_fminnum";
213 case ISD::FMAXNUM: return "fmaxnum";
214 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
215 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
216 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
217 case ISD::FMINIMUM: return "fminimum";
218 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
219 case ISD::FMAXIMUM: return "fmaximum";
220 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
221 case ISD::FMINIMUMNUM: return "fminimumnum";
222 case ISD::FMAXIMUMNUM: return "fmaximumnum";
223 case ISD::FNEG: return "fneg";
224 case ISD::FSQRT: return "fsqrt";
225 case ISD::STRICT_FSQRT: return "strict_fsqrt";
226 case ISD::FCBRT: return "fcbrt";
227 case ISD::FSIN: return "fsin";
228 case ISD::STRICT_FSIN: return "strict_fsin";
229 case ISD::FCOS: return "fcos";
230 case ISD::STRICT_FCOS: return "strict_fcos";
231 case ISD::FSINCOS: return "fsincos";
232 case ISD::FSINCOSPI: return "fsincospi";
233 case ISD::FMODF: return "fmodf";
234 case ISD::FTAN: return "ftan";
235 case ISD::STRICT_FTAN: return "strict_ftan";
236 case ISD::FASIN: return "fasin";
237 case ISD::STRICT_FASIN: return "strict_fasin";
238 case ISD::FACOS: return "facos";
239 case ISD::STRICT_FACOS: return "strict_facos";
240 case ISD::FATAN: return "fatan";
241 case ISD::STRICT_FATAN: return "strict_fatan";
242 case ISD::FATAN2: return "fatan2";
243 case ISD::STRICT_FATAN2: return "strict_fatan2";
244 case ISD::FSINH: return "fsinh";
245 case ISD::STRICT_FSINH: return "strict_fsinh";
246 case ISD::FCOSH: return "fcosh";
247 case ISD::STRICT_FCOSH: return "strict_fcosh";
248 case ISD::FTANH: return "ftanh";
249 case ISD::STRICT_FTANH: return "strict_ftanh";
250 case ISD::FTRUNC: return "ftrunc";
251 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
252 case ISD::FFLOOR: return "ffloor";
253 case ISD::STRICT_FFLOOR: return "strict_ffloor";
254 case ISD::FCEIL: return "fceil";
255 case ISD::STRICT_FCEIL: return "strict_fceil";
256 case ISD::FRINT: return "frint";
257 case ISD::STRICT_FRINT: return "strict_frint";
258 case ISD::FNEARBYINT: return "fnearbyint";
259 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
260 case ISD::FROUND: return "fround";
261 case ISD::STRICT_FROUND: return "strict_fround";
262 case ISD::FROUNDEVEN: return "froundeven";
263 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
264 case ISD::FEXP: return "fexp";
265 case ISD::STRICT_FEXP: return "strict_fexp";
266 case ISD::FEXP2: return "fexp2";
267 case ISD::STRICT_FEXP2: return "strict_fexp2";
268 case ISD::FEXP10: return "fexp10";
269 case ISD::FLOG: return "flog";
270 case ISD::STRICT_FLOG: return "strict_flog";
271 case ISD::FLOG2: return "flog2";
272 case ISD::STRICT_FLOG2: return "strict_flog2";
273 case ISD::FLOG10: return "flog10";
274 case ISD::STRICT_FLOG10: return "strict_flog10";
275
276 // Binary operators
277 case ISD::ADD: return "add";
278 case ISD::PTRADD: return "ptradd";
279 case ISD::SUB: return "sub";
280 case ISD::MUL: return "mul";
281 case ISD::MULHU: return "mulhu";
282 case ISD::MULHS: return "mulhs";
283 case ISD::AVGFLOORU: return "avgflooru";
284 case ISD::AVGFLOORS: return "avgfloors";
285 case ISD::AVGCEILU: return "avgceilu";
286 case ISD::AVGCEILS: return "avgceils";
287 case ISD::ABDS: return "abds";
288 case ISD::ABDU: return "abdu";
289 case ISD::SDIV: return "sdiv";
290 case ISD::UDIV: return "udiv";
291 case ISD::SREM: return "srem";
292 case ISD::UREM: return "urem";
293 case ISD::SMUL_LOHI: return "smul_lohi";
294 case ISD::UMUL_LOHI: return "umul_lohi";
295 case ISD::SDIVREM: return "sdivrem";
296 case ISD::UDIVREM: return "udivrem";
297 case ISD::AND: return "and";
298 case ISD::OR: return "or";
299 case ISD::XOR: return "xor";
300 case ISD::SHL: return "shl";
301 case ISD::SRA: return "sra";
302 case ISD::SRL: return "srl";
303 case ISD::ROTL: return "rotl";
304 case ISD::ROTR: return "rotr";
305 case ISD::FSHL: return "fshl";
306 case ISD::FSHR: return "fshr";
307 case ISD::CLMUL: return "clmul";
308 case ISD::CLMULR: return "clmulr";
309 case ISD::CLMULH: return "clmulh";
310 case ISD::FADD: return "fadd";
311 case ISD::STRICT_FADD: return "strict_fadd";
312 case ISD::FSUB: return "fsub";
313 case ISD::STRICT_FSUB: return "strict_fsub";
314 case ISD::FMUL: return "fmul";
315 case ISD::STRICT_FMUL: return "strict_fmul";
316 case ISD::FDIV: return "fdiv";
317 case ISD::STRICT_FDIV: return "strict_fdiv";
318 case ISD::FMA: return "fma";
319 case ISD::STRICT_FMA: return "strict_fma";
320 case ISD::FMAD: return "fmad";
321 case ISD::FMULADD: return "fmuladd";
322 case ISD::FREM: return "frem";
323 case ISD::STRICT_FREM: return "strict_frem";
324 case ISD::FCOPYSIGN: return "fcopysign";
325 case ISD::FGETSIGN: return "fgetsign";
326 case ISD::FCANONICALIZE: return "fcanonicalize";
327 case ISD::IS_FPCLASS: return "is_fpclass";
328 case ISD::FPOW: return "fpow";
329 case ISD::STRICT_FPOW: return "strict_fpow";
330 case ISD::SMIN: return "smin";
331 case ISD::SMAX: return "smax";
332 case ISD::UMIN: return "umin";
333 case ISD::UMAX: return "umax";
334 case ISD::SCMP: return "scmp";
335 case ISD::UCMP: return "ucmp";
336
337 case ISD::FLDEXP: return "fldexp";
338 case ISD::STRICT_FLDEXP: return "strict_fldexp";
339 case ISD::FFREXP: return "ffrexp";
340 case ISD::FPOWI: return "fpowi";
341 case ISD::STRICT_FPOWI: return "strict_fpowi";
342 case ISD::SETCC: return "setcc";
343 case ISD::SETCCCARRY: return "setcccarry";
344 case ISD::STRICT_FSETCC: return "strict_fsetcc";
345 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
346 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
347 case ISD::SELECT: return "select";
348 case ISD::VSELECT: return "vselect";
349 case ISD::SELECT_CC: return "select_cc";
350 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
351 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
352 case ISD::CONCAT_VECTORS: return "concat_vectors";
353 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
354 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
355 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
356 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
357 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
358 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
359 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
360 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
361 case ISD::SPLAT_VECTOR: return "splat_vector";
362 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
363 case ISD::VECTOR_REVERSE: return "vector_reverse";
364 case ISD::STEP_VECTOR: return "step_vector";
365 case ISD::CARRY_FALSE: return "carry_false";
366 case ISD::ADDC: return "addc";
367 case ISD::ADDE: return "adde";
368 case ISD::UADDO_CARRY: return "uaddo_carry";
369 case ISD::SADDO_CARRY: return "saddo_carry";
370 case ISD::SADDO: return "saddo";
371 case ISD::UADDO: return "uaddo";
372 case ISD::SSUBO: return "ssubo";
373 case ISD::USUBO: return "usubo";
374 case ISD::SMULO: return "smulo";
375 case ISD::UMULO: return "umulo";
376 case ISD::SUBC: return "subc";
377 case ISD::SUBE: return "sube";
378 case ISD::USUBO_CARRY: return "usubo_carry";
379 case ISD::SSUBO_CARRY: return "ssubo_carry";
380 case ISD::SHL_PARTS: return "shl_parts";
381 case ISD::SRA_PARTS: return "sra_parts";
382 case ISD::SRL_PARTS: return "srl_parts";
383
384 case ISD::SADDSAT: return "saddsat";
385 case ISD::UADDSAT: return "uaddsat";
386 case ISD::SSUBSAT: return "ssubsat";
387 case ISD::USUBSAT: return "usubsat";
388 case ISD::SSHLSAT: return "sshlsat";
389 case ISD::USHLSAT: return "ushlsat";
390
391 case ISD::SMULFIX: return "smulfix";
392 case ISD::SMULFIXSAT: return "smulfixsat";
393 case ISD::UMULFIX: return "umulfix";
394 case ISD::UMULFIXSAT: return "umulfixsat";
395
396 case ISD::SDIVFIX: return "sdivfix";
397 case ISD::SDIVFIXSAT: return "sdivfixsat";
398 case ISD::UDIVFIX: return "udivfix";
399 case ISD::UDIVFIXSAT: return "udivfixsat";
400
401 // Conversion operators.
402 case ISD::SIGN_EXTEND: return "sign_extend";
403 case ISD::ZERO_EXTEND: return "zero_extend";
404 case ISD::ANY_EXTEND: return "any_extend";
405 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
406 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
407 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
408 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
409 case ISD::TRUNCATE: return "truncate";
410 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
411 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
412 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
413 case ISD::FP_ROUND: return "fp_round";
414 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
415 case ISD::FP_EXTEND: return "fp_extend";
416 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
417
418 case ISD::SINT_TO_FP: return "sint_to_fp";
419 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
420 case ISD::UINT_TO_FP: return "uint_to_fp";
421 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
422 case ISD::FP_TO_SINT: return "fp_to_sint";
423 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
424 case ISD::FP_TO_UINT: return "fp_to_uint";
425 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
426 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
427 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
428 case ISD::BITCAST: return "bitcast";
429 case ISD::ADDRSPACECAST: return "addrspacecast";
430 case ISD::FP16_TO_FP: return "fp16_to_fp";
431 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
432 case ISD::FP_TO_FP16: return "fp_to_fp16";
433 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
434 case ISD::BF16_TO_FP: return "bf16_to_fp";
435 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
436 case ISD::FP_TO_BF16: return "fp_to_bf16";
437 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
438 case ISD::LROUND: return "lround";
439 case ISD::STRICT_LROUND: return "strict_lround";
440 case ISD::LLROUND: return "llround";
441 case ISD::STRICT_LLROUND: return "strict_llround";
442 case ISD::LRINT: return "lrint";
443 case ISD::STRICT_LRINT: return "strict_lrint";
444 case ISD::LLRINT: return "llrint";
445 case ISD::STRICT_LLRINT: return "strict_llrint";
446
447 // Control flow instructions
448 case ISD::BR: return "br";
449 case ISD::BRIND: return "brind";
450 case ISD::BR_JT: return "br_jt";
451 case ISD::BRCOND: return "brcond";
452 case ISD::BR_CC: return "br_cc";
453 case ISD::CALLSEQ_START: return "callseq_start";
454 case ISD::CALLSEQ_END: return "callseq_end";
455
456 // EH instructions
457 case ISD::CATCHRET: return "catchret";
458 case ISD::CLEANUPRET: return "cleanupret";
459
460 // Other operators
461 case ISD::LOAD: return "load";
462 case ISD::STORE: return "store";
463 case ISD::MLOAD: return "masked_load";
464 case ISD::MSTORE: return "masked_store";
465 case ISD::MGATHER: return "masked_gather";
466 case ISD::MSCATTER: return "masked_scatter";
467 case ISD::VECTOR_COMPRESS: return "vector_compress";
468 case ISD::VAARG: return "vaarg";
469 case ISD::VACOPY: return "vacopy";
470 case ISD::VAEND: return "vaend";
471 case ISD::VASTART: return "vastart";
472 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
473 case ISD::EXTRACT_ELEMENT: return "extract_element";
474 case ISD::BUILD_PAIR: return "build_pair";
475 case ISD::STACKSAVE: return "stacksave";
476 case ISD::STACKRESTORE: return "stackrestore";
477 case ISD::TRAP: return "trap";
478 case ISD::DEBUGTRAP: return "debugtrap";
479 case ISD::UBSANTRAP: return "ubsantrap";
480 case ISD::LIFETIME_START: return "lifetime.start";
481 case ISD::LIFETIME_END: return "lifetime.end";
482 case ISD::FAKE_USE:
483 return "fake_use";
484 case ISD::RELOC_NONE:
485 return "reloc_none";
486 case ISD::PSEUDO_PROBE:
487 return "pseudoprobe";
488 case ISD::GC_TRANSITION_START: return "gc_transition.start";
489 case ISD::GC_TRANSITION_END: return "gc_transition.end";
490 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
491 case ISD::FREEZE: return "freeze";
492 case ISD::PREALLOCATED_SETUP:
493 return "call_setup";
494 case ISD::PREALLOCATED_ARG:
495 return "call_alloc";
496
497 // Floating point environment manipulation
498 case ISD::GET_ROUNDING: return "get_rounding";
499 case ISD::SET_ROUNDING: return "set_rounding";
500 case ISD::GET_FPENV: return "get_fpenv";
501 case ISD::SET_FPENV: return "set_fpenv";
502 case ISD::RESET_FPENV: return "reset_fpenv";
503 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
504 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
505 case ISD::GET_FPMODE: return "get_fpmode";
506 case ISD::SET_FPMODE: return "set_fpmode";
507 case ISD::RESET_FPMODE: return "reset_fpmode";
508
509 // Convergence control instructions
510 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
511 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
512 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
513 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
514
515 // Bit manipulation
516 case ISD::ABS: return "abs";
517 case ISD::BITREVERSE: return "bitreverse";
518 case ISD::BSWAP: return "bswap";
519 case ISD::CTPOP: return "ctpop";
520 case ISD::CTTZ: return "cttz";
521 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
522 case ISD::CTLZ: return "ctlz";
523 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
524 case ISD::CTLS: return "ctls";
525 case ISD::PARITY: return "parity";
526
527 // Trampolines
528 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
529 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
530
531 // clang-format on
532
533 case ISD::CONDCODE:
534 switch (cast<CondCodeSDNode>(Val: this)->get()) {
535 default: llvm_unreachable("Unknown setcc condition!");
536 case ISD::SETOEQ: return "setoeq";
537 case ISD::SETOGT: return "setogt";
538 case ISD::SETOGE: return "setoge";
539 case ISD::SETOLT: return "setolt";
540 case ISD::SETOLE: return "setole";
541 case ISD::SETONE: return "setone";
542
543 case ISD::SETO: return "seto";
544 case ISD::SETUO: return "setuo";
545 case ISD::SETUEQ: return "setueq";
546 case ISD::SETUGT: return "setugt";
547 case ISD::SETUGE: return "setuge";
548 case ISD::SETULT: return "setult";
549 case ISD::SETULE: return "setule";
550 case ISD::SETUNE: return "setune";
551
552 case ISD::SETEQ: return "seteq";
553 case ISD::SETGT: return "setgt";
554 case ISD::SETGE: return "setge";
555 case ISD::SETLT: return "setlt";
556 case ISD::SETLE: return "setle";
557 case ISD::SETNE: return "setne";
558
559 case ISD::SETTRUE: return "settrue";
560 case ISD::SETTRUE2: return "settrue2";
561 case ISD::SETFALSE: return "setfalse";
562 case ISD::SETFALSE2: return "setfalse2";
563 }
564 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
565 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
566 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
567 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
568 case ISD::VECREDUCE_ADD: return "vecreduce_add";
569 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
570 case ISD::VECREDUCE_AND: return "vecreduce_and";
571 case ISD::VECREDUCE_OR: return "vecreduce_or";
572 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
573 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
574 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
575 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
576 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
577 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
578 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
579 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
580 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
581 case ISD::STACKMAP:
582 return "stackmap";
583 case ISD::PATCHPOINT:
584 return "patchpoint";
585 case ISD::CLEAR_CACHE:
586 return "clear_cache";
587
588 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
589 return "histogram";
590
591 case ISD::VECTOR_FIND_LAST_ACTIVE:
592 return "find_last_active";
593
594 case ISD::GET_ACTIVE_LANE_MASK:
595 return "get_active_lane_mask";
596
597 case ISD::PARTIAL_REDUCE_UMLA:
598 return "partial_reduce_umla";
599 case ISD::PARTIAL_REDUCE_SMLA:
600 return "partial_reduce_smla";
601 case ISD::PARTIAL_REDUCE_SUMLA:
602 return "partial_reduce_sumla";
603 case ISD::PARTIAL_REDUCE_FMLA:
604 return "partial_reduce_fmla";
605 case ISD::LOOP_DEPENDENCE_WAR_MASK:
606 return "loop_dep_war";
607 case ISD::LOOP_DEPENDENCE_RAW_MASK:
608 return "loop_dep_raw";
609
610 // Vector Predication
611#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
612 case ISD::SDID: \
613 return #NAME;
614#include "llvm/IR/VPIntrinsics.def"
615 }
616}
617
618const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
619 switch (AM) {
620 default: return "";
621 case ISD::PRE_INC: return "<pre-inc>";
622 case ISD::PRE_DEC: return "<pre-dec>";
623 case ISD::POST_INC: return "<post-inc>";
624 case ISD::POST_DEC: return "<post-dec>";
625 }
626}
627
628static Printable PrintNodeId(const SDNode &Node) {
629 return Printable([&Node](raw_ostream &OS) {
630#ifndef NDEBUG
631 static const raw_ostream::Colors Color[] = {
632 raw_ostream::BLACK, raw_ostream::RED, raw_ostream::GREEN,
633 raw_ostream::YELLOW, raw_ostream::BLUE, raw_ostream::MAGENTA,
634 raw_ostream::CYAN,
635 };
636 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
637 OS << 't' << Node.PersistentId;
638 OS.resetColor();
639#else
640 OS << (const void*)&Node;
641#endif
642 });
643}
644
645// Print the MMO with more information from the SelectionDAG.
646static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
647 const MachineFunction *MF, const Module *M,
648 const MachineFrameInfo *MFI,
649 const TargetInstrInfo *TII, LLVMContext &Ctx) {
650 ModuleSlotTracker MST(M);
651 if (MF)
652 MST.incorporateFunction(F: MF->getFunction());
653 SmallVector<StringRef, 0> SSNs;
654 MMO.print(OS, MST, SSNs, Context: Ctx, MFI, TII);
655}
656
657static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
658 const SelectionDAG *G) {
659 if (G) {
660 const MachineFunction *MF = &G->getMachineFunction();
661 return printMemOperand(OS, MMO, MF, M: MF->getFunction().getParent(),
662 MFI: &MF->getFrameInfo(),
663 TII: G->getSubtarget().getInstrInfo(), Ctx&: *G->getContext());
664 }
665
666 LLVMContext Ctx;
667 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
668 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
669}
670
671#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
672LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
673
674LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
675 print(dbgs(), G);
676 dbgs() << '\n';
677}
678#endif
679
680void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
681 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
682 if (i) OS << ",";
683 if (getValueType(ResNo: i) == MVT::Other)
684 OS << "ch";
685 else
686 OS << getValueType(ResNo: i).getEVTString();
687 }
688}
689
690void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
691 if (getFlags().hasNoUnsignedWrap())
692 OS << " nuw";
693
694 if (getFlags().hasNoSignedWrap())
695 OS << " nsw";
696
697 if (getFlags().hasExact())
698 OS << " exact";
699
700 if (getFlags().hasDisjoint())
701 OS << " disjoint";
702
703 if (getFlags().hasSameSign())
704 OS << " samesign";
705
706 if (getFlags().hasInBounds())
707 OS << " inbounds";
708
709 if (getFlags().hasNonNeg())
710 OS << " nneg";
711
712 if (getFlags().hasNoNaNs())
713 OS << " nnan";
714
715 if (getFlags().hasNoInfs())
716 OS << " ninf";
717
718 if (getFlags().hasNoSignedZeros())
719 OS << " nsz";
720
721 if (getFlags().hasAllowReciprocal())
722 OS << " arcp";
723
724 if (getFlags().hasAllowContract())
725 OS << " contract";
726
727 if (getFlags().hasApproximateFuncs())
728 OS << " afn";
729
730 if (getFlags().hasAllowReassociation())
731 OS << " reassoc";
732
733 if (getFlags().hasNoFPExcept())
734 OS << " nofpexcept";
735
736 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(Val: this)) {
737 if (!MN->memoperands_empty()) {
738 OS << "<";
739 OS << "Mem:";
740 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
741 e = MN->memoperands_end(); i != e; ++i) {
742 printMemOperand(OS, MMO: **i, G);
743 if (std::next(x: i) != e)
744 OS << " ";
745 }
746 OS << ">";
747 }
748 } else if (const ShuffleVectorSDNode *SVN =
749 dyn_cast<ShuffleVectorSDNode>(Val: this)) {
750 OS << "<";
751 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
752 int Idx = SVN->getMaskElt(Idx: i);
753 if (i) OS << ",";
754 if (Idx < 0)
755 OS << "u";
756 else
757 OS << Idx;
758 }
759 OS << ">";
760 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(Val: this)) {
761 OS << '<' << CSDN->getAPIntValue() << '>';
762 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(Val: this)) {
763 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
764 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
765 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
766 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
767 else {
768 OS << "<APFloat(";
769 CSDN->getValueAPF().bitcastToAPInt().print(OS, isSigned: false);
770 OS << ")>";
771 }
772 } else if (const GlobalAddressSDNode *GADN =
773 dyn_cast<GlobalAddressSDNode>(Val: this)) {
774 int64_t offset = GADN->getOffset();
775 OS << '<';
776 GADN->getGlobal()->printAsOperand(O&: OS);
777 OS << '>';
778 if (offset > 0)
779 OS << " + " << offset;
780 else
781 OS << " " << offset;
782 if (unsigned int TF = GADN->getTargetFlags())
783 OS << " [TF=" << TF << ']';
784 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(Val: this)) {
785 OS << "<" << FIDN->getIndex() << ">";
786 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(Val: this)) {
787 OS << "<" << JTDN->getIndex() << ">";
788 if (unsigned int TF = JTDN->getTargetFlags())
789 OS << " [TF=" << TF << ']';
790 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Val: this)){
791 int offset = CP->getOffset();
792 if (CP->isMachineConstantPoolEntry())
793 OS << "<" << *CP->getMachineCPVal() << ">";
794 else
795 OS << "<" << *CP->getConstVal() << ">";
796 if (offset > 0)
797 OS << " + " << offset;
798 else
799 OS << " " << offset;
800 if (unsigned int TF = CP->getTargetFlags())
801 OS << " [TF=" << TF << ']';
802 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(Val: this)) {
803 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
804 if (unsigned TF = TI->getTargetFlags())
805 OS << " [TF=" << TF << ']';
806 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(Val: this)) {
807 OS << "<";
808 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
809 if (LBB)
810 OS << LBB->getName() << " ";
811 OS << (const void*)BBDN->getBasicBlock() << ">";
812 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(Val: this)) {
813 OS << ' ' << printReg(Reg: R->getReg(),
814 TRI: G ? G->getSubtarget().getRegisterInfo() : nullptr);
815 } else if (const ExternalSymbolSDNode *ES =
816 dyn_cast<ExternalSymbolSDNode>(Val: this)) {
817 OS << "'" << ES->getSymbol() << "'";
818 if (unsigned int TF = ES->getTargetFlags())
819 OS << " [TF=" << TF << ']';
820 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(Val: this)) {
821 if (M->getValue())
822 OS << "<" << M->getValue() << ">";
823 else
824 OS << "<null>";
825 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(Val: this)) {
826 if (MD->getMD())
827 OS << "<" << MD->getMD() << ">";
828 else
829 OS << "<null>";
830 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(Val: this)) {
831 OS << ":" << N->getVT();
832 }
833 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(Val: this)) {
834 OS << "<";
835
836 printMemOperand(OS, MMO: *LD->getMemOperand(), G);
837
838 bool doExt = true;
839 switch (LD->getExtensionType()) {
840 default: doExt = false; break;
841 case ISD::EXTLOAD: OS << ", anyext"; break;
842 case ISD::SEXTLOAD: OS << ", sext"; break;
843 case ISD::ZEXTLOAD: OS << ", zext"; break;
844 }
845 if (doExt)
846 OS << " from " << LD->getMemoryVT();
847
848 const char *AM = getIndexedModeName(AM: LD->getAddressingMode());
849 if (*AM)
850 OS << ", " << AM;
851
852 OS << ">";
853 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(Val: this)) {
854 OS << "<";
855 printMemOperand(OS, MMO: *ST->getMemOperand(), G);
856
857 if (ST->isTruncatingStore())
858 OS << ", trunc to " << ST->getMemoryVT();
859
860 const char *AM = getIndexedModeName(AM: ST->getAddressingMode());
861 if (*AM)
862 OS << ", " << AM;
863
864 OS << ">";
865 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(Val: this)) {
866 OS << "<";
867
868 printMemOperand(OS, MMO: *MLd->getMemOperand(), G);
869
870 bool doExt = true;
871 switch (MLd->getExtensionType()) {
872 default: doExt = false; break;
873 case ISD::EXTLOAD: OS << ", anyext"; break;
874 case ISD::SEXTLOAD: OS << ", sext"; break;
875 case ISD::ZEXTLOAD: OS << ", zext"; break;
876 }
877 if (doExt)
878 OS << " from " << MLd->getMemoryVT();
879
880 const char *AM = getIndexedModeName(AM: MLd->getAddressingMode());
881 if (*AM)
882 OS << ", " << AM;
883
884 if (MLd->isExpandingLoad())
885 OS << ", expanding";
886
887 OS << ">";
888 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(Val: this)) {
889 OS << "<";
890 printMemOperand(OS, MMO: *MSt->getMemOperand(), G);
891
892 if (MSt->isTruncatingStore())
893 OS << ", trunc to " << MSt->getMemoryVT();
894
895 const char *AM = getIndexedModeName(AM: MSt->getAddressingMode());
896 if (*AM)
897 OS << ", " << AM;
898
899 if (MSt->isCompressingStore())
900 OS << ", compressing";
901
902 OS << ">";
903 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(Val: this)) {
904 OS << "<";
905 printMemOperand(OS, MMO: *MGather->getMemOperand(), G);
906
907 bool doExt = true;
908 switch (MGather->getExtensionType()) {
909 default: doExt = false; break;
910 case ISD::EXTLOAD: OS << ", anyext"; break;
911 case ISD::SEXTLOAD: OS << ", sext"; break;
912 case ISD::ZEXTLOAD: OS << ", zext"; break;
913 }
914 if (doExt)
915 OS << " from " << MGather->getMemoryVT();
916
917 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
918 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
919 OS << ", " << Signed << " " << Scaled << " offset";
920
921 OS << ">";
922 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(Val: this)) {
923 OS << "<";
924 printMemOperand(OS, MMO: *MScatter->getMemOperand(), G);
925
926 if (MScatter->isTruncatingStore())
927 OS << ", trunc to " << MScatter->getMemoryVT();
928
929 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
930 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
931 OS << ", " << Signed << " " << Scaled << " offset";
932
933 OS << ">";
934 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(Val: this)) {
935 OS << "<";
936 interleaveComma(c: M->memoperands(), os&: OS, each_fn: [&](const MachineMemOperand *MMO) {
937 printMemOperand(OS, MMO: *MMO, G);
938 });
939 if (auto *A = dyn_cast<AtomicSDNode>(Val: M))
940 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
941 bool doExt = true;
942 switch (A->getExtensionType()) {
943 default: doExt = false; break;
944 case ISD::EXTLOAD: OS << ", anyext"; break;
945 case ISD::SEXTLOAD: OS << ", sext"; break;
946 case ISD::ZEXTLOAD: OS << ", zext"; break;
947 }
948 if (doExt)
949 OS << " from " << A->getMemoryVT();
950 }
951 OS << ">";
952 } else if (const BlockAddressSDNode *BA =
953 dyn_cast<BlockAddressSDNode>(Val: this)) {
954 int64_t offset = BA->getOffset();
955 OS << "<";
956 BA->getBlockAddress()->getFunction()->printAsOperand(O&: OS, PrintType: false);
957 OS << ", ";
958 BA->getBlockAddress()->getBasicBlock()->printAsOperand(O&: OS, PrintType: false);
959 OS << ">";
960 if (offset > 0)
961 OS << " + " << offset;
962 else
963 OS << " " << offset;
964 if (unsigned int TF = BA->getTargetFlags())
965 OS << " [TF=" << TF << ']';
966 } else if (const AddrSpaceCastSDNode *ASC =
967 dyn_cast<AddrSpaceCastSDNode>(Val: this)) {
968 OS << '['
969 << ASC->getSrcAddressSpace()
970 << " -> "
971 << ASC->getDestAddressSpace()
972 << ']';
973 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(Val: this)) {
974 OS << '<' << AA->getAlign().value() << '>';
975 }
976
977 if (VerboseDAGDumping) {
978 if (unsigned Order = getIROrder())
979 OS << " [ORD=" << Order << ']';
980
981 if (getNodeId() != -1)
982 OS << " [ID=" << getNodeId() << ']';
983 if (!(isa<ConstantSDNode>(Val: this) || (isa<ConstantFPSDNode>(Val: this))))
984 OS << " # D:" << isDivergent();
985
986 if (G && !G->GetDbgValues(SD: this).empty()) {
987 OS << " [NoOfDbgValues=" << G->GetDbgValues(SD: this).size() << ']';
988 for (SDDbgValue *Dbg : G->GetDbgValues(SD: this))
989 if (!Dbg->isInvalidated())
990 Dbg->print(OS);
991 } else if (getHasDebugValue())
992 OS << " [NoOfDbgValues>0]";
993
994 if (const auto *MD = G ? G->getPCSections(Node: this) : nullptr) {
995 OS << " [pcsections ";
996 MD->printAsOperand(OS, M: G->getMachineFunction().getFunction().getParent());
997 OS << ']';
998 }
999
1000 if (MDNode *MMRA = G ? G->getMMRAMetadata(Node: this) : nullptr) {
1001 OS << " [mmra ";
1002 MMRA->printAsOperand(OS,
1003 M: G->getMachineFunction().getFunction().getParent());
1004 OS << ']';
1005 }
1006 }
1007}
1008
1009LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
1010 OS << " DbgVal(Order=" << getOrder() << ')';
1011 if (isInvalidated())
1012 OS << "(Invalidated)";
1013 if (isEmitted())
1014 OS << "(Emitted)";
1015 OS << "(";
1016 bool Comma = false;
1017 for (const SDDbgOperand &Op : getLocationOps()) {
1018 if (Comma)
1019 OS << ", ";
1020 switch (Op.getKind()) {
1021 case SDDbgOperand::SDNODE:
1022 if (Op.getSDNode())
1023 OS << "SDNODE=" << PrintNodeId(Node: *Op.getSDNode()) << ':' << Op.getResNo();
1024 else
1025 OS << "SDNODE";
1026 break;
1027 case SDDbgOperand::CONST:
1028 OS << "CONST";
1029 break;
1030 case SDDbgOperand::FRAMEIX:
1031 OS << "FRAMEIX=" << Op.getFrameIx();
1032 break;
1033 case SDDbgOperand::VREG:
1034 OS << "VREG=" << printReg(Reg: Op.getVReg());
1035 break;
1036 }
1037 Comma = true;
1038 }
1039 OS << ")";
1040 if (isIndirect()) OS << "(Indirect)";
1041 if (isVariadic())
1042 OS << "(Variadic)";
1043 OS << ":\"" << Var->getName() << '"';
1044#ifndef NDEBUG
1045 if (Expr->getNumElements())
1046 Expr->dump();
1047#endif
1048}
1049
1050#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1051LLVM_DUMP_METHOD void SDDbgValue::dump() const {
1052 if (isInvalidated())
1053 return;
1054 print(dbgs());
1055 dbgs() << "\n";
1056}
1057#endif
1058
1059/// Return true if this node is so simple that we should just print it inline
1060/// if it appears as an operand.
1061static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1062 // Avoid lots of cluttering when inline printing nodes with associated
1063 // DbgValues in verbose mode.
1064 if (VerboseDAGDumping && G && !G->GetDbgValues(SD: &Node).empty())
1065 return false;
1066 if (Node.getOpcode() == ISD::EntryToken)
1067 return false;
1068 return Node.getNumOperands() == 0;
1069}
1070
1071#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1072static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1073 for (const SDValue &Op : N->op_values()) {
1074 if (shouldPrintInline(*Op.getNode(), G))
1075 continue;
1076 if (Op.getNode()->hasOneUse())
1077 DumpNodes(Op.getNode(), indent+2, G);
1078 }
1079
1080 dbgs().indent(indent);
1081 N->dump(G);
1082}
1083
1084LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1085 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1086
1087 auto dumpEachNode = [this](const SDNode &N) {
1088 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1089 (!shouldPrintInline(N, this) || N.use_empty()))
1090 DumpNodes(&N, 2, this);
1091 };
1092
1093 if (Sorted) {
1094 SmallVector<const SDNode *> SortedNodes;
1095 SortedNodes.reserve(AllNodes.size());
1096 getTopologicallyOrderedNodes(SortedNodes);
1097 for (const SDNode *N : SortedNodes)
1098 dumpEachNode(*N);
1099 } else {
1100 for (const SDNode &N : allnodes())
1101 dumpEachNode(N);
1102 }
1103
1104 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1105 dbgs() << "\n";
1106
1107 if (VerboseDAGDumping) {
1108 if (DbgBegin() != DbgEnd())
1109 dbgs() << "SDDbgValues:\n";
1110 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1111 Dbg->dump();
1112 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
1113 dbgs() << "Byval SDDbgValues:\n";
1114 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1115 Dbg->dump();
1116 }
1117 dbgs() << "\n";
1118}
1119#endif
1120
1121void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1122 OS << PrintNodeId(Node: *this) << ": ";
1123 print_types(OS, G);
1124 OS << " = " << getOperationName(G);
1125 print_details(OS, G);
1126}
1127
1128static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1129 const SDValue Value) {
1130 if (!Value.getNode()) {
1131 OS << "<null>";
1132 return false;
1133 }
1134
1135 if (shouldPrintInline(Node: *Value.getNode(), G)) {
1136 OS << Value->getOperationName(G) << ':';
1137 Value->print_types(OS, G);
1138 Value->print_details(OS, G);
1139 return true;
1140 }
1141
1142 OS << PrintNodeId(Node: *Value.getNode());
1143 if (unsigned RN = Value.getResNo())
1144 OS << ':' << RN;
1145 return false;
1146}
1147
1148#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1149using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
1150
1151static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1152 const SelectionDAG *G, VisitedSDNodeSet &once) {
1153 if (!once.insert(N).second) // If we've been here before, return now.
1154 return;
1155
1156 // Dump the current SDNode, but don't end the line yet.
1157 OS.indent(indent);
1158 N->printr(OS, G);
1159
1160 // Having printed this SDNode, walk the children:
1161 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1162 if (i) OS << ",";
1163 OS << " ";
1164
1165 const SDValue Op = N->getOperand(i);
1166 bool printedInline = printOperand(OS, G, Op);
1167 if (printedInline)
1168 once.insert(Op.getNode());
1169 }
1170
1171 OS << "\n";
1172
1173 // Dump children that have grandchildren on their own line(s).
1174 for (const SDValue &Op : N->op_values())
1175 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1176}
1177
1178LLVM_DUMP_METHOD void SDNode::dumpr() const {
1179 VisitedSDNodeSet once;
1180 DumpNodesr(dbgs(), this, 0, nullptr, once);
1181}
1182
1183LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1184 VisitedSDNodeSet once;
1185 DumpNodesr(dbgs(), this, 0, G, once);
1186}
1187#endif
1188
1189static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1190 const SelectionDAG *G, unsigned depth,
1191 unsigned indent) {
1192 if (depth == 0)
1193 return;
1194
1195 OS.indent(NumSpaces: indent);
1196
1197 N->print(OS, G);
1198
1199 for (const SDValue &Op : N->op_values()) {
1200 // Don't follow chain operands.
1201 if (Op.getValueType() == MVT::Other)
1202 continue;
1203 // Don't print children that were fully rendered inline.
1204 if (shouldPrintInline(Node: *Op.getNode(), G))
1205 continue;
1206 OS << '\n';
1207 printrWithDepthHelper(OS, N: Op.getNode(), G, depth: depth - 1, indent: indent + 2);
1208 }
1209}
1210
1211void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1212 unsigned depth) const {
1213 printrWithDepthHelper(OS, N: this, G, depth, indent: 0);
1214}
1215
1216void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1217 // Don't print impossibly deep things.
1218 printrWithDepth(OS, G, depth: 10);
1219}
1220
1221#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1222LLVM_DUMP_METHOD
1223void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1224 printrWithDepth(dbgs(), G, depth);
1225}
1226
1227LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1228 // Don't print impossibly deep things.
1229 dumprWithDepth(G, 10);
1230}
1231#endif
1232
1233void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1234 printr(OS, G);
1235 // Under VerboseDAGDumping divergence will be printed always.
1236 if (isDivergent() && !VerboseDAGDumping)
1237 OS << " # D:1";
1238 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1239 if (i) OS << ", "; else OS << " ";
1240 printOperand(OS, G, Value: getOperand(Num: i));
1241 }
1242 if (DebugLoc DL = getDebugLoc()) {
1243 OS << ", ";
1244 DL.print(OS);
1245 }
1246 if (PrintSDNodeAddrs)
1247 OS << " ; " << this;
1248}
1249