1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements functions associated with NVVM Intrinsics.
10//
11//===----------------------------------------------------------------------===//
12
13#include "llvm/IR/NVVMIntrinsicUtils.h"
14#include "llvm/ADT/StringRef.h"
15
16using namespace llvm;
17using namespace nvvm;
18
19void nvvm::printTcgen05MMAKind(raw_ostream &OS, const Constant *ImmArgVal) {
20 if (const auto *CI = dyn_cast<ConstantInt>(Val: ImmArgVal)) {
21 uint64_t Val = CI->getZExtValue();
22 switch (static_cast<Tcgen05MMAKind>(Val)) {
23 case Tcgen05MMAKind::F16:
24 OS << "f16";
25 return;
26 case Tcgen05MMAKind::TF32:
27 OS << "tf32";
28 return;
29 case Tcgen05MMAKind::F8F6F4:
30 OS << "f8f6f4";
31 return;
32 case Tcgen05MMAKind::I8:
33 OS << "i8";
34 return;
35 }
36 }
37 llvm_unreachable(
38 "printTcgen05MMAKind called with invalid value for immediate argument");
39}
40
41void nvvm::printTcgen05CollectorUsageOp(raw_ostream &OS,
42 const Constant *ImmArgVal) {
43 if (const auto *CI = dyn_cast<ConstantInt>(Val: ImmArgVal)) {
44 uint64_t Val = CI->getZExtValue();
45 switch (static_cast<Tcgen05CollectorUsageOp>(Val)) {
46 case Tcgen05CollectorUsageOp::DISCARD:
47 OS << "discard";
48 return;
49 case Tcgen05CollectorUsageOp::LASTUSE:
50 OS << "lastuse";
51 return;
52 case Tcgen05CollectorUsageOp::FILL:
53 OS << "fill";
54 return;
55 case Tcgen05CollectorUsageOp::USE:
56 OS << "use";
57 return;
58 }
59 }
60 llvm_unreachable("printTcgen05CollectorUsageOp called with invalid value for "
61 "immediate argument");
62}
63
64void nvvm::printTensormapElemType(raw_ostream &OS, const Constant *ImmArgVal) {
65 static constexpr StringRef TensormapElemTypes[] = {
66 "u8", "u16", "u32", "s32", "u64", "s64",
67 "f16", "f32", "f32.ftz", "f64", "bf16", "tf32",
68 "tf32.ftz", "b4x16", "b4x16_p64", "b6x16_p32"};
69 if (const auto *CI = dyn_cast<ConstantInt>(Val: ImmArgVal)) {
70 uint64_t Val = CI->getZExtValue();
71 if (Val <= static_cast<uint64_t>(nvvm::TensormapElemType::B6x16_p32)) {
72 OS << TensormapElemTypes[Val];
73 return;
74 }
75 }
76}
77
78void nvvm::printTensormapInterleaveLayout(raw_ostream &OS,
79 const Constant *ImmArgVal) {
80 if (const auto *CI = dyn_cast<ConstantInt>(Val: ImmArgVal)) {
81 uint64_t Val = CI->getZExtValue();
82 switch (static_cast<TensormapInterleaveLayout>(Val)) {
83 case TensormapInterleaveLayout::NO_INTERLEAVE:
84 OS << "No interleave";
85 return;
86 case TensormapInterleaveLayout::INTERLEAVE_16B:
87 OS << "16B interleave";
88 return;
89 case TensormapInterleaveLayout::INTERLEAVE_32B:
90 OS << "32B interleave";
91 return;
92 }
93 }
94}
95
96void nvvm::printTensormapSwizzleMode(raw_ostream &OS,
97 const Constant *ImmArgVal) {
98 static constexpr StringRef TensormapSwizzleModes[] = {
99 "No swizzling", "32B swizzling", "64B swizzling", "128B swizzling",
100 "96B swizzling"};
101 if (const auto *CI = dyn_cast<ConstantInt>(Val: ImmArgVal)) {
102 uint64_t Val = CI->getZExtValue();
103 if (Val <= static_cast<uint64_t>(nvvm::TensormapSwizzleMode::SWIZZLE_96B)) {
104 OS << TensormapSwizzleModes[Val];
105 return;
106 }
107 }
108}
109
110void nvvm::printTensormapSwizzleAtomicity(raw_ostream &OS,
111 const Constant *ImmArgVal) {
112 static constexpr StringRef TensormapSwizzleAtomicities[] = {
113 "16B", "32B", "32B + 8B flip", "64B"};
114 if (const auto *CI = dyn_cast<ConstantInt>(Val: ImmArgVal)) {
115 uint64_t Val = CI->getZExtValue();
116 if (Val <= static_cast<uint64_t>(
117 nvvm::TensormapSwizzleAtomicity::SWIZZLE_ATOMICITY_64B)) {
118 OS << TensormapSwizzleAtomicities[Val];
119 return;
120 }
121 }
122}
123
124void nvvm::printTensormapFillMode(raw_ostream &OS, const Constant *ImmArgVal) {
125 if (const auto *CI = dyn_cast<ConstantInt>(Val: ImmArgVal)) {
126 uint64_t Val = CI->getZExtValue();
127 OS << (Val == static_cast<uint64_t>(TensormapFillMode::ZERO_FILL)
128 ? "Zero fill"
129 : "OOB-NaN fill");
130 return;
131 }
132}
133