1//===- MCInstPrinter.cpp - Convert an MCInst to target assembly syntax ----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "llvm/MC/MCInstPrinter.h"
10#include "llvm/ADT/ArrayRef.h"
11#include "llvm/ADT/StringExtras.h"
12#include "llvm/ADT/StringRef.h"
13#include "llvm/MC/MCAsmInfo.h"
14#include "llvm/MC/MCInst.h"
15#include "llvm/MC/MCInstrInfo.h"
16#include "llvm/MC/MCRegisterInfo.h"
17#include "llvm/MC/MCSubtargetInfo.h"
18#include "llvm/Support/ErrorHandling.h"
19#include "llvm/Support/Format.h"
20#include "llvm/Support/raw_ostream.h"
21#include <cinttypes>
22#include <cstdint>
23
24using namespace llvm;
25
26void llvm::dumpBytes(ArrayRef<uint8_t> Bytes, raw_ostream &OS) {
27 static const char HexRep[] = "0123456789abcdef";
28 ListSeparator LS(" ");
29 for (char Byte : Bytes)
30 OS << LS << HexRep[(Byte & 0xF0) >> 4] << HexRep[Byte & 0xF];
31}
32
33MCInstPrinter::~MCInstPrinter() = default;
34
35/// getOpcodeName - Return the name of the specified opcode enum (e.g.
36/// "MOV32ri") or empty if we can't resolve it.
37StringRef MCInstPrinter::getOpcodeName(unsigned Opcode) const {
38 return MII.getName(Opcode);
39}
40
41void MCInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) {
42 llvm_unreachable("Target should implement this");
43}
44
45void MCInstPrinter::printAnnotation(raw_ostream &OS, StringRef Annot) {
46 if (!Annot.empty()) {
47 if (CommentStream) {
48 (*CommentStream) << Annot;
49 // By definition (see MCInstPrinter.h), CommentStream must end with
50 // a newline after each comment.
51 if (Annot.back() != '\n')
52 (*CommentStream) << '\n';
53 } else
54 OS << " " << MAI.getCommentString() << " " << Annot;
55 }
56}
57
58static bool matchAliasCondition(const MCInst &MI, const MCSubtargetInfo *STI,
59 const MCInstrInfo &MII,
60 const MCRegisterInfo &MRI, unsigned &OpIdx,
61 const AliasMatchingData &M,
62 const AliasPatternCond &C,
63 bool &OrPredicateResult) {
64 // Feature tests are special, they don't consume operands.
65 if (C.Kind == AliasPatternCond::K_Feature)
66 return STI->getFeatureBits().test(I: C.Value);
67 if (C.Kind == AliasPatternCond::K_NegFeature)
68 return !STI->getFeatureBits().test(I: C.Value);
69 // For feature tests where just one feature is required in a list, set the
70 // predicate result bit to whether the expression will return true, and only
71 // return the real result at the end of list marker.
72 if (C.Kind == AliasPatternCond::K_OrFeature) {
73 OrPredicateResult |= STI->getFeatureBits().test(I: C.Value);
74 return true;
75 }
76 if (C.Kind == AliasPatternCond::K_OrNegFeature) {
77 OrPredicateResult |= !(STI->getFeatureBits().test(I: C.Value));
78 return true;
79 }
80 if (C.Kind == AliasPatternCond::K_EndOrFeatures) {
81 bool Res = OrPredicateResult;
82 OrPredicateResult = false;
83 return Res;
84 }
85
86 // Get and consume an operand.
87 const MCOperand &Opnd = MI.getOperand(i: OpIdx);
88 ++OpIdx;
89
90 // Check the specific condition for the operand.
91 switch (C.Kind) {
92 case AliasPatternCond::K_Imm:
93 // Operand must be a specific immediate.
94 return Opnd.isImm() && Opnd.getImm() == int32_t(C.Value);
95 case AliasPatternCond::K_Reg:
96 // Operand must be a specific register.
97 return Opnd.isReg() && Opnd.getReg() == C.Value;
98 case AliasPatternCond::K_TiedReg:
99 // Operand must match the register of another operand.
100 return Opnd.isReg() && Opnd.getReg() == MI.getOperand(i: C.Value).getReg();
101 case AliasPatternCond::K_RegClassByHwMode: {
102 // Operand must be RegisterByHwMode. Value is RegClassByHwMode index.
103 unsigned HwModeId = STI->getHwMode(type: MCSubtargetInfo::HwMode_RegInfo);
104 int16_t RCID = MII.getRegClassByHwModeTable(ModeId: HwModeId)[C.Value];
105 return Opnd.isReg() && MRI.getRegClass(i: RCID).contains(Reg: Opnd.getReg());
106 }
107 case AliasPatternCond::K_RegClass:
108 // Operand must be a register in this class. Value is a register class id.
109 return Opnd.isReg() && MRI.getRegClass(i: C.Value).contains(Reg: Opnd.getReg());
110 case AliasPatternCond::K_Custom:
111 // Operand must match some custom criteria.
112 return M.ValidateMCOperand(Opnd, *STI, C.Value);
113 case AliasPatternCond::K_Ignore:
114 // Operand can be anything.
115 return true;
116 case AliasPatternCond::K_Feature:
117 case AliasPatternCond::K_NegFeature:
118 case AliasPatternCond::K_OrFeature:
119 case AliasPatternCond::K_OrNegFeature:
120 case AliasPatternCond::K_EndOrFeatures:
121 llvm_unreachable("handled earlier");
122 }
123 llvm_unreachable("invalid kind");
124}
125
126const char *MCInstPrinter::matchAliasPatterns(const MCInst *MI,
127 const MCSubtargetInfo *STI,
128 const AliasMatchingData &M) {
129 // Binary search by opcode. Return false if there are no aliases for this
130 // opcode.
131 auto It = lower_bound(Range: M.OpToPatterns, Value: MI->getOpcode(),
132 C: [](const PatternsForOpcode &L, unsigned Opcode) {
133 return L.Opcode < Opcode;
134 });
135 if (It == M.OpToPatterns.end() || It->Opcode != MI->getOpcode())
136 return nullptr;
137
138 // Try all patterns for this opcode.
139 uint32_t AsmStrOffset = ~0U;
140 ArrayRef<AliasPattern> Patterns =
141 M.Patterns.slice(N: It->PatternStart, M: It->NumPatterns);
142 for (const AliasPattern &P : Patterns) {
143 // Check operand count first.
144 if (MI->getNumOperands() != P.NumOperands)
145 return nullptr;
146
147 // Test all conditions for this pattern.
148 ArrayRef<AliasPatternCond> Conds =
149 M.PatternConds.slice(N: P.AliasCondStart, M: P.NumConds);
150 unsigned OpIdx = 0;
151 bool OrPredicateResult = false;
152 if (llvm::all_of(Range&: Conds, P: [&](const AliasPatternCond &C) {
153 return matchAliasCondition(MI: *MI, STI, MII, MRI, OpIdx, M, C,
154 OrPredicateResult);
155 })) {
156 // If all conditions matched, use this asm string.
157 AsmStrOffset = P.AsmStrOffset;
158 break;
159 }
160 }
161
162 // If no alias matched, don't print an alias.
163 if (AsmStrOffset == ~0U)
164 return nullptr;
165
166 // Go to offset AsmStrOffset and use the null terminated string there. The
167 // offset should point to the beginning of an alias string, so it should
168 // either be zero or be preceded by a null byte.
169 assert(AsmStrOffset < M.AsmStrings.size() &&
170 (AsmStrOffset == 0 || M.AsmStrings[AsmStrOffset - 1] == '\0') &&
171 "bad asm string offset");
172 return M.AsmStrings.data() + AsmStrOffset;
173}
174
175// For asm-style hex (e.g. 0ffh) the first digit always has to be a number.
176static bool needsLeadingZero(uint64_t Value)
177{
178 while (Value)
179 {
180 uint64_t digit = (Value >> 60) & 0xf;
181 if (digit != 0)
182 return (digit >= 0xa);
183 Value <<= 4;
184 }
185 return false;
186}
187
188format_object<int64_t> MCInstPrinter::formatDec(int64_t Value) const {
189 return format(Fmt: "%" PRId64, Vals: Value);
190}
191
192format_object<int64_t> MCInstPrinter::formatHex(int64_t Value) const {
193 switch (PrintHexStyle) {
194 case HexStyle::C:
195 if (Value < 0) {
196 if (Value == std::numeric_limits<int64_t>::min())
197 return format<int64_t>(Fmt: "-0x8000000000000000", Vals: Value);
198 return format(Fmt: "-0x%" PRIx64, Vals: -Value);
199 }
200 return format(Fmt: "0x%" PRIx64, Vals: Value);
201 case HexStyle::Asm:
202 if (Value < 0) {
203 if (Value == std::numeric_limits<int64_t>::min())
204 return format<int64_t>(Fmt: "-8000000000000000h", Vals: Value);
205 if (needsLeadingZero(Value: -(uint64_t)(Value)))
206 return format(Fmt: "-0%" PRIx64 "h", Vals: -Value);
207 return format(Fmt: "-%" PRIx64 "h", Vals: -Value);
208 }
209 if (needsLeadingZero(Value: (uint64_t)(Value)))
210 return format(Fmt: "0%" PRIx64 "h", Vals: Value);
211 return format(Fmt: "%" PRIx64 "h", Vals: Value);
212 }
213 llvm_unreachable("unsupported print style");
214}
215
216format_object<uint64_t> MCInstPrinter::formatHex(uint64_t Value) const {
217 switch(PrintHexStyle) {
218 case HexStyle::C:
219 return format(Fmt: "0x%" PRIx64, Vals: Value);
220 case HexStyle::Asm:
221 if (needsLeadingZero(Value))
222 return format(Fmt: "0%" PRIx64 "h", Vals: Value);
223 else
224 return format(Fmt: "%" PRIx64 "h", Vals: Value);
225 }
226 llvm_unreachable("unsupported print style");
227}
228
229MCInstPrinter::WithMarkup MCInstPrinter::markup(raw_ostream &OS, Markup S) {
230 return WithMarkup(*this, OS, S, getUseMarkup(), getUseColor());
231}
232
233MCInstPrinter::WithMarkup::WithMarkup(MCInstPrinter &IP, raw_ostream &OS,
234 Markup M, bool EnableMarkup,
235 bool EnableColor)
236 : IP(IP), OS(OS), EnableMarkup(EnableMarkup), EnableColor(EnableColor) {
237 if (EnableColor) {
238 raw_ostream::Colors Color = raw_ostream::Colors::RESET;
239 switch (M) {
240 case Markup::Immediate:
241 Color = raw_ostream::RED;
242 break;
243 case Markup::Register:
244 Color = raw_ostream::CYAN;
245 break;
246 case Markup::Target:
247 Color = raw_ostream::YELLOW;
248 break;
249 case Markup::Memory:
250 Color = raw_ostream::GREEN;
251 break;
252 }
253 IP.ColorStack.push_back(Elt: Color);
254 OS.changeColor(Color);
255 }
256
257 if (EnableMarkup) {
258 switch (M) {
259 case Markup::Immediate:
260 OS << "<imm:";
261 break;
262 case Markup::Register:
263 OS << "<reg:";
264 break;
265 case Markup::Target:
266 OS << "<target:";
267 break;
268 case Markup::Memory:
269 OS << "<mem:";
270 break;
271 }
272 }
273}
274
275MCInstPrinter::WithMarkup::~WithMarkup() {
276 if (EnableMarkup)
277 OS << '>';
278 if (!EnableColor)
279 return;
280 IP.ColorStack.pop_back();
281 OS << IP.ColorStack.back();
282}
283