1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file implements the MCLFIRewriter class, a base class that
11/// encapsulates the rewriting logic for MCInsts.
12///
13//===----------------------------------------------------------------------===//
14
15#include "llvm/MC/MCLFIRewriter.h"
16#include "llvm/MC/MCContext.h"
17#include "llvm/MC/MCInst.h"
18#include "llvm/MC/MCInstrInfo.h"
19
20namespace llvm {
21
22void MCLFIRewriter::error(const MCInst &Inst, const char Msg[]) {
23 Ctx.reportError(L: Inst.getLoc(), Msg);
24}
25
26bool MCLFIRewriter::isCall(const MCInst &Inst) const {
27 return InstInfo->get(Opcode: Inst.getOpcode()).isCall();
28}
29
30bool MCLFIRewriter::isBranch(const MCInst &Inst) const {
31 return InstInfo->get(Opcode: Inst.getOpcode()).isBranch();
32}
33
34bool MCLFIRewriter::isIndirectBranch(const MCInst &Inst) const {
35 return InstInfo->get(Opcode: Inst.getOpcode()).isIndirectBranch();
36}
37
38bool MCLFIRewriter::isReturn(const MCInst &Inst) const {
39 return InstInfo->get(Opcode: Inst.getOpcode()).isReturn();
40}
41
42bool MCLFIRewriter::mayLoad(const MCInst &Inst) const {
43 return InstInfo->get(Opcode: Inst.getOpcode()).mayLoad();
44}
45
46bool MCLFIRewriter::mayStore(const MCInst &Inst) const {
47 return InstInfo->get(Opcode: Inst.getOpcode()).mayStore();
48}
49
50bool MCLFIRewriter::mayModifyRegister(const MCInst &Inst,
51 MCRegister Reg) const {
52 return InstInfo->get(Opcode: Inst.getOpcode()).hasDefOfPhysReg(MI: Inst, Reg, RI: *RegInfo);
53}
54} // namespace llvm
55