1//===- MCSubtargetInfo.cpp - Subtarget Information ------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "llvm/MC/MCSubtargetInfo.h"
10#include "llvm/ADT/ArrayRef.h"
11#include "llvm/ADT/StringRef.h"
12#include "llvm/ADT/Twine.h"
13#include "llvm/MC/MCInstrItineraries.h"
14#include "llvm/MC/MCSchedule.h"
15#include "llvm/Support/Format.h"
16#include "llvm/Support/raw_ostream.h"
17#include "llvm/TargetParser/SubtargetFeature.h"
18#include <algorithm>
19#include <cassert>
20#include <cstring>
21#include <optional>
22
23using namespace llvm;
24
25/// Find KV in array using binary search.
26template <typename T>
27static const T *Find(StringRef S, ArrayRef<T> A) {
28 // Binary search the array
29 auto F = llvm::lower_bound(A, S);
30 // If not found then return NULL
31 if (F == A.end() || StringRef(F->key()) != S)
32 return nullptr;
33 // Return the found array item
34 return F;
35}
36
37/// For each feature that is (transitively) implied by this feature, set it.
38static void SetImpliedBits(FeatureBitset &Bits, FeatureBitset Implies,
39 ArrayRef<SubtargetFeatureKV> FeatureTable) {
40 // Transitively set all features implied. We don't assume that the features in
41 // Bits have already had their implied features set.
42 FeatureBitset NewBits = Implies;
43 while (Implies.any()) {
44 FeatureBitset Implied;
45 for (const SubtargetFeatureKV &FE : FeatureTable) {
46 if (Implies.test(I: FE.Value))
47 Implied |= FE.Implies.getAsBitset();
48 }
49
50 // Only continue for bits that haven't been set yet.
51 Implies = Implied & ~NewBits;
52 NewBits |= Implies;
53 }
54 Bits |= NewBits;
55}
56
57/// For each feature that (transitively) implies this feature, clear it.
58static
59void ClearImpliedBits(FeatureBitset &Bits, unsigned Value,
60 ArrayRef<SubtargetFeatureKV> FeatureTable) {
61 for (const SubtargetFeatureKV &FE : FeatureTable) {
62 if (FE.Implies.getAsBitset().test(I: Value)) {
63 Bits.reset(I: FE.Value);
64 ClearImpliedBits(Bits, Value: FE.Value, FeatureTable);
65 }
66 }
67}
68
69static void ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature,
70 ArrayRef<SubtargetFeatureKV> FeatureTable) {
71 assert(SubtargetFeatures::hasFlag(Feature) &&
72 "Feature flags should start with '+' or '-'");
73
74 // Find feature in table.
75 const SubtargetFeatureKV *FeatureEntry =
76 Find(S: SubtargetFeatures::StripFlag(Feature), A: FeatureTable);
77 // If there is a match
78 if (FeatureEntry) {
79 // Enable/disable feature in bits
80 if (SubtargetFeatures::isEnabled(Feature)) {
81 Bits.set(FeatureEntry->Value);
82
83 // For each feature that this implies, set it.
84 SetImpliedBits(Bits, Implies: FeatureEntry->Implies.getAsBitset(), FeatureTable);
85 } else {
86 Bits.reset(I: FeatureEntry->Value);
87
88 // For each feature that implies this, clear it.
89 ClearImpliedBits(Bits, Value: FeatureEntry->Value, FeatureTable);
90 }
91 } else {
92 errs() << "'" << Feature << "' is not a recognized feature for this target"
93 << " (ignoring feature)\n";
94 }
95}
96
97/// Return the length of the longest entry in the table.
98static size_t getLongestEntryLength(ArrayRef<SubtargetFeatureKV> Table) {
99 size_t MaxLen = 0;
100 for (auto &I : Table)
101 MaxLen = std::max(a: MaxLen, b: std::strlen(s: I.key()));
102 return MaxLen;
103}
104
105static size_t getLongestEntryLength(ArrayRef<StringRef> Table) {
106 size_t MaxLen = 0;
107 for (StringRef I : Table)
108 MaxLen = std::max(a: MaxLen, b: I.size());
109 return MaxLen;
110}
111
112/// Display help for feature and mcpu choices.
113static void Help(ArrayRef<StringRef> CPUNames,
114 ArrayRef<SubtargetFeatureKV> FeatTable) {
115 // the static variable ensures that the help information only gets
116 // printed once even though a target machine creates multiple subtargets
117 static bool PrintOnce = false;
118 if (PrintOnce) {
119 return;
120 }
121
122 // Determine the length of the longest CPU and Feature entries.
123 unsigned MaxCPULen = getLongestEntryLength(Table: CPUNames);
124 unsigned MaxFeatLen = getLongestEntryLength(Table: FeatTable);
125
126 // Print the CPU table.
127 errs() << "Available CPUs for this target:\n\n";
128 for (auto &CPUName : CPUNames) {
129 // Skip apple-latest, as that's only meant to be used in
130 // disassemblers/debuggers, and we don't want normal code to be built with
131 // it as an -mcpu=
132 if (CPUName == "apple-latest")
133 continue;
134 errs() << format(Fmt: " %-*s - Select the %s processor.\n", Vals: MaxCPULen,
135 Vals: CPUName.str().c_str(), Vals: CPUName.str().c_str());
136 }
137 errs() << '\n';
138
139 // Print the Feature table.
140 errs() << "Available features for this target:\n\n";
141 for (auto &Feature : FeatTable)
142 errs() << format(Fmt: " %-*s - %s.\n", Vals: MaxFeatLen, Vals: Feature.key(),
143 Vals: Feature.desc());
144 errs() << '\n';
145
146 errs() << "Use +feature to enable a feature, or -feature to disable it.\n"
147 "For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n";
148
149 PrintOnce = true;
150}
151
152/// Display help for mcpu choices only
153static void cpuHelp(ArrayRef<StringRef> CPUNames) {
154 // the static variable ensures that the help information only gets
155 // printed once even though a target machine creates multiple subtargets
156 static bool PrintOnce = false;
157 if (PrintOnce) {
158 return;
159 }
160
161 // Print the CPU table.
162 errs() << "Available CPUs for this target:\n\n";
163 for (auto &CPU : CPUNames) {
164 // Skip apple-latest, as that's only meant to be used in
165 // disassemblers/debuggers, and we don't want normal code to be built with
166 // it as an -mcpu=
167 if (CPU == "apple-latest")
168 continue;
169 errs() << "\t" << CPU << "\n";
170 }
171 errs() << '\n';
172
173 errs() << "Use -mcpu or -mtune to specify the target's processor.\n"
174 "For example, clang --target=aarch64-unknown-linux-gnu "
175 "-mcpu=cortex-a35\n";
176
177 PrintOnce = true;
178}
179
180static FeatureBitset getFeatures(MCSubtargetInfo &STI, StringRef CPU,
181 StringRef TuneCPU, StringRef FS,
182 ArrayRef<StringRef> ProcNames,
183 ArrayRef<SubtargetSubTypeKV> ProcDesc,
184 ArrayRef<SubtargetFeatureKV> ProcFeatures) {
185 SubtargetFeatures Features(FS);
186
187 if (ProcDesc.empty() || ProcFeatures.empty())
188 return FeatureBitset();
189
190 assert(llvm::is_sorted(ProcDesc) && "CPU table is not sorted");
191 assert(llvm::is_sorted(ProcFeatures) && "CPU features table is not sorted");
192 // Resulting bits
193 FeatureBitset Bits;
194
195 // Check if help is needed
196 if (CPU == "help")
197 Help(CPUNames: ProcNames, FeatTable: ProcFeatures);
198
199 // Find CPU entry if CPU name is specified.
200 else if (!CPU.empty()) {
201 const SubtargetSubTypeKV *CPUEntry = Find(S: CPU, A: ProcDesc);
202
203 // If there is a match
204 if (CPUEntry) {
205 // Set the features implied by this CPU feature, if any.
206 SetImpliedBits(Bits, Implies: CPUEntry->Implies.getAsBitset(), FeatureTable: ProcFeatures);
207 } else {
208 errs() << "'" << CPU << "' is not a recognized processor for this target"
209 << " (ignoring processor)\n";
210 }
211 }
212
213 if (!TuneCPU.empty()) {
214 const SubtargetSubTypeKV *CPUEntry = Find(S: TuneCPU, A: ProcDesc);
215
216 // If there is a match
217 if (CPUEntry) {
218 // Set the features implied by this CPU feature, if any.
219 SetImpliedBits(Bits, Implies: CPUEntry->TuneImplies.getAsBitset(), FeatureTable: ProcFeatures);
220 } else if (TuneCPU != CPU) {
221 errs() << "'" << TuneCPU << "' is not a recognized processor for this "
222 << "target (ignoring processor)\n";
223 }
224 }
225
226 // Iterate through each feature
227 for (const std::string &Feature : Features.getFeatures()) {
228 // Check for help
229 if (Feature == "+help")
230 Help(CPUNames: ProcNames, FeatTable: ProcFeatures);
231 else if (Feature == "+cpuhelp")
232 cpuHelp(CPUNames: ProcNames);
233 else
234 ApplyFeatureFlag(Bits, Feature, FeatureTable: ProcFeatures);
235 }
236
237 return Bits;
238}
239
240void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
241 StringRef FS) {
242 FeatureBits =
243 getFeatures(STI&: *this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
244 FeatureString = std::string(FS);
245
246 if (!TuneCPU.empty())
247 CPUSchedModel = &getSchedModelForCPU(CPU: TuneCPU);
248 else
249 CPUSchedModel = &MCSchedModel::Default;
250}
251
252void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef TuneCPU,
253 StringRef FS) {
254 FeatureBits =
255 getFeatures(STI&: *this, CPU, TuneCPU, FS, ProcNames, ProcDesc, ProcFeatures);
256 FeatureString = std::string(FS);
257}
258
259MCSubtargetInfo::MCSubtargetInfo(
260 const Triple &TT, StringRef C, StringRef TC, StringRef FS,
261 ArrayRef<StringRef> PN, ArrayRef<SubtargetFeatureKV> PF,
262 ArrayRef<SubtargetSubTypeKV> PD, const MCWriteProcResEntry *WPR,
263 const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA,
264 const InstrStage *IS, const unsigned *OC, const unsigned *FP)
265 : TargetTriple(TT), CPU(std::string(C)), TuneCPU(std::string(TC)),
266 ProcNames(PN), ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
267 WriteLatencyTable(WL), ReadAdvanceTable(RA), Stages(IS),
268 OperandCycles(OC), ForwardingPaths(FP) {
269 InitMCProcessorInfo(CPU, TuneCPU, FS);
270}
271
272const FeatureBitset &MCSubtargetInfo::ToggleFeature(uint64_t FB) {
273 FeatureBits.flip(I: FB);
274 return FeatureBits;
275}
276
277const FeatureBitset &MCSubtargetInfo::ToggleFeature(const FeatureBitset &FB) {
278 FeatureBits ^= FB;
279 return FeatureBits;
280}
281
282const FeatureBitset &
283MCSubtargetInfo::SetFeatureBitsTransitively(const FeatureBitset &FB) {
284 SetImpliedBits(Bits&: FeatureBits, Implies: FB, FeatureTable: ProcFeatures);
285 return FeatureBits;
286}
287
288const FeatureBitset &
289MCSubtargetInfo::ClearFeatureBitsTransitively(const FeatureBitset &FB) {
290 for (unsigned I = 0, E = FB.size(); I < E; I++) {
291 if (FB[I]) {
292 FeatureBits.reset(I);
293 ClearImpliedBits(Bits&: FeatureBits, Value: I, FeatureTable: ProcFeatures);
294 }
295 }
296 return FeatureBits;
297}
298
299const FeatureBitset &MCSubtargetInfo::ToggleFeature(StringRef Feature) {
300 // Find feature in table.
301 const SubtargetFeatureKV *FeatureEntry =
302 Find(S: SubtargetFeatures::StripFlag(Feature), A: ProcFeatures);
303 // If there is a match
304 if (FeatureEntry) {
305 if (FeatureBits.test(I: FeatureEntry->Value)) {
306 FeatureBits.reset(I: FeatureEntry->Value);
307 // For each feature that implies this, clear it.
308 ClearImpliedBits(Bits&: FeatureBits, Value: FeatureEntry->Value, FeatureTable: ProcFeatures);
309 } else {
310 FeatureBits.set(FeatureEntry->Value);
311
312 // For each feature that this implies, set it.
313 SetImpliedBits(Bits&: FeatureBits, Implies: FeatureEntry->Implies.getAsBitset(),
314 FeatureTable: ProcFeatures);
315 }
316 } else {
317 errs() << "'" << Feature << "' is not a recognized feature for this target"
318 << " (ignoring feature)\n";
319 }
320
321 return FeatureBits;
322}
323
324const FeatureBitset &MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) {
325 ::ApplyFeatureFlag(Bits&: FeatureBits, Feature: FS, FeatureTable: ProcFeatures);
326 return FeatureBits;
327}
328
329bool MCSubtargetInfo::checkFeatures(StringRef FS) const {
330 SubtargetFeatures T(FS);
331 return all_of(Range: T.getFeatures(), P: [this](const std::string &F) {
332 assert(SubtargetFeatures::hasFlag(F) &&
333 "Feature flags should start with '+' or '-'");
334 const SubtargetFeatureKV *FeatureEntry =
335 Find(S: SubtargetFeatures::StripFlag(Feature: F), A: ProcFeatures);
336 if (!FeatureEntry)
337 report_fatal_error(reason: Twine("'") + F +
338 "' is not a recognized feature for this target");
339
340 return FeatureBits.test(I: FeatureEntry->Value) ==
341 SubtargetFeatures::isEnabled(Feature: F);
342 });
343}
344
345const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
346 assert(llvm::is_sorted(ProcDesc) &&
347 "Processor machine model table is not sorted");
348
349 // Find entry
350 const SubtargetSubTypeKV *CPUEntry = Find(S: CPU, A: ProcDesc);
351
352 if (!CPUEntry) {
353 if (CPU != "help") // Don't error if the user asked for help.
354 errs() << "'" << CPU
355 << "' is not a recognized processor for this target"
356 << " (ignoring processor)\n";
357 return MCSchedModel::Default;
358 }
359 assert(CPUEntry->schedModel() && "Missing processor SchedModel value");
360 return *CPUEntry->schedModel();
361}
362
363InstrItineraryData
364MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
365 const MCSchedModel &SchedModel = getSchedModelForCPU(CPU);
366 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
367}
368
369void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
370 InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles,
371 ForwardingPaths);
372}
373
374std::vector<const SubtargetFeatureKV *>
375MCSubtargetInfo::getEnabledProcessorFeatures() const {
376 std::vector<const SubtargetFeatureKV *> EnabledFeatures;
377 for (const SubtargetFeatureKV &FeatureKV : ProcFeatures)
378 if (FeatureBits.test(I: FeatureKV.Value))
379 EnabledFeatures.push_back(x: &FeatureKV);
380 return EnabledFeatures;
381}
382
383std::optional<unsigned> MCSubtargetInfo::getCacheSize(unsigned Level) const {
384 return std::nullopt;
385}
386
387std::optional<unsigned>
388MCSubtargetInfo::getCacheAssociativity(unsigned Level) const {
389 return std::nullopt;
390}
391
392std::optional<unsigned>
393MCSubtargetInfo::getCacheLineSize(unsigned Level) const {
394 return std::nullopt;
395}
396
397unsigned MCSubtargetInfo::getPrefetchDistance() const {
398 return 0;
399}
400
401unsigned MCSubtargetInfo::getMaxPrefetchIterationsAhead() const {
402 return UINT_MAX;
403}
404
405bool MCSubtargetInfo::enableWritePrefetching() const {
406 return false;
407}
408
409unsigned MCSubtargetInfo::getMinPrefetchStride(unsigned NumMemAccesses,
410 unsigned NumStridedMemAccesses,
411 unsigned NumPrefetches,
412 bool HasCall) const {
413 return 1;
414}
415
416bool MCSubtargetInfo::shouldPrefetchAddressSpace(unsigned AS) const {
417 return !AS;
418}
419