| 1 | //===- ELFObjectFile.cpp - ELF object file implementation -----------------===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // Part of the ELFObjectFile class implementation. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #include "llvm/Object/ELFObjectFile.h" |
| 14 | #include "llvm/BinaryFormat/ELF.h" |
| 15 | #include "llvm/MC/MCInstrAnalysis.h" |
| 16 | #include "llvm/MC/TargetRegistry.h" |
| 17 | #include "llvm/Object/ELF.h" |
| 18 | #include "llvm/Object/ELFTypes.h" |
| 19 | #include "llvm/Object/Error.h" |
| 20 | #include "llvm/Support/ARMAttributeParser.h" |
| 21 | #include "llvm/Support/ARMBuildAttributes.h" |
| 22 | #include "llvm/Support/ErrorHandling.h" |
| 23 | #include "llvm/Support/HexagonAttributeParser.h" |
| 24 | #include "llvm/Support/RISCVAttributeParser.h" |
| 25 | #include "llvm/Support/RISCVAttributes.h" |
| 26 | #include "llvm/TargetParser/RISCVISAInfo.h" |
| 27 | #include "llvm/TargetParser/SubtargetFeature.h" |
| 28 | #include "llvm/TargetParser/Triple.h" |
| 29 | #include <algorithm> |
| 30 | #include <cstddef> |
| 31 | #include <cstdint> |
| 32 | #include <memory> |
| 33 | #include <optional> |
| 34 | #include <string> |
| 35 | #include <utility> |
| 36 | |
| 37 | using namespace llvm; |
| 38 | using namespace object; |
| 39 | |
| 40 | EnumStrings<uint8_t, 2> llvm::object::getElfSymbolTypes() { |
| 41 | constexpr EnumStringDef<uint8_t, 2> ElfSymbolTypeDefs[] = { |
| 42 | {.Names: {"None" , "NOTYPE" }, .Value: ELF::STT_NOTYPE}, |
| 43 | {.Names: {"Object" , "OBJECT" }, .Value: ELF::STT_OBJECT}, |
| 44 | {.Names: {"Function" , "FUNC" }, .Value: ELF::STT_FUNC}, |
| 45 | {.Names: {"Section" , "SECTION" }, .Value: ELF::STT_SECTION}, |
| 46 | {.Names: {"File" , "FILE" }, .Value: ELF::STT_FILE}, |
| 47 | {.Names: {"Common" , "COMMON" }, .Value: ELF::STT_COMMON}, |
| 48 | {.Names: {"TLS" , "TLS" }, .Value: ELF::STT_TLS}, |
| 49 | {.Names: {"Unknown" , "<unknown>: 7" }, .Value: 7}, |
| 50 | {.Names: {"Unknown" , "<unknown>: 8" }, .Value: 8}, |
| 51 | {.Names: {"Unknown" , "<unknown>: 9" }, .Value: 9}, |
| 52 | {.Names: {"GNU_IFunc" , "IFUNC" }, .Value: ELF::STT_GNU_IFUNC}, |
| 53 | {.Names: {"OS Specific" , "<OS specific>: 11" }, .Value: 11}, |
| 54 | {.Names: {"OS Specific" , "<OS specific>: 12" }, .Value: 12}, |
| 55 | {.Names: {"Proc Specific" , "<processor specific>: 13" }, .Value: 13}, |
| 56 | {.Names: {"Proc Specific" , "<processor specific>: 14" }, .Value: 14}, |
| 57 | {.Names: {"Proc Specific" , "<processor specific>: 15" }, .Value: 15}, |
| 58 | }; |
| 59 | static constexpr auto ElfSymbolTypes = BUILD_ENUM_STRINGS(ElfSymbolTypeDefs); |
| 60 | return ElfSymbolTypes; |
| 61 | } |
| 62 | |
| 63 | ELFObjectFileBase::ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source) |
| 64 | : ObjectFile(Type, Source) {} |
| 65 | |
| 66 | template <class ELFT> |
| 67 | static Expected<std::unique_ptr<ELFObjectFile<ELFT>>> |
| 68 | createPtr(MemoryBufferRef Object, bool InitContent) { |
| 69 | auto Ret = ELFObjectFile<ELFT>::create(Object, InitContent); |
| 70 | if (Error E = Ret.takeError()) |
| 71 | return std::move(E); |
| 72 | return std::make_unique<ELFObjectFile<ELFT>>(std::move(*Ret)); |
| 73 | } |
| 74 | |
| 75 | Expected<std::unique_ptr<ObjectFile>> |
| 76 | ObjectFile::createELFObjectFile(MemoryBufferRef Obj, bool InitContent) { |
| 77 | std::pair<unsigned char, unsigned char> Ident = |
| 78 | getElfArchType(Object: Obj.getBuffer()); |
| 79 | std::size_t MaxAlignment = |
| 80 | 1ULL << llvm::countr_zero( |
| 81 | Val: reinterpret_cast<uintptr_t>(Obj.getBufferStart())); |
| 82 | |
| 83 | if (MaxAlignment < 2) |
| 84 | return createError(Err: "Insufficient alignment" ); |
| 85 | |
| 86 | if (Ident.first == ELF::ELFCLASS32) { |
| 87 | if (Ident.second == ELF::ELFDATA2LSB) |
| 88 | return createPtr<ELF32LE>(Object: Obj, InitContent); |
| 89 | else if (Ident.second == ELF::ELFDATA2MSB) |
| 90 | return createPtr<ELF32BE>(Object: Obj, InitContent); |
| 91 | else |
| 92 | return createError(Err: "Invalid ELF data" ); |
| 93 | } else if (Ident.first == ELF::ELFCLASS64) { |
| 94 | if (Ident.second == ELF::ELFDATA2LSB) |
| 95 | return createPtr<ELF64LE>(Object: Obj, InitContent); |
| 96 | else if (Ident.second == ELF::ELFDATA2MSB) |
| 97 | return createPtr<ELF64BE>(Object: Obj, InitContent); |
| 98 | else |
| 99 | return createError(Err: "Invalid ELF data" ); |
| 100 | } |
| 101 | return createError(Err: "Invalid ELF class" ); |
| 102 | } |
| 103 | |
| 104 | SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const { |
| 105 | SubtargetFeatures Features; |
| 106 | unsigned PlatformFlags = getPlatformFlags(); |
| 107 | |
| 108 | switch (PlatformFlags & ELF::EF_MIPS_ARCH) { |
| 109 | case ELF::EF_MIPS_ARCH_1: |
| 110 | break; |
| 111 | case ELF::EF_MIPS_ARCH_2: |
| 112 | Features.AddFeature(String: "mips2" ); |
| 113 | break; |
| 114 | case ELF::EF_MIPS_ARCH_3: |
| 115 | Features.AddFeature(String: "mips3" ); |
| 116 | break; |
| 117 | case ELF::EF_MIPS_ARCH_4: |
| 118 | Features.AddFeature(String: "mips4" ); |
| 119 | break; |
| 120 | case ELF::EF_MIPS_ARCH_5: |
| 121 | Features.AddFeature(String: "mips5" ); |
| 122 | break; |
| 123 | case ELF::EF_MIPS_ARCH_32: |
| 124 | Features.AddFeature(String: "mips32" ); |
| 125 | break; |
| 126 | case ELF::EF_MIPS_ARCH_64: |
| 127 | Features.AddFeature(String: "mips64" ); |
| 128 | break; |
| 129 | case ELF::EF_MIPS_ARCH_32R2: |
| 130 | Features.AddFeature(String: "mips32r2" ); |
| 131 | break; |
| 132 | case ELF::EF_MIPS_ARCH_64R2: |
| 133 | Features.AddFeature(String: "mips64r2" ); |
| 134 | break; |
| 135 | case ELF::EF_MIPS_ARCH_32R6: |
| 136 | Features.AddFeature(String: "mips32r6" ); |
| 137 | break; |
| 138 | case ELF::EF_MIPS_ARCH_64R6: |
| 139 | Features.AddFeature(String: "mips64r6" ); |
| 140 | break; |
| 141 | default: |
| 142 | llvm_unreachable("Unknown EF_MIPS_ARCH value" ); |
| 143 | } |
| 144 | |
| 145 | switch (PlatformFlags & ELF::EF_MIPS_MACH) { |
| 146 | case ELF::EF_MIPS_MACH_NONE: |
| 147 | // No feature associated with this value. |
| 148 | break; |
| 149 | case ELF::EF_MIPS_MACH_OCTEON: |
| 150 | Features.AddFeature(String: "cnmips" ); |
| 151 | break; |
| 152 | default: |
| 153 | llvm_unreachable("Unknown EF_MIPS_ARCH value" ); |
| 154 | } |
| 155 | |
| 156 | if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16) |
| 157 | Features.AddFeature(String: "mips16" ); |
| 158 | if (PlatformFlags & ELF::EF_MIPS_MICROMIPS) |
| 159 | Features.AddFeature(String: "micromips" ); |
| 160 | |
| 161 | return Features; |
| 162 | } |
| 163 | |
| 164 | SubtargetFeatures ELFObjectFileBase::getARMFeatures() const { |
| 165 | SubtargetFeatures Features; |
| 166 | ARMAttributeParser Attributes; |
| 167 | if (Error E = getBuildAttributes(Attributes)) { |
| 168 | consumeError(Err: std::move(E)); |
| 169 | return SubtargetFeatures(); |
| 170 | } |
| 171 | |
| 172 | // both ARMv7-M and R have to support thumb hardware div |
| 173 | bool isV7 = false; |
| 174 | std::optional<unsigned> Attr = |
| 175 | Attributes.getAttributeValue(tag: ARMBuildAttrs::CPU_arch); |
| 176 | if (Attr) |
| 177 | isV7 = *Attr == ARMBuildAttrs::v7; |
| 178 | |
| 179 | Attr = Attributes.getAttributeValue(tag: ARMBuildAttrs::CPU_arch_profile); |
| 180 | if (Attr) { |
| 181 | switch (*Attr) { |
| 182 | case ARMBuildAttrs::ApplicationProfile: |
| 183 | Features.AddFeature(String: "aclass" ); |
| 184 | break; |
| 185 | case ARMBuildAttrs::RealTimeProfile: |
| 186 | Features.AddFeature(String: "rclass" ); |
| 187 | if (isV7) |
| 188 | Features.AddFeature(String: "hwdiv" ); |
| 189 | break; |
| 190 | case ARMBuildAttrs::MicroControllerProfile: |
| 191 | Features.AddFeature(String: "mclass" ); |
| 192 | if (isV7) |
| 193 | Features.AddFeature(String: "hwdiv" ); |
| 194 | break; |
| 195 | } |
| 196 | } |
| 197 | |
| 198 | Attr = Attributes.getAttributeValue(tag: ARMBuildAttrs::THUMB_ISA_use); |
| 199 | if (Attr) { |
| 200 | switch (*Attr) { |
| 201 | default: |
| 202 | break; |
| 203 | case ARMBuildAttrs::Not_Allowed: |
| 204 | Features.AddFeature(String: "thumb" , Enable: false); |
| 205 | Features.AddFeature(String: "thumb2" , Enable: false); |
| 206 | break; |
| 207 | case ARMBuildAttrs::AllowThumb32: |
| 208 | Features.AddFeature(String: "thumb2" ); |
| 209 | break; |
| 210 | } |
| 211 | } |
| 212 | |
| 213 | Attr = Attributes.getAttributeValue(tag: ARMBuildAttrs::FP_arch); |
| 214 | if (Attr) { |
| 215 | switch (*Attr) { |
| 216 | default: |
| 217 | break; |
| 218 | case ARMBuildAttrs::Not_Allowed: |
| 219 | Features.AddFeature(String: "vfp2sp" , Enable: false); |
| 220 | Features.AddFeature(String: "vfp3d16sp" , Enable: false); |
| 221 | Features.AddFeature(String: "vfp4d16sp" , Enable: false); |
| 222 | break; |
| 223 | case ARMBuildAttrs::AllowFPv2: |
| 224 | Features.AddFeature(String: "vfp2" ); |
| 225 | break; |
| 226 | case ARMBuildAttrs::AllowFPv3A: |
| 227 | case ARMBuildAttrs::AllowFPv3B: |
| 228 | Features.AddFeature(String: "vfp3" ); |
| 229 | break; |
| 230 | case ARMBuildAttrs::AllowFPv4A: |
| 231 | case ARMBuildAttrs::AllowFPv4B: |
| 232 | Features.AddFeature(String: "vfp4" ); |
| 233 | break; |
| 234 | } |
| 235 | } |
| 236 | |
| 237 | Attr = Attributes.getAttributeValue(tag: ARMBuildAttrs::Advanced_SIMD_arch); |
| 238 | if (Attr) { |
| 239 | switch (*Attr) { |
| 240 | default: |
| 241 | break; |
| 242 | case ARMBuildAttrs::Not_Allowed: |
| 243 | Features.AddFeature(String: "neon" , Enable: false); |
| 244 | Features.AddFeature(String: "fp16" , Enable: false); |
| 245 | break; |
| 246 | case ARMBuildAttrs::AllowNeon: |
| 247 | Features.AddFeature(String: "neon" ); |
| 248 | break; |
| 249 | case ARMBuildAttrs::AllowNeon2: |
| 250 | Features.AddFeature(String: "neon" ); |
| 251 | Features.AddFeature(String: "fp16" ); |
| 252 | break; |
| 253 | } |
| 254 | } |
| 255 | |
| 256 | Attr = Attributes.getAttributeValue(tag: ARMBuildAttrs::MVE_arch); |
| 257 | if (Attr) { |
| 258 | switch (*Attr) { |
| 259 | default: |
| 260 | break; |
| 261 | case ARMBuildAttrs::Not_Allowed: |
| 262 | Features.AddFeature(String: "mve" , Enable: false); |
| 263 | Features.AddFeature(String: "mve.fp" , Enable: false); |
| 264 | break; |
| 265 | case ARMBuildAttrs::AllowMVEInteger: |
| 266 | Features.AddFeature(String: "mve.fp" , Enable: false); |
| 267 | Features.AddFeature(String: "mve" ); |
| 268 | break; |
| 269 | case ARMBuildAttrs::AllowMVEIntegerAndFloat: |
| 270 | Features.AddFeature(String: "mve.fp" ); |
| 271 | break; |
| 272 | } |
| 273 | } |
| 274 | |
| 275 | Attr = Attributes.getAttributeValue(tag: ARMBuildAttrs::DIV_use); |
| 276 | if (Attr) { |
| 277 | switch (*Attr) { |
| 278 | default: |
| 279 | break; |
| 280 | case ARMBuildAttrs::DisallowDIV: |
| 281 | Features.AddFeature(String: "hwdiv" , Enable: false); |
| 282 | Features.AddFeature(String: "hwdiv-arm" , Enable: false); |
| 283 | break; |
| 284 | case ARMBuildAttrs::AllowDIVExt: |
| 285 | Features.AddFeature(String: "hwdiv" ); |
| 286 | Features.AddFeature(String: "hwdiv-arm" ); |
| 287 | break; |
| 288 | } |
| 289 | } |
| 290 | |
| 291 | return Features; |
| 292 | } |
| 293 | |
| 294 | static std::string hexagonAttrToFeatureString(unsigned Attr) { |
| 295 | return "v" + utostr(X: Attr); |
| 296 | } |
| 297 | |
| 298 | SubtargetFeatures ELFObjectFileBase::getHexagonFeatures() const { |
| 299 | SubtargetFeatures Features; |
| 300 | HexagonAttributeParser Parser; |
| 301 | if (Error E = getBuildAttributes(Attributes&: Parser)) { |
| 302 | // Return no attributes if none can be read. |
| 303 | // This behavior is important for backwards compatibility. |
| 304 | consumeError(Err: std::move(E)); |
| 305 | return Features; |
| 306 | } |
| 307 | std::optional<unsigned> Attr; |
| 308 | |
| 309 | if ((Attr = Parser.getAttributeValue(tag: HexagonAttrs::ARCH))) |
| 310 | Features.AddFeature(String: hexagonAttrToFeatureString(Attr: *Attr)); |
| 311 | |
| 312 | if ((Attr = Parser.getAttributeValue(tag: HexagonAttrs::HVXARCH))) |
| 313 | Features.AddFeature(String: "hvx" + hexagonAttrToFeatureString(Attr: *Attr)); |
| 314 | |
| 315 | if ((Attr = Parser.getAttributeValue(tag: HexagonAttrs::HVXIEEEFP))) |
| 316 | if (*Attr) |
| 317 | Features.AddFeature(String: "hvx-ieee-fp" ); |
| 318 | |
| 319 | if ((Attr = Parser.getAttributeValue(tag: HexagonAttrs::HVXQFLOAT))) |
| 320 | if (*Attr) |
| 321 | Features.AddFeature(String: "hvx-qfloat" ); |
| 322 | |
| 323 | if ((Attr = Parser.getAttributeValue(tag: HexagonAttrs::ZREG))) |
| 324 | if (*Attr) |
| 325 | Features.AddFeature(String: "zreg" ); |
| 326 | |
| 327 | if ((Attr = Parser.getAttributeValue(tag: HexagonAttrs::AUDIO))) |
| 328 | if (*Attr) |
| 329 | Features.AddFeature(String: "audio" ); |
| 330 | |
| 331 | if ((Attr = Parser.getAttributeValue(tag: HexagonAttrs::CABAC))) |
| 332 | if (*Attr) |
| 333 | Features.AddFeature(String: "cabac" ); |
| 334 | |
| 335 | return Features; |
| 336 | } |
| 337 | |
| 338 | Expected<SubtargetFeatures> ELFObjectFileBase::getRISCVFeatures() const { |
| 339 | SubtargetFeatures Features; |
| 340 | unsigned PlatformFlags = getPlatformFlags(); |
| 341 | |
| 342 | if (PlatformFlags & ELF::EF_RISCV_RVC) { |
| 343 | Features.AddFeature(String: "zca" ); |
| 344 | } |
| 345 | |
| 346 | RISCVAttributeParser Attributes; |
| 347 | if (Error E = getBuildAttributes(Attributes)) { |
| 348 | return std::move(E); |
| 349 | } |
| 350 | |
| 351 | std::optional<StringRef> Attr = |
| 352 | Attributes.getAttributeString(tag: RISCVAttrs::ARCH); |
| 353 | if (Attr) { |
| 354 | auto ParseResult = RISCVISAInfo::parseNormalizedArchString(Arch: *Attr); |
| 355 | if (!ParseResult) |
| 356 | return ParseResult.takeError(); |
| 357 | auto &ISAInfo = *ParseResult; |
| 358 | |
| 359 | if (ISAInfo->getXLen() == 32) |
| 360 | Features.AddFeature(String: "64bit" , Enable: false); |
| 361 | else if (ISAInfo->getXLen() == 64) |
| 362 | Features.AddFeature(String: "64bit" ); |
| 363 | else |
| 364 | llvm_unreachable("XLEN should be 32 or 64." ); |
| 365 | |
| 366 | Features.addFeaturesVector(OtherFeatures: ISAInfo->toFeatures()); |
| 367 | } |
| 368 | |
| 369 | return Features; |
| 370 | } |
| 371 | |
| 372 | SubtargetFeatures ELFObjectFileBase::getLoongArchFeatures() const { |
| 373 | SubtargetFeatures Features; |
| 374 | |
| 375 | switch (getPlatformFlags() & ELF::EF_LOONGARCH_ABI_MODIFIER_MASK) { |
| 376 | case ELF::EF_LOONGARCH_ABI_SOFT_FLOAT: |
| 377 | break; |
| 378 | case ELF::EF_LOONGARCH_ABI_DOUBLE_FLOAT: |
| 379 | Features.AddFeature(String: "d" ); |
| 380 | // D implies F according to LoongArch ISA spec. |
| 381 | [[fallthrough]]; |
| 382 | case ELF::EF_LOONGARCH_ABI_SINGLE_FLOAT: |
| 383 | Features.AddFeature(String: "f" ); |
| 384 | break; |
| 385 | } |
| 386 | |
| 387 | return Features; |
| 388 | } |
| 389 | |
| 390 | Expected<SubtargetFeatures> ELFObjectFileBase::getFeatures() const { |
| 391 | switch (getEMachine()) { |
| 392 | case ELF::EM_MIPS: |
| 393 | return getMIPSFeatures(); |
| 394 | case ELF::EM_ARM: |
| 395 | return getARMFeatures(); |
| 396 | case ELF::EM_RISCV: |
| 397 | return getRISCVFeatures(); |
| 398 | case ELF::EM_LOONGARCH: |
| 399 | return getLoongArchFeatures(); |
| 400 | case ELF::EM_HEXAGON: |
| 401 | return getHexagonFeatures(); |
| 402 | default: |
| 403 | return SubtargetFeatures(); |
| 404 | } |
| 405 | } |
| 406 | |
| 407 | std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const { |
| 408 | switch (getEMachine()) { |
| 409 | case ELF::EM_AMDGPU: |
| 410 | return getAMDGPUCPUName(); |
| 411 | case ELF::EM_CUDA: |
| 412 | return getNVPTXCPUName(); |
| 413 | case ELF::EM_PPC: |
| 414 | case ELF::EM_PPC64: |
| 415 | return StringRef("future" ); |
| 416 | case ELF::EM_BPF: |
| 417 | return StringRef("v4" ); |
| 418 | default: |
| 419 | return std::nullopt; |
| 420 | } |
| 421 | } |
| 422 | |
| 423 | StringRef ELFObjectFileBase::getAMDGPUCPUName() const { |
| 424 | assert(getEMachine() == ELF::EM_AMDGPU); |
| 425 | unsigned CPU = getPlatformFlags() & ELF::EF_AMDGPU_MACH; |
| 426 | |
| 427 | switch (CPU) { |
| 428 | #define X(NUM, ENUM, NAME) \ |
| 429 | case ELF::ENUM: \ |
| 430 | return NAME; |
| 431 | AMDGPU_MACH_LIST(X) |
| 432 | #undef X |
| 433 | |
| 434 | default: |
| 435 | llvm_unreachable("Unknown EF_AMDGPU_MACH value" ); |
| 436 | } |
| 437 | } |
| 438 | |
| 439 | StringRef ELFObjectFileBase::getNVPTXCPUName() const { |
| 440 | assert(getEMachine() == ELF::EM_CUDA); |
| 441 | unsigned SM = getEIdentABIVersion() == ELF::ELFABIVERSION_CUDA_V1 |
| 442 | ? getPlatformFlags() & ELF::EF_CUDA_SM |
| 443 | : (getPlatformFlags() & ELF::EF_CUDA_SM_MASK) >> |
| 444 | ELF::EF_CUDA_SM_OFFSET; |
| 445 | |
| 446 | switch (SM) { |
| 447 | // Fermi architecture. |
| 448 | case ELF::EF_CUDA_SM20: |
| 449 | return "sm_20" ; |
| 450 | case ELF::EF_CUDA_SM21: |
| 451 | return "sm_21" ; |
| 452 | |
| 453 | // Kepler architecture. |
| 454 | case ELF::EF_CUDA_SM30: |
| 455 | return "sm_30" ; |
| 456 | case ELF::EF_CUDA_SM32: |
| 457 | return "sm_32" ; |
| 458 | case ELF::EF_CUDA_SM35: |
| 459 | return "sm_35" ; |
| 460 | case ELF::EF_CUDA_SM37: |
| 461 | return "sm_37" ; |
| 462 | |
| 463 | // Maxwell architecture. |
| 464 | case ELF::EF_CUDA_SM50: |
| 465 | return "sm_50" ; |
| 466 | case ELF::EF_CUDA_SM52: |
| 467 | return "sm_52" ; |
| 468 | case ELF::EF_CUDA_SM53: |
| 469 | return "sm_53" ; |
| 470 | |
| 471 | // Pascal architecture. |
| 472 | case ELF::EF_CUDA_SM60: |
| 473 | return "sm_60" ; |
| 474 | case ELF::EF_CUDA_SM61: |
| 475 | return "sm_61" ; |
| 476 | case ELF::EF_CUDA_SM62: |
| 477 | return "sm_62" ; |
| 478 | |
| 479 | // Volta architecture. |
| 480 | case ELF::EF_CUDA_SM70: |
| 481 | return "sm_70" ; |
| 482 | case ELF::EF_CUDA_SM72: |
| 483 | return "sm_72" ; |
| 484 | |
| 485 | // Turing architecture. |
| 486 | case ELF::EF_CUDA_SM75: |
| 487 | return "sm_75" ; |
| 488 | |
| 489 | // Ampere architecture. |
| 490 | case ELF::EF_CUDA_SM80: |
| 491 | return "sm_80" ; |
| 492 | case ELF::EF_CUDA_SM86: |
| 493 | return "sm_86" ; |
| 494 | case ELF::EF_CUDA_SM87: |
| 495 | return "sm_87" ; |
| 496 | case ELF::EF_CUDA_SM88: |
| 497 | return "sm_88" ; |
| 498 | |
| 499 | // Ada architecture. |
| 500 | case ELF::EF_CUDA_SM89: |
| 501 | return "sm_89" ; |
| 502 | |
| 503 | // Hopper architecture. |
| 504 | case ELF::EF_CUDA_SM90: |
| 505 | return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS_V1 ? "sm_90a" |
| 506 | : "sm_90" ; |
| 507 | |
| 508 | // Blackwell architecture. |
| 509 | case ELF::EF_CUDA_SM100: |
| 510 | return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_100a" |
| 511 | : "sm_100" ; |
| 512 | case ELF::EF_CUDA_SM101: |
| 513 | return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_101a" |
| 514 | : "sm_101" ; |
| 515 | case ELF::EF_CUDA_SM103: |
| 516 | return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_103a" |
| 517 | : "sm_103" ; |
| 518 | case ELF::EF_CUDA_SM110: |
| 519 | return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_110a" |
| 520 | : "sm_110" ; |
| 521 | |
| 522 | // Rubin architecture. |
| 523 | case ELF::EF_CUDA_SM120: |
| 524 | return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_120a" |
| 525 | : "sm_120" ; |
| 526 | case ELF::EF_CUDA_SM121: |
| 527 | return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_121a" |
| 528 | : "sm_121" ; |
| 529 | default: |
| 530 | llvm_unreachable("Unknown EF_CUDA_SM value" ); |
| 531 | } |
| 532 | } |
| 533 | |
| 534 | // FIXME Encode from a tablegen description or target parser. |
| 535 | void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const { |
| 536 | if (TheTriple.getSubArch() != Triple::NoSubArch) |
| 537 | return; |
| 538 | |
| 539 | ARMAttributeParser Attributes; |
| 540 | if (Error E = getBuildAttributes(Attributes)) { |
| 541 | // TODO Propagate Error. |
| 542 | consumeError(Err: std::move(E)); |
| 543 | return; |
| 544 | } |
| 545 | |
| 546 | std::string Triple; |
| 547 | // Default to ARM, but use the triple if it's been set. |
| 548 | if (TheTriple.isThumb()) |
| 549 | Triple = "thumb" ; |
| 550 | else |
| 551 | Triple = "arm" ; |
| 552 | |
| 553 | std::optional<unsigned> Attr = |
| 554 | Attributes.getAttributeValue(tag: ARMBuildAttrs::CPU_arch); |
| 555 | if (Attr) { |
| 556 | switch (*Attr) { |
| 557 | case ARMBuildAttrs::v4: |
| 558 | Triple += "v4" ; |
| 559 | break; |
| 560 | case ARMBuildAttrs::v4T: |
| 561 | Triple += "v4t" ; |
| 562 | break; |
| 563 | case ARMBuildAttrs::v5T: |
| 564 | Triple += "v5t" ; |
| 565 | break; |
| 566 | case ARMBuildAttrs::v5TE: |
| 567 | Triple += "v5te" ; |
| 568 | break; |
| 569 | case ARMBuildAttrs::v5TEJ: |
| 570 | Triple += "v5tej" ; |
| 571 | break; |
| 572 | case ARMBuildAttrs::v6: |
| 573 | Triple += "v6" ; |
| 574 | break; |
| 575 | case ARMBuildAttrs::v6KZ: |
| 576 | Triple += "v6kz" ; |
| 577 | break; |
| 578 | case ARMBuildAttrs::v6T2: |
| 579 | Triple += "v6t2" ; |
| 580 | break; |
| 581 | case ARMBuildAttrs::v6K: |
| 582 | Triple += "v6k" ; |
| 583 | break; |
| 584 | case ARMBuildAttrs::v7: { |
| 585 | std::optional<unsigned> ArchProfileAttr = |
| 586 | Attributes.getAttributeValue(tag: ARMBuildAttrs::CPU_arch_profile); |
| 587 | if (ArchProfileAttr == ARMBuildAttrs::MicroControllerProfile) |
| 588 | Triple += "v7m" ; |
| 589 | else |
| 590 | Triple += "v7" ; |
| 591 | break; |
| 592 | } |
| 593 | case ARMBuildAttrs::v6_M: |
| 594 | Triple += "v6m" ; |
| 595 | break; |
| 596 | case ARMBuildAttrs::v6S_M: |
| 597 | Triple += "v6sm" ; |
| 598 | break; |
| 599 | case ARMBuildAttrs::v7E_M: |
| 600 | Triple += "v7em" ; |
| 601 | break; |
| 602 | case ARMBuildAttrs::v8_A: |
| 603 | Triple += "v8a" ; |
| 604 | break; |
| 605 | case ARMBuildAttrs::v8_R: |
| 606 | Triple += "v8r" ; |
| 607 | break; |
| 608 | case ARMBuildAttrs::v8_M_Base: |
| 609 | Triple += "v8m.base" ; |
| 610 | break; |
| 611 | case ARMBuildAttrs::v8_M_Main: |
| 612 | Triple += "v8m.main" ; |
| 613 | break; |
| 614 | case ARMBuildAttrs::v8_1_M_Main: |
| 615 | Triple += "v8.1m.main" ; |
| 616 | break; |
| 617 | case ARMBuildAttrs::v9_A: |
| 618 | Triple += "v9a" ; |
| 619 | break; |
| 620 | } |
| 621 | } |
| 622 | if (!isLittleEndian()) |
| 623 | Triple += "eb" ; |
| 624 | |
| 625 | TheTriple.setArchName(Triple); |
| 626 | } |
| 627 | |
| 628 | std::vector<ELFPltEntry> |
| 629 | ELFObjectFileBase::getPltEntries(const MCSubtargetInfo &STI) const { |
| 630 | std::string Err; |
| 631 | const auto Triple = makeTriple(); |
| 632 | const auto *T = TargetRegistry::lookupTarget(TheTriple: Triple, Error&: Err); |
| 633 | if (!T) |
| 634 | return {}; |
| 635 | uint32_t JumpSlotReloc = 0, GlobDatReloc = 0; |
| 636 | switch (Triple.getArch()) { |
| 637 | case Triple::x86: |
| 638 | JumpSlotReloc = ELF::R_386_JUMP_SLOT; |
| 639 | GlobDatReloc = ELF::R_386_GLOB_DAT; |
| 640 | break; |
| 641 | case Triple::x86_64: |
| 642 | JumpSlotReloc = ELF::R_X86_64_JUMP_SLOT; |
| 643 | GlobDatReloc = ELF::R_X86_64_GLOB_DAT; |
| 644 | break; |
| 645 | case Triple::aarch64: |
| 646 | case Triple::aarch64_be: |
| 647 | JumpSlotReloc = ELF::R_AARCH64_JUMP_SLOT; |
| 648 | break; |
| 649 | case Triple::arm: |
| 650 | case Triple::armeb: |
| 651 | case Triple::thumb: |
| 652 | case Triple::thumbeb: |
| 653 | JumpSlotReloc = ELF::R_ARM_JUMP_SLOT; |
| 654 | break; |
| 655 | case Triple::hexagon: |
| 656 | JumpSlotReloc = ELF::R_HEX_JMP_SLOT; |
| 657 | GlobDatReloc = ELF::R_HEX_GLOB_DAT; |
| 658 | break; |
| 659 | case Triple::riscv32: |
| 660 | case Triple::riscv64: |
| 661 | JumpSlotReloc = ELF::R_RISCV_JUMP_SLOT; |
| 662 | break; |
| 663 | default: |
| 664 | return {}; |
| 665 | } |
| 666 | std::unique_ptr<const MCInstrInfo> MII(T->createMCInstrInfo()); |
| 667 | std::unique_ptr<const MCInstrAnalysis> MIA( |
| 668 | T->createMCInstrAnalysis(Info: MII.get())); |
| 669 | if (!MIA) |
| 670 | return {}; |
| 671 | std::vector<std::pair<uint64_t, uint64_t>> PltEntries; |
| 672 | std::optional<SectionRef> RelaPlt, RelaDyn; |
| 673 | uint64_t GotBaseVA = 0; |
| 674 | for (const SectionRef &Section : sections()) { |
| 675 | Expected<StringRef> NameOrErr = Section.getName(); |
| 676 | if (!NameOrErr) { |
| 677 | consumeError(Err: NameOrErr.takeError()); |
| 678 | continue; |
| 679 | } |
| 680 | StringRef Name = *NameOrErr; |
| 681 | |
| 682 | if (Name == ".rela.plt" || Name == ".rel.plt" ) { |
| 683 | RelaPlt = Section; |
| 684 | } else if (Name == ".rela.dyn" || Name == ".rel.dyn" ) { |
| 685 | RelaDyn = Section; |
| 686 | } else if (Name == ".got.plt" ) { |
| 687 | GotBaseVA = Section.getAddress(); |
| 688 | } else if (Name == ".plt" || Name == ".plt.got" ) { |
| 689 | Expected<StringRef> PltContents = Section.getContents(); |
| 690 | if (!PltContents) { |
| 691 | consumeError(Err: PltContents.takeError()); |
| 692 | return {}; |
| 693 | } |
| 694 | llvm::append_range( |
| 695 | C&: PltEntries, |
| 696 | R: MIA->findPltEntries(PltSectionVA: Section.getAddress(), |
| 697 | PltContents: arrayRefFromStringRef(Input: *PltContents), STI)); |
| 698 | } |
| 699 | } |
| 700 | |
| 701 | // Build a map from GOT entry virtual address to PLT entry virtual address. |
| 702 | DenseMap<uint64_t, uint64_t> GotToPlt; |
| 703 | for (auto [Plt, GotPlt] : PltEntries) { |
| 704 | uint64_t GotPltEntry = GotPlt; |
| 705 | // An x86-32 PIC PLT uses jmp DWORD PTR [ebx-offset]. Add |
| 706 | // _GLOBAL_OFFSET_TABLE_ (EBX) to get the .got.plt (or .got) entry address. |
| 707 | // See X86MCTargetDesc.cpp:findPltEntries for the 1 << 32 bit. |
| 708 | if (GotPltEntry & (uint64_t(1) << 32) && getEMachine() == ELF::EM_386) |
| 709 | GotPltEntry = static_cast<int32_t>(GotPltEntry) + GotBaseVA; |
| 710 | GotToPlt.insert(KV: std::make_pair(x&: GotPltEntry, y&: Plt)); |
| 711 | } |
| 712 | |
| 713 | // Find the relocations in the dynamic relocation table that point to |
| 714 | // locations in the GOT for which we know the corresponding PLT entry. |
| 715 | std::vector<ELFPltEntry> Result; |
| 716 | auto handleRels = [&](iterator_range<relocation_iterator> Rels, |
| 717 | uint32_t RelType, StringRef PltSec) { |
| 718 | for (const auto &R : Rels) { |
| 719 | if (R.getType() != RelType) |
| 720 | continue; |
| 721 | auto PltEntryIter = GotToPlt.find(Val: R.getOffset()); |
| 722 | if (PltEntryIter != GotToPlt.end()) { |
| 723 | symbol_iterator Sym = R.getSymbol(); |
| 724 | if (Sym == symbol_end()) |
| 725 | Result.push_back( |
| 726 | x: ELFPltEntry{.Section: PltSec, .Symbol: std::nullopt, .Address: PltEntryIter->second}); |
| 727 | else |
| 728 | Result.push_back(x: ELFPltEntry{.Section: PltSec, .Symbol: Sym->getRawDataRefImpl(), |
| 729 | .Address: PltEntryIter->second}); |
| 730 | } |
| 731 | } |
| 732 | }; |
| 733 | |
| 734 | if (RelaPlt) |
| 735 | handleRels(RelaPlt->relocations(), JumpSlotReloc, ".plt" ); |
| 736 | |
| 737 | // If a symbol needing a PLT entry also needs a GLOB_DAT relocation, GNU ld's |
| 738 | // x86 port places the PLT entry in the .plt.got section. |
| 739 | if (RelaDyn) |
| 740 | handleRels(RelaDyn->relocations(), GlobDatReloc, ".plt.got" ); |
| 741 | |
| 742 | return Result; |
| 743 | } |
| 744 | |
| 745 | template <class ELFT> |
| 746 | Expected<std::vector<BBAddrMap>> static readBBAddrMapImpl( |
| 747 | const ELFFile<ELFT> &EF, std::optional<unsigned> TextSectionIndex, |
| 748 | std::vector<PGOAnalysisMap> *PGOAnalyses) { |
| 749 | using Elf_Shdr = typename ELFT::Shdr; |
| 750 | bool IsRelocatable = EF.getHeader().e_type == ELF::ET_REL; |
| 751 | std::vector<BBAddrMap> BBAddrMaps; |
| 752 | if (PGOAnalyses) |
| 753 | PGOAnalyses->clear(); |
| 754 | |
| 755 | const auto &Sections = cantFail(EF.sections()); |
| 756 | auto IsMatch = [&](const Elf_Shdr &Sec) -> Expected<bool> { |
| 757 | if (Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP) |
| 758 | return false; |
| 759 | if (!TextSectionIndex) |
| 760 | return true; |
| 761 | Expected<const Elf_Shdr *> TextSecOrErr = EF.getSection(Sec.sh_link); |
| 762 | if (!TextSecOrErr) |
| 763 | return createError("unable to get the linked-to section for " + |
| 764 | describe(EF, Sec) + ": " + |
| 765 | toString(TextSecOrErr.takeError())); |
| 766 | assert(*TextSecOrErr >= Sections.begin() && |
| 767 | "Text section pointer outside of bounds" ); |
| 768 | if (*TextSectionIndex != |
| 769 | (unsigned)std::distance(Sections.begin(), *TextSecOrErr)) |
| 770 | return false; |
| 771 | return true; |
| 772 | }; |
| 773 | |
| 774 | Expected<MapVector<const Elf_Shdr *, const Elf_Shdr *>> SectionRelocMapOrErr = |
| 775 | EF.getSectionAndRelocations(IsMatch); |
| 776 | if (!SectionRelocMapOrErr) |
| 777 | return SectionRelocMapOrErr.takeError(); |
| 778 | |
| 779 | for (auto const &[Sec, RelocSec] : *SectionRelocMapOrErr) { |
| 780 | if (IsRelocatable && !RelocSec) |
| 781 | return createError("unable to get relocation section for " + |
| 782 | describe(EF, *Sec)); |
| 783 | Expected<std::vector<BBAddrMap>> BBAddrMapOrErr = |
| 784 | EF.decodeBBAddrMap(*Sec, RelocSec, PGOAnalyses); |
| 785 | if (!BBAddrMapOrErr) { |
| 786 | if (PGOAnalyses) |
| 787 | PGOAnalyses->clear(); |
| 788 | return createError(Err: "unable to read BB addr map section: " + |
| 789 | toString(E: BBAddrMapOrErr.takeError())); |
| 790 | } |
| 791 | std::move(first: BBAddrMapOrErr->begin(), last: BBAddrMapOrErr->end(), |
| 792 | result: std::back_inserter(x&: BBAddrMaps)); |
| 793 | } |
| 794 | if (PGOAnalyses) |
| 795 | assert(PGOAnalyses->size() == BBAddrMaps.size() && |
| 796 | "The same number of BBAddrMaps and PGOAnalysisMaps should be " |
| 797 | "returned when PGO information is requested" ); |
| 798 | return BBAddrMaps; |
| 799 | } |
| 800 | |
| 801 | template <class ELFT> |
| 802 | static Expected<std::vector<VersionEntry>> |
| 803 | readDynsymVersionsImpl(const ELFFile<ELFT> &EF, |
| 804 | ELFObjectFileBase::elf_symbol_iterator_range Symbols) { |
| 805 | using Elf_Shdr = typename ELFT::Shdr; |
| 806 | const Elf_Shdr *VerSec = nullptr; |
| 807 | const Elf_Shdr *VerNeedSec = nullptr; |
| 808 | const Elf_Shdr *VerDefSec = nullptr; |
| 809 | // The user should ensure sections() can't fail here. |
| 810 | for (const Elf_Shdr &Sec : cantFail(EF.sections())) { |
| 811 | if (Sec.sh_type == ELF::SHT_GNU_versym) |
| 812 | VerSec = &Sec; |
| 813 | else if (Sec.sh_type == ELF::SHT_GNU_verdef) |
| 814 | VerDefSec = &Sec; |
| 815 | else if (Sec.sh_type == ELF::SHT_GNU_verneed) |
| 816 | VerNeedSec = &Sec; |
| 817 | } |
| 818 | if (!VerSec) |
| 819 | return std::vector<VersionEntry>(); |
| 820 | |
| 821 | Expected<SmallVector<std::optional<VersionEntry>, 0>> MapOrErr = |
| 822 | EF.loadVersionMap(VerNeedSec, VerDefSec); |
| 823 | if (!MapOrErr) |
| 824 | return MapOrErr.takeError(); |
| 825 | |
| 826 | std::vector<VersionEntry> Ret; |
| 827 | size_t I = 0; |
| 828 | for (const ELFSymbolRef &Sym : Symbols) { |
| 829 | ++I; |
| 830 | Expected<const typename ELFT::Versym *> VerEntryOrErr = |
| 831 | EF.template getEntry<typename ELFT::Versym>(*VerSec, I); |
| 832 | if (!VerEntryOrErr) |
| 833 | return createError("unable to read an entry with index " + Twine(I) + |
| 834 | " from " + describe(EF, *VerSec) + ": " + |
| 835 | toString(VerEntryOrErr.takeError())); |
| 836 | |
| 837 | Expected<uint32_t> FlagsOrErr = Sym.getFlags(); |
| 838 | if (!FlagsOrErr) |
| 839 | return createError(Err: "unable to read flags for symbol with index " + |
| 840 | Twine(I) + ": " + toString(E: FlagsOrErr.takeError())); |
| 841 | |
| 842 | bool IsDefault; |
| 843 | Expected<StringRef> VerOrErr = EF.getSymbolVersionByIndex( |
| 844 | (*VerEntryOrErr)->vs_index, IsDefault, *MapOrErr, |
| 845 | (*FlagsOrErr) & SymbolRef::SF_Undefined); |
| 846 | if (!VerOrErr) |
| 847 | return createError("unable to get a version for entry " + Twine(I) + |
| 848 | " of " + describe(EF, *VerSec) + ": " + |
| 849 | toString(E: VerOrErr.takeError())); |
| 850 | |
| 851 | Ret.push_back(x: {.Name: (*VerOrErr).str(), .IsVerDef: IsDefault}); |
| 852 | } |
| 853 | |
| 854 | return Ret; |
| 855 | } |
| 856 | |
| 857 | Expected<std::vector<VersionEntry>> |
| 858 | ELFObjectFileBase::readDynsymVersions() const { |
| 859 | elf_symbol_iterator_range Symbols = getDynamicSymbolIterators(); |
| 860 | if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(Val: this)) |
| 861 | return readDynsymVersionsImpl(EF: Obj->getELFFile(), Symbols); |
| 862 | if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(Val: this)) |
| 863 | return readDynsymVersionsImpl(EF: Obj->getELFFile(), Symbols); |
| 864 | if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(Val: this)) |
| 865 | return readDynsymVersionsImpl(EF: Obj->getELFFile(), Symbols); |
| 866 | return readDynsymVersionsImpl(EF: cast<ELF64BEObjectFile>(Val: this)->getELFFile(), |
| 867 | Symbols); |
| 868 | } |
| 869 | |
| 870 | Expected<std::vector<BBAddrMap>> ELFObjectFileBase::readBBAddrMap( |
| 871 | std::optional<unsigned> TextSectionIndex, |
| 872 | std::vector<PGOAnalysisMap> *PGOAnalyses) const { |
| 873 | if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(Val: this)) |
| 874 | return readBBAddrMapImpl(EF: Obj->getELFFile(), TextSectionIndex, PGOAnalyses); |
| 875 | if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(Val: this)) |
| 876 | return readBBAddrMapImpl(EF: Obj->getELFFile(), TextSectionIndex, PGOAnalyses); |
| 877 | if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(Val: this)) |
| 878 | return readBBAddrMapImpl(EF: Obj->getELFFile(), TextSectionIndex, PGOAnalyses); |
| 879 | return readBBAddrMapImpl(EF: cast<ELF64BEObjectFile>(Val: this)->getELFFile(), |
| 880 | TextSectionIndex, PGOAnalyses); |
| 881 | } |
| 882 | |
| 883 | StringRef ELFObjectFileBase::getCrelDecodeProblem(SectionRef Sec) const { |
| 884 | auto Data = Sec.getRawDataRefImpl(); |
| 885 | if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(Val: this)) |
| 886 | return Obj->getCrelDecodeProblem(Sec: Data); |
| 887 | if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(Val: this)) |
| 888 | return Obj->getCrelDecodeProblem(Sec: Data); |
| 889 | if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(Val: this)) |
| 890 | return Obj->getCrelDecodeProblem(Sec: Data); |
| 891 | return cast<ELF64BEObjectFile>(Val: this)->getCrelDecodeProblem(Sec: Data); |
| 892 | } |
| 893 | |