1//===-- AArch64ELFObjectWriter.cpp - AArch64 ELF Writer -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file handles ELF-specific object emission, converting LLVM's internal
10// fixups into the appropriate relocations.
11//
12//===----------------------------------------------------------------------===//
13
14#include "MCTargetDesc/AArch64FixupKinds.h"
15#include "MCTargetDesc/AArch64MCAsmInfo.h"
16#include "MCTargetDesc/AArch64MCTargetDesc.h"
17#include "llvm/BinaryFormat/ELF.h"
18#include "llvm/MC/MCContext.h"
19#include "llvm/MC/MCELFObjectWriter.h"
20#include "llvm/MC/MCFixup.h"
21#include "llvm/MC/MCObjectWriter.h"
22#include "llvm/MC/MCSymbolELF.h"
23#include "llvm/MC/MCValue.h"
24#include "llvm/Support/ErrorHandling.h"
25#include <cassert>
26#include <cstdint>
27
28using namespace llvm;
29
30namespace {
31
32class AArch64ELFObjectWriter : public MCELFObjectTargetWriter {
33public:
34 AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32);
35
36 ~AArch64ELFObjectWriter() override = default;
37
38protected:
39 unsigned getRelocType(const MCFixup &, const MCValue &,
40 bool IsPCRel) const override;
41 bool needsRelocateWithSymbol(const MCValue &, unsigned Type) const override;
42 bool isNonILP32reloc(const MCFixup &Fixup, AArch64::Specifier RefKind) const;
43 void sortRelocs(std::vector<ELFRelocationEntry> &Relocs) override;
44
45 bool IsILP32;
46};
47
48} // end anonymous namespace
49
50AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)
51 : MCELFObjectTargetWriter(/*Is64Bit*/ !IsILP32, OSABI, ELF::EM_AARCH64,
52 /*HasRelocationAddend*/ true),
53 IsILP32(IsILP32) {}
54
55#define R_CLS(rtype) \
56 IsILP32 ? ELF::R_AARCH64_P32_##rtype : ELF::R_AARCH64_##rtype
57
58// assumes IsILP32 is true
59bool AArch64ELFObjectWriter::isNonILP32reloc(const MCFixup &Fixup,
60 AArch64::Specifier RefKind) const {
61 if (Fixup.getKind() != AArch64::fixup_aarch64_movw)
62 return false;
63 switch (RefKind) {
64 case AArch64::S_ABS_G3:
65 case AArch64::S_ABS_G2:
66 case AArch64::S_ABS_G2_S:
67 case AArch64::S_ABS_G2_NC:
68 case AArch64::S_ABS_G1_S:
69 case AArch64::S_ABS_G1_NC:
70 case AArch64::S_DTPREL_G2:
71 case AArch64::S_DTPREL_G1_NC:
72 case AArch64::S_TPREL_G2:
73 case AArch64::S_TPREL_G1_NC:
74 case AArch64::S_GOTTPREL_G1:
75 case AArch64::S_GOTTPREL_G0_NC:
76 reportError(L: Fixup.getLoc(),
77 Msg: "absolute MOV relocation is not supported in ILP32");
78 return true;
79 default:
80 return false;
81 }
82 return false;
83}
84
85unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
86 const MCValue &Target,
87 bool IsPCRel) const {
88 auto Kind = Fixup.getKind();
89 AArch64::Specifier RefKind =
90 static_cast<AArch64::Specifier>(Target.getSpecifier());
91 AArch64::Specifier SymLoc = AArch64::getSymbolLoc(S: RefKind);
92 bool IsNC = AArch64::isNotChecked(S: RefKind);
93
94 switch (SymLoc) {
95 case AArch64::S_DTPREL:
96 case AArch64::S_GOTTPREL:
97 case AArch64::S_TPREL:
98 case AArch64::S_TLSDESC:
99 case AArch64::S_TLSDESC_AUTH:
100 if (auto *SA = const_cast<MCSymbol *>(Target.getAddSym()))
101 static_cast<MCSymbolELF *>(SA)->setType(ELF::STT_TLS);
102 break;
103 default:
104 break;
105 }
106
107 // Extract the relocation type from the fixup kind, after applying STT_TLS as
108 // needed.
109 if (mc::isRelocation(FixupKind: Fixup.getKind()))
110 return Kind;
111
112 if (IsPCRel) {
113 switch (Kind) {
114 case FK_Data_1:
115 reportError(L: Fixup.getLoc(), Msg: "1-byte data relocations not supported");
116 return ELF::R_AARCH64_NONE;
117 case FK_Data_2:
118 return R_CLS(PREL16);
119 case FK_Data_4: {
120 return Target.getSpecifier() == AArch64::S_PLT ? R_CLS(PLT32)
121 : R_CLS(PREL32);
122 }
123 case FK_Data_8:
124 if (IsILP32) {
125 reportError(L: Fixup.getLoc(), Msg: "8 byte PC relative data "
126 "relocation is not supported in ILP32");
127 return ELF::R_AARCH64_NONE;
128 }
129 return ELF::R_AARCH64_PREL64;
130 case AArch64::fixup_aarch64_pcrel_adr_imm21:
131 if (SymLoc == AArch64::S_GOT_AUTH) {
132 if (IsILP32) {
133 reportError(L: Fixup.getLoc(),
134 Msg: "ADR AUTH relocation is not supported in ILP32");
135 return ELF::R_AARCH64_NONE;
136 }
137 return ELF::R_AARCH64_AUTH_GOT_ADR_PREL_LO21;
138 }
139 if (SymLoc != AArch64::S_ABS)
140 reportError(L: Fixup.getLoc(), Msg: "invalid symbol kind for ADR relocation");
141 return R_CLS(ADR_PREL_LO21);
142 case AArch64::fixup_aarch64_pcrel_adrp_imm21:
143 if (SymLoc == AArch64::S_ABS && !IsNC)
144 return R_CLS(ADR_PREL_PG_HI21);
145 if (SymLoc == AArch64::S_ABS && IsNC) {
146 if (IsILP32) {
147 reportError(L: Fixup.getLoc(),
148 Msg: "invalid fixup for 32-bit pcrel ADRP instruction "
149 "VK_ABS VK_NC");
150 return ELF::R_AARCH64_NONE;
151 }
152 return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
153 }
154 if (SymLoc == AArch64::S_GOT && !IsNC)
155 return R_CLS(ADR_GOT_PAGE);
156 if (SymLoc == AArch64::S_GOT_AUTH && !IsNC) {
157 if (IsILP32) {
158 reportError(L: Fixup.getLoc(),
159 Msg: "ADRP AUTH relocation is not supported in ILP32");
160 return ELF::R_AARCH64_NONE;
161 }
162 return ELF::R_AARCH64_AUTH_ADR_GOT_PAGE;
163 }
164 if (SymLoc == AArch64::S_GOTTPREL && !IsNC)
165 return R_CLS(TLSIE_ADR_GOTTPREL_PAGE21);
166 if (SymLoc == AArch64::S_TLSDESC && !IsNC)
167 return R_CLS(TLSDESC_ADR_PAGE21);
168 if (SymLoc == AArch64::S_TLSDESC_AUTH && !IsNC) {
169 if (IsILP32) {
170 reportError(L: Fixup.getLoc(),
171 Msg: "ADRP AUTH relocation is not supported in ILP32");
172 return ELF::R_AARCH64_NONE;
173 }
174 return ELF::R_AARCH64_AUTH_TLSDESC_ADR_PAGE21;
175 }
176 reportError(L: Fixup.getLoc(), Msg: "invalid symbol kind for ADRP relocation");
177 return ELF::R_AARCH64_NONE;
178 case AArch64::fixup_aarch64_pcrel_branch26:
179 return R_CLS(JUMP26);
180 case AArch64::fixup_aarch64_pcrel_call26:
181 return R_CLS(CALL26);
182 case AArch64::fixup_aarch64_ldr_pcrel_imm19:
183 if (SymLoc == AArch64::S_GOTTPREL)
184 return R_CLS(TLSIE_LD_GOTTPREL_PREL19);
185 if (SymLoc == AArch64::S_GOT)
186 return R_CLS(GOT_LD_PREL19);
187 if (SymLoc == AArch64::S_GOT_AUTH) {
188 if (IsILP32) {
189 reportError(L: Fixup.getLoc(),
190 Msg: "LDR AUTH relocation is not supported in ILP32");
191 return ELF::R_AARCH64_NONE;
192 }
193 return ELF::R_AARCH64_AUTH_GOT_LD_PREL19;
194 }
195 return R_CLS(LD_PREL_LO19);
196 case AArch64::fixup_aarch64_pcrel_branch14:
197 return R_CLS(TSTBR14);
198 case AArch64::fixup_aarch64_pcrel_branch16:
199 reportError(L: Fixup.getLoc(),
200 Msg: "relocation of PAC/AUT instructions is not supported");
201 return ELF::R_AARCH64_NONE;
202 case AArch64::fixup_aarch64_pcrel_branch9:
203 reportError(
204 L: Fixup.getLoc(),
205 Msg: "relocation of compare-and-branch instructions not supported");
206 return ELF::R_AARCH64_NONE;
207 case AArch64::fixup_aarch64_pcrel_branch19:
208 return R_CLS(CONDBR19);
209 default:
210 reportError(L: Fixup.getLoc(), Msg: "Unsupported pc-relative fixup kind");
211 return ELF::R_AARCH64_NONE;
212 }
213 } else {
214 if (IsILP32 && isNonILP32reloc(Fixup, RefKind))
215 return ELF::R_AARCH64_NONE;
216 switch (Fixup.getKind()) {
217 case FK_Data_1:
218 reportError(L: Fixup.getLoc(), Msg: "1-byte data relocations not supported");
219 return ELF::R_AARCH64_NONE;
220 case FK_Data_2:
221 return R_CLS(ABS16);
222 case FK_Data_4:
223 return (!IsILP32 && Target.getSpecifier() == AArch64::S_GOTPCREL)
224 ? ELF::R_AARCH64_GOTPCREL32
225 : R_CLS(ABS32);
226 case FK_Data_8: {
227 if (IsILP32) {
228 reportError(
229 L: Fixup.getLoc(),
230 Msg: "8 byte absolute data relocation is not supported in ILP32");
231 return ELF::R_AARCH64_NONE;
232 }
233 if (RefKind == AArch64::S_AUTH || RefKind == AArch64::S_AUTHADDR)
234 return ELF::R_AARCH64_AUTH_ABS64;
235 if (RefKind == AArch64::S_FUNCINIT)
236 return ELF::R_AARCH64_FUNCINIT64;
237 return ELF::R_AARCH64_ABS64;
238 }
239 case AArch64::fixup_aarch64_add_imm12:
240 if (RefKind == AArch64::S_DTPREL_HI12)
241 return R_CLS(TLSLD_ADD_DTPREL_HI12);
242 if (RefKind == AArch64::S_TPREL_HI12)
243 return R_CLS(TLSLE_ADD_TPREL_HI12);
244 if (RefKind == AArch64::S_DTPREL_LO12_NC)
245 return R_CLS(TLSLD_ADD_DTPREL_LO12_NC);
246 if (RefKind == AArch64::S_DTPREL_LO12)
247 return R_CLS(TLSLD_ADD_DTPREL_LO12);
248 if (RefKind == AArch64::S_TPREL_LO12_NC)
249 return R_CLS(TLSLE_ADD_TPREL_LO12_NC);
250 if (RefKind == AArch64::S_TPREL_LO12)
251 return R_CLS(TLSLE_ADD_TPREL_LO12);
252 if (RefKind == AArch64::S_TLSDESC_LO12)
253 return R_CLS(TLSDESC_ADD_LO12);
254 if (RefKind == AArch64::S_TLSDESC_AUTH_LO12) {
255 if (IsILP32) {
256 reportError(L: Fixup.getLoc(),
257 Msg: "ADD AUTH relocation is not supported in ILP32");
258 return ELF::R_AARCH64_NONE;
259 }
260 return ELF::R_AARCH64_AUTH_TLSDESC_ADD_LO12;
261 }
262 if (RefKind == AArch64::S_GOT_AUTH_LO12 && IsNC) {
263 if (IsILP32) {
264 reportError(L: Fixup.getLoc(),
265 Msg: "ADD AUTH relocation is not supported in ILP32");
266 return ELF::R_AARCH64_NONE;
267 }
268 return ELF::R_AARCH64_AUTH_GOT_ADD_LO12_NC;
269 }
270 if (SymLoc == AArch64::S_ABS && IsNC)
271 return R_CLS(ADD_ABS_LO12_NC);
272
273 reportError(L: Fixup.getLoc(), Msg: "invalid fixup for add (uimm12) instruction");
274 return ELF::R_AARCH64_NONE;
275 case AArch64::fixup_aarch64_ldst_imm12_scale1:
276 if (SymLoc == AArch64::S_ABS && IsNC)
277 return R_CLS(LDST8_ABS_LO12_NC);
278 if (SymLoc == AArch64::S_DTPREL && !IsNC)
279 return R_CLS(TLSLD_LDST8_DTPREL_LO12);
280 if (SymLoc == AArch64::S_DTPREL && IsNC)
281 return R_CLS(TLSLD_LDST8_DTPREL_LO12_NC);
282 if (SymLoc == AArch64::S_TPREL && !IsNC)
283 return R_CLS(TLSLE_LDST8_TPREL_LO12);
284 if (SymLoc == AArch64::S_TPREL && IsNC)
285 return R_CLS(TLSLE_LDST8_TPREL_LO12_NC);
286
287 reportError(L: Fixup.getLoc(),
288 Msg: "invalid fixup for 8-bit load/store instruction");
289 return ELF::R_AARCH64_NONE;
290 case AArch64::fixup_aarch64_ldst_imm12_scale2:
291 if (SymLoc == AArch64::S_ABS && IsNC)
292 return R_CLS(LDST16_ABS_LO12_NC);
293 if (SymLoc == AArch64::S_DTPREL && !IsNC)
294 return R_CLS(TLSLD_LDST16_DTPREL_LO12);
295 if (SymLoc == AArch64::S_DTPREL && IsNC)
296 return R_CLS(TLSLD_LDST16_DTPREL_LO12_NC);
297 if (SymLoc == AArch64::S_TPREL && !IsNC)
298 return R_CLS(TLSLE_LDST16_TPREL_LO12);
299 if (SymLoc == AArch64::S_TPREL && IsNC)
300 return R_CLS(TLSLE_LDST16_TPREL_LO12_NC);
301
302 reportError(L: Fixup.getLoc(),
303 Msg: "invalid fixup for 16-bit load/store instruction");
304 return ELF::R_AARCH64_NONE;
305 case AArch64::fixup_aarch64_ldst_imm12_scale4:
306 if (SymLoc == AArch64::S_ABS && IsNC)
307 return R_CLS(LDST32_ABS_LO12_NC);
308 if (SymLoc == AArch64::S_DTPREL && !IsNC)
309 return R_CLS(TLSLD_LDST32_DTPREL_LO12);
310 if (SymLoc == AArch64::S_DTPREL && IsNC)
311 return R_CLS(TLSLD_LDST32_DTPREL_LO12_NC);
312 if (SymLoc == AArch64::S_TPREL && !IsNC)
313 return R_CLS(TLSLE_LDST32_TPREL_LO12);
314 if (SymLoc == AArch64::S_TPREL && IsNC)
315 return R_CLS(TLSLE_LDST32_TPREL_LO12_NC);
316 if (SymLoc == AArch64::S_GOT && IsNC) {
317 if (IsILP32)
318 return ELF::R_AARCH64_P32_LD32_GOT_LO12_NC;
319 reportError(L: Fixup.getLoc(), Msg: "4 byte unchecked GOT load/store "
320 "relocation is not supported in LP64");
321 return ELF::R_AARCH64_NONE;
322 }
323 if (SymLoc == AArch64::S_GOT && !IsNC) {
324 if (IsILP32) {
325 reportError(
326 L: Fixup.getLoc(),
327 Msg: "4 byte checked GOT load/store relocation is not supported");
328 }
329 return ELF::R_AARCH64_NONE;
330 }
331 if (SymLoc == AArch64::S_GOTTPREL && IsNC) {
332 if (IsILP32)
333 return ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC;
334 reportError(L: Fixup.getLoc(), Msg: "32-bit load/store "
335 "relocation is not supported in LP64");
336 return ELF::R_AARCH64_NONE;
337 }
338 if (SymLoc == AArch64::S_TLSDESC && !IsNC) {
339 if (IsILP32)
340 return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12;
341 reportError(
342 L: Fixup.getLoc(),
343 Msg: "4 byte TLSDESC load/store relocation is not supported in LP64");
344 return ELF::R_AARCH64_NONE;
345 }
346
347 reportError(L: Fixup.getLoc(),
348 Msg: "invalid fixup for 32-bit load/store instruction "
349 "fixup_aarch64_ldst_imm12_scale4");
350 return ELF::R_AARCH64_NONE;
351 case AArch64::fixup_aarch64_ldst_imm12_scale8:
352 if (SymLoc == AArch64::S_ABS && IsNC)
353 return R_CLS(LDST64_ABS_LO12_NC);
354 if ((SymLoc == AArch64::S_GOT || SymLoc == AArch64::S_GOT_AUTH) && IsNC) {
355 AArch64::Specifier AddressLoc = AArch64::getAddressFrag(S: RefKind);
356 bool IsAuth = (SymLoc == AArch64::S_GOT_AUTH);
357 if (!IsILP32) {
358 if (AddressLoc == AArch64::S_LO15)
359 return ELF::R_AARCH64_LD64_GOTPAGE_LO15;
360 return (IsAuth ? ELF::R_AARCH64_AUTH_LD64_GOT_LO12_NC
361 : ELF::R_AARCH64_LD64_GOT_LO12_NC);
362 }
363 reportError(L: Fixup.getLoc(),
364 Msg: "64-bit load/store relocation is not supported in ILP32");
365 return ELF::R_AARCH64_NONE;
366 }
367 if (SymLoc == AArch64::S_DTPREL && !IsNC)
368 return R_CLS(TLSLD_LDST64_DTPREL_LO12);
369 if (SymLoc == AArch64::S_DTPREL && IsNC)
370 return R_CLS(TLSLD_LDST64_DTPREL_LO12_NC);
371 if (SymLoc == AArch64::S_TPREL && !IsNC)
372 return R_CLS(TLSLE_LDST64_TPREL_LO12);
373 if (SymLoc == AArch64::S_TPREL && IsNC)
374 return R_CLS(TLSLE_LDST64_TPREL_LO12_NC);
375 if (SymLoc == AArch64::S_GOTTPREL && IsNC) {
376 if (!IsILP32)
377 return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
378 reportError(L: Fixup.getLoc(),
379 Msg: "64-bit load/store relocation is not supported in ILP32");
380 return ELF::R_AARCH64_NONE;
381 }
382 if (SymLoc == AArch64::S_TLSDESC) {
383 if (!IsILP32)
384 return ELF::R_AARCH64_TLSDESC_LD64_LO12;
385 reportError(L: Fixup.getLoc(),
386 Msg: "64-bit load/store relocation is not supported in ILP32");
387 return ELF::R_AARCH64_NONE;
388 }
389 if (SymLoc == AArch64::S_TLSDESC_AUTH) {
390 if (!IsILP32)
391 return ELF::R_AARCH64_AUTH_TLSDESC_LD64_LO12;
392 reportError(
393 L: Fixup.getLoc(),
394 Msg: "64-bit load/store AUTH relocation is not supported in ILP32");
395 return ELF::R_AARCH64_NONE;
396 }
397 reportError(L: Fixup.getLoc(),
398 Msg: "invalid fixup for 64-bit load/store instruction");
399 return ELF::R_AARCH64_NONE;
400 case AArch64::fixup_aarch64_ldst_imm12_scale16:
401 if (SymLoc == AArch64::S_ABS && IsNC)
402 return R_CLS(LDST128_ABS_LO12_NC);
403 if (SymLoc == AArch64::S_DTPREL && !IsNC)
404 return R_CLS(TLSLD_LDST128_DTPREL_LO12);
405 if (SymLoc == AArch64::S_DTPREL && IsNC)
406 return R_CLS(TLSLD_LDST128_DTPREL_LO12_NC);
407 if (SymLoc == AArch64::S_TPREL && !IsNC)
408 return R_CLS(TLSLE_LDST128_TPREL_LO12);
409 if (SymLoc == AArch64::S_TPREL && IsNC)
410 return R_CLS(TLSLE_LDST128_TPREL_LO12_NC);
411
412 reportError(L: Fixup.getLoc(),
413 Msg: "invalid fixup for 128-bit load/store instruction");
414 return ELF::R_AARCH64_NONE;
415 // ILP32 case not reached here, tested with isNonILP32reloc
416 case AArch64::fixup_aarch64_movw:
417 if (RefKind == AArch64::S_ABS_G3)
418 return ELF::R_AARCH64_MOVW_UABS_G3;
419 if (RefKind == AArch64::S_ABS_G2)
420 return ELF::R_AARCH64_MOVW_UABS_G2;
421 if (RefKind == AArch64::S_ABS_G2_S)
422 return ELF::R_AARCH64_MOVW_SABS_G2;
423 if (RefKind == AArch64::S_ABS_G2_NC)
424 return ELF::R_AARCH64_MOVW_UABS_G2_NC;
425 if (RefKind == AArch64::S_ABS_G1)
426 return R_CLS(MOVW_UABS_G1);
427 if (RefKind == AArch64::S_ABS_G1_S)
428 return ELF::R_AARCH64_MOVW_SABS_G1;
429 if (RefKind == AArch64::S_ABS_G1_NC)
430 return ELF::R_AARCH64_MOVW_UABS_G1_NC;
431 if (RefKind == AArch64::S_ABS_G0)
432 return R_CLS(MOVW_UABS_G0);
433 if (RefKind == AArch64::S_ABS_G0_S)
434 return R_CLS(MOVW_SABS_G0);
435 if (RefKind == AArch64::S_ABS_G0_NC)
436 return R_CLS(MOVW_UABS_G0_NC);
437 if (RefKind == AArch64::S_PREL_G3)
438 return ELF::R_AARCH64_MOVW_PREL_G3;
439 if (RefKind == AArch64::S_PREL_G2)
440 return ELF::R_AARCH64_MOVW_PREL_G2;
441 if (RefKind == AArch64::S_PREL_G2_NC)
442 return ELF::R_AARCH64_MOVW_PREL_G2_NC;
443 if (RefKind == AArch64::S_PREL_G1)
444 return R_CLS(MOVW_PREL_G1);
445 if (RefKind == AArch64::S_PREL_G1_NC)
446 return ELF::R_AARCH64_MOVW_PREL_G1_NC;
447 if (RefKind == AArch64::S_PREL_G0)
448 return R_CLS(MOVW_PREL_G0);
449 if (RefKind == AArch64::S_PREL_G0_NC)
450 return R_CLS(MOVW_PREL_G0_NC);
451 if (RefKind == AArch64::S_DTPREL_G2)
452 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G2;
453 if (RefKind == AArch64::S_DTPREL_G1)
454 return R_CLS(TLSLD_MOVW_DTPREL_G1);
455 if (RefKind == AArch64::S_DTPREL_G1_NC)
456 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC;
457 if (RefKind == AArch64::S_DTPREL_G0)
458 return R_CLS(TLSLD_MOVW_DTPREL_G0);
459 if (RefKind == AArch64::S_DTPREL_G0_NC)
460 return R_CLS(TLSLD_MOVW_DTPREL_G0_NC);
461 if (RefKind == AArch64::S_TPREL_G2)
462 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G2;
463 if (RefKind == AArch64::S_TPREL_G1)
464 return R_CLS(TLSLE_MOVW_TPREL_G1);
465 if (RefKind == AArch64::S_TPREL_G1_NC)
466 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC;
467 if (RefKind == AArch64::S_TPREL_G0)
468 return R_CLS(TLSLE_MOVW_TPREL_G0);
469 if (RefKind == AArch64::S_TPREL_G0_NC)
470 return R_CLS(TLSLE_MOVW_TPREL_G0_NC);
471 if (RefKind == AArch64::S_GOTTPREL_G1)
472 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
473 if (RefKind == AArch64::S_GOTTPREL_G0_NC)
474 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
475 reportError(L: Fixup.getLoc(), Msg: "invalid fixup for movz/movk instruction");
476 return ELF::R_AARCH64_NONE;
477 default:
478 reportError(L: Fixup.getLoc(), Msg: "Unknown ELF relocation type");
479 return ELF::R_AARCH64_NONE;
480 }
481 }
482
483 llvm_unreachable("Unimplemented fixup -> relocation");
484}
485
486bool AArch64ELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
487 unsigned) const {
488 // For memory-tagged symbols, ensure that the relocation uses the symbol. For
489 // tagged symbols, we emit an empty relocation (R_AARCH64_NONE) in a special
490 // section (SHT_AARCH64_MEMTAG_GLOBALS_STATIC) to indicate to the linker that
491 // this global needs to be tagged. In addition, the linker needs to know
492 // whether to emit a special addend when relocating `end` symbols, and this
493 // can only be determined by the attributes of the symbol itself.
494 if (Val.getAddSym() &&
495 static_cast<const MCSymbolELF *>(Val.getAddSym())->isMemtag())
496 return true;
497
498 if ((Val.getSpecifier() & AArch64::S_GOT) == AArch64::S_GOT)
499 return true;
500 return is_contained(Set: {AArch64::S_GOTPCREL, AArch64::S_PLT},
501 Element: Val.getSpecifier());
502}
503
504void AArch64ELFObjectWriter::sortRelocs(
505 std::vector<ELFRelocationEntry> &Relocs) {
506 // PATCHINST relocations should be applied last because they may overwrite the
507 // whole instruction and so should take precedence over other relocations that
508 // modify operands of the original instruction.
509 std::stable_partition(first: Relocs.begin(), last: Relocs.end(),
510 pred: [](const ELFRelocationEntry &R) {
511 return R.Type != ELF::R_AARCH64_PATCHINST;
512 });
513}
514
515std::unique_ptr<MCObjectTargetWriter>
516llvm::createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32) {
517 return std::make_unique<AArch64ELFObjectWriter>(args&: OSABI, args&: IsILP32);
518}
519