1//===--- AMDGPUHWEvents.def -----------------------------------*- C++ -*---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains descriptions of the various hardware events that can
10// be tracked by the compiler.
11//
12//===----------------------------------------------------------------------===//
13
14// NOTE: NO INCLUDE GUARD DESIRED!
15
16// clang-format off
17
18#ifndef AMDGPU_LAST_HW_EVENT
19#define AMDGPU_LAST_HW_EVENT(X)
20#endif
21
22AMDGPU_HW_EVENT(VMEM_READ_ACCESS, 0) /* vmem read */
23AMDGPU_HW_EVENT(VMEM_SAMPLER_READ_ACCESS, 1) /* vmem SAMPLER read (gfx12+ only) */
24AMDGPU_HW_EVENT(VMEM_BVH_READ_ACCESS, 2) /* vmem BVH read (gfx12+ only) */
25AMDGPU_HW_EVENT(GLOBAL_INV_ACCESS, 3) /* GLOBAL_INV (gfx12+ only) */
26AMDGPU_HW_EVENT(VMEM_WRITE_ACCESS, 4) /* vmem write that is not scratch */
27AMDGPU_HW_EVENT(SCRATCH_WRITE_ACCESS, 5) /* vmwrite that may be scratch */
28AMDGPU_HW_EVENT(VMEM_GROUP, 6) /* vmem group */
29AMDGPU_HW_EVENT(LDS_ACCESS, 7) /* lds read & write */
30AMDGPU_HW_EVENT(GDS_ACCESS, 8) /* gds read & write */
31AMDGPU_HW_EVENT(SQ_MESSAGE, 9) /* send message */
32AMDGPU_HW_EVENT(SCC_WRITE, 10) /* write to SCC from barrier */
33AMDGPU_HW_EVENT(SMEM_ACCESS, 11) /* scalar-memory read & write */
34AMDGPU_HW_EVENT(SMEM_GROUP, 12) /* scalar-memory group */
35AMDGPU_HW_EVENT(EXP_GPR_LOCK, 13) /* export holding on its data src */
36AMDGPU_HW_EVENT(GDS_GPR_LOCK, 14) /* GDS holding on its data and addr src */
37AMDGPU_HW_EVENT(EXP_POS_ACCESS, 15) /* write to export position */
38AMDGPU_HW_EVENT(EXP_PARAM_ACCESS, 16) /* write to export parameter */
39AMDGPU_HW_EVENT(VMW_GPR_LOCK, 17) /* vmem write holding on its data src */
40AMDGPU_HW_EVENT(EXP_LDS_ACCESS, 18) /* read by ldsdir counting as export */
41AMDGPU_HW_EVENT(VGPR_CSMACC_WRITE, 19) /* write VGPR dest in Core/Side-MACC VALU */
42AMDGPU_HW_EVENT(VGPR_DPMACC_WRITE, 20) /* write VGPR dest in DPMACC VALU */
43AMDGPU_HW_EVENT(VGPR_TRANS_WRITE, 21) /* write VGPR dest in TRANS VALU */
44AMDGPU_HW_EVENT(VGPR_XDL_WRITE, 22) /* write VGPR dest in XDL VALU */
45AMDGPU_HW_EVENT(VGPR_LDS_READ, 23) /* read VGPR source in LDS */
46AMDGPU_HW_EVENT(VGPR_FLAT_READ, 24) /* read VGPR source in FLAT */
47AMDGPU_HW_EVENT(VGPR_VMEM_READ, 25) /* read VGPR source in other VMEM */
48AMDGPU_HW_EVENT(ASYNC_ACCESS, 26) /* access that uses ASYNC_CNT */
49AMDGPU_HW_EVENT(TENSOR_ACCESS, 27) /* access that uses TENSOR_CNT */
50
51AMDGPU_LAST_HW_EVENT(TENSOR_ACCESS)
52
53
54// clang-format on
55
56#undef AMDGPU_HW_EVENT
57#undef AMDGPU_LAST_HW_EVENT
58