1//===- DXILShaderFlags.cpp - DXIL Shader Flags helper objects -------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file This file contains helper objects and APIs for working with DXIL
10/// Shader Flags.
11///
12//===----------------------------------------------------------------------===//
13
14#include "DXILShaderFlags.h"
15#include "DirectX.h"
16#include "llvm/ADT/SCCIterator.h"
17#include "llvm/ADT/SmallVector.h"
18#include "llvm/Analysis/CallGraph.h"
19#include "llvm/Analysis/DXILResource.h"
20#include "llvm/IR/Attributes.h"
21#include "llvm/IR/DiagnosticInfo.h"
22#include "llvm/IR/Instruction.h"
23#include "llvm/IR/Instructions.h"
24#include "llvm/IR/IntrinsicInst.h"
25#include "llvm/IR/Intrinsics.h"
26#include "llvm/IR/IntrinsicsDirectX.h"
27#include "llvm/IR/Module.h"
28#include "llvm/InitializePasses.h"
29#include "llvm/Support/FormatVariadic.h"
30#include "llvm/Support/raw_ostream.h"
31
32using namespace llvm;
33using namespace llvm::dxil;
34
35static bool hasUAVsAtEveryStage(const DXILResourceMap &DRM,
36 const ModuleMetadataInfo &MMDI) {
37 // Heap resources do not count towards hasUAVsAtEveryStage.
38 bool HasUAVWithBinding = any_of(
39 Range: DRM.uavs(), P: [](const ResourceInfo &RI) { return RI.hasBinding(); });
40 if (!HasUAVWithBinding)
41 return false;
42
43 switch (MMDI.ShaderProfile) {
44 default:
45 return false;
46 case Triple::EnvironmentType::Compute:
47 case Triple::EnvironmentType::Pixel:
48 return false;
49 case Triple::EnvironmentType::Vertex:
50 case Triple::EnvironmentType::Geometry:
51 case Triple::EnvironmentType::Hull:
52 case Triple::EnvironmentType::Domain:
53 return true;
54 case Triple::EnvironmentType::Library:
55 case Triple::EnvironmentType::RayGeneration:
56 case Triple::EnvironmentType::Intersection:
57 case Triple::EnvironmentType::AnyHit:
58 case Triple::EnvironmentType::ClosestHit:
59 case Triple::EnvironmentType::Miss:
60 case Triple::EnvironmentType::Callable:
61 case Triple::EnvironmentType::Mesh:
62 case Triple::EnvironmentType::Amplification:
63 return MMDI.ValidatorVersion < VersionTuple(1, 8);
64 }
65}
66
67static bool checkWaveOps(Intrinsic::ID IID) {
68 // Currently unsupported intrinsics
69 // case Intrinsic::dx_wave_readfirst:
70 // case Intrinsic::dx_wave_reduce.and:
71 // case Intrinsic::dx_wave_reduce.or:
72 // case Intrinsic::dx_wave_reduce.xor:
73 // case Intrinsic::dx_wave_prefixop:
74 // case Intrinsic::dx_quad.readat:
75 // case Intrinsic::dx_quad.readacrossy:
76 // case Intrinsic::dx_quad.readacrossdiagonal:
77 // case Intrinsic::dx_wave_prefixballot:
78 // case Intrinsic::dx_wave_match:
79 // case Intrinsic::dx_wavemulti.*:
80 // case Intrinsic::dx_wavemulti.ballot:
81 // case Intrinsic::dx_quad.vote:
82 switch (IID) {
83 default:
84 return false;
85 case Intrinsic::dx_wave_is_first_lane:
86 case Intrinsic::dx_wave_getlaneindex:
87 case Intrinsic::dx_wave_get_lane_count:
88 case Intrinsic::dx_wave_any:
89 case Intrinsic::dx_wave_all_equal:
90 case Intrinsic::dx_wave_all:
91 case Intrinsic::dx_wave_readlane:
92 case Intrinsic::dx_wave_active_countbits:
93 case Intrinsic::dx_wave_ballot:
94 case Intrinsic::dx_wave_prefix_bit_count:
95 // Wave Active Op Variants
96 case Intrinsic::dx_wave_reduce_or:
97 case Intrinsic::dx_wave_reduce_xor:
98 case Intrinsic::dx_wave_reduce_and:
99 case Intrinsic::dx_wave_reduce_sum:
100 case Intrinsic::dx_wave_reduce_usum:
101 case Intrinsic::dx_wave_product:
102 case Intrinsic::dx_wave_uproduct:
103 case Intrinsic::dx_wave_reduce_max:
104 case Intrinsic::dx_wave_reduce_umax:
105 case Intrinsic::dx_wave_reduce_min:
106 case Intrinsic::dx_wave_reduce_umin:
107 // Wave Prefix Op Variants
108 case Intrinsic::dx_wave_prefix_sum:
109 case Intrinsic::dx_wave_prefix_usum:
110 case Intrinsic::dx_wave_prefix_product:
111 case Intrinsic::dx_wave_prefix_uproduct:
112 // Quad Op Variants
113 case Intrinsic::dx_quad_read_across_x:
114 case Intrinsic::dx_quad_read_across_y:
115 case Intrinsic::dx_quad_read_across_diagonal:
116 return true;
117 }
118}
119
120static bool checkDoubleExtensionOps(Intrinsic::ID IID) {
121 switch (IID) {
122 default:
123 return false;
124 case Intrinsic::fma:
125 return true;
126 }
127}
128
129/// Texture load and sample operations accept "programmable offsets", i.e.
130/// offsets that are not compile-time constants. Such offsets require the
131/// AdvancedTextureOps shader feature flag. Returns true if \p II is one of
132/// those operations and its offsets operand is not a constant.
133static bool checkAdvancedTextureOps(const IntrinsicInst &II) {
134 // TODO: (#116137) Several other DXIL ops also require this feature flag, but
135 // none of them can be generated yet:
136 // - SampleCmp, SampleCmpBias, SampleCmpGrad and SampleCmpLevelZero set the
137 // flag for non-constant offsets, exactly like the ops handled below.
138 // - SampleCmpLevel, TextureGatherRaw and TextureStoreSample set the flag
139 // unconditionally, and have no intrinsics yet.
140
141 // The offsets operand index differs between the intrinsics.
142 unsigned OffsetsIdx;
143 switch (II.getIntrinsicID()) {
144 default:
145 return false;
146 case Intrinsic::dx_resource_load_level:
147 case Intrinsic::dx_resource_sample:
148 case Intrinsic::dx_resource_sample_clamp:
149 OffsetsIdx = 3;
150 break;
151 case Intrinsic::dx_resource_samplebias:
152 case Intrinsic::dx_resource_samplebias_clamp:
153 case Intrinsic::dx_resource_samplelevel:
154 OffsetsIdx = 4;
155 break;
156 case Intrinsic::dx_resource_samplegrad:
157 case Intrinsic::dx_resource_samplegrad_clamp:
158 OffsetsIdx = 5;
159 break;
160 }
161 return !isa<Constant>(Val: II.getArgOperand(i: OffsetsIdx));
162}
163
164static bool isOptimizationDisabled(const Module &M) {
165 const StringRef Key = "dx.disable_optimizations";
166 if (auto *Flag = mdconst::extract_or_null<ConstantInt>(MD: M.getModuleFlag(Key)))
167 return Flag->getValue().getBoolValue();
168 return false;
169}
170
171// Checks to see if the status bit from a load with status
172// instruction is ever extracted. If it is, the module needs
173// to have the TiledResources shader flag set.
174bool checkIfStatusIsExtracted(const IntrinsicInst &II) {
175 [[maybe_unused]] Intrinsic::ID IID = II.getIntrinsicID();
176 assert(IID == Intrinsic::dx_resource_load_typedbuffer ||
177 IID == Intrinsic::dx_resource_load_rawbuffer &&
178 "unexpected intrinsic ID");
179 for (const User *U : II.users()) {
180 if (const ExtractValueInst *EVI = dyn_cast<ExtractValueInst>(Val: U)) {
181 // Resource load operations return a {result, status} pair.
182 // Check if we extract the status
183 if (EVI->getNumIndices() == 1 && EVI->getIndices()[0] == 1)
184 return true;
185 }
186 }
187
188 return false;
189}
190
191/// Update the shader flags mask based on the given instruction.
192/// \param CSF Shader flags mask to update.
193/// \param I Instruction to check.
194void ModuleShaderFlags::updateFunctionFlags(ComputedShaderFlags &CSF,
195 const Instruction &I,
196 DXILResourceTypeMap &DRTM,
197 const ModuleMetadataInfo &MMDI) {
198 if (!CSF.Doubles)
199 CSF.Doubles = I.getType()->getScalarType()->isDoubleTy();
200
201 if (!CSF.Doubles) {
202 for (const Value *Op : I.operands()) {
203 if (Op->getType()->getScalarType()->isDoubleTy()) {
204 CSF.Doubles = true;
205 break;
206 }
207 }
208 }
209
210 if (CSF.Doubles) {
211 switch (I.getOpcode()) {
212 case Instruction::FDiv:
213 case Instruction::UIToFP:
214 case Instruction::SIToFP:
215 case Instruction::FPToUI:
216 case Instruction::FPToSI:
217 CSF.DX11_1_DoubleExtensions = true;
218 break;
219 }
220 }
221
222 if (!CSF.LowPrecisionPresent)
223 CSF.LowPrecisionPresent = I.getType()->getScalarType()->isIntegerTy(BitWidth: 16) ||
224 I.getType()->getScalarType()->isHalfTy();
225
226 if (!CSF.LowPrecisionPresent) {
227 for (const Value *Op : I.operands()) {
228 if (Op->getType()->getScalarType()->isIntegerTy(BitWidth: 16) ||
229 Op->getType()->getScalarType()->isHalfTy()) {
230 CSF.LowPrecisionPresent = true;
231 break;
232 }
233 }
234 }
235
236 if (CSF.LowPrecisionPresent) {
237 if (CSF.NativeLowPrecisionMode)
238 CSF.NativeLowPrecision = true;
239 else
240 CSF.MinimumPrecision = true;
241 }
242
243 if (!CSF.Int64Ops)
244 CSF.Int64Ops = I.getType()->getScalarType()->isIntegerTy(BitWidth: 64);
245
246 if (!CSF.Int64Ops && !isa<LifetimeIntrinsic>(Val: &I)) {
247 for (const Value *Op : I.operands()) {
248 if (Op->getType()->getScalarType()->isIntegerTy(BitWidth: 64)) {
249 CSF.Int64Ops = true;
250 break;
251 }
252 }
253 }
254
255 if (const auto *II = dyn_cast<IntrinsicInst>(Val: &I)) {
256 CSF.AdvancedTextureOps |= checkAdvancedTextureOps(II: *II);
257
258 switch (II->getIntrinsicID()) {
259 default:
260 break;
261 case Intrinsic::dx_resource_handlefrombinding: {
262 dxil::ResourceTypeInfo &RTI = DRTM[cast<TargetExtType>(Val: II->getType())];
263
264 // Set ResMayNotAlias if DXIL validator version >= 1.8 and the function
265 // uses UAVs
266 if (!CSF.ResMayNotAlias && CanSetResMayNotAlias &&
267 MMDI.ValidatorVersion >= VersionTuple(1, 8) && RTI.isUAV())
268 CSF.ResMayNotAlias = true;
269
270 switch (RTI.getResourceKind()) {
271 case dxil::ResourceKind::StructuredBuffer:
272 case dxil::ResourceKind::RawBuffer:
273 CSF.EnableRawAndStructuredBuffers = true;
274 break;
275 default:
276 break;
277 }
278 break;
279 }
280 case Intrinsic::dx_resource_handlefromheap: {
281 dxil::ResourceTypeInfo &RTI = DRTM[cast<TargetExtType>(Val: II->getType())];
282 bool IsSamplerHeap = RTI.isSampler();
283 CSF.SamplerDescriptorHeapIndexing |= IsSamplerHeap;
284 CSF.ResourceDescriptorHeapIndexing |= !IsSamplerHeap;
285
286 if (!CSF.ResMayNotAlias && CanSetResMayNotAlias && RTI.isUAV() &&
287 MMDI.ValidatorVersion >= VersionTuple(1, 8)) {
288 CSF.ResMayNotAlias = true;
289 }
290 break;
291 }
292 case Intrinsic::dx_resource_load_typedbuffer: {
293 dxil::ResourceTypeInfo &RTI =
294 DRTM[cast<TargetExtType>(Val: II->getArgOperand(i: 0)->getType())];
295 if (RTI.isTyped() && RTI.isUAV())
296 CSF.TypedUAVLoadAdditionalFormats |= RTI.getTyped().ElementCount > 1;
297 if (!CSF.TiledResources && checkIfStatusIsExtracted(II: *II))
298 CSF.TiledResources = true;
299 break;
300 }
301 case Intrinsic::dx_resource_load_rawbuffer: {
302 if (!CSF.TiledResources && checkIfStatusIsExtracted(II: *II))
303 CSF.TiledResources = true;
304 break;
305 }
306 case Intrinsic::dx_resource_atomic_binop: {
307 if (II->getType()->isIntegerTy(BitWidth: 64)) {
308 dxil::ResourceTypeInfo &RTI =
309 DRTM[cast<TargetExtType>(Val: II->getArgOperand(i: 0)->getType())];
310 if (RTI.isTyped())
311 CSF.AtomicInt64OnTypedResource = true;
312 // TODO(https://github.com/llvm/llvm-project/issues/116152): Set
313 // AtomicInt64OnHeapResource when heap-resource intrinsics are added.
314 }
315 break;
316 }
317 }
318 }
319 // 64-bit atomics on groupshared memory (address space 3).
320 if (const auto *ARMW = dyn_cast<AtomicRMWInst>(Val: &I)) {
321 if (ARMW->getValOperand()->getType()->isIntegerTy(BitWidth: 64) &&
322 ARMW->getPointerAddressSpace() == 3)
323 CSF.AtomicInt64OnGroupShared = true;
324 } else if (const auto *AXCG = dyn_cast<AtomicCmpXchgInst>(Val: &I)) {
325 if (AXCG->getNewValOperand()->getType()->isIntegerTy(BitWidth: 64) &&
326 AXCG->getPointerAddressSpace() == 3)
327 CSF.AtomicInt64OnGroupShared = true;
328 }
329 // Handle call instructions
330 if (auto *CI = dyn_cast<CallInst>(Val: &I)) {
331 const Function *CF = CI->getCalledFunction();
332 // Merge-in shader flags mask of the called function in the current module
333 if (FunctionFlags.contains(Val: CF))
334 CSF.merge(CSF: FunctionFlags[CF]);
335
336 CSF.DX11_1_DoubleExtensions |=
337 checkDoubleExtensionOps(IID: CI->getIntrinsicID());
338 CSF.WaveOps |= checkWaveOps(IID: CI->getIntrinsicID());
339 }
340}
341
342/// Set shader flags that apply to all functions within the module
343ComputedShaderFlags
344ModuleShaderFlags::gatherGlobalModuleFlags(const Module &M,
345 const DXILResourceMap &DRM,
346 const ModuleMetadataInfo &MMDI) {
347
348 ComputedShaderFlags CSF;
349
350 CSF.DisableOptimizations = isOptimizationDisabled(M);
351
352 CSF.UAVsAtEveryStage = hasUAVsAtEveryStage(DRM, MMDI);
353
354 // Set the Max64UAVs flag if the number of UAVs is > 8
355 uint32_t NumUAVs = 0;
356 for (auto &UAV : DRM.uavs()) {
357 // Heap resources do not count towards Max64UAVs flag.
358 if (!UAV.hasBinding())
359 continue;
360 if (MMDI.ValidatorVersion < VersionTuple(1, 6)) {
361 NumUAVs++;
362 } else { // MMDI.ValidatorVersion >= VersionTuple(1, 6)
363 uint32_t Size = UAV.getSize();
364 uint32_t NewNum = NumUAVs + (Size == 0 ? ~0U : Size);
365 if (NewNum < NumUAVs)
366 NewNum = ~0U;
367 NumUAVs = NewNum;
368 }
369 }
370 if (NumUAVs > 8)
371 CSF.Max64UAVs = true;
372
373 // Set the module flag that enables native low-precision execution mode.
374 // NativeLowPrecisionMode can only be set when the command line option
375 // -enable-16bit-types is provided. This is indicated by the dx.nativelowprec
376 // module flag being set
377 // This flag is needed even if the module does not use 16-bit types because a
378 // corresponding debug module may include 16-bit types, and tools that use the
379 // debug module may expect it to have the same flags as the original
380 if (auto *NativeLowPrec = mdconst::extract_or_null<ConstantInt>(
381 MD: M.getModuleFlag(Key: "dx.nativelowprec")))
382 if (MMDI.ShaderModelVersion >= VersionTuple(6, 2))
383 CSF.NativeLowPrecisionMode = NativeLowPrec->getValue().getBoolValue();
384
385 // Set ResMayNotAlias to true if DXIL validator version < 1.8 and there
386 // are UAVs present globally.
387 if (CanSetResMayNotAlias && MMDI.ValidatorVersion < VersionTuple(1, 8))
388 CSF.ResMayNotAlias = !DRM.uavs().empty();
389
390 // The command line option -all-resources-bound will set the
391 // dx.allresourcesbound module flag to 1
392 if (auto *AllResourcesBound = mdconst::extract_or_null<ConstantInt>(
393 MD: M.getModuleFlag(Key: "dx.allresourcesbound")))
394 if (AllResourcesBound->getValue().getBoolValue())
395 CSF.AllResourcesBound = true;
396
397 return CSF;
398}
399
400/// Construct ModuleShaderFlags for module Module M
401void ModuleShaderFlags::initialize(Module &M, DXILResourceTypeMap &DRTM,
402 const DXILResourceMap &DRM,
403 const ModuleMetadataInfo &MMDI) {
404
405 CanSetResMayNotAlias = MMDI.DXILVersion >= VersionTuple(1, 7);
406 // The command line option -res-may-alias will set the dx.resmayalias module
407 // flag to 1, thereby disabling the ability to set the ResMayNotAlias flag
408 if (auto *ResMayAlias = mdconst::extract_or_null<ConstantInt>(
409 MD: M.getModuleFlag(Key: "dx.resmayalias")))
410 if (ResMayAlias->getValue().getBoolValue())
411 CanSetResMayNotAlias = false;
412
413 ComputedShaderFlags GlobalSFMask = gatherGlobalModuleFlags(M, DRM, MMDI);
414
415 CallGraph CG(M);
416
417 // Compute Shader Flags Mask for all functions using post-order visit of SCC
418 // of the call graph.
419 for (scc_iterator<CallGraph *> SCCI = scc_begin(G: &CG); !SCCI.isAtEnd();
420 ++SCCI) {
421 const std::vector<CallGraphNode *> &CurSCC = *SCCI;
422
423 // Union of shader masks of all functions in CurSCC
424 ComputedShaderFlags SCCSF;
425 // List of functions in CurSCC that are neither external nor declarations
426 // and hence whose flags are collected
427 SmallVector<Function *> CurSCCFuncs;
428 for (CallGraphNode *CGN : CurSCC) {
429 Function *F = CGN->getFunction();
430 if (!F)
431 continue;
432
433 if (F->isDeclaration()) {
434 assert(!F->getName().starts_with("dx.op.") &&
435 "DXIL Shader Flag analysis should not be run post-lowering.");
436 continue;
437 }
438
439 ComputedShaderFlags CSF = GlobalSFMask;
440 for (const auto &BB : *F)
441 for (const auto &I : BB)
442 updateFunctionFlags(CSF, I, DRTM, MMDI);
443 // Update combined shader flags mask for all functions in this SCC
444 SCCSF.merge(CSF);
445
446 CurSCCFuncs.push_back(Elt: F);
447 }
448
449 // Update combined shader flags mask for all functions of the module
450 CombinedSFMask.merge(CSF: SCCSF);
451
452 // Shader flags mask of each of the functions in an SCC of the call graph is
453 // the union of all functions in the SCC. Update shader flags masks of
454 // functions in CurSCC accordingly. This is trivially true if SCC contains
455 // one function.
456 for (Function *F : CurSCCFuncs)
457 // Merge SCCSF with that of F
458 FunctionFlags[F].merge(CSF: SCCSF);
459 }
460}
461
462void ComputedShaderFlags::print(raw_ostream &OS) const {
463 uint64_t FlagVal = (uint64_t) * this;
464 OS << formatv(Fmt: "; Shader Flags Value: {0:x8}\n;\n", Vals&: FlagVal);
465 if (FlagVal == 0)
466 return;
467 OS << "; Note: shader requires additional functionality:\n";
468#define SHADER_FEATURE_FLAG(FeatureBit, DxilModuleNum, FlagName, Str) \
469 if (FlagName) \
470 (OS << ";").indent(7) << Str << "\n";
471#include "llvm/BinaryFormat/DXContainerConstants.def"
472 OS << "; Note: extra DXIL module flags:\n";
473#define DXIL_MODULE_FLAG(DxilModuleBit, FlagName, Str) \
474 if (FlagName) \
475 (OS << ";").indent(7) << Str << "\n";
476#include "llvm/BinaryFormat/DXContainerConstants.def"
477 OS << ";\n";
478}
479
480/// Return the shader flags mask of the specified function Func.
481const ComputedShaderFlags &
482ModuleShaderFlags::getFunctionFlags(const Function *Func) const {
483 auto Iter = FunctionFlags.find(Val: Func);
484 assert((Iter != FunctionFlags.end() && Iter->first == Func) &&
485 "Get Shader Flags : No Shader Flags Mask exists for function");
486 return Iter->second;
487}
488
489//===----------------------------------------------------------------------===//
490// ShaderFlagsAnalysis and ShaderFlagsAnalysisPrinterPass
491
492// Provide an explicit template instantiation for the static ID.
493AnalysisKey ShaderFlagsAnalysis::Key;
494
495ModuleShaderFlags ShaderFlagsAnalysis::run(Module &M,
496 ModuleAnalysisManager &AM) {
497 DXILResourceTypeMap &DRTM = AM.getResult<DXILResourceTypeAnalysis>(IR&: M);
498 DXILResourceMap &DRM = AM.getResult<DXILResourceAnalysis>(IR&: M);
499 const ModuleMetadataInfo MMDI = AM.getResult<DXILMetadataAnalysis>(IR&: M);
500
501 ModuleShaderFlags MSFI;
502 MSFI.initialize(M, DRTM, DRM, MMDI);
503
504 return MSFI;
505}
506
507PreservedAnalyses ShaderFlagsAnalysisPrinter::run(Module &M,
508 ModuleAnalysisManager &AM) {
509 const ModuleShaderFlags &FlagsInfo = AM.getResult<ShaderFlagsAnalysis>(IR&: M);
510 // Print description of combined shader flags for all module functions
511 OS << "; Combined Shader Flags for Module\n";
512 FlagsInfo.getCombinedFlags().print(OS);
513 // Print shader flags mask for each of the module functions
514 OS << "; Shader Flags for Module Functions\n";
515 for (const auto &F : M.getFunctionList()) {
516 if (F.isDeclaration())
517 continue;
518 const ComputedShaderFlags &SFMask = FlagsInfo.getFunctionFlags(Func: &F);
519 OS << formatv(Fmt: "; Function {0} : {1:x8}\n;\n", Vals: F.getName(),
520 Vals: (uint64_t)(SFMask));
521 }
522
523 return PreservedAnalyses::all();
524}
525
526//===----------------------------------------------------------------------===//
527// ShaderFlagsAnalysis and ShaderFlagsAnalysisPrinterPass
528
529bool ShaderFlagsAnalysisWrapper::runOnModule(Module &M) {
530 DXILResourceTypeMap &DRTM =
531 getAnalysis<DXILResourceTypeWrapperPass>().getResourceTypeMap();
532 DXILResourceMap &DRM =
533 getAnalysis<DXILResourceWrapperPass>().getResourceMap();
534 const ModuleMetadataInfo MMDI =
535 getAnalysis<DXILMetadataAnalysisWrapperPass>().getModuleMetadata();
536
537 MSFI.initialize(M, DRTM, DRM, MMDI);
538 return false;
539}
540
541void ShaderFlagsAnalysisWrapper::getAnalysisUsage(AnalysisUsage &AU) const {
542 AU.setPreservesAll();
543 AU.addRequiredTransitive<DXILResourceTypeWrapperPass>();
544 AU.addRequiredTransitive<DXILResourceWrapperPass>();
545 AU.addRequired<DXILMetadataAnalysisWrapperPass>();
546}
547
548char ShaderFlagsAnalysisWrapper::ID = 0;
549
550INITIALIZE_PASS_BEGIN(ShaderFlagsAnalysisWrapper, "dx-shader-flag-analysis",
551 "DXIL Shader Flag Analysis", true, true)
552INITIALIZE_PASS_DEPENDENCY(DXILResourceTypeWrapperPass)
553INITIALIZE_PASS_DEPENDENCY(DXILMetadataAnalysisWrapperPass)
554INITIALIZE_PASS_END(ShaderFlagsAnalysisWrapper, "dx-shader-flag-analysis",
555 "DXIL Shader Flag Analysis", true, true)
556