1//===- HexagonInstPrinter.cpp - Convert Hexagon MCInst to assembly syntax -===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This class prints an Hexagon MCInst to a .s file.
10//
11//===----------------------------------------------------------------------===//
12
13#include "HexagonInstPrinter.h"
14#include "MCTargetDesc/HexagonBaseInfo.h"
15#include "MCTargetDesc/HexagonMCInstrInfo.h"
16#include "llvm/MC/MCAsmInfo.h"
17#include "llvm/MC/MCExpr.h"
18#include "llvm/MC/MCInst.h"
19#include "llvm/Support/Debug.h"
20#include "llvm/Support/raw_ostream.h"
21
22using namespace llvm;
23
24#define DEBUG_TYPE "asm-printer"
25
26#define GET_INSTRUCTION_NAME
27#include "HexagonGenAsmWriter.inc"
28
29void HexagonInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) {
30 O << getRegisterName(Reg);
31}
32
33void HexagonInstPrinter::printInst(const MCInst *MI, uint64_t Address,
34 StringRef Annot, const MCSubtargetInfo &STI,
35 raw_ostream &OS) {
36 if (HexagonMCInstrInfo::isDuplex(MCII: MII, MCI: *MI)) {
37 printInstruction(MI: MI->getOperand(i: 1).getInst(), Address, O&: OS);
38 OS << '\v';
39 HasExtender = false;
40 printInstruction(MI: MI->getOperand(i: 0).getInst(), Address, O&: OS);
41 } else {
42 printInstruction(MI, Address, O&: OS);
43 }
44 HasExtender = HexagonMCInstrInfo::isImmext(MCI: *MI);
45 if ((MI->getOpcode() & HexagonII::INST_PARSE_MASK) ==
46 HexagonII::INST_PARSE_PACKET_END)
47 HasExtender = false;
48}
49
50void HexagonInstPrinter::printOperand(MCInst const *MI, unsigned OpNo,
51 raw_ostream &O) const {
52 if (HexagonMCInstrInfo::getExtendableOp(MCII: MII, MCI: *MI) == OpNo &&
53 (HasExtender || HexagonMCInstrInfo::isConstExtended(MCII: MII, MCI: *MI)))
54 O << "#";
55 MCOperand const &MO = MI->getOperand(i: OpNo);
56 if (MO.isReg()) {
57 O << getRegisterName(Reg: MO.getReg());
58 } else if (MO.isExpr()) {
59 int64_t Value;
60 if (MO.getExpr()->evaluateAsAbsolute(Res&: Value))
61 O << formatImm(Value);
62 else
63 MAI.printExpr(O, *MO.getExpr());
64 } else {
65 llvm_unreachable("Unknown operand");
66 }
67}
68
69void HexagonInstPrinter::printBrtarget(MCInst const *MI, unsigned OpNo,
70 raw_ostream &O) const {
71 MCOperand const &MO = MI->getOperand(i: OpNo);
72 assert (MO.isExpr());
73 MCExpr const &Expr = *MO.getExpr();
74 int64_t Value;
75 if (Expr.evaluateAsAbsolute(Res&: Value))
76 O << format(Fmt: "0x%" PRIx64, Vals: Value);
77 else {
78 if (HasExtender || HexagonMCInstrInfo::isConstExtended(MCII: MII, MCI: *MI))
79 if (HexagonMCInstrInfo::getExtendableOp(MCII: MII, MCI: *MI) == OpNo)
80 O << "##";
81 MAI.printExpr(O, Expr);
82 }
83}
84