1//===-- LanaiAsmBackend.cpp - Lanai Assembler Backend ---------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "LanaiFixupKinds.h"
10#include "MCTargetDesc/LanaiMCTargetDesc.h"
11#include "llvm/MC/MCAsmBackend.h"
12#include "llvm/MC/MCAssembler.h"
13#include "llvm/MC/MCELFObjectWriter.h"
14#include "llvm/MC/MCObjectWriter.h"
15#include "llvm/MC/MCSubtargetInfo.h"
16#include "llvm/MC/MCValue.h"
17#include "llvm/Support/ErrorHandling.h"
18#include "llvm/Support/raw_ostream.h"
19
20using namespace llvm;
21
22// Prepare value for the target space
23static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
24 switch (Kind) {
25 case FK_Data_1:
26 case FK_Data_2:
27 case FK_Data_4:
28 case FK_Data_8:
29 return Value;
30 case Lanai::FIXUP_LANAI_21:
31 case Lanai::FIXUP_LANAI_21_F:
32 case Lanai::FIXUP_LANAI_25:
33 case Lanai::FIXUP_LANAI_32:
34 case Lanai::FIXUP_LANAI_HI16:
35 case Lanai::FIXUP_LANAI_LO16:
36 return Value;
37 default:
38 llvm_unreachable("Unknown fixup kind!");
39 }
40}
41
42namespace {
43class LanaiAsmBackend : public MCAsmBackend {
44 Triple::OSType OSType;
45
46public:
47 LanaiAsmBackend(const Target &T, Triple::OSType OST)
48 : MCAsmBackend(llvm::endianness::big), OSType(OST) {}
49
50 void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target,
51 uint8_t *Data, uint64_t Value, bool IsResolved) override;
52
53 std::unique_ptr<MCObjectTargetWriter>
54 createObjectTargetWriter() const override;
55
56 MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
57
58 bool writeNopData(raw_ostream &OS, uint64_t Count,
59 const MCSubtargetInfo *STI) const override;
60};
61
62bool LanaiAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
63 const MCSubtargetInfo *STI) const {
64 if ((Count % 4) != 0)
65 return false;
66
67 for (uint64_t i = 0; i < Count; i += 4)
68 OS.write(Ptr: "\x15\0\0\0", Size: 4);
69
70 return true;
71}
72
73void LanaiAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
74 const MCValue &Target, uint8_t *Data,
75 uint64_t Value, bool IsResolved) {
76 if (!IsResolved)
77 Asm->getWriter().recordRelocation(F, Fixup, Target, FixedValue&: Value);
78
79 MCFixupKind Kind = Fixup.getKind();
80 Value = adjustFixupValue(Kind: static_cast<unsigned>(Kind), Value);
81 if (!Value)
82 return; // This value doesn't change the encoding
83
84 // Where in the object and where the number of bytes that need
85 // fixing up
86 unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
87 unsigned FullSize = 4;
88
89 // Grab current value, if any, from bits.
90 uint64_t CurVal = 0;
91
92 // Load instruction and apply value
93 for (unsigned i = 0; i != NumBytes; ++i) {
94 unsigned Idx = (FullSize - 1 - i);
95 CurVal |= static_cast<uint64_t>(static_cast<uint8_t>(Data[Idx])) << (i * 8);
96 }
97
98 uint64_t Mask =
99 (static_cast<uint64_t>(-1) >> (64 - getFixupKindInfo(Kind).TargetSize));
100 CurVal |= Value & Mask;
101
102 // Write out the fixed up bytes back to the code/data bits.
103 for (unsigned i = 0; i != NumBytes; ++i) {
104 unsigned Idx = (FullSize - 1 - i);
105 Data[Idx] = static_cast<uint8_t>((CurVal >> (i * 8)) & 0xff);
106 }
107}
108
109std::unique_ptr<MCObjectTargetWriter>
110LanaiAsmBackend::createObjectTargetWriter() const {
111 return createLanaiELFObjectWriter(OSABI: MCELFObjectTargetWriter::getOSABI(OSType));
112}
113
114MCFixupKindInfo LanaiAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
115 static const MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds] = {
116 // This table *must* be in same the order of fixup_* kinds in
117 // LanaiFixupKinds.h.
118 // Note: The number of bits indicated here are assumed to be contiguous.
119 // This does not hold true for LANAI_21 and LANAI_21_F which are applied
120 // to bits 0x7cffff and 0x7cfffc, respectively. Since the 'bits' counts
121 // here are used only for cosmetic purposes, we set the size to 16 bits
122 // for these 21-bit relocation as llvm/lib/MC/MCAsmStreamer.cpp checks
123 // no bits are set in the fixup range.
124 //
125 // name offset bits flags
126 {.Name: "FIXUP_LANAI_NONE", .TargetOffset: 0, .TargetSize: 32, .Flags: 0},
127 {.Name: "FIXUP_LANAI_21", .TargetOffset: 16, .TargetSize: 16 /*21*/, .Flags: 0},
128 {.Name: "FIXUP_LANAI_21_F", .TargetOffset: 16, .TargetSize: 16 /*21*/, .Flags: 0},
129 {.Name: "FIXUP_LANAI_25", .TargetOffset: 7, .TargetSize: 25, .Flags: 0},
130 {.Name: "FIXUP_LANAI_32", .TargetOffset: 0, .TargetSize: 32, .Flags: 0},
131 {.Name: "FIXUP_LANAI_HI16", .TargetOffset: 16, .TargetSize: 16, .Flags: 0},
132 {.Name: "FIXUP_LANAI_LO16", .TargetOffset: 16, .TargetSize: 16, .Flags: 0}};
133
134 if (Kind < FirstTargetFixupKind)
135 return MCAsmBackend::getFixupKindInfo(Kind);
136
137 assert(unsigned(Kind - FirstTargetFixupKind) < Lanai::NumTargetFixupKinds &&
138 "Invalid kind!");
139 return Infos[Kind - FirstTargetFixupKind];
140}
141
142} // namespace
143
144MCAsmBackend *llvm::createLanaiAsmBackend(const Target &T,
145 const MCSubtargetInfo &STI,
146 const MCRegisterInfo & /*MRI*/,
147 const MCTargetOptions & /*Options*/) {
148 const Triple &TT = STI.getTargetTriple();
149 if (!TT.isOSBinFormatELF())
150 llvm_unreachable("OS not supported");
151
152 return new LanaiAsmBackend(T, TT.getOS());
153}
154