1//=- LoongArchMachineFunctionInfo.h - LoongArch machine function info -----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares LoongArch-specific per-machine-function information.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_LOONGARCH_LOONGARCHMACHINEFUNCTIONINFO_H
14#define LLVM_LIB_TARGET_LOONGARCH_LOONGARCHMACHINEFUNCTIONINFO_H
15
16#include "LoongArchSubtarget.h"
17#include "llvm/CodeGen/MachineFrameInfo.h"
18#include "llvm/CodeGen/MachineFunction.h"
19
20namespace llvm {
21
22/// LoongArchMachineFunctionInfo - This class is derived from
23/// MachineFunctionInfo and contains private LoongArch-specific information for
24/// each MachineFunction.
25class LoongArchMachineFunctionInfo : public MachineFunctionInfo {
26private:
27 /// FrameIndex for start of varargs area
28 int VarArgsFrameIndex = 0;
29 /// Size of the save area used for varargs
30 int VarArgsSaveSize = 0;
31
32 /// Size of stack frame to save callee saved registers
33 unsigned CalleeSavedStackSize = 0;
34
35 /// Amount of bytes on stack consumed by the arguments being passed on
36 /// the stack
37 unsigned ArgumentStackSize = 0;
38
39 /// FrameIndex of the spill slot when there is no scavenged register in
40 /// insertIndirectBranch.
41 int BranchRelaxationSpillFrameIndex = -1;
42
43 /// Incoming ByVal arguments
44 SmallVector<SDValue, 8> IncomingByValArgs;
45
46 /// Registers that have been sign extended from i32.
47 SmallVector<Register, 8> SExt32Registers;
48
49 /// Pairs of `jr` instructions and corresponding JTI operands, used for the
50 /// `annotate-tablejump` option.
51 SmallVector<std::pair<MachineInstr *, int>, 4> JumpInfos;
52
53public:
54 LoongArchMachineFunctionInfo(const Function &F,
55 const TargetSubtargetInfo *STI) {}
56
57 MachineFunctionInfo *
58 clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF,
59 const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
60 const override {
61 return DestMF.cloneInfo<LoongArchMachineFunctionInfo>(Old: *this);
62 }
63
64 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
65 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
66
67 unsigned getVarArgsSaveSize() const { return VarArgsSaveSize; }
68 void setVarArgsSaveSize(int Size) { VarArgsSaveSize = Size; }
69
70 unsigned getCalleeSavedStackSize() const { return CalleeSavedStackSize; }
71 void setCalleeSavedStackSize(unsigned Size) { CalleeSavedStackSize = Size; }
72
73 unsigned getArgumentStackSize() const { return ArgumentStackSize; }
74 void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; }
75
76 int getBranchRelaxationSpillFrameIndex() {
77 return BranchRelaxationSpillFrameIndex;
78 }
79 void setBranchRelaxationSpillFrameIndex(int Index) {
80 BranchRelaxationSpillFrameIndex = Index;
81 }
82
83 void addIncomingByValArgs(SDValue Val) { IncomingByValArgs.push_back(Elt: Val); }
84 SDValue getIncomingByValArgs(int Idx) { return IncomingByValArgs[Idx]; }
85 unsigned getIncomingByValArgsSize() const { return IncomingByValArgs.size(); }
86
87 void addSExt32Register(Register Reg) { SExt32Registers.push_back(Elt: Reg); }
88
89 bool isSExt32Register(Register Reg) const {
90 return is_contained(Range: SExt32Registers, Element: Reg);
91 }
92
93 void setJumpInfo(MachineInstr *JrMI, int JTIIdx) {
94 JumpInfos.push_back(Elt: std::make_pair(x&: JrMI, y&: JTIIdx));
95 }
96 unsigned getJumpInfoSize() { return JumpInfos.size(); }
97 MachineInstr *getJumpInfoJrMI(unsigned Idx) { return JumpInfos[Idx].first; }
98 int getJumpInfoJTIIndex(unsigned Idx) { return JumpInfos[Idx].second; }
99};
100
101} // end namespace llvm
102
103#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHMACHINEFUNCTIONINFO_H
104