| 1 | //===-- RISCVTargetInfo.cpp - RISC-V Target Implementation ----------------===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | |
| 9 | #include "TargetInfo/RISCVTargetInfo.h" |
| 10 | #include "llvm/MC/TargetRegistry.h" |
| 11 | #include "llvm/Support/Compiler.h" |
| 12 | using namespace llvm; |
| 13 | |
| 14 | Target &llvm::getTheRISCV32Target() { |
| 15 | static Target TheRISCV32Target; |
| 16 | return TheRISCV32Target; |
| 17 | } |
| 18 | |
| 19 | Target &llvm::getTheRISCV64Target() { |
| 20 | static Target TheRISCV64Target; |
| 21 | return TheRISCV64Target; |
| 22 | } |
| 23 | |
| 24 | Target &llvm::getTheRISCV32beTarget() { |
| 25 | static Target TheRISCV32beTarget; |
| 26 | return TheRISCV32beTarget; |
| 27 | } |
| 28 | |
| 29 | Target &llvm::getTheRISCV64beTarget() { |
| 30 | static Target TheRISCV64beTarget; |
| 31 | return TheRISCV64beTarget; |
| 32 | } |
| 33 | |
| 34 | extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void |
| 35 | LLVMInitializeRISCVTargetInfo() { |
| 36 | RegisterTarget<Triple::riscv32, /*HasJIT=*/true> X( |
| 37 | getTheRISCV32Target(), "riscv32" , "32-bit RISC-V" , "RISCV" ); |
| 38 | RegisterTarget<Triple::riscv64, /*HasJIT=*/true> Y( |
| 39 | getTheRISCV64Target(), "riscv64" , "64-bit RISC-V" , "RISCV" ); |
| 40 | RegisterTarget<Triple::riscv32be> A(getTheRISCV32beTarget(), "riscv32be" , |
| 41 | "32-bit big endian RISC-V" , "RISCV" ); |
| 42 | RegisterTarget<Triple::riscv64be> B(getTheRISCV64beTarget(), "riscv64be" , |
| 43 | "64-bit big endian RISC-V" , "RISCV" ); |
| 44 | } |
| 45 | |