1//===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "MCTargetDesc/SystemZMCFixups.h"
10#include "MCTargetDesc/SystemZMCTargetDesc.h"
11#include "llvm/ADT/StringSwitch.h"
12#include "llvm/MC/MCAsmBackend.h"
13#include "llvm/MC/MCAssembler.h"
14#include "llvm/MC/MCContext.h"
15#include "llvm/MC/MCELFObjectWriter.h"
16#include "llvm/MC/MCInst.h"
17#include "llvm/MC/MCObjectWriter.h"
18#include "llvm/MC/MCSubtargetInfo.h"
19#include "llvm/MC/MCValue.h"
20
21using namespace llvm;
22
23// Value is a fully-resolved relocation value: Symbol + Addend [- Pivot].
24// Return the bits that should be installed in a relocation field for
25// fixup kind Kind.
26static uint64_t extractBitsForFixup(MCFixupKind Kind, uint64_t Value,
27 const MCFixup &Fixup, MCContext &Ctx) {
28 if (Kind < FirstTargetFixupKind)
29 return Value;
30
31 auto checkFixupInRange = [&](int64_t Min, int64_t Max) -> bool {
32 int64_t SVal = int64_t(Value);
33 if (SVal < Min || SVal > Max) {
34 Ctx.reportError(L: Fixup.getLoc(), Msg: "operand out of range (" + Twine(SVal) +
35 " not between " + Twine(Min) +
36 " and " + Twine(Max) + ")");
37 return false;
38 }
39 return true;
40 };
41
42 auto handlePCRelFixupValue = [&](unsigned W) -> uint64_t {
43 if (Value % 2 != 0)
44 Ctx.reportError(L: Fixup.getLoc(), Msg: "Non-even PC relative offset.");
45 if (!checkFixupInRange(minIntN(N: W) * 2, maxIntN(N: W) * 2))
46 return 0;
47 return (int64_t)Value / 2;
48 };
49
50 auto handleImmValue = [&](bool IsSigned, unsigned W) -> uint64_t {
51 if (!(IsSigned ? checkFixupInRange(minIntN(N: W), maxIntN(N: W))
52 : checkFixupInRange(0, maxUIntN(N: W))))
53 return 0;
54 return Value;
55 };
56
57 auto handleXImmValue = [&](unsigned W) -> uint64_t {
58 if (!checkFixupInRange(minIntN(N: W), maxUIntN(N: W)))
59 return 0;
60 return Value;
61 };
62
63 switch (unsigned(Kind)) {
64 case SystemZ::FK_390_PC12DBL:
65 return handlePCRelFixupValue(12);
66 case SystemZ::FK_390_PC16DBL:
67 return handlePCRelFixupValue(16);
68 case SystemZ::FK_390_PC24DBL:
69 return handlePCRelFixupValue(24);
70 case SystemZ::FK_390_PC32DBL:
71 return handlePCRelFixupValue(32);
72
73 case SystemZ::FK_390_TLS_CALL:
74 return 0;
75
76 case SystemZ::FK_390_S8Imm:
77 return handleImmValue(true, 8);
78 case SystemZ::FK_390_S16Imm:
79 return handleImmValue(true, 16);
80 case SystemZ::FK_390_S20Imm: {
81 Value = handleImmValue(true, 20);
82 // S20Imm is used only for signed 20-bit displacements.
83 // The high byte of a 20 bit displacement value comes first.
84 uint64_t DLo = Value & 0xfff;
85 uint64_t DHi = (Value >> 12) & 0xff;
86 return (DLo << 8) | DHi;
87 }
88 case SystemZ::FK_390_S32Imm:
89 return handleImmValue(true, 32);
90 case SystemZ::FK_390_U1Imm:
91 return handleImmValue(false, 1);
92 case SystemZ::FK_390_U2Imm:
93 return handleImmValue(false, 2);
94 case SystemZ::FK_390_U3Imm:
95 return handleImmValue(false, 3);
96 case SystemZ::FK_390_U4Imm:
97 return handleImmValue(false, 4);
98 case SystemZ::FK_390_U8Imm:
99 return handleImmValue(false, 8);
100 case SystemZ::FK_390_X8Imm:
101 return handleXImmValue(8);
102 case SystemZ::FK_390_U12Imm:
103 return handleImmValue(false, 12);
104 case SystemZ::FK_390_U16Imm:
105 return handleImmValue(false, 16);
106 case SystemZ::FK_390_X16Imm:
107 return handleXImmValue(16);
108 case SystemZ::FK_390_U32Imm:
109 return handleImmValue(false, 32);
110 case SystemZ::FK_390_X32Imm:
111 return handleXImmValue(32);
112 case SystemZ::FK_390_U48Imm:
113 return handleImmValue(false, 48);
114 }
115
116 llvm_unreachable("Unknown fixup kind!");
117}
118
119namespace {
120class SystemZMCAsmBackend : public MCAsmBackend {
121public:
122 SystemZMCAsmBackend() : MCAsmBackend(llvm::endianness::big) {}
123
124 // Override MCAsmBackend
125 std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
126 MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
127 void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target,
128 uint8_t *Data, uint64_t Value, bool IsResolved) override;
129 bool writeNopData(raw_ostream &OS, uint64_t Count,
130 const MCSubtargetInfo *STI) const override;
131};
132} // end anonymous namespace
133
134std::optional<MCFixupKind>
135SystemZMCAsmBackend::getFixupKind(StringRef Name) const {
136 unsigned Type = llvm::StringSwitch<unsigned>(Name)
137#define ELF_RELOC(X, Y) .Case(#X, Y)
138#include "llvm/BinaryFormat/ELFRelocs/SystemZ.def"
139#undef ELF_RELOC
140 .Case(S: "BFD_RELOC_NONE", Value: ELF::R_390_NONE)
141 .Case(S: "BFD_RELOC_8", Value: ELF::R_390_8)
142 .Case(S: "BFD_RELOC_16", Value: ELF::R_390_16)
143 .Case(S: "BFD_RELOC_32", Value: ELF::R_390_32)
144 .Case(S: "BFD_RELOC_64", Value: ELF::R_390_64)
145 .Default(Value: -1u);
146 if (Type != -1u)
147 return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
148 return std::nullopt;
149}
150
151MCFixupKindInfo SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
152 // Fixup kinds from .reloc directive are like R_390_NONE. They
153 // do not require any extra processing.
154 if (mc::isRelocation(FixupKind: Kind))
155 return {};
156
157 if (Kind < FirstTargetFixupKind)
158 return MCAsmBackend::getFixupKindInfo(Kind);
159
160 assert(unsigned(Kind - FirstTargetFixupKind) < SystemZ::NumTargetFixupKinds &&
161 "Invalid kind!");
162 return SystemZ::MCFixupKindInfos[Kind - FirstTargetFixupKind];
163}
164
165void SystemZMCAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
166 const MCValue &Target, uint8_t *Data,
167 uint64_t Value, bool IsResolved) {
168 if (Target.getSpecifier())
169 IsResolved = false;
170 maybeAddReloc(F, Fixup, Target, Value, IsResolved);
171 MCFixupKind Kind = Fixup.getKind();
172 if (mc::isRelocation(FixupKind: Kind))
173 return;
174 unsigned BitSize = getFixupKindInfo(Kind).TargetSize;
175 unsigned Size = (BitSize + 7) / 8;
176
177 assert(Fixup.getOffset() + Size <= F.getSize() && "Invalid fixup offset!");
178
179 // Big-endian insertion of Size bytes.
180 Value = extractBitsForFixup(Kind, Value, Fixup, Ctx&: getContext());
181 if (BitSize < 64)
182 Value &= ((uint64_t)1 << BitSize) - 1;
183 unsigned ShiftValue = (Size * 8) - 8;
184 for (unsigned I = 0; I != Size; ++I) {
185 Data[I] |= uint8_t(Value >> ShiftValue);
186 ShiftValue -= 8;
187 }
188}
189
190bool SystemZMCAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
191 const MCSubtargetInfo *STI) const {
192 for (uint64_t I = 0; I != Count; ++I)
193 OS << '\x7';
194 return true;
195}
196
197namespace {
198class ELFSystemZAsmBackend : public SystemZMCAsmBackend {
199 uint8_t OSABI;
200
201public:
202 ELFSystemZAsmBackend(uint8_t OsABI) : SystemZMCAsmBackend(), OSABI(OsABI){};
203
204 std::unique_ptr<MCObjectTargetWriter>
205 createObjectTargetWriter() const override {
206 return createSystemZELFObjectWriter(OSABI);
207 }
208};
209
210class GOFFSystemZAsmBackend : public SystemZMCAsmBackend {
211public:
212 GOFFSystemZAsmBackend() : SystemZMCAsmBackend(){};
213
214 std::unique_ptr<MCObjectTargetWriter>
215 createObjectTargetWriter() const override {
216 return createSystemZGOFFObjectWriter();
217 }
218};
219} // namespace
220
221MCAsmBackend *llvm::createSystemZMCAsmBackend(const Target &T,
222 const MCSubtargetInfo &STI,
223 const MCRegisterInfo &MRI,
224 const MCTargetOptions &Options) {
225 if (STI.getTargetTriple().isOSzOS()) {
226 return new GOFFSystemZAsmBackend();
227 }
228
229 uint8_t OSABI =
230 MCELFObjectTargetWriter::getOSABI(OSType: STI.getTargetTriple().getOS());
231 return new ELFSystemZAsmBackend(OSABI);
232}
233