| 1 | //===-- WebAssemblySelectionDAGInfo.cpp - WebAssembly SelectionDAG Info ---===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | /// |
| 9 | /// \file |
| 10 | /// This file implements the WebAssemblySelectionDAGInfo class. |
| 11 | /// |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "WebAssemblySelectionDAGInfo.h" |
| 15 | #include "WebAssemblyTargetMachine.h" |
| 16 | |
| 17 | #define GET_SDNODE_DESC |
| 18 | #include "WebAssemblyGenSDNodeInfo.inc" |
| 19 | |
| 20 | using namespace llvm; |
| 21 | |
| 22 | #define DEBUG_TYPE "wasm-selectiondag-info" |
| 23 | |
| 24 | WebAssemblySelectionDAGInfo::WebAssemblySelectionDAGInfo() |
| 25 | : SelectionDAGGenTargetInfo(WebAssemblyGenSDNodeInfo) {} |
| 26 | |
| 27 | WebAssemblySelectionDAGInfo::~WebAssemblySelectionDAGInfo() = default; // anchor |
| 28 | |
| 29 | const char * |
| 30 | WebAssemblySelectionDAGInfo::getTargetNodeName(unsigned Opcode) const { |
| 31 | switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) { |
| 32 | case WebAssemblyISD::CALL: |
| 33 | return "WebAssemblyISD::CALL" ; |
| 34 | case WebAssemblyISD::RET_CALL: |
| 35 | return "WebAssemblyISD::RET_CALL" ; |
| 36 | } |
| 37 | |
| 38 | return SelectionDAGGenTargetInfo::getTargetNodeName(Opcode); |
| 39 | } |
| 40 | |
| 41 | SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemcpy( |
| 42 | SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, |
| 43 | SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline, |
| 44 | MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { |
| 45 | auto &ST = DAG.getMachineFunction().getSubtarget<WebAssemblySubtarget>(); |
| 46 | if (!ST.hasBulkMemoryOpt()) |
| 47 | return SDValue(); |
| 48 | |
| 49 | SDValue MemIdx = DAG.getConstant(Val: 0, DL, VT: MVT::i32); |
| 50 | auto LenMVT = ST.hasAddr64() ? MVT::i64 : MVT::i32; |
| 51 | |
| 52 | // Use `MEMCPY` here instead of `MEMORY_COPY` because `memory.copy` traps |
| 53 | // if the pointers are invalid even if the length is zero. `MEMCPY` gets |
| 54 | // extra code to handle this in the way that LLVM IR expects. |
| 55 | return DAG.getNode( |
| 56 | Opcode: WebAssemblyISD::MEMCPY, DL, VT: MVT::Other, |
| 57 | Ops: {Chain, MemIdx, MemIdx, Dst, Src, DAG.getZExtOrTrunc(Op: Size, DL, VT: LenMVT)}); |
| 58 | } |
| 59 | |
| 60 | SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemmove( |
| 61 | SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2, |
| 62 | SDValue Op3, Align Alignment, bool IsVolatile, |
| 63 | MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { |
| 64 | return EmitTargetCodeForMemcpy(DAG, DL, Chain, Dst: Op1, Src: Op2, Size: Op3, |
| 65 | Alignment, IsVolatile, AlwaysInline: false, |
| 66 | DstPtrInfo, SrcPtrInfo); |
| 67 | } |
| 68 | |
| 69 | SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemset( |
| 70 | SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Val, |
| 71 | SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline, |
| 72 | MachinePointerInfo DstPtrInfo) const { |
| 73 | auto &ST = DAG.getMachineFunction().getSubtarget<WebAssemblySubtarget>(); |
| 74 | if (!ST.hasBulkMemoryOpt()) |
| 75 | return SDValue(); |
| 76 | |
| 77 | SDValue MemIdx = DAG.getConstant(Val: 0, DL, VT: MVT::i32); |
| 78 | auto LenMVT = ST.hasAddr64() ? MVT::i64 : MVT::i32; |
| 79 | |
| 80 | // Use `MEMSET` here instead of `MEMORY_FILL` because `memory.fill` traps |
| 81 | // if the pointers are invalid even if the length is zero. `MEMSET` gets |
| 82 | // extra code to handle this in the way that LLVM IR expects. |
| 83 | // |
| 84 | // Only low byte matters for val argument, so anyext the i8 |
| 85 | return DAG.getNode(Opcode: WebAssemblyISD::MEMSET, DL, VT: MVT::Other, N1: Chain, N2: MemIdx, N3: Dst, |
| 86 | N4: DAG.getAnyExtOrTrunc(Op: Val, DL, VT: MVT::i32), |
| 87 | N5: DAG.getZExtOrTrunc(Op: Size, DL, VT: LenMVT)); |
| 88 | } |
| 89 | |