1//===-- WebAssemblySelectionDAGInfo.cpp - WebAssembly SelectionDAG Info ---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file implements the WebAssemblySelectionDAGInfo class.
11///
12//===----------------------------------------------------------------------===//
13
14#include "WebAssemblySelectionDAGInfo.h"
15#include "WebAssemblyTargetMachine.h"
16
17#define GET_SDNODE_DESC
18#include "WebAssemblyGenSDNodeInfo.inc"
19
20using namespace llvm;
21
22#define DEBUG_TYPE "wasm-selectiondag-info"
23
24WebAssemblySelectionDAGInfo::WebAssemblySelectionDAGInfo()
25 : SelectionDAGGenTargetInfo(WebAssemblyGenSDNodeInfo) {}
26
27WebAssemblySelectionDAGInfo::~WebAssemblySelectionDAGInfo() = default; // anchor
28
29const char *
30WebAssemblySelectionDAGInfo::getTargetNodeName(unsigned Opcode) const {
31 switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
32 case WebAssemblyISD::CALL:
33 return "WebAssemblyISD::CALL";
34 case WebAssemblyISD::RET_CALL:
35 return "WebAssemblyISD::RET_CALL";
36 }
37
38 return SelectionDAGGenTargetInfo::getTargetNodeName(Opcode);
39}
40
41SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemcpy(
42 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src,
43 SDValue Size, Align DstAlign, Align SrcAlign, bool IsVolatile,
44 bool AlwaysInline, MachinePointerInfo DstPtrInfo,
45 MachinePointerInfo SrcPtrInfo) const {
46 auto &ST = DAG.getMachineFunction().getSubtarget<WebAssemblySubtarget>();
47 if (!ST.hasBulkMemoryOpt())
48 return SDValue();
49
50 SDValue MemIdx = DAG.getConstant(Val: 0, DL, VT: MVT::i32);
51 auto LenMVT = ST.hasAddr64() ? MVT::i64 : MVT::i32;
52
53 // Use `MEMCPY` here instead of `MEMORY_COPY` because `memory.copy` traps
54 // if the pointers are invalid even if the length is zero. `MEMCPY` gets
55 // extra code to handle this in the way that LLVM IR expects.
56 return DAG.getNode(
57 Opcode: WebAssemblyISD::MEMCPY, DL, VT: MVT::Other,
58 Ops: {Chain, MemIdx, MemIdx, Dst, Src, DAG.getZExtOrTrunc(Op: Size, DL, VT: LenMVT)});
59}
60
61SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemmove(
62 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2,
63 SDValue Op3, Align DstAlign, Align SrcAlign, bool IsVolatile,
64 MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
65 return EmitTargetCodeForMemcpy(DAG, DL, Chain, Dst: Op1, Src: Op2, Size: Op3, DstAlign,
66 SrcAlign, IsVolatile, AlwaysInline: false, DstPtrInfo,
67 SrcPtrInfo);
68}
69
70SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemset(
71 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Val,
72 SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline,
73 MachinePointerInfo DstPtrInfo) const {
74 auto &ST = DAG.getMachineFunction().getSubtarget<WebAssemblySubtarget>();
75 if (!ST.hasBulkMemoryOpt())
76 return SDValue();
77
78 SDValue MemIdx = DAG.getConstant(Val: 0, DL, VT: MVT::i32);
79 auto LenMVT = ST.hasAddr64() ? MVT::i64 : MVT::i32;
80
81 // Use `MEMSET` here instead of `MEMORY_FILL` because `memory.fill` traps
82 // if the pointers are invalid even if the length is zero. `MEMSET` gets
83 // extra code to handle this in the way that LLVM IR expects.
84 //
85 // Only low byte matters for val argument, so anyext the i8
86 return DAG.getNode(Opcode: WebAssemblyISD::MEMSET, DL, VT: MVT::Other, N1: Chain, N2: MemIdx, N3: Dst,
87 N4: DAG.getAnyExtOrTrunc(Op: Val, DL, VT: MVT::i32),
88 N5: DAG.getZExtOrTrunc(Op: Size, DL, VT: LenMVT));
89}
90