1//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise AArch64 hardware features
10// such as FPU/CPU/ARCH and extension names.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/TargetParser/AArch64TargetParser.h"
15#include "llvm/Support/Debug.h"
16#include "llvm/Support/Format.h"
17#include "llvm/Support/raw_ostream.h"
18#include "llvm/TargetParser/ARMTargetParserCommon.h"
19#include "llvm/TargetParser/Triple.h"
20#include <cctype>
21#include <vector>
22
23#define DEBUG_TYPE "target-parser"
24
25using namespace llvm;
26
27#define EMIT_FMV_INFO
28#include "llvm/TargetParser/AArch64TargetParserDef.inc"
29
30static unsigned checkArchVersion(llvm::StringRef Arch) {
31 if (Arch.size() >= 2 && Arch[0] == 'v' && std::isdigit(Arch[1]))
32 return (Arch[1] - 48);
33 return 0;
34}
35
36const AArch64::ArchInfo *AArch64::getArchForCpu(StringRef CPU) {
37 // Note: this now takes cpu aliases into account
38 std::optional<CpuInfo> Cpu = parseCpu(Name: CPU);
39 if (!Cpu)
40 return nullptr;
41 return &ArchInfos[Cpu->ArchIdx];
42}
43
44std::optional<AArch64::ArchInfo> AArch64::ArchInfo::findBySubArch(StringRef SubArch) {
45 for (const auto &A : AArch64::ArchInfos)
46 if (A.getSubArch() == SubArch)
47 return A;
48 return {};
49}
50
51std::optional<AArch64::FMVInfo> lookupFMVByID(AArch64::ArchExtKind ExtID) {
52 for (const AArch64::FMVInfo &Info : AArch64::getFMVInfo())
53 if (Info.ID == ExtID)
54 return Info;
55 return {};
56}
57
58std::optional<AArch64::FMVInfo> getFMVInfoFrom(StringRef Feature) {
59 std::optional<AArch64::FMVInfo> FMV = AArch64::parseFMVExtension(Extension: Feature);
60 if (!FMV && Feature.starts_with(Prefix: '+'))
61 if (std::optional<AArch64::ExtensionInfo> Ext =
62 AArch64::targetFeatureToExtension(TargetFeature: Feature))
63 FMV = lookupFMVByID(ExtID: Ext->ID);
64 return FMV;
65}
66
67APInt AArch64::getFMVPriority(ArrayRef<StringRef> Features) {
68 // Transitively enable the Arch Extensions which correspond to each feature.
69 ExtensionSet FeatureBits;
70 APInt PriorityMask = APInt::getZero(numBits: 128);
71 for (const StringRef Feature : Features) {
72 if (std::optional<FMVInfo> FMV = getFMVInfoFrom(Feature)) {
73 // FMV feature without a corresponding Arch Extension may affect priority
74 if (FMV->ID)
75 FeatureBits.enable(E: *FMV->ID);
76 else
77 PriorityMask.setBit(FMV->PriorityBit);
78 }
79 }
80
81 // Construct a bitmask for all the transitively enabled Arch Extensions.
82 for (const FMVInfo &Info : getFMVInfo())
83 if (Info.ID && FeatureBits.Enabled.test(I: *Info.ID))
84 PriorityMask.setBit(Info.PriorityBit);
85
86 return PriorityMask;
87}
88
89APInt AArch64::getCpuSupportsMask(ArrayRef<StringRef> Features) {
90 // Transitively enable the Arch Extensions which correspond to each feature.
91 ExtensionSet FeatureBits;
92 for (const StringRef Feature : Features)
93 if (std::optional<FMVInfo> FMV = getFMVInfoFrom(Feature))
94 if (FMV->ID)
95 FeatureBits.enable(E: *FMV->ID);
96
97 // Construct a bitmask for all the transitively enabled Arch Extensions.
98 APInt FeaturesMask = APInt::getZero(numBits: 128);
99 for (const FMVInfo &Info : getFMVInfo())
100 if (Info.ID && FeatureBits.Enabled.test(I: *Info.ID))
101 FeaturesMask.setBit(*Info.FeatureBit);
102
103 return FeaturesMask;
104}
105
106bool AArch64::getExtensionFeatures(
107 const AArch64::ExtensionBitset &InputExts,
108 std::vector<StringRef> &Features) {
109 for (const auto &E : Extensions)
110 /* INVALID and NONE have no feature name. */
111 if (InputExts.test(I: E.ID))
112 Features.push_back(x: StrTab[E.PosTargetFeature]);
113
114 return true;
115}
116
117StringRef AArch64::resolveCPUAlias(StringRef Name) {
118 for (const auto &A : CpuAliases)
119 if (StrTab[A.AltName] == Name)
120 return StrTab[A.Name];
121 return Name;
122}
123
124StringRef AArch64::getArchExtFeature(StringRef ArchExt) {
125 bool IsNegated = ArchExt.starts_with(Prefix: "no");
126 StringRef ArchExtBase = IsNegated ? ArchExt.drop_front(N: 2) : ArchExt;
127
128 if (auto AE = parseArchExtension(Extension: ArchExtBase))
129 return StrTab[IsNegated ? AE->NegTargetFeature : AE->PosTargetFeature];
130 return StringRef();
131}
132
133void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
134 for (const auto &C : CpuInfos)
135 Values.push_back(Elt: StrTab[C.Name]);
136
137 for (const auto &Alias : CpuAliases)
138 // The apple-latest alias is backend only, do not expose it to clang's -mcpu.
139 if (StrTab[Alias.AltName] != "apple-latest")
140 Values.push_back(Elt: StrTab[Alias.AltName]);
141
142 llvm::sort(C&: Values);
143}
144
145bool AArch64::isX18ReservedByDefault(const Triple &TT) {
146 return TT.isAndroid() || TT.isOSDarwin() || TT.isOSFuchsia() ||
147 TT.isOSWindows() || TT.isOHOSFamily();
148}
149
150// Allows partial match, ex. "v8a" matches "armv8a".
151const AArch64::ArchInfo *AArch64::parseArch(StringRef Arch) {
152 Arch = llvm::ARM::getCanonicalArchName(Arch);
153 if (checkArchVersion(Arch) < 8)
154 return {};
155
156 StringRef Syn = llvm::ARM::getArchSynonym(Arch);
157 for (const auto &A : ArchInfos) {
158 if (StrTab[A.Name].ends_with(Suffix: Syn))
159 return &A;
160 }
161 return {};
162}
163
164std::optional<AArch64::ExtensionInfo>
165AArch64::parseArchExtension(StringRef ArchExt) {
166 if (ArchExt.empty())
167 return {};
168 for (const auto &A : Extensions) {
169 if (ArchExt == StrTab[A.UserVisibleName] || ArchExt == StrTab[A.Alias])
170 return A;
171 }
172 return {};
173}
174
175std::optional<AArch64::FMVInfo> AArch64::parseFMVExtension(StringRef FMVExt) {
176 // FIXME introduce general alias functionality, or remove this exception.
177 if (FMVExt == "rdma")
178 FMVExt = "rdm";
179
180 for (const auto &I : getFMVInfo()) {
181 if (FMVExt == I.Name)
182 return I;
183 }
184 return {};
185}
186
187std::optional<AArch64::ExtensionInfo>
188AArch64::targetFeatureToExtension(StringRef TargetFeature) {
189 for (const auto &E : Extensions)
190 if (TargetFeature == StrTab[E.PosTargetFeature] ||
191 TargetFeature == StrTab[E.NegTargetFeature])
192 return E;
193 return {};
194}
195
196std::optional<AArch64::CpuInfo> AArch64::parseCpu(StringRef Name) {
197 // Resolve aliases first.
198 Name = resolveCPUAlias(Name);
199
200 // Then find the CPU name.
201 for (const auto &C : CpuInfos)
202 if (Name == StrTab[C.Name])
203 return C;
204
205 return {};
206}
207
208void AArch64::PrintSupportedExtensions() {
209 outs() << "All available -march extensions for AArch64\n\n"
210 << " " << left_justify(Str: "Name", Width: 20)
211 << left_justify(Str: "Architecture Feature(s)", Width: 55)
212 << "Description\n";
213 for (const auto &Ext : Extensions) {
214 // Extensions without a feature cannot be used with -march.
215 if (Ext.UserVisibleName.value() && Ext.PosTargetFeature.value()) {
216 // NB: StringTable strings are null-terminated, so the StringRef can be
217 // used as C string without further conversion.
218 outs() << " "
219 << format(Fmt: !Ext.Description.value() ? "%-20s%s\n"
220 : "%-20s%-55s%s\n",
221 Vals: StrTab[Ext.UserVisibleName].data(),
222 Vals: StrTab[Ext.ArchFeatureName].data(),
223 Vals: StrTab[Ext.Description].data());
224 }
225 }
226}
227
228void
229AArch64::printEnabledExtensions(const std::set<StringRef> &EnabledFeatureNames) {
230 outs() << "Extensions enabled for the given AArch64 target\n\n"
231 << " " << left_justify(Str: "Architecture Feature(s)", Width: 55)
232 << "Description\n";
233 std::vector<ExtensionInfo> EnabledExtensionsInfo;
234 for (const auto &FeatureName : EnabledFeatureNames) {
235 std::string PosFeatureName = '+' + FeatureName.str();
236 if (auto ExtInfo = targetFeatureToExtension(TargetFeature: PosFeatureName))
237 EnabledExtensionsInfo.push_back(x: *ExtInfo);
238 }
239
240 std::sort(first: EnabledExtensionsInfo.begin(), last: EnabledExtensionsInfo.end(),
241 comp: [](const ExtensionInfo &Lhs, const ExtensionInfo &Rhs) {
242 return StrTab[Lhs.ArchFeatureName] < StrTab[Rhs.ArchFeatureName];
243 });
244
245 for (const auto &Ext : EnabledExtensionsInfo) {
246 // NB: StringTable strings are null-terminated, so the StringRef can be used
247 // as C string without further conversion.
248 outs() << " "
249 << format(Fmt: "%-55s%s\n", Vals: StrTab[Ext.ArchFeatureName].data(),
250 Vals: StrTab[Ext.Description].data());
251 }
252}
253
254const llvm::AArch64::ExtensionInfo &
255lookupExtensionByID(llvm::AArch64::ArchExtKind ExtID) {
256 for (const auto &E : llvm::AArch64::Extensions)
257 if (E.ID == ExtID)
258 return E;
259 llvm_unreachable("Invalid extension ID");
260}
261
262void AArch64::ExtensionSet::enable(ArchExtKind E) {
263 if (Enabled.test(I: E))
264 return;
265
266 LLVM_DEBUG(llvm::dbgs() << "Enable "
267 << StrTab[lookupExtensionByID(E).UserVisibleName]
268 << "\n");
269
270 Touched.set(E);
271 Enabled.set(E);
272
273 // Recursively enable all features that this one depends on. This handles all
274 // of the simple cases, where the behaviour doesn't depend on the base
275 // architecture version.
276 for (auto Dep : ExtensionDependencies)
277 if (E == Dep.Later)
278 enable(E: Dep.Earlier);
279
280 // Special cases for dependencies which vary depending on the base
281 // architecture version.
282 if (BaseArch) {
283 // +fp16 implies +fp16fml for v8.4A+, but not v9.0-A+
284 if (E == AEK_FP16 && BaseArch->is_superset(Other: ARMV8_4A) &&
285 !BaseArch->is_superset(Other: ARMV9A))
286 enable(E: AEK_FP16FML);
287
288 // For v8.4A+ and v9.0A+, +crypto also enables +sha3 and +sm4.
289 if (E == AEK_CRYPTO && BaseArch->is_superset(Other: ARMV8_4A)) {
290 enable(E: AEK_SHA3);
291 enable(E: AEK_SM4);
292 }
293 }
294}
295
296void AArch64::ExtensionSet::disable(ArchExtKind E) {
297 // -crypto always disables aes, sha2, sha3 and sm4, even for architectures
298 // where the latter two would not be enabled by +crypto.
299 if (E == AEK_CRYPTO) {
300 disable(E: AEK_AES);
301 disable(E: AEK_SHA2);
302 disable(E: AEK_SHA3);
303 disable(E: AEK_SM4);
304 }
305
306 // sve2-aes was historically associated with both FEAT_SVE2 and FEAT_SVE_AES,
307 // the latter is now associated with sve-aes and sve2-aes has become shorthand
308 // for +sve2+sve-aes. For backwards compatibility, when we disable sve2-aes we
309 // must also disable sve-aes.
310 if (E == AEK_SVE2AES)
311 disable(E: AEK_SVEAES);
312
313 // sve2-sm4 was historically associated with both FEAT_SVE2 and
314 // FEAT_SVE_SM4, the latter is now associated with sve-sm4 and sve2-sm4 has
315 // become shorthand for +sve2+sve-sm4. For backwards compatibility, when we
316 // disable sve2-sm4 we must also disable sve-sm4.
317 if (E == AEK_SVE2SM4)
318 disable(E: AEK_SVESM4);
319
320 // sve2-sha3 was historically associated with both FEAT_SVE2 and
321 // FEAT_SVE_SHA3, the latter is now associated with sve-sha3 and sve2-sha3 has
322 // become shorthand for +sve2+sve-sha3. For backwards compatibility, when we
323 // disable sve2-sha3 we must also disable sve-sha3.
324 if (E == AEK_SVE2SHA3)
325 disable(E: AEK_SVESHA3);
326
327 if (E == AEK_SVE2BITPERM){
328 disable(E: AEK_SVEBITPERM);
329 disable(E: AEK_SVE2);
330 }
331
332 if (!Enabled.test(I: E))
333 return;
334
335 LLVM_DEBUG(llvm::dbgs() << "Disable "
336 << StrTab[lookupExtensionByID(E).UserVisibleName]
337 << "\n");
338
339 Touched.set(E);
340 Enabled.reset(I: E);
341
342 // Recursively disable all features that depends on this one.
343 for (auto Dep : ExtensionDependencies)
344 if (E == Dep.Earlier)
345 disable(E: Dep.Later);
346}
347
348void AArch64::ExtensionSet::addCPUDefaults(const CpuInfo &CPU) {
349 LLVM_DEBUG(llvm::dbgs() << "addCPUDefaults(" << StrTab[CPU.Name] << ")\n");
350 BaseArch = &ArchInfos[CPU.ArchIdx];
351
352 for (const auto &E : Extensions)
353 if (CPU.DefaultExtensions.test(I: E.ID))
354 enable(E: E.ID);
355}
356
357void AArch64::ExtensionSet::addArchDefaults(const ArchInfo &Arch) {
358 LLVM_DEBUG(llvm::dbgs() << "addArchDefaults(" << StrTab[Arch.Name] << ")\n");
359 BaseArch = &Arch;
360
361 for (const auto &E : Extensions)
362 if (Arch.DefaultExts.test(I: E.ID))
363 enable(E: E.ID);
364}
365
366bool AArch64::ExtensionSet::parseModifier(StringRef Modifier,
367 const bool AllowNoDashForm) {
368 LLVM_DEBUG(llvm::dbgs() << "parseModifier(" << Modifier << ")\n");
369
370 size_t NChars = 0;
371 // The "no-feat" form is allowed in the target attribute but nowhere else.
372 if (AllowNoDashForm && Modifier.starts_with(Prefix: "no-"))
373 NChars = 3;
374 else if (Modifier.starts_with(Prefix: "no"))
375 NChars = 2;
376 bool IsNegated = NChars != 0;
377 StringRef ArchExt = Modifier.drop_front(N: NChars);
378
379 if (auto AE = parseArchExtension(ArchExt)) {
380 if (IsNegated)
381 disable(E: AE->ID);
382 else
383 enable(E: AE->ID);
384 return true;
385 }
386 return false;
387}
388
389void AArch64::ExtensionSet::reconstructFromParsedFeatures(
390 const std::vector<std::string> &Features,
391 std::vector<std::string> &NonExtensions) {
392 assert(Touched.none() && "Bitset already initialized");
393 for (auto &F : Features) {
394 bool IsNegated = F[0] == '-';
395 if (auto AE = targetFeatureToExtension(TargetFeature: F)) {
396 Touched.set(AE->ID);
397 if (IsNegated)
398 Enabled.reset(I: AE->ID);
399 else
400 Enabled.set(AE->ID);
401 continue;
402 }
403 NonExtensions.push_back(x: F);
404 }
405}
406
407void AArch64::ExtensionSet::dump() const {
408 std::vector<StringRef> Features;
409 toLLVMFeatureList(Features);
410 for (StringRef F : Features)
411 llvm::outs() << F << " ";
412 llvm::outs() << "\n";
413}
414
415const AArch64::ExtensionInfo &
416AArch64::getExtensionByID(AArch64::ArchExtKind ExtID) {
417 return lookupExtensionByID(ExtID);
418}
419