1//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise AArch64 hardware features
10// such as FPU/CPU/ARCH and extension names.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/TargetParser/AArch64TargetParser.h"
15#include "llvm/Support/Debug.h"
16#include "llvm/Support/Format.h"
17#include "llvm/Support/raw_ostream.h"
18#include "llvm/TargetParser/ARMTargetParserCommon.h"
19#include "llvm/TargetParser/Triple.h"
20#include <cctype>
21#include <vector>
22
23#define DEBUG_TYPE "target-parser"
24
25using namespace llvm;
26
27#define EMIT_FMV_INFO
28#include "llvm/TargetParser/AArch64TargetParserDef.inc"
29
30static unsigned checkArchVersion(llvm::StringRef Arch) {
31 if (Arch.size() >= 2 && Arch[0] == 'v' && std::isdigit(Arch[1]))
32 return (Arch[1] - 48);
33 return 0;
34}
35
36const AArch64::ArchInfo *AArch64::getArchForCpu(StringRef CPU) {
37 // Note: this now takes cpu aliases into account
38 std::optional<CpuInfo> Cpu = parseCpu(Name: CPU);
39 if (!Cpu)
40 return nullptr;
41 return &Cpu->Arch;
42}
43
44std::optional<AArch64::ArchInfo> AArch64::ArchInfo::findBySubArch(StringRef SubArch) {
45 for (const auto *A : AArch64::ArchInfos)
46 if (A->getSubArch() == SubArch)
47 return *A;
48 return {};
49}
50
51std::optional<AArch64::FMVInfo> lookupFMVByID(AArch64::ArchExtKind ExtID) {
52 for (const AArch64::FMVInfo &Info : AArch64::getFMVInfo())
53 if (Info.ID == ExtID)
54 return Info;
55 return {};
56}
57
58std::optional<AArch64::FMVInfo> getFMVInfoFrom(StringRef Feature) {
59 std::optional<AArch64::FMVInfo> FMV = AArch64::parseFMVExtension(Extension: Feature);
60 if (!FMV && Feature.starts_with(Prefix: '+'))
61 if (std::optional<AArch64::ExtensionInfo> Ext =
62 AArch64::targetFeatureToExtension(TargetFeature: Feature))
63 FMV = lookupFMVByID(ExtID: Ext->ID);
64 return FMV;
65}
66
67APInt AArch64::getFMVPriority(ArrayRef<StringRef> Features) {
68 // Transitively enable the Arch Extensions which correspond to each feature.
69 ExtensionSet FeatureBits;
70 APInt PriorityMask = APInt::getZero(numBits: 128);
71 for (const StringRef Feature : Features) {
72 if (std::optional<FMVInfo> FMV = getFMVInfoFrom(Feature)) {
73 // FMV feature without a corresponding Arch Extension may affect priority
74 if (FMV->ID)
75 FeatureBits.enable(E: *FMV->ID);
76 else
77 PriorityMask.setBit(FMV->PriorityBit);
78 }
79 }
80
81 // Construct a bitmask for all the transitively enabled Arch Extensions.
82 for (const FMVInfo &Info : getFMVInfo())
83 if (Info.ID && FeatureBits.Enabled.test(I: *Info.ID))
84 PriorityMask.setBit(Info.PriorityBit);
85
86 return PriorityMask;
87}
88
89APInt AArch64::getCpuSupportsMask(ArrayRef<StringRef> Features) {
90 // Transitively enable the Arch Extensions which correspond to each feature.
91 ExtensionSet FeatureBits;
92 for (const StringRef Feature : Features)
93 if (std::optional<FMVInfo> FMV = getFMVInfoFrom(Feature))
94 if (FMV->ID)
95 FeatureBits.enable(E: *FMV->ID);
96
97 // Construct a bitmask for all the transitively enabled Arch Extensions.
98 APInt FeaturesMask = APInt::getZero(numBits: 128);
99 for (const FMVInfo &Info : getFMVInfo())
100 if (Info.ID && FeatureBits.Enabled.test(I: *Info.ID))
101 FeaturesMask.setBit(*Info.FeatureBit);
102
103 return FeaturesMask;
104}
105
106bool AArch64::getExtensionFeatures(
107 const AArch64::ExtensionBitset &InputExts,
108 std::vector<StringRef> &Features) {
109 for (const auto &E : Extensions)
110 /* INVALID and NONE have no feature name. */
111 if (InputExts.test(I: E.ID) && !E.PosTargetFeature.empty())
112 Features.push_back(x: E.PosTargetFeature);
113
114 return true;
115}
116
117StringRef AArch64::resolveCPUAlias(StringRef Name) {
118 for (const auto &A : CpuAliases)
119 if (A.AltName == Name)
120 return A.Name;
121 return Name;
122}
123
124StringRef AArch64::getArchExtFeature(StringRef ArchExt) {
125 bool IsNegated = ArchExt.starts_with(Prefix: "no");
126 StringRef ArchExtBase = IsNegated ? ArchExt.drop_front(N: 2) : ArchExt;
127
128 if (auto AE = parseArchExtension(Extension: ArchExtBase)) {
129 assert(!(AE.has_value() && AE->NegTargetFeature.empty()));
130 return IsNegated ? AE->NegTargetFeature : AE->PosTargetFeature;
131 }
132
133 return StringRef();
134}
135
136void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
137 for (const auto &C : CpuInfos)
138 Values.push_back(Elt: C.Name);
139
140 for (const auto &Alias : CpuAliases)
141 // The apple-latest alias is backend only, do not expose it to clang's -mcpu.
142 if (Alias.AltName != "apple-latest")
143 Values.push_back(Elt: Alias.AltName);
144
145 llvm::sort(C&: Values);
146}
147
148bool AArch64::isX18ReservedByDefault(const Triple &TT) {
149 return TT.isAndroid() || TT.isOSDarwin() || TT.isOSFuchsia() ||
150 TT.isOSWindows() || TT.isOHOSFamily();
151}
152
153// Allows partial match, ex. "v8a" matches "armv8a".
154const AArch64::ArchInfo *AArch64::parseArch(StringRef Arch) {
155 Arch = llvm::ARM::getCanonicalArchName(Arch);
156 if (checkArchVersion(Arch) < 8)
157 return {};
158
159 StringRef Syn = llvm::ARM::getArchSynonym(Arch);
160 for (const auto *A : ArchInfos) {
161 if (A->Name.ends_with(Suffix: Syn))
162 return A;
163 }
164 return {};
165}
166
167std::optional<AArch64::ExtensionInfo>
168AArch64::parseArchExtension(StringRef ArchExt) {
169 if (ArchExt.empty())
170 return {};
171 for (const auto &A : Extensions) {
172 if (ArchExt == A.UserVisibleName || ArchExt == A.Alias)
173 return A;
174 }
175 return {};
176}
177
178std::optional<AArch64::FMVInfo> AArch64::parseFMVExtension(StringRef FMVExt) {
179 // FIXME introduce general alias functionality, or remove this exception.
180 if (FMVExt == "rdma")
181 FMVExt = "rdm";
182
183 for (const auto &I : getFMVInfo()) {
184 if (FMVExt == I.Name)
185 return I;
186 }
187 return {};
188}
189
190std::optional<AArch64::ExtensionInfo>
191AArch64::targetFeatureToExtension(StringRef TargetFeature) {
192 for (const auto &E : Extensions)
193 if (TargetFeature == E.PosTargetFeature ||
194 TargetFeature == E.NegTargetFeature)
195 return E;
196 return {};
197}
198
199std::optional<AArch64::CpuInfo> AArch64::parseCpu(StringRef Name) {
200 // Resolve aliases first.
201 Name = resolveCPUAlias(Name);
202
203 // Then find the CPU name.
204 for (const auto &C : CpuInfos)
205 if (Name == C.Name)
206 return C;
207
208 return {};
209}
210
211void AArch64::PrintSupportedExtensions() {
212 outs() << "All available -march extensions for AArch64\n\n"
213 << " " << left_justify(Str: "Name", Width: 20)
214 << left_justify(Str: "Architecture Feature(s)", Width: 55)
215 << "Description\n";
216 for (const auto &Ext : Extensions) {
217 // Extensions without a feature cannot be used with -march.
218 if (!Ext.UserVisibleName.empty() && !Ext.PosTargetFeature.empty()) {
219 outs() << " "
220 << format(Fmt: Ext.Description.empty() ? "%-20s%s\n" : "%-20s%-55s%s\n",
221 Vals: Ext.UserVisibleName.str().c_str(),
222 Vals: Ext.ArchFeatureName.str().c_str(),
223 Vals: Ext.Description.str().c_str());
224 }
225 }
226}
227
228void
229AArch64::printEnabledExtensions(const std::set<StringRef> &EnabledFeatureNames) {
230 outs() << "Extensions enabled for the given AArch64 target\n\n"
231 << " " << left_justify(Str: "Architecture Feature(s)", Width: 55)
232 << "Description\n";
233 std::vector<ExtensionInfo> EnabledExtensionsInfo;
234 for (const auto &FeatureName : EnabledFeatureNames) {
235 std::string PosFeatureName = '+' + FeatureName.str();
236 if (auto ExtInfo = targetFeatureToExtension(TargetFeature: PosFeatureName))
237 EnabledExtensionsInfo.push_back(x: *ExtInfo);
238 }
239
240 std::sort(first: EnabledExtensionsInfo.begin(), last: EnabledExtensionsInfo.end(),
241 comp: [](const ExtensionInfo &Lhs, const ExtensionInfo &Rhs) {
242 return Lhs.ArchFeatureName < Rhs.ArchFeatureName;
243 });
244
245 for (const auto &Ext : EnabledExtensionsInfo) {
246 outs() << " "
247 << format(Fmt: "%-55s%s\n",
248 Vals: Ext.ArchFeatureName.str().c_str(),
249 Vals: Ext.Description.str().c_str());
250 }
251}
252
253const llvm::AArch64::ExtensionInfo &
254lookupExtensionByID(llvm::AArch64::ArchExtKind ExtID) {
255 for (const auto &E : llvm::AArch64::Extensions)
256 if (E.ID == ExtID)
257 return E;
258 llvm_unreachable("Invalid extension ID");
259}
260
261void AArch64::ExtensionSet::enable(ArchExtKind E) {
262 if (Enabled.test(I: E))
263 return;
264
265 LLVM_DEBUG(llvm::dbgs() << "Enable " << lookupExtensionByID(E).UserVisibleName << "\n");
266
267 Touched.set(E);
268 Enabled.set(E);
269
270 // Recursively enable all features that this one depends on. This handles all
271 // of the simple cases, where the behaviour doesn't depend on the base
272 // architecture version.
273 for (auto Dep : ExtensionDependencies)
274 if (E == Dep.Later)
275 enable(E: Dep.Earlier);
276
277 // Special cases for dependencies which vary depending on the base
278 // architecture version.
279 if (BaseArch) {
280 // +fp16 implies +fp16fml for v8.4A+, but not v9.0-A+
281 if (E == AEK_FP16 && BaseArch->is_superset(Other: ARMV8_4A) &&
282 !BaseArch->is_superset(Other: ARMV9A))
283 enable(E: AEK_FP16FML);
284
285 // For v8.4A+ and v9.0A+, +crypto also enables +sha3 and +sm4.
286 if (E == AEK_CRYPTO && BaseArch->is_superset(Other: ARMV8_4A)) {
287 enable(E: AEK_SHA3);
288 enable(E: AEK_SM4);
289 }
290 }
291}
292
293void AArch64::ExtensionSet::disable(ArchExtKind E) {
294 // -crypto always disables aes, sha2, sha3 and sm4, even for architectures
295 // where the latter two would not be enabled by +crypto.
296 if (E == AEK_CRYPTO) {
297 disable(E: AEK_AES);
298 disable(E: AEK_SHA2);
299 disable(E: AEK_SHA3);
300 disable(E: AEK_SM4);
301 }
302
303 // sve2-aes was historically associated with both FEAT_SVE2 and FEAT_SVE_AES,
304 // the latter is now associated with sve-aes and sve2-aes has become shorthand
305 // for +sve2+sve-aes. For backwards compatibility, when we disable sve2-aes we
306 // must also disable sve-aes.
307 if (E == AEK_SVE2AES)
308 disable(E: AEK_SVEAES);
309
310 // sve2-sm4 was historically associated with both FEAT_SVE2 and
311 // FEAT_SVE_SM4, the latter is now associated with sve-sm4 and sve2-sm4 has
312 // become shorthand for +sve2+sve-sm4. For backwards compatibility, when we
313 // disable sve2-sm4 we must also disable sve-sm4.
314 if (E == AEK_SVE2SM4)
315 disable(E: AEK_SVESM4);
316
317 // sve2-sha3 was historically associated with both FEAT_SVE2 and
318 // FEAT_SVE_SHA3, the latter is now associated with sve-sha3 and sve2-sha3 has
319 // become shorthand for +sve2+sve-sha3. For backwards compatibility, when we
320 // disable sve2-sha3 we must also disable sve-sha3.
321 if (E == AEK_SVE2SHA3)
322 disable(E: AEK_SVESHA3);
323
324 if (E == AEK_SVE2BITPERM){
325 disable(E: AEK_SVEBITPERM);
326 disable(E: AEK_SVE2);
327 }
328
329 if (!Enabled.test(I: E))
330 return;
331
332 LLVM_DEBUG(llvm::dbgs() << "Disable " << lookupExtensionByID(E).UserVisibleName << "\n");
333
334 Touched.set(E);
335 Enabled.reset(I: E);
336
337 // Recursively disable all features that depends on this one.
338 for (auto Dep : ExtensionDependencies)
339 if (E == Dep.Earlier)
340 disable(E: Dep.Later);
341}
342
343void AArch64::ExtensionSet::addCPUDefaults(const CpuInfo &CPU) {
344 LLVM_DEBUG(llvm::dbgs() << "addCPUDefaults(" << CPU.Name << ")\n");
345 BaseArch = &CPU.Arch;
346
347 AArch64::ExtensionBitset CPUExtensions = CPU.getImpliedExtensions();
348 for (const auto &E : Extensions)
349 if (CPUExtensions.test(I: E.ID))
350 enable(E: E.ID);
351}
352
353void AArch64::ExtensionSet::addArchDefaults(const ArchInfo &Arch) {
354 LLVM_DEBUG(llvm::dbgs() << "addArchDefaults(" << Arch.Name << ")\n");
355 BaseArch = &Arch;
356
357 for (const auto &E : Extensions)
358 if (Arch.DefaultExts.test(I: E.ID))
359 enable(E: E.ID);
360}
361
362bool AArch64::ExtensionSet::parseModifier(StringRef Modifier,
363 const bool AllowNoDashForm) {
364 LLVM_DEBUG(llvm::dbgs() << "parseModifier(" << Modifier << ")\n");
365
366 size_t NChars = 0;
367 // The "no-feat" form is allowed in the target attribute but nowhere else.
368 if (AllowNoDashForm && Modifier.starts_with(Prefix: "no-"))
369 NChars = 3;
370 else if (Modifier.starts_with(Prefix: "no"))
371 NChars = 2;
372 bool IsNegated = NChars != 0;
373 StringRef ArchExt = Modifier.drop_front(N: NChars);
374
375 if (auto AE = parseArchExtension(ArchExt)) {
376 if (AE->PosTargetFeature.empty() || AE->NegTargetFeature.empty())
377 return false;
378 if (IsNegated)
379 disable(E: AE->ID);
380 else
381 enable(E: AE->ID);
382 return true;
383 }
384 return false;
385}
386
387void AArch64::ExtensionSet::reconstructFromParsedFeatures(
388 const std::vector<std::string> &Features,
389 std::vector<std::string> &NonExtensions) {
390 assert(Touched.none() && "Bitset already initialized");
391 for (auto &F : Features) {
392 bool IsNegated = F[0] == '-';
393 if (auto AE = targetFeatureToExtension(TargetFeature: F)) {
394 Touched.set(AE->ID);
395 if (IsNegated)
396 Enabled.reset(I: AE->ID);
397 else
398 Enabled.set(AE->ID);
399 continue;
400 }
401 NonExtensions.push_back(x: F);
402 }
403}
404
405void AArch64::ExtensionSet::dump() const {
406 std::vector<StringRef> Features;
407 toLLVMFeatureList(Features);
408 for (StringRef F : Features)
409 llvm::outs() << F << " ";
410 llvm::outs() << "\n";
411}
412
413const AArch64::ExtensionInfo &
414AArch64::getExtensionByID(AArch64::ArchExtKind ExtID) {
415 return lookupExtensionByID(ExtID);
416}
417