1//===- ADCE.cpp - Code to perform dead code elimination -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the Aggressive Dead Code Elimination pass. This pass
10// optimistically assumes that all instructions are dead until proven otherwise,
11// allowing it to eliminate dead computations that other DCE passes do not
12// catch, particularly involving loop computations.
13//
14//===----------------------------------------------------------------------===//
15
16#include "llvm/Transforms/Scalar/ADCE.h"
17#include "ScalarOptions.h"
18#include "llvm/ADT/DepthFirstIterator.h"
19#include "llvm/ADT/GraphTraits.h"
20#include "llvm/ADT/PostOrderIterator.h"
21#include "llvm/ADT/SetVector.h"
22#include "llvm/ADT/SmallPtrSet.h"
23#include "llvm/ADT/SmallVector.h"
24#include "llvm/ADT/Statistic.h"
25#include "llvm/Analysis/CFG.h"
26#include "llvm/Analysis/DomTreeUpdater.h"
27#include "llvm/Analysis/GlobalsModRef.h"
28#include "llvm/Analysis/IteratedDominanceFrontier.h"
29#include "llvm/Analysis/MemorySSA.h"
30#include "llvm/Analysis/PostDominators.h"
31#include "llvm/IR/BasicBlock.h"
32#include "llvm/IR/CFG.h"
33#include "llvm/IR/DebugInfo.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Dominators.h"
37#include "llvm/IR/Function.h"
38#include "llvm/IR/IRBuilder.h"
39#include "llvm/IR/InstIterator.h"
40#include "llvm/IR/Instruction.h"
41#include "llvm/IR/Instructions.h"
42#include "llvm/IR/IntrinsicInst.h"
43#include "llvm/IR/PassManager.h"
44#include "llvm/IR/Use.h"
45#include "llvm/IR/Value.h"
46#include "llvm/ProfileData/InstrProf.h"
47#include "llvm/Support/Casting.h"
48#include "llvm/Support/Debug.h"
49#include "llvm/Support/raw_ostream.h"
50#include "llvm/Transforms/Utils/Local.h"
51#include <cassert>
52#include <cstddef>
53#include <utility>
54
55using namespace llvm;
56
57#define DEBUG_TYPE "adce"
58
59STATISTIC(NumRemoved, "Number of instructions removed");
60STATISTIC(NumBranchesRemoved, "Number of branch instructions removed");
61
62namespace {
63
64/// Information about basic blocks relevant to dead code elimination.
65struct BlockInfoType {
66 /// True when this block contains a live instructions.
67 bool Live = false;
68
69 /// True when this block is known to have live PHI nodes.
70 bool HasLivePhiNodes = false;
71
72 /// Control dependence sources need to be live for this block.
73 bool CFLive = false;
74
75 /// Post-order numbering of reverse control flow graph.
76 unsigned PostOrder = 0;
77};
78
79struct ADCEChanged {
80 bool ChangedAnything = false;
81 bool ChangedNonDebugInstr = false;
82 bool ChangedControlFlow = false;
83};
84
85class AggressiveDeadCodeElimination {
86 const ScalarOptions &Opts;
87 Function &F;
88
89 // ADCE does not use DominatorTree per se, but it updates it to preserve the
90 // analysis.
91 DominatorTree *DT;
92 PostDominatorTree &PDT;
93
94 /// Mapping of blocks to associated information, indexed by block number.
95 SmallVector<BlockInfoType> BlockInfo;
96
97 /// Set of live instructions.
98 SmallPtrSet<Instruction *, 32> LiveInst;
99 bool isLive(Instruction *I) { return LiveInst.contains(Ptr: I); }
100
101 /// Instructions known to be live where we need to mark
102 /// reaching definitions as live.
103 SmallVector<Instruction *, 128> Worklist;
104
105 /// Debug info scopes around a live instruction.
106 SmallPtrSet<const Metadata *, 32> AliveScopes;
107
108 /// Set of blocks with not known to have live terminators.
109 SmallSetVector<BasicBlock *, 16> BlocksWithDeadTerminators;
110
111 /// The set of blocks which we have determined whose control
112 /// dependence sources must be live and which have not had
113 /// those dependences analyzed.
114 SmallPtrSet<BasicBlock *, 16> NewLiveBlocks;
115
116 /// Set up auxiliary data structures for Instructions and BasicBlocks and
117 /// initialize the Worklist to the set of must-be-live Instruscions.
118 void initialize();
119
120 BlockInfoType &getBlockInfo(BasicBlock *BB) {
121 return BlockInfo[BB->getNumber()];
122 }
123
124 /// Return true for operations which are always treated as live.
125 bool isAlwaysLive(Instruction &I);
126
127 /// Return true for instrumentation instructions for value profiling.
128 bool isInstrumentsConstant(Instruction &I);
129
130 /// Propagate liveness to reaching definitions.
131 void markLiveInstructions();
132
133 /// Mark an instruction as live.
134 void markLive(Instruction *I);
135
136 /// Mark a block as live.
137 void markLive(BasicBlock *BB);
138
139 /// Mark terminators of control predecessors of a PHI node live.
140 void markPhiLive(PHINode *PN);
141
142 /// Record the Debug Scopes which surround live debug information.
143 void collectLiveScopes(const DILocalScope &LS);
144 void collectLiveScopes(const DILocation &DL);
145
146 /// Analyze dead branches to find those whose branches are the sources
147 /// of control dependences impacting a live block. Those branches are
148 /// marked live.
149 void markLiveBranchesFromControlDependences();
150
151 /// Remove instructions not marked live, return if any instruction was
152 /// removed.
153 ADCEChanged removeDeadInstructions();
154
155 /// Identify connected sections of the control flow graph which have
156 /// dead terminators and rewrite the control flow graph to remove them.
157 bool updateDeadRegions();
158
159 /// Set the BlockInfo::PostOrder field based on a post-order
160 /// numbering of the reverse control flow graph.
161 void computeReversePostOrder();
162
163 /// Make the terminator of this block an unconditional branch to \p Target.
164 void makeUnconditional(BasicBlock *BB, BasicBlock *Target);
165
166public:
167 AggressiveDeadCodeElimination(Function &F, DominatorTree *DT,
168 PostDominatorTree &PDT)
169 : Opts(ScalarOptions::Global), F(F), DT(DT), PDT(PDT) {}
170
171 ADCEChanged performDeadCodeElimination();
172};
173
174} // end anonymous namespace
175
176ADCEChanged AggressiveDeadCodeElimination::performDeadCodeElimination() {
177 initialize();
178 markLiveInstructions();
179 return removeDeadInstructions();
180}
181
182void AggressiveDeadCodeElimination::initialize() {
183 BlockInfo.resize(N: F.getMaxBlockNumber());
184 size_t NumInsts = 0;
185 for (auto &BB : F)
186 NumInsts += BB.size();
187 LiveInst.reserve(NewNumEntries: NumInsts);
188
189 // Collect the set of "root" instructions that are known live.
190 for (Instruction &I : instructions(F))
191 if (isAlwaysLive(I))
192 markLive(I: &I);
193
194 if (!Opts.adce_remove_control_flow)
195 return;
196
197 if (!Opts.adce_remove_loops) {
198 // Mark all terminators that have backedges as live.
199 SmallVector<std::pair<const BasicBlock *, const BasicBlock *>> Backedges;
200 FindFunctionBackedges(F, Result&: Backedges);
201 for (const auto &[Src, Dst] : Backedges)
202 markLive(I: const_cast<Instruction *>(Src->getTerminator()));
203 }
204
205 // Mark blocks live if there is no path from the block to a
206 // return of the function.
207 // We do this by seeing which of the postdomtree root children exit the
208 // program, and for all others, mark the subtree live.
209 for (const auto &PDTChild : children<DomTreeNode *>(G: PDT.getRootNode())) {
210 auto *BB = PDTChild->getBlock();
211 // Real function return
212 if (isa<ReturnInst>(Val: BB->back())) {
213 LLVM_DEBUG(dbgs() << "post-dom root child is a return: " << BB->getName()
214 << '\n';);
215 continue;
216 }
217
218 // This child is something else, like an infinite loop.
219 for (auto *DFNode : depth_first(G: PDTChild))
220 markLive(I: &DFNode->getBlock()->back());
221 }
222
223 // Treat the entry block as always live
224 auto *BB = &F.getEntryBlock();
225 auto &EntryInfo = getBlockInfo(BB);
226 EntryInfo.Live = true;
227 if (isa<UncondBrInst>(Val: BB->back()))
228 markLive(I: &BB->back());
229
230 // Build initial collection of blocks with dead terminators
231 for (auto &BB : F)
232 if (!isLive(I: &BB.back()))
233 BlocksWithDeadTerminators.insert(X: &BB);
234}
235
236bool AggressiveDeadCodeElimination::isAlwaysLive(Instruction &I) {
237 // TODO -- use llvm::isInstructionTriviallyDead
238 if (I.isEHPad() || I.mayHaveSideEffects()) {
239 // Skip any value profile instrumentation calls if they are
240 // instrumenting constants.
241 if (isInstrumentsConstant(I))
242 return false;
243 return true;
244 }
245 if (!I.isTerminator())
246 return false;
247 if (Opts.adce_remove_control_flow &&
248 isa<UncondBrInst, CondBrInst, SwitchInst>(Val: I))
249 return false;
250 return true;
251}
252
253// Check if this instruction is a runtime call for value profiling and
254// if it's instrumenting a constant.
255bool AggressiveDeadCodeElimination::isInstrumentsConstant(Instruction &I) {
256 // TODO -- move this test into llvm::isInstructionTriviallyDead
257 if (CallInst *CI = dyn_cast<CallInst>(Val: &I))
258 if (Function *Callee = CI->getCalledFunction())
259 if (Callee->getName() == getInstrProfValueProfFuncName())
260 if (isa<Constant>(Val: CI->getArgOperand(i: 0)))
261 return true;
262 return false;
263}
264
265void AggressiveDeadCodeElimination::markLiveInstructions() {
266 // Propagate liveness backwards to operands.
267 do {
268 // Worklist holds newly discovered live instructions
269 // where we need to mark the inputs as live.
270 while (!Worklist.empty()) {
271 Instruction *LiveInst = Worklist.pop_back_val();
272 LLVM_DEBUG(dbgs() << "work live: "; LiveInst->dump(););
273
274 for (Use &OI : LiveInst->operands())
275 if (Instruction *Inst = dyn_cast<Instruction>(Val&: OI))
276 markLive(I: Inst);
277
278 if (auto *PN = dyn_cast<PHINode>(Val: LiveInst))
279 markPhiLive(PN);
280 }
281
282 // After data flow liveness has been identified, examine which branch
283 // decisions are required to determine live instructions are executed.
284 markLiveBranchesFromControlDependences();
285
286 } while (!Worklist.empty());
287}
288
289void AggressiveDeadCodeElimination::markLive(Instruction *I) {
290 auto [It, Inserted] = LiveInst.insert(Ptr: I);
291 if (!Inserted)
292 return;
293
294 LLVM_DEBUG(dbgs() << "mark live: "; I->dump());
295 Worklist.push_back(Elt: I);
296
297 // Collect the live debug info scopes attached to this instruction.
298 if (const DILocation *DL = I->getDebugLoc())
299 collectLiveScopes(DL: *DL);
300
301 // Mark the containing block live
302 BasicBlock *BB = I->getParent();
303 if (I == &BB->back()) {
304 BlocksWithDeadTerminators.remove(X: BB);
305 // For live terminators, mark destination blocks
306 // live to preserve this control flow edges.
307 if (!isa<UncondBrInst>(Val: I))
308 for (auto *Succ : I->successors())
309 markLive(BB: Succ);
310 }
311 markLive(BB);
312}
313
314void AggressiveDeadCodeElimination::markLive(BasicBlock *BB) {
315 auto &BBInfo = BlockInfo[BB->getNumber()];
316 if (BBInfo.Live)
317 return;
318 LLVM_DEBUG(dbgs() << "mark block live: " << BB->getName() << '\n');
319 BBInfo.Live = true;
320 if (!BBInfo.CFLive) {
321 BBInfo.CFLive = true;
322 NewLiveBlocks.insert(Ptr: BB);
323 }
324
325 // Mark unconditional branches at the end of live
326 // blocks as live since there is no work to do for them later
327 if (isa<UncondBrInst>(Val: BB->back()))
328 markLive(I: &BB->back());
329}
330
331void AggressiveDeadCodeElimination::collectLiveScopes(const DILocalScope &LS) {
332 if (!AliveScopes.insert(Ptr: &LS).second)
333 return;
334
335 if (isa<DISubprogram>(Val: LS))
336 return;
337
338 // Tail-recurse through the scope chain.
339 collectLiveScopes(LS: cast<DILocalScope>(Val&: *LS.getScope()));
340}
341
342void AggressiveDeadCodeElimination::collectLiveScopes(const DILocation &DL) {
343 // Even though DILocations are not scopes, shove them into AliveScopes so we
344 // don't revisit them.
345 if (!AliveScopes.insert(Ptr: &DL).second)
346 return;
347
348 // Collect live scopes from the scope chain.
349 collectLiveScopes(LS: *DL.getScope());
350
351 // Tail-recurse through the inlined-at chain.
352 if (const DILocation *IA = DL.getInlinedAt())
353 collectLiveScopes(DL: *IA);
354}
355
356void AggressiveDeadCodeElimination::markPhiLive(PHINode *PN) {
357 auto &Info = getBlockInfo(BB: PN->getParent());
358 // Only need to check this once per block.
359 if (Info.HasLivePhiNodes)
360 return;
361 Info.HasLivePhiNodes = true;
362
363 // If a predecessor block is not live, mark it as control-flow live
364 // which will trigger marking live branches upon which
365 // that block is control dependent.
366 for (auto *PredBB : predecessors(BB: PN->getParent())) {
367 auto &Info = getBlockInfo(BB: PredBB);
368 if (!Info.CFLive) {
369 Info.CFLive = true;
370 NewLiveBlocks.insert(Ptr: PredBB);
371 }
372 }
373}
374
375void AggressiveDeadCodeElimination::markLiveBranchesFromControlDependences() {
376 if (BlocksWithDeadTerminators.empty())
377 return;
378
379 LLVM_DEBUG({
380 dbgs() << "new live blocks:\n";
381 for (auto *BB : NewLiveBlocks)
382 dbgs() << "\t" << BB->getName() << '\n';
383 dbgs() << "dead terminator blocks:\n";
384 for (auto *BB : BlocksWithDeadTerminators)
385 dbgs() << "\t" << BB->getName() << '\n';
386 });
387
388 // The dominance frontier of a live block X in the reverse
389 // control graph is the set of blocks upon which X is control
390 // dependent. The following sequence computes the set of blocks
391 // which currently have dead terminators that are control
392 // dependence sources of a block which is in NewLiveBlocks.
393
394 const SmallPtrSet<BasicBlock *, 16> BWDT(llvm::from_range,
395 BlocksWithDeadTerminators);
396 SmallVector<BasicBlock *, 32> IDFBlocks;
397 ReverseIDFCalculator IDFs(PDT);
398 IDFs.setDefiningBlocks(NewLiveBlocks);
399 IDFs.setLiveInBlocks(BWDT);
400 IDFs.calculate(IDFBlocks);
401 NewLiveBlocks.clear();
402
403 // Dead terminators which control live blocks are now marked live.
404 for (auto *BB : IDFBlocks) {
405 LLVM_DEBUG(dbgs() << "live control in: " << BB->getName() << '\n');
406 markLive(I: BB->getTerminator());
407 }
408}
409
410//===----------------------------------------------------------------------===//
411//
412// Routines to update the CFG and SSA information before removing dead code.
413//
414//===----------------------------------------------------------------------===//
415ADCEChanged AggressiveDeadCodeElimination::removeDeadInstructions() {
416 ADCEChanged Changed;
417 // Updates control and dataflow around dead blocks
418 Changed.ChangedControlFlow = updateDeadRegions();
419
420 LLVM_DEBUG({
421 for (Instruction &I : instructions(F)) {
422 // Check if the instruction is alive.
423 if (isLive(&I))
424 continue;
425
426 if (auto *DII = dyn_cast<DbgVariableIntrinsic>(&I)) {
427 // Check if the scope of this variable location is alive.
428 if (AliveScopes.count(DII->getDebugLoc()->getScope()))
429 continue;
430
431 // If intrinsic is pointing at a live SSA value, there may be an
432 // earlier optimization bug: if we know the location of the variable,
433 // why isn't the scope of the location alive?
434 for (Value *V : DII->location_ops()) {
435 if (Instruction *II = dyn_cast<Instruction>(V)) {
436 if (isLive(II)) {
437 dbgs() << "Dropping debug info for " << *DII << "\n";
438 break;
439 }
440 }
441 }
442 }
443 }
444 });
445
446 // The inverse of the live set is the dead set. These are those instructions
447 // that have no side effects and do not influence the control flow or return
448 // value of the function, and may therefore be deleted safely.
449 // NOTE: We reuse the Worklist vector here for memory efficiency.
450 for (Instruction &I : llvm::reverse(C: instructions(F))) {
451 // With "RemoveDIs" debug-info stored in DbgVariableRecord objects,
452 // debug-info attached to this instruction, and drop any for scopes that
453 // aren't alive, like the rest of this loop does. Extending support to
454 // assignment tracking is future work.
455 for (DbgRecord &DR : make_early_inc_range(Range: I.getDbgRecordRange())) {
456 // Avoid removing a DVR that is linked to instructions because it holds
457 // information about an existing store.
458 if (DbgVariableRecord *DVR = dyn_cast<DbgVariableRecord>(Val: &DR);
459 DVR && DVR->isDbgAssign())
460 if (!at::getAssignmentInsts(DVR).empty())
461 continue;
462 if (AliveScopes.count(Ptr: DR.getDebugLoc()->getScope()))
463 continue;
464 I.dropOneDbgRecord(I: &DR);
465 }
466
467 // Check if the instruction is alive.
468 if (isLive(I: &I))
469 continue;
470
471 Changed.ChangedNonDebugInstr = true;
472
473 // Prepare to delete.
474 Worklist.push_back(Elt: &I);
475 salvageDebugInfo(I);
476 }
477
478 for (Instruction *&I : Worklist)
479 I->dropAllReferences();
480
481 for (Instruction *&I : Worklist) {
482 ++NumRemoved;
483 I->eraseFromParent();
484 }
485
486 Changed.ChangedAnything = Changed.ChangedControlFlow || !Worklist.empty();
487
488 return Changed;
489}
490
491// A dead region is the set of dead blocks with a common live post-dominator.
492bool AggressiveDeadCodeElimination::updateDeadRegions() {
493 LLVM_DEBUG({
494 dbgs() << "final dead terminator blocks: " << '\n';
495 for (auto *BB : BlocksWithDeadTerminators)
496 dbgs() << '\t' << BB->getName()
497 << (getBlockInfo(BB).Live ? " LIVE\n" : "\n");
498 });
499
500 // Don't compute the post ordering unless we needed it.
501 bool HavePostOrder = false;
502 bool Changed = false;
503 SmallVector<DominatorTree::UpdateType, 10> DeletedEdges;
504
505 for (auto *BB : BlocksWithDeadTerminators) {
506 if (isa<UncondBrInst>(Val: BB->back())) {
507 LiveInst.insert(Ptr: &BB->back());
508 continue;
509 }
510
511 if (!HavePostOrder) {
512 computeReversePostOrder();
513 HavePostOrder = true;
514 }
515
516 // Add an unconditional branch to the successor closest to the
517 // end of the function which insures a path to the exit for each
518 // live edge.
519 BasicBlock *PreferredSucc = nullptr;
520 unsigned PreferredSuccPostOrder = 0;
521 for (auto *Succ : successors(BB)) {
522 unsigned SuccPostOrder = BlockInfo[Succ->getNumber()].PostOrder;
523 if (PreferredSuccPostOrder < SuccPostOrder) {
524 PreferredSucc = Succ;
525 PreferredSuccPostOrder = SuccPostOrder;
526 }
527 }
528 assert((PreferredSucc && PreferredSuccPostOrder > 0) &&
529 "Failed to find safe successor for dead branch");
530
531 // Collect removed successors to update the (Post)DominatorTrees.
532 SmallPtrSet<BasicBlock *, 4> RemovedSuccessors;
533 bool First = true;
534 for (auto *Succ : successors(BB)) {
535 if (!First || Succ != PreferredSucc) {
536 Succ->removePredecessor(Pred: BB);
537 RemovedSuccessors.insert(Ptr: Succ);
538 } else
539 First = false;
540 }
541 makeUnconditional(BB, Target: PreferredSucc);
542
543 // Inform the dominators about the deleted CFG edges.
544 for (auto *Succ : RemovedSuccessors) {
545 // It might have happened that the same successor appeared multiple times
546 // and the CFG edge wasn't really removed.
547 if (Succ != PreferredSucc) {
548 LLVM_DEBUG(dbgs() << "ADCE: (Post)DomTree edge enqueued for deletion"
549 << BB->getName() << " -> " << Succ->getName()
550 << "\n");
551 DeletedEdges.push_back(Elt: {DominatorTree::Delete, BB, Succ});
552 }
553 }
554
555 NumBranchesRemoved += 1;
556 Changed = true;
557 }
558
559 if (!DeletedEdges.empty())
560 DomTreeUpdater(DT, &PDT, DomTreeUpdater::UpdateStrategy::Eager)
561 .applyUpdates(Updates: DeletedEdges);
562
563 return Changed;
564}
565
566// reverse top-sort order
567void AggressiveDeadCodeElimination::computeReversePostOrder() {
568 // This provides a post-order numbering of the reverse control flow graph
569 // Note that it is incomplete in the presence of infinite loops but we don't
570 // need numbers blocks which don't reach the end of the functions since
571 // all branches in those blocks are forced live.
572
573 // For each block without successors, extend the DFS from the block
574 // backward through the graph
575 SmallPtrSet<BasicBlock*, 16> Visited;
576 unsigned PostOrder = 0;
577 for (auto &BB : F) {
578 if (!succ_empty(BB: &BB))
579 continue;
580 for (BasicBlock *Block : inverse_post_order_ext(G: &BB,S&: Visited))
581 getBlockInfo(BB: Block).PostOrder = PostOrder++;
582 }
583}
584
585void AggressiveDeadCodeElimination::makeUnconditional(BasicBlock *BB,
586 BasicBlock *Target) {
587 Instruction *PredTerm = BB->getTerminator();
588 // Collect the live debug info scopes attached to this instruction.
589 if (const DILocation *DL = PredTerm->getDebugLoc())
590 collectLiveScopes(DL: *DL);
591
592 // Just mark live an existing unconditional branch
593 if (auto *BI = dyn_cast<UncondBrInst>(Val: PredTerm)) {
594 BI->setSuccessor(Target);
595 LiveInst.insert(Ptr: PredTerm);
596 return;
597 }
598 LLVM_DEBUG(dbgs() << "making unconditional " << BB->getName() << '\n');
599 NumBranchesRemoved += 1;
600 IRBuilder<> Builder(PredTerm);
601 auto *NewTerm = Builder.CreateBr(Dest: Target);
602 LiveInst.insert(Ptr: NewTerm);
603 if (const DILocation *DL = PredTerm->getDebugLoc())
604 NewTerm->setDebugLoc(DL);
605 PredTerm->eraseFromParent();
606}
607
608//===----------------------------------------------------------------------===//
609//
610// Pass Manager integration code
611//
612//===----------------------------------------------------------------------===//
613PreservedAnalyses ADCEPass::run(Function &F, FunctionAnalysisManager &FAM) {
614 // ADCE does not need DominatorTree, but require DominatorTree here
615 // to update analysis if it is already available.
616 auto *DT = FAM.getCachedResult<DominatorTreeAnalysis>(IR&: F);
617 auto &PDT = FAM.getResult<PostDominatorTreeAnalysis>(IR&: F);
618 ADCEChanged Changed =
619 AggressiveDeadCodeElimination(F, DT, PDT).performDeadCodeElimination();
620 if (!Changed.ChangedAnything)
621 return PreservedAnalyses::all();
622
623 PreservedAnalyses PA;
624 if (!Changed.ChangedControlFlow) {
625 PA.preserveSet<CFGAnalyses>();
626 if (!Changed.ChangedNonDebugInstr) {
627 // Only removing debug instructions does not affect MemorySSA.
628 //
629 // Therefore we preserve MemorySSA when only removing debug instructions
630 // since otherwise later passes may behave differently which then makes
631 // the presence of debug info affect code generation.
632 PA.preserve<MemorySSAAnalysis>();
633 }
634 }
635 PA.preserve<DominatorTreeAnalysis>();
636 PA.preserve<PostDominatorTreeAnalysis>();
637
638 return PA;
639}
640