1//===--------------------- DispatchStatistics.cpp ---------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9///
10/// This file implements the DispatchStatistics interface.
11///
12//===----------------------------------------------------------------------===//
13
14#include "Views/DispatchStatistics.h"
15#include "llvm/Support/Format.h"
16
17namespace llvm {
18namespace mca {
19
20void DispatchStatistics::onEvent(const HWStallEvent &Event) {
21 if (Event.Type < HWStallEvent::LastGenericEvent)
22 HWStalls[Event.Type]++;
23}
24
25void DispatchStatistics::onEvent(const HWInstructionEvent &Event) {
26 if (Event.Type != HWInstructionEvent::Dispatched)
27 return;
28
29 const auto &DE = static_cast<const HWInstructionDispatchedEvent &>(Event);
30 NumDispatched += DE.MicroOpcodes;
31}
32
33void DispatchStatistics::printDispatchHistogram(raw_ostream &OS) const {
34 std::string Buffer;
35 raw_string_ostream TempStream(Buffer);
36 TempStream << "\n\nDispatch Logic - "
37 << "number of cycles where we saw N micro opcodes dispatched:\n";
38 TempStream << "[# dispatched], [# cycles]\n";
39 for (const std::pair<const unsigned, unsigned> &Entry :
40 DispatchGroupSizePerCycle) {
41 double Percentage = ((double)Entry.second / NumCycles) * 100.0;
42 TempStream << " " << Entry.first << ", " << Entry.second
43 << " (" << format(Fmt: "%.1f", Vals: floor(x: (Percentage * 10) + 0.5) / 10)
44 << "%)\n";
45 }
46
47 OS << Buffer;
48}
49
50static void printStalls(raw_ostream &OS, unsigned NumStalls,
51 unsigned NumCycles) {
52 if (!NumStalls) {
53 OS << NumStalls;
54 return;
55 }
56
57 double Percentage = ((double)NumStalls / NumCycles) * 100.0;
58 OS << NumStalls << " ("
59 << format(Fmt: "%.1f", Vals: floor(x: (Percentage * 10) + 0.5) / 10) << "%)";
60}
61
62void DispatchStatistics::printDispatchStalls(raw_ostream &OS) const {
63 std::string Buffer;
64 raw_string_ostream SS(Buffer);
65 SS << "\n\nDynamic Dispatch Stall Cycles:\n";
66 SS << "RAT - Register unavailable: ";
67 printStalls(OS&: SS, NumStalls: HWStalls[HWStallEvent::RegisterFileStall], NumCycles);
68 SS << "\nRCU - Retire tokens unavailable: ";
69 printStalls(OS&: SS, NumStalls: HWStalls[HWStallEvent::RetireControlUnitStall], NumCycles);
70 SS << "\nSCHEDQ - Scheduler full: ";
71 printStalls(OS&: SS, NumStalls: HWStalls[HWStallEvent::SchedulerQueueFull], NumCycles);
72 SS << "\nLQ - Load queue full: ";
73 printStalls(OS&: SS, NumStalls: HWStalls[HWStallEvent::LoadQueueFull], NumCycles);
74 SS << "\nSQ - Store queue full: ";
75 printStalls(OS&: SS, NumStalls: HWStalls[HWStallEvent::StoreQueueFull], NumCycles);
76 SS << "\nGROUP - Static restrictions on the dispatch group: ";
77 printStalls(OS&: SS, NumStalls: HWStalls[HWStallEvent::DispatchGroupStall], NumCycles);
78 SS << "\nUSH - Uncategorised Structural Hazard: ";
79 printStalls(OS&: SS, NumStalls: HWStalls[HWStallEvent::CustomBehaviourStall], NumCycles);
80 SS << '\n';
81 OS << Buffer;
82}
83
84json::Value DispatchStatistics::toJSON() const {
85 json::Object JO({{.K: "RAT", .V: HWStalls[HWStallEvent::RegisterFileStall]},
86 {.K: "RCU", .V: HWStalls[HWStallEvent::RetireControlUnitStall]},
87 {.K: "SCHEDQ", .V: HWStalls[HWStallEvent::SchedulerQueueFull]},
88 {.K: "LQ", .V: HWStalls[HWStallEvent::LoadQueueFull]},
89 {.K: "SQ", .V: HWStalls[HWStallEvent::StoreQueueFull]},
90 {.K: "GROUP", .V: HWStalls[HWStallEvent::DispatchGroupStall]},
91 {.K: "USH", .V: HWStalls[HWStallEvent::CustomBehaviourStall]}});
92 return JO;
93}
94
95} // namespace mca
96} // namespace llvm
97