1//===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file is part of the X86 Disassembler Emitter.
10// It contains the implementation of the disassembler tables.
11// Documentation for the disassembler emitter in general can be found in
12// X86DisassemblerEmitter.h.
13//
14//===----------------------------------------------------------------------===//
15
16#include "X86DisassemblerTables.h"
17#include "X86DisassemblerShared.h"
18#include "X86ModRMFilters.h"
19#include "llvm/ADT/SmallVector.h"
20#include "llvm/Support/ErrorHandling.h"
21#include "llvm/Support/Format.h"
22#include "llvm/Support/raw_ostream.h"
23#include <array>
24#include <map>
25
26using namespace llvm;
27using namespace X86Disassembler;
28
29/// stringForContext - Returns a string containing the name of a particular
30/// InstructionContext, usually for diagnostic purposes.
31///
32/// @param insnContext - The instruction class to transform to a string.
33/// @return - A statically-allocated string constant that contains the
34/// name of the instruction class.
35static inline const char *stringForContext(InstructionContext insnContext) {
36 switch (insnContext) {
37 default:
38 llvm_unreachable("Unhandled instruction class");
39#define ENUM_ENTRY(n, r, d) \
40 case n: \
41 return #n; \
42 break;
43#define ENUM_ENTRY_K_B(n, r, d) \
44 ENUM_ENTRY(n, r, d) \
45 ENUM_ENTRY(n##_K_B, r, d) \
46 ENUM_ENTRY(n##_KZ, r, d) \
47 ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d)
48 INSTRUCTION_CONTEXTS
49#undef ENUM_ENTRY
50#undef ENUM_ENTRY_K_B
51 }
52}
53
54/// stringForOperandType - Like stringForContext, but for OperandTypes.
55static inline const char *stringForOperandType(OperandType type) {
56 switch (type) {
57 default:
58 llvm_unreachable("Unhandled type");
59#define ENUM_ENTRY(i, d) \
60 case i: \
61 return #i;
62 TYPES
63#undef ENUM_ENTRY
64 }
65}
66
67/// stringForOperandEncoding - like stringForContext, but for
68/// OperandEncodings.
69static inline const char *stringForOperandEncoding(OperandEncoding encoding) {
70 switch (encoding) {
71 default:
72 llvm_unreachable("Unhandled encoding");
73#define ENUM_ENTRY(i, d) \
74 case i: \
75 return #i;
76 ENCODINGS
77#undef ENUM_ENTRY
78 }
79}
80
81/// inheritsFrom - Indicates whether all instructions in one class also belong
82/// to another class.
83///
84/// @param child - The class that may be the subset
85/// @param parent - The class that may be the superset
86/// @return - True if child is a subset of parent, false otherwise.
87static inline bool inheritsFrom(InstructionContext child,
88 InstructionContext parent, bool noPrefix = true,
89 bool VEX_LIG = false, bool WIG = false,
90 bool AdSize64 = false) {
91 if (child == parent)
92 return true;
93
94 switch (parent) {
95 case IC:
96 return (inheritsFrom(child, parent: IC_64BIT, noPrefix: AdSize64) ||
97 (noPrefix && inheritsFrom(child, parent: IC_OPSIZE, noPrefix)) ||
98 inheritsFrom(child, parent: IC_ADSIZE) ||
99 (noPrefix && inheritsFrom(child, parent: IC_XD, noPrefix)) ||
100 (noPrefix && inheritsFrom(child, parent: IC_XS, noPrefix)));
101 case IC_64BIT:
102 return (inheritsFrom(child, parent: IC_64BIT_REXW) ||
103 inheritsFrom(child, parent: IC_64BIT_REX2) ||
104 (noPrefix && inheritsFrom(child, parent: IC_64BIT_OPSIZE, noPrefix)) ||
105 (!AdSize64 && inheritsFrom(child, parent: IC_64BIT_ADSIZE)) ||
106 (noPrefix && inheritsFrom(child, parent: IC_64BIT_XD, noPrefix)) ||
107 (noPrefix && inheritsFrom(child, parent: IC_64BIT_XS, noPrefix)));
108 case IC_OPSIZE:
109 return inheritsFrom(child, parent: IC_64BIT_OPSIZE) ||
110 inheritsFrom(child, parent: IC_OPSIZE_ADSIZE);
111 case IC_ADSIZE:
112 return (noPrefix && inheritsFrom(child, parent: IC_OPSIZE_ADSIZE, noPrefix));
113 case IC_OPSIZE_ADSIZE:
114 return false;
115 case IC_64BIT_ADSIZE:
116 return (noPrefix && inheritsFrom(child, parent: IC_64BIT_OPSIZE_ADSIZE, noPrefix));
117 case IC_64BIT_OPSIZE_ADSIZE:
118 return false;
119 case IC_XD:
120 return inheritsFrom(child, parent: IC_64BIT_XD);
121 case IC_XS:
122 return inheritsFrom(child, parent: IC_64BIT_XS);
123 case IC_XD_OPSIZE:
124 return inheritsFrom(child, parent: IC_64BIT_XD_OPSIZE);
125 case IC_XS_OPSIZE:
126 return inheritsFrom(child, parent: IC_64BIT_XS_OPSIZE);
127 case IC_XD_ADSIZE:
128 return inheritsFrom(child, parent: IC_64BIT_XD_ADSIZE);
129 case IC_XS_ADSIZE:
130 return inheritsFrom(child, parent: IC_64BIT_XS_ADSIZE);
131 case IC_64BIT_REXW:
132 return ((noPrefix && inheritsFrom(child, parent: IC_64BIT_REXW_XS, noPrefix)) ||
133 (noPrefix && inheritsFrom(child, parent: IC_64BIT_REXW_XD, noPrefix)) ||
134 (noPrefix && inheritsFrom(child, parent: IC_64BIT_REXW_OPSIZE, noPrefix)) ||
135 (!AdSize64 && inheritsFrom(child, parent: IC_64BIT_REXW_ADSIZE)));
136 case IC_64BIT_OPSIZE:
137 return inheritsFrom(child, parent: IC_64BIT_REXW_OPSIZE) ||
138 (!AdSize64 && inheritsFrom(child, parent: IC_64BIT_OPSIZE_ADSIZE)) ||
139 (!AdSize64 && inheritsFrom(child, parent: IC_64BIT_REXW_ADSIZE));
140 case IC_64BIT_XD:
141 return (inheritsFrom(child, parent: IC_64BIT_REXW_XD) ||
142 (!AdSize64 && inheritsFrom(child, parent: IC_64BIT_XD_ADSIZE)));
143 case IC_64BIT_XS:
144 return (inheritsFrom(child, parent: IC_64BIT_REXW_XS) ||
145 (!AdSize64 && inheritsFrom(child, parent: IC_64BIT_XS_ADSIZE)));
146 case IC_64BIT_XD_OPSIZE:
147 case IC_64BIT_XS_OPSIZE:
148 return false;
149 case IC_64BIT_XD_ADSIZE:
150 case IC_64BIT_XS_ADSIZE:
151 return false;
152 case IC_64BIT_REXW_XD:
153 case IC_64BIT_REXW_XS:
154 case IC_64BIT_REXW_OPSIZE:
155 case IC_64BIT_REXW_ADSIZE:
156 case IC_64BIT_REX2_REXW:
157 return false;
158 case IC_64BIT_REX2:
159 return inheritsFrom(child, parent: IC_64BIT_REX2_REXW);
160 case IC_VEX:
161 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_VEX_L_W)) ||
162 (WIG && inheritsFrom(child, parent: IC_VEX_W)) ||
163 (VEX_LIG && inheritsFrom(child, parent: IC_VEX_L));
164 case IC_VEX_XS:
165 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_VEX_L_W_XS)) ||
166 (WIG && inheritsFrom(child, parent: IC_VEX_W_XS)) ||
167 (VEX_LIG && inheritsFrom(child, parent: IC_VEX_L_XS));
168 case IC_VEX_XD:
169 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_VEX_L_W_XD)) ||
170 (WIG && inheritsFrom(child, parent: IC_VEX_W_XD)) ||
171 (VEX_LIG && inheritsFrom(child, parent: IC_VEX_L_XD));
172 case IC_VEX_OPSIZE:
173 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_VEX_L_W_OPSIZE)) ||
174 (WIG && inheritsFrom(child, parent: IC_VEX_W_OPSIZE)) ||
175 (VEX_LIG && inheritsFrom(child, parent: IC_VEX_L_OPSIZE));
176 case IC_VEX_W:
177 return VEX_LIG && inheritsFrom(child, parent: IC_VEX_L_W);
178 case IC_VEX_W_XS:
179 return VEX_LIG && inheritsFrom(child, parent: IC_VEX_L_W_XS);
180 case IC_VEX_W_XD:
181 return VEX_LIG && inheritsFrom(child, parent: IC_VEX_L_W_XD);
182 case IC_VEX_W_OPSIZE:
183 return VEX_LIG && inheritsFrom(child, parent: IC_VEX_L_W_OPSIZE);
184 case IC_VEX_L:
185 return WIG && inheritsFrom(child, parent: IC_VEX_L_W);
186 case IC_VEX_L_XS:
187 return WIG && inheritsFrom(child, parent: IC_VEX_L_W_XS);
188 case IC_VEX_L_XD:
189 return WIG && inheritsFrom(child, parent: IC_VEX_L_W_XD);
190 case IC_VEX_L_OPSIZE:
191 return WIG && inheritsFrom(child, parent: IC_VEX_L_W_OPSIZE);
192 case IC_VEX_L_W:
193 case IC_VEX_L_W_XS:
194 case IC_VEX_L_W_XD:
195 case IC_VEX_L_W_OPSIZE:
196 return false;
197 case IC_EVEX:
198 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W)) ||
199 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W)) ||
200 (WIG && inheritsFrom(child, parent: IC_EVEX_W)) ||
201 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L)) ||
202 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2));
203 case IC_EVEX_XS:
204 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS)) ||
205 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS)) ||
206 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XS)) ||
207 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XS)) ||
208 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XS));
209 case IC_EVEX_XD:
210 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD)) ||
211 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD)) ||
212 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XD)) ||
213 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XD)) ||
214 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XD));
215 case IC_EVEX_OPSIZE:
216 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE)) ||
217 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE)) ||
218 (WIG && inheritsFrom(child, parent: IC_EVEX_W_OPSIZE)) ||
219 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_OPSIZE)) ||
220 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_OPSIZE));
221 case IC_EVEX_OPSIZE_ADSIZE:
222 case IC_EVEX_XS_ADSIZE:
223 case IC_EVEX_XD_ADSIZE:
224 return false;
225 case IC_EVEX_K:
226 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_K)) ||
227 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_K)) ||
228 (WIG && inheritsFrom(child, parent: IC_EVEX_W_K)) ||
229 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_K)) ||
230 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_K));
231 case IC_EVEX_XS_K:
232 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_K)) ||
233 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_K)) ||
234 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XS_K)) ||
235 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XS_K)) ||
236 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XS_K));
237 case IC_EVEX_XD_K:
238 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_K)) ||
239 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_K)) ||
240 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XD_K)) ||
241 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XD_K)) ||
242 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XD_K));
243 case IC_EVEX_OPSIZE_K:
244 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_K)) ||
245 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_K)) ||
246 (WIG && inheritsFrom(child, parent: IC_EVEX_W_OPSIZE_K)) ||
247 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_OPSIZE_K)) ||
248 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_OPSIZE_K));
249 case IC_EVEX_KZ:
250 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_KZ)) ||
251 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_KZ)) ||
252 (WIG && inheritsFrom(child, parent: IC_EVEX_W_KZ)) ||
253 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_KZ)) ||
254 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_KZ));
255 case IC_EVEX_XS_KZ:
256 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_KZ)) ||
257 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_KZ)) ||
258 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XS_KZ)) ||
259 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XS_KZ)) ||
260 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XS_KZ));
261 case IC_EVEX_XD_KZ:
262 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_KZ)) ||
263 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_KZ)) ||
264 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XD_KZ)) ||
265 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XD_KZ)) ||
266 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XD_KZ));
267 case IC_EVEX_OPSIZE_KZ:
268 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_KZ)) ||
269 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_KZ)) ||
270 (WIG && inheritsFrom(child, parent: IC_EVEX_W_OPSIZE_KZ)) ||
271 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_OPSIZE_KZ)) ||
272 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_OPSIZE_KZ));
273 case IC_EVEX_W:
274 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W)) ||
275 inheritsFrom(child, parent: IC_EVEX_W_OPSIZE) ||
276 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W));
277 case IC_EVEX_W_XS:
278 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS)) ||
279 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS));
280 case IC_EVEX_W_XD:
281 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD)) ||
282 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD));
283 case IC_EVEX_W_OPSIZE:
284 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE)) ||
285 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE));
286 case IC_EVEX_W_K:
287 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_K)) ||
288 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_K));
289 case IC_EVEX_W_XS_K:
290 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_K)) ||
291 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_K));
292 case IC_EVEX_W_XD_K:
293 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_K)) ||
294 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_K));
295 case IC_EVEX_W_OPSIZE_K:
296 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_K)) ||
297 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_K));
298 case IC_EVEX_W_KZ:
299 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_KZ)) ||
300 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_KZ));
301 case IC_EVEX_W_XS_KZ:
302 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_KZ)) ||
303 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_KZ));
304 case IC_EVEX_W_XD_KZ:
305 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_KZ)) ||
306 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_KZ));
307 case IC_EVEX_W_OPSIZE_KZ:
308 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_KZ)) ||
309 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_KZ));
310 case IC_EVEX_L:
311 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W);
312 case IC_EVEX_L_XS:
313 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS);
314 case IC_EVEX_L_XD:
315 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD);
316 case IC_EVEX_L_OPSIZE:
317 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE);
318 case IC_EVEX_L_K:
319 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_K);
320 case IC_EVEX_L_XS_K:
321 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_K);
322 case IC_EVEX_L_XD_K:
323 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_K);
324 case IC_EVEX_L_OPSIZE_K:
325 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_K);
326 case IC_EVEX_L_KZ:
327 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_KZ);
328 case IC_EVEX_L_XS_KZ:
329 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_KZ);
330 case IC_EVEX_L_XD_KZ:
331 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_KZ);
332 case IC_EVEX_L_OPSIZE_KZ:
333 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_KZ);
334 case IC_EVEX_L_W:
335 case IC_EVEX_L_W_XS:
336 case IC_EVEX_L_W_XD:
337 case IC_EVEX_L_W_OPSIZE:
338 return false;
339 case IC_EVEX_L_W_K:
340 case IC_EVEX_L_W_XS_K:
341 case IC_EVEX_L_W_XD_K:
342 case IC_EVEX_L_W_OPSIZE_K:
343 return false;
344 case IC_EVEX_L_W_KZ:
345 case IC_EVEX_L_W_XS_KZ:
346 case IC_EVEX_L_W_XD_KZ:
347 case IC_EVEX_L_W_OPSIZE_KZ:
348 return false;
349 case IC_EVEX_L2:
350 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W);
351 case IC_EVEX_L2_XS:
352 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS);
353 case IC_EVEX_L2_XD:
354 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD);
355 case IC_EVEX_L2_OPSIZE:
356 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE);
357 case IC_EVEX_L2_K:
358 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_K);
359 case IC_EVEX_L2_XS_K:
360 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_K);
361 case IC_EVEX_L2_XD_K:
362 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_K);
363 case IC_EVEX_L2_OPSIZE_K:
364 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_K);
365 case IC_EVEX_L2_KZ:
366 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_KZ);
367 case IC_EVEX_L2_XS_KZ:
368 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_KZ);
369 case IC_EVEX_L2_XD_KZ:
370 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_KZ);
371 case IC_EVEX_L2_OPSIZE_KZ:
372 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_KZ);
373 case IC_EVEX_L2_W:
374 case IC_EVEX_L2_W_XS:
375 case IC_EVEX_L2_W_XD:
376 case IC_EVEX_L2_W_OPSIZE:
377 return false;
378 case IC_EVEX_L2_W_K:
379 case IC_EVEX_L2_W_XS_K:
380 case IC_EVEX_L2_W_XD_K:
381 case IC_EVEX_L2_W_OPSIZE_K:
382 return false;
383 case IC_EVEX_L2_W_KZ:
384 case IC_EVEX_L2_W_XS_KZ:
385 case IC_EVEX_L2_W_XD_KZ:
386 case IC_EVEX_L2_W_OPSIZE_KZ:
387 return false;
388 case IC_EVEX_B:
389 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_B)) ||
390 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_B)) ||
391 (WIG && inheritsFrom(child, parent: IC_EVEX_W_B)) ||
392 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_B)) ||
393 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_B));
394 case IC_EVEX_XS_B:
395 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_B)) ||
396 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_B)) ||
397 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XS_B)) ||
398 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XS_B)) ||
399 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XS_B));
400 case IC_EVEX_XD_B:
401 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_B)) ||
402 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_B)) ||
403 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XD_B)) ||
404 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XD_B)) ||
405 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XD_B));
406 case IC_EVEX_OPSIZE_B:
407 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_B)) ||
408 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_B)) ||
409 (WIG && inheritsFrom(child, parent: IC_EVEX_W_OPSIZE_B)) ||
410 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_OPSIZE_B)) ||
411 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_OPSIZE_B));
412 case IC_EVEX_K_B:
413 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_K_B)) ||
414 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_K_B)) ||
415 (WIG && inheritsFrom(child, parent: IC_EVEX_W_K_B)) ||
416 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_K_B)) ||
417 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_K_B));
418 case IC_EVEX_XS_K_B:
419 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_K_B)) ||
420 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_K_B)) ||
421 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XS_K_B)) ||
422 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XS_K_B)) ||
423 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XS_K_B));
424 case IC_EVEX_XD_K_B:
425 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_K_B)) ||
426 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_K_B)) ||
427 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XD_K_B)) ||
428 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XD_K_B)) ||
429 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XD_K_B));
430 case IC_EVEX_OPSIZE_K_B:
431 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_K_B)) ||
432 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_K_B)) ||
433 (WIG && inheritsFrom(child, parent: IC_EVEX_W_OPSIZE_K_B)) ||
434 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_OPSIZE_K_B)) ||
435 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_OPSIZE_K_B));
436 case IC_EVEX_KZ_B:
437 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_KZ_B)) ||
438 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_KZ_B)) ||
439 (WIG && inheritsFrom(child, parent: IC_EVEX_W_KZ_B)) ||
440 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_KZ_B)) ||
441 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_KZ_B));
442 case IC_EVEX_XS_KZ_B:
443 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_KZ_B)) ||
444 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_KZ_B)) ||
445 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XS_KZ_B)) ||
446 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XS_KZ_B)) ||
447 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XS_KZ_B));
448 case IC_EVEX_XD_KZ_B:
449 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_KZ_B)) ||
450 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_KZ_B)) ||
451 (WIG && inheritsFrom(child, parent: IC_EVEX_W_XD_KZ_B)) ||
452 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_XD_KZ_B)) ||
453 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_XD_KZ_B));
454 case IC_EVEX_OPSIZE_KZ_B:
455 return (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_KZ_B)) ||
456 (VEX_LIG && WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
457 (WIG && inheritsFrom(child, parent: IC_EVEX_W_OPSIZE_KZ_B)) ||
458 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_OPSIZE_KZ_B)) ||
459 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_OPSIZE_KZ_B));
460 case IC_EVEX_W_B:
461 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_B)) ||
462 inheritsFrom(child, parent: IC_EVEX_W_OPSIZE_B) ||
463 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_B));
464 case IC_EVEX_W_XS_B:
465 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_B)) ||
466 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_B));
467 case IC_EVEX_W_XD_B:
468 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_B)) ||
469 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_B));
470 case IC_EVEX_W_OPSIZE_B:
471 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_B)) ||
472 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_B));
473 case IC_EVEX_W_K_B:
474 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_K_B)) ||
475 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_K_B));
476 case IC_EVEX_W_XS_K_B:
477 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_K_B)) ||
478 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_K_B));
479 case IC_EVEX_W_XD_K_B:
480 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_K_B)) ||
481 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_K_B));
482 case IC_EVEX_W_OPSIZE_K_B:
483 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_K_B)) ||
484 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_K_B));
485 case IC_EVEX_W_KZ_B:
486 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_KZ_B)) ||
487 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_KZ_B));
488 case IC_EVEX_W_XS_KZ_B:
489 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_KZ_B)) ||
490 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_KZ_B));
491 case IC_EVEX_W_XD_KZ_B:
492 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_KZ_B)) ||
493 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_KZ_B));
494 case IC_EVEX_W_OPSIZE_KZ_B:
495 return (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_KZ_B)) ||
496 (VEX_LIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_KZ_B));
497 case IC_EVEX_L_B:
498 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_B);
499 case IC_EVEX_L_XS_B:
500 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_B);
501 case IC_EVEX_L_XD_B:
502 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_B);
503 case IC_EVEX_L_OPSIZE_B:
504 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_B);
505 case IC_EVEX_L_K_B:
506 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_K_B);
507 case IC_EVEX_L_XS_K_B:
508 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_K_B);
509 case IC_EVEX_L_XD_K_B:
510 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_K_B);
511 case IC_EVEX_L_OPSIZE_K_B:
512 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_K_B);
513 case IC_EVEX_L_KZ_B:
514 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_KZ_B);
515 case IC_EVEX_L_XS_KZ_B:
516 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XS_KZ_B);
517 case IC_EVEX_L_XD_KZ_B:
518 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_XD_KZ_B);
519 case IC_EVEX_L_OPSIZE_KZ_B:
520 return WIG && inheritsFrom(child, parent: IC_EVEX_L_W_OPSIZE_KZ_B);
521 case IC_EVEX_L_W_B:
522 case IC_EVEX_L_W_XS_B:
523 case IC_EVEX_L_W_XD_B:
524 case IC_EVEX_L_W_OPSIZE_B:
525 return false;
526 case IC_EVEX_L_W_K_B:
527 case IC_EVEX_L_W_XS_K_B:
528 case IC_EVEX_L_W_XD_K_B:
529 case IC_EVEX_L_W_OPSIZE_K_B:
530 return false;
531 case IC_EVEX_L_W_KZ_B:
532 case IC_EVEX_L_W_XS_KZ_B:
533 case IC_EVEX_L_W_XD_KZ_B:
534 case IC_EVEX_L_W_OPSIZE_KZ_B:
535 return false;
536 case IC_EVEX_L2_B:
537 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_B);
538 case IC_EVEX_L2_XS_B:
539 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_B);
540 case IC_EVEX_L2_XD_B:
541 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_B);
542 case IC_EVEX_L2_OPSIZE_B:
543 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_B);
544 case IC_EVEX_L2_K_B:
545 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_K_B);
546 case IC_EVEX_L2_XS_K_B:
547 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_K_B);
548 case IC_EVEX_L2_XD_K_B:
549 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_K_B);
550 case IC_EVEX_L2_OPSIZE_K_B:
551 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_K_B);
552 case IC_EVEX_L2_KZ_B:
553 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_KZ_B);
554 case IC_EVEX_L2_XS_KZ_B:
555 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XS_KZ_B);
556 case IC_EVEX_L2_XD_KZ_B:
557 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_XD_KZ_B);
558 case IC_EVEX_L2_OPSIZE_KZ_B:
559 return WIG && inheritsFrom(child, parent: IC_EVEX_L2_W_OPSIZE_KZ_B);
560 case IC_EVEX_L2_W_B:
561 case IC_EVEX_L2_W_XS_B:
562 case IC_EVEX_L2_W_XD_B:
563 case IC_EVEX_L2_W_OPSIZE_B:
564 return false;
565 case IC_EVEX_L2_W_K_B:
566 case IC_EVEX_L2_W_XS_K_B:
567 case IC_EVEX_L2_W_XD_K_B:
568 case IC_EVEX_L2_W_OPSIZE_K_B:
569 return false;
570 case IC_EVEX_L2_W_KZ_B:
571 case IC_EVEX_L2_W_XS_KZ_B:
572 case IC_EVEX_L2_W_XD_KZ_B:
573 case IC_EVEX_L2_W_OPSIZE_KZ_B:
574 return false;
575 case IC_EVEX_NF:
576 return WIG && inheritsFrom(child, parent: IC_EVEX_W_NF);
577 case IC_EVEX_B_NF:
578 return WIG && inheritsFrom(child, parent: IC_EVEX_W_B_NF);
579 case IC_EVEX_OPSIZE_NF:
580 case IC_EVEX_OPSIZE_B_NF:
581 case IC_EVEX_W_NF:
582 case IC_EVEX_W_B_NF:
583 return false;
584 case IC_EVEX_B_U:
585 case IC_EVEX_XS_B_U:
586 case IC_EVEX_XD_B_U:
587 case IC_EVEX_OPSIZE_B_U:
588 case IC_EVEX_W_B_U:
589 case IC_EVEX_W_XS_B_U:
590 case IC_EVEX_W_XD_B_U:
591 case IC_EVEX_W_OPSIZE_B_U:
592 case IC_EVEX_K_B_U:
593 case IC_EVEX_XS_K_B_U:
594 case IC_EVEX_XD_K_B_U:
595 case IC_EVEX_OPSIZE_K_B_U:
596 case IC_EVEX_W_K_B_U:
597 case IC_EVEX_W_XS_K_B_U:
598 case IC_EVEX_W_XD_K_B_U:
599 case IC_EVEX_W_OPSIZE_K_B_U:
600 case IC_EVEX_KZ_B_U:
601 case IC_EVEX_XS_KZ_B_U:
602 case IC_EVEX_XD_KZ_B_U:
603 case IC_EVEX_OPSIZE_KZ_B_U:
604 case IC_EVEX_W_KZ_B_U:
605 case IC_EVEX_W_XS_KZ_B_U:
606 case IC_EVEX_W_XD_KZ_B_U:
607 case IC_EVEX_W_OPSIZE_KZ_B_U:
608 return false;
609 default:
610 errs() << "Unknown instruction class: " << stringForContext(insnContext: parent) << "\n";
611 llvm_unreachable("Unknown instruction class");
612 }
613}
614
615/// outranks - Indicates whether, if an instruction has two different applicable
616/// classes, which class should be preferred when performing decode. This
617/// imposes a total ordering (ties are resolved toward "lower")
618///
619/// @param upper - The class that may be preferable
620/// @param lower - The class that may be less preferable
621/// @return - True if upper is to be preferred, false otherwise.
622static inline bool outranks(InstructionContext upper,
623 InstructionContext lower) {
624 assert(upper < IC_max);
625 assert(lower < IC_max);
626
627#define ENUM_ENTRY(n, r, d) r,
628#define ENUM_ENTRY_K_B(n, r, d) \
629 ENUM_ENTRY(n, r, d) \
630 ENUM_ENTRY(n##_K_B, r, d) \
631 ENUM_ENTRY(n##_KZ_B, r, d) \
632 ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)
633 static int ranks[IC_max] = {INSTRUCTION_CONTEXTS};
634#undef ENUM_ENTRY
635#undef ENUM_ENTRY_K_B
636
637 return (ranks[upper] > ranks[lower]);
638}
639
640/// getDecisionType - Determines whether a ModRM decision with 255 entries can
641/// be compacted by eliminating redundant information.
642///
643/// @param decision - The decision to be compacted.
644/// @return - The compactest available representation for the decision.
645static ModRMDecisionType getDecisionType(const ModRMDecision &decision) {
646 bool satisfiesOneEntry = true;
647 bool satisfiesSplitRM = true;
648 bool satisfiesSplitReg = true;
649 bool satisfiesSplitMisc = true;
650
651 for (unsigned index = 0; index < 256; ++index) {
652 if (decision.instructionIDs[index] != decision.instructionIDs[0])
653 satisfiesOneEntry = false;
654
655 if (((index & 0xc0) == 0xc0) &&
656 (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
657 satisfiesSplitRM = false;
658
659 if (((index & 0xc0) != 0xc0) &&
660 (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
661 satisfiesSplitRM = false;
662
663 if (((index & 0xc0) == 0xc0) && (decision.instructionIDs[index] !=
664 decision.instructionIDs[index & 0xf8]))
665 satisfiesSplitReg = false;
666
667 if (((index & 0xc0) != 0xc0) && (decision.instructionIDs[index] !=
668 decision.instructionIDs[index & 0x38]))
669 satisfiesSplitMisc = false;
670 }
671
672 if (satisfiesOneEntry)
673 return MODRM_ONEENTRY;
674
675 if (satisfiesSplitRM)
676 return MODRM_SPLITRM;
677
678 if (satisfiesSplitReg && satisfiesSplitMisc)
679 return MODRM_SPLITREG;
680
681 if (satisfiesSplitMisc)
682 return MODRM_SPLITMISC;
683
684 return MODRM_FULL;
685}
686
687/// stringForDecisionType - Returns a statically-allocated string corresponding
688/// to a particular decision type.
689///
690/// @param dt - The decision type.
691/// @return - A pointer to the statically-allocated string (e.g.,
692/// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
693static const char *stringForDecisionType(ModRMDecisionType dt) {
694#define ENUM_ENTRY(n) \
695 case n: \
696 return #n;
697 switch (dt) {
698 default:
699 llvm_unreachable("Unknown decision type");
700 MODRMTYPES
701 };
702#undef ENUM_ENTRY
703}
704
705DisassemblerTables::DisassemblerTables() {
706 for (unsigned i = 0; i < std::size(Tables); i++)
707 Tables[i] = std::make_unique<ContextDecision>();
708
709 HasConflicts = false;
710}
711
712DisassemblerTables::~DisassemblerTables() = default;
713
714void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
715 unsigned &i1, unsigned &i2,
716 unsigned &ModRMTableNum,
717 ModRMDecision &decision) const {
718 static uint64_t sEntryNumber = 1;
719 ModRMDecisionType dt = getDecisionType(decision);
720
721 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0) {
722 // Empty table.
723 o2 << "{" << stringForDecisionType(dt) << ", 0}";
724 return;
725 }
726
727 std::vector<unsigned> ModRMDecision;
728
729 switch (dt) {
730 default:
731 llvm_unreachable("Unknown decision type");
732 case MODRM_ONEENTRY:
733 ModRMDecision.push_back(x: decision.instructionIDs[0]);
734 break;
735 case MODRM_SPLITRM:
736 ModRMDecision.push_back(x: decision.instructionIDs[0x00]);
737 ModRMDecision.push_back(x: decision.instructionIDs[0xc0]);
738 break;
739 case MODRM_SPLITREG:
740 for (unsigned index = 0; index < 64; index += 8)
741 ModRMDecision.push_back(x: decision.instructionIDs[index]);
742 for (unsigned index = 0xc0; index < 256; index += 8)
743 ModRMDecision.push_back(x: decision.instructionIDs[index]);
744 break;
745 case MODRM_SPLITMISC:
746 for (unsigned index = 0; index < 64; index += 8)
747 ModRMDecision.push_back(x: decision.instructionIDs[index]);
748 for (unsigned index = 0xc0; index < 256; ++index)
749 ModRMDecision.push_back(x: decision.instructionIDs[index]);
750 break;
751 case MODRM_FULL:
752 llvm::append_range(C&: ModRMDecision, R&: decision.instructionIDs);
753 break;
754 }
755
756 unsigned &EntryNumber = ModRMTable[ModRMDecision];
757 if (EntryNumber == 0) {
758 EntryNumber = ModRMTableNum;
759
760 ModRMTableNum += ModRMDecision.size();
761 o1 << "/*Table" << EntryNumber << "*/\n";
762 i1++;
763 for (unsigned I : ModRMDecision) {
764 o1.indent(NumSpaces: i1 * 2) << format(Fmt: "0x%hx", Vals: I) << ", /*"
765 << InstructionSpecifiers[I].name << "*/\n";
766 }
767 i1--;
768 }
769
770 o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}";
771
772 switch (dt) {
773 default:
774 llvm_unreachable("Unknown decision type");
775 case MODRM_ONEENTRY:
776 sEntryNumber += 1;
777 break;
778 case MODRM_SPLITRM:
779 sEntryNumber += 2;
780 break;
781 case MODRM_SPLITREG:
782 sEntryNumber += 16;
783 break;
784 case MODRM_SPLITMISC:
785 sEntryNumber += 8 + 64;
786 break;
787 case MODRM_FULL:
788 sEntryNumber += 256;
789 break;
790 }
791
792 // We assume that the index can fit into uint32_t.
793 assert(sEntryNumber < -1U &&
794 "Index into ModRMDecision is too large for uint32_t!");
795 (void)sEntryNumber;
796}
797
798void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
799 unsigned &i1, unsigned &i2,
800 unsigned &ModRMTableNum,
801 OpcodeDecision &opDecision) const {
802 o2 << "{";
803 ++i2;
804
805 unsigned index;
806 for (index = 0; index < 256; ++index) {
807 auto &decision = opDecision.modRMDecisions[index];
808 ModRMDecisionType dt = getDecisionType(decision);
809 if (!(dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0))
810 break;
811 }
812 if (index == 256) {
813 // If all 256 entries are MODRM_ONEENTRY, omit output.
814 static_assert(MODRM_ONEENTRY == 0);
815 --i2;
816 o2 << "},\n";
817 } else {
818 o2 << " /* struct OpcodeDecision */ {\n";
819 for (index = 0; index < 256; ++index) {
820 o2.indent(NumSpaces: i2);
821
822 o2 << "/*0x" << format(Fmt: "%02hhx", Vals: index) << "*/";
823
824 emitModRMDecision(o1, o2, i1, i2, ModRMTableNum,
825 decision&: opDecision.modRMDecisions[index]);
826
827 if (index < 255)
828 o2 << ",";
829
830 o2 << "\n";
831 }
832 o2.indent(NumSpaces: i2) << "}\n";
833 --i2;
834 o2.indent(NumSpaces: i2) << "},\n";
835 }
836}
837
838void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
839 unsigned &i1, unsigned &i2,
840 unsigned &ModRMTableNum,
841 ContextDecision &decision,
842 const char *name) const {
843 o2.indent(NumSpaces: i2) << "static const struct ContextDecision " << name
844 << " = {{/* opcodeDecisions */\n";
845 i2++;
846
847 for (unsigned index = 0; index < IC_max; ++index) {
848 o2.indent(NumSpaces: i2) << "/*";
849 o2 << stringForContext(insnContext: (InstructionContext)index);
850 o2 << "*/ ";
851 emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum,
852 opDecision&: decision.opcodeDecisions[index]);
853 }
854
855 i2--;
856 o2.indent(NumSpaces: i2) << "}};"
857 << "\n";
858}
859
860void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
861 unsigned &i) const {
862 unsigned NumInstructions = InstructionSpecifiers.size();
863
864 o << "static const struct OperandSpecifier x86OperandSets[]["
865 << X86_MAX_OPERANDS << "] = {\n";
866
867 using OperandListTy =
868 SmallVector<std::pair<OperandEncoding, OperandType>, X86_MAX_OPERANDS>;
869 std::map<OperandListTy, unsigned> OperandSets;
870
871 unsigned OperandSetNum = 0;
872 for (unsigned Index = 0; Index < NumInstructions; ++Index) {
873 OperandListTy OperandList;
874
875 for (auto Operand : InstructionSpecifiers[Index].operands) {
876 OperandEncoding Encoding = (OperandEncoding)Operand.encoding;
877 OperandType Type = (OperandType)Operand.type;
878 OperandList.emplace_back(Args&: Encoding, Args&: Type);
879 }
880 unsigned &N = OperandSets[OperandList];
881 if (N != 0)
882 continue;
883
884 N = ++OperandSetNum;
885
886 o << " { /* " << (OperandSetNum - 1) << " */\n";
887 for (const auto &[Enc, Ty] : OperandList) {
888 const char *Encoding = stringForOperandEncoding(encoding: Enc);
889 const char *Type = stringForOperandType(type: Ty);
890 o << " { " << Encoding << ", " << Type << " },\n";
891 }
892 o << " },\n";
893 }
894 o << "};"
895 << "\n\n";
896
897 o.indent(NumSpaces: i * 2) << "static const struct InstructionSpecifier ";
898 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
899
900 i++;
901
902 for (unsigned index = 0; index < NumInstructions; ++index) {
903 o.indent(NumSpaces: i * 2) << "{ /* " << index << " */\n";
904 i++;
905
906 OperandListTy OperandList;
907 for (auto Operand : InstructionSpecifiers[index].operands) {
908 OperandEncoding Encoding = (OperandEncoding)Operand.encoding;
909 OperandType Type = (OperandType)Operand.type;
910 OperandList.emplace_back(Args&: Encoding, Args&: Type);
911 }
912 o.indent(NumSpaces: i * 2) << (OperandSets[OperandList] - 1) << ",\n";
913
914 o.indent(NumSpaces: i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n";
915
916 i--;
917 o.indent(NumSpaces: i * 2) << "},\n";
918 }
919
920 i--;
921 o.indent(NumSpaces: i * 2) << "};"
922 << "\n";
923}
924
925void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
926 o.indent(NumSpaces: i * 2) << "static const uint8_t " CONTEXTS_STR "[" << ATTR_max
927 << "] = {\n";
928 i++;
929
930 for (unsigned index = 0; index < ATTR_max; ++index) {
931 o.indent(NumSpaces: i * 2);
932
933 if ((index & ATTR_EVEX) && (index & ATTR_ADSIZE) && (index & ATTR_OPSIZE))
934 o << "IC_EVEX_OPSIZE_ADSIZE";
935 else if ((index & ATTR_EVEX) && (index & ATTR_ADSIZE) && (index & ATTR_XD))
936 o << "IC_EVEX_XD_ADSIZE";
937 else if ((index & ATTR_EVEX) && (index & ATTR_ADSIZE) && (index & ATTR_XS))
938 o << "IC_EVEX_XS_ADSIZE";
939 else if (index & ATTR_EVEXNF) {
940 o << "IC_EVEX";
941 if (index & ATTR_REXW)
942 o << "_W";
943 else if (index & ATTR_OPSIZE)
944 o << "_OPSIZE";
945
946 if (index & ATTR_EVEXB)
947 o << "_B";
948
949 o << "_NF";
950 } else if ((index & ATTR_EVEX) || (index & ATTR_VEX) ||
951 (index & ATTR_VEXL)) {
952 if (index & ATTR_EVEX)
953 o << "IC_EVEX";
954 else
955 o << "IC_VEX";
956
957 if ((index & ATTR_EVEXB) && (index & ATTR_EVEXU))
958 ; // Ignore ATTR_VEXL and ATTR_EVEXL2 under YMM rounding.
959 else if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2))
960 o << "_L2";
961 else if (index & ATTR_VEXL)
962 o << "_L";
963
964 if (index & ATTR_REXW)
965 o << "_W";
966
967 if (index & ATTR_OPSIZE)
968 o << "_OPSIZE";
969 else if (index & ATTR_XD)
970 o << "_XD";
971 else if (index & ATTR_XS)
972 o << "_XS";
973
974 if (index & ATTR_EVEX) {
975 if (index & ATTR_EVEXKZ)
976 o << "_KZ";
977 else if (index & ATTR_EVEXK)
978 o << "_K";
979
980 if (index & ATTR_EVEXB)
981 o << "_B";
982
983 if ((index & ATTR_EVEXB) && (index & ATTR_EVEXU))
984 o << "_U";
985 }
986 } else if ((index & ATTR_64BIT) && (index & ATTR_REX2)) {
987 o << "IC_64BIT_REX2";
988 if (index & ATTR_REXW)
989 o << "_REXW";
990 } else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
991 o << "IC_64BIT_REXW_XS";
992 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
993 o << "IC_64BIT_REXW_XD";
994 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
995 (index & ATTR_OPSIZE))
996 o << "IC_64BIT_REXW_OPSIZE";
997 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
998 (index & ATTR_ADSIZE))
999 o << "IC_64BIT_REXW_ADSIZE";
1000 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
1001 o << "IC_64BIT_XD_OPSIZE";
1002 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE))
1003 o << "IC_64BIT_XD_ADSIZE";
1004 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE))
1005 o << "IC_64BIT_XS_OPSIZE";
1006 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE))
1007 o << "IC_64BIT_XS_ADSIZE";
1008 else if ((index & ATTR_64BIT) && (index & ATTR_XS))
1009 o << "IC_64BIT_XS";
1010 else if ((index & ATTR_64BIT) && (index & ATTR_XD))
1011 o << "IC_64BIT_XD";
1012 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) &&
1013 (index & ATTR_ADSIZE))
1014 o << "IC_64BIT_OPSIZE_ADSIZE";
1015 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
1016 o << "IC_64BIT_OPSIZE";
1017 else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE))
1018 o << "IC_64BIT_ADSIZE";
1019 else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
1020 o << "IC_64BIT_REXW";
1021 else if ((index & ATTR_64BIT))
1022 o << "IC_64BIT";
1023 else if ((index & ATTR_XS) && (index & ATTR_OPSIZE))
1024 o << "IC_XS_OPSIZE";
1025 else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
1026 o << "IC_XD_OPSIZE";
1027 else if ((index & ATTR_XS) && (index & ATTR_ADSIZE))
1028 o << "IC_XS_ADSIZE";
1029 else if ((index & ATTR_XD) && (index & ATTR_ADSIZE))
1030 o << "IC_XD_ADSIZE";
1031 else if (index & ATTR_XS)
1032 o << "IC_XS";
1033 else if (index & ATTR_XD)
1034 o << "IC_XD";
1035 else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
1036 o << "IC_OPSIZE_ADSIZE";
1037 else if (index & ATTR_OPSIZE)
1038 o << "IC_OPSIZE";
1039 else if (index & ATTR_ADSIZE)
1040 o << "IC_ADSIZE";
1041 else
1042 o << "IC";
1043
1044 o << ", // " << index << "\n";
1045 }
1046
1047 i--;
1048 o.indent(NumSpaces: i * 2) << "};"
1049 << "\n";
1050}
1051
1052void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
1053 unsigned &i1, unsigned &i2,
1054 unsigned &ModRMTableNum) const {
1055 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, decision&: *Tables[ONEBYTE],
1056 ONEBYTE_STR);
1057 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, decision&: *Tables[TWOBYTE],
1058 TWOBYTE_STR);
1059 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, decision&: *Tables[THREEBYTE_38],
1060 THREEBYTE38_STR);
1061 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, decision&: *Tables[THREEBYTE_3A],
1062 THREEBYTE3A_STR);
1063
1064 using OpcodeDecisionKey = std::vector<uint16_t>;
1065 std::map<OpcodeDecisionKey, unsigned> OpcodeDecisionMap;
1066 static_assert(XOP8_MAP == 4 && MAP7 == 11);
1067 std::array<std::array<unsigned, IC_max>, MAP7 - XOP8_MAP + 1> Indices;
1068
1069 o2 << "static const struct OpcodeDecision " SPARSE_OPCODE_DECISIONS_STR
1070 "[] = {\n";
1071 ++i2;
1072
1073 for (unsigned TableIndex = XOP8_MAP; TableIndex <= MAP7; ++TableIndex) {
1074 for (unsigned ContextIndex = 0; ContextIndex < IC_max; ++ContextIndex) {
1075 OpcodeDecision &Decision =
1076 Tables[TableIndex]->opcodeDecisions[ContextIndex];
1077 OpcodeDecisionKey Key;
1078
1079 for (const ModRMDecision &ModRM : Decision.modRMDecisions) {
1080 ModRMDecisionType Type = getDecisionType(decision: ModRM);
1081 Key.push_back(x: Type);
1082
1083 switch (Type) {
1084 default:
1085 llvm_unreachable("Unknown decision type");
1086 case MODRM_ONEENTRY:
1087 Key.push_back(x: ModRM.instructionIDs[0]);
1088 break;
1089 case MODRM_SPLITRM:
1090 Key.push_back(x: ModRM.instructionIDs[0x00]);
1091 Key.push_back(x: ModRM.instructionIDs[0xc0]);
1092 break;
1093 case MODRM_SPLITREG:
1094 for (unsigned Index = 0; Index < 64; Index += 8)
1095 Key.push_back(x: ModRM.instructionIDs[Index]);
1096 for (unsigned Index = 0xc0; Index < 256; Index += 8)
1097 Key.push_back(x: ModRM.instructionIDs[Index]);
1098 break;
1099 case MODRM_SPLITMISC:
1100 for (unsigned Index = 0; Index < 64; Index += 8)
1101 Key.push_back(x: ModRM.instructionIDs[Index]);
1102 for (unsigned Index = 0xc0; Index < 256; ++Index)
1103 Key.push_back(x: ModRM.instructionIDs[Index]);
1104 break;
1105 case MODRM_FULL:
1106 llvm::append_range(C&: Key, R: ModRM.instructionIDs);
1107 break;
1108 }
1109 }
1110
1111 auto [It, Inserted] = OpcodeDecisionMap.try_emplace(
1112 k: std::move(Key), args: OpcodeDecisionMap.size());
1113 Indices[TableIndex - XOP8_MAP][ContextIndex] = It->second;
1114 if (Inserted)
1115 emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum, opDecision&: Decision);
1116 }
1117 }
1118
1119 --i2;
1120 o2 << "};\n\n";
1121
1122 assert(OpcodeDecisionMap.size() <= UINT16_MAX &&
1123 "Too many unique sparse opcode decisions");
1124 o2 << "static const uint16_t " SPARSE_OPCODE_DECISION_INDICES_STR
1125 "[][IC_max] = {\n";
1126 ++i2;
1127 for (const auto &Table : Indices) {
1128 o2.indent(NumSpaces: i2) << "{\n";
1129 ++i2;
1130 for (auto [ContextIndex, DecisionIndex] : enumerate(First: Table)) {
1131 o2.indent(NumSpaces: i2) << DecisionIndex << ", // "
1132 << stringForContext(insnContext: InstructionContext(ContextIndex))
1133 << "\n";
1134 }
1135 --i2;
1136 o2.indent(NumSpaces: i2) << "},\n";
1137 }
1138 --i2;
1139 o2 << "};\n";
1140}
1141
1142void DisassemblerTables::emit(raw_ostream &o) const {
1143 unsigned i1 = 0;
1144 unsigned i2 = 0;
1145
1146 std::string s1;
1147 std::string s2;
1148
1149 raw_string_ostream o1(s1);
1150 raw_string_ostream o2(s2);
1151
1152 emitInstructionInfo(o, i&: i2);
1153 o << "\n";
1154
1155 emitContextTable(o, i&: i2);
1156 o << "\n";
1157
1158 unsigned ModRMTableNum = 0;
1159
1160 o << "static const InstrUID modRMTable[] = {\n";
1161 i1++;
1162 std::vector<unsigned> EmptyTable(1, 0);
1163 ModRMTable[EmptyTable] = ModRMTableNum;
1164 ModRMTableNum += EmptyTable.size();
1165 o1 << "/*EmptyTable*/\n";
1166 o1.indent(NumSpaces: i1 * 2) << "0x0,\n";
1167 i1--;
1168 emitContextDecisions(o1, o2, i1, i2, ModRMTableNum);
1169
1170 o << s1;
1171 o << " 0x0\n";
1172 o << "};\n";
1173 o << "\n";
1174 o << s2;
1175 o << "\n";
1176 o << "\n";
1177}
1178
1179void DisassemblerTables::setTableFields(ModRMDecision &decision,
1180 const ModRMFilter &filter, InstrUID uid,
1181 uint8_t opcode) {
1182 for (unsigned index = 0; index < 256; ++index) {
1183 if (filter.accepts(modRM: index)) {
1184 if (decision.instructionIDs[index] == uid)
1185 continue;
1186
1187 if (decision.instructionIDs[index] != 0) {
1188 InstructionSpecifier &newInfo = InstructionSpecifiers[uid];
1189 InstructionSpecifier &previousInfo =
1190 InstructionSpecifiers[decision.instructionIDs[index]];
1191
1192 if (previousInfo.name == "NOOP" &&
1193 (newInfo.name == "XCHG16ar" || newInfo.name == "XCHG32ar" ||
1194 newInfo.name == "XCHG64ar"))
1195 continue; // special case for XCHG*ar and NOOP
1196
1197 if (outranks(upper: previousInfo.insnContext, lower: newInfo.insnContext))
1198 continue;
1199
1200 if (previousInfo.insnContext == newInfo.insnContext) {
1201 errs() << "Error: Primary decode conflict: ";
1202 errs() << newInfo.name << " would overwrite " << previousInfo.name;
1203 errs() << "\n";
1204 errs() << "ModRM " << index << "\n";
1205 errs() << "Opcode " << (uint16_t)opcode << "\n";
1206 errs() << "Context " << stringForContext(insnContext: newInfo.insnContext) << "\n";
1207 HasConflicts = true;
1208 }
1209 }
1210
1211 decision.instructionIDs[index] = uid;
1212 }
1213 }
1214}
1215
1216void DisassemblerTables::setTableFields(
1217 OpcodeType type, InstructionContext insnContext, uint8_t opcode,
1218 const ModRMFilter &filter, InstrUID uid, bool is32bit, bool noPrefix,
1219 bool ignoresVEX_L, bool ignoresW, unsigned addressSize) {
1220 ContextDecision &decision = *Tables[type];
1221
1222 for (unsigned index = 0; index < IC_max; ++index) {
1223 if ((is32bit || addressSize == 16) &&
1224 inheritsFrom(child: (InstructionContext)index, parent: IC_64BIT))
1225 continue;
1226
1227 bool adSize64 = addressSize == 64;
1228 if (inheritsFrom(child: (InstructionContext)index,
1229 parent: InstructionSpecifiers[uid].insnContext, noPrefix,
1230 VEX_LIG: ignoresVEX_L, WIG: ignoresW, AdSize64: adSize64))
1231 setTableFields(decision&: decision.opcodeDecisions[index].modRMDecisions[opcode],
1232 filter, uid, opcode);
1233 }
1234}
1235