1//===-- sysv_reenter.arm64.s ------------------------------------*- ASM -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file is a part of the ORC runtime support library.
10//
11//===----------------------------------------------------------------------===//
12
13// The content of this file is arm64-only
14#if defined(__arm64__) || defined(__aarch64__)
15
16#include "builtins/assembly.h"
17
18 TEXT_SECTION
19
20 // Saves GPRs, calls __orc_rt_resolve
21 .globl __orc_rt_sysv_reenter
22__orc_rt_sysv_reenter:
23 // Save register state, set up new stack frome.
24 stp x27, x28, [sp, #-16]!
25 stp x25, x26, [sp, #-16]!
26 stp x23, x24, [sp, #-16]!
27 stp x21, x22, [sp, #-16]!
28 stp x19, x20, [sp, #-16]!
29 stp x14, x15, [sp, #-16]!
30 stp x12, x13, [sp, #-16]!
31 stp x10, x11, [sp, #-16]!
32 stp x8, x9, [sp, #-16]!
33 stp x6, x7, [sp, #-16]!
34 stp x4, x5, [sp, #-16]!
35 stp x2, x3, [sp, #-16]!
36 stp x0, x1, [sp, #-16]!
37 stp q30, q31, [sp, #-32]!
38 stp q28, q29, [sp, #-32]!
39 stp q26, q27, [sp, #-32]!
40 stp q24, q25, [sp, #-32]!
41 stp q22, q23, [sp, #-32]!
42 stp q20, q21, [sp, #-32]!
43 stp q18, q19, [sp, #-32]!
44 stp q16, q17, [sp, #-32]!
45 stp q14, q15, [sp, #-32]!
46 stp q12, q13, [sp, #-32]!
47 stp q10, q11, [sp, #-32]!
48 stp q8, q9, [sp, #-32]!
49 stp q6, q7, [sp, #-32]!
50 stp q4, q5, [sp, #-32]!
51 stp q2, q3, [sp, #-32]!
52 stp q0, q1, [sp, #-32]!
53
54 // Look up the return address and subtract 8 from it (on the assumption
55 // that it's a standard arm64 reentry trampoline) to get back the
56 // trampoline's address.
57 sub x0, x30, #8
58
59 // Call __orc_rt_resolve to look up the implementation corresponding to
60 // the calling stub, then store this in x17 (which we'll return to
61 // below).
62#if !defined(__APPLE__)
63 bl __orc_rt_resolve
64#else
65 bl ___orc_rt_resolve
66#endif
67 mov x17, x0
68
69 // Restore the register state.
70 ldp q0, q1, [sp], #32
71 ldp q2, q3, [sp], #32
72 ldp q4, q5, [sp], #32
73 ldp q6, q7, [sp], #32
74 ldp q8, q9, [sp], #32
75 ldp q10, q11, [sp], #32
76 ldp q12, q13, [sp], #32
77 ldp q14, q15, [sp], #32
78 ldp q16, q17, [sp], #32
79 ldp q18, q19, [sp], #32
80 ldp q20, q21, [sp], #32
81 ldp q22, q23, [sp], #32
82 ldp q24, q25, [sp], #32
83 ldp q26, q27, [sp], #32
84 ldp q28, q29, [sp], #32
85 ldp q30, q31, [sp], #32
86 ldp x0, x1, [sp], #16
87 ldp x2, x3, [sp], #16
88 ldp x4, x5, [sp], #16
89 ldp x6, x7, [sp], #16
90 ldp x8, x9, [sp], #16
91 ldp x10, x11, [sp], #16
92 ldp x12, x13, [sp], #16
93 ldp x14, x15, [sp], #16
94 ldp x19, x20, [sp], #16
95 ldp x21, x22, [sp], #16
96 ldp x23, x24, [sp], #16
97 ldp x25, x26, [sp], #16
98 ldp x27, x28, [sp], #16
99 ldp x29, x30, [sp], #16
100
101 // Return to the function implementation (rather than the stub).
102 ret x17
103
104#endif // defined(__arm64__) || defined(__aarch64__)
105