1 | #ifdef GET_ATValues_DECL |
2 | enum ATValues { |
3 | S1E1R = 960, |
4 | S1E2R = 9152, |
5 | S1E3R = 13248, |
6 | S1E1W = 961, |
7 | S1E2W = 9153, |
8 | S1E3W = 13249, |
9 | S1E0R = 962, |
10 | S1E0W = 963, |
11 | S12E1R = 9156, |
12 | S12E1W = 9157, |
13 | S12E0R = 9158, |
14 | S12E0W = 9159, |
15 | S1E1RP = 968, |
16 | S1E1WP = 969, |
17 | S1E1A = 970, |
18 | S1E2A = 9162, |
19 | S1E3A = 13258, |
20 | }; |
21 | #endif |
22 | |
23 | #ifdef GET_BTIValues_DECL |
24 | enum BTIValues { |
25 | c = 2, |
26 | j = 4, |
27 | jc = 6, |
28 | }; |
29 | #endif |
30 | |
31 | #ifdef GET_DBValues_DECL |
32 | enum DBValues { |
33 | oshld = 1, |
34 | oshst = 2, |
35 | osh = 3, |
36 | nshld = 5, |
37 | nshst = 6, |
38 | nsh = 7, |
39 | ishld = 9, |
40 | ishst = 10, |
41 | ish = 11, |
42 | ld = 13, |
43 | st = 14, |
44 | sy = 15, |
45 | }; |
46 | #endif |
47 | |
48 | #ifdef GET_DBnXSValues_DECL |
49 | enum DBnXSValues { |
50 | oshnxs = 3, |
51 | nshnxs = 7, |
52 | ishnxs = 11, |
53 | synxs = 15, |
54 | }; |
55 | #endif |
56 | |
57 | #ifdef GET_DCValues_DECL |
58 | enum DCValues { |
59 | ZVA = 7073, |
60 | IVAC = 945, |
61 | ISW = 946, |
62 | CVAC = 7121, |
63 | CSW = 978, |
64 | CVAU = 7129, |
65 | CIVAC = 7153, |
66 | CISW = 1010, |
67 | CVAP = 7137, |
68 | CVADP = 7145, |
69 | IGVAC = 947, |
70 | IGSW = 948, |
71 | CGSW = 980, |
72 | CIGSW = 1012, |
73 | CGVAC = 7123, |
74 | CGVAP = 7139, |
75 | CGVADP = 7147, |
76 | CIGVAC = 7155, |
77 | GVA = 7075, |
78 | IGDVAC = 949, |
79 | IGDSW = 950, |
80 | CGDSW = 982, |
81 | CIGDSW = 1014, |
82 | CGDVAC = 7125, |
83 | CGDVAP = 7141, |
84 | CGDVADP = 7149, |
85 | CIGDVAC = 7157, |
86 | GZVA = 7076, |
87 | CIPAE = 9200, |
88 | CIGDPAE = 9207, |
89 | CIGDPAPA = 13301, |
90 | CIPAPA = 13297, |
91 | CIVAOC = 7160, |
92 | CVAOC = 7128, |
93 | CIGDVAOC = 7167, |
94 | CGDVAOC = 7135, |
95 | CIGDVAPS = 1021, |
96 | CIVAPS = 1017, |
97 | }; |
98 | #endif |
99 | |
100 | #ifdef GET_ExactFPImmValues_DECL |
101 | enum ExactFPImmValues { |
102 | zero = 0, |
103 | half = 1, |
104 | one = 2, |
105 | two = 3, |
106 | }; |
107 | #endif |
108 | |
109 | #ifdef GET_ICValues_DECL |
110 | enum ICValues { |
111 | IALLUIS = 904, |
112 | IALLU = 936, |
113 | IVAU = 7081, |
114 | }; |
115 | #endif |
116 | |
117 | #ifdef GET_ISBValues_DECL |
118 | enum ISBValues { |
119 | sy = 15, |
120 | }; |
121 | #endif |
122 | |
123 | #ifdef GET_PHintValues_DECL |
124 | enum PHintValues { |
125 | keep = 0, |
126 | strm = 1, |
127 | }; |
128 | #endif |
129 | |
130 | #ifdef GET_PRFMValues_DECL |
131 | enum PRFMValues { |
132 | pldl1keep = 0, |
133 | pldl1strm = 1, |
134 | pldl2keep = 2, |
135 | pldl2strm = 3, |
136 | pldl3keep = 4, |
137 | pldl3strm = 5, |
138 | pldslckeep = 6, |
139 | pldslcstrm = 7, |
140 | plil1keep = 8, |
141 | plil1strm = 9, |
142 | plil2keep = 10, |
143 | plil2strm = 11, |
144 | plil3keep = 12, |
145 | plil3strm = 13, |
146 | plislckeep = 14, |
147 | plislcstrm = 15, |
148 | pstl1keep = 16, |
149 | pstl1strm = 17, |
150 | pstl2keep = 18, |
151 | pstl2strm = 19, |
152 | pstl3keep = 20, |
153 | pstl3strm = 21, |
154 | pstslckeep = 22, |
155 | pstslcstrm = 23, |
156 | }; |
157 | #endif |
158 | |
159 | #ifdef GET_PSBValues_DECL |
160 | enum PSBValues { |
161 | csync = 17, |
162 | }; |
163 | #endif |
164 | |
165 | #ifdef GET_PStateImm0_1Values_DECL |
166 | enum PStateImm0_1Values { |
167 | ALLINT = 8, |
168 | PM = 72, |
169 | }; |
170 | #endif |
171 | |
172 | #ifdef GET_PStateImm0_15Values_DECL |
173 | enum PStateImm0_15Values { |
174 | SPSel = 5, |
175 | DAIFSet = 30, |
176 | DAIFClr = 31, |
177 | PAN = 4, |
178 | UAO = 3, |
179 | DIT = 26, |
180 | SSBS = 25, |
181 | TCO = 28, |
182 | }; |
183 | #endif |
184 | |
185 | #ifdef GET_RPRFMValues_DECL |
186 | enum RPRFMValues { |
187 | pldkeep = 0, |
188 | pstkeep = 1, |
189 | pldstrm = 4, |
190 | pststrm = 5, |
191 | }; |
192 | #endif |
193 | |
194 | #ifdef GET_SVCRValues_DECL |
195 | enum SVCRValues { |
196 | SVCRSM = 1, |
197 | SVCRZA = 2, |
198 | SVCRSMZA = 3, |
199 | }; |
200 | #endif |
201 | |
202 | #ifdef GET_SVEPREDPATValues_DECL |
203 | enum SVEPREDPATValues { |
204 | pow2 = 0, |
205 | vl1 = 1, |
206 | vl2 = 2, |
207 | vl3 = 3, |
208 | vl4 = 4, |
209 | vl5 = 5, |
210 | vl6 = 6, |
211 | vl7 = 7, |
212 | vl8 = 8, |
213 | vl16 = 9, |
214 | vl32 = 10, |
215 | vl64 = 11, |
216 | vl128 = 12, |
217 | vl256 = 13, |
218 | mul4 = 29, |
219 | mul3 = 30, |
220 | all = 31, |
221 | }; |
222 | #endif |
223 | |
224 | #ifdef GET_SVEPRFMValues_DECL |
225 | enum SVEPRFMValues { |
226 | pldl1keep = 0, |
227 | pldl1strm = 1, |
228 | pldl2keep = 2, |
229 | pldl2strm = 3, |
230 | pldl3keep = 4, |
231 | pldl3strm = 5, |
232 | pstl1keep = 8, |
233 | pstl1strm = 9, |
234 | pstl2keep = 10, |
235 | pstl2strm = 11, |
236 | pstl3keep = 12, |
237 | pstl3strm = 13, |
238 | }; |
239 | #endif |
240 | |
241 | #ifdef GET_SVEVECLENSPECIFIERValues_DECL |
242 | enum SVEVECLENSPECIFIERValues { |
243 | vlx2 = 0, |
244 | vlx4 = 1, |
245 | }; |
246 | #endif |
247 | |
248 | #ifdef GET_SysRegValues_DECL |
249 | enum SysRegValues { |
250 | MDCCSR_EL0 = 38920, |
251 | DBGDTRRX_EL0 = 38952, |
252 | MDRAR_EL1 = 32896, |
253 | OSLSR_EL1 = 32908, |
254 | DBGAUTHSTATUS_EL1 = 33782, |
255 | PMCEID0_EL0 = 56550, |
256 | PMCEID1_EL0 = 56551, |
257 | PMMIR_EL1 = 50422, |
258 | MIDR_EL1 = 49152, |
259 | CCSIDR_EL1 = 51200, |
260 | CCSIDR2_EL1 = 51202, |
261 | CLIDR_EL1 = 51201, |
262 | CTR_EL0 = 55297, |
263 | MPIDR_EL1 = 49157, |
264 | REVIDR_EL1 = 49158, |
265 | AIDR_EL1 = 51207, |
266 | DCZID_EL0 = 55303, |
267 | ID_PFR0_EL1 = 49160, |
268 | ID_PFR1_EL1 = 49161, |
269 | ID_PFR2_EL1 = 49180, |
270 | ID_DFR0_EL1 = 49162, |
271 | ID_DFR1_EL1 = 49181, |
272 | ID_AFR0_EL1 = 49163, |
273 | ID_MMFR0_EL1 = 49164, |
274 | ID_MMFR1_EL1 = 49165, |
275 | ID_MMFR2_EL1 = 49166, |
276 | ID_MMFR3_EL1 = 49167, |
277 | ID_ISAR0_EL1 = 49168, |
278 | ID_ISAR1_EL1 = 49169, |
279 | ID_ISAR2_EL1 = 49170, |
280 | ID_ISAR3_EL1 = 49171, |
281 | ID_ISAR4_EL1 = 49172, |
282 | ID_ISAR5_EL1 = 49173, |
283 | ID_ISAR6_EL1 = 49175, |
284 | ID_AA64PFR0_EL1 = 49184, |
285 | ID_AA64PFR1_EL1 = 49185, |
286 | ID_AA64PFR2_EL1 = 49186, |
287 | ID_AA64DFR0_EL1 = 49192, |
288 | ID_AA64DFR1_EL1 = 49193, |
289 | ID_AA64DFR2_EL1 = 49194, |
290 | ID_AA64AFR0_EL1 = 49196, |
291 | ID_AA64AFR1_EL1 = 49197, |
292 | ID_AA64ISAR0_EL1 = 49200, |
293 | ID_AA64ISAR1_EL1 = 49201, |
294 | ID_AA64ISAR2_EL1 = 49202, |
295 | ID_AA64ISAR3_EL1 = 49203, |
296 | ID_AA64MMFR0_EL1 = 49208, |
297 | ID_AA64MMFR1_EL1 = 49209, |
298 | ID_AA64MMFR2_EL1 = 49210, |
299 | ID_AA64MMFR3_EL1 = 49211, |
300 | ID_AA64MMFR4_EL1 = 49212, |
301 | MVFR0_EL1 = 49176, |
302 | MVFR1_EL1 = 49177, |
303 | MVFR2_EL1 = 49178, |
304 | RVBAR_EL1 = 50689, |
305 | RVBAR_EL2 = 58881, |
306 | RVBAR_EL3 = 62977, |
307 | ISR_EL1 = 50696, |
308 | CNTPCT_EL0 = 57089, |
309 | CNTVCT_EL0 = 57090, |
310 | ID_MMFR4_EL1 = 49174, |
311 | ID_MMFR5_EL1 = 49182, |
312 | TRCSTATR = 34840, |
313 | TRCIDR8 = 34822, |
314 | TRCIDR9 = 34830, |
315 | TRCIDR10 = 34838, |
316 | TRCIDR11 = 34846, |
317 | TRCIDR12 = 34854, |
318 | TRCIDR13 = 34862, |
319 | TRCIDR0 = 34887, |
320 | TRCIDR1 = 34895, |
321 | TRCIDR2 = 34903, |
322 | TRCIDR3 = 34911, |
323 | TRCIDR4 = 34919, |
324 | TRCIDR5 = 34927, |
325 | TRCIDR6 = 34935, |
326 | TRCIDR7 = 34943, |
327 | TRCOSLSR = 34956, |
328 | TRCPDSR = 34988, |
329 | TRCDEVAFF0 = 35798, |
330 | TRCDEVAFF1 = 35806, |
331 | TRCLSR = 35822, |
332 | TRCAUTHSTATUS = 35830, |
333 | TRCDEVARCH = 35838, |
334 | TRCDEVID = 35735, |
335 | TRCDEVTYPE = 35743, |
336 | TRCPIDR4 = 35751, |
337 | TRCPIDR5 = 35759, |
338 | TRCPIDR6 = 35767, |
339 | TRCPIDR7 = 35775, |
340 | TRCPIDR0 = 35783, |
341 | TRCPIDR1 = 35791, |
342 | TRCPIDR2 = 35799, |
343 | TRCPIDR3 = 35807, |
344 | TRCCIDR0 = 35815, |
345 | TRCCIDR1 = 35823, |
346 | TRCCIDR2 = 35831, |
347 | TRCCIDR3 = 35839, |
348 | ICC_IAR1_EL1 = 50784, |
349 | ICC_IAR0_EL1 = 50752, |
350 | ICC_HPPIR1_EL1 = 50786, |
351 | ICC_HPPIR0_EL1 = 50754, |
352 | ICC_RPR_EL1 = 50779, |
353 | ICH_VTR_EL2 = 58969, |
354 | ICH_EISR_EL2 = 58971, |
355 | ICH_ELRSR_EL2 = 58973, |
356 | ID_AA64ZFR0_EL1 = 49188, |
357 | LORID_EL1 = 50471, |
358 | ERRIDR_EL1 = 49816, |
359 | ERXFR_EL1 = 49824, |
360 | RNDR = 55584, |
361 | RNDRRS = 55585, |
362 | SCXTNUM_EL0 = 56967, |
363 | SCXTNUM_EL1 = 50823, |
364 | SCXTNUM_EL2 = 59015, |
365 | SCXTNUM_EL3 = 63111, |
366 | SCXTNUM_EL12 = 61063, |
367 | GPCCR_EL3 = 61710, |
368 | GPTBR_EL3 = 61708, |
369 | MFAR_EL3 = 62213, |
370 | MECIDR_EL2 = 58695, |
371 | MECID_P0_EL2 = 58688, |
372 | MECID_A0_EL2 = 58689, |
373 | MECID_P1_EL2 = 58690, |
374 | MECID_A1_EL2 = 58691, |
375 | VMECID_P_EL2 = 58696, |
376 | VMECID_A_EL2 = 58697, |
377 | MECID_RL_A_EL3 = 62801, |
378 | ID_AA64SMFR0_EL1 = 49189, |
379 | DBGDTRTX_EL0 = 38952, |
380 | OSLAR_EL1 = 32900, |
381 | PMSWINC_EL0 = 56548, |
382 | TRCOSLAR = 34948, |
383 | TRCLAR = 35814, |
384 | ICC_EOIR1_EL1 = 50785, |
385 | ICC_EOIR0_EL1 = 50753, |
386 | ICC_DIR_EL1 = 50777, |
387 | ICC_SGI1R_EL1 = 50781, |
388 | ICC_ASGI1R_EL1 = 50782, |
389 | ICC_SGI0R_EL1 = 50783, |
390 | OSDTRRX_EL1 = 32770, |
391 | OSDTRTX_EL1 = 32794, |
392 | TEECR32_EL1 = 36864, |
393 | MDCCINT_EL1 = 32784, |
394 | MDSCR_EL1 = 32786, |
395 | DBGDTR_EL0 = 38944, |
396 | OSECCR_EL1 = 32818, |
397 | DBGVCR32_EL2 = 41016, |
398 | DBGBVR0_EL1 = 32772, |
399 | DBGBCR0_EL1 = 32773, |
400 | DBGWVR0_EL1 = 32774, |
401 | DBGWCR0_EL1 = 32775, |
402 | DBGBVR1_EL1 = 32780, |
403 | DBGBCR1_EL1 = 32781, |
404 | DBGWVR1_EL1 = 32782, |
405 | DBGWCR1_EL1 = 32783, |
406 | DBGBVR2_EL1 = 32788, |
407 | DBGBCR2_EL1 = 32789, |
408 | DBGWVR2_EL1 = 32790, |
409 | DBGWCR2_EL1 = 32791, |
410 | DBGBVR3_EL1 = 32796, |
411 | DBGBCR3_EL1 = 32797, |
412 | DBGWVR3_EL1 = 32798, |
413 | DBGWCR3_EL1 = 32799, |
414 | DBGBVR4_EL1 = 32804, |
415 | DBGBCR4_EL1 = 32805, |
416 | DBGWVR4_EL1 = 32806, |
417 | DBGWCR4_EL1 = 32807, |
418 | DBGBVR5_EL1 = 32812, |
419 | DBGBCR5_EL1 = 32813, |
420 | DBGWVR5_EL1 = 32814, |
421 | DBGWCR5_EL1 = 32815, |
422 | DBGBVR6_EL1 = 32820, |
423 | DBGBCR6_EL1 = 32821, |
424 | DBGWVR6_EL1 = 32822, |
425 | DBGWCR6_EL1 = 32823, |
426 | DBGBVR7_EL1 = 32828, |
427 | DBGBCR7_EL1 = 32829, |
428 | DBGWVR7_EL1 = 32830, |
429 | DBGWCR7_EL1 = 32831, |
430 | DBGBVR8_EL1 = 32836, |
431 | DBGBCR8_EL1 = 32837, |
432 | DBGWVR8_EL1 = 32838, |
433 | DBGWCR8_EL1 = 32839, |
434 | DBGBVR9_EL1 = 32844, |
435 | DBGBCR9_EL1 = 32845, |
436 | DBGWVR9_EL1 = 32846, |
437 | DBGWCR9_EL1 = 32847, |
438 | DBGBVR10_EL1 = 32852, |
439 | DBGBCR10_EL1 = 32853, |
440 | DBGWVR10_EL1 = 32854, |
441 | DBGWCR10_EL1 = 32855, |
442 | DBGBVR11_EL1 = 32860, |
443 | DBGBCR11_EL1 = 32861, |
444 | DBGWVR11_EL1 = 32862, |
445 | DBGWCR11_EL1 = 32863, |
446 | DBGBVR12_EL1 = 32868, |
447 | DBGBCR12_EL1 = 32869, |
448 | DBGWVR12_EL1 = 32870, |
449 | DBGWCR12_EL1 = 32871, |
450 | DBGBVR13_EL1 = 32876, |
451 | DBGBCR13_EL1 = 32877, |
452 | DBGWVR13_EL1 = 32878, |
453 | DBGWCR13_EL1 = 32879, |
454 | DBGBVR14_EL1 = 32884, |
455 | DBGBCR14_EL1 = 32885, |
456 | DBGWVR14_EL1 = 32886, |
457 | DBGWCR14_EL1 = 32887, |
458 | DBGBVR15_EL1 = 32892, |
459 | DBGBCR15_EL1 = 32893, |
460 | DBGWVR15_EL1 = 32894, |
461 | DBGWCR15_EL1 = 32895, |
462 | TEEHBR32_EL1 = 36992, |
463 | OSDLR_EL1 = 32924, |
464 | DBGPRCR_EL1 = 32932, |
465 | DBGCLAIMSET_EL1 = 33734, |
466 | DBGCLAIMCLR_EL1 = 33742, |
467 | CSSELR_EL1 = 53248, |
468 | VPIDR_EL2 = 57344, |
469 | VMPIDR_EL2 = 57349, |
470 | CPACR_EL1 = 49282, |
471 | SCTLR_EL1 = 49280, |
472 | SCTLR_EL2 = 57472, |
473 | SCTLR_EL3 = 61568, |
474 | ACTLR_EL1 = 49281, |
475 | ACTLR_EL12 = 59521, |
476 | ACTLR_EL2 = 57473, |
477 | ACTLR_EL3 = 61569, |
478 | HCR_EL2 = 57480, |
479 | HCRX_EL2 = 57490, |
480 | SCR_EL3 = 61576, |
481 | MDCR_EL2 = 57481, |
482 | SDER32_EL3 = 61577, |
483 | CPTR_EL2 = 57482, |
484 | CPTR_EL3 = 61578, |
485 | HSTR_EL2 = 57483, |
486 | HACR_EL2 = 57487, |
487 | MDCR_EL3 = 61593, |
488 | TTBR0_EL1 = 49408, |
489 | TTBR0_EL3 = 61696, |
490 | TTBR0_EL2 = 57600, |
491 | VTTBR_EL2 = 57608, |
492 | TTBR1_EL1 = 49409, |
493 | TCR_EL1 = 49410, |
494 | TCR_EL2 = 57602, |
495 | TCR_EL3 = 61698, |
496 | VTCR_EL2 = 57610, |
497 | DACR32_EL2 = 57728, |
498 | SPSR_EL1 = 49664, |
499 | SPSR_EL2 = 57856, |
500 | SPSR_EL3 = 61952, |
501 | ELR_EL1 = 49665, |
502 | ELR_EL2 = 57857, |
503 | ELR_EL3 = 61953, |
504 | SP_EL0 = 49672, |
505 | SP_EL1 = 57864, |
506 | SP_EL2 = 61960, |
507 | SPSel = 49680, |
508 | NZCV = 55824, |
509 | DAIF = 55825, |
510 | CurrentEL = 49682, |
511 | SPSR_irq = 57880, |
512 | SPSR_abt = 57881, |
513 | SPSR_und = 57882, |
514 | SPSR_fiq = 57883, |
515 | FPCR = 55840, |
516 | FPSR = 55841, |
517 | DSPSR_EL0 = 55848, |
518 | DLR_EL0 = 55849, |
519 | IFSR32_EL2 = 57985, |
520 | AFSR0_EL1 = 49800, |
521 | AFSR0_EL2 = 57992, |
522 | AFSR0_EL3 = 62088, |
523 | AFSR1_EL1 = 49801, |
524 | AFSR1_EL2 = 57993, |
525 | AFSR1_EL3 = 62089, |
526 | ESR_EL1 = 49808, |
527 | ESR_EL2 = 58000, |
528 | ESR_EL3 = 62096, |
529 | FPEXC32_EL2 = 58008, |
530 | FAR_EL1 = 49920, |
531 | FAR_EL2 = 58112, |
532 | FAR_EL3 = 62208, |
533 | HPFAR_EL2 = 58116, |
534 | PAR_EL1 = 50080, |
535 | PMCR_EL0 = 56544, |
536 | PMCNTENSET_EL0 = 56545, |
537 | PMCNTENCLR_EL0 = 56546, |
538 | PMOVSCLR_EL0 = 56547, |
539 | PMSELR_EL0 = 56549, |
540 | PMCCNTR_EL0 = 56552, |
541 | PMXEVTYPER_EL0 = 56553, |
542 | PMXEVCNTR_EL0 = 56554, |
543 | PMUSERENR_EL0 = 56560, |
544 | PMINTENSET_EL1 = 50417, |
545 | PMINTENCLR_EL1 = 50418, |
546 | PMOVSSET_EL0 = 56563, |
547 | MAIR_EL1 = 50448, |
548 | MAIR_EL2 = 58640, |
549 | MAIR_EL3 = 62736, |
550 | AMAIR_EL1 = 50456, |
551 | AMAIR_EL2 = 58648, |
552 | AMAIR_EL3 = 62744, |
553 | VBAR_EL1 = 50688, |
554 | VBAR_EL2 = 58880, |
555 | VBAR_EL3 = 62976, |
556 | RMR_EL1 = 50690, |
557 | RMR_EL2 = 58882, |
558 | RMR_EL3 = 62978, |
559 | CONTEXTIDR_EL1 = 50817, |
560 | TPIDR_EL0 = 56962, |
561 | TPIDR_EL2 = 59010, |
562 | TPIDR_EL3 = 63106, |
563 | TPIDRRO_EL0 = 56963, |
564 | TPIDR_EL1 = 50820, |
565 | CNTFRQ_EL0 = 57088, |
566 | CNTVOFF_EL2 = 59139, |
567 | CNTKCTL_EL1 = 50952, |
568 | CNTHCTL_EL2 = 59144, |
569 | CNTP_TVAL_EL0 = 57104, |
570 | CNTHP_TVAL_EL2 = 59152, |
571 | CNTPS_TVAL_EL1 = 65296, |
572 | CNTP_CTL_EL0 = 57105, |
573 | CNTHP_CTL_EL2 = 59153, |
574 | CNTPS_CTL_EL1 = 65297, |
575 | CNTP_CVAL_EL0 = 57106, |
576 | CNTHP_CVAL_EL2 = 59154, |
577 | CNTPS_CVAL_EL1 = 65298, |
578 | CNTV_TVAL_EL0 = 57112, |
579 | CNTV_CTL_EL0 = 57113, |
580 | CNTV_CVAL_EL0 = 57114, |
581 | PMEVCNTR0_EL0 = 57152, |
582 | PMEVCNTR1_EL0 = 57153, |
583 | PMEVCNTR2_EL0 = 57154, |
584 | PMEVCNTR3_EL0 = 57155, |
585 | PMEVCNTR4_EL0 = 57156, |
586 | PMEVCNTR5_EL0 = 57157, |
587 | PMEVCNTR6_EL0 = 57158, |
588 | PMEVCNTR7_EL0 = 57159, |
589 | PMEVCNTR8_EL0 = 57160, |
590 | PMEVCNTR9_EL0 = 57161, |
591 | PMEVCNTR10_EL0 = 57162, |
592 | PMEVCNTR11_EL0 = 57163, |
593 | PMEVCNTR12_EL0 = 57164, |
594 | PMEVCNTR13_EL0 = 57165, |
595 | PMEVCNTR14_EL0 = 57166, |
596 | PMEVCNTR15_EL0 = 57167, |
597 | PMEVCNTR16_EL0 = 57168, |
598 | PMEVCNTR17_EL0 = 57169, |
599 | PMEVCNTR18_EL0 = 57170, |
600 | PMEVCNTR19_EL0 = 57171, |
601 | PMEVCNTR20_EL0 = 57172, |
602 | PMEVCNTR21_EL0 = 57173, |
603 | PMEVCNTR22_EL0 = 57174, |
604 | PMEVCNTR23_EL0 = 57175, |
605 | PMEVCNTR24_EL0 = 57176, |
606 | PMEVCNTR25_EL0 = 57177, |
607 | PMEVCNTR26_EL0 = 57178, |
608 | PMEVCNTR27_EL0 = 57179, |
609 | PMEVCNTR28_EL0 = 57180, |
610 | PMEVCNTR29_EL0 = 57181, |
611 | PMEVCNTR30_EL0 = 57182, |
612 | PMCCFILTR_EL0 = 57215, |
613 | PMEVTYPER0_EL0 = 57184, |
614 | PMEVTYPER1_EL0 = 57185, |
615 | PMEVTYPER2_EL0 = 57186, |
616 | PMEVTYPER3_EL0 = 57187, |
617 | PMEVTYPER4_EL0 = 57188, |
618 | PMEVTYPER5_EL0 = 57189, |
619 | PMEVTYPER6_EL0 = 57190, |
620 | PMEVTYPER7_EL0 = 57191, |
621 | PMEVTYPER8_EL0 = 57192, |
622 | PMEVTYPER9_EL0 = 57193, |
623 | PMEVTYPER10_EL0 = 57194, |
624 | PMEVTYPER11_EL0 = 57195, |
625 | PMEVTYPER12_EL0 = 57196, |
626 | PMEVTYPER13_EL0 = 57197, |
627 | PMEVTYPER14_EL0 = 57198, |
628 | PMEVTYPER15_EL0 = 57199, |
629 | PMEVTYPER16_EL0 = 57200, |
630 | PMEVTYPER17_EL0 = 57201, |
631 | PMEVTYPER18_EL0 = 57202, |
632 | PMEVTYPER19_EL0 = 57203, |
633 | PMEVTYPER20_EL0 = 57204, |
634 | PMEVTYPER21_EL0 = 57205, |
635 | PMEVTYPER22_EL0 = 57206, |
636 | PMEVTYPER23_EL0 = 57207, |
637 | PMEVTYPER24_EL0 = 57208, |
638 | PMEVTYPER25_EL0 = 57209, |
639 | PMEVTYPER26_EL0 = 57210, |
640 | PMEVTYPER27_EL0 = 57211, |
641 | PMEVTYPER28_EL0 = 57212, |
642 | PMEVTYPER29_EL0 = 57213, |
643 | PMEVTYPER30_EL0 = 57214, |
644 | TRCPRGCTLR = 34824, |
645 | TRCPROCSELR = 34832, |
646 | TRCCONFIGR = 34848, |
647 | TRCAUXCTLR = 34864, |
648 | TRCEVENTCTL0R = 34880, |
649 | TRCEVENTCTL1R = 34888, |
650 | TRCSTALLCTLR = 34904, |
651 | TRCTSCTLR = 34912, |
652 | TRCSYNCPR = 34920, |
653 | TRCCCCTLR = 34928, |
654 | TRCBBCTLR = 34936, |
655 | TRCTRACEIDR = 34817, |
656 | TRCQCTLR = 34825, |
657 | TRCVICTLR = 34818, |
658 | TRCVIIECTLR = 34826, |
659 | TRCVISSCTLR = 34834, |
660 | TRCVIPCSSCTLR = 34842, |
661 | TRCVDCTLR = 34882, |
662 | TRCVDSACCTLR = 34890, |
663 | TRCVDARCCTLR = 34898, |
664 | TRCSEQEVR0 = 34820, |
665 | TRCSEQEVR1 = 34828, |
666 | TRCSEQEVR2 = 34836, |
667 | TRCSEQRSTEVR = 34868, |
668 | TRCSEQSTR = 34876, |
669 | TRCEXTINSELR = 34884, |
670 | TRCCNTRLDVR0 = 34821, |
671 | TRCCNTRLDVR1 = 34829, |
672 | TRCCNTRLDVR2 = 34837, |
673 | TRCCNTRLDVR3 = 34845, |
674 | TRCCNTCTLR0 = 34853, |
675 | TRCCNTCTLR1 = 34861, |
676 | TRCCNTCTLR2 = 34869, |
677 | TRCCNTCTLR3 = 34877, |
678 | TRCCNTVR0 = 34885, |
679 | TRCCNTVR1 = 34893, |
680 | TRCCNTVR2 = 34901, |
681 | TRCCNTVR3 = 34909, |
682 | TRCIMSPEC0 = 34823, |
683 | TRCIMSPEC1 = 34831, |
684 | TRCIMSPEC2 = 34839, |
685 | TRCIMSPEC3 = 34847, |
686 | TRCIMSPEC4 = 34855, |
687 | TRCIMSPEC5 = 34863, |
688 | TRCIMSPEC6 = 34871, |
689 | TRCIMSPEC7 = 34879, |
690 | TRCRSCTLR2 = 34960, |
691 | TRCRSCTLR3 = 34968, |
692 | TRCRSCTLR4 = 34976, |
693 | TRCRSCTLR5 = 34984, |
694 | TRCRSCTLR6 = 34992, |
695 | TRCRSCTLR7 = 35000, |
696 | TRCRSCTLR8 = 35008, |
697 | TRCRSCTLR9 = 35016, |
698 | TRCRSCTLR10 = 35024, |
699 | TRCRSCTLR11 = 35032, |
700 | TRCRSCTLR12 = 35040, |
701 | TRCRSCTLR13 = 35048, |
702 | TRCRSCTLR14 = 35056, |
703 | TRCRSCTLR15 = 35064, |
704 | TRCRSCTLR16 = 34945, |
705 | TRCRSCTLR17 = 34953, |
706 | TRCRSCTLR18 = 34961, |
707 | TRCRSCTLR19 = 34969, |
708 | TRCRSCTLR20 = 34977, |
709 | TRCRSCTLR21 = 34985, |
710 | TRCRSCTLR22 = 34993, |
711 | TRCRSCTLR23 = 35001, |
712 | TRCRSCTLR24 = 35009, |
713 | TRCRSCTLR25 = 35017, |
714 | TRCRSCTLR26 = 35025, |
715 | TRCRSCTLR27 = 35033, |
716 | TRCRSCTLR28 = 35041, |
717 | TRCRSCTLR29 = 35049, |
718 | TRCRSCTLR30 = 35057, |
719 | TRCRSCTLR31 = 35065, |
720 | TRCSSCCR0 = 34946, |
721 | TRCSSCCR1 = 34954, |
722 | TRCSSCCR2 = 34962, |
723 | TRCSSCCR3 = 34970, |
724 | TRCSSCCR4 = 34978, |
725 | TRCSSCCR5 = 34986, |
726 | TRCSSCCR6 = 34994, |
727 | TRCSSCCR7 = 35002, |
728 | TRCSSCSR0 = 35010, |
729 | TRCSSCSR1 = 35018, |
730 | TRCSSCSR2 = 35026, |
731 | TRCSSCSR3 = 35034, |
732 | TRCSSCSR4 = 35042, |
733 | TRCSSCSR5 = 35050, |
734 | TRCSSCSR6 = 35058, |
735 | TRCSSCSR7 = 35066, |
736 | TRCSSPCICR0 = 34947, |
737 | TRCSSPCICR1 = 34955, |
738 | TRCSSPCICR2 = 34963, |
739 | TRCSSPCICR3 = 34971, |
740 | TRCSSPCICR4 = 34979, |
741 | TRCSSPCICR5 = 34987, |
742 | TRCSSPCICR6 = 34995, |
743 | TRCSSPCICR7 = 35003, |
744 | TRCPDCR = 34980, |
745 | TRCACVR0 = 35072, |
746 | TRCACVR1 = 35088, |
747 | TRCACVR2 = 35104, |
748 | TRCACVR3 = 35120, |
749 | TRCACVR4 = 35136, |
750 | TRCACVR5 = 35152, |
751 | TRCACVR6 = 35168, |
752 | TRCACVR7 = 35184, |
753 | TRCACVR8 = 35073, |
754 | TRCACVR9 = 35089, |
755 | TRCACVR10 = 35105, |
756 | TRCACVR11 = 35121, |
757 | TRCACVR12 = 35137, |
758 | TRCACVR13 = 35153, |
759 | TRCACVR14 = 35169, |
760 | TRCACVR15 = 35185, |
761 | TRCACATR0 = 35074, |
762 | TRCACATR1 = 35090, |
763 | TRCACATR2 = 35106, |
764 | TRCACATR3 = 35122, |
765 | TRCACATR4 = 35138, |
766 | TRCACATR5 = 35154, |
767 | TRCACATR6 = 35170, |
768 | TRCACATR7 = 35186, |
769 | TRCACATR8 = 35075, |
770 | TRCACATR9 = 35091, |
771 | TRCACATR10 = 35107, |
772 | TRCACATR11 = 35123, |
773 | TRCACATR12 = 35139, |
774 | TRCACATR13 = 35155, |
775 | TRCACATR14 = 35171, |
776 | TRCACATR15 = 35187, |
777 | TRCDVCVR0 = 35076, |
778 | TRCDVCVR1 = 35108, |
779 | TRCDVCVR2 = 35140, |
780 | TRCDVCVR3 = 35172, |
781 | TRCDVCVR4 = 35077, |
782 | TRCDVCVR5 = 35109, |
783 | TRCDVCVR6 = 35141, |
784 | TRCDVCVR7 = 35173, |
785 | TRCDVCMR0 = 35078, |
786 | TRCDVCMR1 = 35110, |
787 | TRCDVCMR2 = 35142, |
788 | TRCDVCMR3 = 35174, |
789 | TRCDVCMR4 = 35079, |
790 | TRCDVCMR5 = 35111, |
791 | TRCDVCMR6 = 35143, |
792 | TRCDVCMR7 = 35175, |
793 | TRCCIDCVR0 = 35200, |
794 | TRCCIDCVR1 = 35216, |
795 | TRCCIDCVR2 = 35232, |
796 | TRCCIDCVR3 = 35248, |
797 | TRCCIDCVR4 = 35264, |
798 | TRCCIDCVR5 = 35280, |
799 | TRCCIDCVR6 = 35296, |
800 | TRCCIDCVR7 = 35312, |
801 | TRCVMIDCVR0 = 35201, |
802 | TRCVMIDCVR1 = 35217, |
803 | TRCVMIDCVR2 = 35233, |
804 | TRCVMIDCVR3 = 35249, |
805 | TRCVMIDCVR4 = 35265, |
806 | TRCVMIDCVR5 = 35281, |
807 | TRCVMIDCVR6 = 35297, |
808 | TRCVMIDCVR7 = 35313, |
809 | TRCCIDCCTLR0 = 35202, |
810 | TRCCIDCCTLR1 = 35210, |
811 | TRCVMIDCCTLR0 = 35218, |
812 | TRCVMIDCCTLR1 = 35226, |
813 | TRCITCTRL = 35716, |
814 | TRCCLAIMSET = 35782, |
815 | TRCCLAIMCLR = 35790, |
816 | ICC_BPR1_EL1 = 50787, |
817 | ICC_BPR0_EL1 = 50755, |
818 | ICC_PMR_EL1 = 49712, |
819 | ICC_CTLR_EL1 = 50788, |
820 | ICC_CTLR_EL3 = 63076, |
821 | ICC_SRE_EL1 = 50789, |
822 | ICC_SRE_EL2 = 58957, |
823 | ICC_SRE_EL3 = 63077, |
824 | ICC_IGRPEN0_EL1 = 50790, |
825 | ICC_IGRPEN1_EL1 = 50791, |
826 | ICC_IGRPEN1_EL3 = 63079, |
827 | ICC_AP0R0_EL1 = 50756, |
828 | ICC_AP0R1_EL1 = 50757, |
829 | ICC_AP0R2_EL1 = 50758, |
830 | ICC_AP0R3_EL1 = 50759, |
831 | ICC_AP1R0_EL1 = 50760, |
832 | ICC_AP1R1_EL1 = 50761, |
833 | ICC_AP1R2_EL1 = 50762, |
834 | ICC_AP1R3_EL1 = 50763, |
835 | ICH_AP0R0_EL2 = 58944, |
836 | ICH_AP0R1_EL2 = 58945, |
837 | ICH_AP0R2_EL2 = 58946, |
838 | ICH_AP0R3_EL2 = 58947, |
839 | ICH_AP1R0_EL2 = 58952, |
840 | ICH_AP1R1_EL2 = 58953, |
841 | ICH_AP1R2_EL2 = 58954, |
842 | ICH_AP1R3_EL2 = 58955, |
843 | ICH_HCR_EL2 = 58968, |
844 | ICH_MISR_EL2 = 58970, |
845 | ICH_VMCR_EL2 = 58975, |
846 | ICH_LR0_EL2 = 58976, |
847 | ICH_LR1_EL2 = 58977, |
848 | ICH_LR2_EL2 = 58978, |
849 | ICH_LR3_EL2 = 58979, |
850 | ICH_LR4_EL2 = 58980, |
851 | ICH_LR5_EL2 = 58981, |
852 | ICH_LR6_EL2 = 58982, |
853 | ICH_LR7_EL2 = 58983, |
854 | ICH_LR8_EL2 = 58984, |
855 | ICH_LR9_EL2 = 58985, |
856 | ICH_LR10_EL2 = 58986, |
857 | ICH_LR11_EL2 = 58987, |
858 | ICH_LR12_EL2 = 58988, |
859 | ICH_LR13_EL2 = 58989, |
860 | ICH_LR14_EL2 = 58990, |
861 | ICH_LR15_EL2 = 58991, |
862 | VSCTLR_EL2 = 57600, |
863 | MPUIR_EL1 = 49156, |
864 | MPUIR_EL2 = 57348, |
865 | PRENR_EL1 = 49929, |
866 | PRENR_EL2 = 58121, |
867 | PRSELR_EL1 = 49937, |
868 | PRSELR_EL2 = 58129, |
869 | PRBAR_EL1 = 49984, |
870 | PRBAR_EL2 = 58176, |
871 | PRLAR_EL1 = 49985, |
872 | PRLAR_EL2 = 58177, |
873 | PRBAR1_EL1 = 49988, |
874 | PRLAR1_EL1 = 49989, |
875 | PRBAR1_EL2 = 58180, |
876 | PRLAR1_EL2 = 58181, |
877 | PRBAR2_EL1 = 49992, |
878 | PRLAR2_EL1 = 49993, |
879 | PRBAR2_EL2 = 58184, |
880 | PRLAR2_EL2 = 58185, |
881 | PRBAR3_EL1 = 49996, |
882 | PRLAR3_EL1 = 49997, |
883 | PRBAR3_EL2 = 58188, |
884 | PRLAR3_EL2 = 58189, |
885 | PRBAR4_EL1 = 50000, |
886 | PRLAR4_EL1 = 50001, |
887 | PRBAR4_EL2 = 58192, |
888 | PRLAR4_EL2 = 58193, |
889 | PRBAR5_EL1 = 50004, |
890 | PRLAR5_EL1 = 50005, |
891 | PRBAR5_EL2 = 58196, |
892 | PRLAR5_EL2 = 58197, |
893 | PRBAR6_EL1 = 50008, |
894 | PRLAR6_EL1 = 50009, |
895 | PRBAR6_EL2 = 58200, |
896 | PRLAR6_EL2 = 58201, |
897 | PRBAR7_EL1 = 50012, |
898 | PRLAR7_EL1 = 50013, |
899 | PRBAR7_EL2 = 58204, |
900 | PRLAR7_EL2 = 58205, |
901 | PRBAR8_EL1 = 50016, |
902 | PRLAR8_EL1 = 50017, |
903 | PRBAR8_EL2 = 58208, |
904 | PRLAR8_EL2 = 58209, |
905 | PRBAR9_EL1 = 50020, |
906 | PRLAR9_EL1 = 50021, |
907 | PRBAR9_EL2 = 58212, |
908 | PRLAR9_EL2 = 58213, |
909 | PRBAR10_EL1 = 50024, |
910 | PRLAR10_EL1 = 50025, |
911 | PRBAR10_EL2 = 58216, |
912 | PRLAR10_EL2 = 58217, |
913 | PRBAR11_EL1 = 50028, |
914 | PRLAR11_EL1 = 50029, |
915 | PRBAR11_EL2 = 58220, |
916 | PRLAR11_EL2 = 58221, |
917 | PRBAR12_EL1 = 50032, |
918 | PRLAR12_EL1 = 50033, |
919 | PRBAR12_EL2 = 58224, |
920 | PRLAR12_EL2 = 58225, |
921 | PRBAR13_EL1 = 50036, |
922 | PRLAR13_EL1 = 50037, |
923 | PRBAR13_EL2 = 58228, |
924 | PRLAR13_EL2 = 58229, |
925 | PRBAR14_EL1 = 50040, |
926 | PRLAR14_EL1 = 50041, |
927 | PRBAR14_EL2 = 58232, |
928 | PRLAR14_EL2 = 58233, |
929 | PRBAR15_EL1 = 50044, |
930 | PRLAR15_EL1 = 50045, |
931 | PRBAR15_EL2 = 58236, |
932 | PRLAR15_EL2 = 58237, |
933 | PAN = 49683, |
934 | LORSA_EL1 = 50464, |
935 | LOREA_EL1 = 50465, |
936 | LORN_EL1 = 50466, |
937 | LORC_EL1 = 50467, |
938 | TTBR1_EL2 = 57601, |
939 | CNTHV_TVAL_EL2 = 59160, |
940 | CNTHV_CVAL_EL2 = 59162, |
941 | CNTHV_CTL_EL2 = 59161, |
942 | SCTLR_EL12 = 59520, |
943 | CPACR_EL12 = 59522, |
944 | TTBR0_EL12 = 59648, |
945 | TTBR1_EL12 = 59649, |
946 | TCR_EL12 = 59650, |
947 | AFSR0_EL12 = 60040, |
948 | AFSR1_EL12 = 60041, |
949 | ESR_EL12 = 60048, |
950 | FAR_EL12 = 60160, |
951 | MAIR_EL12 = 60688, |
952 | AMAIR_EL12 = 60696, |
953 | VBAR_EL12 = 60928, |
954 | CONTEXTIDR_EL12 = 61057, |
955 | CNTKCTL_EL12 = 61192, |
956 | CNTP_TVAL_EL02 = 61200, |
957 | CNTP_CTL_EL02 = 61201, |
958 | CNTP_CVAL_EL02 = 61202, |
959 | CNTV_TVAL_EL02 = 61208, |
960 | CNTV_CTL_EL02 = 61209, |
961 | CNTV_CVAL_EL02 = 61210, |
962 | SPSR_EL12 = 59904, |
963 | ELR_EL12 = 59905, |
964 | CONTEXTIDR_EL2 = 59009, |
965 | UAO = 49684, |
966 | PMBLIMITR_EL1 = 50384, |
967 | PMBPTR_EL1 = 50385, |
968 | PMBSR_EL1 = 50387, |
969 | PMBIDR_EL1 = 50391, |
970 | PMSCR_EL2 = 58568, |
971 | PMSCR_EL12 = 60616, |
972 | PMSCR_EL1 = 50376, |
973 | PMSICR_EL1 = 50378, |
974 | PMSIRR_EL1 = 50379, |
975 | PMSFCR_EL1 = 50380, |
976 | PMSEVFR_EL1 = 50381, |
977 | PMSLATFR_EL1 = 50382, |
978 | PMSIDR_EL1 = 50383, |
979 | ERRSELR_EL1 = 49817, |
980 | ERXCTLR_EL1 = 49825, |
981 | ERXSTATUS_EL1 = 49826, |
982 | ERXADDR_EL1 = 49827, |
983 | ERXMISC0_EL1 = 49832, |
984 | ERXMISC1_EL1 = 49833, |
985 | DISR_EL1 = 50697, |
986 | VDISR_EL2 = 58889, |
987 | VSESR_EL2 = 58003, |
988 | APIAKeyLo_EL1 = 49416, |
989 | APIAKeyHi_EL1 = 49417, |
990 | APIBKeyLo_EL1 = 49418, |
991 | APIBKeyHi_EL1 = 49419, |
992 | APDAKeyLo_EL1 = 49424, |
993 | APDAKeyHi_EL1 = 49425, |
994 | APDBKeyLo_EL1 = 49426, |
995 | APDBKeyHi_EL1 = 49427, |
996 | APGAKeyLo_EL1 = 49432, |
997 | APGAKeyHi_EL1 = 49433, |
998 | VSTCR_EL2 = 57650, |
999 | VSTTBR_EL2 = 57648, |
1000 | CNTHVS_TVAL_EL2 = 59168, |
1001 | CNTHVS_CVAL_EL2 = 59170, |
1002 | CNTHVS_CTL_EL2 = 59169, |
1003 | CNTHPS_TVAL_EL2 = 59176, |
1004 | CNTHPS_CVAL_EL2 = 59178, |
1005 | CNTHPS_CTL_EL2 = 59177, |
1006 | SDER32_EL2 = 57497, |
1007 | ERXPFGCTL_EL1 = 49829, |
1008 | ERXPFGCDN_EL1 = 49830, |
1009 | ERXMISC2_EL1 = 49834, |
1010 | ERXMISC3_EL1 = 49835, |
1011 | ERXPFGF_EL1 = 49828, |
1012 | MPAM0_EL1 = 50473, |
1013 | MPAM1_EL1 = 50472, |
1014 | MPAM2_EL2 = 58664, |
1015 | MPAM3_EL3 = 62760, |
1016 | MPAM1_EL12 = 60712, |
1017 | MPAMHCR_EL2 = 58656, |
1018 | MPAMVPMV_EL2 = 58657, |
1019 | MPAMVPM0_EL2 = 58672, |
1020 | MPAMVPM1_EL2 = 58673, |
1021 | MPAMVPM2_EL2 = 58674, |
1022 | MPAMVPM3_EL2 = 58675, |
1023 | MPAMVPM4_EL2 = 58676, |
1024 | MPAMVPM5_EL2 = 58677, |
1025 | MPAMVPM6_EL2 = 58678, |
1026 | MPAMVPM7_EL2 = 58679, |
1027 | MPAMIDR_EL1 = 50468, |
1028 | AMCR_EL0 = 56976, |
1029 | AMCFGR_EL0 = 56977, |
1030 | AMCGCR_EL0 = 56978, |
1031 | AMUSERENR_EL0 = 56979, |
1032 | AMCNTENCLR0_EL0 = 56980, |
1033 | AMCNTENSET0_EL0 = 56981, |
1034 | AMEVCNTR00_EL0 = 56992, |
1035 | AMEVCNTR01_EL0 = 56993, |
1036 | AMEVCNTR02_EL0 = 56994, |
1037 | AMEVCNTR03_EL0 = 56995, |
1038 | AMEVTYPER00_EL0 = 57008, |
1039 | AMEVTYPER01_EL0 = 57009, |
1040 | AMEVTYPER02_EL0 = 57010, |
1041 | AMEVTYPER03_EL0 = 57011, |
1042 | AMCNTENCLR1_EL0 = 56984, |
1043 | AMCNTENSET1_EL0 = 56985, |
1044 | AMEVCNTR10_EL0 = 57056, |
1045 | AMEVCNTR11_EL0 = 57057, |
1046 | AMEVCNTR12_EL0 = 57058, |
1047 | AMEVCNTR13_EL0 = 57059, |
1048 | AMEVCNTR14_EL0 = 57060, |
1049 | AMEVCNTR15_EL0 = 57061, |
1050 | AMEVCNTR16_EL0 = 57062, |
1051 | AMEVCNTR17_EL0 = 57063, |
1052 | AMEVCNTR18_EL0 = 57064, |
1053 | AMEVCNTR19_EL0 = 57065, |
1054 | AMEVCNTR110_EL0 = 57066, |
1055 | AMEVCNTR111_EL0 = 57067, |
1056 | AMEVCNTR112_EL0 = 57068, |
1057 | AMEVCNTR113_EL0 = 57069, |
1058 | AMEVCNTR114_EL0 = 57070, |
1059 | AMEVCNTR115_EL0 = 57071, |
1060 | AMEVTYPER10_EL0 = 57072, |
1061 | AMEVTYPER11_EL0 = 57073, |
1062 | AMEVTYPER12_EL0 = 57074, |
1063 | AMEVTYPER13_EL0 = 57075, |
1064 | AMEVTYPER14_EL0 = 57076, |
1065 | AMEVTYPER15_EL0 = 57077, |
1066 | AMEVTYPER16_EL0 = 57078, |
1067 | AMEVTYPER17_EL0 = 57079, |
1068 | AMEVTYPER18_EL0 = 57080, |
1069 | AMEVTYPER19_EL0 = 57081, |
1070 | AMEVTYPER110_EL0 = 57082, |
1071 | AMEVTYPER111_EL0 = 57083, |
1072 | AMEVTYPER112_EL0 = 57084, |
1073 | AMEVTYPER113_EL0 = 57085, |
1074 | AMEVTYPER114_EL0 = 57086, |
1075 | AMEVTYPER115_EL0 = 57087, |
1076 | TRFCR_EL1 = 49297, |
1077 | TRFCR_EL2 = 57489, |
1078 | TRFCR_EL12 = 59537, |
1079 | DIT = 55829, |
1080 | VNCR_EL2 = 57616, |
1081 | ZCR_EL1 = 49296, |
1082 | ZCR_EL2 = 57488, |
1083 | ZCR_EL3 = 61584, |
1084 | ZCR_EL12 = 59536, |
1085 | SSBS = 55830, |
1086 | TCO = 55831, |
1087 | GCR_EL1 = 49286, |
1088 | RGSR_EL1 = 49285, |
1089 | TFSR_EL1 = 49840, |
1090 | TFSR_EL2 = 58032, |
1091 | TFSR_EL3 = 62128, |
1092 | TFSR_EL12 = 60080, |
1093 | TFSRE0_EL1 = 49841, |
1094 | GMID_EL1 = 51204, |
1095 | TRCRSR = 34896, |
1096 | TRCEXTINSELR0 = 34884, |
1097 | TRCEXTINSELR1 = 34892, |
1098 | TRCEXTINSELR2 = 34900, |
1099 | TRCEXTINSELR3 = 34908, |
1100 | TRBLIMITR_EL1 = 50392, |
1101 | TRBPTR_EL1 = 50393, |
1102 | TRBBASER_EL1 = 50394, |
1103 | TRBSR_EL1 = 50395, |
1104 | TRBMAR_EL1 = 50396, |
1105 | TRBMPAM_EL1 = 50397, |
1106 | TRBTRG_EL1 = 50398, |
1107 | TRBIDR_EL1 = 50399, |
1108 | AMCG1IDR_EL0 = 56982, |
1109 | AMEVCNTVOFF00_EL2 = 59072, |
1110 | AMEVCNTVOFF10_EL2 = 59088, |
1111 | AMEVCNTVOFF01_EL2 = 59073, |
1112 | AMEVCNTVOFF11_EL2 = 59089, |
1113 | AMEVCNTVOFF02_EL2 = 59074, |
1114 | AMEVCNTVOFF12_EL2 = 59090, |
1115 | AMEVCNTVOFF03_EL2 = 59075, |
1116 | AMEVCNTVOFF13_EL2 = 59091, |
1117 | AMEVCNTVOFF04_EL2 = 59076, |
1118 | AMEVCNTVOFF14_EL2 = 59092, |
1119 | AMEVCNTVOFF05_EL2 = 59077, |
1120 | AMEVCNTVOFF15_EL2 = 59093, |
1121 | AMEVCNTVOFF06_EL2 = 59078, |
1122 | AMEVCNTVOFF16_EL2 = 59094, |
1123 | AMEVCNTVOFF07_EL2 = 59079, |
1124 | AMEVCNTVOFF17_EL2 = 59095, |
1125 | AMEVCNTVOFF08_EL2 = 59080, |
1126 | AMEVCNTVOFF18_EL2 = 59096, |
1127 | AMEVCNTVOFF09_EL2 = 59081, |
1128 | AMEVCNTVOFF19_EL2 = 59097, |
1129 | AMEVCNTVOFF010_EL2 = 59082, |
1130 | AMEVCNTVOFF110_EL2 = 59098, |
1131 | AMEVCNTVOFF011_EL2 = 59083, |
1132 | AMEVCNTVOFF111_EL2 = 59099, |
1133 | AMEVCNTVOFF012_EL2 = 59084, |
1134 | AMEVCNTVOFF112_EL2 = 59100, |
1135 | AMEVCNTVOFF013_EL2 = 59085, |
1136 | AMEVCNTVOFF113_EL2 = 59101, |
1137 | AMEVCNTVOFF014_EL2 = 59086, |
1138 | AMEVCNTVOFF114_EL2 = 59102, |
1139 | AMEVCNTVOFF015_EL2 = 59087, |
1140 | AMEVCNTVOFF115_EL2 = 59103, |
1141 | HFGRTR_EL2 = 57484, |
1142 | HFGWTR_EL2 = 57485, |
1143 | HFGITR_EL2 = 57486, |
1144 | HDFGRTR_EL2 = 57740, |
1145 | HDFGWTR_EL2 = 57741, |
1146 | HAFGRTR_EL2 = 57742, |
1147 | HDFGRTR2_EL2 = 57736, |
1148 | HDFGWTR2_EL2 = 57737, |
1149 | HFGRTR2_EL2 = 57738, |
1150 | HFGWTR2_EL2 = 57739, |
1151 | HFGITR2_EL2 = 57743, |
1152 | CNTSCALE_EL2 = 59140, |
1153 | CNTISCALE_EL2 = 59141, |
1154 | CNTPOFF_EL2 = 59142, |
1155 | CNTVFRQ_EL2 = 59143, |
1156 | CNTPCTSS_EL0 = 57093, |
1157 | CNTVCTSS_EL0 = 57094, |
1158 | ACCDATA_EL1 = 50821, |
1159 | BRBCR_EL1 = 35968, |
1160 | BRBCR_EL12 = 44160, |
1161 | BRBCR_EL2 = 42112, |
1162 | BRBFCR_EL1 = 35969, |
1163 | BRBIDR0_EL1 = 35984, |
1164 | BRBINFINJ_EL1 = 35976, |
1165 | BRBSRCINJ_EL1 = 35977, |
1166 | BRBTGTINJ_EL1 = 35978, |
1167 | BRBTS_EL1 = 35970, |
1168 | BRBINF0_EL1 = 35840, |
1169 | BRBSRC0_EL1 = 35841, |
1170 | BRBTGT0_EL1 = 35842, |
1171 | BRBINF1_EL1 = 35848, |
1172 | BRBSRC1_EL1 = 35849, |
1173 | BRBTGT1_EL1 = 35850, |
1174 | BRBINF2_EL1 = 35856, |
1175 | BRBSRC2_EL1 = 35857, |
1176 | BRBTGT2_EL1 = 35858, |
1177 | BRBINF3_EL1 = 35864, |
1178 | BRBSRC3_EL1 = 35865, |
1179 | BRBTGT3_EL1 = 35866, |
1180 | BRBINF4_EL1 = 35872, |
1181 | BRBSRC4_EL1 = 35873, |
1182 | BRBTGT4_EL1 = 35874, |
1183 | BRBINF5_EL1 = 35880, |
1184 | BRBSRC5_EL1 = 35881, |
1185 | BRBTGT5_EL1 = 35882, |
1186 | BRBINF6_EL1 = 35888, |
1187 | BRBSRC6_EL1 = 35889, |
1188 | BRBTGT6_EL1 = 35890, |
1189 | BRBINF7_EL1 = 35896, |
1190 | BRBSRC7_EL1 = 35897, |
1191 | BRBTGT7_EL1 = 35898, |
1192 | BRBINF8_EL1 = 35904, |
1193 | BRBSRC8_EL1 = 35905, |
1194 | BRBTGT8_EL1 = 35906, |
1195 | BRBINF9_EL1 = 35912, |
1196 | BRBSRC9_EL1 = 35913, |
1197 | BRBTGT9_EL1 = 35914, |
1198 | BRBINF10_EL1 = 35920, |
1199 | BRBSRC10_EL1 = 35921, |
1200 | BRBTGT10_EL1 = 35922, |
1201 | BRBINF11_EL1 = 35928, |
1202 | BRBSRC11_EL1 = 35929, |
1203 | BRBTGT11_EL1 = 35930, |
1204 | BRBINF12_EL1 = 35936, |
1205 | BRBSRC12_EL1 = 35937, |
1206 | BRBTGT12_EL1 = 35938, |
1207 | BRBINF13_EL1 = 35944, |
1208 | BRBSRC13_EL1 = 35945, |
1209 | BRBTGT13_EL1 = 35946, |
1210 | BRBINF14_EL1 = 35952, |
1211 | BRBSRC14_EL1 = 35953, |
1212 | BRBTGT14_EL1 = 35954, |
1213 | BRBINF15_EL1 = 35960, |
1214 | BRBSRC15_EL1 = 35961, |
1215 | BRBTGT15_EL1 = 35962, |
1216 | BRBINF16_EL1 = 35844, |
1217 | BRBSRC16_EL1 = 35845, |
1218 | BRBTGT16_EL1 = 35846, |
1219 | BRBINF17_EL1 = 35852, |
1220 | BRBSRC17_EL1 = 35853, |
1221 | BRBTGT17_EL1 = 35854, |
1222 | BRBINF18_EL1 = 35860, |
1223 | BRBSRC18_EL1 = 35861, |
1224 | BRBTGT18_EL1 = 35862, |
1225 | BRBINF19_EL1 = 35868, |
1226 | BRBSRC19_EL1 = 35869, |
1227 | BRBTGT19_EL1 = 35870, |
1228 | BRBINF20_EL1 = 35876, |
1229 | BRBSRC20_EL1 = 35877, |
1230 | BRBTGT20_EL1 = 35878, |
1231 | BRBINF21_EL1 = 35884, |
1232 | BRBSRC21_EL1 = 35885, |
1233 | BRBTGT21_EL1 = 35886, |
1234 | BRBINF22_EL1 = 35892, |
1235 | BRBSRC22_EL1 = 35893, |
1236 | BRBTGT22_EL1 = 35894, |
1237 | BRBINF23_EL1 = 35900, |
1238 | BRBSRC23_EL1 = 35901, |
1239 | BRBTGT23_EL1 = 35902, |
1240 | BRBINF24_EL1 = 35908, |
1241 | BRBSRC24_EL1 = 35909, |
1242 | BRBTGT24_EL1 = 35910, |
1243 | BRBINF25_EL1 = 35916, |
1244 | BRBSRC25_EL1 = 35917, |
1245 | BRBTGT25_EL1 = 35918, |
1246 | BRBINF26_EL1 = 35924, |
1247 | BRBSRC26_EL1 = 35925, |
1248 | BRBTGT26_EL1 = 35926, |
1249 | BRBINF27_EL1 = 35932, |
1250 | BRBSRC27_EL1 = 35933, |
1251 | BRBTGT27_EL1 = 35934, |
1252 | BRBINF28_EL1 = 35940, |
1253 | BRBSRC28_EL1 = 35941, |
1254 | BRBTGT28_EL1 = 35942, |
1255 | BRBINF29_EL1 = 35948, |
1256 | BRBSRC29_EL1 = 35949, |
1257 | BRBTGT29_EL1 = 35950, |
1258 | BRBINF30_EL1 = 35956, |
1259 | BRBSRC30_EL1 = 35957, |
1260 | BRBTGT30_EL1 = 35958, |
1261 | BRBINF31_EL1 = 35964, |
1262 | BRBSRC31_EL1 = 35965, |
1263 | BRBTGT31_EL1 = 35966, |
1264 | PMSNEVFR_EL1 = 50377, |
1265 | SMCR_EL1 = 49302, |
1266 | SMCR_EL2 = 57494, |
1267 | SMCR_EL3 = 61590, |
1268 | SMCR_EL12 = 59542, |
1269 | SVCR = 55826, |
1270 | SMPRI_EL1 = 49300, |
1271 | SMPRIMAP_EL2 = 57493, |
1272 | SMIDR_EL1 = 51206, |
1273 | TPIDR2_EL0 = 56965, |
1274 | MPAMSM_EL1 = 50475, |
1275 | ALLINT = 49688, |
1276 | ICC_NMIAR1_EL1 = 50765, |
1277 | GCSCR_EL1 = 49448, |
1278 | GCSPR_EL1 = 49449, |
1279 | GCSCRE0_EL1 = 49450, |
1280 | GCSPR_EL0 = 55593, |
1281 | GCSCR_EL2 = 57640, |
1282 | GCSPR_EL2 = 57641, |
1283 | GCSCR_EL12 = 59688, |
1284 | GCSPR_EL12 = 59689, |
1285 | GCSCR_EL3 = 61736, |
1286 | GCSPR_EL3 = 61737, |
1287 | AMAIR2_EL1 = 50457, |
1288 | AMAIR2_EL12 = 60697, |
1289 | AMAIR2_EL2 = 58649, |
1290 | AMAIR2_EL3 = 62745, |
1291 | MAIR2_EL1 = 50449, |
1292 | MAIR2_EL12 = 60689, |
1293 | MAIR2_EL2 = 58633, |
1294 | MAIR2_EL3 = 62729, |
1295 | PIRE0_EL1 = 50450, |
1296 | PIRE0_EL12 = 60690, |
1297 | PIRE0_EL2 = 58642, |
1298 | PIR_EL1 = 50451, |
1299 | PIR_EL12 = 60691, |
1300 | PIR_EL2 = 58643, |
1301 | PIR_EL3 = 62739, |
1302 | S2PIR_EL2 = 58645, |
1303 | POR_EL0 = 56596, |
1304 | POR_EL1 = 50452, |
1305 | POR_EL12 = 60692, |
1306 | POR_EL2 = 58644, |
1307 | POR_EL3 = 62740, |
1308 | S2POR_EL1 = 50453, |
1309 | SCTLR2_EL1 = 49283, |
1310 | SCTLR2_EL12 = 59523, |
1311 | SCTLR2_EL2 = 57475, |
1312 | SCTLR2_EL3 = 61571, |
1313 | TCR2_EL1 = 49411, |
1314 | TCR2_EL12 = 59651, |
1315 | TCR2_EL2 = 57603, |
1316 | RCWMASK_EL1 = 50822, |
1317 | RCWSMASK_EL1 = 50819, |
1318 | MDSELR_EL1 = 32802, |
1319 | PMUACR_EL1 = 50420, |
1320 | PMCCNTSVR_EL1 = 34655, |
1321 | PMICNTSVR_EL1 = 34656, |
1322 | PMSSCR_EL1 = 50411, |
1323 | PMEVCNTSVR0_EL1 = 34624, |
1324 | PMEVCNTSVR1_EL1 = 34625, |
1325 | PMEVCNTSVR2_EL1 = 34626, |
1326 | PMEVCNTSVR3_EL1 = 34627, |
1327 | PMEVCNTSVR4_EL1 = 34628, |
1328 | PMEVCNTSVR5_EL1 = 34629, |
1329 | PMEVCNTSVR6_EL1 = 34630, |
1330 | PMEVCNTSVR7_EL1 = 34631, |
1331 | PMEVCNTSVR8_EL1 = 34632, |
1332 | PMEVCNTSVR9_EL1 = 34633, |
1333 | PMEVCNTSVR10_EL1 = 34634, |
1334 | PMEVCNTSVR11_EL1 = 34635, |
1335 | PMEVCNTSVR12_EL1 = 34636, |
1336 | PMEVCNTSVR13_EL1 = 34637, |
1337 | PMEVCNTSVR14_EL1 = 34638, |
1338 | PMEVCNTSVR15_EL1 = 34639, |
1339 | PMEVCNTSVR16_EL1 = 34640, |
1340 | PMEVCNTSVR17_EL1 = 34641, |
1341 | PMEVCNTSVR18_EL1 = 34642, |
1342 | PMEVCNTSVR19_EL1 = 34643, |
1343 | PMEVCNTSVR20_EL1 = 34644, |
1344 | PMEVCNTSVR21_EL1 = 34645, |
1345 | PMEVCNTSVR22_EL1 = 34646, |
1346 | PMEVCNTSVR23_EL1 = 34647, |
1347 | PMEVCNTSVR24_EL1 = 34648, |
1348 | PMEVCNTSVR25_EL1 = 34649, |
1349 | PMEVCNTSVR26_EL1 = 34650, |
1350 | PMEVCNTSVR27_EL1 = 34651, |
1351 | PMEVCNTSVR28_EL1 = 34652, |
1352 | PMEVCNTSVR29_EL1 = 34653, |
1353 | PMEVCNTSVR30_EL1 = 34654, |
1354 | PMICNTR_EL0 = 56480, |
1355 | PMICFILTR_EL0 = 56496, |
1356 | PMZR_EL0 = 56556, |
1357 | PMECR_EL1 = 50421, |
1358 | PMIAR_EL1 = 50423, |
1359 | SPMACCESSR_EL1 = 34027, |
1360 | SPMACCESSR_EL12 = 44267, |
1361 | SPMACCESSR_EL2 = 42219, |
1362 | SPMACCESSR_EL3 = 46315, |
1363 | SPMCNTENCLR_EL0 = 40162, |
1364 | SPMCNTENSET_EL0 = 40161, |
1365 | SPMCR_EL0 = 40160, |
1366 | SPMDEVAFF_EL1 = 34030, |
1367 | SPMDEVARCH_EL1 = 34029, |
1368 | SPMEVCNTR0_EL0 = 40704, |
1369 | SPMEVFILT2R0_EL0 = 40752, |
1370 | SPMEVFILTR0_EL0 = 40736, |
1371 | SPMEVTYPER0_EL0 = 40720, |
1372 | SPMEVCNTR1_EL0 = 40705, |
1373 | SPMEVFILT2R1_EL0 = 40753, |
1374 | SPMEVFILTR1_EL0 = 40737, |
1375 | SPMEVTYPER1_EL0 = 40721, |
1376 | SPMEVCNTR2_EL0 = 40706, |
1377 | SPMEVFILT2R2_EL0 = 40754, |
1378 | SPMEVFILTR2_EL0 = 40738, |
1379 | SPMEVTYPER2_EL0 = 40722, |
1380 | SPMEVCNTR3_EL0 = 40707, |
1381 | SPMEVFILT2R3_EL0 = 40755, |
1382 | SPMEVFILTR3_EL0 = 40739, |
1383 | SPMEVTYPER3_EL0 = 40723, |
1384 | SPMEVCNTR4_EL0 = 40708, |
1385 | SPMEVFILT2R4_EL0 = 40756, |
1386 | SPMEVFILTR4_EL0 = 40740, |
1387 | SPMEVTYPER4_EL0 = 40724, |
1388 | SPMEVCNTR5_EL0 = 40709, |
1389 | SPMEVFILT2R5_EL0 = 40757, |
1390 | SPMEVFILTR5_EL0 = 40741, |
1391 | SPMEVTYPER5_EL0 = 40725, |
1392 | SPMEVCNTR6_EL0 = 40710, |
1393 | SPMEVFILT2R6_EL0 = 40758, |
1394 | SPMEVFILTR6_EL0 = 40742, |
1395 | SPMEVTYPER6_EL0 = 40726, |
1396 | SPMEVCNTR7_EL0 = 40711, |
1397 | SPMEVFILT2R7_EL0 = 40759, |
1398 | SPMEVFILTR7_EL0 = 40743, |
1399 | SPMEVTYPER7_EL0 = 40727, |
1400 | SPMEVCNTR8_EL0 = 40712, |
1401 | SPMEVFILT2R8_EL0 = 40760, |
1402 | SPMEVFILTR8_EL0 = 40744, |
1403 | SPMEVTYPER8_EL0 = 40728, |
1404 | SPMEVCNTR9_EL0 = 40713, |
1405 | SPMEVFILT2R9_EL0 = 40761, |
1406 | SPMEVFILTR9_EL0 = 40745, |
1407 | SPMEVTYPER9_EL0 = 40729, |
1408 | SPMEVCNTR10_EL0 = 40714, |
1409 | SPMEVFILT2R10_EL0 = 40762, |
1410 | SPMEVFILTR10_EL0 = 40746, |
1411 | SPMEVTYPER10_EL0 = 40730, |
1412 | SPMEVCNTR11_EL0 = 40715, |
1413 | SPMEVFILT2R11_EL0 = 40763, |
1414 | SPMEVFILTR11_EL0 = 40747, |
1415 | SPMEVTYPER11_EL0 = 40731, |
1416 | SPMEVCNTR12_EL0 = 40716, |
1417 | SPMEVFILT2R12_EL0 = 40764, |
1418 | SPMEVFILTR12_EL0 = 40748, |
1419 | SPMEVTYPER12_EL0 = 40732, |
1420 | SPMEVCNTR13_EL0 = 40717, |
1421 | SPMEVFILT2R13_EL0 = 40765, |
1422 | SPMEVFILTR13_EL0 = 40749, |
1423 | SPMEVTYPER13_EL0 = 40733, |
1424 | SPMEVCNTR14_EL0 = 40718, |
1425 | SPMEVFILT2R14_EL0 = 40766, |
1426 | SPMEVFILTR14_EL0 = 40750, |
1427 | SPMEVTYPER14_EL0 = 40734, |
1428 | SPMEVCNTR15_EL0 = 40719, |
1429 | SPMEVFILT2R15_EL0 = 40767, |
1430 | SPMEVFILTR15_EL0 = 40751, |
1431 | SPMEVTYPER15_EL0 = 40735, |
1432 | SPMIIDR_EL1 = 34028, |
1433 | SPMINTENCLR_EL1 = 34034, |
1434 | SPMINTENSET_EL1 = 34033, |
1435 | SPMOVSCLR_EL0 = 40163, |
1436 | SPMOVSSET_EL0 = 40179, |
1437 | SPMSELR_EL0 = 40165, |
1438 | SPMCGCR0_EL1 = 34024, |
1439 | SPMCGCR1_EL1 = 34025, |
1440 | SPMCFGR_EL1 = 34031, |
1441 | SPMROOTCR_EL3 = 46327, |
1442 | SPMSCR_EL1 = 48375, |
1443 | TRCITEEDCR = 34833, |
1444 | TRCITECR_EL1 = 49299, |
1445 | TRCITECR_EL12 = 59539, |
1446 | TRCITECR_EL2 = 57491, |
1447 | PMSDSFR_EL1 = 50388, |
1448 | ERXGSR_EL1 = 49818, |
1449 | PFAR_EL1 = 49925, |
1450 | PFAR_EL12 = 60165, |
1451 | PFAR_EL2 = 58117, |
1452 | PM = 49689, |
1453 | ID_AA64FPFR0_EL1 = 49191, |
1454 | FPMR = 55842, |
1455 | MDSTEPOP_EL1 = 32810, |
1456 | SPMZR_EL0 = 40164, |
1457 | VDISR_EL3 = 62985, |
1458 | VSESR_EL3 = 62099, |
1459 | HDBSSBR_EL2 = 57626, |
1460 | HDBSSPROD_EL2 = 57627, |
1461 | HACDBSBR_EL2 = 57628, |
1462 | HACDBSCONS_EL2 = 57629, |
1463 | FGWTE3_EL3 = 61581, |
1464 | MPAMBWIDR_EL1 = 50469, |
1465 | MPAMBW3_EL3 = 62764, |
1466 | MPAMBW2_EL2 = 58668, |
1467 | MPAMBW1_EL1 = 50476, |
1468 | MPAMBW1_EL12 = 60716, |
1469 | MPAMBW0_EL1 = 50477, |
1470 | MPAMBWCAP_EL2 = 58670, |
1471 | MPAMBWSM_EL1 = 50479, |
1472 | SCTLRMASK_EL1 = 49312, |
1473 | SCTLRMASK_EL2 = 57504, |
1474 | SCTLRMASK_EL12 = 59552, |
1475 | CPACRMASK_EL1 = 49314, |
1476 | CPTRMASK_EL2 = 57506, |
1477 | CPACRMASK_EL12 = 59554, |
1478 | SCTLR2MASK_EL1 = 49315, |
1479 | SCTLR2MASK_EL2 = 57507, |
1480 | SCTLR2MASK_EL12 = 59555, |
1481 | CPACRALIAS_EL1 = 49316, |
1482 | SCTLRALIAS_EL1 = 49318, |
1483 | SCTLR2ALIAS_EL1 = 49319, |
1484 | TCRMASK_EL1 = 49466, |
1485 | TCRMASK_EL2 = 57658, |
1486 | TCRMASK_EL12 = 59706, |
1487 | TCR2MASK_EL1 = 49467, |
1488 | TCR2MASK_EL2 = 57659, |
1489 | TCR2MASK_EL12 = 59707, |
1490 | TCRALIAS_EL1 = 49470, |
1491 | TCR2ALIAS_EL1 = 49471, |
1492 | ACTLRMASK_EL1 = 49313, |
1493 | ACTLRMASK_EL2 = 57505, |
1494 | ACTLRMASK_EL12 = 59553, |
1495 | ACTLRALIAS_EL1 = 49317, |
1496 | GPCBW_EL3 = 61709, |
1497 | PMBMAR_EL1 = 50389, |
1498 | PMBSR_EL12 = 60627, |
1499 | PMBSR_EL2 = 58579, |
1500 | PMBSR_EL3 = 62675, |
1501 | TRBSR_EL12 = 60635, |
1502 | TRBSR_EL2 = 58587, |
1503 | TRBSR_EL3 = 62683, |
1504 | }; |
1505 | #endif |
1506 | |
1507 | #ifdef GET_TSBValues_DECL |
1508 | enum TSBValues { |
1509 | csync = 0, |
1510 | }; |
1511 | #endif |
1512 | |
1513 | #ifdef GET_ATsList_DECL |
1514 | const AT *lookupATByEncoding(uint16_t Encoding); |
1515 | const AT *lookupATByName(StringRef Name); |
1516 | #endif |
1517 | |
1518 | #ifdef GET_ATsList_IMPL |
1519 | constexpr AT ATsList[] = { |
1520 | { "S1E1R" , 0x3C0, {} }, // 0 |
1521 | { "S1E1W" , 0x3C1, {} }, // 1 |
1522 | { "S1E0R" , 0x3C2, {} }, // 2 |
1523 | { "S1E0W" , 0x3C3, {} }, // 3 |
1524 | { "S1E1RP" , 0x3C8, {AArch64::FeaturePAN_RWV} }, // 4 |
1525 | { "S1E1WP" , 0x3C9, {AArch64::FeaturePAN_RWV} }, // 5 |
1526 | { "S1E1A" , 0x3CA, {} }, // 6 |
1527 | { "S1E2R" , 0x23C0, {} }, // 7 |
1528 | { "S1E2W" , 0x23C1, {} }, // 8 |
1529 | { "S12E1R" , 0x23C4, {} }, // 9 |
1530 | { "S12E1W" , 0x23C5, {} }, // 10 |
1531 | { "S12E0R" , 0x23C6, {} }, // 11 |
1532 | { "S12E0W" , 0x23C7, {} }, // 12 |
1533 | { "S1E2A" , 0x23CA, {} }, // 13 |
1534 | { "S1E3R" , 0x33C0, {} }, // 14 |
1535 | { "S1E3W" , 0x33C1, {} }, // 15 |
1536 | { "S1E3A" , 0x33CA, {} }, // 16 |
1537 | }; |
1538 | |
1539 | const AT *lookupATByEncoding(uint16_t Encoding) { |
1540 | struct KeyType { |
1541 | uint16_t Encoding; |
1542 | }; |
1543 | KeyType Key = {Encoding}; |
1544 | struct Comp { |
1545 | bool operator()(const AT &LHS, const KeyType &RHS) const { |
1546 | if (LHS.Encoding < RHS.Encoding) |
1547 | return true; |
1548 | if (LHS.Encoding > RHS.Encoding) |
1549 | return false; |
1550 | return false; |
1551 | } |
1552 | }; |
1553 | auto Table = ArrayRef(ATsList); |
1554 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1555 | if (Idx == Table.end() || |
1556 | Key.Encoding != Idx->Encoding) |
1557 | return nullptr; |
1558 | |
1559 | return &*Idx; |
1560 | } |
1561 | |
1562 | const AT *lookupATByName(StringRef Name) { |
1563 | struct IndexType { |
1564 | const char * Name; |
1565 | unsigned _index; |
1566 | }; |
1567 | static const struct IndexType Index[] = { |
1568 | { "S12E0R" , 11 }, |
1569 | { "S12E0W" , 12 }, |
1570 | { "S12E1R" , 9 }, |
1571 | { "S12E1W" , 10 }, |
1572 | { "S1E0R" , 2 }, |
1573 | { "S1E0W" , 3 }, |
1574 | { "S1E1A" , 6 }, |
1575 | { "S1E1R" , 0 }, |
1576 | { "S1E1RP" , 4 }, |
1577 | { "S1E1W" , 1 }, |
1578 | { "S1E1WP" , 5 }, |
1579 | { "S1E2A" , 13 }, |
1580 | { "S1E2R" , 7 }, |
1581 | { "S1E2W" , 8 }, |
1582 | { "S1E3A" , 16 }, |
1583 | { "S1E3R" , 14 }, |
1584 | { "S1E3W" , 15 }, |
1585 | }; |
1586 | |
1587 | struct KeyType { |
1588 | std::string Name; |
1589 | }; |
1590 | KeyType Key = {Name.upper()}; |
1591 | struct Comp { |
1592 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
1593 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
1594 | if (CmpName < 0) return true; |
1595 | if (CmpName > 0) return false; |
1596 | return false; |
1597 | } |
1598 | }; |
1599 | auto Table = ArrayRef(Index); |
1600 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1601 | if (Idx == Table.end() || |
1602 | Key.Name != Idx->Name) |
1603 | return nullptr; |
1604 | |
1605 | return &ATsList[Idx->_index]; |
1606 | } |
1607 | #endif |
1608 | |
1609 | #ifdef GET_BTIsList_DECL |
1610 | const BTI *lookupBTIByEncoding(uint8_t Encoding); |
1611 | const BTI *lookupBTIByName(StringRef Name); |
1612 | #endif |
1613 | |
1614 | #ifdef GET_BTIsList_IMPL |
1615 | constexpr BTI BTIsList[] = { |
1616 | { "c" , 0x2 }, // 0 |
1617 | { "j" , 0x4 }, // 1 |
1618 | { "jc" , 0x6 }, // 2 |
1619 | }; |
1620 | |
1621 | const BTI *lookupBTIByEncoding(uint8_t Encoding) { |
1622 | struct KeyType { |
1623 | uint8_t Encoding; |
1624 | }; |
1625 | KeyType Key = {Encoding}; |
1626 | struct Comp { |
1627 | bool operator()(const BTI &LHS, const KeyType &RHS) const { |
1628 | if (LHS.Encoding < RHS.Encoding) |
1629 | return true; |
1630 | if (LHS.Encoding > RHS.Encoding) |
1631 | return false; |
1632 | return false; |
1633 | } |
1634 | }; |
1635 | auto Table = ArrayRef(BTIsList); |
1636 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1637 | if (Idx == Table.end() || |
1638 | Key.Encoding != Idx->Encoding) |
1639 | return nullptr; |
1640 | |
1641 | return &*Idx; |
1642 | } |
1643 | |
1644 | const BTI *lookupBTIByName(StringRef Name) { |
1645 | struct IndexType { |
1646 | const char * Name; |
1647 | unsigned _index; |
1648 | }; |
1649 | static const struct IndexType Index[] = { |
1650 | { "C" , 0 }, |
1651 | { "J" , 1 }, |
1652 | { "JC" , 2 }, |
1653 | }; |
1654 | |
1655 | struct KeyType { |
1656 | std::string Name; |
1657 | }; |
1658 | KeyType Key = {Name.upper()}; |
1659 | struct Comp { |
1660 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
1661 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
1662 | if (CmpName < 0) return true; |
1663 | if (CmpName > 0) return false; |
1664 | return false; |
1665 | } |
1666 | }; |
1667 | auto Table = ArrayRef(Index); |
1668 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1669 | if (Idx == Table.end() || |
1670 | Key.Name != Idx->Name) |
1671 | return nullptr; |
1672 | |
1673 | return &BTIsList[Idx->_index]; |
1674 | } |
1675 | #endif |
1676 | |
1677 | #ifdef GET_DBnXSsList_DECL |
1678 | const DBnXS *lookupDBnXSByEncoding(uint8_t Encoding); |
1679 | const DBnXS *lookupDBnXSByImmValue(uint8_t ImmValue); |
1680 | const DBnXS *lookupDBnXSByName(StringRef Name); |
1681 | #endif |
1682 | |
1683 | #ifdef GET_DBnXSsList_IMPL |
1684 | constexpr DBnXS DBnXSsList[] = { |
1685 | { "oshnxs" , 0x3, 0x10, {AArch64::FeatureXS} }, // 0 |
1686 | { "nshnxs" , 0x7, 0x14, {AArch64::FeatureXS} }, // 1 |
1687 | { "ishnxs" , 0xB, 0x18, {AArch64::FeatureXS} }, // 2 |
1688 | { "synxs" , 0xF, 0x1C, {AArch64::FeatureXS} }, // 3 |
1689 | }; |
1690 | |
1691 | const DBnXS *lookupDBnXSByEncoding(uint8_t Encoding) { |
1692 | struct KeyType { |
1693 | uint8_t Encoding; |
1694 | }; |
1695 | KeyType Key = {Encoding}; |
1696 | struct Comp { |
1697 | bool operator()(const DBnXS &LHS, const KeyType &RHS) const { |
1698 | if (LHS.Encoding < RHS.Encoding) |
1699 | return true; |
1700 | if (LHS.Encoding > RHS.Encoding) |
1701 | return false; |
1702 | return false; |
1703 | } |
1704 | }; |
1705 | auto Table = ArrayRef(DBnXSsList); |
1706 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1707 | if (Idx == Table.end() || |
1708 | Key.Encoding != Idx->Encoding) |
1709 | return nullptr; |
1710 | |
1711 | return &*Idx; |
1712 | } |
1713 | |
1714 | const DBnXS *lookupDBnXSByImmValue(uint8_t ImmValue) { |
1715 | struct IndexType { |
1716 | uint8_t ImmValue; |
1717 | unsigned _index; |
1718 | }; |
1719 | static const struct IndexType Index[] = { |
1720 | { 0x10, 0 }, |
1721 | { 0x14, 1 }, |
1722 | { 0x18, 2 }, |
1723 | { 0x1C, 3 }, |
1724 | }; |
1725 | |
1726 | struct KeyType { |
1727 | uint8_t ImmValue; |
1728 | }; |
1729 | KeyType Key = {ImmValue}; |
1730 | struct Comp { |
1731 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
1732 | if (LHS.ImmValue < RHS.ImmValue) |
1733 | return true; |
1734 | if (LHS.ImmValue > RHS.ImmValue) |
1735 | return false; |
1736 | return false; |
1737 | } |
1738 | }; |
1739 | auto Table = ArrayRef(Index); |
1740 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1741 | if (Idx == Table.end() || |
1742 | Key.ImmValue != Idx->ImmValue) |
1743 | return nullptr; |
1744 | |
1745 | return &DBnXSsList[Idx->_index]; |
1746 | } |
1747 | |
1748 | const DBnXS *lookupDBnXSByName(StringRef Name) { |
1749 | struct IndexType { |
1750 | const char * Name; |
1751 | unsigned _index; |
1752 | }; |
1753 | static const struct IndexType Index[] = { |
1754 | { "ISHNXS" , 2 }, |
1755 | { "NSHNXS" , 1 }, |
1756 | { "OSHNXS" , 0 }, |
1757 | { "SYNXS" , 3 }, |
1758 | }; |
1759 | |
1760 | struct KeyType { |
1761 | std::string Name; |
1762 | }; |
1763 | KeyType Key = {Name.upper()}; |
1764 | struct Comp { |
1765 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
1766 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
1767 | if (CmpName < 0) return true; |
1768 | if (CmpName > 0) return false; |
1769 | return false; |
1770 | } |
1771 | }; |
1772 | auto Table = ArrayRef(Index); |
1773 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1774 | if (Idx == Table.end() || |
1775 | Key.Name != Idx->Name) |
1776 | return nullptr; |
1777 | |
1778 | return &DBnXSsList[Idx->_index]; |
1779 | } |
1780 | #endif |
1781 | |
1782 | #ifdef GET_DBsList_DECL |
1783 | const DB *lookupDBByEncoding(uint8_t Encoding); |
1784 | const DB *lookupDBByName(StringRef Name); |
1785 | #endif |
1786 | |
1787 | #ifdef GET_DBsList_IMPL |
1788 | constexpr DB DBsList[] = { |
1789 | { "oshld" , 0x1 }, // 0 |
1790 | { "oshst" , 0x2 }, // 1 |
1791 | { "osh" , 0x3 }, // 2 |
1792 | { "nshld" , 0x5 }, // 3 |
1793 | { "nshst" , 0x6 }, // 4 |
1794 | { "nsh" , 0x7 }, // 5 |
1795 | { "ishld" , 0x9 }, // 6 |
1796 | { "ishst" , 0xA }, // 7 |
1797 | { "ish" , 0xB }, // 8 |
1798 | { "ld" , 0xD }, // 9 |
1799 | { "st" , 0xE }, // 10 |
1800 | { "sy" , 0xF }, // 11 |
1801 | }; |
1802 | |
1803 | const DB *lookupDBByEncoding(uint8_t Encoding) { |
1804 | struct KeyType { |
1805 | uint8_t Encoding; |
1806 | }; |
1807 | KeyType Key = {Encoding}; |
1808 | struct Comp { |
1809 | bool operator()(const DB &LHS, const KeyType &RHS) const { |
1810 | if (LHS.Encoding < RHS.Encoding) |
1811 | return true; |
1812 | if (LHS.Encoding > RHS.Encoding) |
1813 | return false; |
1814 | return false; |
1815 | } |
1816 | }; |
1817 | auto Table = ArrayRef(DBsList); |
1818 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1819 | if (Idx == Table.end() || |
1820 | Key.Encoding != Idx->Encoding) |
1821 | return nullptr; |
1822 | |
1823 | return &*Idx; |
1824 | } |
1825 | |
1826 | const DB *lookupDBByName(StringRef Name) { |
1827 | struct IndexType { |
1828 | const char * Name; |
1829 | unsigned _index; |
1830 | }; |
1831 | static const struct IndexType Index[] = { |
1832 | { "ISH" , 8 }, |
1833 | { "ISHLD" , 6 }, |
1834 | { "ISHST" , 7 }, |
1835 | { "LD" , 9 }, |
1836 | { "NSH" , 5 }, |
1837 | { "NSHLD" , 3 }, |
1838 | { "NSHST" , 4 }, |
1839 | { "OSH" , 2 }, |
1840 | { "OSHLD" , 0 }, |
1841 | { "OSHST" , 1 }, |
1842 | { "ST" , 10 }, |
1843 | { "SY" , 11 }, |
1844 | }; |
1845 | |
1846 | struct KeyType { |
1847 | std::string Name; |
1848 | }; |
1849 | KeyType Key = {Name.upper()}; |
1850 | struct Comp { |
1851 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
1852 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
1853 | if (CmpName < 0) return true; |
1854 | if (CmpName > 0) return false; |
1855 | return false; |
1856 | } |
1857 | }; |
1858 | auto Table = ArrayRef(Index); |
1859 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1860 | if (Idx == Table.end() || |
1861 | Key.Name != Idx->Name) |
1862 | return nullptr; |
1863 | |
1864 | return &DBsList[Idx->_index]; |
1865 | } |
1866 | #endif |
1867 | |
1868 | #ifdef GET_DCsList_DECL |
1869 | const DC *lookupDCByEncoding(uint16_t Encoding); |
1870 | const DC *lookupDCByName(StringRef Name); |
1871 | #endif |
1872 | |
1873 | #ifdef GET_DCsList_IMPL |
1874 | constexpr DC DCsList[] = { |
1875 | { "IVAC" , 0x3B1, {} }, // 0 |
1876 | { "ISW" , 0x3B2, {} }, // 1 |
1877 | { "IGVAC" , 0x3B3, {AArch64::FeatureMTE} }, // 2 |
1878 | { "IGSW" , 0x3B4, {AArch64::FeatureMTE} }, // 3 |
1879 | { "IGDVAC" , 0x3B5, {AArch64::FeatureMTE} }, // 4 |
1880 | { "IGDSW" , 0x3B6, {AArch64::FeatureMTE} }, // 5 |
1881 | { "CSW" , 0x3D2, {} }, // 6 |
1882 | { "CGSW" , 0x3D4, {AArch64::FeatureMTE} }, // 7 |
1883 | { "CGDSW" , 0x3D6, {AArch64::FeatureMTE} }, // 8 |
1884 | { "CISW" , 0x3F2, {} }, // 9 |
1885 | { "CIGSW" , 0x3F4, {AArch64::FeatureMTE} }, // 10 |
1886 | { "CIGDSW" , 0x3F6, {AArch64::FeatureMTE} }, // 11 |
1887 | { "CIVAPS" , 0x3F9, {AArch64::FeaturePoPS} }, // 12 |
1888 | { "CIGDVAPS" , 0x3FD, {AArch64::FeaturePoPS} }, // 13 |
1889 | { "ZVA" , 0x1BA1, {} }, // 14 |
1890 | { "GVA" , 0x1BA3, {AArch64::FeatureMTE} }, // 15 |
1891 | { "GZVA" , 0x1BA4, {AArch64::FeatureMTE} }, // 16 |
1892 | { "CVAC" , 0x1BD1, {} }, // 17 |
1893 | { "CGVAC" , 0x1BD3, {AArch64::FeatureMTE} }, // 18 |
1894 | { "CGDVAC" , 0x1BD5, {AArch64::FeatureMTE} }, // 19 |
1895 | { "CVAOC" , 0x1BD8, {AArch64::FeatureOCCMO} }, // 20 |
1896 | { "CVAU" , 0x1BD9, {} }, // 21 |
1897 | { "CGDVAOC" , 0x1BDF, {AArch64::FeatureOCCMO, AArch64::FeatureMTE} }, // 22 |
1898 | { "CVAP" , 0x1BE1, {AArch64::FeatureCCPP} }, // 23 |
1899 | { "CGVAP" , 0x1BE3, {AArch64::FeatureMTE} }, // 24 |
1900 | { "CGDVAP" , 0x1BE5, {AArch64::FeatureMTE} }, // 25 |
1901 | { "CVADP" , 0x1BE9, {AArch64::FeatureCacheDeepPersist} }, // 26 |
1902 | { "CGVADP" , 0x1BEB, {AArch64::FeatureMTE} }, // 27 |
1903 | { "CGDVADP" , 0x1BED, {AArch64::FeatureMTE} }, // 28 |
1904 | { "CIVAC" , 0x1BF1, {} }, // 29 |
1905 | { "CIGVAC" , 0x1BF3, {AArch64::FeatureMTE} }, // 30 |
1906 | { "CIGDVAC" , 0x1BF5, {AArch64::FeatureMTE} }, // 31 |
1907 | { "CIVAOC" , 0x1BF8, {AArch64::FeatureOCCMO} }, // 32 |
1908 | { "CIGDVAOC" , 0x1BFF, {AArch64::FeatureOCCMO, AArch64::FeatureMTE} }, // 33 |
1909 | { "CIPAE" , 0x23F0, {AArch64::FeatureMEC} }, // 34 |
1910 | { "CIGDPAE" , 0x23F7, {AArch64::FeatureMEC} }, // 35 |
1911 | { "CIPAPA" , 0x33F1, {AArch64::FeatureRME} }, // 36 |
1912 | { "CIGDPAPA" , 0x33F5, {AArch64::FeatureRME} }, // 37 |
1913 | }; |
1914 | |
1915 | const DC *lookupDCByEncoding(uint16_t Encoding) { |
1916 | struct KeyType { |
1917 | uint16_t Encoding; |
1918 | }; |
1919 | KeyType Key = {Encoding}; |
1920 | struct Comp { |
1921 | bool operator()(const DC &LHS, const KeyType &RHS) const { |
1922 | if (LHS.Encoding < RHS.Encoding) |
1923 | return true; |
1924 | if (LHS.Encoding > RHS.Encoding) |
1925 | return false; |
1926 | return false; |
1927 | } |
1928 | }; |
1929 | auto Table = ArrayRef(DCsList); |
1930 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1931 | if (Idx == Table.end() || |
1932 | Key.Encoding != Idx->Encoding) |
1933 | return nullptr; |
1934 | |
1935 | return &*Idx; |
1936 | } |
1937 | |
1938 | const DC *lookupDCByName(StringRef Name) { |
1939 | struct IndexType { |
1940 | const char * Name; |
1941 | unsigned _index; |
1942 | }; |
1943 | static const struct IndexType Index[] = { |
1944 | { "CGDSW" , 8 }, |
1945 | { "CGDVAC" , 19 }, |
1946 | { "CGDVADP" , 28 }, |
1947 | { "CGDVAOC" , 22 }, |
1948 | { "CGDVAP" , 25 }, |
1949 | { "CGSW" , 7 }, |
1950 | { "CGVAC" , 18 }, |
1951 | { "CGVADP" , 27 }, |
1952 | { "CGVAP" , 24 }, |
1953 | { "CIGDPAE" , 35 }, |
1954 | { "CIGDPAPA" , 37 }, |
1955 | { "CIGDSW" , 11 }, |
1956 | { "CIGDVAC" , 31 }, |
1957 | { "CIGDVAOC" , 33 }, |
1958 | { "CIGDVAPS" , 13 }, |
1959 | { "CIGSW" , 10 }, |
1960 | { "CIGVAC" , 30 }, |
1961 | { "CIPAE" , 34 }, |
1962 | { "CIPAPA" , 36 }, |
1963 | { "CISW" , 9 }, |
1964 | { "CIVAC" , 29 }, |
1965 | { "CIVAOC" , 32 }, |
1966 | { "CIVAPS" , 12 }, |
1967 | { "CSW" , 6 }, |
1968 | { "CVAC" , 17 }, |
1969 | { "CVADP" , 26 }, |
1970 | { "CVAOC" , 20 }, |
1971 | { "CVAP" , 23 }, |
1972 | { "CVAU" , 21 }, |
1973 | { "GVA" , 15 }, |
1974 | { "GZVA" , 16 }, |
1975 | { "IGDSW" , 5 }, |
1976 | { "IGDVAC" , 4 }, |
1977 | { "IGSW" , 3 }, |
1978 | { "IGVAC" , 2 }, |
1979 | { "ISW" , 1 }, |
1980 | { "IVAC" , 0 }, |
1981 | { "ZVA" , 14 }, |
1982 | }; |
1983 | |
1984 | struct KeyType { |
1985 | std::string Name; |
1986 | }; |
1987 | KeyType Key = {Name.upper()}; |
1988 | struct Comp { |
1989 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
1990 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
1991 | if (CmpName < 0) return true; |
1992 | if (CmpName > 0) return false; |
1993 | return false; |
1994 | } |
1995 | }; |
1996 | auto Table = ArrayRef(Index); |
1997 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1998 | if (Idx == Table.end() || |
1999 | Key.Name != Idx->Name) |
2000 | return nullptr; |
2001 | |
2002 | return &DCsList[Idx->_index]; |
2003 | } |
2004 | #endif |
2005 | |
2006 | #ifdef GET_ExactFPImmsList_DECL |
2007 | const ExactFPImm *lookupExactFPImmByEnum(uint8_t Enum); |
2008 | #endif |
2009 | |
2010 | #ifdef GET_ExactFPImmsList_IMPL |
2011 | constexpr ExactFPImm ExactFPImmsList[] = { |
2012 | { 0x0, "0.0" }, // 0 |
2013 | { 0x1, "0.5" }, // 1 |
2014 | { 0x2, "1.0" }, // 2 |
2015 | { 0x3, "2.0" }, // 3 |
2016 | }; |
2017 | |
2018 | const ExactFPImm *lookupExactFPImmByEnum(uint8_t Enum) { |
2019 | struct IndexType { |
2020 | uint8_t Enum; |
2021 | unsigned _index; |
2022 | }; |
2023 | static const struct IndexType Index[] = { |
2024 | { 0x0, 0 }, |
2025 | { 0x1, 1 }, |
2026 | { 0x2, 2 }, |
2027 | { 0x3, 3 }, |
2028 | }; |
2029 | |
2030 | if ((uint8_t)Enum != std::clamp((uint8_t)Enum, (uint8_t)0x0, (uint8_t)0x3)) |
2031 | return nullptr; |
2032 | |
2033 | auto Table = ArrayRef(Index); |
2034 | size_t Idx = Enum - 0x0; |
2035 | return &ExactFPImmsList[Table[Idx]._index]; |
2036 | } |
2037 | #endif |
2038 | |
2039 | #ifdef GET_ICsList_DECL |
2040 | const IC *lookupICByEncoding(uint16_t Encoding); |
2041 | const IC *lookupICByName(StringRef Name); |
2042 | #endif |
2043 | |
2044 | #ifdef GET_ICsList_IMPL |
2045 | constexpr IC ICsList[] = { |
2046 | { "IALLUIS" , 0x388, false }, // 0 |
2047 | { "IALLU" , 0x3A8, false }, // 1 |
2048 | { "IVAU" , 0x1BA9, true }, // 2 |
2049 | }; |
2050 | |
2051 | const IC *lookupICByEncoding(uint16_t Encoding) { |
2052 | struct KeyType { |
2053 | uint16_t Encoding; |
2054 | }; |
2055 | KeyType Key = {Encoding}; |
2056 | struct Comp { |
2057 | bool operator()(const IC &LHS, const KeyType &RHS) const { |
2058 | if (LHS.Encoding < RHS.Encoding) |
2059 | return true; |
2060 | if (LHS.Encoding > RHS.Encoding) |
2061 | return false; |
2062 | return false; |
2063 | } |
2064 | }; |
2065 | auto Table = ArrayRef(ICsList); |
2066 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2067 | if (Idx == Table.end() || |
2068 | Key.Encoding != Idx->Encoding) |
2069 | return nullptr; |
2070 | |
2071 | return &*Idx; |
2072 | } |
2073 | |
2074 | const IC *lookupICByName(StringRef Name) { |
2075 | struct IndexType { |
2076 | const char * Name; |
2077 | unsigned _index; |
2078 | }; |
2079 | static const struct IndexType Index[] = { |
2080 | { "IALLU" , 1 }, |
2081 | { "IALLUIS" , 0 }, |
2082 | { "IVAU" , 2 }, |
2083 | }; |
2084 | |
2085 | struct KeyType { |
2086 | std::string Name; |
2087 | }; |
2088 | KeyType Key = {Name.upper()}; |
2089 | struct Comp { |
2090 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2091 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2092 | if (CmpName < 0) return true; |
2093 | if (CmpName > 0) return false; |
2094 | return false; |
2095 | } |
2096 | }; |
2097 | auto Table = ArrayRef(Index); |
2098 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2099 | if (Idx == Table.end() || |
2100 | Key.Name != Idx->Name) |
2101 | return nullptr; |
2102 | |
2103 | return &ICsList[Idx->_index]; |
2104 | } |
2105 | #endif |
2106 | |
2107 | #ifdef GET_ISBsList_DECL |
2108 | const ISB *lookupISBByEncoding(uint8_t Encoding); |
2109 | const ISB *lookupISBByName(StringRef Name); |
2110 | #endif |
2111 | |
2112 | #ifdef GET_ISBsList_IMPL |
2113 | constexpr ISB ISBsList[] = { |
2114 | { "sy" , 0xF }, // 0 |
2115 | }; |
2116 | |
2117 | const ISB *lookupISBByEncoding(uint8_t Encoding) { |
2118 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0xF, (uint8_t)0xF)) |
2119 | return nullptr; |
2120 | |
2121 | auto Table = ArrayRef(ISBsList); |
2122 | size_t Idx = Encoding - 0xF; |
2123 | return &Table[Idx]; |
2124 | } |
2125 | |
2126 | const ISB *lookupISBByName(StringRef Name) { |
2127 | struct IndexType { |
2128 | const char * Name; |
2129 | unsigned _index; |
2130 | }; |
2131 | static const struct IndexType Index[] = { |
2132 | { "SY" , 0 }, |
2133 | }; |
2134 | |
2135 | struct KeyType { |
2136 | std::string Name; |
2137 | }; |
2138 | KeyType Key = {Name.upper()}; |
2139 | struct Comp { |
2140 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2141 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2142 | if (CmpName < 0) return true; |
2143 | if (CmpName > 0) return false; |
2144 | return false; |
2145 | } |
2146 | }; |
2147 | auto Table = ArrayRef(Index); |
2148 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2149 | if (Idx == Table.end() || |
2150 | Key.Name != Idx->Name) |
2151 | return nullptr; |
2152 | |
2153 | return &ISBsList[Idx->_index]; |
2154 | } |
2155 | #endif |
2156 | |
2157 | #ifdef GET_PHintsList_DECL |
2158 | const PHint *lookupPHintByEncoding(uint16_t Encoding); |
2159 | const PHint *lookupPHintByName(StringRef Name); |
2160 | #endif |
2161 | |
2162 | #ifdef GET_PHintsList_IMPL |
2163 | constexpr PHint PHintsList[] = { |
2164 | { "keep" , 0x0, {AArch64::FeaturePCDPHINT} }, // 0 |
2165 | { "strm" , 0x1, {AArch64::FeaturePCDPHINT} }, // 1 |
2166 | }; |
2167 | |
2168 | const PHint *lookupPHintByEncoding(uint16_t Encoding) { |
2169 | if ((uint16_t)Encoding != std::clamp((uint16_t)Encoding, (uint16_t)0x0, (uint16_t)0x1)) |
2170 | return nullptr; |
2171 | |
2172 | auto Table = ArrayRef(PHintsList); |
2173 | size_t Idx = Encoding - 0x0; |
2174 | return &Table[Idx]; |
2175 | } |
2176 | |
2177 | const PHint *lookupPHintByName(StringRef Name) { |
2178 | struct IndexType { |
2179 | const char * Name; |
2180 | unsigned _index; |
2181 | }; |
2182 | static const struct IndexType Index[] = { |
2183 | { "KEEP" , 0 }, |
2184 | { "STRM" , 1 }, |
2185 | }; |
2186 | |
2187 | struct KeyType { |
2188 | std::string Name; |
2189 | }; |
2190 | KeyType Key = {Name.upper()}; |
2191 | struct Comp { |
2192 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2193 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2194 | if (CmpName < 0) return true; |
2195 | if (CmpName > 0) return false; |
2196 | return false; |
2197 | } |
2198 | }; |
2199 | auto Table = ArrayRef(Index); |
2200 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2201 | if (Idx == Table.end() || |
2202 | Key.Name != Idx->Name) |
2203 | return nullptr; |
2204 | |
2205 | return &PHintsList[Idx->_index]; |
2206 | } |
2207 | #endif |
2208 | |
2209 | #ifdef GET_PRFMsList_DECL |
2210 | const PRFM *lookupPRFMByEncoding(uint8_t Encoding); |
2211 | const PRFM *lookupPRFMByName(StringRef Name); |
2212 | #endif |
2213 | |
2214 | #ifdef GET_PRFMsList_IMPL |
2215 | constexpr PRFM PRFMsList[] = { |
2216 | { "pldl1keep" , 0x0, {} }, // 0 |
2217 | { "pldl1strm" , 0x1, {} }, // 1 |
2218 | { "pldl2keep" , 0x2, {} }, // 2 |
2219 | { "pldl2strm" , 0x3, {} }, // 3 |
2220 | { "pldl3keep" , 0x4, {} }, // 4 |
2221 | { "pldl3strm" , 0x5, {} }, // 5 |
2222 | { "pldslckeep" , 0x6, {AArch64::FeaturePRFM_SLC} }, // 6 |
2223 | { "pldslcstrm" , 0x7, {AArch64::FeaturePRFM_SLC} }, // 7 |
2224 | { "plil1keep" , 0x8, {} }, // 8 |
2225 | { "plil1strm" , 0x9, {} }, // 9 |
2226 | { "plil2keep" , 0xA, {} }, // 10 |
2227 | { "plil2strm" , 0xB, {} }, // 11 |
2228 | { "plil3keep" , 0xC, {} }, // 12 |
2229 | { "plil3strm" , 0xD, {} }, // 13 |
2230 | { "plislckeep" , 0xE, {AArch64::FeaturePRFM_SLC} }, // 14 |
2231 | { "plislcstrm" , 0xF, {AArch64::FeaturePRFM_SLC} }, // 15 |
2232 | { "pstl1keep" , 0x10, {} }, // 16 |
2233 | { "pstl1strm" , 0x11, {} }, // 17 |
2234 | { "pstl2keep" , 0x12, {} }, // 18 |
2235 | { "pstl2strm" , 0x13, {} }, // 19 |
2236 | { "pstl3keep" , 0x14, {} }, // 20 |
2237 | { "pstl3strm" , 0x15, {} }, // 21 |
2238 | { "pstslckeep" , 0x16, {AArch64::FeaturePRFM_SLC} }, // 22 |
2239 | { "pstslcstrm" , 0x17, {AArch64::FeaturePRFM_SLC} }, // 23 |
2240 | }; |
2241 | |
2242 | const PRFM *lookupPRFMByEncoding(uint8_t Encoding) { |
2243 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x0, (uint8_t)0x17)) |
2244 | return nullptr; |
2245 | |
2246 | auto Table = ArrayRef(PRFMsList); |
2247 | size_t Idx = Encoding - 0x0; |
2248 | return &Table[Idx]; |
2249 | } |
2250 | |
2251 | const PRFM *lookupPRFMByName(StringRef Name) { |
2252 | struct IndexType { |
2253 | const char * Name; |
2254 | unsigned _index; |
2255 | }; |
2256 | static const struct IndexType Index[] = { |
2257 | { "PLDL1KEEP" , 0 }, |
2258 | { "PLDL1STRM" , 1 }, |
2259 | { "PLDL2KEEP" , 2 }, |
2260 | { "PLDL2STRM" , 3 }, |
2261 | { "PLDL3KEEP" , 4 }, |
2262 | { "PLDL3STRM" , 5 }, |
2263 | { "PLDSLCKEEP" , 6 }, |
2264 | { "PLDSLCSTRM" , 7 }, |
2265 | { "PLIL1KEEP" , 8 }, |
2266 | { "PLIL1STRM" , 9 }, |
2267 | { "PLIL2KEEP" , 10 }, |
2268 | { "PLIL2STRM" , 11 }, |
2269 | { "PLIL3KEEP" , 12 }, |
2270 | { "PLIL3STRM" , 13 }, |
2271 | { "PLISLCKEEP" , 14 }, |
2272 | { "PLISLCSTRM" , 15 }, |
2273 | { "PSTL1KEEP" , 16 }, |
2274 | { "PSTL1STRM" , 17 }, |
2275 | { "PSTL2KEEP" , 18 }, |
2276 | { "PSTL2STRM" , 19 }, |
2277 | { "PSTL3KEEP" , 20 }, |
2278 | { "PSTL3STRM" , 21 }, |
2279 | { "PSTSLCKEEP" , 22 }, |
2280 | { "PSTSLCSTRM" , 23 }, |
2281 | }; |
2282 | |
2283 | struct KeyType { |
2284 | std::string Name; |
2285 | }; |
2286 | KeyType Key = {Name.upper()}; |
2287 | struct Comp { |
2288 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2289 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2290 | if (CmpName < 0) return true; |
2291 | if (CmpName > 0) return false; |
2292 | return false; |
2293 | } |
2294 | }; |
2295 | auto Table = ArrayRef(Index); |
2296 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2297 | if (Idx == Table.end() || |
2298 | Key.Name != Idx->Name) |
2299 | return nullptr; |
2300 | |
2301 | return &PRFMsList[Idx->_index]; |
2302 | } |
2303 | #endif |
2304 | |
2305 | #ifdef GET_PSBsList_DECL |
2306 | const PSB *lookupPSBByEncoding(uint8_t Encoding); |
2307 | const PSB *lookupPSBByName(StringRef Name); |
2308 | #endif |
2309 | |
2310 | #ifdef GET_PSBsList_IMPL |
2311 | constexpr PSB PSBsList[] = { |
2312 | { "csync" , 0x11 }, // 0 |
2313 | }; |
2314 | |
2315 | const PSB *lookupPSBByEncoding(uint8_t Encoding) { |
2316 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x11, (uint8_t)0x11)) |
2317 | return nullptr; |
2318 | |
2319 | auto Table = ArrayRef(PSBsList); |
2320 | size_t Idx = Encoding - 0x11; |
2321 | return &Table[Idx]; |
2322 | } |
2323 | |
2324 | const PSB *lookupPSBByName(StringRef Name) { |
2325 | struct IndexType { |
2326 | const char * Name; |
2327 | unsigned _index; |
2328 | }; |
2329 | static const struct IndexType Index[] = { |
2330 | { "CSYNC" , 0 }, |
2331 | }; |
2332 | |
2333 | struct KeyType { |
2334 | std::string Name; |
2335 | }; |
2336 | KeyType Key = {Name.upper()}; |
2337 | struct Comp { |
2338 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2339 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2340 | if (CmpName < 0) return true; |
2341 | if (CmpName > 0) return false; |
2342 | return false; |
2343 | } |
2344 | }; |
2345 | auto Table = ArrayRef(Index); |
2346 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2347 | if (Idx == Table.end() || |
2348 | Key.Name != Idx->Name) |
2349 | return nullptr; |
2350 | |
2351 | return &PSBsList[Idx->_index]; |
2352 | } |
2353 | #endif |
2354 | |
2355 | #ifdef GET_PStateImm0_1sList_DECL |
2356 | const PStateImm0_1 *lookupPStateImm0_1ByEncoding(uint16_t Encoding); |
2357 | const PStateImm0_1 *lookupPStateImm0_1ByName(StringRef Name); |
2358 | #endif |
2359 | |
2360 | #ifdef GET_PStateImm0_1sList_IMPL |
2361 | constexpr PStateImm0_1 PStateImm0_1sList[] = { |
2362 | { "ALLINT" , 0x8, {AArch64::FeatureNMI} }, // 0 |
2363 | { "PM" , 0x48, {} }, // 1 |
2364 | }; |
2365 | |
2366 | const PStateImm0_1 *lookupPStateImm0_1ByEncoding(uint16_t Encoding) { |
2367 | struct KeyType { |
2368 | uint16_t Encoding; |
2369 | }; |
2370 | KeyType Key = {Encoding}; |
2371 | struct Comp { |
2372 | bool operator()(const PStateImm0_1 &LHS, const KeyType &RHS) const { |
2373 | if (LHS.Encoding < RHS.Encoding) |
2374 | return true; |
2375 | if (LHS.Encoding > RHS.Encoding) |
2376 | return false; |
2377 | return false; |
2378 | } |
2379 | }; |
2380 | auto Table = ArrayRef(PStateImm0_1sList); |
2381 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2382 | if (Idx == Table.end() || |
2383 | Key.Encoding != Idx->Encoding) |
2384 | return nullptr; |
2385 | |
2386 | return &*Idx; |
2387 | } |
2388 | |
2389 | const PStateImm0_1 *lookupPStateImm0_1ByName(StringRef Name) { |
2390 | struct IndexType { |
2391 | const char * Name; |
2392 | unsigned _index; |
2393 | }; |
2394 | static const struct IndexType Index[] = { |
2395 | { "ALLINT" , 0 }, |
2396 | { "PM" , 1 }, |
2397 | }; |
2398 | |
2399 | struct KeyType { |
2400 | std::string Name; |
2401 | }; |
2402 | KeyType Key = {Name.upper()}; |
2403 | struct Comp { |
2404 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2405 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2406 | if (CmpName < 0) return true; |
2407 | if (CmpName > 0) return false; |
2408 | return false; |
2409 | } |
2410 | }; |
2411 | auto Table = ArrayRef(Index); |
2412 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2413 | if (Idx == Table.end() || |
2414 | Key.Name != Idx->Name) |
2415 | return nullptr; |
2416 | |
2417 | return &PStateImm0_1sList[Idx->_index]; |
2418 | } |
2419 | #endif |
2420 | |
2421 | #ifdef GET_PStateImm0_15sList_DECL |
2422 | const PStateImm0_15 *lookupPStateImm0_15ByEncoding(uint8_t Encoding); |
2423 | const PStateImm0_15 *lookupPStateImm0_15ByName(StringRef Name); |
2424 | #endif |
2425 | |
2426 | #ifdef GET_PStateImm0_15sList_IMPL |
2427 | constexpr PStateImm0_15 PStateImm0_15sList[] = { |
2428 | { "UAO" , 0x3, {AArch64::FeaturePsUAO} }, // 0 |
2429 | { "PAN" , 0x4, {AArch64::FeaturePAN} }, // 1 |
2430 | { "SPSel" , 0x5, {} }, // 2 |
2431 | { "SSBS" , 0x19, {AArch64::FeatureSSBS} }, // 3 |
2432 | { "DIT" , 0x1A, {AArch64::FeatureDIT} }, // 4 |
2433 | { "TCO" , 0x1C, {AArch64::FeatureMTE} }, // 5 |
2434 | { "DAIFSet" , 0x1E, {} }, // 6 |
2435 | { "DAIFClr" , 0x1F, {} }, // 7 |
2436 | }; |
2437 | |
2438 | const PStateImm0_15 *lookupPStateImm0_15ByEncoding(uint8_t Encoding) { |
2439 | struct KeyType { |
2440 | uint8_t Encoding; |
2441 | }; |
2442 | KeyType Key = {Encoding}; |
2443 | struct Comp { |
2444 | bool operator()(const PStateImm0_15 &LHS, const KeyType &RHS) const { |
2445 | if (LHS.Encoding < RHS.Encoding) |
2446 | return true; |
2447 | if (LHS.Encoding > RHS.Encoding) |
2448 | return false; |
2449 | return false; |
2450 | } |
2451 | }; |
2452 | auto Table = ArrayRef(PStateImm0_15sList); |
2453 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2454 | if (Idx == Table.end() || |
2455 | Key.Encoding != Idx->Encoding) |
2456 | return nullptr; |
2457 | |
2458 | return &*Idx; |
2459 | } |
2460 | |
2461 | const PStateImm0_15 *lookupPStateImm0_15ByName(StringRef Name) { |
2462 | struct IndexType { |
2463 | const char * Name; |
2464 | unsigned _index; |
2465 | }; |
2466 | static const struct IndexType Index[] = { |
2467 | { "DAIFCLR" , 7 }, |
2468 | { "DAIFSET" , 6 }, |
2469 | { "DIT" , 4 }, |
2470 | { "PAN" , 1 }, |
2471 | { "SPSEL" , 2 }, |
2472 | { "SSBS" , 3 }, |
2473 | { "TCO" , 5 }, |
2474 | { "UAO" , 0 }, |
2475 | }; |
2476 | |
2477 | struct KeyType { |
2478 | std::string Name; |
2479 | }; |
2480 | KeyType Key = {Name.upper()}; |
2481 | struct Comp { |
2482 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2483 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2484 | if (CmpName < 0) return true; |
2485 | if (CmpName > 0) return false; |
2486 | return false; |
2487 | } |
2488 | }; |
2489 | auto Table = ArrayRef(Index); |
2490 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2491 | if (Idx == Table.end() || |
2492 | Key.Name != Idx->Name) |
2493 | return nullptr; |
2494 | |
2495 | return &PStateImm0_15sList[Idx->_index]; |
2496 | } |
2497 | #endif |
2498 | |
2499 | #ifdef GET_RPRFMsList_DECL |
2500 | const RPRFM *lookupRPRFMByEncoding(uint8_t Encoding); |
2501 | const RPRFM *lookupRPRFMByName(StringRef Name); |
2502 | #endif |
2503 | |
2504 | #ifdef GET_RPRFMsList_IMPL |
2505 | constexpr RPRFM RPRFMsList[] = { |
2506 | { "pldkeep" , 0x0, {} }, // 0 |
2507 | { "pldstrm" , 0x4, {} }, // 1 |
2508 | { "pstkeep" , 0x1, {} }, // 2 |
2509 | { "pststrm" , 0x5, {} }, // 3 |
2510 | }; |
2511 | |
2512 | const RPRFM *lookupRPRFMByEncoding(uint8_t Encoding) { |
2513 | struct IndexType { |
2514 | uint8_t Encoding; |
2515 | unsigned _index; |
2516 | }; |
2517 | static const struct IndexType Index[] = { |
2518 | { 0x0, 0 }, |
2519 | { 0x1, 2 }, |
2520 | { 0x4, 1 }, |
2521 | { 0x5, 3 }, |
2522 | }; |
2523 | |
2524 | struct KeyType { |
2525 | uint8_t Encoding; |
2526 | }; |
2527 | KeyType Key = {Encoding}; |
2528 | struct Comp { |
2529 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2530 | if (LHS.Encoding < RHS.Encoding) |
2531 | return true; |
2532 | if (LHS.Encoding > RHS.Encoding) |
2533 | return false; |
2534 | return false; |
2535 | } |
2536 | }; |
2537 | auto Table = ArrayRef(Index); |
2538 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2539 | if (Idx == Table.end() || |
2540 | Key.Encoding != Idx->Encoding) |
2541 | return nullptr; |
2542 | |
2543 | return &RPRFMsList[Idx->_index]; |
2544 | } |
2545 | |
2546 | const RPRFM *lookupRPRFMByName(StringRef Name) { |
2547 | struct IndexType { |
2548 | const char * Name; |
2549 | unsigned _index; |
2550 | }; |
2551 | static const struct IndexType Index[] = { |
2552 | { "PLDKEEP" , 0 }, |
2553 | { "PLDSTRM" , 1 }, |
2554 | { "PSTKEEP" , 2 }, |
2555 | { "PSTSTRM" , 3 }, |
2556 | }; |
2557 | |
2558 | struct KeyType { |
2559 | std::string Name; |
2560 | }; |
2561 | KeyType Key = {Name.upper()}; |
2562 | struct Comp { |
2563 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2564 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2565 | if (CmpName < 0) return true; |
2566 | if (CmpName > 0) return false; |
2567 | return false; |
2568 | } |
2569 | }; |
2570 | auto Table = ArrayRef(Index); |
2571 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2572 | if (Idx == Table.end() || |
2573 | Key.Name != Idx->Name) |
2574 | return nullptr; |
2575 | |
2576 | return &RPRFMsList[Idx->_index]; |
2577 | } |
2578 | #endif |
2579 | |
2580 | #ifdef GET_SVCRsList_DECL |
2581 | const SVCR *lookupSVCRByEncoding(uint8_t Encoding); |
2582 | const SVCR *lookupSVCRByName(StringRef Name); |
2583 | #endif |
2584 | |
2585 | #ifdef GET_SVCRsList_IMPL |
2586 | constexpr SVCR SVCRsList[] = { |
2587 | { "SVCRSM" , 0x1, {AArch64::FeatureSME} }, // 0 |
2588 | { "SVCRZA" , 0x2, {AArch64::FeatureSME} }, // 1 |
2589 | { "SVCRSMZA" , 0x3, {AArch64::FeatureSME} }, // 2 |
2590 | }; |
2591 | |
2592 | const SVCR *lookupSVCRByEncoding(uint8_t Encoding) { |
2593 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x1, (uint8_t)0x3)) |
2594 | return nullptr; |
2595 | |
2596 | auto Table = ArrayRef(SVCRsList); |
2597 | size_t Idx = Encoding - 0x1; |
2598 | return &Table[Idx]; |
2599 | } |
2600 | |
2601 | const SVCR *lookupSVCRByName(StringRef Name) { |
2602 | struct IndexType { |
2603 | const char * Name; |
2604 | unsigned _index; |
2605 | }; |
2606 | static const struct IndexType Index[] = { |
2607 | { "SVCRSM" , 0 }, |
2608 | { "SVCRSMZA" , 2 }, |
2609 | { "SVCRZA" , 1 }, |
2610 | }; |
2611 | |
2612 | struct KeyType { |
2613 | std::string Name; |
2614 | }; |
2615 | KeyType Key = {Name.upper()}; |
2616 | struct Comp { |
2617 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2618 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2619 | if (CmpName < 0) return true; |
2620 | if (CmpName > 0) return false; |
2621 | return false; |
2622 | } |
2623 | }; |
2624 | auto Table = ArrayRef(Index); |
2625 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2626 | if (Idx == Table.end() || |
2627 | Key.Name != Idx->Name) |
2628 | return nullptr; |
2629 | |
2630 | return &SVCRsList[Idx->_index]; |
2631 | } |
2632 | #endif |
2633 | |
2634 | #ifdef GET_SVEPREDPATsList_DECL |
2635 | const SVEPREDPAT *lookupSVEPREDPATByEncoding(uint8_t Encoding); |
2636 | const SVEPREDPAT *lookupSVEPREDPATByName(StringRef Name); |
2637 | #endif |
2638 | |
2639 | #ifdef GET_SVEPREDPATsList_IMPL |
2640 | constexpr SVEPREDPAT SVEPREDPATsList[] = { |
2641 | { "pow2" , 0x0 }, // 0 |
2642 | { "vl1" , 0x1 }, // 1 |
2643 | { "vl2" , 0x2 }, // 2 |
2644 | { "vl3" , 0x3 }, // 3 |
2645 | { "vl4" , 0x4 }, // 4 |
2646 | { "vl5" , 0x5 }, // 5 |
2647 | { "vl6" , 0x6 }, // 6 |
2648 | { "vl7" , 0x7 }, // 7 |
2649 | { "vl8" , 0x8 }, // 8 |
2650 | { "vl16" , 0x9 }, // 9 |
2651 | { "vl32" , 0xA }, // 10 |
2652 | { "vl64" , 0xB }, // 11 |
2653 | { "vl128" , 0xC }, // 12 |
2654 | { "vl256" , 0xD }, // 13 |
2655 | { "mul4" , 0x1D }, // 14 |
2656 | { "mul3" , 0x1E }, // 15 |
2657 | { "all" , 0x1F }, // 16 |
2658 | }; |
2659 | |
2660 | const SVEPREDPAT *lookupSVEPREDPATByEncoding(uint8_t Encoding) { |
2661 | struct KeyType { |
2662 | uint8_t Encoding; |
2663 | }; |
2664 | KeyType Key = {Encoding}; |
2665 | struct Comp { |
2666 | bool operator()(const SVEPREDPAT &LHS, const KeyType &RHS) const { |
2667 | if (LHS.Encoding < RHS.Encoding) |
2668 | return true; |
2669 | if (LHS.Encoding > RHS.Encoding) |
2670 | return false; |
2671 | return false; |
2672 | } |
2673 | }; |
2674 | auto Table = ArrayRef(SVEPREDPATsList); |
2675 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2676 | if (Idx == Table.end() || |
2677 | Key.Encoding != Idx->Encoding) |
2678 | return nullptr; |
2679 | |
2680 | return &*Idx; |
2681 | } |
2682 | |
2683 | const SVEPREDPAT *lookupSVEPREDPATByName(StringRef Name) { |
2684 | struct IndexType { |
2685 | const char * Name; |
2686 | unsigned _index; |
2687 | }; |
2688 | static const struct IndexType Index[] = { |
2689 | { "ALL" , 16 }, |
2690 | { "MUL3" , 15 }, |
2691 | { "MUL4" , 14 }, |
2692 | { "POW2" , 0 }, |
2693 | { "VL1" , 1 }, |
2694 | { "VL128" , 12 }, |
2695 | { "VL16" , 9 }, |
2696 | { "VL2" , 2 }, |
2697 | { "VL256" , 13 }, |
2698 | { "VL3" , 3 }, |
2699 | { "VL32" , 10 }, |
2700 | { "VL4" , 4 }, |
2701 | { "VL5" , 5 }, |
2702 | { "VL6" , 6 }, |
2703 | { "VL64" , 11 }, |
2704 | { "VL7" , 7 }, |
2705 | { "VL8" , 8 }, |
2706 | }; |
2707 | |
2708 | struct KeyType { |
2709 | std::string Name; |
2710 | }; |
2711 | KeyType Key = {Name.upper()}; |
2712 | struct Comp { |
2713 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2714 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2715 | if (CmpName < 0) return true; |
2716 | if (CmpName > 0) return false; |
2717 | return false; |
2718 | } |
2719 | }; |
2720 | auto Table = ArrayRef(Index); |
2721 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2722 | if (Idx == Table.end() || |
2723 | Key.Name != Idx->Name) |
2724 | return nullptr; |
2725 | |
2726 | return &SVEPREDPATsList[Idx->_index]; |
2727 | } |
2728 | #endif |
2729 | |
2730 | #ifdef GET_SVEPRFMsList_DECL |
2731 | const SVEPRFM *lookupSVEPRFMByEncoding(uint8_t Encoding); |
2732 | const SVEPRFM *lookupSVEPRFMByName(StringRef Name); |
2733 | #endif |
2734 | |
2735 | #ifdef GET_SVEPRFMsList_IMPL |
2736 | constexpr SVEPRFM SVEPRFMsList[] = { |
2737 | { "pldl1keep" , 0x0, {AArch64::FeatureSVE} }, // 0 |
2738 | { "pldl1strm" , 0x1, {AArch64::FeatureSVE} }, // 1 |
2739 | { "pldl2keep" , 0x2, {AArch64::FeatureSVE} }, // 2 |
2740 | { "pldl2strm" , 0x3, {AArch64::FeatureSVE} }, // 3 |
2741 | { "pldl3keep" , 0x4, {AArch64::FeatureSVE} }, // 4 |
2742 | { "pldl3strm" , 0x5, {AArch64::FeatureSVE} }, // 5 |
2743 | { "pstl1keep" , 0x8, {AArch64::FeatureSVE} }, // 6 |
2744 | { "pstl1strm" , 0x9, {AArch64::FeatureSVE} }, // 7 |
2745 | { "pstl2keep" , 0xA, {AArch64::FeatureSVE} }, // 8 |
2746 | { "pstl2strm" , 0xB, {AArch64::FeatureSVE} }, // 9 |
2747 | { "pstl3keep" , 0xC, {AArch64::FeatureSVE} }, // 10 |
2748 | { "pstl3strm" , 0xD, {AArch64::FeatureSVE} }, // 11 |
2749 | }; |
2750 | |
2751 | const SVEPRFM *lookupSVEPRFMByEncoding(uint8_t Encoding) { |
2752 | struct KeyType { |
2753 | uint8_t Encoding; |
2754 | }; |
2755 | KeyType Key = {Encoding}; |
2756 | struct Comp { |
2757 | bool operator()(const SVEPRFM &LHS, const KeyType &RHS) const { |
2758 | if (LHS.Encoding < RHS.Encoding) |
2759 | return true; |
2760 | if (LHS.Encoding > RHS.Encoding) |
2761 | return false; |
2762 | return false; |
2763 | } |
2764 | }; |
2765 | auto Table = ArrayRef(SVEPRFMsList); |
2766 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2767 | if (Idx == Table.end() || |
2768 | Key.Encoding != Idx->Encoding) |
2769 | return nullptr; |
2770 | |
2771 | return &*Idx; |
2772 | } |
2773 | |
2774 | const SVEPRFM *lookupSVEPRFMByName(StringRef Name) { |
2775 | struct IndexType { |
2776 | const char * Name; |
2777 | unsigned _index; |
2778 | }; |
2779 | static const struct IndexType Index[] = { |
2780 | { "PLDL1KEEP" , 0 }, |
2781 | { "PLDL1STRM" , 1 }, |
2782 | { "PLDL2KEEP" , 2 }, |
2783 | { "PLDL2STRM" , 3 }, |
2784 | { "PLDL3KEEP" , 4 }, |
2785 | { "PLDL3STRM" , 5 }, |
2786 | { "PSTL1KEEP" , 6 }, |
2787 | { "PSTL1STRM" , 7 }, |
2788 | { "PSTL2KEEP" , 8 }, |
2789 | { "PSTL2STRM" , 9 }, |
2790 | { "PSTL3KEEP" , 10 }, |
2791 | { "PSTL3STRM" , 11 }, |
2792 | }; |
2793 | |
2794 | struct KeyType { |
2795 | std::string Name; |
2796 | }; |
2797 | KeyType Key = {Name.upper()}; |
2798 | struct Comp { |
2799 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2800 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2801 | if (CmpName < 0) return true; |
2802 | if (CmpName > 0) return false; |
2803 | return false; |
2804 | } |
2805 | }; |
2806 | auto Table = ArrayRef(Index); |
2807 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2808 | if (Idx == Table.end() || |
2809 | Key.Name != Idx->Name) |
2810 | return nullptr; |
2811 | |
2812 | return &SVEPRFMsList[Idx->_index]; |
2813 | } |
2814 | #endif |
2815 | |
2816 | #ifdef GET_SVEVECLENSPECIFIERsList_DECL |
2817 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByEncoding(uint8_t Encoding); |
2818 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByName(StringRef Name); |
2819 | #endif |
2820 | |
2821 | #ifdef GET_SVEVECLENSPECIFIERsList_IMPL |
2822 | constexpr SVEVECLENSPECIFIER SVEVECLENSPECIFIERsList[] = { |
2823 | { "vlx2" , 0x0 }, // 0 |
2824 | { "vlx4" , 0x1 }, // 1 |
2825 | }; |
2826 | |
2827 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByEncoding(uint8_t Encoding) { |
2828 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x0, (uint8_t)0x1)) |
2829 | return nullptr; |
2830 | |
2831 | auto Table = ArrayRef(SVEVECLENSPECIFIERsList); |
2832 | size_t Idx = Encoding - 0x0; |
2833 | return &Table[Idx]; |
2834 | } |
2835 | |
2836 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByName(StringRef Name) { |
2837 | struct IndexType { |
2838 | const char * Name; |
2839 | unsigned _index; |
2840 | }; |
2841 | static const struct IndexType Index[] = { |
2842 | { "VLX2" , 0 }, |
2843 | { "VLX4" , 1 }, |
2844 | }; |
2845 | |
2846 | struct KeyType { |
2847 | std::string Name; |
2848 | }; |
2849 | KeyType Key = {Name.upper()}; |
2850 | struct Comp { |
2851 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2852 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2853 | if (CmpName < 0) return true; |
2854 | if (CmpName > 0) return false; |
2855 | return false; |
2856 | } |
2857 | }; |
2858 | auto Table = ArrayRef(Index); |
2859 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2860 | if (Idx == Table.end() || |
2861 | Key.Name != Idx->Name) |
2862 | return nullptr; |
2863 | |
2864 | return &SVEVECLENSPECIFIERsList[Idx->_index]; |
2865 | } |
2866 | #endif |
2867 | |
2868 | #ifdef GET_SysRegsList_DECL |
2869 | llvm::iterator_range<const SysReg *> lookupSysRegByEncoding(uint16_t Encoding); |
2870 | const SysReg *lookupSysRegByName(StringRef Name); |
2871 | #endif |
2872 | |
2873 | #ifdef GET_SysRegsList_IMPL |
2874 | constexpr SysReg SysRegsList[] = { |
2875 | { "OSDTRRX_EL1" , 0x8002, true, true, {} }, // 0 |
2876 | { "DBGBVR0_EL1" , 0x8004, true, true, {} }, // 1 |
2877 | { "DBGBCR0_EL1" , 0x8005, true, true, {} }, // 2 |
2878 | { "DBGWVR0_EL1" , 0x8006, true, true, {} }, // 3 |
2879 | { "DBGWCR0_EL1" , 0x8007, true, true, {} }, // 4 |
2880 | { "DBGBVR1_EL1" , 0x800C, true, true, {} }, // 5 |
2881 | { "DBGBCR1_EL1" , 0x800D, true, true, {} }, // 6 |
2882 | { "DBGWVR1_EL1" , 0x800E, true, true, {} }, // 7 |
2883 | { "DBGWCR1_EL1" , 0x800F, true, true, {} }, // 8 |
2884 | { "MDCCINT_EL1" , 0x8010, true, true, {} }, // 9 |
2885 | { "MDSCR_EL1" , 0x8012, true, true, {} }, // 10 |
2886 | { "DBGBVR2_EL1" , 0x8014, true, true, {} }, // 11 |
2887 | { "DBGBCR2_EL1" , 0x8015, true, true, {} }, // 12 |
2888 | { "DBGWVR2_EL1" , 0x8016, true, true, {} }, // 13 |
2889 | { "DBGWCR2_EL1" , 0x8017, true, true, {} }, // 14 |
2890 | { "OSDTRTX_EL1" , 0x801A, true, true, {} }, // 15 |
2891 | { "DBGBVR3_EL1" , 0x801C, true, true, {} }, // 16 |
2892 | { "DBGBCR3_EL1" , 0x801D, true, true, {} }, // 17 |
2893 | { "DBGWVR3_EL1" , 0x801E, true, true, {} }, // 18 |
2894 | { "DBGWCR3_EL1" , 0x801F, true, true, {} }, // 19 |
2895 | { "MDSELR_EL1" , 0x8022, true, true, {} }, // 20 |
2896 | { "DBGBVR4_EL1" , 0x8024, true, true, {} }, // 21 |
2897 | { "DBGBCR4_EL1" , 0x8025, true, true, {} }, // 22 |
2898 | { "DBGWVR4_EL1" , 0x8026, true, true, {} }, // 23 |
2899 | { "DBGWCR4_EL1" , 0x8027, true, true, {} }, // 24 |
2900 | { "MDSTEPOP_EL1" , 0x802A, true, true, {} }, // 25 |
2901 | { "DBGBVR5_EL1" , 0x802C, true, true, {} }, // 26 |
2902 | { "DBGBCR5_EL1" , 0x802D, true, true, {} }, // 27 |
2903 | { "DBGWVR5_EL1" , 0x802E, true, true, {} }, // 28 |
2904 | { "DBGWCR5_EL1" , 0x802F, true, true, {} }, // 29 |
2905 | { "OSECCR_EL1" , 0x8032, true, true, {} }, // 30 |
2906 | { "DBGBVR6_EL1" , 0x8034, true, true, {} }, // 31 |
2907 | { "DBGBCR6_EL1" , 0x8035, true, true, {} }, // 32 |
2908 | { "DBGWVR6_EL1" , 0x8036, true, true, {} }, // 33 |
2909 | { "DBGWCR6_EL1" , 0x8037, true, true, {} }, // 34 |
2910 | { "DBGBVR7_EL1" , 0x803C, true, true, {} }, // 35 |
2911 | { "DBGBCR7_EL1" , 0x803D, true, true, {} }, // 36 |
2912 | { "DBGWVR7_EL1" , 0x803E, true, true, {} }, // 37 |
2913 | { "DBGWCR7_EL1" , 0x803F, true, true, {} }, // 38 |
2914 | { "DBGBVR8_EL1" , 0x8044, true, true, {} }, // 39 |
2915 | { "DBGBCR8_EL1" , 0x8045, true, true, {} }, // 40 |
2916 | { "DBGWVR8_EL1" , 0x8046, true, true, {} }, // 41 |
2917 | { "DBGWCR8_EL1" , 0x8047, true, true, {} }, // 42 |
2918 | { "DBGBVR9_EL1" , 0x804C, true, true, {} }, // 43 |
2919 | { "DBGBCR9_EL1" , 0x804D, true, true, {} }, // 44 |
2920 | { "DBGWVR9_EL1" , 0x804E, true, true, {} }, // 45 |
2921 | { "DBGWCR9_EL1" , 0x804F, true, true, {} }, // 46 |
2922 | { "DBGBVR10_EL1" , 0x8054, true, true, {} }, // 47 |
2923 | { "DBGBCR10_EL1" , 0x8055, true, true, {} }, // 48 |
2924 | { "DBGWVR10_EL1" , 0x8056, true, true, {} }, // 49 |
2925 | { "DBGWCR10_EL1" , 0x8057, true, true, {} }, // 50 |
2926 | { "DBGBVR11_EL1" , 0x805C, true, true, {} }, // 51 |
2927 | { "DBGBCR11_EL1" , 0x805D, true, true, {} }, // 52 |
2928 | { "DBGWVR11_EL1" , 0x805E, true, true, {} }, // 53 |
2929 | { "DBGWCR11_EL1" , 0x805F, true, true, {} }, // 54 |
2930 | { "DBGBVR12_EL1" , 0x8064, true, true, {} }, // 55 |
2931 | { "DBGBCR12_EL1" , 0x8065, true, true, {} }, // 56 |
2932 | { "DBGWVR12_EL1" , 0x8066, true, true, {} }, // 57 |
2933 | { "DBGWCR12_EL1" , 0x8067, true, true, {} }, // 58 |
2934 | { "DBGBVR13_EL1" , 0x806C, true, true, {} }, // 59 |
2935 | { "DBGBCR13_EL1" , 0x806D, true, true, {} }, // 60 |
2936 | { "DBGWVR13_EL1" , 0x806E, true, true, {} }, // 61 |
2937 | { "DBGWCR13_EL1" , 0x806F, true, true, {} }, // 62 |
2938 | { "DBGBVR14_EL1" , 0x8074, true, true, {} }, // 63 |
2939 | { "DBGBCR14_EL1" , 0x8075, true, true, {} }, // 64 |
2940 | { "DBGWVR14_EL1" , 0x8076, true, true, {} }, // 65 |
2941 | { "DBGWCR14_EL1" , 0x8077, true, true, {} }, // 66 |
2942 | { "DBGBVR15_EL1" , 0x807C, true, true, {} }, // 67 |
2943 | { "DBGBCR15_EL1" , 0x807D, true, true, {} }, // 68 |
2944 | { "DBGWVR15_EL1" , 0x807E, true, true, {} }, // 69 |
2945 | { "DBGWCR15_EL1" , 0x807F, true, true, {} }, // 70 |
2946 | { "MDRAR_EL1" , 0x8080, true, false, {} }, // 71 |
2947 | { "OSLAR_EL1" , 0x8084, false, true, {} }, // 72 |
2948 | { "OSLSR_EL1" , 0x808C, true, false, {} }, // 73 |
2949 | { "OSDLR_EL1" , 0x809C, true, true, {} }, // 74 |
2950 | { "DBGPRCR_EL1" , 0x80A4, true, true, {} }, // 75 |
2951 | { "DBGCLAIMSET_EL1" , 0x83C6, true, true, {} }, // 76 |
2952 | { "DBGCLAIMCLR_EL1" , 0x83CE, true, true, {} }, // 77 |
2953 | { "DBGAUTHSTATUS_EL1" , 0x83F6, true, false, {} }, // 78 |
2954 | { "SPMCGCR0_EL1" , 0x84E8, true, false, {} }, // 79 |
2955 | { "SPMCGCR1_EL1" , 0x84E9, true, false, {} }, // 80 |
2956 | { "SPMACCESSR_EL1" , 0x84EB, true, true, {} }, // 81 |
2957 | { "SPMIIDR_EL1" , 0x84EC, true, false, {} }, // 82 |
2958 | { "SPMDEVARCH_EL1" , 0x84ED, true, false, {} }, // 83 |
2959 | { "SPMDEVAFF_EL1" , 0x84EE, true, false, {} }, // 84 |
2960 | { "SPMCFGR_EL1" , 0x84EF, true, false, {} }, // 85 |
2961 | { "SPMINTENSET_EL1" , 0x84F1, true, true, {} }, // 86 |
2962 | { "SPMINTENCLR_EL1" , 0x84F2, true, true, {} }, // 87 |
2963 | { "PMEVCNTSVR0_EL1" , 0x8740, true, false, {} }, // 88 |
2964 | { "PMEVCNTSVR1_EL1" , 0x8741, true, false, {} }, // 89 |
2965 | { "PMEVCNTSVR2_EL1" , 0x8742, true, false, {} }, // 90 |
2966 | { "PMEVCNTSVR3_EL1" , 0x8743, true, false, {} }, // 91 |
2967 | { "PMEVCNTSVR4_EL1" , 0x8744, true, false, {} }, // 92 |
2968 | { "PMEVCNTSVR5_EL1" , 0x8745, true, false, {} }, // 93 |
2969 | { "PMEVCNTSVR6_EL1" , 0x8746, true, false, {} }, // 94 |
2970 | { "PMEVCNTSVR7_EL1" , 0x8747, true, false, {} }, // 95 |
2971 | { "PMEVCNTSVR8_EL1" , 0x8748, true, false, {} }, // 96 |
2972 | { "PMEVCNTSVR9_EL1" , 0x8749, true, false, {} }, // 97 |
2973 | { "PMEVCNTSVR10_EL1" , 0x874A, true, false, {} }, // 98 |
2974 | { "PMEVCNTSVR11_EL1" , 0x874B, true, false, {} }, // 99 |
2975 | { "PMEVCNTSVR12_EL1" , 0x874C, true, false, {} }, // 100 |
2976 | { "PMEVCNTSVR13_EL1" , 0x874D, true, false, {} }, // 101 |
2977 | { "PMEVCNTSVR14_EL1" , 0x874E, true, false, {} }, // 102 |
2978 | { "PMEVCNTSVR15_EL1" , 0x874F, true, false, {} }, // 103 |
2979 | { "PMEVCNTSVR16_EL1" , 0x8750, true, false, {} }, // 104 |
2980 | { "PMEVCNTSVR17_EL1" , 0x8751, true, false, {} }, // 105 |
2981 | { "PMEVCNTSVR18_EL1" , 0x8752, true, false, {} }, // 106 |
2982 | { "PMEVCNTSVR19_EL1" , 0x8753, true, false, {} }, // 107 |
2983 | { "PMEVCNTSVR20_EL1" , 0x8754, true, false, {} }, // 108 |
2984 | { "PMEVCNTSVR21_EL1" , 0x8755, true, false, {} }, // 109 |
2985 | { "PMEVCNTSVR22_EL1" , 0x8756, true, false, {} }, // 110 |
2986 | { "PMEVCNTSVR23_EL1" , 0x8757, true, false, {} }, // 111 |
2987 | { "PMEVCNTSVR24_EL1" , 0x8758, true, false, {} }, // 112 |
2988 | { "PMEVCNTSVR25_EL1" , 0x8759, true, false, {} }, // 113 |
2989 | { "PMEVCNTSVR26_EL1" , 0x875A, true, false, {} }, // 114 |
2990 | { "PMEVCNTSVR27_EL1" , 0x875B, true, false, {} }, // 115 |
2991 | { "PMEVCNTSVR28_EL1" , 0x875C, true, false, {} }, // 116 |
2992 | { "PMEVCNTSVR29_EL1" , 0x875D, true, false, {} }, // 117 |
2993 | { "PMEVCNTSVR30_EL1" , 0x875E, true, false, {} }, // 118 |
2994 | { "PMCCNTSVR_EL1" , 0x875F, true, false, {} }, // 119 |
2995 | { "PMICNTSVR_EL1" , 0x8760, true, false, {} }, // 120 |
2996 | { "TRCTRACEIDR" , 0x8801, true, true, {} }, // 121 |
2997 | { "TRCVICTLR" , 0x8802, true, true, {} }, // 122 |
2998 | { "TRCSEQEVR0" , 0x8804, true, true, {} }, // 123 |
2999 | { "TRCCNTRLDVR0" , 0x8805, true, true, {} }, // 124 |
3000 | { "TRCIDR8" , 0x8806, true, false, {} }, // 125 |
3001 | { "TRCIMSPEC0" , 0x8807, true, true, {} }, // 126 |
3002 | { "TRCPRGCTLR" , 0x8808, true, true, {} }, // 127 |
3003 | { "TRCQCTLR" , 0x8809, true, true, {} }, // 128 |
3004 | { "TRCVIIECTLR" , 0x880A, true, true, {} }, // 129 |
3005 | { "TRCSEQEVR1" , 0x880C, true, true, {} }, // 130 |
3006 | { "TRCCNTRLDVR1" , 0x880D, true, true, {} }, // 131 |
3007 | { "TRCIDR9" , 0x880E, true, false, {} }, // 132 |
3008 | { "TRCIMSPEC1" , 0x880F, true, true, {} }, // 133 |
3009 | { "TRCPROCSELR" , 0x8810, true, true, {} }, // 134 |
3010 | { "TRCITEEDCR" , 0x8811, true, true, {AArch64::FeatureITE} }, // 135 |
3011 | { "TRCVISSCTLR" , 0x8812, true, true, {} }, // 136 |
3012 | { "TRCSEQEVR2" , 0x8814, true, true, {} }, // 137 |
3013 | { "TRCCNTRLDVR2" , 0x8815, true, true, {} }, // 138 |
3014 | { "TRCIDR10" , 0x8816, true, false, {} }, // 139 |
3015 | { "TRCIMSPEC2" , 0x8817, true, true, {} }, // 140 |
3016 | { "TRCSTATR" , 0x8818, true, false, {} }, // 141 |
3017 | { "TRCVIPCSSCTLR" , 0x881A, true, true, {} }, // 142 |
3018 | { "TRCCNTRLDVR3" , 0x881D, true, true, {} }, // 143 |
3019 | { "TRCIDR11" , 0x881E, true, false, {} }, // 144 |
3020 | { "TRCIMSPEC3" , 0x881F, true, true, {} }, // 145 |
3021 | { "TRCCONFIGR" , 0x8820, true, true, {} }, // 146 |
3022 | { "TRCCNTCTLR0" , 0x8825, true, true, {} }, // 147 |
3023 | { "TRCIDR12" , 0x8826, true, false, {} }, // 148 |
3024 | { "TRCIMSPEC4" , 0x8827, true, true, {} }, // 149 |
3025 | { "TRCCNTCTLR1" , 0x882D, true, true, {} }, // 150 |
3026 | { "TRCIDR13" , 0x882E, true, false, {} }, // 151 |
3027 | { "TRCIMSPEC5" , 0x882F, true, true, {} }, // 152 |
3028 | { "TRCAUXCTLR" , 0x8830, true, true, {} }, // 153 |
3029 | { "TRCSEQRSTEVR" , 0x8834, true, true, {} }, // 154 |
3030 | { "TRCCNTCTLR2" , 0x8835, true, true, {} }, // 155 |
3031 | { "TRCIMSPEC6" , 0x8837, true, true, {} }, // 156 |
3032 | { "TRCSEQSTR" , 0x883C, true, true, {} }, // 157 |
3033 | { "TRCCNTCTLR3" , 0x883D, true, true, {} }, // 158 |
3034 | { "TRCIMSPEC7" , 0x883F, true, true, {} }, // 159 |
3035 | { "TRCEVENTCTL0R" , 0x8840, true, true, {} }, // 160 |
3036 | { "TRCVDCTLR" , 0x8842, true, true, {} }, // 161 |
3037 | { "TRCEXTINSELR" , 0x8844, true, true, {} }, // 162 |
3038 | { "TRCEXTINSELR0" , 0x8844, true, true, {AArch64::FeatureETE} }, // 163 |
3039 | { "TRCCNTVR0" , 0x8845, true, true, {} }, // 164 |
3040 | { "TRCIDR0" , 0x8847, true, false, {} }, // 165 |
3041 | { "TRCEVENTCTL1R" , 0x8848, true, true, {} }, // 166 |
3042 | { "TRCVDSACCTLR" , 0x884A, true, true, {} }, // 167 |
3043 | { "TRCEXTINSELR1" , 0x884C, true, true, {AArch64::FeatureETE} }, // 168 |
3044 | { "TRCCNTVR1" , 0x884D, true, true, {} }, // 169 |
3045 | { "TRCIDR1" , 0x884F, true, false, {} }, // 170 |
3046 | { "TRCRSR" , 0x8850, true, true, {AArch64::FeatureETE} }, // 171 |
3047 | { "TRCVDARCCTLR" , 0x8852, true, true, {} }, // 172 |
3048 | { "TRCEXTINSELR2" , 0x8854, true, true, {AArch64::FeatureETE} }, // 173 |
3049 | { "TRCCNTVR2" , 0x8855, true, true, {} }, // 174 |
3050 | { "TRCIDR2" , 0x8857, true, false, {} }, // 175 |
3051 | { "TRCSTALLCTLR" , 0x8858, true, true, {} }, // 176 |
3052 | { "TRCEXTINSELR3" , 0x885C, true, true, {AArch64::FeatureETE} }, // 177 |
3053 | { "TRCCNTVR3" , 0x885D, true, true, {} }, // 178 |
3054 | { "TRCIDR3" , 0x885F, true, false, {} }, // 179 |
3055 | { "TRCTSCTLR" , 0x8860, true, true, {} }, // 180 |
3056 | { "TRCIDR4" , 0x8867, true, false, {} }, // 181 |
3057 | { "TRCSYNCPR" , 0x8868, true, true, {} }, // 182 |
3058 | { "TRCIDR5" , 0x886F, true, false, {} }, // 183 |
3059 | { "TRCCCCTLR" , 0x8870, true, true, {} }, // 184 |
3060 | { "TRCIDR6" , 0x8877, true, false, {} }, // 185 |
3061 | { "TRCBBCTLR" , 0x8878, true, true, {} }, // 186 |
3062 | { "TRCIDR7" , 0x887F, true, false, {} }, // 187 |
3063 | { "TRCRSCTLR16" , 0x8881, true, true, {} }, // 188 |
3064 | { "TRCSSCCR0" , 0x8882, true, true, {} }, // 189 |
3065 | { "TRCSSPCICR0" , 0x8883, true, true, {} }, // 190 |
3066 | { "TRCOSLAR" , 0x8884, false, true, {} }, // 191 |
3067 | { "TRCRSCTLR17" , 0x8889, true, true, {} }, // 192 |
3068 | { "TRCSSCCR1" , 0x888A, true, true, {} }, // 193 |
3069 | { "TRCSSPCICR1" , 0x888B, true, true, {} }, // 194 |
3070 | { "TRCOSLSR" , 0x888C, true, false, {} }, // 195 |
3071 | { "TRCRSCTLR2" , 0x8890, true, true, {} }, // 196 |
3072 | { "TRCRSCTLR18" , 0x8891, true, true, {} }, // 197 |
3073 | { "TRCSSCCR2" , 0x8892, true, true, {} }, // 198 |
3074 | { "TRCSSPCICR2" , 0x8893, true, true, {} }, // 199 |
3075 | { "TRCRSCTLR3" , 0x8898, true, true, {} }, // 200 |
3076 | { "TRCRSCTLR19" , 0x8899, true, true, {} }, // 201 |
3077 | { "TRCSSCCR3" , 0x889A, true, true, {} }, // 202 |
3078 | { "TRCSSPCICR3" , 0x889B, true, true, {} }, // 203 |
3079 | { "TRCRSCTLR4" , 0x88A0, true, true, {} }, // 204 |
3080 | { "TRCRSCTLR20" , 0x88A1, true, true, {} }, // 205 |
3081 | { "TRCSSCCR4" , 0x88A2, true, true, {} }, // 206 |
3082 | { "TRCSSPCICR4" , 0x88A3, true, true, {} }, // 207 |
3083 | { "TRCPDCR" , 0x88A4, true, true, {} }, // 208 |
3084 | { "TRCRSCTLR5" , 0x88A8, true, true, {} }, // 209 |
3085 | { "TRCRSCTLR21" , 0x88A9, true, true, {} }, // 210 |
3086 | { "TRCSSCCR5" , 0x88AA, true, true, {} }, // 211 |
3087 | { "TRCSSPCICR5" , 0x88AB, true, true, {} }, // 212 |
3088 | { "TRCPDSR" , 0x88AC, true, false, {} }, // 213 |
3089 | { "TRCRSCTLR6" , 0x88B0, true, true, {} }, // 214 |
3090 | { "TRCRSCTLR22" , 0x88B1, true, true, {} }, // 215 |
3091 | { "TRCSSCCR6" , 0x88B2, true, true, {} }, // 216 |
3092 | { "TRCSSPCICR6" , 0x88B3, true, true, {} }, // 217 |
3093 | { "TRCRSCTLR7" , 0x88B8, true, true, {} }, // 218 |
3094 | { "TRCRSCTLR23" , 0x88B9, true, true, {} }, // 219 |
3095 | { "TRCSSCCR7" , 0x88BA, true, true, {} }, // 220 |
3096 | { "TRCSSPCICR7" , 0x88BB, true, true, {} }, // 221 |
3097 | { "TRCRSCTLR8" , 0x88C0, true, true, {} }, // 222 |
3098 | { "TRCRSCTLR24" , 0x88C1, true, true, {} }, // 223 |
3099 | { "TRCSSCSR0" , 0x88C2, true, true, {} }, // 224 |
3100 | { "TRCRSCTLR9" , 0x88C8, true, true, {} }, // 225 |
3101 | { "TRCRSCTLR25" , 0x88C9, true, true, {} }, // 226 |
3102 | { "TRCSSCSR1" , 0x88CA, true, true, {} }, // 227 |
3103 | { "TRCRSCTLR10" , 0x88D0, true, true, {} }, // 228 |
3104 | { "TRCRSCTLR26" , 0x88D1, true, true, {} }, // 229 |
3105 | { "TRCSSCSR2" , 0x88D2, true, true, {} }, // 230 |
3106 | { "TRCRSCTLR11" , 0x88D8, true, true, {} }, // 231 |
3107 | { "TRCRSCTLR27" , 0x88D9, true, true, {} }, // 232 |
3108 | { "TRCSSCSR3" , 0x88DA, true, true, {} }, // 233 |
3109 | { "TRCRSCTLR12" , 0x88E0, true, true, {} }, // 234 |
3110 | { "TRCRSCTLR28" , 0x88E1, true, true, {} }, // 235 |
3111 | { "TRCSSCSR4" , 0x88E2, true, true, {} }, // 236 |
3112 | { "TRCRSCTLR13" , 0x88E8, true, true, {} }, // 237 |
3113 | { "TRCRSCTLR29" , 0x88E9, true, true, {} }, // 238 |
3114 | { "TRCSSCSR5" , 0x88EA, true, true, {} }, // 239 |
3115 | { "TRCRSCTLR14" , 0x88F0, true, true, {} }, // 240 |
3116 | { "TRCRSCTLR30" , 0x88F1, true, true, {} }, // 241 |
3117 | { "TRCSSCSR6" , 0x88F2, true, true, {} }, // 242 |
3118 | { "TRCRSCTLR15" , 0x88F8, true, true, {} }, // 243 |
3119 | { "TRCRSCTLR31" , 0x88F9, true, true, {} }, // 244 |
3120 | { "TRCSSCSR7" , 0x88FA, true, true, {} }, // 245 |
3121 | { "TRCACVR0" , 0x8900, true, true, {} }, // 246 |
3122 | { "TRCACVR8" , 0x8901, true, true, {} }, // 247 |
3123 | { "TRCACATR0" , 0x8902, true, true, {} }, // 248 |
3124 | { "TRCACATR8" , 0x8903, true, true, {} }, // 249 |
3125 | { "TRCDVCVR0" , 0x8904, true, true, {} }, // 250 |
3126 | { "TRCDVCVR4" , 0x8905, true, true, {} }, // 251 |
3127 | { "TRCDVCMR0" , 0x8906, true, true, {} }, // 252 |
3128 | { "TRCDVCMR4" , 0x8907, true, true, {} }, // 253 |
3129 | { "TRCACVR1" , 0x8910, true, true, {} }, // 254 |
3130 | { "TRCACVR9" , 0x8911, true, true, {} }, // 255 |
3131 | { "TRCACATR1" , 0x8912, true, true, {} }, // 256 |
3132 | { "TRCACATR9" , 0x8913, true, true, {} }, // 257 |
3133 | { "TRCACVR2" , 0x8920, true, true, {} }, // 258 |
3134 | { "TRCACVR10" , 0x8921, true, true, {} }, // 259 |
3135 | { "TRCACATR2" , 0x8922, true, true, {} }, // 260 |
3136 | { "TRCACATR10" , 0x8923, true, true, {} }, // 261 |
3137 | { "TRCDVCVR1" , 0x8924, true, true, {} }, // 262 |
3138 | { "TRCDVCVR5" , 0x8925, true, true, {} }, // 263 |
3139 | { "TRCDVCMR1" , 0x8926, true, true, {} }, // 264 |
3140 | { "TRCDVCMR5" , 0x8927, true, true, {} }, // 265 |
3141 | { "TRCACVR3" , 0x8930, true, true, {} }, // 266 |
3142 | { "TRCACVR11" , 0x8931, true, true, {} }, // 267 |
3143 | { "TRCACATR3" , 0x8932, true, true, {} }, // 268 |
3144 | { "TRCACATR11" , 0x8933, true, true, {} }, // 269 |
3145 | { "TRCACVR4" , 0x8940, true, true, {} }, // 270 |
3146 | { "TRCACVR12" , 0x8941, true, true, {} }, // 271 |
3147 | { "TRCACATR4" , 0x8942, true, true, {} }, // 272 |
3148 | { "TRCACATR12" , 0x8943, true, true, {} }, // 273 |
3149 | { "TRCDVCVR2" , 0x8944, true, true, {} }, // 274 |
3150 | { "TRCDVCVR6" , 0x8945, true, true, {} }, // 275 |
3151 | { "TRCDVCMR2" , 0x8946, true, true, {} }, // 276 |
3152 | { "TRCDVCMR6" , 0x8947, true, true, {} }, // 277 |
3153 | { "TRCACVR5" , 0x8950, true, true, {} }, // 278 |
3154 | { "TRCACVR13" , 0x8951, true, true, {} }, // 279 |
3155 | { "TRCACATR5" , 0x8952, true, true, {} }, // 280 |
3156 | { "TRCACATR13" , 0x8953, true, true, {} }, // 281 |
3157 | { "TRCACVR6" , 0x8960, true, true, {} }, // 282 |
3158 | { "TRCACVR14" , 0x8961, true, true, {} }, // 283 |
3159 | { "TRCACATR6" , 0x8962, true, true, {} }, // 284 |
3160 | { "TRCACATR14" , 0x8963, true, true, {} }, // 285 |
3161 | { "TRCDVCVR3" , 0x8964, true, true, {} }, // 286 |
3162 | { "TRCDVCVR7" , 0x8965, true, true, {} }, // 287 |
3163 | { "TRCDVCMR3" , 0x8966, true, true, {} }, // 288 |
3164 | { "TRCDVCMR7" , 0x8967, true, true, {} }, // 289 |
3165 | { "TRCACVR7" , 0x8970, true, true, {} }, // 290 |
3166 | { "TRCACVR15" , 0x8971, true, true, {} }, // 291 |
3167 | { "TRCACATR7" , 0x8972, true, true, {} }, // 292 |
3168 | { "TRCACATR15" , 0x8973, true, true, {} }, // 293 |
3169 | { "TRCCIDCVR0" , 0x8980, true, true, {} }, // 294 |
3170 | { "TRCVMIDCVR0" , 0x8981, true, true, {} }, // 295 |
3171 | { "TRCCIDCCTLR0" , 0x8982, true, true, {} }, // 296 |
3172 | { "TRCCIDCCTLR1" , 0x898A, true, true, {} }, // 297 |
3173 | { "TRCCIDCVR1" , 0x8990, true, true, {} }, // 298 |
3174 | { "TRCVMIDCVR1" , 0x8991, true, true, {} }, // 299 |
3175 | { "TRCVMIDCCTLR0" , 0x8992, true, true, {} }, // 300 |
3176 | { "TRCVMIDCCTLR1" , 0x899A, true, true, {} }, // 301 |
3177 | { "TRCCIDCVR2" , 0x89A0, true, true, {} }, // 302 |
3178 | { "TRCVMIDCVR2" , 0x89A1, true, true, {} }, // 303 |
3179 | { "TRCCIDCVR3" , 0x89B0, true, true, {} }, // 304 |
3180 | { "TRCVMIDCVR3" , 0x89B1, true, true, {} }, // 305 |
3181 | { "TRCCIDCVR4" , 0x89C0, true, true, {} }, // 306 |
3182 | { "TRCVMIDCVR4" , 0x89C1, true, true, {} }, // 307 |
3183 | { "TRCCIDCVR5" , 0x89D0, true, true, {} }, // 308 |
3184 | { "TRCVMIDCVR5" , 0x89D1, true, true, {} }, // 309 |
3185 | { "TRCCIDCVR6" , 0x89E0, true, true, {} }, // 310 |
3186 | { "TRCVMIDCVR6" , 0x89E1, true, true, {} }, // 311 |
3187 | { "TRCCIDCVR7" , 0x89F0, true, true, {} }, // 312 |
3188 | { "TRCVMIDCVR7" , 0x89F1, true, true, {} }, // 313 |
3189 | { "TRCITCTRL" , 0x8B84, true, true, {} }, // 314 |
3190 | { "TRCDEVID" , 0x8B97, true, false, {} }, // 315 |
3191 | { "TRCDEVTYPE" , 0x8B9F, true, false, {} }, // 316 |
3192 | { "TRCPIDR4" , 0x8BA7, true, false, {} }, // 317 |
3193 | { "TRCPIDR5" , 0x8BAF, true, false, {} }, // 318 |
3194 | { "TRCPIDR6" , 0x8BB7, true, false, {} }, // 319 |
3195 | { "TRCPIDR7" , 0x8BBF, true, false, {} }, // 320 |
3196 | { "TRCCLAIMSET" , 0x8BC6, true, true, {} }, // 321 |
3197 | { "TRCPIDR0" , 0x8BC7, true, false, {} }, // 322 |
3198 | { "TRCCLAIMCLR" , 0x8BCE, true, true, {} }, // 323 |
3199 | { "TRCPIDR1" , 0x8BCF, true, false, {} }, // 324 |
3200 | { "TRCDEVAFF0" , 0x8BD6, true, false, {} }, // 325 |
3201 | { "TRCPIDR2" , 0x8BD7, true, false, {} }, // 326 |
3202 | { "TRCDEVAFF1" , 0x8BDE, true, false, {} }, // 327 |
3203 | { "TRCPIDR3" , 0x8BDF, true, false, {} }, // 328 |
3204 | { "TRCLAR" , 0x8BE6, false, true, {} }, // 329 |
3205 | { "TRCCIDR0" , 0x8BE7, true, false, {} }, // 330 |
3206 | { "TRCLSR" , 0x8BEE, true, false, {} }, // 331 |
3207 | { "TRCCIDR1" , 0x8BEF, true, false, {} }, // 332 |
3208 | { "TRCAUTHSTATUS" , 0x8BF6, true, false, {} }, // 333 |
3209 | { "TRCCIDR2" , 0x8BF7, true, false, {} }, // 334 |
3210 | { "TRCDEVARCH" , 0x8BFE, true, false, {} }, // 335 |
3211 | { "TRCCIDR3" , 0x8BFF, true, false, {} }, // 336 |
3212 | { "BRBINF0_EL1" , 0x8C00, true, false, {AArch64::FeatureBRBE} }, // 337 |
3213 | { "BRBSRC0_EL1" , 0x8C01, true, false, {AArch64::FeatureBRBE} }, // 338 |
3214 | { "BRBTGT0_EL1" , 0x8C02, true, false, {AArch64::FeatureBRBE} }, // 339 |
3215 | { "BRBINF16_EL1" , 0x8C04, true, false, {AArch64::FeatureBRBE} }, // 340 |
3216 | { "BRBSRC16_EL1" , 0x8C05, true, false, {AArch64::FeatureBRBE} }, // 341 |
3217 | { "BRBTGT16_EL1" , 0x8C06, true, false, {AArch64::FeatureBRBE} }, // 342 |
3218 | { "BRBINF1_EL1" , 0x8C08, true, false, {AArch64::FeatureBRBE} }, // 343 |
3219 | { "BRBSRC1_EL1" , 0x8C09, true, false, {AArch64::FeatureBRBE} }, // 344 |
3220 | { "BRBTGT1_EL1" , 0x8C0A, true, false, {AArch64::FeatureBRBE} }, // 345 |
3221 | { "BRBINF17_EL1" , 0x8C0C, true, false, {AArch64::FeatureBRBE} }, // 346 |
3222 | { "BRBSRC17_EL1" , 0x8C0D, true, false, {AArch64::FeatureBRBE} }, // 347 |
3223 | { "BRBTGT17_EL1" , 0x8C0E, true, false, {AArch64::FeatureBRBE} }, // 348 |
3224 | { "BRBINF2_EL1" , 0x8C10, true, false, {AArch64::FeatureBRBE} }, // 349 |
3225 | { "BRBSRC2_EL1" , 0x8C11, true, false, {AArch64::FeatureBRBE} }, // 350 |
3226 | { "BRBTGT2_EL1" , 0x8C12, true, false, {AArch64::FeatureBRBE} }, // 351 |
3227 | { "BRBINF18_EL1" , 0x8C14, true, false, {AArch64::FeatureBRBE} }, // 352 |
3228 | { "BRBSRC18_EL1" , 0x8C15, true, false, {AArch64::FeatureBRBE} }, // 353 |
3229 | { "BRBTGT18_EL1" , 0x8C16, true, false, {AArch64::FeatureBRBE} }, // 354 |
3230 | { "BRBINF3_EL1" , 0x8C18, true, false, {AArch64::FeatureBRBE} }, // 355 |
3231 | { "BRBSRC3_EL1" , 0x8C19, true, false, {AArch64::FeatureBRBE} }, // 356 |
3232 | { "BRBTGT3_EL1" , 0x8C1A, true, false, {AArch64::FeatureBRBE} }, // 357 |
3233 | { "BRBINF19_EL1" , 0x8C1C, true, false, {AArch64::FeatureBRBE} }, // 358 |
3234 | { "BRBSRC19_EL1" , 0x8C1D, true, false, {AArch64::FeatureBRBE} }, // 359 |
3235 | { "BRBTGT19_EL1" , 0x8C1E, true, false, {AArch64::FeatureBRBE} }, // 360 |
3236 | { "BRBINF4_EL1" , 0x8C20, true, false, {AArch64::FeatureBRBE} }, // 361 |
3237 | { "BRBSRC4_EL1" , 0x8C21, true, false, {AArch64::FeatureBRBE} }, // 362 |
3238 | { "BRBTGT4_EL1" , 0x8C22, true, false, {AArch64::FeatureBRBE} }, // 363 |
3239 | { "BRBINF20_EL1" , 0x8C24, true, false, {AArch64::FeatureBRBE} }, // 364 |
3240 | { "BRBSRC20_EL1" , 0x8C25, true, false, {AArch64::FeatureBRBE} }, // 365 |
3241 | { "BRBTGT20_EL1" , 0x8C26, true, false, {AArch64::FeatureBRBE} }, // 366 |
3242 | { "BRBINF5_EL1" , 0x8C28, true, false, {AArch64::FeatureBRBE} }, // 367 |
3243 | { "BRBSRC5_EL1" , 0x8C29, true, false, {AArch64::FeatureBRBE} }, // 368 |
3244 | { "BRBTGT5_EL1" , 0x8C2A, true, false, {AArch64::FeatureBRBE} }, // 369 |
3245 | { "BRBINF21_EL1" , 0x8C2C, true, false, {AArch64::FeatureBRBE} }, // 370 |
3246 | { "BRBSRC21_EL1" , 0x8C2D, true, false, {AArch64::FeatureBRBE} }, // 371 |
3247 | { "BRBTGT21_EL1" , 0x8C2E, true, false, {AArch64::FeatureBRBE} }, // 372 |
3248 | { "BRBINF6_EL1" , 0x8C30, true, false, {AArch64::FeatureBRBE} }, // 373 |
3249 | { "BRBSRC6_EL1" , 0x8C31, true, false, {AArch64::FeatureBRBE} }, // 374 |
3250 | { "BRBTGT6_EL1" , 0x8C32, true, false, {AArch64::FeatureBRBE} }, // 375 |
3251 | { "BRBINF22_EL1" , 0x8C34, true, false, {AArch64::FeatureBRBE} }, // 376 |
3252 | { "BRBSRC22_EL1" , 0x8C35, true, false, {AArch64::FeatureBRBE} }, // 377 |
3253 | { "BRBTGT22_EL1" , 0x8C36, true, false, {AArch64::FeatureBRBE} }, // 378 |
3254 | { "BRBINF7_EL1" , 0x8C38, true, false, {AArch64::FeatureBRBE} }, // 379 |
3255 | { "BRBSRC7_EL1" , 0x8C39, true, false, {AArch64::FeatureBRBE} }, // 380 |
3256 | { "BRBTGT7_EL1" , 0x8C3A, true, false, {AArch64::FeatureBRBE} }, // 381 |
3257 | { "BRBINF23_EL1" , 0x8C3C, true, false, {AArch64::FeatureBRBE} }, // 382 |
3258 | { "BRBSRC23_EL1" , 0x8C3D, true, false, {AArch64::FeatureBRBE} }, // 383 |
3259 | { "BRBTGT23_EL1" , 0x8C3E, true, false, {AArch64::FeatureBRBE} }, // 384 |
3260 | { "BRBINF8_EL1" , 0x8C40, true, false, {AArch64::FeatureBRBE} }, // 385 |
3261 | { "BRBSRC8_EL1" , 0x8C41, true, false, {AArch64::FeatureBRBE} }, // 386 |
3262 | { "BRBTGT8_EL1" , 0x8C42, true, false, {AArch64::FeatureBRBE} }, // 387 |
3263 | { "BRBINF24_EL1" , 0x8C44, true, false, {AArch64::FeatureBRBE} }, // 388 |
3264 | { "BRBSRC24_EL1" , 0x8C45, true, false, {AArch64::FeatureBRBE} }, // 389 |
3265 | { "BRBTGT24_EL1" , 0x8C46, true, false, {AArch64::FeatureBRBE} }, // 390 |
3266 | { "BRBINF9_EL1" , 0x8C48, true, false, {AArch64::FeatureBRBE} }, // 391 |
3267 | { "BRBSRC9_EL1" , 0x8C49, true, false, {AArch64::FeatureBRBE} }, // 392 |
3268 | { "BRBTGT9_EL1" , 0x8C4A, true, false, {AArch64::FeatureBRBE} }, // 393 |
3269 | { "BRBINF25_EL1" , 0x8C4C, true, false, {AArch64::FeatureBRBE} }, // 394 |
3270 | { "BRBSRC25_EL1" , 0x8C4D, true, false, {AArch64::FeatureBRBE} }, // 395 |
3271 | { "BRBTGT25_EL1" , 0x8C4E, true, false, {AArch64::FeatureBRBE} }, // 396 |
3272 | { "BRBINF10_EL1" , 0x8C50, true, false, {AArch64::FeatureBRBE} }, // 397 |
3273 | { "BRBSRC10_EL1" , 0x8C51, true, false, {AArch64::FeatureBRBE} }, // 398 |
3274 | { "BRBTGT10_EL1" , 0x8C52, true, false, {AArch64::FeatureBRBE} }, // 399 |
3275 | { "BRBINF26_EL1" , 0x8C54, true, false, {AArch64::FeatureBRBE} }, // 400 |
3276 | { "BRBSRC26_EL1" , 0x8C55, true, false, {AArch64::FeatureBRBE} }, // 401 |
3277 | { "BRBTGT26_EL1" , 0x8C56, true, false, {AArch64::FeatureBRBE} }, // 402 |
3278 | { "BRBINF11_EL1" , 0x8C58, true, false, {AArch64::FeatureBRBE} }, // 403 |
3279 | { "BRBSRC11_EL1" , 0x8C59, true, false, {AArch64::FeatureBRBE} }, // 404 |
3280 | { "BRBTGT11_EL1" , 0x8C5A, true, false, {AArch64::FeatureBRBE} }, // 405 |
3281 | { "BRBINF27_EL1" , 0x8C5C, true, false, {AArch64::FeatureBRBE} }, // 406 |
3282 | { "BRBSRC27_EL1" , 0x8C5D, true, false, {AArch64::FeatureBRBE} }, // 407 |
3283 | { "BRBTGT27_EL1" , 0x8C5E, true, false, {AArch64::FeatureBRBE} }, // 408 |
3284 | { "BRBINF12_EL1" , 0x8C60, true, false, {AArch64::FeatureBRBE} }, // 409 |
3285 | { "BRBSRC12_EL1" , 0x8C61, true, false, {AArch64::FeatureBRBE} }, // 410 |
3286 | { "BRBTGT12_EL1" , 0x8C62, true, false, {AArch64::FeatureBRBE} }, // 411 |
3287 | { "BRBINF28_EL1" , 0x8C64, true, false, {AArch64::FeatureBRBE} }, // 412 |
3288 | { "BRBSRC28_EL1" , 0x8C65, true, false, {AArch64::FeatureBRBE} }, // 413 |
3289 | { "BRBTGT28_EL1" , 0x8C66, true, false, {AArch64::FeatureBRBE} }, // 414 |
3290 | { "BRBINF13_EL1" , 0x8C68, true, false, {AArch64::FeatureBRBE} }, // 415 |
3291 | { "BRBSRC13_EL1" , 0x8C69, true, false, {AArch64::FeatureBRBE} }, // 416 |
3292 | { "BRBTGT13_EL1" , 0x8C6A, true, false, {AArch64::FeatureBRBE} }, // 417 |
3293 | { "BRBINF29_EL1" , 0x8C6C, true, false, {AArch64::FeatureBRBE} }, // 418 |
3294 | { "BRBSRC29_EL1" , 0x8C6D, true, false, {AArch64::FeatureBRBE} }, // 419 |
3295 | { "BRBTGT29_EL1" , 0x8C6E, true, false, {AArch64::FeatureBRBE} }, // 420 |
3296 | { "BRBINF14_EL1" , 0x8C70, true, false, {AArch64::FeatureBRBE} }, // 421 |
3297 | { "BRBSRC14_EL1" , 0x8C71, true, false, {AArch64::FeatureBRBE} }, // 422 |
3298 | { "BRBTGT14_EL1" , 0x8C72, true, false, {AArch64::FeatureBRBE} }, // 423 |
3299 | { "BRBINF30_EL1" , 0x8C74, true, false, {AArch64::FeatureBRBE} }, // 424 |
3300 | { "BRBSRC30_EL1" , 0x8C75, true, false, {AArch64::FeatureBRBE} }, // 425 |
3301 | { "BRBTGT30_EL1" , 0x8C76, true, false, {AArch64::FeatureBRBE} }, // 426 |
3302 | { "BRBINF15_EL1" , 0x8C78, true, false, {AArch64::FeatureBRBE} }, // 427 |
3303 | { "BRBSRC15_EL1" , 0x8C79, true, false, {AArch64::FeatureBRBE} }, // 428 |
3304 | { "BRBTGT15_EL1" , 0x8C7A, true, false, {AArch64::FeatureBRBE} }, // 429 |
3305 | { "BRBINF31_EL1" , 0x8C7C, true, false, {AArch64::FeatureBRBE} }, // 430 |
3306 | { "BRBSRC31_EL1" , 0x8C7D, true, false, {AArch64::FeatureBRBE} }, // 431 |
3307 | { "BRBTGT31_EL1" , 0x8C7E, true, false, {AArch64::FeatureBRBE} }, // 432 |
3308 | { "BRBCR_EL1" , 0x8C80, true, true, {AArch64::FeatureBRBE} }, // 433 |
3309 | { "BRBFCR_EL1" , 0x8C81, true, true, {AArch64::FeatureBRBE} }, // 434 |
3310 | { "BRBTS_EL1" , 0x8C82, true, true, {AArch64::FeatureBRBE} }, // 435 |
3311 | { "BRBINFINJ_EL1" , 0x8C88, true, true, {AArch64::FeatureBRBE} }, // 436 |
3312 | { "BRBSRCINJ_EL1" , 0x8C89, true, true, {AArch64::FeatureBRBE} }, // 437 |
3313 | { "BRBTGTINJ_EL1" , 0x8C8A, true, true, {AArch64::FeatureBRBE} }, // 438 |
3314 | { "BRBIDR0_EL1" , 0x8C90, true, false, {AArch64::FeatureBRBE} }, // 439 |
3315 | { "TEECR32_EL1" , 0x9000, true, true, {} }, // 440 |
3316 | { "TEEHBR32_EL1" , 0x9080, true, true, {} }, // 441 |
3317 | { "MDCCSR_EL0" , 0x9808, true, false, {} }, // 442 |
3318 | { "DBGDTR_EL0" , 0x9820, true, true, {} }, // 443 |
3319 | { "DBGDTRRX_EL0" , 0x9828, true, false, {} }, // 444 |
3320 | { "DBGDTRTX_EL0" , 0x9828, false, true, {} }, // 445 |
3321 | { "SPMCR_EL0" , 0x9CE0, true, true, {} }, // 446 |
3322 | { "SPMCNTENSET_EL0" , 0x9CE1, true, true, {} }, // 447 |
3323 | { "SPMCNTENCLR_EL0" , 0x9CE2, true, true, {} }, // 448 |
3324 | { "SPMOVSCLR_EL0" , 0x9CE3, true, true, {} }, // 449 |
3325 | { "SPMZR_EL0" , 0x9CE4, false, true, {} }, // 450 |
3326 | { "SPMSELR_EL0" , 0x9CE5, true, true, {} }, // 451 |
3327 | { "SPMOVSSET_EL0" , 0x9CF3, true, true, {} }, // 452 |
3328 | { "SPMEVCNTR0_EL0" , 0x9F00, true, true, {} }, // 453 |
3329 | { "SPMEVCNTR1_EL0" , 0x9F01, true, true, {} }, // 454 |
3330 | { "SPMEVCNTR2_EL0" , 0x9F02, true, true, {} }, // 455 |
3331 | { "SPMEVCNTR3_EL0" , 0x9F03, true, true, {} }, // 456 |
3332 | { "SPMEVCNTR4_EL0" , 0x9F04, true, true, {} }, // 457 |
3333 | { "SPMEVCNTR5_EL0" , 0x9F05, true, true, {} }, // 458 |
3334 | { "SPMEVCNTR6_EL0" , 0x9F06, true, true, {} }, // 459 |
3335 | { "SPMEVCNTR7_EL0" , 0x9F07, true, true, {} }, // 460 |
3336 | { "SPMEVCNTR8_EL0" , 0x9F08, true, true, {} }, // 461 |
3337 | { "SPMEVCNTR9_EL0" , 0x9F09, true, true, {} }, // 462 |
3338 | { "SPMEVCNTR10_EL0" , 0x9F0A, true, true, {} }, // 463 |
3339 | { "SPMEVCNTR11_EL0" , 0x9F0B, true, true, {} }, // 464 |
3340 | { "SPMEVCNTR12_EL0" , 0x9F0C, true, true, {} }, // 465 |
3341 | { "SPMEVCNTR13_EL0" , 0x9F0D, true, true, {} }, // 466 |
3342 | { "SPMEVCNTR14_EL0" , 0x9F0E, true, true, {} }, // 467 |
3343 | { "SPMEVCNTR15_EL0" , 0x9F0F, true, true, {} }, // 468 |
3344 | { "SPMEVTYPER0_EL0" , 0x9F10, true, true, {} }, // 469 |
3345 | { "SPMEVTYPER1_EL0" , 0x9F11, true, true, {} }, // 470 |
3346 | { "SPMEVTYPER2_EL0" , 0x9F12, true, true, {} }, // 471 |
3347 | { "SPMEVTYPER3_EL0" , 0x9F13, true, true, {} }, // 472 |
3348 | { "SPMEVTYPER4_EL0" , 0x9F14, true, true, {} }, // 473 |
3349 | { "SPMEVTYPER5_EL0" , 0x9F15, true, true, {} }, // 474 |
3350 | { "SPMEVTYPER6_EL0" , 0x9F16, true, true, {} }, // 475 |
3351 | { "SPMEVTYPER7_EL0" , 0x9F17, true, true, {} }, // 476 |
3352 | { "SPMEVTYPER8_EL0" , 0x9F18, true, true, {} }, // 477 |
3353 | { "SPMEVTYPER9_EL0" , 0x9F19, true, true, {} }, // 478 |
3354 | { "SPMEVTYPER10_EL0" , 0x9F1A, true, true, {} }, // 479 |
3355 | { "SPMEVTYPER11_EL0" , 0x9F1B, true, true, {} }, // 480 |
3356 | { "SPMEVTYPER12_EL0" , 0x9F1C, true, true, {} }, // 481 |
3357 | { "SPMEVTYPER13_EL0" , 0x9F1D, true, true, {} }, // 482 |
3358 | { "SPMEVTYPER14_EL0" , 0x9F1E, true, true, {} }, // 483 |
3359 | { "SPMEVTYPER15_EL0" , 0x9F1F, true, true, {} }, // 484 |
3360 | { "SPMEVFILTR0_EL0" , 0x9F20, true, true, {} }, // 485 |
3361 | { "SPMEVFILTR1_EL0" , 0x9F21, true, true, {} }, // 486 |
3362 | { "SPMEVFILTR2_EL0" , 0x9F22, true, true, {} }, // 487 |
3363 | { "SPMEVFILTR3_EL0" , 0x9F23, true, true, {} }, // 488 |
3364 | { "SPMEVFILTR4_EL0" , 0x9F24, true, true, {} }, // 489 |
3365 | { "SPMEVFILTR5_EL0" , 0x9F25, true, true, {} }, // 490 |
3366 | { "SPMEVFILTR6_EL0" , 0x9F26, true, true, {} }, // 491 |
3367 | { "SPMEVFILTR7_EL0" , 0x9F27, true, true, {} }, // 492 |
3368 | { "SPMEVFILTR8_EL0" , 0x9F28, true, true, {} }, // 493 |
3369 | { "SPMEVFILTR9_EL0" , 0x9F29, true, true, {} }, // 494 |
3370 | { "SPMEVFILTR10_EL0" , 0x9F2A, true, true, {} }, // 495 |
3371 | { "SPMEVFILTR11_EL0" , 0x9F2B, true, true, {} }, // 496 |
3372 | { "SPMEVFILTR12_EL0" , 0x9F2C, true, true, {} }, // 497 |
3373 | { "SPMEVFILTR13_EL0" , 0x9F2D, true, true, {} }, // 498 |
3374 | { "SPMEVFILTR14_EL0" , 0x9F2E, true, true, {} }, // 499 |
3375 | { "SPMEVFILTR15_EL0" , 0x9F2F, true, true, {} }, // 500 |
3376 | { "SPMEVFILT2R0_EL0" , 0x9F30, true, true, {} }, // 501 |
3377 | { "SPMEVFILT2R1_EL0" , 0x9F31, true, true, {} }, // 502 |
3378 | { "SPMEVFILT2R2_EL0" , 0x9F32, true, true, {} }, // 503 |
3379 | { "SPMEVFILT2R3_EL0" , 0x9F33, true, true, {} }, // 504 |
3380 | { "SPMEVFILT2R4_EL0" , 0x9F34, true, true, {} }, // 505 |
3381 | { "SPMEVFILT2R5_EL0" , 0x9F35, true, true, {} }, // 506 |
3382 | { "SPMEVFILT2R6_EL0" , 0x9F36, true, true, {} }, // 507 |
3383 | { "SPMEVFILT2R7_EL0" , 0x9F37, true, true, {} }, // 508 |
3384 | { "SPMEVFILT2R8_EL0" , 0x9F38, true, true, {} }, // 509 |
3385 | { "SPMEVFILT2R9_EL0" , 0x9F39, true, true, {} }, // 510 |
3386 | { "SPMEVFILT2R10_EL0" , 0x9F3A, true, true, {} }, // 511 |
3387 | { "SPMEVFILT2R11_EL0" , 0x9F3B, true, true, {} }, // 512 |
3388 | { "SPMEVFILT2R12_EL0" , 0x9F3C, true, true, {} }, // 513 |
3389 | { "SPMEVFILT2R13_EL0" , 0x9F3D, true, true, {} }, // 514 |
3390 | { "SPMEVFILT2R14_EL0" , 0x9F3E, true, true, {} }, // 515 |
3391 | { "SPMEVFILT2R15_EL0" , 0x9F3F, true, true, {} }, // 516 |
3392 | { "DBGVCR32_EL2" , 0xA038, true, true, {} }, // 517 |
3393 | { "BRBCR_EL2" , 0xA480, true, true, {AArch64::FeatureBRBE} }, // 518 |
3394 | { "SPMACCESSR_EL2" , 0xA4EB, true, true, {} }, // 519 |
3395 | { "BRBCR_EL12" , 0xAC80, true, true, {AArch64::FeatureBRBE} }, // 520 |
3396 | { "SPMACCESSR_EL12" , 0xACEB, true, true, {} }, // 521 |
3397 | { "SPMACCESSR_EL3" , 0xB4EB, true, true, {} }, // 522 |
3398 | { "SPMROOTCR_EL3" , 0xB4F7, true, true, {} }, // 523 |
3399 | { "SPMSCR_EL1" , 0xBCF7, true, true, {} }, // 524 |
3400 | { "MIDR_EL1" , 0xC000, true, false, {} }, // 525 |
3401 | { "MPUIR_EL1" , 0xC004, true, true, {AArch64::HasV8_0rOps} }, // 526 |
3402 | { "MPIDR_EL1" , 0xC005, true, false, {} }, // 527 |
3403 | { "REVIDR_EL1" , 0xC006, true, false, {} }, // 528 |
3404 | { "ID_PFR0_EL1" , 0xC008, true, false, {} }, // 529 |
3405 | { "ID_PFR1_EL1" , 0xC009, true, false, {} }, // 530 |
3406 | { "ID_DFR0_EL1" , 0xC00A, true, false, {} }, // 531 |
3407 | { "ID_AFR0_EL1" , 0xC00B, true, false, {} }, // 532 |
3408 | { "ID_MMFR0_EL1" , 0xC00C, true, false, {} }, // 533 |
3409 | { "ID_MMFR1_EL1" , 0xC00D, true, false, {} }, // 534 |
3410 | { "ID_MMFR2_EL1" , 0xC00E, true, false, {} }, // 535 |
3411 | { "ID_MMFR3_EL1" , 0xC00F, true, false, {} }, // 536 |
3412 | { "ID_ISAR0_EL1" , 0xC010, true, false, {} }, // 537 |
3413 | { "ID_ISAR1_EL1" , 0xC011, true, false, {} }, // 538 |
3414 | { "ID_ISAR2_EL1" , 0xC012, true, false, {} }, // 539 |
3415 | { "ID_ISAR3_EL1" , 0xC013, true, false, {} }, // 540 |
3416 | { "ID_ISAR4_EL1" , 0xC014, true, false, {} }, // 541 |
3417 | { "ID_ISAR5_EL1" , 0xC015, true, false, {} }, // 542 |
3418 | { "ID_MMFR4_EL1" , 0xC016, true, false, {} }, // 543 |
3419 | { "ID_ISAR6_EL1" , 0xC017, true, false, {AArch64::HasV8_2aOps} }, // 544 |
3420 | { "MVFR0_EL1" , 0xC018, true, false, {} }, // 545 |
3421 | { "MVFR1_EL1" , 0xC019, true, false, {} }, // 546 |
3422 | { "MVFR2_EL1" , 0xC01A, true, false, {} }, // 547 |
3423 | { "ID_PFR2_EL1" , 0xC01C, true, false, {AArch64::FeatureSpecRestrict} }, // 548 |
3424 | { "ID_DFR1_EL1" , 0xC01D, true, false, {} }, // 549 |
3425 | { "ID_MMFR5_EL1" , 0xC01E, true, false, {} }, // 550 |
3426 | { "ID_AA64PFR0_EL1" , 0xC020, true, false, {} }, // 551 |
3427 | { "ID_AA64PFR1_EL1" , 0xC021, true, false, {} }, // 552 |
3428 | { "ID_AA64PFR2_EL1" , 0xC022, true, false, {} }, // 553 |
3429 | { "ID_AA64ZFR0_EL1" , 0xC024, true, false, {AArch64::FeatureSVE} }, // 554 |
3430 | { "ID_AA64SMFR0_EL1" , 0xC025, true, false, {AArch64::FeatureSME} }, // 555 |
3431 | { "ID_AA64FPFR0_EL1" , 0xC027, true, false, {} }, // 556 |
3432 | { "ID_AA64DFR0_EL1" , 0xC028, true, false, {} }, // 557 |
3433 | { "ID_AA64DFR1_EL1" , 0xC029, true, false, {} }, // 558 |
3434 | { "ID_AA64DFR2_EL1" , 0xC02A, true, false, {} }, // 559 |
3435 | { "ID_AA64AFR0_EL1" , 0xC02C, true, false, {} }, // 560 |
3436 | { "ID_AA64AFR1_EL1" , 0xC02D, true, false, {} }, // 561 |
3437 | { "ID_AA64ISAR0_EL1" , 0xC030, true, false, {} }, // 562 |
3438 | { "ID_AA64ISAR1_EL1" , 0xC031, true, false, {} }, // 563 |
3439 | { "ID_AA64ISAR2_EL1" , 0xC032, true, false, {} }, // 564 |
3440 | { "ID_AA64ISAR3_EL1" , 0xC033, true, false, {} }, // 565 |
3441 | { "ID_AA64MMFR0_EL1" , 0xC038, true, false, {} }, // 566 |
3442 | { "ID_AA64MMFR1_EL1" , 0xC039, true, false, {} }, // 567 |
3443 | { "ID_AA64MMFR2_EL1" , 0xC03A, true, false, {} }, // 568 |
3444 | { "ID_AA64MMFR3_EL1" , 0xC03B, true, false, {} }, // 569 |
3445 | { "ID_AA64MMFR4_EL1" , 0xC03C, true, false, {} }, // 570 |
3446 | { "SCTLR_EL1" , 0xC080, true, true, {} }, // 571 |
3447 | { "ACTLR_EL1" , 0xC081, true, true, {} }, // 572 |
3448 | { "CPACR_EL1" , 0xC082, true, true, {} }, // 573 |
3449 | { "SCTLR2_EL1" , 0xC083, true, true, {} }, // 574 |
3450 | { "RGSR_EL1" , 0xC085, true, true, {AArch64::FeatureMTE} }, // 575 |
3451 | { "GCR_EL1" , 0xC086, true, true, {AArch64::FeatureMTE} }, // 576 |
3452 | { "ZCR_EL1" , 0xC090, true, true, {AArch64::FeatureSVE} }, // 577 |
3453 | { "TRFCR_EL1" , 0xC091, true, true, {AArch64::FeatureTRACEV8_4} }, // 578 |
3454 | { "TRCITECR_EL1" , 0xC093, true, true, {AArch64::FeatureITE} }, // 579 |
3455 | { "SMPRI_EL1" , 0xC094, true, true, {AArch64::FeatureSME} }, // 580 |
3456 | { "SMCR_EL1" , 0xC096, true, true, {AArch64::FeatureSME} }, // 581 |
3457 | { "SCTLRMASK_EL1" , 0xC0A0, true, true, {} }, // 582 |
3458 | { "ACTLRMASK_EL1" , 0xC0A1, true, true, {} }, // 583 |
3459 | { "CPACRMASK_EL1" , 0xC0A2, true, true, {} }, // 584 |
3460 | { "SCTLR2MASK_EL1" , 0xC0A3, true, true, {} }, // 585 |
3461 | { "CPACRALIAS_EL1" , 0xC0A4, true, true, {} }, // 586 |
3462 | { "ACTLRALIAS_EL1" , 0xC0A5, true, true, {} }, // 587 |
3463 | { "SCTLRALIAS_EL1" , 0xC0A6, true, true, {} }, // 588 |
3464 | { "SCTLR2ALIAS_EL1" , 0xC0A7, true, true, {} }, // 589 |
3465 | { "TTBR0_EL1" , 0xC100, true, true, {} }, // 590 |
3466 | { "TTBR1_EL1" , 0xC101, true, true, {} }, // 591 |
3467 | { "TCR_EL1" , 0xC102, true, true, {} }, // 592 |
3468 | { "TCR2_EL1" , 0xC103, true, true, {} }, // 593 |
3469 | { "APIAKeyLo_EL1" , 0xC108, true, true, {AArch64::FeaturePAuth} }, // 594 |
3470 | { "APIAKeyHi_EL1" , 0xC109, true, true, {AArch64::FeaturePAuth} }, // 595 |
3471 | { "APIBKeyLo_EL1" , 0xC10A, true, true, {AArch64::FeaturePAuth} }, // 596 |
3472 | { "APIBKeyHi_EL1" , 0xC10B, true, true, {AArch64::FeaturePAuth} }, // 597 |
3473 | { "APDAKeyLo_EL1" , 0xC110, true, true, {AArch64::FeaturePAuth} }, // 598 |
3474 | { "APDAKeyHi_EL1" , 0xC111, true, true, {AArch64::FeaturePAuth} }, // 599 |
3475 | { "APDBKeyLo_EL1" , 0xC112, true, true, {AArch64::FeaturePAuth} }, // 600 |
3476 | { "APDBKeyHi_EL1" , 0xC113, true, true, {AArch64::FeaturePAuth} }, // 601 |
3477 | { "APGAKeyLo_EL1" , 0xC118, true, true, {AArch64::FeaturePAuth} }, // 602 |
3478 | { "APGAKeyHi_EL1" , 0xC119, true, true, {AArch64::FeaturePAuth} }, // 603 |
3479 | { "GCSCR_EL1" , 0xC128, true, true, {} }, // 604 |
3480 | { "GCSPR_EL1" , 0xC129, true, true, {} }, // 605 |
3481 | { "GCSCRE0_EL1" , 0xC12A, true, true, {} }, // 606 |
3482 | { "TCRMASK_EL1" , 0xC13A, true, true, {} }, // 607 |
3483 | { "TCR2MASK_EL1" , 0xC13B, true, true, {} }, // 608 |
3484 | { "TCRALIAS_EL1" , 0xC13E, true, true, {} }, // 609 |
3485 | { "TCR2ALIAS_EL1" , 0xC13F, true, true, {} }, // 610 |
3486 | { "SPSR_EL1" , 0xC200, true, true, {} }, // 611 |
3487 | { "ELR_EL1" , 0xC201, true, true, {} }, // 612 |
3488 | { "SP_EL0" , 0xC208, true, true, {} }, // 613 |
3489 | { "SPSel" , 0xC210, true, true, {} }, // 614 |
3490 | { "CurrentEL" , 0xC212, true, false, {} }, // 615 |
3491 | { "PAN" , 0xC213, true, true, {AArch64::FeaturePAN} }, // 616 |
3492 | { "UAO" , 0xC214, true, true, {AArch64::FeaturePsUAO} }, // 617 |
3493 | { "ALLINT" , 0xC218, true, true, {AArch64::FeatureNMI} }, // 618 |
3494 | { "PM" , 0xC219, true, true, {} }, // 619 |
3495 | { "ICC_PMR_EL1" , 0xC230, true, true, {} }, // 620 |
3496 | { "AFSR0_EL1" , 0xC288, true, true, {} }, // 621 |
3497 | { "AFSR1_EL1" , 0xC289, true, true, {} }, // 622 |
3498 | { "ESR_EL1" , 0xC290, true, true, {} }, // 623 |
3499 | { "ERRIDR_EL1" , 0xC298, true, false, {AArch64::FeatureRAS} }, // 624 |
3500 | { "ERRSELR_EL1" , 0xC299, true, true, {AArch64::FeatureRAS} }, // 625 |
3501 | { "ERXGSR_EL1" , 0xC29A, true, false, {AArch64::FeatureRASv2} }, // 626 |
3502 | { "ERXFR_EL1" , 0xC2A0, true, false, {AArch64::FeatureRAS} }, // 627 |
3503 | { "ERXCTLR_EL1" , 0xC2A1, true, true, {AArch64::FeatureRAS} }, // 628 |
3504 | { "ERXSTATUS_EL1" , 0xC2A2, true, true, {AArch64::FeatureRAS} }, // 629 |
3505 | { "ERXADDR_EL1" , 0xC2A3, true, true, {AArch64::FeatureRAS} }, // 630 |
3506 | { "ERXPFGF_EL1" , 0xC2A4, true, false, {} }, // 631 |
3507 | { "ERXPFGCTL_EL1" , 0xC2A5, true, true, {} }, // 632 |
3508 | { "ERXPFGCDN_EL1" , 0xC2A6, true, true, {} }, // 633 |
3509 | { "ERXMISC0_EL1" , 0xC2A8, true, true, {AArch64::FeatureRAS} }, // 634 |
3510 | { "ERXMISC1_EL1" , 0xC2A9, true, true, {AArch64::FeatureRAS} }, // 635 |
3511 | { "ERXMISC2_EL1" , 0xC2AA, true, true, {} }, // 636 |
3512 | { "ERXMISC3_EL1" , 0xC2AB, true, true, {} }, // 637 |
3513 | { "TFSR_EL1" , 0xC2B0, true, true, {AArch64::FeatureMTE} }, // 638 |
3514 | { "TFSRE0_EL1" , 0xC2B1, true, true, {AArch64::FeatureMTE} }, // 639 |
3515 | { "FAR_EL1" , 0xC300, true, true, {} }, // 640 |
3516 | { "PFAR_EL1" , 0xC305, true, true, {} }, // 641 |
3517 | { "PRENR_EL1" , 0xC309, true, true, {AArch64::HasV8_0rOps} }, // 642 |
3518 | { "PRSELR_EL1" , 0xC311, true, true, {AArch64::HasV8_0rOps} }, // 643 |
3519 | { "PRBAR_EL1" , 0xC340, true, true, {AArch64::HasV8_0rOps} }, // 644 |
3520 | { "PRLAR_EL1" , 0xC341, true, true, {AArch64::HasV8_0rOps} }, // 645 |
3521 | { "PRBAR1_EL1" , 0xC344, true, true, {AArch64::HasV8_0rOps} }, // 646 |
3522 | { "PRLAR1_EL1" , 0xC345, true, true, {AArch64::HasV8_0rOps} }, // 647 |
3523 | { "PRBAR2_EL1" , 0xC348, true, true, {AArch64::HasV8_0rOps} }, // 648 |
3524 | { "PRLAR2_EL1" , 0xC349, true, true, {AArch64::HasV8_0rOps} }, // 649 |
3525 | { "PRBAR3_EL1" , 0xC34C, true, true, {AArch64::HasV8_0rOps} }, // 650 |
3526 | { "PRLAR3_EL1" , 0xC34D, true, true, {AArch64::HasV8_0rOps} }, // 651 |
3527 | { "PRBAR4_EL1" , 0xC350, true, true, {AArch64::HasV8_0rOps} }, // 652 |
3528 | { "PRLAR4_EL1" , 0xC351, true, true, {AArch64::HasV8_0rOps} }, // 653 |
3529 | { "PRBAR5_EL1" , 0xC354, true, true, {AArch64::HasV8_0rOps} }, // 654 |
3530 | { "PRLAR5_EL1" , 0xC355, true, true, {AArch64::HasV8_0rOps} }, // 655 |
3531 | { "PRBAR6_EL1" , 0xC358, true, true, {AArch64::HasV8_0rOps} }, // 656 |
3532 | { "PRLAR6_EL1" , 0xC359, true, true, {AArch64::HasV8_0rOps} }, // 657 |
3533 | { "PRBAR7_EL1" , 0xC35C, true, true, {AArch64::HasV8_0rOps} }, // 658 |
3534 | { "PRLAR7_EL1" , 0xC35D, true, true, {AArch64::HasV8_0rOps} }, // 659 |
3535 | { "PRBAR8_EL1" , 0xC360, true, true, {AArch64::HasV8_0rOps} }, // 660 |
3536 | { "PRLAR8_EL1" , 0xC361, true, true, {AArch64::HasV8_0rOps} }, // 661 |
3537 | { "PRBAR9_EL1" , 0xC364, true, true, {AArch64::HasV8_0rOps} }, // 662 |
3538 | { "PRLAR9_EL1" , 0xC365, true, true, {AArch64::HasV8_0rOps} }, // 663 |
3539 | { "PRBAR10_EL1" , 0xC368, true, true, {AArch64::HasV8_0rOps} }, // 664 |
3540 | { "PRLAR10_EL1" , 0xC369, true, true, {AArch64::HasV8_0rOps} }, // 665 |
3541 | { "PRBAR11_EL1" , 0xC36C, true, true, {AArch64::HasV8_0rOps} }, // 666 |
3542 | { "PRLAR11_EL1" , 0xC36D, true, true, {AArch64::HasV8_0rOps} }, // 667 |
3543 | { "PRBAR12_EL1" , 0xC370, true, true, {AArch64::HasV8_0rOps} }, // 668 |
3544 | { "PRLAR12_EL1" , 0xC371, true, true, {AArch64::HasV8_0rOps} }, // 669 |
3545 | { "PRBAR13_EL1" , 0xC374, true, true, {AArch64::HasV8_0rOps} }, // 670 |
3546 | { "PRLAR13_EL1" , 0xC375, true, true, {AArch64::HasV8_0rOps} }, // 671 |
3547 | { "PRBAR14_EL1" , 0xC378, true, true, {AArch64::HasV8_0rOps} }, // 672 |
3548 | { "PRLAR14_EL1" , 0xC379, true, true, {AArch64::HasV8_0rOps} }, // 673 |
3549 | { "PRBAR15_EL1" , 0xC37C, true, true, {AArch64::HasV8_0rOps} }, // 674 |
3550 | { "PRLAR15_EL1" , 0xC37D, true, true, {AArch64::HasV8_0rOps} }, // 675 |
3551 | { "PAR_EL1" , 0xC3A0, true, true, {} }, // 676 |
3552 | { "PMSCR_EL1" , 0xC4C8, true, true, {AArch64::FeatureSPE} }, // 677 |
3553 | { "PMSNEVFR_EL1" , 0xC4C9, true, true, {AArch64::FeatureSPE_EEF} }, // 678 |
3554 | { "PMSICR_EL1" , 0xC4CA, true, true, {AArch64::FeatureSPE} }, // 679 |
3555 | { "PMSIRR_EL1" , 0xC4CB, true, true, {AArch64::FeatureSPE} }, // 680 |
3556 | { "PMSFCR_EL1" , 0xC4CC, true, true, {AArch64::FeatureSPE} }, // 681 |
3557 | { "PMSEVFR_EL1" , 0xC4CD, true, true, {AArch64::FeatureSPE} }, // 682 |
3558 | { "PMSLATFR_EL1" , 0xC4CE, true, true, {AArch64::FeatureSPE} }, // 683 |
3559 | { "PMSIDR_EL1" , 0xC4CF, true, false, {AArch64::FeatureSPE} }, // 684 |
3560 | { "PMBLIMITR_EL1" , 0xC4D0, true, true, {AArch64::FeatureSPE} }, // 685 |
3561 | { "PMBPTR_EL1" , 0xC4D1, true, true, {AArch64::FeatureSPE} }, // 686 |
3562 | { "PMBSR_EL1" , 0xC4D3, true, true, {AArch64::FeatureSPE} }, // 687 |
3563 | { "PMSDSFR_EL1" , 0xC4D4, true, true, {} }, // 688 |
3564 | { "PMBMAR_EL1" , 0xC4D5, true, true, {} }, // 689 |
3565 | { "PMBIDR_EL1" , 0xC4D7, true, false, {AArch64::FeatureSPE} }, // 690 |
3566 | { "TRBLIMITR_EL1" , 0xC4D8, true, true, {AArch64::FeatureTRBE} }, // 691 |
3567 | { "TRBPTR_EL1" , 0xC4D9, true, true, {AArch64::FeatureTRBE} }, // 692 |
3568 | { "TRBBASER_EL1" , 0xC4DA, true, true, {AArch64::FeatureTRBE} }, // 693 |
3569 | { "TRBSR_EL1" , 0xC4DB, true, true, {AArch64::FeatureTRBE} }, // 694 |
3570 | { "TRBMAR_EL1" , 0xC4DC, true, true, {AArch64::FeatureTRBE} }, // 695 |
3571 | { "TRBMPAM_EL1" , 0xC4DD, true, true, {AArch64::FeatureTRBE} }, // 696 |
3572 | { "TRBTRG_EL1" , 0xC4DE, true, true, {AArch64::FeatureTRBE} }, // 697 |
3573 | { "TRBIDR_EL1" , 0xC4DF, true, false, {AArch64::FeatureTRBE} }, // 698 |
3574 | { "PMSSCR_EL1" , 0xC4EB, true, true, {} }, // 699 |
3575 | { "PMINTENSET_EL1" , 0xC4F1, true, true, {} }, // 700 |
3576 | { "PMINTENCLR_EL1" , 0xC4F2, true, true, {} }, // 701 |
3577 | { "PMUACR_EL1" , 0xC4F4, true, true, {} }, // 702 |
3578 | { "PMECR_EL1" , 0xC4F5, true, true, {} }, // 703 |
3579 | { "PMMIR_EL1" , 0xC4F6, true, false, {} }, // 704 |
3580 | { "PMIAR_EL1" , 0xC4F7, true, true, {} }, // 705 |
3581 | { "MAIR_EL1" , 0xC510, true, true, {} }, // 706 |
3582 | { "MAIR2_EL1" , 0xC511, true, true, {} }, // 707 |
3583 | { "PIRE0_EL1" , 0xC512, true, true, {} }, // 708 |
3584 | { "PIR_EL1" , 0xC513, true, true, {} }, // 709 |
3585 | { "POR_EL1" , 0xC514, true, true, {} }, // 710 |
3586 | { "S2POR_EL1" , 0xC515, true, true, {} }, // 711 |
3587 | { "AMAIR_EL1" , 0xC518, true, true, {} }, // 712 |
3588 | { "AMAIR2_EL1" , 0xC519, true, true, {} }, // 713 |
3589 | { "LORSA_EL1" , 0xC520, true, true, {AArch64::FeatureLOR} }, // 714 |
3590 | { "LOREA_EL1" , 0xC521, true, true, {AArch64::FeatureLOR} }, // 715 |
3591 | { "LORN_EL1" , 0xC522, true, true, {AArch64::FeatureLOR} }, // 716 |
3592 | { "LORC_EL1" , 0xC523, true, true, {AArch64::FeatureLOR} }, // 717 |
3593 | { "MPAMIDR_EL1" , 0xC524, true, false, {AArch64::FeatureMPAM} }, // 718 |
3594 | { "MPAMBWIDR_EL1" , 0xC525, true, false, {} }, // 719 |
3595 | { "LORID_EL1" , 0xC527, true, false, {AArch64::FeatureLOR} }, // 720 |
3596 | { "MPAM1_EL1" , 0xC528, true, true, {AArch64::FeatureMPAM} }, // 721 |
3597 | { "MPAM0_EL1" , 0xC529, true, true, {AArch64::FeatureMPAM} }, // 722 |
3598 | { "MPAMSM_EL1" , 0xC52B, true, true, {AArch64::FeatureMPAM, AArch64::FeatureSME} }, // 723 |
3599 | { "MPAMBW1_EL1" , 0xC52C, true, true, {} }, // 724 |
3600 | { "MPAMBW0_EL1" , 0xC52D, true, true, {} }, // 725 |
3601 | { "MPAMBWSM_EL1" , 0xC52F, true, true, {} }, // 726 |
3602 | { "VBAR_EL1" , 0xC600, true, true, {} }, // 727 |
3603 | { "RVBAR_EL1" , 0xC601, true, false, {} }, // 728 |
3604 | { "RMR_EL1" , 0xC602, true, true, {} }, // 729 |
3605 | { "ISR_EL1" , 0xC608, true, false, {} }, // 730 |
3606 | { "DISR_EL1" , 0xC609, true, true, {AArch64::FeatureRAS} }, // 731 |
3607 | { "ICC_IAR0_EL1" , 0xC640, true, false, {} }, // 732 |
3608 | { "ICC_EOIR0_EL1" , 0xC641, false, true, {} }, // 733 |
3609 | { "ICC_HPPIR0_EL1" , 0xC642, true, false, {} }, // 734 |
3610 | { "ICC_BPR0_EL1" , 0xC643, true, true, {} }, // 735 |
3611 | { "ICC_AP0R0_EL1" , 0xC644, true, true, {} }, // 736 |
3612 | { "ICC_AP0R1_EL1" , 0xC645, true, true, {} }, // 737 |
3613 | { "ICC_AP0R2_EL1" , 0xC646, true, true, {} }, // 738 |
3614 | { "ICC_AP0R3_EL1" , 0xC647, true, true, {} }, // 739 |
3615 | { "ICC_AP1R0_EL1" , 0xC648, true, true, {} }, // 740 |
3616 | { "ICC_AP1R1_EL1" , 0xC649, true, true, {} }, // 741 |
3617 | { "ICC_AP1R2_EL1" , 0xC64A, true, true, {} }, // 742 |
3618 | { "ICC_AP1R3_EL1" , 0xC64B, true, true, {} }, // 743 |
3619 | { "ICC_NMIAR1_EL1" , 0xC64D, true, false, {AArch64::FeatureNMI} }, // 744 |
3620 | { "ICC_DIR_EL1" , 0xC659, false, true, {} }, // 745 |
3621 | { "ICC_RPR_EL1" , 0xC65B, true, false, {} }, // 746 |
3622 | { "ICC_SGI1R_EL1" , 0xC65D, false, true, {} }, // 747 |
3623 | { "ICC_ASGI1R_EL1" , 0xC65E, false, true, {} }, // 748 |
3624 | { "ICC_SGI0R_EL1" , 0xC65F, false, true, {} }, // 749 |
3625 | { "ICC_IAR1_EL1" , 0xC660, true, false, {} }, // 750 |
3626 | { "ICC_EOIR1_EL1" , 0xC661, false, true, {} }, // 751 |
3627 | { "ICC_HPPIR1_EL1" , 0xC662, true, false, {} }, // 752 |
3628 | { "ICC_BPR1_EL1" , 0xC663, true, true, {} }, // 753 |
3629 | { "ICC_CTLR_EL1" , 0xC664, true, true, {} }, // 754 |
3630 | { "ICC_SRE_EL1" , 0xC665, true, true, {} }, // 755 |
3631 | { "ICC_IGRPEN0_EL1" , 0xC666, true, true, {} }, // 756 |
3632 | { "ICC_IGRPEN1_EL1" , 0xC667, true, true, {} }, // 757 |
3633 | { "CONTEXTIDR_EL1" , 0xC681, true, true, {} }, // 758 |
3634 | { "RCWSMASK_EL1" , 0xC683, true, true, {AArch64::FeatureTHE} }, // 759 |
3635 | { "TPIDR_EL1" , 0xC684, true, true, {} }, // 760 |
3636 | { "ACCDATA_EL1" , 0xC685, true, true, {AArch64::FeatureLS64} }, // 761 |
3637 | { "RCWMASK_EL1" , 0xC686, true, true, {AArch64::FeatureTHE} }, // 762 |
3638 | { "SCXTNUM_EL1" , 0xC687, true, true, {AArch64::FeatureSpecRestrict} }, // 763 |
3639 | { "CNTKCTL_EL1" , 0xC708, true, true, {} }, // 764 |
3640 | { "CCSIDR_EL1" , 0xC800, true, false, {} }, // 765 |
3641 | { "CLIDR_EL1" , 0xC801, true, false, {} }, // 766 |
3642 | { "CCSIDR2_EL1" , 0xC802, true, false, {AArch64::FeatureCCIDX} }, // 767 |
3643 | { "GMID_EL1" , 0xC804, true, false, {AArch64::FeatureMTE} }, // 768 |
3644 | { "SMIDR_EL1" , 0xC806, true, false, {AArch64::FeatureSME} }, // 769 |
3645 | { "AIDR_EL1" , 0xC807, true, false, {} }, // 770 |
3646 | { "CSSELR_EL1" , 0xD000, true, true, {} }, // 771 |
3647 | { "CTR_EL0" , 0xD801, true, false, {} }, // 772 |
3648 | { "DCZID_EL0" , 0xD807, true, false, {} }, // 773 |
3649 | { "RNDR" , 0xD920, true, false, {AArch64::FeatureRandGen} }, // 774 |
3650 | { "RNDRRS" , 0xD921, true, false, {AArch64::FeatureRandGen} }, // 775 |
3651 | { "GCSPR_EL0" , 0xD929, true, true, {} }, // 776 |
3652 | { "NZCV" , 0xDA10, true, true, {} }, // 777 |
3653 | { "DAIF" , 0xDA11, true, true, {} }, // 778 |
3654 | { "SVCR" , 0xDA12, true, true, {AArch64::FeatureSME} }, // 779 |
3655 | { "DIT" , 0xDA15, true, true, {AArch64::FeatureDIT} }, // 780 |
3656 | { "SSBS" , 0xDA16, true, true, {AArch64::FeatureSSBS} }, // 781 |
3657 | { "TCO" , 0xDA17, true, true, {AArch64::FeatureMTE} }, // 782 |
3658 | { "FPCR" , 0xDA20, true, true, {AArch64::FeatureFPARMv8} }, // 783 |
3659 | { "FPSR" , 0xDA21, true, true, {AArch64::FeatureFPARMv8} }, // 784 |
3660 | { "FPMR" , 0xDA22, true, true, {} }, // 785 |
3661 | { "DSPSR_EL0" , 0xDA28, true, true, {} }, // 786 |
3662 | { "DLR_EL0" , 0xDA29, true, true, {} }, // 787 |
3663 | { "PMICNTR_EL0" , 0xDCA0, true, true, {} }, // 788 |
3664 | { "PMICFILTR_EL0" , 0xDCB0, true, true, {} }, // 789 |
3665 | { "PMCR_EL0" , 0xDCE0, true, true, {} }, // 790 |
3666 | { "PMCNTENSET_EL0" , 0xDCE1, true, true, {} }, // 791 |
3667 | { "PMCNTENCLR_EL0" , 0xDCE2, true, true, {} }, // 792 |
3668 | { "PMOVSCLR_EL0" , 0xDCE3, true, true, {} }, // 793 |
3669 | { "PMSWINC_EL0" , 0xDCE4, false, true, {} }, // 794 |
3670 | { "PMSELR_EL0" , 0xDCE5, true, true, {} }, // 795 |
3671 | { "PMCEID0_EL0" , 0xDCE6, true, false, {} }, // 796 |
3672 | { "PMCEID1_EL0" , 0xDCE7, true, false, {} }, // 797 |
3673 | { "PMCCNTR_EL0" , 0xDCE8, true, true, {} }, // 798 |
3674 | { "PMXEVTYPER_EL0" , 0xDCE9, true, true, {} }, // 799 |
3675 | { "PMXEVCNTR_EL0" , 0xDCEA, true, true, {} }, // 800 |
3676 | { "PMZR_EL0" , 0xDCEC, false, true, {} }, // 801 |
3677 | { "PMUSERENR_EL0" , 0xDCF0, true, true, {} }, // 802 |
3678 | { "PMOVSSET_EL0" , 0xDCF3, true, true, {} }, // 803 |
3679 | { "POR_EL0" , 0xDD14, true, true, {} }, // 804 |
3680 | { "TPIDR_EL0" , 0xDE82, true, true, {} }, // 805 |
3681 | { "TPIDRRO_EL0" , 0xDE83, true, true, {} }, // 806 |
3682 | { "TPIDR2_EL0" , 0xDE85, true, true, {AArch64::FeatureSME} }, // 807 |
3683 | { "SCXTNUM_EL0" , 0xDE87, true, true, {AArch64::FeatureSpecRestrict} }, // 808 |
3684 | { "AMCR_EL0" , 0xDE90, true, true, {AArch64::FeatureAM} }, // 809 |
3685 | { "AMCFGR_EL0" , 0xDE91, true, false, {AArch64::FeatureAM} }, // 810 |
3686 | { "AMCGCR_EL0" , 0xDE92, true, false, {AArch64::FeatureAM} }, // 811 |
3687 | { "AMUSERENR_EL0" , 0xDE93, true, true, {AArch64::FeatureAM} }, // 812 |
3688 | { "AMCNTENCLR0_EL0" , 0xDE94, true, true, {AArch64::FeatureAM} }, // 813 |
3689 | { "AMCNTENSET0_EL0" , 0xDE95, true, true, {AArch64::FeatureAM} }, // 814 |
3690 | { "AMCG1IDR_EL0" , 0xDE96, true, false, {AArch64::FeatureAMVS} }, // 815 |
3691 | { "AMCNTENCLR1_EL0" , 0xDE98, true, true, {AArch64::FeatureAM} }, // 816 |
3692 | { "AMCNTENSET1_EL0" , 0xDE99, true, true, {AArch64::FeatureAM} }, // 817 |
3693 | { "AMEVCNTR00_EL0" , 0xDEA0, true, true, {AArch64::FeatureAM} }, // 818 |
3694 | { "AMEVCNTR01_EL0" , 0xDEA1, true, true, {AArch64::FeatureAM} }, // 819 |
3695 | { "AMEVCNTR02_EL0" , 0xDEA2, true, true, {AArch64::FeatureAM} }, // 820 |
3696 | { "AMEVCNTR03_EL0" , 0xDEA3, true, true, {AArch64::FeatureAM} }, // 821 |
3697 | { "AMEVTYPER00_EL0" , 0xDEB0, true, false, {AArch64::FeatureAM} }, // 822 |
3698 | { "AMEVTYPER01_EL0" , 0xDEB1, true, false, {AArch64::FeatureAM} }, // 823 |
3699 | { "AMEVTYPER02_EL0" , 0xDEB2, true, false, {AArch64::FeatureAM} }, // 824 |
3700 | { "AMEVTYPER03_EL0" , 0xDEB3, true, false, {AArch64::FeatureAM} }, // 825 |
3701 | { "AMEVCNTR10_EL0" , 0xDEE0, true, true, {AArch64::FeatureAM} }, // 826 |
3702 | { "AMEVCNTR11_EL0" , 0xDEE1, true, true, {AArch64::FeatureAM} }, // 827 |
3703 | { "AMEVCNTR12_EL0" , 0xDEE2, true, true, {AArch64::FeatureAM} }, // 828 |
3704 | { "AMEVCNTR13_EL0" , 0xDEE3, true, true, {AArch64::FeatureAM} }, // 829 |
3705 | { "AMEVCNTR14_EL0" , 0xDEE4, true, true, {AArch64::FeatureAM} }, // 830 |
3706 | { "AMEVCNTR15_EL0" , 0xDEE5, true, true, {AArch64::FeatureAM} }, // 831 |
3707 | { "AMEVCNTR16_EL0" , 0xDEE6, true, true, {AArch64::FeatureAM} }, // 832 |
3708 | { "AMEVCNTR17_EL0" , 0xDEE7, true, true, {AArch64::FeatureAM} }, // 833 |
3709 | { "AMEVCNTR18_EL0" , 0xDEE8, true, true, {AArch64::FeatureAM} }, // 834 |
3710 | { "AMEVCNTR19_EL0" , 0xDEE9, true, true, {AArch64::FeatureAM} }, // 835 |
3711 | { "AMEVCNTR110_EL0" , 0xDEEA, true, true, {AArch64::FeatureAM} }, // 836 |
3712 | { "AMEVCNTR111_EL0" , 0xDEEB, true, true, {AArch64::FeatureAM} }, // 837 |
3713 | { "AMEVCNTR112_EL0" , 0xDEEC, true, true, {AArch64::FeatureAM} }, // 838 |
3714 | { "AMEVCNTR113_EL0" , 0xDEED, true, true, {AArch64::FeatureAM} }, // 839 |
3715 | { "AMEVCNTR114_EL0" , 0xDEEE, true, true, {AArch64::FeatureAM} }, // 840 |
3716 | { "AMEVCNTR115_EL0" , 0xDEEF, true, true, {AArch64::FeatureAM} }, // 841 |
3717 | { "AMEVTYPER10_EL0" , 0xDEF0, true, true, {AArch64::FeatureAM} }, // 842 |
3718 | { "AMEVTYPER11_EL0" , 0xDEF1, true, true, {AArch64::FeatureAM} }, // 843 |
3719 | { "AMEVTYPER12_EL0" , 0xDEF2, true, true, {AArch64::FeatureAM} }, // 844 |
3720 | { "AMEVTYPER13_EL0" , 0xDEF3, true, true, {AArch64::FeatureAM} }, // 845 |
3721 | { "AMEVTYPER14_EL0" , 0xDEF4, true, true, {AArch64::FeatureAM} }, // 846 |
3722 | { "AMEVTYPER15_EL0" , 0xDEF5, true, true, {AArch64::FeatureAM} }, // 847 |
3723 | { "AMEVTYPER16_EL0" , 0xDEF6, true, true, {AArch64::FeatureAM} }, // 848 |
3724 | { "AMEVTYPER17_EL0" , 0xDEF7, true, true, {AArch64::FeatureAM} }, // 849 |
3725 | { "AMEVTYPER18_EL0" , 0xDEF8, true, true, {AArch64::FeatureAM} }, // 850 |
3726 | { "AMEVTYPER19_EL0" , 0xDEF9, true, true, {AArch64::FeatureAM} }, // 851 |
3727 | { "AMEVTYPER110_EL0" , 0xDEFA, true, true, {AArch64::FeatureAM} }, // 852 |
3728 | { "AMEVTYPER111_EL0" , 0xDEFB, true, true, {AArch64::FeatureAM} }, // 853 |
3729 | { "AMEVTYPER112_EL0" , 0xDEFC, true, true, {AArch64::FeatureAM} }, // 854 |
3730 | { "AMEVTYPER113_EL0" , 0xDEFD, true, true, {AArch64::FeatureAM} }, // 855 |
3731 | { "AMEVTYPER114_EL0" , 0xDEFE, true, true, {AArch64::FeatureAM} }, // 856 |
3732 | { "AMEVTYPER115_EL0" , 0xDEFF, true, true, {AArch64::FeatureAM} }, // 857 |
3733 | { "CNTFRQ_EL0" , 0xDF00, true, true, {} }, // 858 |
3734 | { "CNTPCT_EL0" , 0xDF01, true, false, {} }, // 859 |
3735 | { "CNTVCT_EL0" , 0xDF02, true, false, {} }, // 860 |
3736 | { "CNTPCTSS_EL0" , 0xDF05, true, false, {AArch64::FeatureEnhancedCounterVirtualization} }, // 861 |
3737 | { "CNTVCTSS_EL0" , 0xDF06, true, false, {AArch64::FeatureEnhancedCounterVirtualization} }, // 862 |
3738 | { "CNTP_TVAL_EL0" , 0xDF10, true, true, {} }, // 863 |
3739 | { "CNTP_CTL_EL0" , 0xDF11, true, true, {} }, // 864 |
3740 | { "CNTP_CVAL_EL0" , 0xDF12, true, true, {} }, // 865 |
3741 | { "CNTV_TVAL_EL0" , 0xDF18, true, true, {} }, // 866 |
3742 | { "CNTV_CTL_EL0" , 0xDF19, true, true, {} }, // 867 |
3743 | { "CNTV_CVAL_EL0" , 0xDF1A, true, true, {} }, // 868 |
3744 | { "PMEVCNTR0_EL0" , 0xDF40, true, true, {} }, // 869 |
3745 | { "PMEVCNTR1_EL0" , 0xDF41, true, true, {} }, // 870 |
3746 | { "PMEVCNTR2_EL0" , 0xDF42, true, true, {} }, // 871 |
3747 | { "PMEVCNTR3_EL0" , 0xDF43, true, true, {} }, // 872 |
3748 | { "PMEVCNTR4_EL0" , 0xDF44, true, true, {} }, // 873 |
3749 | { "PMEVCNTR5_EL0" , 0xDF45, true, true, {} }, // 874 |
3750 | { "PMEVCNTR6_EL0" , 0xDF46, true, true, {} }, // 875 |
3751 | { "PMEVCNTR7_EL0" , 0xDF47, true, true, {} }, // 876 |
3752 | { "PMEVCNTR8_EL0" , 0xDF48, true, true, {} }, // 877 |
3753 | { "PMEVCNTR9_EL0" , 0xDF49, true, true, {} }, // 878 |
3754 | { "PMEVCNTR10_EL0" , 0xDF4A, true, true, {} }, // 879 |
3755 | { "PMEVCNTR11_EL0" , 0xDF4B, true, true, {} }, // 880 |
3756 | { "PMEVCNTR12_EL0" , 0xDF4C, true, true, {} }, // 881 |
3757 | { "PMEVCNTR13_EL0" , 0xDF4D, true, true, {} }, // 882 |
3758 | { "PMEVCNTR14_EL0" , 0xDF4E, true, true, {} }, // 883 |
3759 | { "PMEVCNTR15_EL0" , 0xDF4F, true, true, {} }, // 884 |
3760 | { "PMEVCNTR16_EL0" , 0xDF50, true, true, {} }, // 885 |
3761 | { "PMEVCNTR17_EL0" , 0xDF51, true, true, {} }, // 886 |
3762 | { "PMEVCNTR18_EL0" , 0xDF52, true, true, {} }, // 887 |
3763 | { "PMEVCNTR19_EL0" , 0xDF53, true, true, {} }, // 888 |
3764 | { "PMEVCNTR20_EL0" , 0xDF54, true, true, {} }, // 889 |
3765 | { "PMEVCNTR21_EL0" , 0xDF55, true, true, {} }, // 890 |
3766 | { "PMEVCNTR22_EL0" , 0xDF56, true, true, {} }, // 891 |
3767 | { "PMEVCNTR23_EL0" , 0xDF57, true, true, {} }, // 892 |
3768 | { "PMEVCNTR24_EL0" , 0xDF58, true, true, {} }, // 893 |
3769 | { "PMEVCNTR25_EL0" , 0xDF59, true, true, {} }, // 894 |
3770 | { "PMEVCNTR26_EL0" , 0xDF5A, true, true, {} }, // 895 |
3771 | { "PMEVCNTR27_EL0" , 0xDF5B, true, true, {} }, // 896 |
3772 | { "PMEVCNTR28_EL0" , 0xDF5C, true, true, {} }, // 897 |
3773 | { "PMEVCNTR29_EL0" , 0xDF5D, true, true, {} }, // 898 |
3774 | { "PMEVCNTR30_EL0" , 0xDF5E, true, true, {} }, // 899 |
3775 | { "PMEVTYPER0_EL0" , 0xDF60, true, true, {} }, // 900 |
3776 | { "PMEVTYPER1_EL0" , 0xDF61, true, true, {} }, // 901 |
3777 | { "PMEVTYPER2_EL0" , 0xDF62, true, true, {} }, // 902 |
3778 | { "PMEVTYPER3_EL0" , 0xDF63, true, true, {} }, // 903 |
3779 | { "PMEVTYPER4_EL0" , 0xDF64, true, true, {} }, // 904 |
3780 | { "PMEVTYPER5_EL0" , 0xDF65, true, true, {} }, // 905 |
3781 | { "PMEVTYPER6_EL0" , 0xDF66, true, true, {} }, // 906 |
3782 | { "PMEVTYPER7_EL0" , 0xDF67, true, true, {} }, // 907 |
3783 | { "PMEVTYPER8_EL0" , 0xDF68, true, true, {} }, // 908 |
3784 | { "PMEVTYPER9_EL0" , 0xDF69, true, true, {} }, // 909 |
3785 | { "PMEVTYPER10_EL0" , 0xDF6A, true, true, {} }, // 910 |
3786 | { "PMEVTYPER11_EL0" , 0xDF6B, true, true, {} }, // 911 |
3787 | { "PMEVTYPER12_EL0" , 0xDF6C, true, true, {} }, // 912 |
3788 | { "PMEVTYPER13_EL0" , 0xDF6D, true, true, {} }, // 913 |
3789 | { "PMEVTYPER14_EL0" , 0xDF6E, true, true, {} }, // 914 |
3790 | { "PMEVTYPER15_EL0" , 0xDF6F, true, true, {} }, // 915 |
3791 | { "PMEVTYPER16_EL0" , 0xDF70, true, true, {} }, // 916 |
3792 | { "PMEVTYPER17_EL0" , 0xDF71, true, true, {} }, // 917 |
3793 | { "PMEVTYPER18_EL0" , 0xDF72, true, true, {} }, // 918 |
3794 | { "PMEVTYPER19_EL0" , 0xDF73, true, true, {} }, // 919 |
3795 | { "PMEVTYPER20_EL0" , 0xDF74, true, true, {} }, // 920 |
3796 | { "PMEVTYPER21_EL0" , 0xDF75, true, true, {} }, // 921 |
3797 | { "PMEVTYPER22_EL0" , 0xDF76, true, true, {} }, // 922 |
3798 | { "PMEVTYPER23_EL0" , 0xDF77, true, true, {} }, // 923 |
3799 | { "PMEVTYPER24_EL0" , 0xDF78, true, true, {} }, // 924 |
3800 | { "PMEVTYPER25_EL0" , 0xDF79, true, true, {} }, // 925 |
3801 | { "PMEVTYPER26_EL0" , 0xDF7A, true, true, {} }, // 926 |
3802 | { "PMEVTYPER27_EL0" , 0xDF7B, true, true, {} }, // 927 |
3803 | { "PMEVTYPER28_EL0" , 0xDF7C, true, true, {} }, // 928 |
3804 | { "PMEVTYPER29_EL0" , 0xDF7D, true, true, {} }, // 929 |
3805 | { "PMEVTYPER30_EL0" , 0xDF7E, true, true, {} }, // 930 |
3806 | { "PMCCFILTR_EL0" , 0xDF7F, true, true, {} }, // 931 |
3807 | { "VPIDR_EL2" , 0xE000, true, true, {} }, // 932 |
3808 | { "MPUIR_EL2" , 0xE004, true, true, {AArch64::HasV8_0rOps} }, // 933 |
3809 | { "VMPIDR_EL2" , 0xE005, true, true, {} }, // 934 |
3810 | { "SCTLR_EL2" , 0xE080, true, true, {} }, // 935 |
3811 | { "ACTLR_EL2" , 0xE081, true, true, {} }, // 936 |
3812 | { "SCTLR2_EL2" , 0xE083, true, true, {} }, // 937 |
3813 | { "HCR_EL2" , 0xE088, true, true, {} }, // 938 |
3814 | { "MDCR_EL2" , 0xE089, true, true, {} }, // 939 |
3815 | { "CPTR_EL2" , 0xE08A, true, true, {} }, // 940 |
3816 | { "HSTR_EL2" , 0xE08B, true, true, {} }, // 941 |
3817 | { "HFGRTR_EL2" , 0xE08C, true, true, {AArch64::FeatureFineGrainedTraps} }, // 942 |
3818 | { "HFGWTR_EL2" , 0xE08D, true, true, {AArch64::FeatureFineGrainedTraps} }, // 943 |
3819 | { "HFGITR_EL2" , 0xE08E, true, true, {AArch64::FeatureFineGrainedTraps} }, // 944 |
3820 | { "HACR_EL2" , 0xE08F, true, true, {} }, // 945 |
3821 | { "ZCR_EL2" , 0xE090, true, true, {AArch64::FeatureSVE} }, // 946 |
3822 | { "TRFCR_EL2" , 0xE091, true, true, {AArch64::FeatureTRACEV8_4} }, // 947 |
3823 | { "HCRX_EL2" , 0xE092, true, true, {AArch64::FeatureHCX} }, // 948 |
3824 | { "TRCITECR_EL2" , 0xE093, true, true, {AArch64::FeatureITE} }, // 949 |
3825 | { "SMPRIMAP_EL2" , 0xE095, true, true, {AArch64::FeatureSME} }, // 950 |
3826 | { "SMCR_EL2" , 0xE096, true, true, {AArch64::FeatureSME} }, // 951 |
3827 | { "SDER32_EL2" , 0xE099, true, true, {AArch64::FeatureSEL2} }, // 952 |
3828 | { "SCTLRMASK_EL2" , 0xE0A0, true, true, {} }, // 953 |
3829 | { "ACTLRMASK_EL2" , 0xE0A1, true, true, {} }, // 954 |
3830 | { "CPTRMASK_EL2" , 0xE0A2, true, true, {} }, // 955 |
3831 | { "SCTLR2MASK_EL2" , 0xE0A3, true, true, {} }, // 956 |
3832 | { "TTBR0_EL2" , 0xE100, true, true, {AArch64::FeatureEL2VMSA} }, // 957 |
3833 | { "VSCTLR_EL2" , 0xE100, true, true, {AArch64::HasV8_0rOps} }, // 958 |
3834 | { "TTBR1_EL2" , 0xE101, true, true, {AArch64::FeatureVH} }, // 959 |
3835 | { "TCR_EL2" , 0xE102, true, true, {} }, // 960 |
3836 | { "TCR2_EL2" , 0xE103, true, true, {} }, // 961 |
3837 | { "VTTBR_EL2" , 0xE108, true, true, {AArch64::FeatureEL2VMSA} }, // 962 |
3838 | { "VTCR_EL2" , 0xE10A, true, true, {} }, // 963 |
3839 | { "VNCR_EL2" , 0xE110, true, true, {AArch64::FeatureNV} }, // 964 |
3840 | { "HDBSSBR_EL2" , 0xE11A, true, true, {} }, // 965 |
3841 | { "HDBSSPROD_EL2" , 0xE11B, true, true, {} }, // 966 |
3842 | { "HACDBSBR_EL2" , 0xE11C, true, true, {} }, // 967 |
3843 | { "HACDBSCONS_EL2" , 0xE11D, true, true, {} }, // 968 |
3844 | { "GCSCR_EL2" , 0xE128, true, true, {} }, // 969 |
3845 | { "GCSPR_EL2" , 0xE129, true, true, {} }, // 970 |
3846 | { "VSTTBR_EL2" , 0xE130, true, true, {AArch64::HasV8_0aOps} }, // 971 |
3847 | { "VSTCR_EL2" , 0xE132, true, true, {AArch64::FeatureSEL2} }, // 972 |
3848 | { "TCRMASK_EL2" , 0xE13A, true, true, {} }, // 973 |
3849 | { "TCR2MASK_EL2" , 0xE13B, true, true, {} }, // 974 |
3850 | { "DACR32_EL2" , 0xE180, true, true, {} }, // 975 |
3851 | { "HDFGRTR2_EL2" , 0xE188, true, true, {AArch64::FeatureFineGrainedTraps} }, // 976 |
3852 | { "HDFGWTR2_EL2" , 0xE189, true, true, {AArch64::FeatureFineGrainedTraps} }, // 977 |
3853 | { "HFGRTR2_EL2" , 0xE18A, true, true, {AArch64::FeatureFineGrainedTraps} }, // 978 |
3854 | { "HFGWTR2_EL2" , 0xE18B, true, true, {AArch64::FeatureFineGrainedTraps} }, // 979 |
3855 | { "HDFGRTR_EL2" , 0xE18C, true, true, {AArch64::FeatureFineGrainedTraps} }, // 980 |
3856 | { "HDFGWTR_EL2" , 0xE18D, true, true, {AArch64::FeatureFineGrainedTraps} }, // 981 |
3857 | { "HAFGRTR_EL2" , 0xE18E, true, true, {AArch64::FeatureFineGrainedTraps} }, // 982 |
3858 | { "HFGITR2_EL2" , 0xE18F, true, true, {AArch64::FeatureFineGrainedTraps} }, // 983 |
3859 | { "SPSR_EL2" , 0xE200, true, true, {} }, // 984 |
3860 | { "ELR_EL2" , 0xE201, true, true, {} }, // 985 |
3861 | { "SP_EL1" , 0xE208, true, true, {} }, // 986 |
3862 | { "SPSR_irq" , 0xE218, true, true, {} }, // 987 |
3863 | { "SPSR_abt" , 0xE219, true, true, {} }, // 988 |
3864 | { "SPSR_und" , 0xE21A, true, true, {} }, // 989 |
3865 | { "SPSR_fiq" , 0xE21B, true, true, {} }, // 990 |
3866 | { "IFSR32_EL2" , 0xE281, true, true, {} }, // 991 |
3867 | { "AFSR0_EL2" , 0xE288, true, true, {} }, // 992 |
3868 | { "AFSR1_EL2" , 0xE289, true, true, {} }, // 993 |
3869 | { "ESR_EL2" , 0xE290, true, true, {} }, // 994 |
3870 | { "VSESR_EL2" , 0xE293, true, true, {AArch64::FeatureRAS} }, // 995 |
3871 | { "FPEXC32_EL2" , 0xE298, true, true, {} }, // 996 |
3872 | { "TFSR_EL2" , 0xE2B0, true, true, {AArch64::FeatureMTE} }, // 997 |
3873 | { "FAR_EL2" , 0xE300, true, true, {} }, // 998 |
3874 | { "HPFAR_EL2" , 0xE304, true, true, {} }, // 999 |
3875 | { "PFAR_EL2" , 0xE305, true, true, {} }, // 1000 |
3876 | { "PRENR_EL2" , 0xE309, true, true, {AArch64::HasV8_0rOps} }, // 1001 |
3877 | { "PRSELR_EL2" , 0xE311, true, true, {AArch64::HasV8_0rOps} }, // 1002 |
3878 | { "PRBAR_EL2" , 0xE340, true, true, {AArch64::HasV8_0rOps} }, // 1003 |
3879 | { "PRLAR_EL2" , 0xE341, true, true, {AArch64::HasV8_0rOps} }, // 1004 |
3880 | { "PRBAR1_EL2" , 0xE344, true, true, {AArch64::HasV8_0rOps} }, // 1005 |
3881 | { "PRLAR1_EL2" , 0xE345, true, true, {AArch64::HasV8_0rOps} }, // 1006 |
3882 | { "PRBAR2_EL2" , 0xE348, true, true, {AArch64::HasV8_0rOps} }, // 1007 |
3883 | { "PRLAR2_EL2" , 0xE349, true, true, {AArch64::HasV8_0rOps} }, // 1008 |
3884 | { "PRBAR3_EL2" , 0xE34C, true, true, {AArch64::HasV8_0rOps} }, // 1009 |
3885 | { "PRLAR3_EL2" , 0xE34D, true, true, {AArch64::HasV8_0rOps} }, // 1010 |
3886 | { "PRBAR4_EL2" , 0xE350, true, true, {AArch64::HasV8_0rOps} }, // 1011 |
3887 | { "PRLAR4_EL2" , 0xE351, true, true, {AArch64::HasV8_0rOps} }, // 1012 |
3888 | { "PRBAR5_EL2" , 0xE354, true, true, {AArch64::HasV8_0rOps} }, // 1013 |
3889 | { "PRLAR5_EL2" , 0xE355, true, true, {AArch64::HasV8_0rOps} }, // 1014 |
3890 | { "PRBAR6_EL2" , 0xE358, true, true, {AArch64::HasV8_0rOps} }, // 1015 |
3891 | { "PRLAR6_EL2" , 0xE359, true, true, {AArch64::HasV8_0rOps} }, // 1016 |
3892 | { "PRBAR7_EL2" , 0xE35C, true, true, {AArch64::HasV8_0rOps} }, // 1017 |
3893 | { "PRLAR7_EL2" , 0xE35D, true, true, {AArch64::HasV8_0rOps} }, // 1018 |
3894 | { "PRBAR8_EL2" , 0xE360, true, true, {AArch64::HasV8_0rOps} }, // 1019 |
3895 | { "PRLAR8_EL2" , 0xE361, true, true, {AArch64::HasV8_0rOps} }, // 1020 |
3896 | { "PRBAR9_EL2" , 0xE364, true, true, {AArch64::HasV8_0rOps} }, // 1021 |
3897 | { "PRLAR9_EL2" , 0xE365, true, true, {AArch64::HasV8_0rOps} }, // 1022 |
3898 | { "PRBAR10_EL2" , 0xE368, true, true, {AArch64::HasV8_0rOps} }, // 1023 |
3899 | { "PRLAR10_EL2" , 0xE369, true, true, {AArch64::HasV8_0rOps} }, // 1024 |
3900 | { "PRBAR11_EL2" , 0xE36C, true, true, {AArch64::HasV8_0rOps} }, // 1025 |
3901 | { "PRLAR11_EL2" , 0xE36D, true, true, {AArch64::HasV8_0rOps} }, // 1026 |
3902 | { "PRBAR12_EL2" , 0xE370, true, true, {AArch64::HasV8_0rOps} }, // 1027 |
3903 | { "PRLAR12_EL2" , 0xE371, true, true, {AArch64::HasV8_0rOps} }, // 1028 |
3904 | { "PRBAR13_EL2" , 0xE374, true, true, {AArch64::HasV8_0rOps} }, // 1029 |
3905 | { "PRLAR13_EL2" , 0xE375, true, true, {AArch64::HasV8_0rOps} }, // 1030 |
3906 | { "PRBAR14_EL2" , 0xE378, true, true, {AArch64::HasV8_0rOps} }, // 1031 |
3907 | { "PRLAR14_EL2" , 0xE379, true, true, {AArch64::HasV8_0rOps} }, // 1032 |
3908 | { "PRBAR15_EL2" , 0xE37C, true, true, {AArch64::HasV8_0rOps} }, // 1033 |
3909 | { "PRLAR15_EL2" , 0xE37D, true, true, {AArch64::HasV8_0rOps} }, // 1034 |
3910 | { "PMSCR_EL2" , 0xE4C8, true, true, {AArch64::FeatureSPE} }, // 1035 |
3911 | { "PMBSR_EL2" , 0xE4D3, true, true, {} }, // 1036 |
3912 | { "TRBSR_EL2" , 0xE4DB, true, true, {} }, // 1037 |
3913 | { "MAIR2_EL2" , 0xE509, true, true, {} }, // 1038 |
3914 | { "MAIR_EL2" , 0xE510, true, true, {} }, // 1039 |
3915 | { "PIRE0_EL2" , 0xE512, true, true, {} }, // 1040 |
3916 | { "PIR_EL2" , 0xE513, true, true, {} }, // 1041 |
3917 | { "POR_EL2" , 0xE514, true, true, {} }, // 1042 |
3918 | { "S2PIR_EL2" , 0xE515, true, true, {} }, // 1043 |
3919 | { "AMAIR_EL2" , 0xE518, true, true, {} }, // 1044 |
3920 | { "AMAIR2_EL2" , 0xE519, true, true, {} }, // 1045 |
3921 | { "MPAMHCR_EL2" , 0xE520, true, true, {AArch64::FeatureMPAM} }, // 1046 |
3922 | { "MPAMVPMV_EL2" , 0xE521, true, true, {AArch64::FeatureMPAM} }, // 1047 |
3923 | { "MPAM2_EL2" , 0xE528, true, true, {AArch64::FeatureMPAM} }, // 1048 |
3924 | { "MPAMBW2_EL2" , 0xE52C, true, true, {} }, // 1049 |
3925 | { "MPAMBWCAP_EL2" , 0xE52E, true, true, {} }, // 1050 |
3926 | { "MPAMVPM0_EL2" , 0xE530, true, true, {AArch64::FeatureMPAM} }, // 1051 |
3927 | { "MPAMVPM1_EL2" , 0xE531, true, true, {AArch64::FeatureMPAM} }, // 1052 |
3928 | { "MPAMVPM2_EL2" , 0xE532, true, true, {AArch64::FeatureMPAM} }, // 1053 |
3929 | { "MPAMVPM3_EL2" , 0xE533, true, true, {AArch64::FeatureMPAM} }, // 1054 |
3930 | { "MPAMVPM4_EL2" , 0xE534, true, true, {AArch64::FeatureMPAM} }, // 1055 |
3931 | { "MPAMVPM5_EL2" , 0xE535, true, true, {AArch64::FeatureMPAM} }, // 1056 |
3932 | { "MPAMVPM6_EL2" , 0xE536, true, true, {AArch64::FeatureMPAM} }, // 1057 |
3933 | { "MPAMVPM7_EL2" , 0xE537, true, true, {AArch64::FeatureMPAM} }, // 1058 |
3934 | { "MECID_P0_EL2" , 0xE540, true, true, {AArch64::FeatureMEC} }, // 1059 |
3935 | { "MECID_A0_EL2" , 0xE541, true, true, {AArch64::FeatureMEC} }, // 1060 |
3936 | { "MECID_P1_EL2" , 0xE542, true, true, {AArch64::FeatureMEC} }, // 1061 |
3937 | { "MECID_A1_EL2" , 0xE543, true, true, {AArch64::FeatureMEC} }, // 1062 |
3938 | { "MECIDR_EL2" , 0xE547, true, false, {AArch64::FeatureMEC} }, // 1063 |
3939 | { "VMECID_P_EL2" , 0xE548, true, true, {AArch64::FeatureMEC} }, // 1064 |
3940 | { "VMECID_A_EL2" , 0xE549, true, true, {AArch64::FeatureMEC} }, // 1065 |
3941 | { "VBAR_EL2" , 0xE600, true, true, {} }, // 1066 |
3942 | { "RVBAR_EL2" , 0xE601, true, false, {} }, // 1067 |
3943 | { "RMR_EL2" , 0xE602, true, true, {} }, // 1068 |
3944 | { "VDISR_EL2" , 0xE609, true, true, {AArch64::FeatureRAS} }, // 1069 |
3945 | { "ICH_AP0R0_EL2" , 0xE640, true, true, {} }, // 1070 |
3946 | { "ICH_AP0R1_EL2" , 0xE641, true, true, {} }, // 1071 |
3947 | { "ICH_AP0R2_EL2" , 0xE642, true, true, {} }, // 1072 |
3948 | { "ICH_AP0R3_EL2" , 0xE643, true, true, {} }, // 1073 |
3949 | { "ICH_AP1R0_EL2" , 0xE648, true, true, {} }, // 1074 |
3950 | { "ICH_AP1R1_EL2" , 0xE649, true, true, {} }, // 1075 |
3951 | { "ICH_AP1R2_EL2" , 0xE64A, true, true, {} }, // 1076 |
3952 | { "ICH_AP1R3_EL2" , 0xE64B, true, true, {} }, // 1077 |
3953 | { "ICC_SRE_EL2" , 0xE64D, true, true, {} }, // 1078 |
3954 | { "ICH_HCR_EL2" , 0xE658, true, true, {} }, // 1079 |
3955 | { "ICH_VTR_EL2" , 0xE659, true, false, {} }, // 1080 |
3956 | { "ICH_MISR_EL2" , 0xE65A, true, false, {} }, // 1081 |
3957 | { "ICH_EISR_EL2" , 0xE65B, true, false, {} }, // 1082 |
3958 | { "ICH_ELRSR_EL2" , 0xE65D, true, false, {} }, // 1083 |
3959 | { "ICH_VMCR_EL2" , 0xE65F, true, true, {} }, // 1084 |
3960 | { "ICH_LR0_EL2" , 0xE660, true, true, {} }, // 1085 |
3961 | { "ICH_LR1_EL2" , 0xE661, true, true, {} }, // 1086 |
3962 | { "ICH_LR2_EL2" , 0xE662, true, true, {} }, // 1087 |
3963 | { "ICH_LR3_EL2" , 0xE663, true, true, {} }, // 1088 |
3964 | { "ICH_LR4_EL2" , 0xE664, true, true, {} }, // 1089 |
3965 | { "ICH_LR5_EL2" , 0xE665, true, true, {} }, // 1090 |
3966 | { "ICH_LR6_EL2" , 0xE666, true, true, {} }, // 1091 |
3967 | { "ICH_LR7_EL2" , 0xE667, true, true, {} }, // 1092 |
3968 | { "ICH_LR8_EL2" , 0xE668, true, true, {} }, // 1093 |
3969 | { "ICH_LR9_EL2" , 0xE669, true, true, {} }, // 1094 |
3970 | { "ICH_LR10_EL2" , 0xE66A, true, true, {} }, // 1095 |
3971 | { "ICH_LR11_EL2" , 0xE66B, true, true, {} }, // 1096 |
3972 | { "ICH_LR12_EL2" , 0xE66C, true, true, {} }, // 1097 |
3973 | { "ICH_LR13_EL2" , 0xE66D, true, true, {} }, // 1098 |
3974 | { "ICH_LR14_EL2" , 0xE66E, true, true, {} }, // 1099 |
3975 | { "ICH_LR15_EL2" , 0xE66F, true, true, {} }, // 1100 |
3976 | { "CONTEXTIDR_EL2" , 0xE681, true, true, {AArch64::FeatureCONTEXTIDREL2} }, // 1101 |
3977 | { "TPIDR_EL2" , 0xE682, true, true, {} }, // 1102 |
3978 | { "SCXTNUM_EL2" , 0xE687, true, true, {AArch64::FeatureSpecRestrict} }, // 1103 |
3979 | { "AMEVCNTVOFF00_EL2" , 0xE6C0, true, true, {AArch64::FeatureAMVS} }, // 1104 |
3980 | { "AMEVCNTVOFF01_EL2" , 0xE6C1, true, true, {AArch64::FeatureAMVS} }, // 1105 |
3981 | { "AMEVCNTVOFF02_EL2" , 0xE6C2, true, true, {AArch64::FeatureAMVS} }, // 1106 |
3982 | { "AMEVCNTVOFF03_EL2" , 0xE6C3, true, true, {AArch64::FeatureAMVS} }, // 1107 |
3983 | { "AMEVCNTVOFF04_EL2" , 0xE6C4, true, true, {AArch64::FeatureAMVS} }, // 1108 |
3984 | { "AMEVCNTVOFF05_EL2" , 0xE6C5, true, true, {AArch64::FeatureAMVS} }, // 1109 |
3985 | { "AMEVCNTVOFF06_EL2" , 0xE6C6, true, true, {AArch64::FeatureAMVS} }, // 1110 |
3986 | { "AMEVCNTVOFF07_EL2" , 0xE6C7, true, true, {AArch64::FeatureAMVS} }, // 1111 |
3987 | { "AMEVCNTVOFF08_EL2" , 0xE6C8, true, true, {AArch64::FeatureAMVS} }, // 1112 |
3988 | { "AMEVCNTVOFF09_EL2" , 0xE6C9, true, true, {AArch64::FeatureAMVS} }, // 1113 |
3989 | { "AMEVCNTVOFF010_EL2" , 0xE6CA, true, true, {AArch64::FeatureAMVS} }, // 1114 |
3990 | { "AMEVCNTVOFF011_EL2" , 0xE6CB, true, true, {AArch64::FeatureAMVS} }, // 1115 |
3991 | { "AMEVCNTVOFF012_EL2" , 0xE6CC, true, true, {AArch64::FeatureAMVS} }, // 1116 |
3992 | { "AMEVCNTVOFF013_EL2" , 0xE6CD, true, true, {AArch64::FeatureAMVS} }, // 1117 |
3993 | { "AMEVCNTVOFF014_EL2" , 0xE6CE, true, true, {AArch64::FeatureAMVS} }, // 1118 |
3994 | { "AMEVCNTVOFF015_EL2" , 0xE6CF, true, true, {AArch64::FeatureAMVS} }, // 1119 |
3995 | { "AMEVCNTVOFF10_EL2" , 0xE6D0, true, true, {AArch64::FeatureAMVS} }, // 1120 |
3996 | { "AMEVCNTVOFF11_EL2" , 0xE6D1, true, true, {AArch64::FeatureAMVS} }, // 1121 |
3997 | { "AMEVCNTVOFF12_EL2" , 0xE6D2, true, true, {AArch64::FeatureAMVS} }, // 1122 |
3998 | { "AMEVCNTVOFF13_EL2" , 0xE6D3, true, true, {AArch64::FeatureAMVS} }, // 1123 |
3999 | { "AMEVCNTVOFF14_EL2" , 0xE6D4, true, true, {AArch64::FeatureAMVS} }, // 1124 |
4000 | { "AMEVCNTVOFF15_EL2" , 0xE6D5, true, true, {AArch64::FeatureAMVS} }, // 1125 |
4001 | { "AMEVCNTVOFF16_EL2" , 0xE6D6, true, true, {AArch64::FeatureAMVS} }, // 1126 |
4002 | { "AMEVCNTVOFF17_EL2" , 0xE6D7, true, true, {AArch64::FeatureAMVS} }, // 1127 |
4003 | { "AMEVCNTVOFF18_EL2" , 0xE6D8, true, true, {AArch64::FeatureAMVS} }, // 1128 |
4004 | { "AMEVCNTVOFF19_EL2" , 0xE6D9, true, true, {AArch64::FeatureAMVS} }, // 1129 |
4005 | { "AMEVCNTVOFF110_EL2" , 0xE6DA, true, true, {AArch64::FeatureAMVS} }, // 1130 |
4006 | { "AMEVCNTVOFF111_EL2" , 0xE6DB, true, true, {AArch64::FeatureAMVS} }, // 1131 |
4007 | { "AMEVCNTVOFF112_EL2" , 0xE6DC, true, true, {AArch64::FeatureAMVS} }, // 1132 |
4008 | { "AMEVCNTVOFF113_EL2" , 0xE6DD, true, true, {AArch64::FeatureAMVS} }, // 1133 |
4009 | { "AMEVCNTVOFF114_EL2" , 0xE6DE, true, true, {AArch64::FeatureAMVS} }, // 1134 |
4010 | { "AMEVCNTVOFF115_EL2" , 0xE6DF, true, true, {AArch64::FeatureAMVS} }, // 1135 |
4011 | { "CNTVOFF_EL2" , 0xE703, true, true, {} }, // 1136 |
4012 | { "CNTSCALE_EL2" , 0xE704, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1137 |
4013 | { "CNTISCALE_EL2" , 0xE705, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1138 |
4014 | { "CNTPOFF_EL2" , 0xE706, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1139 |
4015 | { "CNTVFRQ_EL2" , 0xE707, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1140 |
4016 | { "CNTHCTL_EL2" , 0xE708, true, true, {} }, // 1141 |
4017 | { "CNTHP_TVAL_EL2" , 0xE710, true, true, {} }, // 1142 |
4018 | { "CNTHP_CTL_EL2" , 0xE711, true, true, {} }, // 1143 |
4019 | { "CNTHP_CVAL_EL2" , 0xE712, true, true, {} }, // 1144 |
4020 | { "CNTHV_TVAL_EL2" , 0xE718, true, true, {AArch64::FeatureVH} }, // 1145 |
4021 | { "CNTHV_CTL_EL2" , 0xE719, true, true, {AArch64::FeatureVH} }, // 1146 |
4022 | { "CNTHV_CVAL_EL2" , 0xE71A, true, true, {AArch64::FeatureVH} }, // 1147 |
4023 | { "CNTHVS_TVAL_EL2" , 0xE720, true, true, {AArch64::FeatureSEL2} }, // 1148 |
4024 | { "CNTHVS_CTL_EL2" , 0xE721, true, true, {AArch64::FeatureSEL2} }, // 1149 |
4025 | { "CNTHVS_CVAL_EL2" , 0xE722, true, true, {AArch64::FeatureSEL2} }, // 1150 |
4026 | { "CNTHPS_TVAL_EL2" , 0xE728, true, true, {AArch64::FeatureSEL2} }, // 1151 |
4027 | { "CNTHPS_CTL_EL2" , 0xE729, true, true, {AArch64::FeatureSEL2} }, // 1152 |
4028 | { "CNTHPS_CVAL_EL2" , 0xE72A, true, true, {AArch64::FeatureSEL2} }, // 1153 |
4029 | { "SCTLR_EL12" , 0xE880, true, true, {AArch64::FeatureVH} }, // 1154 |
4030 | { "ACTLR_EL12" , 0xE881, true, true, {} }, // 1155 |
4031 | { "CPACR_EL12" , 0xE882, true, true, {AArch64::FeatureVH} }, // 1156 |
4032 | { "SCTLR2_EL12" , 0xE883, true, true, {} }, // 1157 |
4033 | { "ZCR_EL12" , 0xE890, true, true, {AArch64::FeatureSVE} }, // 1158 |
4034 | { "TRFCR_EL12" , 0xE891, true, true, {AArch64::FeatureTRACEV8_4} }, // 1159 |
4035 | { "TRCITECR_EL12" , 0xE893, true, true, {AArch64::FeatureITE} }, // 1160 |
4036 | { "SMCR_EL12" , 0xE896, true, true, {AArch64::FeatureSME} }, // 1161 |
4037 | { "SCTLRMASK_EL12" , 0xE8A0, true, true, {} }, // 1162 |
4038 | { "ACTLRMASK_EL12" , 0xE8A1, true, true, {} }, // 1163 |
4039 | { "CPACRMASK_EL12" , 0xE8A2, true, true, {} }, // 1164 |
4040 | { "SCTLR2MASK_EL12" , 0xE8A3, true, true, {} }, // 1165 |
4041 | { "TTBR0_EL12" , 0xE900, true, true, {AArch64::FeatureVH} }, // 1166 |
4042 | { "TTBR1_EL12" , 0xE901, true, true, {AArch64::FeatureVH} }, // 1167 |
4043 | { "TCR_EL12" , 0xE902, true, true, {AArch64::FeatureVH} }, // 1168 |
4044 | { "TCR2_EL12" , 0xE903, true, true, {} }, // 1169 |
4045 | { "GCSCR_EL12" , 0xE928, true, true, {} }, // 1170 |
4046 | { "GCSPR_EL12" , 0xE929, true, true, {} }, // 1171 |
4047 | { "TCRMASK_EL12" , 0xE93A, true, true, {} }, // 1172 |
4048 | { "TCR2MASK_EL12" , 0xE93B, true, true, {} }, // 1173 |
4049 | { "SPSR_EL12" , 0xEA00, true, true, {AArch64::FeatureVH} }, // 1174 |
4050 | { "ELR_EL12" , 0xEA01, true, true, {AArch64::FeatureVH} }, // 1175 |
4051 | { "AFSR0_EL12" , 0xEA88, true, true, {AArch64::FeatureVH} }, // 1176 |
4052 | { "AFSR1_EL12" , 0xEA89, true, true, {AArch64::FeatureVH} }, // 1177 |
4053 | { "ESR_EL12" , 0xEA90, true, true, {AArch64::FeatureVH} }, // 1178 |
4054 | { "TFSR_EL12" , 0xEAB0, true, true, {AArch64::FeatureMTE} }, // 1179 |
4055 | { "FAR_EL12" , 0xEB00, true, true, {AArch64::FeatureVH} }, // 1180 |
4056 | { "PFAR_EL12" , 0xEB05, true, true, {} }, // 1181 |
4057 | { "PMSCR_EL12" , 0xECC8, true, true, {AArch64::FeatureSPE} }, // 1182 |
4058 | { "PMBSR_EL12" , 0xECD3, true, true, {} }, // 1183 |
4059 | { "TRBSR_EL12" , 0xECDB, true, true, {} }, // 1184 |
4060 | { "MAIR_EL12" , 0xED10, true, true, {AArch64::FeatureVH} }, // 1185 |
4061 | { "MAIR2_EL12" , 0xED11, true, true, {} }, // 1186 |
4062 | { "PIRE0_EL12" , 0xED12, true, true, {} }, // 1187 |
4063 | { "PIR_EL12" , 0xED13, true, true, {} }, // 1188 |
4064 | { "POR_EL12" , 0xED14, true, true, {} }, // 1189 |
4065 | { "AMAIR_EL12" , 0xED18, true, true, {AArch64::FeatureVH} }, // 1190 |
4066 | { "AMAIR2_EL12" , 0xED19, true, true, {} }, // 1191 |
4067 | { "MPAM1_EL12" , 0xED28, true, true, {AArch64::FeatureMPAM} }, // 1192 |
4068 | { "MPAMBW1_EL12" , 0xED2C, true, true, {} }, // 1193 |
4069 | { "VBAR_EL12" , 0xEE00, true, true, {AArch64::FeatureVH} }, // 1194 |
4070 | { "CONTEXTIDR_EL12" , 0xEE81, true, true, {AArch64::FeatureVH} }, // 1195 |
4071 | { "SCXTNUM_EL12" , 0xEE87, true, true, {AArch64::FeatureSpecRestrict} }, // 1196 |
4072 | { "CNTKCTL_EL12" , 0xEF08, true, true, {AArch64::FeatureVH} }, // 1197 |
4073 | { "CNTP_TVAL_EL02" , 0xEF10, true, true, {AArch64::FeatureVH} }, // 1198 |
4074 | { "CNTP_CTL_EL02" , 0xEF11, true, true, {AArch64::FeatureVH} }, // 1199 |
4075 | { "CNTP_CVAL_EL02" , 0xEF12, true, true, {AArch64::FeatureVH} }, // 1200 |
4076 | { "CNTV_TVAL_EL02" , 0xEF18, true, true, {AArch64::FeatureVH} }, // 1201 |
4077 | { "CNTV_CTL_EL02" , 0xEF19, true, true, {AArch64::FeatureVH} }, // 1202 |
4078 | { "CNTV_CVAL_EL02" , 0xEF1A, true, true, {AArch64::FeatureVH} }, // 1203 |
4079 | { "SCTLR_EL3" , 0xF080, true, true, {} }, // 1204 |
4080 | { "ACTLR_EL3" , 0xF081, true, true, {} }, // 1205 |
4081 | { "SCTLR2_EL3" , 0xF083, true, true, {} }, // 1206 |
4082 | { "SCR_EL3" , 0xF088, true, true, {} }, // 1207 |
4083 | { "SDER32_EL3" , 0xF089, true, true, {} }, // 1208 |
4084 | { "CPTR_EL3" , 0xF08A, true, true, {} }, // 1209 |
4085 | { "FGWTE3_EL3" , 0xF08D, true, true, {} }, // 1210 |
4086 | { "ZCR_EL3" , 0xF090, true, true, {AArch64::FeatureSVE} }, // 1211 |
4087 | { "SMCR_EL3" , 0xF096, true, true, {AArch64::FeatureSME} }, // 1212 |
4088 | { "MDCR_EL3" , 0xF099, true, true, {} }, // 1213 |
4089 | { "TTBR0_EL3" , 0xF100, true, true, {} }, // 1214 |
4090 | { "TCR_EL3" , 0xF102, true, true, {} }, // 1215 |
4091 | { "GPTBR_EL3" , 0xF10C, true, true, {AArch64::FeatureRME} }, // 1216 |
4092 | { "GPCBW_EL3" , 0xF10D, true, true, {} }, // 1217 |
4093 | { "GPCCR_EL3" , 0xF10E, true, true, {AArch64::FeatureRME} }, // 1218 |
4094 | { "GCSCR_EL3" , 0xF128, true, true, {} }, // 1219 |
4095 | { "GCSPR_EL3" , 0xF129, true, true, {} }, // 1220 |
4096 | { "SPSR_EL3" , 0xF200, true, true, {} }, // 1221 |
4097 | { "ELR_EL3" , 0xF201, true, true, {} }, // 1222 |
4098 | { "SP_EL2" , 0xF208, true, true, {} }, // 1223 |
4099 | { "AFSR0_EL3" , 0xF288, true, true, {} }, // 1224 |
4100 | { "AFSR1_EL3" , 0xF289, true, true, {} }, // 1225 |
4101 | { "ESR_EL3" , 0xF290, true, true, {} }, // 1226 |
4102 | { "VSESR_EL3" , 0xF293, true, true, {} }, // 1227 |
4103 | { "TFSR_EL3" , 0xF2B0, true, true, {AArch64::FeatureMTE} }, // 1228 |
4104 | { "FAR_EL3" , 0xF300, true, true, {} }, // 1229 |
4105 | { "MFAR_EL3" , 0xF305, true, true, {} }, // 1230 |
4106 | { "PMBSR_EL3" , 0xF4D3, true, true, {} }, // 1231 |
4107 | { "TRBSR_EL3" , 0xF4DB, true, true, {} }, // 1232 |
4108 | { "MAIR2_EL3" , 0xF509, true, true, {} }, // 1233 |
4109 | { "MAIR_EL3" , 0xF510, true, true, {} }, // 1234 |
4110 | { "PIR_EL3" , 0xF513, true, true, {} }, // 1235 |
4111 | { "POR_EL3" , 0xF514, true, true, {} }, // 1236 |
4112 | { "AMAIR_EL3" , 0xF518, true, true, {} }, // 1237 |
4113 | { "AMAIR2_EL3" , 0xF519, true, true, {} }, // 1238 |
4114 | { "MPAM3_EL3" , 0xF528, true, true, {AArch64::FeatureMPAM} }, // 1239 |
4115 | { "MPAMBW3_EL3" , 0xF52C, true, true, {} }, // 1240 |
4116 | { "MECID_RL_A_EL3" , 0xF551, true, true, {AArch64::FeatureMEC} }, // 1241 |
4117 | { "VBAR_EL3" , 0xF600, true, true, {} }, // 1242 |
4118 | { "RVBAR_EL3" , 0xF601, true, false, {} }, // 1243 |
4119 | { "RMR_EL3" , 0xF602, true, true, {} }, // 1244 |
4120 | { "VDISR_EL3" , 0xF609, true, true, {} }, // 1245 |
4121 | { "ICC_CTLR_EL3" , 0xF664, true, true, {} }, // 1246 |
4122 | { "ICC_SRE_EL3" , 0xF665, true, true, {} }, // 1247 |
4123 | { "ICC_IGRPEN1_EL3" , 0xF667, true, true, {} }, // 1248 |
4124 | { "TPIDR_EL3" , 0xF682, true, true, {} }, // 1249 |
4125 | { "SCXTNUM_EL3" , 0xF687, true, true, {AArch64::FeatureSpecRestrict} }, // 1250 |
4126 | { "CNTPS_TVAL_EL1" , 0xFF10, true, true, {} }, // 1251 |
4127 | { "CNTPS_CTL_EL1" , 0xFF11, true, true, {} }, // 1252 |
4128 | { "CNTPS_CVAL_EL1" , 0xFF12, true, true, {} }, // 1253 |
4129 | }; |
4130 | |
4131 | llvm::iterator_range<const SysReg *> lookupSysRegByEncoding(uint16_t Encoding) { |
4132 | struct KeyType { |
4133 | uint16_t Encoding; |
4134 | }; |
4135 | KeyType Key = {Encoding}; |
4136 | struct Comp { |
4137 | bool operator()(const SysReg &LHS, const KeyType &RHS) const { |
4138 | if (LHS.Encoding < RHS.Encoding) |
4139 | return true; |
4140 | if (LHS.Encoding > RHS.Encoding) |
4141 | return false; |
4142 | return false; |
4143 | } |
4144 | bool operator()(const KeyType &LHS, const SysReg &RHS) const { |
4145 | if (LHS.Encoding < RHS.Encoding) |
4146 | return true; |
4147 | if (LHS.Encoding > RHS.Encoding) |
4148 | return false; |
4149 | return false; |
4150 | } |
4151 | }; |
4152 | auto Table = ArrayRef(SysRegsList); |
4153 | auto It = std::equal_range(Table.begin(), Table.end(), Key, Comp()); |
4154 | return llvm::make_range(It.first, It.second); |
4155 | } |
4156 | |
4157 | const SysReg *lookupSysRegByName(StringRef Name) { |
4158 | struct IndexType { |
4159 | const char * Name; |
4160 | unsigned _index; |
4161 | }; |
4162 | static const struct IndexType Index[] = { |
4163 | { "ACCDATA_EL1" , 761 }, |
4164 | { "ACTLRALIAS_EL1" , 587 }, |
4165 | { "ACTLRMASK_EL1" , 583 }, |
4166 | { "ACTLRMASK_EL12" , 1163 }, |
4167 | { "ACTLRMASK_EL2" , 954 }, |
4168 | { "ACTLR_EL1" , 572 }, |
4169 | { "ACTLR_EL12" , 1155 }, |
4170 | { "ACTLR_EL2" , 936 }, |
4171 | { "ACTLR_EL3" , 1205 }, |
4172 | { "AFSR0_EL1" , 621 }, |
4173 | { "AFSR0_EL12" , 1176 }, |
4174 | { "AFSR0_EL2" , 992 }, |
4175 | { "AFSR0_EL3" , 1224 }, |
4176 | { "AFSR1_EL1" , 622 }, |
4177 | { "AFSR1_EL12" , 1177 }, |
4178 | { "AFSR1_EL2" , 993 }, |
4179 | { "AFSR1_EL3" , 1225 }, |
4180 | { "AIDR_EL1" , 770 }, |
4181 | { "ALLINT" , 618 }, |
4182 | { "AMAIR2_EL1" , 713 }, |
4183 | { "AMAIR2_EL12" , 1191 }, |
4184 | { "AMAIR2_EL2" , 1045 }, |
4185 | { "AMAIR2_EL3" , 1238 }, |
4186 | { "AMAIR_EL1" , 712 }, |
4187 | { "AMAIR_EL12" , 1190 }, |
4188 | { "AMAIR_EL2" , 1044 }, |
4189 | { "AMAIR_EL3" , 1237 }, |
4190 | { "AMCFGR_EL0" , 810 }, |
4191 | { "AMCG1IDR_EL0" , 815 }, |
4192 | { "AMCGCR_EL0" , 811 }, |
4193 | { "AMCNTENCLR0_EL0" , 813 }, |
4194 | { "AMCNTENCLR1_EL0" , 816 }, |
4195 | { "AMCNTENSET0_EL0" , 814 }, |
4196 | { "AMCNTENSET1_EL0" , 817 }, |
4197 | { "AMCR_EL0" , 809 }, |
4198 | { "AMEVCNTR00_EL0" , 818 }, |
4199 | { "AMEVCNTR01_EL0" , 819 }, |
4200 | { "AMEVCNTR02_EL0" , 820 }, |
4201 | { "AMEVCNTR03_EL0" , 821 }, |
4202 | { "AMEVCNTR10_EL0" , 826 }, |
4203 | { "AMEVCNTR110_EL0" , 836 }, |
4204 | { "AMEVCNTR111_EL0" , 837 }, |
4205 | { "AMEVCNTR112_EL0" , 838 }, |
4206 | { "AMEVCNTR113_EL0" , 839 }, |
4207 | { "AMEVCNTR114_EL0" , 840 }, |
4208 | { "AMEVCNTR115_EL0" , 841 }, |
4209 | { "AMEVCNTR11_EL0" , 827 }, |
4210 | { "AMEVCNTR12_EL0" , 828 }, |
4211 | { "AMEVCNTR13_EL0" , 829 }, |
4212 | { "AMEVCNTR14_EL0" , 830 }, |
4213 | { "AMEVCNTR15_EL0" , 831 }, |
4214 | { "AMEVCNTR16_EL0" , 832 }, |
4215 | { "AMEVCNTR17_EL0" , 833 }, |
4216 | { "AMEVCNTR18_EL0" , 834 }, |
4217 | { "AMEVCNTR19_EL0" , 835 }, |
4218 | { "AMEVCNTVOFF00_EL2" , 1104 }, |
4219 | { "AMEVCNTVOFF010_EL2" , 1114 }, |
4220 | { "AMEVCNTVOFF011_EL2" , 1115 }, |
4221 | { "AMEVCNTVOFF012_EL2" , 1116 }, |
4222 | { "AMEVCNTVOFF013_EL2" , 1117 }, |
4223 | { "AMEVCNTVOFF014_EL2" , 1118 }, |
4224 | { "AMEVCNTVOFF015_EL2" , 1119 }, |
4225 | { "AMEVCNTVOFF01_EL2" , 1105 }, |
4226 | { "AMEVCNTVOFF02_EL2" , 1106 }, |
4227 | { "AMEVCNTVOFF03_EL2" , 1107 }, |
4228 | { "AMEVCNTVOFF04_EL2" , 1108 }, |
4229 | { "AMEVCNTVOFF05_EL2" , 1109 }, |
4230 | { "AMEVCNTVOFF06_EL2" , 1110 }, |
4231 | { "AMEVCNTVOFF07_EL2" , 1111 }, |
4232 | { "AMEVCNTVOFF08_EL2" , 1112 }, |
4233 | { "AMEVCNTVOFF09_EL2" , 1113 }, |
4234 | { "AMEVCNTVOFF10_EL2" , 1120 }, |
4235 | { "AMEVCNTVOFF110_EL2" , 1130 }, |
4236 | { "AMEVCNTVOFF111_EL2" , 1131 }, |
4237 | { "AMEVCNTVOFF112_EL2" , 1132 }, |
4238 | { "AMEVCNTVOFF113_EL2" , 1133 }, |
4239 | { "AMEVCNTVOFF114_EL2" , 1134 }, |
4240 | { "AMEVCNTVOFF115_EL2" , 1135 }, |
4241 | { "AMEVCNTVOFF11_EL2" , 1121 }, |
4242 | { "AMEVCNTVOFF12_EL2" , 1122 }, |
4243 | { "AMEVCNTVOFF13_EL2" , 1123 }, |
4244 | { "AMEVCNTVOFF14_EL2" , 1124 }, |
4245 | { "AMEVCNTVOFF15_EL2" , 1125 }, |
4246 | { "AMEVCNTVOFF16_EL2" , 1126 }, |
4247 | { "AMEVCNTVOFF17_EL2" , 1127 }, |
4248 | { "AMEVCNTVOFF18_EL2" , 1128 }, |
4249 | { "AMEVCNTVOFF19_EL2" , 1129 }, |
4250 | { "AMEVTYPER00_EL0" , 822 }, |
4251 | { "AMEVTYPER01_EL0" , 823 }, |
4252 | { "AMEVTYPER02_EL0" , 824 }, |
4253 | { "AMEVTYPER03_EL0" , 825 }, |
4254 | { "AMEVTYPER10_EL0" , 842 }, |
4255 | { "AMEVTYPER110_EL0" , 852 }, |
4256 | { "AMEVTYPER111_EL0" , 853 }, |
4257 | { "AMEVTYPER112_EL0" , 854 }, |
4258 | { "AMEVTYPER113_EL0" , 855 }, |
4259 | { "AMEVTYPER114_EL0" , 856 }, |
4260 | { "AMEVTYPER115_EL0" , 857 }, |
4261 | { "AMEVTYPER11_EL0" , 843 }, |
4262 | { "AMEVTYPER12_EL0" , 844 }, |
4263 | { "AMEVTYPER13_EL0" , 845 }, |
4264 | { "AMEVTYPER14_EL0" , 846 }, |
4265 | { "AMEVTYPER15_EL0" , 847 }, |
4266 | { "AMEVTYPER16_EL0" , 848 }, |
4267 | { "AMEVTYPER17_EL0" , 849 }, |
4268 | { "AMEVTYPER18_EL0" , 850 }, |
4269 | { "AMEVTYPER19_EL0" , 851 }, |
4270 | { "AMUSERENR_EL0" , 812 }, |
4271 | { "APDAKEYHI_EL1" , 599 }, |
4272 | { "APDAKEYLO_EL1" , 598 }, |
4273 | { "APDBKEYHI_EL1" , 601 }, |
4274 | { "APDBKEYLO_EL1" , 600 }, |
4275 | { "APGAKEYHI_EL1" , 603 }, |
4276 | { "APGAKEYLO_EL1" , 602 }, |
4277 | { "APIAKEYHI_EL1" , 595 }, |
4278 | { "APIAKEYLO_EL1" , 594 }, |
4279 | { "APIBKEYHI_EL1" , 597 }, |
4280 | { "APIBKEYLO_EL1" , 596 }, |
4281 | { "BRBCR_EL1" , 433 }, |
4282 | { "BRBCR_EL12" , 520 }, |
4283 | { "BRBCR_EL2" , 518 }, |
4284 | { "BRBFCR_EL1" , 434 }, |
4285 | { "BRBIDR0_EL1" , 439 }, |
4286 | { "BRBINF0_EL1" , 337 }, |
4287 | { "BRBINF10_EL1" , 397 }, |
4288 | { "BRBINF11_EL1" , 403 }, |
4289 | { "BRBINF12_EL1" , 409 }, |
4290 | { "BRBINF13_EL1" , 415 }, |
4291 | { "BRBINF14_EL1" , 421 }, |
4292 | { "BRBINF15_EL1" , 427 }, |
4293 | { "BRBINF16_EL1" , 340 }, |
4294 | { "BRBINF17_EL1" , 346 }, |
4295 | { "BRBINF18_EL1" , 352 }, |
4296 | { "BRBINF19_EL1" , 358 }, |
4297 | { "BRBINF1_EL1" , 343 }, |
4298 | { "BRBINF20_EL1" , 364 }, |
4299 | { "BRBINF21_EL1" , 370 }, |
4300 | { "BRBINF22_EL1" , 376 }, |
4301 | { "BRBINF23_EL1" , 382 }, |
4302 | { "BRBINF24_EL1" , 388 }, |
4303 | { "BRBINF25_EL1" , 394 }, |
4304 | { "BRBINF26_EL1" , 400 }, |
4305 | { "BRBINF27_EL1" , 406 }, |
4306 | { "BRBINF28_EL1" , 412 }, |
4307 | { "BRBINF29_EL1" , 418 }, |
4308 | { "BRBINF2_EL1" , 349 }, |
4309 | { "BRBINF30_EL1" , 424 }, |
4310 | { "BRBINF31_EL1" , 430 }, |
4311 | { "BRBINF3_EL1" , 355 }, |
4312 | { "BRBINF4_EL1" , 361 }, |
4313 | { "BRBINF5_EL1" , 367 }, |
4314 | { "BRBINF6_EL1" , 373 }, |
4315 | { "BRBINF7_EL1" , 379 }, |
4316 | { "BRBINF8_EL1" , 385 }, |
4317 | { "BRBINF9_EL1" , 391 }, |
4318 | { "BRBINFINJ_EL1" , 436 }, |
4319 | { "BRBSRC0_EL1" , 338 }, |
4320 | { "BRBSRC10_EL1" , 398 }, |
4321 | { "BRBSRC11_EL1" , 404 }, |
4322 | { "BRBSRC12_EL1" , 410 }, |
4323 | { "BRBSRC13_EL1" , 416 }, |
4324 | { "BRBSRC14_EL1" , 422 }, |
4325 | { "BRBSRC15_EL1" , 428 }, |
4326 | { "BRBSRC16_EL1" , 341 }, |
4327 | { "BRBSRC17_EL1" , 347 }, |
4328 | { "BRBSRC18_EL1" , 353 }, |
4329 | { "BRBSRC19_EL1" , 359 }, |
4330 | { "BRBSRC1_EL1" , 344 }, |
4331 | { "BRBSRC20_EL1" , 365 }, |
4332 | { "BRBSRC21_EL1" , 371 }, |
4333 | { "BRBSRC22_EL1" , 377 }, |
4334 | { "BRBSRC23_EL1" , 383 }, |
4335 | { "BRBSRC24_EL1" , 389 }, |
4336 | { "BRBSRC25_EL1" , 395 }, |
4337 | { "BRBSRC26_EL1" , 401 }, |
4338 | { "BRBSRC27_EL1" , 407 }, |
4339 | { "BRBSRC28_EL1" , 413 }, |
4340 | { "BRBSRC29_EL1" , 419 }, |
4341 | { "BRBSRC2_EL1" , 350 }, |
4342 | { "BRBSRC30_EL1" , 425 }, |
4343 | { "BRBSRC31_EL1" , 431 }, |
4344 | { "BRBSRC3_EL1" , 356 }, |
4345 | { "BRBSRC4_EL1" , 362 }, |
4346 | { "BRBSRC5_EL1" , 368 }, |
4347 | { "BRBSRC6_EL1" , 374 }, |
4348 | { "BRBSRC7_EL1" , 380 }, |
4349 | { "BRBSRC8_EL1" , 386 }, |
4350 | { "BRBSRC9_EL1" , 392 }, |
4351 | { "BRBSRCINJ_EL1" , 437 }, |
4352 | { "BRBTGT0_EL1" , 339 }, |
4353 | { "BRBTGT10_EL1" , 399 }, |
4354 | { "BRBTGT11_EL1" , 405 }, |
4355 | { "BRBTGT12_EL1" , 411 }, |
4356 | { "BRBTGT13_EL1" , 417 }, |
4357 | { "BRBTGT14_EL1" , 423 }, |
4358 | { "BRBTGT15_EL1" , 429 }, |
4359 | { "BRBTGT16_EL1" , 342 }, |
4360 | { "BRBTGT17_EL1" , 348 }, |
4361 | { "BRBTGT18_EL1" , 354 }, |
4362 | { "BRBTGT19_EL1" , 360 }, |
4363 | { "BRBTGT1_EL1" , 345 }, |
4364 | { "BRBTGT20_EL1" , 366 }, |
4365 | { "BRBTGT21_EL1" , 372 }, |
4366 | { "BRBTGT22_EL1" , 378 }, |
4367 | { "BRBTGT23_EL1" , 384 }, |
4368 | { "BRBTGT24_EL1" , 390 }, |
4369 | { "BRBTGT25_EL1" , 396 }, |
4370 | { "BRBTGT26_EL1" , 402 }, |
4371 | { "BRBTGT27_EL1" , 408 }, |
4372 | { "BRBTGT28_EL1" , 414 }, |
4373 | { "BRBTGT29_EL1" , 420 }, |
4374 | { "BRBTGT2_EL1" , 351 }, |
4375 | { "BRBTGT30_EL1" , 426 }, |
4376 | { "BRBTGT31_EL1" , 432 }, |
4377 | { "BRBTGT3_EL1" , 357 }, |
4378 | { "BRBTGT4_EL1" , 363 }, |
4379 | { "BRBTGT5_EL1" , 369 }, |
4380 | { "BRBTGT6_EL1" , 375 }, |
4381 | { "BRBTGT7_EL1" , 381 }, |
4382 | { "BRBTGT8_EL1" , 387 }, |
4383 | { "BRBTGT9_EL1" , 393 }, |
4384 | { "BRBTGTINJ_EL1" , 438 }, |
4385 | { "BRBTS_EL1" , 435 }, |
4386 | { "CCSIDR2_EL1" , 767 }, |
4387 | { "CCSIDR_EL1" , 765 }, |
4388 | { "CLIDR_EL1" , 766 }, |
4389 | { "CNTFRQ_EL0" , 858 }, |
4390 | { "CNTHCTL_EL2" , 1141 }, |
4391 | { "CNTHPS_CTL_EL2" , 1152 }, |
4392 | { "CNTHPS_CVAL_EL2" , 1153 }, |
4393 | { "CNTHPS_TVAL_EL2" , 1151 }, |
4394 | { "CNTHP_CTL_EL2" , 1143 }, |
4395 | { "CNTHP_CVAL_EL2" , 1144 }, |
4396 | { "CNTHP_TVAL_EL2" , 1142 }, |
4397 | { "CNTHVS_CTL_EL2" , 1149 }, |
4398 | { "CNTHVS_CVAL_EL2" , 1150 }, |
4399 | { "CNTHVS_TVAL_EL2" , 1148 }, |
4400 | { "CNTHV_CTL_EL2" , 1146 }, |
4401 | { "CNTHV_CVAL_EL2" , 1147 }, |
4402 | { "CNTHV_TVAL_EL2" , 1145 }, |
4403 | { "CNTISCALE_EL2" , 1138 }, |
4404 | { "CNTKCTL_EL1" , 764 }, |
4405 | { "CNTKCTL_EL12" , 1197 }, |
4406 | { "CNTPCTSS_EL0" , 861 }, |
4407 | { "CNTPCT_EL0" , 859 }, |
4408 | { "CNTPOFF_EL2" , 1139 }, |
4409 | { "CNTPS_CTL_EL1" , 1252 }, |
4410 | { "CNTPS_CVAL_EL1" , 1253 }, |
4411 | { "CNTPS_TVAL_EL1" , 1251 }, |
4412 | { "CNTP_CTL_EL0" , 864 }, |
4413 | { "CNTP_CTL_EL02" , 1199 }, |
4414 | { "CNTP_CVAL_EL0" , 865 }, |
4415 | { "CNTP_CVAL_EL02" , 1200 }, |
4416 | { "CNTP_TVAL_EL0" , 863 }, |
4417 | { "CNTP_TVAL_EL02" , 1198 }, |
4418 | { "CNTSCALE_EL2" , 1137 }, |
4419 | { "CNTVCTSS_EL0" , 862 }, |
4420 | { "CNTVCT_EL0" , 860 }, |
4421 | { "CNTVFRQ_EL2" , 1140 }, |
4422 | { "CNTVOFF_EL2" , 1136 }, |
4423 | { "CNTV_CTL_EL0" , 867 }, |
4424 | { "CNTV_CTL_EL02" , 1202 }, |
4425 | { "CNTV_CVAL_EL0" , 868 }, |
4426 | { "CNTV_CVAL_EL02" , 1203 }, |
4427 | { "CNTV_TVAL_EL0" , 866 }, |
4428 | { "CNTV_TVAL_EL02" , 1201 }, |
4429 | { "CONTEXTIDR_EL1" , 758 }, |
4430 | { "CONTEXTIDR_EL12" , 1195 }, |
4431 | { "CONTEXTIDR_EL2" , 1101 }, |
4432 | { "CPACRALIAS_EL1" , 586 }, |
4433 | { "CPACRMASK_EL1" , 584 }, |
4434 | { "CPACRMASK_EL12" , 1164 }, |
4435 | { "CPACR_EL1" , 573 }, |
4436 | { "CPACR_EL12" , 1156 }, |
4437 | { "CPTRMASK_EL2" , 955 }, |
4438 | { "CPTR_EL2" , 940 }, |
4439 | { "CPTR_EL3" , 1209 }, |
4440 | { "CSSELR_EL1" , 771 }, |
4441 | { "CTR_EL0" , 772 }, |
4442 | { "CURRENTEL" , 615 }, |
4443 | { "DACR32_EL2" , 975 }, |
4444 | { "DAIF" , 778 }, |
4445 | { "DBGAUTHSTATUS_EL1" , 78 }, |
4446 | { "DBGBCR0_EL1" , 2 }, |
4447 | { "DBGBCR10_EL1" , 48 }, |
4448 | { "DBGBCR11_EL1" , 52 }, |
4449 | { "DBGBCR12_EL1" , 56 }, |
4450 | { "DBGBCR13_EL1" , 60 }, |
4451 | { "DBGBCR14_EL1" , 64 }, |
4452 | { "DBGBCR15_EL1" , 68 }, |
4453 | { "DBGBCR1_EL1" , 6 }, |
4454 | { "DBGBCR2_EL1" , 12 }, |
4455 | { "DBGBCR3_EL1" , 17 }, |
4456 | { "DBGBCR4_EL1" , 22 }, |
4457 | { "DBGBCR5_EL1" , 27 }, |
4458 | { "DBGBCR6_EL1" , 32 }, |
4459 | { "DBGBCR7_EL1" , 36 }, |
4460 | { "DBGBCR8_EL1" , 40 }, |
4461 | { "DBGBCR9_EL1" , 44 }, |
4462 | { "DBGBVR0_EL1" , 1 }, |
4463 | { "DBGBVR10_EL1" , 47 }, |
4464 | { "DBGBVR11_EL1" , 51 }, |
4465 | { "DBGBVR12_EL1" , 55 }, |
4466 | { "DBGBVR13_EL1" , 59 }, |
4467 | { "DBGBVR14_EL1" , 63 }, |
4468 | { "DBGBVR15_EL1" , 67 }, |
4469 | { "DBGBVR1_EL1" , 5 }, |
4470 | { "DBGBVR2_EL1" , 11 }, |
4471 | { "DBGBVR3_EL1" , 16 }, |
4472 | { "DBGBVR4_EL1" , 21 }, |
4473 | { "DBGBVR5_EL1" , 26 }, |
4474 | { "DBGBVR6_EL1" , 31 }, |
4475 | { "DBGBVR7_EL1" , 35 }, |
4476 | { "DBGBVR8_EL1" , 39 }, |
4477 | { "DBGBVR9_EL1" , 43 }, |
4478 | { "DBGCLAIMCLR_EL1" , 77 }, |
4479 | { "DBGCLAIMSET_EL1" , 76 }, |
4480 | { "DBGDTRRX_EL0" , 444 }, |
4481 | { "DBGDTRTX_EL0" , 445 }, |
4482 | { "DBGDTR_EL0" , 443 }, |
4483 | { "DBGPRCR_EL1" , 75 }, |
4484 | { "DBGVCR32_EL2" , 517 }, |
4485 | { "DBGWCR0_EL1" , 4 }, |
4486 | { "DBGWCR10_EL1" , 50 }, |
4487 | { "DBGWCR11_EL1" , 54 }, |
4488 | { "DBGWCR12_EL1" , 58 }, |
4489 | { "DBGWCR13_EL1" , 62 }, |
4490 | { "DBGWCR14_EL1" , 66 }, |
4491 | { "DBGWCR15_EL1" , 70 }, |
4492 | { "DBGWCR1_EL1" , 8 }, |
4493 | { "DBGWCR2_EL1" , 14 }, |
4494 | { "DBGWCR3_EL1" , 19 }, |
4495 | { "DBGWCR4_EL1" , 24 }, |
4496 | { "DBGWCR5_EL1" , 29 }, |
4497 | { "DBGWCR6_EL1" , 34 }, |
4498 | { "DBGWCR7_EL1" , 38 }, |
4499 | { "DBGWCR8_EL1" , 42 }, |
4500 | { "DBGWCR9_EL1" , 46 }, |
4501 | { "DBGWVR0_EL1" , 3 }, |
4502 | { "DBGWVR10_EL1" , 49 }, |
4503 | { "DBGWVR11_EL1" , 53 }, |
4504 | { "DBGWVR12_EL1" , 57 }, |
4505 | { "DBGWVR13_EL1" , 61 }, |
4506 | { "DBGWVR14_EL1" , 65 }, |
4507 | { "DBGWVR15_EL1" , 69 }, |
4508 | { "DBGWVR1_EL1" , 7 }, |
4509 | { "DBGWVR2_EL1" , 13 }, |
4510 | { "DBGWVR3_EL1" , 18 }, |
4511 | { "DBGWVR4_EL1" , 23 }, |
4512 | { "DBGWVR5_EL1" , 28 }, |
4513 | { "DBGWVR6_EL1" , 33 }, |
4514 | { "DBGWVR7_EL1" , 37 }, |
4515 | { "DBGWVR8_EL1" , 41 }, |
4516 | { "DBGWVR9_EL1" , 45 }, |
4517 | { "DCZID_EL0" , 773 }, |
4518 | { "DISR_EL1" , 731 }, |
4519 | { "DIT" , 780 }, |
4520 | { "DLR_EL0" , 787 }, |
4521 | { "DSPSR_EL0" , 786 }, |
4522 | { "ELR_EL1" , 612 }, |
4523 | { "ELR_EL12" , 1175 }, |
4524 | { "ELR_EL2" , 985 }, |
4525 | { "ELR_EL3" , 1222 }, |
4526 | { "ERRIDR_EL1" , 624 }, |
4527 | { "ERRSELR_EL1" , 625 }, |
4528 | { "ERXADDR_EL1" , 630 }, |
4529 | { "ERXCTLR_EL1" , 628 }, |
4530 | { "ERXFR_EL1" , 627 }, |
4531 | { "ERXGSR_EL1" , 626 }, |
4532 | { "ERXMISC0_EL1" , 634 }, |
4533 | { "ERXMISC1_EL1" , 635 }, |
4534 | { "ERXMISC2_EL1" , 636 }, |
4535 | { "ERXMISC3_EL1" , 637 }, |
4536 | { "ERXPFGCDN_EL1" , 633 }, |
4537 | { "ERXPFGCTL_EL1" , 632 }, |
4538 | { "ERXPFGF_EL1" , 631 }, |
4539 | { "ERXSTATUS_EL1" , 629 }, |
4540 | { "ESR_EL1" , 623 }, |
4541 | { "ESR_EL12" , 1178 }, |
4542 | { "ESR_EL2" , 994 }, |
4543 | { "ESR_EL3" , 1226 }, |
4544 | { "FAR_EL1" , 640 }, |
4545 | { "FAR_EL12" , 1180 }, |
4546 | { "FAR_EL2" , 998 }, |
4547 | { "FAR_EL3" , 1229 }, |
4548 | { "FGWTE3_EL3" , 1210 }, |
4549 | { "FPCR" , 783 }, |
4550 | { "FPEXC32_EL2" , 996 }, |
4551 | { "FPMR" , 785 }, |
4552 | { "FPSR" , 784 }, |
4553 | { "GCR_EL1" , 576 }, |
4554 | { "GCSCRE0_EL1" , 606 }, |
4555 | { "GCSCR_EL1" , 604 }, |
4556 | { "GCSCR_EL12" , 1170 }, |
4557 | { "GCSCR_EL2" , 969 }, |
4558 | { "GCSCR_EL3" , 1219 }, |
4559 | { "GCSPR_EL0" , 776 }, |
4560 | { "GCSPR_EL1" , 605 }, |
4561 | { "GCSPR_EL12" , 1171 }, |
4562 | { "GCSPR_EL2" , 970 }, |
4563 | { "GCSPR_EL3" , 1220 }, |
4564 | { "GMID_EL1" , 768 }, |
4565 | { "GPCBW_EL3" , 1217 }, |
4566 | { "GPCCR_EL3" , 1218 }, |
4567 | { "GPTBR_EL3" , 1216 }, |
4568 | { "HACDBSBR_EL2" , 967 }, |
4569 | { "HACDBSCONS_EL2" , 968 }, |
4570 | { "HACR_EL2" , 945 }, |
4571 | { "HAFGRTR_EL2" , 982 }, |
4572 | { "HCRX_EL2" , 948 }, |
4573 | { "HCR_EL2" , 938 }, |
4574 | { "HDBSSBR_EL2" , 965 }, |
4575 | { "HDBSSPROD_EL2" , 966 }, |
4576 | { "HDFGRTR2_EL2" , 976 }, |
4577 | { "HDFGRTR_EL2" , 980 }, |
4578 | { "HDFGWTR2_EL2" , 977 }, |
4579 | { "HDFGWTR_EL2" , 981 }, |
4580 | { "HFGITR2_EL2" , 983 }, |
4581 | { "HFGITR_EL2" , 944 }, |
4582 | { "HFGRTR2_EL2" , 978 }, |
4583 | { "HFGRTR_EL2" , 942 }, |
4584 | { "HFGWTR2_EL2" , 979 }, |
4585 | { "HFGWTR_EL2" , 943 }, |
4586 | { "HPFAR_EL2" , 999 }, |
4587 | { "HSTR_EL2" , 941 }, |
4588 | { "ICC_AP0R0_EL1" , 736 }, |
4589 | { "ICC_AP0R1_EL1" , 737 }, |
4590 | { "ICC_AP0R2_EL1" , 738 }, |
4591 | { "ICC_AP0R3_EL1" , 739 }, |
4592 | { "ICC_AP1R0_EL1" , 740 }, |
4593 | { "ICC_AP1R1_EL1" , 741 }, |
4594 | { "ICC_AP1R2_EL1" , 742 }, |
4595 | { "ICC_AP1R3_EL1" , 743 }, |
4596 | { "ICC_ASGI1R_EL1" , 748 }, |
4597 | { "ICC_BPR0_EL1" , 735 }, |
4598 | { "ICC_BPR1_EL1" , 753 }, |
4599 | { "ICC_CTLR_EL1" , 754 }, |
4600 | { "ICC_CTLR_EL3" , 1246 }, |
4601 | { "ICC_DIR_EL1" , 745 }, |
4602 | { "ICC_EOIR0_EL1" , 733 }, |
4603 | { "ICC_EOIR1_EL1" , 751 }, |
4604 | { "ICC_HPPIR0_EL1" , 734 }, |
4605 | { "ICC_HPPIR1_EL1" , 752 }, |
4606 | { "ICC_IAR0_EL1" , 732 }, |
4607 | { "ICC_IAR1_EL1" , 750 }, |
4608 | { "ICC_IGRPEN0_EL1" , 756 }, |
4609 | { "ICC_IGRPEN1_EL1" , 757 }, |
4610 | { "ICC_IGRPEN1_EL3" , 1248 }, |
4611 | { "ICC_NMIAR1_EL1" , 744 }, |
4612 | { "ICC_PMR_EL1" , 620 }, |
4613 | { "ICC_RPR_EL1" , 746 }, |
4614 | { "ICC_SGI0R_EL1" , 749 }, |
4615 | { "ICC_SGI1R_EL1" , 747 }, |
4616 | { "ICC_SRE_EL1" , 755 }, |
4617 | { "ICC_SRE_EL2" , 1078 }, |
4618 | { "ICC_SRE_EL3" , 1247 }, |
4619 | { "ICH_AP0R0_EL2" , 1070 }, |
4620 | { "ICH_AP0R1_EL2" , 1071 }, |
4621 | { "ICH_AP0R2_EL2" , 1072 }, |
4622 | { "ICH_AP0R3_EL2" , 1073 }, |
4623 | { "ICH_AP1R0_EL2" , 1074 }, |
4624 | { "ICH_AP1R1_EL2" , 1075 }, |
4625 | { "ICH_AP1R2_EL2" , 1076 }, |
4626 | { "ICH_AP1R3_EL2" , 1077 }, |
4627 | { "ICH_EISR_EL2" , 1082 }, |
4628 | { "ICH_ELRSR_EL2" , 1083 }, |
4629 | { "ICH_HCR_EL2" , 1079 }, |
4630 | { "ICH_LR0_EL2" , 1085 }, |
4631 | { "ICH_LR10_EL2" , 1095 }, |
4632 | { "ICH_LR11_EL2" , 1096 }, |
4633 | { "ICH_LR12_EL2" , 1097 }, |
4634 | { "ICH_LR13_EL2" , 1098 }, |
4635 | { "ICH_LR14_EL2" , 1099 }, |
4636 | { "ICH_LR15_EL2" , 1100 }, |
4637 | { "ICH_LR1_EL2" , 1086 }, |
4638 | { "ICH_LR2_EL2" , 1087 }, |
4639 | { "ICH_LR3_EL2" , 1088 }, |
4640 | { "ICH_LR4_EL2" , 1089 }, |
4641 | { "ICH_LR5_EL2" , 1090 }, |
4642 | { "ICH_LR6_EL2" , 1091 }, |
4643 | { "ICH_LR7_EL2" , 1092 }, |
4644 | { "ICH_LR8_EL2" , 1093 }, |
4645 | { "ICH_LR9_EL2" , 1094 }, |
4646 | { "ICH_MISR_EL2" , 1081 }, |
4647 | { "ICH_VMCR_EL2" , 1084 }, |
4648 | { "ICH_VTR_EL2" , 1080 }, |
4649 | { "ID_AA64AFR0_EL1" , 560 }, |
4650 | { "ID_AA64AFR1_EL1" , 561 }, |
4651 | { "ID_AA64DFR0_EL1" , 557 }, |
4652 | { "ID_AA64DFR1_EL1" , 558 }, |
4653 | { "ID_AA64DFR2_EL1" , 559 }, |
4654 | { "ID_AA64FPFR0_EL1" , 556 }, |
4655 | { "ID_AA64ISAR0_EL1" , 562 }, |
4656 | { "ID_AA64ISAR1_EL1" , 563 }, |
4657 | { "ID_AA64ISAR2_EL1" , 564 }, |
4658 | { "ID_AA64ISAR3_EL1" , 565 }, |
4659 | { "ID_AA64MMFR0_EL1" , 566 }, |
4660 | { "ID_AA64MMFR1_EL1" , 567 }, |
4661 | { "ID_AA64MMFR2_EL1" , 568 }, |
4662 | { "ID_AA64MMFR3_EL1" , 569 }, |
4663 | { "ID_AA64MMFR4_EL1" , 570 }, |
4664 | { "ID_AA64PFR0_EL1" , 551 }, |
4665 | { "ID_AA64PFR1_EL1" , 552 }, |
4666 | { "ID_AA64PFR2_EL1" , 553 }, |
4667 | { "ID_AA64SMFR0_EL1" , 555 }, |
4668 | { "ID_AA64ZFR0_EL1" , 554 }, |
4669 | { "ID_AFR0_EL1" , 532 }, |
4670 | { "ID_DFR0_EL1" , 531 }, |
4671 | { "ID_DFR1_EL1" , 549 }, |
4672 | { "ID_ISAR0_EL1" , 537 }, |
4673 | { "ID_ISAR1_EL1" , 538 }, |
4674 | { "ID_ISAR2_EL1" , 539 }, |
4675 | { "ID_ISAR3_EL1" , 540 }, |
4676 | { "ID_ISAR4_EL1" , 541 }, |
4677 | { "ID_ISAR5_EL1" , 542 }, |
4678 | { "ID_ISAR6_EL1" , 544 }, |
4679 | { "ID_MMFR0_EL1" , 533 }, |
4680 | { "ID_MMFR1_EL1" , 534 }, |
4681 | { "ID_MMFR2_EL1" , 535 }, |
4682 | { "ID_MMFR3_EL1" , 536 }, |
4683 | { "ID_MMFR4_EL1" , 543 }, |
4684 | { "ID_MMFR5_EL1" , 550 }, |
4685 | { "ID_PFR0_EL1" , 529 }, |
4686 | { "ID_PFR1_EL1" , 530 }, |
4687 | { "ID_PFR2_EL1" , 548 }, |
4688 | { "IFSR32_EL2" , 991 }, |
4689 | { "ISR_EL1" , 730 }, |
4690 | { "LORC_EL1" , 717 }, |
4691 | { "LOREA_EL1" , 715 }, |
4692 | { "LORID_EL1" , 720 }, |
4693 | { "LORN_EL1" , 716 }, |
4694 | { "LORSA_EL1" , 714 }, |
4695 | { "MAIR2_EL1" , 707 }, |
4696 | { "MAIR2_EL12" , 1186 }, |
4697 | { "MAIR2_EL2" , 1038 }, |
4698 | { "MAIR2_EL3" , 1233 }, |
4699 | { "MAIR_EL1" , 706 }, |
4700 | { "MAIR_EL12" , 1185 }, |
4701 | { "MAIR_EL2" , 1039 }, |
4702 | { "MAIR_EL3" , 1234 }, |
4703 | { "MDCCINT_EL1" , 9 }, |
4704 | { "MDCCSR_EL0" , 442 }, |
4705 | { "MDCR_EL2" , 939 }, |
4706 | { "MDCR_EL3" , 1213 }, |
4707 | { "MDRAR_EL1" , 71 }, |
4708 | { "MDSCR_EL1" , 10 }, |
4709 | { "MDSELR_EL1" , 20 }, |
4710 | { "MDSTEPOP_EL1" , 25 }, |
4711 | { "MECIDR_EL2" , 1063 }, |
4712 | { "MECID_A0_EL2" , 1060 }, |
4713 | { "MECID_A1_EL2" , 1062 }, |
4714 | { "MECID_P0_EL2" , 1059 }, |
4715 | { "MECID_P1_EL2" , 1061 }, |
4716 | { "MECID_RL_A_EL3" , 1241 }, |
4717 | { "MFAR_EL3" , 1230 }, |
4718 | { "MIDR_EL1" , 525 }, |
4719 | { "MPAM0_EL1" , 722 }, |
4720 | { "MPAM1_EL1" , 721 }, |
4721 | { "MPAM1_EL12" , 1192 }, |
4722 | { "MPAM2_EL2" , 1048 }, |
4723 | { "MPAM3_EL3" , 1239 }, |
4724 | { "MPAMBW0_EL1" , 725 }, |
4725 | { "MPAMBW1_EL1" , 724 }, |
4726 | { "MPAMBW1_EL12" , 1193 }, |
4727 | { "MPAMBW2_EL2" , 1049 }, |
4728 | { "MPAMBW3_EL3" , 1240 }, |
4729 | { "MPAMBWCAP_EL2" , 1050 }, |
4730 | { "MPAMBWIDR_EL1" , 719 }, |
4731 | { "MPAMBWSM_EL1" , 726 }, |
4732 | { "MPAMHCR_EL2" , 1046 }, |
4733 | { "MPAMIDR_EL1" , 718 }, |
4734 | { "MPAMSM_EL1" , 723 }, |
4735 | { "MPAMVPM0_EL2" , 1051 }, |
4736 | { "MPAMVPM1_EL2" , 1052 }, |
4737 | { "MPAMVPM2_EL2" , 1053 }, |
4738 | { "MPAMVPM3_EL2" , 1054 }, |
4739 | { "MPAMVPM4_EL2" , 1055 }, |
4740 | { "MPAMVPM5_EL2" , 1056 }, |
4741 | { "MPAMVPM6_EL2" , 1057 }, |
4742 | { "MPAMVPM7_EL2" , 1058 }, |
4743 | { "MPAMVPMV_EL2" , 1047 }, |
4744 | { "MPIDR_EL1" , 527 }, |
4745 | { "MPUIR_EL1" , 526 }, |
4746 | { "MPUIR_EL2" , 933 }, |
4747 | { "MVFR0_EL1" , 545 }, |
4748 | { "MVFR1_EL1" , 546 }, |
4749 | { "MVFR2_EL1" , 547 }, |
4750 | { "NZCV" , 777 }, |
4751 | { "OSDLR_EL1" , 74 }, |
4752 | { "OSDTRRX_EL1" , 0 }, |
4753 | { "OSDTRTX_EL1" , 15 }, |
4754 | { "OSECCR_EL1" , 30 }, |
4755 | { "OSLAR_EL1" , 72 }, |
4756 | { "OSLSR_EL1" , 73 }, |
4757 | { "PAN" , 616 }, |
4758 | { "PAR_EL1" , 676 }, |
4759 | { "PFAR_EL1" , 641 }, |
4760 | { "PFAR_EL12" , 1181 }, |
4761 | { "PFAR_EL2" , 1000 }, |
4762 | { "PIRE0_EL1" , 708 }, |
4763 | { "PIRE0_EL12" , 1187 }, |
4764 | { "PIRE0_EL2" , 1040 }, |
4765 | { "PIR_EL1" , 709 }, |
4766 | { "PIR_EL12" , 1188 }, |
4767 | { "PIR_EL2" , 1041 }, |
4768 | { "PIR_EL3" , 1235 }, |
4769 | { "PM" , 619 }, |
4770 | { "PMBIDR_EL1" , 690 }, |
4771 | { "PMBLIMITR_EL1" , 685 }, |
4772 | { "PMBMAR_EL1" , 689 }, |
4773 | { "PMBPTR_EL1" , 686 }, |
4774 | { "PMBSR_EL1" , 687 }, |
4775 | { "PMBSR_EL12" , 1183 }, |
4776 | { "PMBSR_EL2" , 1036 }, |
4777 | { "PMBSR_EL3" , 1231 }, |
4778 | { "PMCCFILTR_EL0" , 931 }, |
4779 | { "PMCCNTR_EL0" , 798 }, |
4780 | { "PMCCNTSVR_EL1" , 119 }, |
4781 | { "PMCEID0_EL0" , 796 }, |
4782 | { "PMCEID1_EL0" , 797 }, |
4783 | { "PMCNTENCLR_EL0" , 792 }, |
4784 | { "PMCNTENSET_EL0" , 791 }, |
4785 | { "PMCR_EL0" , 790 }, |
4786 | { "PMECR_EL1" , 703 }, |
4787 | { "PMEVCNTR0_EL0" , 869 }, |
4788 | { "PMEVCNTR10_EL0" , 879 }, |
4789 | { "PMEVCNTR11_EL0" , 880 }, |
4790 | { "PMEVCNTR12_EL0" , 881 }, |
4791 | { "PMEVCNTR13_EL0" , 882 }, |
4792 | { "PMEVCNTR14_EL0" , 883 }, |
4793 | { "PMEVCNTR15_EL0" , 884 }, |
4794 | { "PMEVCNTR16_EL0" , 885 }, |
4795 | { "PMEVCNTR17_EL0" , 886 }, |
4796 | { "PMEVCNTR18_EL0" , 887 }, |
4797 | { "PMEVCNTR19_EL0" , 888 }, |
4798 | { "PMEVCNTR1_EL0" , 870 }, |
4799 | { "PMEVCNTR20_EL0" , 889 }, |
4800 | { "PMEVCNTR21_EL0" , 890 }, |
4801 | { "PMEVCNTR22_EL0" , 891 }, |
4802 | { "PMEVCNTR23_EL0" , 892 }, |
4803 | { "PMEVCNTR24_EL0" , 893 }, |
4804 | { "PMEVCNTR25_EL0" , 894 }, |
4805 | { "PMEVCNTR26_EL0" , 895 }, |
4806 | { "PMEVCNTR27_EL0" , 896 }, |
4807 | { "PMEVCNTR28_EL0" , 897 }, |
4808 | { "PMEVCNTR29_EL0" , 898 }, |
4809 | { "PMEVCNTR2_EL0" , 871 }, |
4810 | { "PMEVCNTR30_EL0" , 899 }, |
4811 | { "PMEVCNTR3_EL0" , 872 }, |
4812 | { "PMEVCNTR4_EL0" , 873 }, |
4813 | { "PMEVCNTR5_EL0" , 874 }, |
4814 | { "PMEVCNTR6_EL0" , 875 }, |
4815 | { "PMEVCNTR7_EL0" , 876 }, |
4816 | { "PMEVCNTR8_EL0" , 877 }, |
4817 | { "PMEVCNTR9_EL0" , 878 }, |
4818 | { "PMEVCNTSVR0_EL1" , 88 }, |
4819 | { "PMEVCNTSVR10_EL1" , 98 }, |
4820 | { "PMEVCNTSVR11_EL1" , 99 }, |
4821 | { "PMEVCNTSVR12_EL1" , 100 }, |
4822 | { "PMEVCNTSVR13_EL1" , 101 }, |
4823 | { "PMEVCNTSVR14_EL1" , 102 }, |
4824 | { "PMEVCNTSVR15_EL1" , 103 }, |
4825 | { "PMEVCNTSVR16_EL1" , 104 }, |
4826 | { "PMEVCNTSVR17_EL1" , 105 }, |
4827 | { "PMEVCNTSVR18_EL1" , 106 }, |
4828 | { "PMEVCNTSVR19_EL1" , 107 }, |
4829 | { "PMEVCNTSVR1_EL1" , 89 }, |
4830 | { "PMEVCNTSVR20_EL1" , 108 }, |
4831 | { "PMEVCNTSVR21_EL1" , 109 }, |
4832 | { "PMEVCNTSVR22_EL1" , 110 }, |
4833 | { "PMEVCNTSVR23_EL1" , 111 }, |
4834 | { "PMEVCNTSVR24_EL1" , 112 }, |
4835 | { "PMEVCNTSVR25_EL1" , 113 }, |
4836 | { "PMEVCNTSVR26_EL1" , 114 }, |
4837 | { "PMEVCNTSVR27_EL1" , 115 }, |
4838 | { "PMEVCNTSVR28_EL1" , 116 }, |
4839 | { "PMEVCNTSVR29_EL1" , 117 }, |
4840 | { "PMEVCNTSVR2_EL1" , 90 }, |
4841 | { "PMEVCNTSVR30_EL1" , 118 }, |
4842 | { "PMEVCNTSVR3_EL1" , 91 }, |
4843 | { "PMEVCNTSVR4_EL1" , 92 }, |
4844 | { "PMEVCNTSVR5_EL1" , 93 }, |
4845 | { "PMEVCNTSVR6_EL1" , 94 }, |
4846 | { "PMEVCNTSVR7_EL1" , 95 }, |
4847 | { "PMEVCNTSVR8_EL1" , 96 }, |
4848 | { "PMEVCNTSVR9_EL1" , 97 }, |
4849 | { "PMEVTYPER0_EL0" , 900 }, |
4850 | { "PMEVTYPER10_EL0" , 910 }, |
4851 | { "PMEVTYPER11_EL0" , 911 }, |
4852 | { "PMEVTYPER12_EL0" , 912 }, |
4853 | { "PMEVTYPER13_EL0" , 913 }, |
4854 | { "PMEVTYPER14_EL0" , 914 }, |
4855 | { "PMEVTYPER15_EL0" , 915 }, |
4856 | { "PMEVTYPER16_EL0" , 916 }, |
4857 | { "PMEVTYPER17_EL0" , 917 }, |
4858 | { "PMEVTYPER18_EL0" , 918 }, |
4859 | { "PMEVTYPER19_EL0" , 919 }, |
4860 | { "PMEVTYPER1_EL0" , 901 }, |
4861 | { "PMEVTYPER20_EL0" , 920 }, |
4862 | { "PMEVTYPER21_EL0" , 921 }, |
4863 | { "PMEVTYPER22_EL0" , 922 }, |
4864 | { "PMEVTYPER23_EL0" , 923 }, |
4865 | { "PMEVTYPER24_EL0" , 924 }, |
4866 | { "PMEVTYPER25_EL0" , 925 }, |
4867 | { "PMEVTYPER26_EL0" , 926 }, |
4868 | { "PMEVTYPER27_EL0" , 927 }, |
4869 | { "PMEVTYPER28_EL0" , 928 }, |
4870 | { "PMEVTYPER29_EL0" , 929 }, |
4871 | { "PMEVTYPER2_EL0" , 902 }, |
4872 | { "PMEVTYPER30_EL0" , 930 }, |
4873 | { "PMEVTYPER3_EL0" , 903 }, |
4874 | { "PMEVTYPER4_EL0" , 904 }, |
4875 | { "PMEVTYPER5_EL0" , 905 }, |
4876 | { "PMEVTYPER6_EL0" , 906 }, |
4877 | { "PMEVTYPER7_EL0" , 907 }, |
4878 | { "PMEVTYPER8_EL0" , 908 }, |
4879 | { "PMEVTYPER9_EL0" , 909 }, |
4880 | { "PMIAR_EL1" , 705 }, |
4881 | { "PMICFILTR_EL0" , 789 }, |
4882 | { "PMICNTR_EL0" , 788 }, |
4883 | { "PMICNTSVR_EL1" , 120 }, |
4884 | { "PMINTENCLR_EL1" , 701 }, |
4885 | { "PMINTENSET_EL1" , 700 }, |
4886 | { "PMMIR_EL1" , 704 }, |
4887 | { "PMOVSCLR_EL0" , 793 }, |
4888 | { "PMOVSSET_EL0" , 803 }, |
4889 | { "PMSCR_EL1" , 677 }, |
4890 | { "PMSCR_EL12" , 1182 }, |
4891 | { "PMSCR_EL2" , 1035 }, |
4892 | { "PMSDSFR_EL1" , 688 }, |
4893 | { "PMSELR_EL0" , 795 }, |
4894 | { "PMSEVFR_EL1" , 682 }, |
4895 | { "PMSFCR_EL1" , 681 }, |
4896 | { "PMSICR_EL1" , 679 }, |
4897 | { "PMSIDR_EL1" , 684 }, |
4898 | { "PMSIRR_EL1" , 680 }, |
4899 | { "PMSLATFR_EL1" , 683 }, |
4900 | { "PMSNEVFR_EL1" , 678 }, |
4901 | { "PMSSCR_EL1" , 699 }, |
4902 | { "PMSWINC_EL0" , 794 }, |
4903 | { "PMUACR_EL1" , 702 }, |
4904 | { "PMUSERENR_EL0" , 802 }, |
4905 | { "PMXEVCNTR_EL0" , 800 }, |
4906 | { "PMXEVTYPER_EL0" , 799 }, |
4907 | { "PMZR_EL0" , 801 }, |
4908 | { "POR_EL0" , 804 }, |
4909 | { "POR_EL1" , 710 }, |
4910 | { "POR_EL12" , 1189 }, |
4911 | { "POR_EL2" , 1042 }, |
4912 | { "POR_EL3" , 1236 }, |
4913 | { "PRBAR10_EL1" , 664 }, |
4914 | { "PRBAR10_EL2" , 1023 }, |
4915 | { "PRBAR11_EL1" , 666 }, |
4916 | { "PRBAR11_EL2" , 1025 }, |
4917 | { "PRBAR12_EL1" , 668 }, |
4918 | { "PRBAR12_EL2" , 1027 }, |
4919 | { "PRBAR13_EL1" , 670 }, |
4920 | { "PRBAR13_EL2" , 1029 }, |
4921 | { "PRBAR14_EL1" , 672 }, |
4922 | { "PRBAR14_EL2" , 1031 }, |
4923 | { "PRBAR15_EL1" , 674 }, |
4924 | { "PRBAR15_EL2" , 1033 }, |
4925 | { "PRBAR1_EL1" , 646 }, |
4926 | { "PRBAR1_EL2" , 1005 }, |
4927 | { "PRBAR2_EL1" , 648 }, |
4928 | { "PRBAR2_EL2" , 1007 }, |
4929 | { "PRBAR3_EL1" , 650 }, |
4930 | { "PRBAR3_EL2" , 1009 }, |
4931 | { "PRBAR4_EL1" , 652 }, |
4932 | { "PRBAR4_EL2" , 1011 }, |
4933 | { "PRBAR5_EL1" , 654 }, |
4934 | { "PRBAR5_EL2" , 1013 }, |
4935 | { "PRBAR6_EL1" , 656 }, |
4936 | { "PRBAR6_EL2" , 1015 }, |
4937 | { "PRBAR7_EL1" , 658 }, |
4938 | { "PRBAR7_EL2" , 1017 }, |
4939 | { "PRBAR8_EL1" , 660 }, |
4940 | { "PRBAR8_EL2" , 1019 }, |
4941 | { "PRBAR9_EL1" , 662 }, |
4942 | { "PRBAR9_EL2" , 1021 }, |
4943 | { "PRBAR_EL1" , 644 }, |
4944 | { "PRBAR_EL2" , 1003 }, |
4945 | { "PRENR_EL1" , 642 }, |
4946 | { "PRENR_EL2" , 1001 }, |
4947 | { "PRLAR10_EL1" , 665 }, |
4948 | { "PRLAR10_EL2" , 1024 }, |
4949 | { "PRLAR11_EL1" , 667 }, |
4950 | { "PRLAR11_EL2" , 1026 }, |
4951 | { "PRLAR12_EL1" , 669 }, |
4952 | { "PRLAR12_EL2" , 1028 }, |
4953 | { "PRLAR13_EL1" , 671 }, |
4954 | { "PRLAR13_EL2" , 1030 }, |
4955 | { "PRLAR14_EL1" , 673 }, |
4956 | { "PRLAR14_EL2" , 1032 }, |
4957 | { "PRLAR15_EL1" , 675 }, |
4958 | { "PRLAR15_EL2" , 1034 }, |
4959 | { "PRLAR1_EL1" , 647 }, |
4960 | { "PRLAR1_EL2" , 1006 }, |
4961 | { "PRLAR2_EL1" , 649 }, |
4962 | { "PRLAR2_EL2" , 1008 }, |
4963 | { "PRLAR3_EL1" , 651 }, |
4964 | { "PRLAR3_EL2" , 1010 }, |
4965 | { "PRLAR4_EL1" , 653 }, |
4966 | { "PRLAR4_EL2" , 1012 }, |
4967 | { "PRLAR5_EL1" , 655 }, |
4968 | { "PRLAR5_EL2" , 1014 }, |
4969 | { "PRLAR6_EL1" , 657 }, |
4970 | { "PRLAR6_EL2" , 1016 }, |
4971 | { "PRLAR7_EL1" , 659 }, |
4972 | { "PRLAR7_EL2" , 1018 }, |
4973 | { "PRLAR8_EL1" , 661 }, |
4974 | { "PRLAR8_EL2" , 1020 }, |
4975 | { "PRLAR9_EL1" , 663 }, |
4976 | { "PRLAR9_EL2" , 1022 }, |
4977 | { "PRLAR_EL1" , 645 }, |
4978 | { "PRLAR_EL2" , 1004 }, |
4979 | { "PRSELR_EL1" , 643 }, |
4980 | { "PRSELR_EL2" , 1002 }, |
4981 | { "RCWMASK_EL1" , 762 }, |
4982 | { "RCWSMASK_EL1" , 759 }, |
4983 | { "REVIDR_EL1" , 528 }, |
4984 | { "RGSR_EL1" , 575 }, |
4985 | { "RMR_EL1" , 729 }, |
4986 | { "RMR_EL2" , 1068 }, |
4987 | { "RMR_EL3" , 1244 }, |
4988 | { "RNDR" , 774 }, |
4989 | { "RNDRRS" , 775 }, |
4990 | { "RVBAR_EL1" , 728 }, |
4991 | { "RVBAR_EL2" , 1067 }, |
4992 | { "RVBAR_EL3" , 1243 }, |
4993 | { "S2PIR_EL2" , 1043 }, |
4994 | { "S2POR_EL1" , 711 }, |
4995 | { "SCR_EL3" , 1207 }, |
4996 | { "SCTLR2ALIAS_EL1" , 589 }, |
4997 | { "SCTLR2MASK_EL1" , 585 }, |
4998 | { "SCTLR2MASK_EL12" , 1165 }, |
4999 | { "SCTLR2MASK_EL2" , 956 }, |
5000 | { "SCTLR2_EL1" , 574 }, |
5001 | { "SCTLR2_EL12" , 1157 }, |
5002 | { "SCTLR2_EL2" , 937 }, |
5003 | { "SCTLR2_EL3" , 1206 }, |
5004 | { "SCTLRALIAS_EL1" , 588 }, |
5005 | { "SCTLRMASK_EL1" , 582 }, |
5006 | { "SCTLRMASK_EL12" , 1162 }, |
5007 | { "SCTLRMASK_EL2" , 953 }, |
5008 | { "SCTLR_EL1" , 571 }, |
5009 | { "SCTLR_EL12" , 1154 }, |
5010 | { "SCTLR_EL2" , 935 }, |
5011 | { "SCTLR_EL3" , 1204 }, |
5012 | { "SCXTNUM_EL0" , 808 }, |
5013 | { "SCXTNUM_EL1" , 763 }, |
5014 | { "SCXTNUM_EL12" , 1196 }, |
5015 | { "SCXTNUM_EL2" , 1103 }, |
5016 | { "SCXTNUM_EL3" , 1250 }, |
5017 | { "SDER32_EL2" , 952 }, |
5018 | { "SDER32_EL3" , 1208 }, |
5019 | { "SMCR_EL1" , 581 }, |
5020 | { "SMCR_EL12" , 1161 }, |
5021 | { "SMCR_EL2" , 951 }, |
5022 | { "SMCR_EL3" , 1212 }, |
5023 | { "SMIDR_EL1" , 769 }, |
5024 | { "SMPRIMAP_EL2" , 950 }, |
5025 | { "SMPRI_EL1" , 580 }, |
5026 | { "SPMACCESSR_EL1" , 81 }, |
5027 | { "SPMACCESSR_EL12" , 521 }, |
5028 | { "SPMACCESSR_EL2" , 519 }, |
5029 | { "SPMACCESSR_EL3" , 522 }, |
5030 | { "SPMCFGR_EL1" , 85 }, |
5031 | { "SPMCGCR0_EL1" , 79 }, |
5032 | { "SPMCGCR1_EL1" , 80 }, |
5033 | { "SPMCNTENCLR_EL0" , 448 }, |
5034 | { "SPMCNTENSET_EL0" , 447 }, |
5035 | { "SPMCR_EL0" , 446 }, |
5036 | { "SPMDEVAFF_EL1" , 84 }, |
5037 | { "SPMDEVARCH_EL1" , 83 }, |
5038 | { "SPMEVCNTR0_EL0" , 453 }, |
5039 | { "SPMEVCNTR10_EL0" , 463 }, |
5040 | { "SPMEVCNTR11_EL0" , 464 }, |
5041 | { "SPMEVCNTR12_EL0" , 465 }, |
5042 | { "SPMEVCNTR13_EL0" , 466 }, |
5043 | { "SPMEVCNTR14_EL0" , 467 }, |
5044 | { "SPMEVCNTR15_EL0" , 468 }, |
5045 | { "SPMEVCNTR1_EL0" , 454 }, |
5046 | { "SPMEVCNTR2_EL0" , 455 }, |
5047 | { "SPMEVCNTR3_EL0" , 456 }, |
5048 | { "SPMEVCNTR4_EL0" , 457 }, |
5049 | { "SPMEVCNTR5_EL0" , 458 }, |
5050 | { "SPMEVCNTR6_EL0" , 459 }, |
5051 | { "SPMEVCNTR7_EL0" , 460 }, |
5052 | { "SPMEVCNTR8_EL0" , 461 }, |
5053 | { "SPMEVCNTR9_EL0" , 462 }, |
5054 | { "SPMEVFILT2R0_EL0" , 501 }, |
5055 | { "SPMEVFILT2R10_EL0" , 511 }, |
5056 | { "SPMEVFILT2R11_EL0" , 512 }, |
5057 | { "SPMEVFILT2R12_EL0" , 513 }, |
5058 | { "SPMEVFILT2R13_EL0" , 514 }, |
5059 | { "SPMEVFILT2R14_EL0" , 515 }, |
5060 | { "SPMEVFILT2R15_EL0" , 516 }, |
5061 | { "SPMEVFILT2R1_EL0" , 502 }, |
5062 | { "SPMEVFILT2R2_EL0" , 503 }, |
5063 | { "SPMEVFILT2R3_EL0" , 504 }, |
5064 | { "SPMEVFILT2R4_EL0" , 505 }, |
5065 | { "SPMEVFILT2R5_EL0" , 506 }, |
5066 | { "SPMEVFILT2R6_EL0" , 507 }, |
5067 | { "SPMEVFILT2R7_EL0" , 508 }, |
5068 | { "SPMEVFILT2R8_EL0" , 509 }, |
5069 | { "SPMEVFILT2R9_EL0" , 510 }, |
5070 | { "SPMEVFILTR0_EL0" , 485 }, |
5071 | { "SPMEVFILTR10_EL0" , 495 }, |
5072 | { "SPMEVFILTR11_EL0" , 496 }, |
5073 | { "SPMEVFILTR12_EL0" , 497 }, |
5074 | { "SPMEVFILTR13_EL0" , 498 }, |
5075 | { "SPMEVFILTR14_EL0" , 499 }, |
5076 | { "SPMEVFILTR15_EL0" , 500 }, |
5077 | { "SPMEVFILTR1_EL0" , 486 }, |
5078 | { "SPMEVFILTR2_EL0" , 487 }, |
5079 | { "SPMEVFILTR3_EL0" , 488 }, |
5080 | { "SPMEVFILTR4_EL0" , 489 }, |
5081 | { "SPMEVFILTR5_EL0" , 490 }, |
5082 | { "SPMEVFILTR6_EL0" , 491 }, |
5083 | { "SPMEVFILTR7_EL0" , 492 }, |
5084 | { "SPMEVFILTR8_EL0" , 493 }, |
5085 | { "SPMEVFILTR9_EL0" , 494 }, |
5086 | { "SPMEVTYPER0_EL0" , 469 }, |
5087 | { "SPMEVTYPER10_EL0" , 479 }, |
5088 | { "SPMEVTYPER11_EL0" , 480 }, |
5089 | { "SPMEVTYPER12_EL0" , 481 }, |
5090 | { "SPMEVTYPER13_EL0" , 482 }, |
5091 | { "SPMEVTYPER14_EL0" , 483 }, |
5092 | { "SPMEVTYPER15_EL0" , 484 }, |
5093 | { "SPMEVTYPER1_EL0" , 470 }, |
5094 | { "SPMEVTYPER2_EL0" , 471 }, |
5095 | { "SPMEVTYPER3_EL0" , 472 }, |
5096 | { "SPMEVTYPER4_EL0" , 473 }, |
5097 | { "SPMEVTYPER5_EL0" , 474 }, |
5098 | { "SPMEVTYPER6_EL0" , 475 }, |
5099 | { "SPMEVTYPER7_EL0" , 476 }, |
5100 | { "SPMEVTYPER8_EL0" , 477 }, |
5101 | { "SPMEVTYPER9_EL0" , 478 }, |
5102 | { "SPMIIDR_EL1" , 82 }, |
5103 | { "SPMINTENCLR_EL1" , 87 }, |
5104 | { "SPMINTENSET_EL1" , 86 }, |
5105 | { "SPMOVSCLR_EL0" , 449 }, |
5106 | { "SPMOVSSET_EL0" , 452 }, |
5107 | { "SPMROOTCR_EL3" , 523 }, |
5108 | { "SPMSCR_EL1" , 524 }, |
5109 | { "SPMSELR_EL0" , 451 }, |
5110 | { "SPMZR_EL0" , 450 }, |
5111 | { "SPSEL" , 614 }, |
5112 | { "SPSR_ABT" , 988 }, |
5113 | { "SPSR_EL1" , 611 }, |
5114 | { "SPSR_EL12" , 1174 }, |
5115 | { "SPSR_EL2" , 984 }, |
5116 | { "SPSR_EL3" , 1221 }, |
5117 | { "SPSR_FIQ" , 990 }, |
5118 | { "SPSR_IRQ" , 987 }, |
5119 | { "SPSR_UND" , 989 }, |
5120 | { "SP_EL0" , 613 }, |
5121 | { "SP_EL1" , 986 }, |
5122 | { "SP_EL2" , 1223 }, |
5123 | { "SSBS" , 781 }, |
5124 | { "SVCR" , 779 }, |
5125 | { "TCO" , 782 }, |
5126 | { "TCR2ALIAS_EL1" , 610 }, |
5127 | { "TCR2MASK_EL1" , 608 }, |
5128 | { "TCR2MASK_EL12" , 1173 }, |
5129 | { "TCR2MASK_EL2" , 974 }, |
5130 | { "TCR2_EL1" , 593 }, |
5131 | { "TCR2_EL12" , 1169 }, |
5132 | { "TCR2_EL2" , 961 }, |
5133 | { "TCRALIAS_EL1" , 609 }, |
5134 | { "TCRMASK_EL1" , 607 }, |
5135 | { "TCRMASK_EL12" , 1172 }, |
5136 | { "TCRMASK_EL2" , 973 }, |
5137 | { "TCR_EL1" , 592 }, |
5138 | { "TCR_EL12" , 1168 }, |
5139 | { "TCR_EL2" , 960 }, |
5140 | { "TCR_EL3" , 1215 }, |
5141 | { "TEECR32_EL1" , 440 }, |
5142 | { "TEEHBR32_EL1" , 441 }, |
5143 | { "TFSRE0_EL1" , 639 }, |
5144 | { "TFSR_EL1" , 638 }, |
5145 | { "TFSR_EL12" , 1179 }, |
5146 | { "TFSR_EL2" , 997 }, |
5147 | { "TFSR_EL3" , 1228 }, |
5148 | { "TPIDR2_EL0" , 807 }, |
5149 | { "TPIDRRO_EL0" , 806 }, |
5150 | { "TPIDR_EL0" , 805 }, |
5151 | { "TPIDR_EL1" , 760 }, |
5152 | { "TPIDR_EL2" , 1102 }, |
5153 | { "TPIDR_EL3" , 1249 }, |
5154 | { "TRBBASER_EL1" , 693 }, |
5155 | { "TRBIDR_EL1" , 698 }, |
5156 | { "TRBLIMITR_EL1" , 691 }, |
5157 | { "TRBMAR_EL1" , 695 }, |
5158 | { "TRBMPAM_EL1" , 696 }, |
5159 | { "TRBPTR_EL1" , 692 }, |
5160 | { "TRBSR_EL1" , 694 }, |
5161 | { "TRBSR_EL12" , 1184 }, |
5162 | { "TRBSR_EL2" , 1037 }, |
5163 | { "TRBSR_EL3" , 1232 }, |
5164 | { "TRBTRG_EL1" , 697 }, |
5165 | { "TRCACATR0" , 248 }, |
5166 | { "TRCACATR1" , 256 }, |
5167 | { "TRCACATR10" , 261 }, |
5168 | { "TRCACATR11" , 269 }, |
5169 | { "TRCACATR12" , 273 }, |
5170 | { "TRCACATR13" , 281 }, |
5171 | { "TRCACATR14" , 285 }, |
5172 | { "TRCACATR15" , 293 }, |
5173 | { "TRCACATR2" , 260 }, |
5174 | { "TRCACATR3" , 268 }, |
5175 | { "TRCACATR4" , 272 }, |
5176 | { "TRCACATR5" , 280 }, |
5177 | { "TRCACATR6" , 284 }, |
5178 | { "TRCACATR7" , 292 }, |
5179 | { "TRCACATR8" , 249 }, |
5180 | { "TRCACATR9" , 257 }, |
5181 | { "TRCACVR0" , 246 }, |
5182 | { "TRCACVR1" , 254 }, |
5183 | { "TRCACVR10" , 259 }, |
5184 | { "TRCACVR11" , 267 }, |
5185 | { "TRCACVR12" , 271 }, |
5186 | { "TRCACVR13" , 279 }, |
5187 | { "TRCACVR14" , 283 }, |
5188 | { "TRCACVR15" , 291 }, |
5189 | { "TRCACVR2" , 258 }, |
5190 | { "TRCACVR3" , 266 }, |
5191 | { "TRCACVR4" , 270 }, |
5192 | { "TRCACVR5" , 278 }, |
5193 | { "TRCACVR6" , 282 }, |
5194 | { "TRCACVR7" , 290 }, |
5195 | { "TRCACVR8" , 247 }, |
5196 | { "TRCACVR9" , 255 }, |
5197 | { "TRCAUTHSTATUS" , 333 }, |
5198 | { "TRCAUXCTLR" , 153 }, |
5199 | { "TRCBBCTLR" , 186 }, |
5200 | { "TRCCCCTLR" , 184 }, |
5201 | { "TRCCIDCCTLR0" , 296 }, |
5202 | { "TRCCIDCCTLR1" , 297 }, |
5203 | { "TRCCIDCVR0" , 294 }, |
5204 | { "TRCCIDCVR1" , 298 }, |
5205 | { "TRCCIDCVR2" , 302 }, |
5206 | { "TRCCIDCVR3" , 304 }, |
5207 | { "TRCCIDCVR4" , 306 }, |
5208 | { "TRCCIDCVR5" , 308 }, |
5209 | { "TRCCIDCVR6" , 310 }, |
5210 | { "TRCCIDCVR7" , 312 }, |
5211 | { "TRCCIDR0" , 330 }, |
5212 | { "TRCCIDR1" , 332 }, |
5213 | { "TRCCIDR2" , 334 }, |
5214 | { "TRCCIDR3" , 336 }, |
5215 | { "TRCCLAIMCLR" , 323 }, |
5216 | { "TRCCLAIMSET" , 321 }, |
5217 | { "TRCCNTCTLR0" , 147 }, |
5218 | { "TRCCNTCTLR1" , 150 }, |
5219 | { "TRCCNTCTLR2" , 155 }, |
5220 | { "TRCCNTCTLR3" , 158 }, |
5221 | { "TRCCNTRLDVR0" , 124 }, |
5222 | { "TRCCNTRLDVR1" , 131 }, |
5223 | { "TRCCNTRLDVR2" , 138 }, |
5224 | { "TRCCNTRLDVR3" , 143 }, |
5225 | { "TRCCNTVR0" , 164 }, |
5226 | { "TRCCNTVR1" , 169 }, |
5227 | { "TRCCNTVR2" , 174 }, |
5228 | { "TRCCNTVR3" , 178 }, |
5229 | { "TRCCONFIGR" , 146 }, |
5230 | { "TRCDEVAFF0" , 325 }, |
5231 | { "TRCDEVAFF1" , 327 }, |
5232 | { "TRCDEVARCH" , 335 }, |
5233 | { "TRCDEVID" , 315 }, |
5234 | { "TRCDEVTYPE" , 316 }, |
5235 | { "TRCDVCMR0" , 252 }, |
5236 | { "TRCDVCMR1" , 264 }, |
5237 | { "TRCDVCMR2" , 276 }, |
5238 | { "TRCDVCMR3" , 288 }, |
5239 | { "TRCDVCMR4" , 253 }, |
5240 | { "TRCDVCMR5" , 265 }, |
5241 | { "TRCDVCMR6" , 277 }, |
5242 | { "TRCDVCMR7" , 289 }, |
5243 | { "TRCDVCVR0" , 250 }, |
5244 | { "TRCDVCVR1" , 262 }, |
5245 | { "TRCDVCVR2" , 274 }, |
5246 | { "TRCDVCVR3" , 286 }, |
5247 | { "TRCDVCVR4" , 251 }, |
5248 | { "TRCDVCVR5" , 263 }, |
5249 | { "TRCDVCVR6" , 275 }, |
5250 | { "TRCDVCVR7" , 287 }, |
5251 | { "TRCEVENTCTL0R" , 160 }, |
5252 | { "TRCEVENTCTL1R" , 166 }, |
5253 | { "TRCEXTINSELR" , 162 }, |
5254 | { "TRCEXTINSELR0" , 163 }, |
5255 | { "TRCEXTINSELR1" , 168 }, |
5256 | { "TRCEXTINSELR2" , 173 }, |
5257 | { "TRCEXTINSELR3" , 177 }, |
5258 | { "TRCIDR0" , 165 }, |
5259 | { "TRCIDR1" , 170 }, |
5260 | { "TRCIDR10" , 139 }, |
5261 | { "TRCIDR11" , 144 }, |
5262 | { "TRCIDR12" , 148 }, |
5263 | { "TRCIDR13" , 151 }, |
5264 | { "TRCIDR2" , 175 }, |
5265 | { "TRCIDR3" , 179 }, |
5266 | { "TRCIDR4" , 181 }, |
5267 | { "TRCIDR5" , 183 }, |
5268 | { "TRCIDR6" , 185 }, |
5269 | { "TRCIDR7" , 187 }, |
5270 | { "TRCIDR8" , 125 }, |
5271 | { "TRCIDR9" , 132 }, |
5272 | { "TRCIMSPEC0" , 126 }, |
5273 | { "TRCIMSPEC1" , 133 }, |
5274 | { "TRCIMSPEC2" , 140 }, |
5275 | { "TRCIMSPEC3" , 145 }, |
5276 | { "TRCIMSPEC4" , 149 }, |
5277 | { "TRCIMSPEC5" , 152 }, |
5278 | { "TRCIMSPEC6" , 156 }, |
5279 | { "TRCIMSPEC7" , 159 }, |
5280 | { "TRCITCTRL" , 314 }, |
5281 | { "TRCITECR_EL1" , 579 }, |
5282 | { "TRCITECR_EL12" , 1160 }, |
5283 | { "TRCITECR_EL2" , 949 }, |
5284 | { "TRCITEEDCR" , 135 }, |
5285 | { "TRCLAR" , 329 }, |
5286 | { "TRCLSR" , 331 }, |
5287 | { "TRCOSLAR" , 191 }, |
5288 | { "TRCOSLSR" , 195 }, |
5289 | { "TRCPDCR" , 208 }, |
5290 | { "TRCPDSR" , 213 }, |
5291 | { "TRCPIDR0" , 322 }, |
5292 | { "TRCPIDR1" , 324 }, |
5293 | { "TRCPIDR2" , 326 }, |
5294 | { "TRCPIDR3" , 328 }, |
5295 | { "TRCPIDR4" , 317 }, |
5296 | { "TRCPIDR5" , 318 }, |
5297 | { "TRCPIDR6" , 319 }, |
5298 | { "TRCPIDR7" , 320 }, |
5299 | { "TRCPRGCTLR" , 127 }, |
5300 | { "TRCPROCSELR" , 134 }, |
5301 | { "TRCQCTLR" , 128 }, |
5302 | { "TRCRSCTLR10" , 228 }, |
5303 | { "TRCRSCTLR11" , 231 }, |
5304 | { "TRCRSCTLR12" , 234 }, |
5305 | { "TRCRSCTLR13" , 237 }, |
5306 | { "TRCRSCTLR14" , 240 }, |
5307 | { "TRCRSCTLR15" , 243 }, |
5308 | { "TRCRSCTLR16" , 188 }, |
5309 | { "TRCRSCTLR17" , 192 }, |
5310 | { "TRCRSCTLR18" , 197 }, |
5311 | { "TRCRSCTLR19" , 201 }, |
5312 | { "TRCRSCTLR2" , 196 }, |
5313 | { "TRCRSCTLR20" , 205 }, |
5314 | { "TRCRSCTLR21" , 210 }, |
5315 | { "TRCRSCTLR22" , 215 }, |
5316 | { "TRCRSCTLR23" , 219 }, |
5317 | { "TRCRSCTLR24" , 223 }, |
5318 | { "TRCRSCTLR25" , 226 }, |
5319 | { "TRCRSCTLR26" , 229 }, |
5320 | { "TRCRSCTLR27" , 232 }, |
5321 | { "TRCRSCTLR28" , 235 }, |
5322 | { "TRCRSCTLR29" , 238 }, |
5323 | { "TRCRSCTLR3" , 200 }, |
5324 | { "TRCRSCTLR30" , 241 }, |
5325 | { "TRCRSCTLR31" , 244 }, |
5326 | { "TRCRSCTLR4" , 204 }, |
5327 | { "TRCRSCTLR5" , 209 }, |
5328 | { "TRCRSCTLR6" , 214 }, |
5329 | { "TRCRSCTLR7" , 218 }, |
5330 | { "TRCRSCTLR8" , 222 }, |
5331 | { "TRCRSCTLR9" , 225 }, |
5332 | { "TRCRSR" , 171 }, |
5333 | { "TRCSEQEVR0" , 123 }, |
5334 | { "TRCSEQEVR1" , 130 }, |
5335 | { "TRCSEQEVR2" , 137 }, |
5336 | { "TRCSEQRSTEVR" , 154 }, |
5337 | { "TRCSEQSTR" , 157 }, |
5338 | { "TRCSSCCR0" , 189 }, |
5339 | { "TRCSSCCR1" , 193 }, |
5340 | { "TRCSSCCR2" , 198 }, |
5341 | { "TRCSSCCR3" , 202 }, |
5342 | { "TRCSSCCR4" , 206 }, |
5343 | { "TRCSSCCR5" , 211 }, |
5344 | { "TRCSSCCR6" , 216 }, |
5345 | { "TRCSSCCR7" , 220 }, |
5346 | { "TRCSSCSR0" , 224 }, |
5347 | { "TRCSSCSR1" , 227 }, |
5348 | { "TRCSSCSR2" , 230 }, |
5349 | { "TRCSSCSR3" , 233 }, |
5350 | { "TRCSSCSR4" , 236 }, |
5351 | { "TRCSSCSR5" , 239 }, |
5352 | { "TRCSSCSR6" , 242 }, |
5353 | { "TRCSSCSR7" , 245 }, |
5354 | { "TRCSSPCICR0" , 190 }, |
5355 | { "TRCSSPCICR1" , 194 }, |
5356 | { "TRCSSPCICR2" , 199 }, |
5357 | { "TRCSSPCICR3" , 203 }, |
5358 | { "TRCSSPCICR4" , 207 }, |
5359 | { "TRCSSPCICR5" , 212 }, |
5360 | { "TRCSSPCICR6" , 217 }, |
5361 | { "TRCSSPCICR7" , 221 }, |
5362 | { "TRCSTALLCTLR" , 176 }, |
5363 | { "TRCSTATR" , 141 }, |
5364 | { "TRCSYNCPR" , 182 }, |
5365 | { "TRCTRACEIDR" , 121 }, |
5366 | { "TRCTSCTLR" , 180 }, |
5367 | { "TRCVDARCCTLR" , 172 }, |
5368 | { "TRCVDCTLR" , 161 }, |
5369 | { "TRCVDSACCTLR" , 167 }, |
5370 | { "TRCVICTLR" , 122 }, |
5371 | { "TRCVIIECTLR" , 129 }, |
5372 | { "TRCVIPCSSCTLR" , 142 }, |
5373 | { "TRCVISSCTLR" , 136 }, |
5374 | { "TRCVMIDCCTLR0" , 300 }, |
5375 | { "TRCVMIDCCTLR1" , 301 }, |
5376 | { "TRCVMIDCVR0" , 295 }, |
5377 | { "TRCVMIDCVR1" , 299 }, |
5378 | { "TRCVMIDCVR2" , 303 }, |
5379 | { "TRCVMIDCVR3" , 305 }, |
5380 | { "TRCVMIDCVR4" , 307 }, |
5381 | { "TRCVMIDCVR5" , 309 }, |
5382 | { "TRCVMIDCVR6" , 311 }, |
5383 | { "TRCVMIDCVR7" , 313 }, |
5384 | { "TRFCR_EL1" , 578 }, |
5385 | { "TRFCR_EL12" , 1159 }, |
5386 | { "TRFCR_EL2" , 947 }, |
5387 | { "TTBR0_EL1" , 590 }, |
5388 | { "TTBR0_EL12" , 1166 }, |
5389 | { "TTBR0_EL2" , 957 }, |
5390 | { "TTBR0_EL3" , 1214 }, |
5391 | { "TTBR1_EL1" , 591 }, |
5392 | { "TTBR1_EL12" , 1167 }, |
5393 | { "TTBR1_EL2" , 959 }, |
5394 | { "UAO" , 617 }, |
5395 | { "VBAR_EL1" , 727 }, |
5396 | { "VBAR_EL12" , 1194 }, |
5397 | { "VBAR_EL2" , 1066 }, |
5398 | { "VBAR_EL3" , 1242 }, |
5399 | { "VDISR_EL2" , 1069 }, |
5400 | { "VDISR_EL3" , 1245 }, |
5401 | { "VMECID_A_EL2" , 1065 }, |
5402 | { "VMECID_P_EL2" , 1064 }, |
5403 | { "VMPIDR_EL2" , 934 }, |
5404 | { "VNCR_EL2" , 964 }, |
5405 | { "VPIDR_EL2" , 932 }, |
5406 | { "VSCTLR_EL2" , 958 }, |
5407 | { "VSESR_EL2" , 995 }, |
5408 | { "VSESR_EL3" , 1227 }, |
5409 | { "VSTCR_EL2" , 972 }, |
5410 | { "VSTTBR_EL2" , 971 }, |
5411 | { "VTCR_EL2" , 963 }, |
5412 | { "VTTBR_EL2" , 962 }, |
5413 | { "ZCR_EL1" , 577 }, |
5414 | { "ZCR_EL12" , 1158 }, |
5415 | { "ZCR_EL2" , 946 }, |
5416 | { "ZCR_EL3" , 1211 }, |
5417 | }; |
5418 | |
5419 | struct KeyType { |
5420 | std::string Name; |
5421 | }; |
5422 | KeyType Key = {Name.upper()}; |
5423 | struct Comp { |
5424 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
5425 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
5426 | if (CmpName < 0) return true; |
5427 | if (CmpName > 0) return false; |
5428 | return false; |
5429 | } |
5430 | }; |
5431 | auto Table = ArrayRef(Index); |
5432 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
5433 | if (Idx == Table.end() || |
5434 | Key.Name != Idx->Name) |
5435 | return nullptr; |
5436 | |
5437 | return &SysRegsList[Idx->_index]; |
5438 | } |
5439 | #endif |
5440 | |
5441 | #ifdef GET_TLBITable_DECL |
5442 | const TLBI *lookupTLBIByEncoding(uint16_t Encoding); |
5443 | const TLBI *lookupTLBIByName(StringRef Name); |
5444 | #endif |
5445 | |
5446 | #ifdef GET_TLBITable_IMPL |
5447 | constexpr TLBI TLBITable[] = { |
5448 | { "VMALLE1OS" , 0x408, false, { AArch64::FeatureTLB_RMI } }, // 0 |
5449 | { "VAE1OS" , 0x409, true, { AArch64::FeatureTLB_RMI } }, // 1 |
5450 | { "ASIDE1OS" , 0x40A, true, { AArch64::FeatureTLB_RMI } }, // 2 |
5451 | { "VAAE1OS" , 0x40B, true, { AArch64::FeatureTLB_RMI } }, // 3 |
5452 | { "VALE1OS" , 0x40D, true, { AArch64::FeatureTLB_RMI } }, // 4 |
5453 | { "VAALE1OS" , 0x40F, true, { AArch64::FeatureTLB_RMI } }, // 5 |
5454 | { "RVAE1IS" , 0x411, true, { AArch64::FeatureTLB_RMI } }, // 6 |
5455 | { "RVAAE1IS" , 0x413, true, { AArch64::FeatureTLB_RMI } }, // 7 |
5456 | { "RVALE1IS" , 0x415, true, { AArch64::FeatureTLB_RMI } }, // 8 |
5457 | { "RVAALE1IS" , 0x417, true, { AArch64::FeatureTLB_RMI } }, // 9 |
5458 | { "VMALLE1IS" , 0x418, false, { } }, // 10 |
5459 | { "VAE1IS" , 0x419, true, { } }, // 11 |
5460 | { "ASIDE1IS" , 0x41A, true, { } }, // 12 |
5461 | { "VAAE1IS" , 0x41B, true, { } }, // 13 |
5462 | { "VALE1IS" , 0x41D, true, { } }, // 14 |
5463 | { "VAALE1IS" , 0x41F, true, { } }, // 15 |
5464 | { "RVAE1OS" , 0x429, true, { AArch64::FeatureTLB_RMI } }, // 16 |
5465 | { "RVAAE1OS" , 0x42B, true, { AArch64::FeatureTLB_RMI } }, // 17 |
5466 | { "RVALE1OS" , 0x42D, true, { AArch64::FeatureTLB_RMI } }, // 18 |
5467 | { "RVAALE1OS" , 0x42F, true, { AArch64::FeatureTLB_RMI } }, // 19 |
5468 | { "RVAE1" , 0x431, true, { AArch64::FeatureTLB_RMI } }, // 20 |
5469 | { "RVAAE1" , 0x433, true, { AArch64::FeatureTLB_RMI } }, // 21 |
5470 | { "RVALE1" , 0x435, true, { AArch64::FeatureTLB_RMI } }, // 22 |
5471 | { "RVAALE1" , 0x437, true, { AArch64::FeatureTLB_RMI } }, // 23 |
5472 | { "VMALLE1" , 0x438, false, { } }, // 24 |
5473 | { "VAE1" , 0x439, true, { } }, // 25 |
5474 | { "ASIDE1" , 0x43A, true, { } }, // 26 |
5475 | { "VAAE1" , 0x43B, true, { } }, // 27 |
5476 | { "VALE1" , 0x43D, true, { } }, // 28 |
5477 | { "VAALE1" , 0x43F, true, { } }, // 29 |
5478 | { "VMALLE1OSnXS" , 0x488, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 30 |
5479 | { "VAE1OSnXS" , 0x489, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 31 |
5480 | { "ASIDE1OSnXS" , 0x48A, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 32 |
5481 | { "VAAE1OSnXS" , 0x48B, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 33 |
5482 | { "VALE1OSnXS" , 0x48D, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 34 |
5483 | { "VAALE1OSnXS" , 0x48F, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 35 |
5484 | { "RVAE1ISnXS" , 0x491, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 36 |
5485 | { "RVAAE1ISnXS" , 0x493, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 37 |
5486 | { "RVALE1ISnXS" , 0x495, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 38 |
5487 | { "RVAALE1ISnXS" , 0x497, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 39 |
5488 | { "VMALLE1ISnXS" , 0x498, false, { AArch64::FeatureXS } }, // 40 |
5489 | { "VAE1ISnXS" , 0x499, true, { AArch64::FeatureXS } }, // 41 |
5490 | { "ASIDE1ISnXS" , 0x49A, true, { AArch64::FeatureXS } }, // 42 |
5491 | { "VAAE1ISnXS" , 0x49B, true, { AArch64::FeatureXS } }, // 43 |
5492 | { "VALE1ISnXS" , 0x49D, true, { AArch64::FeatureXS } }, // 44 |
5493 | { "VAALE1ISnXS" , 0x49F, true, { AArch64::FeatureXS } }, // 45 |
5494 | { "RVAE1OSnXS" , 0x4A9, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 46 |
5495 | { "RVAAE1OSnXS" , 0x4AB, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 47 |
5496 | { "RVALE1OSnXS" , 0x4AD, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 48 |
5497 | { "RVAALE1OSnXS" , 0x4AF, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 49 |
5498 | { "RVAE1nXS" , 0x4B1, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 50 |
5499 | { "RVAAE1nXS" , 0x4B3, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 51 |
5500 | { "RVALE1nXS" , 0x4B5, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 52 |
5501 | { "RVAALE1nXS" , 0x4B7, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 53 |
5502 | { "VMALLE1nXS" , 0x4B8, false, { AArch64::FeatureXS } }, // 54 |
5503 | { "VAE1nXS" , 0x4B9, true, { AArch64::FeatureXS } }, // 55 |
5504 | { "ASIDE1nXS" , 0x4BA, true, { AArch64::FeatureXS } }, // 56 |
5505 | { "VAAE1nXS" , 0x4BB, true, { AArch64::FeatureXS } }, // 57 |
5506 | { "VALE1nXS" , 0x4BD, true, { AArch64::FeatureXS } }, // 58 |
5507 | { "VAALE1nXS" , 0x4BF, true, { AArch64::FeatureXS } }, // 59 |
5508 | { "IPAS2E1IS" , 0x2401, true, { } }, // 60 |
5509 | { "RIPAS2E1IS" , 0x2402, true, { AArch64::FeatureTLB_RMI } }, // 61 |
5510 | { "IPAS2LE1IS" , 0x2405, true, { } }, // 62 |
5511 | { "RIPAS2LE1IS" , 0x2406, true, { AArch64::FeatureTLB_RMI } }, // 63 |
5512 | { "ALLE2OS" , 0x2408, false, { AArch64::FeatureTLB_RMI } }, // 64 |
5513 | { "VAE2OS" , 0x2409, true, { AArch64::FeatureTLB_RMI } }, // 65 |
5514 | { "ALLE1OS" , 0x240C, false, { AArch64::FeatureTLB_RMI } }, // 66 |
5515 | { "VALE2OS" , 0x240D, true, { AArch64::FeatureTLB_RMI } }, // 67 |
5516 | { "VMALLS12E1OS" , 0x240E, false, { AArch64::FeatureTLB_RMI } }, // 68 |
5517 | { "RVAE2IS" , 0x2411, true, { AArch64::FeatureTLB_RMI } }, // 69 |
5518 | { "VMALLWS2E1IS" , 0x2412, false, { AArch64::FeatureTLBIW } }, // 70 |
5519 | { "RVALE2IS" , 0x2415, true, { AArch64::FeatureTLB_RMI } }, // 71 |
5520 | { "ALLE2IS" , 0x2418, false, { } }, // 72 |
5521 | { "VAE2IS" , 0x2419, true, { } }, // 73 |
5522 | { "ALLE1IS" , 0x241C, false, { } }, // 74 |
5523 | { "VALE2IS" , 0x241D, true, { } }, // 75 |
5524 | { "VMALLS12E1IS" , 0x241E, false, { } }, // 76 |
5525 | { "IPAS2E1OS" , 0x2420, true, { AArch64::FeatureTLB_RMI } }, // 77 |
5526 | { "IPAS2E1" , 0x2421, true, { } }, // 78 |
5527 | { "RIPAS2E1" , 0x2422, true, { AArch64::FeatureTLB_RMI } }, // 79 |
5528 | { "RIPAS2E1OS" , 0x2423, true, { AArch64::FeatureTLB_RMI } }, // 80 |
5529 | { "IPAS2LE1OS" , 0x2424, true, { AArch64::FeatureTLB_RMI } }, // 81 |
5530 | { "IPAS2LE1" , 0x2425, true, { } }, // 82 |
5531 | { "RIPAS2LE1" , 0x2426, true, { AArch64::FeatureTLB_RMI } }, // 83 |
5532 | { "RIPAS2LE1OS" , 0x2427, true, { AArch64::FeatureTLB_RMI } }, // 84 |
5533 | { "RVAE2OS" , 0x2429, true, { AArch64::FeatureTLB_RMI } }, // 85 |
5534 | { "VMALLWS2E1OS" , 0x242A, false, { AArch64::FeatureTLBIW } }, // 86 |
5535 | { "RVALE2OS" , 0x242D, true, { AArch64::FeatureTLB_RMI } }, // 87 |
5536 | { "RVAE2" , 0x2431, true, { AArch64::FeatureTLB_RMI } }, // 88 |
5537 | { "VMALLWS2E1" , 0x2432, false, { AArch64::FeatureTLBIW } }, // 89 |
5538 | { "RVALE2" , 0x2435, true, { AArch64::FeatureTLB_RMI } }, // 90 |
5539 | { "ALLE2" , 0x2438, false, { } }, // 91 |
5540 | { "VAE2" , 0x2439, true, { } }, // 92 |
5541 | { "ALLE1" , 0x243C, false, { } }, // 93 |
5542 | { "VALE2" , 0x243D, true, { } }, // 94 |
5543 | { "VMALLS12E1" , 0x243E, false, { } }, // 95 |
5544 | { "IPAS2E1ISnXS" , 0x2481, true, { AArch64::FeatureXS } }, // 96 |
5545 | { "RIPAS2E1ISnXS" , 0x2482, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 97 |
5546 | { "IPAS2LE1ISnXS" , 0x2485, true, { AArch64::FeatureXS } }, // 98 |
5547 | { "RIPAS2LE1ISnXS" , 0x2486, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 99 |
5548 | { "ALLE2OSnXS" , 0x2488, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 100 |
5549 | { "VAE2OSnXS" , 0x2489, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 101 |
5550 | { "ALLE1OSnXS" , 0x248C, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 102 |
5551 | { "VALE2OSnXS" , 0x248D, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 103 |
5552 | { "VMALLS12E1OSnXS" , 0x248E, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 104 |
5553 | { "RVAE2ISnXS" , 0x2491, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 105 |
5554 | { "VMALLWS2E1ISnXS" , 0x2492, false, { AArch64::FeatureTLBIW, AArch64::FeatureXS } }, // 106 |
5555 | { "RVALE2ISnXS" , 0x2495, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 107 |
5556 | { "ALLE2ISnXS" , 0x2498, false, { AArch64::FeatureXS } }, // 108 |
5557 | { "VAE2ISnXS" , 0x2499, true, { AArch64::FeatureXS } }, // 109 |
5558 | { "ALLE1ISnXS" , 0x249C, false, { AArch64::FeatureXS } }, // 110 |
5559 | { "VALE2ISnXS" , 0x249D, true, { AArch64::FeatureXS } }, // 111 |
5560 | { "VMALLS12E1ISnXS" , 0x249E, false, { AArch64::FeatureXS } }, // 112 |
5561 | { "IPAS2E1OSnXS" , 0x24A0, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 113 |
5562 | { "IPAS2E1nXS" , 0x24A1, true, { AArch64::FeatureXS } }, // 114 |
5563 | { "RIPAS2E1nXS" , 0x24A2, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 115 |
5564 | { "RIPAS2E1OSnXS" , 0x24A3, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 116 |
5565 | { "IPAS2LE1OSnXS" , 0x24A4, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 117 |
5566 | { "IPAS2LE1nXS" , 0x24A5, true, { AArch64::FeatureXS } }, // 118 |
5567 | { "RIPAS2LE1nXS" , 0x24A6, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 119 |
5568 | { "RIPAS2LE1OSnXS" , 0x24A7, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 120 |
5569 | { "RVAE2OSnXS" , 0x24A9, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 121 |
5570 | { "VMALLWS2E1OSnXS" , 0x24AA, false, { AArch64::FeatureTLBIW, AArch64::FeatureXS } }, // 122 |
5571 | { "RVALE2OSnXS" , 0x24AD, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 123 |
5572 | { "RVAE2nXS" , 0x24B1, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 124 |
5573 | { "VMALLWS2E1nXS" , 0x24B2, false, { AArch64::FeatureTLBIW, AArch64::FeatureXS } }, // 125 |
5574 | { "RVALE2nXS" , 0x24B5, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 126 |
5575 | { "ALLE2nXS" , 0x24B8, false, { AArch64::FeatureXS } }, // 127 |
5576 | { "VAE2nXS" , 0x24B9, true, { AArch64::FeatureXS } }, // 128 |
5577 | { "ALLE1nXS" , 0x24BC, false, { AArch64::FeatureXS } }, // 129 |
5578 | { "VALE2nXS" , 0x24BD, true, { AArch64::FeatureXS } }, // 130 |
5579 | { "VMALLS12E1nXS" , 0x24BE, false, { AArch64::FeatureXS } }, // 131 |
5580 | { "ALLE3OS" , 0x3408, false, { AArch64::FeatureTLB_RMI } }, // 132 |
5581 | { "VAE3OS" , 0x3409, true, { AArch64::FeatureTLB_RMI } }, // 133 |
5582 | { "PAALLOS" , 0x340C, false, { AArch64::FeatureRME } }, // 134 |
5583 | { "VALE3OS" , 0x340D, true, { AArch64::FeatureTLB_RMI } }, // 135 |
5584 | { "RVAE3IS" , 0x3411, true, { AArch64::FeatureTLB_RMI } }, // 136 |
5585 | { "RVALE3IS" , 0x3415, true, { AArch64::FeatureTLB_RMI } }, // 137 |
5586 | { "ALLE3IS" , 0x3418, false, { } }, // 138 |
5587 | { "VAE3IS" , 0x3419, true, { } }, // 139 |
5588 | { "VALE3IS" , 0x341D, true, { } }, // 140 |
5589 | { "RPAOS" , 0x3423, true, { AArch64::FeatureRME } }, // 141 |
5590 | { "RPALOS" , 0x3427, true, { AArch64::FeatureRME } }, // 142 |
5591 | { "RVAE3OS" , 0x3429, true, { AArch64::FeatureTLB_RMI } }, // 143 |
5592 | { "RVALE3OS" , 0x342D, true, { AArch64::FeatureTLB_RMI } }, // 144 |
5593 | { "RVAE3" , 0x3431, true, { AArch64::FeatureTLB_RMI } }, // 145 |
5594 | { "RVALE3" , 0x3435, true, { AArch64::FeatureTLB_RMI } }, // 146 |
5595 | { "ALLE3" , 0x3438, false, { } }, // 147 |
5596 | { "VAE3" , 0x3439, true, { } }, // 148 |
5597 | { "PAALL" , 0x343C, false, { AArch64::FeatureRME } }, // 149 |
5598 | { "VALE3" , 0x343D, true, { } }, // 150 |
5599 | { "ALLE3OSnXS" , 0x3488, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 151 |
5600 | { "VAE3OSnXS" , 0x3489, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 152 |
5601 | { "PAALLOSnXS" , 0x348C, false, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 153 |
5602 | { "VALE3OSnXS" , 0x348D, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 154 |
5603 | { "RVAE3ISnXS" , 0x3491, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 155 |
5604 | { "RVALE3ISnXS" , 0x3495, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 156 |
5605 | { "ALLE3ISnXS" , 0x3498, false, { AArch64::FeatureXS } }, // 157 |
5606 | { "VAE3ISnXS" , 0x3499, true, { AArch64::FeatureXS } }, // 158 |
5607 | { "VALE3ISnXS" , 0x349D, true, { AArch64::FeatureXS } }, // 159 |
5608 | { "RPAOSnXS" , 0x34A3, true, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 160 |
5609 | { "RPALOSnXS" , 0x34A7, true, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 161 |
5610 | { "RVAE3OSnXS" , 0x34A9, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 162 |
5611 | { "RVALE3OSnXS" , 0x34AD, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 163 |
5612 | { "RVAE3nXS" , 0x34B1, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 164 |
5613 | { "RVALE3nXS" , 0x34B5, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 165 |
5614 | { "ALLE3nXS" , 0x34B8, false, { AArch64::FeatureXS } }, // 166 |
5615 | { "VAE3nXS" , 0x34B9, true, { AArch64::FeatureXS } }, // 167 |
5616 | { "PAALLnXS" , 0x34BC, false, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 168 |
5617 | { "VALE3nXS" , 0x34BD, true, { AArch64::FeatureXS } }, // 169 |
5618 | }; |
5619 | |
5620 | const TLBI *lookupTLBIByEncoding(uint16_t Encoding) { |
5621 | struct KeyType { |
5622 | uint16_t Encoding; |
5623 | }; |
5624 | KeyType Key = {Encoding}; |
5625 | struct Comp { |
5626 | bool operator()(const TLBI &LHS, const KeyType &RHS) const { |
5627 | if (LHS.Encoding < RHS.Encoding) |
5628 | return true; |
5629 | if (LHS.Encoding > RHS.Encoding) |
5630 | return false; |
5631 | return false; |
5632 | } |
5633 | }; |
5634 | auto Table = ArrayRef(TLBITable); |
5635 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
5636 | if (Idx == Table.end() || |
5637 | Key.Encoding != Idx->Encoding) |
5638 | return nullptr; |
5639 | |
5640 | return &*Idx; |
5641 | } |
5642 | |
5643 | const TLBI *lookupTLBIByName(StringRef Name) { |
5644 | struct IndexType { |
5645 | const char * Name; |
5646 | unsigned _index; |
5647 | }; |
5648 | static const struct IndexType Index[] = { |
5649 | { "ALLE1" , 93 }, |
5650 | { "ALLE1IS" , 74 }, |
5651 | { "ALLE1ISNXS" , 110 }, |
5652 | { "ALLE1NXS" , 129 }, |
5653 | { "ALLE1OS" , 66 }, |
5654 | { "ALLE1OSNXS" , 102 }, |
5655 | { "ALLE2" , 91 }, |
5656 | { "ALLE2IS" , 72 }, |
5657 | { "ALLE2ISNXS" , 108 }, |
5658 | { "ALLE2NXS" , 127 }, |
5659 | { "ALLE2OS" , 64 }, |
5660 | { "ALLE2OSNXS" , 100 }, |
5661 | { "ALLE3" , 147 }, |
5662 | { "ALLE3IS" , 138 }, |
5663 | { "ALLE3ISNXS" , 157 }, |
5664 | { "ALLE3NXS" , 166 }, |
5665 | { "ALLE3OS" , 132 }, |
5666 | { "ALLE3OSNXS" , 151 }, |
5667 | { "ASIDE1" , 26 }, |
5668 | { "ASIDE1IS" , 12 }, |
5669 | { "ASIDE1ISNXS" , 42 }, |
5670 | { "ASIDE1NXS" , 56 }, |
5671 | { "ASIDE1OS" , 2 }, |
5672 | { "ASIDE1OSNXS" , 32 }, |
5673 | { "IPAS2E1" , 78 }, |
5674 | { "IPAS2E1IS" , 60 }, |
5675 | { "IPAS2E1ISNXS" , 96 }, |
5676 | { "IPAS2E1NXS" , 114 }, |
5677 | { "IPAS2E1OS" , 77 }, |
5678 | { "IPAS2E1OSNXS" , 113 }, |
5679 | { "IPAS2LE1" , 82 }, |
5680 | { "IPAS2LE1IS" , 62 }, |
5681 | { "IPAS2LE1ISNXS" , 98 }, |
5682 | { "IPAS2LE1NXS" , 118 }, |
5683 | { "IPAS2LE1OS" , 81 }, |
5684 | { "IPAS2LE1OSNXS" , 117 }, |
5685 | { "PAALL" , 149 }, |
5686 | { "PAALLNXS" , 168 }, |
5687 | { "PAALLOS" , 134 }, |
5688 | { "PAALLOSNXS" , 153 }, |
5689 | { "RIPAS2E1" , 79 }, |
5690 | { "RIPAS2E1IS" , 61 }, |
5691 | { "RIPAS2E1ISNXS" , 97 }, |
5692 | { "RIPAS2E1NXS" , 115 }, |
5693 | { "RIPAS2E1OS" , 80 }, |
5694 | { "RIPAS2E1OSNXS" , 116 }, |
5695 | { "RIPAS2LE1" , 83 }, |
5696 | { "RIPAS2LE1IS" , 63 }, |
5697 | { "RIPAS2LE1ISNXS" , 99 }, |
5698 | { "RIPAS2LE1NXS" , 119 }, |
5699 | { "RIPAS2LE1OS" , 84 }, |
5700 | { "RIPAS2LE1OSNXS" , 120 }, |
5701 | { "RPALOS" , 142 }, |
5702 | { "RPALOSNXS" , 161 }, |
5703 | { "RPAOS" , 141 }, |
5704 | { "RPAOSNXS" , 160 }, |
5705 | { "RVAAE1" , 21 }, |
5706 | { "RVAAE1IS" , 7 }, |
5707 | { "RVAAE1ISNXS" , 37 }, |
5708 | { "RVAAE1NXS" , 51 }, |
5709 | { "RVAAE1OS" , 17 }, |
5710 | { "RVAAE1OSNXS" , 47 }, |
5711 | { "RVAALE1" , 23 }, |
5712 | { "RVAALE1IS" , 9 }, |
5713 | { "RVAALE1ISNXS" , 39 }, |
5714 | { "RVAALE1NXS" , 53 }, |
5715 | { "RVAALE1OS" , 19 }, |
5716 | { "RVAALE1OSNXS" , 49 }, |
5717 | { "RVAE1" , 20 }, |
5718 | { "RVAE1IS" , 6 }, |
5719 | { "RVAE1ISNXS" , 36 }, |
5720 | { "RVAE1NXS" , 50 }, |
5721 | { "RVAE1OS" , 16 }, |
5722 | { "RVAE1OSNXS" , 46 }, |
5723 | { "RVAE2" , 88 }, |
5724 | { "RVAE2IS" , 69 }, |
5725 | { "RVAE2ISNXS" , 105 }, |
5726 | { "RVAE2NXS" , 124 }, |
5727 | { "RVAE2OS" , 85 }, |
5728 | { "RVAE2OSNXS" , 121 }, |
5729 | { "RVAE3" , 145 }, |
5730 | { "RVAE3IS" , 136 }, |
5731 | { "RVAE3ISNXS" , 155 }, |
5732 | { "RVAE3NXS" , 164 }, |
5733 | { "RVAE3OS" , 143 }, |
5734 | { "RVAE3OSNXS" , 162 }, |
5735 | { "RVALE1" , 22 }, |
5736 | { "RVALE1IS" , 8 }, |
5737 | { "RVALE1ISNXS" , 38 }, |
5738 | { "RVALE1NXS" , 52 }, |
5739 | { "RVALE1OS" , 18 }, |
5740 | { "RVALE1OSNXS" , 48 }, |
5741 | { "RVALE2" , 90 }, |
5742 | { "RVALE2IS" , 71 }, |
5743 | { "RVALE2ISNXS" , 107 }, |
5744 | { "RVALE2NXS" , 126 }, |
5745 | { "RVALE2OS" , 87 }, |
5746 | { "RVALE2OSNXS" , 123 }, |
5747 | { "RVALE3" , 146 }, |
5748 | { "RVALE3IS" , 137 }, |
5749 | { "RVALE3ISNXS" , 156 }, |
5750 | { "RVALE3NXS" , 165 }, |
5751 | { "RVALE3OS" , 144 }, |
5752 | { "RVALE3OSNXS" , 163 }, |
5753 | { "VAAE1" , 27 }, |
5754 | { "VAAE1IS" , 13 }, |
5755 | { "VAAE1ISNXS" , 43 }, |
5756 | { "VAAE1NXS" , 57 }, |
5757 | { "VAAE1OS" , 3 }, |
5758 | { "VAAE1OSNXS" , 33 }, |
5759 | { "VAALE1" , 29 }, |
5760 | { "VAALE1IS" , 15 }, |
5761 | { "VAALE1ISNXS" , 45 }, |
5762 | { "VAALE1NXS" , 59 }, |
5763 | { "VAALE1OS" , 5 }, |
5764 | { "VAALE1OSNXS" , 35 }, |
5765 | { "VAE1" , 25 }, |
5766 | { "VAE1IS" , 11 }, |
5767 | { "VAE1ISNXS" , 41 }, |
5768 | { "VAE1NXS" , 55 }, |
5769 | { "VAE1OS" , 1 }, |
5770 | { "VAE1OSNXS" , 31 }, |
5771 | { "VAE2" , 92 }, |
5772 | { "VAE2IS" , 73 }, |
5773 | { "VAE2ISNXS" , 109 }, |
5774 | { "VAE2NXS" , 128 }, |
5775 | { "VAE2OS" , 65 }, |
5776 | { "VAE2OSNXS" , 101 }, |
5777 | { "VAE3" , 148 }, |
5778 | { "VAE3IS" , 139 }, |
5779 | { "VAE3ISNXS" , 158 }, |
5780 | { "VAE3NXS" , 167 }, |
5781 | { "VAE3OS" , 133 }, |
5782 | { "VAE3OSNXS" , 152 }, |
5783 | { "VALE1" , 28 }, |
5784 | { "VALE1IS" , 14 }, |
5785 | { "VALE1ISNXS" , 44 }, |
5786 | { "VALE1NXS" , 58 }, |
5787 | { "VALE1OS" , 4 }, |
5788 | { "VALE1OSNXS" , 34 }, |
5789 | { "VALE2" , 94 }, |
5790 | { "VALE2IS" , 75 }, |
5791 | { "VALE2ISNXS" , 111 }, |
5792 | { "VALE2NXS" , 130 }, |
5793 | { "VALE2OS" , 67 }, |
5794 | { "VALE2OSNXS" , 103 }, |
5795 | { "VALE3" , 150 }, |
5796 | { "VALE3IS" , 140 }, |
5797 | { "VALE3ISNXS" , 159 }, |
5798 | { "VALE3NXS" , 169 }, |
5799 | { "VALE3OS" , 135 }, |
5800 | { "VALE3OSNXS" , 154 }, |
5801 | { "VMALLE1" , 24 }, |
5802 | { "VMALLE1IS" , 10 }, |
5803 | { "VMALLE1ISNXS" , 40 }, |
5804 | { "VMALLE1NXS" , 54 }, |
5805 | { "VMALLE1OS" , 0 }, |
5806 | { "VMALLE1OSNXS" , 30 }, |
5807 | { "VMALLS12E1" , 95 }, |
5808 | { "VMALLS12E1IS" , 76 }, |
5809 | { "VMALLS12E1ISNXS" , 112 }, |
5810 | { "VMALLS12E1NXS" , 131 }, |
5811 | { "VMALLS12E1OS" , 68 }, |
5812 | { "VMALLS12E1OSNXS" , 104 }, |
5813 | { "VMALLWS2E1" , 89 }, |
5814 | { "VMALLWS2E1IS" , 70 }, |
5815 | { "VMALLWS2E1ISNXS" , 106 }, |
5816 | { "VMALLWS2E1NXS" , 125 }, |
5817 | { "VMALLWS2E1OS" , 86 }, |
5818 | { "VMALLWS2E1OSNXS" , 122 }, |
5819 | }; |
5820 | |
5821 | struct KeyType { |
5822 | std::string Name; |
5823 | }; |
5824 | KeyType Key = {Name.upper()}; |
5825 | struct Comp { |
5826 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
5827 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
5828 | if (CmpName < 0) return true; |
5829 | if (CmpName > 0) return false; |
5830 | return false; |
5831 | } |
5832 | }; |
5833 | auto Table = ArrayRef(Index); |
5834 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
5835 | if (Idx == Table.end() || |
5836 | Key.Name != Idx->Name) |
5837 | return nullptr; |
5838 | |
5839 | return &TLBITable[Idx->_index]; |
5840 | } |
5841 | #endif |
5842 | |
5843 | #ifdef GET_TSBsList_DECL |
5844 | const TSB *lookupTSBByEncoding(uint8_t Encoding); |
5845 | const TSB *lookupTSBByName(StringRef Name); |
5846 | #endif |
5847 | |
5848 | #ifdef GET_TSBsList_IMPL |
5849 | constexpr TSB TSBsList[] = { |
5850 | { "csync" , 0x0, {AArch64::FeatureTRACEV8_4} }, // 0 |
5851 | }; |
5852 | |
5853 | const TSB *lookupTSBByEncoding(uint8_t Encoding) { |
5854 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x0, (uint8_t)0x0)) |
5855 | return nullptr; |
5856 | |
5857 | auto Table = ArrayRef(TSBsList); |
5858 | size_t Idx = Encoding - 0x0; |
5859 | return &Table[Idx]; |
5860 | } |
5861 | |
5862 | const TSB *lookupTSBByName(StringRef Name) { |
5863 | struct IndexType { |
5864 | const char * Name; |
5865 | unsigned _index; |
5866 | }; |
5867 | static const struct IndexType Index[] = { |
5868 | { "CSYNC" , 0 }, |
5869 | }; |
5870 | |
5871 | struct KeyType { |
5872 | std::string Name; |
5873 | }; |
5874 | KeyType Key = {Name.upper()}; |
5875 | struct Comp { |
5876 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
5877 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
5878 | if (CmpName < 0) return true; |
5879 | if (CmpName > 0) return false; |
5880 | return false; |
5881 | } |
5882 | }; |
5883 | auto Table = ArrayRef(Index); |
5884 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
5885 | if (Idx == Table.end() || |
5886 | Key.Name != Idx->Name) |
5887 | return nullptr; |
5888 | |
5889 | return &TSBsList[Idx->_index]; |
5890 | } |
5891 | #endif |
5892 | |
5893 | #undef GET_ATValues_DECL |
5894 | #undef GET_ATsList_DECL |
5895 | #undef GET_ATsList_IMPL |
5896 | #undef GET_BTIValues_DECL |
5897 | #undef GET_BTIsList_DECL |
5898 | #undef GET_BTIsList_IMPL |
5899 | #undef GET_DBValues_DECL |
5900 | #undef GET_DBnXSValues_DECL |
5901 | #undef GET_DBnXSsList_DECL |
5902 | #undef GET_DBnXSsList_IMPL |
5903 | #undef GET_DBsList_DECL |
5904 | #undef GET_DBsList_IMPL |
5905 | #undef GET_DCValues_DECL |
5906 | #undef GET_DCsList_DECL |
5907 | #undef GET_DCsList_IMPL |
5908 | #undef GET_ExactFPImmValues_DECL |
5909 | #undef GET_ExactFPImmsList_DECL |
5910 | #undef GET_ExactFPImmsList_IMPL |
5911 | #undef GET_ICValues_DECL |
5912 | #undef GET_ICsList_DECL |
5913 | #undef GET_ICsList_IMPL |
5914 | #undef GET_ISBValues_DECL |
5915 | #undef GET_ISBsList_DECL |
5916 | #undef GET_ISBsList_IMPL |
5917 | #undef GET_PHintValues_DECL |
5918 | #undef GET_PHintsList_DECL |
5919 | #undef GET_PHintsList_IMPL |
5920 | #undef GET_PRFMValues_DECL |
5921 | #undef GET_PRFMsList_DECL |
5922 | #undef GET_PRFMsList_IMPL |
5923 | #undef GET_PSBValues_DECL |
5924 | #undef GET_PSBsList_DECL |
5925 | #undef GET_PSBsList_IMPL |
5926 | #undef GET_PStateImm0_15Values_DECL |
5927 | #undef GET_PStateImm0_15sList_DECL |
5928 | #undef GET_PStateImm0_15sList_IMPL |
5929 | #undef GET_PStateImm0_1Values_DECL |
5930 | #undef GET_PStateImm0_1sList_DECL |
5931 | #undef GET_PStateImm0_1sList_IMPL |
5932 | #undef GET_RPRFMValues_DECL |
5933 | #undef GET_RPRFMsList_DECL |
5934 | #undef GET_RPRFMsList_IMPL |
5935 | #undef GET_SVCRValues_DECL |
5936 | #undef GET_SVCRsList_DECL |
5937 | #undef GET_SVCRsList_IMPL |
5938 | #undef GET_SVEPREDPATValues_DECL |
5939 | #undef GET_SVEPREDPATsList_DECL |
5940 | #undef GET_SVEPREDPATsList_IMPL |
5941 | #undef GET_SVEPRFMValues_DECL |
5942 | #undef GET_SVEPRFMsList_DECL |
5943 | #undef GET_SVEPRFMsList_IMPL |
5944 | #undef GET_SVEVECLENSPECIFIERValues_DECL |
5945 | #undef GET_SVEVECLENSPECIFIERsList_DECL |
5946 | #undef GET_SVEVECLENSPECIFIERsList_IMPL |
5947 | #undef GET_SysRegValues_DECL |
5948 | #undef GET_SysRegsList_DECL |
5949 | #undef GET_SysRegsList_IMPL |
5950 | #undef GET_TLBITable_DECL |
5951 | #undef GET_TLBITable_IMPL |
5952 | #undef GET_TSBValues_DECL |
5953 | #undef GET_TSBsList_DECL |
5954 | #undef GET_TSBsList_IMPL |
5955 | |