1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifndef GET_CC_REGISTER_LISTS
10
11static bool CC_AMDGPU(unsigned ValNo, MVT ValVT,
12 MVT LocVT, CCValAssign::LocInfo LocInfo,
13 ISD::ArgFlagsTy ArgFlags, CCState &State);
14static bool CC_AMDGPU_CS_CHAIN(unsigned ValNo, MVT ValVT,
15 MVT LocVT, CCValAssign::LocInfo LocInfo,
16 ISD::ArgFlagsTy ArgFlags, CCState &State);
17static bool CC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
18 MVT LocVT, CCValAssign::LocInfo LocInfo,
19 ISD::ArgFlagsTy ArgFlags, CCState &State);
20static bool CC_SI_Gfx(unsigned ValNo, MVT ValVT,
21 MVT LocVT, CCValAssign::LocInfo LocInfo,
22 ISD::ArgFlagsTy ArgFlags, CCState &State);
23static bool CC_SI_SHADER(unsigned ValNo, MVT ValVT,
24 MVT LocVT, CCValAssign::LocInfo LocInfo,
25 ISD::ArgFlagsTy ArgFlags, CCState &State);
26static bool RetCC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
27 MVT LocVT, CCValAssign::LocInfo LocInfo,
28 ISD::ArgFlagsTy ArgFlags, CCState &State);
29static bool RetCC_SI_Gfx(unsigned ValNo, MVT ValVT,
30 MVT LocVT, CCValAssign::LocInfo LocInfo,
31 ISD::ArgFlagsTy ArgFlags, CCState &State);
32static bool RetCC_SI_Shader(unsigned ValNo, MVT ValVT,
33 MVT LocVT, CCValAssign::LocInfo LocInfo,
34 ISD::ArgFlagsTy ArgFlags, CCState &State);
35
36
37static bool CC_AMDGPU(unsigned ValNo, MVT ValVT,
38 MVT LocVT, CCValAssign::LocInfo LocInfo,
39 ISD::ArgFlagsTy ArgFlags, CCState &State) {
40
41 if (State.getMachineFunction().getSubtarget<GCNSubtarget>().getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
42 if (!CC_SI_SHADER(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
43 return false;
44 }
45
46 if (State.getMachineFunction().getSubtarget<GCNSubtarget>().getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS && State.getCallingConv() == CallingConv::C) {
47 if (!CC_AMDGPU_Func(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
48 return false;
49 }
50
51 return true; // CC didn't match.
52}
53
54
55static bool CC_AMDGPU_CS_CHAIN(unsigned ValNo, MVT ValVT,
56 MVT LocVT, CCValAssign::LocInfo LocInfo,
57 ISD::ArgFlagsTy ArgFlags, CCState &State) {
58
59 if (ArgFlags.isInReg()) {
60 if (LocVT == MVT::f32 ||
61 LocVT == MVT::i32 ||
62 LocVT == MVT::f16 ||
63 LocVT == MVT::i16 ||
64 LocVT == MVT::v2i16 ||
65 LocVT == MVT::v2f16 ||
66 LocVT == MVT::bf16 ||
67 LocVT == MVT::v2bf16) {
68 static const MCPhysReg RegList1[] = {
69 AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR44, AMDGPU::SGPR45, AMDGPU::SGPR46, AMDGPU::SGPR47, AMDGPU::SGPR48, AMDGPU::SGPR49, AMDGPU::SGPR50, AMDGPU::SGPR51, AMDGPU::SGPR52, AMDGPU::SGPR53, AMDGPU::SGPR54, AMDGPU::SGPR55, AMDGPU::SGPR56, AMDGPU::SGPR57, AMDGPU::SGPR58, AMDGPU::SGPR59, AMDGPU::SGPR60, AMDGPU::SGPR61, AMDGPU::SGPR62, AMDGPU::SGPR63, AMDGPU::SGPR64, AMDGPU::SGPR65, AMDGPU::SGPR66, AMDGPU::SGPR67, AMDGPU::SGPR68, AMDGPU::SGPR69, AMDGPU::SGPR70, AMDGPU::SGPR71, AMDGPU::SGPR72, AMDGPU::SGPR73, AMDGPU::SGPR74, AMDGPU::SGPR75, AMDGPU::SGPR76, AMDGPU::SGPR77, AMDGPU::SGPR78, AMDGPU::SGPR79, AMDGPU::SGPR80, AMDGPU::SGPR81, AMDGPU::SGPR82, AMDGPU::SGPR83, AMDGPU::SGPR84, AMDGPU::SGPR85, AMDGPU::SGPR86, AMDGPU::SGPR87, AMDGPU::SGPR88, AMDGPU::SGPR89, AMDGPU::SGPR90, AMDGPU::SGPR91, AMDGPU::SGPR92, AMDGPU::SGPR93, AMDGPU::SGPR94, AMDGPU::SGPR95, AMDGPU::SGPR96, AMDGPU::SGPR97, AMDGPU::SGPR98, AMDGPU::SGPR99, AMDGPU::SGPR100, AMDGPU::SGPR101, AMDGPU::SGPR102, AMDGPU::SGPR103, AMDGPU::SGPR104
70 };
71 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
72 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
73 return false;
74 }
75 }
76 }
77
78 if (!ArgFlags.isInReg()) {
79 if (LocVT == MVT::f32 ||
80 LocVT == MVT::i32 ||
81 LocVT == MVT::f16 ||
82 LocVT == MVT::i16 ||
83 LocVT == MVT::v2i16 ||
84 LocVT == MVT::v2f16 ||
85 LocVT == MVT::bf16 ||
86 LocVT == MVT::v2bf16) {
87 static const MCPhysReg RegList2[] = {
88 AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR136, AMDGPU::VGPR137, AMDGPU::VGPR138, AMDGPU::VGPR139, AMDGPU::VGPR140, AMDGPU::VGPR141, AMDGPU::VGPR142, AMDGPU::VGPR143, AMDGPU::VGPR144, AMDGPU::VGPR145, AMDGPU::VGPR146, AMDGPU::VGPR147, AMDGPU::VGPR148, AMDGPU::VGPR149, AMDGPU::VGPR150, AMDGPU::VGPR151, AMDGPU::VGPR152, AMDGPU::VGPR153, AMDGPU::VGPR154, AMDGPU::VGPR155, AMDGPU::VGPR156, AMDGPU::VGPR157, AMDGPU::VGPR158, AMDGPU::VGPR159, AMDGPU::VGPR160, AMDGPU::VGPR161, AMDGPU::VGPR162, AMDGPU::VGPR163, AMDGPU::VGPR164, AMDGPU::VGPR165, AMDGPU::VGPR166, AMDGPU::VGPR167, AMDGPU::VGPR168, AMDGPU::VGPR169, AMDGPU::VGPR170, AMDGPU::VGPR171, AMDGPU::VGPR172, AMDGPU::VGPR173, AMDGPU::VGPR174, AMDGPU::VGPR175, AMDGPU::VGPR176, AMDGPU::VGPR177, AMDGPU::VGPR178, AMDGPU::VGPR179, AMDGPU::VGPR180, AMDGPU::VGPR181, AMDGPU::VGPR182, AMDGPU::VGPR183, AMDGPU::VGPR184, AMDGPU::VGPR185, AMDGPU::VGPR186, AMDGPU::VGPR187, AMDGPU::VGPR188, AMDGPU::VGPR189, AMDGPU::VGPR190, AMDGPU::VGPR191, AMDGPU::VGPR192, AMDGPU::VGPR193, AMDGPU::VGPR194, AMDGPU::VGPR195, AMDGPU::VGPR196, AMDGPU::VGPR197, AMDGPU::VGPR198, AMDGPU::VGPR199, AMDGPU::VGPR200, AMDGPU::VGPR201, AMDGPU::VGPR202, AMDGPU::VGPR203, AMDGPU::VGPR204, AMDGPU::VGPR205, AMDGPU::VGPR206, AMDGPU::VGPR207, AMDGPU::VGPR208, AMDGPU::VGPR209, AMDGPU::VGPR210, AMDGPU::VGPR211, AMDGPU::VGPR212, AMDGPU::VGPR213, AMDGPU::VGPR214, AMDGPU::VGPR215, AMDGPU::VGPR216, AMDGPU::VGPR217, AMDGPU::VGPR218, AMDGPU::VGPR219, AMDGPU::VGPR220, AMDGPU::VGPR221, AMDGPU::VGPR222, AMDGPU::VGPR223, AMDGPU::VGPR224, AMDGPU::VGPR225, AMDGPU::VGPR226, AMDGPU::VGPR227, AMDGPU::VGPR228, AMDGPU::VGPR229, AMDGPU::VGPR230, AMDGPU::VGPR231, AMDGPU::VGPR232, AMDGPU::VGPR233, AMDGPU::VGPR234, AMDGPU::VGPR235, AMDGPU::VGPR236, AMDGPU::VGPR237, AMDGPU::VGPR238, AMDGPU::VGPR239, AMDGPU::VGPR240, AMDGPU::VGPR241, AMDGPU::VGPR242, AMDGPU::VGPR243, AMDGPU::VGPR244, AMDGPU::VGPR245, AMDGPU::VGPR246, AMDGPU::VGPR247, AMDGPU::VGPR248, AMDGPU::VGPR249, AMDGPU::VGPR250, AMDGPU::VGPR251, AMDGPU::VGPR252, AMDGPU::VGPR253, AMDGPU::VGPR254
89 };
90 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
91 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
92 return false;
93 }
94 }
95 }
96
97 return true; // CC didn't match.
98}
99
100
101static bool CC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
102 MVT LocVT, CCValAssign::LocInfo LocInfo,
103 ISD::ArgFlagsTy ArgFlags, CCState &State) {
104
105 if (ArgFlags.isByVal()) {
106 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, MinSize: 4, MinAlign: Align(4), ArgFlags);
107 return false;
108 }
109
110 if (LocVT == MVT::i1) {
111 LocVT = MVT::i32;
112 if (ArgFlags.isSExt())
113 LocInfo = CCValAssign::SExt;
114 else if (ArgFlags.isZExt())
115 LocInfo = CCValAssign::ZExt;
116 else
117 LocInfo = CCValAssign::AExt;
118 }
119
120 if (LocVT == MVT::i8 ||
121 LocVT == MVT::i16) {
122 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
123 LocVT = MVT::i32;
124 if (ArgFlags.isSExt())
125 LocInfo = CCValAssign::SExt;
126 else if (ArgFlags.isZExt())
127 LocInfo = CCValAssign::ZExt;
128 else
129 LocInfo = CCValAssign::AExt;
130 }
131 }
132
133 if (ArgFlags.isInReg()) {
134 if (LocVT == MVT::f32 ||
135 LocVT == MVT::i32 ||
136 LocVT == MVT::f16 ||
137 LocVT == MVT::i16 ||
138 LocVT == MVT::v2i16 ||
139 LocVT == MVT::v2f16 ||
140 LocVT == MVT::bf16 ||
141 LocVT == MVT::v2bf16) {
142 static const MCPhysReg RegList1[] = {
143 AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29
144 };
145 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
146 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
147 return false;
148 }
149 }
150 }
151
152 if (LocVT == MVT::i32 ||
153 LocVT == MVT::f32 ||
154 LocVT == MVT::i16 ||
155 LocVT == MVT::f16 ||
156 LocVT == MVT::v2i16 ||
157 LocVT == MVT::v2f16 ||
158 LocVT == MVT::i1 ||
159 LocVT == MVT::bf16 ||
160 LocVT == MVT::v2bf16) {
161 static const MCPhysReg RegList2[] = {
162 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
163 };
164 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
165 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
166 return false;
167 }
168 }
169
170 if (LocVT == MVT::i32 ||
171 LocVT == MVT::f32 ||
172 LocVT == MVT::v2i16 ||
173 LocVT == MVT::v2f16 ||
174 LocVT == MVT::i16 ||
175 LocVT == MVT::f16 ||
176 LocVT == MVT::i1 ||
177 LocVT == MVT::bf16 ||
178 LocVT == MVT::v2bf16) {
179 int64_t Offset3 = State.AllocateStack(Size: 4, Alignment: Align(4));
180 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
181 return false;
182 }
183
184 return true; // CC didn't match.
185}
186
187
188static bool CC_SI_Gfx(unsigned ValNo, MVT ValVT,
189 MVT LocVT, CCValAssign::LocInfo LocInfo,
190 ISD::ArgFlagsTy ArgFlags, CCState &State) {
191
192 if (ArgFlags.isInReg()) {
193 if (LocVT == MVT::f32 ||
194 LocVT == MVT::i32 ||
195 LocVT == MVT::f16 ||
196 LocVT == MVT::i16 ||
197 LocVT == MVT::v2i16 ||
198 LocVT == MVT::v2f16 ||
199 LocVT == MVT::bf16 ||
200 LocVT == MVT::v2bf16) {
201 static const MCPhysReg RegList1[] = {
202 AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29
203 };
204 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
205 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
206 return false;
207 }
208 }
209 }
210
211 if (!ArgFlags.isInReg()) {
212 if (LocVT == MVT::f32 ||
213 LocVT == MVT::i32 ||
214 LocVT == MVT::f16 ||
215 LocVT == MVT::i16 ||
216 LocVT == MVT::v2i16 ||
217 LocVT == MVT::v2f16 ||
218 LocVT == MVT::bf16 ||
219 LocVT == MVT::v2bf16) {
220 static const MCPhysReg RegList2[] = {
221 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
222 };
223 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
224 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
225 return false;
226 }
227 }
228 }
229
230 if (LocVT == MVT::i32 ||
231 LocVT == MVT::f32 ||
232 LocVT == MVT::v2i16 ||
233 LocVT == MVT::v2f16 ||
234 LocVT == MVT::i16 ||
235 LocVT == MVT::f16 ||
236 LocVT == MVT::i1 ||
237 LocVT == MVT::bf16 ||
238 LocVT == MVT::v2bf16) {
239 int64_t Offset3 = State.AllocateStack(Size: 4, Alignment: Align(4));
240 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
241 return false;
242 }
243
244 return true; // CC didn't match.
245}
246
247
248static bool CC_SI_SHADER(unsigned ValNo, MVT ValVT,
249 MVT LocVT, CCValAssign::LocInfo LocInfo,
250 ISD::ArgFlagsTy ArgFlags, CCState &State) {
251
252 if (LocVT == MVT::i1) {
253 LocVT = MVT::i32;
254 if (ArgFlags.isSExt())
255 LocInfo = CCValAssign::SExt;
256 else if (ArgFlags.isZExt())
257 LocInfo = CCValAssign::ZExt;
258 else
259 LocInfo = CCValAssign::AExt;
260 }
261
262 if (ArgFlags.isInReg()) {
263 if (LocVT == MVT::f32 ||
264 LocVT == MVT::i32 ||
265 LocVT == MVT::f16 ||
266 LocVT == MVT::i16 ||
267 LocVT == MVT::v2i16 ||
268 LocVT == MVT::v2f16 ||
269 LocVT == MVT::bf16 ||
270 LocVT == MVT::v2bf16) {
271 static const MCPhysReg RegList1[] = {
272 AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43
273 };
274 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
275 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
276 return false;
277 }
278 }
279 }
280
281 if (!ArgFlags.isInReg()) {
282 if (LocVT == MVT::f32 ||
283 LocVT == MVT::i32 ||
284 LocVT == MVT::f16 ||
285 LocVT == MVT::i16 ||
286 LocVT == MVT::v2i16 ||
287 LocVT == MVT::v2f16 ||
288 LocVT == MVT::bf16 ||
289 LocVT == MVT::v2bf16) {
290 static const MCPhysReg RegList2[] = {
291 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
292 };
293 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
294 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
295 return false;
296 }
297 }
298 }
299
300 return true; // CC didn't match.
301}
302
303
304static bool RetCC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
305 MVT LocVT, CCValAssign::LocInfo LocInfo,
306 ISD::ArgFlagsTy ArgFlags, CCState &State) {
307
308 if (LocVT == MVT::i1) {
309 LocVT = MVT::i32;
310 if (ArgFlags.isSExt())
311 LocInfo = CCValAssign::SExt;
312 else if (ArgFlags.isZExt())
313 LocInfo = CCValAssign::ZExt;
314 else
315 LocInfo = CCValAssign::AExt;
316 }
317
318 if (LocVT == MVT::i1 ||
319 LocVT == MVT::i16) {
320 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
321 LocVT = MVT::i32;
322 if (ArgFlags.isSExt())
323 LocInfo = CCValAssign::SExt;
324 else if (ArgFlags.isZExt())
325 LocInfo = CCValAssign::ZExt;
326 else
327 LocInfo = CCValAssign::AExt;
328 }
329 }
330
331 if (LocVT == MVT::i32 ||
332 LocVT == MVT::f32 ||
333 LocVT == MVT::i16 ||
334 LocVT == MVT::f16 ||
335 LocVT == MVT::v2i16 ||
336 LocVT == MVT::v2f16 ||
337 LocVT == MVT::bf16 ||
338 LocVT == MVT::v2bf16) {
339 static const MCPhysReg RegList1[] = {
340 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
341 };
342 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
343 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
344 return false;
345 }
346 }
347
348 return true; // CC didn't match.
349}
350
351
352static bool RetCC_SI_Gfx(unsigned ValNo, MVT ValVT,
353 MVT LocVT, CCValAssign::LocInfo LocInfo,
354 ISD::ArgFlagsTy ArgFlags, CCState &State) {
355
356 if (LocVT == MVT::i1) {
357 LocVT = MVT::i32;
358 if (ArgFlags.isSExt())
359 LocInfo = CCValAssign::SExt;
360 else if (ArgFlags.isZExt())
361 LocInfo = CCValAssign::ZExt;
362 else
363 LocInfo = CCValAssign::AExt;
364 }
365
366 if (LocVT == MVT::i1 ||
367 LocVT == MVT::i16) {
368 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
369 LocVT = MVT::i32;
370 if (ArgFlags.isSExt())
371 LocInfo = CCValAssign::SExt;
372 else if (ArgFlags.isZExt())
373 LocInfo = CCValAssign::ZExt;
374 else
375 LocInfo = CCValAssign::AExt;
376 }
377 }
378
379 if (!ArgFlags.isInReg()) {
380 if (LocVT == MVT::f32 ||
381 LocVT == MVT::i32 ||
382 LocVT == MVT::f16 ||
383 LocVT == MVT::i16 ||
384 LocVT == MVT::v2i16 ||
385 LocVT == MVT::v2f16 ||
386 LocVT == MVT::bf16 ||
387 LocVT == MVT::v2bf16) {
388 static const MCPhysReg RegList1[] = {
389 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
390 };
391 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
392 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
393 return false;
394 }
395 }
396 }
397
398 return true; // CC didn't match.
399}
400
401
402static bool RetCC_SI_Shader(unsigned ValNo, MVT ValVT,
403 MVT LocVT, CCValAssign::LocInfo LocInfo,
404 ISD::ArgFlagsTy ArgFlags, CCState &State) {
405
406 if (LocVT == MVT::i1 ||
407 LocVT == MVT::i16) {
408 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
409 LocVT = MVT::i32;
410 if (ArgFlags.isSExt())
411 LocInfo = CCValAssign::SExt;
412 else if (ArgFlags.isZExt())
413 LocInfo = CCValAssign::ZExt;
414 else
415 LocInfo = CCValAssign::AExt;
416 }
417 }
418
419 if (LocVT == MVT::i32 ||
420 LocVT == MVT::i16 ||
421 LocVT == MVT::v2i16) {
422 static const MCPhysReg RegList1[] = {
423 AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43
424 };
425 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
426 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
427 return false;
428 }
429 }
430
431 if (LocVT == MVT::f32 ||
432 LocVT == MVT::f16 ||
433 LocVT == MVT::v2f16 ||
434 LocVT == MVT::bf16 ||
435 LocVT == MVT::v2bf16) {
436 static const MCPhysReg RegList2[] = {
437 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
438 };
439 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
440 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
441 return false;
442 }
443 }
444
445 return true; // CC didn't match.
446}
447
448#else
449
450const MCRegister CC_AMDGPU_ArgRegs[] = { 0 };
451const MCRegister CC_AMDGPU_CS_CHAIN_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR100, AMDGPU::SGPR101, AMDGPU::SGPR102, AMDGPU::SGPR103, AMDGPU::SGPR104, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR44, AMDGPU::SGPR45, AMDGPU::SGPR46, AMDGPU::SGPR47, AMDGPU::SGPR48, AMDGPU::SGPR49, AMDGPU::SGPR5, AMDGPU::SGPR50, AMDGPU::SGPR51, AMDGPU::SGPR52, AMDGPU::SGPR53, AMDGPU::SGPR54, AMDGPU::SGPR55, AMDGPU::SGPR56, AMDGPU::SGPR57, AMDGPU::SGPR58, AMDGPU::SGPR59, AMDGPU::SGPR6, AMDGPU::SGPR60, AMDGPU::SGPR61, AMDGPU::SGPR62, AMDGPU::SGPR63, AMDGPU::SGPR64, AMDGPU::SGPR65, AMDGPU::SGPR66, AMDGPU::SGPR67, AMDGPU::SGPR68, AMDGPU::SGPR69, AMDGPU::SGPR7, AMDGPU::SGPR70, AMDGPU::SGPR71, AMDGPU::SGPR72, AMDGPU::SGPR73, AMDGPU::SGPR74, AMDGPU::SGPR75, AMDGPU::SGPR76, AMDGPU::SGPR77, AMDGPU::SGPR78, AMDGPU::SGPR79, AMDGPU::SGPR8, AMDGPU::SGPR80, AMDGPU::SGPR81, AMDGPU::SGPR82, AMDGPU::SGPR83, AMDGPU::SGPR84, AMDGPU::SGPR85, AMDGPU::SGPR86, AMDGPU::SGPR87, AMDGPU::SGPR88, AMDGPU::SGPR89, AMDGPU::SGPR9, AMDGPU::SGPR90, AMDGPU::SGPR91, AMDGPU::SGPR92, AMDGPU::SGPR93, AMDGPU::SGPR94, AMDGPU::SGPR95, AMDGPU::SGPR96, AMDGPU::SGPR97, AMDGPU::SGPR98, AMDGPU::SGPR99, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR136, AMDGPU::VGPR137, AMDGPU::VGPR138, AMDGPU::VGPR139, AMDGPU::VGPR14, AMDGPU::VGPR140, AMDGPU::VGPR141, AMDGPU::VGPR142, AMDGPU::VGPR143, AMDGPU::VGPR144, AMDGPU::VGPR145, AMDGPU::VGPR146, AMDGPU::VGPR147, AMDGPU::VGPR148, AMDGPU::VGPR149, AMDGPU::VGPR15, AMDGPU::VGPR150, AMDGPU::VGPR151, AMDGPU::VGPR152, AMDGPU::VGPR153, AMDGPU::VGPR154, AMDGPU::VGPR155, AMDGPU::VGPR156, AMDGPU::VGPR157, AMDGPU::VGPR158, AMDGPU::VGPR159, AMDGPU::VGPR16, AMDGPU::VGPR160, AMDGPU::VGPR161, AMDGPU::VGPR162, AMDGPU::VGPR163, AMDGPU::VGPR164, AMDGPU::VGPR165, AMDGPU::VGPR166, AMDGPU::VGPR167, AMDGPU::VGPR168, AMDGPU::VGPR169, AMDGPU::VGPR17, AMDGPU::VGPR170, AMDGPU::VGPR171, AMDGPU::VGPR172, AMDGPU::VGPR173, AMDGPU::VGPR174, AMDGPU::VGPR175, AMDGPU::VGPR176, AMDGPU::VGPR177, AMDGPU::VGPR178, AMDGPU::VGPR179, AMDGPU::VGPR18, AMDGPU::VGPR180, AMDGPU::VGPR181, AMDGPU::VGPR182, AMDGPU::VGPR183, AMDGPU::VGPR184, AMDGPU::VGPR185, AMDGPU::VGPR186, AMDGPU::VGPR187, AMDGPU::VGPR188, AMDGPU::VGPR189, AMDGPU::VGPR19, AMDGPU::VGPR190, AMDGPU::VGPR191, AMDGPU::VGPR192, AMDGPU::VGPR193, AMDGPU::VGPR194, AMDGPU::VGPR195, AMDGPU::VGPR196, AMDGPU::VGPR197, AMDGPU::VGPR198, AMDGPU::VGPR199, AMDGPU::VGPR20, AMDGPU::VGPR200, AMDGPU::VGPR201, AMDGPU::VGPR202, AMDGPU::VGPR203, AMDGPU::VGPR204, AMDGPU::VGPR205, AMDGPU::VGPR206, AMDGPU::VGPR207, AMDGPU::VGPR208, AMDGPU::VGPR209, AMDGPU::VGPR21, AMDGPU::VGPR210, AMDGPU::VGPR211, AMDGPU::VGPR212, AMDGPU::VGPR213, AMDGPU::VGPR214, AMDGPU::VGPR215, AMDGPU::VGPR216, AMDGPU::VGPR217, AMDGPU::VGPR218, AMDGPU::VGPR219, AMDGPU::VGPR22, AMDGPU::VGPR220, AMDGPU::VGPR221, AMDGPU::VGPR222, AMDGPU::VGPR223, AMDGPU::VGPR224, AMDGPU::VGPR225, AMDGPU::VGPR226, AMDGPU::VGPR227, AMDGPU::VGPR228, AMDGPU::VGPR229, AMDGPU::VGPR23, AMDGPU::VGPR230, AMDGPU::VGPR231, AMDGPU::VGPR232, AMDGPU::VGPR233, AMDGPU::VGPR234, AMDGPU::VGPR235, AMDGPU::VGPR236, AMDGPU::VGPR237, AMDGPU::VGPR238, AMDGPU::VGPR239, AMDGPU::VGPR24, AMDGPU::VGPR240, AMDGPU::VGPR241, AMDGPU::VGPR242, AMDGPU::VGPR243, AMDGPU::VGPR244, AMDGPU::VGPR245, AMDGPU::VGPR246, AMDGPU::VGPR247, AMDGPU::VGPR248, AMDGPU::VGPR249, AMDGPU::VGPR25, AMDGPU::VGPR250, AMDGPU::VGPR251, AMDGPU::VGPR252, AMDGPU::VGPR253, AMDGPU::VGPR254, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
452const MCRegister CC_AMDGPU_Func_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
453const MCRegister CC_SI_Gfx_ArgRegs[] = { AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
454const MCRegister CC_SI_SHADER_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
455const MCRegister RetCC_AMDGPU_Func_ArgRegs[] = { AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
456const MCRegister RetCC_SI_Gfx_ArgRegs[] = { AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
457const MCRegister RetCC_SI_Shader_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
458
459#endif // CC_REGISTER_LIST
460